289 files changed, 6687 insertions, 3062 deletions

diff --git a/Documentation/credentials.txt b/Documentation/credentials.txt
index a2db35287003..995baf379c07 100644
--- a/Documentation/credentials.txt
+++ b/Documentation/credentials.txt
@@ -417,6 +417,9 @@ reference on them using:
 This does all the RCU magic inside of it.  The caller must call put_cred() on
 the credentials so obtained when they're finished with.
 
+ [*] Note: The result of __task_cred() should not be passed directly to
+     get_cred() as this may race with commit_cred().
+
 There are a couple of convenience functions to access bits of another task's
 credentials, hiding the RCU magic from the caller:
 
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index c268783bc4e7..1571c0c83dba 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -647,3 +647,10 @@ Who:	Stefan Richter <stefanr@s5r6.in-berlin.de>
 
 ----------------------------
 
+What:   The acpi_sleep=s4_nonvs command line option
+When:   2.6.37
+Files:  arch/x86/kernel/acpi/sleep.c
+Why:    superseded by acpi_sleep=nonvs
+Who:    Rafael J. Wysocki <rjw@sisk.pl>
+
+----------------------------
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 4ddb58df081e..2b2407d9a6d0 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -254,8 +254,8 @@ and is between 256 and 4096 characters. It is defined in the file
                         control method, with respect to putting devices into
                         low power states, to be enforced (the ACPI 2.0 ordering
                         of _PTS is used by default).
-                        s4_nonvs prevents the kernel from saving/restoring the
-                        ACPI NVS memory during hibernation.
+                        nonvs prevents the kernel from saving/restoring the
+                        ACPI NVS memory during suspend/hibernation and resume.
                         sci_force_enable causes the kernel to set SCI_EN directly
                         on resume from S1/S3 (which is against the ACPI spec,
                         but some broken systems don't work without it).
diff --git a/MAINTAINERS b/MAINTAINERS
index db3d0f5061f9..02f75fccac20 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6243,6 +6243,8 @@ F:	drivers/mmc/host/wbsd.*
 
 WATCHDOG DEVICE DRIVERS
 M:      Wim Van Sebroeck <wim@iguana.be>
+L:      linux-watchdog@vger.kernel.org
+W:      http://www.linux-watchdog.org/
 T:      git git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog.git
 S:      Maintained
 F:      Documentation/watchdog/
diff --git a/Makefile b/Makefile
index 886bf04931d4..141da26fda4b 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 6
 SUBLEVEL = 35
-EXTRAVERSION = -rc6
+EXTRAVERSION =
 NAME = Sheep on Meth
 
 # *DOCUMENTATION*
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 53faa9063a03..864a002137fe 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -71,6 +71,9 @@ targets       := vmlinux vmlinux.lds \
                  piggy.$(suffix_y) piggy.$(suffix_y).o \
                  font.o font.c head.o misc.o $(OBJS)
 
+# Make sure files are removed during clean
+extra-y       += piggy.gzip piggy.lzo piggy.lzma lib1funcs.S
+
 ifeq ($(CONFIG_FUNCTION_TRACER),y)
 ORIG_CFLAGS := $(KBUILD_CFLAGS)
 KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index 6f80665f477e..9eaf65f43642 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -1028,13 +1028,12 @@ static int sa1111_remove(struct platform_device *pdev)
         struct sa1111 *sachip = platform_get_drvdata(pdev);
 
         if (sachip) {
-                __sa1111_remove(sachip);
-                platform_set_drvdata(pdev, NULL);
-
 #ifdef CONFIG_PM
                 kfree(sachip->saved_state);
                 sachip->saved_state = NULL;
 #endif
+                __sa1111_remove(sachip);
+                platform_set_drvdata(pdev, NULL);
         }
 
         return 0;
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index c980156f3263..1261b1f928d9 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -26,6 +26,7 @@
 #include <linux/types.h>
 #include <asm/byteorder.h>
 #include <asm/memory.h>
+#include <asm/system.h>
 
 /*
  * ISA I/O bus memory addresses are 1:1 with the physical address.
@@ -179,25 +180,38 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
  * IO port primitives for more information.
  */
 #ifdef __mem_pci
-#define readb(c) ({ __u8  __v = __raw_readb(__mem_pci(c)); __v; })
-#define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \
+#define readb_relaxed(c) ({ u8  __v = __raw_readb(__mem_pci(c)); __v; })
+#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \
                                         __raw_readw(__mem_pci(c))); __v; })
-#define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \
+#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \
                                         __raw_readl(__mem_pci(c))); __v; })
-#define readb_relaxed(addr) readb(addr)
-#define readw_relaxed(addr) readw(addr)
-#define readl_relaxed(addr) readl(addr)
+
+#define writeb_relaxed(v,c)     ((void)__raw_writeb(v,__mem_pci(c)))
+#define writew_relaxed(v,c)     ((void)__raw_writew((__force u16) \
+                                        cpu_to_le16(v),__mem_pci(c)))
+#define writel_relaxed(v,c)     ((void)__raw_writel((__force u32) \
+                                        cpu_to_le32(v),__mem_pci(c)))
+
+#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
+#define __iormb()               rmb()
+#define __iowmb()               wmb()
+#else
+#define __iormb()               do { } while (0)
+#define __iowmb()               do { } while (0)
+#endif
+
+#define readb(c)                ({ u8  __v = readb_relaxed(c); __iormb(); __v; })
+#define readw(c)                ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
+#define readl(c)                ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
+
+#define writeb(v,c)             ({ __iowmb(); writeb_relaxed(v,c); })
+#define writew(v,c)             ({ __iowmb(); writew_relaxed(v,c); })
+#define writel(v,c)             ({ __iowmb(); writel_relaxed(v,c); })
 
 #define readsb(p,d,l)           __raw_readsb(__mem_pci(p),d,l)
 #define readsw(p,d,l)           __raw_readsw(__mem_pci(p),d,l)
 #define readsl(p,d,l)           __raw_readsl(__mem_pci(p),d,l)
 
-#define writeb(v,c)             __raw_writeb(v,__mem_pci(c))
-#define writew(v,c)             __raw_writew((__force __u16) \
-                                        cpu_to_le16(v),__mem_pci(c))
-#define writel(v,c)             __raw_writel((__force __u32) \
-                                        cpu_to_le32(v),__mem_pci(c))
-
 #define writesb(p,d,l)          __raw_writesb(__mem_pci(p),d,l)
 #define writesw(p,d,l)          __raw_writesw(__mem_pci(p),d,l)
 #define writesl(p,d,l)          __raw_writesl(__mem_pci(p),d,l)
@@ -244,13 +258,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
  * io{read,write}{8,16,32} macros
  */
 #ifndef ioread8
-#define ioread8(p)      ({ unsigned int __v = __raw_readb(p); __v; })
-#define ioread16(p)     ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __v; })
-#define ioread32(p)     ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __v; })
+#define ioread8(p)      ({ unsigned int __v = __raw_readb(p); __iormb(); __v; })
+#define ioread16(p)     ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; })
+#define ioread32(p)     ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; })
 
-#define iowrite8(v,p)   __raw_writeb(v, p)
-#define iowrite16(v,p)  __raw_writew((__force __u16)cpu_to_le16(v), p)
-#define iowrite32(v,p)  __raw_writel((__force __u32)cpu_to_le32(v), p)
+#define iowrite8(v,p)   ({ __iowmb(); (void)__raw_writeb(v, p); })
+#define iowrite16(v,p)  ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); })
+#define iowrite32(v,p)  ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_le32(v), p); })
 
 #define ioread8_rep(p,d,c)      __raw_readsb(p,d,c)
 #define ioread16_rep(p,d,c)     __raw_readsw(p,d,c)
diff --git a/arch/arm/lib/csumpartialcopyuser.S b/arch/arm/lib/csumpartialcopyuser.S
index 59ff6fdc1e63..7d08b43d2c0e 100644
--- a/arch/arm/lib/csumpartialcopyuser.S
+++ b/arch/arm/lib/csumpartialcopyuser.S
@@ -71,7 +71,7 @@
                 .pushsection .fixup,"ax"
                 .align  4
 9001:           mov     r4, #-EFAULT
-                ldr     r5, [fp, #4]            @ *err_ptr
+                ldr     r5, [sp, #8*4]          @ *err_ptr
                 str     r4, [r5]
                 ldmia   sp, {r1, r2}            @ retrieve dst, len
                 add     r2, r2, r1
diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S
index fedd8076a689..072cc6b61ba3 100644
--- a/arch/arm/mach-clps711x/include/mach/debug-macro.S
+++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S
@@ -11,6 +11,7 @@
  *
 */
 
+#include <mach/hardware.h>
 #include <asm/hardware/clps7111.h>
 
                 .macro  addruart, rx, tmp
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 2ec3095ffb7b..b280efb1fa12 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -25,6 +25,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
 #include <linux/regulator/machine.h>
+#include <linux/regulator/tps6507x.h>
 #include <linux/mfd/tps6507x.h>
 #include <linux/input/tps6507x-ts.h>
 
@@ -469,6 +470,11 @@ struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
         },
 };
 
+/* We take advantage of the fact that both defdcdc{2,3} are tied high */
+static struct tps6507x_reg_platform_data tps6507x_platform_data = {
+        .defdcdc_default = true,
+};
+
 struct regulator_init_data tps65070_regulator_data[] = {
         /* dcdc1 */
         {
@@ -494,6 +500,7 @@ struct regulator_init_data tps65070_regulator_data[] = {
                 },
                 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
                 .consumer_supplies = tps65070_dcdc2_consumers,
+                .driver_data = &tps6507x_platform_data,
         },
 
         /* dcdc3 */
@@ -507,6 +514,7 @@ struct regulator_init_data tps65070_regulator_data[] = {
                 },
                 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
                 .consumer_supplies = tps65070_dcdc3_consumers,
+                .driver_data = &tps6507x_platform_data,
         },
 
         /* ldo1 */
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c
index e3bc3f6f6b10..88b3dd89be89 100644
--- a/arch/arm/mach-footbridge/common.c
+++ b/arch/arm/mach-footbridge/common.c
@@ -232,7 +232,7 @@ EXPORT_SYMBOL(__bus_to_virt);
 
 unsigned long __pfn_to_bus(unsigned long pfn)
 {
-        return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET));
+        return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET);
 }
 EXPORT_SYMBOL(__pfn_to_bus);
 
diff --git a/arch/arm/mach-h720x/include/mach/debug-macro.S b/arch/arm/mach-h720x/include/mach/debug-macro.S
index a9ee8f0d48b7..27cafd12f033 100644
--- a/arch/arm/mach-h720x/include/mach/debug-macro.S
+++ b/arch/arm/mach-h720x/include/mach/debug-macro.S
@@ -11,8 +11,10 @@
  *
 */
 
-                .equ    io_virt, IO_BASE
-                .equ    io_phys, IO_START
+#include <mach/hardware.h>
+
+                .equ    io_virt, IO_VIRT
+                .equ    io_phys, IO_PHYS
 
                 .macro  addruart, rx, tmp
                 mrc     p15, 0, \rx, c1, c0
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.c b/arch/arm/mach-kirkwood/tsx1x-common.c
index 7221c20b2afa..f781164e623f 100644
--- a/arch/arm/mach-kirkwood/tsx1x-common.c
+++ b/arch/arm/mach-kirkwood/tsx1x-common.c
@@ -77,7 +77,7 @@ struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = {
         },
 };
 
-void qnap_tsx1x_register_flash(void)
+void __init qnap_tsx1x_register_flash(void)
 {
         spi_register_board_info(qnap_tsx1x_spi_slave_info,
                                 ARRAY_SIZE(qnap_tsx1x_spi_slave_info));
diff --git a/arch/arm/mach-kirkwood/tsx1x-common.h b/arch/arm/mach-kirkwood/tsx1x-common.h
index 9a592962a6ea..7fa037361b55 100644
--- a/arch/arm/mach-kirkwood/tsx1x-common.h
+++ b/arch/arm/mach-kirkwood/tsx1x-common.h
@@ -1,7 +1,7 @@
 #ifndef __ARCH_KIRKWOOD_TSX1X_COMMON_H
 #define __ARCH_KIRKWOOD_TSX1X_COMMON_H
 
-extern void qnap_tsx1x_register_flash(void);
+extern void __init qnap_tsx1x_register_flash(void);
 extern void qnap_tsx1x_power_off(void);
 
 #endif
diff --git a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S
index 0859336a8e6d..5c934bdb7158 100644
--- a/arch/arm/mach-ns9xxx/include/mach/debug-macro.S
+++ b/arch/arm/mach-ns9xxx/include/mach/debug-macro.S
@@ -8,6 +8,7 @@
  * the Free Software Foundation.
  */
 #include <mach/hardware.h>
+#include <asm/memory.h>
 
 #include <mach/regs-board-a9m9750dev.h>
 
diff --git a/arch/arm/mach-ns9xxx/include/mach/uncompress.h b/arch/arm/mach-ns9xxx/include/mach/uncompress.h
index 1b12d324b087..770a68c46e81 100644
--- a/arch/arm/mach-ns9xxx/include/mach/uncompress.h
+++ b/arch/arm/mach-ns9xxx/include/mach/uncompress.h
@@ -20,50 +20,49 @@ static void putc_dummy(char c, void __iomem *base)
         /* nothing */
 }
 
+static int timeout;
+
 static void putc_ns9360(char c, void __iomem *base)
 {
-        static int t = 0x10000;
         do {
-                if (t)
-                        --t;
+                if (timeout)
+                        --timeout;
 
                 if (__raw_readl(base + 8) & (1 << 3)) {
                         __raw_writeb(c, base + 16);
-                        t = 0x10000;
+                        timeout = 0x10000;
                         break;
                 }
-        } while (t);
+        } while (timeout);
 }
 
 static void putc_a9m9750dev(char c, void __iomem *base)
 {
-        static int t = 0x10000;
         do {
-                if (t)
-                        --t;
+                if (timeout)
+                        --timeout;
 
                 if (__raw_readb(base + 5) & (1 << 5)) {
                         __raw_writeb(c, base);
-                        t = 0x10000;
+                        timeout = 0x10000;
                         break;
                 }
-        } while (t);
+        } while (timeout);
 
 }
 
 static void putc_ns921x(char c, void __iomem *base)
 {
-        static int t = 0x10000;
         do {
-                if (t)
-                        --t;
+                if (timeout)
+                        --timeout;
 
                 if (!(__raw_readl(base) & (1 << 11))) {
                         __raw_writeb(c, base + 0x0028);
-                        t = 0x10000;
+                        timeout = 0x10000;
                         break;
                 }
-        } while (t);
+        } while (timeout);
 }
 
 #define MSCS __REG(0xA0900184)
@@ -89,6 +88,7 @@ static void putc_ns921x(char c, void __iomem *base)
 
 static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base)
 {
+        timeout = 0x10000;
         if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) {
                 /* ns9360 or ns9750 */
                 if (NS9360_UART_ENABLED(NS9360_UARTA)) {
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index b9f0c4c46bbb..3b02d3b944af 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -1,3 +1,7 @@
+if ARCH_OMAP1
+
+menu "TI OMAP1 specific features"
+
 comment "OMAP Core Type"
         depends on ARCH_OMAP1
 
@@ -243,3 +247,6 @@ config OMAP_ARM_30MHZ
         help
           Enable 30MHz clock for OMAP CPU. If unsure, say N.
 
+endmenu
+
+endif
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index ea231c7a550a..facfaeb1ae5c 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -23,6 +23,9 @@ obj-y					+= $(i2c-omap-m) $(i2c-omap-y)
 
 led-y := leds.o
 
+usb-fs-$(CONFIG_USB)                    := usb.o
+obj-y                                   += $(usb-fs-m) $(usb-fs-y)
+
 # Specific board support
 obj-$(CONFIG_MACH_OMAP_H2)              += board-h2.o board-h2-mmc.o
 obj-$(CONFIG_MACH_OMAP_INNOVATOR)       += board-innovator.o
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index fdd1dd53fa9c..c6a81ff8c0d8 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -235,7 +235,7 @@ static void __init ams_delta_init(void)
         /* Clear latch2 (NAND, LCD, modem enable) */
         ams_delta_latch2_write(~0, 0);
 
-        omap_usb_init(&ams_delta_usb_config);
+        omap1_usb_init(&ams_delta_usb_config);
         platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
 
 #ifdef CONFIG_AMS_DELTA_FIQ
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 096f2ed102cb..405ff7a3b82d 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -292,6 +292,18 @@ static void __init omap_fsample_init(void)
         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
 
+        /* Mux pins for keypad */
+        omap_cfg_reg(E2_7XX_KBR0);
+        omap_cfg_reg(J7_7XX_KBR1);
+        omap_cfg_reg(E1_7XX_KBR2);
+        omap_cfg_reg(F3_7XX_KBR3);
+        omap_cfg_reg(D2_7XX_KBR4);
+        omap_cfg_reg(C2_7XX_KBC0);
+        omap_cfg_reg(D3_7XX_KBC1);
+        omap_cfg_reg(E4_7XX_KBC2);
+        omap_cfg_reg(F4_7XX_KBC3);
+        omap_cfg_reg(E3_7XX_KBC4);
+
         platform_add_devices(devices, ARRAY_SIZE(devices));
 
         omap_board_config = fsample_config;
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index e1195a3467b8..e9ed8bff1ce3 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -72,12 +72,12 @@ static void __init omap_generic_init(void)
                 omap_cfg_reg(UART3_TX);
                 omap_cfg_reg(UART3_RX);
 
-                omap_usb_init(&generic1510_usb_config);
+                omap1_usb_init(&generic1510_usb_config);
         }
 #endif
 #if defined(CONFIG_ARCH_OMAP16XX)
         if (!cpu_is_omap1510()) {
-                omap_usb_init(&generic1610_usb_config);
+                omap1_usb_init(&generic1610_usb_config);
         }
 #endif
 
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index d1100e4f65ac..2efa4272d2e3 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -292,15 +292,6 @@ static struct platform_device h2_kp_device = {
 
 #define H2_IRDA_FIRSEL_GPIO_PIN 17
 
-#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
-static int h2_transceiver_mode(struct device *dev, int state)
-{
-        /* SIR when low, else MIR/FIR when HIGH */
-        gpio_set_value(H2_IRDA_FIRSEL_GPIO_PIN, !(state & IR_SIRMODE));
-        return 0;
-}
-#endif
-
 static struct omap_irda_config h2_irda_data = {
         .transceiver_cap        = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
         .rx_channel             = OMAP_DMA_UART3_RX,
@@ -437,14 +428,18 @@ static void __init h2_init(void)
         /* omap_cfg_reg(U19_ARMIO1); */         /* CD */
         omap_cfg_reg(BALLOUT_V8_ARMIO3);        /* WP */
 
-        /* Irda */
-#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
-        omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A);
-        if (gpio_request(H2_IRDA_FIRSEL_GPIO_PIN, "IRDA mode") < 0)
-                BUG();
-        gpio_direction_output(H2_IRDA_FIRSEL_GPIO_PIN, 0);
-        h2_irda_data.transceiver_mode = h2_transceiver_mode;
-#endif
+        /* Mux pins for keypad */
+        omap_cfg_reg(F18_1610_KBC0);
+        omap_cfg_reg(D20_1610_KBC1);
+        omap_cfg_reg(D19_1610_KBC2);
+        omap_cfg_reg(E18_1610_KBC3);
+        omap_cfg_reg(C21_1610_KBC4);
+        omap_cfg_reg(G18_1610_KBR0);
+        omap_cfg_reg(F19_1610_KBR1);
+        omap_cfg_reg(H14_1610_KBR2);
+        omap_cfg_reg(E20_1610_KBR3);
+        omap_cfg_reg(E19_1610_KBR4);
+        omap_cfg_reg(N19_1610_KBR5);
 
         platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
         omap_board_config = h2_config;
@@ -452,7 +447,7 @@ static void __init h2_init(void)
         omap_serial_init();
         omap_register_i2c_bus(1, 100, h2_i2c_board_info,
                               ARRAY_SIZE(h2_i2c_board_info));
-        omap_usb_init(&h2_usb_config);
+        omap1_usb_init(&h2_usb_config);
         h2_mmc_init();
 }
 
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index a53ab8297d25..a228e9d6eb7b 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -397,6 +397,19 @@ static void __init h3_init(void)
         /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
         omap_cfg_reg(V2_1710_GPIO10);
 
+        /* Mux pins for keypad */
+        omap_cfg_reg(F18_1610_KBC0);
+        omap_cfg_reg(D20_1610_KBC1);
+        omap_cfg_reg(D19_1610_KBC2);
+        omap_cfg_reg(E18_1610_KBC3);
+        omap_cfg_reg(C21_1610_KBC4);
+        omap_cfg_reg(G18_1610_KBR0);
+        omap_cfg_reg(F19_1610_KBR1);
+        omap_cfg_reg(H14_1610_KBR2);
+        omap_cfg_reg(E20_1610_KBR3);
+        omap_cfg_reg(E19_1610_KBR4);
+        omap_cfg_reg(N19_1610_KBR5);
+
         platform_add_devices(devices, ARRAY_SIZE(devices));
         spi_register_board_info(h3_spi_board_info,
                                 ARRAY_SIZE(h3_spi_board_info));
@@ -405,7 +418,7 @@ static void __init h3_init(void)
         omap_serial_init();
         omap_register_i2c_bus(1, 100, h3_i2c_board_info,
                               ARRAY_SIZE(h3_i2c_board_info));
-        omap_usb_init(&h3_usb_config);
+        omap1_usb_init(&h3_usb_config);
         h3_mmc_init();
 }
 
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c
index 8e313b4b99a9..736e4c2064f6 100644
--- a/arch/arm/mach-omap1/board-htcherald.c
+++ b/arch/arm/mach-omap1/board-htcherald.c
@@ -287,7 +287,7 @@ static void __init htcherald_init(void)
         htcherald_disable_watchdog();
 
         htcherald_usb_enable();
-        omap_usb_init(&htcherald_usb_config);
+        omap1_usb_init(&htcherald_usb_config);
 }
 
 static void __init htcherald_init_irq(void)
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 5d12fd35681b..3c04e90fb85a 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -422,13 +422,13 @@ static void __init innovator_init(void)
 
 #ifdef CONFIG_ARCH_OMAP15XX
         if (cpu_is_omap1510()) {
-                omap_usb_init(&innovator1510_usb_config);
+                omap1_usb_init(&innovator1510_usb_config);
                 innovator_config[1].data = &innovator1510_lcd_config;
         }
 #endif
 #ifdef CONFIG_ARCH_OMAP16XX
         if (cpu_is_omap1610()) {
-                omap_usb_init(&h2_usb_config);
+                omap1_usb_init(&h2_usb_config);
                 innovator_config[1].data = &innovator1610_lcd_config;
         }
 #endif
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 71e1a3fad0ea..5224b67f7f1c 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -32,7 +32,6 @@
 #include <plat/board.h>
 #include <plat/keypad.h>
 #include <plat/common.h>
-#include <plat/dsp_common.h>
 #include <plat/hwa742.h>
 #include <plat/lcd_mipid.h>
 #include <plat/mmc.h>
@@ -242,138 +241,6 @@ static inline void nokia770_mmc_init(void)
 }
 #endif
 
-#if     defined(CONFIG_OMAP_DSP)
-/*
- * audio power control
- */
-#define HEADPHONE_GPIO          14
-#define AMPLIFIER_CTRL_GPIO     58
-
-static struct clk *dspxor_ck;
-static DEFINE_MUTEX(audio_pwr_lock);
-/*
- * audio_pwr_state
- * +--+-------------------------+---------------------------------------+
- * |-1|down                     |power-up request -> 0                  |
- * +--+-------------------------+---------------------------------------+
- * | 0|up                       |power-down(1) request -> 1             |
- * |  |                         |power-down(2) request -> (ignore)      |
- * +--+-------------------------+---------------------------------------+
- * | 1|up,                      |power-up request -> 0                  |
- * |  |received down(1) request |power-down(2) request -> -1            |
- * +--+-------------------------+---------------------------------------+
- */
-static int audio_pwr_state = -1;
-
-static inline void aic23_power_up(void)
-{
-}
-static inline void aic23_power_down(void)
-{
-}
-
-/*
- * audio_pwr_up / down should be called under audio_pwr_lock
- */
-static void nokia770_audio_pwr_up(void)
-{
-        clk_enable(dspxor_ck);
-
-        /* Turn on codec */
-        aic23_power_up();
-
-        if (gpio_get_value(HEADPHONE_GPIO))
-                /* HP not connected, turn on amplifier */
-                gpio_set_value(AMPLIFIER_CTRL_GPIO, 1);
-        else
-                /* HP connected, do not turn on amplifier */
-                printk("HP connected\n");
-}
-
-static void codec_delayed_power_down(struct work_struct *work)
-{
-        mutex_lock(&audio_pwr_lock);
-        if (audio_pwr_state == -1)
-                aic23_power_down();
-        clk_disable(dspxor_ck);
-        mutex_unlock(&audio_pwr_lock);
-}
-
-static DECLARE_DELAYED_WORK(codec_power_down_work, codec_delayed_power_down);
-
-static void nokia770_audio_pwr_down(void)
-{
-        /* Turn off amplifier */
-        gpio_set_value(AMPLIFIER_CTRL_GPIO, 0);
-
-        /* Turn off codec: schedule delayed work */
-        schedule_delayed_work(&codec_power_down_work, HZ / 20); /* 50ms */
-}
-
-static int
-nokia770_audio_pwr_up_request(struct dsp_kfunc_device *kdev, int stage)
-{
-        mutex_lock(&audio_pwr_lock);
-        if (audio_pwr_state == -1)
-                nokia770_audio_pwr_up();
-        /* force audio_pwr_state = 0, even if it was 1. */
-        audio_pwr_state = 0;
-        mutex_unlock(&audio_pwr_lock);
-        return 0;
-}
-
-static int
-nokia770_audio_pwr_down_request(struct dsp_kfunc_device *kdev, int stage)
-{
-        mutex_lock(&audio_pwr_lock);
-        switch (stage) {
-        case 1:
-                if (audio_pwr_state == 0)
-                        audio_pwr_state = 1;
-                break;
-        case 2:
-                if (audio_pwr_state == 1) {
-                        nokia770_audio_pwr_down();
-                        audio_pwr_state = -1;
-                }
-                break;
-        }
-        mutex_unlock(&audio_pwr_lock);
-        return 0;
-}
-
-static struct dsp_kfunc_device nokia770_audio_device = {
-        .name    = "audio",
-        .type    = DSP_KFUNC_DEV_TYPE_AUDIO,
-        .enable  = nokia770_audio_pwr_up_request,
-        .disable = nokia770_audio_pwr_down_request,
-};
-
-static __init int omap_dsp_init(void)
-{
-        int ret;
-
-        dspxor_ck = clk_get(0, "dspxor_ck");
-        if (IS_ERR(dspxor_ck)) {
-                printk(KERN_ERR "couldn't acquire dspxor_ck\n");
-                return PTR_ERR(dspxor_ck);
-        }
-
-        ret = dsp_kfunc_device_register(&nokia770_audio_device);
-        if (ret) {
-                printk(KERN_ERR
-                       "KFUNC device registration faild: %s\n",
-                       nokia770_audio_device.name);
-                goto out;
-        }
-        return 0;
- out:
-        return ret;
-}
-#else
-#define omap_dsp_init()         do {} while (0)
-#endif  /* CONFIG_OMAP_DSP */
-
 static void __init omap_nokia770_init(void)
 {
         platform_add_devices(nokia770_devices, ARRAY_SIZE(nokia770_devices));
@@ -382,11 +249,10 @@ static void __init omap_nokia770_init(void)
         omap_gpio_init();
         omap_serial_init();
         omap_register_i2c_bus(1, 100, NULL, 0);
-        omap_dsp_init();
         hwa742_dev_init();
         ads7846_dev_init();
         mipid_dev_init();
-        omap_usb_init(&nokia770_usb_config);
+        omap1_usb_init(&nokia770_usb_config);
         nokia770_mmc_init();
 }
 
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 80d862001def..b28c46a9ecce 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -560,7 +560,7 @@ static void __init osk_init(void)
         l |= (3 << 1);
         omap_writel(l, USB_TRANSCEIVER_CTRL);
 
-        omap_usb_init(&osk_usb_config);
+        omap1_usb_init(&osk_usb_config);
 
         /* irq for tps65010 chip */
         /* bootloader effectively does:  omap_cfg_reg(U19_1610_MPUIO1); */
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 569b4c9085cd..514564f1df22 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -213,90 +213,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
-#ifdef CONFIG_APM
-/*
- * Values measured in 10 minute intervals averaged over 10 samples.
- * May differ slightly from device to device but should be accurate
- * enough to give basic idea of battery life left and trigger
- * potential alerts.
- */
-static const int palmte_battery_sample[] = {
-        2194, 2157, 2138, 2120,
-        2104, 2089, 2075, 2061,
-        2048, 2038, 2026, 2016,
-        2008, 1998, 1989, 1980,
-        1970, 1958, 1945, 1928,
-        1910, 1888, 1860, 1827,
-        1791, 1751, 1709, 1656,
-};
-
-#define INTERVAL                10
-#define BATTERY_HIGH_TRESHOLD   66
-#define BATTERY_LOW_TRESHOLD    33
-
-static void palmte_get_power_status(struct apm_power_info *info, int *battery)
-{
-        int charging, batt, hi, lo, mid;
-
-        charging = !gpio_get_value(PALMTE_DC_GPIO);
-        batt = battery[0];
-        if (charging)
-                batt -= 60;
-
-        hi = ARRAY_SIZE(palmte_battery_sample);
-        lo = 0;
-
-        info->battery_flag = 0;
-        info->units = APM_UNITS_MINS;
-
-        if (batt > palmte_battery_sample[lo]) {
-                info->battery_life = 100;
-                info->time = INTERVAL * ARRAY_SIZE(palmte_battery_sample);
-        } else if (batt <= palmte_battery_sample[hi - 1]) {
-                info->battery_life = 0;
-                info->time = 0;
-        } else {
-                while (hi > lo + 1) {
-                        mid = (hi + lo) >> 1;
-                        if (batt <= palmte_battery_sample[mid])
-                                lo = mid;
-                        else
-                                hi = mid;
-                }
-
-                mid = palmte_battery_sample[lo] - palmte_battery_sample[hi];
-                hi = palmte_battery_sample[lo] - batt;
-                info->battery_life = 100 - (100 * lo + 100 * hi / mid) /
-                        ARRAY_SIZE(palmte_battery_sample);
-                info->time = INTERVAL * (ARRAY_SIZE(palmte_battery_sample) -
-                                lo) - INTERVAL * hi / mid;
-        }
-
-        if (charging) {
-                info->ac_line_status = APM_AC_ONLINE;
-                info->battery_status = APM_BATTERY_STATUS_CHARGING;
-                info->battery_flag |= APM_BATTERY_FLAG_CHARGING;
-        } else {
-                info->ac_line_status = APM_AC_OFFLINE;
-                if (info->battery_life > BATTERY_HIGH_TRESHOLD)
-                        info->battery_status = APM_BATTERY_STATUS_HIGH;
-                else if (info->battery_life > BATTERY_LOW_TRESHOLD)
-                        info->battery_status = APM_BATTERY_STATUS_LOW;
-                else
-                        info->battery_status = APM_BATTERY_STATUS_CRITICAL;
-        }
-
-        if (info->battery_life > BATTERY_HIGH_TRESHOLD)
-                info->battery_flag |= APM_BATTERY_FLAG_HIGH;
-        else if (info->battery_life > BATTERY_LOW_TRESHOLD)
-                info->battery_flag |= APM_BATTERY_FLAG_LOW;
-        else
-                info->battery_flag |= APM_BATTERY_FLAG_CRITICAL;
-}
-#else
-#define palmte_get_power_status NULL
-#endif
-
 static struct omap_board_config_kernel palmte_config[] __initdata = {
         { OMAP_TAG_LCD,         &palmte_lcd_config },
 };
@@ -359,7 +275,7 @@ static void __init omap_palmte_init(void)
         spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info));
         palmte_misc_gpio_setup();
         omap_serial_init();
-        omap_usb_init(&palmte_usb_config);
+        omap1_usb_init(&palmte_usb_config);
         omap_register_i2c_bus(1, 100, NULL, 0);
 }
 
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 6ad49a2cc1a0..c0bcfc6119db 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -307,7 +307,7 @@ static void __init omap_palmtt_init(void)
 
         spi_register_board_info(palmtt_boardinfo,ARRAY_SIZE(palmtt_boardinfo));
         omap_serial_init();
-        omap_usb_init(&palmtt_usb_config);
+        omap1_usb_init(&palmtt_usb_config);
         omap_register_i2c_bus(1, 100, NULL, 0);
 }
 
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 6641de9257ef..f431b44a71e3 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -325,7 +325,7 @@ omap_palmz71_init(void)
 
         spi_register_board_info(palmz71_boardinfo,
                                 ARRAY_SIZE(palmz71_boardinfo));
-        omap_usb_init(&palmz71_usb_config);
+        omap1_usb_init(&palmz71_usb_config);
         omap_serial_init();
         omap_register_i2c_bus(1, 100, NULL, 0);
         palmz71_gpio_setup(0);
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index e854d5741c88..50690347c7b4 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -260,6 +260,18 @@ static void __init omap_perseus2_init(void)
         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
 
+        /* Mux pins for keypad */
+        omap_cfg_reg(E2_7XX_KBR0);
+        omap_cfg_reg(J7_7XX_KBR1);
+        omap_cfg_reg(E1_7XX_KBR2);
+        omap_cfg_reg(F3_7XX_KBR3);
+        omap_cfg_reg(D2_7XX_KBR4);
+        omap_cfg_reg(C2_7XX_KBC0);
+        omap_cfg_reg(D3_7XX_KBC1);
+        omap_cfg_reg(E4_7XX_KBC2);
+        omap_cfg_reg(F4_7XX_KBC3);
+        omap_cfg_reg(E3_7XX_KBC4);
+
         platform_add_devices(devices, ARRAY_SIZE(devices));
 
         omap_board_config = perseus2_config;
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 2fb1e5f8e2ec..7b21190a914a 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -392,7 +392,7 @@ static void __init omap_sx1_init(void)
         omap_board_config_size = ARRAY_SIZE(sx1_config);
         omap_serial_init();
         omap_register_i2c_bus(1, 100, NULL, 0);
-        omap_usb_init(&sx1_usb_config);
+        omap1_usb_init(&sx1_usb_config);
         sx1_mmc_init();
 
         /* turn on USB power */
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 87b9436fe7c0..78107543d59b 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -198,7 +198,7 @@ static void __init voiceblue_init(void)
         omap_board_config = voiceblue_config;
         omap_board_config_size = ARRAY_SIZE(voiceblue_config);
         omap_serial_init();
-        omap_usb_init(&voiceblue_usb_config);
+        omap1_usb_init(&voiceblue_usb_config);
         omap_register_i2c_bus(1, 100, NULL, 0);
 
         /* There is a good chance board is going up, so enable power LED
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index ca4bd862033c..af54114b8f08 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -551,6 +551,24 @@ static struct clk usb_dc_ck7xx = {
         .enable_bit     = SOFT_USB_OTG_DPLL_REQ_SHIFT,
 };
 
+static struct clk uart1_7xx = {
+        .name           = "uart1_ck",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent */
+        .rate           = 12000000,
+        .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+        .enable_bit     = 9,
+};
+
+static struct clk uart2_7xx = {
+        .name           = "uart2_ck",
+        .ops            = &clkops_generic,
+        /* Direct from ULPD, no parent */
+        .rate           = 12000000,
+        .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+        .enable_bit     = 11,
+};
+
 static struct clk mclk_1510 = {
         .name           = "mclk",
         .ops            = &clkops_generic,
@@ -697,7 +715,9 @@ static struct omap_clk omap_clks[] = {
         /* ULPD clocks */
         CLK(NULL,       "uart1_ck",     &uart1_1510,    CK_1510 | CK_310),
         CLK(NULL,       "uart1_ck",     &uart1_16xx.clk, CK_16XX),
+        CLK(NULL,       "uart1_ck",     &uart1_7xx,     CK_7XX),
         CLK(NULL,       "uart2_ck",     &uart2_ck,      CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "uart2_ck",     &uart2_7xx,     CK_7XX),
         CLK(NULL,       "uart3_ck",     &uart3_1510,    CK_1510 | CK_310),
         CLK(NULL,       "uart3_ck",     &uart3_16xx.clk, CK_16XX),
         CLK(NULL,       "usb_clko",     &usb_clko,      CK_16XX | CK_1510 | CK_310),
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 379100c17639..aa0725608fb1 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -63,44 +63,7 @@ static void omap_init_rtc(void)
 static inline void omap_init_rtc(void) {}
 #endif
 
-#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
-
-#if defined(CONFIG_ARCH_OMAP15XX)
-#  define OMAP1_MBOX_SIZE       0x23
-#  define INT_DSP_MAILBOX1      INT_1510_DSP_MAILBOX1
-#elif defined(CONFIG_ARCH_OMAP16XX)
-#  define OMAP1_MBOX_SIZE       0x2f
-#  define INT_DSP_MAILBOX1      INT_1610_DSP_MAILBOX1
-#endif
-
-#define OMAP1_MBOX_BASE         OMAP16XX_MAILBOX_BASE
-
-static struct resource mbox_resources[] = {
-        {
-                .start          = OMAP1_MBOX_BASE,
-                .end            = OMAP1_MBOX_BASE + OMAP1_MBOX_SIZE,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = INT_DSP_MAILBOX1,
-                .flags          = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device mbox_device = {
-        .name           = "omap1-mailbox",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(mbox_resources),
-        .resource       = mbox_resources,
-};
-
-static inline void omap_init_mbox(void)
-{
-        platform_device_register(&mbox_device);
-}
-#else
 static inline void omap_init_mbox(void) { }
-#endif
 
 /*-------------------------------------------------------------------------*/
 
@@ -230,42 +193,7 @@ static inline void omap_init_spi100k(void)
 
 /*-------------------------------------------------------------------------*/
 
-#if defined(CONFIG_OMAP_STI)
-
-#define OMAP1_STI_BASE          0xfffea000
-#define OMAP1_STI_CHANNEL_BASE  (OMAP1_STI_BASE + 0x400)
-
-static struct resource sti_resources[] = {
-        {
-                .start          = OMAP1_STI_BASE,
-                .end            = OMAP1_STI_BASE + SZ_1K - 1,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = OMAP1_STI_CHANNEL_BASE,
-                .end            = OMAP1_STI_CHANNEL_BASE + SZ_1K - 1,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = INT_1610_STI,
-                .flags          = IORESOURCE_IRQ,
-        }
-};
-
-static struct platform_device sti_device = {
-        .name           = "sti",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(sti_resources),
-        .resource       = sti_resources,
-};
-
-static inline void omap_init_sti(void)
-{
-        platform_device_register(&sti_device);
-}
-#else
 static inline void omap_init_sti(void) {}
-#endif
 
 /*-------------------------------------------------------------------------*/
 
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index e9bdff192f82..b3a796a6da03 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -23,7 +23,6 @@
 #include <plat/mux.h>
 #include <plat/cpu.h>
 #include <plat/mcbsp.h>
-#include <plat/dsp_common.h>
 
 #define DPS_RSTCT2_PER_EN       (1 << 0)
 #define DSP_RSTCT2_WD_PER_EN    (1 << 1)
@@ -46,7 +45,6 @@ static void omap1_mcbsp_request(unsigned int id)
                                 clk_enable(api_clk);
                                 clk_enable(dsp_clk);
 
-                                omap_dsp_request_mem();
                                 /*
                                  * DSP external peripheral reset
                                  * FIXME: This should be moved to dsp code
@@ -62,7 +60,6 @@ static void omap1_mcbsp_free(unsigned int id)
 {
         if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
                 if (--dsp_use == 0) {
-                        omap_dsp_release_mem();
                         if (!IS_ERR(api_clk)) {
                                 clk_disable(api_clk);
                                 clk_put(api_clk);
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 84341377232d..7835add00344 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -70,6 +70,10 @@ MUX_CFG_7XX("SPI_7XX_3",           6,   13,    4,   12,   1, 0)
 MUX_CFG_7XX("SPI_7XX_4",           6,   17,    4,   16,   1, 0)
 MUX_CFG_7XX("SPI_7XX_5",           8,   25,    0,   24,   0, 0)
 MUX_CFG_7XX("SPI_7XX_6",           9,    5,    0,    4,   0, 0)
+
+/* UART pins */
+MUX_CFG_7XX("UART_7XX_1",          3,   21,    0,   20,   0, 0)
+MUX_CFG_7XX("UART_7XX_2",          8,    1,    6,    0,   0, 0)
 };
 #define OMAP7XX_PINS_SZ         ARRAY_SIZE(omap7xx_pins)
 #else
@@ -440,7 +444,7 @@ int __init_or_module omap1_cfg_reg(const struct pin_config *cfg)
         }
 #endif
 
-#ifdef CONFIG_OMAP_MUX_ERRORS
+#ifdef CONFIG_OMAP_MUX_WARNINGS
         return warn ? -ETXTBSY : 0;
 #else
         return 0;
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 349de90194e3..b78d0749f13d 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -122,6 +122,13 @@ void __init omap_serial_init(void)
 
         for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) {
 
+                /* Don't look at UARTs higher than 2 for omap7xx */
+                if (cpu_is_omap7xx() && i > 1) {
+                        serial_platform_data[i].membase = NULL;
+                        serial_platform_data[i].mapbase = 0;
+                        continue;
+                }
+
                 /* Static mapping, never released */
                 serial_platform_data[i].membase =
                         ioremap(serial_platform_data[i].mapbase, SZ_2K);
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c
new file mode 100644
index 000000000000..19de03b074e3
--- /dev/null
+++ b/arch/arm/mach-omap1/usb.c
@@ -0,0 +1,530 @@
+/*
+ * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx
+ *
+ * Copyright (C) 2004 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <asm/irq.h>
+
+#include <plat/mux.h>
+#include <plat/usb.h>
+
+/* These routines should handle the standard chip-specific modes
+ * for usb0/1/2 ports, covering basic mux and transceiver setup.
+ *
+ * Some board-*.c files will need to set up additional mux options,
+ * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
+ */
+
+/* TESTED ON:
+ *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
+ *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
+ *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
+ *  - 1510 Innovator UDC with bundled usb0 cable
+ *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
+ *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
+ *  - 1710 custom development board using alternate pin group
+ *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
+ */
+
+#define INT_USB_IRQ_GEN         IH2_BASE + 20
+#define INT_USB_IRQ_NISO        IH2_BASE + 30
+#define INT_USB_IRQ_ISO         IH2_BASE + 29
+#define INT_USB_IRQ_HGEN        INT_USB_HHC_1
+#define INT_USB_IRQ_OTG         IH2_BASE + 8
+
+#ifdef  CONFIG_USB_GADGET_OMAP
+
+static struct resource udc_resources[] = {
+        /* order is significant! */
+        {               /* registers */
+                .start          = UDC_BASE,
+                .end            = UDC_BASE + 0xff,
+                .flags          = IORESOURCE_MEM,
+        }, {            /* general IRQ */
+                .start          = INT_USB_IRQ_GEN,
+                .flags          = IORESOURCE_IRQ,
+        }, {            /* PIO IRQ */
+                .start          = INT_USB_IRQ_NISO,
+                .flags          = IORESOURCE_IRQ,
+        }, {            /* SOF IRQ */
+                .start          = INT_USB_IRQ_ISO,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static u64 udc_dmamask = ~(u32)0;
+
+static struct platform_device udc_device = {
+        .name           = "omap_udc",
+        .id             = -1,
+        .dev = {
+                .dma_mask               = &udc_dmamask,
+                .coherent_dma_mask      = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(udc_resources),
+        .resource       = udc_resources,
+};
+
+static inline void udc_device_init(struct omap_usb_config *pdata)
+{
+        /* IRQ numbers for omap7xx */
+        if(cpu_is_omap7xx()) {
+                udc_resources[1].start = INT_7XX_USB_GENI;
+                udc_resources[2].start = INT_7XX_USB_NON_ISO;
+                udc_resources[3].start = INT_7XX_USB_ISO;
+        }
+        pdata->udc_device = &udc_device;
+}
+
+#else
+
+static inline void udc_device_init(struct omap_usb_config *pdata)
+{
+}
+
+#endif
+
+#if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+
+/* The dmamask must be set for OHCI to work */
+static u64 ohci_dmamask = ~(u32)0;
+
+static struct resource ohci_resources[] = {
+        {
+                .start  = OMAP_OHCI_BASE,
+                .end    = OMAP_OHCI_BASE + 0xff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = INT_USB_IRQ_HGEN,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device ohci_device = {
+        .name                   = "ohci",
+        .id                     = -1,
+        .dev = {
+                .dma_mask               = &ohci_dmamask,
+                .coherent_dma_mask      = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(ohci_resources),
+        .resource               = ohci_resources,
+};
+
+static inline void ohci_device_init(struct omap_usb_config *pdata)
+{
+        if (cpu_is_omap7xx())
+                ohci_resources[1].start = INT_7XX_USB_HHC_1;
+        pdata->ohci_device = &ohci_device;
+}
+
+#else
+
+static inline void ohci_device_init(struct omap_usb_config *pdata)
+{
+}
+
+#endif
+
+#if     defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
+
+static struct resource otg_resources[] = {
+        /* order is significant! */
+        {
+                .start          = OTG_BASE,
+                .end            = OTG_BASE + 0xff,
+                .flags          = IORESOURCE_MEM,
+        }, {
+                .start          = INT_USB_IRQ_OTG,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device otg_device = {
+        .name           = "omap_otg",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(otg_resources),
+        .resource       = otg_resources,
+};
+
+static inline void otg_device_init(struct omap_usb_config *pdata)
+{
+        if (cpu_is_omap7xx())
+                otg_resources[1].start = INT_7XX_USB_OTG;
+        pdata->otg_device = &otg_device;
+}
+
+#else
+
+static inline void otg_device_init(struct omap_usb_config *pdata)
+{
+}
+
+#endif
+
+u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
+{
+        u32     syscon1 = 0;
+
+        if (nwires == 0) {
+                if (!cpu_is_omap15xx()) {
+                        u32 l;
+
+                        /* pulldown D+/D- */
+                        l = omap_readl(USB_TRANSCEIVER_CTRL);
+                        l &= ~(3 << 1);
+                        omap_writel(l, USB_TRANSCEIVER_CTRL);
+                }
+                return 0;
+        }
+
+        if (is_device) {
+                if (cpu_is_omap7xx()) {
+                        omap_cfg_reg(AA17_7XX_USB_DM);
+                        omap_cfg_reg(W16_7XX_USB_PU_EN);
+                        omap_cfg_reg(W17_7XX_USB_VBUSI);
+                        omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
+                        omap_cfg_reg(W19_7XX_USB_DCRST);
+                } else
+                        omap_cfg_reg(W4_USB_PUEN);
+        }
+
+        if (nwires == 2) {
+                u32 l;
+
+                // omap_cfg_reg(P9_USB_DP);
+                // omap_cfg_reg(R8_USB_DM);
+
+                if (cpu_is_omap15xx()) {
+                        /* This works on 1510-Innovator */
+                        return 0;
+                }
+
+                /* NOTES:
+                 *  - peripheral should configure VBUS detection!
+                 *  - only peripherals may use the internal D+/D- pulldowns
+                 *  - OTG support on this port not yet written
+                 */
+
+                /* Don't do this for omap7xx -- it causes USB to not work correctly */
+                if (!cpu_is_omap7xx()) {
+                        l = omap_readl(USB_TRANSCEIVER_CTRL);
+                        l &= ~(7 << 4);
+                        if (!is_device)
+                                l |= (3 << 1);
+                        omap_writel(l, USB_TRANSCEIVER_CTRL);
+                }
+
+                return 3 << 16;
+        }
+
+        /* alternate pin config, external transceiver */
+        if (cpu_is_omap15xx()) {
+                printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
+                return 0;
+        }
+
+        omap_cfg_reg(V6_USB0_TXD);
+        omap_cfg_reg(W9_USB0_TXEN);
+        omap_cfg_reg(W5_USB0_SE0);
+        if (nwires != 3)
+                omap_cfg_reg(Y5_USB0_RCV);
+
+        /* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
+         * may be able to use I2C requests to set those bits along
+         * with VBUS switching and overcurrent detection.
+         */
+
+        if (nwires != 6) {
+                u32 l;
+
+                l = omap_readl(USB_TRANSCEIVER_CTRL);
+                l &= ~CONF_USB2_UNI_R;
+                omap_writel(l, USB_TRANSCEIVER_CTRL);
+        }
+
+        switch (nwires) {
+        case 3:
+                syscon1 = 2;
+                break;
+        case 4:
+                syscon1 = 1;
+                break;
+        case 6:
+                syscon1 = 3;
+                {
+                        u32 l;
+
+                        omap_cfg_reg(AA9_USB0_VP);
+                        omap_cfg_reg(R9_USB0_VM);
+                        l = omap_readl(USB_TRANSCEIVER_CTRL);
+                        l |= CONF_USB2_UNI_R;
+                        omap_writel(l, USB_TRANSCEIVER_CTRL);
+                }
+                break;
+        default:
+                printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
+                        0, nwires);
+        }
+
+        return syscon1 << 16;
+}
+
+u32 __init omap1_usb1_init(unsigned nwires)
+{
+        u32     syscon1 = 0;
+
+        if (!cpu_is_omap15xx() && nwires != 6) {
+                u32 l;
+
+                l = omap_readl(USB_TRANSCEIVER_CTRL);
+                l &= ~CONF_USB1_UNI_R;
+                omap_writel(l, USB_TRANSCEIVER_CTRL);
+        }
+        if (nwires == 0)
+                return 0;
+
+        /* external transceiver */
+        omap_cfg_reg(USB1_TXD);
+        omap_cfg_reg(USB1_TXEN);
+        if (nwires != 3)
+                omap_cfg_reg(USB1_RCV);
+
+        if (cpu_is_omap15xx()) {
+                omap_cfg_reg(USB1_SEO);
+                omap_cfg_reg(USB1_SPEED);
+                // SUSP
+        } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
+                omap_cfg_reg(W13_1610_USB1_SE0);
+                omap_cfg_reg(R13_1610_USB1_SPEED);
+                // SUSP
+        } else if (cpu_is_omap1710()) {
+                omap_cfg_reg(R13_1710_USB1_SE0);
+                // SUSP
+        } else {
+                pr_debug("usb%d cpu unrecognized\n", 1);
+                return 0;
+        }
+
+        switch (nwires) {
+        case 2:
+                goto bad;
+        case 3:
+                syscon1 = 2;
+                break;
+        case 4:
+                syscon1 = 1;
+                break;
+        case 6:
+                syscon1 = 3;
+                omap_cfg_reg(USB1_VP);
+                omap_cfg_reg(USB1_VM);
+                if (!cpu_is_omap15xx()) {
+                        u32 l;
+
+                        l = omap_readl(USB_TRANSCEIVER_CTRL);
+                        l |= CONF_USB1_UNI_R;
+                        omap_writel(l, USB_TRANSCEIVER_CTRL);
+                }
+                break;
+        default:
+bad:
+                printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
+                        1, nwires);
+        }
+
+        return syscon1 << 20;
+}
+
+u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
+{
+        u32     syscon1 = 0;
+
+        /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
+        if (alt_pingroup || nwires == 0)
+                return 0;
+
+        if (!cpu_is_omap15xx() && nwires != 6) {
+                u32 l;
+
+                l = omap_readl(USB_TRANSCEIVER_CTRL);
+                l &= ~CONF_USB2_UNI_R;
+                omap_writel(l, USB_TRANSCEIVER_CTRL);
+        }
+
+        /* external transceiver */
+        if (cpu_is_omap15xx()) {
+                omap_cfg_reg(USB2_TXD);
+                omap_cfg_reg(USB2_TXEN);
+                omap_cfg_reg(USB2_SEO);
+                if (nwires != 3)
+                        omap_cfg_reg(USB2_RCV);
+                /* there is no USB2_SPEED */
+        } else if (cpu_is_omap16xx()) {
+                omap_cfg_reg(V6_USB2_TXD);
+                omap_cfg_reg(W9_USB2_TXEN);
+                omap_cfg_reg(W5_USB2_SE0);
+                if (nwires != 3)
+                        omap_cfg_reg(Y5_USB2_RCV);
+                // FIXME omap_cfg_reg(USB2_SPEED);
+        } else {
+                pr_debug("usb%d cpu unrecognized\n", 1);
+                return 0;
+        }
+
+        // omap_cfg_reg(USB2_SUSP);
+
+        switch (nwires) {
+        case 2:
+                goto bad;
+        case 3:
+                syscon1 = 2;
+                break;
+        case 4:
+                syscon1 = 1;
+                break;
+        case 5:
+                goto bad;
+        case 6:
+                syscon1 = 3;
+                if (cpu_is_omap15xx()) {
+                        omap_cfg_reg(USB2_VP);
+                        omap_cfg_reg(USB2_VM);
+                } else {
+                        u32 l;
+
+                        omap_cfg_reg(AA9_USB2_VP);
+                        omap_cfg_reg(R9_USB2_VM);
+                        l = omap_readl(USB_TRANSCEIVER_CTRL);
+                        l |= CONF_USB2_UNI_R;
+                        omap_writel(l, USB_TRANSCEIVER_CTRL);
+                }
+                break;
+        default:
+bad:
+                printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
+                        2, nwires);
+        }
+
+        return syscon1 << 24;
+}
+
+#ifdef  CONFIG_ARCH_OMAP15XX
+
+/* ULPD_DPLL_CTRL */
+#define DPLL_IOB                (1 << 13)
+#define DPLL_PLL_ENABLE         (1 << 4)
+#define DPLL_LOCK               (1 << 0)
+
+/* ULPD_APLL_CTRL */
+#define APLL_NDPLL_SWITCH       (1 << 0)
+
+static void __init omap_1510_usb_init(struct omap_usb_config *config)
+{
+        unsigned int val;
+        u16 w;
+
+        config->usb0_init(config->pins[0], is_usb0_device(config));
+        config->usb1_init(config->pins[1]);
+        config->usb2_init(config->pins[2], 0);
+
+        val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
+        val |= (config->hmc_mode << 1);
+        omap_writel(val, MOD_CONF_CTRL_0);
+
+        printk("USB: hmc %d", config->hmc_mode);
+        if (config->pins[0])
+                printk(", usb0 %d wires%s", config->pins[0],
+                        is_usb0_device(config) ? " (dev)" : "");
+        if (config->pins[1])
+                printk(", usb1 %d wires", config->pins[1]);
+        if (config->pins[2])
+                printk(", usb2 %d wires", config->pins[2]);
+        printk("\n");
+
+        /* use DPLL for 48 MHz function clock */
+        pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
+                        omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
+
+        w = omap_readw(ULPD_APLL_CTRL);
+        w &= ~APLL_NDPLL_SWITCH;
+        omap_writew(w, ULPD_APLL_CTRL);
+
+        w = omap_readw(ULPD_DPLL_CTRL);
+        w |= DPLL_IOB | DPLL_PLL_ENABLE;
+        omap_writew(w, ULPD_DPLL_CTRL);
+
+        w = omap_readw(ULPD_SOFT_REQ);
+        w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
+        omap_writew(w, ULPD_SOFT_REQ);
+
+        while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
+                cpu_relax();
+
+#ifdef  CONFIG_USB_GADGET_OMAP
+        if (config->register_dev) {
+                int status;
+
+                udc_device.dev.platform_data = config;
+                status = platform_device_register(&udc_device);
+                if (status)
+                        pr_debug("can't register UDC device, %d\n", status);
+                /* udc driver gates 48MHz by D+ pullup */
+        }
+#endif
+
+#if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+        if (config->register_host) {
+                int status;
+
+                ohci_device.dev.platform_data = config;
+                status = platform_device_register(&ohci_device);
+                if (status)
+                        pr_debug("can't register OHCI device, %d\n", status);
+                /* hcd explicitly gates 48MHz */
+        }
+#endif
+}
+
+#else
+static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
+#endif
+
+void __init omap1_usb_init(struct omap_usb_config *pdata)
+{
+        pdata->usb0_init = omap1_usb0_init;
+        pdata->usb1_init = omap1_usb1_init;
+        pdata->usb2_init = omap1_usb2_init;
+        udc_device_init(pdata);
+        ohci_device_init(pdata);
+        otg_device_init(pdata);
+
+        if (cpu_is_omap7xx() || cpu_is_omap16xx())
+                omap_otg_init(pdata);
+        else if (cpu_is_omap15xx())
+                omap_1510_usb_init(pdata);
+        else
+                printk(KERN_ERR "USB: No init for your chip yet\n");
+}
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index b31b6f123122..b48bacf0a7aa 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -1,22 +1,77 @@
+if ARCH_OMAP2PLUS
+
+menu "TI OMAP2/3/4 Specific Features"
+
+config ARCH_OMAP2PLUS_TYPICAL
+        bool "Typical OMAP configuration"
+        default y
+        select AEABI
+        select REGULATOR
+        select PM
+        select PM_RUNTIME
+        select VFP
+        select NEON if ARCH_OMAP3 || ARCH_OMAP4
+        select SERIAL_8250
+        select SERIAL_CORE_CONSOLE
+        select SERIAL_8250_CONSOLE
+        select I2C
+        select I2C_OMAP
+        select MFD
+        select MENELAUS if ARCH_OMAP2
+        select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
+        select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
+        help
+          Compile a kernel suitable for booting most boards
+
+config ARCH_OMAP2
+        bool "TI OMAP2"
+        depends on ARCH_OMAP2PLUS
+        default y
+        select CPU_V6
+
+config ARCH_OMAP3
+        bool "TI OMAP3"
+        depends on ARCH_OMAP2PLUS
+        default y
+        select CPU_V7
+        select USB_ARCH_HAS_EHCI
+        select ARM_L1_CACHE_SHIFT_6
+
+config ARCH_OMAP4
+        bool "TI OMAP4"
+        default y
+        depends on ARCH_OMAP2PLUS
+        select CPU_V7
+        select ARM_GIC
+
 comment "OMAP Core Type"
         depends on ARCH_OMAP2
 
 config ARCH_OMAP2420
         bool "OMAP2420 support"
         depends on ARCH_OMAP2
+        default y
         select OMAP_DM_TIMER
         select ARCH_OMAP_OTG
 
 config ARCH_OMAP2430
         bool "OMAP2430 support"
         depends on ARCH_OMAP2
+        default y
         select ARCH_OMAP_OTG
 
 config ARCH_OMAP3430
         bool "OMAP3430 support"
         depends on ARCH_OMAP3
+        default y
         select ARCH_OMAP_OTG
 
+config OMAP_PACKAGE_ZAF
+       bool
+
+config OMAP_PACKAGE_ZAC
+       bool
+
 config OMAP_PACKAGE_CBC
        bool
 
@@ -35,6 +90,7 @@ comment "OMAP Board Type"
 config MACH_OMAP_GENERIC
         bool "Generic OMAP board"
         depends on ARCH_OMAP2
+        default y
 
 config MACH_OMAP2_TUSB6010
         bool
@@ -44,60 +100,75 @@ config MACH_OMAP2_TUSB6010
 config MACH_OMAP_H4
         bool "OMAP 2420 H4 board"
         depends on ARCH_OMAP2
+        default y
+        select OMAP_PACKAGE_ZAF
         select OMAP_DEBUG_DEVICES
 
 config MACH_OMAP_APOLLON
         bool "OMAP 2420 Apollon board"
         depends on ARCH_OMAP2
+        default y
+        select OMAP_PACKAGE_ZAC
 
 config MACH_OMAP_2430SDP
         bool "OMAP 2430 SDP board"
         depends on ARCH_OMAP2
+        default y
+        select OMAP_PACKAGE_ZAC
 
 config MACH_OMAP3_BEAGLE
         bool "OMAP3 BEAGLE board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBB
 
 config MACH_DEVKIT8000
         bool "DEVKIT8000 board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CUS
         select OMAP_MUX
 
 config MACH_OMAP_LDP
         bool "OMAP3 LDP board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBB
 
 config MACH_OVERO
         bool "Gumstix Overo board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBB
 
 config MACH_OMAP3EVM
         bool "OMAP 3530 EVM board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBB
 
 config MACH_OMAP3517EVM
         bool "OMAP3517/ AM3517 EVM board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBB
 
 config MACH_OMAP3_PANDORA
         bool "OMAP3 Pandora"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBB
 
 config MACH_OMAP3_TOUCHBOOK
         bool "OMAP3 Touch Book"
         depends on ARCH_OMAP3
+        default y
         select BACKLIGHT_CLASS_DEVICE
 
 config MACH_OMAP_3430SDP
         bool "OMAP 3430 SDP board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBB
 
 config MACH_NOKIA_N800
@@ -112,6 +183,8 @@ config MACH_NOKIA_N810_WIMAX
 config MACH_NOKIA_N8X0
         bool "Nokia N800/N810"
         depends on ARCH_OMAP2420
+        default y
+        select OMAP_PACKAGE_ZAC
         select MACH_NOKIA_N800
         select MACH_NOKIA_N810
         select MACH_NOKIA_N810_WIMAX
@@ -119,42 +192,55 @@ config MACH_NOKIA_N8X0
 config MACH_NOKIA_RX51
         bool "Nokia RX-51 board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBB
 
 config MACH_OMAP_ZOOM2
         bool "OMAP3 Zoom2 board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBB
 
 config MACH_OMAP_ZOOM3
         bool "OMAP3630 Zoom3 board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBP
 
 config MACH_CM_T35
         bool "CompuLab CM-T35 module"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CUS
         select OMAP_MUX
 
 config MACH_IGEP0020
         bool "IGEP v2 board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBB
 
 config MACH_SBC3530
         bool "OMAP3 SBC STALKER board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CUS
         select OMAP_MUX
 
 config MACH_OMAP_3630SDP
         bool "OMAP3630 SDP board"
         depends on ARCH_OMAP3
+        default y
         select OMAP_PACKAGE_CBP
 
 config MACH_OMAP_4430SDP
         bool "OMAP 4430 SDP board"
+        default y
+        depends on ARCH_OMAP4
+
+config MACH_OMAP4_PANDA
+        bool "OMAP4 Panda Board"
+        default y
         depends on ARCH_OMAP4
 
 config OMAP3_EMU
@@ -176,3 +262,6 @@ config OMAP3_SDRC_AC_TIMING
           wish to say no.  Selecting yes without understanding what is
           going on could result in system crashes;
 
+endmenu
+
+endif
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index d54389674486..63b2d8859c3c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 # SMP support ONLY available for OMAP4
 obj-$(CONFIG_SMP)                       += omap-smp.o omap-headsmp.o
 obj-$(CONFIG_LOCAL_TIMERS)              += timer-mpu.o
+obj-$(CONFIG_HOTPLUG_CPU)               += omap-hotplug.o
 obj-$(CONFIG_ARCH_OMAP4)                += omap44xx-smc.o omap4-common.o
 
 AFLAGS_omap44xx-smc.o                   :=-Wa,-march=armv7-a
@@ -36,6 +37,8 @@ AFLAGS_sram243x.o			:=-Wa,-march=armv6
 AFLAGS_sram34xx.o                       :=-Wa,-march=armv7-a
 
 # Pin multiplexing
+obj-$(CONFIG_ARCH_OMAP2420)             += mux2420.o
+obj-$(CONFIG_ARCH_OMAP2430)             += mux2430.o
 obj-$(CONFIG_ARCH_OMAP3)                += mux34xx.o
 
 # SMS/SDRC
@@ -47,6 +50,7 @@ ifeq ($(CONFIG_PM),y)
 obj-$(CONFIG_ARCH_OMAP2)                += pm24xx.o
 obj-$(CONFIG_ARCH_OMAP2)                += sleep24xx.o
 obj-$(CONFIG_ARCH_OMAP3)                += pm34xx.o sleep34xx.o cpuidle34xx.o
+obj-$(CONFIG_ARCH_OMAP4)                += pm44xx.o
 obj-$(CONFIG_PM_DEBUG)                  += pm-debug.o
 
 AFLAGS_sleep24xx.o                      :=-Wa,-march=armv6
@@ -89,7 +93,10 @@ obj-$(CONFIG_OMAP3_EMU)			+= emu.o
 obj-$(CONFIG_OMAP_MBOX_FWK)             += mailbox_mach.o
 mailbox_mach-objs                       := mailbox.o
 
-obj-$(CONFIG_OMAP_IOMMU)                := iommu2.o omap-iommu.o
+obj-$(CONFIG_OMAP_IOMMU)                += iommu2.o
+
+iommu-$(CONFIG_OMAP_IOMMU)              := omap-iommu.o
+obj-y                                   += $(iommu-m) $(iommu-y)
 
 i2c-omap-$(CONFIG_I2C_OMAP)             := i2c.o
 obj-y                                   += $(i2c-omap-m) $(i2c-omap-y)
@@ -105,6 +112,7 @@ obj-$(CONFIG_MACH_OMAP3_BEAGLE)		+= board-omap3beagle.o \
 obj-$(CONFIG_MACH_DEVKIT8000)           += board-devkit8000.o \
                                            hsmmc.o
 obj-$(CONFIG_MACH_OMAP_LDP)             += board-ldp.o \
+                                           board-flash.o \
                                            hsmmc.o
 obj-$(CONFIG_MACH_OVERO)                += board-overo.o \
                                            hsmmc.o
@@ -114,7 +122,7 @@ obj-$(CONFIG_MACH_OMAP3_PANDORA)	+= board-omap3pandora.o \
                                            hsmmc.o
 obj-$(CONFIG_MACH_OMAP_3430SDP)         += board-3430sdp.o \
                                            hsmmc.o \
-                                           board-sdp-flash.o
+                                           board-flash.o
 obj-$(CONFIG_MACH_NOKIA_N8X0)           += board-n8x0.o
 obj-$(CONFIG_MACH_NOKIA_RX51)           += board-rx51.o \
                                            board-rx51-sdram.o \
@@ -123,14 +131,17 @@ obj-$(CONFIG_MACH_NOKIA_RX51)		+= board-rx51.o \
                                            hsmmc.o
 obj-$(CONFIG_MACH_OMAP_ZOOM2)           += board-zoom2.o \
                                            board-zoom-peripherals.o \
+                                           board-flash.o \
                                            hsmmc.o \
                                            board-zoom-debugboard.o
 obj-$(CONFIG_MACH_OMAP_ZOOM3)           += board-zoom3.o \
                                            board-zoom-peripherals.o \
+                                           board-flash.o \
                                            hsmmc.o \
                                            board-zoom-debugboard.o
 obj-$(CONFIG_MACH_OMAP_3630SDP)         += board-3630sdp.o \
                                            board-zoom-peripherals.o \
+                                           board-flash.o \
                                            hsmmc.o
 obj-$(CONFIG_MACH_CM_T35)               += board-cm-t35.o \
                                            hsmmc.o
@@ -140,12 +151,16 @@ obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK)	+= board-omap3touchbook.o \
                                            hsmmc.o
 obj-$(CONFIG_MACH_OMAP_4430SDP)         += board-4430sdp.o \
                                            hsmmc.o
+obj-$(CONFIG_MACH_OMAP4_PANDA)          += board-omap4panda.o \
+                                           hsmmc.o
 
 obj-$(CONFIG_MACH_OMAP3517EVM)          += board-am3517evm.o
 
 obj-$(CONFIG_MACH_SBC3530)              += board-omap3stalker.o \
                                            hsmmc.o
 # Platform specific device init code
+usbfs-$(CONFIG_ARCH_OMAP_OTG)           := usb-fs.o
+obj-y                                   += $(usbfs-m) $(usbfs-y)
 obj-y                                   += usb-musb.o
 obj-$(CONFIG_MACH_OMAP2_TUSB6010)       += usb-tusb6010.o
 obj-y                                   += usb-ehci.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index a11a575745e4..ba188cf7d09d 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -31,13 +31,13 @@
 #include <asm/mach/map.h>
 
 #include <mach/gpio.h>
-#include <plat/mux.h>
 #include <plat/board.h>
 #include <plat/common.h>
 #include <plat/gpmc.h>
 #include <plat/usb.h>
 #include <plat/gpmc-smc91x.h>
 
+#include "mux.h"
 #include "hsmmc.h"
 
 #define SDP2430_CS0_BASE        0x04000000
@@ -122,11 +122,7 @@ static struct omap_smc91x_platform_data board_smc91x_data = {
 
 static void __init board_smc91x_init(void)
 {
-        if (omap_rev() > OMAP3430_REV_ES1_0)
-                board_smc91x_data.gpio_irq = 6;
-        else
-                board_smc91x_data.gpio_irq = 29;
-
+        omap_mux_init_gpio(149, OMAP_PIN_INPUT);
         gpmc_smc91x_init(&board_smc91x_data);
 }
 
@@ -217,17 +213,30 @@ static struct omap_usb_config sdp2430_usb_config __initdata = {
         .pins[0]        = 3,
 };
 
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] __initdata = {
+        { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define board_mux       NULL
+#endif
+
 static void __init omap_2430sdp_init(void)
 {
         int ret;
 
+        omap2430_mux_init(board_mux, OMAP_PACKAGE_ZAC);
+
         omap2430_i2c_init();
 
         platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
         omap_serial_init();
         omap2_hsmmc_init(mmc);
-        omap_usb_init(&sdp2430_usb_config);
+        omap2_usbfs_init(&sdp2430_usb_config);
+
+        omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP);
         usb_musb_init(&musb_board_data);
+
         board_smc91x_init();
 
         /* Turn off secondary LCD backlight */
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index f474a80b8867..4b8595b6787d 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -41,7 +41,7 @@
 #include <plat/control.h>
 #include <plat/gpmc-smc91x.h>
 
-#include <mach/board-sdp.h>
+#include <mach/board-flash.h>
 
 #include "mux.h"
 #include "sdram-qimonda-hyb18m512160af-6.h"
@@ -667,6 +667,18 @@ static struct omap_board_mux board_mux[] __initdata = {
 #define board_mux       NULL
 #endif
 
+/*
+ * SDP3430 V2 Board CS organization
+ * Different from SDP3430 V1. Now 4 switches used to specify CS
+ *
+ * See also the Switch S8 settings in the comments.
+ */
+static char chip_sel_3430[][GPMC_CS_NUM] = {
+        {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
+        {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
+        {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
+};
+
 static struct mtd_partition sdp_nor_partitions[] = {
         /* bootloader (U-Boot, etc) in first sector */
         {
@@ -797,7 +809,7 @@ static void __init omap_3430sdp_init(void)
         omap_serial_init();
         usb_musb_init(&musb_board_data);
         board_smc91x_init();
-        sdp_flash_init(sdp_flash_partitions);
+        board_flash_init(sdp_flash_partitions, chip_sel_3430);
         sdp3430_display_init();
         enable_board_wakeup_source();
         usb_ehci_init(&ehci_pdata);
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index 504d2bd222fe..2eb3f94b478e 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -18,10 +18,10 @@
 #include <plat/common.h>
 #include <plat/board.h>
 #include <plat/gpmc-smc91x.h>
-#include <plat/mux.h>
 #include <plat/usb.h>
 
 #include <mach/board-zoom.h>
+#include <mach/board-flash.h>
 
 #include "mux.h"
 #include "sdram-hynix-h8mbx00u0mer-0em.h"
@@ -93,12 +93,131 @@ static struct omap_board_mux board_mux[] __initdata = {
 #define board_mux       NULL
 #endif
 
+/*
+ * SDP3630 CS organization
+ * See also the Switch S8 settings in the comments.
+ */
+static char chip_sel_sdp[][GPMC_CS_NUM] = {
+        {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
+        {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
+        {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
+};
+
+static struct mtd_partition sdp_nor_partitions[] = {
+        /* bootloader (U-Boot, etc) in first sector */
+        {
+                .name           = "Bootloader-NOR",
+                .offset         = 0,
+                .size           = SZ_256K,
+                .mask_flags     = MTD_WRITEABLE, /* force read-only */
+        },
+        /* bootloader params in the next sector */
+        {
+                .name           = "Params-NOR",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_256K,
+                .mask_flags     = 0,
+        },
+        /* kernel */
+        {
+                .name           = "Kernel-NOR",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_2M,
+                .mask_flags     = 0
+        },
+        /* file system */
+        {
+                .name           = "Filesystem-NOR",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+                .mask_flags     = 0
+        }
+};
+
+static struct mtd_partition sdp_onenand_partitions[] = {
+        {
+                .name           = "X-Loader-OneNAND",
+                .offset         = 0,
+                .size           = 4 * (64 * 2048),
+                .mask_flags     = MTD_WRITEABLE  /* force read-only */
+        },
+        {
+                .name           = "U-Boot-OneNAND",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 2 * (64 * 2048),
+                .mask_flags     = MTD_WRITEABLE  /* force read-only */
+        },
+        {
+                .name           = "U-Boot Environment-OneNAND",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 1 * (64 * 2048),
+        },
+        {
+                .name           = "Kernel-OneNAND",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 16 * (64 * 2048),
+        },
+        {
+                .name           = "File System-OneNAND",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct mtd_partition sdp_nand_partitions[] = {
+        /* All the partition sizes are listed in terms of NAND block size */
+        {
+                .name           = "X-Loader-NAND",
+                .offset         = 0,
+                .size           = 4 * (64 * 2048),
+                .mask_flags     = MTD_WRITEABLE,        /* force read-only */
+        },
+        {
+                .name           = "U-Boot-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
+                .size           = 10 * (64 * 2048),
+                .mask_flags     = MTD_WRITEABLE,        /* force read-only */
+        },
+        {
+                .name           = "Boot Env-NAND",
+
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1c0000 */
+                .size           = 6 * (64 * 2048),
+        },
+        {
+                .name           = "Kernel-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
+                .size           = 40 * (64 * 2048),
+        },
+        {
+                .name           = "File System - NAND",
+                .size           = MTDPART_SIZ_FULL,
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x780000 */
+        },
+};
+
+static struct flash_partitions sdp_flash_partitions[] = {
+        {
+                .parts = sdp_nor_partitions,
+                .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
+        },
+        {
+                .parts = sdp_onenand_partitions,
+                .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
+        },
+        {
+                .parts = sdp_nand_partitions,
+                .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
+        },
+};
+
 static void __init omap_sdp_init(void)
 {
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
         omap_serial_init();
         zoom_peripherals_init();
         board_smc91x_init();
+        board_flash_init(sdp_flash_partitions, chip_sel_sdp);
         enable_board_wakeup_source();
         usb_ehci_init(&ehci_pdata);
 }
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index e4a5d66b83b8..f287461bb038 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -21,6 +21,7 @@
 #include <linux/spi/spi.h>
 #include <linux/i2c/twl.h>
 #include <linux/regulator/machine.h>
+#include <linux/leds.h>
 
 #include <mach/hardware.h>
 #include <mach/omap4-common.h>
@@ -40,6 +41,54 @@
 #define ETH_KS8851_POWER_ON             48
 #define ETH_KS8851_QUART                138
 
+static struct gpio_led sdp4430_gpio_leds[] = {
+        {
+                .name   = "omap4:green:debug0",
+                .gpio   = 61,
+        },
+        {
+                .name   = "omap4:green:debug1",
+                .gpio   = 30,
+        },
+        {
+                .name   = "omap4:green:debug2",
+                .gpio   = 7,
+        },
+        {
+                .name   = "omap4:green:debug3",
+                .gpio   = 8,
+        },
+        {
+                .name   = "omap4:green:debug4",
+                .gpio   = 50,
+        },
+        {
+                .name   = "omap4:blue:user",
+                .gpio   = 169,
+        },
+        {
+                .name   = "omap4:red:user",
+                .gpio   = 170,
+        },
+        {
+                .name   = "omap4:green:user",
+                .gpio   = 139,
+        },
+
+};
+
+static struct gpio_led_platform_data sdp4430_led_data = {
+        .leds   = sdp4430_gpio_leds,
+        .num_leds       = ARRAY_SIZE(sdp4430_gpio_leds),
+};
+
+static struct platform_device sdp4430_leds_gpio = {
+        .name   = "leds-gpio",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &sdp4430_led_data,
+        },
+};
 static struct spi_board_info sdp4430_spi_board_info[] __initdata = {
         {
                 .modalias               = "ks8851",
@@ -112,6 +161,7 @@ static struct platform_device sdp4430_lcd_device = {
 
 static struct platform_device *sdp4430_devices[] __initdata = {
         &sdp4430_lcd_device,
+        &sdp4430_leds_gpio,
 };
 
 static struct omap_lcd_config sdp4430_lcd_config __initdata = {
@@ -156,14 +206,16 @@ static struct omap2_hsmmc_info mmc[] = {
         {}      /* Terminator */
 };
 
-static struct regulator_consumer_supply sdp4430_vmmc_supply[] = {
+static struct regulator_consumer_supply sdp4430_vaux_supply[] = {
         {
                 .supply = "vmmc",
-                .dev_name = "mmci-omap-hs.0",
+                .dev_name = "mmci-omap-hs.1",
         },
+};
+static struct regulator_consumer_supply sdp4430_vmmc_supply[] = {
         {
                 .supply = "vmmc",
-                .dev_name = "mmci-omap-hs.1",
+                .dev_name = "mmci-omap-hs.0",
         },
 };
 
@@ -210,6 +262,8 @@ static struct regulator_init_data sdp4430_vaux1 = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = sdp4430_vaux_supply,
 };
 
 static struct regulator_init_data sdp4430_vaux2 = {
@@ -250,7 +304,7 @@ static struct regulator_init_data sdp4430_vmmc = {
                                         | REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = 2,
+        .num_consumer_supplies  = 1,
         .consumer_supplies      = sdp4430_vmmc_supply,
 };
 
@@ -353,6 +407,11 @@ static struct i2c_board_info __initdata sdp4430_i2c_boardinfo[] = {
                 .platform_data = &sdp4430_twldata,
         },
 };
+static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = {
+        {
+                I2C_BOARD_INFO("tmp105", 0x48),
+        },
+};
 static int __init omap4_i2c_init(void)
 {
         /*
@@ -362,7 +421,8 @@ static int __init omap4_i2c_init(void)
         omap_register_i2c_bus(1, 400, sdp4430_i2c_boardinfo,
                         ARRAY_SIZE(sdp4430_i2c_boardinfo));
         omap_register_i2c_bus(2, 400, NULL, 0);
-        omap_register_i2c_bus(3, 400, NULL, 0);
+        omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
+                                ARRAY_SIZE(sdp4430_i2c_3_boardinfo));
         omap_register_i2c_bus(4, 400, NULL, 0);
         return 0;
 }
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index aa69fb999748..8cea6235b4be 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -35,13 +35,14 @@
 
 #include <mach/gpio.h>
 #include <plat/led.h>
-#include <plat/mux.h>
 #include <plat/usb.h>
 #include <plat/board.h>
 #include <plat/common.h>
 #include <plat/gpmc.h>
 #include <plat/control.h>
 
+#include "mux.h"
+
 /* LED & Switch macros */
 #define LED0_GPIO13             13
 #define LED1_GPIO14             14
@@ -244,7 +245,7 @@ static inline void __init apollon_init_smc91x(void)
         apollon_smc91x_resources[0].end   = base + 0x30f;
         udelay(100);
 
-        omap_cfg_reg(W4__24XX_GPIO74);
+        omap_mux_init_gpio(74, 0);
         if (gpio_request(APOLLON_ETHR_GPIO_IRQ, "SMC91x irq") < 0) {
                 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
                         APOLLON_ETHR_GPIO_IRQ);
@@ -286,15 +287,15 @@ static void __init omap_apollon_init_irq(void)
 static void __init apollon_led_init(void)
 {
         /* LED0 - AA10 */
-        omap_cfg_reg(AA10_242X_GPIO13);
+        omap_mux_init_signal("vlynq_clk.gpio_13", 0);
         gpio_request(LED0_GPIO13, "LED0");
         gpio_direction_output(LED0_GPIO13, 0);
         /* LED1  - AA6 */
-        omap_cfg_reg(AA6_242X_GPIO14);
+        omap_mux_init_signal("vlynq_rx1.gpio_14", 0);
         gpio_request(LED1_GPIO14, "LED1");
         gpio_direction_output(LED1_GPIO14, 0);
         /* LED2  - AA4 */
-        omap_cfg_reg(AA4_242X_GPIO15);
+        omap_mux_init_signal("vlynq_rx0.gpio_15", 0);
         gpio_request(LED2_GPIO15, "LED2");
         gpio_direction_output(LED2_GPIO15, 0);
 }
@@ -303,22 +304,35 @@ static void __init apollon_usb_init(void)
 {
         /* USB device */
         /* DEVICE_SUSPEND */
-        omap_cfg_reg(P21_242X_GPIO12);
+        omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0);
         gpio_request(12, "USB suspend");
         gpio_direction_output(12, 0);
-        omap_usb_init(&apollon_usb_config);
+        omap2_usbfs_init(&apollon_usb_config);
 }
 
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] __initdata = {
+        { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define board_mux       NULL
+#endif
+
 static void __init omap_apollon_init(void)
 {
         u32 v;
 
+        omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC);
+
         apollon_led_init();
         apollon_flash_init();
         apollon_usb_init();
 
         /* REVISIT: where's the correct place */
-        omap_cfg_reg(W19_24XX_SYS_NIRQ);
+        omap_mux_init_signal("sys_nirq", OMAP_PULL_ENA | OMAP_PULL_UP);
+
+        /* LCD PWR_EN */
+        omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP);
 
         /* Use Interal loop-back in MMC/SDIO Module Input Clock selection */
         v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index e679a2cc86c3..05442945fc67 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -61,8 +61,6 @@
 #define SB_T35_SMSC911X_GPIO    65
 
 #define NAND_BLOCK_SIZE         SZ_128K
-#define GPMC_CS0_BASE           0x60
-#define GPMC_CS0_BASE_ADDR      (OMAP34XX_GPMC_VIRT + GPMC_CS0_BASE)
 
 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
 #include <linux/smsc911x.h>
@@ -223,28 +221,12 @@ static struct omap_nand_platform_data cm_t35_nand_data = {
         .nr_parts               = ARRAY_SIZE(cm_t35_nand_partitions),
         .dma_channel            = -1,   /* disable DMA in OMAP NAND driver */
         .cs                     = 0,
-        .gpmc_cs_baseaddr       = (void __iomem *)GPMC_CS0_BASE_ADDR,
-        .gpmc_baseaddr          = (void __iomem *)OMAP34XX_GPMC_VIRT,
 
 };
 
-static struct resource cm_t35_nand_resource = {
-        .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device cm_t35_nand_device = {
-        .name           = "omap2-nand",
-        .id             = -1,
-        .num_resources  = 1,
-        .resource       = &cm_t35_nand_resource,
-        .dev            = {
-                .platform_data  = &cm_t35_nand_data,
-        },
-};
-
 static void __init cm_t35_init_nand(void)
 {
-        if (platform_device_register(&cm_t35_nand_device) < 0)
+        if (gpmc_nand_init(&cm_t35_nand_data) < 0)
                 pr_err("CM-T35: Unable to register NAND device\n");
 }
 #else
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 77022b588816..96e16f76ff44 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -33,6 +33,7 @@
 #include <linux/i2c/twl.h>
 
 #include <mach/hardware.h>
+#include <mach/id.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -58,9 +59,6 @@
 #include "mux.h"
 #include "hsmmc.h"
 
-#define GPMC_CS0_BASE  0x60
-#define GPMC_CS_SIZE   0x30
-
 #define NAND_BLOCK_SIZE         SZ_128K
 
 #define OMAP_DM9000_GPIO_IRQ    25
@@ -104,20 +102,6 @@ static struct omap_nand_platform_data devkit8000_nand_data = {
         .dma_channel    = -1,           /* disable DMA in OMAP NAND driver */
 };
 
-static struct resource devkit8000_nand_resource = {
-        .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device devkit8000_nand_device = {
-        .name           = "omap2-nand",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &devkit8000_nand_data,
-        },
-        .num_resources  = 1,
-        .resource       = &devkit8000_nand_resource,
-};
-
 static struct omap2_hsmmc_info mmc[] = {
         {
                 .mmc            = 1,
@@ -126,54 +110,50 @@ static struct omap2_hsmmc_info mmc[] = {
         },
         {}      /* Terminator */
 };
-static struct omap_board_config_kernel devkit8000_config[] __initdata = {
-};
 
 static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
 {
         twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1);
         twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
 
+        if (gpio_is_valid(dssdev->reset_gpio))
+                gpio_set_value(dssdev->reset_gpio, 1);
         return 0;
 }
 
 static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
 {
+        if (gpio_is_valid(dssdev->reset_gpio))
+                gpio_set_value(dssdev->reset_gpio, 0);
 }
+
 static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev)
 {
+        if (gpio_is_valid(dssdev->reset_gpio))
+                gpio_set_value(dssdev->reset_gpio, 1);
         return 0;
 }
 
 static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
 {
+        if (gpio_is_valid(dssdev->reset_gpio))
+                gpio_set_value(dssdev->reset_gpio, 0);
 }
 
-static int devkit8000_panel_enable_tv(struct omap_dss_device *dssdev)
-{
-
-        return 0;
-}
-
-static void devkit8000_panel_disable_tv(struct omap_dss_device *dssdev)
-{
-}
+static struct regulator_consumer_supply devkit8000_vmmc1_supply =
+        REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0");
 
 
-static struct regulator_consumer_supply devkit8000_vmmc1_supply = {
-        .supply                 = "vmmc",
-};
-
-static struct regulator_consumer_supply devkit8000_vsim_supply = {
-        .supply                 = "vmmc_aux",
-};
-
+/* ads7846 on SPI */
+static struct regulator_consumer_supply devkit8000_vio_supply =
+        REGULATOR_SUPPLY("vcc", "spi2.0");
 
 static struct omap_dss_device devkit8000_lcd_device = {
         .name                   = "lcd",
-        .driver_name            = "innolux_at_panel",
+        .driver_name            = "generic_panel",
         .type                   = OMAP_DISPLAY_TYPE_DPI,
         .phy.dpi.data_lines     = 24,
+        .reset_gpio             = -EINVAL, /* will be replaced */
         .platform_enable        = devkit8000_panel_enable_lcd,
         .platform_disable       = devkit8000_panel_disable_lcd,
 };
@@ -182,6 +162,7 @@ static struct omap_dss_device devkit8000_dvi_device = {
         .driver_name            = "generic_panel",
         .type                   = OMAP_DISPLAY_TYPE_DPI,
         .phy.dpi.data_lines     = 24,
+        .reset_gpio             = -EINVAL, /* will be replaced */
         .platform_enable        = devkit8000_panel_enable_dvi,
         .platform_disable       = devkit8000_panel_disable_dvi,
 };
@@ -191,8 +172,6 @@ static struct omap_dss_device devkit8000_tv_device = {
         .driver_name            = "venc",
         .type                   = OMAP_DISPLAY_TYPE_VENC,
         .phy.venc.type          = OMAP_DSS_VENC_TYPE_SVIDEO,
-        .platform_enable        = devkit8000_panel_enable_tv,
-        .platform_disable       = devkit8000_panel_disable_tv,
 };
 
 
@@ -216,10 +195,8 @@ static struct platform_device devkit8000_dss_device = {
         },
 };
 
-static struct regulator_consumer_supply devkit8000_vdda_dac_supply = {
-        .supply = "vdda_dac",
-        .dev    = &devkit8000_dss_device.dev,
-};
+static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
+        REGULATOR_SUPPLY("vdda_dac", "omapdss");
 
 static int board_keymap[] = {
         KEY(0, 0, KEY_1),
@@ -266,7 +243,21 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
 
         /* link regulators to MMC adapters */
         devkit8000_vmmc1_supply.dev = mmc[0].dev;
-        devkit8000_vsim_supply.dev = mmc[0].dev;
+
+        /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
+        gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
+
+        /* gpio + 1 is "LCD_PWREN" (out, active high) */
+        devkit8000_lcd_device.reset_gpio = gpio + 1;
+        gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN");
+        /* Disable until needed */
+        gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0);
+
+        /* gpio + 7 is "DVI_PD" (out, active low) */
+        devkit8000_dvi_device.reset_gpio = gpio + 7;
+        gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown");
+        /* Disable until needed */
+        gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0);
 
         return 0;
 }
@@ -282,16 +273,8 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
         .setup          = devkit8000_twl_gpio_setup,
 };
 
-static struct regulator_consumer_supply devkit8000_vpll2_supplies[] = {
-        {
-        .supply         = "vdvi",
-        .dev            = &devkit8000_lcd_device.dev,
-        },
-        {
-        .supply         = "vdds_dsi",
-        .dev            = &devkit8000_dss_device.dev,
-        }
-};
+static struct regulator_consumer_supply devkit8000_vpll1_supply =
+        REGULATOR_SUPPLY("vdds_dsi", "omapdss");
 
 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
 static struct regulator_init_data devkit8000_vmmc1 = {
@@ -308,21 +291,6 @@ static struct regulator_init_data devkit8000_vmmc1 = {
         .consumer_supplies      = &devkit8000_vmmc1_supply,
 };
 
-/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
-static struct regulator_init_data devkit8000_vsim = {
-        .constraints = {
-                .min_uV                 = 1800000,
-                .max_uV                 = 3000000,
-                .valid_modes_mask       = REGULATOR_MODE_NORMAL
-                                        | REGULATOR_MODE_STANDBY,
-                .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
-                                        | REGULATOR_CHANGE_MODE
-                                        | REGULATOR_CHANGE_STATUS,
-        },
-        .num_consumer_supplies  = 1,
-        .consumer_supplies      = &devkit8000_vsim_supply,
-};
-
 /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
 static struct regulator_init_data devkit8000_vdac = {
         .constraints = {
@@ -337,10 +305,9 @@ static struct regulator_init_data devkit8000_vdac = {
         .consumer_supplies      = &devkit8000_vdda_dac_supply,
 };
 
-/* VPLL2 for digital video outputs */
-static struct regulator_init_data devkit8000_vpll2 = {
+/* VPLL1 for digital video outputs */
+static struct regulator_init_data devkit8000_vpll1 = {
         .constraints = {
-                .name                   = "VDVI",
                 .min_uV                 = 1800000,
                 .max_uV                 = 1800000,
                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
@@ -348,8 +315,23 @@ static struct regulator_init_data devkit8000_vpll2 = {
                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
                                         | REGULATOR_CHANGE_STATUS,
         },
-        .num_consumer_supplies  = ARRAY_SIZE(devkit8000_vpll2_supplies),
-        .consumer_supplies      = devkit8000_vpll2_supplies,
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &devkit8000_vpll1_supply,
+};
+
+/* VAUX4 for ads7846 and nubs */
+static struct regulator_init_data devkit8000_vio = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 1800000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_MODE
+                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &devkit8000_vio_supply,
 };
 
 static struct twl4030_usb_data devkit8000_usb_data = {
@@ -374,15 +356,15 @@ static struct twl4030_platform_data devkit8000_twldata = {
         .gpio           = &devkit8000_gpio_data,
         .codec          = &devkit8000_codec_data,
         .vmmc1          = &devkit8000_vmmc1,
-        .vsim           = &devkit8000_vsim,
         .vdac           = &devkit8000_vdac,
-        .vpll2          = &devkit8000_vpll2,
+        .vpll1          = &devkit8000_vpll1,
+        .vio            = &devkit8000_vio,
         .keypad         = &devkit8000_kp_data,
 };
 
 static struct i2c_board_info __initdata devkit8000_i2c_boardinfo[] = {
         {
-                I2C_BOARD_INFO("twl4030", 0x48),
+                I2C_BOARD_INFO("tps65930", 0x48),
                 .flags = I2C_CLIENT_WAKE,
                 .irq = INT_34XX_SYS_NIRQ,
                 .platform_data = &devkit8000_twldata,
@@ -464,8 +446,6 @@ static struct platform_device keys_gpio = {
 
 static void __init devkit8000_init_irq(void)
 {
-        omap_board_config = devkit8000_config;
-        omap_board_config_size = ARRAY_SIZE(devkit8000_config);
         omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
                              mt46h32m32lf6_sdrc_params);
         omap_init_irq();
@@ -560,6 +540,9 @@ static struct platform_device omap_dm9000_dev = {
 
 static void __init omap_dm9000_init(void)
 {
+        unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
+        struct omap_die_id odi;
+
         if (gpio_request(OMAP_DM9000_GPIO_IRQ, "dm9000 irq") < 0) {
                 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
                         OMAP_DM9000_GPIO_IRQ);
@@ -567,6 +550,16 @@ static void __init omap_dm9000_init(void)
                 }
 
         gpio_direction_input(OMAP_DM9000_GPIO_IRQ);
+
+        /* init the mac address using DIE id */
+        omap_get_die_id(&odi);
+
+        eth_addr[0] = 0x02; /* locally administered */
+        eth_addr[1] = odi.id_1 & 0xff;
+        eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
+        eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
+        eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
+        eth_addr[5] = (odi.id_0 & 0x000000ff);
 }
 
 static struct platform_device *devkit8000_devices[] __initdata = {
@@ -581,8 +574,6 @@ static void __init devkit8000_flash_init(void)
         u8 cs = 0;
         u8 nandcs = GPMC_CS_NUM + 1;
 
-        u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
-
         /* find out the chip-select on which NAND exists */
         while (cs < GPMC_CS_NUM) {
                 u32 ret = 0;
@@ -604,13 +595,9 @@ static void __init devkit8000_flash_init(void)
 
         if (nandcs < GPMC_CS_NUM) {
                 devkit8000_nand_data.cs = nandcs;
-                devkit8000_nand_data.gpmc_cs_baseaddr = (void *)
-                        (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
-                devkit8000_nand_data.gpmc_baseaddr = (void *)
-                        (gpmc_base_add);
 
                 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
-                if (platform_device_register(&devkit8000_nand_device) < 0)
+                if (gpmc_nand_init(&devkit8000_nand_data) < 0)
                         printk(KERN_ERR "Unable to register NAND device\n");
         }
 }
@@ -797,8 +784,6 @@ static void __init devkit8000_init(void)
         devkit8000_i2c_init();
         platform_add_devices(devkit8000_devices,
                         ARRAY_SIZE(devkit8000_devices));
-        omap_board_config = devkit8000_config;
-        omap_board_config_size = ARRAY_SIZE(devkit8000_config);
 
         spi_register_board_info(devkit8000_spi_board_info,
         ARRAY_SIZE(devkit8000_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-sdp-flash.c b/arch/arm/mach-omap2/board-flash.c
index 2d026328e385..ac834aa7abf6 100644
--- a/arch/arm/mach-omap2/board-sdp-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -21,7 +21,7 @@
 #include <plat/nand.h>
 #include <plat/onenand.h>
 #include <plat/tc.h>
-#include <mach/board-sdp.h>
+#include <mach/board-flash.h>
 
 #define REG_FPGA_REV                    0x10
 #define REG_FPGA_DIP_SWITCH_INPUT2      0x60
@@ -29,72 +29,53 @@
 
 #define DEBUG_BASE              0x08000000 /* debug board */
 
-#define PDC_NOR         1
-#define PDC_NAND        2
-#define PDC_ONENAND     3
-#define DBG_MPDB        4
-
 /* various memory sizes */
 #define FLASH_SIZE_SDPV1        SZ_64M  /* NOR flash (64 Meg aligned) */
 #define FLASH_SIZE_SDPV2        SZ_128M /* NOR flash (256 Meg aligned) */
 
-/*
- * SDP3430 V2 Board CS organization
- * Different from SDP3430 V1. Now 4 switches used to specify CS
- *
- * See also the Switch S8 settings in the comments.
- *
- * REVISIT: Add support for 2430 SDP
- */
-static const unsigned char chip_sel_sdp[][GPMC_CS_NUM] = {
-        {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
-        {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
-        {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
-};
-
-static struct physmap_flash_data sdp_nor_data = {
+static struct physmap_flash_data board_nor_data = {
         .width          = 2,
 };
 
-static struct resource sdp_nor_resource = {
+static struct resource board_nor_resource = {
         .flags          = IORESOURCE_MEM,
 };
 
-static struct platform_device sdp_nor_device = {
+static struct platform_device board_nor_device = {
         .name           = "physmap-flash",
         .id             = 0,
         .dev            = {
-                        .platform_data = &sdp_nor_data,
+                        .platform_data = &board_nor_data,
         },
         .num_resources  = 1,
-        .resource       = &sdp_nor_resource,
+        .resource       = &board_nor_resource,
 };
 
 static void
-__init board_nor_init(struct flash_partitions sdp_nor_parts, u8 cs)
+__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
 {
         int err;
 
-        sdp_nor_data.parts      = sdp_nor_parts.parts;
-        sdp_nor_data.nr_parts   = sdp_nor_parts.nr_parts;
+        board_nor_data.parts    = nor_parts;
+        board_nor_data.nr_parts = nr_parts;
 
         /* Configure start address and size of NOR device */
         if (omap_rev() >= OMAP3430_REV_ES1_0) {
                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
-                                (unsigned long *)&sdp_nor_resource.start);
-                sdp_nor_resource.end = sdp_nor_resource.start
+                                (unsigned long *)&board_nor_resource.start);
+                board_nor_resource.end = board_nor_resource.start
                                         + FLASH_SIZE_SDPV2 - 1;
         } else {
                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
-                                (unsigned long *)&sdp_nor_resource.start);
-                sdp_nor_resource.end = sdp_nor_resource.start
+                                (unsigned long *)&board_nor_resource.start);
+                board_nor_resource.end = board_nor_resource.start
                                         + FLASH_SIZE_SDPV1 - 1;
         }
         if (err < 0) {
                 printk(KERN_ERR "NOR: Can't request GPMC CS\n");
                 return;
         }
-        if (platform_device_register(&sdp_nor_device) < 0)
+        if (platform_device_register(&board_nor_device) < 0)
                 printk(KERN_ERR "Unable to register NOR device\n");
 }
 
@@ -105,17 +86,18 @@ static struct omap_onenand_platform_data board_onenand_data = {
 };
 
 static void
-__init board_onenand_init(struct flash_partitions sdp_onenand_parts, u8 cs)
+__init board_onenand_init(struct mtd_partition *onenand_parts,
+                                u8 nr_parts, u8 cs)
 {
         board_onenand_data.cs           = cs;
-        board_onenand_data.parts        = sdp_onenand_parts.parts;
-        board_onenand_data.nr_parts     = sdp_onenand_parts.nr_parts;
+        board_onenand_data.parts        = onenand_parts;
+        board_onenand_data.nr_parts     = nr_parts;
 
         gpmc_onenand_init(&board_onenand_data);
 }
 #else
 static void
-__init board_onenand_init(struct flash_partitions sdp_onenand_parts, u8 cs)
+__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
 {
 }
 #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
@@ -147,7 +129,7 @@ static struct gpmc_timings nand_timings = {
         .wr_data_mux_bus = 0,
 };
 
-static struct omap_nand_platform_data sdp_nand_data = {
+static struct omap_nand_platform_data board_nand_data = {
         .nand_setup     = NULL,
         .gpmc_t         = &nand_timings,
         .dma_channel    = -1,           /* disable DMA in OMAP NAND driver */
@@ -155,23 +137,18 @@ static struct omap_nand_platform_data sdp_nand_data = {
         .devsize        = 0,    /* '0' for 8-bit, '1' for 16-bit device */
 };
 
-static void
-__init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs)
+void
+__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
 {
-        sdp_nand_data.cs                = cs;
-        sdp_nand_data.parts             = sdp_nand_parts.parts;
-        sdp_nand_data.nr_parts          = sdp_nand_parts.nr_parts;
+        board_nand_data.cs              = cs;
+        board_nand_data.parts           = nand_parts;
+        board_nand_data.nr_parts                = nr_parts;
 
-        sdp_nand_data.gpmc_cs_baseaddr  = (void *)(OMAP34XX_GPMC_VIRT +
-                                                        GPMC_CS0_BASE +
-                                                        cs * GPMC_CS_SIZE);
-        sdp_nand_data.gpmc_baseaddr      = (void *) (OMAP34XX_GPMC_VIRT);
-
-        gpmc_nand_init(&sdp_nand_data);
+        gpmc_nand_init(&board_nand_data);
 }
 #else
-static void
-__init board_nand_init(struct flash_partitions sdp_nand_parts, u8 cs)
+void
+__init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
 {
 }
 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
@@ -215,7 +192,8 @@ unmap:
  *
  * @return - void.
  */
-void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])
+void board_flash_init(struct flash_partitions partition_info[],
+                                        char chip_sel_board[][GPMC_CS_NUM])
 {
         u8              cs = 0;
         u8              norcs = GPMC_CS_NUM + 1;
@@ -232,7 +210,7 @@ void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])
                 printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs);
                 return;
         }
-        config_sel = (unsigned char *)(chip_sel_sdp[idx]);
+        config_sel = (unsigned char *)(chip_sel_board[idx]);
 
         while (cs < GPMC_CS_NUM) {
                 switch (config_sel[cs]) {
@@ -256,17 +234,20 @@ void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])
                 printk(KERN_INFO "NOR: Unable to find configuration "
                                 "in GPMC\n");
         else
-                board_nor_init(sdp_partition_info[0], norcs);
+                board_nor_init(partition_info[0].parts,
+                                partition_info[0].nr_parts, norcs);
 
         if (onenandcs > GPMC_CS_NUM)
                 printk(KERN_INFO "OneNAND: Unable to find configuration "
                                 "in GPMC\n");
         else
-                board_onenand_init(sdp_partition_info[1], onenandcs);
+                board_onenand_init(partition_info[1].parts,
+                                        partition_info[1].nr_parts, onenandcs);
 
         if (nandcs > GPMC_CS_NUM)
                 printk(KERN_INFO "NAND: Unable to find configuration "
                                 "in GPMC\n");
         else
-                board_nand_init(sdp_partition_info[2], nandcs);
+                board_nand_init(partition_info[2].parts,
+                                partition_info[2].nr_parts, nandcs);
 }
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 16cc06860670..9a7f790d8c3a 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -26,7 +26,6 @@
 #include <asm/mach/map.h>
 
 #include <mach/gpio.h>
-#include <plat/mux.h>
 #include <plat/usb.h>
 #include <plat/board.h>
 #include <plat/common.h>
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 0665f2c8dc8e..3240c6a7d9e7 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -33,7 +33,6 @@
 
 #include <plat/control.h>
 #include <mach/gpio.h>
-#include <plat/mux.h>
 #include <plat/usb.h>
 #include <plat/board.h>
 #include <plat/common.h>
@@ -42,6 +41,8 @@
 #include <plat/dma.h>
 #include <plat/gpmc.h>
 
+#include "mux.h"
+
 #define H4_FLASH_CS     0
 #define H4_SMC91X_CS    1
 
@@ -246,7 +247,7 @@ static inline void __init h4_init_debug(void)
 
         udelay(100);
 
-        omap_cfg_reg(M15_24XX_GPIO92);
+        omap_mux_init_gpio(92, 0);
         if (debug_card_init(cs_mem_base, H4_ETHR_GPIO_IRQ) < 0)
                 gpmc_cs_free(eth_cs);
 
@@ -272,27 +273,6 @@ static struct omap_lcd_config h4_lcd_config __initdata = {
 };
 
 static struct omap_usb_config h4_usb_config __initdata = {
-#ifdef  CONFIG_MACH_OMAP2_H4_USB1
-        /* NOTE:  usb1 could also be used with 3 wire signaling */
-        .pins[1]        = 4,
-#endif
-
-#ifdef  CONFIG_MACH_OMAP_H4_OTG
-        /* S1.10 ON -- USB OTG port
-         * usb0 switched to Mini-AB port and isp1301 transceiver;
-         * S2.POS3 = OFF, S2.POS4 = ON ... to allow battery charging
-         */
-        .otg            = 1,
-        .pins[0]        = 4,
-#ifdef  CONFIG_USB_GADGET_OMAP
-        /* use OTG cable, or standard A-to-MiniB */
-        .hmc_mode       = 0x14, /* 0:dev/otg 1:host 2:disable */
-#elif   defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-        /* use OTG cable, or NONSTANDARD (B-to-MiniB) */
-        .hmc_mode       = 0x11, /* 0:host 1:host 2:disable */
-#endif  /* XX */
-
-#else
         /* S1.10 OFF -- usb "download port"
          * usb0 switched to Mini-B port and isp1105 transceiver;
          * S2.POS3 = ON, S2.POS4 = OFF ... to enable battery charging
@@ -301,7 +281,6 @@ static struct omap_usb_config h4_usb_config __initdata = {
         .pins[0]        = 3,
 /*      .hmc_mode       = 0x14,*/       /* 0:dev 1:host 2:disable */
         .hmc_mode       = 0x00,         /* 0:dev|otg 1:disable 2:disable */
-#endif
 };
 
 static struct omap_board_config_kernel h4_config[] = {
@@ -338,31 +317,54 @@ static struct i2c_board_info __initdata h4_i2c_board_info[] = {
         },
 };
 
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] __initdata = {
+        { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define board_mux       NULL
+#endif
+
 static void __init omap_h4_init(void)
 {
+        omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAF);
+
         /*
          * Make sure the serial ports are muxed on at this point.
          * You have to mux them off in device drivers later on
          * if not needed.
          */
-#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
-        omap_cfg_reg(K15_24XX_UART3_TX);
-        omap_cfg_reg(K14_24XX_UART3_RX);
-#endif
 
 #if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
+        omap_mux_init_gpio(88, OMAP_PULL_ENA | OMAP_PULL_UP);
+        omap_mux_init_gpio(89, OMAP_PULL_ENA | OMAP_PULL_UP);
+        omap_mux_init_gpio(124, OMAP_PULL_ENA | OMAP_PULL_UP);
+        omap_mux_init_signal("mcbsp2_dr.gpio_11", OMAP_PULL_ENA | OMAP_PULL_UP);
         if (omap_has_menelaus()) {
+                omap_mux_init_signal("sdrc_a14.gpio0",
+                        OMAP_PULL_ENA | OMAP_PULL_UP);
+                omap_mux_init_signal("vlynq_rx0.gpio_15", 0);
+                omap_mux_init_signal("gpio_98", 0);
                 row_gpios[5] = 0;
                 col_gpios[2] = 15;
                 col_gpios[6] = 18;
+        } else {
+                omap_mux_init_signal("gpio_96", OMAP_PULL_ENA | OMAP_PULL_UP);
+                omap_mux_init_signal("gpio_100", 0);
+                omap_mux_init_signal("gpio_98", 0);
         }
+        omap_mux_init_signal("gpio_90", 0);
+        omap_mux_init_signal("gpio_91", 0);
+        omap_mux_init_signal("gpio_36", 0);
+        omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0);
+        omap_mux_init_signal("gpio_97", 0);
 #endif
 
         i2c_register_board_info(1, h4_i2c_board_info,
                         ARRAY_SIZE(h4_i2c_board_info));
 
         platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
-        omap_usb_init(&h4_usb_config);
+        omap2_usbfs_init(&h4_usb_config);
         omap_serial_init();
 }
 
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index fefd7e6e9779..778afabf3b4e 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -38,6 +38,7 @@
 #include <plat/board.h>
 #include <plat/common.h>
 #include <plat/gpmc.h>
+#include <mach/board-zoom.h>
 
 #include <asm/delay.h>
 #include <plat/control.h>
@@ -388,6 +389,38 @@ static struct omap_musb_board_data musb_board_data = {
         .power                  = 100,
 };
 
+static struct mtd_partition ldp_nand_partitions[] = {
+        /* All the partition sizes are listed in terms of NAND block size */
+        {
+                .name           = "X-Loader-NAND",
+                .offset         = 0,
+                .size           = 4 * (64 * 2048),      /* 512KB, 0x80000 */
+                .mask_flags     = MTD_WRITEABLE,        /* force read-only */
+        },
+        {
+                .name           = "U-Boot-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
+                .size           = 10 * (64 * 2048),     /* 1.25MB, 0x140000 */
+                .mask_flags     = MTD_WRITEABLE,        /* force read-only */
+        },
+        {
+                .name           = "Boot Env-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1c0000 */
+                .size           = 2 * (64 * 2048),      /* 256KB, 0x40000 */
+        },
+        {
+                .name           = "Kernel-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x0200000*/
+                .size           = 240 * (64 * 2048),    /* 30M, 0x1E00000 */
+        },
+        {
+                .name           = "File System - NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x2000000 */
+                .size           = MTDPART_SIZ_FULL,     /* 96MB, 0x6000000 */
+        },
+
+};
+
 static void __init omap_ldp_init(void)
 {
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -400,6 +433,8 @@ static void __init omap_ldp_init(void)
         ads7846_dev_init();
         omap_serial_init();
         usb_musb_init(&musb_board_data);
+        board_nand_init(ldp_nand_partitions,
+                ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS);
 
         omap2_hsmmc_init(mmc);
         /* link regulators to MMC adapters */
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 3ccc34ebdcc7..5b9bbdc983bd 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -33,6 +33,8 @@
 #include <plat/mmc.h>
 #include <plat/serial.h>
 
+#include "mux.h"
+
 static int slot1_cover_open;
 static int slot2_cover_open;
 static struct device *mmc_device;
@@ -649,8 +651,17 @@ static void __init n8x0_init_irq(void)
         omap_gpio_init();
 }
 
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] __initdata = {
+        { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define board_mux       NULL
+#endif
+
 static void __init n8x0_init_machine(void)
 {
+        omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC);
         /* FIXME: add n810 spi devices */
         spi_register_board_info(n800_spi_board_info,
                                 ARRAY_SIZE(n800_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 69b154cdc75d..dc5a7e8790c0 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -48,9 +48,6 @@
 #include "mux.h"
 #include "hsmmc.h"
 
-#define GPMC_CS0_BASE  0x60
-#define GPMC_CS_SIZE   0x30
-
 #define NAND_BLOCK_SIZE         SZ_128K
 
 static struct mtd_partition omap3beagle_nand_partitions[] = {
@@ -93,20 +90,6 @@ static struct omap_nand_platform_data omap3beagle_nand_data = {
         .dev_ready      = NULL,
 };
 
-static struct resource omap3beagle_nand_resource = {
-        .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device omap3beagle_nand_device = {
-        .name           = "omap2-nand",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &omap3beagle_nand_data,
-        },
-        .num_resources  = 1,
-        .resource       = &omap3beagle_nand_resource,
-};
-
 /* DSS */
 
 static int beagle_enable_dvi(struct omap_dss_device *dssdev)
@@ -424,8 +407,6 @@ static void __init omap3beagle_flash_init(void)
         u8 cs = 0;
         u8 nandcs = GPMC_CS_NUM + 1;
 
-        u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
-
         /* find out the chip-select on which NAND exists */
         while (cs < GPMC_CS_NUM) {
                 u32 ret = 0;
@@ -447,12 +428,9 @@ static void __init omap3beagle_flash_init(void)
 
         if (nandcs < GPMC_CS_NUM) {
                 omap3beagle_nand_data.cs = nandcs;
-                omap3beagle_nand_data.gpmc_cs_baseaddr = (void *)
-                        (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
-                omap3beagle_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add);
 
                 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
-                if (platform_device_register(&omap3beagle_nand_device) < 0)
+                if (gpmc_nand_init(&omap3beagle_nand_data) < 0)
                         printk(KERN_ERR "Unable to register NAND device\n");
         }
 }
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index db06dc910ba7..a58bdef1b4da 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -25,6 +25,9 @@
 #include <linux/spi/ads7846.h>
 #include <linux/regulator/machine.h>
 #include <linux/i2c/twl.h>
+#include <linux/spi/wl12xx.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
 #include <linux/leds.h>
 #include <linux/input.h>
 #include <linux/input/matrix_keypad.h>
@@ -41,15 +44,49 @@
 #include <plat/mcspi.h>
 #include <plat/usb.h>
 #include <plat/display.h>
+#include <plat/nand.h>
 
 #include "mux.h"
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "hsmmc.h"
 
+#define PANDORA_WIFI_IRQ_GPIO           21
+#define PANDORA_WIFI_NRESET_GPIO        23
 #define OMAP3_PANDORA_TS_GPIO           94
 
-/* hardware debounce: (value + 1) * 31us */
-#define GPIO_DEBOUNCE_TIME              127
+#define NAND_BLOCK_SIZE                 SZ_128K
+
+static struct mtd_partition omap3pandora_nand_partitions[] = {
+        {
+                .name           = "xloader",
+                .offset         = 0,
+                .size           = 4 * NAND_BLOCK_SIZE,
+                .mask_flags     = MTD_WRITEABLE
+        }, {
+                .name           = "uboot",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 15 * NAND_BLOCK_SIZE,
+        }, {
+                .name           = "uboot-env",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 1 * NAND_BLOCK_SIZE,
+        }, {
+                .name           = "boot",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 80 * NAND_BLOCK_SIZE,
+        }, {
+                .name           = "rootfs",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct omap_nand_platform_data pandora_nand_data = {
+        .cs             = 0,
+        .devsize        = 1,    /* '0' for 8-bit, '1' for 16-bit device */
+        .parts          = omap3pandora_nand_partitions,
+        .nr_parts       = ARRAY_SIZE(omap3pandora_nand_partitions),
+};
 
 static struct gpio_led pandora_gpio_leds[] = {
         {
@@ -88,6 +125,7 @@ static struct platform_device pandora_leds_gpio = {
         .type           = ev_type,                              \
         .code           = ev_code,                              \
         .active_low     = act_low,                              \
+        .debounce_interval = 4,                                 \
         .desc           = "btn " descr,                         \
 }
 
@@ -99,14 +137,14 @@ static struct gpio_keys_button pandora_gpio_keys[] = {
         GPIO_BUTTON_LOW(103,    KEY_DOWN,       "down"),
         GPIO_BUTTON_LOW(96,     KEY_LEFT,       "left"),
         GPIO_BUTTON_LOW(98,     KEY_RIGHT,      "right"),
-        GPIO_BUTTON_LOW(109,    KEY_KP1,        "game 1"),
-        GPIO_BUTTON_LOW(111,    KEY_KP2,        "game 2"),
-        GPIO_BUTTON_LOW(106,    KEY_KP3,        "game 3"),
-        GPIO_BUTTON_LOW(101,    KEY_KP4,        "game 4"),
-        GPIO_BUTTON_LOW(102,    BTN_TL,         "l"),
-        GPIO_BUTTON_LOW(97,     BTN_TL2,        "l2"),
-        GPIO_BUTTON_LOW(105,    BTN_TR,         "r"),
-        GPIO_BUTTON_LOW(107,    BTN_TR2,        "r2"),
+        GPIO_BUTTON_LOW(109,    KEY_PAGEUP,     "game 1"),
+        GPIO_BUTTON_LOW(111,    KEY_END,        "game 2"),
+        GPIO_BUTTON_LOW(106,    KEY_PAGEDOWN,   "game 3"),
+        GPIO_BUTTON_LOW(101,    KEY_HOME,       "game 4"),
+        GPIO_BUTTON_LOW(102,    KEY_RIGHTSHIFT, "l"),
+        GPIO_BUTTON_LOW(97,     KEY_KPPLUS,     "l2"),
+        GPIO_BUTTON_LOW(105,    KEY_RIGHTCTRL,  "r"),
+        GPIO_BUTTON_LOW(107,    KEY_KPMINUS,    "r2"),
         GPIO_BUTTON_LOW(104,    KEY_LEFTCTRL,   "ctrl"),
         GPIO_BUTTON_LOW(99,     KEY_MENU,       "menu"),
         GPIO_BUTTON_LOW(176,    KEY_COFFEE,     "hold"),
@@ -127,14 +165,7 @@ static struct platform_device pandora_keys_gpio = {
         },
 };
 
-static void __init pandora_keys_gpio_init(void)
-{
-        /* set debounce time for GPIO banks 4 and 6 */
-        gpio_set_debounce(32 * 3, GPIO_DEBOUNCE_TIME);
-        gpio_set_debounce(32 * 5, GPIO_DEBOUNCE_TIME);
-}
-
-static int board_keymap[] = {
+static const uint32_t board_keymap[] = {
         /* row, col, code */
         KEY(0, 0, KEY_9),
         KEY(0, 1, KEY_8),
@@ -255,12 +286,33 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = {
 static int omap3pandora_twl_gpio_setup(struct device *dev,
                 unsigned gpio, unsigned ngpio)
 {
+        int ret, gpio_32khz;
+
         /* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */
         omap3pandora_mmc[0].gpio_cd = gpio + 0;
         omap3pandora_mmc[1].gpio_cd = gpio + 1;
         omap2_hsmmc_init(omap3pandora_mmc);
 
+        /* gpio + 13 drives 32kHz buffer for wifi module */
+        gpio_32khz = gpio + 13;
+        ret = gpio_request(gpio_32khz, "wifi 32kHz");
+        if (ret < 0) {
+                pr_err("Cannot get GPIO line %d, ret=%d\n", gpio_32khz, ret);
+                goto fail;
+        }
+
+        ret = gpio_direction_output(gpio_32khz, 1);
+        if (ret < 0) {
+                pr_err("Cannot set GPIO line %d, ret=%d\n", gpio_32khz, ret);
+                goto fail_direction;
+        }
+
         return 0;
+
+fail_direction:
+        gpio_free(gpio_32khz);
+fail:
+        return -ENODEV;
 }
 
 static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
@@ -539,10 +591,67 @@ static void __init omap3pandora_init_irq(void)
         omap_gpio_init();
 }
 
+static void pandora_wl1251_set_power(bool enable)
+{
+        /*
+         * Keep power always on until wl1251_sdio driver learns to re-init
+         * the chip after powering it down and back up.
+         */
+}
+
+static struct wl12xx_platform_data pandora_wl1251_pdata = {
+        .set_power      = pandora_wl1251_set_power,
+        .use_eeprom     = true,
+};
+
+static struct platform_device pandora_wl1251_data = {
+        .name           = "wl1251_data",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &pandora_wl1251_pdata,
+        },
+};
+
+static void pandora_wl1251_init(void)
+{
+        int ret;
+
+        ret = gpio_request(PANDORA_WIFI_IRQ_GPIO, "wl1251 irq");
+        if (ret < 0)
+                goto fail;
+
+        ret = gpio_direction_input(PANDORA_WIFI_IRQ_GPIO);
+        if (ret < 0)
+                goto fail_irq;
+
+        pandora_wl1251_pdata.irq = gpio_to_irq(PANDORA_WIFI_IRQ_GPIO);
+        if (pandora_wl1251_pdata.irq < 0)
+                goto fail_irq;
+
+        ret = gpio_request(PANDORA_WIFI_NRESET_GPIO, "wl1251 nreset");
+        if (ret < 0)
+                goto fail_irq;
+
+        /* start powered so that it probes with MMC subsystem */
+        ret = gpio_direction_output(PANDORA_WIFI_NRESET_GPIO, 1);
+        if (ret < 0)
+                goto fail_nreset;
+
+        return;
+
+fail_nreset:
+        gpio_free(PANDORA_WIFI_NRESET_GPIO);
+fail_irq:
+        gpio_free(PANDORA_WIFI_IRQ_GPIO);
+fail:
+        printk(KERN_ERR "wl1251 board initialisation failed\n");
+}
+
 static struct platform_device *omap3pandora_devices[] __initdata = {
         &pandora_leds_gpio,
         &pandora_keys_gpio,
         &pandora_dss_device,
+        &pandora_wl1251_data,
 };
 
 static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
@@ -575,6 +684,7 @@ static void __init omap3pandora_init(void)
 {
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         omap3pandora_i2c_init();
+        pandora_wl1251_init();
         platform_add_devices(omap3pandora_devices,
                         ARRAY_SIZE(omap3pandora_devices));
         omap_serial_init();
@@ -582,8 +692,8 @@ static void __init omap3pandora_init(void)
                         ARRAY_SIZE(omap3pandora_spi_board_info));
         omap3pandora_ads7846_init();
         usb_ehci_init(&ehci_pdata);
-        pandora_keys_gpio_init();
         usb_musb_init(&musb_board_data);
+        gpmc_nand_init(&pandora_nand_data);
 
         /* Ensure SDRC pins are mux'd for self-refresh */
         omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 2f5f8233dd5b..288f9d5c7291 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -54,9 +54,6 @@
 
 #include <asm/setup.h>
 
-#define GPMC_CS0_BASE  0x60
-#define GPMC_CS_SIZE   0x30
-
 #define NAND_BLOCK_SIZE         SZ_128K
 
 #define OMAP3_AC_GPIO           136
@@ -106,20 +103,6 @@ static struct omap_nand_platform_data omap3touchbook_nand_data = {
         .dev_ready      = NULL,
 };
 
-static struct resource omap3touchbook_nand_resource = {
-        .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device omap3touchbook_nand_device = {
-        .name           = "omap2-nand",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &omap3touchbook_nand_data,
-        },
-        .num_resources  = 1,
-        .resource       = &omap3touchbook_nand_resource,
-};
-
 #include "sdram-micron-mt46h32m32lf-6.h"
 
 static struct omap2_hsmmc_info mmc[] = {
@@ -458,8 +441,6 @@ static void __init omap3touchbook_flash_init(void)
         u8 cs = 0;
         u8 nandcs = GPMC_CS_NUM + 1;
 
-        u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
-
         /* find out the chip-select on which NAND exists */
         while (cs < GPMC_CS_NUM) {
                 u32 ret = 0;
@@ -481,13 +462,9 @@ static void __init omap3touchbook_flash_init(void)
 
         if (nandcs < GPMC_CS_NUM) {
                 omap3touchbook_nand_data.cs = nandcs;
-                omap3touchbook_nand_data.gpmc_cs_baseaddr = (void *)
-                        (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
-                omap3touchbook_nand_data.gpmc_baseaddr =
-                                                (void *) (gpmc_base_add);
 
                 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
-                if (platform_device_register(&omap3touchbook_nand_device) < 0)
+                if (gpmc_nand_init(&omap3touchbook_nand_data) < 0)
                         printk(KERN_ERR "Unable to register NAND device\n");
         }
 }
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
new file mode 100644
index 000000000000..c03d1d56db56
--- /dev/null
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -0,0 +1,304 @@
+/*
+ * Board support file for OMAP4430 based PandaBoard.
+ *
+ * Copyright (C) 2010 Texas Instruments
+ *
+ * Author: David Anders <x0132446@ti.com>
+ *
+ * Based on mach-omap2/board-4430sdp.c
+ *
+ * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * Based on mach-omap2/board-3430sdp.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/usb/otg.h>
+#include <linux/i2c/twl.h>
+#include <linux/regulator/machine.h>
+
+#include <mach/hardware.h>
+#include <mach/omap4-common.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <plat/board.h>
+#include <plat/common.h>
+#include <plat/control.h>
+#include <plat/timer-gp.h>
+#include <plat/usb.h>
+#include <plat/mmc.h>
+#include "hsmmc.h"
+
+
+static void __init omap4_panda_init_irq(void)
+{
+        omap2_init_common_hw(NULL, NULL);
+        gic_init_irq();
+        omap_gpio_init();
+}
+
+static struct omap_musb_board_data musb_board_data = {
+        .interface_type         = MUSB_INTERFACE_UTMI,
+        .mode                   = MUSB_PERIPHERAL,
+        .power                  = 100,
+};
+
+static struct omap2_hsmmc_info mmc[] = {
+        {
+                .mmc            = 1,
+                .wires          = 8,
+                .gpio_wp        = -EINVAL,
+        },
+        {}      /* Terminator */
+};
+
+static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = {
+        {
+                .supply = "vmmc",
+                .dev_name = "mmci-omap-hs.0",
+        },
+        {
+                .supply = "vmmc",
+                .dev_name = "mmci-omap-hs.1",
+        },
+};
+
+static int omap4_twl6030_hsmmc_late_init(struct device *dev)
+{
+        int ret = 0;
+        struct platform_device *pdev = container_of(dev,
+                                struct platform_device, dev);
+        struct omap_mmc_platform_data *pdata = dev->platform_data;
+
+        /* Setting MMC1 Card detect Irq */
+        if (pdev->id == 0)
+                pdata->slots[0].card_detect_irq = TWL6030_IRQ_BASE +
+                                                MMCDETECT_INTR_OFFSET;
+        return ret;
+}
+
+static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
+{
+        struct omap_mmc_platform_data *pdata = dev->platform_data;
+
+        pdata->init =   omap4_twl6030_hsmmc_late_init;
+}
+
+static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
+{
+        struct omap2_hsmmc_info *c;
+
+        omap2_hsmmc_init(controllers);
+        for (c = controllers; c->mmc; c++)
+                omap4_twl6030_hsmmc_set_late_init(c->dev);
+
+        return 0;
+}
+
+static struct regulator_init_data omap4_panda_vaux1 = {
+        .constraints = {
+                .min_uV                 = 1000000,
+                .max_uV                 = 3000000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_panda_vaux2 = {
+        .constraints = {
+                .min_uV                 = 1200000,
+                .max_uV                 = 2800000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_panda_vaux3 = {
+        .constraints = {
+                .min_uV                 = 1000000,
+                .max_uV                 = 3000000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+/* VMMC1 for MMC1 card */
+static struct regulator_init_data omap4_panda_vmmc = {
+        .constraints = {
+                .min_uV                 = 1200000,
+                .max_uV                 = 3000000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = 2,
+        .consumer_supplies      = omap4_panda_vmmc_supply,
+};
+
+static struct regulator_init_data omap4_panda_vpp = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 2500000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_panda_vusim = {
+        .constraints = {
+                .min_uV                 = 1200000,
+                .max_uV                 = 2900000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_panda_vana = {
+        .constraints = {
+                .min_uV                 = 2100000,
+                .max_uV                 = 2100000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask  = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_panda_vcxio = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 1800000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask  = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_panda_vdac = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 1800000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask  = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct regulator_init_data omap4_panda_vusb = {
+        .constraints = {
+                .min_uV                 = 3300000,
+                .max_uV                 = 3300000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask  =      REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+};
+
+static struct twl4030_platform_data omap4_panda_twldata = {
+        .irq_base       = TWL6030_IRQ_BASE,
+        .irq_end        = TWL6030_IRQ_END,
+
+        /* Regulators */
+        .vmmc           = &omap4_panda_vmmc,
+        .vpp            = &omap4_panda_vpp,
+        .vusim          = &omap4_panda_vusim,
+        .vana           = &omap4_panda_vana,
+        .vcxio          = &omap4_panda_vcxio,
+        .vdac           = &omap4_panda_vdac,
+        .vusb           = &omap4_panda_vusb,
+        .vaux1          = &omap4_panda_vaux1,
+        .vaux2          = &omap4_panda_vaux2,
+        .vaux3          = &omap4_panda_vaux3,
+};
+
+static struct i2c_board_info __initdata omap4_panda_i2c_boardinfo[] = {
+        {
+                I2C_BOARD_INFO("twl6030", 0x48),
+                .flags = I2C_CLIENT_WAKE,
+                .irq = OMAP44XX_IRQ_SYS_1N,
+                .platform_data = &omap4_panda_twldata,
+        },
+};
+static int __init omap4_panda_i2c_init(void)
+{
+        /*
+         * Phoenix Audio IC needs I2C1 to
+         * start with 400 KHz or less
+         */
+        omap_register_i2c_bus(1, 400, omap4_panda_i2c_boardinfo,
+                        ARRAY_SIZE(omap4_panda_i2c_boardinfo));
+        omap_register_i2c_bus(2, 400, NULL, 0);
+        omap_register_i2c_bus(3, 400, NULL, 0);
+        omap_register_i2c_bus(4, 400, NULL, 0);
+        return 0;
+}
+static void __init omap4_panda_init(void)
+{
+        int status;
+
+        omap4_panda_i2c_init();
+        omap_serial_init();
+        omap4_twl6030_hsmmc_init(mmc);
+        /* OMAP4 Panda uses internal transceiver so register nop transceiver */
+        usb_nop_xceiv_register();
+        /* FIXME: allow multi-omap to boot until musb is updated for omap4 */
+        if (!cpu_is_omap44xx())
+                usb_musb_init(&musb_board_data);
+}
+
+static void __init omap4_panda_map_io(void)
+{
+        omap2_set_globals_443x();
+        omap44xx_map_common_io();
+}
+
+MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
+        /* Maintainer: David Anders - Texas Instruments Inc */
+        .phys_io        = 0x48000000,
+        .io_pg_offst    = ((0xfa000000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = omap4_panda_map_io,
+        .init_irq       = omap4_panda_init_irq,
+        .init_machine   = omap4_panda_init,
+        .timer          = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 79ac41400c21..7fe3296faa25 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -58,8 +58,6 @@
 #define OVERO_GPIO_USBH_NRESET  183
 
 #define NAND_BLOCK_SIZE SZ_128K
-#define GPMC_CS0_BASE  0x60
-#define GPMC_CS_SIZE   0x30
 
 #define OVERO_SMSC911X_CS      5
 #define OVERO_SMSC911X_GPIO    176
@@ -166,9 +164,26 @@ static struct platform_device overo_smsc911x_device = {
         },
 };
 
+static struct platform_device overo_smsc911x2_device = {
+        .name           = "smsc911x",
+        .id             = 1,
+        .num_resources  = ARRAY_SIZE(overo_smsc911x2_resources),
+        .resource       = overo_smsc911x2_resources,
+        .dev            = {
+                .platform_data = &overo_smsc911x_config,
+        },
+};
+
+static struct platform_device *smsc911x_devices[] = {
+        &overo_smsc911x_device,
+        &overo_smsc911x2_device,
+};
+
 static inline void __init overo_init_smsc911x(void)
 {
-        unsigned long cs_mem_base;
+        unsigned long cs_mem_base, cs_mem_base2;
+
+        /* set up first smsc911x chip */
 
         if (gpmc_cs_request(OVERO_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) {
                 printk(KERN_ERR "Failed request for GPMC mem for smsc911x\n");
@@ -189,7 +204,28 @@ static inline void __init overo_init_smsc911x(void)
         overo_smsc911x_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X_GPIO);
         overo_smsc911x_resources[1].end   = 0;
 
-        platform_device_register(&overo_smsc911x_device);
+        /* set up second smsc911x chip */
+
+        if (gpmc_cs_request(OVERO_SMSC911X2_CS, SZ_16M, &cs_mem_base2) < 0) {
+                printk(KERN_ERR "Failed request for GPMC mem for smsc911x2\n");
+                return;
+        }
+
+        overo_smsc911x2_resources[0].start = cs_mem_base2 + 0x0;
+        overo_smsc911x2_resources[0].end   = cs_mem_base2 + 0xff;
+
+        if ((gpio_request(OVERO_SMSC911X2_GPIO, "SMSC911X2 IRQ") == 0) &&
+            (gpio_direction_input(OVERO_SMSC911X2_GPIO) == 0)) {
+                gpio_export(OVERO_SMSC911X2_GPIO, 0);
+        } else {
+                printk(KERN_ERR "could not obtain gpio for SMSC911X2 IRQ\n");
+                return;
+        }
+
+        overo_smsc911x2_resources[1].start = OMAP_GPIO_IRQ(OVERO_SMSC911X2_GPIO);
+        overo_smsc911x2_resources[1].end   = 0;
+
+        platform_add_devices(smsc911x_devices, ARRAY_SIZE(smsc911x_devices));
 }
 
 #else
@@ -231,28 +267,11 @@ static struct omap_nand_platform_data overo_nand_data = {
         .dma_channel = -1,      /* disable DMA in OMAP NAND driver */
 };
 
-static struct resource overo_nand_resource = {
-        .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device overo_nand_device = {
-        .name           = "omap2-nand",
-        .id             = -1,
-        .dev            = {
-                .platform_data  = &overo_nand_data,
-        },
-        .num_resources  = 1,
-        .resource       = &overo_nand_resource,
-};
-
-
 static void __init overo_flash_init(void)
 {
         u8 cs = 0;
         u8 nandcs = GPMC_CS_NUM + 1;
 
-        u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
-
         /* find out the chip-select on which NAND exists */
         while (cs < GPMC_CS_NUM) {
                 u32 ret = 0;
@@ -274,12 +293,9 @@ static void __init overo_flash_init(void)
 
         if (nandcs < GPMC_CS_NUM) {
                 overo_nand_data.cs = nandcs;
-                overo_nand_data.gpmc_cs_baseaddr = (void *)
-                        (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE);
-                overo_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add);
 
                 printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
-                if (platform_device_register(&overo_nand_device) < 0)
+                if (gpmc_nand_init(&overo_nand_data) < 0)
                         printk(KERN_ERR "Unable to register NAND device\n");
         }
 }
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index c5555ca13d00..9a5eb87425fc 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -25,7 +25,6 @@
 #include <linux/mmc/host.h>
 
 #include <plat/mcspi.h>
-#include <plat/mux.h>
 #include <plat/board.h>
 #include <plat/common.h>
 #include <plat/dma.h>
@@ -33,6 +32,11 @@
 #include <plat/onenand.h>
 #include <plat/gpmc-smc91x.h>
 
+#include <sound/tlv320aic3x.h>
+#include <sound/tpa6130a2-plat.h>
+
+#include <../drivers/staging/iio/light/tsl2563.h>
+
 #include "mux.h"
 #include "hsmmc.h"
 
@@ -51,6 +55,12 @@ enum {
 
 static struct wl12xx_platform_data wl1251_pdata;
 
+#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
+static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
+        .cover_comp_gain = 16,
+};
+#endif
+
 static struct omap2_mcspi_device_config wl1251_mcspi_config = {
         .turbo_mode     = 0,
         .single_channel = 1,
@@ -220,10 +230,10 @@ static int board_keymap[] = {
         KEY(4, 4, KEY_LEFTCTRL),
         KEY(4, 5, KEY_RIGHTALT),
         KEY(4, 6, KEY_LEFTSHIFT),
-        KEY(4, 8, KEY_10),
+        KEY(4, 8, KEY_F10),
 
         KEY(5, 0, KEY_Y),
-        KEY(5, 8, KEY_11),
+        KEY(5, 8, KEY_F11),
 
         KEY(6, 0, KEY_U),
 
@@ -311,48 +321,29 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
         {}      /* Terminator */
 };
 
-static struct regulator_consumer_supply rx51_vmmc1_supply = {
-        .supply   = "vmmc",
-        .dev_name = "mmci-omap-hs.0",
-};
+static struct regulator_consumer_supply rx51_vmmc1_supply =
+        REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0");
 
-static struct regulator_consumer_supply rx51_vaux3_supply = {
-        .supply   = "vmmc",
-        .dev_name = "mmci-omap-hs.1",
-};
+static struct regulator_consumer_supply rx51_vaux3_supply =
+        REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1");
 
-static struct regulator_consumer_supply rx51_vsim_supply = {
-        .supply   = "vmmc_aux",
-        .dev_name = "mmci-omap-hs.1",
-};
+static struct regulator_consumer_supply rx51_vsim_supply =
+        REGULATOR_SUPPLY("vmmc_aux", "mmci-omap-hs.1");
 
 static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
         /* tlv320aic3x analog supplies */
-        {
-                .supply         = "AVDD",
-                .dev_name       = "2-0018",
-        },
-        {
-                .supply         = "DRVDD",
-                .dev_name       = "2-0018",
-        },
+        REGULATOR_SUPPLY("AVDD", "2-0018"),
+        REGULATOR_SUPPLY("DRVDD", "2-0018"),
+        /* tpa6130a2 */
+        REGULATOR_SUPPLY("Vdd", "2-0060"),
         /* Keep vmmc as last item. It is not iterated for newer boards */
-        {
-                .supply         = "vmmc",
-                .dev_name       = "mmci-omap-hs.1",
-        },
+        REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1"),
 };
 
 static struct regulator_consumer_supply rx51_vio_supplies[] = {
         /* tlv320aic3x digital supplies */
-        {
-                .supply         = "IOVDD",
-                .dev_name       = "2-0018"
-        },
-        {
-                .supply         = "DVDD",
-                .dev_name       = "2-0018"
-        },
+        REGULATOR_SUPPLY("IOVDD", "2-0018"),
+        REGULATOR_SUPPLY("DVDD", "2-0018"),
 };
 
 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
@@ -373,6 +364,7 @@ static struct regulator_init_data rx51_vaux1 = {
                 .name                   = "V28",
                 .min_uV                 = 2800000,
                 .max_uV                 = 2800000,
+                .always_on              = true, /* due battery cover sensor */
                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
                                         | REGULATOR_MODE_STANDBY,
                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
@@ -718,6 +710,15 @@ static struct twl4030_platform_data rx51_twldata __initdata = {
         .vio                    = &rx51_vio,
 };
 
+static struct aic3x_pdata rx51_aic3x_data __initdata = {
+        .gpio_reset             = 60,
+};
+
+static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata = {
+        .id                     = TPA6130A2,
+        .power_gpio             = 98,
+};
+
 static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = {
         {
                 I2C_BOARD_INFO("twl5030", 0x48),
@@ -730,7 +731,18 @@ static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = {
 static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
         {
                 I2C_BOARD_INFO("tlv320aic3x", 0x18),
+                .platform_data = &rx51_aic3x_data,
+        },
+#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
+        {
+                I2C_BOARD_INFO("tsl2563", 0x29),
+                .platform_data = &rx51_tsl2563_platform_data,
         },
+#endif
+        {
+                I2C_BOARD_INFO("tpa6130a2", 0x60),
+                .platform_data = &rx51_tpa6130a2_data,
+        }
 };
 
 static int __init rx51_i2c_init(void)
diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c
index b743a4f42649..5a1005ba9815 100644
--- a/arch/arm/mach-omap2/board-rx51-video.c
+++ b/arch/arm/mach-omap2/board-rx51-video.c
@@ -16,7 +16,6 @@
 #include <linux/mm.h>
 
 #include <asm/mach-types.h>
-#include <plat/mux.h>
 #include <plat/display.h>
 #include <plat/vram.h>
 #include <plat/mcspi.h>
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c
index 803ef14cbf2d..0eafae2f9181 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -71,16 +71,72 @@ static struct twl4030_platform_data zoom2_twldata = {
 
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
+        /* WLAN IRQ - GPIO 162 */
+        OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
+        /* WLAN POWER ENABLE - GPIO 101 */
+        OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+        /* WLAN SDIO: MMC3 CMD */
+        OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP),
+        /* WLAN SDIO: MMC3 CLK */
+        OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
+        /* WLAN SDIO: MMC3 DAT[0-3] */
+        OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
+        OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
+        OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
+        OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
         { .reg_offset = OMAP_MUX_TERMINATOR },
 };
 #else
 #define board_mux       NULL
 #endif
 
+static struct mtd_partition zoom_nand_partitions[] = {
+        /* All the partition sizes are listed in terms of NAND block size */
+        {
+                .name           = "X-Loader-NAND",
+                .offset         = 0,
+                .size           = 4 * (64 * 2048),      /* 512KB, 0x80000 */
+                .mask_flags     = MTD_WRITEABLE,        /* force read-only */
+        },
+        {
+                .name           = "U-Boot-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
+                .size           = 10 * (64 * 2048),     /* 1.25MB, 0x140000 */
+                .mask_flags     = MTD_WRITEABLE,        /* force read-only */
+        },
+        {
+                .name           = "Boot Env-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1c0000 */
+                .size           = 2 * (64 * 2048),      /* 256KB, 0x40000 */
+        },
+        {
+                .name           = "Kernel-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x0200000*/
+                .size           = 240 * (64 * 2048),    /* 30M, 0x1E00000 */
+        },
+        {
+                .name           = "system",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x2000000 */
+                .size           = 3328 * (64 * 2048),   /* 416M, 0x1A000000 */
+        },
+        {
+                .name           = "userdata",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1C000000*/
+                .size           = 256 * (64 * 2048),    /* 32M, 0x2000000 */
+        },
+        {
+                .name           = "cache",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1E000000*/
+                .size           = 256 * (64 * 2048),    /* 32M, 0x2000000 */
+        },
+};
+
 static void __init omap_zoom2_init(void)
 {
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         zoom_peripherals_init();
+        board_nand_init(zoom_nand_partitions,
+                        ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS);
         zoom_debugboard_init();
 }
 
diff --git a/arch/arm/mach-omap2/board-zoom3.c b/arch/arm/mach-omap2/board-zoom3.c
index 33147042485f..79fcad655677 100644
--- a/arch/arm/mach-omap2/board-zoom3.c
+++ b/arch/arm/mach-omap2/board-zoom3.c
@@ -34,6 +34,47 @@ static void __init omap_zoom_map_io(void)
 static struct omap_board_config_kernel zoom_config[] __initdata = {
 };
 
+static struct mtd_partition zoom_nand_partitions[] = {
+        /* All the partition sizes are listed in terms of NAND block size */
+        {
+                .name           = "X-Loader-NAND",
+                .offset         = 0,
+                .size           = 4 * (64 * 2048),      /* 512KB, 0x80000 */
+                .mask_flags     = MTD_WRITEABLE,        /* force read-only */
+        },
+        {
+                .name           = "U-Boot-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
+                .size           = 10 * (64 * 2048),     /* 1.25MB, 0x140000 */
+                .mask_flags     = MTD_WRITEABLE,        /* force read-only */
+        },
+        {
+                .name           = "Boot Env-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1c0000 */
+                .size           = 2 * (64 * 2048),      /* 256KB, 0x40000 */
+        },
+        {
+                .name           = "Kernel-NAND",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x0200000*/
+                .size           = 240 * (64 * 2048),    /* 30M, 0x1E00000 */
+        },
+        {
+                .name           = "system",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x2000000 */
+                .size           = 3328 * (64 * 2048),   /* 416M, 0x1A000000 */
+        },
+        {
+                .name           = "userdata",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1C000000*/
+                .size           = 256 * (64 * 2048),    /* 32M, 0x2000000 */
+        },
+        {
+                .name           = "cache",
+                .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1E000000*/
+                .size           = 256 * (64 * 2048),    /* 32M, 0x2000000 */
+        },
+};
+
 static void __init omap_zoom_init_irq(void)
 {
         omap_board_config = zoom_config;
@@ -46,6 +87,19 @@ static void __init omap_zoom_init_irq(void)
 
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
+        /* WLAN IRQ - GPIO 162 */
+        OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
+        /* WLAN POWER ENABLE - GPIO 101 */
+        OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+        /* WLAN SDIO: MMC3 CMD */
+        OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP),
+        /* WLAN SDIO: MMC3 CLK */
+        OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
+        /* WLAN SDIO: MMC3 DAT[0-3] */
+        OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
+        OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
+        OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
+        OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
         { .reg_offset = OMAP_MUX_TERMINATOR },
 };
 #else
@@ -66,6 +120,8 @@ static void __init omap_zoom_init(void)
 {
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
         zoom_peripherals_init();
+        board_nand_init(zoom_nand_partitions,
+                         ARRAY_SIZE(zoom_nand_partitions), ZOOM_NAND_CS);
         zoom_debugboard_init();
 
         omap_mux_init_gpio(64, OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 03e6c9ed82a4..162a9be3cbb1 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -25,7 +25,6 @@
 #include <plat/control.h>
 #include <plat/tc.h>
 #include <plat/board.h>
-#include <plat/mux.h>
 #include <mach/gpio.h>
 #include <plat/mmc.h>
 #include <plat/dma.h>
@@ -230,64 +229,7 @@ static inline void omap_init_mbox(void)
 static inline void omap_init_mbox(void) { }
 #endif /* CONFIG_OMAP_MBOX_FWK */
 
-#if defined(CONFIG_OMAP_STI)
-
-#if defined(CONFIG_ARCH_OMAP2)
-
-#define OMAP2_STI_BASE          0x48068000
-#define OMAP2_STI_CHANNEL_BASE  0x54000000
-#define OMAP2_STI_IRQ           4
-
-static struct resource sti_resources[] = {
-        {
-                .start          = OMAP2_STI_BASE,
-                .end            = OMAP2_STI_BASE + 0x7ff,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = OMAP2_STI_CHANNEL_BASE,
-                .end            = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = OMAP2_STI_IRQ,
-                .flags          = IORESOURCE_IRQ,
-        }
-};
-#elif defined(CONFIG_ARCH_OMAP3)
-
-#define OMAP3_SDTI_BASE         0x54500000
-#define OMAP3_SDTI_CHANNEL_BASE 0x54600000
-
-static struct resource sti_resources[] = {
-        {
-                .start          = OMAP3_SDTI_BASE,
-                .end            = OMAP3_SDTI_BASE + 0xFFF,
-                .flags          = IORESOURCE_MEM,
-        },
-        {
-                .start          = OMAP3_SDTI_CHANNEL_BASE,
-                .end            = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
-                .flags          = IORESOURCE_MEM,
-        }
-};
-
-#endif
-
-static struct platform_device sti_device = {
-        .name           = "sti",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(sti_resources),
-        .resource       = sti_resources,
-};
-
-static inline void omap_init_sti(void)
-{
-        platform_device_register(&sti_device);
-}
-#else
 static inline void omap_init_sti(void) {}
-#endif
 
 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
 
@@ -672,19 +614,19 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
                                         OMAP_PIN_INPUT_PULLUP);
 
         if (cpu_is_omap2420() && controller_nr == 0) {
-                omap_cfg_reg(H18_24XX_MMC_CMD);
-                omap_cfg_reg(H15_24XX_MMC_CLKI);
-                omap_cfg_reg(G19_24XX_MMC_CLKO);
-                omap_cfg_reg(F20_24XX_MMC_DAT0);
-                omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
-                omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
+                omap_mux_init_signal("sdmmc_cmd", 0);
+                omap_mux_init_signal("sdmmc_clki", 0);
+                omap_mux_init_signal("sdmmc_clko", 0);
+                omap_mux_init_signal("sdmmc_dat0", 0);
+                omap_mux_init_signal("sdmmc_dat_dir0", 0);
+                omap_mux_init_signal("sdmmc_cmd_dir", 0);
                 if (mmc_controller->slots[0].wires == 4) {
-                        omap_cfg_reg(H14_24XX_MMC_DAT1);
-                        omap_cfg_reg(E19_24XX_MMC_DAT2);
-                        omap_cfg_reg(D19_24XX_MMC_DAT3);
-                        omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
-                        omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
-                        omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
+                        omap_mux_init_signal("sdmmc_dat1", 0);
+                        omap_mux_init_signal("sdmmc_dat2", 0);
+                        omap_mux_init_signal("sdmmc_dat3", 0);
+                        omap_mux_init_signal("sdmmc_dat_dir1", 0);
+                        omap_mux_init_signal("sdmmc_dat_dir2", 0);
+                        omap_mux_init_signal("sdmmc_dat_dir3", 0);
                 }
 
                 /*
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index e57fb29ff855..722209601927 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -19,8 +19,6 @@
 #include <plat/board.h>
 #include <plat/gpmc.h>
 
-#define WR_RD_PIN_MONITORING    0x00600000
-
 static struct omap_nand_platform_data *gpmc_nand_data;
 
 static struct resource gpmc_nand_resource = {
@@ -71,10 +69,10 @@ static int omap2_nand_gpmc_retime(void)
         t.wr_cycle  = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
 
         /* Configure GPMC */
-        gpmc_cs_write_reg(gpmc_nand_data->cs, GPMC_CS_CONFIG1,
-                        GPMC_CONFIG1_DEVICESIZE(gpmc_nand_data->devsize) |
-                        GPMC_CONFIG1_DEVICETYPE_NAND);
-
+        gpmc_cs_configure(gpmc_nand_data->cs,
+                                GPMC_CONFIG_DEV_SIZE, gpmc_nand_data->devsize);
+        gpmc_cs_configure(gpmc_nand_data->cs,
+                        GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
         err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
         if (err)
                 return err;
@@ -82,27 +80,13 @@ static int omap2_nand_gpmc_retime(void)
         return 0;
 }
 
-static int gpmc_nand_setup(void)
-{
-        struct device *dev = &gpmc_nand_device.dev;
-
-        /* Set timings in GPMC */
-        if (omap2_nand_gpmc_retime() < 0) {
-                dev_err(dev, "Unable to set gpmc timings\n");
-                return -EINVAL;
-        }
-
-        return 0;
-}
-
 int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
 {
-        unsigned int val;
         int err = 0;
         struct device *dev = &gpmc_nand_device.dev;
 
         gpmc_nand_data = _nand_data;
-        gpmc_nand_data->nand_setup = gpmc_nand_setup;
+        gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime;
         gpmc_nand_device.dev.platform_data = gpmc_nand_data;
 
         err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
@@ -112,19 +96,16 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
                 return err;
         }
 
-        err = gpmc_nand_setup();
+         /* Set timings in GPMC */
+        err = omap2_nand_gpmc_retime();
         if (err < 0) {
-                dev_err(dev, "NAND platform setup failed: %d\n", err);
+                dev_err(dev, "Unable to set gpmc timings: %d\n", err);
                 return err;
         }
 
         /* Enable RD PIN Monitoring Reg */
         if (gpmc_nand_data->dev_ready) {
-                val  = gpmc_cs_read_reg(gpmc_nand_data->cs,
-                                                 GPMC_CS_CONFIG1);
-                val |= WR_RD_PIN_MONITORING;
-                gpmc_cs_write_reg(gpmc_nand_data->cs,
-                                                GPMC_CS_CONFIG1, val);
+                gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1);
         }
 
         err = platform_device_register(&gpmc_nand_device);
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 5bc3ca03551c..f46933bc9373 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -46,8 +46,9 @@
 #define GPMC_ECC_CONFIG         0x1f4
 #define GPMC_ECC_CONTROL        0x1f8
 #define GPMC_ECC_SIZE_CONFIG    0x1fc
+#define GPMC_ECC1_RESULT        0x200
 
-#define GPMC_CS0                0x60
+#define GPMC_CS0_OFFSET         0x60
 #define GPMC_CS_SIZE            0x30
 
 #define GPMC_MEM_START          0x00000000
@@ -92,7 +93,8 @@ struct omap3_gpmc_regs {
 static struct resource  gpmc_mem_root;
 static struct resource  gpmc_cs_mem[GPMC_CS_NUM];
 static DEFINE_SPINLOCK(gpmc_mem_lock);
-static unsigned         gpmc_cs_map;
+static unsigned int gpmc_cs_map;        /* flag for cs which are initialized */
+static int gpmc_ecc_used = -EINVAL;     /* cs using ecc engine */
 
 static void __iomem *gpmc_base;
 
@@ -108,11 +110,27 @@ static u32 gpmc_read_reg(int idx)
         return __raw_readl(gpmc_base + idx);
 }
 
+static void gpmc_cs_write_byte(int cs, int idx, u8 val)
+{
+        void __iomem *reg_addr;
+
+        reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
+        __raw_writeb(val, reg_addr);
+}
+
+static u8 gpmc_cs_read_byte(int cs, int idx)
+{
+        void __iomem *reg_addr;
+
+        reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
+        return __raw_readb(reg_addr);
+}
+
 void gpmc_cs_write_reg(int cs, int idx, u32 val)
 {
         void __iomem *reg_addr;
 
-        reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;
+        reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
         __raw_writel(val, reg_addr);
 }
 
@@ -120,7 +138,7 @@ u32 gpmc_cs_read_reg(int cs, int idx)
 {
         void __iomem *reg_addr;
 
-        reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;
+        reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
         return __raw_readl(reg_addr);
 }
 
@@ -419,8 +437,157 @@ void gpmc_cs_free(int cs)
 EXPORT_SYMBOL(gpmc_cs_free);
 
 /**
+ * gpmc_read_status - read access request to get the different gpmc status
+ * @cmd: command type
+ * @return status
+ */
+int gpmc_read_status(int cmd)
+{
+        int     status = -EINVAL;
+        u32     regval = 0;
+
+        switch (cmd) {
+        case GPMC_GET_IRQ_STATUS:
+                status = gpmc_read_reg(GPMC_IRQSTATUS);
+                break;
+
+        case GPMC_PREFETCH_FIFO_CNT:
+                regval = gpmc_read_reg(GPMC_PREFETCH_STATUS);
+                status = GPMC_PREFETCH_STATUS_FIFO_CNT(regval);
+                break;
+
+        case GPMC_PREFETCH_COUNT:
+                regval = gpmc_read_reg(GPMC_PREFETCH_STATUS);
+                status = GPMC_PREFETCH_STATUS_COUNT(regval);
+                break;
+
+        case GPMC_STATUS_BUFFER:
+                regval = gpmc_read_reg(GPMC_STATUS);
+                /* 1 : buffer is available to write */
+                status = regval & GPMC_STATUS_BUFF_EMPTY;
+                break;
+
+        default:
+                printk(KERN_ERR "gpmc_read_status: Not supported\n");
+        }
+        return status;
+}
+EXPORT_SYMBOL(gpmc_read_status);
+
+/**
+ * gpmc_cs_configure - write request to configure gpmc
+ * @cs: chip select number
+ * @cmd: command type
+ * @wval: value to write
+ * @return status of the operation
+ */
+int gpmc_cs_configure(int cs, int cmd, int wval)
+{
+        int err = 0;
+        u32 regval = 0;
+
+        switch (cmd) {
+        case GPMC_SET_IRQ_STATUS:
+                gpmc_write_reg(GPMC_IRQSTATUS, wval);
+                break;
+
+        case GPMC_CONFIG_WP:
+                regval = gpmc_read_reg(GPMC_CONFIG);
+                if (wval)
+                        regval &= ~GPMC_CONFIG_WRITEPROTECT; /* WP is ON */
+                else
+                        regval |= GPMC_CONFIG_WRITEPROTECT;  /* WP is OFF */
+                gpmc_write_reg(GPMC_CONFIG, regval);
+                break;
+
+        case GPMC_CONFIG_RDY_BSY:
+                regval  = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
+                if (wval)
+                        regval |= WR_RD_PIN_MONITORING;
+                else
+                        regval &= ~WR_RD_PIN_MONITORING;
+                gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
+                break;
+
+        case GPMC_CONFIG_DEV_SIZE:
+                regval  = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
+                regval |= GPMC_CONFIG1_DEVICESIZE(wval);
+                gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
+                break;
+
+        case GPMC_CONFIG_DEV_TYPE:
+                regval  = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
+                regval |= GPMC_CONFIG1_DEVICETYPE(wval);
+                if (wval == GPMC_DEVICETYPE_NOR)
+                        regval |= GPMC_CONFIG1_MUXADDDATA;
+                gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
+                break;
+
+        default:
+                printk(KERN_ERR "gpmc_configure_cs: Not supported\n");
+                err = -EINVAL;
+        }
+
+        return err;
+}
+EXPORT_SYMBOL(gpmc_cs_configure);
+
+/**
+ * gpmc_nand_read - nand specific read access request
+ * @cs: chip select number
+ * @cmd: command type
+ */
+int gpmc_nand_read(int cs, int cmd)
+{
+        int rval = -EINVAL;
+
+        switch (cmd) {
+        case GPMC_NAND_DATA:
+                rval = gpmc_cs_read_byte(cs, GPMC_CS_NAND_DATA);
+                break;
+
+        default:
+                printk(KERN_ERR "gpmc_read_nand_ctrl: Not supported\n");
+        }
+        return rval;
+}
+EXPORT_SYMBOL(gpmc_nand_read);
+
+/**
+ * gpmc_nand_write - nand specific write request
+ * @cs: chip select number
+ * @cmd: command type
+ * @wval: value to write
+ */
+int gpmc_nand_write(int cs, int cmd, int wval)
+{
+        int err = 0;
+
+        switch (cmd) {
+        case GPMC_NAND_COMMAND:
+                gpmc_cs_write_byte(cs, GPMC_CS_NAND_COMMAND, wval);
+                break;
+
+        case GPMC_NAND_ADDRESS:
+                gpmc_cs_write_byte(cs, GPMC_CS_NAND_ADDRESS, wval);
+                break;
+
+        case GPMC_NAND_DATA:
+                gpmc_cs_write_byte(cs, GPMC_CS_NAND_DATA, wval);
+
+        default:
+                printk(KERN_ERR "gpmc_write_nand_ctrl: Not supported\n");
+                err = -EINVAL;
+        }
+        return err;
+}
+EXPORT_SYMBOL(gpmc_nand_write);
+
+
+
+/**
  * gpmc_prefetch_enable - configures and starts prefetch transfer
- * @cs: nand cs (chip select) number
+ * @cs: cs (chip select) number
  * @dma_mode: dma mode enable (1) or disable (0)
  * @u32_count: number of bytes to be transferred
  * @is_write: prefetch read(0) or write post(1) mode
@@ -428,7 +595,6 @@ EXPORT_SYMBOL(gpmc_cs_free);
 int gpmc_prefetch_enable(int cs, int dma_mode,
                                 unsigned int u32_count, int is_write)
 {
-        uint32_t prefetch_config1;
 
         if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
                 /* Set the amount of bytes to be prefetched */
@@ -437,17 +603,17 @@ int gpmc_prefetch_enable(int cs, int dma_mode,
                 /* Set dma/mpu mode, the prefetch read / post write and
                  * enable the engine. Set which cs is has requested for.
                  */
-                prefetch_config1 = ((cs << CS_NUM_SHIFT) |
+                gpmc_write_reg(GPMC_PREFETCH_CONFIG1, ((cs << CS_NUM_SHIFT) |
                                         PREFETCH_FIFOTHRESHOLD |
                                         ENABLE_PREFETCH |
                                         (dma_mode << DMA_MPU_MODE) |
-                                        (0x1 & is_write));
-                gpmc_write_reg(GPMC_PREFETCH_CONFIG1, prefetch_config1);
+                                        (0x1 & is_write)));
+
+                /*  Start the prefetch engine */
+                gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1);
         } else {
                 return -EBUSY;
         }
-        /*  Start the prefetch engine */
-        gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1);
 
         return 0;
 }
@@ -456,24 +622,24 @@ EXPORT_SYMBOL(gpmc_prefetch_enable);
 /**
  * gpmc_prefetch_reset - disables and stops the prefetch engine
  */
-void gpmc_prefetch_reset(void)
+int gpmc_prefetch_reset(int cs)
 {
+        u32 config1;
+
+        /* check if the same module/cs is trying to reset */
+        config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1);
+        if (((config1 >> CS_NUM_SHIFT) & 0x7) != cs)
+                return -EINVAL;
+
         /* Stop the PFPW engine */
         gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x0);
 
         /* Reset/disable the PFPW engine */
         gpmc_write_reg(GPMC_PREFETCH_CONFIG1, 0x0);
-}
-EXPORT_SYMBOL(gpmc_prefetch_reset);
 
-/**
- * gpmc_prefetch_status - reads prefetch status of engine
- */
-int  gpmc_prefetch_status(void)
-{
-        return gpmc_read_reg(GPMC_PREFETCH_STATUS);
+        return 0;
 }
-EXPORT_SYMBOL(gpmc_prefetch_status);
+EXPORT_SYMBOL(gpmc_prefetch_reset);
 
 static void __init gpmc_mem_init(void)
 {
@@ -615,3 +781,79 @@ void omap3_gpmc_restore_context(void)
         }
 }
 #endif /* CONFIG_ARCH_OMAP3 */
+
+/**
+ * gpmc_enable_hwecc - enable hardware ecc functionality
+ * @cs: chip select number
+ * @mode: read/write mode
+ * @dev_width: device bus width(1 for x16, 0 for x8)
+ * @ecc_size: bytes for which ECC will be generated
+ */
+int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
+{
+        unsigned int val;
+
+        /* check if ecc module is in used */
+        if (gpmc_ecc_used != -EINVAL)
+                return -EINVAL;
+
+        gpmc_ecc_used = cs;
+
+        /* clear ecc and enable bits */
+        val = ((0x00000001<<8) | 0x00000001);
+        gpmc_write_reg(GPMC_ECC_CONTROL, val);
+
+        /* program ecc and result sizes */
+        val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F));
+        gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, val);
+
+        switch (mode) {
+        case GPMC_ECC_READ:
+                gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
+                break;
+        case GPMC_ECC_READSYN:
+                 gpmc_write_reg(GPMC_ECC_CONTROL, 0x100);
+                break;
+        case GPMC_ECC_WRITE:
+                gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
+                break;
+        default:
+                printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode);
+                break;
+        }
+
+        /* (ECC 16 or 8 bit col) | ( CS  )  | ECC Enable */
+        val = (dev_width << 7) | (cs << 1) | (0x1);
+        gpmc_write_reg(GPMC_ECC_CONFIG, val);
+        return 0;
+}
+
+/**
+ * gpmc_calculate_ecc - generate non-inverted ecc bytes
+ * @cs: chip select number
+ * @dat: data pointer over which ecc is computed
+ * @ecc_code: ecc code buffer
+ *
+ * Using non-inverted ECC is considered ugly since writing a blank
+ * page (padding) will clear the ECC bytes. This is not a problem as long
+ * no one is trying to write data on the seemingly unused page. Reading
+ * an erased page will produce an ECC mismatch between generated and read
+ * ECC bytes that has to be dealt with separately.
+ */
+int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code)
+{
+        unsigned int val = 0x0;
+
+        if (gpmc_ecc_used != cs)
+                return -EINVAL;
+
+        /* read ecc result */
+        val = gpmc_read_reg(GPMC_ECC1_RESULT);
+        *ecc_code++ = val;          /* P128e, ..., P1e */
+        *ecc_code++ = val >> 16;    /* P128o, ..., P1o */
+        /* P2048o, P1024o, P512o, P256o, P2048e, P1024e, P512e, P256e */
+        *ecc_code++ = ((val >> 8) & 0x0f) | ((val >> 20) & 0xf0);
+
+        gpmc_ecc_used = -EINVAL;
+        return 0;
+}
diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index 7951ae1447ee..79c478c4cb1c 100644
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -21,32 +21,19 @@
 
 #include <plat/cpu.h>
 #include <plat/i2c.h>
-#include <plat/mux.h>
 
 #include "mux.h"
 
 void __init omap2_i2c_mux_pins(int bus_id)
 {
-        if (cpu_is_omap24xx()) {
-                const int omap24xx_pins[][2] = {
-                        { M19_24XX_I2C1_SCL, L15_24XX_I2C1_SDA },
-                        { J15_24XX_I2C2_SCL, H19_24XX_I2C2_SDA },
-                };
-                int scl, sda;
-
-                scl = omap24xx_pins[bus_id - 1][0];
-                sda = omap24xx_pins[bus_id - 1][1];
-                omap_cfg_reg(sda);
-                omap_cfg_reg(scl);
-        }
+        char mux_name[sizeof("i2c2_scl.i2c2_scl")];
 
         /* First I2C bus is not muxable */
-        if (cpu_is_omap34xx() && bus_id > 1) {
-                char mux_name[sizeof("i2c2_scl.i2c2_scl")];
+        if (bus_id == 1)
+                return;
 
-                sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id);
-                omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
-                sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
-                omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
-        }
+        sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id);
+        omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
+        sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
+        omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
 }
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 37b8a1a4adf8..fd1904b013fa 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -25,6 +25,8 @@
 #include <plat/control.h>
 #include <plat/cpu.h>
 
+#include <mach/id.h>
+
 static struct omap_chip_id omap_chip;
 static unsigned int omap_revision;
 
@@ -102,30 +104,36 @@ static struct omap_id omap_ids[] __initdata = {
 static void __iomem *tap_base;
 static u16 tap_prod_id;
 
-void __init omap24xx_check_revision(void)
+void omap_get_die_id(struct omap_die_id *odi)
+{
+        odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0);
+        odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1);
+        odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2);
+        odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
+}
+
+static void __init omap24xx_check_revision(void)
 {
         int i, j;
         u32 idcode, prod_id;
         u16 hawkeye;
         u8  dev_type, rev;
+        struct omap_die_id odi;
 
         idcode = read_tap_reg(OMAP_TAP_IDCODE);
         prod_id = read_tap_reg(tap_prod_id);
         hawkeye = (idcode >> 12) & 0xffff;
         rev = (idcode >> 28) & 0x0f;
         dev_type = (prod_id >> 16) & 0x0f;
+        omap_get_die_id(&odi);
 
         pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
                  idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
-        pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
-                 read_tap_reg(OMAP_TAP_DIE_ID_0));
+        pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", odi.id_0);
         pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
-                 read_tap_reg(OMAP_TAP_DIE_ID_1),
-                 (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
-        pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
-                 read_tap_reg(OMAP_TAP_DIE_ID_2));
-        pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
-                 read_tap_reg(OMAP_TAP_DIE_ID_3));
+                 odi.id_1, (odi.id_1 >> 28) & 0xf);
+        pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", odi.id_2);
+        pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", odi.id_3);
         pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
                  prod_id, dev_type);
 
@@ -164,7 +172,7 @@ void __init omap24xx_check_revision(void)
                 omap3_features |= OMAP3_HAS_ ##feat;                    \
         }
 
-void __init omap3_check_features(void)
+static void __init omap3_check_features(void)
 {
         u32 status;
 
@@ -179,6 +187,8 @@ void __init omap3_check_features(void)
         OMAP3_CHECK_FEATURE(status, ISP);
         if (cpu_is_omap3630())
                 omap3_features |= OMAP3_HAS_192MHZ_CLK;
+        if (!cpu_is_omap3505() && !cpu_is_omap3517())
+                omap3_features |= OMAP3_HAS_IO_WAKEUP;
 
         /*
          * TODO: Get additional info (where applicable)
@@ -186,7 +196,7 @@ void __init omap3_check_features(void)
          */
 }
 
-void __init omap3_check_revision(void)
+static void __init omap3_check_revision(void)
 {
         u32 cpuid, idcode;
         u16 hawkeye;
@@ -267,7 +277,7 @@ void __init omap3_check_revision(void)
         }
 }
 
-void __init omap4_check_revision(void)
+static void __init omap4_check_revision(void)
 {
         u32 idcode;
         u16 hawkeye;
@@ -297,7 +307,7 @@ void __init omap4_check_revision(void)
         if (omap3_has_ ##feat())                \
                 printk(#feat" ");
 
-void __init omap3_cpuinfo(void)
+static void __init omap3_cpuinfo(void)
 {
         u8 rev = GET_OMAP_REVISION();
         char cpu_name[16], cpu_rev[16];
diff --git a/arch/arm/mach-omap2/include/mach/board-sdp.h b/arch/arm/mach-omap2/include/mach/board-flash.h
index 465169c0908a..b2242ae2bb6f 100644
--- a/arch/arm/mach-omap2/include/mach/board-sdp.h
+++ b/arch/arm/mach-omap2/include/mach/board-flash.h
@@ -12,10 +12,17 @@
  */
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <plat/gpmc.h>
+
+#define PDC_NOR         1
+#define PDC_NAND        2
+#define PDC_ONENAND     3
+#define DBG_MPDB        4
 
 struct flash_partitions {
         struct mtd_partition *parts;
         int nr_parts;
 };
 
-extern void sdp_flash_init(struct flash_partitions []);
+extern void board_flash_init(struct flash_partitions [],
+                                char chip_sel[][GPMC_CS_NUM]);
diff --git a/arch/arm/mach-omap2/include/mach/board-zoom.h b/arch/arm/mach-omap2/include/mach/board-zoom.h
index c93b29e21b78..3af69d2c3dcd 100644
--- a/arch/arm/mach-omap2/include/mach/board-zoom.h
+++ b/arch/arm/mach-omap2/include/mach/board-zoom.h
@@ -1,5 +1,11 @@
 /*
  * Defines for zoom boards
  */
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+
+#define ZOOM_NAND_CS    0
+
+extern void __init board_nand_init(struct mtd_partition *, u8 nr_parts, u8 cs);
 extern int __init zoom_debugboard_init(void);
 extern void __init zoom_peripherals_init(void);
diff --git a/arch/arm/mach-omap2/include/mach/id.h b/arch/arm/mach-omap2/include/mach/id.h
new file mode 100644
index 000000000000..02ed3aa56f1e
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/id.h
@@ -0,0 +1,22 @@
+/*
+ * OMAP2 CPU identification code
+ *
+ * Copyright (C) 2010 Kan-Ru Chen <kanru@0xlab.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef OMAP2_ARCH_ID_H
+#define OMAP2_ARCH_ID_H
+
+struct omap_die_id {
+        u32 id_0;
+        u32 id_1;
+        u32 id_2;
+        u32 id_3;
+};
+
+void omap_get_die_id(struct omap_die_id *odi);
+
+#endif
diff --git a/arch/arm/mach-omap2/include/mach/omap4-common.h b/arch/arm/mach-omap2/include/mach/omap4-common.h
index 423af3a6dd31..2744dfee1ff4 100644
--- a/arch/arm/mach-omap2/include/mach/omap4-common.h
+++ b/arch/arm/mach-omap2/include/mach/omap4-common.h
@@ -13,6 +13,13 @@
 #ifndef OMAP_ARCH_OMAP4_COMMON_H
 #define OMAP_ARCH_OMAP4_COMMON_H
 
+/*
+ * wfi used in low power code. Directly opcode is used instead
+ * of instruction to avoid mulit-omap build break
+ */
+#define do_wfi()                        \
+                __asm__ __volatile__ (".word    0xe320f003" : : : "memory")
+
 #ifdef CONFIG_CACHE_L2X0
 extern void __iomem *l2cache_base;
 #endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index d1906c73aec1..210de9d292fb 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -28,7 +28,6 @@
 
 #include <asm/mach/map.h>
 
-#include <plat/mux.h>
 #include <plat/sram.h>
 #include <plat/sdrc.h>
 #include <plat/gpmc.h>
@@ -327,7 +326,6 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
                 omap2430_hwmod_init();
         else if (cpu_is_omap34xx())
                 omap3xxx_hwmod_init();
-        omap2_mux_init();
         /* The OPP tables have to be registered before a clk init */
         omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
 
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index e82da680d908..14ee686b6492 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -44,9 +44,13 @@
 #define MMU_IRQ_EMUMISS         (1 << 2)
 #define MMU_IRQ_TRANSLATIONFAULT        (1 << 1)
 #define MMU_IRQ_TLBMISS         (1 << 0)
-#define MMU_IRQ_MASK    \
-        (MMU_IRQ_MULTIHITFAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_EMUMISS | \
-         MMU_IRQ_TRANSLATIONFAULT)
+
+#define __MMU_IRQ_FAULT         \
+        (MMU_IRQ_MULTIHITFAULT | MMU_IRQ_EMUMISS | MMU_IRQ_TRANSLATIONFAULT)
+#define MMU_IRQ_MASK            \
+        (__MMU_IRQ_FAULT | MMU_IRQ_TABLEWALKFAULT | MMU_IRQ_TLBMISS)
+#define MMU_IRQ_TWL_MASK        (__MMU_IRQ_FAULT | MMU_IRQ_TABLEWALKFAULT)
+#define MMU_IRQ_TLB_MISS_MASK   (__MMU_IRQ_FAULT | MMU_IRQ_TLBMISS)
 
 /* MMU_CNTL */
 #define MMU_CNTL_SHIFT          1
@@ -61,6 +65,26 @@
          ((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 :    \
          ((pgsz) == MMU_CAM_PGSZ_4K)  ? 0xfffff000 : 0)
 
+
+static void __iommu_set_twl(struct iommu *obj, bool on)
+{
+        u32 l = iommu_read_reg(obj, MMU_CNTL);
+
+        if (on)
+                iommu_write_reg(obj, MMU_IRQ_TWL_MASK, MMU_IRQENABLE);
+        else
+                iommu_write_reg(obj, MMU_IRQ_TLB_MISS_MASK, MMU_IRQENABLE);
+
+        l &= ~MMU_CNTL_MASK;
+        if (on)
+                l |= (MMU_CNTL_MMU_EN | MMU_CNTL_TWL_EN);
+        else
+                l |= (MMU_CNTL_MMU_EN);
+
+        iommu_write_reg(obj, l, MMU_CNTL);
+}
+
+
 static int omap2_iommu_enable(struct iommu *obj)
 {
         u32 l, pa;
@@ -96,13 +120,9 @@ static int omap2_iommu_enable(struct iommu *obj)
         l |= (MMU_SYS_IDLE_SMART | MMU_SYS_AUTOIDLE);
         iommu_write_reg(obj, l, MMU_SYSCONFIG);
 
-        iommu_write_reg(obj, MMU_IRQ_MASK, MMU_IRQENABLE);
         iommu_write_reg(obj, pa, MMU_TTB);
 
-        l = iommu_read_reg(obj, MMU_CNTL);
-        l &= ~MMU_CNTL_MASK;
-        l |= (MMU_CNTL_MMU_EN | MMU_CNTL_TWL_EN);
-        iommu_write_reg(obj, l, MMU_CNTL);
+        __iommu_set_twl(obj, true);
 
         return 0;
 }
@@ -118,6 +138,11 @@ static void omap2_iommu_disable(struct iommu *obj)
         dev_dbg(obj->dev, "%s is shutting down\n", obj->name);
 }
 
+static void omap2_iommu_set_twl(struct iommu *obj, bool on)
+{
+        __iommu_set_twl(obj, false);
+}
+
 static u32 omap2_iommu_fault_isr(struct iommu *obj, u32 *ra)
 {
         int i;
@@ -147,7 +172,7 @@ static u32 omap2_iommu_fault_isr(struct iommu *obj, u32 *ra)
         printk("\n");
 
         iommu_write_reg(obj, stat, MMU_IRQSTATUS);
-        omap2_iommu_disable(obj);
+
         return stat;
 }
 
@@ -300,6 +325,7 @@ static const struct iommu_functions omap2_iommu_ops = {
 
         .enable         = omap2_iommu_enable,
         .disable        = omap2_iommu_disable,
+        .set_twl        = omap2_iommu_set_twl,
         .fault_isr      = omap2_iommu_fault_isr,
 
         .tlb_read_cr    = omap2_tlb_read_cr,
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index c29337074ad3..87aa4c9597cc 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -20,17 +20,18 @@
 
 #include <mach/irqs.h>
 #include <plat/dma.h>
-#include <plat/mux.h>
 #include <plat/cpu.h>
 #include <plat/mcbsp.h>
 
+#include "mux.h"
+
 static void omap2_mcbsp2_mux_setup(void)
 {
-        omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
-        omap_cfg_reg(R14_24XX_MCBSP2_FSX);
-        omap_cfg_reg(W15_24XX_MCBSP2_DR);
-        omap_cfg_reg(V15_24XX_MCBSP2_DX);
-        omap_cfg_reg(V14_24XX_GPIO117);
+        omap_mux_init_signal("eac_ac_sclk.mcbsp2_clkx", OMAP_PULL_ENA);
+        omap_mux_init_signal("eac_ac_fs.mcbsp2_fsx", OMAP_PULL_ENA);
+        omap_mux_init_signal("eac_ac_din.mcbsp2_dr", OMAP_PULL_ENA);
+        omap_mux_init_signal("eac_ac_dout.mcbsp2_dx", OMAP_PULL_ENA);
+        omap_mux_init_gpio(117, OMAP_PULL_ENA);
         /*
          * TODO: Need to add MUX settings for OMAP 2430 SDP
          */
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 8b3d26935a39..ab403b2ed26b 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -37,12 +37,12 @@
 #include <asm/system.h>
 
 #include <plat/control.h>
-#include <plat/mux.h>
 
 #include "mux.h"
 
 #define OMAP_MUX_BASE_OFFSET            0x30    /* Offset from CTRL_BASE */
 #define OMAP_MUX_BASE_SZ                0x5ca
+#define MUXABLE_GPIO_MODE3              BIT(0)
 
 struct omap_mux_entry {
         struct omap_mux         mux;
@@ -51,6 +51,7 @@ struct omap_mux_entry {
 
 static unsigned long mux_phys;
 static void __iomem *mux_base;
+static u8 omap_mux_flags;
 
 u16 omap_mux_read(u16 reg)
 {
@@ -76,301 +77,6 @@ void omap_mux_write_array(struct omap_board_mux *board_mux)
         }
 }
 
-#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_OMAP_MUX)
-
-static struct omap_mux_cfg arch_mux_cfg;
-
-/* NOTE: See mux.h for the enumeration */
-
-static struct pin_config __initdata_or_module omap24xx_pins[] = {
-/*
- *      description                     mux     mux     pull    pull    debug
- *                                      offset  mode    ena     type
- */
-
-/* 24xx I2C */
-MUX_CFG_24XX("M19_24XX_I2C1_SCL",       0x111,  0,      0,      0,      1)
-MUX_CFG_24XX("L15_24XX_I2C1_SDA",       0x112,  0,      0,      0,      1)
-MUX_CFG_24XX("J15_24XX_I2C2_SCL",       0x113,  0,      0,      1,      1)
-MUX_CFG_24XX("H19_24XX_I2C2_SDA",       0x114,  0,      0,      0,      1)
-
-/* Menelaus interrupt */
-MUX_CFG_24XX("W19_24XX_SYS_NIRQ",       0x12c,  0,      1,      1,      1)
-
-/* 24xx clocks */
-MUX_CFG_24XX("W14_24XX_SYS_CLKOUT",     0x137,  0,      1,      1,      1)
-
-/* 24xx GPMC chipselects, wait pin monitoring */
-MUX_CFG_24XX("E2_GPMC_NCS2",            0x08e,  0,      1,      1,      1)
-MUX_CFG_24XX("L2_GPMC_NCS7",            0x093,  0,      1,      1,      1)
-MUX_CFG_24XX("L3_GPMC_WAIT0",           0x09a,  0,      1,      1,      1)
-MUX_CFG_24XX("N7_GPMC_WAIT1",           0x09b,  0,      1,      1,      1)
-MUX_CFG_24XX("M1_GPMC_WAIT2",           0x09c,  0,      1,      1,      1)
-MUX_CFG_24XX("P1_GPMC_WAIT3",           0x09d,  0,      1,      1,      1)
-
-/* 24xx McBSP */
-MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX",    0x124,  1,      1,      0,      1)
-MUX_CFG_24XX("R14_24XX_MCBSP2_FSX",     0x125,  1,      1,      0,      1)
-MUX_CFG_24XX("W15_24XX_MCBSP2_DR",      0x126,  1,      1,      0,      1)
-MUX_CFG_24XX("V15_24XX_MCBSP2_DX",      0x127,  1,      1,      0,      1)
-
-/* 24xx GPIO */
-MUX_CFG_24XX("M21_242X_GPIO11",         0x0c9,  3,      1,      1,      1)
-MUX_CFG_24XX("P21_242X_GPIO12",         0x0ca,  3,      0,      0,      1)
-MUX_CFG_24XX("AA10_242X_GPIO13",        0x0e5,  3,      0,      0,      1)
-MUX_CFG_24XX("AA6_242X_GPIO14",         0x0e6,  3,      0,      0,      1)
-MUX_CFG_24XX("AA4_242X_GPIO15",         0x0e7,  3,      0,      0,      1)
-MUX_CFG_24XX("Y11_242X_GPIO16",         0x0e8,  3,      0,      0,      1)
-MUX_CFG_24XX("AA12_242X_GPIO17",        0x0e9,  3,      0,      0,      1)
-MUX_CFG_24XX("AA8_242X_GPIO58",         0x0ea,  3,      0,      0,      1)
-MUX_CFG_24XX("Y20_24XX_GPIO60",         0x12c,  3,      0,      0,      1)
-MUX_CFG_24XX("W4__24XX_GPIO74",         0x0f2,  3,      0,      0,      1)
-MUX_CFG_24XX("N15_24XX_GPIO85",         0x103,  3,      0,      0,      1)
-MUX_CFG_24XX("M15_24XX_GPIO92",         0x10a,  3,      0,      0,      1)
-MUX_CFG_24XX("P20_24XX_GPIO93",         0x10b,  3,      0,      0,      1)
-MUX_CFG_24XX("P18_24XX_GPIO95",         0x10d,  3,      0,      0,      1)
-MUX_CFG_24XX("M18_24XX_GPIO96",         0x10e,  3,      0,      0,      1)
-MUX_CFG_24XX("L14_24XX_GPIO97",         0x10f,  3,      0,      0,      1)
-MUX_CFG_24XX("J15_24XX_GPIO99",         0x113,  3,      1,      1,      1)
-MUX_CFG_24XX("V14_24XX_GPIO117",        0x128,  3,      1,      0,      1)
-MUX_CFG_24XX("P14_24XX_GPIO125",        0x140,  3,      1,      1,      1)
-
-/* 242x DBG GPIO */
-MUX_CFG_24XX("V4_242X_GPIO49",          0xd3,   3,      0,      0,      1)
-MUX_CFG_24XX("W2_242X_GPIO50",          0xd4,   3,      0,      0,      1)
-MUX_CFG_24XX("U4_242X_GPIO51",          0xd5,   3,      0,      0,      1)
-MUX_CFG_24XX("V3_242X_GPIO52",          0xd6,   3,      0,      0,      1)
-MUX_CFG_24XX("V2_242X_GPIO53",          0xd7,   3,      0,      0,      1)
-MUX_CFG_24XX("V6_242X_GPIO53",          0xcf,   3,      0,      0,      1)
-MUX_CFG_24XX("T4_242X_GPIO54",          0xd8,   3,      0,      0,      1)
-MUX_CFG_24XX("Y4_242X_GPIO54",          0xd0,   3,      0,      0,      1)
-MUX_CFG_24XX("T3_242X_GPIO55",          0xd9,   3,      0,      0,      1)
-MUX_CFG_24XX("U2_242X_GPIO56",          0xda,   3,      0,      0,      1)
-
-/* 24xx external DMA requests */
-MUX_CFG_24XX("AA10_242X_DMAREQ0",       0x0e5,  2,      0,      0,      1)
-MUX_CFG_24XX("AA6_242X_DMAREQ1",        0x0e6,  2,      0,      0,      1)
-MUX_CFG_24XX("E4_242X_DMAREQ2",         0x074,  2,      0,      0,      1)
-MUX_CFG_24XX("G4_242X_DMAREQ3",         0x073,  2,      0,      0,      1)
-MUX_CFG_24XX("D3_242X_DMAREQ4",         0x072,  2,      0,      0,      1)
-MUX_CFG_24XX("E3_242X_DMAREQ5",         0x071,  2,      0,      0,      1)
-
-/* UART3 */
-MUX_CFG_24XX("K15_24XX_UART3_TX",       0x118,  0,      0,      0,      1)
-MUX_CFG_24XX("K14_24XX_UART3_RX",       0x119,  0,      0,      0,      1)
-
-/* MMC/SDIO */
-MUX_CFG_24XX("G19_24XX_MMC_CLKO",       0x0f3,  0,      0,      0,      1)
-MUX_CFG_24XX("H18_24XX_MMC_CMD",        0x0f4,  0,      0,      0,      1)
-MUX_CFG_24XX("F20_24XX_MMC_DAT0",       0x0f5,  0,      0,      0,      1)
-MUX_CFG_24XX("H14_24XX_MMC_DAT1",       0x0f6,  0,      0,      0,      1)
-MUX_CFG_24XX("E19_24XX_MMC_DAT2",       0x0f7,  0,      0,      0,      1)
-MUX_CFG_24XX("D19_24XX_MMC_DAT3",       0x0f8,  0,      0,      0,      1)
-MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0",   0x0f9,  0,      0,      0,      1)
-MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1",   0x0fa,  0,      0,      0,      1)
-MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2",   0x0fb,  0,      0,      0,      1)
-MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3",   0x0fc,  0,      0,      0,      1)
-MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR",    0x0fd,  0,      0,      0,      1)
-MUX_CFG_24XX("H15_24XX_MMC_CLKI",       0x0fe,  0,      0,      0,      1)
-
-/* Full speed USB */
-MUX_CFG_24XX("J20_24XX_USB0_PUEN",      0x11d,  0,      0,      0,      1)
-MUX_CFG_24XX("J19_24XX_USB0_VP",        0x11e,  0,      0,      0,      1)
-MUX_CFG_24XX("K20_24XX_USB0_VM",        0x11f,  0,      0,      0,      1)
-MUX_CFG_24XX("J18_24XX_USB0_RCV",       0x120,  0,      0,      0,      1)
-MUX_CFG_24XX("K19_24XX_USB0_TXEN",      0x121,  0,      0,      0,      1)
-MUX_CFG_24XX("J14_24XX_USB0_SE0",       0x122,  0,      0,      0,      1)
-MUX_CFG_24XX("K18_24XX_USB0_DAT",       0x123,  0,      0,      0,      1)
-
-MUX_CFG_24XX("N14_24XX_USB1_SE0",       0x0ed,  2,      0,      0,      1)
-MUX_CFG_24XX("W12_24XX_USB1_SE0",       0x0dd,  3,      0,      0,      1)
-MUX_CFG_24XX("P15_24XX_USB1_DAT",       0x0ee,  2,      0,      0,      1)
-MUX_CFG_24XX("R13_24XX_USB1_DAT",       0x0e0,  3,      0,      0,      1)
-MUX_CFG_24XX("W20_24XX_USB1_TXEN",      0x0ec,  2,      0,      0,      1)
-MUX_CFG_24XX("P13_24XX_USB1_TXEN",      0x0df,  3,      0,      0,      1)
-MUX_CFG_24XX("V19_24XX_USB1_RCV",       0x0eb,  2,      0,      0,      1)
-MUX_CFG_24XX("V12_24XX_USB1_RCV",       0x0de,  3,      0,      0,      1)
-
-MUX_CFG_24XX("AA10_24XX_USB2_SE0",      0x0e5,  2,      0,      0,      1)
-MUX_CFG_24XX("Y11_24XX_USB2_DAT",       0x0e8,  2,      0,      0,      1)
-MUX_CFG_24XX("AA12_24XX_USB2_TXEN",     0x0e9,  2,      0,      0,      1)
-MUX_CFG_24XX("AA6_24XX_USB2_RCV",       0x0e6,  2,      0,      0,      1)
-MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0",    0x0e7,  2,      0,      0,      1)
-
-/* Keypad GPIO*/
-MUX_CFG_24XX("T19_24XX_KBR0",           0x106,  3,      1,      1,      1)
-MUX_CFG_24XX("R19_24XX_KBR1",           0x107,  3,      1,      1,      1)
-MUX_CFG_24XX("V18_24XX_KBR2",           0x139,  3,      1,      1,      1)
-MUX_CFG_24XX("M21_24XX_KBR3",           0xc9,   3,      1,      1,      1)
-MUX_CFG_24XX("E5__24XX_KBR4",           0x138,  3,      1,      1,      1)
-MUX_CFG_24XX("M18_24XX_KBR5",           0x10e,  3,      1,      1,      1)
-MUX_CFG_24XX("R20_24XX_KBC0",           0x108,  3,      0,      0,      1)
-MUX_CFG_24XX("M14_24XX_KBC1",           0x109,  3,      0,      0,      1)
-MUX_CFG_24XX("H19_24XX_KBC2",           0x114,  3,      0,      0,      1)
-MUX_CFG_24XX("V17_24XX_KBC3",           0x135,  3,      0,      0,      1)
-MUX_CFG_24XX("P21_24XX_KBC4",           0xca,   3,      0,      0,      1)
-MUX_CFG_24XX("L14_24XX_KBC5",           0x10f,  3,      0,      0,      1)
-MUX_CFG_24XX("N19_24XX_KBC6",           0x110,  3,      0,      0,      1)
-
-/* 24xx Menelaus Keypad GPIO */
-MUX_CFG_24XX("B3__24XX_KBR5",           0x30,   3,      1,      1,      1)
-MUX_CFG_24XX("AA4_24XX_KBC2",           0xe7,   3,      0,      0,      1)
-MUX_CFG_24XX("B13_24XX_KBC6",           0x110,  3,      0,      0,      1)
-
-/* 2430 USB */
-MUX_CFG_24XX("AD9_2430_USB0_PUEN",      0x133,  4,      0,      0,      1)
-MUX_CFG_24XX("Y11_2430_USB0_VP",        0x134,  4,      0,      0,      1)
-MUX_CFG_24XX("AD7_2430_USB0_VM",        0x135,  4,      0,      0,      1)
-MUX_CFG_24XX("AE7_2430_USB0_RCV",       0x136,  4,      0,      0,      1)
-MUX_CFG_24XX("AD4_2430_USB0_TXEN",      0x137,  4,      0,      0,      1)
-MUX_CFG_24XX("AF9_2430_USB0_SE0",       0x138,  4,      0,      0,      1)
-MUX_CFG_24XX("AE6_2430_USB0_DAT",       0x139,  4,      0,      0,      1)
-MUX_CFG_24XX("AD24_2430_USB1_SE0",      0x107,  2,      0,      0,      1)
-MUX_CFG_24XX("AB24_2430_USB1_RCV",      0x108,  2,      0,      0,      1)
-MUX_CFG_24XX("Y25_2430_USB1_TXEN",      0x109,  2,      0,      0,      1)
-MUX_CFG_24XX("AA26_2430_USB1_DAT",      0x10A,  2,      0,      0,      1)
-
-/* 2430 HS-USB */
-MUX_CFG_24XX("AD9_2430_USB0HS_DATA3",   0x133,  0,      0,      0,      1)
-MUX_CFG_24XX("Y11_2430_USB0HS_DATA4",   0x134,  0,      0,      0,      1)
-MUX_CFG_24XX("AD7_2430_USB0HS_DATA5",   0x135,  0,      0,      0,      1)
-MUX_CFG_24XX("AE7_2430_USB0HS_DATA6",   0x136,  0,      0,      0,      1)
-MUX_CFG_24XX("AD4_2430_USB0HS_DATA2",   0x137,  0,      0,      0,      1)
-MUX_CFG_24XX("AF9_2430_USB0HS_DATA0",   0x138,  0,      0,      0,      1)
-MUX_CFG_24XX("AE6_2430_USB0HS_DATA1",   0x139,  0,      0,      0,      1)
-MUX_CFG_24XX("AE8_2430_USB0HS_CLK",     0x13A,  0,      0,      0,      1)
-MUX_CFG_24XX("AD8_2430_USB0HS_DIR",     0x13B,  0,      0,      0,      1)
-MUX_CFG_24XX("AE5_2430_USB0HS_STP",     0x13c,  0,      1,      1,      1)
-MUX_CFG_24XX("AE9_2430_USB0HS_NXT",     0x13D,  0,      0,      0,      1)
-MUX_CFG_24XX("AC7_2430_USB0HS_DATA7",   0x13E,  0,      0,      0,      1)
-
-/* 2430 McBSP */
-MUX_CFG_24XX("AD6_2430_MCBSP_CLKS",     0x011E, 0,      0,      0,      1)
-
-MUX_CFG_24XX("AB2_2430_MCBSP1_CLKR",    0x011A, 0,      0,      0,      1)
-MUX_CFG_24XX("AD5_2430_MCBSP1_FSR",     0x011B, 0,      0,      0,      1)
-MUX_CFG_24XX("AA1_2430_MCBSP1_DX",      0x011C, 0,      0,      0,      1)
-MUX_CFG_24XX("AF3_2430_MCBSP1_DR",      0x011D, 0,      0,      0,      1)
-MUX_CFG_24XX("AB3_2430_MCBSP1_FSX",     0x011F, 0,      0,      0,      1)
-MUX_CFG_24XX("Y9_2430_MCBSP1_CLKX",     0x0120, 0,      0,      0,      1)
-
-MUX_CFG_24XX("AC10_2430_MCBSP2_FSX",    0x012E, 1,      0,      0,      1)
-MUX_CFG_24XX("AD16_2430_MCBSP2_CLX",    0x012F, 1,      0,      0,      1)
-MUX_CFG_24XX("AE13_2430_MCBSP2_DX",     0x0130, 1,      0,      0,      1)
-MUX_CFG_24XX("AD13_2430_MCBSP2_DR",     0x0131, 1,      0,      0,      1)
-MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0,      0,      0,      1)
-MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0,      0,      0,      1)
-MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0,      0,      0,      1)
-MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0,      0,      0,      1)
-
-MUX_CFG_24XX("AC9_2430_MCBSP3_CLKX",    0x0103, 0,      0,      0,      1)
-MUX_CFG_24XX("AE4_2430_MCBSP3_FSX",     0x0104, 0,      0,      0,      1)
-MUX_CFG_24XX("AE2_2430_MCBSP3_DR",      0x0105, 0,      0,      0,      1)
-MUX_CFG_24XX("AF4_2430_MCBSP3_DX",      0x0106, 0,      0,      0,      1)
-
-MUX_CFG_24XX("N3_2430_MCBSP4_CLKX",     0x010B, 1,      0,      0,      1)
-MUX_CFG_24XX("AD23_2430_MCBSP4_DR",     0x010C, 1,      0,      0,      1)
-MUX_CFG_24XX("AB25_2430_MCBSP4_DX",     0x010D, 1,      0,      0,      1)
-MUX_CFG_24XX("AC25_2430_MCBSP4_FSX",    0x010E, 1,      0,      0,      1)
-
-MUX_CFG_24XX("AE16_2430_MCBSP5_CLKX",   0x00ED, 1,      0,      0,      1)
-MUX_CFG_24XX("AF12_2430_MCBSP5_FSX",    0x00ED, 1,      0,      0,      1)
-MUX_CFG_24XX("K7_2430_MCBSP5_DX",       0x00EF, 1,      0,      0,      1)
-MUX_CFG_24XX("M1_2430_MCBSP5_DR",       0x00F0, 1,      0,      0,      1)
-
-/* 2430 MCSPI1 */
-MUX_CFG_24XX("Y18_2430_MCSPI1_CLK",     0x010F, 0,      0,      0,      1)
-MUX_CFG_24XX("AD15_2430_MCSPI1_SIMO",   0x0110, 0,      0,      0,      1)
-MUX_CFG_24XX("AE17_2430_MCSPI1_SOMI",   0x0111, 0,      0,      0,      1)
-MUX_CFG_24XX("U1_2430_MCSPI1_CS0",      0x0112, 0,      0,      0,      1)
-
-/* Touchscreen GPIO */
-MUX_CFG_24XX("AF19_2430_GPIO_85",       0x0113, 3,      0,      0,      1)
-
-};
-
-#define OMAP24XX_PINS_SZ        ARRAY_SIZE(omap24xx_pins)
-
-#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
-
-static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg)
-{
-        u16 orig;
-        u8 warn = 0, debug = 0;
-
-        orig = omap_mux_read(cfg->mux_reg - OMAP_MUX_BASE_OFFSET);
-
-#ifdef  CONFIG_OMAP_MUX_DEBUG
-        debug = cfg->debug;
-#endif
-        warn = (orig != reg);
-        if (debug || warn)
-                printk(KERN_WARNING
-                        "MUX: setup %s (0x%p): 0x%04x -> 0x%04x\n",
-                        cfg->name, omap_ctrl_base_get() + cfg->mux_reg,
-                        orig, reg);
-}
-#else
-#define omap2_cfg_debug(x, y)   do {} while (0)
-#endif
-
-static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
-{
-        static DEFINE_SPINLOCK(mux_spin_lock);
-        unsigned long flags;
-        u8 reg = 0;
-
-        spin_lock_irqsave(&mux_spin_lock, flags);
-        reg |= cfg->mask & 0x7;
-        if (cfg->pull_val)
-                reg |= OMAP2_PULL_ENA;
-        if (cfg->pu_pd_val)
-                reg |= OMAP2_PULL_UP;
-        omap2_cfg_debug(cfg, reg);
-        omap_mux_write(reg, cfg->mux_reg - OMAP_MUX_BASE_OFFSET);
-        spin_unlock_irqrestore(&mux_spin_lock, flags);
-
-        return 0;
-}
-
-int __init omap2_mux_init(void)
-{
-        u32 mux_pbase;
-
-        if (cpu_is_omap2420())
-                mux_pbase = OMAP2420_CTRL_BASE + OMAP_MUX_BASE_OFFSET;
-        else if (cpu_is_omap2430())
-                mux_pbase = OMAP243X_CTRL_BASE + OMAP_MUX_BASE_OFFSET;
-        else
-                return -ENODEV;
-
-        mux_base = ioremap(mux_pbase, OMAP_MUX_BASE_SZ);
-        if (!mux_base) {
-                printk(KERN_ERR "mux: Could not ioremap\n");
-                return -ENODEV;
-        }
-
-        if (cpu_is_omap24xx()) {
-                arch_mux_cfg.pins       = omap24xx_pins;
-                arch_mux_cfg.size       = OMAP24XX_PINS_SZ;
-                arch_mux_cfg.cfg_reg    = omap24xx_cfg_reg;
-
-                return omap_mux_register(&arch_mux_cfg);
-        }
-
-        return 0;
-}
-
-#else
-int __init omap2_mux_init(void)
-{
-        return 0;
-}
-#endif  /* CONFIG_OMAP_MUX */
-
-/*----------------------------------------------------------------------------*/
-
-#ifdef CONFIG_ARCH_OMAP3
 static LIST_HEAD(muxmodes);
 static DEFINE_MUTEX(muxmode_mutex);
 
@@ -381,6 +87,9 @@ static char *omap_mux_options;
 int __init omap_mux_init_gpio(int gpio, int val)
 {
         struct omap_mux_entry *e;
+        struct omap_mux *gpio_mux;
+        u16 old_mode;
+        u16 mux_mode;
         int found = 0;
 
         if (!gpio)
@@ -389,31 +98,33 @@ int __init omap_mux_init_gpio(int gpio, int val)
         list_for_each_entry(e, &muxmodes, node) {
                 struct omap_mux *m = &e->mux;
                 if (gpio == m->gpio) {
-                        u16 old_mode;
-                        u16 mux_mode;
-
-                        old_mode = omap_mux_read(m->reg_offset);
-                        mux_mode = val & ~(OMAP_MUX_NR_MODES - 1);
-                        mux_mode |= OMAP_MUX_MODE4;
-                        printk(KERN_DEBUG "mux: Setting signal "
-                                "%s.gpio%i 0x%04x -> 0x%04x\n",
-                                m->muxnames[0], gpio, old_mode, mux_mode);
-                        omap_mux_write(mux_mode, m->reg_offset);
+                        gpio_mux = m;
                         found++;
                 }
         }
 
-        if (found == 1)
-                return 0;
+        if (found == 0) {
+                printk(KERN_ERR "mux: Could not set gpio%i\n", gpio);
+                return -ENODEV;
+        }
 
         if (found > 1) {
-                printk(KERN_ERR "mux: Multiple gpio paths for gpio%i\n", gpio);
+                printk(KERN_INFO "mux: Multiple gpio paths (%d) for gpio%i\n",
+                                found, gpio);
                 return -EINVAL;
         }
 
-        printk(KERN_ERR "mux: Could not set gpio%i\n", gpio);
+        old_mode = omap_mux_read(gpio_mux->reg_offset);
+        mux_mode = val & ~(OMAP_MUX_NR_MODES - 1);
+        if (omap_mux_flags & MUXABLE_GPIO_MODE3)
+                mux_mode |= OMAP_MUX_MODE3;
+        else
+                mux_mode |= OMAP_MUX_MODE4;
+        printk(KERN_DEBUG "mux: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n",
+                        gpio_mux->muxnames[0], gpio, old_mode, mux_mode);
+        omap_mux_write(mux_mode, gpio_mux->reg_offset);
 
-        return -ENODEV;
+        return 0;
 }
 
 int __init omap_mux_init_signal(char *muxname, int val)
@@ -1032,6 +743,9 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
                 return -ENODEV;
         }
 
+        if (cpu_is_omap24xx())
+                omap_mux_flags = MUXABLE_GPIO_MODE3;
+
         omap_mux_init_package(superset, package_subset, package_balls);
         omap_mux_init_list(superset);
         omap_mux_init_signals(board_mux);
@@ -1039,5 +753,3 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
         return 0;
 }
 
-#endif  /* CONFIG_ARCH_OMAP3 */
-
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 480abc56e605..a8e040c2c7e9 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -7,6 +7,8 @@
  * published by the Free Software Foundation.
  */
 
+#include "mux2420.h"
+#include "mux2430.h"
 #include "mux34xx.h"
 
 #define OMAP_MUX_TERMINATOR     0xffff
@@ -56,10 +58,12 @@
 
 /* Flags for omap_mux_init */
 #define OMAP_PACKAGE_MASK               0xffff
-#define OMAP_PACKAGE_CBP                4               /* 515-pin 0.40 0.50 */
-#define OMAP_PACKAGE_CUS                3               /* 423-pin 0.65 */
-#define OMAP_PACKAGE_CBB                2               /* 515-pin 0.40 0.50 */
-#define OMAP_PACKAGE_CBC                1               /* 515-pin 0.50 0.65 */
+#define OMAP_PACKAGE_CBP                6               /* 515-pin 0.40 0.50 */
+#define OMAP_PACKAGE_CUS                5               /* 423-pin 0.65 */
+#define OMAP_PACKAGE_CBB                4               /* 515-pin 0.40 0.50 */
+#define OMAP_PACKAGE_CBC                3               /* 515-pin 0.50 0.65 */
+#define OMAP_PACKAGE_ZAC                2               /* 24xx 447-pin POP */
+#define OMAP_PACKAGE_ZAF                1               /* 2420 447-pin SIP */
 
 
 #define OMAP_MUX_NR_MODES       8                       /* Available modes */
@@ -102,7 +106,7 @@ struct omap_board_mux {
         u16     value;
 };
 
-#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_OMAP_MUX)
 
 /**
  * omap_mux_init_gpio - initialize a signal based on the GPIO number
@@ -171,6 +175,20 @@ void omap_mux_write(u16 val, u16 mux_offset);
 void omap_mux_write_array(struct omap_board_mux *board_mux);
 
 /**
+ * omap2420_mux_init() - initialize mux system with board specific set
+ * @board_mux:          Board specific mux table
+ * @flags:              OMAP package type used for the board
+ */
+int omap2420_mux_init(struct omap_board_mux *board_mux, int flags);
+
+/**
+ * omap2430_mux_init() - initialize mux system with board specific set
+ * @board_mux:          Board specific mux table
+ * @flags:              OMAP package type used for the board
+ */
+int omap2430_mux_init(struct omap_board_mux *board_mux, int flags);
+
+/**
  * omap3_mux_init() - initialize mux system with board specific set
  * @board_mux:          Board specific mux table
  * @flags:              OMAP package type used for the board
diff --git a/arch/arm/mach-omap2/mux2420.c b/arch/arm/mach-omap2/mux2420.c
new file mode 100644
index 000000000000..fdb04a7eb8aa
--- /dev/null
+++ b/arch/arm/mach-omap2/mux2420.c
@@ -0,0 +1,688 @@
+/*
+ * Copyright (C) 2010 Nokia
+ * Copyright (C) 2010 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+
+#include "mux.h"
+
+#ifdef CONFIG_OMAP_MUX
+
+#define _OMAP2420_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7)               \
+{                                                                       \
+        .reg_offset     = (OMAP2420_CONTROL_PADCONF_##M0##_OFFSET),     \
+        .gpio           = (g),                                          \
+        .muxnames       = { m0, m1, m2, m3, m4, m5, m6, m7 },           \
+}
+
+#else
+
+#define _OMAP2420_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7)               \
+{                                                                       \
+        .reg_offset     = (OMAP2420_CONTROL_PADCONF_##M0##_OFFSET),     \
+        .gpio           = (g),                                          \
+}
+
+#endif
+
+#define _OMAP2420_BALLENTRY(M0, bb, bt)                                 \
+{                                                                       \
+        .reg_offset     = (OMAP2420_CONTROL_PADCONF_##M0##_OFFSET),     \
+        .balls          = { bb, bt },                                   \
+}
+
+/*
+ * Superset of all mux modes for omap2420
+ */
+static struct omap_mux __initdata omap2420_muxmodes[] = {
+        _OMAP2420_MUXENTRY(CAM_D0, 54,
+                "cam_d0", "hw_dbg2", "sti_dout", "gpio_54",
+                NULL, NULL, "etk_d2", NULL),
+        _OMAP2420_MUXENTRY(CAM_D1, 53,
+                "cam_d1", "hw_dbg3", "sti_din", "gpio_53",
+                NULL, NULL, "etk_d3", NULL),
+        _OMAP2420_MUXENTRY(CAM_D2, 52,
+                "cam_d2", "hw_dbg4", "mcbsp1_clkx", "gpio_52",
+                NULL, NULL, "etk_d4", NULL),
+        _OMAP2420_MUXENTRY(CAM_D3, 51,
+                "cam_d3", "hw_dbg5", "mcbsp1_dr", "gpio_51",
+                NULL, NULL, "etk_d5", NULL),
+        _OMAP2420_MUXENTRY(CAM_D4, 50,
+                "cam_d4", "hw_dbg6", "mcbsp1_fsr", "gpio_50",
+                NULL, NULL, "etk_d6", NULL),
+        _OMAP2420_MUXENTRY(CAM_D5, 49,
+                "cam_d5", "hw_dbg7", "mcbsp1_clkr", "gpio_49",
+                NULL, NULL, "etk_d7", NULL),
+        _OMAP2420_MUXENTRY(CAM_D6, 0,
+                "cam_d6", "hw_dbg8", NULL, NULL,
+                NULL, NULL, "etk_d8", NULL),
+        _OMAP2420_MUXENTRY(CAM_D7, 0,
+                "cam_d7", "hw_dbg9", NULL, NULL,
+                NULL, NULL, "etk_d9", NULL),
+        _OMAP2420_MUXENTRY(CAM_D8, 54,
+                "cam_d8", "hw_dbg10", NULL, "gpio_54",
+                NULL, NULL, "etk_d10", NULL),
+        _OMAP2420_MUXENTRY(CAM_D9, 53,
+                "cam_d9", "hw_dbg11", NULL, "gpio_53",
+                NULL, NULL, "etk_d11", NULL),
+        _OMAP2420_MUXENTRY(CAM_HS, 55,
+                "cam_hs", "hw_dbg1", "mcbsp1_dx", "gpio_55",
+                NULL, NULL, "etk_d1", NULL),
+        _OMAP2420_MUXENTRY(CAM_LCLK, 57,
+                "cam_lclk", NULL, "mcbsp_clks", "gpio_57",
+                NULL, NULL, "etk_c1", NULL),
+        _OMAP2420_MUXENTRY(CAM_VS, 56,
+                "cam_vs", "hw_dbg0", "mcbsp1_fsx", "gpio_56",
+                NULL, NULL, "etk_d0", NULL),
+        _OMAP2420_MUXENTRY(CAM_XCLK, 0,
+                "cam_xclk", NULL, "sti_clk", NULL,
+                NULL, NULL, "etk_c2", NULL),
+        _OMAP2420_MUXENTRY(DSS_ACBIAS, 48,
+                "dss_acbias", NULL, "mcbsp2_fsx", "gpio_48",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(DSS_DATA10, 40,
+                "dss_data10", NULL, NULL, "gpio_40",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(DSS_DATA11, 41,
+                "dss_data11", NULL, NULL, "gpio_41",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(DSS_DATA12, 42,
+                "dss_data12", NULL, NULL, "gpio_42",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(DSS_DATA13, 43,
+                "dss_data13", NULL, NULL, "gpio_43",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(DSS_DATA14, 44,
+                "dss_data14", NULL, NULL, "gpio_44",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(DSS_DATA15, 45,
+                "dss_data15", NULL, NULL, "gpio_45",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(DSS_DATA16, 46,
+                "dss_data16", NULL, NULL, "gpio_46",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(DSS_DATA17, 47,
+                "dss_data17", NULL, NULL, "gpio_47",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(DSS_DATA8, 38,
+                "dss_data8", NULL, NULL, "gpio_38",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(DSS_DATA9, 39,
+                "dss_data9", NULL, NULL, "gpio_39",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(EAC_AC_DIN, 115,
+                "eac_ac_din", "mcbsp2_dr", NULL, "gpio_115",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(EAC_AC_DOUT, 116,
+                "eac_ac_dout", "mcbsp2_dx", NULL, "gpio_116",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(EAC_AC_FS, 114,
+                "eac_ac_fs", "mcbsp2_fsx", NULL, "gpio_114",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(EAC_AC_MCLK, 117,
+                "eac_ac_mclk", NULL, NULL, "gpio_117",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(EAC_AC_RST, 118,
+                "eac_ac_rst", "eac_bt_din", NULL, "gpio_118",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(EAC_AC_SCLK, 113,
+                "eac_ac_sclk", "mcbsp2_clkx", NULL, "gpio_113",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(EAC_BT_DIN, 73,
+                "eac_bt_din", NULL, NULL, "gpio_73",
+                NULL, NULL, "etk_d9", NULL),
+        _OMAP2420_MUXENTRY(EAC_BT_DOUT, 74,
+                "eac_bt_dout", NULL, "sti_clk", "gpio_74",
+                NULL, NULL, "etk_d8", NULL),
+        _OMAP2420_MUXENTRY(EAC_BT_FS, 72,
+                "eac_bt_fs", NULL, NULL, "gpio_72",
+                NULL, NULL, "etk_d10", NULL),
+        _OMAP2420_MUXENTRY(EAC_BT_SCLK, 71,
+                "eac_bt_sclk", NULL, NULL, "gpio_71",
+                NULL, NULL, "etk_d11", NULL),
+        _OMAP2420_MUXENTRY(GPIO_119, 119,
+                "gpio_119", NULL, "sti_din", "gpio_119",
+                NULL, "sys_boot0", "etk_d12", NULL),
+        _OMAP2420_MUXENTRY(GPIO_120, 120,
+                "gpio_120", NULL, "sti_dout", "gpio_120",
+                "cam_d9", "sys_boot1", "etk_d13", NULL),
+        _OMAP2420_MUXENTRY(GPIO_121, 121,
+                "gpio_121", NULL, NULL, "gpio_121",
+                "jtag_emu2", "sys_boot2", "etk_d14", NULL),
+        _OMAP2420_MUXENTRY(GPIO_122, 122,
+                "gpio_122", NULL, NULL, "gpio_122",
+                "jtag_emu3", "sys_boot3", "etk_d15", NULL),
+        _OMAP2420_MUXENTRY(GPIO_124, 124,
+                "gpio_124", NULL, NULL, "gpio_124",
+                NULL, "sys_boot5", NULL, NULL),
+        _OMAP2420_MUXENTRY(GPIO_125, 125,
+                "gpio_125", "sys_jtagsel1", "sys_jtagsel2", "gpio_125",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPIO_36, 36,
+                "gpio_36", NULL, NULL, "gpio_36",
+                NULL, "sys_boot4", NULL, NULL),
+        _OMAP2420_MUXENTRY(GPIO_62, 62,
+                "gpio_62", "uart1_rx", "usb1_dat", "gpio_62",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPIO_6, 6,
+                "gpio_6", "tv_detpulse", NULL, "gpio_6",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_A10, 3,
+                "gpmc_a10", NULL, "sys_ndmareq5", "gpio_3",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_A1, 12,
+                "gpmc_a1", "dss_data18", NULL, "gpio_12",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_A2, 11,
+                "gpmc_a2", "dss_data19", NULL, "gpio_11",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_A3, 10,
+                "gpmc_a3", "dss_data20", NULL, "gpio_10",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_A4, 9,
+                "gpmc_a4", "dss_data21", NULL, "gpio_9",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_A5, 8,
+                "gpmc_a5", "dss_data22", NULL, "gpio_8",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_A6, 7,
+                "gpmc_a6", "dss_data23", NULL, "gpio_7",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_A7, 6,
+                "gpmc_a7", NULL, "sys_ndmareq2", "gpio_6",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_A8, 5,
+                "gpmc_a8", NULL, "sys_ndmareq3", "gpio_5",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_A9, 4,
+                "gpmc_a9", NULL, "sys_ndmareq4", "gpio_4",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_CLK, 21,
+                "gpmc_clk", NULL, NULL, "gpio_21",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_D10, 18,
+                "gpmc_d10", "ssi2_rdy_rx", NULL, "gpio_18",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_D11, 17,
+                "gpmc_d11", "ssi2_flag_rx", NULL, "gpio_17",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_D12, 16,
+                "gpmc_d12", "ssi2_dat_rx", NULL, "gpio_16",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_D13, 15,
+                "gpmc_d13", "ssi2_rdy_tx", NULL, "gpio_15",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_D14, 14,
+                "gpmc_d14", "ssi2_flag_tx", NULL, "gpio_14",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_D15, 13,
+                "gpmc_d15", "ssi2_dat_tx", NULL, "gpio_13",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_D8, 20,
+                "gpmc_d8", NULL, NULL, "gpio_20",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_D9, 19,
+                "gpmc_d9", "ssi2_wake", NULL, "gpio_19",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_NBE0, 29,
+                "gpmc_nbe0", NULL, NULL, "gpio_29",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_NBE1, 30,
+                "gpmc_nbe1", NULL, NULL, "gpio_30",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_NCS1, 22,
+                "gpmc_ncs1", NULL, NULL, "gpio_22",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_NCS2, 23,
+                "gpmc_ncs2", NULL, NULL, "gpio_23",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_NCS3, 24,
+                "gpmc_ncs3", "gpmc_io_dir", NULL, "gpio_24",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_NCS4, 25,
+                "gpmc_ncs4", NULL, NULL, "gpio_25",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_NCS5, 26,
+                "gpmc_ncs5", NULL, NULL, "gpio_26",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_NCS6, 27,
+                "gpmc_ncs6", NULL, NULL, "gpio_27",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_NCS7, 28,
+                "gpmc_ncs7", "gpmc_io_dir", "gpio_28", NULL,
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_NWP, 31,
+                "gpmc_nwp", NULL, NULL, "gpio_31",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_WAIT1, 33,
+                "gpmc_wait1", NULL, NULL, "gpio_33",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_WAIT2, 34,
+                "gpmc_wait2", NULL, NULL, "gpio_34",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(GPMC_WAIT3, 35,
+                "gpmc_wait3", NULL, NULL, "gpio_35",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(HDQ_SIO, 101,
+                "hdq_sio", "usb2_tllse0", "sys_altclk", "gpio_101",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(I2C2_SCL, 99,
+                "i2c2_scl", NULL, "gpt9_pwm_evt", "gpio_99",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(I2C2_SDA, 100,
+                "i2c2_sda", NULL, "spi2_ncs1", "gpio_100",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(JTAG_EMU0, 127,
+                "jtag_emu0", NULL, NULL, "gpio_127",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(JTAG_EMU1, 126,
+                "jtag_emu1", NULL, NULL, "gpio_126",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MCBSP1_CLKR, 92,
+                "mcbsp1_clkr", "ssi2_dat_tx", "vlynq_tx1", "gpio_92",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MCBSP1_CLKX, 98,
+                "mcbsp1_clkx", "ssi2_wake", "vlynq_nla", "gpio_98",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MCBSP1_DR, 95,
+                "mcbsp1_dr", "ssi2_dat_rx", "vlynq_rx1", "gpio_95",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MCBSP1_DX, 94,
+                "mcbsp1_dx", "ssi2_rdy_tx", "vlynq_clk", "gpio_94",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MCBSP1_FSR, 93,
+                "mcbsp1_fsr", "ssi2_flag_tx", "vlynq_tx0", "gpio_93",
+                "spi2_ncs1", NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MCBSP1_FSX, 97,
+                "mcbsp1_fsx", "ssi2_rdy_rx", NULL, "gpio_97",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MCBSP2_CLKX, 12,
+                "mcbsp2_clkx", NULL, "dss_data23", "gpio_12",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MCBSP2_DR, 11,
+                "mcbsp2_dr", NULL, "dss_data22", "gpio_11",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MCBSP_CLKS, 96,
+                "mcbsp_clks", "ssi2_flag_rx", "vlynq_rx0", "gpio_96",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_CLKI, 59,
+                "sdmmc_clki", "ms_clki", NULL, "gpio_59",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_CLKO, 0,
+                "sdmmc_clko", "ms_clko", NULL, NULL,
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_CMD_DIR, 8,
+                "sdmmc_cmd_dir", NULL, NULL, "gpio_8",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_CMD, 0,
+                "sdmmc_cmd", "ms_bs", NULL, NULL,
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_DAT_DIR0, 7,
+                "sdmmc_dat_dir0", "ms_dat0_dir", NULL, "gpio_7",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_DAT0, 0,
+                "sdmmc_dat0", "ms_dat0", NULL, NULL,
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_DAT_DIR1, 78,
+                "sdmmc_dat_dir1", "ms_datu_dir", "uart2_rts", "gpio_78",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_DAT1, 75,
+                "sdmmc_dat1", "ms_dat1", NULL, "gpio_75",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_DAT_DIR2, 79,
+                "sdmmc_dat_dir2", "ms_datu_dir", "uart2_tx", "gpio_79",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_DAT2, 76,
+                "sdmmc_dat2", "ms_dat2", "uart2_cts", "gpio_76",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_DAT_DIR3, 80,
+                "sdmmc_dat_dir3", "ms_datu_dir", "uart2_rx", "gpio_80",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(MMC_DAT3, 77,
+                "sdmmc_dat3", "ms_dat3", NULL, "gpio_77",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SDRC_A12, 2,
+                "sdrc_a12", NULL, NULL, "gpio_2",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SDRC_A13, 1,
+                "sdrc_a13", NULL, NULL, "gpio_1",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SDRC_A14, 0,
+                "sdrc_a14", NULL, NULL, "gpio_0",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SDRC_CKE1, 38,
+                "sdrc_cke1", NULL, NULL, "gpio_38",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SDRC_NCS1, 37,
+                "sdrc_ncs1", NULL, NULL, "gpio_37",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI1_CLK, 81,
+                "spi1_clk", NULL, NULL, "gpio_81",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI1_NCS0, 84,
+                "spi1_ncs0", NULL, NULL, "gpio_84",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI1_NCS1, 85,
+                "spi1_ncs1", NULL, NULL, "gpio_85",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI1_NCS2, 86,
+                "spi1_ncs2", NULL, NULL, "gpio_86",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI1_NCS3, 87,
+                "spi1_ncs3", NULL, NULL, "gpio_87",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI1_SIMO, 82,
+                "spi1_simo", NULL, NULL, "gpio_82",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI1_SOMI, 83,
+                "spi1_somi", NULL, NULL, "gpio_83",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI2_CLK, 88,
+                "spi2_clk", NULL, NULL, "gpio_88",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI2_NCS0, 91,
+                "spi2_ncs0", "gpt12_pwm_evt", NULL, "gpio_91",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI2_SIMO, 89,
+                "spi2_simo", "gpt10_pwm_evt", NULL, "gpio_89",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SPI2_SOMI, 90,
+                "spi2_somi", "gpt11_pwm_evt", NULL, "gpio_90",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SSI1_DAT_RX, 63,
+                "ssi1_dat_rx", "eac_md_sclk", NULL, "gpio_63",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SSI1_DAT_TX, 59,
+                "ssi1_dat_tx", "uart1_tx", "usb1_se0", "gpio_59",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SSI1_FLAG_RX, 64,
+                "ssi1_flag_rx", "eac_md_din", NULL, "gpio_64",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SSI1_FLAG_TX, 25,
+                "ssi1_flag_tx", "uart1_rts", "usb1_rcv", "gpio_25",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SSI1_RDY_RX, 65,
+                "ssi1_rdy_rx", "eac_md_dout", NULL, "gpio_65",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SSI1_RDY_TX, 61,
+                "ssi1_rdy_tx", "uart1_cts", "usb1_txen", "gpio_61",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SSI1_WAKE, 66,
+                "ssi1_wake", "eac_md_fs", NULL, "gpio_66",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SYS_CLKOUT, 123,
+                "sys_clkout", NULL, NULL, "gpio_123",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SYS_CLKREQ, 52,
+                "sys_clkreq", NULL, NULL, "gpio_52",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(SYS_NIRQ, 60,
+                "sys_nirq", NULL, NULL, "gpio_60",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART1_CTS, 32,
+                "uart1_cts", NULL, "dss_data18", "gpio_32",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART1_RTS, 8,
+                "uart1_rts", NULL, "dss_data19", "gpio_8",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART1_RX, 10,
+                "uart1_rx", NULL, "dss_data21", "gpio_10",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART1_TX, 9,
+                "uart1_tx", NULL, "dss_data20", "gpio_9",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART2_CTS, 67,
+                "uart2_cts", "usb1_rcv", "gpt9_pwm_evt", "gpio_67",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART2_RTS, 68,
+                "uart2_rts", "usb1_txen", "gpt10_pwm_evt", "gpio_68",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART2_RX, 70,
+                "uart2_rx", "usb1_dat", "gpt12_pwm_evt", "gpio_70",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART2_TX, 69,
+                "uart2_tx", "usb1_se0", "gpt11_pwm_evt", "gpio_69",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART3_CTS_RCTX, 102,
+                "uart3_cts_rctx", "uart3_rx_irrx", NULL, "gpio_102",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART3_RTS_SD, 103,
+                "uart3_rts_sd", "uart3_tx_irtx", NULL, "gpio_103",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART3_RX_IRRX, 105,
+                "uart3_rx_irrx", NULL, NULL, "gpio_105",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(UART3_TX_IRTX, 104,
+                "uart3_tx_irtx", "uart3_cts_rctx", NULL, "gpio_104",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(USB0_DAT, 112,
+                "usb0_dat", "uart3_rx_irrx", "uart2_rx", "gpio_112",
+                "uart2_tx", NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(USB0_PUEN, 106,
+                "usb0_puen", "mcbsp2_dx", NULL, "gpio_106",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(USB0_RCV, 109,
+                "usb0_rcv", "mcbsp2_fsx", NULL, "gpio_109",
+                "uart2_cts", NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(USB0_SE0, 111,
+                "usb0_se0", "uart3_tx_irtx", "uart2_tx", "gpio_111",
+                "uart2_rx", NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(USB0_TXEN, 110,
+                "usb0_txen", "uart3_cts_rctx", "uart2_cts", "gpio_110",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(USB0_VM, 108,
+                "usb0_vm", "mcbsp2_clkx", NULL, "gpio_108",
+                "uart2_rx", NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(USB0_VP, 107,
+                "usb0_vp", "mcbsp2_dr", NULL, "gpio_107",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(VLYNQ_CLK, 13,
+                "vlynq_clk", "usb2_se0", "sys_ndmareq0", "gpio_13",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(VLYNQ_NLA, 58,
+                "vlynq_nla", NULL, NULL, "gpio_58",
+                "cam_d6", NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(VLYNQ_RX0, 15,
+                "vlynq_rx0", "usb2_tllse0", NULL, "gpio_15",
+                "cam_d7", NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(VLYNQ_RX1, 14,
+                "vlynq_rx1", "usb2_rcv", "sys_ndmareq1", "gpio_14",
+                "cam_d8", NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(VLYNQ_TX0, 17,
+                "vlynq_tx0", "usb2_txen", NULL, "gpio_17",
+                NULL, NULL, NULL, NULL),
+        _OMAP2420_MUXENTRY(VLYNQ_TX1, 16,
+                "vlynq_tx1", "usb2_dat", "sys_clkout2", "gpio_16",
+                NULL, NULL, NULL, NULL),
+        { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+
+/*
+ * Balls for 447-pin POP package
+ */
+#ifdef CONFIG_DEBUG_FS
+struct omap_ball __initdata omap2420_pop_ball[] = {
+        _OMAP2420_BALLENTRY(CAM_D0, "y4", NULL),
+        _OMAP2420_BALLENTRY(CAM_D1, "y3", NULL),
+        _OMAP2420_BALLENTRY(CAM_D2, "u7", NULL),
+        _OMAP2420_BALLENTRY(CAM_D3, "ab3", NULL),
+        _OMAP2420_BALLENTRY(CAM_D4, "v2", NULL),
+        _OMAP2420_BALLENTRY(CAM_D5, "ad3", NULL),
+        _OMAP2420_BALLENTRY(CAM_D6, "aa4", NULL),
+        _OMAP2420_BALLENTRY(CAM_D7, "ab4", NULL),
+        _OMAP2420_BALLENTRY(CAM_D8, "ac6", NULL),
+        _OMAP2420_BALLENTRY(CAM_D9, "ac7", NULL),
+        _OMAP2420_BALLENTRY(CAM_HS, "v4", NULL),
+        _OMAP2420_BALLENTRY(CAM_LCLK, "ad6", NULL),
+        _OMAP2420_BALLENTRY(CAM_VS, "p7", NULL),
+        _OMAP2420_BALLENTRY(CAM_XCLK, "w4", NULL),
+        _OMAP2420_BALLENTRY(DSS_ACBIAS, "ae8", NULL),
+        _OMAP2420_BALLENTRY(DSS_DATA10, "ac12", NULL),
+        _OMAP2420_BALLENTRY(DSS_DATA11, "ae11", NULL),
+        _OMAP2420_BALLENTRY(DSS_DATA12, "ae13", NULL),
+        _OMAP2420_BALLENTRY(DSS_DATA13, "ad13", NULL),
+        _OMAP2420_BALLENTRY(DSS_DATA14, "ac13", NULL),
+        _OMAP2420_BALLENTRY(DSS_DATA15, "y12", NULL),
+        _OMAP2420_BALLENTRY(DSS_DATA16, "ad14", NULL),
+        _OMAP2420_BALLENTRY(DSS_DATA17, "y13", NULL),
+        _OMAP2420_BALLENTRY(DSS_DATA8, "ad11", NULL),
+        _OMAP2420_BALLENTRY(DSS_DATA9, "ad12", NULL),
+        _OMAP2420_BALLENTRY(EAC_AC_DIN, "ad19", NULL),
+        _OMAP2420_BALLENTRY(EAC_AC_DOUT, "af22", NULL),
+        _OMAP2420_BALLENTRY(EAC_AC_FS, "ad16", NULL),
+        _OMAP2420_BALLENTRY(EAC_AC_MCLK, "y17", NULL),
+        _OMAP2420_BALLENTRY(EAC_AC_RST, "ae22", NULL),
+        _OMAP2420_BALLENTRY(EAC_AC_SCLK, "ac18", NULL),
+        _OMAP2420_BALLENTRY(EAC_BT_DIN, "u8", NULL),
+        _OMAP2420_BALLENTRY(EAC_BT_DOUT, "ad5", NULL),
+        _OMAP2420_BALLENTRY(EAC_BT_FS, "w7", NULL),
+        _OMAP2420_BALLENTRY(EAC_BT_SCLK, "ad4", NULL),
+        _OMAP2420_BALLENTRY(GPIO_119, "af6", NULL),
+        _OMAP2420_BALLENTRY(GPIO_120, "af4", NULL),
+        _OMAP2420_BALLENTRY(GPIO_121, "ae6", NULL),
+        _OMAP2420_BALLENTRY(GPIO_122, "w3", NULL),
+        _OMAP2420_BALLENTRY(GPIO_124, "y19", NULL),
+        _OMAP2420_BALLENTRY(GPIO_125, "ae24", NULL),
+        _OMAP2420_BALLENTRY(GPIO_36, "y18", NULL),
+        _OMAP2420_BALLENTRY(GPIO_6, "d6", NULL),
+        _OMAP2420_BALLENTRY(GPIO_62, "ad18", NULL),
+        _OMAP2420_BALLENTRY(GPMC_A1, "m8", NULL),
+        _OMAP2420_BALLENTRY(GPMC_A10, "d5", NULL),
+        _OMAP2420_BALLENTRY(GPMC_A2, "w9", NULL),
+        _OMAP2420_BALLENTRY(GPMC_A3, "af10", NULL),
+        _OMAP2420_BALLENTRY(GPMC_A4, "w8", NULL),
+        _OMAP2420_BALLENTRY(GPMC_A5, "ae16", NULL),
+        _OMAP2420_BALLENTRY(GPMC_A6, "af9", NULL),
+        _OMAP2420_BALLENTRY(GPMC_A7, "e4", NULL),
+        _OMAP2420_BALLENTRY(GPMC_A8, "j7", NULL),
+        _OMAP2420_BALLENTRY(GPMC_A9, "ae18", NULL),
+        _OMAP2420_BALLENTRY(GPMC_CLK, "p1", "l1"),
+        _OMAP2420_BALLENTRY(GPMC_D10, "t1", "n1"),
+        _OMAP2420_BALLENTRY(GPMC_D11, "u2", "p2"),
+        _OMAP2420_BALLENTRY(GPMC_D12, "u1", "p1"),
+        _OMAP2420_BALLENTRY(GPMC_D13, "p2", "m1"),
+        _OMAP2420_BALLENTRY(GPMC_D14, "h2", "j2"),
+        _OMAP2420_BALLENTRY(GPMC_D15, "h1", "k2"),
+        _OMAP2420_BALLENTRY(GPMC_D8, "v1", "r1"),
+        _OMAP2420_BALLENTRY(GPMC_D9, "y1", "t1"),
+        _OMAP2420_BALLENTRY(GPMC_NBE0, "af12", "aa10"),
+        _OMAP2420_BALLENTRY(GPMC_NBE1, "u3", NULL),
+        _OMAP2420_BALLENTRY(GPMC_NCS1, "af14", "w1"),
+        _OMAP2420_BALLENTRY(GPMC_NCS2, "g4", NULL),
+        _OMAP2420_BALLENTRY(GPMC_NCS3, "t8", NULL),
+        _OMAP2420_BALLENTRY(GPMC_NCS4, "h8", NULL),
+        _OMAP2420_BALLENTRY(GPMC_NCS5, "k3", NULL),
+        _OMAP2420_BALLENTRY(GPMC_NCS6, "m7", NULL),
+        _OMAP2420_BALLENTRY(GPMC_NCS7, "p3", NULL),
+        _OMAP2420_BALLENTRY(GPMC_NWP, "ae15", "y5"),
+        _OMAP2420_BALLENTRY(GPMC_WAIT1, "ae20", "y8"),
+        _OMAP2420_BALLENTRY(GPMC_WAIT2, "n2", NULL),
+        _OMAP2420_BALLENTRY(GPMC_WAIT3, "t4", NULL),
+        _OMAP2420_BALLENTRY(HDQ_SIO, "t23", NULL),
+        _OMAP2420_BALLENTRY(I2C2_SCL, "l2", NULL),
+        _OMAP2420_BALLENTRY(I2C2_SDA, "k19", NULL),
+        _OMAP2420_BALLENTRY(JTAG_EMU0, "n24", NULL),
+        _OMAP2420_BALLENTRY(JTAG_EMU1, "ac22", NULL),
+        _OMAP2420_BALLENTRY(MCBSP1_CLKR, "y24", NULL),
+        _OMAP2420_BALLENTRY(MCBSP1_CLKX, "t19", NULL),
+        _OMAP2420_BALLENTRY(MCBSP1_DR, "u23", NULL),
+        _OMAP2420_BALLENTRY(MCBSP1_DX, "r24", NULL),
+        _OMAP2420_BALLENTRY(MCBSP1_FSR, "r20", NULL),
+        _OMAP2420_BALLENTRY(MCBSP1_FSX, "r23", NULL),
+        _OMAP2420_BALLENTRY(MCBSP2_CLKX, "t24", NULL),
+        _OMAP2420_BALLENTRY(MCBSP2_DR, "p20", NULL),
+        _OMAP2420_BALLENTRY(MCBSP_CLKS, "p23", NULL),
+        _OMAP2420_BALLENTRY(MMC_CLKI, "c23", NULL),
+        _OMAP2420_BALLENTRY(MMC_CLKO, "h23", NULL),
+        _OMAP2420_BALLENTRY(MMC_CMD, "j23", NULL),
+        _OMAP2420_BALLENTRY(MMC_CMD_DIR, "j24", NULL),
+        _OMAP2420_BALLENTRY(MMC_DAT0, "h17", NULL),
+        _OMAP2420_BALLENTRY(MMC_DAT_DIR0, "f23", NULL),
+        _OMAP2420_BALLENTRY(MMC_DAT1, "g19", NULL),
+        _OMAP2420_BALLENTRY(MMC_DAT_DIR1, "d23", NULL),
+        _OMAP2420_BALLENTRY(MMC_DAT2, "h20", NULL),
+        _OMAP2420_BALLENTRY(MMC_DAT_DIR2, "g23", NULL),
+        _OMAP2420_BALLENTRY(MMC_DAT3, "d24", NULL),
+        _OMAP2420_BALLENTRY(MMC_DAT_DIR3, "e23", NULL),
+        _OMAP2420_BALLENTRY(SDRC_A12, "w26", "r21"),
+        _OMAP2420_BALLENTRY(SDRC_A13, "w25", "aa15"),
+        _OMAP2420_BALLENTRY(SDRC_A14, "aa26", "y12"),
+        _OMAP2420_BALLENTRY(SDRC_CKE1, "ae25", "y13"),
+        _OMAP2420_BALLENTRY(SDRC_NCS1, "y25", "t20"),
+        _OMAP2420_BALLENTRY(SPI1_CLK, "y23", NULL),
+        _OMAP2420_BALLENTRY(SPI1_NCS0, "w24", NULL),
+        _OMAP2420_BALLENTRY(SPI1_NCS1, "w23", NULL),
+        _OMAP2420_BALLENTRY(SPI1_NCS2, "v23", NULL),
+        _OMAP2420_BALLENTRY(SPI1_NCS3, "u20", NULL),
+        _OMAP2420_BALLENTRY(SPI1_SIMO, "h10", NULL),
+        _OMAP2420_BALLENTRY(SPI1_SOMI, "v19", NULL),
+        _OMAP2420_BALLENTRY(SPI2_CLK, "v24", NULL),
+        _OMAP2420_BALLENTRY(SPI2_NCS0, "aa24", NULL),
+        _OMAP2420_BALLENTRY(SPI2_SIMO, "u24", NULL),
+        _OMAP2420_BALLENTRY(SPI2_SOMI, "v25", NULL),
+        _OMAP2420_BALLENTRY(SSI1_DAT_RX, "w15", NULL),
+        _OMAP2420_BALLENTRY(SSI1_DAT_TX, "w13", NULL),
+        _OMAP2420_BALLENTRY(SSI1_FLAG_RX, "af11", NULL),
+        _OMAP2420_BALLENTRY(SSI1_FLAG_TX, "ac15", NULL),
+        _OMAP2420_BALLENTRY(SSI1_RDY_RX, "ac16", NULL),
+        _OMAP2420_BALLENTRY(SSI1_RDY_TX, "af15", NULL),
+        _OMAP2420_BALLENTRY(SSI1_WAKE, "ad15", NULL),
+        _OMAP2420_BALLENTRY(SYS_CLKOUT, "ae19", NULL),
+        _OMAP2420_BALLENTRY(SYS_CLKREQ, "ad20", NULL),
+        _OMAP2420_BALLENTRY(SYS_NIRQ, "y20", NULL),
+        _OMAP2420_BALLENTRY(UART1_CTS, "g20", NULL),
+        _OMAP2420_BALLENTRY(UART1_RTS, "k20", NULL),
+        _OMAP2420_BALLENTRY(UART1_RX, "t20", NULL),
+        _OMAP2420_BALLENTRY(UART1_TX, "h12", NULL),
+        _OMAP2420_BALLENTRY(UART2_CTS, "ac24", NULL),
+        _OMAP2420_BALLENTRY(UART2_RTS, "w20", NULL),
+        _OMAP2420_BALLENTRY(UART2_RX, "ad24", NULL),
+        _OMAP2420_BALLENTRY(UART2_TX, "ab24", NULL),
+        _OMAP2420_BALLENTRY(UART3_CTS_RCTX, "k24", NULL),
+        _OMAP2420_BALLENTRY(UART3_RTS_SD, "m20", NULL),
+        _OMAP2420_BALLENTRY(UART3_RX_IRRX, "h24", NULL),
+        _OMAP2420_BALLENTRY(UART3_TX_IRTX, "g24", NULL),
+        _OMAP2420_BALLENTRY(USB0_DAT, "j25", NULL),
+        _OMAP2420_BALLENTRY(USB0_PUEN, "l23", NULL),
+        _OMAP2420_BALLENTRY(USB0_RCV, "k23", NULL),
+        _OMAP2420_BALLENTRY(USB0_SE0, "l24", NULL),
+        _OMAP2420_BALLENTRY(USB0_TXEN, "m24", NULL),
+        _OMAP2420_BALLENTRY(USB0_VM, "n23", NULL),
+        _OMAP2420_BALLENTRY(USB0_VP, "m23", NULL),
+        _OMAP2420_BALLENTRY(VLYNQ_CLK, "w12", NULL),
+        _OMAP2420_BALLENTRY(VLYNQ_NLA, "ae10", NULL),
+        _OMAP2420_BALLENTRY(VLYNQ_RX0, "ad7", NULL),
+        _OMAP2420_BALLENTRY(VLYNQ_RX1, "w10", NULL),
+        _OMAP2420_BALLENTRY(VLYNQ_TX0, "y15", NULL),
+        _OMAP2420_BALLENTRY(VLYNQ_TX1, "w14", NULL),
+        { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define omap2420_pop_ball        NULL
+#endif
+
+int __init omap2420_mux_init(struct omap_board_mux *board_subset, int flags)
+{
+        struct omap_ball *package_balls = NULL;
+
+        switch (flags & OMAP_PACKAGE_MASK) {
+        case OMAP_PACKAGE_ZAC:
+                package_balls = omap2420_pop_ball;
+                break;
+        case OMAP_PACKAGE_ZAF:
+                /* REVISIT: Please add data */
+        default:
+                pr_warning("mux: No ball data available for omap2420 package\n");
+        }
+
+        return omap_mux_init(OMAP2420_CONTROL_PADCONF_MUX_PBASE,
+                             OMAP2420_CONTROL_PADCONF_MUX_SIZE,
+                                omap2420_muxmodes, NULL, board_subset,
+                                package_balls);
+}
diff --git a/arch/arm/mach-omap2/mux2420.h b/arch/arm/mach-omap2/mux2420.h
new file mode 100644
index 000000000000..0f555aa847b5
--- /dev/null
+++ b/arch/arm/mach-omap2/mux2420.h
@@ -0,0 +1,282 @@
+/*
+ * Copyright (C) 2009 Nokia
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define OMAP2420_CONTROL_PADCONF_MUX_PBASE                      0x48000030LU
+
+#define OMAP2420_MUX(mode0, mux_value)                                  \
+{                                                                       \
+        .reg_offset     = (OMAP2420_CONTROL_PADCONF_##mode0##_OFFSET),  \
+        .value          = (mux_value),                                  \
+}
+
+/*
+ * OMAP2420 CONTROL_PADCONF* register offsets for pin-muxing
+ *
+ * Extracted from the TRM.  Add 0x48000030 to these values to get the
+ * absolute addresses.  The name in the macro is the mode-0 name of
+ * the pin.  NOTE: These registers are 8-bits wide.
+ */
+#define OMAP2420_CONTROL_PADCONF_SDRC_A14_OFFSET                        0x000
+#define OMAP2420_CONTROL_PADCONF_SDRC_A13_OFFSET                        0x001
+#define OMAP2420_CONTROL_PADCONF_SDRC_A12_OFFSET                        0x002
+#define OMAP2420_CONTROL_PADCONF_SDRC_BA1_OFFSET                        0x003
+#define OMAP2420_CONTROL_PADCONF_SDRC_BA0_OFFSET                        0x004
+#define OMAP2420_CONTROL_PADCONF_SDRC_A11_OFFSET                        0x005
+#define OMAP2420_CONTROL_PADCONF_SDRC_A10_OFFSET                        0x006
+#define OMAP2420_CONTROL_PADCONF_SDRC_A9_OFFSET                         0x007
+#define OMAP2420_CONTROL_PADCONF_SDRC_A8_OFFSET                         0x008
+#define OMAP2420_CONTROL_PADCONF_SDRC_A7_OFFSET                         0x009
+#define OMAP2420_CONTROL_PADCONF_SDRC_A6_OFFSET                         0x00a
+#define OMAP2420_CONTROL_PADCONF_SDRC_A5_OFFSET                         0x00b
+#define OMAP2420_CONTROL_PADCONF_SDRC_A4_OFFSET                         0x00c
+#define OMAP2420_CONTROL_PADCONF_SDRC_A3_OFFSET                         0x00d
+#define OMAP2420_CONTROL_PADCONF_SDRC_A2_OFFSET                         0x00e
+#define OMAP2420_CONTROL_PADCONF_SDRC_A1_OFFSET                         0x00f
+#define OMAP2420_CONTROL_PADCONF_SDRC_A0_OFFSET                         0x010
+#define OMAP2420_CONTROL_PADCONF_SDRC_D31_OFFSET                        0x021
+#define OMAP2420_CONTROL_PADCONF_SDRC_D30_OFFSET                        0x022
+#define OMAP2420_CONTROL_PADCONF_SDRC_D29_OFFSET                        0x023
+#define OMAP2420_CONTROL_PADCONF_SDRC_D28_OFFSET                        0x024
+#define OMAP2420_CONTROL_PADCONF_SDRC_D27_OFFSET                        0x025
+#define OMAP2420_CONTROL_PADCONF_SDRC_D26_OFFSET                        0x026
+#define OMAP2420_CONTROL_PADCONF_SDRC_D25_OFFSET                        0x027
+#define OMAP2420_CONTROL_PADCONF_SDRC_D24_OFFSET                        0x028
+#define OMAP2420_CONTROL_PADCONF_SDRC_D23_OFFSET                        0x029
+#define OMAP2420_CONTROL_PADCONF_SDRC_D22_OFFSET                        0x02a
+#define OMAP2420_CONTROL_PADCONF_SDRC_D21_OFFSET                        0x02b
+#define OMAP2420_CONTROL_PADCONF_SDRC_D20_OFFSET                        0x02c
+#define OMAP2420_CONTROL_PADCONF_SDRC_D19_OFFSET                        0x02d
+#define OMAP2420_CONTROL_PADCONF_SDRC_D18_OFFSET                        0x02e
+#define OMAP2420_CONTROL_PADCONF_SDRC_D17_OFFSET                        0x02f
+#define OMAP2420_CONTROL_PADCONF_SDRC_D16_OFFSET                        0x030
+#define OMAP2420_CONTROL_PADCONF_SDRC_D15_OFFSET                        0x031
+#define OMAP2420_CONTROL_PADCONF_SDRC_D14_OFFSET                        0x032
+#define OMAP2420_CONTROL_PADCONF_SDRC_D13_OFFSET                        0x033
+#define OMAP2420_CONTROL_PADCONF_SDRC_D12_OFFSET                        0x034
+#define OMAP2420_CONTROL_PADCONF_SDRC_D11_OFFSET                        0x035
+#define OMAP2420_CONTROL_PADCONF_SDRC_D10_OFFSET                        0x036
+#define OMAP2420_CONTROL_PADCONF_SDRC_D9_OFFSET                         0x037
+#define OMAP2420_CONTROL_PADCONF_SDRC_D8_OFFSET                         0x038
+#define OMAP2420_CONTROL_PADCONF_SDRC_D7_OFFSET                         0x039
+#define OMAP2420_CONTROL_PADCONF_SDRC_D6_OFFSET                         0x03a
+#define OMAP2420_CONTROL_PADCONF_SDRC_D5_OFFSET                         0x03b
+#define OMAP2420_CONTROL_PADCONF_SDRC_D4_OFFSET                         0x03c
+#define OMAP2420_CONTROL_PADCONF_SDRC_D3_OFFSET                         0x03d
+#define OMAP2420_CONTROL_PADCONF_SDRC_D2_OFFSET                         0x03e
+#define OMAP2420_CONTROL_PADCONF_SDRC_D1_OFFSET                         0x03f
+#define OMAP2420_CONTROL_PADCONF_SDRC_D0_OFFSET                         0x040
+#define OMAP2420_CONTROL_PADCONF_GPMC_A10_OFFSET                        0x041
+#define OMAP2420_CONTROL_PADCONF_GPMC_A9_OFFSET                         0x042
+#define OMAP2420_CONTROL_PADCONF_GPMC_A8_OFFSET                         0x043
+#define OMAP2420_CONTROL_PADCONF_GPMC_A7_OFFSET                         0x044
+#define OMAP2420_CONTROL_PADCONF_GPMC_A6_OFFSET                         0x045
+#define OMAP2420_CONTROL_PADCONF_GPMC_A5_OFFSET                         0x046
+#define OMAP2420_CONTROL_PADCONF_GPMC_A4_OFFSET                         0x047
+#define OMAP2420_CONTROL_PADCONF_GPMC_A3_OFFSET                         0x048
+#define OMAP2420_CONTROL_PADCONF_GPMC_A2_OFFSET                         0x049
+#define OMAP2420_CONTROL_PADCONF_GPMC_A1_OFFSET                         0x04a
+#define OMAP2420_CONTROL_PADCONF_GPMC_D15_OFFSET                        0x04b
+#define OMAP2420_CONTROL_PADCONF_GPMC_D14_OFFSET                        0x04c
+#define OMAP2420_CONTROL_PADCONF_GPMC_D13_OFFSET                        0x04d
+#define OMAP2420_CONTROL_PADCONF_GPMC_D12_OFFSET                        0x04e
+#define OMAP2420_CONTROL_PADCONF_GPMC_D11_OFFSET                        0x04f
+#define OMAP2420_CONTROL_PADCONF_GPMC_D10_OFFSET                        0x050
+#define OMAP2420_CONTROL_PADCONF_GPMC_D9_OFFSET                         0x051
+#define OMAP2420_CONTROL_PADCONF_GPMC_D8_OFFSET                         0x052
+#define OMAP2420_CONTROL_PADCONF_GPMC_D7_OFFSET                         0x053
+#define OMAP2420_CONTROL_PADCONF_GPMC_D6_OFFSET                         0x054
+#define OMAP2420_CONTROL_PADCONF_GPMC_D5_OFFSET                         0x055
+#define OMAP2420_CONTROL_PADCONF_GPMC_D4_OFFSET                         0x056
+#define OMAP2420_CONTROL_PADCONF_GPMC_D3_OFFSET                         0x057
+#define OMAP2420_CONTROL_PADCONF_GPMC_D2_OFFSET                         0x058
+#define OMAP2420_CONTROL_PADCONF_GPMC_D1_OFFSET                         0x059
+#define OMAP2420_CONTROL_PADCONF_GPMC_D0_OFFSET                         0x05a
+#define OMAP2420_CONTROL_PADCONF_GPMC_CLK_OFFSET                        0x05b
+#define OMAP2420_CONTROL_PADCONF_GPMC_NCS0_OFFSET                       0x05c
+#define OMAP2420_CONTROL_PADCONF_GPMC_NCS1_OFFSET                       0x05d
+#define OMAP2420_CONTROL_PADCONF_GPMC_NCS2_OFFSET                       0x05e
+#define OMAP2420_CONTROL_PADCONF_GPMC_NCS3_OFFSET                       0x05f
+#define OMAP2420_CONTROL_PADCONF_GPMC_NCS4_OFFSET                       0x060
+#define OMAP2420_CONTROL_PADCONF_GPMC_NCS5_OFFSET                       0x061
+#define OMAP2420_CONTROL_PADCONF_GPMC_NCS6_OFFSET                       0x062
+#define OMAP2420_CONTROL_PADCONF_GPMC_NCS7_OFFSET                       0x063
+#define OMAP2420_CONTROL_PADCONF_GPMC_NALE_ALE_OFFSET                   0x064
+#define OMAP2420_CONTROL_PADCONF_GPMC_NOE_OFFSET                        0x065
+#define OMAP2420_CONTROL_PADCONF_GPMC_NWE_OFFSET                        0x066
+#define OMAP2420_CONTROL_PADCONF_GPMC_NBE0_OFFSET                       0x067
+#define OMAP2420_CONTROL_PADCONF_GPMC_NBE1_OFFSET                       0x068
+#define OMAP2420_CONTROL_PADCONF_GPMC_NWP_OFFSET                        0x069
+#define OMAP2420_CONTROL_PADCONF_GPMC_WAIT0_OFFSET                      0x06a
+#define OMAP2420_CONTROL_PADCONF_GPMC_WAIT1_OFFSET                      0x06b
+#define OMAP2420_CONTROL_PADCONF_GPMC_WAIT2_OFFSET                      0x06c
+#define OMAP2420_CONTROL_PADCONF_GPMC_WAIT3_OFFSET                      0x06d
+#define OMAP2420_CONTROL_PADCONF_SDRC_CLK_OFFSET                        0x06e
+#define OMAP2420_CONTROL_PADCONF_SDRC_NCLK_OFFSET                       0x06f
+#define OMAP2420_CONTROL_PADCONF_SDRC_NCS0_OFFSET                       0x070
+#define OMAP2420_CONTROL_PADCONF_SDRC_NCS1_OFFSET                       0x071
+#define OMAP2420_CONTROL_PADCONF_SDRC_CKE0_OFFSET                       0x072
+#define OMAP2420_CONTROL_PADCONF_SDRC_CKE1_OFFSET                       0x073
+#define OMAP2420_CONTROL_PADCONF_SDRC_NRAS_OFFSET                       0x074
+#define OMAP2420_CONTROL_PADCONF_SDRC_NCAS_OFFSET                       0x075
+#define OMAP2420_CONTROL_PADCONF_SDRC_NWE_OFFSET                        0x076
+#define OMAP2420_CONTROL_PADCONF_SDRC_DM0_OFFSET                        0x077
+#define OMAP2420_CONTROL_PADCONF_SDRC_DM1_OFFSET                        0x078
+#define OMAP2420_CONTROL_PADCONF_SDRC_DM2_OFFSET                        0x079
+#define OMAP2420_CONTROL_PADCONF_SDRC_DM3_OFFSET                        0x07a
+#define OMAP2420_CONTROL_PADCONF_SDRC_DQS0_OFFSET                       0x07f
+#define OMAP2420_CONTROL_PADCONF_SDRC_DQS1_OFFSET                       0x080
+#define OMAP2420_CONTROL_PADCONF_SDRC_DQS2_OFFSET                       0x081
+#define OMAP2420_CONTROL_PADCONF_SDRC_DQS3_OFFSET                       0x082
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA0_OFFSET                       0x083
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA1_OFFSET                       0x084
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA2_OFFSET                       0x085
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA3_OFFSET                       0x086
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA4_OFFSET                       0x087
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA5_OFFSET                       0x088
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA6_OFFSET                       0x089
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA7_OFFSET                       0x08a
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA8_OFFSET                       0x08b
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA9_OFFSET                       0x08c
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA10_OFFSET                      0x08d
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA11_OFFSET                      0x08e
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA12_OFFSET                      0x08f
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA13_OFFSET                      0x090
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA14_OFFSET                      0x091
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA15_OFFSET                      0x092
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA16_OFFSET                      0x093
+#define OMAP2420_CONTROL_PADCONF_DSS_DATA17_OFFSET                      0x094
+#define OMAP2420_CONTROL_PADCONF_UART1_CTS_OFFSET                       0x095
+#define OMAP2420_CONTROL_PADCONF_UART1_RTS_OFFSET                       0x096
+#define OMAP2420_CONTROL_PADCONF_UART1_TX_OFFSET                        0x097
+#define OMAP2420_CONTROL_PADCONF_UART1_RX_OFFSET                        0x098
+#define OMAP2420_CONTROL_PADCONF_MCBSP2_DR_OFFSET                       0x099
+#define OMAP2420_CONTROL_PADCONF_MCBSP2_CLKX_OFFSET                     0x09a
+#define OMAP2420_CONTROL_PADCONF_DSS_PCL_OFFSET                         0x09b
+#define OMAP2420_CONTROL_PADCONF_DSS_VSYNC_OFFSET                       0x09c
+#define OMAP2420_CONTROL_PADCONF_DSS_HSYNC_OFFSET                       0x09d
+#define OMAP2420_CONTROL_PADCONF_DSS_ACBIAS_OFFSET                      0x09e
+#define OMAP2420_CONTROL_PADCONF_CAM_D9_OFFSET                          0x09f
+#define OMAP2420_CONTROL_PADCONF_CAM_D8_OFFSET                          0x0a0
+#define OMAP2420_CONTROL_PADCONF_CAM_D7_OFFSET                          0x0a1
+#define OMAP2420_CONTROL_PADCONF_CAM_D6_OFFSET                          0x0a2
+#define OMAP2420_CONTROL_PADCONF_CAM_D5_OFFSET                          0x0a3
+#define OMAP2420_CONTROL_PADCONF_CAM_D4_OFFSET                          0x0a4
+#define OMAP2420_CONTROL_PADCONF_CAM_D3_OFFSET                          0x0a5
+#define OMAP2420_CONTROL_PADCONF_CAM_D2_OFFSET                          0x0a6
+#define OMAP2420_CONTROL_PADCONF_CAM_D1_OFFSET                          0x0a7
+#define OMAP2420_CONTROL_PADCONF_CAM_D0_OFFSET                          0x0a8
+#define OMAP2420_CONTROL_PADCONF_CAM_HS_OFFSET                          0x0a9
+#define OMAP2420_CONTROL_PADCONF_CAM_VS_OFFSET                          0x0aa
+#define OMAP2420_CONTROL_PADCONF_CAM_LCLK_OFFSET                        0x0ab
+#define OMAP2420_CONTROL_PADCONF_CAM_XCLK_OFFSET                        0x0ac
+#define OMAP2420_CONTROL_PADCONF_SSI1_DAT_TX_OFFSET                     0x0ad
+#define OMAP2420_CONTROL_PADCONF_SSI1_FLAG_TX_OFFSET                    0x0ae
+#define OMAP2420_CONTROL_PADCONF_SSI1_RDY_TX_OFFSET                     0x0af
+#define OMAP2420_CONTROL_PADCONF_GPIO_62_OFFSET                         0x0b0
+#define OMAP2420_CONTROL_PADCONF_SSI1_DAT_RX_OFFSET                     0x0b1
+#define OMAP2420_CONTROL_PADCONF_SSI1_FLAG_RX_OFFSET                    0x0b2
+#define OMAP2420_CONTROL_PADCONF_SSI1_RDY_RX_OFFSET                     0x0b3
+#define OMAP2420_CONTROL_PADCONF_SSI1_WAKE_OFFSET                       0x0b4
+#define OMAP2420_CONTROL_PADCONF_VLYNQ_CLK_OFFSET                       0x0b5
+#define OMAP2420_CONTROL_PADCONF_VLYNQ_RX1_OFFSET                       0x0b6
+#define OMAP2420_CONTROL_PADCONF_VLYNQ_RX0_OFFSET                       0x0b7
+#define OMAP2420_CONTROL_PADCONF_VLYNQ_TX1_OFFSET                       0x0b8
+#define OMAP2420_CONTROL_PADCONF_VLYNQ_TX0_OFFSET                       0x0b9
+#define OMAP2420_CONTROL_PADCONF_VLYNQ_NLA_OFFSET                       0x0ba
+#define OMAP2420_CONTROL_PADCONF_UART2_CTS_OFFSET                       0x0bb
+#define OMAP2420_CONTROL_PADCONF_UART2_RTS_OFFSET                       0x0bc
+#define OMAP2420_CONTROL_PADCONF_UART2_TX_OFFSET                        0x0bd
+#define OMAP2420_CONTROL_PADCONF_UART2_RX_OFFSET                        0x0be
+#define OMAP2420_CONTROL_PADCONF_EAC_BT_SCLK_OFFSET                     0x0bf
+#define OMAP2420_CONTROL_PADCONF_EAC_BT_FS_OFFSET                       0x0c0
+#define OMAP2420_CONTROL_PADCONF_EAC_BT_DIN_OFFSET                      0x0c1
+#define OMAP2420_CONTROL_PADCONF_EAC_BT_DOUT_OFFSET                     0x0c2
+#define OMAP2420_CONTROL_PADCONF_MMC_CLKO_OFFSET                        0x0c3
+#define OMAP2420_CONTROL_PADCONF_MMC_CMD_OFFSET                         0x0c4
+#define OMAP2420_CONTROL_PADCONF_MMC_DAT0_OFFSET                        0x0c5
+#define OMAP2420_CONTROL_PADCONF_MMC_DAT1_OFFSET                        0x0c6
+#define OMAP2420_CONTROL_PADCONF_MMC_DAT2_OFFSET                        0x0c7
+#define OMAP2420_CONTROL_PADCONF_MMC_DAT3_OFFSET                        0x0c8
+#define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR0_OFFSET                    0x0c9
+#define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR1_OFFSET                    0x0ca
+#define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR2_OFFSET                    0x0cb
+#define OMAP2420_CONTROL_PADCONF_MMC_DAT_DIR3_OFFSET                    0x0cc
+#define OMAP2420_CONTROL_PADCONF_MMC_CMD_DIR_OFFSET                     0x0cd
+#define OMAP2420_CONTROL_PADCONF_MMC_CLKI_OFFSET                        0x0ce
+#define OMAP2420_CONTROL_PADCONF_SPI1_CLK_OFFSET                        0x0cf
+#define OMAP2420_CONTROL_PADCONF_SPI1_SIMO_OFFSET                       0x0d0
+#define OMAP2420_CONTROL_PADCONF_SPI1_SOMI_OFFSET                       0x0d1
+#define OMAP2420_CONTROL_PADCONF_SPI1_NCS0_OFFSET                       0x0d2
+#define OMAP2420_CONTROL_PADCONF_SPI1_NCS1_OFFSET                       0x0d3
+#define OMAP2420_CONTROL_PADCONF_SPI1_NCS2_OFFSET                       0x0d4
+#define OMAP2420_CONTROL_PADCONF_SPI1_NCS3_OFFSET                       0x0d5
+#define OMAP2420_CONTROL_PADCONF_SPI2_CLK_OFFSET                        0x0d6
+#define OMAP2420_CONTROL_PADCONF_SPI2_SIMO_OFFSET                       0x0d7
+#define OMAP2420_CONTROL_PADCONF_SPI2_SOMI_OFFSET                       0x0d8
+#define OMAP2420_CONTROL_PADCONF_SPI2_NCS0_OFFSET                       0x0d9
+#define OMAP2420_CONTROL_PADCONF_MCBSP1_CLKR_OFFSET                     0x0da
+#define OMAP2420_CONTROL_PADCONF_MCBSP1_FSR_OFFSET                      0x0db
+#define OMAP2420_CONTROL_PADCONF_MCBSP1_DX_OFFSET                       0x0dc
+#define OMAP2420_CONTROL_PADCONF_MCBSP1_DR_OFFSET                       0x0dd
+#define OMAP2420_CONTROL_PADCONF_MCBSP_CLKS_OFFSET                      0x0de
+#define OMAP2420_CONTROL_PADCONF_MCBSP1_FSX_OFFSET                      0x0df
+#define OMAP2420_CONTROL_PADCONF_MCBSP1_CLKX_OFFSET                     0x0e0
+#define OMAP2420_CONTROL_PADCONF_I2C1_SCL_OFFSET                        0x0e1
+#define OMAP2420_CONTROL_PADCONF_I2C1_SDA_OFFSET                        0x0e2
+#define OMAP2420_CONTROL_PADCONF_I2C2_SCL_OFFSET                        0x0e3
+#define OMAP2420_CONTROL_PADCONF_I2C2_SDA_OFFSET                        0x0e4
+#define OMAP2420_CONTROL_PADCONF_HDQ_SIO_OFFSET                         0x0e5
+#define OMAP2420_CONTROL_PADCONF_UART3_CTS_RCTX_OFFSET                  0x0e6
+#define OMAP2420_CONTROL_PADCONF_UART3_RTS_SD_OFFSET                    0x0e7
+#define OMAP2420_CONTROL_PADCONF_UART3_TX_IRTX_OFFSET                   0x0e8
+#define OMAP2420_CONTROL_PADCONF_UART3_RX_IRRX_OFFSET                   0x0e9
+#define OMAP2420_CONTROL_PADCONF_TV_CVBS_OFFSET                         0x0ea
+#define OMAP2420_CONTROL_PADCONF_TV_VREF_OFFSET                         0x0eb
+#define OMAP2420_CONTROL_PADCONF_TV_RREF_OFFSET                         0x0ec
+#define OMAP2420_CONTROL_PADCONF_USB0_PUEN_OFFSET                       0x0ed
+#define OMAP2420_CONTROL_PADCONF_USB0_VP_OFFSET                         0x0ee
+#define OMAP2420_CONTROL_PADCONF_USB0_VM_OFFSET                         0x0ef
+#define OMAP2420_CONTROL_PADCONF_USB0_RCV_OFFSET                        0x0f0
+#define OMAP2420_CONTROL_PADCONF_USB0_TXEN_OFFSET                       0x0f1
+#define OMAP2420_CONTROL_PADCONF_USB0_SE0_OFFSET                        0x0f2
+#define OMAP2420_CONTROL_PADCONF_USB0_DAT_OFFSET                        0x0f3
+#define OMAP2420_CONTROL_PADCONF_EAC_AC_SCLK_OFFSET                     0x0f4
+#define OMAP2420_CONTROL_PADCONF_EAC_AC_FS_OFFSET                       0x0f5
+#define OMAP2420_CONTROL_PADCONF_EAC_AC_DIN_OFFSET                      0x0f6
+#define OMAP2420_CONTROL_PADCONF_EAC_AC_DOUT_OFFSET                     0x0f7
+#define OMAP2420_CONTROL_PADCONF_EAC_AC_MCLK_OFFSET                     0x0f8
+#define OMAP2420_CONTROL_PADCONF_EAC_AC_RST_OFFSET                      0x0f9
+#define OMAP2420_CONTROL_PADCONF_SYS_NRESPWRON_OFFSET                   0x0fa
+#define OMAP2420_CONTROL_PADCONF_SYS_NRESWARM_OFFSET                    0x0fb
+#define OMAP2420_CONTROL_PADCONF_SYS_NIRQ_OFFSET                        0x0fc
+#define OMAP2420_CONTROL_PADCONF_SYS_NV_OFFSET                          0x0fd
+#define OMAP2420_CONTROL_PADCONF_GPIO_119_OFFSET                        0x0fe
+#define OMAP2420_CONTROL_PADCONF_GPIO_120_OFFSET                        0x0ff
+#define OMAP2420_CONTROL_PADCONF_GPIO_121_OFFSET                        0x100
+#define OMAP2420_CONTROL_PADCONF_GPIO_122_OFFSET                        0x101
+#define OMAP2420_CONTROL_PADCONF_SYS_32K_OFFSET                         0x102
+#define OMAP2420_CONTROL_PADCONF_SYS_XTALIN_OFFSET                      0x103
+#define OMAP2420_CONTROL_PADCONF_SYS_XTALOUT_OFFSET                     0x104
+#define OMAP2420_CONTROL_PADCONF_GPIO_36_OFFSET                         0x105
+#define OMAP2420_CONTROL_PADCONF_SYS_CLKREQ_OFFSET                      0x106
+#define OMAP2420_CONTROL_PADCONF_SYS_CLKOUT_OFFSET                      0x107
+#define OMAP2420_CONTROL_PADCONF_GPIO_6_OFFSET                          0x108
+#define OMAP2420_CONTROL_PADCONF_GPIO_124_OFFSET                        0x109
+#define OMAP2420_CONTROL_PADCONF_GPIO_125_OFFSET                        0x10a
+#define OMAP2420_CONTROL_PADCONF_JTAG_EMU1_OFFSET                       0x10b
+#define OMAP2420_CONTROL_PADCONF_JTAG_EMU0_OFFSET                       0x10c
+#define OMAP2420_CONTROL_PADCONF_JTAG_NTRST_OFFSET                      0x10d
+#define OMAP2420_CONTROL_PADCONF_JTAG_TCK_OFFSET                        0x10e
+#define OMAP2420_CONTROL_PADCONF_JTAG_RTCK_OFFSET                       0x10f
+#define OMAP2420_CONTROL_PADCONF_JTAG_TMS_OFFSET                        0x110
+#define OMAP2420_CONTROL_PADCONF_JTAG_TDI_OFFSET                        0x111
+#define OMAP2420_CONTROL_PADCONF_JTAG_TDO_OFFSET                        0x112
+
+#define OMAP2420_CONTROL_PADCONF_MUX_SIZE                       \
+                (OMAP2420_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x1)
diff --git a/arch/arm/mach-omap2/mux2430.c b/arch/arm/mach-omap2/mux2430.c
new file mode 100644
index 000000000000..7dcaaa8af32a
--- /dev/null
+++ b/arch/arm/mach-omap2/mux2430.c
@@ -0,0 +1,791 @@
+/*
+ * Copyright (C) 2010 Nokia
+ * Copyright (C) 2010 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+
+#include "mux.h"
+
+#ifdef CONFIG_OMAP_MUX
+
+#define _OMAP2430_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7)               \
+{                                                                       \
+        .reg_offset     = (OMAP2430_CONTROL_PADCONF_##M0##_OFFSET),     \
+        .gpio           = (g),                                          \
+        .muxnames       = { m0, m1, m2, m3, m4, m5, m6, m7 },           \
+}
+
+#else
+
+#define _OMAP2430_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7)               \
+{                                                                       \
+        .reg_offset     = (OMAP2430_CONTROL_PADCONF_##M0##_OFFSET),     \
+        .gpio           = (g),                                          \
+}
+
+#endif
+
+#define _OMAP2430_BALLENTRY(M0, bb, bt)                                 \
+{                                                                       \
+        .reg_offset     = (OMAP2430_CONTROL_PADCONF_##M0##_OFFSET),     \
+        .balls          = { bb, bt },                                   \
+}
+
+/*
+ * Superset of all mux modes for omap2430
+ */
+static struct omap_mux __initdata omap2430_muxmodes[] = {
+        _OMAP2430_MUXENTRY(CAM_D0, 133,
+                "cam_d0", "hw_dbg0", "sti_dout", "gpio_133",
+                NULL, NULL, "etk_d2", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D10, 146,
+                "cam_d10", NULL, NULL, "gpio_146",
+                NULL, NULL, "etk_d12", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D11, 145,
+                "cam_d11", NULL, NULL, "gpio_145",
+                NULL, NULL, "etk_d13", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D1, 132,
+                "cam_d1", "hw_dbg1", "sti_din", "gpio_132",
+                NULL, NULL, "etk_d3", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D2, 129,
+                "cam_d2", "hw_dbg2", "mcbsp1_clkx", "gpio_129",
+                NULL, NULL, "etk_d4", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D3, 128,
+                "cam_d3", "hw_dbg3", "mcbsp1_dr", "gpio_128",
+                NULL, NULL, "etk_d5", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D4, 143,
+                "cam_d4", "hw_dbg4", "mcbsp1_fsr", "gpio_143",
+                NULL, NULL, "etk_d6", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D5, 112,
+                "cam_d5", "hw_dbg5", "mcbsp1_clkr", "gpio_112",
+                NULL, NULL, "etk_d7", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D6, 137,
+                "cam_d6", "hw_dbg6", NULL, "gpio_137",
+                NULL, NULL, "etk_d8", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D7, 136,
+                "cam_d7", "hw_dbg7", NULL, "gpio_136",
+                NULL, NULL, "etk_d9", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D8, 135,
+                "cam_d8", "hw_dbg8", NULL, "gpio_135",
+                NULL, NULL, "etk_d10", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_D9, 134,
+                "cam_d9", "hw_dbg9", NULL, "gpio_134",
+                NULL, NULL, "etk_d11", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_HS, 11,
+                "cam_hs", "hw_dbg10", "mcbsp1_dx", "gpio_11",
+                NULL, NULL, "etk_d1", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_LCLK, 0,
+                "cam_lclk", NULL, "mcbsp_clks", NULL,
+                NULL, NULL, "etk_c1", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_VS, 12,
+                "cam_vs", "hw_dbg11", "mcbsp1_fsx", "gpio_12",
+                NULL, NULL, "etk_d0", "safe_mode"),
+        _OMAP2430_MUXENTRY(CAM_XCLK, 0,
+                "cam_xclk", NULL, "sti_clk", NULL,
+                NULL, NULL, "etk_c2", NULL),
+        _OMAP2430_MUXENTRY(DSS_ACBIAS, 48,
+                "dss_acbias", NULL, "mcbsp2_fsx", "gpio_48",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA0, 40,
+                "dss_data0", "uart1_cts", NULL, "gpio_40",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA10, 128,
+                "dss_data10", "sdi_data1n", NULL, "gpio_128",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA11, 129,
+                "dss_data11", "sdi_data1p", NULL, "gpio_129",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA12, 130,
+                "dss_data12", "sdi_data2n", NULL, "gpio_130",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA13, 131,
+                "dss_data13", "sdi_data2p", NULL, "gpio_131",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA14, 132,
+                "dss_data14", "sdi_data3n", NULL, "gpio_132",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA15, 133,
+                "dss_data15", "sdi_data3p", NULL, "gpio_133",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA16, 46,
+                "dss_data16", NULL, NULL, "gpio_46",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA17, 47,
+                "dss_data17", NULL, NULL, "gpio_47",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA1, 41,
+                "dss_data1", "uart1_rts", NULL, "gpio_41",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA2, 42,
+                "dss_data2", "uart1_tx", NULL, "gpio_42",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA3, 43,
+                "dss_data3", "uart1_rx", NULL, "gpio_43",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA4, 44,
+                "dss_data4", "uart3_rx_irrx", NULL, "gpio_44",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA5, 45,
+                "dss_data5", "uart3_tx_irtx", NULL, "gpio_45",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA6, 144,
+                "dss_data6", NULL, NULL, "gpio_144",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA7, 147,
+                "dss_data7", NULL, NULL, "gpio_147",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA8, 38,
+                "dss_data8", NULL, NULL, "gpio_38",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_DATA9, 39,
+                "dss_data9", NULL, NULL, "gpio_39",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(DSS_HSYNC, 110,
+                "dss_hsync", NULL, NULL, "gpio_110",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_113, 113,
+                "gpio_113", "mcbsp2_clkx", NULL, "gpio_113",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_114, 114,
+                "gpio_114", "mcbsp2_fsx", NULL, "gpio_114",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_115, 115,
+                "gpio_115", "mcbsp2_dr", NULL, "gpio_115",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_116, 116,
+                "gpio_116", "mcbsp2_dx", NULL, "gpio_116",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_128, 128,
+                "gpio_128", NULL, "sti_din", "gpio_128",
+                NULL, "sys_boot0", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_129, 129,
+                "gpio_129", NULL, "sti_dout", "gpio_129",
+                NULL, "sys_boot1", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_130, 130,
+                "gpio_130", NULL, NULL, "gpio_130",
+                "jtag_emu2", "sys_boot2", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_131, 131,
+                "gpio_131", NULL, NULL, "gpio_131",
+                "jtag_emu3", "sys_boot3", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_132, 132,
+                "gpio_132", NULL, NULL, "gpio_132",
+                NULL, "sys_boot4", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_133, 133,
+                "gpio_133", NULL, NULL, "gpio_133",
+                NULL, "sys_boot5", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_134, 134,
+                "gpio_134", "ccp_datn", NULL, "gpio_134",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_135, 135,
+                "gpio_135", "ccp_datp", NULL, "gpio_135",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_136, 136,
+                "gpio_136", "ccp_clkn", NULL, "gpio_136",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_137, 137,
+                "gpio_137", "ccp_clkp", NULL, "gpio_137",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_138, 138,
+                "gpio_138", "spi3_clk", NULL, "gpio_138",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_139, 139,
+                "gpio_139", "spi3_cs0", "sys_ndmareq3", "gpio_139",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_140, 140,
+                "gpio_140", "spi3_simo", "sys_ndmareq4", "gpio_140",
+                NULL, NULL, "etk_d14", "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_141, 141,
+                "gpio_141", "spi3_somi", NULL, "gpio_141",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_142, 142,
+                "gpio_142", "spi3_cs1", "sys_ndmareq2", "gpio_142",
+                NULL, NULL, "etk_d15", "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_148, 148,
+                "gpio_148", "mcbsp5_fsx", NULL, "gpio_148",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_149, 149,
+                "gpio_149", "mcbsp5_dx", NULL, "gpio_149",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_150, 150,
+                "gpio_150", "mcbsp5_dr", NULL, "gpio_150",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_151, 151,
+                "gpio_151", "sys_pwrok", NULL, "gpio_151",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_152, 152,
+                "gpio_152", "uart1_cts", "sys_ndmareq1", "gpio_152",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_153, 153,
+                "gpio_153", "uart1_rx", "sys_ndmareq0", "gpio_153",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_154, 154,
+                "gpio_154", "mcbsp5_clkx", NULL, "gpio_154",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_63, 63,
+                "gpio_63", "mcbsp4_clkx", NULL, "gpio_63",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_78, 78,
+                "gpio_78", NULL, "uart2_rts", "gpio_78",
+                "uart3_rts_sd", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_79, 79,
+                "gpio_79", "secure_indicator", "uart2_tx", "gpio_79",
+                "uart3_tx_irtx", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_7, 7,
+                "gpio_7", NULL, "uart2_cts", "gpio_7",
+                "uart3_cts_rctx", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPIO_80, 80,
+                "gpio_80", NULL, "uart2_rx", "gpio_80",
+                "uart3_rx_irrx", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_A10, 3,
+                "gpmc_a10", NULL, "sys_ndmareq0", "gpio_3",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_A1, 31,
+                "gpmc_a1", NULL, NULL, "gpio_31",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_A2, 30,
+                "gpmc_a2", NULL, NULL, "gpio_30",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_A3, 29,
+                "gpmc_a3", NULL, NULL, "gpio_29",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_A4, 49,
+                "gpmc_a4", NULL, NULL, "gpio_49",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_A5, 53,
+                "gpmc_a5", NULL, NULL, "gpio_53",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_A6, 52,
+                "gpmc_a6", NULL, NULL, "gpio_52",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_A7, 6,
+                "gpmc_a7", NULL, NULL, "gpio_6",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_A8, 5,
+                "gpmc_a8", NULL, NULL, "gpio_5",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_A9, 4,
+                "gpmc_a9", NULL, "sys_ndmareq1", "gpio_4",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_CLK, 21,
+                "gpmc_clk", NULL, NULL, "gpio_21",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_D10, 18,
+                "gpmc_d10", NULL, NULL, "gpio_18",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_D11, 57,
+                "gpmc_d11", NULL, NULL, "gpio_57",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_D12, 77,
+                "gpmc_d12", NULL, NULL, "gpio_77",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_D13, 76,
+                "gpmc_d13", NULL, NULL, "gpio_76",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_D14, 55,
+                "gpmc_d14", NULL, NULL, "gpio_55",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_D15, 54,
+                "gpmc_d15", NULL, NULL, "gpio_54",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_D8, 20,
+                "gpmc_d8", NULL, NULL, "gpio_20",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_D9, 19,
+                "gpmc_d9", NULL, NULL, "gpio_19",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_NCS1, 22,
+                "gpmc_ncs1", NULL, NULL, "gpio_22",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_NCS2, 23,
+                "gpmc_ncs2", NULL, NULL, "gpio_23",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_NCS3, 24,
+                "gpmc_ncs3", "gpmc_io_dir", NULL, "gpio_24",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_NCS4, 25,
+                "gpmc_ncs4", NULL, NULL, "gpio_25",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_NCS5, 26,
+                "gpmc_ncs5", NULL, NULL, "gpio_26",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_NCS6, 27,
+                "gpmc_ncs6", NULL, NULL, "gpio_27",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_NCS7, 28,
+                "gpmc_ncs7", "gpmc_io_dir", NULL, "gpio_28",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_WAIT1, 33,
+                "gpmc_wait1", NULL, NULL, "gpio_33",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_WAIT2, 34,
+                "gpmc_wait2", NULL, NULL, "gpio_34",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(GPMC_WAIT3, 35,
+                "gpmc_wait3", NULL, NULL, "gpio_35",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(HDQ_SIO, 101,
+                "hdq_sio", "usb2_tllse0", "sys_altclk", "gpio_101",
+                "uart3_rx_irrx", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(I2C1_SCL, 50,
+                "i2c1_scl", NULL, NULL, "gpio_50",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(I2C1_SDA, 51,
+                "i2c1_sda", NULL, NULL, "gpio_51",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(I2C2_SCL, 99,
+                "i2c2_scl", NULL, NULL, "gpio_99",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(I2C2_SDA, 100,
+                "i2c2_sda", NULL, NULL, "gpio_100",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(JTAG_EMU0, 127,
+                "jtag_emu0", "secure_indicator", NULL, "gpio_127",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(JTAG_EMU1, 126,
+                "jtag_emu1", NULL, NULL, "gpio_126",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP1_CLKR, 92,
+                "mcbsp1_clkr", "ssi2_dat_tx", NULL, "gpio_92",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP1_CLKX, 98,
+                "mcbsp1_clkx", "ssi2_wake", NULL, "gpio_98",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP1_DR, 95,
+                "mcbsp1_dr", "ssi2_dat_rx", NULL, "gpio_95",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP1_DX, 94,
+                "mcbsp1_dx", "ssi2_rdy_tx", NULL, "gpio_94",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP1_FSR, 93,
+                "mcbsp1_fsr", "ssi2_flag_tx", NULL, "gpio_93",
+                "spi2_cs1", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP1_FSX, 97,
+                "mcbsp1_fsx", "ssi2_rdy_rx", NULL, "gpio_97",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP2_CLKX, 147,
+                "mcbsp2_clkx", "sdi_clkp", "dss_data23", "gpio_147",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP2_DR, 144,
+                "mcbsp2_dr", "sdi_clkn", "dss_data22", "gpio_144",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP3_CLKX, 71,
+                "mcbsp3_clkx", NULL, NULL, "gpio_71",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP3_DR, 73,
+                "mcbsp3_dr", NULL, NULL, "gpio_73",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP3_DX, 74,
+                "mcbsp3_dx", NULL, "sti_clk", "gpio_74",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP3_FSX, 72,
+                "mcbsp3_fsx", NULL, NULL, "gpio_72",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(MCBSP_CLKS, 96,
+                "mcbsp_clks", "ssi2_flag_rx", NULL, "gpio_96",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC1_CLKO, 0,
+                "sdmmc1_clko", "ms_clko", NULL, NULL,
+                NULL, "hw_dbg9", "hw_dbg3", "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC1_CMD, 0,
+                "sdmmc1_cmd", "ms_bs", NULL, NULL,
+                NULL, "hw_dbg8", "hw_dbg2", "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC1_DAT0, 0,
+                "sdmmc1_dat0", "ms_dat0", NULL, NULL,
+                NULL, "hw_dbg7", "hw_dbg1", "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC1_DAT1, 75,
+                "sdmmc1_dat1", "ms_dat1", NULL, "gpio_75",
+                NULL, "hw_dbg6", "hw_dbg0", "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC1_DAT2, 0,
+                "sdmmc1_dat2", "ms_dat2", NULL, NULL,
+                NULL, "hw_dbg5", "hw_dbg10", "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC1_DAT3, 0,
+                "sdmmc1_dat3", "ms_dat3", NULL, NULL,
+                NULL, "hw_dbg4", "hw_dbg11", "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC2_CLKO, 13,
+                "sdmmc2_clko", NULL, NULL, "gpio_13",
+                NULL, "spi3_clk", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC2_CMD, 15,
+                "sdmmc2_cmd", "usb2_rcv", NULL, "gpio_15",
+                NULL, "spi3_simo", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC2_DAT0, 16,
+                "sdmmc2_dat0", "usb2_tllse0", NULL, "gpio_16",
+                NULL, "spi3_somi", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC2_DAT1, 58,
+                "sdmmc2_dat1", "usb2_txen", NULL, "gpio_58",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC2_DAT2, 17,
+                "sdmmc2_dat2", "usb2_dat", NULL, "gpio_17",
+                NULL, "spi3_cs1", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDMMC2_DAT3, 14,
+                "sdmmc2_dat3", "usb2_se0", NULL, "gpio_14",
+                NULL, "spi3_cs0", NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDRC_A12, 2,
+                "sdrc_a12", NULL, NULL, "gpio_2",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDRC_A13, 1,
+                "sdrc_a13", NULL, NULL, "gpio_1",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDRC_A14, 0,
+                "sdrc_a14", NULL, NULL, "gpio_0",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDRC_CKE1, 36,
+                "sdrc_cke1", NULL, NULL, "gpio_36",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SDRC_NCS1, 37,
+                "sdrc_ncs1", NULL, NULL, "gpio_37",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI1_CLK, 81,
+                "spi1_clk", NULL, NULL, "gpio_81",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI1_CS0, 84,
+                "spi1_cs0", NULL, NULL, "gpio_84",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI1_CS1, 85,
+                "spi1_cs1", NULL, NULL, "gpio_85",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI1_CS2, 86,
+                "spi1_cs2", NULL, NULL, "gpio_86",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI1_CS3, 87,
+                "spi1_cs3", "spi2_cs1", NULL, "gpio_87",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI1_SIMO, 82,
+                "spi1_simo", NULL, NULL, "gpio_82",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI1_SOMI, 83,
+                "spi1_somi", NULL, NULL, "gpio_83",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI2_CLK, 88,
+                "spi2_clk", "gpt9_pwm_evt", NULL, "gpio_88",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI2_CS0, 91,
+                "spi2_cs0", "gpt12_pwm_evt", NULL, "gpio_91",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI2_SIMO, 89,
+                "spi2_simo", "gpt10_pwm_evt", NULL, "gpio_89",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SPI2_SOMI, 90,
+                "spi2_somi", "gpt11_pwm_evt", NULL, "gpio_90",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SSI1_DAT_RX, 62,
+                "ssi1_dat_rx", "uart1_rx", "usb1_dat", "gpio_62",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SSI1_DAT_TX, 59,
+                "ssi1_dat_tx", "uart1_tx", "usb1_se0", "gpio_59",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SSI1_FLAG_RX, 64,
+                "ssi1_flag_rx", "mcbsp4_dr", NULL, "gpio_64",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SSI1_FLAG_TX, 60,
+                "ssi1_flag_tx", "uart1_rts", "usb1_rcv", "gpio_60",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SSI1_RDY_RX, 65,
+                "ssi1_rdy_rx", "mcbsp4_dx", NULL, "gpio_65",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SSI1_RDY_TX, 61,
+                "ssi1_rdy_tx", "uart1_cts", "usb1_txen", "gpio_61",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SSI1_WAKE, 66,
+                "ssi1_wake", "mcbsp4_fsx", NULL, "gpio_66",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SYS_CLKOUT, 111,
+                "sys_clkout", NULL, NULL, "gpio_111",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SYS_DRM_MSECURE, 118,
+                "sys_drm_msecure", NULL, "sys_ndmareq6", "gpio_118",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SYS_NIRQ0, 56,
+                "sys_nirq0", NULL, NULL, "gpio_56",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(SYS_NIRQ1, 125,
+                "sys_nirq1", NULL, "sys_ndmareq5", "gpio_125",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART1_CTS, 32,
+                "uart1_cts", "sdi_vsync", "dss_data18", "gpio_32",
+                "mcbsp5_clkx", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART1_RTS, 8,
+                "uart1_rts", "sdi_hsync", "dss_data19", "gpio_8",
+                "mcbsp5_fsx", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART1_RX, 10,
+                "uart1_rx", "sdi_stp", "dss_data21", "gpio_10",
+                "mcbsp5_dr", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART1_TX, 9,
+                "uart1_tx", "sdi_den", "dss_data20", "gpio_9",
+                "mcbsp5_dx", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART2_CTS, 67,
+                "uart2_cts", "usb1_rcv", "gpt9_pwm_evt", "gpio_67",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART2_RTS, 68,
+                "uart2_rts", "usb1_txen", "gpt10_pwm_evt", "gpio_68",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART2_RX, 70,
+                "uart2_rx", "usb1_dat", "gpt12_pwm_evt", "gpio_70",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART2_TX, 69,
+                "uart2_tx", "usb1_se0", "gpt11_pwm_evt", "gpio_69",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART3_CTS_RCTX, 102,
+                "uart3_cts_rctx", "uart3_rx_irrx", NULL, "gpio_102",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART3_RTS_SD, 103,
+                "uart3_rts_sd", "uart3_tx_irtx", NULL, "gpio_103",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART3_RX_IRRX, 105,
+                "uart3_rx_irrx", NULL, NULL, "gpio_105",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(UART3_TX_IRTX, 104,
+                "uart3_tx_irtx", "uart3_cts_rctx", NULL, "gpio_104",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_CLK, 120,
+                "usb0hs_clk", NULL, NULL, "gpio_120",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_DATA0, 0,
+                "usb0hs_data0", "uart3_tx_irtx", NULL, NULL,
+                "usb0_txen", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_DATA1, 0,
+                "usb0hs_data1", "uart3_rx_irrx", NULL, NULL,
+                "usb0_dat", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_DATA2, 0,
+                "usb0hs_data2", "uart3_rts_sd", NULL, NULL,
+                "usb0_se0", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_DATA3, 106,
+                "usb0hs_data3", NULL, "uart3_cts_rctx", "gpio_106",
+                "usb0_puen", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_DATA4, 107,
+                "usb0hs_data4", "mcbsp2_dr", NULL, "gpio_107",
+                "usb0_vp", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_DATA5, 108,
+                "usb0hs_data5", "mcbsp2_dx", NULL, "gpio_108",
+                "usb0_vm", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_DATA6, 109,
+                "usb0hs_data6", "mcbsp2_fsx", NULL, "gpio_109",
+                "usb0_rcv", NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_DATA7, 124,
+                "usb0hs_data7", "mcbsp2_clkx", NULL, "gpio_124",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_DIR, 121,
+                "usb0hs_dir", NULL, NULL, "gpio_121",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_NXT, 123,
+                "usb0hs_nxt", NULL, NULL, "gpio_123",
+                NULL, NULL, NULL, "safe_mode"),
+        _OMAP2430_MUXENTRY(USB0HS_STP, 122,
+                "usb0hs_stp", NULL, NULL, "gpio_122",
+                NULL, NULL, NULL, "safe_mode"),
+        { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+
+/*
+ * Balls for POP package
+ * 447-pin s-PBGA Package, 0.00mm Ball Pitch (Bottom)
+ */
+#ifdef CONFIG_DEBUG_FS
+struct omap_ball __initdata omap2430_pop_ball[] = {
+        _OMAP2430_BALLENTRY(CAM_D0, "t8", NULL),
+        _OMAP2430_BALLENTRY(CAM_D1, "t4", NULL),
+        _OMAP2430_BALLENTRY(CAM_D10, "r4", NULL),
+        _OMAP2430_BALLENTRY(CAM_D11, "w3", NULL),
+        _OMAP2430_BALLENTRY(CAM_D2, "r2", NULL),
+        _OMAP2430_BALLENTRY(CAM_D3, "u3", NULL),
+        _OMAP2430_BALLENTRY(CAM_D4, "u2", NULL),
+        _OMAP2430_BALLENTRY(CAM_D5, "v1", NULL),
+        _OMAP2430_BALLENTRY(CAM_D6, "t3", NULL),
+        _OMAP2430_BALLENTRY(CAM_D7, "r3", NULL),
+        _OMAP2430_BALLENTRY(CAM_D8, "u7", NULL),
+        _OMAP2430_BALLENTRY(CAM_D9, "t7", NULL),
+        _OMAP2430_BALLENTRY(CAM_HS, "p2", NULL),
+        _OMAP2430_BALLENTRY(CAM_LCLK, "r7", NULL),
+        _OMAP2430_BALLENTRY(CAM_VS, "n2", NULL),
+        _OMAP2430_BALLENTRY(CAM_XCLK, "p3", NULL),
+        _OMAP2430_BALLENTRY(DSS_ACBIAS, "y3", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA0, "v8", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA1, "w1", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA10, "k25", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA11, "j25", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA12, "k24", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA13, "j24", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA14, "h25", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA15, "g25", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA16, "ac3", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA17, "y7", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA2, "u8", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA3, "u4", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA4, "v3", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA5, "aa4", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA6, "w8", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA7, "y1", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA8, "aa2", NULL),
+        _OMAP2430_BALLENTRY(DSS_DATA9, "ab4", NULL),
+        _OMAP2430_BALLENTRY(DSS_HSYNC, "v2", NULL),
+        _OMAP2430_BALLENTRY(GPIO_113, "ad16", NULL),
+        _OMAP2430_BALLENTRY(GPIO_114, "ac10", NULL),
+        _OMAP2430_BALLENTRY(GPIO_115, "ad13", NULL),
+        _OMAP2430_BALLENTRY(GPIO_116, "ae15", NULL),
+        _OMAP2430_BALLENTRY(GPIO_128, "p1", NULL),
+        _OMAP2430_BALLENTRY(GPIO_129, "r1", NULL),
+        _OMAP2430_BALLENTRY(GPIO_130, "p7", NULL),
+        _OMAP2430_BALLENTRY(GPIO_131, "l8", NULL),
+        _OMAP2430_BALLENTRY(GPIO_132, "w24", NULL),
+        _OMAP2430_BALLENTRY(GPIO_133, "aa24", NULL),
+        _OMAP2430_BALLENTRY(GPIO_134, "ae12", NULL),
+        _OMAP2430_BALLENTRY(GPIO_135, "ae11", NULL),
+        _OMAP2430_BALLENTRY(GPIO_136, "ad12", NULL),
+        _OMAP2430_BALLENTRY(GPIO_137, "ad11", NULL),
+        _OMAP2430_BALLENTRY(GPIO_138, "y12", NULL),
+        _OMAP2430_BALLENTRY(GPIO_139, "ad17", NULL),
+        _OMAP2430_BALLENTRY(GPIO_140, "l7", NULL),
+        _OMAP2430_BALLENTRY(GPIO_141, "ac24", NULL),
+        _OMAP2430_BALLENTRY(GPIO_142, "m3", NULL),
+        _OMAP2430_BALLENTRY(GPIO_148, "af12", NULL),
+        _OMAP2430_BALLENTRY(GPIO_149, "k7", NULL),
+        _OMAP2430_BALLENTRY(GPIO_150, "m1", NULL),
+        _OMAP2430_BALLENTRY(GPIO_151, "ad14", NULL),
+        _OMAP2430_BALLENTRY(GPIO_152, "ad18", NULL),
+        _OMAP2430_BALLENTRY(GPIO_153, "u24", NULL),
+        _OMAP2430_BALLENTRY(GPIO_154, "ae16", NULL),
+        _OMAP2430_BALLENTRY(GPIO_63, "n3", NULL),
+        _OMAP2430_BALLENTRY(GPIO_7, "ac23", NULL),
+        _OMAP2430_BALLENTRY(GPIO_78, "ad10", NULL),
+        _OMAP2430_BALLENTRY(GPIO_79, "ae10", NULL),
+        _OMAP2430_BALLENTRY(GPIO_80, "ae13", NULL),
+        _OMAP2430_BALLENTRY(GPMC_A1, "a9", NULL),
+        _OMAP2430_BALLENTRY(GPMC_A10, "g12", NULL),
+        _OMAP2430_BALLENTRY(GPMC_A2, "b8", NULL),
+        _OMAP2430_BALLENTRY(GPMC_A3, "g10", NULL),
+        _OMAP2430_BALLENTRY(GPMC_A4, "g11", NULL),
+        _OMAP2430_BALLENTRY(GPMC_A5, "a10", NULL),
+        _OMAP2430_BALLENTRY(GPMC_A6, "g13", NULL),
+        _OMAP2430_BALLENTRY(GPMC_A7, "a6", NULL),
+        _OMAP2430_BALLENTRY(GPMC_A8, "h1", NULL),
+        _OMAP2430_BALLENTRY(GPMC_A9, "c8", NULL),
+        _OMAP2430_BALLENTRY(GPMC_CLK, "n1", "l1"),
+        _OMAP2430_BALLENTRY(GPMC_D10, "d1", "n1"),
+        _OMAP2430_BALLENTRY(GPMC_D11, "d2", "p2"),
+        _OMAP2430_BALLENTRY(GPMC_D12, "e1", "p1"),
+        _OMAP2430_BALLENTRY(GPMC_D13, "e3", "m1"),
+        _OMAP2430_BALLENTRY(GPMC_D14, "c7", "j2"),
+        _OMAP2430_BALLENTRY(GPMC_D15, "f3", "k2"),
+        _OMAP2430_BALLENTRY(GPMC_D8, "e2", "r1"),
+        _OMAP2430_BALLENTRY(GPMC_D9, "ab1", "t1"),
+        _OMAP2430_BALLENTRY(GPMC_NCS1, "ac1", "w1"),
+        _OMAP2430_BALLENTRY(GPMC_NCS2, "c6", NULL),
+        _OMAP2430_BALLENTRY(GPMC_NCS3, "b9", NULL),
+        _OMAP2430_BALLENTRY(GPMC_NCS4, "b4", NULL),
+        _OMAP2430_BALLENTRY(GPMC_NCS5, "a4", NULL),
+        _OMAP2430_BALLENTRY(GPMC_NCS6, "f1", NULL),
+        _OMAP2430_BALLENTRY(GPMC_NCS7, "a7", NULL),
+        _OMAP2430_BALLENTRY(GPMC_WAIT1, "j1", "y8"),
+        _OMAP2430_BALLENTRY(GPMC_WAIT2, "b7", NULL),
+        _OMAP2430_BALLENTRY(GPMC_WAIT3, "g14", NULL),
+        _OMAP2430_BALLENTRY(HDQ_SIO, "h20", NULL),
+        _OMAP2430_BALLENTRY(I2C1_SCL, "y17", NULL),
+        _OMAP2430_BALLENTRY(I2C1_SDA, "ac19", NULL),
+        _OMAP2430_BALLENTRY(I2C2_SCL, "n7", NULL),
+        _OMAP2430_BALLENTRY(I2C2_SDA, "m4", NULL),
+        _OMAP2430_BALLENTRY(JTAG_EMU0, "e25", NULL),
+        _OMAP2430_BALLENTRY(JTAG_EMU1, "e24", NULL),
+        _OMAP2430_BALLENTRY(MCBSP1_CLKR, "ab2", NULL),
+        _OMAP2430_BALLENTRY(MCBSP1_CLKX, "y9", NULL),
+        _OMAP2430_BALLENTRY(MCBSP1_DR, "af3", NULL),
+        _OMAP2430_BALLENTRY(MCBSP1_DX, "aa1", NULL),
+        _OMAP2430_BALLENTRY(MCBSP1_FSR, "ad5", NULL),
+        _OMAP2430_BALLENTRY(MCBSP1_FSX, "ab3", NULL),
+        _OMAP2430_BALLENTRY(MCBSP2_CLKX, "j26", NULL),
+        _OMAP2430_BALLENTRY(MCBSP2_DR, "k26", NULL),
+        _OMAP2430_BALLENTRY(MCBSP3_CLKX, "ac9", NULL),
+        _OMAP2430_BALLENTRY(MCBSP3_DR, "ae2", NULL),
+        _OMAP2430_BALLENTRY(MCBSP3_DX, "af4", NULL),
+        _OMAP2430_BALLENTRY(MCBSP3_FSX, "ae4", NULL),
+        _OMAP2430_BALLENTRY(MCBSP_CLKS, "ad6", NULL),
+        _OMAP2430_BALLENTRY(SDMMC1_CLKO, "n23", NULL),
+        _OMAP2430_BALLENTRY(SDMMC1_CMD, "l23", NULL),
+        _OMAP2430_BALLENTRY(SDMMC1_DAT0, "m24", NULL),
+        _OMAP2430_BALLENTRY(SDMMC1_DAT1, "p23", NULL),
+        _OMAP2430_BALLENTRY(SDMMC1_DAT2, "t20", NULL),
+        _OMAP2430_BALLENTRY(SDMMC1_DAT3, "r20", NULL),
+        _OMAP2430_BALLENTRY(SDMMC2_CLKO, "v26", NULL),
+        _OMAP2430_BALLENTRY(SDMMC2_CMD, "w20", NULL),
+        _OMAP2430_BALLENTRY(SDMMC2_DAT0, "v23", NULL),
+        _OMAP2430_BALLENTRY(SDMMC2_DAT1, "y24", NULL),
+        _OMAP2430_BALLENTRY(SDMMC2_DAT2, "v25", NULL),
+        _OMAP2430_BALLENTRY(SDMMC2_DAT3, "v24", NULL),
+        _OMAP2430_BALLENTRY(SDRC_A12, "w26", "r21"),
+        _OMAP2430_BALLENTRY(SDRC_A13, "af20", "aa15"),
+        _OMAP2430_BALLENTRY(SDRC_A14, "af16", "y12"),
+        _OMAP2430_BALLENTRY(SDRC_CKE1, "af15", "y13"),
+        _OMAP2430_BALLENTRY(SDRC_NCS1, "aa25", "t20"),
+        _OMAP2430_BALLENTRY(SPI1_CLK, "y18", NULL),
+        _OMAP2430_BALLENTRY(SPI1_CS0, "u1", NULL),
+        _OMAP2430_BALLENTRY(SPI1_CS1, "af19", NULL),
+        _OMAP2430_BALLENTRY(SPI1_CS2, "ae19", NULL),
+        _OMAP2430_BALLENTRY(SPI1_CS3, "h24", NULL),
+        _OMAP2430_BALLENTRY(SPI1_SIMO, "ad15", NULL),
+        _OMAP2430_BALLENTRY(SPI1_SOMI, "ae17", NULL),
+        _OMAP2430_BALLENTRY(SPI2_CLK, "y20", NULL),
+        _OMAP2430_BALLENTRY(SPI2_CS0, "y19", NULL),
+        _OMAP2430_BALLENTRY(SPI2_SIMO, "ac20", NULL),
+        _OMAP2430_BALLENTRY(SPI2_SOMI, "ad19", NULL),
+        _OMAP2430_BALLENTRY(SSI1_DAT_RX, "aa26", NULL),
+        _OMAP2430_BALLENTRY(SSI1_DAT_TX, "ad24", NULL),
+        _OMAP2430_BALLENTRY(SSI1_FLAG_RX, "ad23", NULL),
+        _OMAP2430_BALLENTRY(SSI1_FLAG_TX, "ab24", NULL),
+        _OMAP2430_BALLENTRY(SSI1_RDY_RX, "ab25", NULL),
+        _OMAP2430_BALLENTRY(SSI1_RDY_TX, "y25", NULL),
+        _OMAP2430_BALLENTRY(SSI1_WAKE, "ac25", NULL),
+        _OMAP2430_BALLENTRY(SYS_CLKOUT, "r25", NULL),
+        _OMAP2430_BALLENTRY(SYS_DRM_MSECURE, "ae3", NULL),
+        _OMAP2430_BALLENTRY(SYS_NIRQ0, "w25", NULL),
+        _OMAP2430_BALLENTRY(SYS_NIRQ1, "ad21", NULL),
+        _OMAP2430_BALLENTRY(UART1_CTS, "p24", NULL),
+        _OMAP2430_BALLENTRY(UART1_RTS, "p25", NULL),
+        _OMAP2430_BALLENTRY(UART1_RX, "n24", NULL),
+        _OMAP2430_BALLENTRY(UART1_TX, "r24", NULL),
+        _OMAP2430_BALLENTRY(UART2_CTS, "u25", NULL),
+        _OMAP2430_BALLENTRY(UART2_RTS, "t23", NULL),
+        _OMAP2430_BALLENTRY(UART2_RX, "t24", NULL),
+        _OMAP2430_BALLENTRY(UART2_TX, "u20", NULL),
+        _OMAP2430_BALLENTRY(UART3_CTS_RCTX, "m2", NULL),
+        _OMAP2430_BALLENTRY(UART3_RTS_SD, "k2", NULL),
+        _OMAP2430_BALLENTRY(UART3_RX_IRRX, "l3", NULL),
+        _OMAP2430_BALLENTRY(UART3_TX_IRTX, "l2", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_CLK, "ae8", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_DATA0, "ad4", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_DATA1, "ae6", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_DATA2, "af9", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_DATA3, "ad9", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_DATA4, "y11", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_DATA5, "ad7", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_DATA6, "ae7", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_DATA7, "ac7", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_DIR, "ad8", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_NXT, "ae9", NULL),
+        _OMAP2430_BALLENTRY(USB0HS_STP, "ae5", NULL),
+        { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define omap2430_pop_ball        NULL
+#endif
+
+int __init omap2430_mux_init(struct omap_board_mux *board_subset, int flags)
+{
+        struct omap_ball *package_balls = NULL;
+
+        switch (flags & OMAP_PACKAGE_MASK) {
+        case OMAP_PACKAGE_ZAC:
+                package_balls = omap2430_pop_ball;
+                break;
+        default:
+                pr_warning("mux: No ball data available for omap2420 package\n");
+        }
+
+        return omap_mux_init(OMAP2430_CONTROL_PADCONF_MUX_PBASE,
+                             OMAP2430_CONTROL_PADCONF_MUX_SIZE,
+                                omap2430_muxmodes, NULL, board_subset,
+                                package_balls);
+}
diff --git a/arch/arm/mach-omap2/mux2430.h b/arch/arm/mach-omap2/mux2430.h
new file mode 100644
index 000000000000..adbea0d03e08
--- /dev/null
+++ b/arch/arm/mach-omap2/mux2430.h
@@ -0,0 +1,370 @@
+/*
+ * Copyright (C) 2009 Nokia
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define OMAP2430_CONTROL_PADCONF_MUX_PBASE                      0x49002030LU
+
+#define OMAP2430_MUX(mode0, mux_value)                                  \
+{                                                                       \
+        .reg_offset     = (OMAP2430_CONTROL_PADCONF_##mode0##_OFFSET),  \
+        .value          = (mux_value),                                  \
+}
+
+/*
+ * OMAP2430 CONTROL_PADCONF* register offsets for pin-muxing
+ *
+ * Extracted from the TRM.  Add 0x49002030 to these values to get the
+ * absolute addresses.  The name in the macro is the mode-0 name of
+ * the pin.  NOTE: These registers are 8-bits wide.
+ *
+ * Note that these defines use SDMMC instead of MMC for compability
+ * with signal names used in 3630.
+ */
+#define OMAP2430_CONTROL_PADCONF_GPMC_CLK_OFFSET                0x000
+#define OMAP2430_CONTROL_PADCONF_GPMC_NCS0_OFFSET               0x001
+#define OMAP2430_CONTROL_PADCONF_GPMC_NCS1_OFFSET               0x002
+#define OMAP2430_CONTROL_PADCONF_GPMC_NCS2_OFFSET               0x003
+#define OMAP2430_CONTROL_PADCONF_GPMC_NCS3_OFFSET               0x004
+#define OMAP2430_CONTROL_PADCONF_GPMC_NCS4_OFFSET               0x005
+#define OMAP2430_CONTROL_PADCONF_GPMC_NCS5_OFFSET               0x006
+#define OMAP2430_CONTROL_PADCONF_GPMC_NCS6_OFFSET               0x007
+#define OMAP2430_CONTROL_PADCONF_GPMC_NCS7_OFFSET               0x008
+#define OMAP2430_CONTROL_PADCONF_GPMC_NADV_ALE_OFFSET           0x009
+#define OMAP2430_CONTROL_PADCONF_GPMC_NOE_NRE_OFFSET            0x00a
+#define OMAP2430_CONTROL_PADCONF_GPMC_NWE_OFFSET                0x00b
+#define OMAP2430_CONTROL_PADCONF_GPMC_NBE0_CLE_OFFSET           0x00c
+#define OMAP2430_CONTROL_PADCONF_GPMC_NBE1_OFFSET               0x00d
+#define OMAP2430_CONTROL_PADCONF_GPMC_NWP_OFFSET                0x00e
+#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT0_OFFSET              0x00f
+#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT1_OFFSET              0x010
+#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT2_OFFSET              0x011
+#define OMAP2430_CONTROL_PADCONF_GPMC_WAIT3_OFFSET              0x012
+#define OMAP2430_CONTROL_PADCONF_SDRC_CLK_OFFSET                0x013
+#define OMAP2430_CONTROL_PADCONF_SDRC_NCLK_OFFSET               0x014
+#define OMAP2430_CONTROL_PADCONF_SDRC_NCS0_OFFSET               0x015
+#define OMAP2430_CONTROL_PADCONF_SDRC_NCS1_OFFSET               0x016
+#define OMAP2430_CONTROL_PADCONF_SDRC_CKE0_OFFSET               0x017
+#define OMAP2430_CONTROL_PADCONF_SDRC_CKE1_OFFSET               0x018
+#define OMAP2430_CONTROL_PADCONF_SDRC_NRAS_OFFSET               0x019
+#define OMAP2430_CONTROL_PADCONF_SDRC_NCAS_OFFSET               0x01a
+#define OMAP2430_CONTROL_PADCONF_SDRC_NWE_OFFSET                0x01b
+#define OMAP2430_CONTROL_PADCONF_SDRC_DM0_OFFSET                0x01c
+#define OMAP2430_CONTROL_PADCONF_SDRC_DM1_OFFSET                0x01d
+#define OMAP2430_CONTROL_PADCONF_SDRC_DM2_OFFSET                0x01e
+#define OMAP2430_CONTROL_PADCONF_SDRC_DM3_OFFSET                0x01f
+#define OMAP2430_CONTROL_PADCONF_SDRC_DQS0_OFFSET               0x020
+#define OMAP2430_CONTROL_PADCONF_SDRC_DQS1_OFFSET               0x021
+#define OMAP2430_CONTROL_PADCONF_SDRC_DQS2_OFFSET               0x022
+#define OMAP2430_CONTROL_PADCONF_SDRC_DQS3_OFFSET               0x023
+#define OMAP2430_CONTROL_PADCONF_SDRC_A14_OFFSET                0x024
+#define OMAP2430_CONTROL_PADCONF_SDRC_A13_OFFSET                0x025
+#define OMAP2430_CONTROL_PADCONF_SDRC_A12_OFFSET                0x026
+#define OMAP2430_CONTROL_PADCONF_SDRC_BA1_OFFSET                0x027
+#define OMAP2430_CONTROL_PADCONF_SDRC_BA0_OFFSET                0x028
+#define OMAP2430_CONTROL_PADCONF_SDRC_A11_OFFSET                0x029
+#define OMAP2430_CONTROL_PADCONF_SDRC_A10_OFFSET                0x02a
+#define OMAP2430_CONTROL_PADCONF_SDRC_A9_OFFSET                 0x02b
+#define OMAP2430_CONTROL_PADCONF_SDRC_A8_OFFSET                 0x02c
+#define OMAP2430_CONTROL_PADCONF_SDRC_A7_OFFSET                 0x02d
+#define OMAP2430_CONTROL_PADCONF_SDRC_A6_OFFSET                 0x02e
+#define OMAP2430_CONTROL_PADCONF_SDRC_A5_OFFSET                 0x02f
+#define OMAP2430_CONTROL_PADCONF_SDRC_A4_OFFSET                 0x030
+#define OMAP2430_CONTROL_PADCONF_SDRC_A3_OFFSET                 0x031
+#define OMAP2430_CONTROL_PADCONF_SDRC_A2_OFFSET                 0x032
+#define OMAP2430_CONTROL_PADCONF_SDRC_A1_OFFSET                 0x033
+#define OMAP2430_CONTROL_PADCONF_SDRC_A0_OFFSET                 0x034
+#define OMAP2430_CONTROL_PADCONF_SDRC_D31_OFFSET                0x035
+#define OMAP2430_CONTROL_PADCONF_SDRC_D30_OFFSET                0x036
+#define OMAP2430_CONTROL_PADCONF_SDRC_D29_OFFSET                0x037
+#define OMAP2430_CONTROL_PADCONF_SDRC_D28_OFFSET                0x038
+#define OMAP2430_CONTROL_PADCONF_SDRC_D27_OFFSET                0x039
+#define OMAP2430_CONTROL_PADCONF_SDRC_D26_OFFSET                0x03a
+#define OMAP2430_CONTROL_PADCONF_SDRC_D25_OFFSET                0x03b
+#define OMAP2430_CONTROL_PADCONF_SDRC_D24_OFFSET                0x03c
+#define OMAP2430_CONTROL_PADCONF_SDRC_D23_OFFSET                0x03d
+#define OMAP2430_CONTROL_PADCONF_SDRC_D22_OFFSET                0x03e
+#define OMAP2430_CONTROL_PADCONF_SDRC_D21_OFFSET                0x03f
+#define OMAP2430_CONTROL_PADCONF_SDRC_D20_OFFSET                0x040
+#define OMAP2430_CONTROL_PADCONF_SDRC_D19_OFFSET                0x041
+#define OMAP2430_CONTROL_PADCONF_SDRC_D18_OFFSET                0x042
+#define OMAP2430_CONTROL_PADCONF_SDRC_D17_OFFSET                0x043
+#define OMAP2430_CONTROL_PADCONF_SDRC_D16_OFFSET                0x044
+#define OMAP2430_CONTROL_PADCONF_SDRC_D15_OFFSET                0x045
+#define OMAP2430_CONTROL_PADCONF_SDRC_D14_OFFSET                0x046
+#define OMAP2430_CONTROL_PADCONF_SDRC_D13_OFFSET                0x047
+#define OMAP2430_CONTROL_PADCONF_SDRC_D12_OFFSET                0x048
+#define OMAP2430_CONTROL_PADCONF_SDRC_D11_OFFSET                0x049
+#define OMAP2430_CONTROL_PADCONF_SDRC_D10_OFFSET                0x04a
+#define OMAP2430_CONTROL_PADCONF_SDRC_D9_OFFSET                 0x04b
+#define OMAP2430_CONTROL_PADCONF_SDRC_D8_OFFSET                 0x04c
+#define OMAP2430_CONTROL_PADCONF_SDRC_D7_OFFSET                 0x04d
+#define OMAP2430_CONTROL_PADCONF_SDRC_D6_OFFSET                 0x04e
+#define OMAP2430_CONTROL_PADCONF_SDRC_D5_OFFSET                 0x04f
+#define OMAP2430_CONTROL_PADCONF_SDRC_D4_OFFSET                 0x050
+#define OMAP2430_CONTROL_PADCONF_SDRC_D3_OFFSET                 0x051
+#define OMAP2430_CONTROL_PADCONF_SDRC_D2_OFFSET                 0x052
+#define OMAP2430_CONTROL_PADCONF_SDRC_D1_OFFSET                 0x053
+#define OMAP2430_CONTROL_PADCONF_SDRC_D0_OFFSET                 0x054
+#define OMAP2430_CONTROL_PADCONF_GPMC_A10_OFFSET                0x055
+#define OMAP2430_CONTROL_PADCONF_GPMC_A9_OFFSET                 0x056
+#define OMAP2430_CONTROL_PADCONF_GPMC_A8_OFFSET                 0x057
+#define OMAP2430_CONTROL_PADCONF_GPMC_A7_OFFSET                 0x058
+#define OMAP2430_CONTROL_PADCONF_GPMC_A6_OFFSET                 0x059
+#define OMAP2430_CONTROL_PADCONF_GPMC_A5_OFFSET                 0x05a
+#define OMAP2430_CONTROL_PADCONF_GPMC_A4_OFFSET                 0x05b
+#define OMAP2430_CONTROL_PADCONF_GPMC_A3_OFFSET                 0x05c
+#define OMAP2430_CONTROL_PADCONF_GPMC_A2_OFFSET                 0x05d
+#define OMAP2430_CONTROL_PADCONF_GPMC_A1_OFFSET                 0x05e
+#define OMAP2430_CONTROL_PADCONF_GPMC_D15_OFFSET                0x05f
+#define OMAP2430_CONTROL_PADCONF_GPMC_D14_OFFSET                0x060
+#define OMAP2430_CONTROL_PADCONF_GPMC_D13_OFFSET                0x061
+#define OMAP2430_CONTROL_PADCONF_GPMC_D12_OFFSET                0x062
+#define OMAP2430_CONTROL_PADCONF_GPMC_D11_OFFSET                0x063
+#define OMAP2430_CONTROL_PADCONF_GPMC_D10_OFFSET                0x064
+#define OMAP2430_CONTROL_PADCONF_GPMC_D9_OFFSET                 0x065
+#define OMAP2430_CONTROL_PADCONF_GPMC_D8_OFFSET                 0x066
+#define OMAP2430_CONTROL_PADCONF_GPMC_D7_OFFSET                 0x067
+#define OMAP2430_CONTROL_PADCONF_GPMC_D6_OFFSET                 0x068
+#define OMAP2430_CONTROL_PADCONF_GPMC_D5_OFFSET                 0x069
+#define OMAP2430_CONTROL_PADCONF_GPMC_D4_OFFSET                 0x06a
+#define OMAP2430_CONTROL_PADCONF_GPMC_D3_OFFSET                 0x06b
+#define OMAP2430_CONTROL_PADCONF_GPMC_D2_OFFSET                 0x06c
+#define OMAP2430_CONTROL_PADCONF_GPMC_D1_OFFSET                 0x06d
+#define OMAP2430_CONTROL_PADCONF_GPMC_D0_OFFSET                 0x06e
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA0_OFFSET               0x06f
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA1_OFFSET               0x070
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA2_OFFSET               0x071
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA3_OFFSET               0x072
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA4_OFFSET               0x073
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA5_OFFSET               0x074
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA6_OFFSET               0x075
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA7_OFFSET               0x076
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA8_OFFSET               0x077
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA9_OFFSET               0x078
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA10_OFFSET              0x079
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA11_OFFSET              0x07a
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA12_OFFSET              0x07b
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA13_OFFSET              0x07c
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA14_OFFSET              0x07d
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA15_OFFSET              0x07e
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA16_OFFSET              0x07f
+#define OMAP2430_CONTROL_PADCONF_DSS_DATA17_OFFSET              0x080
+#define OMAP2430_CONTROL_PADCONF_UART1_CTS_OFFSET               0x081
+#define OMAP2430_CONTROL_PADCONF_UART1_RTS_OFFSET               0x082
+#define OMAP2430_CONTROL_PADCONF_UART1_TX_OFFSET                0x083
+#define OMAP2430_CONTROL_PADCONF_UART1_RX_OFFSET                0x084
+#define OMAP2430_CONTROL_PADCONF_MCBSP2_DR_OFFSET               0x085
+#define OMAP2430_CONTROL_PADCONF_MCBSP2_CLKX_OFFSET             0x086
+#define OMAP2430_CONTROL_PADCONF_DSS_PCLK_OFFSET                0x087
+#define OMAP2430_CONTROL_PADCONF_DSS_VSYNC_OFFSET               0x088
+#define OMAP2430_CONTROL_PADCONF_DSS_HSYNC_OFFSET               0x089
+#define OMAP2430_CONTROL_PADCONF_DSS_ACBIAS_OFFSET              0x08a
+#define OMAP2430_CONTROL_PADCONF_SYS_NRESPWRON_OFFSET           0x08b
+#define OMAP2430_CONTROL_PADCONF_SYS_NRESWARM_OFFSET            0x08c
+#define OMAP2430_CONTROL_PADCONF_SYS_NIRQ0_OFFSET               0x08d
+#define OMAP2430_CONTROL_PADCONF_SYS_NIRQ1_OFFSET               0x08e
+#define OMAP2430_CONTROL_PADCONF_SYS_VMODE_OFFSET               0x08f
+#define OMAP2430_CONTROL_PADCONF_GPIO_128_OFFSET                0x090
+#define OMAP2430_CONTROL_PADCONF_GPIO_129_OFFSET                0x091
+#define OMAP2430_CONTROL_PADCONF_GPIO_130_OFFSET                0x092
+#define OMAP2430_CONTROL_PADCONF_GPIO_131_OFFSET                0x093
+#define OMAP2430_CONTROL_PADCONF_SYS_32K_OFFSET                 0x094
+#define OMAP2430_CONTROL_PADCONF_SYS_XTALIN_OFFSET              0x095
+#define OMAP2430_CONTROL_PADCONF_SYS_XTALOUT_OFFSET             0x096
+#define OMAP2430_CONTROL_PADCONF_GPIO_132_OFFSET                0x097
+#define OMAP2430_CONTROL_PADCONF_SYS_CLKREQ_OFFSET              0x098
+#define OMAP2430_CONTROL_PADCONF_SYS_CLKOUT_OFFSET              0x099
+#define OMAP2430_CONTROL_PADCONF_GPIO_151_OFFSET                0x09a
+#define OMAP2430_CONTROL_PADCONF_GPIO_133_OFFSET                0x09b
+#define OMAP2430_CONTROL_PADCONF_JTAG_EMU1_OFFSET               0x09c
+#define OMAP2430_CONTROL_PADCONF_JTAG_EMU0_OFFSET               0x09d
+#define OMAP2430_CONTROL_PADCONF_JTAG_NTRST_OFFSET              0x09e
+#define OMAP2430_CONTROL_PADCONF_JTAG_TCK_OFFSET                0x09f
+#define OMAP2430_CONTROL_PADCONF_JTAG_RTCK_OFFSET               0x0a0
+#define OMAP2430_CONTROL_PADCONF_JTAG_TMS_OFFSET                0x0a1
+#define OMAP2430_CONTROL_PADCONF_JTAG_TDI_OFFSET                0x0a2
+#define OMAP2430_CONTROL_PADCONF_JTAG_TDO_OFFSET                0x0a3
+#define OMAP2430_CONTROL_PADCONF_CAM_D9_OFFSET                  0x0a4
+#define OMAP2430_CONTROL_PADCONF_CAM_D8_OFFSET                  0x0a5
+#define OMAP2430_CONTROL_PADCONF_CAM_D7_OFFSET                  0x0a6
+#define OMAP2430_CONTROL_PADCONF_CAM_D6_OFFSET                  0x0a7
+#define OMAP2430_CONTROL_PADCONF_CAM_D5_OFFSET                  0x0a8
+#define OMAP2430_CONTROL_PADCONF_CAM_D4_OFFSET                  0x0a9
+#define OMAP2430_CONTROL_PADCONF_CAM_D3_OFFSET                  0x0aa
+#define OMAP2430_CONTROL_PADCONF_CAM_D2_OFFSET                  0x0ab
+#define OMAP2430_CONTROL_PADCONF_CAM_D1_OFFSET                  0x0ac
+#define OMAP2430_CONTROL_PADCONF_CAM_D0_OFFSET                  0x0ad
+#define OMAP2430_CONTROL_PADCONF_CAM_HS_OFFSET                  0x0ae
+#define OMAP2430_CONTROL_PADCONF_CAM_VS_OFFSET                  0x0af
+#define OMAP2430_CONTROL_PADCONF_CAM_LCLK_OFFSET                0x0b0
+#define OMAP2430_CONTROL_PADCONF_CAM_XCLK_OFFSET                0x0b1
+#define OMAP2430_CONTROL_PADCONF_CAM_D11_OFFSET                 0x0b2
+#define OMAP2430_CONTROL_PADCONF_CAM_D10_OFFSET                 0x0b3
+#define OMAP2430_CONTROL_PADCONF_GPIO_134_OFFSET                0x0b4
+#define OMAP2430_CONTROL_PADCONF_GPIO_135_OFFSET                0x0b5
+#define OMAP2430_CONTROL_PADCONF_GPIO_136_OFFSET                0x0b6
+#define OMAP2430_CONTROL_PADCONF_GPIO_137_OFFSET                0x0b7
+#define OMAP2430_CONTROL_PADCONF_GPIO_138_OFFSET                0x0b8
+#define OMAP2430_CONTROL_PADCONF_GPIO_139_OFFSET                0x0b9
+#define OMAP2430_CONTROL_PADCONF_GPIO_140_OFFSET                0x0ba
+#define OMAP2430_CONTROL_PADCONF_GPIO_141_OFFSET                0x0bb
+#define OMAP2430_CONTROL_PADCONF_GPIO_142_OFFSET                0x0bc
+#define OMAP2430_CONTROL_PADCONF_GPIO_154_OFFSET                0x0bd
+#define OMAP2430_CONTROL_PADCONF_GPIO_148_OFFSET                0x0be
+#define OMAP2430_CONTROL_PADCONF_GPIO_149_OFFSET                0x0bf
+#define OMAP2430_CONTROL_PADCONF_GPIO_150_OFFSET                0x0c0
+#define OMAP2430_CONTROL_PADCONF_GPIO_152_OFFSET                0x0c1
+#define OMAP2430_CONTROL_PADCONF_GPIO_153_OFFSET                0x0c2
+#define OMAP2430_CONTROL_PADCONF_SDMMC1_CLKO_OFFSET             0x0c3
+#define OMAP2430_CONTROL_PADCONF_SDMMC1_CMD_OFFSET              0x0c4
+#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT0_OFFSET             0x0c5
+#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT1_OFFSET             0x0c6
+#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT2_OFFSET             0x0c7
+#define OMAP2430_CONTROL_PADCONF_SDMMC1_DAT3_OFFSET             0x0c8
+#define OMAP2430_CONTROL_PADCONF_SDMMC2_CLKO_OFFSET             0x0c9
+#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT3_OFFSET             0x0ca
+#define OMAP2430_CONTROL_PADCONF_SDMMC2_CMD_OFFSET              0x0cb
+#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT0_OFFSET             0x0cc
+#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT2_OFFSET             0x0cd
+#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT1_OFFSET             0x0ce
+#define OMAP2430_CONTROL_PADCONF_UART2_CTS_OFFSET               0x0cf
+#define OMAP2430_CONTROL_PADCONF_UART2_RTS_OFFSET               0x0d0
+#define OMAP2430_CONTROL_PADCONF_UART2_TX_OFFSET                0x0d1
+#define OMAP2430_CONTROL_PADCONF_UART2_RX_OFFSET                0x0d2
+#define OMAP2430_CONTROL_PADCONF_MCBSP3_CLKX_OFFSET             0x0d3
+#define OMAP2430_CONTROL_PADCONF_MCBSP3_FSX_OFFSET              0x0d4
+#define OMAP2430_CONTROL_PADCONF_MCBSP3_DR_OFFSET               0x0d5
+#define OMAP2430_CONTROL_PADCONF_MCBSP3_DX_OFFSET               0x0d6
+#define OMAP2430_CONTROL_PADCONF_SSI1_DAT_TX_OFFSET             0x0d7
+#define OMAP2430_CONTROL_PADCONF_SSI1_FLAG_TX_OFFSET            0x0d8
+#define OMAP2430_CONTROL_PADCONF_SSI1_RDY_TX_OFFSET             0x0d9
+#define OMAP2430_CONTROL_PADCONF_SSI1_DAT_RX_OFFSET             0x0da
+#define OMAP2430_CONTROL_PADCONF_GPIO_63_OFFSET                 0x0db
+#define OMAP2430_CONTROL_PADCONF_SSI1_FLAG_RX_OFFSET            0x0dc
+#define OMAP2430_CONTROL_PADCONF_SSI1_RDY_RX_OFFSET             0x0dd
+#define OMAP2430_CONTROL_PADCONF_SSI1_WAKE_OFFSET               0x0de
+#define OMAP2430_CONTROL_PADCONF_SPI1_CLK_OFFSET                0x0df
+#define OMAP2430_CONTROL_PADCONF_SPI1_SIMO_OFFSET               0x0e0
+#define OMAP2430_CONTROL_PADCONF_SPI1_SOMI_OFFSET               0x0e1
+#define OMAP2430_CONTROL_PADCONF_SPI1_CS0_OFFSET                0x0e2
+#define OMAP2430_CONTROL_PADCONF_SPI1_CS1_OFFSET                0x0e3
+#define OMAP2430_CONTROL_PADCONF_SPI1_CS2_OFFSET                0x0e4
+#define OMAP2430_CONTROL_PADCONF_SPI1_CS3_OFFSET                0x0e5
+#define OMAP2430_CONTROL_PADCONF_SPI2_CLK_OFFSET                0x0e6
+#define OMAP2430_CONTROL_PADCONF_SPI2_SIMO_OFFSET               0x0e7
+#define OMAP2430_CONTROL_PADCONF_SPI2_SOMI_OFFSET               0x0e8
+#define OMAP2430_CONTROL_PADCONF_SPI2_CS0_OFFSET                0x0e9
+#define OMAP2430_CONTROL_PADCONF_MCBSP1_CLKR_OFFSET             0x0ea
+#define OMAP2430_CONTROL_PADCONF_MCBSP1_FSR_OFFSET              0x0eb
+#define OMAP2430_CONTROL_PADCONF_MCBSP1_DX_OFFSET               0x0ec
+#define OMAP2430_CONTROL_PADCONF_MCBSP1_DR_OFFSET               0x0ed
+#define OMAP2430_CONTROL_PADCONF_MCBSP_CLKS_OFFSET              0x0ee
+#define OMAP2430_CONTROL_PADCONF_MCBSP1_FSX_OFFSET              0x0ef
+#define OMAP2430_CONTROL_PADCONF_MCBSP1_CLKX_OFFSET             0x0f0
+#define OMAP2430_CONTROL_PADCONF_I2C1_SCL_OFFSET                0x0f1
+#define OMAP2430_CONTROL_PADCONF_I2C1_SDA_OFFSET                0x0f2
+#define OMAP2430_CONTROL_PADCONF_I2C2_SCL_OFFSET                0x0f3
+#define OMAP2430_CONTROL_PADCONF_I2C2_SDA_OFFSET                0x0f4
+#define OMAP2430_CONTROL_PADCONF_HDQ_SIO_OFFSET                 0x0f5
+#define OMAP2430_CONTROL_PADCONF_UART3_CTS_RCTX_OFFSET          0x0f6
+#define OMAP2430_CONTROL_PADCONF_UART3_RTS_SD_OFFSET            0x0f7
+#define OMAP2430_CONTROL_PADCONF_UART3_TX_IRTX_OFFSET           0x0f8
+#define OMAP2430_CONTROL_PADCONF_UART3_RX_IRRX_OFFSET           0x0f9
+#define OMAP2430_CONTROL_PADCONF_GPIO_7_OFFSET                  0x0fa
+#define OMAP2430_CONTROL_PADCONF_GPIO_78_OFFSET                 0x0fb
+#define OMAP2430_CONTROL_PADCONF_GPIO_79_OFFSET                 0x0fc
+#define OMAP2430_CONTROL_PADCONF_GPIO_80_OFFSET                 0x0fd
+#define OMAP2430_CONTROL_PADCONF_GPIO_113_OFFSET                0x0fe
+#define OMAP2430_CONTROL_PADCONF_GPIO_114_OFFSET                0x0ff
+#define OMAP2430_CONTROL_PADCONF_GPIO_115_OFFSET                0x100
+#define OMAP2430_CONTROL_PADCONF_GPIO_116_OFFSET                0x101
+#define OMAP2430_CONTROL_PADCONF_SYS_DRM_MSECURE_OFFSET         0x102
+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA3_OFFSET            0x103
+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA4_OFFSET            0x104
+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA5_OFFSET            0x105
+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA6_OFFSET            0x106
+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA2_OFFSET            0x107
+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA0_OFFSET            0x108
+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA1_OFFSET            0x109
+#define OMAP2430_CONTROL_PADCONF_USB0HS_CLK_OFFSET              0x10a
+#define OMAP2430_CONTROL_PADCONF_USB0HS_DIR_OFFSET              0x10b
+#define OMAP2430_CONTROL_PADCONF_USB0HS_STP_OFFSET              0x10c
+#define OMAP2430_CONTROL_PADCONF_USB0HS_NXT_OFFSET              0x10d
+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA7_OFFSET            0x10e
+#define OMAP2430_CONTROL_PADCONF_TV_OUT_OFFSET                  0x10f
+#define OMAP2430_CONTROL_PADCONF_TV_VREF_OFFSET                 0x110
+#define OMAP2430_CONTROL_PADCONF_TV_RSET_OFFSET                 0x111
+#define OMAP2430_CONTROL_PADCONF_TV_VFB_OFFSET                  0x112
+#define OMAP2430_CONTROL_PADCONF_TV_DACOUT_OFFSET               0x113
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD0_OFFSET               0x114
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD1_OFFSET               0x115
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD2_OFFSET               0x116
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD3_OFFSET               0x117
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD4_OFFSET               0x118
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD5_OFFSET               0x119
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD6_OFFSET               0x11a
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD7_OFFSET               0x11b
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD8_OFFSET               0x11c
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD9_OFFSET               0x11d
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD10_OFFSET              0x11e
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD11_OFFSET              0x11f
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD12_OFFSET              0x120
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD13_OFFSET              0x121
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD14_OFFSET              0x122
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD15_OFFSET              0x123
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD16_OFFSET              0x124
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD17_OFFSET              0x125
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD18_OFFSET              0x126
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD19_OFFSET              0x127
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD20_OFFSET              0x128
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD21_OFFSET              0x129
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD22_OFFSET              0x12a
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD23_OFFSET              0x12b
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD24_OFFSET              0x12c
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD25_OFFSET              0x12d
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD26_OFFSET              0x12e
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD27_OFFSET              0x12f
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD28_OFFSET              0x130
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD29_OFFSET              0x131
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD30_OFFSET              0x132
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD31_OFFSET              0x133
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD32_OFFSET              0x134
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD33_OFFSET              0x135
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD34_OFFSET              0x136
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD35_OFFSET              0x137
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD36_OFFSET              0x138
+#define OMAP2430_CONTROL_PADCONF_AD2DMCAD37_OFFSET              0x139
+#define OMAP2430_CONTROL_PADCONF_AD2DMWRITE_OFFSET              0x13a
+#define OMAP2430_CONTROL_PADCONF_D2DCLK26MI_OFFSET              0x13b
+#define OMAP2430_CONTROL_PADCONF_D2DNRESPWRON1_OFFSET           0x13c
+#define OMAP2430_CONTROL_PADCONF_D2DNRESWARM_OFFSET             0x13d
+#define OMAP2430_CONTROL_PADCONF_D2DARM9NIRQ_OFFSET             0x13e
+#define OMAP2430_CONTROL_PADCONF_D2DUMA2P6FIQ_OFFSET            0x13f
+#define OMAP2430_CONTROL_PADCONF_D2DSPINT_OFFSET                0x140
+#define OMAP2430_CONTROL_PADCONF_D2DFRINT_OFFSET                0x141
+#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ0_OFFSET              0x142
+#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ1_OFFSET              0x143
+#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ2_OFFSET              0x144
+#define OMAP2430_CONTROL_PADCONF_D2DDMAREQ3_OFFSET              0x145
+#define OMAP2430_CONTROL_PADCONF_D2DN3GTRST_OFFSET              0x146
+#define OMAP2430_CONTROL_PADCONF_D2DN3GTDI_OFFSET               0x147
+#define OMAP2430_CONTROL_PADCONF_D2DN3GTDO_OFFSET               0x148
+#define OMAP2430_CONTROL_PADCONF_D2DN3GTMS_OFFSET               0x149
+#define OMAP2430_CONTROL_PADCONF_D2DN3GTCK_OFFSET               0x14a
+#define OMAP2430_CONTROL_PADCONF_D2DN3GRTCK_OFFSET              0x14b
+#define OMAP2430_CONTROL_PADCONF_D2DMSTDBY_OFFSET               0x14c
+#define OMAP2430_CONTROL_PADCONF_AD2DSREAD_OFFSET               0x14d
+#define OMAP2430_CONTROL_PADCONF_D2DSWAKEUP_OFFSET              0x14e
+#define OMAP2430_CONTROL_PADCONF_D2DIDLEREQ_OFFSET              0x14f
+#define OMAP2430_CONTROL_PADCONF_D2DIDLEACK_OFFSET              0x150
+#define OMAP2430_CONTROL_PADCONF_D2DSPARE0_OFFSET               0x151
+#define OMAP2430_CONTROL_PADCONF_AD2DSWRITE_OFFSET              0x152
+#define OMAP2430_CONTROL_PADCONF_AD2DMREAD_OFFSET               0x153
+
+#define OMAP2430_CONTROL_PADCONF_MUX_SIZE                       \
+                (OMAP2430_CONTROL_PADCONF_AD2DMREAD_OFFSET + 0x1)
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
index 2ff4dce95ee8..f64d7eea3451 100644
--- a/arch/arm/mach-omap2/mux34xx.c
+++ b/arch/arm/mach-omap2/mux34xx.c
@@ -2032,19 +2032,19 @@ int __init omap3_mux_init(struct omap_board_mux *board_subset, int flags)
         struct omap_ball *package_balls;
 
         switch (flags & OMAP_PACKAGE_MASK) {
-        case (OMAP_PACKAGE_CBC):
+        case OMAP_PACKAGE_CBC:
                 package_subset = omap3_cbc_subset;
                 package_balls = omap3_cbc_ball;
                 break;
-        case (OMAP_PACKAGE_CBB):
+        case OMAP_PACKAGE_CBB:
                 package_subset = omap3_cbb_subset;
                 package_balls = omap3_cbb_ball;
                 break;
-        case (OMAP_PACKAGE_CUS):
+        case OMAP_PACKAGE_CUS:
                 package_subset = omap3_cus_subset;
                 package_balls = omap3_cus_ball;
                 break;
-        case (OMAP_PACKAGE_CBP):
+        case OMAP_PACKAGE_CBP:
                 package_subset = omap36xx_cbp_subset;
                 package_balls = omap36xx_cbp_ball;
                 break;
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index ef0e7a00dd6c..6ae937a06cc1 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -47,19 +47,3 @@ hold:	ldr	r12,=0x103
         b       secondary_startup
 END(omap_secondary_startup)
 
-
-ENTRY(omap_modify_auxcoreboot0)
-        stmfd   sp!, {r1-r12, lr}
-        ldr     r12, =0x104
-        dsb
-        smc     #0
-        ldmfd   sp!, {r1-r12, pc}
-END(omap_modify_auxcoreboot0)
-
-ENTRY(omap_auxcoreboot_addr)
-        stmfd   sp!, {r2-r12, lr}
-        ldr     r12, =0x105
-        dsb
-        smc     #0
-        ldmfd   sp!, {r2-r12, pc}
-END(omap_auxcoreboot_addr)
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
new file mode 100644
index 000000000000..6cee456ca542
--- /dev/null
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -0,0 +1,79 @@
+/*
+ * OMAP4 SMP cpu-hotplug support
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Author:
+ *      Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
+ * Platform file needed for the OMAP4 SMP. This file is based on arm
+ * realview smp platform.
+ * Copyright (c) 2002 ARM Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/smp.h>
+#include <linux/completion.h>
+
+#include <asm/cacheflush.h>
+#include <mach/omap4-common.h>
+
+static DECLARE_COMPLETION(cpu_killed);
+
+int platform_cpu_kill(unsigned int cpu)
+{
+        return wait_for_completion_timeout(&cpu_killed, 5000);
+}
+
+/*
+ * platform-specific code to shutdown a CPU
+ * Called with IRQs disabled
+ */
+void platform_cpu_die(unsigned int cpu)
+{
+        unsigned int this_cpu = hard_smp_processor_id();
+
+        if (cpu != this_cpu) {
+                pr_crit("platform_cpu_die running on %u, should be %u\n",
+                           this_cpu, cpu);
+                BUG();
+        }
+        pr_notice("CPU%u: shutdown\n", cpu);
+        complete(&cpu_killed);
+        flush_cache_all();
+        dsb();
+
+        /*
+         * we're ready for shutdown now, so do it
+         */
+        if (omap_modify_auxcoreboot0(0x0, 0x200) != 0x0)
+                printk(KERN_CRIT "Secure clear status failed\n");
+
+        for (;;) {
+                /*
+                 * Execute WFI
+                 */
+                do_wfi();
+
+                if (omap_read_auxcoreboot0() == cpu) {
+                        /*
+                         * OK, proper wakeup, we're done
+                         */
+                        break;
+                }
+                pr_debug("CPU%u: spurious wakeup call\n", cpu);
+        }
+}
+
+int platform_cpu_disable(unsigned int cpu)
+{
+        /*
+         * we don't allow CPU 0 to be shutdown (it is still too special
+         * e.g. clock tick interrupts)
+         */
+        return cpu == 0 ? -EPERM : 0;
+}
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index eb9bee73e0cb..f5a1aad1a5c0 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -59,7 +59,7 @@ static struct platform_device *omap3_iommu_pdev[NR_OMAP3_IOMMU_DEVICES];
 static struct iommu_device omap4_devices[] = {
         {
                 .base = OMAP4_MMU1_BASE,
-                .irq = INT_44XX_DUCATI_MMU_IRQ,
+                .irq = OMAP44XX_IRQ_DUCATI_MMU,
                 .pdata = {
                         .name = "ducati",
                         .nr_tlb_entries = 32,
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 1cf52313759e..af3c20c8d3f9 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -73,9 +73,10 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
          * the AuxCoreBoot1 register is updated with cpu state
          * A barrier is added to ensure that write buffer is drained
          */
-        omap_modify_auxcoreboot0(0x200, 0x0);
+        omap_modify_auxcoreboot0(0x200, 0xfffffdff);
         flush_cache_all();
         smp_wmb();
+        smp_cross_call(cpumask_of(cpu));
 
         /*
          * Now the secondary core is starting up let it run its
diff --git a/arch/arm/mach-omap2/omap44xx-smc.S b/arch/arm/mach-omap2/omap44xx-smc.S
index f61c7771ca47..1980dc31a1a2 100644
--- a/arch/arm/mach-omap2/omap44xx-smc.S
+++ b/arch/arm/mach-omap2/omap44xx-smc.S
@@ -30,3 +30,28 @@ ENTRY(omap_smc1)
         smc     #0
         ldmfd   sp!, {r2-r12, pc}
 END(omap_smc1)
+
+ENTRY(omap_modify_auxcoreboot0)
+        stmfd   sp!, {r1-r12, lr}
+        ldr     r12, =0x104
+        dsb
+        smc     #0
+        ldmfd   sp!, {r1-r12, pc}
+END(omap_modify_auxcoreboot0)
+
+ENTRY(omap_auxcoreboot_addr)
+        stmfd   sp!, {r2-r12, lr}
+        ldr     r12, =0x105
+        dsb
+        smc     #0
+        ldmfd   sp!, {r2-r12, pc}
+END(omap_auxcoreboot_addr)
+
+ENTRY(omap_read_auxcoreboot0)
+        stmfd   sp!, {r2-r12, lr}
+        ldr     r12, =0x103
+        dsb
+        smc     #0
+        mov     r0, r0, lsr #9
+        ldmfd   sp!, {r2-r12, pc}
+END(omap_read_auxcoreboot0)
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index e321281ab6e1..6aeedeacdad8 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -39,7 +39,6 @@
 #include <plat/clock.h>
 #include <plat/sram.h>
 #include <plat/control.h>
-#include <plat/mux.h>
 #include <plat/dma.h>
 #include <plat/board.h>
 
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index b88737fd6cfe..fb4994ad622e 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -385,8 +385,9 @@ void omap_sram_idle(void)
         /* Enable IO-PAD and IO-CHAIN wakeups */
         per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
         core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
-        if (per_next_state < PWRDM_POWER_ON ||
-                        core_next_state < PWRDM_POWER_ON) {
+        if (omap3_has_io_wakeup() && \
+                        (per_next_state < PWRDM_POWER_ON ||
+                        core_next_state < PWRDM_POWER_ON)) {
                 prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
                 omap3_enable_io_chain();
         }
@@ -479,7 +480,7 @@ void omap_sram_idle(void)
         }
 
         /* Disable IO-PAD and IO-CHAIN wakeup */
-        if (core_next_state < PWRDM_POWER_ON) {
+        if (omap3_has_io_wakeup() && core_next_state < PWRDM_POWER_ON) {
                 prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
                 omap3_disable_io_chain();
         }
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
new file mode 100644
index 000000000000..54544b4fc76b
--- /dev/null
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -0,0 +1,135 @@
+/*
+ * OMAP4 Power Management Routines
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Rajendra Nayak <rnayak@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/pm.h>
+#include <linux/suspend.h>
+#include <linux/module.h>
+#include <linux/list.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+
+#include <plat/powerdomain.h>
+#include <mach/omap4-common.h>
+
+struct power_state {
+        struct powerdomain *pwrdm;
+        u32 next_state;
+#ifdef CONFIG_SUSPEND
+        u32 saved_state;
+#endif
+        struct list_head node;
+};
+
+static LIST_HEAD(pwrst_list);
+
+#ifdef CONFIG_SUSPEND
+static int omap4_pm_prepare(void)
+{
+        disable_hlt();
+        return 0;
+}
+
+static int omap4_pm_suspend(void)
+{
+        do_wfi();
+        return 0;
+}
+
+static int omap4_pm_enter(suspend_state_t suspend_state)
+{
+        int ret = 0;
+
+        switch (suspend_state) {
+        case PM_SUSPEND_STANDBY:
+        case PM_SUSPEND_MEM:
+                ret = omap4_pm_suspend();
+                break;
+        default:
+                ret = -EINVAL;
+        }
+
+        return ret;
+}
+
+static void omap4_pm_finish(void)
+{
+        enable_hlt();
+        return;
+}
+
+static int omap4_pm_begin(suspend_state_t state)
+{
+        return 0;
+}
+
+static void omap4_pm_end(void)
+{
+        return;
+}
+
+static struct platform_suspend_ops omap_pm_ops = {
+        .begin          = omap4_pm_begin,
+        .end            = omap4_pm_end,
+        .prepare        = omap4_pm_prepare,
+        .enter          = omap4_pm_enter,
+        .finish         = omap4_pm_finish,
+        .valid          = suspend_valid_only_mem,
+};
+#endif /* CONFIG_SUSPEND */
+
+static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
+{
+        struct power_state *pwrst;
+
+        if (!pwrdm->pwrsts)
+                return 0;
+
+        pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
+        if (!pwrst)
+                return -ENOMEM;
+        pwrst->pwrdm = pwrdm;
+        pwrst->next_state = PWRDM_POWER_ON;
+        list_add(&pwrst->node, &pwrst_list);
+
+        return pwrdm_set_next_pwrst(pwrst->pwrdm, pwrst->next_state);
+}
+
+/**
+ * omap4_pm_init - Init routine for OMAP4 PM
+ *
+ * Initializes all powerdomain and clockdomain target states
+ * and all PRCM settings.
+ */
+static int __init omap4_pm_init(void)
+{
+        int ret;
+
+        if (!cpu_is_omap44xx())
+                return -ENODEV;
+
+        pr_err("Power Management for TI OMAP4.\n");
+
+#ifdef CONFIG_PM
+        ret = pwrdm_for_each(pwrdms_setup, NULL);
+        if (ret) {
+                pr_err("Failed to setup powerdomains\n");
+                goto err2;
+        }
+#endif
+
+#ifdef CONFIG_SUSPEND
+        suspend_set_ops(&omap_pm_ops);
+#endif /* CONFIG_SUSPEND */
+
+err2:
+        return ret;
+}
+late_initcall(omap4_pm_init);
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index a2904aa7065e..6527ec30dc17 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -875,6 +875,7 @@ int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
                 break;
         case 4:
                 m = OMAP_MEM4_RETSTATE_MASK;
+                break;
         default:
                 WARN_ON(1); /* should never happen */
                 return -EEXIST;
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 3771254dfa81..566e991ede81 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -37,6 +37,9 @@
 #define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV     0x52
 #define UART_OMAP_WER           0x17    /* Wake-up enable register */
 
+#define UART_ERRATA_FIFO_FULL_ABORT     (0x1 << 0)
+#define UART_ERRATA_i202_MDR1_ACCESS    (0x1 << 1)
+
 /*
  * NOTE: By default the serial timeout is disabled as it causes lost characters
  * over the serial ports. This means that the UART clocks will stay on until
@@ -64,6 +67,7 @@ struct omap_uart_state {
         struct list_head node;
         struct platform_device pdev;
 
+        u32 errata;
 #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
         int context_valid;
 
@@ -74,6 +78,7 @@ struct omap_uart_state {
         u16 sysc;
         u16 scr;
         u16 wer;
+        u16 mcr;
 #endif
 };
 
@@ -180,6 +185,42 @@ static inline void __init omap_uart_reset(struct omap_uart_state *uart)
 
 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
 
+/*
+ * Work Around for Errata i202 (3430 - 1.12, 3630 - 1.6)
+ * The access to uart register after MDR1 Access
+ * causes UART to corrupt data.
+ *
+ * Need a delay =
+ * 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
+ * give 10 times as much
+ */
+static void omap_uart_mdr1_errataset(struct omap_uart_state *uart, u8 mdr1_val,
+                u8 fcr_val)
+{
+        struct plat_serial8250_port *p = uart->p;
+        u8 timeout = 255;
+
+        serial_write_reg(p, UART_OMAP_MDR1, mdr1_val);
+        udelay(2);
+        serial_write_reg(p, UART_FCR, fcr_val | UART_FCR_CLEAR_XMIT |
+                        UART_FCR_CLEAR_RCVR);
+        /*
+         * Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
+         * TX_FIFO_E bit is 1.
+         */
+        while (UART_LSR_THRE != (serial_read_reg(p, UART_LSR) &
+                                (UART_LSR_THRE | UART_LSR_DR))) {
+                timeout--;
+                if (!timeout) {
+                        /* Should *never* happen. we warn and carry on */
+                        dev_crit(&uart->pdev.dev, "Errata i202: timedout %x\n",
+                                serial_read_reg(p, UART_LSR));
+                        break;
+                }
+                udelay(1);
+        }
+}
+
 static void omap_uart_save_context(struct omap_uart_state *uart)
 {
         u16 lcr = 0;
@@ -197,6 +238,9 @@ static void omap_uart_save_context(struct omap_uart_state *uart)
         uart->sysc = serial_read_reg(p, UART_OMAP_SYSC);
         uart->scr = serial_read_reg(p, UART_OMAP_SCR);
         uart->wer = serial_read_reg(p, UART_OMAP_WER);
+        serial_write_reg(p, UART_LCR, 0x80);
+        uart->mcr = serial_read_reg(p, UART_MCR);
+        serial_write_reg(p, UART_LCR, lcr);
 
         uart->context_valid = 1;
 }
@@ -214,7 +258,10 @@ static void omap_uart_restore_context(struct omap_uart_state *uart)
 
         uart->context_valid = 0;
 
-        serial_write_reg(p, UART_OMAP_MDR1, 0x7);
+        if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS)
+                omap_uart_mdr1_errataset(uart, 0x07, 0xA0);
+        else
+                serial_write_reg(p, UART_OMAP_MDR1, 0x7);
         serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
         efr = serial_read_reg(p, UART_EFR);
         serial_write_reg(p, UART_EFR, UART_EFR_ECB);
@@ -225,14 +272,18 @@ static void omap_uart_restore_context(struct omap_uart_state *uart)
         serial_write_reg(p, UART_DLM, uart->dlh);
         serial_write_reg(p, UART_LCR, 0x0); /* Operational mode */
         serial_write_reg(p, UART_IER, uart->ier);
-        serial_write_reg(p, UART_FCR, 0xA1);
+        serial_write_reg(p, UART_LCR, 0x80);
+        serial_write_reg(p, UART_MCR, uart->mcr);
         serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
         serial_write_reg(p, UART_EFR, efr);
         serial_write_reg(p, UART_LCR, UART_LCR_WLEN8);
         serial_write_reg(p, UART_OMAP_SCR, uart->scr);
         serial_write_reg(p, UART_OMAP_WER, uart->wer);
         serial_write_reg(p, UART_OMAP_SYSC, uart->sysc);
-        serial_write_reg(p, UART_OMAP_MDR1, 0x00); /* UART 16x mode */
+        if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS)
+                omap_uart_mdr1_errataset(uart, 0x00, 0xA1);
+        else
+                serial_write_reg(p, UART_OMAP_MDR1, 0x00); /* UART 16x mode */
 }
 #else
 static inline void omap_uart_save_context(struct omap_uart_state *uart) {}
@@ -489,8 +540,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
                 }
                 uart->wk_mask = wk_mask;
         } else {
-                uart->wk_en = 0;
-                uart->wk_st = 0;
+                uart->wk_en = NULL;
+                uart->wk_st = NULL;
                 uart->wk_mask = 0;
                 uart->padconf = 0;
         }
@@ -552,7 +603,8 @@ static ssize_t sleep_timeout_store(struct device *dev,
         return n;
 }
 
-DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show, sleep_timeout_store);
+static DEVICE_ATTR(sleep_timeout, 0644, sleep_timeout_show,
+                sleep_timeout_store);
 #define DEV_CREATE_FILE(dev, attr) WARN_ON(device_create_file(dev, attr))
 #else
 static inline void omap_uart_idle_init(struct omap_uart_state *uart) {}
@@ -749,14 +801,20 @@ void __init omap_serial_init_port(int port)
          * omap3xxx: Never read empty UART fifo on UARTs
          * with IP rev >=0x52
          */
-        if (cpu_is_omap44xx()) {
-                uart->p->serial_in = serial_in_override;
-                uart->p->serial_out = serial_out_override;
-        } else if ((serial_read_reg(uart->p, UART_OMAP_MVER) & 0xFF)
-                        >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV) {
+        if (cpu_is_omap44xx())
+                uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
+        else if ((serial_read_reg(uart->p, UART_OMAP_MVER) & 0xFF)
+                        >= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
+                uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
+
+        if (uart->errata & UART_ERRATA_FIFO_FULL_ABORT) {
                 uart->p->serial_in = serial_in_override;
                 uart->p->serial_out = serial_out_override;
         }
+
+        /* Enable the MDR1 errata for OMAP3 */
+        if (cpu_is_omap34xx())
+                uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
 }
 
 /**
diff --git a/arch/arm/mach-omap2/usb-ehci.c b/arch/arm/mach-omap2/usb-ehci.c
index d72d1ac30333..b11bf385d360 100644
--- a/arch/arm/mach-omap2/usb-ehci.c
+++ b/arch/arm/mach-omap2/usb-ehci.c
@@ -23,7 +23,6 @@
 #include <linux/dma-mapping.h>
 
 #include <asm/io.h>
-#include <plat/mux.h>
 
 #include <mach/hardware.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-omap2/usb-fs.c b/arch/arm/mach-omap2/usb-fs.c
new file mode 100644
index 000000000000..a216d88b04b5
--- /dev/null
+++ b/arch/arm/mach-omap2/usb-fs.c
@@ -0,0 +1,359 @@
+/*
+ * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx
+ *
+ * Copyright (C) 2004 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+
+#include <asm/irq.h>
+
+#include <plat/control.h>
+#include <plat/usb.h>
+#include <plat/board.h>
+
+#define INT_USB_IRQ_GEN         INT_24XX_USB_IRQ_GEN
+#define INT_USB_IRQ_NISO        INT_24XX_USB_IRQ_NISO
+#define INT_USB_IRQ_ISO         INT_24XX_USB_IRQ_ISO
+#define INT_USB_IRQ_HGEN        INT_24XX_USB_IRQ_HGEN
+#define INT_USB_IRQ_OTG         INT_24XX_USB_IRQ_OTG
+
+#include "mux.h"
+
+#if defined(CONFIG_ARCH_OMAP2)
+
+#ifdef  CONFIG_USB_GADGET_OMAP
+
+static struct resource udc_resources[] = {
+        /* order is significant! */
+        {               /* registers */
+                .start          = UDC_BASE,
+                .end            = UDC_BASE + 0xff,
+                .flags          = IORESOURCE_MEM,
+        }, {            /* general IRQ */
+                .start          = INT_USB_IRQ_GEN,
+                .flags          = IORESOURCE_IRQ,
+        }, {            /* PIO IRQ */
+                .start          = INT_USB_IRQ_NISO,
+                .flags          = IORESOURCE_IRQ,
+        }, {            /* SOF IRQ */
+                .start          = INT_USB_IRQ_ISO,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static u64 udc_dmamask = ~(u32)0;
+
+static struct platform_device udc_device = {
+        .name           = "omap_udc",
+        .id             = -1,
+        .dev = {
+                .dma_mask               = &udc_dmamask,
+                .coherent_dma_mask      = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(udc_resources),
+        .resource       = udc_resources,
+};
+
+static inline void udc_device_init(struct omap_usb_config *pdata)
+{
+        pdata->udc_device = &udc_device;
+}
+
+#else
+
+static inline void udc_device_init(struct omap_usb_config *pdata)
+{
+}
+
+#endif
+
+#if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+
+/* The dmamask must be set for OHCI to work */
+static u64 ohci_dmamask = ~(u32)0;
+
+static struct resource ohci_resources[] = {
+        {
+                .start  = OMAP_OHCI_BASE,
+                .end    = OMAP_OHCI_BASE + 0xff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = INT_USB_IRQ_HGEN,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device ohci_device = {
+        .name                   = "ohci",
+        .id                     = -1,
+        .dev = {
+                .dma_mask               = &ohci_dmamask,
+                .coherent_dma_mask      = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(ohci_resources),
+        .resource               = ohci_resources,
+};
+
+static inline void ohci_device_init(struct omap_usb_config *pdata)
+{
+        pdata->ohci_device = &ohci_device;
+}
+
+#else
+
+static inline void ohci_device_init(struct omap_usb_config *pdata)
+{
+}
+
+#endif
+
+#if     defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
+
+static struct resource otg_resources[] = {
+        /* order is significant! */
+        {
+                .start          = OTG_BASE,
+                .end            = OTG_BASE + 0xff,
+                .flags          = IORESOURCE_MEM,
+        }, {
+                .start          = INT_USB_IRQ_OTG,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device otg_device = {
+        .name           = "omap_otg",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(otg_resources),
+        .resource       = otg_resources,
+};
+
+static inline void otg_device_init(struct omap_usb_config *pdata)
+{
+        pdata->otg_device = &otg_device;
+}
+
+#else
+
+static inline void otg_device_init(struct omap_usb_config *pdata)
+{
+}
+
+#endif
+
+static void omap2_usb_devconf_clear(u8 port, u32 mask)
+{
+        u32 r;
+
+        r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+        r &= ~USBTXWRMODEI(port, mask);
+        omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
+}
+
+static void omap2_usb_devconf_set(u8 port, u32 mask)
+{
+        u32 r;
+
+        r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+        r |= USBTXWRMODEI(port, mask);
+        omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
+}
+
+static void omap2_usb2_disable_5pinbitll(void)
+{
+        u32 r;
+
+        r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+        r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
+        omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
+}
+
+static void omap2_usb2_enable_5pinunitll(void)
+{
+        u32 r;
+
+        r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+        r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
+        omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
+}
+
+static u32 __init omap2_usb0_init(unsigned nwires, unsigned is_device)
+{
+        u32     syscon1 = 0;
+
+        omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
+
+        if (nwires == 0)
+                return 0;
+
+        if (is_device)
+                omap_mux_init_signal("usb0_puen", 0);
+
+        omap_mux_init_signal("usb0_dat", 0);
+        omap_mux_init_signal("usb0_txen", 0);
+        omap_mux_init_signal("usb0_se0", 0);
+        if (nwires != 3)
+                omap_mux_init_signal("usb0_rcv", 0);
+
+        switch (nwires) {
+        case 3:
+                syscon1 = 2;
+                omap2_usb_devconf_set(0, USB_BIDIR);
+                break;
+        case 4:
+                syscon1 = 1;
+                omap2_usb_devconf_set(0, USB_BIDIR);
+                break;
+        case 6:
+                syscon1 = 3;
+                omap_mux_init_signal("usb0_vp", 0);
+                omap_mux_init_signal("usb0_vm", 0);
+                omap2_usb_devconf_set(0, USB_UNIDIR);
+                break;
+        default:
+                printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
+                        0, nwires);
+        }
+
+        return syscon1 << 16;
+}
+
+static u32 __init omap2_usb1_init(unsigned nwires)
+{
+        u32     syscon1 = 0;
+
+        omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
+
+        if (nwires == 0)
+                return 0;
+
+        /* NOTE:  board-specific code must set up pin muxing for usb1,
+         * since each signal could come out on either of two balls.
+         */
+
+        switch (nwires) {
+        case 2:
+                /* NOTE: board-specific code must override this setting if
+                 * this TLL link is not using DP/DM
+                 */
+                syscon1 = 1;
+                omap2_usb_devconf_set(1, USB_BIDIR_TLL);
+                break;
+        case 3:
+                syscon1 = 2;
+                omap2_usb_devconf_set(1, USB_BIDIR);
+                break;
+        case 4:
+                syscon1 = 1;
+                omap2_usb_devconf_set(1, USB_BIDIR);
+                break;
+        case 6:
+        default:
+                printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
+                        1, nwires);
+        }
+
+        return syscon1 << 20;
+}
+
+static u32 __init omap2_usb2_init(unsigned nwires, unsigned alt_pingroup)
+{
+        u32     syscon1 = 0;
+
+        omap2_usb2_disable_5pinbitll();
+        alt_pingroup = 0;
+
+        /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
+        if (alt_pingroup || nwires == 0)
+                return 0;
+
+        omap_mux_init_signal("usb2_dat", 0);
+        omap_mux_init_signal("usb2_se0", 0);
+        if (nwires > 2)
+                omap_mux_init_signal("usb2_txen", 0);
+        if (nwires > 3)
+                omap_mux_init_signal("usb2_rcv", 0);
+
+        switch (nwires) {
+        case 2:
+                /* NOTE: board-specific code must override this setting if
+                 * this TLL link is not using DP/DM
+                 */
+                syscon1 = 1;
+                omap2_usb_devconf_set(2, USB_BIDIR_TLL);
+                break;
+        case 3:
+                syscon1 = 2;
+                omap2_usb_devconf_set(2, USB_BIDIR);
+                break;
+        case 4:
+                syscon1 = 1;
+                omap2_usb_devconf_set(2, USB_BIDIR);
+                break;
+        case 5:
+                /* NOTE: board-specific code must mux this setting depending
+                 * on TLL link using DP/DM.  Something must also
+                 * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
+                 * 2420: hdq_sio.usb2_tllse0 or vlynq_rx0.usb2_tllse0
+                 * 2430: hdq_sio.usb2_tllse0 or sdmmc2_dat0.usb2_tllse0
+                 */
+
+                syscon1 = 3;
+                omap2_usb2_enable_5pinunitll();
+                break;
+        case 6:
+        default:
+                printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
+                        2, nwires);
+        }
+
+        return syscon1 << 24;
+}
+
+void __init omap2_usbfs_init(struct omap_usb_config *pdata)
+{
+        struct clk *ick;
+
+        if (!cpu_is_omap24xx())
+                return;
+
+        ick = clk_get(NULL, "usb_l4_ick");
+        if (IS_ERR(ick))
+                return;
+
+        clk_enable(ick);
+        pdata->usb0_init = omap2_usb0_init;
+        pdata->usb1_init = omap2_usb1_init;
+        pdata->usb2_init = omap2_usb2_init;
+        udc_device_init(pdata);
+        ohci_device_init(pdata);
+        otg_device_init(pdata);
+        omap_otg_init(pdata);
+        clk_disable(ick);
+        clk_put(ick);
+}
+
+#endif
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 96f6787e00b2..33a5cde1c227 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -28,7 +28,6 @@
 
 #include <mach/hardware.h>
 #include <mach/irqs.h>
-#include <plat/mux.h>
 #include <plat/usb.h>
 
 #ifdef CONFIG_USB_MUSB_SOC
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index 10a2013c1104..64a0112b70a5 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -17,8 +17,8 @@
 #include <linux/usb/musb.h>
 
 #include <plat/gpmc.h>
-#include <plat/mux.h>
 
+#include "mux.h"
 
 static u8               async_cs, sync_cs;
 static unsigned         refclk_psec;
@@ -325,17 +325,17 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
         else {
                 /* assume OMAP 2420 ES2.0 and later */
                 if (dmachan & (1 << 0))
-                        omap_cfg_reg(AA10_242X_DMAREQ0);
+                        omap_mux_init_signal("sys_ndmareq0", 0);
                 if (dmachan & (1 << 1))
-                        omap_cfg_reg(AA6_242X_DMAREQ1);
+                        omap_mux_init_signal("sys_ndmareq1", 0);
                 if (dmachan & (1 << 2))
-                        omap_cfg_reg(E4_242X_DMAREQ2);
+                        omap_mux_init_signal("sys_ndmareq2", 0);
                 if (dmachan & (1 << 3))
-                        omap_cfg_reg(G4_242X_DMAREQ3);
+                        omap_mux_init_signal("sys_ndmareq3", 0);
                 if (dmachan & (1 << 4))
-                        omap_cfg_reg(D3_242X_DMAREQ4);
+                        omap_mux_init_signal("sys_ndmareq4", 0);
                 if (dmachan & (1 << 5))
-                        omap_cfg_reg(E3_242X_DMAREQ5);
+                        omap_mux_init_signal("sys_ndmareq5", 0);
         }
 
         /* so far so good ... register the device */
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index 45c23fd6df31..40b6ac2de876 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -26,6 +26,7 @@
 #include <mach/colibri.h>
 #include <mach/ohci.h>
 #include <mach/pxafb.h>
+#include <mach/audio.h>
 
 #include "generic.h"
 #include "devices.h"
@@ -145,7 +146,7 @@ static void __init colibri_pxa300_init_lcd(void)
 static inline void colibri_pxa300_init_lcd(void) {}
 #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
 
-#if defined(SND_AC97_CODEC) || defined(SND_AC97_CODEC_MODULE)
+#if defined(CONFIG_SND_AC97_CODEC) || defined(CONFIG_SND_AC97_CODEC_MODULE)
 static mfp_cfg_t colibri_pxa310_ac97_pin_config[] __initdata = {
         GPIO24_AC97_SYSCLK,
         GPIO23_AC97_nACRESET,
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 3d1dcb9ac08f..51ffa6afb675 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -446,7 +446,7 @@ static struct platform_device corgiled_device = {
 static struct pxamci_platform_data corgi_mci_platform_data = {
         .detect_delay_ms        = 250,
         .ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,
-        .gpio_card_detect       = -1,
+        .gpio_card_detect       = CORGI_GPIO_nSD_DETECT,
         .gpio_card_ro           = CORGI_GPIO_nSD_WP,
         .gpio_power             = CORGI_GPIO_SD_PWR,
 };
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 9e4d9816726a..268a9bc6be8a 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -256,13 +256,9 @@ static void init_sdram_rows(void)
 
 static u32 mdrefr_dri(unsigned int freq)
 {
-        u32 dri = 0;
+        u32 interval = freq * SDRAM_TREF / sdram_rows;
 
-        if (cpu_is_pxa25x())
-                dri = ((freq * SDRAM_TREF) / (sdram_rows * 32));
-        if (cpu_is_pxa27x())
-                dri = ((freq * SDRAM_TREF) / (sdram_rows - 31)) / 32;
-        return dri;
+        return (interval - (cpu_is_pxa27x() ? 31 : 0)) / 32;
 }
 
 /* find a valid frequency point */
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 0af36177ff08..c059dac02b61 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -41,10 +41,10 @@ void pxa27x_clear_otgph(void)
 EXPORT_SYMBOL(pxa27x_clear_otgph);
 
 static unsigned long ac97_reset_config[] = {
-        GPIO95_AC97_nRESET,
-        GPIO95_GPIO,
-        GPIO113_AC97_nRESET,
         GPIO113_GPIO,
+        GPIO113_AC97_nRESET,
+        GPIO95_GPIO,
+        GPIO95_AC97_nRESET,
 };
 
 void pxa27x_assert_ac97reset(int reset_gpio, int on)
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 595be19f8ad5..02e9fdeb8faf 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -237,7 +237,7 @@ static unsigned int realview_mmc_status(struct device *dev)
         else
                 mask = 2;
 
-        return !(readl(REALVIEW_SYSMCI) & mask);
+        return readl(REALVIEW_SYSMCI) & mask;
 }
 
 struct mmci_platform_data realview_mmc0_plat_data = {
diff --git a/arch/arm/mach-shark/include/mach/debug-macro.S b/arch/arm/mach-shark/include/mach/debug-macro.S
index 50f071c5bf4d..5ea24d4d1ba6 100644
--- a/arch/arm/mach-shark/include/mach/debug-macro.S
+++ b/arch/arm/mach-shark/include/mach/debug-macro.S
@@ -20,6 +20,9 @@
                 strb    \rd, [\rx]
                 .endm
 
+                .macro waituart,rd,rx
+                .endm
+
                 .macro  busyuart,rd,rx
                 mov     \rd, #0
 1001:           add     \rd, \rd, #1
diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h
index 8552eb188b50..0271ca0a83df 100644
--- a/arch/arm/mach-ux500/include/mach/uncompress.h
+++ b/arch/arm/mach-ux500/include/mach/uncompress.h
@@ -30,22 +30,22 @@
 static void putc(const char c)
 {
         /* Do nothing if the UART is not enabled. */
-        if (!(readb(U8500_UART_CR) & 0x1))
+        if (!(__raw_readb(U8500_UART_CR) & 0x1))
                 return;
 
         if (c == '\n')
                 putc('\r');
 
-        while (readb(U8500_UART_FR) & (1 << 5))
+        while (__raw_readb(U8500_UART_FR) & (1 << 5))
                 barrier();
-        writeb(c, U8500_UART_DR);
+        __raw_writeb(c, U8500_UART_DR);
 }
 
 static void flush(void)
 {
-        if (!(readb(U8500_UART_CR) & 0x1))
+        if (!(__raw_readb(U8500_UART_CR) & 0x1))
                 return;
-        while (readb(U8500_UART_FR) & (1 << 3))
+        while (__raw_readb(U8500_UART_FR) & (1 << 3))
                 barrier();
 }
 
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index d250711b8c7a..c84239761cb4 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -241,7 +241,7 @@ static struct platform_device v2m_flash_device = {
 
 static unsigned int v2m_mmci_status(struct device *dev)
 {
-        return !(readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0));
+        return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
 }
 
 static struct mmci_platform_data v2m_mmci_data = {
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c
index 642207e18198..83c56324a472 100644
--- a/arch/arm/mach-w90x900/cpu.c
+++ b/arch/arm/mach-w90x900/cpu.c
@@ -93,7 +93,7 @@ static struct clk_lookup nuc900_clkregs[] = {
         DEF_CLKLOOK(&clk_kpi, "nuc900-kpi", NULL),
         DEF_CLKLOOK(&clk_wdt, "nuc900-wdt", NULL),
         DEF_CLKLOOK(&clk_gdma, "nuc900-gdma", NULL),
-        DEF_CLKLOOK(&clk_adc, "nuc900-adc", NULL),
+        DEF_CLKLOOK(&clk_adc, "nuc900-ts", NULL),
         DEF_CLKLOOK(&clk_usi, "nuc900-spi", NULL),
         DEF_CLKLOOK(&clk_ext, NULL, "ext"),
         DEF_CLKLOOK(&clk_timer0, NULL, "timer0"),
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index df4955885b21..9982eb385c0f 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -32,14 +32,14 @@ static uint32_t l2x0_way_mask;	/* Bitmask of active ways */
 static inline void cache_wait(void __iomem *reg, unsigned long mask)
 {
         /* wait for the operation to complete */
-        while (readl(reg) & mask)
+        while (readl_relaxed(reg) & mask)
                 ;
 }
 
 static inline void cache_sync(void)
 {
         void __iomem *base = l2x0_base;
-        writel(0, base + L2X0_CACHE_SYNC);
+        writel_relaxed(0, base + L2X0_CACHE_SYNC);
         cache_wait(base + L2X0_CACHE_SYNC, 1);
 }
 
@@ -47,14 +47,14 @@ static inline void l2x0_clean_line(unsigned long addr)
 {
         void __iomem *base = l2x0_base;
         cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
-        writel(addr, base + L2X0_CLEAN_LINE_PA);
+        writel_relaxed(addr, base + L2X0_CLEAN_LINE_PA);
 }
 
 static inline void l2x0_inv_line(unsigned long addr)
 {
         void __iomem *base = l2x0_base;
         cache_wait(base + L2X0_INV_LINE_PA, 1);
-        writel(addr, base + L2X0_INV_LINE_PA);
+        writel_relaxed(addr, base + L2X0_INV_LINE_PA);
 }
 
 #ifdef CONFIG_PL310_ERRATA_588369
@@ -75,9 +75,9 @@ static inline void l2x0_flush_line(unsigned long addr)
 
         /* Clean by PA followed by Invalidate by PA */
         cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
-        writel(addr, base + L2X0_CLEAN_LINE_PA);
+        writel_relaxed(addr, base + L2X0_CLEAN_LINE_PA);
         cache_wait(base + L2X0_INV_LINE_PA, 1);
-        writel(addr, base + L2X0_INV_LINE_PA);
+        writel_relaxed(addr, base + L2X0_INV_LINE_PA);
 }
 #else
 
@@ -90,7 +90,7 @@ static inline void l2x0_flush_line(unsigned long addr)
 {
         void __iomem *base = l2x0_base;
         cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
-        writel(addr, base + L2X0_CLEAN_INV_LINE_PA);
+        writel_relaxed(addr, base + L2X0_CLEAN_INV_LINE_PA);
 }
 #endif
 
@@ -109,7 +109,7 @@ static inline void l2x0_inv_all(void)
 
         /* invalidate all ways */
         spin_lock_irqsave(&l2x0_lock, flags);
-        writel(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
+        writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
         cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
         cache_sync();
         spin_unlock_irqrestore(&l2x0_lock, flags);
@@ -215,8 +215,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
 
         l2x0_base = base;
 
-        cache_id = readl(l2x0_base + L2X0_CACHE_ID);
-        aux = readl(l2x0_base + L2X0_AUX_CTRL);
+        cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID);
+        aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
 
         aux &= aux_mask;
         aux |= aux_val;
@@ -248,15 +248,15 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
          * If you are booting from non-secure mode
          * accessing the below registers will fault.
          */
-        if (!(readl(l2x0_base + L2X0_CTRL) & 1)) {
+        if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) {
 
                 /* l2x0 controller is disabled */
-                writel(aux, l2x0_base + L2X0_AUX_CTRL);
+                writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
 
                 l2x0_inv_all();
 
                 /* enable L2X0 */
-                writel(1, l2x0_base + L2X0_CTRL);
+                writel_relaxed(1, l2x0_base + L2X0_CTRL);
         }
 
         outer_cache.inv_range = l2x0_inv_range;
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index 086816b205b8..6ab244062b4a 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -163,19 +163,22 @@ static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth);
 
 void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte)
 {
-        unsigned int idx, cpu = smp_processor_id();
-        int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
+        unsigned int idx, cpu;
+        int *depth;
         unsigned long vaddr, flags;
         pte_t pte, *ptep;
 
+        if (!in_interrupt())
+                preempt_disable();
+
+        cpu = smp_processor_id();
+        depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
+
         idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
         vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
         ptep = TOP_PTE(vaddr);
         pte = mk_pte(page, kmap_prot);
 
-        if (!in_interrupt())
-                preempt_disable();
-
         raw_local_irq_save(flags);
         (*depth)++;
         if (pte_val(*ptep) == pte_val(pte)) {
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 78b49a626d06..e2ed952df23d 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -1,6 +1,6 @@
 if ARCH_OMAP
 
-menu "TI OMAP Implementations"
+menu "TI OMAP Common Features"
 
 config ARCH_OMAP_OTG
         bool
@@ -21,24 +21,6 @@ config ARCH_OMAP2PLUS
         help
           "Systems based on omap24xx, omap34xx or omap44xx"
 
-config ARCH_OMAP2
-        bool "TI OMAP2"
-        depends on ARCH_OMAP2PLUS
-        select CPU_V6
-
-config ARCH_OMAP3
-        bool "TI OMAP3"
-        depends on ARCH_OMAP2PLUS
-        select CPU_V7
-        select USB_ARCH_HAS_EHCI
-        select ARM_L1_CACHE_SHIFT_6
-
-config ARCH_OMAP4
-        bool "TI OMAP4"
-        depends on ARCH_OMAP2PLUS
-        select CPU_V7
-        select ARM_GIC
-
 endchoice
 
 comment "OMAP Feature Selections"
@@ -51,7 +33,7 @@ config OMAP_DEBUG_DEVICES
 config OMAP_DEBUG_LEDS
         bool
         depends on OMAP_DEBUG_DEVICES
-        default y if LEDS || LEDS_OMAP_DEBUG
+        default y if LEDS
 
 config OMAP_RESET_CLOCKS
         bool "Reset unused clocks during boot"
@@ -120,7 +102,7 @@ config OMAP_IOMMU_DEBUG
 
 choice
         prompt "System timer"
-        default OMAP_MPU_TIMER
+        default OMAP_32K_TIMER if !ARCH_OMAP15XX
 
 config OMAP_MPU_TIMER
         bool "Use mpu timer"
diff --git a/arch/arm/plat-omap/debug-leds.c b/arch/arm/plat-omap/debug-leds.c
index 53fcef7c5201..fc05b1022602 100644
--- a/arch/arm/plat-omap/debug-leds.c
+++ b/arch/arm/plat-omap/debug-leds.c
@@ -39,7 +39,7 @@ static struct h2p2_dbg_fpga __iomem	*fpga;
 static u16                              led_state, hw_led_state;
 
 
-#ifdef  CONFIG_LEDS_OMAP_DEBUG
+#ifdef  CONFIG_OMAP_DEBUG_LEDS
 #define new_led_api()   1
 #else
 #define new_led_api()   0
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 95677d17cd1c..d1920be7833b 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -24,135 +24,13 @@
 #include <plat/control.h>
 #include <plat/board.h>
 #include <plat/mmc.h>
-#include <plat/mux.h>
 #include <mach/gpio.h>
 #include <plat/menelaus.h>
 #include <plat/mcbsp.h>
-#include <plat/dsp_common.h>
 #include <plat/omap44xx.h>
 
-#if     defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
-
-static struct dsp_platform_data dsp_pdata = {
-        .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list),
-};
-
-static struct resource omap_dsp_resources[] = {
-        {
-                .name   = "dsp_mmu",
-                .start  = -1,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device omap_dsp_device = {
-        .name           = "dsp",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(omap_dsp_resources),
-        .resource       = omap_dsp_resources,
-        .dev = {
-                .platform_data = &dsp_pdata,
-        },
-};
-
-static inline void omap_init_dsp(void)
-{
-        struct resource *res;
-        int irq;
-
-        if (cpu_is_omap15xx())
-                irq = INT_1510_DSP_MMU;
-        else if (cpu_is_omap16xx())
-                irq = INT_1610_DSP_MMU;
-        else if (cpu_is_omap24xx())
-                irq = INT_24XX_DSP_MMU;
-
-        res = platform_get_resource_byname(&omap_dsp_device,
-                                           IORESOURCE_IRQ, "dsp_mmu");
-        res->start = irq;
-
-        platform_device_register(&omap_dsp_device);
-}
-
-int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev)
-{
-        static DEFINE_MUTEX(dsp_pdata_lock);
-
-        spin_lock_init(&kdev->lock);
-
-        mutex_lock(&dsp_pdata_lock);
-        list_add_tail(&kdev->entry, &dsp_pdata.kdev_list);
-        mutex_unlock(&dsp_pdata_lock);
-
-        return 0;
-}
-EXPORT_SYMBOL(dsp_kfunc_device_register);
-
-#else
-static inline void omap_init_dsp(void) { }
-#endif  /* CONFIG_OMAP_DSP */
-
 /*-------------------------------------------------------------------------*/
-#if     defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
-
-static void omap_init_kp(void)
-{
-        /* 2430 and 34xx keypad is on TWL4030 */
-        if (cpu_is_omap2430() || cpu_is_omap34xx())
-                return;
 
-        if (machine_is_omap_h2() || machine_is_omap_h3()) {
-                omap_cfg_reg(F18_1610_KBC0);
-                omap_cfg_reg(D20_1610_KBC1);
-                omap_cfg_reg(D19_1610_KBC2);
-                omap_cfg_reg(E18_1610_KBC3);
-                omap_cfg_reg(C21_1610_KBC4);
-
-                omap_cfg_reg(G18_1610_KBR0);
-                omap_cfg_reg(F19_1610_KBR1);
-                omap_cfg_reg(H14_1610_KBR2);
-                omap_cfg_reg(E20_1610_KBR3);
-                omap_cfg_reg(E19_1610_KBR4);
-                omap_cfg_reg(N19_1610_KBR5);
-        } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
-                omap_cfg_reg(E2_7XX_KBR0);
-                omap_cfg_reg(J7_7XX_KBR1);
-                omap_cfg_reg(E1_7XX_KBR2);
-                omap_cfg_reg(F3_7XX_KBR3);
-                omap_cfg_reg(D2_7XX_KBR4);
-
-                omap_cfg_reg(C2_7XX_KBC0);
-                omap_cfg_reg(D3_7XX_KBC1);
-                omap_cfg_reg(E4_7XX_KBC2);
-                omap_cfg_reg(F4_7XX_KBC3);
-                omap_cfg_reg(E3_7XX_KBC4);
-        } else if (machine_is_omap_h4()) {
-                omap_cfg_reg(T19_24XX_KBR0);
-                omap_cfg_reg(R19_24XX_KBR1);
-                omap_cfg_reg(V18_24XX_KBR2);
-                omap_cfg_reg(M21_24XX_KBR3);
-                omap_cfg_reg(E5__24XX_KBR4);
-                if (omap_has_menelaus()) {
-                        omap_cfg_reg(B3__24XX_KBR5);
-                        omap_cfg_reg(AA4_24XX_KBC2);
-                        omap_cfg_reg(B13_24XX_KBC6);
-                } else {
-                        omap_cfg_reg(M18_24XX_KBR5);
-                        omap_cfg_reg(H19_24XX_KBC2);
-                        omap_cfg_reg(N19_24XX_KBC6);
-                }
-                omap_cfg_reg(R20_24XX_KBC0);
-                omap_cfg_reg(M14_24XX_KBC1);
-                omap_cfg_reg(V17_24XX_KBC3);
-                omap_cfg_reg(P21_24XX_KBC4);
-                omap_cfg_reg(L14_24XX_KBC5);
-        }
-}
-#else
-static inline void omap_init_kp(void) {}
-#endif
-
-/*-------------------------------------------------------------------------*/
 #if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE)
 
 static struct platform_device **omap_mcbsp_devices;
@@ -419,8 +297,6 @@ static int __init omap_init_devices(void)
         /* please keep these calls, and their implementations above,
          * in alphabetical order so they're easier to sort through.
          */
-        omap_init_dsp();
-        omap_init_kp();
         omap_init_rng();
         omap_init_mcpdm();
         omap_init_uwire();
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index f7f571e7987e..ec7eddf9e525 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -290,7 +290,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
                 val = dma_read(CCR(lch));
 
                 /* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
-                val &= ~((3 << 19) | 0x1f);
+                val &= ~((1 << 23) | (3 << 19) | 0x1f);
                 val |= (dma_trigger & ~0x1f) << 14;
                 val |= dma_trigger & 0x1f;
 
@@ -304,11 +304,14 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
                 else
                         val &= ~(1 << 18);
 
-                if (src_or_dst_synch)
+                if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) {
+                        val &= ~(1 << 24);      /* dest synch */
+                        val |= (1 << 23);       /* Prefetch */
+                } else if (src_or_dst_synch) {
                         val |= 1 << 24;         /* source synch */
-                else
+                } else {
                         val &= ~(1 << 24);      /* dest synch */
-
+                }
                 dma_write(val, CCR(lch));
         }
 
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 9b7e3545f325..7951eefe1a0e 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -390,7 +390,9 @@ static inline int gpio_valid(int gpio)
                 return 0;
         if (cpu_is_omap7xx() && gpio < 192)
                 return 0;
-        if (cpu_is_omap24xx() && gpio < 128)
+        if (cpu_is_omap2420() && gpio < 128)
+                return 0;
+        if (cpu_is_omap2430() && gpio < 160)
                 return 0;
         if ((cpu_is_omap34xx() || cpu_is_omap44xx()) && gpio < 192)
                 return 0;
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h
index 5cd622039da0..3cf4fa25ab3d 100644
--- a/arch/arm/plat-omap/include/plat/board.h
+++ b/arch/arm/plat-omap/include/plat/board.h
@@ -85,6 +85,14 @@ struct omap_usb_config {
          *  6 == 6 wire unidirectional (or TLL)
          */
         u8              pins[3];
+
+        struct platform_device *udc_device;
+        struct platform_device *ohci_device;
+        struct platform_device *otg_device;
+
+        u32 (*usb0_init)(unsigned nwires, unsigned is_device);
+        u32 (*usb1_init)(unsigned nwires);
+        u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup);
 };
 
 struct omap_lcd_config {
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 75141742300c..aa2f4f079f57 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -444,6 +444,7 @@ extern u32 omap3_features;
 #define OMAP3_HAS_NEON                  BIT(3)
 #define OMAP3_HAS_ISP                   BIT(4)
 #define OMAP3_HAS_192MHZ_CLK            BIT(5)
+#define OMAP3_HAS_IO_WAKEUP             BIT(6)
 
 #define OMAP3_HAS_FEATURE(feat,flag)                    \
 static inline unsigned int omap3_has_ ##feat(void)      \
@@ -457,5 +458,6 @@ OMAP3_HAS_FEATURE(iva, IVA)
 OMAP3_HAS_FEATURE(neon, NEON)
 OMAP3_HAS_FEATURE(isp, ISP)
 OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
+OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
 
 #endif
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
index 02232ca2c37f..af3a03941add 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -345,6 +345,7 @@
 #define OMAP_DMA_SYNC_BLOCK             0x02
 #define OMAP_DMA_SYNC_PACKET            0x03
 
+#define OMAP_DMA_DST_SYNC_PREFETCH      0x02
 #define OMAP_DMA_SRC_SYNC               0x01
 #define OMAP_DMA_DST_SYNC               0x00
 
diff --git a/arch/arm/plat-omap/include/plat/dsp_common.h b/arch/arm/plat-omap/include/plat/dsp_common.h
deleted file mode 100644
index da97736f3efa..000000000000
--- a/arch/arm/plat-omap/include/plat/dsp_common.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1)
- *
- * Copyright (C) 2004-2006 Nokia Corporation. All rights reserved.
- *
- * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
- * 02110-1301 USA
- *
- */
-
-#ifndef ASM_ARCH_DSP_COMMON_H
-#define ASM_ARCH_DSP_COMMON_H
-
-#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_OMAP_MMU_FWK)
-extern void omap_dsp_request_mpui(void);
-extern void omap_dsp_release_mpui(void);
-extern int omap_dsp_request_mem(void);
-extern int omap_dsp_release_mem(void);
-#else
-static inline int omap_dsp_request_mem(void)
-{
-        return 0;
-}
-#define omap_dsp_release_mem()  do {} while (0)
-#endif
-
-#endif /* ASM_ARCH_DSP_COMMON_H */
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index 145838a81ef6..9fd99b9e40ab 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -25,10 +25,26 @@
 #define GPMC_CS_NAND_ADDRESS    0x20
 #define GPMC_CS_NAND_DATA       0x24
 
-#define GPMC_CONFIG             0x50
-#define GPMC_STATUS             0x54
-#define GPMC_CS0_BASE           0x60
-#define GPMC_CS_SIZE            0x30
+/* Control Commands */
+#define GPMC_CONFIG_RDY_BSY     0x00000001
+#define GPMC_CONFIG_DEV_SIZE    0x00000002
+#define GPMC_CONFIG_DEV_TYPE    0x00000003
+#define GPMC_SET_IRQ_STATUS     0x00000004
+#define GPMC_CONFIG_WP          0x00000005
+
+#define GPMC_GET_IRQ_STATUS     0x00000006
+#define GPMC_PREFETCH_FIFO_CNT  0x00000007 /* bytes available in FIFO for r/w */
+#define GPMC_PREFETCH_COUNT     0x00000008 /* remaining bytes to be read/write*/
+#define GPMC_STATUS_BUFFER      0x00000009 /* 1: buffer is available to write */
+
+#define GPMC_NAND_COMMAND       0x0000000a
+#define GPMC_NAND_ADDRESS       0x0000000b
+#define GPMC_NAND_DATA          0x0000000c
+
+/* ECC commands */
+#define GPMC_ECC_READ           0 /* Reset Hardware ECC for read */
+#define GPMC_ECC_WRITE          1 /* Reset Hardware ECC for write */
+#define GPMC_ECC_READSYN        2 /* Reset before syndrom is read back */
 
 #define GPMC_CONFIG1_WRAPBURST_SUPP     (1 << 31)
 #define GPMC_CONFIG1_READMULTIPLE_SUPP  (1 << 30)
@@ -47,7 +63,6 @@
 #define GPMC_CONFIG1_DEVICESIZE_16      GPMC_CONFIG1_DEVICESIZE(1)
 #define GPMC_CONFIG1_DEVICETYPE(val)    ((val & 3) << 10)
 #define GPMC_CONFIG1_DEVICETYPE_NOR     GPMC_CONFIG1_DEVICETYPE(0)
-#define GPMC_CONFIG1_DEVICETYPE_NAND    GPMC_CONFIG1_DEVICETYPE(2)
 #define GPMC_CONFIG1_MUXADDDATA         (1 << 9)
 #define GPMC_CONFIG1_TIME_PARA_GRAN     (1 << 4)
 #define GPMC_CONFIG1_FCLK_DIV(val)      (val & 3)
@@ -56,6 +71,14 @@
 #define GPMC_CONFIG1_FCLK_DIV4          (GPMC_CONFIG1_FCLK_DIV(3))
 #define GPMC_CONFIG7_CSVALID            (1 << 6)
 
+#define GPMC_DEVICETYPE_NOR             0
+#define GPMC_DEVICETYPE_NAND            2
+#define GPMC_CONFIG_WRITEPROTECT        0x00000010
+#define GPMC_STATUS_BUFF_EMPTY          0x00000001
+#define WR_RD_PIN_MONITORING            0x00600000
+#define GPMC_PREFETCH_STATUS_FIFO_CNT(val)      ((val >> 24) & 0x7F)
+#define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
+
 /*
  * Note that all values in this struct are in nanoseconds, while
  * the register values are in gpmc_fck cycles.
@@ -108,10 +131,15 @@ extern int gpmc_cs_set_reserved(int cs, int reserved);
 extern int gpmc_cs_reserved(int cs);
 extern int gpmc_prefetch_enable(int cs, int dma_mode,
                                         unsigned int u32_count, int is_write);
-extern void gpmc_prefetch_reset(void);
-extern int gpmc_prefetch_status(void);
+extern int gpmc_prefetch_reset(int cs);
 extern void omap3_gpmc_save_context(void);
 extern void omap3_gpmc_restore_context(void);
 extern void gpmc_init(void);
+extern int gpmc_read_status(int cmd);
+extern int gpmc_cs_configure(int cs, int cmd, int wval);
+extern int gpmc_nand_read(int cs, int cmd);
+extern int gpmc_nand_write(int cs, int cmd, int wval);
 
+int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size);
+int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code);
 #endif
diff --git a/arch/arm/plat-omap/include/plat/iommu.h b/arch/arm/plat-omap/include/plat/iommu.h
index 0752af9d099e..33c7d41cb6a5 100644
--- a/arch/arm/plat-omap/include/plat/iommu.h
+++ b/arch/arm/plat-omap/include/plat/iommu.h
@@ -80,6 +80,7 @@ struct iommu_functions {
 
         int (*enable)(struct iommu *obj);
         void (*disable)(struct iommu *obj);
+        void (*set_twl)(struct iommu *obj, bool on);
         u32 (*fault_isr)(struct iommu *obj, u32 *ra);
 
         void (*tlb_read_cr)(struct iommu *obj, struct cr_regs *cr);
@@ -143,6 +144,7 @@ extern void iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e);
 extern u32 iotlb_cr_to_virt(struct cr_regs *cr);
 
 extern int load_iotlb_entry(struct iommu *obj, struct iotlb_entry *e);
+extern void iommu_set_twl(struct iommu *obj, bool on);
 extern void flush_iotlb_page(struct iommu *obj, u32 da);
 extern void flush_iotlb_range(struct iommu *obj, u32 start, u32 end);
 extern void flush_iotlb_all(struct iommu *obj);
diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h
index c7472a28ce24..aeba71796ad9 100644
--- a/arch/arm/plat-omap/include/plat/mux.h
+++ b/arch/arm/plat-omap/include/plat/mux.h
@@ -114,28 +114,11 @@
         PU_PD_REG(NA, 0)                \
 },
 
-#define MUX_CFG_24XX(desc, reg_offset, mode,                    \
-                                pull_en, pull_mode, dbg)        \
-{                                                               \
-        .name           = desc,                                 \
-        .debug          = dbg,                                  \
-        .mux_reg        = reg_offset,                           \
-        .mask           = mode,                                 \
-        .pull_val       = pull_en,                              \
-        .pu_pd_val      = pull_mode,                            \
-},
-
-/* 24xx/34xx mux bit defines */
-#define OMAP2_PULL_ENA          (1 << 3)
-#define OMAP2_PULL_UP           (1 << 4)
-#define OMAP2_ALTELECTRICALSEL  (1 << 5)
-
 struct pin_config {
         char                    *name;
         const unsigned int      mux_reg;
         unsigned char           debug;
 
-#if     defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP2)
         const unsigned char mask_offset;
         const unsigned char mask;
 
@@ -147,7 +130,6 @@ struct pin_config {
         const char *pu_pd_name;
         const unsigned int pu_pd_reg;
         const unsigned char pu_pd_val;
-#endif
 
 #if     defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
         const char *mux_reg_name;
@@ -191,6 +173,10 @@ enum omap7xx_index {
         SPI_7XX_4,
         SPI_7XX_5,
         SPI_7XX_6,
+
+        /* UART */
+        UART_7XX_1,
+        UART_7XX_2,
 };
 
 enum omap1xxx_index {
@@ -446,208 +432,6 @@ enum omap1xxx_index {
 
 };
 
-enum omap24xx_index {
-        /* 24xx I2C */
-        M19_24XX_I2C1_SCL,
-        L15_24XX_I2C1_SDA,
-        J15_24XX_I2C2_SCL,
-        H19_24XX_I2C2_SDA,
-
-        /* 24xx Menelaus interrupt */
-        W19_24XX_SYS_NIRQ,
-
-        /* 24xx clock */
-        W14_24XX_SYS_CLKOUT,
-
-        /* 24xx GPMC chipselects, wait pin monitoring */
-        E2_GPMC_NCS2,
-        L2_GPMC_NCS7,
-        L3_GPMC_WAIT0,
-        N7_GPMC_WAIT1,
-        M1_GPMC_WAIT2,
-        P1_GPMC_WAIT3,
-
-        /* 242X McBSP */
-        Y15_24XX_MCBSP2_CLKX,
-        R14_24XX_MCBSP2_FSX,
-        W15_24XX_MCBSP2_DR,
-        V15_24XX_MCBSP2_DX,
-
-        /* 24xx GPIO */
-        M21_242X_GPIO11,
-        P21_242X_GPIO12,
-        AA10_242X_GPIO13,
-        AA6_242X_GPIO14,
-        AA4_242X_GPIO15,
-        Y11_242X_GPIO16,
-        AA12_242X_GPIO17,
-        AA8_242X_GPIO58,
-        Y20_24XX_GPIO60,
-        W4__24XX_GPIO74,
-        N15_24XX_GPIO85,
-        M15_24XX_GPIO92,
-        P20_24XX_GPIO93,
-        P18_24XX_GPIO95,
-        M18_24XX_GPIO96,
-        L14_24XX_GPIO97,
-        J15_24XX_GPIO99,
-        V14_24XX_GPIO117,
-        P14_24XX_GPIO125,
-
-        /* 242x DBG GPIO */
-        V4_242X_GPIO49,
-        W2_242X_GPIO50,
-        U4_242X_GPIO51,
-        V3_242X_GPIO52,
-        V2_242X_GPIO53,
-        V6_242X_GPIO53,
-        T4_242X_GPIO54,
-        Y4_242X_GPIO54,
-        T3_242X_GPIO55,
-        U2_242X_GPIO56,
-
-        /* 24xx external DMA requests */
-        AA10_242X_DMAREQ0,
-        AA6_242X_DMAREQ1,
-        E4_242X_DMAREQ2,
-        G4_242X_DMAREQ3,
-        D3_242X_DMAREQ4,
-        E3_242X_DMAREQ5,
-
-        /* UART3 */
-        K15_24XX_UART3_TX,
-        K14_24XX_UART3_RX,
-
-        /* MMC/SDIO */
-        G19_24XX_MMC_CLKO,
-        H18_24XX_MMC_CMD,
-        F20_24XX_MMC_DAT0,
-        H14_24XX_MMC_DAT1,
-        E19_24XX_MMC_DAT2,
-        D19_24XX_MMC_DAT3,
-        F19_24XX_MMC_DAT_DIR0,
-        E20_24XX_MMC_DAT_DIR1,
-        F18_24XX_MMC_DAT_DIR2,
-        E18_24XX_MMC_DAT_DIR3,
-        G18_24XX_MMC_CMD_DIR,
-        H15_24XX_MMC_CLKI,
-
-        /* Full speed USB */
-        J20_24XX_USB0_PUEN,
-        J19_24XX_USB0_VP,
-        K20_24XX_USB0_VM,
-        J18_24XX_USB0_RCV,
-        K19_24XX_USB0_TXEN,
-        J14_24XX_USB0_SE0,
-        K18_24XX_USB0_DAT,
-
-        N14_24XX_USB1_SE0,
-        W12_24XX_USB1_SE0,
-        P15_24XX_USB1_DAT,
-        R13_24XX_USB1_DAT,
-        W20_24XX_USB1_TXEN,
-        P13_24XX_USB1_TXEN,
-        V19_24XX_USB1_RCV,
-        V12_24XX_USB1_RCV,
-
-        AA10_24XX_USB2_SE0,
-        Y11_24XX_USB2_DAT,
-        AA12_24XX_USB2_TXEN,
-        AA6_24XX_USB2_RCV,
-        AA4_24XX_USB2_TLLSE0,
-
-        /* Keypad GPIO*/
-        T19_24XX_KBR0,
-        R19_24XX_KBR1,
-        V18_24XX_KBR2,
-        M21_24XX_KBR3,
-        E5__24XX_KBR4,
-        M18_24XX_KBR5,
-        R20_24XX_KBC0,
-        M14_24XX_KBC1,
-        H19_24XX_KBC2,
-        V17_24XX_KBC3,
-        P21_24XX_KBC4,
-        L14_24XX_KBC5,
-        N19_24XX_KBC6,
-
-        /* 24xx Menelaus Keypad GPIO */
-        B3__24XX_KBR5,
-        AA4_24XX_KBC2,
-        B13_24XX_KBC6,
-
-        /* 2430 USB */
-        AD9_2430_USB0_PUEN,
-        Y11_2430_USB0_VP,
-        AD7_2430_USB0_VM,
-        AE7_2430_USB0_RCV,
-        AD4_2430_USB0_TXEN,
-        AF9_2430_USB0_SE0,
-        AE6_2430_USB0_DAT,
-        AD24_2430_USB1_SE0,
-        AB24_2430_USB1_RCV,
-        Y25_2430_USB1_TXEN,
-        AA26_2430_USB1_DAT,
-
-        /* 2430 HS-USB */
-        AD9_2430_USB0HS_DATA3,
-        Y11_2430_USB0HS_DATA4,
-        AD7_2430_USB0HS_DATA5,
-        AE7_2430_USB0HS_DATA6,
-        AD4_2430_USB0HS_DATA2,
-        AF9_2430_USB0HS_DATA0,
-        AE6_2430_USB0HS_DATA1,
-        AE8_2430_USB0HS_CLK,
-        AD8_2430_USB0HS_DIR,
-        AE5_2430_USB0HS_STP,
-        AE9_2430_USB0HS_NXT,
-        AC7_2430_USB0HS_DATA7,
-
-        /* 2430 McBSP */
-        AD6_2430_MCBSP_CLKS,
-
-        AB2_2430_MCBSP1_CLKR,
-        AD5_2430_MCBSP1_FSR,
-        AA1_2430_MCBSP1_DX,
-        AF3_2430_MCBSP1_DR,
-        AB3_2430_MCBSP1_FSX,
-        Y9_2430_MCBSP1_CLKX,
-
-        AC10_2430_MCBSP2_FSX,
-        AD16_2430_MCBSP2_CLX,
-        AE13_2430_MCBSP2_DX,
-        AD13_2430_MCBSP2_DR,
-        AC10_2430_MCBSP2_FSX_OFF,
-        AD16_2430_MCBSP2_CLX_OFF,
-        AE13_2430_MCBSP2_DX_OFF,
-        AD13_2430_MCBSP2_DR_OFF,
-
-        AC9_2430_MCBSP3_CLKX,
-        AE4_2430_MCBSP3_FSX,
-        AE2_2430_MCBSP3_DR,
-        AF4_2430_MCBSP3_DX,
-
-        N3_2430_MCBSP4_CLKX,
-        AD23_2430_MCBSP4_DR,
-        AB25_2430_MCBSP4_DX,
-        AC25_2430_MCBSP4_FSX,
-
-        AE16_2430_MCBSP5_CLKX,
-        AF12_2430_MCBSP5_FSX,
-        K7_2430_MCBSP5_DX,
-        M1_2430_MCBSP5_DR,
-
-        /* 2430 McSPI*/
-        Y18_2430_MCSPI1_CLK,
-        AD15_2430_MCSPI1_SIMO,
-        AE17_2430_MCSPI1_SOMI,
-        U1_2430_MCSPI1_CS0,
-
-        /* Touchscreen GPIO */
-        AF19_2430_GPIO_85,
-
-};
-
 struct omap_mux_cfg {
         struct pin_config       *pins;
         unsigned long           size;
diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h
index f8efd5466b1d..6562cd082bb1 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -21,13 +21,11 @@ struct omap_nand_platform_data {
         int                     (*dev_ready)(struct omap_nand_platform_data *);
         int                     dma_channel;
         unsigned long           phys_base;
-        void __iomem            *gpmc_cs_baseaddr;
-        void __iomem            *gpmc_baseaddr;
         int                     devsize;
 };
 
-/* size (4 KiB) for IO mapping */
-#define NAND_IO_SIZE    SZ_4K
+/* minimum size for IO mapping */
+#define NAND_IO_SIZE    4
 
 #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 extern int gpmc_nand_init(struct omap_nand_platform_data *d);
diff --git a/arch/arm/plat-omap/include/plat/smp.h b/arch/arm/plat-omap/include/plat/smp.h
index 8983d54c4fd2..6a3ff65c0303 100644
--- a/arch/arm/plat-omap/include/plat/smp.h
+++ b/arch/arm/plat-omap/include/plat/smp.h
@@ -30,6 +30,7 @@
 extern void omap_secondary_startup(void);
 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
 extern void omap_auxcoreboot_addr(u32 cpu_addr);
+extern u32 omap_read_auxcoreboot0(void);
 
 /*
  * We use Soft IRQ1 as the IPI
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index bbedd71943f6..ddf723be48dc 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -25,6 +25,8 @@
 
 #include <plat/serial.h>
 
+#define MDR1_MODE_MASK                  0x07
+
 static volatile u8 *uart_base;
 static int uart_shift;
 
@@ -42,6 +44,10 @@ static void putc(int c)
         if (!uart_base)
                 return;
 
+        /* Check for UART 16x mode */
+        if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
+                return;
+
         while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
                 barrier();
         uart_base[UART_TX << uart_shift] = c;
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 98eef5360e6d..2a9427c8cc48 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -81,7 +81,34 @@ extern void usb_ohci_init(const struct ohci_hcd_omap_platform_data *pdata);
 
 #endif
 
-void omap_usb_init(struct omap_usb_config *pdata);
+
+/*
+ * FIXME correct answer depends on hmc_mode,
+ * as does (on omap1) any nonzero value for config->otg port number
+ */
+#ifdef  CONFIG_USB_GADGET_OMAP
+#define is_usb0_device(config)  1
+#else
+#define is_usb0_device(config)  0
+#endif
+
+void omap_otg_init(struct omap_usb_config *config);
+
+#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
+void omap1_usb_init(struct omap_usb_config *pdata);
+#else
+static inline void omap1_usb_init(struct omap_usb_config *pdata)
+{
+}
+#endif
+
+#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP_OTG_MODULE)
+void omap2_usbfs_init(struct omap_usb_config *pdata);
+#else
+static inline omap2_usbfs_init(struct omap_usb_config *pdata)
+{
+}
+#endif
 
 /*-------------------------------------------------------------------------*/
 
@@ -192,4 +219,24 @@ void omap_usb_init(struct omap_usb_config *pdata);
 #       define  USB0PUENACTLOI          (1 << 16)
 #       define  USBSTANDBYCTRL          (1 << 15)
 
+#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
+u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
+u32 omap1_usb1_init(unsigned nwires);
+u32 omap1_usb2_init(unsigned nwires, unsigned alt_pingroup);
+#else
+static inline u32 omap1_usb0_init(unsigned nwires, unsigned is_device)
+{
+        return 0;
+}
+static inline u32 omap1_usb1_init(unsigned nwires)
+{
+        return 0;
+
+}
+static inline u32 omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
+{
+        return 0;
+}
+#endif
+
 #endif  /* __ASM_ARCH_OMAP_USB_H */
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index bc094dbacee6..a202a2ce6e3d 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -370,6 +370,23 @@ void flush_iotlb_all(struct iommu *obj)
 }
 EXPORT_SYMBOL_GPL(flush_iotlb_all);
 
+/**
+ * iommu_set_twl - enable/disable table walking logic
+ * @obj:        target iommu
+ * @on:         enable/disable
+ *
+ * Function used to enable/disable TWL. If one wants to work
+ * exclusively with locked TLB entries and receive notifications
+ * for TLB miss then call this function to disable TWL.
+ */
+void iommu_set_twl(struct iommu *obj, bool on)
+{
+        clk_enable(obj->clk);
+        arch_iommu->set_twl(obj, on);
+        clk_disable(obj->clk);
+}
+EXPORT_SYMBOL_GPL(iommu_set_twl);
+
 #if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE)
 
 ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t bytes)
@@ -653,7 +670,7 @@ void iopgtable_lookup_entry(struct iommu *obj, u32 da, u32 **ppgd, u32 **ppte)
         if (!*iopgd)
                 goto out;
 
-        if (*iopgd & IOPGD_TABLE)
+        if (iopgd_is_table(*iopgd))
                 iopte = iopte_offset(iopgd, da);
 out:
         *ppgd = iopgd;
@@ -670,7 +687,7 @@ static size_t iopgtable_clear_entry_core(struct iommu *obj, u32 da)
         if (!*iopgd)
                 return 0;
 
-        if (*iopgd & IOPGD_TABLE) {
+        if (iopgd_is_table(*iopgd)) {
                 int i;
                 u32 *iopte = iopte_offset(iopgd, da);
 
@@ -745,7 +762,7 @@ static void iopgtable_clear_entry_all(struct iommu *obj)
                 if (!*iopgd)
                         continue;
 
-                if (*iopgd & IOPGD_TABLE)
+                if (iopgd_is_table(*iopgd))
                         iopte_free(iopte_offset(iopgd, 0));
 
                 *iopgd = 0;
@@ -783,9 +800,11 @@ static irqreturn_t iommu_fault_handler(int irq, void *data)
         if (!stat)
                 return IRQ_HANDLED;
 
+        iommu_disable(obj);
+
         iopgd = iopgd_offset(obj, da);
 
-        if (!(*iopgd & IOPGD_TABLE)) {
+        if (!iopgd_is_table(*iopgd)) {
                 dev_err(obj->dev, "%s: da:%08x pgd:%p *pgd:%08x\n", __func__,
                         da, iopgd, *iopgd);
                 return IRQ_NONE;
diff --git a/arch/arm/plat-omap/iopgtable.h b/arch/arm/plat-omap/iopgtable.h
index ab23b6a140fd..c3e93bb0911f 100644
--- a/arch/arm/plat-omap/iopgtable.h
+++ b/arch/arm/plat-omap/iopgtable.h
@@ -63,6 +63,8 @@
 #define IOPGD_SECTION           (2 << 0)
 #define IOPGD_SUPER             (1 << 18 | 2 << 0)
 
+#define iopgd_is_table(x)       (((x) & 3) == IOPGD_TABLE)
+
 #define IOPTE_SMALL             (2 << 0)
 #define IOPTE_LARGE             (1 << 0)
 
@@ -70,12 +72,12 @@
 #define iopgd_index(da)         (((da) >> IOPGD_SHIFT) & (PTRS_PER_IOPGD - 1))
 #define iopgd_offset(obj, da)   ((obj)->iopgd + iopgd_index(da))
 
-#define iopte_paddr(iopgd)      (*iopgd & ~((1 << 10) - 1))
-#define iopte_vaddr(iopgd)      ((u32 *)phys_to_virt(iopte_paddr(iopgd)))
+#define iopgd_page_paddr(iopgd) (*iopgd & ~((1 << 10) - 1))
+#define iopgd_page_vaddr(iopgd) ((u32 *)phys_to_virt(iopgd_page_paddr(iopgd)))
 
 /* to find an entry in the second-level page table. */
 #define iopte_index(da)         (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1))
-#define iopte_offset(iopgd, da) (iopte_vaddr(iopgd) + iopte_index(da))
+#define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da))
 
 static inline u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
                                    u32 flags)
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 06703635ace1..0d4aa0d5876c 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -54,7 +54,7 @@ int __init_or_module omap_cfg_reg(const unsigned long index)
 {
         struct pin_config *reg;
 
-        if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+        if (!cpu_class_is_omap1()) {
                 printk(KERN_ERR "mux: Broken omap_cfg_reg(%lu) entry\n",
                                 index);
                 WARN_ON(1);
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c
index d3bf17cd36f3..f3570884883e 100644
--- a/arch/arm/plat-omap/usb.c
+++ b/arch/arm/plat-omap/usb.c
@@ -22,524 +22,13 @@
 
 #include <linux/module.h>
 #include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/errno.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/usb/otg.h>
 #include <linux/io.h>
 
-#include <asm/irq.h>
-#include <asm/system.h>
-#include <mach/hardware.h>
-
-#include <plat/control.h>
-#include <plat/mux.h>
 #include <plat/usb.h>
 #include <plat/board.h>
 
-#ifdef CONFIG_ARCH_OMAP1
-
-#define INT_USB_IRQ_GEN         IH2_BASE + 20
-#define INT_USB_IRQ_NISO        IH2_BASE + 30
-#define INT_USB_IRQ_ISO         IH2_BASE + 29
-#define INT_USB_IRQ_HGEN        INT_USB_HHC_1
-#define INT_USB_IRQ_OTG         IH2_BASE + 8
-
-#else
-
-#define INT_USB_IRQ_GEN         INT_24XX_USB_IRQ_GEN
-#define INT_USB_IRQ_NISO        INT_24XX_USB_IRQ_NISO
-#define INT_USB_IRQ_ISO         INT_24XX_USB_IRQ_ISO
-#define INT_USB_IRQ_HGEN        INT_24XX_USB_IRQ_HGEN
-#define INT_USB_IRQ_OTG         INT_24XX_USB_IRQ_OTG
-
-#endif
-
-
-/* These routines should handle the standard chip-specific modes
- * for usb0/1/2 ports, covering basic mux and transceiver setup.
- *
- * Some board-*.c files will need to set up additional mux options,
- * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
- */
-
-/* TESTED ON:
- *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
- *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
- *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
- *  - 1510 Innovator UDC with bundled usb0 cable
- *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
- *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
- *  - 1710 custom development board using alternate pin group
- *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
- */
-
-/*-------------------------------------------------------------------------*/
-
-#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
-
-static void omap2_usb_devconf_clear(u8 port, u32 mask)
-{
-        u32 r;
-
-        r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
-        r &= ~USBTXWRMODEI(port, mask);
-        omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
-}
-
-static void omap2_usb_devconf_set(u8 port, u32 mask)
-{
-        u32 r;
-
-        r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
-        r |= USBTXWRMODEI(port, mask);
-        omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
-}
-
-static void omap2_usb2_disable_5pinbitll(void)
-{
-        u32 r;
-
-        r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
-        r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
-        omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
-}
-
-static void omap2_usb2_enable_5pinunitll(void)
-{
-        u32 r;
-
-        r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
-        r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
-        omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
-}
-
-static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
-{
-        u32     syscon1 = 0;
-
-        if (cpu_is_omap24xx())
-                omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
-
-        if (nwires == 0) {
-                if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
-                        u32 l;
-
-                        /* pulldown D+/D- */
-                        l = omap_readl(USB_TRANSCEIVER_CTRL);
-                        l &= ~(3 << 1);
-                        omap_writel(l, USB_TRANSCEIVER_CTRL);
-                }
-                return 0;
-        }
-
-        if (is_device) {
-                if (cpu_is_omap24xx())
-                        omap_cfg_reg(J20_24XX_USB0_PUEN);
-                else if (cpu_is_omap7xx()) {
-                        omap_cfg_reg(AA17_7XX_USB_DM);
-                        omap_cfg_reg(W16_7XX_USB_PU_EN);
-                        omap_cfg_reg(W17_7XX_USB_VBUSI);
-                        omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
-                        omap_cfg_reg(W19_7XX_USB_DCRST);
-                } else
-                        omap_cfg_reg(W4_USB_PUEN);
-        }
-
-        /* internal transceiver (unavailable on 17xx, 24xx) */
-        if (!cpu_class_is_omap2() && nwires == 2) {
-                u32 l;
-
-                // omap_cfg_reg(P9_USB_DP);
-                // omap_cfg_reg(R8_USB_DM);
-
-                if (cpu_is_omap15xx()) {
-                        /* This works on 1510-Innovator */
-                        return 0;
-                }
-
-                /* NOTES:
-                 *  - peripheral should configure VBUS detection!
-                 *  - only peripherals may use the internal D+/D- pulldowns
-                 *  - OTG support on this port not yet written
-                 */
-
-                /* Don't do this for omap7xx -- it causes USB to not work correctly */
-                if (!cpu_is_omap7xx()) {
-                        l = omap_readl(USB_TRANSCEIVER_CTRL);
-                        l &= ~(7 << 4);
-                        if (!is_device)
-                                l |= (3 << 1);
-                        omap_writel(l, USB_TRANSCEIVER_CTRL);
-                }
-
-                return 3 << 16;
-        }
-
-        /* alternate pin config, external transceiver */
-        if (cpu_is_omap15xx()) {
-                printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
-                return 0;
-        }
-
-        if (cpu_is_omap24xx()) {
-                omap_cfg_reg(K18_24XX_USB0_DAT);
-                omap_cfg_reg(K19_24XX_USB0_TXEN);
-                omap_cfg_reg(J14_24XX_USB0_SE0);
-                if (nwires != 3)
-                        omap_cfg_reg(J18_24XX_USB0_RCV);
-        } else {
-                omap_cfg_reg(V6_USB0_TXD);
-                omap_cfg_reg(W9_USB0_TXEN);
-                omap_cfg_reg(W5_USB0_SE0);
-                if (nwires != 3)
-                        omap_cfg_reg(Y5_USB0_RCV);
-        }
-
-        /* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
-         * may be able to use I2C requests to set those bits along
-         * with VBUS switching and overcurrent detection.
-         */
-
-        if (cpu_class_is_omap1() && nwires != 6) {
-                u32 l;
-
-                l = omap_readl(USB_TRANSCEIVER_CTRL);
-                l &= ~CONF_USB2_UNI_R;
-                omap_writel(l, USB_TRANSCEIVER_CTRL);
-        }
-
-        switch (nwires) {
-        case 3:
-                syscon1 = 2;
-                if (cpu_is_omap24xx())
-                        omap2_usb_devconf_set(0, USB_BIDIR);
-                break;
-        case 4:
-                syscon1 = 1;
-                if (cpu_is_omap24xx())
-                        omap2_usb_devconf_set(0, USB_BIDIR);
-                break;
-        case 6:
-                syscon1 = 3;
-                if (cpu_is_omap24xx()) {
-                        omap_cfg_reg(J19_24XX_USB0_VP);
-                        omap_cfg_reg(K20_24XX_USB0_VM);
-                        omap2_usb_devconf_set(0, USB_UNIDIR);
-                } else {
-                        u32 l;
-
-                        omap_cfg_reg(AA9_USB0_VP);
-                        omap_cfg_reg(R9_USB0_VM);
-                        l = omap_readl(USB_TRANSCEIVER_CTRL);
-                        l |= CONF_USB2_UNI_R;
-                        omap_writel(l, USB_TRANSCEIVER_CTRL);
-                }
-                break;
-        default:
-                printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
-                        0, nwires);
-        }
-        return syscon1 << 16;
-}
-
-static u32 __init omap_usb1_init(unsigned nwires)
-{
-        u32     syscon1 = 0;
-
-        if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
-                u32 l;
-
-                l = omap_readl(USB_TRANSCEIVER_CTRL);
-                l &= ~CONF_USB1_UNI_R;
-                omap_writel(l, USB_TRANSCEIVER_CTRL);
-        }
-        if (cpu_is_omap24xx())
-                omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
-
-        if (nwires == 0)
-                return 0;
-
-        /* external transceiver */
-        if (cpu_class_is_omap1()) {
-                omap_cfg_reg(USB1_TXD);
-                omap_cfg_reg(USB1_TXEN);
-                if (nwires != 3)
-                        omap_cfg_reg(USB1_RCV);
-        }
-
-        if (cpu_is_omap15xx()) {
-                omap_cfg_reg(USB1_SEO);
-                omap_cfg_reg(USB1_SPEED);
-                // SUSP
-        } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
-                omap_cfg_reg(W13_1610_USB1_SE0);
-                omap_cfg_reg(R13_1610_USB1_SPEED);
-                // SUSP
-        } else if (cpu_is_omap1710()) {
-                omap_cfg_reg(R13_1710_USB1_SE0);
-                // SUSP
-        } else if (cpu_is_omap24xx()) {
-                /* NOTE:  board-specific code must set up pin muxing for usb1,
-                 * since each signal could come out on either of two balls.
-                 */
-        } else {
-                pr_debug("usb%d cpu unrecognized\n", 1);
-                return 0;
-        }
-
-        switch (nwires) {
-        case 2:
-                if (!cpu_is_omap24xx())
-                        goto bad;
-                /* NOTE: board-specific code must override this setting if
-                 * this TLL link is not using DP/DM
-                 */
-                syscon1 = 1;
-                omap2_usb_devconf_set(1, USB_BIDIR_TLL);
-                break;
-        case 3:
-                syscon1 = 2;
-                if (cpu_is_omap24xx())
-                        omap2_usb_devconf_set(1, USB_BIDIR);
-                break;
-        case 4:
-                syscon1 = 1;
-                if (cpu_is_omap24xx())
-                        omap2_usb_devconf_set(1, USB_BIDIR);
-                break;
-        case 6:
-                if (cpu_is_omap24xx())
-                        goto bad;
-                syscon1 = 3;
-                omap_cfg_reg(USB1_VP);
-                omap_cfg_reg(USB1_VM);
-                if (!cpu_is_omap15xx()) {
-                        u32 l;
-
-                        l = omap_readl(USB_TRANSCEIVER_CTRL);
-                        l |= CONF_USB1_UNI_R;
-                        omap_writel(l, USB_TRANSCEIVER_CTRL);
-                }
-                break;
-        default:
-bad:
-                printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
-                        1, nwires);
-        }
-        return syscon1 << 20;
-}
-
-static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
-{
-        u32     syscon1 = 0;
-
-        if (cpu_is_omap24xx()) {
-                omap2_usb2_disable_5pinbitll();
-                alt_pingroup = 0;
-        }
-
-        /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
-        if (alt_pingroup || nwires == 0)
-                return 0;
-
-        if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
-                u32 l;
-
-                l = omap_readl(USB_TRANSCEIVER_CTRL);
-                l &= ~CONF_USB2_UNI_R;
-                omap_writel(l, USB_TRANSCEIVER_CTRL);
-        }
-
-        /* external transceiver */
-        if (cpu_is_omap15xx()) {
-                omap_cfg_reg(USB2_TXD);
-                omap_cfg_reg(USB2_TXEN);
-                omap_cfg_reg(USB2_SEO);
-                if (nwires != 3)
-                        omap_cfg_reg(USB2_RCV);
-                /* there is no USB2_SPEED */
-        } else if (cpu_is_omap16xx()) {
-                omap_cfg_reg(V6_USB2_TXD);
-                omap_cfg_reg(W9_USB2_TXEN);
-                omap_cfg_reg(W5_USB2_SE0);
-                if (nwires != 3)
-                        omap_cfg_reg(Y5_USB2_RCV);
-                // FIXME omap_cfg_reg(USB2_SPEED);
-        } else if (cpu_is_omap24xx()) {
-                omap_cfg_reg(Y11_24XX_USB2_DAT);
-                omap_cfg_reg(AA10_24XX_USB2_SE0);
-                if (nwires > 2)
-                        omap_cfg_reg(AA12_24XX_USB2_TXEN);
-                if (nwires > 3)
-                        omap_cfg_reg(AA6_24XX_USB2_RCV);
-        } else {
-                pr_debug("usb%d cpu unrecognized\n", 1);
-                return 0;
-        }
-        // if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
-
-        switch (nwires) {
-        case 2:
-                if (!cpu_is_omap24xx())
-                        goto bad;
-                /* NOTE: board-specific code must override this setting if
-                 * this TLL link is not using DP/DM
-                 */
-                syscon1 = 1;
-                omap2_usb_devconf_set(2, USB_BIDIR_TLL);
-                break;
-        case 3:
-                syscon1 = 2;
-                if (cpu_is_omap24xx())
-                        omap2_usb_devconf_set(2, USB_BIDIR);
-                break;
-        case 4:
-                syscon1 = 1;
-                if (cpu_is_omap24xx())
-                        omap2_usb_devconf_set(2, USB_BIDIR);
-                break;
-        case 5:
-                if (!cpu_is_omap24xx())
-                        goto bad;
-                omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
-                /* NOTE: board-specific code must override this setting if
-                 * this TLL link is not using DP/DM.  Something must also
-                 * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
-                 */
-                syscon1 = 3;
-                omap2_usb2_enable_5pinunitll();
-                break;
-        case 6:
-                if (cpu_is_omap24xx())
-                        goto bad;
-                syscon1 = 3;
-                if (cpu_is_omap15xx()) {
-                        omap_cfg_reg(USB2_VP);
-                        omap_cfg_reg(USB2_VM);
-                } else {
-                        u32 l;
-
-                        omap_cfg_reg(AA9_USB2_VP);
-                        omap_cfg_reg(R9_USB2_VM);
-                        l = omap_readl(USB_TRANSCEIVER_CTRL);
-                        l |= CONF_USB2_UNI_R;
-                        omap_writel(l, USB_TRANSCEIVER_CTRL);
-                }
-                break;
-        default:
-bad:
-                printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
-                        2, nwires);
-        }
-        return syscon1 << 24;
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-
-#ifdef  CONFIG_USB_GADGET_OMAP
-
-static struct resource udc_resources[] = {
-        /* order is significant! */
-        {               /* registers */
-                .start          = UDC_BASE,
-                .end            = UDC_BASE + 0xff,
-                .flags          = IORESOURCE_MEM,
-        }, {            /* general IRQ */
-                .start          = INT_USB_IRQ_GEN,
-                .flags          = IORESOURCE_IRQ,
-        }, {            /* PIO IRQ */
-                .start          = INT_USB_IRQ_NISO,
-                .flags          = IORESOURCE_IRQ,
-        }, {            /* SOF IRQ */
-                .start          = INT_USB_IRQ_ISO,
-                .flags          = IORESOURCE_IRQ,
-        },
-};
-
-static u64 udc_dmamask = ~(u32)0;
-
-static struct platform_device udc_device = {
-        .name           = "omap_udc",
-        .id             = -1,
-        .dev = {
-                .dma_mask               = &udc_dmamask,
-                .coherent_dma_mask      = 0xffffffff,
-        },
-        .num_resources  = ARRAY_SIZE(udc_resources),
-        .resource       = udc_resources,
-};
-
-#endif
-
-#if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-
-/* The dmamask must be set for OHCI to work */
-static u64 ohci_dmamask = ~(u32)0;
-
-static struct resource ohci_resources[] = {
-        {
-                .start  = OMAP_OHCI_BASE,
-                .end    = OMAP_OHCI_BASE + 0xff,
-                .flags  = IORESOURCE_MEM,
-        },
-        {
-                .start  = INT_USB_IRQ_HGEN,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device ohci_device = {
-        .name                   = "ohci",
-        .id                     = -1,
-        .dev = {
-                .dma_mask               = &ohci_dmamask,
-                .coherent_dma_mask      = 0xffffffff,
-        },
-        .num_resources  = ARRAY_SIZE(ohci_resources),
-        .resource               = ohci_resources,
-};
-
-#endif
-
-#if     defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
-
-static struct resource otg_resources[] = {
-        /* order is significant! */
-        {
-                .start          = OTG_BASE,
-                .end            = OTG_BASE + 0xff,
-                .flags          = IORESOURCE_MEM,
-        }, {
-                .start          = INT_USB_IRQ_OTG,
-                .flags          = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device otg_device = {
-        .name           = "omap_otg",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(otg_resources),
-        .resource       = otg_resources,
-};
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-
-// FIXME correct answer depends on hmc_mode,
-// as does (on omap1) any nonzero value for config->otg port number
-#ifdef  CONFIG_USB_GADGET_OMAP
-#define is_usb0_device(config)  1
-#else
-#define is_usb0_device(config)  0
-#endif
-
-/*-------------------------------------------------------------------------*/
-
 #ifdef  CONFIG_ARCH_OMAP_OTG
 
 void __init
@@ -560,9 +49,9 @@ omap_otg_init(struct omap_usb_config *config)
         /* pin muxing and transceiver pinouts */
         if (config->pins[0] > 2)        /* alt pingroup 2 */
                 alt_pingroup = 1;
-        syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
-        syscon |= omap_usb1_init(config->pins[1]);
-        syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
+        syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
+        syscon |= config->usb1_init(config->pins[1]);
+        syscon |= config->usb2_init(config->pins[2], alt_pingroup);
         pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
         omap_writel(syscon, OTG_SYSCON_1);
 
@@ -610,15 +99,11 @@ omap_otg_init(struct omap_usb_config *config)
 
 #ifdef  CONFIG_USB_GADGET_OMAP
         if (config->otg || config->register_dev) {
+                struct platform_device *udc_device = config->udc_device;
+
                 syscon &= ~DEV_IDLE_EN;
-                udc_device.dev.platform_data = config;
-                /* IRQ numbers for omap7xx */
-                if(cpu_is_omap7xx()) {
-                        udc_resources[1].start = INT_7XX_USB_GENI;
-                        udc_resources[2].start = INT_7XX_USB_NON_ISO;
-                        udc_resources[3].start = INT_7XX_USB_ISO;
-                }
-                status = platform_device_register(&udc_device);
+                udc_device->dev.platform_data = config;
+                status = platform_device_register(udc_device);
                 if (status)
                         pr_debug("can't register UDC device, %d\n", status);
         }
@@ -626,11 +111,11 @@ omap_otg_init(struct omap_usb_config *config)
 
 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
         if (config->otg || config->register_host) {
+                struct platform_device *ohci_device = config->ohci_device;
+
                 syscon &= ~HST_IDLE_EN;
-                ohci_device.dev.platform_data = config;
-                if (cpu_is_omap7xx())
-                        ohci_resources[1].start = INT_7XX_USB_HHC_1;
-                status = platform_device_register(&ohci_device);
+                ohci_device->dev.platform_data = config;
+                status = platform_device_register(ohci_device);
                 if (status)
                         pr_debug("can't register OHCI device, %d\n", status);
         }
@@ -638,11 +123,11 @@ omap_otg_init(struct omap_usb_config *config)
 
 #ifdef  CONFIG_USB_OTG
         if (config->otg) {
+                struct platform_device *otg_device = config->otg_device;
+
                 syscon &= ~OTG_IDLE_EN;
-                otg_device.dev.platform_data = config;
-                if (cpu_is_omap7xx())
-                        otg_resources[1].start = INT_7XX_USB_OTG;
-                status = platform_device_register(&otg_device);
+                otg_device->dev.platform_data = config;
+                status = platform_device_register(otg_device);
                 if (status)
                         pr_debug("can't register OTG device, %d\n", status);
         }
@@ -654,102 +139,5 @@ omap_otg_init(struct omap_usb_config *config)
 }
 
 #else
-static inline void omap_otg_init(struct omap_usb_config *config) {}
-#endif
-
-/*-------------------------------------------------------------------------*/
-
-#ifdef  CONFIG_ARCH_OMAP15XX
-
-/* ULPD_DPLL_CTRL */
-#define DPLL_IOB                (1 << 13)
-#define DPLL_PLL_ENABLE         (1 << 4)
-#define DPLL_LOCK               (1 << 0)
-
-/* ULPD_APLL_CTRL */
-#define APLL_NDPLL_SWITCH       (1 << 0)
-
-
-static void __init omap_1510_usb_init(struct omap_usb_config *config)
-{
-        unsigned int val;
-        u16 w;
-
-        omap_usb0_init(config->pins[0], is_usb0_device(config));
-        omap_usb1_init(config->pins[1]);
-        omap_usb2_init(config->pins[2], 0);
-
-        val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
-        val |= (config->hmc_mode << 1);
-        omap_writel(val, MOD_CONF_CTRL_0);
-
-        printk("USB: hmc %d", config->hmc_mode);
-        if (config->pins[0])
-                printk(", usb0 %d wires%s", config->pins[0],
-                        is_usb0_device(config) ? " (dev)" : "");
-        if (config->pins[1])
-                printk(", usb1 %d wires", config->pins[1]);
-        if (config->pins[2])
-                printk(", usb2 %d wires", config->pins[2]);
-        printk("\n");
-
-        /* use DPLL for 48 MHz function clock */
-        pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
-                        omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
-
-        w = omap_readw(ULPD_APLL_CTRL);
-        w &= ~APLL_NDPLL_SWITCH;
-        omap_writew(w, ULPD_APLL_CTRL);
-
-        w = omap_readw(ULPD_DPLL_CTRL);
-        w |= DPLL_IOB | DPLL_PLL_ENABLE;
-        omap_writew(w, ULPD_DPLL_CTRL);
-
-        w = omap_readw(ULPD_SOFT_REQ);
-        w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
-        omap_writew(w, ULPD_SOFT_REQ);
-
-        while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
-                cpu_relax();
-
-#ifdef  CONFIG_USB_GADGET_OMAP
-        if (config->register_dev) {
-                int status;
-
-                udc_device.dev.platform_data = config;
-                status = platform_device_register(&udc_device);
-                if (status)
-                        pr_debug("can't register UDC device, %d\n", status);
-                /* udc driver gates 48MHz by D+ pullup */
-        }
-#endif
-
-#if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-        if (config->register_host) {
-                int status;
-
-                ohci_device.dev.platform_data = config;
-                status = platform_device_register(&ohci_device);
-                if (status)
-                        pr_debug("can't register OHCI device, %d\n", status);
-                /* hcd explicitly gates 48MHz */
-        }
-#endif
-}
-
-#else
-static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
+void omap_otg_init(struct omap_usb_config *config) {}
 #endif
-
-/*-------------------------------------------------------------------------*/
-
-void __init omap_usb_init(struct omap_usb_config *pdata)
-{
-        if (cpu_is_omap7xx() || cpu_is_omap16xx() || cpu_is_omap24xx())
-                omap_otg_init(pdata);
-        else if (cpu_is_omap15xx())
-                omap_1510_usb_init(pdata);
-        else
-                printk(KERN_ERR "USB: No init for your chip yet\n");
-}
-
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S
index 1670734b7e51..37fa593884ee 100644
--- a/arch/arm/plat-spear/include/plat/debug-macro.S
+++ b/arch/arm/plat-spear/include/plat/debug-macro.S
@@ -17,8 +17,8 @@
                 .macro  addruart, rx
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1                                 @ MMU enabled?
-                moveq   \rx, =SPEAR_DBG_UART_BASE               @ Physical base
-                movne   \rx, =VA_SPEAR_DBG_UART_BASE            @ Virtual base
+                moveq   \rx, #SPEAR_DBG_UART_BASE               @ Physical base
+                movne   \rx, #VA_SPEAR_DBG_UART_BASE            @ Virtual base
                 .endm
 
                 .macro  senduart, rd, rx
diff --git a/arch/avr32/include/asm/ioctls.h b/arch/avr32/include/asm/ioctls.h
index 0cf2c0a4502b..e6ac0b661076 100644
--- a/arch/avr32/include/asm/ioctls.h
+++ b/arch/avr32/include/asm/ioctls.h
@@ -54,6 +54,9 @@
 #define TIOCGPTN        _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
 #define TIOCSPTLCK      _IOW('T',0x31, int)  /* Lock/unlock Pty */
 
+#define TIOCGRS485      0x542E
+#define TIOCSRS485      0x542F
+
 #define FIONCLEX        0x5450
 #define FIOCLEX         0x5451
 #define FIOASYNC        0x5452
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h
index c7f25bb1d068..61740201b311 100644
--- a/arch/avr32/mach-at32ap/include/mach/board.h
+++ b/arch/avr32/mach-at32ap/include/mach/board.h
@@ -5,6 +5,7 @@
 #define __ASM_ARCH_BOARD_H
 
 #include <linux/types.h>
+#include <linux/serial.h>
 
 #define GPIO_PIN_NONE   (-1)
 
@@ -35,6 +36,7 @@ struct atmel_uart_data {
         short           use_dma_tx;     /* use transmit DMA? */
         short           use_dma_rx;     /* use receive DMA? */
         void __iomem    *regs;          /* virtual base address, if any */
+        struct serial_rs485     rs485;          /* rs485 settings */
 };
 void at32_map_usart(unsigned int hw_id, unsigned int line, int flags);
 struct platform_device *at32_add_device_usart(unsigned int id);
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index 2580e77624d2..f9e5622ebc95 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -435,20 +435,21 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
 static int __init au1xxx_platform_init(void)
 {
         unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
-        int i;
+        int err, i;
 
         /* Fill up uartclk. */
         for (i = 0; au1x00_uart_data[i].flags; i++)
                 au1x00_uart_data[i].uartclk = uartclk;
 
+        err = platform_add_devices(au1xxx_platform_devices,
+                                   ARRAY_SIZE(au1xxx_platform_devices));
 #ifndef CONFIG_SOC_AU1100
         /* Register second MAC if enabled in pinfunc */
-        if (!(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2))
+        if (!err && !(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2))
                 platform_device_register(&au1xxx_eth1_device);
 #endif
 
-        return platform_add_devices(au1xxx_platform_devices,
-                                    ARRAY_SIZE(au1xxx_platform_devices));
+        return err;
 }
 
 arch_initcall(au1xxx_platform_init);
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c
index a9f0336e1f1f..52d883d37dd7 100644
--- a/arch/mips/alchemy/mtx-1/board_setup.c
+++ b/arch/mips/alchemy/mtx-1/board_setup.c
@@ -67,8 +67,6 @@ static void mtx1_power_off(void)
 
 void __init board_setup(void)
 {
-        alchemy_gpio2_enable();
-
 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
         /* Enable USB power switch */
         alchemy_gpio_direction_output(204, 0);
@@ -117,11 +115,11 @@ mtx1_pci_idsel(unsigned int devsel, int assert)
 
         if (assert && devsel != 0)
                 /* Suppress signal to Cardbus */
-                gpio_set_value(1, 0);   /* set EXT_IO3 OFF */
+                alchemy_gpio_set_value(1, 0);   /* set EXT_IO3 OFF */
         else
-                gpio_set_value(1, 1);   /* set EXT_IO3 ON */
+                alchemy_gpio_set_value(1, 1);   /* set EXT_IO3 ON */
 
-        au_sync_udelay(1);
+        udelay(1);
         return 1;
 }
 
diff --git a/arch/mips/bcm63xx/dev-enet.c b/arch/mips/bcm63xx/dev-enet.c
index 9f544badd0b4..39c23366c5c7 100644
--- a/arch/mips/bcm63xx/dev-enet.c
+++ b/arch/mips/bcm63xx/dev-enet.c
@@ -104,6 +104,9 @@ int __init bcm63xx_enet_register(int unit,
         if (unit > 1)
                 return -ENODEV;
 
+        if (unit == 1 && BCMCPU_IS_6338())
+                return -ENODEV;
+
         if (!shared_device_registered) {
                 shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
                 shared_res[0].end = shared_res[0].start;
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 59dc0c7ef733..c63c56bfd184 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -434,7 +434,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %0, %1          # atomic64_add          \n"
-                "       addu    %0, %2                                  \n"
+                "       daddu   %0, %2                                  \n"
                 "       scd     %0, %1                                  \n"
                 "       beqzl   %0, 1b                                  \n"
                 "       .set    mips0                                   \n"
@@ -446,7 +446,7 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %0, %1          # atomic64_add          \n"
-                "       addu    %0, %2                                  \n"
+                "       daddu   %0, %2                                  \n"
                 "       scd     %0, %1                                  \n"
                 "       beqz    %0, 2f                                  \n"
                 "       .subsection 2                                   \n"
@@ -479,7 +479,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %0, %1          # atomic64_sub          \n"
-                "       subu    %0, %2                                  \n"
+                "       dsubu   %0, %2                                  \n"
                 "       scd     %0, %1                                  \n"
                 "       beqzl   %0, 1b                                  \n"
                 "       .set    mips0                                   \n"
@@ -491,7 +491,7 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %0, %1          # atomic64_sub          \n"
-                "       subu    %0, %2                                  \n"
+                "       dsubu   %0, %2                                  \n"
                 "       scd     %0, %1                                  \n"
                 "       beqz    %0, 2f                                  \n"
                 "       .subsection 2                                   \n"
@@ -524,10 +524,10 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %1, %2          # atomic64_add_return   \n"
-                "       addu    %0, %1, %3                              \n"
+                "       daddu   %0, %1, %3                              \n"
                 "       scd     %0, %2                                  \n"
                 "       beqzl   %0, 1b                                  \n"
-                "       addu    %0, %1, %3                              \n"
+                "       daddu   %0, %1, %3                              \n"
                 "       .set    mips0                                   \n"
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
@@ -538,10 +538,10 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %1, %2          # atomic64_add_return   \n"
-                "       addu    %0, %1, %3                              \n"
+                "       daddu   %0, %1, %3                              \n"
                 "       scd     %0, %2                                  \n"
                 "       beqz    %0, 2f                                  \n"
-                "       addu    %0, %1, %3                              \n"
+                "       daddu   %0, %1, %3                              \n"
                 "       .subsection 2                                   \n"
                 "2:     b       1b                                      \n"
                 "       .previous                                       \n"
@@ -576,10 +576,10 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %1, %2          # atomic64_sub_return   \n"
-                "       subu    %0, %1, %3                              \n"
+                "       dsubu   %0, %1, %3                              \n"
                 "       scd     %0, %2                                  \n"
                 "       beqzl   %0, 1b                                  \n"
-                "       subu    %0, %1, %3                              \n"
+                "       dsubu   %0, %1, %3                              \n"
                 "       .set    mips0                                   \n"
                 : "=&r" (result), "=&r" (temp), "=m" (v->counter)
                 : "Ir" (i), "m" (v->counter)
@@ -590,10 +590,10 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
                 __asm__ __volatile__(
                 "       .set    mips3                                   \n"
                 "1:     lld     %1, %2          # atomic64_sub_return   \n"
-                "       subu    %0, %1, %3                              \n"
+                "       dsubu   %0, %1, %3                              \n"
                 "       scd     %0, %2                                  \n"
                 "       beqz    %0, 2f                                  \n"
-                "       subu    %0, %1, %3                              \n"
+                "       dsubu   %0, %1, %3                              \n"
                 "       .subsection 2                                   \n"
                 "2:     b       1b                                      \n"
                 "       .previous                                       \n"
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index 1b5a6648eb86..baa318a59c97 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -984,16 +984,17 @@
 #define __NR_perf_event_open            (__NR_Linux + 296)
 #define __NR_accept4                    (__NR_Linux + 297)
 #define __NR_recvmmsg                   (__NR_Linux + 298)
+#define __NR_getdents64                 (__NR_Linux + 299)
 
 /*
  * Offset of the last N32 flavoured syscall
  */
-#define __NR_Linux_syscalls             298
+#define __NR_Linux_syscalls             299
 
 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
 
 #define __NR_N32_Linux                  6000
-#define __NR_N32_Linux_syscalls         298
+#define __NR_N32_Linux_syscalls         299
 
 #ifdef __KERNEL__
 
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index a5297e2a353a..a4faceea9d88 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -419,4 +419,5 @@ EXPORT(sysn32_call_table)
         PTR     sys_perf_event_open
         PTR     sys_accept4
         PTR     compat_sys_recvmmsg
+        PTR     sys_getdents
         .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/vdso.c b/arch/mips/kernel/vdso.c
index b773c1112b14..e5cdfd603f8f 100644
--- a/arch/mips/kernel/vdso.c
+++ b/arch/mips/kernel/vdso.c
@@ -61,11 +61,9 @@ static int __init init_vdso(void)
 
         vunmap(vdso);
 
-        pr_notice("init_vdso successfull\n");
-
         return 0;
 }
-device_initcall(init_vdso);
+subsys_initcall(init_vdso);
 
 static unsigned long vdso_addr(unsigned long start)
 {
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c
index 2fbfa1a8c3a9..bf80921f2f56 100644
--- a/arch/mips/mti-malta/malta-pci.c
+++ b/arch/mips/mti-malta/malta-pci.c
@@ -247,6 +247,8 @@ void __init mips_pcibios_init(void)
         iomem_resource.end &= 0xfffffffffULL;                   /* 64 GB */
         ioport_resource.end = controller->io_resource->end;
 
+        controller->io_map_base = mips_io_port_base;
+
         register_pci_controller(controller);
 }
 
diff --git a/arch/mips/nxp/pnx8550/common/pci.c b/arch/mips/nxp/pnx8550/common/pci.c
index eee4f3dfc410..98e86ddb86cc 100644
--- a/arch/mips/nxp/pnx8550/common/pci.c
+++ b/arch/mips/nxp/pnx8550/common/pci.c
@@ -44,6 +44,7 @@ extern struct pci_ops pnx8550_pci_ops;
 
 static struct pci_controller pnx8550_controller = {
         .pci_ops        = &pnx8550_pci_ops,
+        .io_map_base    = PNX8550_PORT_BASE,
         .io_resource    = &pci_io_resource,
         .mem_resource   = &pci_mem_resource,
 };
diff --git a/arch/mips/nxp/pnx8550/common/setup.c b/arch/mips/nxp/pnx8550/common/setup.c
index 2aed50fef10f..64246c9c875c 100644
--- a/arch/mips/nxp/pnx8550/common/setup.c
+++ b/arch/mips/nxp/pnx8550/common/setup.c
@@ -113,7 +113,7 @@ void __init plat_mem_setup(void)
         PNX8550_GLB2_ENAB_INTA_O = 0;
 
         /* IO/MEM resources. */
-        set_io_port_base(KSEG1);
+        set_io_port_base(PNX8550_PORT_BASE);
         ioport_resource.start = 0;
         ioport_resource.end = ~0;
         iomem_resource.start = 0;
diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c
index 04b31478a6d7..b7c03d80c88c 100644
--- a/arch/mips/pci/ops-pmcmsp.c
+++ b/arch/mips/pci/ops-pmcmsp.c
@@ -944,6 +944,7 @@ static struct pci_controller msp_pci_controller = {
         .pci_ops        = &msp_pci_ops,
         .mem_resource   = &pci_mem_resource,
         .mem_offset     = 0,
+        .io_map_base    = MSP_PCI_IOSPACE_BASE,
         .io_resource    = &pci_io_resource,
         .io_offset      = 0
 };
diff --git a/arch/mips/pci/pci-yosemite.c b/arch/mips/pci/pci-yosemite.c
index 0357946f30e6..cf5e1a25cb7d 100644
--- a/arch/mips/pci/pci-yosemite.c
+++ b/arch/mips/pci/pci-yosemite.c
@@ -54,6 +54,7 @@ static int __init pmc_yosemite_setup(void)
                 panic(ioremap_failed);
 
         set_io_port_base(io_v_base);
+        py_controller.io_map_base = io_v_base;
         TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1);
 
         ioport_resource.end = TITAN_IO_SIZE - 1;
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
index 8ee77887306a..9ec523e4dd06 100644
--- a/arch/mips/powertv/asic/asic_devices.c
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -472,6 +472,9 @@ void __init configure_platform(void)
                  * it*/
                 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
 
+                /* Cronus and Cronus Lite have the same register map */
+                set_register_map(CRONUS_IO_BASE, &cronus_register_map);
+
                 /* ASIC version will determine if this is a real CronusLite or
                  * Castrati(Cronus) */
                 chipversion  = asic_read(chipver3) << 24;
@@ -484,8 +487,6 @@ void __init configure_platform(void)
                 else
                         asic = ASIC_CRONUSLITE;
 
-                /* Cronus and Cronus Lite have the same register map */
-                set_register_map(CRONUS_IO_BASE, &cronus_register_map);
                 gp_resources = non_dvr_cronuslite_resources;
                 pr_info("Platform: 4600 - %s, NON_DVR_CAPABLE, "
                         "chipversion=0x%08X\n",
diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index 2a9cd74a841e..076327f2eff7 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -8,9 +8,9 @@
  * On FSL-BookE we setup a 1:1 mapping which covers the first 2GiB of memory
  * and therefore we can only deal with memory within this range
  */
-#define KEXEC_SOURCE_MEMORY_LIMIT       (2 * 1024 * 1024 * 1024UL)
-#define KEXEC_DESTINATION_MEMORY_LIMIT  (2 * 1024 * 1024 * 1024UL)
-#define KEXEC_CONTROL_MEMORY_LIMIT      (2 * 1024 * 1024 * 1024UL)
+#define KEXEC_SOURCE_MEMORY_LIMIT       (2 * 1024 * 1024 * 1024UL - 1)
+#define KEXEC_DESTINATION_MEMORY_LIMIT  (2 * 1024 * 1024 * 1024UL - 1)
+#define KEXEC_CONTROL_MEMORY_LIMIT      (2 * 1024 * 1024 * 1024UL - 1)
 
 #else
 
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index 2102b214a87c..0e398cfee2c8 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -250,7 +250,9 @@ extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
 int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
                      pte_t *ptep, unsigned long trap, int local, int ssize,
                      unsigned int shift, unsigned int mmu_psize);
-
+extern void hash_failure_debug(unsigned long ea, unsigned long access,
+                               unsigned long vsid, unsigned long trap,
+                               int ssize, int psize, unsigned long pte);
 extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
                              unsigned long pstart, unsigned long prot,
                              int psize, int ssize);
diff --git a/arch/powerpc/kernel/perf_event_fsl_emb.c b/arch/powerpc/kernel/perf_event_fsl_emb.c
index 369872f6cf78..babcceecd2ea 100644
--- a/arch/powerpc/kernel/perf_event_fsl_emb.c
+++ b/arch/powerpc/kernel/perf_event_fsl_emb.c
@@ -566,9 +566,9 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
          * Finally record data if requested.
          */
         if (record) {
-                struct perf_sample_data data = {
-                        .period = event->hw.last_period,
-                };
+                struct perf_sample_data data;
+
+                perf_sample_data_init(&data, 0);
 
                 if (perf_event_overflow(event, nmi, &data, regs)) {
                         /*
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 9d3953983fb7..fed9bf6187d1 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -414,7 +414,7 @@ static int __init early_init_dt_scan_drconf_memory(unsigned long node)
         u64 base, size, memblock_size;
         unsigned int is_kexec_kdump = 0, rngs;
 
-        ls = of_get_flat_dt_prop(node, "ibm,memblock-size", &l);
+        ls = of_get_flat_dt_prop(node, "ibm,lmb-size", &l);
         if (ls == NULL || l < dt_root_size_cells * sizeof(__be32))
                 return 0;
         memblock_size = dt_mem_next_cell(dt_root_size_cells, &ls);
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index a719f53921a5..3079f6b44cf5 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -68,9 +68,6 @@ _GLOBAL(__hash_page_4K)
         std     r8,STK_PARM(r8)(r1)
         std     r9,STK_PARM(r9)(r1)
         
-        /* Add _PAGE_PRESENT to access */
-        ori     r4,r4,_PAGE_PRESENT
-
         /* Save non-volatile registers.
          * r31 will hold "old PTE"
          * r30 is "new PTE"
@@ -347,9 +344,6 @@ _GLOBAL(__hash_page_4K)
         std     r8,STK_PARM(r8)(r1)
         std     r9,STK_PARM(r9)(r1)
 
-        /* Add _PAGE_PRESENT to access */
-        ori     r4,r4,_PAGE_PRESENT
-
         /* Save non-volatile registers.
          * r31 will hold "old PTE"
          * r30 is "new PTE"
@@ -687,9 +681,6 @@ _GLOBAL(__hash_page_64K)
         std     r8,STK_PARM(r8)(r1)
         std     r9,STK_PARM(r9)(r1)
 
-        /* Add _PAGE_PRESENT to access */
-        ori     r4,r4,_PAGE_PRESENT
-
         /* Save non-volatile registers.
          * r31 will hold "old PTE"
          * r30 is "new PTE"
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 98f262de5585..09dffe6efa46 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -871,6 +871,18 @@ static inline int subpage_protection(struct mm_struct *mm, unsigned long ea)
 }
 #endif
 
+void hash_failure_debug(unsigned long ea, unsigned long access,
+                        unsigned long vsid, unsigned long trap,
+                        int ssize, int psize, unsigned long pte)
+{
+        if (!printk_ratelimit())
+                return;
+        pr_info("mm: Hashing failure ! EA=0x%lx access=0x%lx current=%s\n",
+                ea, access, current->comm);
+        pr_info("    trap=0x%lx vsid=0x%lx ssize=%d psize=%d pte=0x%lx\n",
+                trap, vsid, ssize, psize, pte);
+}
+
 /* Result code is:
  *  0 - handled
  *  1 - normal page fault
@@ -955,6 +967,17 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
                 return 1;
         }
 
+        /* Add _PAGE_PRESENT to the required access perm */
+        access |= _PAGE_PRESENT;
+
+        /* Pre-check access permissions (will be re-checked atomically
+         * in __hash_page_XX but this pre-check is a fast path
+         */
+        if (access & ~pte_val(*ptep)) {
+                DBG_LOW(" no access !\n");
+                return 1;
+        }
+
 #ifdef CONFIG_HUGETLB_PAGE
         if (hugeshift)
                 return __hash_page_huge(ea, access, vsid, ptep, trap, local,
@@ -967,14 +990,6 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
         DBG_LOW(" i-pte: %016lx %016lx\n", pte_val(*ptep),
                 pte_val(*(ptep + PTRS_PER_PTE)));
 #endif
-        /* Pre-check access permissions (will be re-checked atomically
-         * in __hash_page_XX but this pre-check is a fast path
-         */
-        if (access & ~pte_val(*ptep)) {
-                DBG_LOW(" no access !\n");
-                return 1;
-        }
-
         /* Do actual hashing */
 #ifdef CONFIG_PPC_64K_PAGES
         /* If _PAGE_4K_PFN is set, make sure this is a 4k segment */
@@ -1033,6 +1048,12 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
                                             local, ssize, spp);
         }
 
+        /* Dump some info in case of hash insertion failure, they should
+         * never happen so it is really useful to know if/when they do
+         */
+        if (rc == -1)
+                hash_failure_debug(ea, access, vsid, trap, ssize, psize,
+                                   pte_val(*ptep));
 #ifndef CONFIG_PPC_64K_PAGES
         DBG_LOW(" o-pte: %016lx\n", pte_val(*ptep));
 #else
@@ -1051,8 +1072,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
         void *pgdir;
         pte_t *ptep;
         unsigned long flags;
-        int local = 0;
-        int ssize;
+        int rc, ssize, local = 0;
 
         BUG_ON(REGION_ID(ea) != USER_REGION_ID);
 
@@ -1098,11 +1118,18 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
         /* Hash it in */
 #ifdef CONFIG_PPC_HAS_HASH_64K
         if (mm->context.user_psize == MMU_PAGE_64K)
-                __hash_page_64K(ea, access, vsid, ptep, trap, local, ssize);
+                rc = __hash_page_64K(ea, access, vsid, ptep, trap, local, ssize);
         else
 #endif /* CONFIG_PPC_HAS_HASH_64K */
-                __hash_page_4K(ea, access, vsid, ptep, trap, local, ssize,
-                               subpage_protection(pgdir, ea));
+                rc = __hash_page_4K(ea, access, vsid, ptep, trap, local, ssize,
+                                    subpage_protection(pgdir, ea));
+
+        /* Dump some info in case of hash insertion failure, they should
+         * never happen so it is really useful to know if/when they do
+         */
+        if (rc == -1)
+                hash_failure_debug(ea, access, vsid, trap, ssize,
+                                   mm->context.user_psize, pte_val(*ptep));
 
         local_irq_restore(flags);
 }
diff --git a/arch/powerpc/mm/hugetlbpage-hash64.c b/arch/powerpc/mm/hugetlbpage-hash64.c
index 199539882f92..cc5c273086cf 100644
--- a/arch/powerpc/mm/hugetlbpage-hash64.c
+++ b/arch/powerpc/mm/hugetlbpage-hash64.c
@@ -21,21 +21,13 @@ int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
         unsigned long old_pte, new_pte;
         unsigned long va, rflags, pa, sz;
         long slot;
-        int err = 1;
 
         BUG_ON(shift != mmu_psize_defs[mmu_psize].shift);
 
         /* Search the Linux page table for a match with va */
         va = hpt_va(ea, vsid, ssize);
 
-        /*
-         * Check the user's access rights to the page.  If access should be
-         * prevented then send the problem up to do_page_fault.
-         */
-        if (unlikely(access & ~pte_val(*ptep)))
-                goto out;
-        /*
-         * At this point, we have a pte (old_pte) which can be used to build
+        /* At this point, we have a pte (old_pte) which can be used to build
          * or update an HPTE. There are 2 cases:
          *
          * 1. There is a valid (present) pte with no associated HPTE (this is
@@ -49,9 +41,17 @@ int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
 
         do {
                 old_pte = pte_val(*ptep);
-                if (old_pte & _PAGE_BUSY)
-                        goto out;
+                /* If PTE busy, retry the access */
+                if (unlikely(old_pte & _PAGE_BUSY))
+                        return 0;
+                /* If PTE permissions don't match, take page fault */
+                if (unlikely(access & ~old_pte))
+                        return 1;
+                /* Try to lock the PTE, add ACCESSED and DIRTY if it was
+                 * a write access */
                 new_pte = old_pte | _PAGE_BUSY | _PAGE_ACCESSED;
+                if (access & _PAGE_RW)
+                        new_pte |= _PAGE_DIRTY;
         } while(old_pte != __cmpxchg_u64((unsigned long *)ptep,
                                          old_pte, new_pte));
 
@@ -121,8 +121,16 @@ repeat:
                         }
                 }
 
-                if (unlikely(slot == -2))
-                        panic("hash_huge_page: pte_insert failed\n");
+                /*
+                 * Hypervisor failure. Restore old pte and return -1
+                 * similar to __hash_page_*
+                 */
+                if (unlikely(slot == -2)) {
+                        *ptep = __pte(old_pte);
+                        hash_failure_debug(ea, access, vsid, trap, ssize,
+                                           mmu_psize, old_pte);
+                        return -1;
+                }
 
                 new_pte |= (slot << 12) & (_PAGE_F_SECOND | _PAGE_F_GIX);
         }
@@ -131,9 +139,5 @@ repeat:
          * No need to use ldarx/stdcx here
          */
         *ptep = __pte(new_pte & ~_PAGE_BUSY);
-
-        err = 0;
-
- out:
-        return err;
+        return 0;
 }
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index f47364585ecd..aa731af720c0 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -398,15 +398,15 @@ static int of_get_drconf_memory(struct device_node *memory, const u32 **dm)
 }
 
 /*
- * Retreive and validate the ibm,memblock-size property for drconf memory
+ * Retreive and validate the ibm,lmb-size property for drconf memory
  * from the device tree.
  */
-static u64 of_get_memblock_size(struct device_node *memory)
+static u64 of_get_lmb_size(struct device_node *memory)
 {
         const u32 *prop;
         u32 len;
 
-        prop = of_get_property(memory, "ibm,memblock-size", &len);
+        prop = of_get_property(memory, "ibm,lmb-size", &len);
         if (!prop || len < sizeof(unsigned int))
                 return 0;
 
@@ -562,7 +562,7 @@ static unsigned long __init numa_enforce_memory_limit(unsigned long start,
 static inline int __init read_usm_ranges(const u32 **usm)
 {
         /*
-         * For each memblock in ibm,dynamic-memory a corresponding
+         * For each lmb in ibm,dynamic-memory a corresponding
          * entry in linux,drconf-usable-memory property contains
          * a counter followed by that many (base, size) duple.
          * read the counter from linux,drconf-usable-memory
@@ -578,7 +578,7 @@ static void __init parse_drconf_memory(struct device_node *memory)
 {
         const u32 *dm, *usm;
         unsigned int n, rc, ranges, is_kexec_kdump = 0;
-        unsigned long memblock_size, base, size, sz;
+        unsigned long lmb_size, base, size, sz;
         int nid;
         struct assoc_arrays aa;
 
@@ -586,8 +586,8 @@ static void __init parse_drconf_memory(struct device_node *memory)
         if (!n)
                 return;
 
-        memblock_size = of_get_memblock_size(memory);
-        if (!memblock_size)
+        lmb_size = of_get_lmb_size(memory);
+        if (!lmb_size)
                 return;
 
         rc = of_get_assoc_arrays(memory, &aa);
@@ -611,7 +611,7 @@ static void __init parse_drconf_memory(struct device_node *memory)
                         continue;
 
                 base = drmem.base_addr;
-                size = memblock_size;
+                size = lmb_size;
                 ranges = 1;
 
                 if (is_kexec_kdump) {
@@ -1072,7 +1072,7 @@ static int hot_add_drconf_scn_to_nid(struct device_node *memory,
 {
         const u32 *dm;
         unsigned int drconf_cell_cnt, rc;
-        unsigned long memblock_size;
+        unsigned long lmb_size;
         struct assoc_arrays aa;
         int nid = -1;
 
@@ -1080,8 +1080,8 @@ static int hot_add_drconf_scn_to_nid(struct device_node *memory,
         if (!drconf_cell_cnt)
                 return -1;
 
-        memblock_size = of_get_memblock_size(memory);
-        if (!memblock_size)
+        lmb_size = of_get_lmb_size(memory);
+        if (!lmb_size)
                 return -1;
 
         rc = of_get_assoc_arrays(memory, &aa);
@@ -1100,7 +1100,7 @@ static int hot_add_drconf_scn_to_nid(struct device_node *memory,
                         continue;
 
                 if ((scn_addr < drmem.base_addr)
-                    || (scn_addr >= (drmem.base_addr + memblock_size)))
+                    || (scn_addr >= (drmem.base_addr + lmb_size)))
                         continue;
 
                 nid = of_drconf_to_nid_single(&drmem, &aa);
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index deab5f946090..bc8803664140 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -69,7 +69,7 @@ static int pseries_remove_memory(struct device_node *np)
         const char *type;
         const unsigned int *regs;
         unsigned long base;
-        unsigned int memblock_size;
+        unsigned int lmb_size;
         int ret = -EINVAL;
 
         /*
@@ -87,9 +87,9 @@ static int pseries_remove_memory(struct device_node *np)
                 return ret;
 
         base = *(unsigned long *)regs;
-        memblock_size = regs[3];
+        lmb_size = regs[3];
 
-        ret = pseries_remove_memblock(base, memblock_size);
+        ret = pseries_remove_memblock(base, lmb_size);
         return ret;
 }
 
@@ -98,7 +98,7 @@ static int pseries_add_memory(struct device_node *np)
         const char *type;
         const unsigned int *regs;
         unsigned long base;
-        unsigned int memblock_size;
+        unsigned int lmb_size;
         int ret = -EINVAL;
 
         /*
@@ -116,36 +116,36 @@ static int pseries_add_memory(struct device_node *np)
                 return ret;
 
         base = *(unsigned long *)regs;
-        memblock_size = regs[3];
+        lmb_size = regs[3];
 
         /*
          * Update memory region to represent the memory add
          */
-        ret = memblock_add(base, memblock_size);
+        ret = memblock_add(base, lmb_size);
         return (ret < 0) ? -EINVAL : 0;
 }
 
 static int pseries_drconf_memory(unsigned long *base, unsigned int action)
 {
         struct device_node *np;
-        const unsigned long *memblock_size;
+        const unsigned long *lmb_size;
         int rc;
 
         np = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
         if (!np)
                 return -EINVAL;
 
-        memblock_size = of_get_property(np, "ibm,memblock-size", NULL);
-        if (!memblock_size) {
+        lmb_size = of_get_property(np, "ibm,lmb-size", NULL);
+        if (!lmb_size) {
                 of_node_put(np);
                 return -EINVAL;
         }
 
         if (action == PSERIES_DRCONF_MEM_ADD) {
-                rc = memblock_add(*base, *memblock_size);
+                rc = memblock_add(*base, *lmb_size);
                 rc = (rc < 0) ? -EINVAL : 0;
         } else if (action == PSERIES_DRCONF_MEM_REMOVE) {
-                rc = pseries_remove_memblock(*base, *memblock_size);
+                rc = pseries_remove_memblock(*base, *lmb_size);
         } else {
                 rc = -EINVAL;
         }
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index d5e3e6007447..bea9ee37ac9d 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -535,8 +535,16 @@ pgm_no_vtime2:
         l       %r3,__LC_PGM_ILC        # load program interruption code
         la      %r8,0x7f
         nr      %r8,%r3                 # clear per-event-bit and ilc
-        be      BASED(pgm_exit)         # only per or per+check ?
-        b       BASED(pgm_do_call)
+        be      BASED(pgm_exit2)        # only per or per+check ?
+        l       %r7,BASED(.Ljump_table)
+        sll     %r8,2
+        l       %r7,0(%r8,%r7)          # load address of handler routine
+        la      %r2,SP_PTREGS(%r15)     # address of register-save area
+        basr    %r14,%r7                # branch to interrupt-handler
+pgm_exit2:
+        TRACE_IRQS_ON
+        stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts
+        b       BASED(sysc_return)
 
 #
 # it was a single stepped SVC that is causing all the trouble
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index e7192e1cb678..8bccec15ea90 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -544,8 +544,16 @@ pgm_no_vtime2:
         lgf     %r3,__LC_PGM_ILC        # load program interruption code
         lghi    %r8,0x7f
         ngr     %r8,%r3                 # clear per-event-bit and ilc
-        je      pgm_exit
-        j       pgm_do_call
+        je      pgm_exit2
+        sll     %r8,3
+        larl    %r1,pgm_check_table
+        lg      %r1,0(%r8,%r1)          # load address of handler routine
+        la      %r2,SP_PTREGS(%r15)     # address of register-save area
+        basr    %r14,%r1                # branch to interrupt-handler
+pgm_exit2:
+        TRACE_IRQS_ON
+        stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts
+        j       sysc_return
 
 #
 # it was a single stepped SVC that is causing all the trouble
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index a2163c95eb98..15a7536452d5 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -524,8 +524,11 @@ void etr_switch_to_local(void)
         if (!etr_eacr.sl)
                 return;
         disable_sync_clock(NULL);
-        set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
-        queue_work(time_sync_wq, &etr_work);
+        if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
+                etr_eacr.es = etr_eacr.sl = 0;
+                etr_setr(&etr_eacr);
+                queue_work(time_sync_wq, &etr_work);
+        }
 }
 
 /*
@@ -539,8 +542,11 @@ void etr_sync_check(void)
         if (!etr_eacr.es)
                 return;
         disable_sync_clock(NULL);
-        set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
-        queue_work(time_sync_wq, &etr_work);
+        if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
+                etr_eacr.es = 0;
+                etr_setr(&etr_eacr);
+                queue_work(time_sync_wq, &etr_work);
+        }
 }
 
 /*
@@ -902,7 +908,7 @@ static struct etr_eacr etr_handle_update(struct etr_aib *aib,
          * Do not try to get the alternate port aib if the clock
          * is not in sync yet.
          */
-        if (!check_sync_clock())
+        if (!eacr.es || !check_sync_clock())
                 return eacr;
 
         /*
@@ -1064,7 +1070,7 @@ static void etr_work_fn(struct work_struct *work)
          * If the clock is in sync just update the eacr and return.
          * If there is no valid sync port wait for a port update.
          */
-        if (check_sync_clock() || sync_port < 0) {
+        if ((eacr.es && check_sync_clock()) || sync_port < 0) {
                 etr_update_eacr(eacr);
                 etr_set_tolec_timeout(now);
                 goto out_unlock;
diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c
index 2e837f5080fe..fb7a5f052e2b 100644
--- a/arch/x86/kernel/acpi/cstate.c
+++ b/arch/x86/kernel/acpi/cstate.c
@@ -145,6 +145,15 @@ int acpi_processor_ffh_cstate_probe(unsigned int cpu,
                 percpu_entry->states[cx->index].eax = cx->address;
                 percpu_entry->states[cx->index].ecx = MWAIT_ECX_INTERRUPT_BREAK;
         }
+
+        /*
+         * For _CST FFH on Intel, if GAS.access_size bit 1 is cleared,
+         * then we should skip checking BM_STS for this C-state.
+         * ref: "Intel Processor Vendor-Specific ACPI Interface Specification"
+         */
+        if ((c->x86_vendor == X86_VENDOR_INTEL) && !(reg->access_size & 0x2))
+                cx->bm_sts_skip = 1;
+
         return retval;
 }
 EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe);
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 82e508677b91..fcc3c61fdecc 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -157,9 +157,14 @@ static int __init acpi_sleep_setup(char *str)
 #ifdef CONFIG_HIBERNATION
                 if (strncmp(str, "s4_nohwsig", 10) == 0)
                         acpi_no_s4_hw_signature();
-                if (strncmp(str, "s4_nonvs", 8) == 0)
-                        acpi_s4_no_nvs();
+                if (strncmp(str, "s4_nonvs", 8) == 0) {
+                        pr_warning("ACPI: acpi_sleep=s4_nonvs is deprecated, "
+                                        "please use acpi_sleep=nonvs instead");
+                        acpi_nvs_nosave();
+                }
 #endif
+                if (strncmp(str, "nonvs", 5) == 0)
+                        acpi_nvs_nosave();
                 if (strncmp(str, "old_ordering", 12) == 0)
                         acpi_old_suspend_ordering();
                 str = strchr(str, ',');
diff --git a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
index ce7cde713e71..a36de5bbb622 100644
--- a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
@@ -368,22 +368,16 @@ static int __init pcc_cpufreq_do_osc(acpi_handle *handle)
                 return -ENODEV;
 
         out_obj = output.pointer;
-        if (out_obj->type != ACPI_TYPE_BUFFER) {
-                ret = -ENODEV;
-                goto out_free;
-        }
+        if (out_obj->type != ACPI_TYPE_BUFFER)
+                return -ENODEV;
 
         errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0);
-        if (errors) {
-                ret = -ENODEV;
-                goto out_free;
-        }
+        if (errors)
+                return -ENODEV;
 
         supported = *((u32 *)(out_obj->buffer.pointer + 4));
-        if (!(supported & 0x1)) {
-                ret = -ENODEV;
-                goto out_free;
-        }
+        if (!(supported & 0x1))
+                return -ENODEV;
 
 out_free:
         kfree(output.pointer);
@@ -397,13 +391,17 @@ static int __init pcc_cpufreq_probe(void)
         struct pcc_memory_resource *mem_resource;
         struct pcc_register_resource *reg_resource;
         union acpi_object *out_obj, *member;
-        acpi_handle handle, osc_handle;
+        acpi_handle handle, osc_handle, pcch_handle;
         int ret = 0;
 
         status = acpi_get_handle(NULL, "\\_SB", &handle);
         if (ACPI_FAILURE(status))
                 return -ENODEV;
 
+        status = acpi_get_handle(handle, "PCCH", &pcch_handle);
+        if (ACPI_FAILURE(status))
+                return -ENODEV;
+
         status = acpi_get_handle(handle, "_OSC", &osc_handle);
         if (ACPI_SUCCESS(status)) {
                 ret = pcc_cpufreq_do_osc(&osc_handle);
@@ -543,13 +541,13 @@ static int pcc_cpufreq_cpu_init(struct cpufreq_policy *policy)
 
         if (!pcch_virt_addr) {
                 result = -1;
-                goto pcch_null;
+                goto out;
         }
 
         result = pcc_get_offset(cpu);
         if (result) {
                 dprintk("init: PCCP evaluation failed\n");
-                goto free;
+                goto out;
         }
 
         policy->max = policy->cpuinfo.max_freq =
@@ -558,14 +556,15 @@ static int pcc_cpufreq_cpu_init(struct cpufreq_policy *policy)
                 ioread32(&pcch_hdr->minimum_frequency) * 1000;
         policy->cur = pcc_get_freq(cpu);
 
+        if (!policy->cur) {
+                dprintk("init: Unable to get current CPU frequency\n");
+                result = -EINVAL;
+                goto out;
+        }
+
         dprintk("init: policy->max is %d, policy->min is %d\n",
                 policy->max, policy->min);
-
-        return 0;
-free:
-        pcc_clear_mapping();
-        free_percpu(pcc_cpu_info);
-pcch_null:
+out:
         return result;
 }
 
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 7ec2123838e6..3e90cce3dc8b 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -1023,13 +1023,12 @@ static int get_transition_latency(struct powernow_k8_data *data)
         }
         if (max_latency == 0) {
                 /*
-                 * Fam 11h always returns 0 as transition latency.
-                 * This is intended and means "very fast". While cpufreq core
-                 * and governors currently can handle that gracefully, better
-                 * set it to 1 to avoid problems in the future.
-                 * For all others it's a BIOS bug.
+                 * Fam 11h and later may return 0 as transition latency. This
+                 * is intended and means "very fast". While cpufreq core and
+                 * governors currently can handle that gracefully, better set it
+                 * to 1 to avoid problems in the future.
                  */
-                if (boot_cpu_data.x86 != 0x11)
+                if (boot_cpu_data.x86 < 0x11)
                         printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
                                 "latency\n");
                 max_latency = 1;
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index a198b7c87a12..ba390d731175 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -964,7 +964,7 @@ fs_initcall(hpet_late_init);
 
 void hpet_disable(void)
 {
-        if (is_hpet_capable()) {
+        if (is_hpet_capable() && hpet_virt_address) {
                 unsigned int cfg = hpet_readl(HPET_CFG);
 
                 if (hpet_legacy_int_enabled) {
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index 7c9f02c130f3..cafa7c80ac95 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -276,16 +276,6 @@ static struct sys_device device_i8259A = {
         .cls    = &i8259_sysdev_class,
 };
 
-static int __init i8259A_init_sysfs(void)
-{
-        int error = sysdev_class_register(&i8259_sysdev_class);
-        if (!error)
-                error = sysdev_register(&device_i8259A);
-        return error;
-}
-
-device_initcall(i8259A_init_sysfs);
-
 static void mask_8259A(void)
 {
         unsigned long flags;
@@ -407,3 +397,18 @@ struct legacy_pic default_legacy_pic = {
 };
 
 struct legacy_pic *legacy_pic = &default_legacy_pic;
+
+static int __init i8259A_init_sysfs(void)
+{
+        int error;
+
+        if (legacy_pic != &default_legacy_pic)
+                return 0;
+
+        error = sysdev_class_register(&i8259_sysdev_class);
+        if (!error)
+                error = sysdev_register(&device_i8259A);
+        return error;
+}
+
+device_initcall(i8259A_init_sysfs);
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index 4f4af75b9482..01ab17ae2ae7 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -572,7 +572,6 @@ static int __kgdb_notify(struct die_args *args, unsigned long cmd)
         return NOTIFY_STOP;
 }
 
-#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
 int kgdb_ll_trap(int cmd, const char *str,
                  struct pt_regs *regs, long err, int trap, int sig)
 {
@@ -590,7 +589,6 @@ int kgdb_ll_trap(int cmd, const char *str,
 
         return __kgdb_notify(&args, cmd);
 }
-#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
 
 static int
 kgdb_notify(struct notifier_block *self, unsigned long cmd, void *ptr)
@@ -625,6 +623,12 @@ int kgdb_arch_init(void)
         return register_die_notifier(&kgdb_notifier);
 }
 
+static void kgdb_hw_overflow_handler(struct perf_event *event, int nmi,
+                struct perf_sample_data *data, struct pt_regs *regs)
+{
+        kgdb_ll_trap(DIE_DEBUG, "debug", regs, 0, 0, SIGTRAP);
+}
+
 void kgdb_arch_late(void)
 {
         int i, cpu;
@@ -655,6 +659,7 @@ void kgdb_arch_late(void)
                 for_each_online_cpu(cpu) {
                         pevent = per_cpu_ptr(breakinfo[i].pev, cpu);
                         pevent[0]->hw.sample_period = 1;
+                        pevent[0]->overflow_handler = kgdb_hw_overflow_handler;
                         if (pevent[0]->destroy != NULL) {
                                 pevent[0]->destroy = NULL;
                                 release_bp_slot(*pevent);
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 89d66ca4d87c..2331bdc2b549 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -342,6 +342,7 @@ static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
                         /* advance table_gfn when emulating 1gb pages with 4k */
                         if (delta == 0)
                                 table_gfn += PT_INDEX(addr, level);
+                        access &= gw->pte_access;
                 } else {
                         direct = 0;
                         table_gfn = gw->table_gfn[level - 2];
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 05d571f6f196..7fa89c39c64f 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1562,7 +1562,7 @@ static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
 
         r = -ENOMEM;
         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
-        entries = vmalloc(size);
+        entries = kmalloc(size, GFP_KERNEL);
         if (!entries)
                 goto out;
 
@@ -1581,7 +1581,7 @@ static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
         r = n;
 
 out_free:
-        vfree(entries);
+        kfree(entries);
 out:
         return r;
 }
diff --git a/drivers/acpi/acpica/evxfevnt.c b/drivers/acpi/acpica/evxfevnt.c
index d97b8dce1668..18b3f1468b7d 100644
--- a/drivers/acpi/acpica/evxfevnt.c
+++ b/drivers/acpi/acpica/evxfevnt.c
@@ -70,6 +70,7 @@ acpi_ev_get_gpe_device(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
 acpi_status acpi_enable(void)
 {
         acpi_status status;
+        int retry;
 
         ACPI_FUNCTION_TRACE(acpi_enable);
 
@@ -98,16 +99,18 @@ acpi_status acpi_enable(void)
 
         /* Sanity check that transition succeeded */
 
-        if (acpi_hw_get_mode() != ACPI_SYS_MODE_ACPI) {
-                ACPI_ERROR((AE_INFO,
-                            "Hardware did not enter ACPI mode"));
-                return_ACPI_STATUS(AE_NO_HARDWARE_RESPONSE);
+        for (retry = 0; retry < 30000; ++retry) {
+                if (acpi_hw_get_mode() == ACPI_SYS_MODE_ACPI) {
+                        if (retry != 0)
+                                ACPI_WARNING((AE_INFO,
+                                "Platform took > %d00 usec to enter ACPI mode", retry));
+                        return_ACPI_STATUS(AE_OK);
+                }
+                acpi_os_stall(100);     /* 100 usec */
         }
 
-        ACPI_DEBUG_PRINT((ACPI_DB_INIT,
-                          "Transition to ACPI mode successful\n"));
-
-        return_ACPI_STATUS(AE_OK);
+        ACPI_ERROR((AE_INFO, "Hardware did not enter ACPI mode"));
+        return_ACPI_STATUS(AE_NO_HARDWARE_RESPONSE);
 }
 
 ACPI_EXPORT_SYMBOL(acpi_enable)
diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index 3026e3fa83ef..dc58402b0a17 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c
@@ -868,9 +868,15 @@ static void acpi_battery_remove_fs(struct acpi_device *device)
 static void acpi_battery_notify(struct acpi_device *device, u32 event)
 {
         struct acpi_battery *battery = acpi_driver_data(device);
+#ifdef CONFIG_ACPI_SYSFS_POWER
+        struct device *old;
+#endif
 
         if (!battery)
                 return;
+#ifdef CONFIG_ACPI_SYSFS_POWER
+        old = battery->bat.dev;
+#endif
         acpi_battery_update(battery);
         acpi_bus_generate_proc_event(device, event,
                                      acpi_battery_present(battery));
@@ -879,7 +885,7 @@ static void acpi_battery_notify(struct acpi_device *device, u32 event)
                                         acpi_battery_present(battery));
 #ifdef CONFIG_ACPI_SYSFS_POWER
         /* acpi_battery_update could remove power_supply object */
-        if (battery->bat.dev)
+        if (old && battery->bat.dev)
                 power_supply_changed(&battery->bat);
 #endif
 }
diff --git a/drivers/acpi/blacklist.c b/drivers/acpi/blacklist.c
index 01381be05e96..2bb28b9d91c4 100644
--- a/drivers/acpi/blacklist.c
+++ b/drivers/acpi/blacklist.c
@@ -214,7 +214,7 @@ static struct dmi_system_id acpi_osi_dmi_table[] __initdata = {
         .ident = "Sony VGN-SR290J",
         .matches = {
                      DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
-                     DMI_MATCH(DMI_PRODUCT_NAME, "Sony VGN-SR290J"),
+                     DMI_MATCH(DMI_PRODUCT_NAME, "VGN-SR290J"),
                 },
         },
         {
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index 51284351418f..e9699aaed109 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -223,7 +223,7 @@ static bool processor_physically_present(acpi_handle handle)
         type = (acpi_type == ACPI_TYPE_DEVICE) ? 1 : 0;
         cpuid = acpi_get_cpuid(handle, type, acpi_id);
 
-        if (cpuid == -1)
+        if ((cpuid == -1) && (num_possible_cpus() > 1))
                 return false;
 
         return true;
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index b1b385692f46..e9a8026d39f0 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -76,14 +76,19 @@ static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
 module_param(max_cstate, uint, 0000);
 static unsigned int nocst __read_mostly;
 module_param(nocst, uint, 0000);
+static int bm_check_disable __read_mostly;
+module_param(bm_check_disable, uint, 0000);
 
 static unsigned int latency_factor __read_mostly = 2;
 module_param(latency_factor, uint, 0644);
 
+#ifdef CONFIG_ACPI_PROCFS
 static u64 us_to_pm_timer_ticks(s64 t)
 {
         return div64_u64(t * PM_TIMER_FREQUENCY, 1000000);
 }
+#endif
+
 /*
  * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  * For now disable this. Probably a bug somewhere else.
@@ -763,6 +768,9 @@ static int acpi_idle_bm_check(void)
 {
         u32 bm_status = 0;
 
+        if (bm_check_disable)
+                return 0;
+
         acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
         if (bm_status)
                 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
@@ -947,7 +955,7 @@ static int acpi_idle_enter_bm(struct cpuidle_device *dev,
         if (acpi_idle_suspend)
                 return(acpi_idle_enter_c1(dev, state));
 
-        if (acpi_idle_bm_check()) {
+        if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
                 if (dev->safe_state) {
                         dev->last_state = dev->safe_state;
                         return dev->safe_state->enter(dev, dev->safe_state);
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index 5b7c52e4a00f..2862c781b372 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -82,6 +82,20 @@ static int acpi_sleep_prepare(u32 acpi_state)
 static u32 acpi_target_sleep_state = ACPI_STATE_S0;
 
 /*
+ * The ACPI specification wants us to save NVS memory regions during hibernation
+ * and to restore them during the subsequent resume.  Windows does that also for
+ * suspend to RAM.  However, it is known that this mechanism does not work on
+ * all machines, so we allow the user to disable it with the help of the
+ * 'acpi_sleep=nonvs' kernel command line option.
+ */
+static bool nvs_nosave;
+
+void __init acpi_nvs_nosave(void)
+{
+        nvs_nosave = true;
+}
+
+/*
  * ACPI 1.0 wants us to execute _PTS before suspending devices, so we allow the
  * user to request that behavior by using the 'acpi_old_suspend_ordering'
  * kernel command line option that causes the following variable to be set.
@@ -197,8 +211,7 @@ static int acpi_suspend_begin(suspend_state_t pm_state)
         u32 acpi_state = acpi_suspend_states[pm_state];
         int error = 0;
 
-        error = suspend_nvs_alloc();
-
+        error = nvs_nosave ? 0 : suspend_nvs_alloc();
         if (error)
                 return error;
 
@@ -388,20 +401,6 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
 #endif /* CONFIG_SUSPEND */
 
 #ifdef CONFIG_HIBERNATION
-/*
- * The ACPI specification wants us to save NVS memory regions during hibernation
- * and to restore them during the subsequent resume.  However, it is not certain
- * if this mechanism is going to work on all machines, so we allow the user to
- * disable this mechanism using the 'acpi_sleep=s4_nonvs' kernel command line
- * option.
- */
-static bool s4_no_nvs;
-
-void __init acpi_s4_no_nvs(void)
-{
-        s4_no_nvs = true;
-}
-
 static unsigned long s4_hardware_signature;
 static struct acpi_table_facs *facs;
 static bool nosigcheck;
@@ -415,7 +414,7 @@ static int acpi_hibernation_begin(void)
 {
         int error;
 
-        error = s4_no_nvs ? 0 : suspend_nvs_alloc();
+        error = nvs_nosave ? 0 : suspend_nvs_alloc();
         if (!error) {
                 acpi_target_sleep_state = ACPI_STATE_S4;
                 acpi_sleep_tts_switch(acpi_target_sleep_state);
@@ -510,7 +509,7 @@ static int acpi_hibernation_begin_old(void)
         error = acpi_sleep_prepare(ACPI_STATE_S4);
 
         if (!error) {
-                if (!s4_no_nvs)
+                if (!nvs_nosave)
                         error = suspend_nvs_alloc();
                 if (!error)
                         acpi_target_sleep_state = ACPI_STATE_S4;
diff --git a/drivers/base/core.c b/drivers/base/core.c
index 9630fbdf4e6c..9b9d3bd54e3a 100644
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -673,7 +673,7 @@ static struct kobject *get_device_parent(struct device *dev,
                  */
                 if (parent == NULL)
                         parent_kobj = virtual_device_parent(dev);
-                else if (parent->class)
+                else if (parent->class && !dev->class->ns_type)
                         return &parent->kobj;
                 else
                         parent_kobj = &parent->kobj;
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 9344216183a4..a7547150a705 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1216,17 +1216,20 @@ static int intel_i915_get_gtt_size(void)
 
                 /* G33's GTT size defined in gmch_ctrl */
                 pci_read_config_word(agp_bridge->dev, I830_GMCH_CTRL, &gmch_ctrl);
-                switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) {
-                case G33_PGETBL_SIZE_1M:
+                switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
+                case I830_GMCH_GMS_STOLEN_512:
+                        size = 512;
+                        break;
+                case I830_GMCH_GMS_STOLEN_1024:
                         size = 1024;
                         break;
-                case G33_PGETBL_SIZE_2M:
-                        size = 2048;
+                case I830_GMCH_GMS_STOLEN_8192:
+                        size = 8*1024;
                         break;
                 default:
                         dev_info(&agp_bridge->dev->dev,
                                  "unknown page table size 0x%x, assuming 512KB\n",
-                                (gmch_ctrl & G33_PGETBL_SIZE_MASK));
+                                (gmch_ctrl & I830_GMCH_GMS_MASK));
                         size = 512;
                 }
         } else {
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index 24314a9cffe8..1030f8420137 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -623,7 +623,14 @@ static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
 
 static int tpm_tis_pnp_resume(struct pnp_dev *dev)
 {
-        return tpm_pm_resume(&dev->dev);
+        struct tpm_chip *chip = pnp_get_drvdata(dev);
+        int ret;
+
+        ret = tpm_pm_resume(&dev->dev);
+        if (!ret)
+                tpm_continue_selftest(chip);
+
+        return ret;
 }
 
 static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = {
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 063b2184caf5..938b74ea9ffb 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -1077,6 +1077,7 @@ err_out_unregister:
 
 err_unlock_policy:
         unlock_policy_rwsem_write(cpu);
+        free_cpumask_var(policy->related_cpus);
 err_free_cpumask:
         free_cpumask_var(policy->cpus);
 err_free_policy:
@@ -1762,17 +1763,8 @@ static int __cpufreq_set_policy(struct cpufreq_policy *data,
                         dprintk("governor switch\n");
 
                         /* end old governor */
-                        if (data->governor) {
-                                /*
-                                 * Need to release the rwsem around governor
-                                 * stop due to lock dependency between
-                                 * cancel_delayed_work_sync and the read lock
-                                 * taken in the delayed work handler.
-                                 */
-                                unlock_policy_rwsem_write(data->cpu);
+                        if (data->governor)
                                 __cpufreq_governor(data, CPUFREQ_GOV_STOP);
-                                lock_policy_rwsem_write(data->cpu);
-                        }
 
                         /* start new governor */
                         data->governor = policy->governor;
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c
index cc9357da0e34..e0187d16dd7c 100644
--- a/drivers/edac/i7core_edac.c
+++ b/drivers/edac/i7core_edac.c
@@ -1300,7 +1300,7 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno,
                 if (devno == 0)
                         return -ENODEV;
 
-                i7core_printk(KERN_ERR,
+                i7core_printk(KERN_INFO,
                         "Device not found: dev %02x.%d PCI ID %04x:%04x\n",
                         dev_descr->dev, dev_descr->func,
                         PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index f39b00a46eda..1052340e6802 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -336,6 +336,7 @@ static struct of_device_id mpc85xx_pci_err_of_match[] = {
         },
         {},
 };
+MODULE_DEVICE_TABLE(of, mpc85xx_pci_err_of_match);
 
 static struct of_platform_driver mpc85xx_pci_err_driver = {
         .probe = mpc85xx_pci_err_probe,
@@ -650,6 +651,7 @@ static struct of_device_id mpc85xx_l2_err_of_match[] = {
         { .compatible = "fsl,p2020-l2-cache-controller", },
         {},
 };
+MODULE_DEVICE_TABLE(of, mpc85xx_l2_err_of_match);
 
 static struct of_platform_driver mpc85xx_l2_err_driver = {
         .probe = mpc85xx_l2_err_probe,
@@ -1126,6 +1128,7 @@ static struct of_device_id mpc85xx_mc_err_of_match[] = {
         { .compatible = "fsl,p2020-memory-controller", },
         {},
 };
+MODULE_DEVICE_TABLE(of, mpc85xx_mc_err_of_match);
 
 static struct of_platform_driver mpc85xx_mc_err_driver = {
         .probe = mpc85xx_mc_err_probe,
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 3ca36542e338..4e51fe3c1fc4 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -893,10 +893,12 @@ EXPORT_SYMBOL_GPL(gpio_sysfs_set_active_low);
 void gpio_unexport(unsigned gpio)
 {
         struct gpio_desc        *desc;
-        int                     status = -EINVAL;
+        int                     status = 0;
 
-        if (!gpio_is_valid(gpio))
+        if (!gpio_is_valid(gpio)) {
+                status = -EINVAL;
                 goto done;
+        }
 
         mutex_lock(&sysfs_lock);
 
@@ -911,7 +913,6 @@ void gpio_unexport(unsigned gpio)
                         clear_bit(FLAG_EXPORT, &desc->flags);
                         put_device(dev);
                         device_unregister(dev);
-                        status = 0;
                 } else
                         status = -ENODEV;
         }
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index c1981861bbbd..f87bf104df7a 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -864,8 +864,8 @@ drm_mode_std(struct drm_connector *connector, struct edid *edid,
                 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
                                     false);
                 mode->hdisplay = 1366;
-                mode->vsync_start = mode->vsync_start - 1;
-                mode->vsync_end = mode->vsync_end - 1;
+                mode->hsync_start = mode->hsync_start - 1;
+                mode->hsync_end = mode->hsync_end - 1;
                 return mode;
         }
 
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index aee83fa178f6..9214119c0154 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -605,6 +605,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
                 case FBC_NOT_TILED:
                         seq_printf(m, "scanout buffer not tiled");
                         break;
+                case FBC_MULTIPLE_PIPES:
+                        seq_printf(m, "multiple pipes are enabled");
+                        break;
                 default:
                         seq_printf(m, "unknown reason");
                 }
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index f00c5ae9556c..2305a1234f1e 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1300,7 +1300,7 @@ static void i915_cleanup_compression(struct drm_device *dev)
         struct drm_i915_private *dev_priv = dev->dev_private;
 
         drm_mm_put_block(dev_priv->compressed_fb);
-        if (!IS_GM45(dev))
+        if (dev_priv->compressed_llb)
                 drm_mm_put_block(dev_priv->compressed_llb);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d147ab2f5bfc..2e1744d37ad5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -215,6 +215,7 @@ enum no_fbc_reason {
         FBC_MODE_TOO_LARGE, /* mode too large for compression */
         FBC_BAD_PLANE, /* fbc not supported on plane */
         FBC_NOT_TILED, /* buffer not tiled */
+        FBC_MULTIPLE_PIPES, /* more than one pipe active */
 };
 
 enum intel_pch {
@@ -222,6 +223,8 @@ enum intel_pch {
         PCH_CPT,        /* Cougarpoint PCH */
 };
 
+#define QUIRK_PIPEA_FORCE (1<<0)
+
 struct intel_fbdev;
 
 typedef struct drm_i915_private {
@@ -337,6 +340,8 @@ typedef struct drm_i915_private {
         /* PCH chipset type */
         enum intel_pch pch_type;
 
+        unsigned long quirks;
+
         /* Register state */
         bool modeset_on_lid;
         u8 saveLBB;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 51bd301cf10d..5aa747fc25a9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3647,6 +3647,7 @@ i915_gem_wait_for_pending_flip(struct drm_device *dev,
         return ret;
 }
 
+
 int
 i915_gem_do_execbuffer(struct drm_device *dev, void *data,
                        struct drm_file *file_priv,
@@ -3794,7 +3795,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
                                 unsigned long long total_size = 0;
                                 int num_fences = 0;
                                 for (i = 0; i < args->buffer_count; i++) {
-                                        obj_priv = object_list[i]->driver_private;
+                                        obj_priv = to_intel_bo(object_list[i]);
 
                                         total_size += object_list[i]->size;
                                         num_fences +=
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6d9b0288272a..cf41c672defe 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2869,6 +2869,7 @@
 
 #define PCH_PP_STATUS           0xc7200
 #define PCH_PP_CONTROL          0xc7204
+#define  PANEL_UNLOCK_REGS      (0xabcd << 16)
 #define  EDP_FORCE_VDD          (1 << 3)
 #define  EDP_BLC_ENABLE         (1 << 2)
 #define  PANEL_POWER_RESET      (1 << 1)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 68dcf36e2793..5e21b3119824 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -862,8 +862,8 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
         intel_clock_t clock;
         int max_n;
         bool found;
-        /* approximately equals target * 0.00488 */
-        int err_most = (target >> 8) + (target >> 10);
+        /* approximately equals target * 0.00585 */
+        int err_most = (target >> 8) + (target >> 9);
         found = false;
 
         if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
@@ -1180,8 +1180,12 @@ static void intel_update_fbc(struct drm_crtc *crtc,
         struct drm_framebuffer *fb = crtc->fb;
         struct intel_framebuffer *intel_fb;
         struct drm_i915_gem_object *obj_priv;
+        struct drm_crtc *tmp_crtc;
         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
         int plane = intel_crtc->plane;
+        int crtcs_enabled = 0;
+
+        DRM_DEBUG_KMS("\n");
 
         if (!i915_powersave)
                 return;
@@ -1199,10 +1203,21 @@ static void intel_update_fbc(struct drm_crtc *crtc,
          * If FBC is already on, we just have to verify that we can
          * keep it that way...
          * Need to disable if:
+         *   - more than one pipe is active
          *   - changing FBC params (stride, fence, mode)
          *   - new fb is too large to fit in compressed buffer
          *   - going to an unsupported config (interlace, pixel multiply, etc.)
          */
+        list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {
+                if (tmp_crtc->enabled)
+                        crtcs_enabled++;
+        }
+        DRM_DEBUG_KMS("%d pipes active\n", crtcs_enabled);
+        if (crtcs_enabled > 1) {
+                DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
+                dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES;
+                goto out_disable;
+        }
         if (intel_fb->obj->size > dev_priv->cfb_size) {
                 DRM_DEBUG_KMS("framebuffer too large, disabling "
                                 "compression\n");
@@ -1255,7 +1270,7 @@ out_disable:
         }
 }
 
-static int
+int
 intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj)
 {
         struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
@@ -2255,6 +2270,11 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
                         intel_wait_for_vblank(dev);
                 }
 
+                /* Don't disable pipe A or pipe A PLLs if needed */
+                if (pipeconf_reg == PIPEACONF &&
+                    (dev_priv->quirks & QUIRK_PIPEA_FORCE))
+                        goto skip_pipe_off;
+
                 /* Next, disable display pipes */
                 temp = I915_READ(pipeconf_reg);
                 if ((temp & PIPEACONF_ENABLE) != 0) {
@@ -2270,7 +2290,7 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
                         I915_WRITE(dpll_reg, temp & ~DPLL_VCO_ENABLE);
                         I915_READ(dpll_reg);
                 }
-
+        skip_pipe_off:
                 /* Wait for the clocks to turn off. */
                 udelay(150);
                 break;
@@ -2356,8 +2376,6 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,
                 if (mode->clock * 3 > 27000 * 4)
                         return MODE_CLOCK_HIGH;
         }
-
-        drm_mode_set_crtcinfo(adjusted_mode, 0);
         return true;
 }
 
@@ -3736,6 +3754,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                         if (dev_priv->lvds_dither) {
                                 if (HAS_PCH_SPLIT(dev)) {
                                         pipeconf |= PIPE_ENABLE_DITHER;
+                                        pipeconf &= ~PIPE_DITHER_TYPE_MASK;
                                         pipeconf |= PIPE_DITHER_TYPE_ST01;
                                 } else
                                         lvds |= LVDS_ENABLE_DITHER;
@@ -4412,7 +4431,8 @@ static void intel_increase_pllclock(struct drm_crtc *crtc, bool schedule)
                 DRM_DEBUG_DRIVER("upclocking LVDS\n");
 
                 /* Unlock panel regs */
-                I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16));
+                I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) |
+                           PANEL_UNLOCK_REGS);
 
                 dpll &= ~DISPLAY_RATE_SELECT_FPA1;
                 I915_WRITE(dpll_reg, dpll);
@@ -4455,7 +4475,8 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
                 DRM_DEBUG_DRIVER("downclocking LVDS\n");
 
                 /* Unlock panel regs */
-                I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | (0xabcd << 16));
+                I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) |
+                           PANEL_UNLOCK_REGS);
 
                 dpll |= DISPLAY_RATE_SELECT_FPA1;
                 I915_WRITE(dpll_reg, dpll);
@@ -4695,7 +4716,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
         struct drm_gem_object *obj;
         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
         struct intel_unpin_work *work;
-        unsigned long flags;
+        unsigned long flags, offset;
         int pipesrc_reg = (intel_crtc->pipe == 0) ? PIPEASRC : PIPEBSRC;
         int ret, pipesrc;
         u32 flip_mask;
@@ -4762,19 +4783,23 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
                 while (I915_READ(ISR) & flip_mask)
                         ;
 
+        /* Offset into the new buffer for cases of shared fbs between CRTCs */
+        offset = obj_priv->gtt_offset;
+        offset += (crtc->y * fb->pitch) + (crtc->x * (fb->bits_per_pixel) / 8);
+
         BEGIN_LP_RING(4);
         if (IS_I965G(dev)) {
                 OUT_RING(MI_DISPLAY_FLIP |
                          MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
                 OUT_RING(fb->pitch);
-                OUT_RING(obj_priv->gtt_offset | obj_priv->tiling_mode);
+                OUT_RING(offset | obj_priv->tiling_mode);
                 pipesrc = I915_READ(pipesrc_reg); 
                 OUT_RING(pipesrc & 0x0fff0fff);
         } else {
                 OUT_RING(MI_DISPLAY_FLIP_I915 |
                          MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
                 OUT_RING(fb->pitch);
-                OUT_RING(obj_priv->gtt_offset);
+                OUT_RING(offset);
                 OUT_RING(MI_NOOP);
         }
         ADVANCE_LP_RING();
@@ -5506,6 +5531,66 @@ static void intel_init_display(struct drm_device *dev)
         }
 }
 
+/*
+ * Some BIOSes insist on assuming the GPU's pipe A is enabled at suspend,
+ * resume, or other times.  This quirk makes sure that's the case for
+ * affected systems.
+ */
+static void quirk_pipea_force (struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+
+        dev_priv->quirks |= QUIRK_PIPEA_FORCE;
+        DRM_DEBUG_DRIVER("applying pipe a force quirk\n");
+}
+
+struct intel_quirk {
+        int device;
+        int subsystem_vendor;
+        int subsystem_device;
+        void (*hook)(struct drm_device *dev);
+};
+
+struct intel_quirk intel_quirks[] = {
+        /* HP Compaq 2730p needs pipe A force quirk (LP: #291555) */
+        { 0x2a42, 0x103c, 0x30eb, quirk_pipea_force },
+        /* HP Mini needs pipe A force quirk (LP: #322104) */
+        { 0x27ae,0x103c, 0x361a, quirk_pipea_force },
+
+        /* Thinkpad R31 needs pipe A force quirk */
+        { 0x3577, 0x1014, 0x0505, quirk_pipea_force },
+        /* Toshiba Protege R-205, S-209 needs pipe A force quirk */
+        { 0x2592, 0x1179, 0x0001, quirk_pipea_force },
+
+        /* ThinkPad X30 needs pipe A force quirk (LP: #304614) */
+        { 0x3577,  0x1014, 0x0513, quirk_pipea_force },
+        /* ThinkPad X40 needs pipe A force quirk */
+
+        /* ThinkPad T60 needs pipe A force quirk (bug #16494) */
+        { 0x2782, 0x17aa, 0x201a, quirk_pipea_force },
+
+        /* 855 & before need to leave pipe A & dpll A up */
+        { 0x3582, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },
+        { 0x2562, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },
+};
+
+static void intel_init_quirks(struct drm_device *dev)
+{
+        struct pci_dev *d = dev->pdev;
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(intel_quirks); i++) {
+                struct intel_quirk *q = &intel_quirks[i];
+
+                if (d->device == q->device &&
+                    (d->subsystem_vendor == q->subsystem_vendor ||
+                     q->subsystem_vendor == PCI_ANY_ID) &&
+                    (d->subsystem_device == q->subsystem_device ||
+                     q->subsystem_device == PCI_ANY_ID))
+                        q->hook(dev);
+        }
+}
+
 void intel_modeset_init(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
@@ -5518,6 +5603,8 @@ void intel_modeset_init(struct drm_device *dev)
 
         dev->mode_config.funcs = (void *)&intel_mode_funcs;
 
+        intel_init_quirks(dev);
+
         intel_init_display(dev);
 
         if (IS_I965G(dev)) {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1aac59e83bff..5dde80f9e652 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -717,6 +717,51 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
         }
 }
 
+static void ironlake_edp_panel_on (struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        unsigned long timeout = jiffies + msecs_to_jiffies(5000);
+        u32 pp, pp_status;
+
+        pp_status = I915_READ(PCH_PP_STATUS);
+        if (pp_status & PP_ON)
+                return;
+
+        pp = I915_READ(PCH_PP_CONTROL);
+        pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON;
+        I915_WRITE(PCH_PP_CONTROL, pp);
+        do {
+                pp_status = I915_READ(PCH_PP_STATUS);
+        } while (((pp_status & PP_ON) == 0) && !time_after(jiffies, timeout));
+
+        if (time_after(jiffies, timeout))
+                DRM_DEBUG_KMS("panel on wait timed out: 0x%08x\n", pp_status);
+
+        pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD);
+        I915_WRITE(PCH_PP_CONTROL, pp);
+}
+
+static void ironlake_edp_panel_off (struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        unsigned long timeout = jiffies + msecs_to_jiffies(5000);
+        u32 pp, pp_status;
+
+        pp = I915_READ(PCH_PP_CONTROL);
+        pp &= ~POWER_TARGET_ON;
+        I915_WRITE(PCH_PP_CONTROL, pp);
+        do {
+                pp_status = I915_READ(PCH_PP_STATUS);
+        } while ((pp_status & PP_ON) && !time_after(jiffies, timeout));
+
+        if (time_after(jiffies, timeout))
+                DRM_DEBUG_KMS("panel off wait timed out\n");
+
+        /* Make sure VDD is enabled so DP AUX will work */
+        pp |= EDP_FORCE_VDD;
+        I915_WRITE(PCH_PP_CONTROL, pp);
+}
+
 static void ironlake_edp_backlight_on (struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
@@ -751,14 +796,18 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
         if (mode != DRM_MODE_DPMS_ON) {
                 if (dp_reg & DP_PORT_EN) {
                         intel_dp_link_down(intel_encoder, dp_priv->DP);
-                        if (IS_eDP(intel_encoder))
+                        if (IS_eDP(intel_encoder)) {
                                 ironlake_edp_backlight_off(dev);
+                                ironlake_edp_panel_off(dev);
+                        }
                 }
         } else {
                 if (!(dp_reg & DP_PORT_EN)) {
                         intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration);
-                        if (IS_eDP(intel_encoder))
+                        if (IS_eDP(intel_encoder)) {
+                                ironlake_edp_panel_on(dev);
                                 ironlake_edp_backlight_on(dev);
+                        }
                 }
         }
         dp_priv->dpms_mode = mode;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 72206f37c4fb..2f7970be9051 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -215,6 +215,9 @@ extern void intel_init_clock_gating(struct drm_device *dev);
 extern void ironlake_enable_drps(struct drm_device *dev);
 extern void ironlake_disable_drps(struct drm_device *dev);
 
+extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
+                                      struct drm_gem_object *obj);
+
 extern int intel_framebuffer_init(struct drm_device *dev,
                                   struct intel_framebuffer *ifb,
                                   struct drm_mode_fb_cmd *mode_cmd,
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index c3c505244e07..3e18c9e7729b 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -98,7 +98,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
 
         mutex_lock(&dev->struct_mutex);
 
-        ret = i915_gem_object_pin(fbo, 64*1024);
+        ret = intel_pin_and_fence_fb_obj(dev, fbo);
         if (ret) {
                 DRM_ERROR("failed to pin fb: %d\n", ret);
                 goto out_unref;
@@ -236,7 +236,7 @@ int intel_fbdev_destroy(struct drm_device *dev,
 
         drm_framebuffer_cleanup(&ifb->base);
         if (ifb->obj)
-                drm_gem_object_unreference_unlocked(ifb->obj);
+                drm_gem_object_unreference(ifb->obj);
 
         return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 31df55f0a0a7..0eab8df5bf7e 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -599,6 +599,26 @@ static int intel_lvds_get_modes(struct drm_connector *connector)
         return 0;
 }
 
+static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
+{
+        DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
+        return 1;
+}
+
+/* The GPU hangs up on these systems if modeset is performed on LID open */
+static const struct dmi_system_id intel_no_modeset_on_lid[] = {
+        {
+                .callback = intel_no_modeset_on_lid_dmi_callback,
+                .ident = "Toshiba Tecra A11",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
+                },
+        },
+
+        { }     /* terminating entry */
+};
+
 /*
  * Lid events. Note the use of 'modeset_on_lid':
  *  - we set it on lid close, and reset it on open
@@ -622,6 +642,9 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
          */
         if (connector)
                 connector->status = connector->funcs->detect(connector);
+        /* Don't force modeset on machines where it causes a GPU lockup */
+        if (dmi_check_system(intel_no_modeset_on_lid))
+                return NOTIFY_OK;
         if (!acpi_lid_open()) {
                 dev_priv->modeset_on_lid = 1;
                 return NOTIFY_OK;
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 115d26b762cc..3fa6984d9896 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -333,6 +333,7 @@ static ssize_t radeon_get_pm_profile(struct device *dev,
         return snprintf(buf, PAGE_SIZE, "%s\n",
                         (cp == PM_PROFILE_AUTO) ? "auto" :
                         (cp == PM_PROFILE_LOW) ? "low" :
+                        (cp == PM_PROFILE_MID) ? "mid" :
                         (cp == PM_PROFILE_HIGH) ? "high" : "default");
 }
 
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 4917af96bae1..2ed435bd4b6c 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -539,9 +539,13 @@ static int mmci_get_cd(struct mmc_host *mmc)
         if (host->gpio_cd == -ENOSYS)
                 status = host->plat->status(mmc_dev(host->mmc));
         else
-                status = gpio_get_value(host->gpio_cd);
+                status = !gpio_get_value(host->gpio_cd);
 
-        return !status;
+        /*
+         * Use positive logic throughout - status is zero for no card,
+         * non-zero for card inserted.
+         */
+        return status;
 }
 
 static const struct mmc_host_ops mmci_ops = {
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index ee87325c7712..133d51528f8d 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -7,6 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#define CONFIG_MTD_NAND_OMAP_HWECC
 
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
@@ -23,20 +24,8 @@
 #include <plat/gpmc.h>
 #include <plat/nand.h>
 
-#define GPMC_IRQ_STATUS         0x18
-#define GPMC_ECC_CONFIG         0x1F4
-#define GPMC_ECC_CONTROL        0x1F8
-#define GPMC_ECC_SIZE_CONFIG    0x1FC
-#define GPMC_ECC1_RESULT        0x200
-
 #define DRIVER_NAME     "omap2-nand"
 
-#define NAND_WP_OFF     0
-#define NAND_WP_BIT     0x00000010
-
-#define GPMC_BUF_FULL   0x00000001
-#define GPMC_BUF_EMPTY  0x00000000
-
 #define NAND_Ecc_P1e            (1 << 0)
 #define NAND_Ecc_P2e            (1 << 1)
 #define NAND_Ecc_P4e            (1 << 2)
@@ -139,34 +128,11 @@ struct omap_nand_info {
 
         int                             gpmc_cs;
         unsigned long                   phys_base;
-        void __iomem                    *gpmc_cs_baseaddr;
-        void __iomem                    *gpmc_baseaddr;
-        void __iomem                    *nand_pref_fifo_add;
         struct completion               comp;
         int                             dma_ch;
 };
 
 /**
- * omap_nand_wp - This function enable or disable the Write Protect feature
- * @mtd: MTD device structure
- * @mode: WP ON/OFF
- */
-static void omap_nand_wp(struct mtd_info *mtd, int mode)
-{
-        struct omap_nand_info *info = container_of(mtd,
-                                                struct omap_nand_info, mtd);
-
-        unsigned long config = __raw_readl(info->gpmc_baseaddr + GPMC_CONFIG);
-
-        if (mode)
-                config &= ~(NAND_WP_BIT);       /* WP is ON */
-        else
-                config |= (NAND_WP_BIT);        /* WP is OFF */
-
-        __raw_writel(config, (info->gpmc_baseaddr + GPMC_CONFIG));
-}
-
-/**
  * omap_hwcontrol - hardware specific access to control-lines
  * @mtd: MTD device structure
  * @cmd: command to device
@@ -181,31 +147,17 @@ static void omap_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 {
         struct omap_nand_info *info = container_of(mtd,
                                         struct omap_nand_info, mtd);
-        switch (ctrl) {
-        case NAND_CTRL_CHANGE | NAND_CTRL_CLE:
-                info->nand.IO_ADDR_W = info->gpmc_cs_baseaddr +
-                                                GPMC_CS_NAND_COMMAND;
-                info->nand.IO_ADDR_R = info->gpmc_cs_baseaddr +
-                                                GPMC_CS_NAND_DATA;
-                break;
-
-        case NAND_CTRL_CHANGE | NAND_CTRL_ALE:
-                info->nand.IO_ADDR_W = info->gpmc_cs_baseaddr +
-                                                GPMC_CS_NAND_ADDRESS;
-                info->nand.IO_ADDR_R = info->gpmc_cs_baseaddr +
-                                                GPMC_CS_NAND_DATA;
-                break;
-
-        case NAND_CTRL_CHANGE | NAND_NCE:
-                info->nand.IO_ADDR_W = info->gpmc_cs_baseaddr +
-                                                GPMC_CS_NAND_DATA;
-                info->nand.IO_ADDR_R = info->gpmc_cs_baseaddr +
-                                                GPMC_CS_NAND_DATA;
-                break;
-        }
 
-        if (cmd != NAND_CMD_NONE)
-                __raw_writeb(cmd, info->nand.IO_ADDR_W);
+        if (cmd != NAND_CMD_NONE) {
+                if (ctrl & NAND_CLE)
+                        gpmc_nand_write(info->gpmc_cs, GPMC_NAND_COMMAND, cmd);
+
+                else if (ctrl & NAND_ALE)
+                        gpmc_nand_write(info->gpmc_cs, GPMC_NAND_ADDRESS, cmd);
+
+                else /* NAND_NCE */
+                        gpmc_nand_write(info->gpmc_cs, GPMC_NAND_DATA, cmd);
+        }
 }
 
 /**
@@ -232,11 +184,14 @@ static void omap_write_buf8(struct mtd_info *mtd, const u_char *buf, int len)
         struct omap_nand_info *info = container_of(mtd,
                                                 struct omap_nand_info, mtd);
         u_char *p = (u_char *)buf;
+        u32     status = 0;
 
         while (len--) {
                 iowrite8(*p++, info->nand.IO_ADDR_W);
-                while (GPMC_BUF_EMPTY == (readl(info->gpmc_baseaddr +
-                                                GPMC_STATUS) & GPMC_BUF_FULL));
+                /* wait until buffer is available for write */
+                do {
+                        status = gpmc_read_status(GPMC_STATUS_BUFFER);
+                } while (!status);
         }
 }
 
@@ -264,16 +219,16 @@ static void omap_write_buf16(struct mtd_info *mtd, const u_char * buf, int len)
         struct omap_nand_info *info = container_of(mtd,
                                                 struct omap_nand_info, mtd);
         u16 *p = (u16 *) buf;
-
+        u32     status = 0;
         /* FIXME try bursts of writesw() or DMA ... */
         len >>= 1;
 
         while (len--) {
                 iowrite16(*p++, info->nand.IO_ADDR_W);
-
-                while (GPMC_BUF_EMPTY == (readl(info->gpmc_baseaddr +
-                                                GPMC_STATUS) & GPMC_BUF_FULL))
-                        ;
+                /* wait until buffer is available for write */
+                do {
+                        status = gpmc_read_status(GPMC_STATUS_BUFFER);
+                } while (!status);
         }
 }
 
@@ -287,7 +242,7 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
 {
         struct omap_nand_info *info = container_of(mtd,
                                                 struct omap_nand_info, mtd);
-        uint32_t pfpw_status = 0, r_count = 0;
+        uint32_t r_count = 0;
         int ret = 0;
         u32 *p = (u32 *)buf;
 
@@ -310,16 +265,16 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
                 else
                         omap_read_buf8(mtd, buf, len);
         } else {
+                p = (u32 *) buf;
                 do {
-                        pfpw_status = gpmc_prefetch_status();
-                        r_count = ((pfpw_status >> 24) & 0x7F) >> 2;
-                        ioread32_rep(info->nand_pref_fifo_add, p, r_count);
+                        r_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);
+                        r_count = r_count >> 2;
+                        ioread32_rep(info->nand.IO_ADDR_R, p, r_count);
                         p += r_count;
                         len -= r_count << 2;
                 } while (len);
-
                 /* disable and stop the PFPW engine */
-                gpmc_prefetch_reset();
+                gpmc_prefetch_reset(info->gpmc_cs);
         }
 }
 
@@ -334,13 +289,13 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
 {
         struct omap_nand_info *info = container_of(mtd,
                                                 struct omap_nand_info, mtd);
-        uint32_t pfpw_status = 0, w_count = 0;
+        uint32_t pref_count = 0, w_count = 0;
         int i = 0, ret = 0;
-        u16 *p = (u16 *) buf;
+        u16 *p;
 
         /* take care of subpage writes */
         if (len % 2 != 0) {
-                writeb(*buf, info->nand.IO_ADDR_R);
+                writeb(*buf, info->nand.IO_ADDR_W);
                 p = (u16 *)(buf + 1);
                 len--;
         }
@@ -354,16 +309,19 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
                 else
                         omap_write_buf8(mtd, buf, len);
         } else {
-                pfpw_status = gpmc_prefetch_status();
-                while (pfpw_status & 0x3FFF) {
-                        w_count = ((pfpw_status >> 24) & 0x7F) >> 1;
+                p = (u16 *) buf;
+                while (len) {
+                        w_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);
+                        w_count = w_count >> 1;
                         for (i = 0; (i < w_count) && len; i++, len -= 2)
-                                iowrite16(*p++, info->nand_pref_fifo_add);
-                        pfpw_status = gpmc_prefetch_status();
+                                iowrite16(*p++, info->nand.IO_ADDR_W);
                 }
-
+                /* wait for data to flushed-out before reset the prefetch */
+                do {
+                        pref_count = gpmc_read_status(GPMC_PREFETCH_COUNT);
+                } while (pref_count);
                 /* disable and stop the PFPW engine */
-                gpmc_prefetch_reset();
+                gpmc_prefetch_reset(info->gpmc_cs);
         }
 }
 
@@ -451,8 +409,9 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
         /* setup and start DMA using dma_addr */
         wait_for_completion(&info->comp);
 
-        while (0x3fff & (prefetch_status = gpmc_prefetch_status()))
-                ;
+        do {
+                prefetch_status = gpmc_read_status(GPMC_PREFETCH_COUNT);
+        } while (prefetch_status);
         /* disable and stop the PFPW engine */
         gpmc_prefetch_reset();
 
@@ -530,29 +489,6 @@ static int omap_verify_buf(struct mtd_info *mtd, const u_char * buf, int len)
 }
 
 #ifdef CONFIG_MTD_NAND_OMAP_HWECC
-/**
- * omap_hwecc_init - Initialize the HW ECC for NAND flash in GPMC controller
- * @mtd: MTD device structure
- */
-static void omap_hwecc_init(struct mtd_info *mtd)
-{
-        struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
-                                                        mtd);
-        struct nand_chip *chip = mtd->priv;
-        unsigned long val = 0x0;
-
-        /* Read from ECC Control Register */
-        val = __raw_readl(info->gpmc_baseaddr + GPMC_ECC_CONTROL);
-        /* Clear all ECC | Enable Reg1 */
-        val = ((0x00000001<<8) | 0x00000001);
-        __raw_writel(val, info->gpmc_baseaddr + GPMC_ECC_CONTROL);
-
-        /* Read from ECC Size Config Register */
-        val = __raw_readl(info->gpmc_baseaddr + GPMC_ECC_SIZE_CONFIG);
-        /* ECCSIZE1=512 | Select eccResultsize[0-3] */
-        val = ((((chip->ecc.size >> 1) - 1) << 22) | (0x0000000F));
-        __raw_writel(val, info->gpmc_baseaddr + GPMC_ECC_SIZE_CONFIG);
-}
 
 /**
  * gen_true_ecc - This function will generate true ECC value
@@ -755,19 +691,7 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
 {
         struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
                                                         mtd);
-        unsigned long val = 0x0;
-        unsigned long reg;
-
-        /* Start Reading from HW ECC1_Result = 0x200 */
-        reg = (unsigned long)(info->gpmc_baseaddr + GPMC_ECC1_RESULT);
-        val = __raw_readl(reg);
-        *ecc_code++ = val;          /* P128e, ..., P1e */
-        *ecc_code++ = val >> 16;    /* P128o, ..., P1o */
-        /* P2048o, P1024o, P512o, P256o, P2048e, P1024e, P512e, P256e */
-        *ecc_code++ = ((val >> 8) & 0x0f) | ((val >> 20) & 0xf0);
-        reg += 4;
-
-        return 0;
+        return gpmc_calculate_ecc(info->gpmc_cs, dat, ecc_code);
 }
 
 /**
@@ -781,32 +705,10 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int mode)
                                                         mtd);
         struct nand_chip *chip = mtd->priv;
         unsigned int dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
-        unsigned long val = __raw_readl(info->gpmc_baseaddr + GPMC_ECC_CONFIG);
-
-        switch (mode) {
-        case NAND_ECC_READ:
-                __raw_writel(0x101, info->gpmc_baseaddr + GPMC_ECC_CONTROL);
-                /* (ECC 16 or 8 bit col) | ( CS  )  | ECC Enable */
-                val = (dev_width << 7) | (info->gpmc_cs << 1) | (0x1);
-                break;
-        case NAND_ECC_READSYN:
-                 __raw_writel(0x100, info->gpmc_baseaddr + GPMC_ECC_CONTROL);
-                /* (ECC 16 or 8 bit col) | ( CS  )  | ECC Enable */
-                val = (dev_width << 7) | (info->gpmc_cs << 1) | (0x1);
-                break;
-        case NAND_ECC_WRITE:
-                __raw_writel(0x101, info->gpmc_baseaddr + GPMC_ECC_CONTROL);
-                /* (ECC 16 or 8 bit col) | ( CS  )  | ECC Enable */
-                val = (dev_width << 7) | (info->gpmc_cs << 1) | (0x1);
-                break;
-        default:
-                DEBUG(MTD_DEBUG_LEVEL0, "Error: Unrecognized Mode[%d]!\n",
-                                        mode);
-                break;
-        }
 
-        __raw_writel(val, info->gpmc_baseaddr + GPMC_ECC_CONFIG);
+        gpmc_enable_hwecc(info->gpmc_cs, mode, dev_width, info->nand.ecc.size);
 }
+
 #endif
 
 /**
@@ -834,14 +736,10 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)
         else
                 timeo += (HZ * 20) / 1000;
 
-        this->IO_ADDR_W = (void *) info->gpmc_cs_baseaddr +
-                                                GPMC_CS_NAND_COMMAND;
-        this->IO_ADDR_R = (void *) info->gpmc_cs_baseaddr + GPMC_CS_NAND_DATA;
-
-        __raw_writeb(NAND_CMD_STATUS & 0xFF, this->IO_ADDR_W);
-
+        gpmc_nand_write(info->gpmc_cs,
+                        GPMC_NAND_COMMAND, (NAND_CMD_STATUS & 0xFF));
         while (time_before(jiffies, timeo)) {
-                status = __raw_readb(this->IO_ADDR_R);
+                status = gpmc_nand_read(info->gpmc_cs, GPMC_NAND_DATA);
                 if (status & NAND_STATUS_READY)
                         break;
                 cond_resched();
@@ -855,22 +753,22 @@ static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)
  */
 static int omap_dev_ready(struct mtd_info *mtd)
 {
+        unsigned int val = 0;
         struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
                                                         mtd);
-        unsigned int val = __raw_readl(info->gpmc_baseaddr + GPMC_IRQ_STATUS);
 
+        val = gpmc_read_status(GPMC_GET_IRQ_STATUS);
         if ((val & 0x100) == 0x100) {
                 /* Clear IRQ Interrupt */
                 val |= 0x100;
                 val &= ~(0x0);
-                __raw_writel(val, info->gpmc_baseaddr + GPMC_IRQ_STATUS);
+                gpmc_cs_configure(info->gpmc_cs, GPMC_SET_IRQ_STATUS, val);
         } else {
                 unsigned int cnt = 0;
                 while (cnt++ < 0x1FF) {
                         if  ((val & 0x100) == 0x100)
                                 return 0;
-                        val = __raw_readl(info->gpmc_baseaddr +
-                                                        GPMC_IRQ_STATUS);
+                        val = gpmc_read_status(GPMC_GET_IRQ_STATUS);
                 }
         }
 
@@ -901,8 +799,6 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
         info->pdev = pdev;
 
         info->gpmc_cs           = pdata->cs;
-        info->gpmc_baseaddr     = pdata->gpmc_baseaddr;
-        info->gpmc_cs_baseaddr  = pdata->gpmc_cs_baseaddr;
         info->phys_base         = pdata->phys_base;
 
         info->mtd.priv          = &info->nand;
@@ -913,7 +809,7 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
         info->nand.options      |= NAND_SKIP_BBTSCAN;
 
         /* NAND write protect off */
-        omap_nand_wp(&info->mtd, NAND_WP_OFF);
+        gpmc_cs_configure(info->gpmc_cs, GPMC_CONFIG_WP, 0);
 
         if (!request_mem_region(info->phys_base, NAND_IO_SIZE,
                                 pdev->dev.driver->name)) {
@@ -948,8 +844,6 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
         }
 
         if (use_prefetch) {
-                /* copy the virtual address of nand base for fifo access */
-                info->nand_pref_fifo_add = info->nand.IO_ADDR_R;
 
                 info->nand.read_buf   = omap_read_buf_pref;
                 info->nand.write_buf  = omap_write_buf_pref;
@@ -989,8 +883,6 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
         info->nand.ecc.correct          = omap_correct_data;
         info->nand.ecc.mode             = NAND_ECC_HW;
 
-        /* init HW ECC */
-        omap_hwecc_init(&info->mtd);
 #else
         info->nand.ecc.mode = NAND_ECC_SOFT;
 #endif
@@ -1040,7 +932,7 @@ static int omap_nand_remove(struct platform_device *pdev)
 
         /* Release NAND device, its internal structures and partitions */
         nand_release(&info->mtd);
-        iounmap(info->nand_pref_fifo_add);
+        iounmap(info->nand.IO_ADDR_R);
         kfree(&info->mtd);
         return 0;
 }
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index 8bd23687c530..bb0872a63315 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -1062,6 +1062,10 @@ struct bnx2x {
 
         /* used to synchronize stats collecting */
         int                     stats_state;
+
+        /* used for synchronization of concurrent threads statistics handling */
+        spinlock_t              stats_lock;
+
         /* used by dmae command loader */
         struct dmae_command     stats_dmae;
         int                     executer_idx;
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index 57ff5b3bcce6..46167c081727 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -57,8 +57,8 @@
 #include "bnx2x_init_ops.h"
 #include "bnx2x_dump.h"
 
-#define DRV_MODULE_VERSION      "1.52.53-1"
-#define DRV_MODULE_RELDATE      "2010/18/04"
+#define DRV_MODULE_VERSION      "1.52.53-2"
+#define DRV_MODULE_RELDATE      "2010/21/07"
 #define BNX2X_BC_VER            0x040200
 
 #include <linux/firmware.h>
@@ -3789,6 +3789,8 @@ static void bnx2x_storm_stats_post(struct bnx2x *bp)
                 struct eth_query_ramrod_data ramrod_data = {0};
                 int i, rc;
 
+                spin_lock_bh(&bp->stats_lock);
+
                 ramrod_data.drv_counter = bp->stats_counter++;
                 ramrod_data.collect_port = bp->port.pmf ? 1 : 0;
                 for_each_queue(bp, i)
@@ -3802,6 +3804,8 @@ static void bnx2x_storm_stats_post(struct bnx2x *bp)
                         bp->spq_left++;
                         bp->stats_pending = 1;
                 }
+
+                spin_unlock_bh(&bp->stats_lock);
         }
 }
 
@@ -4367,6 +4371,14 @@ static int bnx2x_storm_stats_update(struct bnx2x *bp)
         struct host_func_stats *fstats = bnx2x_sp(bp, func_stats);
         struct bnx2x_eth_stats *estats = &bp->eth_stats;
         int i;
+        u16 cur_stats_counter;
+
+        /* Make sure we use the value of the counter
+         * used for sending the last stats ramrod.
+         */
+        spin_lock_bh(&bp->stats_lock);
+        cur_stats_counter = bp->stats_counter - 1;
+        spin_unlock_bh(&bp->stats_lock);
 
         memcpy(&(fstats->total_bytes_received_hi),
                &(bnx2x_sp(bp, func_stats_base)->total_bytes_received_hi),
@@ -4394,25 +4406,22 @@ static int bnx2x_storm_stats_update(struct bnx2x *bp)
                 u32 diff;
 
                 /* are storm stats valid? */
-                if ((u16)(le16_to_cpu(xclient->stats_counter) + 1) !=
-                                                        bp->stats_counter) {
+                if (le16_to_cpu(xclient->stats_counter) != cur_stats_counter) {
                         DP(BNX2X_MSG_STATS, "[%d] stats not updated by xstorm"
                            "  xstorm counter (0x%x) != stats_counter (0x%x)\n",
-                           i, xclient->stats_counter, bp->stats_counter);
+                           i, xclient->stats_counter, cur_stats_counter + 1);
                         return -1;
                 }
-                if ((u16)(le16_to_cpu(tclient->stats_counter) + 1) !=
-                                                        bp->stats_counter) {
+                if (le16_to_cpu(tclient->stats_counter) != cur_stats_counter) {
                         DP(BNX2X_MSG_STATS, "[%d] stats not updated by tstorm"
                            "  tstorm counter (0x%x) != stats_counter (0x%x)\n",
-                           i, tclient->stats_counter, bp->stats_counter);
+                           i, tclient->stats_counter, cur_stats_counter + 1);
                         return -2;
                 }
-                if ((u16)(le16_to_cpu(uclient->stats_counter) + 1) !=
-                                                        bp->stats_counter) {
+                if (le16_to_cpu(uclient->stats_counter) != cur_stats_counter) {
                         DP(BNX2X_MSG_STATS, "[%d] stats not updated by ustorm"
                            "  ustorm counter (0x%x) != stats_counter (0x%x)\n",
-                           i, uclient->stats_counter, bp->stats_counter);
+                           i, uclient->stats_counter, cur_stats_counter + 1);
                         return -4;
                 }
 
@@ -4849,16 +4858,18 @@ static const struct {
 
 static void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
 {
-        enum bnx2x_stats_state state = bp->stats_state;
+        enum bnx2x_stats_state state;
 
         if (unlikely(bp->panic))
                 return;
 
-        bnx2x_stats_stm[state][event].action(bp);
+        /* Protect a state change flow */
+        spin_lock_bh(&bp->stats_lock);
+        state = bp->stats_state;
         bp->stats_state = bnx2x_stats_stm[state][event].next_state;
+        spin_unlock_bh(&bp->stats_lock);
 
-        /* Make sure the state has been "changed" */
-        smp_wmb();
+        bnx2x_stats_stm[state][event].action(bp);
 
         if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
                 DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
@@ -9908,6 +9919,7 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
 
         mutex_init(&bp->port.phy_mutex);
         mutex_init(&bp->fw_mb_mutex);
+        spin_lock_init(&bp->stats_lock);
 #ifdef BCM_CNIC
         mutex_init(&bp->cnic_mutex);
 #endif
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index df483076eda6..8d7dfd2f1e90 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -822,7 +822,7 @@ static int rlb_initialize(struct bonding *bond)
 
         /*initialize packet type*/
         pk_type->type = cpu_to_be16(ETH_P_ARP);
-        pk_type->dev = NULL;
+        pk_type->dev = bond->dev;
         pk_type->func = rlb_arp_recv;
 
         /* register to receive ARPs */
diff --git a/drivers/net/declance.c b/drivers/net/declance.c
index 1d973db27c32..d7de376d7178 100644
--- a/drivers/net/declance.c
+++ b/drivers/net/declance.c
@@ -1022,7 +1022,7 @@ static const struct net_device_ops lance_netdev_ops = {
         .ndo_set_mac_address    = eth_mac_addr,
 };
 
-static int __init dec_lance_probe(struct device *bdev, const int type)
+static int __devinit dec_lance_probe(struct device *bdev, const int type)
 {
         static unsigned version_printed;
         static const char fmt[] = "declance%d";
@@ -1326,7 +1326,7 @@ static void __exit dec_lance_platform_remove(void)
 }
 
 #ifdef CONFIG_TC
-static int __init dec_lance_tc_probe(struct device *dev);
+static int __devinit dec_lance_tc_probe(struct device *dev);
 static int __exit dec_lance_tc_remove(struct device *dev);
 
 static const struct tc_device_id dec_lance_tc_table[] = {
@@ -1345,7 +1345,7 @@ static struct tc_driver dec_lance_tc_driver = {
         },
 };
 
-static int __init dec_lance_tc_probe(struct device *dev)
+static int __devinit dec_lance_tc_probe(struct device *dev)
 {
         int status = dec_lance_probe(dev, PMAD_LANCE);
         if (!status)
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index 3881918f5382..cea37e0837ff 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -1722,6 +1722,15 @@ static int __devinit igb_probe(struct pci_dev *pdev,
         u16 eeprom_apme_mask = IGB_EEPROM_APME;
         u32 part_num;
 
+        /* Catch broken hardware that put the wrong VF device ID in
+         * the PCIe SR-IOV capability.
+         */
+        if (pdev->is_virtfn) {
+                WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
+                     pci_name(pdev), pdev->vendor, pdev->device);
+                return -EINVAL;
+        }
+
         err = pci_enable_device_mem(pdev);
         if (err)
                 return err;
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 7b5d9764f317..74d9b6df3029 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -6492,6 +6492,15 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
 #endif
         u32 part_num, eec;
 
+        /* Catch broken hardware that put the wrong VF device ID in
+         * the PCIe SR-IOV capability.
+         */
+        if (pdev->is_virtfn) {
+                WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
+                     pci_name(pdev), pdev->vendor, pdev->device);
+                return -EINVAL;
+        }
+
         err = pci_enable_device_mem(pdev);
         if (err)
                 return err;
diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c
index 87e8d4cb4057..f15fe2cf72ae 100644
--- a/drivers/net/macvlan.c
+++ b/drivers/net/macvlan.c
@@ -499,7 +499,7 @@ static const struct net_device_ops macvlan_netdev_ops = {
         .ndo_validate_addr      = eth_validate_addr,
 };
 
-static void macvlan_setup(struct net_device *dev)
+void macvlan_common_setup(struct net_device *dev)
 {
         ether_setup(dev);
 
@@ -508,6 +508,12 @@ static void macvlan_setup(struct net_device *dev)
         dev->destructor         = free_netdev;
         dev->header_ops         = &macvlan_hard_header_ops,
         dev->ethtool_ops        = &macvlan_ethtool_ops;
+}
+EXPORT_SYMBOL_GPL(macvlan_common_setup);
+
+static void macvlan_setup(struct net_device *dev)
+{
+        macvlan_common_setup(dev);
         dev->tx_queue_len       = 0;
 }
 
@@ -705,7 +711,6 @@ int macvlan_link_register(struct rtnl_link_ops *ops)
         /* common fields */
         ops->priv_size          = sizeof(struct macvlan_dev);
         ops->get_tx_queues      = macvlan_get_tx_queues;
-        ops->setup              = macvlan_setup;
         ops->validate           = macvlan_validate;
         ops->maxtype            = IFLA_MACVLAN_MAX;
         ops->policy             = macvlan_policy;
@@ -719,6 +724,7 @@ EXPORT_SYMBOL_GPL(macvlan_link_register);
 
 static struct rtnl_link_ops macvlan_link_ops = {
         .kind           = "macvlan",
+        .setup          = macvlan_setup,
         .newlink        = macvlan_newlink,
         .dellink        = macvlan_dellink,
 };
diff --git a/drivers/net/macvtap.c b/drivers/net/macvtap.c
index a8a94e2f6ddc..ff02b836c3c4 100644
--- a/drivers/net/macvtap.c
+++ b/drivers/net/macvtap.c
@@ -180,11 +180,18 @@ static int macvtap_forward(struct net_device *dev, struct sk_buff *skb)
 {
         struct macvtap_queue *q = macvtap_get_queue(dev, skb);
         if (!q)
-                return -ENOLINK;
+                goto drop;
+
+        if (skb_queue_len(&q->sk.sk_receive_queue) >= dev->tx_queue_len)
+                goto drop;
 
         skb_queue_tail(&q->sk.sk_receive_queue, skb);
         wake_up_interruptible_poll(sk_sleep(&q->sk), POLLIN | POLLRDNORM | POLLRDBAND);
-        return 0;
+        return NET_RX_SUCCESS;
+
+drop:
+        kfree_skb(skb);
+        return NET_RX_DROP;
 }
 
 /*
@@ -235,8 +242,15 @@ static void macvtap_dellink(struct net_device *dev,
         macvlan_dellink(dev, head);
 }
 
+static void macvtap_setup(struct net_device *dev)
+{
+        macvlan_common_setup(dev);
+        dev->tx_queue_len = TUN_READQ_SIZE;
+}
+
 static struct rtnl_link_ops macvtap_link_ops __read_mostly = {
         .kind           = "macvtap",
+        .setup          = macvtap_setup,
         .newlink        = macvtap_newlink,
         .dellink        = macvtap_dellink,
 };
diff --git a/drivers/net/s2io.h b/drivers/net/s2io.h
index 5e52c75892df..7f3a53dcc6ef 100644
--- a/drivers/net/s2io.h
+++ b/drivers/net/s2io.h
@@ -65,7 +65,7 @@ static int debug_level = ERR_DBG;
 
 /* DEBUG message print. */
 #define DBG_PRINT(dbg_level, fmt, args...) do {                 \
-        if (dbg_level >= debug_level)                           \
+        if (dbg_level <= debug_level)                           \
                 pr_info(fmt, ##args);                           \
         } while (0)
 
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 6ad6fe706312..63042596f0cf 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -736,8 +736,18 @@ static __inline__ ssize_t tun_put_user(struct tun_struct *tun,
                                 gso.gso_type = VIRTIO_NET_HDR_GSO_TCPV6;
                         else if (sinfo->gso_type & SKB_GSO_UDP)
                                 gso.gso_type = VIRTIO_NET_HDR_GSO_UDP;
-                        else
-                                BUG();
+                        else {
+                                printk(KERN_ERR "tun: unexpected GSO type: "
+                                       "0x%x, gso_size %d, hdr_len %d\n",
+                                       sinfo->gso_type, gso.gso_size,
+                                       gso.hdr_len);
+                                print_hex_dump(KERN_ERR, "tun: ",
+                                               DUMP_PREFIX_NONE,
+                                               16, 1, skb->head,
+                                               min((int)gso.hdr_len, 64), true);
+                                WARN_ON_ONCE(1);
+                                return -EINVAL;
+                        }
                         if (sinfo->gso_type & SKB_GSO_TCP_ECN)
                                 gso.gso_type |= VIRTIO_NET_HDR_GSO_ECN;
                 } else
diff --git a/drivers/net/wimax/i2400m/i2400m-usb.h b/drivers/net/wimax/i2400m/i2400m-usb.h
index 2d7c96d7e865..eb80243e22df 100644
--- a/drivers/net/wimax/i2400m/i2400m-usb.h
+++ b/drivers/net/wimax/i2400m/i2400m-usb.h
@@ -152,6 +152,7 @@ enum {
         /* Device IDs */
         USB_DEVICE_ID_I6050 = 0x0186,
         USB_DEVICE_ID_I6050_2 = 0x0188,
+        USB_DEVICE_ID_I6250 = 0x0187,
 };
 
 
diff --git a/drivers/net/wimax/i2400m/usb.c b/drivers/net/wimax/i2400m/usb.c
index 0d5081d77dc0..d3365ac85dde 100644
--- a/drivers/net/wimax/i2400m/usb.c
+++ b/drivers/net/wimax/i2400m/usb.c
@@ -491,6 +491,7 @@ int i2400mu_probe(struct usb_interface *iface,
         switch (id->idProduct) {
         case USB_DEVICE_ID_I6050:
         case USB_DEVICE_ID_I6050_2:
+        case USB_DEVICE_ID_I6250:
                 i2400mu->i6050 = 1;
                 break;
         default:
@@ -739,6 +740,7 @@ static
 struct usb_device_id i2400mu_id_table[] = {
         { USB_DEVICE(0x8086, USB_DEVICE_ID_I6050) },
         { USB_DEVICE(0x8086, USB_DEVICE_ID_I6050_2) },
+        { USB_DEVICE(0x8086, USB_DEVICE_ID_I6250) },
         { USB_DEVICE(0x8086, 0x0181) },
         { USB_DEVICE(0x8086, 0x1403) },
         { USB_DEVICE(0x8086, 0x1405) },
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c
index ca6065b71b46..e3e52913d83a 100644
--- a/drivers/net/wireless/ath/ath9k/recv.c
+++ b/drivers/net/wireless/ath/ath9k/recv.c
@@ -844,9 +844,9 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
         int dma_type;
 
         if (edma)
-                dma_type = DMA_FROM_DEVICE;
-        else
                 dma_type = DMA_BIDIRECTIONAL;
+        else
+                dma_type = DMA_FROM_DEVICE;
 
         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
         spin_lock_bh(&sc->rx.rxbuflock);
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index df4532e91b1a..f370476d5417 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -178,7 +178,6 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
                                unsigned long val,
                                struct cpufreq_freqs *freqs)
 {
-#warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
         switch (val) {
         case CPUFREQ_PRECHANGE:
                 if (freqs->new > freqs->old) {
@@ -186,7 +185,7 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
                                "pre-updating\n",
                                freqs->new / 1000, (freqs->new / 100) % 10,
                                freqs->old / 1000, (freqs->old / 100) % 10);
-                        pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
+                        pxa2xx_pcmcia_set_timing(skt);
                 }
                 break;
 
@@ -196,7 +195,7 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
                                "post-updating\n",
                                freqs->new / 1000, (freqs->new / 100) % 10,
                                freqs->old / 1000, (freqs->old / 100) % 10);
-                        pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
+                        pxa2xx_pcmcia_set_timing(skt);
                 }
                 break;
         }
diff --git a/drivers/power/ds2782_battery.c b/drivers/power/ds2782_battery.c
index 2afbeec8b791..84d3c43cf2bc 100644
--- a/drivers/power/ds2782_battery.c
+++ b/drivers/power/ds2782_battery.c
@@ -43,10 +43,9 @@
 struct ds278x_info;
 
 struct ds278x_battery_ops {
-        int     (*get_current)(struct ds278x_info *info, int *current_uA);
-        int     (*get_voltage)(struct ds278x_info *info, int *voltage_uA);
-        int     (*get_capacity)(struct ds278x_info *info, int *capacity_uA);
-
+        int (*get_battery_current)(struct ds278x_info *info, int *current_uA);
+        int (*get_battery_voltage)(struct ds278x_info *info, int *voltage_uA);
+        int (*get_battery_capacity)(struct ds278x_info *info, int *capacity_uA);
 };
 
 #define to_ds278x_info(x) container_of(x, struct ds278x_info, battery)
@@ -213,11 +212,11 @@ static int ds278x_get_status(struct ds278x_info *info, int *status)
         int current_uA;
         int capacity;
 
-        err = info->ops->get_current(info, &current_uA);
+        err = info->ops->get_battery_current(info, &current_uA);
         if (err)
                 return err;
 
-        err = info->ops->get_capacity(info, &capacity);
+        err = info->ops->get_battery_capacity(info, &capacity);
         if (err)
                 return err;
 
@@ -246,15 +245,15 @@ static int ds278x_battery_get_property(struct power_supply *psy,
                 break;
 
         case POWER_SUPPLY_PROP_CAPACITY:
-                ret = info->ops->get_capacity(info, &val->intval);
+                ret = info->ops->get_battery_capacity(info, &val->intval);
                 break;
 
         case POWER_SUPPLY_PROP_VOLTAGE_NOW:
-                ret = info->ops->get_voltage(info, &val->intval);
+                ret = info->ops->get_battery_voltage(info, &val->intval);
                 break;
 
         case POWER_SUPPLY_PROP_CURRENT_NOW:
-                ret = info->ops->get_current(info, &val->intval);
+                ret = info->ops->get_battery_current(info, &val->intval);
                 break;
 
         case POWER_SUPPLY_PROP_TEMP:
@@ -307,14 +306,14 @@ enum ds278x_num_id {
 
 static struct ds278x_battery_ops ds278x_ops[] = {
         [DS2782] = {
-                .get_current  = ds2782_get_current,
-                .get_voltage  = ds2782_get_voltage,
-                .get_capacity = ds2782_get_capacity,
+                .get_battery_current  = ds2782_get_current,
+                .get_battery_voltage  = ds2782_get_voltage,
+                .get_battery_capacity = ds2782_get_capacity,
         },
         [DS2786] = {
-                .get_current  = ds2786_get_current,
-                .get_voltage  = ds2786_get_voltage,
-                .get_capacity = ds2786_get_capacity,
+                .get_battery_current  = ds2786_get_current,
+                .get_battery_voltage  = ds2786_get_voltage,
+                .get_battery_capacity = ds2786_get_capacity,
         }
 };
 
diff --git a/drivers/regulator/ab3100.c b/drivers/regulator/ab3100.c
index 7b14a67bdca2..11790990277a 100644
--- a/drivers/regulator/ab3100.c
+++ b/drivers/regulator/ab3100.c
@@ -286,7 +286,7 @@ static int ab3100_list_voltage_regulator(struct regulator_dev *reg,
 {
         struct ab3100_regulator *abreg = reg->reg_data;
 
-        if (selector > abreg->voltages_len)
+        if (selector >= abreg->voltages_len)
                 return -EINVAL;
         return abreg->typ_voltages[selector];
 }
@@ -318,7 +318,7 @@ static int ab3100_get_voltage_regulator(struct regulator_dev *reg)
         regval &= 0xE0;
         regval >>= 5;
 
-        if (regval > abreg->voltages_len) {
+        if (regval >= abreg->voltages_len) {
                 dev_err(&reg->dev,
                         "regulator register %02x contains an illegal voltage setting\n",
                         abreg->regreg);
diff --git a/drivers/regulator/tps6507x-regulator.c b/drivers/regulator/tps6507x-regulator.c
index 14b4576281c5..8152d65220f5 100644
--- a/drivers/regulator/tps6507x-regulator.c
+++ b/drivers/regulator/tps6507x-regulator.c
@@ -22,6 +22,7 @@
 #include <linux/platform_device.h>
 #include <linux/regulator/driver.h>
 #include <linux/regulator/machine.h>
+#include <linux/regulator/tps6507x.h>
 #include <linux/delay.h>
 #include <linux/slab.h>
 #include <linux/mfd/tps6507x.h>
@@ -101,9 +102,12 @@ struct tps_info {
         unsigned max_uV;
         u8 table_len;
         const u16 *table;
+
+        /* Does DCDC high or the low register defines output voltage? */
+        bool defdcdc_default;
 };
 
-static const struct tps_info tps6507x_pmic_regs[] = {
+static struct tps_info tps6507x_pmic_regs[] = {
         {
                 .name = "VDCDC1",
                 .min_uV = 725000,
@@ -145,7 +149,7 @@ struct tps6507x_pmic {
         struct regulator_desc desc[TPS6507X_NUM_REGULATOR];
         struct tps6507x_dev *mfd;
         struct regulator_dev *rdev[TPS6507X_NUM_REGULATOR];
-        const struct tps_info *info[TPS6507X_NUM_REGULATOR];
+        struct tps_info *info[TPS6507X_NUM_REGULATOR];
         struct mutex io_lock;
 };
 static inline int tps6507x_pmic_read(struct tps6507x_pmic *tps, u8 reg)
@@ -341,10 +345,16 @@ static int tps6507x_pmic_dcdc_get_voltage(struct regulator_dev *dev)
                 reg = TPS6507X_REG_DEFDCDC1;
                 break;
         case TPS6507X_DCDC_2:
-                reg = TPS6507X_REG_DEFDCDC2_LOW;
+                if (tps->info[dcdc]->defdcdc_default)
+                        reg = TPS6507X_REG_DEFDCDC2_HIGH;
+                else
+                        reg = TPS6507X_REG_DEFDCDC2_LOW;
                 break;
         case TPS6507X_DCDC_3:
-                reg = TPS6507X_REG_DEFDCDC3_LOW;
+                if (tps->info[dcdc]->defdcdc_default)
+                        reg = TPS6507X_REG_DEFDCDC3_HIGH;
+                else
+                        reg = TPS6507X_REG_DEFDCDC3_LOW;
                 break;
         default:
                 return -EINVAL;
@@ -370,10 +380,16 @@ static int tps6507x_pmic_dcdc_set_voltage(struct regulator_dev *dev,
                 reg = TPS6507X_REG_DEFDCDC1;
                 break;
         case TPS6507X_DCDC_2:
-                reg = TPS6507X_REG_DEFDCDC2_LOW;
+                if (tps->info[dcdc]->defdcdc_default)
+                        reg = TPS6507X_REG_DEFDCDC2_HIGH;
+                else
+                        reg = TPS6507X_REG_DEFDCDC2_LOW;
                 break;
         case TPS6507X_DCDC_3:
-                reg = TPS6507X_REG_DEFDCDC3_LOW;
+                if (tps->info[dcdc]->defdcdc_default)
+                        reg = TPS6507X_REG_DEFDCDC3_HIGH;
+                else
+                        reg = TPS6507X_REG_DEFDCDC3_LOW;
                 break;
         default:
                 return -EINVAL;
@@ -532,7 +548,7 @@ int tps6507x_pmic_probe(struct platform_device *pdev)
 {
         struct tps6507x_dev *tps6507x_dev = dev_get_drvdata(pdev->dev.parent);
         static int desc_id;
-        const struct tps_info *info = &tps6507x_pmic_regs[0];
+        struct tps_info *info = &tps6507x_pmic_regs[0];
         struct regulator_init_data *init_data;
         struct regulator_dev *rdev;
         struct tps6507x_pmic *tps;
@@ -569,6 +585,12 @@ int tps6507x_pmic_probe(struct platform_device *pdev)
         for (i = 0; i < TPS6507X_NUM_REGULATOR; i++, info++, init_data++) {
                 /* Register the regulators */
                 tps->info[i] = info;
+                if (init_data->driver_data) {
+                        struct tps6507x_reg_platform_data *data =
+                                                        init_data->driver_data;
+                        tps->info[i]->defdcdc_default = data->defdcdc_default;
+                }
+
                 tps->desc[i].name = info->name;
                 tps->desc[i].id = desc_id++;
                 tps->desc[i].n_voltages = num_voltages[i];
diff --git a/drivers/regulator/wm8350-regulator.c b/drivers/regulator/wm8350-regulator.c
index 723cd1fb4867..0e6ed7db9364 100644
--- a/drivers/regulator/wm8350-regulator.c
+++ b/drivers/regulator/wm8350-regulator.c
@@ -1495,7 +1495,7 @@ int wm8350_register_regulator(struct wm8350 *wm8350, int reg,
         if (ret != 0) {
                 dev_err(wm8350->dev, "Failed to register regulator %d: %d\n",
                         reg, ret);
-                platform_device_del(pdev);
+                platform_device_put(pdev);
                 wm8350->pmic.pdev[reg] = NULL;
         }
 
diff --git a/drivers/rtc/rtc-rx8581.c b/drivers/rtc/rtc-rx8581.c
index 9718aaaa8215..600b890a3c15 100644
--- a/drivers/rtc/rtc-rx8581.c
+++ b/drivers/rtc/rtc-rx8581.c
@@ -168,7 +168,7 @@ static int rx8581_set_datetime(struct i2c_client *client, struct rtc_time *tm)
                 return -EIO;
         }
 
-        err = i2c_smbus_write_byte_data(client, RX8581_REG_FLAG,
+        err = i2c_smbus_write_byte_data(client, RX8581_REG_CTRL,
                 (data | RX8581_CTRL_STOP));
         if (err < 0) {
                 dev_err(&client->dev, "Unable to write control register\n");
@@ -182,6 +182,20 @@ static int rx8581_set_datetime(struct i2c_client *client, struct rtc_time *tm)
                 return -EIO;
         }
 
+        /* get VLF and clear it */
+        data = i2c_smbus_read_byte_data(client, RX8581_REG_FLAG);
+        if (data < 0) {
+                dev_err(&client->dev, "Unable to read flag register\n");
+                return -EIO;
+        }
+
+        err = i2c_smbus_write_byte_data(client, RX8581_REG_FLAG,
+                (data & ~(RX8581_FLAG_VLF)));
+        if (err != 0) {
+                dev_err(&client->dev, "Unable to write flag register\n");
+                return -EIO;
+        }
+
         /* Restart the clock */
         data = i2c_smbus_read_byte_data(client, RX8581_REG_CTRL);
         if (data < 0) {
@@ -189,8 +203,8 @@ static int rx8581_set_datetime(struct i2c_client *client, struct rtc_time *tm)
                 return -EIO;
         }
 
-        err = i2c_smbus_write_byte_data(client, RX8581_REG_FLAG,
-                (data | ~(RX8581_CTRL_STOP)));
+        err = i2c_smbus_write_byte_data(client, RX8581_REG_CTRL,
+                (data & ~(RX8581_CTRL_STOP)));
         if (err != 0) {
                 dev_err(&client->dev, "Unable to write control register\n");
                 return -EIO;
diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index e3dbeda97179..fd068bc1bd0a 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -714,6 +714,14 @@ static int zfcp_erp_adapter_strategy_open_fsf(struct zfcp_erp_action *act)
         if (zfcp_erp_adapter_strategy_open_fsf_xport(act) == ZFCP_ERP_FAILED)
                 return ZFCP_ERP_FAILED;
 
+        if (mempool_resize(act->adapter->pool.status_read_data,
+                           act->adapter->stat_read_buf_num, GFP_KERNEL))
+                return ZFCP_ERP_FAILED;
+
+        if (mempool_resize(act->adapter->pool.status_read_req,
+                           act->adapter->stat_read_buf_num, GFP_KERNEL))
+                return ZFCP_ERP_FAILED;
+
         atomic_set(&act->adapter->stat_miss, act->adapter->stat_read_buf_num);
         if (zfcp_status_read_refill(act->adapter))
                 return ZFCP_ERP_FAILED;
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c
index 9ac6a6e4a604..71663fb77310 100644
--- a/drivers/s390/scsi/zfcp_fsf.c
+++ b/drivers/s390/scsi/zfcp_fsf.c
@@ -496,7 +496,8 @@ static int zfcp_fsf_exchange_config_evaluate(struct zfcp_fsf_req *req)
 
         adapter->hydra_version = bottom->adapter_type;
         adapter->timer_ticks = bottom->timer_interval;
-        adapter->stat_read_buf_num = max(bottom->status_read_buf_num, (u16)16);
+        adapter->stat_read_buf_num = max(bottom->status_read_buf_num,
+                                         (u16)FSF_STATUS_READS_RECOM);
 
         if (fc_host_permanent_port_name(shost) == -1)
                 fc_host_permanent_port_name(shost) = fc_host_port_name(shost);
@@ -719,11 +720,6 @@ static struct zfcp_fsf_req *zfcp_fsf_req_create(struct zfcp_qdio *qdio,
         zfcp_qdio_req_init(adapter->qdio, &req->qdio_req, req->req_id, sbtype,
                            req->qtcb, sizeof(struct fsf_qtcb));
 
-        if (!(atomic_read(&adapter->status) & ZFCP_STATUS_ADAPTER_QDIOUP)) {
-                zfcp_fsf_req_free(req);
-                return ERR_PTR(-EIO);
-        }
-
         return req;
 }
 
@@ -981,7 +977,7 @@ static int zfcp_fsf_setup_ct_els_sbals(struct zfcp_fsf_req *req,
         }
 
         /* use single, unchained SBAL if it can hold the request */
-        if (zfcp_qdio_sg_one_sbale(sg_req) || zfcp_qdio_sg_one_sbale(sg_resp)) {
+        if (zfcp_qdio_sg_one_sbale(sg_req) && zfcp_qdio_sg_one_sbale(sg_resp)) {
                 zfcp_fsf_setup_ct_els_unchained(adapter->qdio, &req->qdio_req,
                                                 sg_req, sg_resp);
                 return 0;
diff --git a/drivers/s390/scsi/zfcp_qdio.c b/drivers/s390/scsi/zfcp_qdio.c
index 28117e130e2c..6fa5e0453176 100644
--- a/drivers/s390/scsi/zfcp_qdio.c
+++ b/drivers/s390/scsi/zfcp_qdio.c
@@ -251,7 +251,8 @@ static int zfcp_qdio_sbal_check(struct zfcp_qdio *qdio)
         struct zfcp_qdio_queue *req_q = &qdio->req_q;
 
         spin_lock_bh(&qdio->req_q_lock);
-        if (atomic_read(&req_q->count))
+        if (atomic_read(&req_q->count) ||
+            !(atomic_read(&qdio->adapter->status) & ZFCP_STATUS_ADAPTER_QDIOUP))
                 return 1;
         spin_unlock_bh(&qdio->req_q_lock);
         return 0;
@@ -274,8 +275,13 @@ int zfcp_qdio_sbal_get(struct zfcp_qdio *qdio)
         spin_unlock_bh(&qdio->req_q_lock);
         ret = wait_event_interruptible_timeout(qdio->req_q_wq,
                                zfcp_qdio_sbal_check(qdio), 5 * HZ);
+
+        if (!(atomic_read(&qdio->adapter->status) & ZFCP_STATUS_ADAPTER_QDIOUP))
+                return -EIO;
+
         if (ret > 0)
                 return 0;
+
         if (!ret) {
                 atomic_inc(&qdio->req_q_full);
                 /* assume hanging outbound queue, try queue recovery */
@@ -375,6 +381,8 @@ void zfcp_qdio_close(struct zfcp_qdio *qdio)
         atomic_clear_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &qdio->adapter->status);
         spin_unlock_bh(&qdio->req_q_lock);
 
+        wake_up(&qdio->req_q_wq);
+
         qdio_shutdown(qdio->adapter->ccw_device,
                       QDIO_FLAG_CLEANUP_USING_CLEAR);
 
diff --git a/drivers/scsi/ibmvscsi/rpa_vscsi.c b/drivers/scsi/ibmvscsi/rpa_vscsi.c
index a864ccc0a342..989b9a8ba72d 100644
--- a/drivers/scsi/ibmvscsi/rpa_vscsi.c
+++ b/drivers/scsi/ibmvscsi/rpa_vscsi.c
@@ -277,6 +277,12 @@ static int rpavscsi_init_crq_queue(struct crq_queue *queue,
                 goto reg_crq_failed;
         }
 
+        queue->cur = 0;
+        spin_lock_init(&queue->lock);
+
+        tasklet_init(&hostdata->srp_task, (void *)rpavscsi_task,
+                     (unsigned long)hostdata);
+
         if (request_irq(vdev->irq,
                         rpavscsi_handle_event,
                         0, "ibmvscsi", (void *)hostdata) != 0) {
@@ -291,15 +297,10 @@ static int rpavscsi_init_crq_queue(struct crq_queue *queue,
                 goto req_irq_failed;
         }
 
-        queue->cur = 0;
-        spin_lock_init(&queue->lock);
-
-        tasklet_init(&hostdata->srp_task, (void *)rpavscsi_task,
-                     (unsigned long)hostdata);
-
         return retrc;
 
       req_irq_failed:
+        tasklet_kill(&hostdata->srp_task);
         do {
                 rc = plpar_hcall_norets(H_FREE_CRQ, vdev->unit_address);
         } while ((rc == H_BUSY) || (H_IS_LONG_BUSY(rc)));
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 82ea4a8226b0..f820cffb7f00 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -1129,20 +1129,22 @@ static int ipr_is_same_device(struct ipr_resource_entry *res,
 }
 
 /**
- * ipr_format_resource_path - Format the resource path for printing.
+ * ipr_format_res_path - Format the resource path for printing.
  * @res_path:   resource path
  * @buf:        buffer
  *
  * Return value:
  *      pointer to buffer
  **/
-static char *ipr_format_resource_path(u8 *res_path, char *buffer)
+static char *ipr_format_res_path(u8 *res_path, char *buffer, int len)
 {
         int i;
+        char *p = buffer;
 
-        sprintf(buffer, "%02X", res_path[0]);
-        for (i=1; res_path[i] != 0xff; i++)
-                sprintf(buffer, "%s-%02X", buffer, res_path[i]);
+        res_path[0] = '\0';
+        p += snprintf(p, buffer + len - p, "%02X", res_path[0]);
+        for (i = 1; res_path[i] != 0xff && ((i * 3) < len); i++)
+                p += snprintf(p, buffer + len - p, "-%02X", res_path[i]);
 
         return buffer;
 }
@@ -1187,7 +1189,8 @@ static void ipr_update_res_entry(struct ipr_resource_entry *res,
 
                 if (res->sdev && new_path)
                         sdev_printk(KERN_INFO, res->sdev, "Resource path: %s\n",
-                                    ipr_format_resource_path(&res->res_path[0], &buffer[0]));
+                                    ipr_format_res_path(res->res_path, buffer,
+                                                        sizeof(buffer)));
         } else {
                 res->flags = cfgtew->u.cfgte->flags;
                 if (res->flags & IPR_IS_IOA_RESOURCE)
@@ -1573,7 +1576,8 @@ static void ipr_log_sis64_config_error(struct ipr_ioa_cfg *ioa_cfg,
                 ipr_err_separator;
 
                 ipr_err("Device %d : %s", i + 1,
-                         ipr_format_resource_path(&dev_entry->res_path[0], &buffer[0]));
+                         ipr_format_res_path(dev_entry->res_path, buffer,
+                                             sizeof(buffer)));
                 ipr_log_ext_vpd(&dev_entry->vpd);
 
                 ipr_err("-----New Device Information-----\n");
@@ -1919,13 +1923,14 @@ static void ipr_log64_fabric_path(struct ipr_hostrcb *hostrcb,
 
                         ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s\n",
                                      path_active_desc[i].desc, path_state_desc[j].desc,
-                                     ipr_format_resource_path(&fabric->res_path[0], &buffer[0]));
+                                     ipr_format_res_path(fabric->res_path, buffer,
+                                                         sizeof(buffer)));
                         return;
                 }
         }
 
         ipr_err("Path state=%02X Resource Path=%s\n", path_state,
-                ipr_format_resource_path(&fabric->res_path[0], &buffer[0]));
+                ipr_format_res_path(fabric->res_path, buffer, sizeof(buffer)));
 }
 
 static const struct {
@@ -2066,7 +2071,8 @@ static void ipr_log64_path_elem(struct ipr_hostrcb *hostrcb,
 
                         ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s, Link rate=%s, WWN=%08X%08X\n",
                                      path_status_desc[j].desc, path_type_desc[i].desc,
-                                     ipr_format_resource_path(&cfg->res_path[0], &buffer[0]),
+                                     ipr_format_res_path(cfg->res_path, buffer,
+                                                         sizeof(buffer)),
                                      link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
                                      be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
                         return;
@@ -2074,7 +2080,7 @@ static void ipr_log64_path_elem(struct ipr_hostrcb *hostrcb,
         }
         ipr_hcam_err(hostrcb, "Path element=%02X: Resource Path=%s, Link rate=%s "
                      "WWN=%08X%08X\n", cfg->type_status,
-                     ipr_format_resource_path(&cfg->res_path[0], &buffer[0]),
+                     ipr_format_res_path(cfg->res_path, buffer, sizeof(buffer)),
                      link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
                      be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
 }
@@ -2139,7 +2145,7 @@ static void ipr_log_sis64_array_error(struct ipr_ioa_cfg *ioa_cfg,
 
         ipr_err("RAID %s Array Configuration: %s\n",
                 error->protection_level,
-                ipr_format_resource_path(&error->last_res_path[0], &buffer[0]));
+                ipr_format_res_path(error->last_res_path, buffer, sizeof(buffer)));
 
         ipr_err_separator;
 
@@ -2160,9 +2166,11 @@ static void ipr_log_sis64_array_error(struct ipr_ioa_cfg *ioa_cfg,
                 ipr_err("Array Member %d:\n", i);
                 ipr_log_ext_vpd(&array_entry->vpd);
                 ipr_err("Current Location: %s",
-                         ipr_format_resource_path(&array_entry->res_path[0], &buffer[0]));
+                         ipr_format_res_path(array_entry->res_path, buffer,
+                                             sizeof(buffer)));
                 ipr_err("Expected Location: %s",
-                         ipr_format_resource_path(&array_entry->expected_res_path[0], &buffer[0]));
+                         ipr_format_res_path(array_entry->expected_res_path,
+                                             buffer, sizeof(buffer)));
 
                 ipr_err_separator;
         }
@@ -4079,7 +4087,8 @@ static struct device_attribute ipr_adapter_handle_attr = {
 };
 
 /**
- * ipr_show_resource_path - Show the resource path for this device.
+ * ipr_show_resource_path - Show the resource path or the resource address for
+ *                          this device.
  * @dev:        device struct
  * @buf:        buffer
  *
@@ -4097,9 +4106,14 @@ static ssize_t ipr_show_resource_path(struct device *dev, struct device_attribut
 
         spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
         res = (struct ipr_resource_entry *)sdev->hostdata;
-        if (res)
+        if (res && ioa_cfg->sis64)
                 len = snprintf(buf, PAGE_SIZE, "%s\n",
-                               ipr_format_resource_path(&res->res_path[0], &buffer[0]));
+                               ipr_format_res_path(res->res_path, buffer,
+                                                   sizeof(buffer)));
+        else if (res)
+                len = snprintf(buf, PAGE_SIZE, "%d:%d:%d:%d\n", ioa_cfg->host->host_no,
+                               res->bus, res->target, res->lun);
+
         spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
         return len;
 }
@@ -4351,7 +4365,8 @@ static int ipr_slave_configure(struct scsi_device *sdev)
                         scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
                 if (ioa_cfg->sis64)
                         sdev_printk(KERN_INFO, sdev, "Resource path: %s\n",
-                                    ipr_format_resource_path(&res->res_path[0], &buffer[0]));
+                                    ipr_format_res_path(res->res_path, buffer,
+                                                        sizeof(buffer)));
                 return 0;
         }
         spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h
index 9ecd2259eb39..b965f3587c9d 100644
--- a/drivers/scsi/ipr.h
+++ b/drivers/scsi/ipr.h
@@ -1684,8 +1684,9 @@ struct ipr_ucode_image_header {
         if (ipr_is_device(hostrcb)) {                                   \
                 if ((hostrcb)->ioa_cfg->sis64) {                        \
                         printk(KERN_ERR IPR_NAME ": %s: " fmt,          \
-                                ipr_format_resource_path(&hostrcb->hcam.u.error64.fd_res_path[0], \
-                                        &hostrcb->rp_buffer[0]),        \
+                                ipr_format_res_path(hostrcb->hcam.u.error64.fd_res_path, \
+                                        hostrcb->rp_buffer,             \
+                                        sizeof(hostrcb->rp_buffer)),    \
                                 __VA_ARGS__);                           \
                 } else {                                                \
                         ipr_ra_err((hostrcb)->ioa_cfg,                  \
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index eed3c2d8dd1c..a182def7007d 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -41,6 +41,7 @@
 #include <linux/uaccess.h>
 
 #include <asm/io.h>
+#include <asm/ioctls.h>
 
 #include <asm/mach/serial_at91.h>
 #include <mach/board.h>
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index 61d75507d5d0..162c95a088ed 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -1596,6 +1596,7 @@ static const struct usb_device_id acm_ids[] = {
         { NOKIA_PCSUITE_ACM_INFO(0x00e9), }, /* Nokia 5320 XpressMusic */
         { NOKIA_PCSUITE_ACM_INFO(0x0108), }, /* Nokia 5320 XpressMusic 2G */
         { NOKIA_PCSUITE_ACM_INFO(0x01f5), }, /* Nokia N97, RM-505 */
+        { NOKIA_PCSUITE_ACM_INFO(0x02e3), }, /* Nokia 5230, RM-588 */
 
         /* NOTE: non-Nokia COMM/ACM/0xff is likely MSFT RNDIS... NOT a modem! */
 
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 83e7bbbe97fa..70cccc75a362 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -1982,6 +1982,8 @@ static int hub_port_wait_reset(struct usb_hub *hub, int port1,
                     (portstatus & USB_PORT_STAT_ENABLE)) {
                         if (hub_is_wusb(hub))
                                 udev->speed = USB_SPEED_WIRELESS;
+                        else if (portstatus & USB_PORT_STAT_SUPER_SPEED)
+                                udev->speed = USB_SPEED_SUPER;
                         else if (portstatus & USB_PORT_STAT_HIGH_SPEED)
                                 udev->speed = USB_SPEED_HIGH;
                         else if (portstatus & USB_PORT_STAT_LOW_SPEED)
diff --git a/drivers/usb/core/quirks.c b/drivers/usb/core/quirks.c
index f22d03df8b17..db99c084df92 100644
--- a/drivers/usb/core/quirks.c
+++ b/drivers/usb/core/quirks.c
@@ -41,6 +41,10 @@ static const struct usb_device_id usb_quirk_list[] = {
         /* Philips PSC805 audio device */
         { USB_DEVICE(0x0471, 0x0155), .driver_info = USB_QUIRK_RESET_RESUME },
 
+        /* Artisman Watchdog Dongle */
+        { USB_DEVICE(0x04b4, 0x0526), .driver_info =
+                        USB_QUIRK_CONFIG_INTF_STRINGS },
+
         /* Roland SC-8820 */
         { USB_DEVICE(0x0582, 0x0007), .driver_info = USB_QUIRK_RESET_RESUME },
 
@@ -64,6 +68,9 @@ static const struct usb_device_id usb_quirk_list[] = {
         /* X-Rite/Gretag-Macbeth Eye-One Pro display colorimeter */
         { USB_DEVICE(0x0971, 0x2000), .driver_info = USB_QUIRK_NO_SET_INTF },
 
+        /* Broadcom BCM92035DGROM BT dongle */
+        { USB_DEVICE(0x0a5c, 0x2021), .driver_info = USB_QUIRK_RESET_RESUME },
+
         /* Action Semiconductor flash disk */
         { USB_DEVICE(0x10d6, 0x2200), .driver_info =
                         USB_QUIRK_STRING_FETCH_255 },
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c
index 85b0d8921eae..980762453a9c 100644
--- a/drivers/usb/gadget/pxa27x_udc.c
+++ b/drivers/usb/gadget/pxa27x_udc.c
@@ -2561,7 +2561,7 @@ static void pxa_udc_shutdown(struct platform_device *_dev)
                 udc_disable(udc);
 }
 
-#ifdef CONFIG_CPU_PXA27x
+#ifdef CONFIG_PXA27x
 extern void pxa27x_clear_otgph(void);
 #else
 #define pxa27x_clear_otgph()   do {} while (0)
diff --git a/drivers/usb/gadget/s3c2410_udc.c b/drivers/usb/gadget/s3c2410_udc.c
index e724a051bfdd..ea2b3c7ebee5 100644
--- a/drivers/usb/gadget/s3c2410_udc.c
+++ b/drivers/usb/gadget/s3c2410_udc.c
@@ -735,6 +735,10 @@ static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
         else
                 dev->ep0state = EP0_OUT_DATA_PHASE;
 
+        if (!dev->driver)
+                return;
+
+        /* deliver the request to the gadget driver */
         ret = dev->driver->setup(&dev->gadget, crq);
         if (ret < 0) {
                 if (dev->req_config) {
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
index a18debdd79b8..418163894775 100644
--- a/drivers/usb/host/ohci-pxa27x.c
+++ b/drivers/usb/host/ohci-pxa27x.c
@@ -203,7 +203,7 @@ static inline void pxa27x_reset_hc(struct pxa27x_ohci *ohci)
         __raw_writel(uhchr & ~UHCHR_FHR, ohci->mmio_base + UHCHR);
 }
 
-#ifdef CONFIG_CPU_PXA27x
+#ifdef CONFIG_PXA27x
 extern void pxa27x_clear_otgph(void);
 #else
 #define pxa27x_clear_otgph()    do {} while (0)
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index fd9e03afd91c..2eb658d26394 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -835,6 +835,27 @@ fail:
         return 0;
 }
 
+void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci,
+                struct usb_device *udev)
+{
+        struct xhci_virt_device *virt_dev;
+        struct xhci_ep_ctx      *ep0_ctx;
+        struct xhci_ring        *ep_ring;
+
+        virt_dev = xhci->devs[udev->slot_id];
+        ep0_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, 0);
+        ep_ring = virt_dev->eps[0].ring;
+        /*
+         * FIXME we don't keep track of the dequeue pointer very well after a
+         * Set TR dequeue pointer, so we're setting the dequeue pointer of the
+         * host to our enqueue pointer.  This should only be called after a
+         * configured device has reset, so all control transfers should have
+         * been completed or cancelled before the reset.
+         */
+        ep0_ctx->deq = xhci_trb_virt_to_dma(ep_ring->enq_seg, ep_ring->enqueue);
+        ep0_ctx->deq |= ep_ring->cycle_state;
+}
+
 /* Setup an xHCI virtual device for a Set Address command */
 int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev)
 {
@@ -1002,7 +1023,7 @@ static inline unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
         return EP_INTERVAL(interval);
 }
 
-/* The "Mult" field in the endpoint context is only set for SuperSpeed devices.
+/* The "Mult" field in the endpoint context is only set for SuperSpeed isoc eps.
  * High speed endpoint descriptors can define "the number of additional
  * transaction opportunities per microframe", but that goes in the Max Burst
  * endpoint context field.
@@ -1010,7 +1031,8 @@ static inline unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
 static inline u32 xhci_get_endpoint_mult(struct usb_device *udev,
                 struct usb_host_endpoint *ep)
 {
-        if (udev->speed != USB_SPEED_SUPER)
+        if (udev->speed != USB_SPEED_SUPER ||
+                        !usb_endpoint_xfer_isoc(&ep->desc))
                 return 0;
         return ep->ss_ep_comp.bmAttributes;
 }
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 94e6934edb09..bfc99a939455 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -2380,16 +2380,19 @@ static int queue_command(struct xhci_hcd *xhci, u32 field1, u32 field2,
                 u32 field3, u32 field4, bool command_must_succeed)
 {
         int reserved_trbs = xhci->cmd_ring_reserved_trbs;
+        int ret;
+
         if (!command_must_succeed)
                 reserved_trbs++;
 
-        if (!room_on_ring(xhci, xhci->cmd_ring, reserved_trbs)) {
-                if (!in_interrupt())
-                        xhci_err(xhci, "ERR: No room for command on command ring\n");
+        ret = prepare_ring(xhci, xhci->cmd_ring, EP_STATE_RUNNING,
+                        reserved_trbs, GFP_ATOMIC);
+        if (ret < 0) {
+                xhci_err(xhci, "ERR: No room for command on command ring\n");
                 if (command_must_succeed)
                         xhci_err(xhci, "ERR: Reserved TRB counting for "
                                         "unfailable commands failed.\n");
-                return -ENOMEM;
+                return ret;
         }
         queue_trb(xhci, xhci->cmd_ring, false, false, field1, field2, field3,
                         field4 | xhci->cmd_ring->cycle_state);
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 27345cd04da0..3998f72cd0c4 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -2134,6 +2134,8 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
         /* If this is a Set Address to an unconfigured device, setup ep 0 */
         if (!udev->config)
                 xhci_setup_addressable_virt_dev(xhci, udev);
+        else
+                xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
         /* Otherwise, assume the core has the device configured how it wants */
         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 8b4b7d39f79c..6c7e3430ec93 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1292,6 +1292,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags);
 void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id);
 int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, struct usb_device *udev, gfp_t flags);
 int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev);
+void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci,
+                struct usb_device *udev);
 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc);
 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc);
 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index);
diff --git a/drivers/usb/misc/sisusbvga/sisusb.c b/drivers/usb/misc/sisusbvga/sisusb.c
index 30d930386b65..d25814c172b2 100644
--- a/drivers/usb/misc/sisusbvga/sisusb.c
+++ b/drivers/usb/misc/sisusbvga/sisusb.c
@@ -2436,7 +2436,8 @@ sisusb_open(struct inode *inode, struct file *file)
         }
 
         if (!sisusb->devinit) {
-                if (sisusb->sisusb_dev->speed == USB_SPEED_HIGH) {
+                if (sisusb->sisusb_dev->speed == USB_SPEED_HIGH ||
+                    sisusb->sisusb_dev->speed == USB_SPEED_SUPER) {
                         if (sisusb_init_gfxdevice(sisusb, 0)) {
                                 mutex_unlock(&sisusb->lock);
                                 dev_err(&sisusb->sisusb_dev->dev, "Failed to initialize device\n");
@@ -3166,7 +3167,7 @@ static int sisusb_probe(struct usb_interface *intf,
 
         sisusb->present = 1;
 
-        if (dev->speed == USB_SPEED_HIGH) {
+        if (dev->speed == USB_SPEED_HIGH || dev->speed == USB_SPEED_SUPER) {
                 int initscreen = 1;
 #ifdef INCL_SISUSB_CON
                 if (sisusb_first_vc > 0 &&
diff --git a/drivers/usb/musb/tusb6010.c b/drivers/usb/musb/tusb6010.c
index 05c077f8f9ac..3c48e77a0aa2 100644
--- a/drivers/usb/musb/tusb6010.c
+++ b/drivers/usb/musb/tusb6010.c
@@ -29,19 +29,6 @@ static void tusb_source_power(struct musb *musb, int is_on);
 #define TUSB_REV_MAJOR(reg_val)         ((reg_val >> 4) & 0xf)
 #define TUSB_REV_MINOR(reg_val)         (reg_val & 0xf)
 
-#ifdef CONFIG_PM
-/* REVISIT: These should be only needed if somebody implements off idle */
-void musb_platform_save_context(struct musb *musb,
-                        struct musb_context_registers *musb_context)
-{
-}
-
-void musb_platform_restore_context(struct musb *musb,
-                        struct musb_context_registers *musb_context)
-{
-}
-#endif
-
 /*
  * Checks the revision. We need to use the DMA register as 3.0 does not
  * have correct versions for TUSB_PRCM_REV or TUSB_INT_CTRL_REV.
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index da7e334b0407..e298dc4baed7 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -691,6 +691,7 @@ static struct usb_device_id id_table_combined [] = {
         { USB_DEVICE(FTDI_VID, FTDI_NDI_AURORA_SCU_PID),
                 .driver_info = (kernel_ulong_t)&ftdi_NDI_device_quirk },
         { USB_DEVICE(TELLDUS_VID, TELLDUS_TELLSTICK_PID) },
+        { USB_DEVICE(RTSYSTEMS_VID, RTSYSTEMS_SERIAL_VX7_PID) },
         { USB_DEVICE(FTDI_VID, FTDI_MAXSTREAM_PID) },
         { USB_DEVICE(FTDI_VID, FTDI_PHI_FISCO_PID) },
         { USB_DEVICE(TML_VID, TML_USB_SERIAL_PID) },
@@ -737,6 +738,14 @@ static struct usb_device_id id_table_combined [] = {
         { USB_DEVICE(FTDI_VID, MJSG_SR_RADIO_PID) },
         { USB_DEVICE(FTDI_VID, MJSG_HD_RADIO_PID) },
         { USB_DEVICE(FTDI_VID, MJSG_XM_RADIO_PID) },
+        { USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_ST_PID),
+                .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+        { USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SLITE_PID),
+                .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+        { USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SH2_PID),
+                .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
+        { USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SH4_PID),
+                .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
         { },                                    /* Optional parameter entry */
         { }                                     /* Terminating entry */
 };
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h
index bbc159a1df45..d01946db8fac 100644
--- a/drivers/usb/serial/ftdi_sio_ids.h
+++ b/drivers/usb/serial/ftdi_sio_ids.h
@@ -696,6 +696,12 @@
 #define TELLDUS_TELLSTICK_PID           0x0C30  /* RF control dongle 433 MHz using FT232RL */
 
 /*
+ * RT Systems programming cables for various ham radios
+ */
+#define RTSYSTEMS_VID                   0x2100  /* Vendor ID */
+#define RTSYSTEMS_SERIAL_VX7_PID        0x9e52  /* Serial converter for VX-7 Radios using FT232RL */
+
+/*
  * Bayer Ascensia Contour blood glucose meter USB-converter cable.
  * http://winglucofacts.com/cables/
  */
@@ -1017,3 +1023,12 @@
 #define MJSG_SR_RADIO_PID       0x9379
 #define MJSG_XM_RADIO_PID       0x937A
 #define MJSG_HD_RADIO_PID       0x937C
+
+/*
+ * Xverve Signalyzer tools (http://www.signalyzer.com/)
+ */
+#define XVERVE_SIGNALYZER_ST_PID        0xBCA0
+#define XVERVE_SIGNALYZER_SLITE_PID     0xBCA1
+#define XVERVE_SIGNALYZER_SH2_PID       0xBCA2
+#define XVERVE_SIGNALYZER_SH4_PID       0xBCA4
+
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index e280ad8e12f7..5cd30e4345c6 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -206,6 +206,7 @@ static void option_instat_callback(struct urb *urb);
 #define AMOI_PRODUCT_H01                        0x0800
 #define AMOI_PRODUCT_H01A                       0x7002
 #define AMOI_PRODUCT_H02                        0x0802
+#define AMOI_PRODUCT_SKYPEPHONE_S2              0x0407
 
 #define DELL_VENDOR_ID                          0x413C
 
@@ -302,6 +303,7 @@ static void option_instat_callback(struct urb *urb);
 #define QISDA_PRODUCT_H21_4512                  0x4512
 #define QISDA_PRODUCT_H21_4523                  0x4523
 #define QISDA_PRODUCT_H20_4515                  0x4515
+#define QISDA_PRODUCT_H20_4518                  0x4518
 #define QISDA_PRODUCT_H20_4519                  0x4519
 
 /* TLAYTECH PRODUCTS */
@@ -516,6 +518,7 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01) },
         { USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01A) },
         { USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H02) },
+        { USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_SKYPEPHONE_S2) },
 
         { USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5700_MINICARD) },             /* Dell Wireless 5700 Mobile Broadband CDMA/EVDO Mini-Card == Novatel Expedite EV620 CDMA/EV-DO */
         { USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5500_MINICARD) },             /* Dell Wireless 5500 Mobile Broadband HSDPA Mini-Card == Novatel Expedite EU740 HSDPA/3G */
@@ -852,6 +855,7 @@ static const struct usb_device_id option_ids[] = {
         { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) },
         { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4523) },
         { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4515) },
+        { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4518) },
         { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4519) },
         { USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_G450) },
         { USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_HSDPA_MINICARD ) }, /* Toshiba 3G HSDPA == Novatel Expedite EU870D MiniCard */
diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c
index 93d72eb8cafc..cde67cacb2c3 100644
--- a/drivers/usb/serial/qcserial.c
+++ b/drivers/usb/serial/qcserial.c
@@ -51,6 +51,8 @@ static const struct usb_device_id id_table[] = {
         {USB_DEVICE(0x1f45, 0x0001)},   /* Unknown Gobi QDL device */
         {USB_DEVICE(0x413c, 0x8185)},   /* Dell Gobi 2000 QDL device (N0218, VU936) */
         {USB_DEVICE(0x413c, 0x8186)},   /* Dell Gobi 2000 Modem device (N0218, VU936) */
+        {USB_DEVICE(0x05c6, 0x9208)},   /* Generic Gobi 2000 QDL device */
+        {USB_DEVICE(0x05c6, 0x920b)},   /* Generic Gobi 2000 Modem device */
         {USB_DEVICE(0x05c6, 0x9224)},   /* Sony Gobi 2000 QDL device (N0279, VU730) */
         {USB_DEVICE(0x05c6, 0x9225)},   /* Sony Gobi 2000 Modem device (N0279, VU730) */
         {USB_DEVICE(0x05c6, 0x9244)},   /* Samsung Gobi 2000 QDL device (VL176) */
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c
index ef0bdb08d788..d47b56e9e8ce 100644
--- a/drivers/usb/serial/sierra.c
+++ b/drivers/usb/serial/sierra.c
@@ -245,6 +245,7 @@ static const struct usb_device_id id_table[] = {
         { USB_DEVICE(0x1199, 0x0021) }, /* Sierra Wireless AirCard 597E */
         { USB_DEVICE(0x1199, 0x0112) }, /* Sierra Wireless AirCard 580 */
         { USB_DEVICE(0x1199, 0x0120) }, /* Sierra Wireless USB Dongle 595U */
+        { USB_DEVICE(0x1199, 0x0301) }, /* Sierra Wireless USB Dongle 250U */
         /* Sierra Wireless C597 */
         { USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x0023, 0xFF, 0xFF, 0xFF) },
         /* Sierra Wireless T598 */
diff --git a/drivers/usb/storage/transport.c b/drivers/usb/storage/transport.c
index 44716427c51c..64ec073e89de 100644
--- a/drivers/usb/storage/transport.c
+++ b/drivers/usb/storage/transport.c
@@ -139,9 +139,7 @@ static int usb_stor_msg_common(struct us_data *us, int timeout)
 
         /* fill the common fields in the URB */
         us->current_urb->context = &urb_done;
-        us->current_urb->actual_length = 0;
-        us->current_urb->error_count = 0;
-        us->current_urb->status = 0;
+        us->current_urb->transfer_flags = 0;
 
         /* we assume that if transfer_buffer isn't us->iobuf then it
          * hasn't been mapped for DMA.  Yes, this is clunky, but it's
diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c
index 40f61320ce16..34b2fc472fe8 100644
--- a/drivers/video/au1100fb.c
+++ b/drivers/video/au1100fb.c
@@ -95,7 +95,7 @@ struct fb_bitfield rgb_bitfields[][4] =
         { { 8, 4, 0 },  { 4, 4, 0 }, { 0, 4, 0 }, { 0, 0, 0 } },
 };
 
-static struct fb_fix_screeninfo au1100fb_fix __initdata = {
+static struct fb_fix_screeninfo au1100fb_fix __devinitdata = {
         .id             = "AU1100 FB",
         .xpanstep       = 1,
         .ypanstep       = 1,
@@ -103,7 +103,7 @@ static struct fb_fix_screeninfo au1100fb_fix __initdata = {
         .accel          = FB_ACCEL_NONE,
 };
 
-static struct fb_var_screeninfo au1100fb_var __initdata = {
+static struct fb_var_screeninfo au1100fb_var __devinitdata = {
         .activate       = FB_ACTIVATE_NOW,
         .height         = -1,
         .width          = -1,
@@ -458,7 +458,7 @@ static struct fb_ops au1100fb_ops =
 
 /* AU1100 LCD controller device driver */
 
-static int __init au1100fb_drv_probe(struct platform_device *dev)
+static int __devinit au1100fb_drv_probe(struct platform_device *dev)
 {
         struct au1100fb_device *fbdev = NULL;
         struct resource *regs_res;
diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig
index 8e8f18d29d7a..5a35f22372b9 100644
--- a/drivers/video/console/Kconfig
+++ b/drivers/video/console/Kconfig
@@ -6,7 +6,7 @@ menu "Console display driver support"
 
 config VGA_CONSOLE
         bool "VGA text console" if EMBEDDED || !X86
-        depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32 && !MN10300
+        depends on !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !SUPERH && !BLACKFIN && !AVR32 && !MN10300 && (!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER)
         default y
         help
           Saying Y here will allow you to use Linux in text mode through a
diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c
index 3a561df2e8a2..0c1afd13ddd3 100644
--- a/drivers/video/cyber2000fb.c
+++ b/drivers/video/cyber2000fb.c
@@ -388,6 +388,7 @@ cyber2000fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
                 pseudo_val |= convert_bitfield(red, &var->red);
                 pseudo_val |= convert_bitfield(green, &var->green);
                 pseudo_val |= convert_bitfield(blue, &var->blue);
+                ret = 0;
                 break;
         }
 
@@ -436,6 +437,8 @@ static void cyber2000fb_write_ramdac_ctrl(struct cfb_info *cfb)
         cyber2000fb_writeb(i | 4, 0x3cf, cfb);
         cyber2000fb_writeb(val, 0x3c6, cfb);
         cyber2000fb_writeb(i, 0x3cf, cfb);
+        /* prevent card lock-up observed on x86 with CyberPro 2000 */
+        cyber2000fb_readb(0x3cf, cfb);
 }
 
 static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw)
diff --git a/drivers/video/gbefb.c b/drivers/video/gbefb.c
index 7d8c55d7fd28..ca3355e430bf 100644
--- a/drivers/video/gbefb.c
+++ b/drivers/video/gbefb.c
@@ -91,10 +91,10 @@ static uint32_t pseudo_palette[16];
 static uint32_t gbe_cmap[256];
 static int gbe_turned_on; /* 0 turned off, 1 turned on */
 
-static char *mode_option __initdata = NULL;
+static char *mode_option __devinitdata = NULL;
 
 /* default CRT mode */
-static struct fb_var_screeninfo default_var_CRT __initdata = {
+static struct fb_var_screeninfo default_var_CRT __devinitdata = {
         /* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
         .xres           = 640,
         .yres           = 480,
@@ -125,7 +125,7 @@ static struct fb_var_screeninfo default_var_CRT __initdata = {
 };
 
 /* default LCD mode */
-static struct fb_var_screeninfo default_var_LCD __initdata = {
+static struct fb_var_screeninfo default_var_LCD __devinitdata = {
         /* 1600x1024, 8 bpp */
         .xres           = 1600,
         .yres           = 1024,
@@ -157,7 +157,7 @@ static struct fb_var_screeninfo default_var_LCD __initdata = {
 
 /* default modedb mode */
 /* 640x480, 60 Hz, Non-Interlaced (25.172 MHz dotclock) */
-static struct fb_videomode default_mode_CRT __initdata = {
+static struct fb_videomode default_mode_CRT __devinitdata = {
         .refresh        = 60,
         .xres           = 640,
         .yres           = 480,
@@ -172,7 +172,7 @@ static struct fb_videomode default_mode_CRT __initdata = {
         .vmode          = FB_VMODE_NONINTERLACED,
 };
 /* 1600x1024 SGI flatpanel 1600sw */
-static struct fb_videomode default_mode_LCD __initdata = {
+static struct fb_videomode default_mode_LCD __devinitdata = {
         /* 1600x1024, 8 bpp */
         .xres           = 1600,
         .yres           = 1024,
@@ -186,8 +186,8 @@ static struct fb_videomode default_mode_LCD __initdata = {
         .vmode          = FB_VMODE_NONINTERLACED,
 };
 
-static struct fb_videomode *default_mode __initdata = &default_mode_CRT;
-static struct fb_var_screeninfo *default_var __initdata = &default_var_CRT;
+static struct fb_videomode *default_mode __devinitdata = &default_mode_CRT;
+static struct fb_var_screeninfo *default_var __devinitdata = &default_var_CRT;
 
 static int flat_panel_enabled = 0;
 
@@ -1098,7 +1098,7 @@ static void gbefb_create_sysfs(struct device *dev)
  * Initialization
  */
 
-static int __init gbefb_setup(char *options)
+static int __devinit gbefb_setup(char *options)
 {
         char *this_opt;
 
diff --git a/drivers/video/omap/lcd_apollon.c b/drivers/video/omap/lcd_apollon.c
index 2be94eb3bbf5..10459d8bd9a0 100644
--- a/drivers/video/omap/lcd_apollon.c
+++ b/drivers/video/omap/lcd_apollon.c
@@ -25,7 +25,6 @@
 #include <linux/platform_device.h>
 
 #include <mach/gpio.h>
-#include <plat/mux.h>
 
 #include "omapfb.h"
 
@@ -34,8 +33,6 @@
 static int apollon_panel_init(struct lcd_panel *panel,
                                 struct omapfb_device *fbdev)
 {
-        /* configure LCD PWR_EN */
-        omap_cfg_reg(M21_242X_GPIO11);
         return 0;
 }
 
diff --git a/drivers/video/pmag-ba-fb.c b/drivers/video/pmag-ba-fb.c
index 0f361b6100d2..0c69fa20251b 100644
--- a/drivers/video/pmag-ba-fb.c
+++ b/drivers/video/pmag-ba-fb.c
@@ -44,7 +44,7 @@ struct pmagbafb_par {
 };
 
 
-static struct fb_var_screeninfo pmagbafb_defined __initdata = {
+static struct fb_var_screeninfo pmagbafb_defined __devinitdata = {
         .xres           = 1024,
         .yres           = 864,
         .xres_virtual   = 1024,
@@ -68,7 +68,7 @@ static struct fb_var_screeninfo pmagbafb_defined __initdata = {
         .vmode          = FB_VMODE_NONINTERLACED,
 };
 
-static struct fb_fix_screeninfo pmagbafb_fix __initdata = {
+static struct fb_fix_screeninfo pmagbafb_fix __devinitdata = {
         .id             = "PMAG-BA",
         .smem_len       = (1024 * 1024),
         .type           = FB_TYPE_PACKED_PIXELS,
@@ -142,7 +142,7 @@ static void __init pmagbafb_erase_cursor(struct fb_info *info)
 }
 
 
-static int __init pmagbafb_probe(struct device *dev)
+static int __devinit pmagbafb_probe(struct device *dev)
 {
         struct tc_dev *tdev = to_tc_dev(dev);
         resource_size_t start, len;
diff --git a/drivers/video/pmagb-b-fb.c b/drivers/video/pmagb-b-fb.c
index 2de0806421b4..22fcb9a3d5c0 100644
--- a/drivers/video/pmagb-b-fb.c
+++ b/drivers/video/pmagb-b-fb.c
@@ -45,7 +45,7 @@ struct pmagbbfb_par {
 };
 
 
-static struct fb_var_screeninfo pmagbbfb_defined __initdata = {
+static struct fb_var_screeninfo pmagbbfb_defined __devinitdata = {
         .bits_per_pixel = 8,
         .red.length     = 8,
         .green.length   = 8,
@@ -58,7 +58,7 @@ static struct fb_var_screeninfo pmagbbfb_defined __initdata = {
         .vmode          = FB_VMODE_NONINTERLACED,
 };
 
-static struct fb_fix_screeninfo pmagbbfb_fix __initdata = {
+static struct fb_fix_screeninfo pmagbbfb_fix __devinitdata = {
         .id             = "PMAGB-BA",
         .smem_len       = (2048 * 1024),
         .type           = FB_TYPE_PACKED_PIXELS,
@@ -148,7 +148,7 @@ static void __init pmagbbfb_erase_cursor(struct fb_info *info)
 /*
  * Set up screen parameters.
  */
-static void __init pmagbbfb_screen_setup(struct fb_info *info)
+static void __devinit pmagbbfb_screen_setup(struct fb_info *info)
 {
         struct pmagbbfb_par *par = info->par;
 
@@ -180,9 +180,9 @@ static void __init pmagbbfb_screen_setup(struct fb_info *info)
 /*
  * Determine oscillator configuration.
  */
-static void __init pmagbbfb_osc_setup(struct fb_info *info)
+static void __devinit pmagbbfb_osc_setup(struct fb_info *info)
 {
-        static unsigned int pmagbbfb_freqs[] __initdata = {
+        static unsigned int pmagbbfb_freqs[] __devinitdata = {
                 130808, 119843, 104000, 92980, 74370, 72800,
                 69197, 66000, 65000, 50350, 36000, 32000, 25175
         };
@@ -247,7 +247,7 @@ static void __init pmagbbfb_osc_setup(struct fb_info *info)
 };
 
 
-static int __init pmagbbfb_probe(struct device *dev)
+static int __devinit pmagbbfb_probe(struct device *dev)
 {
         struct tc_dev *tdev = to_tc_dev(dev);
         resource_size_t start, len;
diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
index afe7e21dd0ae..1475ed6b575f 100644
--- a/drivers/virtio/virtio_ring.c
+++ b/drivers/virtio/virtio_ring.c
@@ -164,7 +164,8 @@ int virtqueue_add_buf_gfp(struct virtqueue *_vq,
                           gfp_t gfp)
 {
         struct vring_virtqueue *vq = to_vvq(_vq);
-        unsigned int i, avail, head, uninitialized_var(prev);
+        unsigned int i, avail, uninitialized_var(prev);
+        int head;
 
         START_USE(vq);
 
@@ -174,7 +175,7 @@ int virtqueue_add_buf_gfp(struct virtqueue *_vq,
          * buffers, then go indirect. FIXME: tune this threshold */
         if (vq->indirect && (out + in) > 1 && vq->num_free) {
                 head = vring_add_indirect(vq, sg, out, in, gfp);
-                if (head != vq->vring.num)
+                if (likely(head >= 0))
                         goto add_head;
         }
 
diff --git a/fs/9p/vfs_dir.c b/fs/9p/vfs_dir.c
index d61e3b28ce37..36d961f342af 100644
--- a/fs/9p/vfs_dir.c
+++ b/fs/9p/vfs_dir.c
@@ -146,7 +146,7 @@ static int v9fs_dir_readdir(struct file *filp, void *dirent, filldir_t filldir)
                 while (rdir->head < rdir->tail) {
                         p9stat_init(&st);
                         err = p9stat_read(rdir->buf + rdir->head,
-                                                buflen - rdir->head, &st,
+                                                rdir->tail - rdir->head, &st,
                                                 fid->clnt->proto_version);
                         if (err) {
                                 P9_DPRINTK(P9_DEBUG_VFS, "returned %d\n", err);
diff --git a/fs/ceph/Kconfig b/fs/ceph/Kconfig
index 04b8280582a9..bc87b9c1d27e 100644
--- a/fs/ceph/Kconfig
+++ b/fs/ceph/Kconfig
@@ -2,7 +2,7 @@ config CEPH_FS
         tristate "Ceph distributed file system (EXPERIMENTAL)"
         depends on INET && EXPERIMENTAL
         select LIBCRC32C
-        select CONFIG_CRYPTO_AES
+        select CRYPTO_AES
         help
           Choose Y or M here to include support for mounting the
           experimental Ceph distributed file system.  Ceph is an extremely
diff --git a/fs/ceph/caps.c b/fs/ceph/caps.c
index 74144d6389f0..b81be9a56487 100644
--- a/fs/ceph/caps.c
+++ b/fs/ceph/caps.c
@@ -627,7 +627,7 @@ retry:
         if (fmode >= 0)
                 __ceph_get_fmode(ci, fmode);
         spin_unlock(&inode->i_lock);
-        wake_up(&ci->i_cap_wq);
+        wake_up_all(&ci->i_cap_wq);
         return 0;
 }
 
@@ -1181,7 +1181,7 @@ static int __send_cap(struct ceph_mds_client *mdsc, struct ceph_cap *cap,
         }
 
         if (wake)
-                wake_up(&ci->i_cap_wq);
+                wake_up_all(&ci->i_cap_wq);
 
         return delayed;
 }
@@ -2153,7 +2153,7 @@ void ceph_put_cap_refs(struct ceph_inode_info *ci, int had)
         else if (flushsnaps)
                 ceph_flush_snaps(ci);
         if (wake)
-                wake_up(&ci->i_cap_wq);
+                wake_up_all(&ci->i_cap_wq);
         if (put)
                 iput(inode);
 }
@@ -2229,7 +2229,7 @@ void ceph_put_wrbuffer_cap_refs(struct ceph_inode_info *ci, int nr,
                 iput(inode);
         } else if (complete_capsnap) {
                 ceph_flush_snaps(ci);
-                wake_up(&ci->i_cap_wq);
+                wake_up_all(&ci->i_cap_wq);
         }
         if (drop_capsnap)
                 iput(inode);
@@ -2405,7 +2405,7 @@ static void handle_cap_grant(struct inode *inode, struct ceph_mds_caps *grant,
         if (queue_invalidate)
                 ceph_queue_invalidate(inode);
         if (wake)
-                wake_up(&ci->i_cap_wq);
+                wake_up_all(&ci->i_cap_wq);
 
         if (check_caps == 1)
                 ceph_check_caps(ci, CHECK_CAPS_NODELAY|CHECK_CAPS_AUTHONLY,
@@ -2460,7 +2460,7 @@ static void handle_cap_flush_ack(struct inode *inode, u64 flush_tid,
                                          struct ceph_inode_info,
                                          i_flushing_item)->vfs_inode);
                 mdsc->num_cap_flushing--;
-                wake_up(&mdsc->cap_flushing_wq);
+                wake_up_all(&mdsc->cap_flushing_wq);
                 dout(" inode %p now !flushing\n", inode);
 
                 if (ci->i_dirty_caps == 0) {
@@ -2472,7 +2472,7 @@ static void handle_cap_flush_ack(struct inode *inode, u64 flush_tid,
                 }
         }
         spin_unlock(&mdsc->cap_dirty_lock);
-        wake_up(&ci->i_cap_wq);
+        wake_up_all(&ci->i_cap_wq);
 
 out:
         spin_unlock(&inode->i_lock);
@@ -2984,6 +2984,7 @@ int ceph_encode_dentry_release(void **p, struct dentry *dentry,
                 memcpy(*p, dentry->d_name.name, dentry->d_name.len);
                 *p += dentry->d_name.len;
                 rel->dname_seq = cpu_to_le32(di->lease_seq);
+                __ceph_mdsc_drop_dentry_lease(dentry);
         }
         spin_unlock(&dentry->d_lock);
         return ret;
diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c
index f85719310db2..f94ed3c7f6a5 100644
--- a/fs/ceph/dir.c
+++ b/fs/ceph/dir.c
@@ -266,6 +266,7 @@ static int ceph_readdir(struct file *filp, void *dirent, filldir_t filldir)
         spin_lock(&inode->i_lock);
         if ((filp->f_pos == 2 || fi->dentry) &&
             !ceph_test_opt(client, NOASYNCREADDIR) &&
+            ceph_snap(inode) != CEPH_SNAPDIR &&
             (ci->i_ceph_flags & CEPH_I_COMPLETE) &&
             __ceph_caps_issued_mask(ci, CEPH_CAP_FILE_SHARED, 1)) {
                 err = __dcache_readdir(filp, dirent, filldir);
@@ -1013,18 +1014,22 @@ out_touch:
 
 /*
  * When a dentry is released, clear the dir I_COMPLETE if it was part
- * of the current dir gen.
+ * of the current dir gen or if this is in the snapshot namespace.
  */
 static void ceph_dentry_release(struct dentry *dentry)
 {
         struct ceph_dentry_info *di = ceph_dentry(dentry);
         struct inode *parent_inode = dentry->d_parent->d_inode;
+        u64 snapid = ceph_snap(parent_inode);
 
-        if (parent_inode) {
+        dout("dentry_release %p parent %p\n", dentry, parent_inode);
+
+        if (parent_inode && snapid != CEPH_SNAPDIR) {
                 struct ceph_inode_info *ci = ceph_inode(parent_inode);
 
                 spin_lock(&parent_inode->i_lock);
-                if (ci->i_shared_gen == di->lease_shared_gen) {
+                if (ci->i_shared_gen == di->lease_shared_gen ||
+                    snapid <= CEPH_MAXSNAP) {
                         dout(" clearing %p complete (d_release)\n",
                              parent_inode);
                         ci->i_ceph_flags &= ~CEPH_I_COMPLETE;
@@ -1241,7 +1246,9 @@ struct dentry_operations ceph_dentry_ops = {
 
 struct dentry_operations ceph_snapdir_dentry_ops = {
         .d_revalidate = ceph_snapdir_d_revalidate,
+        .d_release = ceph_dentry_release,
 };
 
 struct dentry_operations ceph_snap_dentry_ops = {
+        .d_release = ceph_dentry_release,
 };
diff --git a/fs/ceph/file.c b/fs/ceph/file.c
index 6251a1574b94..7c08698fad3e 100644
--- a/fs/ceph/file.c
+++ b/fs/ceph/file.c
@@ -265,7 +265,7 @@ int ceph_release(struct inode *inode, struct file *file)
         kmem_cache_free(ceph_file_cachep, cf);
 
         /* wake up anyone waiting for caps on this inode */
-        wake_up(&ci->i_cap_wq);
+        wake_up_all(&ci->i_cap_wq);
         return 0;
 }
 
diff --git a/fs/ceph/inode.c b/fs/ceph/inode.c
index 8f9b9fe8ef9f..389f9dbd9949 100644
--- a/fs/ceph/inode.c
+++ b/fs/ceph/inode.c
@@ -1199,8 +1199,10 @@ retry_lookup:
                                 goto out;
                         }
                         err = ceph_init_dentry(dn);
-                        if (err < 0)
+                        if (err < 0) {
+                                dput(dn);
                                 goto out;
+                        }
                 } else if (dn->d_inode &&
                            (ceph_ino(dn->d_inode) != vino.ino ||
                             ceph_snap(dn->d_inode) != vino.snap)) {
@@ -1499,7 +1501,7 @@ retry:
         if (wrbuffer_refs == 0)
                 ceph_check_caps(ci, CHECK_CAPS_AUTHONLY, NULL);
         if (wake)
-                wake_up(&ci->i_cap_wq);
+                wake_up_all(&ci->i_cap_wq);
 }
 
 
diff --git a/fs/ceph/mds_client.c b/fs/ceph/mds_client.c
index 416c08d315db..dd440bd438a9 100644
--- a/fs/ceph/mds_client.c
+++ b/fs/ceph/mds_client.c
@@ -868,7 +868,7 @@ static int wake_up_session_cb(struct inode *inode, struct ceph_cap *cap,
 {
         struct ceph_inode_info *ci = ceph_inode(inode);
 
-        wake_up(&ci->i_cap_wq);
+        wake_up_all(&ci->i_cap_wq);
         if (arg) {
                 spin_lock(&inode->i_lock);
                 ci->i_wanted_max_size = 0;
@@ -1564,7 +1564,7 @@ static void complete_request(struct ceph_mds_client *mdsc,
         if (req->r_callback)
                 req->r_callback(mdsc, req);
         else
-                complete(&req->r_completion);
+                complete_all(&req->r_completion);
 }
 
 /*
@@ -1932,7 +1932,7 @@ static void handle_reply(struct ceph_mds_session *session, struct ceph_msg *msg)
         if (head->safe) {
                 req->r_got_safe = true;
                 __unregister_request(mdsc, req);
-                complete(&req->r_safe_completion);
+                complete_all(&req->r_safe_completion);
 
                 if (req->r_got_unsafe) {
                         /*
@@ -1947,7 +1947,7 @@ static void handle_reply(struct ceph_mds_session *session, struct ceph_msg *msg)
 
                         /* last unsafe request during umount? */
                         if (mdsc->stopping && !__get_oldest_req(mdsc))
-                                complete(&mdsc->safe_umount_waiters);
+                                complete_all(&mdsc->safe_umount_waiters);
                         mutex_unlock(&mdsc->mutex);
                         goto out;
                 }
@@ -2126,7 +2126,7 @@ static void handle_session(struct ceph_mds_session *session,
                         pr_info("mds%d reconnect denied\n", session->s_mds);
                 remove_session_caps(session);
                 wake = 1; /* for good measure */
-                complete(&mdsc->session_close_waiters);
+                complete_all(&mdsc->session_close_waiters);
                 kick_requests(mdsc, mds);
                 break;
 
diff --git a/fs/ceph/mon_client.c b/fs/ceph/mon_client.c
index cc115eafae11..54fe01c50706 100644
--- a/fs/ceph/mon_client.c
+++ b/fs/ceph/mon_client.c
@@ -345,7 +345,7 @@ static void ceph_monc_handle_map(struct ceph_mon_client *monc,
 
 out:
         mutex_unlock(&monc->mutex);
-        wake_up(&client->auth_wq);
+        wake_up_all(&client->auth_wq);
 }
 
 /*
@@ -462,7 +462,7 @@ static void handle_statfs_reply(struct ceph_mon_client *monc,
         }
         mutex_unlock(&monc->mutex);
         if (req) {
-                complete(&req->completion);
+                complete_all(&req->completion);
                 put_generic_request(req);
         }
         return;
@@ -718,7 +718,7 @@ static void handle_auth_reply(struct ceph_mon_client *monc,
                                      monc->m_auth->front_max);
         if (ret < 0) {
                 monc->client->auth_err = ret;
-                wake_up(&monc->client->auth_wq);
+                wake_up_all(&monc->client->auth_wq);
         } else if (ret > 0) {
                 __send_prepared_auth_request(monc, ret);
         } else if (!was_auth && monc->auth->ops->is_authenticated(monc->auth)) {
diff --git a/fs/ceph/osd_client.c b/fs/ceph/osd_client.c
index 92b7251a53f1..e38522347898 100644
--- a/fs/ceph/osd_client.c
+++ b/fs/ceph/osd_client.c
@@ -862,12 +862,12 @@ static void handle_reply(struct ceph_osd_client *osdc, struct ceph_msg *msg,
         if (req->r_callback)
                 req->r_callback(req, msg);
         else
-                complete(&req->r_completion);
+                complete_all(&req->r_completion);
 
         if (flags & CEPH_OSD_FLAG_ONDISK) {
                 if (req->r_safe_callback)
                         req->r_safe_callback(req, msg);
-                complete(&req->r_safe_completion);  /* fsync waiter */
+                complete_all(&req->r_safe_completion);  /* fsync waiter */
         }
 
 done:
@@ -1083,7 +1083,7 @@ done:
         if (newmap)
                 kick_requests(osdc, NULL);
         up_read(&osdc->map_sem);
-        wake_up(&osdc->client->auth_wq);
+        wake_up_all(&osdc->client->auth_wq);
         return;
 
 bad:
diff --git a/fs/ceph/osdmap.c b/fs/ceph/osdmap.c
index 277f8b339577..416d46adbf87 100644
--- a/fs/ceph/osdmap.c
+++ b/fs/ceph/osdmap.c
@@ -831,12 +831,13 @@ struct ceph_osdmap *osdmap_apply_incremental(void **p, void *end,
                 /* remove any? */
                 while (rbp && pgid_cmp(rb_entry(rbp, struct ceph_pg_mapping,
                                                 node)->pgid, pgid) <= 0) {
-                        struct rb_node *cur = rbp;
+                        struct ceph_pg_mapping *cur =
+                                rb_entry(rbp, struct ceph_pg_mapping, node);
+                        
                         rbp = rb_next(rbp);
-                        dout(" removed pg_temp %llx\n",
-                             *(u64 *)&rb_entry(cur, struct ceph_pg_mapping,
-                                               node)->pgid);
-                        rb_erase(cur, &map->pg_temp);
+                        dout(" removed pg_temp %llx\n", *(u64 *)&cur->pgid);
+                        rb_erase(&cur->node, &map->pg_temp);
+                        kfree(cur);
                 }
 
                 if (pglen) {
@@ -852,19 +853,22 @@ struct ceph_osdmap *osdmap_apply_incremental(void **p, void *end,
                         for (j = 0; j < pglen; j++)
                                 pg->osds[j] = ceph_decode_32(p);
                         err = __insert_pg_mapping(pg, &map->pg_temp);
-                        if (err)
+                        if (err) {
+                                kfree(pg);
                                 goto bad;
+                        }
                         dout(" added pg_temp %llx len %d\n", *(u64 *)&pgid,
                              pglen);
                 }
         }
         while (rbp) {
-                struct rb_node *cur = rbp;
+                struct ceph_pg_mapping *cur =
+                        rb_entry(rbp, struct ceph_pg_mapping, node);
+
                 rbp = rb_next(rbp);
-                dout(" removed pg_temp %llx\n",
-                     *(u64 *)&rb_entry(cur, struct ceph_pg_mapping,
-                                       node)->pgid);
-                rb_erase(cur, &map->pg_temp);
+                dout(" removed pg_temp %llx\n", *(u64 *)&cur->pgid);
+                rb_erase(&cur->node, &map->pg_temp);
+                kfree(cur);
         }
 
         /* ignore the rest */
diff --git a/fs/cifs/dns_resolve.c b/fs/cifs/dns_resolve.c
index 49315cbf742d..853a968e82d7 100644
--- a/fs/cifs/dns_resolve.c
+++ b/fs/cifs/dns_resolve.c
@@ -227,7 +227,7 @@ failed_put_cred:
         return ret;
 }
 
-void __exit cifs_exit_dns_resolver(void)
+void cifs_exit_dns_resolver(void)
 {
         key_revoke(dns_resolver_cache->thread_keyring);
         unregister_key_type(&key_type_dns_resolver);
diff --git a/fs/cifs/dns_resolve.h b/fs/cifs/dns_resolve.h
index 26b9eaa9f5ee..5d7f291df162 100644
--- a/fs/cifs/dns_resolve.h
+++ b/fs/cifs/dns_resolve.h
@@ -25,7 +25,7 @@
 
 #ifdef __KERNEL__
 extern int __init cifs_init_dns_resolver(void);
-extern void __exit cifs_exit_dns_resolver(void);
+extern void cifs_exit_dns_resolver(void);
 extern int dns_resolve_server_name_to_ip(const char *unc, char **ip_addr);
 #endif /* KERNEL */
 
diff --git a/fs/ecryptfs/messaging.c b/fs/ecryptfs/messaging.c
index 2d8dbce9d485..46c4dd8dfcc3 100644
--- a/fs/ecryptfs/messaging.c
+++ b/fs/ecryptfs/messaging.c
@@ -31,9 +31,9 @@ static struct mutex ecryptfs_msg_ctx_lists_mux;
 
 static struct hlist_head *ecryptfs_daemon_hash;
 struct mutex ecryptfs_daemon_hash_mux;
-static int ecryptfs_hash_buckets;
+static int ecryptfs_hash_bits;
 #define ecryptfs_uid_hash(uid) \
-        hash_long((unsigned long)uid, ecryptfs_hash_buckets)
+        hash_long((unsigned long)uid, ecryptfs_hash_bits)
 
 static u32 ecryptfs_msg_counter;
 static struct ecryptfs_msg_ctx *ecryptfs_msg_ctx_arr;
@@ -486,18 +486,19 @@ int ecryptfs_init_messaging(void)
         }
         mutex_init(&ecryptfs_daemon_hash_mux);
         mutex_lock(&ecryptfs_daemon_hash_mux);
-        ecryptfs_hash_buckets = 1;
-        while (ecryptfs_number_of_users >> ecryptfs_hash_buckets)
-                ecryptfs_hash_buckets++;
+        ecryptfs_hash_bits = 1;
+        while (ecryptfs_number_of_users >> ecryptfs_hash_bits)
+                ecryptfs_hash_bits++;
         ecryptfs_daemon_hash = kmalloc((sizeof(struct hlist_head)
-                                        * ecryptfs_hash_buckets), GFP_KERNEL);
+                                        * (1 << ecryptfs_hash_bits)),
+                                       GFP_KERNEL);
         if (!ecryptfs_daemon_hash) {
                 rc = -ENOMEM;
                 printk(KERN_ERR "%s: Failed to allocate memory\n", __func__);
                 mutex_unlock(&ecryptfs_daemon_hash_mux);
                 goto out;
         }
-        for (i = 0; i < ecryptfs_hash_buckets; i++)
+        for (i = 0; i < (1 << ecryptfs_hash_bits); i++)
                 INIT_HLIST_HEAD(&ecryptfs_daemon_hash[i]);
         mutex_unlock(&ecryptfs_daemon_hash_mux);
         ecryptfs_msg_ctx_arr = kmalloc((sizeof(struct ecryptfs_msg_ctx)
@@ -554,7 +555,7 @@ void ecryptfs_release_messaging(void)
                 int i;
 
                 mutex_lock(&ecryptfs_daemon_hash_mux);
-                for (i = 0; i < ecryptfs_hash_buckets; i++) {
+                for (i = 0; i < (1 << ecryptfs_hash_bits); i++) {
                         int rc;
 
                         hlist_for_each_entry(daemon, elem,
diff --git a/fs/gfs2/dir.c b/fs/gfs2/dir.c
index 26ca3361a8bc..6b48d7c268b2 100644
--- a/fs/gfs2/dir.c
+++ b/fs/gfs2/dir.c
@@ -1231,6 +1231,25 @@ static int do_filldir_main(struct gfs2_inode *dip, u64 *offset,
         return 0;
 }
 
+static void *gfs2_alloc_sort_buffer(unsigned size)
+{
+        void *ptr = NULL;
+
+        if (size < KMALLOC_MAX_SIZE)
+                ptr = kmalloc(size, GFP_NOFS | __GFP_NOWARN);
+        if (!ptr)
+                ptr = __vmalloc(size, GFP_NOFS, PAGE_KERNEL);
+        return ptr;
+}
+
+static void gfs2_free_sort_buffer(void *ptr)
+{
+        if (is_vmalloc_addr(ptr))
+                vfree(ptr);
+        else
+                kfree(ptr);
+}
+
 static int gfs2_dir_read_leaf(struct inode *inode, u64 *offset, void *opaque,
                               filldir_t filldir, int *copied, unsigned *depth,
                               u64 leaf_no)
@@ -1271,7 +1290,7 @@ static int gfs2_dir_read_leaf(struct inode *inode, u64 *offset, void *opaque,
          * 99 is the maximum number of entries that can fit in a single
          * leaf block.
          */
-        larr = vmalloc((leaves + entries + 99) * sizeof(void *));
+        larr = gfs2_alloc_sort_buffer((leaves + entries + 99) * sizeof(void *));
         if (!larr)
                 goto out;
         darr = (const struct gfs2_dirent **)(larr + leaves);
@@ -1282,7 +1301,7 @@ static int gfs2_dir_read_leaf(struct inode *inode, u64 *offset, void *opaque,
         do {
                 error = get_leaf(ip, lfn, &bh);
                 if (error)
-                        goto out_kfree;
+                        goto out_free;
                 lf = (struct gfs2_leaf *)bh->b_data;
                 lfn = be64_to_cpu(lf->lf_next);
                 if (lf->lf_entries) {
@@ -1291,7 +1310,7 @@ static int gfs2_dir_read_leaf(struct inode *inode, u64 *offset, void *opaque,
                                                 gfs2_dirent_gather, NULL, &g);
                         error = PTR_ERR(dent);
                         if (IS_ERR(dent))
-                                goto out_kfree;
+                                goto out_free;
                         if (entries2 != g.offset) {
                                 fs_warn(sdp, "Number of entries corrupt in dir "
                                                 "leaf %llu, entries2 (%u) != "
@@ -1300,7 +1319,7 @@ static int gfs2_dir_read_leaf(struct inode *inode, u64 *offset, void *opaque,
                                         entries2, g.offset);
                                         
                                 error = -EIO;
-                                goto out_kfree;
+                                goto out_free;
                         }
                         error = 0;
                         larr[leaf++] = bh;
@@ -1312,10 +1331,10 @@ static int gfs2_dir_read_leaf(struct inode *inode, u64 *offset, void *opaque,
         BUG_ON(entries2 != entries);
         error = do_filldir_main(ip, offset, opaque, filldir, darr,
                                 entries, copied);
-out_kfree:
+out_free:
         for(i = 0; i < leaf; i++)
                 brelse(larr[i]);
-        vfree(larr);
+        gfs2_free_sort_buffer(larr);
 out:
         return error;
 }
diff --git a/fs/nfs/file.c b/fs/nfs/file.c
index 36a5e74f51b4..f036153d9f50 100644
--- a/fs/nfs/file.c
+++ b/fs/nfs/file.c
@@ -27,6 +27,7 @@
 #include <linux/pagemap.h>
 #include <linux/aio.h>
 #include <linux/gfp.h>
+#include <linux/swap.h>
 
 #include <asm/uaccess.h>
 #include <asm/system.h>
@@ -493,11 +494,19 @@ static void nfs_invalidate_page(struct page *page, unsigned long offset)
  */
 static int nfs_release_page(struct page *page, gfp_t gfp)
 {
+        struct address_space *mapping = page->mapping;
+
         dfprintk(PAGECACHE, "NFS: release_page(%p)\n", page);
 
         /* Only do I/O if gfp is a superset of GFP_KERNEL */
-        if ((gfp & GFP_KERNEL) == GFP_KERNEL)
-                nfs_wb_page(page->mapping->host, page);
+        if (mapping && (gfp & GFP_KERNEL) == GFP_KERNEL) {
+                int how = FLUSH_SYNC;
+
+                /* Don't let kswapd deadlock waiting for OOM RPC calls */
+                if (current_is_kswapd())
+                        how = 0;
+                nfs_commit_inode(mapping->host, how);
+        }
         /* If PagePrivate() is set, then the page is not freeable */
         if (PagePrivate(page))
                 return 0;
diff --git a/fs/nfs/nfsroot.c b/fs/nfs/nfsroot.c
index 6bd19d843af7..df101d9f546a 100644
--- a/fs/nfs/nfsroot.c
+++ b/fs/nfs/nfsroot.c
@@ -105,7 +105,7 @@ static char nfs_root_name[256] __initdata = "";
 static __be32 servaddr __initdata = 0;
 
 /* Name of directory to mount */
-static char nfs_export_path[NFS_MAXPATHLEN] __initdata = { 0, };
+static char nfs_export_path[NFS_MAXPATHLEN + 1] __initdata = { 0, };
 
 /* NFS-related data */
 static struct nfs_mount_data nfs_data __initdata = { 0, };/* NFS mount info */
diff --git a/fs/nfs/write.c b/fs/nfs/write.c
index 91679e2631ee..9f81bdd91c55 100644
--- a/fs/nfs/write.c
+++ b/fs/nfs/write.c
@@ -222,7 +222,7 @@ static void nfs_end_page_writeback(struct page *page)
                 clear_bdi_congested(&nfss->backing_dev_info, BLK_RW_ASYNC);
 }
 
-static struct nfs_page *nfs_find_and_lock_request(struct page *page)
+static struct nfs_page *nfs_find_and_lock_request(struct page *page, bool nonblock)
 {
         struct inode *inode = page->mapping->host;
         struct nfs_page *req;
@@ -241,7 +241,10 @@ static struct nfs_page *nfs_find_and_lock_request(struct page *page)
                  *       request as dirty (in which case we don't care).
                  */
                 spin_unlock(&inode->i_lock);
-                ret = nfs_wait_on_request(req);
+                if (!nonblock)
+                        ret = nfs_wait_on_request(req);
+                else
+                        ret = -EAGAIN;
                 nfs_release_request(req);
                 if (ret != 0)
                         return ERR_PTR(ret);
@@ -256,12 +259,12 @@ static struct nfs_page *nfs_find_and_lock_request(struct page *page)
  * May return an error if the user signalled nfs_wait_on_request().
  */
 static int nfs_page_async_flush(struct nfs_pageio_descriptor *pgio,
-                                struct page *page)
+                                struct page *page, bool nonblock)
 {
         struct nfs_page *req;
         int ret = 0;
 
-        req = nfs_find_and_lock_request(page);
+        req = nfs_find_and_lock_request(page, nonblock);
         if (!req)
                 goto out;
         ret = PTR_ERR(req);
@@ -283,12 +286,20 @@ out:
 static int nfs_do_writepage(struct page *page, struct writeback_control *wbc, struct nfs_pageio_descriptor *pgio)
 {
         struct inode *inode = page->mapping->host;
+        int ret;
 
         nfs_inc_stats(inode, NFSIOS_VFSWRITEPAGE);
         nfs_add_stats(inode, NFSIOS_WRITEPAGES, 1);
 
         nfs_pageio_cond_complete(pgio, page->index);
-        return nfs_page_async_flush(pgio, page);
+        ret = nfs_page_async_flush(pgio, page,
+                        wbc->sync_mode == WB_SYNC_NONE ||
+                        wbc->nonblocking != 0);
+        if (ret == -EAGAIN) {
+                redirty_page_for_writepage(wbc, page);
+                ret = 0;
+        }
+        return ret;
 }
 
 /*
@@ -1379,7 +1390,7 @@ static const struct rpc_call_ops nfs_commit_ops = {
         .rpc_release = nfs_commit_release,
 };
 
-static int nfs_commit_inode(struct inode *inode, int how)
+int nfs_commit_inode(struct inode *inode, int how)
 {
         LIST_HEAD(head);
         int may_wait = how & FLUSH_SYNC;
@@ -1443,11 +1454,6 @@ out_mark_dirty:
         return ret;
 }
 #else
-static int nfs_commit_inode(struct inode *inode, int how)
-{
-        return 0;
-}
-
 static int nfs_commit_unstable_pages(struct inode *inode, struct writeback_control *wbc)
 {
         return 0;
@@ -1546,7 +1552,7 @@ int nfs_migrate_page(struct address_space *mapping, struct page *newpage,
 
         nfs_fscache_release_page(page, GFP_KERNEL);
 
-        req = nfs_find_and_lock_request(page);
+        req = nfs_find_and_lock_request(page, false);
         ret = PTR_ERR(req);
         if (IS_ERR(req))
                 goto out;
diff --git a/fs/proc/array.c b/fs/proc/array.c
index 9b58d38bc911..fff6572676ae 100644
--- a/fs/proc/array.c
+++ b/fs/proc/array.c
@@ -176,7 +176,7 @@ static inline void task_state(struct seq_file *m, struct pid_namespace *ns,
                 if (tracer)
                         tpid = task_pid_nr_ns(tracer, ns);
         }
-        cred = get_cred((struct cred *) __task_cred(p));
+        cred = get_task_cred(p);
         seq_printf(m,
                 "State:\t%s\n"
                 "Tgid:\t%d\n"
diff --git a/fs/sysfs/symlink.c b/fs/sysfs/symlink.c
index f71246bebfe4..a7ac78f8e67a 100644
--- a/fs/sysfs/symlink.c
+++ b/fs/sysfs/symlink.c
@@ -28,6 +28,7 @@ static int sysfs_do_create_link(struct kobject *kobj, struct kobject *target,
         struct sysfs_dirent *target_sd = NULL;
         struct sysfs_dirent *sd = NULL;
         struct sysfs_addrm_cxt acxt;
+        enum kobj_ns_type ns_type;
         int error;
 
         BUG_ON(!name);
@@ -58,16 +59,29 @@ static int sysfs_do_create_link(struct kobject *kobj, struct kobject *target,
         if (!sd)
                 goto out_put;
 
-        if (sysfs_ns_type(parent_sd))
+        ns_type = sysfs_ns_type(parent_sd);
+        if (ns_type)
                 sd->s_ns = target->ktype->namespace(target);
         sd->s_symlink.target_sd = target_sd;
         target_sd = NULL;       /* reference is now owned by the symlink */
 
         sysfs_addrm_start(&acxt, parent_sd);
-        if (warn)
-                error = sysfs_add_one(&acxt, sd);
-        else
-                error = __sysfs_add_one(&acxt, sd);
+        /* Symlinks must be between directories with the same ns_type */
+        if (!ns_type ||
+            (ns_type == sysfs_ns_type(sd->s_symlink.target_sd->s_parent))) {
+                if (warn)
+                        error = sysfs_add_one(&acxt, sd);
+                else
+                        error = __sysfs_add_one(&acxt, sd);
+        } else {
+                error = -EINVAL;
+                WARN(1, KERN_WARNING
+                        "sysfs: symlink across ns_types %s/%s -> %s/%s\n",
+                        parent_sd->s_name,
+                        sd->s_name,
+                        sd->s_symlink.target_sd->s_parent->s_name,
+                        sd->s_symlink.target_sd->s_name);
+        }
         sysfs_addrm_finish(&acxt);
 
         if (error)
@@ -122,7 +136,7 @@ void sysfs_delete_link(struct kobject *kobj, struct kobject *targ,
 {
         const void *ns = NULL;
         spin_lock(&sysfs_assoc_lock);
-        if (targ->sd)
+        if (targ->sd && sysfs_ns_type(kobj->sd))
                 ns = targ->sd->s_ns;
         spin_unlock(&sysfs_assoc_lock);
         sysfs_hash_and_remove(kobj->sd, ns, name);
diff --git a/include/acpi/processor.h b/include/acpi/processor.h
index da565a48240e..a68ca8a11a53 100644
--- a/include/acpi/processor.h
+++ b/include/acpi/processor.h
@@ -48,7 +48,7 @@ struct acpi_power_register {
         u8 space_id;
         u8 bit_width;
         u8 bit_offset;
-        u8 reserved;
+        u8 access_size;
         u64 address;
 } __attribute__ ((packed));
 
@@ -63,6 +63,7 @@ struct acpi_processor_cx {
         u32 power;
         u32 usage;
         u64 time;
+        u8 bm_sts_skip;
         char desc[ACPI_CX_DESC_LEN];
 };
 
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 48c5299cbf26..030a954ed292 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -63,6 +63,12 @@
 /* Align . to a 8 byte boundary equals to maximum function alignment. */
 #define ALIGN_FUNCTION()  . = ALIGN(8)
 
+/*
+ * Align to a 32 byte boundary equal to the
+ * alignment gcc 4.5 uses for a struct
+ */
+#define STRUCT_ALIGN() . = ALIGN(32)
+
 /* The actual configuration determine if the init/exit sections
  * are handled as text/data or they can be discarded (which
  * often happens at runtime)
@@ -166,7 +172,11 @@
         LIKELY_PROFILE()                                                \
         BRANCH_PROFILE()                                                \
         TRACE_PRINTKS()                                                 \
+                                                                        \
+        STRUCT_ALIGN();                                                 \
         FTRACE_EVENTS()                                                 \
+                                                                        \
+        STRUCT_ALIGN();                                                 \
         TRACE_SYSCALLS()
 
 /*
@@ -435,7 +445,7 @@
  */
 #define INIT_TASK_DATA_SECTION(align)                                   \
         . = ALIGN(align);                                               \
-        .data..init_task : {                                            \
+        .data..init_task :  AT(ADDR(.data..init_task) - LOAD_OFFSET) {  \
                 INIT_TASK_DATA(align)                                   \
         }
 
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 224a38c960d4..ccf94dc5acdf 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -253,7 +253,7 @@ int acpi_resources_are_enforced(void);
 #ifdef CONFIG_PM_SLEEP
 void __init acpi_no_s4_hw_signature(void);
 void __init acpi_old_suspend_ordering(void);
-void __init acpi_s4_no_nvs(void);
+void __init acpi_nvs_nosave(void);
 #endif /* CONFIG_PM_SLEEP */
 
 struct acpi_osc_context {
diff --git a/include/linux/cred.h b/include/linux/cred.h
index 75c0fa881308..4d2c39573f36 100644
--- a/include/linux/cred.h
+++ b/include/linux/cred.h
@@ -153,6 +153,7 @@ struct cred {
 extern void __put_cred(struct cred *);
 extern void exit_creds(struct task_struct *);
 extern int copy_creds(struct task_struct *, unsigned long);
+extern const struct cred *get_task_cred(struct task_struct *);
 extern struct cred *cred_alloc_blank(void);
 extern struct cred *prepare_creds(void);
 extern struct cred *prepare_exec_creds(void);
@@ -273,33 +274,18 @@ static inline void put_cred(const struct cred *_cred)
  * @task: The task to query
  *
  * Access the objective credentials of a task.  The caller must hold the RCU
- * readlock.
+ * readlock or the task must be dead and unable to change its own credentials.
  *
- * The caller must make sure task doesn't go away, either by holding a ref on
- * task or by holding tasklist_lock to prevent it from being unlinked.
+ * The result of this function should not be passed directly to get_cred();
+ * rather get_task_cred() should be used instead.
  */
-#define __task_cred(task) \
-        ((const struct cred *)(rcu_dereference_check((task)->real_cred, rcu_read_lock_held() || lockdep_tasklist_lock_is_held())))
-
-/**
- * get_task_cred - Get another task's objective credentials
- * @task: The task to query
- *
- * Get the objective credentials of a task, pinning them so that they can't go
- * away.  Accessing a task's credentials directly is not permitted.
- *
- * The caller must make sure task doesn't go away, either by holding a ref on
- * task or by holding tasklist_lock to prevent it from being unlinked.
- */
-#define get_task_cred(task)                             \
-({                                                      \
-        struct cred *__cred;                            \
-        rcu_read_lock();                                \
-        __cred = (struct cred *) __task_cred((task));   \
-        get_cred(__cred);                               \
-        rcu_read_unlock();                              \
-        __cred;                                         \
-})
+#define __task_cred(task)                                               \
+        ({                                                              \
+                const struct task_struct *__t = (task);                 \
+                rcu_dereference_check(__t->real_cred,                   \
+                                      rcu_read_lock_held() ||           \
+                                      task_is_dead(__t));               \
+        })
 
 /**
  * get_current_cred - Get the current task's subjective credentials
diff --git a/include/linux/if_macvlan.h b/include/linux/if_macvlan.h
index 9ea047aca795..1ffaeffeff74 100644
--- a/include/linux/if_macvlan.h
+++ b/include/linux/if_macvlan.h
@@ -67,6 +67,8 @@ static inline void macvlan_count_rx(const struct macvlan_dev *vlan,
         }
 }
 
+extern void macvlan_common_setup(struct net_device *dev);
+
 extern int macvlan_common_newlink(struct net *src_net, struct net_device *dev,
                                   struct nlattr *tb[], struct nlattr *data[],
                                   int (*receive)(struct sk_buff *skb),
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index 77c2ae53431c..bad4d121b16e 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -493,8 +493,15 @@ extern int nfs_wb_all(struct inode *inode);
 extern int nfs_wb_page(struct inode *inode, struct page* page);
 extern int nfs_wb_page_cancel(struct inode *inode, struct page* page);
 #if defined(CONFIG_NFS_V3) || defined(CONFIG_NFS_V4)
+extern int  nfs_commit_inode(struct inode *, int);
 extern struct nfs_write_data *nfs_commitdata_alloc(void);
 extern void nfs_commit_free(struct nfs_write_data *wdata);
+#else
+static inline int
+nfs_commit_inode(struct inode *inode, int how)
+{
+        return 0;
+}
 #endif
 
 static inline int
diff --git a/include/linux/regulator/tps6507x.h b/include/linux/regulator/tps6507x.h
new file mode 100644
index 000000000000..4892f591bab1
--- /dev/null
+++ b/include/linux/regulator/tps6507x.h
@@ -0,0 +1,32 @@
+/*
+ * tps6507x.h  --  Voltage regulation for the Texas Instruments TPS6507X
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+
+#ifndef REGULATOR_TPS6507X
+#define REGULATOR_TPS6507X
+
+/**
+ * tps6507x_reg_platform_data - platform data for tps6507x
+ * @defdcdc_default: Defines whether DCDC high or the low register controls
+ *      output voltage by default. Valid for DCDC2 and DCDC3 outputs only.
+ */
+struct tps6507x_reg_platform_data {
+        bool defdcdc_default;
+};
+
+#endif
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 747fcaedddb7..0478888c6899 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -214,6 +214,7 @@ extern char ___assert_task_state[1 - 2*!!(
 
 #define task_is_traced(task)    ((task->state & __TASK_TRACED) != 0)
 #define task_is_stopped(task)   ((task->state & __TASK_STOPPED) != 0)
+#define task_is_dead(task)      ((task)->exit_state != 0)
 #define task_is_stopped_or_traced(task) \
                         ((task->state & (__TASK_STOPPED | __TASK_TRACED)) != 0)
 #define task_contributes_to_load(task)  \
diff --git a/include/net/tc_act/tc_mirred.h b/include/net/tc_act/tc_mirred.h
index ceac661cdfd5..cfe2943690ff 100644
--- a/include/net/tc_act/tc_mirred.h
+++ b/include/net/tc_act/tc_mirred.h
@@ -9,6 +9,7 @@ struct tcf_mirred {
         int                     tcfm_ifindex;
         int                     tcfm_ok_push;
         struct net_device       *tcfm_dev;
+        struct list_head        tcfm_list;
 };
 #define to_mirred(pc) \
         container_of(pc, struct tcf_mirred, common)
diff --git a/kernel/cred.c b/kernel/cred.c
index a2d5504fbcc2..60bc8b1e32e6 100644
--- a/kernel/cred.c
+++ b/kernel/cred.c
@@ -209,6 +209,31 @@ void exit_creds(struct task_struct *tsk)
         }
 }
 
+/**
+ * get_task_cred - Get another task's objective credentials
+ * @task: The task to query
+ *
+ * Get the objective credentials of a task, pinning them so that they can't go
+ * away.  Accessing a task's credentials directly is not permitted.
+ *
+ * The caller must also make sure task doesn't get deleted, either by holding a
+ * ref on task or by holding tasklist_lock to prevent it from being unlinked.
+ */
+const struct cred *get_task_cred(struct task_struct *task)
+{
+        const struct cred *cred;
+
+        rcu_read_lock();
+
+        do {
+                cred = __task_cred((task));
+                BUG_ON(!cred);
+        } while (!atomic_inc_not_zero(&((struct cred *)cred)->usage));
+
+        rcu_read_unlock();
+        return cred;
+}
+
 /*
  * Allocate blank credentials, such that the credentials can be filled in at a
  * later date without risk of ENOMEM.
diff --git a/kernel/module.c b/kernel/module.c
index 5d2d28197c82..6c562828c85c 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -787,7 +787,6 @@ SYSCALL_DEFINE2(delete_module, const char __user *, name_user,
 
         /* Store the name of the last unloaded module for diagnostic purposes */
         strlcpy(last_unloaded_module, mod->name, sizeof(last_unloaded_module));
-        ddebug_remove_module(mod->name);
 
         free_module(mod);
         return 0;
@@ -1550,6 +1549,9 @@ static void free_module(struct module *mod)
         remove_sect_attrs(mod);
         mod_kobject_remove(mod);
 
+        /* Remove dynamic debug info */
+        ddebug_remove_module(mod->name);
+
         /* Arch-specific cleanup. */
         module_arch_cleanup(mod);
 
diff --git a/mm/memory.c b/mm/memory.c
index 119b7ccdf39b..bde42c6d3633 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -1394,10 +1394,20 @@ int __get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
                                 return i ? : -EFAULT;
                         }
                         if (pages) {
-                                struct page *page = vm_normal_page(gate_vma, start, *pte);
+                                struct page *page;
+
+                                page = vm_normal_page(gate_vma, start, *pte);
+                                if (!page) {
+                                        if (!(gup_flags & FOLL_DUMP) &&
+                                             is_zero_pfn(pte_pfn(*pte)))
+                                                page = pte_page(*pte);
+                                        else {
+                                                pte_unmap(pte);
+                                                return i ? : -EFAULT;
+                                        }
+                                }
                                 pages[i] = page;
-                                if (page)
-                                        get_page(page);
+                                get_page(page);
                         }
                         pte_unmap(pte);
                         if (vmas)
diff --git a/net/core/dev.c b/net/core/dev.c
index 0ea10f849be8..1f466e82ac33 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -1488,6 +1488,7 @@ static inline void net_timestamp_check(struct sk_buff *skb)
 int dev_forward_skb(struct net_device *dev, struct sk_buff *skb)
 {
         skb_orphan(skb);
+        nf_reset(skb);
 
         if (!(dev->flags & IFF_UP) ||
             (skb->len > (dev->mtu + dev->hard_header_len))) {
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index 34432b4e96bb..ce88293a34e2 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -843,7 +843,9 @@ int pskb_expand_head(struct sk_buff *skb, int nhead, int ntail,
         skb->network_header   += off;
         if (skb_mac_header_was_set(skb))
                 skb->mac_header += off;
-        skb->csum_start       += nhead;
+        /* Only adjust this if it actually is csum_start rather than csum */
+        if (skb->ip_summed == CHECKSUM_PARTIAL)
+                skb->csum_start += nhead;
         skb->cloned   = 0;
         skb->hdr_len  = 0;
         skb->nohdr    = 0;
@@ -930,7 +932,8 @@ struct sk_buff *skb_copy_expand(const struct sk_buff *skb,
         copy_skb_header(n, skb);
 
         off                  = newheadroom - oldheadroom;
-        n->csum_start       += off;
+        if (n->ip_summed == CHECKSUM_PARTIAL)
+                n->csum_start += off;
 #ifdef NET_SKBUFF_DATA_USES_OFFSET
         n->transport_header += off;
         n->network_header   += off;
diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
index e1a698df5706..784f34d11fdd 100644
--- a/net/ipv6/addrconf.c
+++ b/net/ipv6/addrconf.c
@@ -1760,7 +1760,10 @@ static struct inet6_dev *addrconf_add_dev(struct net_device *dev)
 
         idev = ipv6_find_idev(dev);
         if (!idev)
-                return NULL;
+                return ERR_PTR(-ENOBUFS);
+
+        if (idev->cnf.disable_ipv6)
+                return ERR_PTR(-EACCES);
 
         /* Add default multicast route */
         addrconf_add_mroute(dev);
@@ -2129,8 +2132,9 @@ static int inet6_addr_add(struct net *net, int ifindex, struct in6_addr *pfx,
         if (!dev)
                 return -ENODEV;
 
-        if ((idev = addrconf_add_dev(dev)) == NULL)
-                return -ENOBUFS;
+        idev = addrconf_add_dev(dev);
+        if (IS_ERR(idev))
+                return PTR_ERR(idev);
 
         scope = ipv6_addr_scope(pfx);
 
@@ -2377,7 +2381,7 @@ static void addrconf_dev_config(struct net_device *dev)
         }
 
         idev = addrconf_add_dev(dev);
-        if (idev == NULL)
+        if (IS_ERR(idev))
                 return;
 
         memset(&addr, 0, sizeof(struct in6_addr));
@@ -2468,7 +2472,7 @@ static void addrconf_ip6_tnl_config(struct net_device *dev)
         ASSERT_RTNL();
 
         idev = addrconf_add_dev(dev);
-        if (!idev) {
+        if (IS_ERR(idev)) {
                 printk(KERN_DEBUG "init ip6-ip6: add_dev failed\n");
                 return;
         }
diff --git a/net/mac80211/cfg.c b/net/mac80211/cfg.c
index c7000a6ca379..67ee34f57df7 100644
--- a/net/mac80211/cfg.c
+++ b/net/mac80211/cfg.c
@@ -632,7 +632,7 @@ static void ieee80211_send_layer2_update(struct sta_info *sta)
         skb->dev = sta->sdata->dev;
         skb->protocol = eth_type_trans(skb, sta->sdata->dev);
         memset(skb->cb, 0, sizeof(skb->cb));
-        netif_rx(skb);
+        netif_rx_ni(skb);
 }
 
 static void sta_apply_parameters(struct ieee80211_local *local,
diff --git a/net/sched/act_mirred.c b/net/sched/act_mirred.c
index c0b6863e3b87..1980b71c283f 100644
--- a/net/sched/act_mirred.c
+++ b/net/sched/act_mirred.c
@@ -33,6 +33,7 @@
 static struct tcf_common *tcf_mirred_ht[MIRRED_TAB_MASK + 1];
 static u32 mirred_idx_gen;
 static DEFINE_RWLOCK(mirred_lock);
+static LIST_HEAD(mirred_list);
 
 static struct tcf_hashinfo mirred_hash_info = {
         .htab   =       tcf_mirred_ht,
@@ -47,7 +48,9 @@ static inline int tcf_mirred_release(struct tcf_mirred *m, int bind)
                         m->tcf_bindcnt--;
                 m->tcf_refcnt--;
                 if(!m->tcf_bindcnt && m->tcf_refcnt <= 0) {
-                        dev_put(m->tcfm_dev);
+                        list_del(&m->tcfm_list);
+                        if (m->tcfm_dev)
+                                dev_put(m->tcfm_dev);
                         tcf_hash_destroy(&m->common, &mirred_hash_info);
                         return 1;
                 }
@@ -134,8 +137,10 @@ static int tcf_mirred_init(struct nlattr *nla, struct nlattr *est,
                 m->tcfm_ok_push = ok_push;
         }
         spin_unlock_bh(&m->tcf_lock);
-        if (ret == ACT_P_CREATED)
+        if (ret == ACT_P_CREATED) {
+                list_add(&m->tcfm_list, &mirred_list);
                 tcf_hash_insert(pc, &mirred_hash_info);
+        }
 
         return ret;
 }
@@ -162,9 +167,14 @@ static int tcf_mirred(struct sk_buff *skb, struct tc_action *a,
         m->tcf_tm.lastuse = jiffies;
 
         dev = m->tcfm_dev;
+        if (!dev) {
+                printk_once(KERN_NOTICE "tc mirred: target device is gone\n");
+                goto out;
+        }
+
         if (!(dev->flags & IFF_UP)) {
                 if (net_ratelimit())
-                        pr_notice("tc mirred to Houston: device %s is gone!\n",
+                        pr_notice("tc mirred to Houston: device %s is down\n",
                                   dev->name);
                 goto out;
         }
@@ -232,6 +242,28 @@ nla_put_failure:
         return -1;
 }
 
+static int mirred_device_event(struct notifier_block *unused,
+                               unsigned long event, void *ptr)
+{
+        struct net_device *dev = ptr;
+        struct tcf_mirred *m;
+
+        if (event == NETDEV_UNREGISTER)
+                list_for_each_entry(m, &mirred_list, tcfm_list) {
+                        if (m->tcfm_dev == dev) {
+                                dev_put(dev);
+                                m->tcfm_dev = NULL;
+                        }
+                }
+
+        return NOTIFY_DONE;
+}
+
+static struct notifier_block mirred_device_notifier = {
+        .notifier_call = mirred_device_event,
+};
+
+
 static struct tc_action_ops act_mirred_ops = {
         .kind           =       "mirred",
         .hinfo          =       &mirred_hash_info,
@@ -252,12 +284,17 @@ MODULE_LICENSE("GPL");
 
 static int __init mirred_init_module(void)
 {
+        int err = register_netdevice_notifier(&mirred_device_notifier);
+        if (err)
+                return err;
+
         pr_info("Mirror/redirect action on\n");
         return tcf_register_action(&act_mirred_ops);
 }
 
 static void __exit mirred_cleanup_module(void)
 {
+        unregister_netdevice_notifier(&mirred_device_notifier);
         tcf_unregister_action(&act_mirred_ops);
 }
 
diff --git a/scripts/kconfig/nconf.gui.c b/scripts/kconfig/nconf.gui.c
index 115edb437fb1..a9d9344e1365 100644
--- a/scripts/kconfig/nconf.gui.c
+++ b/scripts/kconfig/nconf.gui.c
@@ -226,7 +226,7 @@ void fill_window(WINDOW *win, const char *text)
                 int len = get_line_length(line);
                 strncpy(tmp, line, min(len, x));
                 tmp[len] = '\0';
-                mvwprintw(win, i, 0, tmp);
+                mvwprintw(win, i, 0, "%s", tmp);
         }
 }
 
diff --git a/scripts/package/Makefile b/scripts/package/Makefile
index 3a681ef25306..d2c29b63adda 100644
--- a/scripts/package/Makefile
+++ b/scripts/package/Makefile
@@ -44,7 +44,7 @@ rpm-pkg rpm: $(objtree)/kernel.spec FORCE
         fi
         $(MAKE) clean
         $(PREV) ln -sf $(srctree) $(KERNELPATH)
-        $(CONFIG_SHELL) $(srctree)/scripts/setlocalversion --scm-only > $(objtree)/.scmversion
+        $(CONFIG_SHELL) $(srctree)/scripts/setlocalversion --save-scmversion
         $(PREV) tar -cz $(RCS_TAR_IGNORE) -f $(KERNELPATH).tar.gz $(KERNELPATH)/.
         $(PREV) rm $(KERNELPATH)
         rm -f $(objtree)/.scmversion
diff --git a/scripts/setlocalversion b/scripts/setlocalversion
index d6a866ed1835..64a9cb5556cd 100755
--- a/scripts/setlocalversion
+++ b/scripts/setlocalversion
@@ -10,13 +10,13 @@
 #
 
 usage() {
-        echo "Usage: $0 [--scm-only] [srctree]" >&2
+        echo "Usage: $0 [--save-scmversion] [srctree]" >&2
         exit 1
 }
 
 scm_only=false
 srctree=.
-if test "$1" = "--scm-only"; then
+if test "$1" = "--save-scmversion"; then
         scm_only=true
         shift
 fi
@@ -30,11 +30,12 @@ fi
 
 scm_version()
 {
-        local short=false
+        local short
+        short=false
 
         cd "$srctree"
         if test -e .scmversion; then
-                cat "$_"
+                cat .scmversion
                 return
         fi
         if test "$1" = "--short"; then
@@ -131,12 +132,15 @@ collect_files()
 }
 
 if $scm_only; then
-        scm_version
+        if test ! -e .scmversion; then
+                res=$(scm_version)
+                echo "$res" >.scmversion
+        fi
         exit
 fi
 
 if test -e include/config/auto.conf; then
-        source "$_"
+        . include/config/auto.conf
 else
         echo "Error: kernelrelease not valid - run 'make prepare' to update it"
         exit 1
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index 86067ee78632..2fc53961054e 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -52,6 +52,10 @@ struct hdmi_spec {
          */
         struct hda_multi_out multiout;
         unsigned int codec_type;
+
+        /* misc flags */
+        /* PD bit indicates only the update, not the current state */
+        unsigned int old_pin_detect:1;
 };
 
 
@@ -616,6 +620,9 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
  * Unsolicited events
  */
 
+static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
+                               struct hdmi_eld *eld);
+
 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 {
         struct hdmi_spec *spec = codec->spec;
@@ -632,6 +639,12 @@ static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
         if (index < 0)
                 return;
 
+        if (spec->old_pin_detect) {
+                if (pind)
+                        hdmi_present_sense(codec, tag, &spec->sink_eld[index]);
+                pind = spec->sink_eld[index].monitor_present;
+        }
+
         spec->sink_eld[index].monitor_present = pind;
         spec->sink_eld[index].eld_valid = eldv;
 
diff --git a/sound/pci/hda/patch_nvhdmi.c b/sound/pci/hda/patch_nvhdmi.c
index 3c10c0b149f4..b0652acee9b2 100644
--- a/sound/pci/hda/patch_nvhdmi.c
+++ b/sound/pci/hda/patch_nvhdmi.c
@@ -478,6 +478,7 @@ static int patch_nvhdmi_8ch_89(struct hda_codec *codec)
 
         codec->spec = spec;
         spec->codec_type = HDA_CODEC_NVIDIA_MCP89;
+        spec->old_pin_detect = 1;
 
         if (hdmi_parse_codec(codec) < 0) {
                 codec->spec = NULL;
@@ -508,6 +509,7 @@ static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
         spec->multiout.max_channels = 8;
         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
         spec->codec_type = HDA_CODEC_NVIDIA_MCP7X;
+        spec->old_pin_detect = 1;
 
         codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
 
@@ -528,6 +530,7 @@ static int patch_nvhdmi_2ch(struct hda_codec *codec)
         spec->multiout.max_channels = 2;
         spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
         spec->codec_type = HDA_CODEC_NVIDIA_MCP7X;
+        spec->old_pin_detect = 1;
 
         codec->patch_ops = nvhdmi_patch_ops_2ch;
 
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index ff614dd824c1..596ea2f12cf6 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -1267,11 +1267,11 @@ static int alc_auto_parse_customize_define(struct hda_codec *codec)
         unsigned nid = 0;
         struct alc_spec *spec = codec->spec;
 
+        spec->cdefine.enable_pcbeep = 1; /* assume always enabled */
+
         ass = codec->subsystem_id & 0xffff;
-        if (ass != codec->bus->pci->subsystem_device && (ass & 1)) {
-                spec->cdefine.enable_pcbeep = 1; /* assume always enabled */
+        if (ass != codec->bus->pci->subsystem_device && (ass & 1))
                 goto do_sku;
-        }
 
         nid = 0x1d;
         if (codec->vendor_id == 0x10ec0260)
@@ -5180,8 +5180,24 @@ static void fillup_priv_adc_nids(struct hda_codec *codec, hda_nid_t *nids,
 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 #define set_beep_amp(spec, nid, idx, dir) \
         ((spec)->beep_amp = HDA_COMPOSE_AMP_VAL(nid, 3, idx, dir))
+
+static struct snd_pci_quirk beep_white_list[] = {
+        SND_PCI_QUIRK(0x1043, 0x829f, "ASUS", 1),
+        {}
+};
+
+static inline int has_cdefine_beep(struct hda_codec *codec)
+{
+        struct alc_spec *spec = codec->spec;
+        const struct snd_pci_quirk *q;
+        q = snd_pci_quirk_lookup(codec->bus->pci, beep_white_list);
+        if (q)
+                return q->value;
+        return spec->cdefine.enable_pcbeep;
+}
 #else
 #define set_beep_amp(spec, nid, idx, dir) /* NOP */
+#define has_cdefine_beep(codec)         0
 #endif
 
 /*
@@ -10566,10 +10582,12 @@ static int patch_alc882(struct hda_codec *codec)
                 }
         }
 
-        err = snd_hda_attach_beep_device(codec, 0x1);
-        if (err < 0) {
-                alc_free(codec);
-                return err;
+        if (has_cdefine_beep(codec)) {
+                err = snd_hda_attach_beep_device(codec, 0x1);
+                if (err < 0) {
+                        alc_free(codec);
+                        return err;
+                }
         }
 
         if (board_config != ALC882_AUTO)
@@ -10619,7 +10637,7 @@ static int patch_alc882(struct hda_codec *codec)
 
         set_capture_mixer(codec);
 
-        if (spec->cdefine.enable_pcbeep)
+        if (has_cdefine_beep(codec))
                 set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
 
         if (board_config == ALC882_AUTO)
@@ -12435,7 +12453,7 @@ static int patch_alc262(struct hda_codec *codec)
                 }
         }
 
-        if (!spec->no_analog) {
+        if (!spec->no_analog && has_cdefine_beep(codec)) {
                 err = snd_hda_attach_beep_device(codec, 0x1);
                 if (err < 0) {
                         alc_free(codec);
@@ -12486,7 +12504,7 @@ static int patch_alc262(struct hda_codec *codec)
         }
         if (!spec->cap_mixer && !spec->no_analog)
                 set_capture_mixer(codec);
-        if (!spec->no_analog && spec->cdefine.enable_pcbeep)
+        if (!spec->no_analog && has_cdefine_beep(codec))
                 set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
 
         spec->vmaster_nid = 0x0c;
@@ -14458,10 +14476,12 @@ static int patch_alc269(struct hda_codec *codec)
                 }
         }
 
-        err = snd_hda_attach_beep_device(codec, 0x1);
-        if (err < 0) {
-                alc_free(codec);
-                return err;
+        if (has_cdefine_beep(codec)) {
+                err = snd_hda_attach_beep_device(codec, 0x1);
+                if (err < 0) {
+                        alc_free(codec);
+                        return err;
+                }
         }
 
         if (board_config != ALC269_AUTO)
@@ -14494,7 +14514,7 @@ static int patch_alc269(struct hda_codec *codec)
 
         if (!spec->cap_mixer)
                 set_capture_mixer(codec);
-        if (spec->cdefine.enable_pcbeep)
+        if (has_cdefine_beep(codec))
                 set_beep_amp(spec, 0x0b, 0x04, HDA_INPUT);
 
         if (board_config == ALC269_AUTO)
@@ -18691,10 +18711,12 @@ static int patch_alc662(struct hda_codec *codec)
                 }
         }
 
-        err = snd_hda_attach_beep_device(codec, 0x1);
-        if (err < 0) {
-                alc_free(codec);
-                return err;
+        if (has_cdefine_beep(codec)) {
+                err = snd_hda_attach_beep_device(codec, 0x1);
+                if (err < 0) {
+                        alc_free(codec);
+                        return err;
+                }
         }
 
         if (board_config != ALC662_AUTO)
@@ -18716,7 +18738,7 @@ static int patch_alc662(struct hda_codec *codec)
         if (!spec->cap_mixer)
                 set_capture_mixer(codec);
 
-        if (spec->cdefine.enable_pcbeep) {
+        if (has_cdefine_beep(codec)) {
                 switch (codec->vendor_id) {
                 case 0x10ec0662:
                         set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
diff --git a/sound/soc/au1x/psc-i2s.c b/sound/soc/au1x/psc-i2s.c
index 495be6e71931..24454c98d0ee 100644
--- a/sound/soc/au1x/psc-i2s.c
+++ b/sound/soc/au1x/psc-i2s.c
@@ -300,7 +300,7 @@ struct snd_soc_dai au1xpsc_i2s_dai = {
 };
 EXPORT_SYMBOL(au1xpsc_i2s_dai);
 
-static int __init au1xpsc_i2s_drvprobe(struct platform_device *pdev)
+static int __devinit au1xpsc_i2s_drvprobe(struct platform_device *pdev)
 {
         struct resource *r;
         unsigned long sel;
diff --git a/tools/perf/Makefile b/tools/perf/Makefile
index 3d8f31ed771d..d75c28a825f5 100644
--- a/tools/perf/Makefile
+++ b/tools/perf/Makefile
@@ -600,30 +600,32 @@ endif
 
 ifdef NO_DEMANGLE
         BASIC_CFLAGS += -DNO_DEMANGLE
-else ifdef HAVE_CPLUS_DEMANGLE
-        EXTLIBS += -liberty
-        BASIC_CFLAGS += -DHAVE_CPLUS_DEMANGLE
 else
-        has_bfd := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd "$(QUIET_STDERR)" && echo y")
-
-        ifeq ($(has_bfd),y)
-                EXTLIBS += -lbfd
+        ifdef HAVE_CPLUS_DEMANGLE
+                EXTLIBS += -liberty
+                BASIC_CFLAGS += -DHAVE_CPLUS_DEMANGLE
         else
-                has_bfd_iberty := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd -liberty "$(QUIET_STDERR)" && echo y")
-                ifeq ($(has_bfd_iberty),y)
-                        EXTLIBS += -lbfd -liberty
+                has_bfd := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd "$(QUIET_STDERR)" && echo y")
+
+                ifeq ($(has_bfd),y)
+                        EXTLIBS += -lbfd
                 else
-                        has_bfd_iberty_z := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd -liberty -lz "$(QUIET_STDERR)" && echo y")
-                        ifeq ($(has_bfd_iberty_z),y)
-                                EXTLIBS += -lbfd -liberty -lz
+                        has_bfd_iberty := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd -liberty "$(QUIET_STDERR)" && echo y")
+                        ifeq ($(has_bfd_iberty),y)
+                                EXTLIBS += -lbfd -liberty
                         else
-                                has_cplus_demangle := $(shell sh -c "(echo 'extern char *cplus_demangle(const char *, int);'; echo 'int main(void) { cplus_demangle(0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -liberty "$(QUIET_STDERR)" && echo y")
-                                ifeq ($(has_cplus_demangle),y)
-                                        EXTLIBS += -liberty
-                                        BASIC_CFLAGS += -DHAVE_CPLUS_DEMANGLE
+                                has_bfd_iberty_z := $(shell sh -c "(echo '\#include <bfd.h>'; echo 'int main(void) { bfd_demangle(0, 0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -lbfd -liberty -lz "$(QUIET_STDERR)" && echo y")
+                                ifeq ($(has_bfd_iberty_z),y)
+                                        EXTLIBS += -lbfd -liberty -lz
                                 else
-                                        msg := $(warning No bfd.h/libbfd found, install binutils-dev[el]/zlib-static to gain symbol demangling)
-                                        BASIC_CFLAGS += -DNO_DEMANGLE
+                                        has_cplus_demangle := $(shell sh -c "(echo 'extern char *cplus_demangle(const char *, int);'; echo 'int main(void) { cplus_demangle(0, 0); return 0; }') | $(CC) -x c - $(ALL_CFLAGS) -o $(BITBUCKET) $(ALL_LDFLAGS) $(EXTLIBS) -liberty "$(QUIET_STDERR)" && echo y")
+                                        ifeq ($(has_cplus_demangle),y)
+                                                EXTLIBS += -liberty
+                                                BASIC_CFLAGS += -DHAVE_CPLUS_DEMANGLE
+                                        else
+                                                msg := $(warning No bfd.h/libbfd found, install binutils-dev[el]/zlib-static to gain symbol demangling)
+                                                BASIC_CFLAGS += -DNO_DEMANGLE
+                                        endif
                                 endif
                         endif
                 endif
diff --git a/tools/perf/util/hist.c b/tools/perf/util/hist.c
index 07f89b66b318..784ee0bdda77 100644
--- a/tools/perf/util/hist.c
+++ b/tools/perf/util/hist.c
@@ -631,9 +631,14 @@ int hist_entry__fprintf(struct hist_entry *self, struct hists *pair_hists,
                         u64 session_total)
 {
         char bf[512];
-        hist_entry__snprintf(self, bf, sizeof(bf), pair_hists,
-                             show_displacement, displacement,
-                             true, session_total);
+        int ret;
+
+        ret = hist_entry__snprintf(self, bf, sizeof(bf), pair_hists,
+                                   show_displacement, displacement,
+                                   true, session_total);
+        if (!ret)
+                return 0;
+
         return fprintf(fp, "%s\n", bf);
 }
 
@@ -762,6 +767,7 @@ size_t hists__fprintf(struct hists *self, struct hists *pair,
 print_entries:
         for (nd = rb_first(&self->entries); nd; nd = rb_next(nd)) {
                 struct hist_entry *h = rb_entry(nd, struct hist_entry, rb_node);
+                int cnt;
 
                 if (show_displacement) {
                         if (h->pair != NULL)
@@ -771,8 +777,13 @@ print_entries:
                                 displacement = 0;
                         ++position;
                 }
-                ret += hist_entry__fprintf(h, pair, show_displacement,
-                                           displacement, fp, self->stats.total_period);
+                cnt = hist_entry__fprintf(h, pair, show_displacement,
+                                          displacement, fp, self->stats.total_period);
+                /* Ignore those that didn't match the parent filter */
+                if (!cnt)
+                        continue;
+
+                ret += cnt;
 
                 if (symbol_conf.use_callchain)
                         ret += hist_entry__fprintf_callchain(h, fp, self->stats.total_period);
@@ -965,13 +976,17 @@ static int hist_entry__parse_objdump_line(struct hist_entry *self, FILE *file,
                  * Parse hexa addresses followed by ':'
                  */
                 line_ip = strtoull(tmp, &tmp2, 16);
-                if (*tmp2 != ':' || tmp == tmp2)
+                if (*tmp2 != ':' || tmp == tmp2 || tmp2[1] == '\0')
                         line_ip = -1;
         }
 
         if (line_ip != -1) {
-                u64 start = map__rip_2objdump(self->ms.map, sym->start);
+                u64 start = map__rip_2objdump(self->ms.map, sym->start),
+                    end = map__rip_2objdump(self->ms.map, sym->end);
+
                 offset = line_ip - start;
+                if (offset < 0 || (u64)line_ip > end)
+                        offset = -1;
         }
 
         objdump_line = objdump_line__new(offset, line);
diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c
index b63e5713849f..5b276833e2bf 100644
--- a/tools/perf/util/symbol.c
+++ b/tools/perf/util/symbol.c
@@ -1443,6 +1443,7 @@ static int map_groups__set_modules_path_dir(struct map_groups *self,
 {
         struct dirent *dent;
         DIR *dir = opendir(dir_name);
+        int ret = 0;
 
         if (!dir) {
                 pr_debug("%s: cannot open %s dir\n", __func__, dir_name);
@@ -1465,8 +1466,9 @@ static int map_groups__set_modules_path_dir(struct map_groups *self,
 
                         snprintf(path, sizeof(path), "%s/%s",
                                  dir_name, dent->d_name);
-                        if (map_groups__set_modules_path_dir(self, path) < 0)
-                                goto failure;
+                        ret = map_groups__set_modules_path_dir(self, path);
+                        if (ret < 0)
+                                goto out;
                 } else {
                         char *dot = strrchr(dent->d_name, '.'),
                              dso_name[PATH_MAX];
@@ -1487,17 +1489,18 @@ static int map_groups__set_modules_path_dir(struct map_groups *self,
                                  dir_name, dent->d_name);
 
                         long_name = strdup(path);
-                        if (long_name == NULL)
-                                goto failure;
+                        if (long_name == NULL) {
+                                ret = -1;
+                                goto out;
+                        }
                         dso__set_long_name(map->dso, long_name);
                         dso__kernel_module_get_build_id(map->dso, "");
                 }
         }
 
-        return 0;
-failure:
+out:
         closedir(dir);
-        return -1;
+        return ret;
 }
 
 static char *get_kernel_version(const char *root_dir)