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-rw-r--r--drivers/hwmon/lis3lv02d.c19
-rw-r--r--drivers/hwmon/lis3lv02d.h1
2 files changed, 12 insertions, 8 deletions
diff --git a/drivers/hwmon/lis3lv02d.c b/drivers/hwmon/lis3lv02d.c
index 1095dff9b200..7448411f51ea 100644
--- a/drivers/hwmon/lis3lv02d.c
+++ b/drivers/hwmon/lis3lv02d.c
@@ -307,19 +307,22 @@ void lis3lv02d_poweron(struct lis3lv02d *lis3)
307 307
308 lis3->init(lis3); 308 lis3->init(lis3);
309 309
310 /* LIS3 power on delay is quite long */
311 msleep(lis3->pwron_delay / lis3lv02d_get_odr());
312
313 /* 310 /*
314 * Common configuration 311 * Common configuration
315 * BDU: (12 bits sensors only) LSB and MSB values are not updated until 312 * BDU: (12 bits sensors only) LSB and MSB values are not updated until
316 * both have been read. So the value read will always be correct. 313 * both have been read. So the value read will always be correct.
314 * Set BOOT bit to refresh factory tuning values.
317 */ 315 */
318 if (lis3->whoami == WAI_12B) { 316 lis3->read(lis3, CTRL_REG2, &reg);
319 lis3->read(lis3, CTRL_REG2, &reg); 317 if (lis3->whoami == WAI_12B)
320 reg |= CTRL2_BDU; 318 reg |= CTRL2_BDU | CTRL2_BOOT;
321 lis3->write(lis3, CTRL_REG2, reg); 319 else
322 } 320 reg |= CTRL2_BOOT_8B;
321 lis3->write(lis3, CTRL_REG2, reg);
322
323 /* LIS3 power on delay is quite long */
324 msleep(lis3->pwron_delay / lis3lv02d_get_odr());
325
323 if (lis3->reg_ctrl) 326 if (lis3->reg_ctrl)
324 lis3_context_restore(lis3); 327 lis3_context_restore(lis3);
325} 328}
diff --git a/drivers/hwmon/lis3lv02d.h b/drivers/hwmon/lis3lv02d.h
index e54a1672ae64..77ebb15ea0b3 100644
--- a/drivers/hwmon/lis3lv02d.h
+++ b/drivers/hwmon/lis3lv02d.h
@@ -150,6 +150,7 @@ enum lis3lv02d_ctrl4_3dc {
150enum lis302d_ctrl2 { 150enum lis302d_ctrl2 {
151 HP_FF_WU2 = 0x08, 151 HP_FF_WU2 = 0x08,
152 HP_FF_WU1 = 0x04, 152 HP_FF_WU1 = 0x04,
153 CTRL2_BOOT_8B = 0x40,
153}; 154};
154 155
155enum lis3lv02d_ctrl3 { 156enum lis3lv02d_ctrl3 {