2 files changed, 64 insertions, 40 deletions
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index c475be75267e..a8f931a58f80 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -66,8 +66,18 @@
 #define OMAP2_L3_IO_OFFSET      0x90000000
 #define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
-#define OMAP2_L4_IO_OFFSET      0x90000000
+#define OMAP4_L3_IO_OFFSET      0xb4000000
+#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
+#define OMAP4_GPMC_IO_OFFSET            0xa9000000
+#define OMAP4_GPMC_IO_ADDRESS(pa)       IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
+#define OMAP2_L4_IO_OFFSET      0xb2000000
 #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
+#define OMAP2_EMU_IO_OFFSET             0xaa800000      /* Emulation */
+#define OMAP2_EMU_IO_ADDRESS(pa)        IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
 /*
 * ----------------------------------------------------------------------------
 * Omap1 specific IO mapping
@@ -85,24 +95,27 @@
 */
 /* We map both L3 and L4 on OMAP2 */
-#define L3_24XX_PHYS    L3_24XX_BASE    /* 0x68000000 */
+#define L3_24XX_PHYS    L3_24XX_BASE    /* 0x68000000 --> 0xf8000000*/
-#define L3_24XX_VIRT    0xf8000000
+#define L3_24XX_VIRT    (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
 #define L3_24XX_SIZE    SZ_1M           /* 44kB of 128MB used, want 1MB sect */
-#define L4_24XX_PHYS    L4_24XX_BASE    /* 0x48000000 */
+#define L4_24XX_PHYS    L4_24XX_BASE    /* 0x48000000 --> 0xfa000000 */
-#define L4_24XX_VIRT    0xd8000000
+#define L4_24XX_VIRT    (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_24XX_SIZE    SZ_1M           /* 1MB of 128MB used, want 1MB sect */
-#define L4_WK_243X_PHYS         L4_WK_243X_BASE         /* 0x49000000 */
+#define L4_WK_243X_PHYS         L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
-#define L4_WK_243X_VIRT         0xd9000000
+#define L4_WK_243X_VIRT         (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_WK_243X_SIZE         SZ_1M
-#define OMAP243X_GPMC_PHYS      OMAP243X_GPMC_BASE      /* 0x49000000 */
+#define OMAP243X_GPMC_PHYS      OMAP243X_GPMC_BASE
-#define OMAP243X_GPMC_VIRT      0xFE000000
+#define OMAP243X_GPMC_VIRT      (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
+                                                /* 0x6e000000 --> 0xfe000000 */
 #define OMAP243X_GPMC_SIZE      SZ_1M
 #define OMAP243X_SDRC_PHYS      OMAP243X_SDRC_BASE
-#define OMAP243X_SDRC_VIRT      0xFD000000
+                                                /* 0x6D000000 --> 0xfd000000 */
+#define OMAP243X_SDRC_VIRT      (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP243X_SDRC_SIZE      SZ_1M
 #define OMAP243X_SMS_PHYS       OMAP243X_SMS_BASE
-#define OMAP243X_SMS_VIRT       0xFC000000
+                                                /* 0x6c000000 --> 0xfc000000 */
+#define OMAP243X_SMS_VIRT       (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP243X_SMS_SIZE       SZ_1M
 /* DSP */
@@ -123,12 +136,12 @@
 */
 /* We map both L3 and L4 on OMAP3 */
-#define L3_34XX_PHYS            L3_34XX_BASE    /* 0x68000000 */
+#define L3_34XX_PHYS            L3_34XX_BASE    /* 0x68000000 --> 0xf8000000 */
-#define L3_34XX_VIRT            0xf8000000
+#define L3_34XX_VIRT            (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
 #define L3_34XX_SIZE            SZ_1M   /* 44kB of 128MB used, want 1MB sect */
-#define L4_34XX_PHYS            L4_34XX_BASE    /* 0x48000000 */
+#define L4_34XX_PHYS            L4_34XX_BASE    /* 0x48000000 --> 0xfa000000 */
-#define L4_34XX_VIRT            0xd8000000
+#define L4_34XX_VIRT            (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_34XX_SIZE            SZ_4M   /* 1MB of 128MB used, want 1MB sect */
 /*
@@ -136,28 +149,33 @@
 * VPOM3430 was not working for Int controller
 */
-#define L4_WK_34XX_PHYS         L4_WK_34XX_BASE /* 0x48300000 */
+#define L4_WK_34XX_PHYS         L4_WK_34XX_BASE /* 0x48300000 --> 0xfa300000 */
-#define L4_WK_34XX_VIRT         0xd8300000
+#define L4_WK_34XX_VIRT         (L4_WK_34XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_WK_34XX_SIZE         SZ_1M
-#define L4_PER_34XX_PHYS        L4_PER_34XX_BASE /* 0x49000000 */
+#define L4_PER_34XX_PHYS        L4_PER_34XX_BASE
-#define L4_PER_34XX_VIRT        0xd9000000
+                                                /* 0x49000000 --> 0xfb000000 */
+#define L4_PER_34XX_VIRT        (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_PER_34XX_SIZE        SZ_1M
-#define L4_EMU_34XX_PHYS        L4_EMU_34XX_BASE /* 0x54000000 */
+#define L4_EMU_34XX_PHYS        L4_EMU_34XX_BASE
-#define L4_EMU_34XX_VIRT        0xe4000000
+                                                /* 0x54000000 --> 0xfe800000 */
-#define L4_EMU_34XX_SIZE        SZ_64M
+#define L4_EMU_34XX_VIRT        (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
+#define L4_EMU_34XX_SIZE        SZ_8M
-#define OMAP34XX_GPMC_PHYS      OMAP34XX_GPMC_BASE /* 0x6E000000 */
+#define OMAP34XX_GPMC_PHYS      OMAP34XX_GPMC_BASE
-#define OMAP34XX_GPMC_VIRT      0xFE000000
+                                                /* 0x6e000000 --> 0xfe000000 */
+#define OMAP34XX_GPMC_VIRT      (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP34XX_GPMC_SIZE      SZ_1M
-#define OMAP343X_SMS_PHYS       OMAP343X_SMS_BASE /* 0x6C000000 */
+#define OMAP343X_SMS_PHYS       OMAP343X_SMS_BASE
-#define OMAP343X_SMS_VIRT       0xFC000000
+                                                /* 0x6c000000 --> 0xfc000000 */
+#define OMAP343X_SMS_VIRT       (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP343X_SMS_SIZE       SZ_1M
-#define OMAP343X_SDRC_PHYS      OMAP343X_SDRC_BASE /* 0x6D000000 */
+#define OMAP343X_SDRC_PHYS      OMAP343X_SDRC_BASE
-#define OMAP343X_SDRC_VIRT      0xFD000000
+                                                /* 0x6D000000 --> 0xfd000000 */
+#define OMAP343X_SDRC_VIRT      (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP343X_SDRC_SIZE      SZ_1M
 /* DSP */
@@ -178,29 +196,32 @@
 */
 /* We map both L3 and L4 on OMAP4 */
-#define L3_44XX_PHYS            L3_44XX_BASE
+#define L3_44XX_PHYS            L3_44XX_BASE    /* 0x44000000 --> 0xf8000000 */
-#define L3_44XX_VIRT            0xd4000000
+#define L3_44XX_VIRT            (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
 #define L3_44XX_SIZE            SZ_1M
-#define L4_44XX_PHYS            L4_44XX_BASE
+#define L4_44XX_PHYS            L4_44XX_BASE    /* 0x4a000000 --> 0xfc000000 */
-#define L4_44XX_VIRT            0xda000000
+#define L4_44XX_VIRT            (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_44XX_SIZE            SZ_4M
-#define L4_WK_44XX_PHYS         L4_WK_44XX_BASE
+#define L4_WK_44XX_PHYS         L4_WK_44XX_BASE /* 0x4a300000 --> 0xfc300000 */
-#define L4_WK_44XX_VIRT         0xda300000
+#define L4_WK_44XX_VIRT         (L4_WK_44XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_WK_44XX_SIZE         SZ_1M
 #define L4_PER_44XX_PHYS        L4_PER_44XX_BASE
-#define L4_PER_44XX_VIRT        0xd8000000
+                                                /* 0x48000000 --> 0xfa000000 */
+#define L4_PER_44XX_VIRT        (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_PER_44XX_SIZE        SZ_4M
 #define L4_EMU_44XX_PHYS        L4_EMU_44XX_BASE
-#define L4_EMU_44XX_VIRT        0xe4000000
+                                                /* 0x54000000 --> 0xfe800000 */
-#define L4_EMU_44XX_SIZE        SZ_64M
+#define L4_EMU_44XX_VIRT        (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
+#define L4_EMU_44XX_SIZE        SZ_8M
 #define OMAP44XX_GPMC_PHYS      OMAP44XX_GPMC_BASE
-#define OMAP44XX_GPMC_VIRT      0xe0000000
+                                                /* 0x50000000 --> 0xf9000000 */
+#define OMAP44XX_GPMC_VIRT      (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
 #define OMAP44XX_GPMC_SIZE      SZ_1M
diff --git a/arch/arm/plat-omap/include/mach/vmalloc.h b/arch/arm/plat-omap/include/mach/vmalloc.h
index b97dfafeebda..fc338a5db769 100644
--- a/arch/arm/plat-omap/include/mach/vmalloc.h
+++ b/arch/arm/plat-omap/include/mach/vmalloc.h
@@ -17,5 +17,8 @@
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 */
-#define VMALLOC_END       (PAGE_OFFSET + 0x18000000)
+#ifdef CONFIG_ARCH_OMAP1
+#define VMALLOC_END     (PAGE_OFFSET + 0x18000000)
+#else
+#define VMALLOC_END     (PAGE_OFFSET + 0x38000000)
+#endif

diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h index c475be75267e..a8f931a58f80 100644 --- a/arch/arm/plat-omap/include/mach/io.h +++ b/arch/arm/plat-omap/include/mach/io.h
@@ -66,8 +66,18 @@
66	#define OMAP2_L3_IO_OFFSET 0x90000000	66	#define OMAP2_L3_IO_OFFSET 0x90000000
67	#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */	67	#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
68		68
69	#define OMAP2_L4_IO_OFFSET 0x90000000	69	#define OMAP4_L3_IO_OFFSET 0xb4000000
		70	#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
		71
		72	#define OMAP4_GPMC_IO_OFFSET 0xa9000000
		73	#define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
		74
		75	#define OMAP2_L4_IO_OFFSET 0xb2000000
70	#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */	76	#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
		77
		78	#define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
		79	#define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
		80
71	/*	81	/*
72	* ----------------------------------------------------------------------------	82	* ----------------------------------------------------------------------------
73	* Omap1 specific IO mapping	83	* Omap1 specific IO mapping
@@ -85,24 +95,27 @@
85	*/	95	*/
86		96
87	/* We map both L3 and L4 on OMAP2 */	97	/* We map both L3 and L4 on OMAP2 */
88	#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */	98	#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
89	#define L3_24XX_VIRT 0xf8000000	99	#define L3_24XX_VIRT (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
90	#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */	100	#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
91	#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */	101	#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
92	#define L4_24XX_VIRT 0xd8000000	102	#define L4_24XX_VIRT (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
93	#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */	103	#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
94		104
95	#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */	105	#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
96	#define L4_WK_243X_VIRT 0xd9000000	106	#define L4_WK_243X_VIRT (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
97	#define L4_WK_243X_SIZE SZ_1M	107	#define L4_WK_243X_SIZE SZ_1M
98	#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE /* 0x49000000 */	108	#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE
99	#define OMAP243X_GPMC_VIRT 0xFE000000	109	#define OMAP243X_GPMC_VIRT (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
		110	/* 0x6e000000 --> 0xfe000000 */
100	#define OMAP243X_GPMC_SIZE SZ_1M	111	#define OMAP243X_GPMC_SIZE SZ_1M
101	#define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE	112	#define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE
102	#define OMAP243X_SDRC_VIRT 0xFD000000	113	/* 0x6D000000 --> 0xfd000000 */
		114	#define OMAP243X_SDRC_VIRT (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
103	#define OMAP243X_SDRC_SIZE SZ_1M	115	#define OMAP243X_SDRC_SIZE SZ_1M
104	#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE	116	#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE
105	#define OMAP243X_SMS_VIRT 0xFC000000	117	/* 0x6c000000 --> 0xfc000000 */
		118	#define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
106	#define OMAP243X_SMS_SIZE SZ_1M	119	#define OMAP243X_SMS_SIZE SZ_1M
107		120
108	/* DSP */	121	/* DSP */
@@ -123,12 +136,12 @@
123	*/	136	*/
124		137
125	/* We map both L3 and L4 on OMAP3 */	138	/* We map both L3 and L4 on OMAP3 */
126	#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */	139	#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */
127	#define L3_34XX_VIRT 0xf8000000	140	#define L3_34XX_VIRT (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
128	#define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */	141	#define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
129		142
130	#define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 */	143	#define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */
131	#define L4_34XX_VIRT 0xd8000000	144	#define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
132	#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */	145	#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
133		146
134	/*	147	/*
@@ -136,28 +149,33 @@
136	* VPOM3430 was not working for Int controller	149	* VPOM3430 was not working for Int controller
137	*/	150	*/
138		151
139	#define L4_WK_34XX_PHYS L4_WK_34XX_BASE /* 0x48300000 */	152	#define L4_WK_34XX_PHYS L4_WK_34XX_BASE /* 0x48300000 --> 0xfa300000 */
140	#define L4_WK_34XX_VIRT 0xd8300000	153	#define L4_WK_34XX_VIRT (L4_WK_34XX_PHYS + OMAP2_L4_IO_OFFSET)
141	#define L4_WK_34XX_SIZE SZ_1M	154	#define L4_WK_34XX_SIZE SZ_1M
142		155
143	#define L4_PER_34XX_PHYS L4_PER_34XX_BASE /* 0x49000000 */	156	#define L4_PER_34XX_PHYS L4_PER_34XX_BASE
144	#define L4_PER_34XX_VIRT 0xd9000000	157	/* 0x49000000 --> 0xfb000000 */
		158	#define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
145	#define L4_PER_34XX_SIZE SZ_1M	159	#define L4_PER_34XX_SIZE SZ_1M
146		160
147	#define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE /* 0x54000000 */	161	#define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE
148	#define L4_EMU_34XX_VIRT 0xe4000000	162	/* 0x54000000 --> 0xfe800000 */
149	#define L4_EMU_34XX_SIZE SZ_64M	163	#define L4_EMU_34XX_VIRT (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
		164	#define L4_EMU_34XX_SIZE SZ_8M
150		165
151	#define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE /* 0x6E000000 */	166	#define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE
152	#define OMAP34XX_GPMC_VIRT 0xFE000000	167	/* 0x6e000000 --> 0xfe000000 */
		168	#define OMAP34XX_GPMC_VIRT (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
153	#define OMAP34XX_GPMC_SIZE SZ_1M	169	#define OMAP34XX_GPMC_SIZE SZ_1M
154		170
155	#define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE /* 0x6C000000 */	171	#define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE
156	#define OMAP343X_SMS_VIRT 0xFC000000	172	/* 0x6c000000 --> 0xfc000000 */
		173	#define OMAP343X_SMS_VIRT (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
157	#define OMAP343X_SMS_SIZE SZ_1M	174	#define OMAP343X_SMS_SIZE SZ_1M
158		175
159	#define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE /* 0x6D000000 */	176	#define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE
160	#define OMAP343X_SDRC_VIRT 0xFD000000	177	/* 0x6D000000 --> 0xfd000000 */
		178	#define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
161	#define OMAP343X_SDRC_SIZE SZ_1M	179	#define OMAP343X_SDRC_SIZE SZ_1M
162		180
163	/* DSP */	181	/* DSP */
@@ -178,29 +196,32 @@
178	*/	196	*/
179		197
180	/* We map both L3 and L4 on OMAP4 */	198	/* We map both L3 and L4 on OMAP4 */
181	#define L3_44XX_PHYS L3_44XX_BASE	199	#define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */
182	#define L3_44XX_VIRT 0xd4000000	200	#define L3_44XX_VIRT (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
183	#define L3_44XX_SIZE SZ_1M	201	#define L3_44XX_SIZE SZ_1M
184		202
185	#define L4_44XX_PHYS L4_44XX_BASE	203	#define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */
186	#define L4_44XX_VIRT 0xda000000	204	#define L4_44XX_VIRT (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
187	#define L4_44XX_SIZE SZ_4M	205	#define L4_44XX_SIZE SZ_4M
188		206
189		207
190	#define L4_WK_44XX_PHYS L4_WK_44XX_BASE	208	#define L4_WK_44XX_PHYS L4_WK_44XX_BASE /* 0x4a300000 --> 0xfc300000 */
191	#define L4_WK_44XX_VIRT 0xda300000	209	#define L4_WK_44XX_VIRT (L4_WK_44XX_PHYS + OMAP2_L4_IO_OFFSET)
192	#define L4_WK_44XX_SIZE SZ_1M	210	#define L4_WK_44XX_SIZE SZ_1M
193		211
194	#define L4_PER_44XX_PHYS L4_PER_44XX_BASE	212	#define L4_PER_44XX_PHYS L4_PER_44XX_BASE
195	#define L4_PER_44XX_VIRT 0xd8000000	213	/* 0x48000000 --> 0xfa000000 */
		214	#define L4_PER_44XX_VIRT (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
196	#define L4_PER_44XX_SIZE SZ_4M	215	#define L4_PER_44XX_SIZE SZ_4M
197		216
198	#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE	217	#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
199	#define L4_EMU_44XX_VIRT 0xe4000000	218	/* 0x54000000 --> 0xfe800000 */
200	#define L4_EMU_44XX_SIZE SZ_64M	219	#define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
		220	#define L4_EMU_44XX_SIZE SZ_8M
201		221
202	#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE	222	#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
203	#define OMAP44XX_GPMC_VIRT 0xe0000000	223	/* 0x50000000 --> 0xf9000000 */
		224	#define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
204	#define OMAP44XX_GPMC_SIZE SZ_1M	225	#define OMAP44XX_GPMC_SIZE SZ_1M
205		226
206		227


diff --git a/arch/arm/plat-omap/include/mach/vmalloc.h b/arch/arm/plat-omap/include/mach/vmalloc.h index b97dfafeebda..fc338a5db769 100644 --- a/arch/arm/plat-omap/include/mach/vmalloc.h +++ b/arch/arm/plat-omap/include/mach/vmalloc.h
@@ -17,5 +17,8 @@
17	* along with this program; if not, write to the Free Software	17	* along with this program; if not, write to the Free Software
18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19	*/	19	*/
20	#define VMALLOC_END (PAGE_OFFSET + 0x18000000)	20	#ifdef CONFIG_ARCH_OMAP1
21		21	#define VMALLOC_END (PAGE_OFFSET + 0x18000000)
		22	#else
		23	#define VMALLOC_END (PAGE_OFFSET + 0x38000000)
		24	#endif