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-rw-r--r--Documentation/cputopology.txt6
-rw-r--r--Documentation/devices.txt6
-rw-r--r--Documentation/kernel-parameters.txt7
-rw-r--r--Documentation/scsi/osd.txt198
-rw-r--r--Documentation/x86/boot.txt18
-rw-r--r--MAINTAINERS10
-rw-r--r--Makefile3
-rw-r--r--arch/alpha/kernel/irq.c2
-rw-r--r--arch/alpha/mm/init.c20
-rw-r--r--arch/arm/kernel/irq.c18
-rw-r--r--arch/arm/kernel/vmlinux.lds.S2
-rw-r--r--arch/arm/oprofile/op_model_mpcore.c2
-rw-r--r--arch/avr32/Kconfig2
-rw-r--r--arch/blackfin/configs/BF518F-EZBRD_defconfig42
-rw-r--r--arch/blackfin/configs/BF526-EZBRD_defconfig140
-rw-r--r--arch/blackfin/configs/BF527-EZKIT_defconfig150
-rw-r--r--arch/blackfin/configs/BF533-EZKIT_defconfig54
-rw-r--r--arch/blackfin/configs/BF533-STAMP_defconfig100
-rw-r--r--arch/blackfin/configs/BF537-STAMP_defconfig97
-rw-r--r--arch/blackfin/configs/BF538-EZKIT_defconfig101
-rw-r--r--arch/blackfin/configs/BF548-EZKIT_defconfig163
-rw-r--r--arch/blackfin/configs/BF561-EZKIT_defconfig54
-rw-r--r--arch/blackfin/configs/BlackStamp_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF527_defconfig6
-rw-r--r--arch/blackfin/configs/CM-BF533_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF537E_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF537U_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF548_defconfig4
-rw-r--r--arch/blackfin/configs/CM-BF561_defconfig4
-rw-r--r--arch/blackfin/configs/H8606_defconfig4
-rw-r--r--arch/blackfin/configs/IP0X_defconfig4
-rw-r--r--arch/blackfin/configs/PNAV-10_defconfig39
-rw-r--r--arch/blackfin/configs/SRV1_defconfig4
-rw-r--r--arch/blackfin/configs/TCM-BF537_defconfig6
-rw-r--r--arch/blackfin/include/asm/bfin5xx_spi.h2
-rw-r--r--arch/blackfin/include/asm/bfin_sport.h9
-rw-r--r--arch/blackfin/include/asm/gpio.h7
-rw-r--r--arch/blackfin/include/asm/gptimers.h6
-rw-r--r--arch/blackfin/include/asm/percpu.h10
-rw-r--r--arch/blackfin/kernel/bfin_gpio.c78
-rw-r--r--arch/blackfin/kernel/irqchip.c5
-rw-r--r--arch/blackfin/kernel/vmlinux.lds.S4
-rw-r--r--arch/blackfin/mach-bf518/include/mach/blackfin.h2
-rw-r--r--arch/blackfin/mach-bf518/include/mach/cdefBF514.h67
-rw-r--r--arch/blackfin/mach-bf518/include/mach/cdefBF516.h67
-rw-r--r--arch/blackfin/mach-bf518/include/mach/defBF514.h135
-rw-r--r--arch/blackfin/mach-bf518/include/mach/defBF516.h135
-rw-r--r--arch/blackfin/mach-bf527/include/mach/blackfin.h2
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c235
-rw-r--r--arch/blackfin/mach-bf548/include/mach/blackfin.h2
-rw-r--r--arch/blackfin/mach-common/pm.c2
-rw-r--r--arch/ia64/include/asm/percpu.h4
-rw-r--r--arch/ia64/include/asm/topology.h2
-rw-r--r--arch/ia64/include/asm/uv/uv.h13
-rw-r--r--arch/ia64/kernel/acpi.c4
-rw-r--r--arch/ia64/kernel/iosapic.c2
-rw-r--r--arch/ia64/kernel/irq.c4
-rw-r--r--arch/ia64/kernel/irq_ia64.c31
-rw-r--r--arch/ia64/kernel/msi_ia64.c4
-rw-r--r--arch/ia64/kernel/vmlinux.lds.S11
-rw-r--r--arch/ia64/sn/kernel/msi_sn.c2
-rw-r--r--arch/mips/include/asm/irq.h2
-rw-r--r--arch/mips/kernel/irq-gic.c2
-rw-r--r--arch/mips/kernel/smtc.c6
-rw-r--r--arch/mips/mti-malta/malta-smtc.c5
-rw-r--r--arch/mips/sgi-ip22/ip22-int.c2
-rw-r--r--arch/mips/sgi-ip22/ip22-time.c2
-rw-r--r--arch/mips/sibyte/bcm1480/smp.c3
-rw-r--r--arch/mips/sibyte/sb1250/smp.c3
-rw-r--r--arch/mn10300/kernel/mn10300-watchdog.c3
-rw-r--r--arch/parisc/kernel/irq.c2
-rw-r--r--arch/powerpc/kernel/irq.c2
-rw-r--r--arch/powerpc/kernel/vmlinux.lds.S8
-rw-r--r--arch/powerpc/platforms/pseries/xics.c5
-rw-r--r--arch/powerpc/sysdev/mpic.c3
-rw-r--r--arch/sparc/kernel/irq_64.c5
-rw-r--r--arch/sparc/kernel/time_64.c6
-rw-r--r--arch/x86/Kconfig657
-rw-r--r--arch/x86/Kconfig.cpu80
-rw-r--r--arch/x86/Kconfig.debug50
-rw-r--r--arch/x86/Makefile43
-rw-r--r--arch/x86/boot/Makefile1
-rw-r--r--arch/x86/boot/a20.c79
-rw-r--r--arch/x86/boot/boot.h3
-rw-r--r--arch/x86/boot/compressed/Makefile21
-rw-r--r--arch/x86/boot/compressed/head_32.S8
-rw-r--r--arch/x86/boot/compressed/head_64.S10
-rw-r--r--arch/x86/boot/compressed/misc.c118
-rw-r--r--arch/x86/boot/copy.S40
-rw-r--r--arch/x86/boot/header.S2
-rw-r--r--arch/x86/boot/main.c5
-rw-r--r--arch/x86/boot/pmjump.S16
-rw-r--r--arch/x86/boot/voyager.c40
-rw-r--r--arch/x86/configs/i386_defconfig419
-rw-r--r--arch/x86/configs/x86_64_defconfig425
-rw-r--r--arch/x86/ia32/ia32_signal.c405
-rw-r--r--arch/x86/ia32/ia32entry.S8
-rw-r--r--arch/x86/include/asm/a.out-core.h2
-rw-r--r--arch/x86/include/asm/acpi.h3
-rw-r--r--arch/x86/include/asm/apic.h442
-rw-r--r--arch/x86/include/asm/apicnum.h12
-rw-r--r--arch/x86/include/asm/apm.h (renamed from arch/x86/include/asm/mach-default/apm.h)0
-rw-r--r--arch/x86/include/asm/arch_hooks.h26
-rw-r--r--arch/x86/include/asm/bigsmp/apic.h155
-rw-r--r--arch/x86/include/asm/bigsmp/apicdef.h13
-rw-r--r--arch/x86/include/asm/bigsmp/ipi.h22
-rw-r--r--arch/x86/include/asm/boot.h16
-rw-r--r--arch/x86/include/asm/cacheflush.h53
-rw-r--r--arch/x86/include/asm/calling.h56
-rw-r--r--arch/x86/include/asm/cpu.h17
-rw-r--r--arch/x86/include/asm/cpumask.h32
-rw-r--r--arch/x86/include/asm/current.h24
-rw-r--r--arch/x86/include/asm/do_timer.h (renamed from arch/x86/include/asm/mach-default/do_timer.h)0
-rw-r--r--arch/x86/include/asm/elf.h15
-rw-r--r--arch/x86/include/asm/entry_arch.h (renamed from arch/x86/include/asm/mach-default/entry_arch.h)25
-rw-r--r--arch/x86/include/asm/es7000/apic.h242
-rw-r--r--arch/x86/include/asm/es7000/apicdef.h13
-rw-r--r--arch/x86/include/asm/es7000/ipi.h22
-rw-r--r--arch/x86/include/asm/es7000/mpparse.h29
-rw-r--r--arch/x86/include/asm/es7000/wakecpu.h37
-rw-r--r--arch/x86/include/asm/fixmap.h139
-rw-r--r--arch/x86/include/asm/fixmap_32.h119
-rw-r--r--arch/x86/include/asm/fixmap_64.h79
-rw-r--r--arch/x86/include/asm/genapic.h6
-rw-r--r--arch/x86/include/asm/genapic_32.h148
-rw-r--r--arch/x86/include/asm/genapic_64.h66
-rw-r--r--arch/x86/include/asm/hardirq.h49
-rw-r--r--arch/x86/include/asm/hardirq_32.h30
-rw-r--r--arch/x86/include/asm/hardirq_64.h25
-rw-r--r--arch/x86/include/asm/hw_irq.h24
-rw-r--r--arch/x86/include/asm/i8259.h4
-rw-r--r--arch/x86/include/asm/io.h97
-rw-r--r--arch/x86/include/asm/io_32.h88
-rw-r--r--arch/x86/include/asm/io_64.h61
-rw-r--r--arch/x86/include/asm/io_apic.h41
-rw-r--r--arch/x86/include/asm/ipi.h75
-rw-r--r--arch/x86/include/asm/irq.h4
-rw-r--r--arch/x86/include/asm/irq_regs.h36
-rw-r--r--arch/x86/include/asm/irq_regs_32.h31
-rw-r--r--arch/x86/include/asm/irq_regs_64.h1
-rw-r--r--arch/x86/include/asm/irq_vectors.h209
-rw-r--r--arch/x86/include/asm/kexec.h27
-rw-r--r--arch/x86/include/asm/linkage.h64
-rw-r--r--arch/x86/include/asm/mach-default/mach_apic.h168
-rw-r--r--arch/x86/include/asm/mach-default/mach_apicdef.h24
-rw-r--r--arch/x86/include/asm/mach-default/mach_ipi.h64
-rw-r--r--arch/x86/include/asm/mach-default/mach_mpparse.h17
-rw-r--r--arch/x86/include/asm/mach-default/mach_mpspec.h12
-rw-r--r--arch/x86/include/asm/mach-default/mach_wakecpu.h41
-rw-r--r--arch/x86/include/asm/mach-generic/gpio.h15
-rw-r--r--arch/x86/include/asm/mach-generic/mach_apic.h35
-rw-r--r--arch/x86/include/asm/mach-generic/mach_apicdef.h11
-rw-r--r--arch/x86/include/asm/mach-generic/mach_ipi.h10
-rw-r--r--arch/x86/include/asm/mach-generic/mach_mpparse.h9
-rw-r--r--arch/x86/include/asm/mach-generic/mach_mpspec.h12
-rw-r--r--arch/x86/include/asm/mach-generic/mach_wakecpu.h12
-rw-r--r--arch/x86/include/asm/mach-rdc321x/gpio.h60
-rw-r--r--arch/x86/include/asm/mach-voyager/do_timer.h17
-rw-r--r--arch/x86/include/asm/mach-voyager/entry_arch.h26
-rw-r--r--arch/x86/include/asm/mach-voyager/setup_arch.h12
-rw-r--r--arch/x86/include/asm/mach_timer.h (renamed from arch/x86/include/asm/mach-default/mach_timer.h)0
-rw-r--r--arch/x86/include/asm/mach_traps.h (renamed from arch/x86/include/asm/mach-default/mach_traps.h)0
-rw-r--r--arch/x86/include/asm/mmu_context.h63
-rw-r--r--arch/x86/include/asm/mmu_context_32.h55
-rw-r--r--arch/x86/include/asm/mmu_context_64.h54
-rw-r--r--arch/x86/include/asm/mmzone_32.h43
-rw-r--r--arch/x86/include/asm/mpspec.h33
-rw-r--r--arch/x86/include/asm/mpspec_def.h23
-rw-r--r--arch/x86/include/asm/numa_32.h6
-rw-r--r--arch/x86/include/asm/numaq.h2
-rw-r--r--arch/x86/include/asm/numaq/apic.h142
-rw-r--r--arch/x86/include/asm/numaq/apicdef.h14
-rw-r--r--arch/x86/include/asm/numaq/ipi.h22
-rw-r--r--arch/x86/include/asm/numaq/mpparse.h6
-rw-r--r--arch/x86/include/asm/numaq/wakecpu.h45
-rw-r--r--arch/x86/include/asm/page.h152
-rw-r--r--arch/x86/include/asm/page_32.h87
-rw-r--r--arch/x86/include/asm/page_32_types.h60
-rw-r--r--arch/x86/include/asm/page_64.h101
-rw-r--r--arch/x86/include/asm/page_64_types.h89
-rw-r--r--arch/x86/include/asm/page_types.h57
-rw-r--r--arch/x86/include/asm/paravirt.h465
-rw-r--r--arch/x86/include/asm/pat.h5
-rw-r--r--arch/x86/include/asm/pci-functions.h (renamed from arch/x86/include/asm/mach-default/pci-functions.h)0
-rw-r--r--arch/x86/include/asm/pda.h137
-rw-r--r--arch/x86/include/asm/percpu.h169
-rw-r--r--arch/x86/include/asm/pgtable-2level.h2
-rw-r--r--arch/x86/include/asm/pgtable-2level_types.h (renamed from arch/x86/include/asm/pgtable-2level-defs.h)17
-rw-r--r--arch/x86/include/asm/pgtable-3level.h35
-rw-r--r--arch/x86/include/asm/pgtable-3level_types.h (renamed from arch/x86/include/asm/pgtable-3level-defs.h)20
-rw-r--r--arch/x86/include/asm/pgtable.h509
-rw-r--r--arch/x86/include/asm/pgtable_32.h88
-rw-r--r--arch/x86/include/asm/pgtable_32_types.h46
-rw-r--r--arch/x86/include/asm/pgtable_64.h113
-rw-r--r--arch/x86/include/asm/pgtable_64_types.h63
-rw-r--r--arch/x86/include/asm/pgtable_types.h328
-rw-r--r--arch/x86/include/asm/processor.h45
-rw-r--r--arch/x86/include/asm/proto.h4
-rw-r--r--arch/x86/include/asm/ptrace.h4
-rw-r--r--arch/x86/include/asm/rdc321x_defs.h (renamed from arch/x86/include/asm/mach-rdc321x/rdc321x_defs.h)0
-rw-r--r--arch/x86/include/asm/segment.h9
-rw-r--r--arch/x86/include/asm/setup.h19
-rw-r--r--arch/x86/include/asm/setup_arch.h (renamed from arch/x86/include/asm/mach-default/setup_arch.h)0
-rw-r--r--arch/x86/include/asm/smp.h69
-rw-r--r--arch/x86/include/asm/smpboot_hooks.h (renamed from arch/x86/include/asm/mach-default/smpboot_hooks.h)6
-rw-r--r--arch/x86/include/asm/spinlock.h69
-rw-r--r--arch/x86/include/asm/stackprotector.h124
-rw-r--r--arch/x86/include/asm/summit/apic.h202
-rw-r--r--arch/x86/include/asm/summit/apicdef.h13
-rw-r--r--arch/x86/include/asm/summit/ipi.h26
-rw-r--r--arch/x86/include/asm/summit/mpparse.h109
-rw-r--r--arch/x86/include/asm/syscalls.h22
-rw-r--r--arch/x86/include/asm/system.h70
-rw-r--r--arch/x86/include/asm/thread_info.h21
-rw-r--r--arch/x86/include/asm/timer.h4
-rw-r--r--arch/x86/include/asm/tlbflush.h17
-rw-r--r--arch/x86/include/asm/topology.h31
-rw-r--r--arch/x86/include/asm/trampoline.h1
-rw-r--r--arch/x86/include/asm/traps.h2
-rw-r--r--arch/x86/include/asm/uaccess.h138
-rw-r--r--arch/x86/include/asm/uaccess_64.h10
-rw-r--r--arch/x86/include/asm/uv/uv.h33
-rw-r--r--arch/x86/include/asm/uv/uv_bau.h1
-rw-r--r--arch/x86/include/asm/vic.h61
-rw-r--r--arch/x86/include/asm/voyager.h529
-rw-r--r--arch/x86/include/asm/xen/events.h6
-rw-r--r--arch/x86/include/asm/xen/hypervisor.h28
-rw-r--r--arch/x86/include/asm/xen/page.h1
-rw-r--r--arch/x86/kernel/Makefile42
-rw-r--r--arch/x86/kernel/acpi/boot.c169
-rw-r--r--arch/x86/kernel/acpi/realmode/wakeup.S4
-rw-r--r--arch/x86/kernel/acpi/sleep.c1
-rw-r--r--arch/x86/kernel/acpi/wakeup_32.S2
-rw-r--r--arch/x86/kernel/acpi/wakeup_64.S4
-rw-r--r--arch/x86/kernel/alternative.c6
-rw-r--r--arch/x86/kernel/apic/Makefile19
-rw-r--r--arch/x86/kernel/apic/apic.c (renamed from arch/x86/kernel/apic.c)299
-rw-r--r--arch/x86/kernel/apic/apic_flat_64.c (renamed from arch/x86/kernel/genapic_flat_64.c)192
-rw-r--r--arch/x86/kernel/apic/bigsmp_32.c267
-rw-r--r--arch/x86/kernel/apic/es7000_32.c780
-rw-r--r--arch/x86/kernel/apic/io_apic.c (renamed from arch/x86/kernel/io_apic.c)443
-rw-r--r--arch/x86/kernel/apic/ipi.c164
-rw-r--r--arch/x86/kernel/apic/nmi.c (renamed from arch/x86/kernel/nmi.c)12
-rw-r--r--arch/x86/kernel/apic/numaq_32.c557
-rw-r--r--arch/x86/kernel/apic/probe_32.c284
-rw-r--r--arch/x86/kernel/apic/probe_64.c (renamed from arch/x86/kernel/genapic_64.c)55
-rw-r--r--arch/x86/kernel/apic/summit_32.c579
-rw-r--r--arch/x86/kernel/apic/x2apic_cluster.c (renamed from arch/x86/kernel/genx2apic_cluster.c)153
-rw-r--r--arch/x86/kernel/apic/x2apic_phys.c (renamed from arch/x86/kernel/genx2apic_phys.c)150
-rw-r--r--arch/x86/kernel/apic/x2apic_uv_x.c (renamed from arch/x86/kernel/genx2apic_uv_x.c)161
-rw-r--r--arch/x86/kernel/apm_32.c2
-rw-r--r--arch/x86/kernel/asm-offsets_32.c1
-rw-r--r--arch/x86/kernel/asm-offsets_64.c11
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c54
-rw-r--r--arch/x86/kernel/cpu/amd.c2
-rw-r--r--arch/x86/kernel/cpu/common.c257
-rw-r--r--arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c2
-rw-r--r--arch/x86/kernel/cpu/cpufreq/e_powersaver.c6
-rw-r--r--arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c6
-rw-r--r--arch/x86/kernel/cpu/intel.c17
-rw-r--r--arch/x86/kernel/cpu/intel_cacheinfo.c63
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_amd_64.c21
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce_intel_64.c7
-rw-r--r--arch/x86/kernel/cpu/mcheck/p4.c4
-rw-r--r--arch/x86/kernel/cpu/perfctr-watchdog.c2
-rw-r--r--arch/x86/kernel/cpu/proc.c20
-rw-r--r--arch/x86/kernel/crash.c4
-rw-r--r--arch/x86/kernel/dumpstack.c2
-rw-r--r--arch/x86/kernel/dumpstack_64.c35
-rw-r--r--arch/x86/kernel/e820.c3
-rw-r--r--arch/x86/kernel/early_printk.c2
-rw-r--r--arch/x86/kernel/efi.c2
-rw-r--r--arch/x86/kernel/efi_64.c1
-rw-r--r--arch/x86/kernel/efi_stub_32.S3
-rw-r--r--arch/x86/kernel/efi_stub_64.S7
-rw-r--r--arch/x86/kernel/entry_32.S455
-rw-r--r--arch/x86/kernel/entry_64.S72
-rw-r--r--arch/x86/kernel/es7000_32.c378
-rw-r--r--arch/x86/kernel/head64.c23
-rw-r--r--arch/x86/kernel/head_32.S44
-rw-r--r--arch/x86/kernel/head_64.S23
-rw-r--r--arch/x86/kernel/i8259.c1
-rw-r--r--arch/x86/kernel/ioport.c14
-rw-r--r--arch/x86/kernel/ipi.c190
-rw-r--r--arch/x86/kernel/irq.c44
-rw-r--r--arch/x86/kernel/irq_32.c61
-rw-r--r--arch/x86/kernel/irq_64.c43
-rw-r--r--arch/x86/kernel/irqinit_32.c36
-rw-r--r--arch/x86/kernel/kgdb.c4
-rw-r--r--arch/x86/kernel/kvmclock.c1
-rw-r--r--arch/x86/kernel/machine_kexec_32.c2
-rw-r--r--arch/x86/kernel/machine_kexec_64.c82
-rw-r--r--arch/x86/kernel/mca_32.c5
-rw-r--r--arch/x86/kernel/microcode_intel.c10
-rw-r--r--arch/x86/kernel/module_32.c6
-rw-r--r--arch/x86/kernel/module_64.c32
-rw-r--r--arch/x86/kernel/mpparse.c189
-rw-r--r--arch/x86/kernel/msr.c2
-rw-r--r--arch/x86/kernel/numaq_32.c293
-rw-r--r--arch/x86/kernel/paravirt-spinlocks.c10
-rw-r--r--arch/x86/kernel/paravirt.c56
-rw-r--r--arch/x86/kernel/paravirt_patch_32.c12
-rw-r--r--arch/x86/kernel/paravirt_patch_64.c15
-rw-r--r--arch/x86/kernel/probe_roms_32.c2
-rw-r--r--arch/x86/kernel/process.c193
-rw-r--r--arch/x86/kernel/process_32.c241
-rw-r--r--arch/x86/kernel/process_64.c230
-rw-r--r--arch/x86/kernel/ptrace.c21
-rw-r--r--arch/x86/kernel/reboot.c5
-rw-r--r--arch/x86/kernel/relocate_kernel_32.S2
-rw-r--r--arch/x86/kernel/relocate_kernel_64.S129
-rw-r--r--arch/x86/kernel/setup.c139
-rw-r--r--arch/x86/kernel/setup_percpu.c679
-rw-r--r--arch/x86/kernel/signal.c463
-rw-r--r--arch/x86/kernel/smp.c15
-rw-r--r--arch/x86/kernel/smpboot.c147
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621 files changed, 47703 insertions, 20184 deletions
diff --git a/Documentation/cputopology.txt b/Documentation/cputopology.txt
index 45932ec21cee..b41f3e58aefa 100644
--- a/Documentation/cputopology.txt
+++ b/Documentation/cputopology.txt
@@ -18,11 +18,11 @@ For an architecture to support this feature, it must define some of
18these macros in include/asm-XXX/topology.h: 18these macros in include/asm-XXX/topology.h:
19#define topology_physical_package_id(cpu) 19#define topology_physical_package_id(cpu)
20#define topology_core_id(cpu) 20#define topology_core_id(cpu)
21#define topology_thread_siblings(cpu) 21#define topology_thread_cpumask(cpu)
22#define topology_core_siblings(cpu) 22#define topology_core_cpumask(cpu)
23 23
24The type of **_id is int. 24The type of **_id is int.
25The type of siblings is cpumask_t. 25The type of siblings is (const) struct cpumask *.
26 26
27To be consistent on all architectures, include/linux/topology.h 27To be consistent on all architectures, include/linux/topology.h
28provides default definitions for any of the above macros that are 28provides default definitions for any of the above macros that are
diff --git a/Documentation/devices.txt b/Documentation/devices.txt
index 2be08240ee80..62254d4510c6 100644
--- a/Documentation/devices.txt
+++ b/Documentation/devices.txt
@@ -3145,6 +3145,12 @@ Your cooperation is appreciated.
3145 1 = /dev/blockrom1 Second ROM card's translation layer interface 3145 1 = /dev/blockrom1 Second ROM card's translation layer interface
3146 ... 3146 ...
3147 3147
3148260 char OSD (Object-based-device) SCSI Device
3149 0 = /dev/osd0 First OSD Device
3150 1 = /dev/osd1 Second OSD Device
3151 ...
3152 255 = /dev/osd255 256th OSD Device
3153
3148 **** ADDITIONAL /dev DIRECTORY ENTRIES 3154 **** ADDITIONAL /dev DIRECTORY ENTRIES
3149 3155
3150This section details additional entries that should or may exist in 3156This section details additional entries that should or may exist in
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 6dda1cc3fbaf..d1e2fcb6298b 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1331,8 +1331,13 @@ and is between 256 and 4096 characters. It is defined in the file
1331 1331
1332 memtest= [KNL,X86] Enable memtest 1332 memtest= [KNL,X86] Enable memtest
1333 Format: <integer> 1333 Format: <integer>
1334 range: 0,4 : pattern number
1335 default : 0 <disable> 1334 default : 0 <disable>
1335 Specifies the number of memtest passes to be
1336 performed. Each pass selects another test
1337 pattern from a given set of patterns. Memtest
1338 fills the memory with this pattern, validates
1339 memory contents and reserves bad memory
1340 regions that are detected.
1336 1341
1337 meye.*= [HW] Set MotionEye Camera parameters 1342 meye.*= [HW] Set MotionEye Camera parameters
1338 See Documentation/video4linux/meye.txt. 1343 See Documentation/video4linux/meye.txt.
diff --git a/Documentation/scsi/osd.txt b/Documentation/scsi/osd.txt
new file mode 100644
index 000000000000..da162f7fd5f5
--- /dev/null
+++ b/Documentation/scsi/osd.txt
@@ -0,0 +1,198 @@
1The OSD Standard
2================
3OSD (Object-Based Storage Device) is a T10 SCSI command set that is designed
4to provide efficient operation of input/output logical units that manage the
5allocation, placement, and accessing of variable-size data-storage containers,
6called objects. Objects are intended to contain operating system and application
7constructs. Each object has associated attributes attached to it, which are
8integral part of the object and provide metadata about the object. The standard
9defines some common obligatory attributes, but user attributes can be added as
10needed.
11
12See: http://www.t10.org/ftp/t10/drafts/osd2/ for the latest draft for OSD 2
13or search the web for "OSD SCSI"
14
15OSD in the Linux Kernel
16=======================
17osd-initiator:
18 The main component of OSD in Kernel is the osd-initiator library. Its main
19user is intended to be the pNFS-over-objects layout driver, which uses objects
20as its back-end data storage. Other clients are the other osd parts listed below.
21
22osd-uld:
23 This is a SCSI ULD that registers for OSD type devices and provides a testing
24platform, both for the in-kernel initiator as well as connected targets. It
25currently has no useful user-mode API, though it could have if need be.
26
27exofs:
28 Is an OSD based Linux file system. It uses the osd-initiator and osd-uld,
29to export a usable file system for users.
30See Documentation/filesystems/exofs.txt for more details
31
32osd target:
33 There are no current plans for an OSD target implementation in kernel. For all
34needs, a user-mode target that is based on the scsi tgt target framework is
35available from Ohio Supercomputer Center (OSC) at:
36http://www.open-osd.org/bin/view/Main/OscOsdProject
37There are several other target implementations. See http://open-osd.org for more
38links.
39
40Files and Folders
41=================
42This is the complete list of files included in this work:
43include/scsi/
44 osd_initiator.h Main API for the initiator library
45 osd_types.h Common OSD types
46 osd_sec.h Security Manager API
47 osd_protocol.h Wire definitions of the OSD standard protocol
48 osd_attributes.h Wire definitions of OSD attributes
49
50drivers/scsi/osd/
51 osd_initiator.c OSD-Initiator library implementation
52 osd_uld.c The OSD scsi ULD
53 osd_ktest.{h,c} In-kernel test suite (called by osd_uld)
54 osd_debug.h Some printk macros
55 Makefile For both in-tree and out-of-tree compilation
56 Kconfig Enables inclusion of the different pieces
57 osd_test.c User-mode application to call the kernel tests
58
59The OSD-Initiator Library
60=========================
61osd_initiator is a low level implementation of an osd initiator encoder.
62But even though, it should be intuitive and easy to use. Perhaps over time an
63higher lever will form that automates some of the more common recipes.
64
65init/fini:
66- osd_dev_init() associates a scsi_device with an osd_dev structure
67 and initializes some global pools. This should be done once per scsi_device
68 (OSD LUN). The osd_dev structure is needed for calling osd_start_request().
69
70- osd_dev_fini() cleans up before a osd_dev/scsi_device destruction.
71
72OSD commands encoding, execution, and decoding of results:
73
74struct osd_request's is used to iteratively encode an OSD command and carry
75its state throughout execution. Each request goes through these stages:
76
77a. osd_start_request() allocates the request.
78
79b. Any of the osd_req_* methods is used to encode a request of the specified
80 type.
81
82c. osd_req_add_{get,set}_attr_* may be called to add get/set attributes to the
83 CDB. "List" or "Page" mode can be used exclusively. The attribute-list API
84 can be called multiple times on the same request. However, only one
85 attribute-page can be read, as mandated by the OSD standard.
86
87d. osd_finalize_request() computes offsets into the data-in and data-out buffers
88 and signs the request using the provided capability key and integrity-
89 check parameters.
90
91e. osd_execute_request() may be called to execute the request via the block
92 layer and wait for its completion. The request can be executed
93 asynchronously by calling the block layer API directly.
94
95f. After execution, osd_req_decode_sense() can be called to decode the request's
96 sense information.
97
98g. osd_req_decode_get_attr() may be called to retrieve osd_add_get_attr_list()
99 values.
100
101h. osd_end_request() must be called to deallocate the request and any resource
102 associated with it. Note that osd_end_request cleans up the request at any
103 stage and it must always be called after a successful osd_start_request().
104
105osd_request's structure:
106
107The OSD standard defines a complex structure of IO segments pointed to by
108members in the CDB. Up to 3 segments can be deployed in the IN-Buffer and up to
1094 in the OUT-Buffer. The ASCII illustration below depicts a secure-read with
110associated get+set of attributes-lists. Other combinations very on the same
111basic theme. From no-segments-used up to all-segments-used.
112
113|________OSD-CDB__________|
114| |
115|read_len (offset=0) -|---------\
116| | |
117|get_attrs_list_length | |
118|get_attrs_list_offset -|----\ |
119| | | |
120|retrieved_attrs_alloc_len| | |
121|retrieved_attrs_offset -|----|----|-\
122| | | | |
123|set_attrs_list_length | | | |
124|set_attrs_list_offset -|-\ | | |
125| | | | | |
126|in_data_integ_offset -|-|--|----|-|-\
127|out_data_integ_offset -|-|--|--\ | | |
128\_________________________/ | | | | | |
129 | | | | | |
130|_______OUT-BUFFER________| | | | | | |
131| Set attr list |</ | | | | |
132| | | | | | |
133|-------------------------| | | | | |
134| Get attr descriptors |<---/ | | | |
135| | | | | |
136|-------------------------| | | | |
137| Out-data integrity |<------/ | | |
138| | | | |
139\_________________________/ | | |
140 | | |
141|________IN-BUFFER________| | | |
142| In-Data read |<--------/ | |
143| | | |
144|-------------------------| | |
145| Get attr list |<----------/ |
146| | |
147|-------------------------| |
148| In-data integrity |<------------/
149| |
150\_________________________/
151
152A block device request can carry bidirectional payload by means of associating
153a bidi_read request with a main write-request. Each in/out request is described
154by a chain of BIOs associated with each request.
155The CDB is of a SCSI VARLEN CDB format, as described by OSD standard.
156The OSD standard also mandates alignment restrictions at start of each segment.
157
158In the code, in struct osd_request, there are two _osd_io_info structures to
159describe the IN/OUT buffers above, two BIOs for the data payload and up to five
160_osd_req_data_segment structures to hold the different segments allocation and
161information.
162
163Important: We have chosen to disregard the assumption that a BIO-chain (and
164the resulting sg-list) describes a linear memory buffer. Meaning only first and
165last scatter chain can be incomplete and all the middle chains are of PAGE_SIZE.
166For us, a scatter-gather-list, as its name implies and as used by the Networking
167layer, is to describe a vector of buffers that will be transferred to/from the
168wire. It works very well with current iSCSI transport. iSCSI is currently the
169only deployed OSD transport. In the future we anticipate SAS and FC attached OSD
170devices as well.
171
172The OSD Testing ULD
173===================
174TODO: More user-mode control on tests.
175
176Authors, Mailing list
177=====================
178Please communicate with us on any deployment of osd, whether using this code
179or not.
180
181Any problems, questions, bug reports, lonely OSD nights, please email:
182 OSD Dev List <osd-dev@open-osd.org>
183
184More up-to-date information can be found on:
185http://open-osd.org
186
187Boaz Harrosh <bharrosh@panasas.com>
188Benny Halevy <bhalevy@panasas.com>
189
190References
191==========
192Weber, R., "SCSI Object-Based Storage Device Commands",
193T10/1355-D ANSI/INCITS 400-2004,
194http://www.t10.org/ftp/t10/drafts/osd/osd-r10.pdf
195
196Weber, R., "SCSI Object-Based Storage Device Commands -2 (OSD-2)"
197T10/1729-D, Working Draft, rev. 3
198http://www.t10.org/ftp/t10/drafts/osd2/osd2r03.pdf
diff --git a/Documentation/x86/boot.txt b/Documentation/x86/boot.txt
index 7b4596ac4120..e0203662f9e9 100644
--- a/Documentation/x86/boot.txt
+++ b/Documentation/x86/boot.txt
@@ -158,7 +158,7 @@ Offset Proto Name Meaning
1580202/4 2.00+ header Magic signature "HdrS" 1580202/4 2.00+ header Magic signature "HdrS"
1590206/2 2.00+ version Boot protocol version supported 1590206/2 2.00+ version Boot protocol version supported
1600208/4 2.00+ realmode_swtch Boot loader hook (see below) 1600208/4 2.00+ realmode_swtch Boot loader hook (see below)
161020C/2 2.00+ start_sys The load-low segment (0x1000) (obsolete) 161020C/2 2.00+ start_sys_seg The load-low segment (0x1000) (obsolete)
162020E/2 2.00+ kernel_version Pointer to kernel version string 162020E/2 2.00+ kernel_version Pointer to kernel version string
1630210/1 2.00+ type_of_loader Boot loader identifier 1630210/1 2.00+ type_of_loader Boot loader identifier
1640211/1 2.00+ loadflags Boot protocol option flags 1640211/1 2.00+ loadflags Boot protocol option flags
@@ -170,10 +170,11 @@ Offset Proto Name Meaning
1700224/2 2.01+ heap_end_ptr Free memory after setup end 1700224/2 2.01+ heap_end_ptr Free memory after setup end
1710226/2 N/A pad1 Unused 1710226/2 N/A pad1 Unused
1720228/4 2.02+ cmd_line_ptr 32-bit pointer to the kernel command line 1720228/4 2.02+ cmd_line_ptr 32-bit pointer to the kernel command line
173022C/4 2.03+ initrd_addr_max Highest legal initrd address 173022C/4 2.03+ ramdisk_max Highest legal initrd address
1740230/4 2.05+ kernel_alignment Physical addr alignment required for kernel 1740230/4 2.05+ kernel_alignment Physical addr alignment required for kernel
1750234/1 2.05+ relocatable_kernel Whether kernel is relocatable or not 1750234/1 2.05+ relocatable_kernel Whether kernel is relocatable or not
1760235/3 N/A pad2 Unused 1760235/1 N/A pad2 Unused
1770236/2 N/A pad3 Unused
1770238/4 2.06+ cmdline_size Maximum size of the kernel command line 1780238/4 2.06+ cmdline_size Maximum size of the kernel command line
178023C/4 2.07+ hardware_subarch Hardware subarchitecture 179023C/4 2.07+ hardware_subarch Hardware subarchitecture
1790240/8 2.07+ hardware_subarch_data Subarchitecture-specific data 1800240/8 2.07+ hardware_subarch_data Subarchitecture-specific data
@@ -299,14 +300,14 @@ Protocol: 2.00+
299 e.g. 0x0204 for version 2.04, and 0x0a11 for a hypothetical version 300 e.g. 0x0204 for version 2.04, and 0x0a11 for a hypothetical version
300 10.17. 301 10.17.
301 302
302Field name: readmode_swtch 303Field name: realmode_swtch
303Type: modify (optional) 304Type: modify (optional)
304Offset/size: 0x208/4 305Offset/size: 0x208/4
305Protocol: 2.00+ 306Protocol: 2.00+
306 307
307 Boot loader hook (see ADVANCED BOOT LOADER HOOKS below.) 308 Boot loader hook (see ADVANCED BOOT LOADER HOOKS below.)
308 309
309Field name: start_sys 310Field name: start_sys_seg
310Type: read 311Type: read
311Offset/size: 0x20c/2 312Offset/size: 0x20c/2
312Protocol: 2.00+ 313Protocol: 2.00+
@@ -468,7 +469,7 @@ Protocol: 2.02+
468 zero, the kernel will assume that your boot loader does not support 469 zero, the kernel will assume that your boot loader does not support
469 the 2.02+ protocol. 470 the 2.02+ protocol.
470 471
471Field name: initrd_addr_max 472Field name: ramdisk_max
472Type: read 473Type: read
473Offset/size: 0x22c/4 474Offset/size: 0x22c/4
474Protocol: 2.03+ 475Protocol: 2.03+
@@ -542,7 +543,10 @@ Protocol: 2.08+
542 543
543 The payload may be compressed. The format of both the compressed and 544 The payload may be compressed. The format of both the compressed and
544 uncompressed data should be determined using the standard magic 545 uncompressed data should be determined using the standard magic
545 numbers. Currently only gzip compressed ELF is used. 546 numbers. The currently supported compression formats are gzip
547 (magic numbers 1F 8B or 1F 9E), bzip2 (magic number 42 5A) and LZMA
548 (magic number 5D 00). The uncompressed payload is currently always ELF
549 (magic number 7F 45 4C 46).
546 550
547Field name: payload_length 551Field name: payload_length
548Type: read 552Type: read
diff --git a/MAINTAINERS b/MAINTAINERS
index da488ce9e96a..01243ce6d998 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3323,6 +3323,16 @@ L: orinoco-devel@lists.sourceforge.net
3323W: http://www.nongnu.org/orinoco/ 3323W: http://www.nongnu.org/orinoco/
3324S: Maintained 3324S: Maintained
3325 3325
3326OSD LIBRARY
3327P: Boaz Harrosh
3328M: bharrosh@panasas.com
3329P: Benny Halevy
3330M: bhalevy@panasas.com
3331L: osd-dev@open-osd.org
3332W: http://open-osd.org
3333T: git://git.open-osd.org/open-osd.git
3334S: Maintained
3335
3326P54 WIRELESS DRIVER 3336P54 WIRELESS DRIVER
3327P: Michael Wu 3337P: Michael Wu
3328M: flamingice@sourmilk.net 3338M: flamingice@sourmilk.net
diff --git a/Makefile b/Makefile
index 1ab3ebfc9091..c6307b6d069f 100644
--- a/Makefile
+++ b/Makefile
@@ -533,8 +533,9 @@ KBUILD_CFLAGS += $(call cc-option,-Wframe-larger-than=${CONFIG_FRAME_WARN})
533endif 533endif
534 534
535# Force gcc to behave correct even for buggy distributions 535# Force gcc to behave correct even for buggy distributions
536# Arch Makefiles may override this setting 536ifndef CONFIG_CC_STACKPROTECTOR
537KBUILD_CFLAGS += $(call cc-option, -fno-stack-protector) 537KBUILD_CFLAGS += $(call cc-option, -fno-stack-protector)
538endif
538 539
539ifdef CONFIG_FRAME_POINTER 540ifdef CONFIG_FRAME_POINTER
540KBUILD_CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls 541KBUILD_CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index d3812eb84015..cc7834661427 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -55,7 +55,7 @@ int irq_select_affinity(unsigned int irq)
55 cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); 55 cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
56 last_cpu = cpu; 56 last_cpu = cpu;
57 57
58 irq_desc[irq].affinity = cpumask_of_cpu(cpu); 58 cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
59 irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu)); 59 irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu));
60 return 0; 60 return 0;
61} 61}
diff --git a/arch/alpha/mm/init.c b/arch/alpha/mm/init.c
index 5d7a16eab312..af71d38c8e41 100644
--- a/arch/alpha/mm/init.c
+++ b/arch/alpha/mm/init.c
@@ -189,9 +189,21 @@ callback_init(void * kernel_end)
189 189
190 if (alpha_using_srm) { 190 if (alpha_using_srm) {
191 static struct vm_struct console_remap_vm; 191 static struct vm_struct console_remap_vm;
192 unsigned long vaddr = VMALLOC_START; 192 unsigned long nr_pages = 0;
193 unsigned long vaddr;
193 unsigned long i, j; 194 unsigned long i, j;
194 195
196 /* calculate needed size */
197 for (i = 0; i < crb->map_entries; ++i)
198 nr_pages += crb->map[i].count;
199
200 /* register the vm area */
201 console_remap_vm.flags = VM_ALLOC;
202 console_remap_vm.size = nr_pages << PAGE_SHIFT;
203 vm_area_register_early(&console_remap_vm, PAGE_SIZE);
204
205 vaddr = (unsigned long)console_remap_vm.addr;
206
195 /* Set up the third level PTEs and update the virtual 207 /* Set up the third level PTEs and update the virtual
196 addresses of the CRB entries. */ 208 addresses of the CRB entries. */
197 for (i = 0; i < crb->map_entries; ++i) { 209 for (i = 0; i < crb->map_entries; ++i) {
@@ -213,12 +225,6 @@ callback_init(void * kernel_end)
213 vaddr += PAGE_SIZE; 225 vaddr += PAGE_SIZE;
214 } 226 }
215 } 227 }
216
217 /* Let vmalloc know that we've allocated some space. */
218 console_remap_vm.flags = VM_ALLOC;
219 console_remap_vm.addr = (void *) VMALLOC_START;
220 console_remap_vm.size = vaddr - VMALLOC_START;
221 vmlist = &console_remap_vm;
222 } 228 }
223 229
224 callback_init_done = 1; 230 callback_init_done = 1;
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 7296f0416286..6874c7dca75a 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -104,6 +104,11 @@ static struct irq_desc bad_irq_desc = {
104 .lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock), 104 .lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock),
105}; 105};
106 106
107#ifdef CONFIG_CPUMASK_OFFSTACK
108/* We are not allocating bad_irq_desc.affinity or .pending_mask */
109#error "ARM architecture does not support CONFIG_CPUMASK_OFFSTACK."
110#endif
111
107/* 112/*
108 * do_IRQ handles all hardware IRQ's. Decoded IRQs should not 113 * do_IRQ handles all hardware IRQ's. Decoded IRQs should not
109 * come via this function. Instead, they should provide their 114 * come via this function. Instead, they should provide their
@@ -161,7 +166,7 @@ void __init init_IRQ(void)
161 irq_desc[irq].status |= IRQ_NOREQUEST | IRQ_NOPROBE; 166 irq_desc[irq].status |= IRQ_NOREQUEST | IRQ_NOPROBE;
162 167
163#ifdef CONFIG_SMP 168#ifdef CONFIG_SMP
164 bad_irq_desc.affinity = CPU_MASK_ALL; 169 cpumask_setall(bad_irq_desc.affinity);
165 bad_irq_desc.cpu = smp_processor_id(); 170 bad_irq_desc.cpu = smp_processor_id();
166#endif 171#endif
167 init_arch_irq(); 172 init_arch_irq();
@@ -191,15 +196,16 @@ void migrate_irqs(void)
191 struct irq_desc *desc = irq_desc + i; 196 struct irq_desc *desc = irq_desc + i;
192 197
193 if (desc->cpu == cpu) { 198 if (desc->cpu == cpu) {
194 unsigned int newcpu = any_online_cpu(desc->affinity); 199 unsigned int newcpu = cpumask_any_and(desc->affinity,
195 200 cpu_online_mask);
196 if (newcpu == NR_CPUS) { 201 if (newcpu >= nr_cpu_ids) {
197 if (printk_ratelimit()) 202 if (printk_ratelimit())
198 printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n", 203 printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",
199 i, cpu); 204 i, cpu);
200 205
201 cpus_setall(desc->affinity); 206 cpumask_setall(desc->affinity);
202 newcpu = any_online_cpu(desc->affinity); 207 newcpu = cpumask_any_and(desc->affinity,
208 cpu_online_mask);
203 } 209 }
204 210
205 route_irq(desc, i, newcpu); 211 route_irq(desc, i, newcpu);
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 5f664599c945..c90f27250ead 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -64,7 +64,9 @@ SECTIONS
64 __initramfs_end = .; 64 __initramfs_end = .;
65#endif 65#endif
66 . = ALIGN(4096); 66 . = ALIGN(4096);
67 __per_cpu_load = .;
67 __per_cpu_start = .; 68 __per_cpu_start = .;
69 *(.data.percpu.page_aligned)
68 *(.data.percpu) 70 *(.data.percpu)
69 *(.data.percpu.shared_aligned) 71 *(.data.percpu.shared_aligned)
70 __per_cpu_end = .; 72 __per_cpu_end = .;
diff --git a/arch/arm/oprofile/op_model_mpcore.c b/arch/arm/oprofile/op_model_mpcore.c
index 6d6bd5899240..853d42bb8682 100644
--- a/arch/arm/oprofile/op_model_mpcore.c
+++ b/arch/arm/oprofile/op_model_mpcore.c
@@ -263,7 +263,7 @@ static void em_route_irq(int irq, unsigned int cpu)
263 const struct cpumask *mask = cpumask_of(cpu); 263 const struct cpumask *mask = cpumask_of(cpu);
264 264
265 spin_lock_irq(&desc->lock); 265 spin_lock_irq(&desc->lock);
266 desc->affinity = *mask; 266 cpumask_copy(desc->affinity, mask);
267 desc->chip->set_affinity(irq, mask); 267 desc->chip->set_affinity(irq, mask);
268 spin_unlock_irq(&desc->lock); 268 spin_unlock_irq(&desc->lock);
269} 269}
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index b189680d18b0..05fe3053dcae 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -181,7 +181,7 @@ source "kernel/Kconfig.preempt"
181config QUICKLIST 181config QUICKLIST
182 def_bool y 182 def_bool y
183 183
184config HAVE_ARCH_BOOTMEM_NODE 184config HAVE_ARCH_BOOTMEM
185 def_bool n 185 def_bool n
186 186
187config ARCH_HAVE_MEMORY_PRESENT 187config ARCH_HAVE_MEMORY_PRESENT
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index 281f4b60e603..c121d6e6e2b8 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -1,7 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28 3# Linux kernel version: 2.6.28.7
4# Fri Feb 20 10:01:44 2009
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -43,7 +42,7 @@ CONFIG_LOG_BUF_SHIFT=14
43CONFIG_BLK_DEV_INITRD=y 42CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 43CONFIG_INITRAMFS_SOURCE=""
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 45# CONFIG_SYSCTL is not set
47CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
48CONFIG_UID16=y 47CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y 48CONFIG_SYSCTL_SYSCALL=y
@@ -56,13 +55,13 @@ CONFIG_BUG=y
56# CONFIG_ELF_CORE is not set 55# CONFIG_ELF_CORE is not set
57CONFIG_COMPAT_BRK=y 56CONFIG_COMPAT_BRK=y
58CONFIG_BASE_FULL=y 57CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y 58# CONFIG_FUTEX is not set
60CONFIG_ANON_INODES=y 59CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y 60CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y 61CONFIG_SIGNALFD=y
63CONFIG_TIMERFD=y 62CONFIG_TIMERFD=y
64CONFIG_EVENTFD=y 63CONFIG_EVENTFD=y
65CONFIG_AIO=y 64# CONFIG_AIO is not set
66CONFIG_VM_EVENT_COUNTERS=y 65CONFIG_VM_EVENT_COUNTERS=y
67CONFIG_SLAB=y 66CONFIG_SLAB=y
68# CONFIG_SLUB is not set 67# CONFIG_SLUB is not set
@@ -314,7 +313,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
314# CONFIG_PHYS_ADDR_T_64BIT is not set 313# CONFIG_PHYS_ADDR_T_64BIT is not set
315CONFIG_ZONE_DMA_FLAG=1 314CONFIG_ZONE_DMA_FLAG=1
316CONFIG_VIRT_TO_BUS=y 315CONFIG_VIRT_TO_BUS=y
317CONFIG_BFIN_GPTIMERS=y 316CONFIG_BFIN_GPTIMERS=m
318# CONFIG_DMA_UNCACHED_4M is not set 317# CONFIG_DMA_UNCACHED_4M is not set
319# CONFIG_DMA_UNCACHED_2M is not set 318# CONFIG_DMA_UNCACHED_2M is not set
320CONFIG_DMA_UNCACHED_1M=y 319CONFIG_DMA_UNCACHED_1M=y
@@ -375,7 +374,6 @@ CONFIG_BINFMT_ZFLAT=y
375# 374#
376# CONFIG_PM is not set 375# CONFIG_PM is not set
377CONFIG_ARCH_SUSPEND_POSSIBLE=y 376CONFIG_ARCH_SUSPEND_POSSIBLE=y
378# CONFIG_PM_WAKEUP_BY_GPIO is not set
379 377
380# 378#
381# CPU Frequency scaling 379# CPU Frequency scaling
@@ -634,6 +632,7 @@ CONFIG_BFIN_RX_DESC_NUM=20
634# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 632# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
635# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 633# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
636# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 634# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
635# CONFIG_B44 is not set
637# CONFIG_NETDEV_1000 is not set 636# CONFIG_NETDEV_1000 is not set
638# CONFIG_NETDEV_10000 is not set 637# CONFIG_NETDEV_10000 is not set
639 638
@@ -793,6 +792,7 @@ CONFIG_SPI_MASTER=y
793# 792#
794CONFIG_SPI_BFIN=y 793CONFIG_SPI_BFIN=y
795# CONFIG_SPI_BFIN_LOCK is not set 794# CONFIG_SPI_BFIN_LOCK is not set
795# CONFIG_SPI_BFIN_SPORT is not set
796# CONFIG_SPI_BITBANG is not set 796# CONFIG_SPI_BITBANG is not set
797 797
798# 798#
@@ -816,6 +816,12 @@ CONFIG_WATCHDOG=y
816# 816#
817# CONFIG_SOFT_WATCHDOG is not set 817# CONFIG_SOFT_WATCHDOG is not set
818CONFIG_BFIN_WDT=y 818CONFIG_BFIN_WDT=y
819CONFIG_SSB_POSSIBLE=y
820
821#
822# Sonics Silicon Backplane
823#
824# CONFIG_SSB is not set
819 825
820# 826#
821# Multifunction device drivers 827# Multifunction device drivers
@@ -865,7 +871,26 @@ CONFIG_DUMMY_CONSOLE=y
865# CONFIG_SOUND is not set 871# CONFIG_SOUND is not set
866# CONFIG_HID_SUPPORT is not set 872# CONFIG_HID_SUPPORT is not set
867# CONFIG_USB_SUPPORT is not set 873# CONFIG_USB_SUPPORT is not set
868# CONFIG_MMC is not set 874CONFIG_MMC=y
875# CONFIG_MMC_DEBUG is not set
876# CONFIG_MMC_UNSAFE_RESUME is not set
877
878#
879# MMC/SD/SDIO Card Drivers
880#
881CONFIG_MMC_BLOCK=y
882CONFIG_MMC_BLOCK_BOUNCE=y
883# CONFIG_SDIO_UART is not set
884# CONFIG_MMC_TEST is not set
885
886#
887# MMC/SD/SDIO Host Controller Drivers
888#
889# CONFIG_MMC_SDHCI is not set
890CONFIG_SDH_BFIN=m
891CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND=y
892CONFIG_SDH_BFIN_ENABLE_SDIO_IRQ=y
893# CONFIG_MMC_SPI is not set
869# CONFIG_MEMSTICK is not set 894# CONFIG_MEMSTICK is not set
870# CONFIG_NEW_LEDS is not set 895# CONFIG_NEW_LEDS is not set
871# CONFIG_ACCESSIBILITY is not set 896# CONFIG_ACCESSIBILITY is not set
@@ -1121,7 +1146,6 @@ CONFIG_HAVE_ARCH_KGDB=y
1121# CONFIG_KGDB is not set 1146# CONFIG_KGDB is not set
1122# CONFIG_DEBUG_STACKOVERFLOW is not set 1147# CONFIG_DEBUG_STACKOVERFLOW is not set
1123# CONFIG_DEBUG_STACK_USAGE is not set 1148# CONFIG_DEBUG_STACK_USAGE is not set
1124# CONFIG_KGDB_TESTCASE is not set
1125CONFIG_DEBUG_VERBOSE=y 1149CONFIG_DEBUG_VERBOSE=y
1126CONFIG_DEBUG_MMRS=y 1150CONFIG_DEBUG_MMRS=y
1127# CONFIG_DEBUG_HWERR is not set 1151# CONFIG_DEBUG_HWERR is not set
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
index 8e2b855b8db7..3e562b2775d4 100644
--- a/arch/blackfin/configs/BF526-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28.7
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -42,7 +42,7 @@ CONFIG_LOG_BUF_SHIFT=14
42CONFIG_BLK_DEV_INITRD=y 42CONFIG_BLK_DEV_INITRD=y
43CONFIG_INITRAMFS_SOURCE="" 43CONFIG_INITRAMFS_SOURCE=""
44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
45CONFIG_SYSCTL=y 45# CONFIG_SYSCTL is not set
46CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
47CONFIG_UID16=y 47CONFIG_UID16=y
48CONFIG_SYSCTL_SYSCALL=y 48CONFIG_SYSCTL_SYSCALL=y
@@ -55,13 +55,13 @@ CONFIG_BUG=y
55# CONFIG_ELF_CORE is not set 55# CONFIG_ELF_CORE is not set
56CONFIG_COMPAT_BRK=y 56CONFIG_COMPAT_BRK=y
57CONFIG_BASE_FULL=y 57CONFIG_BASE_FULL=y
58CONFIG_FUTEX=y 58# CONFIG_FUTEX is not set
59CONFIG_ANON_INODES=y 59CONFIG_ANON_INODES=y
60CONFIG_EPOLL=y 60CONFIG_EPOLL=y
61CONFIG_SIGNALFD=y 61CONFIG_SIGNALFD=y
62CONFIG_TIMERFD=y 62CONFIG_TIMERFD=y
63CONFIG_EVENTFD=y 63CONFIG_EVENTFD=y
64CONFIG_AIO=y 64# CONFIG_AIO is not set
65CONFIG_VM_EVENT_COUNTERS=y 65CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_SLAB=y 66CONFIG_SLAB=y
67# CONFIG_SLUB is not set 67# CONFIG_SLUB is not set
@@ -132,15 +132,20 @@ CONFIG_BF526=y
132# CONFIG_BF538 is not set 132# CONFIG_BF538 is not set
133# CONFIG_BF539 is not set 133# CONFIG_BF539 is not set
134# CONFIG_BF542 is not set 134# CONFIG_BF542 is not set
135# CONFIG_BF542M is not set
135# CONFIG_BF544 is not set 136# CONFIG_BF544 is not set
137# CONFIG_BF544M is not set
136# CONFIG_BF547 is not set 138# CONFIG_BF547 is not set
139# CONFIG_BF547M is not set
137# CONFIG_BF548 is not set 140# CONFIG_BF548 is not set
141# CONFIG_BF548M is not set
138# CONFIG_BF549 is not set 142# CONFIG_BF549 is not set
143# CONFIG_BF549M is not set
139# CONFIG_BF561 is not set 144# CONFIG_BF561 is not set
140CONFIG_BF_REV_MIN=0 145CONFIG_BF_REV_MIN=0
141CONFIG_BF_REV_MAX=2 146CONFIG_BF_REV_MAX=2
142CONFIG_BF_REV_0_0=y 147# CONFIG_BF_REV_0_0 is not set
143# CONFIG_BF_REV_0_1 is not set 148CONFIG_BF_REV_0_1=y
144# CONFIG_BF_REV_0_2 is not set 149# CONFIG_BF_REV_0_2 is not set
145# CONFIG_BF_REV_0_3 is not set 150# CONFIG_BF_REV_0_3 is not set
146# CONFIG_BF_REV_0_4 is not set 151# CONFIG_BF_REV_0_4 is not set
@@ -313,7 +318,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
313# CONFIG_PHYS_ADDR_T_64BIT is not set 318# CONFIG_PHYS_ADDR_T_64BIT is not set
314CONFIG_ZONE_DMA_FLAG=1 319CONFIG_ZONE_DMA_FLAG=1
315CONFIG_VIRT_TO_BUS=y 320CONFIG_VIRT_TO_BUS=y
316CONFIG_BFIN_GPTIMERS=y 321CONFIG_BFIN_GPTIMERS=m
317# CONFIG_DMA_UNCACHED_4M is not set 322# CONFIG_DMA_UNCACHED_4M is not set
318# CONFIG_DMA_UNCACHED_2M is not set 323# CONFIG_DMA_UNCACHED_2M is not set
319CONFIG_DMA_UNCACHED_1M=y 324CONFIG_DMA_UNCACHED_1M=y
@@ -374,7 +379,6 @@ CONFIG_BINFMT_ZFLAT=y
374# 379#
375# CONFIG_PM is not set 380# CONFIG_PM is not set
376CONFIG_ARCH_SUSPEND_POSSIBLE=y 381CONFIG_ARCH_SUSPEND_POSSIBLE=y
377# CONFIG_PM_WAKEUP_BY_GPIO is not set
378 382
379# 383#
380# CPU Frequency scaling 384# CPU Frequency scaling
@@ -583,7 +587,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
583# CONFIG_BLK_DEV_HD is not set 587# CONFIG_BLK_DEV_HD is not set
584CONFIG_MISC_DEVICES=y 588CONFIG_MISC_DEVICES=y
585# CONFIG_EEPROM_93CX6 is not set 589# CONFIG_EEPROM_93CX6 is not set
590# CONFIG_ICS932S401 is not set
586# CONFIG_ENCLOSURE_SERVICES is not set 591# CONFIG_ENCLOSURE_SERVICES is not set
592# CONFIG_C2PORT is not set
587CONFIG_HAVE_IDE=y 593CONFIG_HAVE_IDE=y
588# CONFIG_IDE is not set 594# CONFIG_IDE is not set
589 595
@@ -637,6 +643,7 @@ CONFIG_BFIN_MAC_RMII=y
637# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 643# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
638# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 644# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
639# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 645# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
646# CONFIG_B44 is not set
640CONFIG_NETDEV_1000=y 647CONFIG_NETDEV_1000=y
641# CONFIG_AX88180 is not set 648# CONFIG_AX88180 is not set
642CONFIG_NETDEV_10000=y 649CONFIG_NETDEV_10000=y
@@ -815,6 +822,7 @@ CONFIG_SPI_MASTER=y
815# 822#
816CONFIG_SPI_BFIN=y 823CONFIG_SPI_BFIN=y
817# CONFIG_SPI_BFIN_LOCK is not set 824# CONFIG_SPI_BFIN_LOCK is not set
825# CONFIG_SPI_BFIN_SPORT is not set
818# CONFIG_SPI_BITBANG is not set 826# CONFIG_SPI_BITBANG is not set
819 827
820# 828#
@@ -838,6 +846,7 @@ CONFIG_HWMON=y
838# CONFIG_SENSORS_ADM1029 is not set 846# CONFIG_SENSORS_ADM1029 is not set
839# CONFIG_SENSORS_ADM1031 is not set 847# CONFIG_SENSORS_ADM1031 is not set
840# CONFIG_SENSORS_ADM9240 is not set 848# CONFIG_SENSORS_ADM9240 is not set
849# CONFIG_SENSORS_ADT7462 is not set
841# CONFIG_SENSORS_ADT7470 is not set 850# CONFIG_SENSORS_ADT7470 is not set
842# CONFIG_SENSORS_ADT7473 is not set 851# CONFIG_SENSORS_ADT7473 is not set
843# CONFIG_SENSORS_ATXP1 is not set 852# CONFIG_SENSORS_ATXP1 is not set
@@ -896,6 +905,12 @@ CONFIG_BFIN_WDT=y
896# USB-based Watchdog Cards 905# USB-based Watchdog Cards
897# 906#
898# CONFIG_USBPCWATCHDOG is not set 907# CONFIG_USBPCWATCHDOG is not set
908CONFIG_SSB_POSSIBLE=y
909
910#
911# Sonics Silicon Backplane
912#
913# CONFIG_SSB is not set
899 914
900# 915#
901# Multifunction device drivers 916# Multifunction device drivers
@@ -904,8 +919,10 @@ CONFIG_BFIN_WDT=y
904# CONFIG_MFD_SM501 is not set 919# CONFIG_MFD_SM501 is not set
905# CONFIG_HTC_PASIC3 is not set 920# CONFIG_HTC_PASIC3 is not set
906# CONFIG_MFD_TMIO is not set 921# CONFIG_MFD_TMIO is not set
922# CONFIG_PMIC_DA903X is not set
907# CONFIG_MFD_WM8400 is not set 923# CONFIG_MFD_WM8400 is not set
908# CONFIG_MFD_WM8350_I2C is not set 924# CONFIG_MFD_WM8350_I2C is not set
925# CONFIG_REGULATOR is not set
909 926
910# 927#
911# Multimedia devices 928# Multimedia devices
@@ -940,55 +957,7 @@ CONFIG_BFIN_WDT=y
940# Console display driver support 957# Console display driver support
941# 958#
942CONFIG_DUMMY_CONSOLE=y 959CONFIG_DUMMY_CONSOLE=y
943CONFIG_SOUND=m 960# CONFIG_SOUND is not set
944CONFIG_SOUND_OSS_CORE=y
945CONFIG_SND=m
946CONFIG_SND_TIMER=m
947CONFIG_SND_PCM=m
948# CONFIG_SND_SEQUENCER is not set
949CONFIG_SND_OSSEMUL=y
950CONFIG_SND_MIXER_OSS=m
951CONFIG_SND_PCM_OSS=m
952CONFIG_SND_PCM_OSS_PLUGINS=y
953# CONFIG_SND_DYNAMIC_MINORS is not set
954CONFIG_SND_SUPPORT_OLD_API=y
955CONFIG_SND_VERBOSE_PROCFS=y
956# CONFIG_SND_VERBOSE_PRINTK is not set
957# CONFIG_SND_DEBUG is not set
958CONFIG_SND_DRIVERS=y
959# CONFIG_SND_DUMMY is not set
960# CONFIG_SND_MTPAV is not set
961# CONFIG_SND_SERIAL_U16550 is not set
962# CONFIG_SND_MPU401 is not set
963CONFIG_SND_SPI=y
964
965#
966# ALSA Blackfin devices
967#
968# CONFIG_SND_BLACKFIN_AD1836 is not set
969# CONFIG_SND_BFIN_AD73322 is not set
970CONFIG_SND_USB=y
971# CONFIG_SND_USB_AUDIO is not set
972# CONFIG_SND_USB_CAIAQ is not set
973CONFIG_SND_SOC=m
974CONFIG_SND_SOC_AC97_BUS=y
975CONFIG_SND_BF5XX_I2S=m
976CONFIG_SND_BF5XX_SOC_SSM2602=m
977# CONFIG_SND_BF5XX_SOC_AD73311 is not set
978CONFIG_SND_BF5XX_AC97=m
979CONFIG_SND_BF5XX_MMAP_SUPPORT=y
980# CONFIG_SND_BF5XX_MULTICHAN_SUPPORT is not set
981CONFIG_SND_BF5XX_SOC_SPORT=m
982CONFIG_SND_BF5XX_SOC_I2S=m
983CONFIG_SND_BF5XX_SOC_AC97=m
984CONFIG_SND_BF5XX_SOC_AD1980=m
985CONFIG_SND_BF5XX_SPORT_NUM=0
986# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
987# CONFIG_SND_SOC_ALL_CODECS is not set
988CONFIG_SND_SOC_AD1980=m
989CONFIG_SND_SOC_SSM2602=m
990# CONFIG_SOUND_PRIME is not set
991CONFIG_AC97_BUS=m
992CONFIG_HID_SUPPORT=y 961CONFIG_HID_SUPPORT=y
993CONFIG_HID=y 962CONFIG_HID=y
994# CONFIG_HID_DEBUG is not set 963# CONFIG_HID_DEBUG is not set
@@ -1063,13 +1032,15 @@ CONFIG_USB_MUSB_HDRC=y
1063CONFIG_USB_MUSB_SOC=y 1032CONFIG_USB_MUSB_SOC=y
1064 1033
1065# 1034#
1066# Blackfin high speed USB support 1035# Blackfin high speed USB Support
1067# 1036#
1068CONFIG_USB_MUSB_HOST=y 1037CONFIG_USB_MUSB_HOST=y
1069# CONFIG_USB_MUSB_PERIPHERAL is not set 1038# CONFIG_USB_MUSB_PERIPHERAL is not set
1070# CONFIG_USB_MUSB_OTG is not set 1039# CONFIG_USB_MUSB_OTG is not set
1040# CONFIG_USB_GADGET_MUSB_HDRC is not set
1071CONFIG_USB_MUSB_HDRC_HCD=y 1041CONFIG_USB_MUSB_HDRC_HCD=y
1072CONFIG_MUSB_PIO_ONLY=y 1042CONFIG_MUSB_PIO_ONLY=y
1043CONFIG_MUSB_DMA_POLL=y
1073# CONFIG_USB_MUSB_DEBUG is not set 1044# CONFIG_USB_MUSB_DEBUG is not set
1074 1045
1075# 1046#
@@ -1081,18 +1052,33 @@ CONFIG_MUSB_PIO_ONLY=y
1081# CONFIG_USB_TMC is not set 1052# CONFIG_USB_TMC is not set
1082 1053
1083# 1054#
1084# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1055# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1085# 1056#
1086 1057
1087# 1058#
1088# may also be needed; see USB_STORAGE Help for more information 1059# see USB_STORAGE Help for more information
1089# 1060#
1061CONFIG_USB_STORAGE=m
1062# CONFIG_USB_STORAGE_DEBUG is not set
1063# CONFIG_USB_STORAGE_DATAFAB is not set
1064# CONFIG_USB_STORAGE_FREECOM is not set
1065# CONFIG_USB_STORAGE_ISD200 is not set
1066# CONFIG_USB_STORAGE_DPCM is not set
1067# CONFIG_USB_STORAGE_USBAT is not set
1068# CONFIG_USB_STORAGE_SDDR09 is not set
1069# CONFIG_USB_STORAGE_SDDR55 is not set
1070# CONFIG_USB_STORAGE_JUMPSHOT is not set
1071# CONFIG_USB_STORAGE_ALAUDA is not set
1072# CONFIG_USB_STORAGE_ONETOUCH is not set
1073# CONFIG_USB_STORAGE_KARMA is not set
1074# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1090# CONFIG_USB_LIBUSUAL is not set 1075# CONFIG_USB_LIBUSUAL is not set
1091 1076
1092# 1077#
1093# USB Imaging devices 1078# USB Imaging devices
1094# 1079#
1095# CONFIG_USB_MDC800 is not set 1080# CONFIG_USB_MDC800 is not set
1081# CONFIG_USB_MICROTEK is not set
1096 1082
1097# 1083#
1098# USB port drivers 1084# USB port drivers
@@ -1124,6 +1110,30 @@ CONFIG_MUSB_PIO_ONLY=y
1124# CONFIG_USB_ISIGHTFW is not set 1110# CONFIG_USB_ISIGHTFW is not set
1125# CONFIG_USB_VST is not set 1111# CONFIG_USB_VST is not set
1126# CONFIG_USB_GADGET is not set 1112# CONFIG_USB_GADGET is not set
1113# CONFIG_USB_GADGET_AT91 is not set
1114# CONFIG_USB_GADGET_ATMEL_USBA is not set
1115# CONFIG_USB_GADGET_FSL_USB2 is not set
1116# CONFIG_USB_GADGET_LH7A40X is not set
1117# CONFIG_USB_GADGET_OMAP is not set
1118# CONFIG_USB_GADGET_PXA25X is not set
1119# CONFIG_USB_GADGET_PXA27X is not set
1120# CONFIG_USB_GADGET_S3C2410 is not set
1121# CONFIG_USB_GADGET_M66592 is not set
1122# CONFIG_USB_GADGET_AMD5536UDC is not set
1123# CONFIG_USB_GADGET_FSL_QE is not set
1124# CONFIG_USB_GADGET_NET2272 is not set
1125# CONFIG_USB_GADGET_NET2280 is not set
1126# CONFIG_USB_GADGET_GOKU is not set
1127# CONFIG_USB_GADGET_DUMMY_HCD is not set
1128# CONFIG_USB_ZERO is not set
1129# CONFIG_USB_AUDIO is not set
1130# CONFIG_USB_ETH is not set
1131# CONFIG_USB_GADGETFS is not set
1132# CONFIG_USB_FILE_STORAGE is not set
1133# CONFIG_USB_G_SERIAL is not set
1134# CONFIG_USB_MIDI_GADGET is not set
1135# CONFIG_USB_G_PRINTER is not set
1136# CONFIG_USB_CDC_COMPOSITE is not set
1127# CONFIG_MMC is not set 1137# CONFIG_MMC is not set
1128# CONFIG_MEMSTICK is not set 1138# CONFIG_MEMSTICK is not set
1129# CONFIG_NEW_LEDS is not set 1139# CONFIG_NEW_LEDS is not set
@@ -1158,12 +1168,14 @@ CONFIG_RTC_INTF_DEV=y
1158# CONFIG_RTC_DRV_M41T80 is not set 1168# CONFIG_RTC_DRV_M41T80 is not set
1159# CONFIG_RTC_DRV_S35390A is not set 1169# CONFIG_RTC_DRV_S35390A is not set
1160# CONFIG_RTC_DRV_FM3130 is not set 1170# CONFIG_RTC_DRV_FM3130 is not set
1171# CONFIG_RTC_DRV_RX8581 is not set
1161 1172
1162# 1173#
1163# SPI RTC drivers 1174# SPI RTC drivers
1164# 1175#
1165# CONFIG_RTC_DRV_M41T94 is not set 1176# CONFIG_RTC_DRV_M41T94 is not set
1166# CONFIG_RTC_DRV_DS1305 is not set 1177# CONFIG_RTC_DRV_DS1305 is not set
1178# CONFIG_RTC_DRV_DS1390 is not set
1167# CONFIG_RTC_DRV_MAX6902 is not set 1179# CONFIG_RTC_DRV_MAX6902 is not set
1168# CONFIG_RTC_DRV_R9701 is not set 1180# CONFIG_RTC_DRV_R9701 is not set
1169# CONFIG_RTC_DRV_RS5C348 is not set 1181# CONFIG_RTC_DRV_RS5C348 is not set
@@ -1384,6 +1396,13 @@ CONFIG_DEBUG_INFO=y
1384# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1396# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1385# CONFIG_FAULT_INJECTION is not set 1397# CONFIG_FAULT_INJECTION is not set
1386CONFIG_SYSCTL_SYSCALL_CHECK=y 1398CONFIG_SYSCTL_SYSCALL_CHECK=y
1399
1400#
1401# Tracers
1402#
1403# CONFIG_SCHED_TRACER is not set
1404# CONFIG_CONTEXT_SWITCH_TRACER is not set
1405# CONFIG_BOOT_TRACER is not set
1387# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1406# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1388# CONFIG_SAMPLES is not set 1407# CONFIG_SAMPLES is not set
1389CONFIG_HAVE_ARCH_KGDB=y 1408CONFIG_HAVE_ARCH_KGDB=y
@@ -1423,6 +1442,7 @@ CONFIG_CRYPTO=y
1423# 1442#
1424# CONFIG_CRYPTO_FIPS is not set 1443# CONFIG_CRYPTO_FIPS is not set
1425# CONFIG_CRYPTO_MANAGER is not set 1444# CONFIG_CRYPTO_MANAGER is not set
1445# CONFIG_CRYPTO_MANAGER2 is not set
1426# CONFIG_CRYPTO_GF128MUL is not set 1446# CONFIG_CRYPTO_GF128MUL is not set
1427# CONFIG_CRYPTO_NULL is not set 1447# CONFIG_CRYPTO_NULL is not set
1428# CONFIG_CRYPTO_CRYPTD is not set 1448# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index a50050f17706..911b5dba1dbc 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28.7
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -36,14 +36,13 @@ CONFIG_IKCONFIG_PROC=y
36CONFIG_LOG_BUF_SHIFT=14 36CONFIG_LOG_BUF_SHIFT=14
37# CONFIG_CGROUPS is not set 37# CONFIG_CGROUPS is not set
38# CONFIG_GROUP_SCHED is not set 38# CONFIG_GROUP_SCHED is not set
39# CONFIG_SYSFS_DEPRECATED is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 39# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 40# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 41# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 42CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 43CONFIG_INITRAMFS_SOURCE=""
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 45# CONFIG_SYSCTL is not set
47CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
48CONFIG_UID16=y 47CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y 48CONFIG_SYSCTL_SYSCALL=y
@@ -56,13 +55,13 @@ CONFIG_BUG=y
56# CONFIG_ELF_CORE is not set 55# CONFIG_ELF_CORE is not set
57CONFIG_COMPAT_BRK=y 56CONFIG_COMPAT_BRK=y
58CONFIG_BASE_FULL=y 57CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y 58# CONFIG_FUTEX is not set
60CONFIG_ANON_INODES=y 59CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y 60CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y 61CONFIG_SIGNALFD=y
63CONFIG_TIMERFD=y 62CONFIG_TIMERFD=y
64CONFIG_EVENTFD=y 63CONFIG_EVENTFD=y
65CONFIG_AIO=y 64# CONFIG_AIO is not set
66CONFIG_VM_EVENT_COUNTERS=y 65CONFIG_VM_EVENT_COUNTERS=y
67CONFIG_SLAB=y 66CONFIG_SLAB=y
68# CONFIG_SLUB is not set 67# CONFIG_SLUB is not set
@@ -133,15 +132,20 @@ CONFIG_BF527=y
133# CONFIG_BF538 is not set 132# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 133# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 134# CONFIG_BF542 is not set
135# CONFIG_BF542M is not set
136# CONFIG_BF544 is not set 136# CONFIG_BF544 is not set
137# CONFIG_BF544M is not set
137# CONFIG_BF547 is not set 138# CONFIG_BF547 is not set
139# CONFIG_BF547M is not set
138# CONFIG_BF548 is not set 140# CONFIG_BF548 is not set
141# CONFIG_BF548M is not set
139# CONFIG_BF549 is not set 142# CONFIG_BF549 is not set
143# CONFIG_BF549M is not set
140# CONFIG_BF561 is not set 144# CONFIG_BF561 is not set
141CONFIG_BF_REV_MIN=0 145CONFIG_BF_REV_MIN=0
142CONFIG_BF_REV_MAX=2 146CONFIG_BF_REV_MAX=2
143CONFIG_BF_REV_0_0=y 147# CONFIG_BF_REV_0_0 is not set
144# CONFIG_BF_REV_0_1 is not set 148CONFIG_BF_REV_0_1=y
145# CONFIG_BF_REV_0_2 is not set 149# CONFIG_BF_REV_0_2 is not set
146# CONFIG_BF_REV_0_3 is not set 150# CONFIG_BF_REV_0_3 is not set
147# CONFIG_BF_REV_0_4 is not set 151# CONFIG_BF_REV_0_4 is not set
@@ -314,7 +318,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
314# CONFIG_PHYS_ADDR_T_64BIT is not set 318# CONFIG_PHYS_ADDR_T_64BIT is not set
315CONFIG_ZONE_DMA_FLAG=1 319CONFIG_ZONE_DMA_FLAG=1
316CONFIG_VIRT_TO_BUS=y 320CONFIG_VIRT_TO_BUS=y
317CONFIG_BFIN_GPTIMERS=y 321CONFIG_BFIN_GPTIMERS=m
318# CONFIG_DMA_UNCACHED_4M is not set 322# CONFIG_DMA_UNCACHED_4M is not set
319# CONFIG_DMA_UNCACHED_2M is not set 323# CONFIG_DMA_UNCACHED_2M is not set
320CONFIG_DMA_UNCACHED_1M=y 324CONFIG_DMA_UNCACHED_1M=y
@@ -375,7 +379,6 @@ CONFIG_BINFMT_ZFLAT=y
375# 379#
376# CONFIG_PM is not set 380# CONFIG_PM is not set
377CONFIG_ARCH_SUSPEND_POSSIBLE=y 381CONFIG_ARCH_SUSPEND_POSSIBLE=y
378# CONFIG_PM_WAKEUP_BY_GPIO is not set
379 382
380# 383#
381# CPU Frequency scaling 384# CPU Frequency scaling
@@ -626,7 +629,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
626# CONFIG_BLK_DEV_HD is not set 629# CONFIG_BLK_DEV_HD is not set
627CONFIG_MISC_DEVICES=y 630CONFIG_MISC_DEVICES=y
628# CONFIG_EEPROM_93CX6 is not set 631# CONFIG_EEPROM_93CX6 is not set
632# CONFIG_ICS932S401 is not set
629# CONFIG_ENCLOSURE_SERVICES is not set 633# CONFIG_ENCLOSURE_SERVICES is not set
634# CONFIG_C2PORT is not set
630CONFIG_HAVE_IDE=y 635CONFIG_HAVE_IDE=y
631# CONFIG_IDE is not set 636# CONFIG_IDE is not set
632 637
@@ -681,6 +686,7 @@ CONFIG_BFIN_MAC_RMII=y
681# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 686# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
682# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 687# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
683# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 688# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
689# CONFIG_B44 is not set
684CONFIG_NETDEV_1000=y 690CONFIG_NETDEV_1000=y
685# CONFIG_AX88180 is not set 691# CONFIG_AX88180 is not set
686CONFIG_NETDEV_10000=y 692CONFIG_NETDEV_10000=y
@@ -755,8 +761,8 @@ CONFIG_INPUT_MISC=y
755# CONFIG_SPI_ADC_BF533 is not set 761# CONFIG_SPI_ADC_BF533 is not set
756# CONFIG_BF5xx_PPIFCD is not set 762# CONFIG_BF5xx_PPIFCD is not set
757# CONFIG_BFIN_SIMPLE_TIMER is not set 763# CONFIG_BFIN_SIMPLE_TIMER is not set
758# CONFIG_BF5xx_PPI is not set 764CONFIG_BF5xx_PPI=m
759# CONFIG_BFIN_SPORT is not set 765CONFIG_BFIN_SPORT=m
760# CONFIG_BFIN_TIMER_LATENCY is not set 766# CONFIG_BFIN_TIMER_LATENCY is not set
761# CONFIG_TWI_LCD is not set 767# CONFIG_TWI_LCD is not set
762CONFIG_BFIN_DMA_INTERFACE=m 768CONFIG_BFIN_DMA_INTERFACE=m
@@ -859,6 +865,7 @@ CONFIG_SPI_MASTER=y
859# 865#
860CONFIG_SPI_BFIN=y 866CONFIG_SPI_BFIN=y
861# CONFIG_SPI_BFIN_LOCK is not set 867# CONFIG_SPI_BFIN_LOCK is not set
868# CONFIG_SPI_BFIN_SPORT is not set
862# CONFIG_SPI_BITBANG is not set 869# CONFIG_SPI_BITBANG is not set
863 870
864# 871#
@@ -871,60 +878,7 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
871# CONFIG_GPIOLIB is not set 878# CONFIG_GPIOLIB is not set
872# CONFIG_W1 is not set 879# CONFIG_W1 is not set
873# CONFIG_POWER_SUPPLY is not set 880# CONFIG_POWER_SUPPLY is not set
874CONFIG_HWMON=y 881# CONFIG_HWMON is not set
875# CONFIG_HWMON_VID is not set
876# CONFIG_SENSORS_AD7414 is not set
877# CONFIG_SENSORS_AD7418 is not set
878# CONFIG_SENSORS_ADCXX is not set
879# CONFIG_SENSORS_ADM1021 is not set
880# CONFIG_SENSORS_ADM1025 is not set
881# CONFIG_SENSORS_ADM1026 is not set
882# CONFIG_SENSORS_ADM1029 is not set
883# CONFIG_SENSORS_ADM1031 is not set
884# CONFIG_SENSORS_ADM9240 is not set
885# CONFIG_SENSORS_ADT7470 is not set
886# CONFIG_SENSORS_ADT7473 is not set
887# CONFIG_SENSORS_ATXP1 is not set
888# CONFIG_SENSORS_DS1621 is not set
889# CONFIG_SENSORS_F71805F is not set
890# CONFIG_SENSORS_F71882FG is not set
891# CONFIG_SENSORS_F75375S is not set
892# CONFIG_SENSORS_GL518SM is not set
893# CONFIG_SENSORS_GL520SM is not set
894# CONFIG_SENSORS_IT87 is not set
895# CONFIG_SENSORS_LM63 is not set
896# CONFIG_SENSORS_LM70 is not set
897# CONFIG_SENSORS_LM75 is not set
898# CONFIG_SENSORS_LM77 is not set
899# CONFIG_SENSORS_LM78 is not set
900# CONFIG_SENSORS_LM80 is not set
901# CONFIG_SENSORS_LM83 is not set
902# CONFIG_SENSORS_LM85 is not set
903# CONFIG_SENSORS_LM87 is not set
904# CONFIG_SENSORS_LM90 is not set
905# CONFIG_SENSORS_LM92 is not set
906# CONFIG_SENSORS_LM93 is not set
907# CONFIG_SENSORS_MAX1111 is not set
908# CONFIG_SENSORS_MAX1619 is not set
909# CONFIG_SENSORS_MAX6650 is not set
910# CONFIG_SENSORS_PC87360 is not set
911# CONFIG_SENSORS_PC87427 is not set
912# CONFIG_SENSORS_DME1737 is not set
913# CONFIG_SENSORS_SMSC47M1 is not set
914# CONFIG_SENSORS_SMSC47M192 is not set
915# CONFIG_SENSORS_SMSC47B397 is not set
916# CONFIG_SENSORS_ADS7828 is not set
917# CONFIG_SENSORS_THMC50 is not set
918# CONFIG_SENSORS_VT1211 is not set
919# CONFIG_SENSORS_W83781D is not set
920# CONFIG_SENSORS_W83791D is not set
921# CONFIG_SENSORS_W83792D is not set
922# CONFIG_SENSORS_W83793 is not set
923# CONFIG_SENSORS_W83L785TS is not set
924# CONFIG_SENSORS_W83L786NG is not set
925# CONFIG_SENSORS_W83627HF is not set
926# CONFIG_SENSORS_W83627EHF is not set
927# CONFIG_HWMON_DEBUG_CHIP is not set
928# CONFIG_THERMAL is not set 882# CONFIG_THERMAL is not set
929# CONFIG_THERMAL_HWMON is not set 883# CONFIG_THERMAL_HWMON is not set
930CONFIG_WATCHDOG=y 884CONFIG_WATCHDOG=y
@@ -940,6 +894,12 @@ CONFIG_BFIN_WDT=y
940# USB-based Watchdog Cards 894# USB-based Watchdog Cards
941# 895#
942# CONFIG_USBPCWATCHDOG is not set 896# CONFIG_USBPCWATCHDOG is not set
897CONFIG_SSB_POSSIBLE=y
898
899#
900# Sonics Silicon Backplane
901#
902# CONFIG_SSB is not set
943 903
944# 904#
945# Multifunction device drivers 905# Multifunction device drivers
@@ -948,8 +908,10 @@ CONFIG_BFIN_WDT=y
948# CONFIG_MFD_SM501 is not set 908# CONFIG_MFD_SM501 is not set
949# CONFIG_HTC_PASIC3 is not set 909# CONFIG_HTC_PASIC3 is not set
950# CONFIG_MFD_TMIO is not set 910# CONFIG_MFD_TMIO is not set
911# CONFIG_PMIC_DA903X is not set
951# CONFIG_MFD_WM8400 is not set 912# CONFIG_MFD_WM8400 is not set
952# CONFIG_MFD_WM8350_I2C is not set 913# CONFIG_MFD_WM8350_I2C is not set
914# CONFIG_REGULATOR is not set
953 915
954# 916#
955# Multimedia devices 917# Multimedia devices
@@ -1000,6 +962,7 @@ CONFIG_FB_BFIN_T350MCQB=y
1000# CONFIG_FB_S1D13XXX is not set 962# CONFIG_FB_S1D13XXX is not set
1001# CONFIG_FB_VIRTUAL is not set 963# CONFIG_FB_VIRTUAL is not set
1002# CONFIG_FB_METRONOME is not set 964# CONFIG_FB_METRONOME is not set
965# CONFIG_FB_MB862XX is not set
1003CONFIG_BACKLIGHT_LCD_SUPPORT=y 966CONFIG_BACKLIGHT_LCD_SUPPORT=y
1004CONFIG_LCD_CLASS_DEVICE=m 967CONFIG_LCD_CLASS_DEVICE=m
1005CONFIG_LCD_LTV350QV=m 968CONFIG_LCD_LTV350QV=m
@@ -1152,13 +1115,15 @@ CONFIG_USB_MUSB_HDRC=y
1152CONFIG_USB_MUSB_SOC=y 1115CONFIG_USB_MUSB_SOC=y
1153 1116
1154# 1117#
1155# Blackfin high speed USB support 1118# Blackfin high speed USB Support
1156# 1119#
1157CONFIG_USB_MUSB_HOST=y 1120CONFIG_USB_MUSB_HOST=y
1158# CONFIG_USB_MUSB_PERIPHERAL is not set 1121# CONFIG_USB_MUSB_PERIPHERAL is not set
1159# CONFIG_USB_MUSB_OTG is not set 1122# CONFIG_USB_MUSB_OTG is not set
1123# CONFIG_USB_GADGET_MUSB_HDRC is not set
1160CONFIG_USB_MUSB_HDRC_HCD=y 1124CONFIG_USB_MUSB_HDRC_HCD=y
1161CONFIG_MUSB_PIO_ONLY=y 1125CONFIG_MUSB_PIO_ONLY=y
1126CONFIG_MUSB_DMA_POLL=y
1162# CONFIG_USB_MUSB_DEBUG is not set 1127# CONFIG_USB_MUSB_DEBUG is not set
1163 1128
1164# 1129#
@@ -1170,18 +1135,33 @@ CONFIG_MUSB_PIO_ONLY=y
1170# CONFIG_USB_TMC is not set 1135# CONFIG_USB_TMC is not set
1171 1136
1172# 1137#
1173# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1138# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1174# 1139#
1175 1140
1176# 1141#
1177# may also be needed; see USB_STORAGE Help for more information 1142# see USB_STORAGE Help for more information
1178# 1143#
1144CONFIG_USB_STORAGE=m
1145# CONFIG_USB_STORAGE_DEBUG is not set
1146# CONFIG_USB_STORAGE_DATAFAB is not set
1147# CONFIG_USB_STORAGE_FREECOM is not set
1148# CONFIG_USB_STORAGE_ISD200 is not set
1149# CONFIG_USB_STORAGE_DPCM is not set
1150# CONFIG_USB_STORAGE_USBAT is not set
1151# CONFIG_USB_STORAGE_SDDR09 is not set
1152# CONFIG_USB_STORAGE_SDDR55 is not set
1153# CONFIG_USB_STORAGE_JUMPSHOT is not set
1154# CONFIG_USB_STORAGE_ALAUDA is not set
1155# CONFIG_USB_STORAGE_ONETOUCH is not set
1156# CONFIG_USB_STORAGE_KARMA is not set
1157# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1179# CONFIG_USB_LIBUSUAL is not set 1158# CONFIG_USB_LIBUSUAL is not set
1180 1159
1181# 1160#
1182# USB Imaging devices 1161# USB Imaging devices
1183# 1162#
1184# CONFIG_USB_MDC800 is not set 1163# CONFIG_USB_MDC800 is not set
1164# CONFIG_USB_MICROTEK is not set
1185 1165
1186# 1166#
1187# USB port drivers 1167# USB port drivers
@@ -1213,6 +1193,30 @@ CONFIG_MUSB_PIO_ONLY=y
1213# CONFIG_USB_ISIGHTFW is not set 1193# CONFIG_USB_ISIGHTFW is not set
1214# CONFIG_USB_VST is not set 1194# CONFIG_USB_VST is not set
1215# CONFIG_USB_GADGET is not set 1195# CONFIG_USB_GADGET is not set
1196# CONFIG_USB_GADGET_AT91 is not set
1197# CONFIG_USB_GADGET_ATMEL_USBA is not set
1198# CONFIG_USB_GADGET_FSL_USB2 is not set
1199# CONFIG_USB_GADGET_LH7A40X is not set
1200# CONFIG_USB_GADGET_OMAP is not set
1201# CONFIG_USB_GADGET_PXA25X is not set
1202# CONFIG_USB_GADGET_PXA27X is not set
1203# CONFIG_USB_GADGET_S3C2410 is not set
1204# CONFIG_USB_GADGET_M66592 is not set
1205# CONFIG_USB_GADGET_AMD5536UDC is not set
1206# CONFIG_USB_GADGET_FSL_QE is not set
1207# CONFIG_USB_GADGET_NET2272 is not set
1208# CONFIG_USB_GADGET_NET2280 is not set
1209# CONFIG_USB_GADGET_GOKU is not set
1210# CONFIG_USB_GADGET_DUMMY_HCD is not set
1211# CONFIG_USB_ZERO is not set
1212# CONFIG_USB_AUDIO is not set
1213# CONFIG_USB_ETH is not set
1214# CONFIG_USB_GADGETFS is not set
1215# CONFIG_USB_FILE_STORAGE is not set
1216# CONFIG_USB_G_SERIAL is not set
1217# CONFIG_USB_MIDI_GADGET is not set
1218# CONFIG_USB_G_PRINTER is not set
1219# CONFIG_USB_CDC_COMPOSITE is not set
1216# CONFIG_MMC is not set 1220# CONFIG_MMC is not set
1217# CONFIG_MEMSTICK is not set 1221# CONFIG_MEMSTICK is not set
1218# CONFIG_NEW_LEDS is not set 1222# CONFIG_NEW_LEDS is not set
@@ -1247,12 +1251,14 @@ CONFIG_RTC_INTF_DEV=y
1247# CONFIG_RTC_DRV_M41T80 is not set 1251# CONFIG_RTC_DRV_M41T80 is not set
1248# CONFIG_RTC_DRV_S35390A is not set 1252# CONFIG_RTC_DRV_S35390A is not set
1249# CONFIG_RTC_DRV_FM3130 is not set 1253# CONFIG_RTC_DRV_FM3130 is not set
1254# CONFIG_RTC_DRV_RX8581 is not set
1250 1255
1251# 1256#
1252# SPI RTC drivers 1257# SPI RTC drivers
1253# 1258#
1254# CONFIG_RTC_DRV_M41T94 is not set 1259# CONFIG_RTC_DRV_M41T94 is not set
1255# CONFIG_RTC_DRV_DS1305 is not set 1260# CONFIG_RTC_DRV_DS1305 is not set
1261# CONFIG_RTC_DRV_DS1390 is not set
1256# CONFIG_RTC_DRV_MAX6902 is not set 1262# CONFIG_RTC_DRV_MAX6902 is not set
1257# CONFIG_RTC_DRV_R9701 is not set 1263# CONFIG_RTC_DRV_R9701 is not set
1258# CONFIG_RTC_DRV_RS5C348 is not set 1264# CONFIG_RTC_DRV_RS5C348 is not set
@@ -1473,6 +1479,13 @@ CONFIG_DEBUG_INFO=y
1473# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1479# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1474# CONFIG_FAULT_INJECTION is not set 1480# CONFIG_FAULT_INJECTION is not set
1475# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1481# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1482
1483#
1484# Tracers
1485#
1486# CONFIG_SCHED_TRACER is not set
1487# CONFIG_CONTEXT_SWITCH_TRACER is not set
1488# CONFIG_BOOT_TRACER is not set
1476# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1489# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1477# CONFIG_SAMPLES is not set 1490# CONFIG_SAMPLES is not set
1478CONFIG_HAVE_ARCH_KGDB=y 1491CONFIG_HAVE_ARCH_KGDB=y
@@ -1512,6 +1525,7 @@ CONFIG_CRYPTO=y
1512# 1525#
1513# CONFIG_CRYPTO_FIPS is not set 1526# CONFIG_CRYPTO_FIPS is not set
1514# CONFIG_CRYPTO_MANAGER is not set 1527# CONFIG_CRYPTO_MANAGER is not set
1528# CONFIG_CRYPTO_MANAGER2 is not set
1515# CONFIG_CRYPTO_GF128MUL is not set 1529# CONFIG_CRYPTO_GF128MUL is not set
1516# CONFIG_CRYPTO_NULL is not set 1530# CONFIG_CRYPTO_NULL is not set
1517# CONFIG_CRYPTO_CRYPTD is not set 1531# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 0a2a00d63887..4c41e03efe0f 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28.7
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -36,14 +36,13 @@ CONFIG_IKCONFIG_PROC=y
36CONFIG_LOG_BUF_SHIFT=14 36CONFIG_LOG_BUF_SHIFT=14
37# CONFIG_CGROUPS is not set 37# CONFIG_CGROUPS is not set
38# CONFIG_GROUP_SCHED is not set 38# CONFIG_GROUP_SCHED is not set
39# CONFIG_SYSFS_DEPRECATED is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 39# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 40# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 41# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 42CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 43CONFIG_INITRAMFS_SOURCE=""
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 45# CONFIG_SYSCTL is not set
47CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
48CONFIG_UID16=y 47CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y 48CONFIG_SYSCTL_SYSCALL=y
@@ -56,13 +55,13 @@ CONFIG_BUG=y
56# CONFIG_ELF_CORE is not set 55# CONFIG_ELF_CORE is not set
57CONFIG_COMPAT_BRK=y 56CONFIG_COMPAT_BRK=y
58CONFIG_BASE_FULL=y 57CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y 58# CONFIG_FUTEX is not set
60CONFIG_ANON_INODES=y 59CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y 60CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y 61CONFIG_SIGNALFD=y
63CONFIG_TIMERFD=y 62CONFIG_TIMERFD=y
64CONFIG_EVENTFD=y 63CONFIG_EVENTFD=y
65CONFIG_AIO=y 64# CONFIG_AIO is not set
66CONFIG_VM_EVENT_COUNTERS=y 65CONFIG_VM_EVENT_COUNTERS=y
67CONFIG_SLAB=y 66CONFIG_SLAB=y
68# CONFIG_SLUB is not set 67# CONFIG_SLUB is not set
@@ -133,10 +132,15 @@ CONFIG_BF533=y
133# CONFIG_BF538 is not set 132# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 133# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 134# CONFIG_BF542 is not set
135# CONFIG_BF542M is not set
136# CONFIG_BF544 is not set 136# CONFIG_BF544 is not set
137# CONFIG_BF544M is not set
137# CONFIG_BF547 is not set 138# CONFIG_BF547 is not set
139# CONFIG_BF547M is not set
138# CONFIG_BF548 is not set 140# CONFIG_BF548 is not set
141# CONFIG_BF548M is not set
139# CONFIG_BF549 is not set 142# CONFIG_BF549 is not set
143# CONFIG_BF549M is not set
140# CONFIG_BF561 is not set 144# CONFIG_BF561 is not set
141CONFIG_BF_REV_MIN=3 145CONFIG_BF_REV_MIN=3
142CONFIG_BF_REV_MAX=6 146CONFIG_BF_REV_MAX=6
@@ -157,7 +161,6 @@ CONFIG_BFIN533_EZKIT=y
157# CONFIG_BFIN533_BLUETECHNIX_CM is not set 161# CONFIG_BFIN533_BLUETECHNIX_CM is not set
158# CONFIG_H8606_HVSISTEMAS is not set 162# CONFIG_H8606_HVSISTEMAS is not set
159# CONFIG_BFIN532_IP0X is not set 163# CONFIG_BFIN532_IP0X is not set
160# CONFIG_GENERIC_BF533_BOARD is not set
161 164
162# 165#
163# BF533/2/1 Specific Configuration 166# BF533/2/1 Specific Configuration
@@ -277,7 +280,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
277# CONFIG_PHYS_ADDR_T_64BIT is not set 280# CONFIG_PHYS_ADDR_T_64BIT is not set
278CONFIG_ZONE_DMA_FLAG=1 281CONFIG_ZONE_DMA_FLAG=1
279CONFIG_VIRT_TO_BUS=y 282CONFIG_VIRT_TO_BUS=y
280# CONFIG_BFIN_GPTIMERS is not set 283CONFIG_BFIN_GPTIMERS=m
281# CONFIG_DMA_UNCACHED_4M is not set 284# CONFIG_DMA_UNCACHED_4M is not set
282# CONFIG_DMA_UNCACHED_2M is not set 285# CONFIG_DMA_UNCACHED_2M is not set
283CONFIG_DMA_UNCACHED_1M=y 286CONFIG_DMA_UNCACHED_1M=y
@@ -575,6 +578,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
575CONFIG_MISC_DEVICES=y 578CONFIG_MISC_DEVICES=y
576# CONFIG_EEPROM_93CX6 is not set 579# CONFIG_EEPROM_93CX6 is not set
577# CONFIG_ENCLOSURE_SERVICES is not set 580# CONFIG_ENCLOSURE_SERVICES is not set
581# CONFIG_C2PORT is not set
578CONFIG_HAVE_IDE=y 582CONFIG_HAVE_IDE=y
579# CONFIG_IDE is not set 583# CONFIG_IDE is not set
580 584
@@ -608,6 +612,7 @@ CONFIG_SMC91X=y
608# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 612# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
609# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 613# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
610# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 614# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
615# CONFIG_B44 is not set
611CONFIG_NETDEV_1000=y 616CONFIG_NETDEV_1000=y
612# CONFIG_AX88180 is not set 617# CONFIG_AX88180 is not set
613CONFIG_NETDEV_10000=y 618CONFIG_NETDEV_10000=y
@@ -714,6 +719,7 @@ CONFIG_SPI_MASTER=y
714# 719#
715CONFIG_SPI_BFIN=y 720CONFIG_SPI_BFIN=y
716# CONFIG_SPI_BFIN_LOCK is not set 721# CONFIG_SPI_BFIN_LOCK is not set
722# CONFIG_SPI_BFIN_SPORT is not set
717# CONFIG_SPI_BITBANG is not set 723# CONFIG_SPI_BITBANG is not set
718 724
719# 725#
@@ -726,22 +732,7 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
726# CONFIG_GPIOLIB is not set 732# CONFIG_GPIOLIB is not set
727# CONFIG_W1 is not set 733# CONFIG_W1 is not set
728# CONFIG_POWER_SUPPLY is not set 734# CONFIG_POWER_SUPPLY is not set
729CONFIG_HWMON=y 735# CONFIG_HWMON is not set
730# CONFIG_HWMON_VID is not set
731# CONFIG_SENSORS_ADCXX is not set
732# CONFIG_SENSORS_F71805F is not set
733# CONFIG_SENSORS_F71882FG is not set
734# CONFIG_SENSORS_IT87 is not set
735# CONFIG_SENSORS_LM70 is not set
736# CONFIG_SENSORS_MAX1111 is not set
737# CONFIG_SENSORS_PC87360 is not set
738# CONFIG_SENSORS_PC87427 is not set
739# CONFIG_SENSORS_SMSC47M1 is not set
740# CONFIG_SENSORS_SMSC47B397 is not set
741# CONFIG_SENSORS_VT1211 is not set
742# CONFIG_SENSORS_W83627HF is not set
743# CONFIG_SENSORS_W83627EHF is not set
744# CONFIG_HWMON_DEBUG_CHIP is not set
745# CONFIG_THERMAL is not set 736# CONFIG_THERMAL is not set
746# CONFIG_THERMAL_HWMON is not set 737# CONFIG_THERMAL_HWMON is not set
747CONFIG_WATCHDOG=y 738CONFIG_WATCHDOG=y
@@ -752,6 +743,12 @@ CONFIG_WATCHDOG=y
752# 743#
753# CONFIG_SOFT_WATCHDOG is not set 744# CONFIG_SOFT_WATCHDOG is not set
754CONFIG_BFIN_WDT=y 745CONFIG_BFIN_WDT=y
746CONFIG_SSB_POSSIBLE=y
747
748#
749# Sonics Silicon Backplane
750#
751# CONFIG_SSB is not set
755 752
756# 753#
757# Multifunction device drivers 754# Multifunction device drivers
@@ -760,7 +757,7 @@ CONFIG_BFIN_WDT=y
760# CONFIG_MFD_SM501 is not set 757# CONFIG_MFD_SM501 is not set
761# CONFIG_HTC_PASIC3 is not set 758# CONFIG_HTC_PASIC3 is not set
762# CONFIG_MFD_TMIO is not set 759# CONFIG_MFD_TMIO is not set
763# CONFIG_MFD_WM8400 is not set 760# CONFIG_REGULATOR is not set
764 761
765# 762#
766# Multimedia devices 763# Multimedia devices
@@ -826,6 +823,7 @@ CONFIG_RTC_INTF_DEV=y
826# 823#
827# CONFIG_RTC_DRV_M41T94 is not set 824# CONFIG_RTC_DRV_M41T94 is not set
828# CONFIG_RTC_DRV_DS1305 is not set 825# CONFIG_RTC_DRV_DS1305 is not set
826# CONFIG_RTC_DRV_DS1390 is not set
829# CONFIG_RTC_DRV_MAX6902 is not set 827# CONFIG_RTC_DRV_MAX6902 is not set
830# CONFIG_RTC_DRV_R9701 is not set 828# CONFIG_RTC_DRV_R9701 is not set
831# CONFIG_RTC_DRV_RS5C348 is not set 829# CONFIG_RTC_DRV_RS5C348 is not set
@@ -1046,6 +1044,13 @@ CONFIG_DEBUG_INFO=y
1046# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1044# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1047# CONFIG_FAULT_INJECTION is not set 1045# CONFIG_FAULT_INJECTION is not set
1048# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1046# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1047
1048#
1049# Tracers
1050#
1051# CONFIG_SCHED_TRACER is not set
1052# CONFIG_CONTEXT_SWITCH_TRACER is not set
1053# CONFIG_BOOT_TRACER is not set
1049# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1054# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1050# CONFIG_SAMPLES is not set 1055# CONFIG_SAMPLES is not set
1051CONFIG_HAVE_ARCH_KGDB=y 1056CONFIG_HAVE_ARCH_KGDB=y
@@ -1084,6 +1089,7 @@ CONFIG_CRYPTO=y
1084# 1089#
1085# CONFIG_CRYPTO_FIPS is not set 1090# CONFIG_CRYPTO_FIPS is not set
1086# CONFIG_CRYPTO_MANAGER is not set 1091# CONFIG_CRYPTO_MANAGER is not set
1092# CONFIG_CRYPTO_MANAGER2 is not set
1087# CONFIG_CRYPTO_GF128MUL is not set 1093# CONFIG_CRYPTO_GF128MUL is not set
1088# CONFIG_CRYPTO_NULL is not set 1094# CONFIG_CRYPTO_NULL is not set
1089# CONFIG_CRYPTO_CRYPTD is not set 1095# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index eb027587a355..9c482cd1b343 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28.7
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -36,14 +36,13 @@ CONFIG_IKCONFIG_PROC=y
36CONFIG_LOG_BUF_SHIFT=14 36CONFIG_LOG_BUF_SHIFT=14
37# CONFIG_CGROUPS is not set 37# CONFIG_CGROUPS is not set
38# CONFIG_GROUP_SCHED is not set 38# CONFIG_GROUP_SCHED is not set
39# CONFIG_SYSFS_DEPRECATED is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 39# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 40# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 41# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 42CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 43CONFIG_INITRAMFS_SOURCE=""
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 45# CONFIG_SYSCTL is not set
47CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
48CONFIG_UID16=y 47CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y 48CONFIG_SYSCTL_SYSCALL=y
@@ -56,13 +55,13 @@ CONFIG_BUG=y
56# CONFIG_ELF_CORE is not set 55# CONFIG_ELF_CORE is not set
57CONFIG_COMPAT_BRK=y 56CONFIG_COMPAT_BRK=y
58CONFIG_BASE_FULL=y 57CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y 58# CONFIG_FUTEX is not set
60CONFIG_ANON_INODES=y 59CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y 60CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y 61CONFIG_SIGNALFD=y
63CONFIG_TIMERFD=y 62CONFIG_TIMERFD=y
64CONFIG_EVENTFD=y 63CONFIG_EVENTFD=y
65CONFIG_AIO=y 64# CONFIG_AIO is not set
66CONFIG_VM_EVENT_COUNTERS=y 65CONFIG_VM_EVENT_COUNTERS=y
67CONFIG_SLAB=y 66CONFIG_SLAB=y
68# CONFIG_SLUB is not set 67# CONFIG_SLUB is not set
@@ -133,10 +132,15 @@ CONFIG_BF533=y
133# CONFIG_BF538 is not set 132# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 133# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 134# CONFIG_BF542 is not set
135# CONFIG_BF542M is not set
136# CONFIG_BF544 is not set 136# CONFIG_BF544 is not set
137# CONFIG_BF544M is not set
137# CONFIG_BF547 is not set 138# CONFIG_BF547 is not set
139# CONFIG_BF547M is not set
138# CONFIG_BF548 is not set 140# CONFIG_BF548 is not set
141# CONFIG_BF548M is not set
139# CONFIG_BF549 is not set 142# CONFIG_BF549 is not set
143# CONFIG_BF549M is not set
140# CONFIG_BF561 is not set 144# CONFIG_BF561 is not set
141CONFIG_BF_REV_MIN=3 145CONFIG_BF_REV_MIN=3
142CONFIG_BF_REV_MAX=6 146CONFIG_BF_REV_MAX=6
@@ -157,7 +161,6 @@ CONFIG_BFIN533_STAMP=y
157# CONFIG_BFIN533_BLUETECHNIX_CM is not set 161# CONFIG_BFIN533_BLUETECHNIX_CM is not set
158# CONFIG_H8606_HVSISTEMAS is not set 162# CONFIG_H8606_HVSISTEMAS is not set
159# CONFIG_BFIN532_IP0X is not set 163# CONFIG_BFIN532_IP0X is not set
160# CONFIG_GENERIC_BF533_BOARD is not set
161 164
162# 165#
163# BF533/2/1 Specific Configuration 166# BF533/2/1 Specific Configuration
@@ -277,7 +280,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
277# CONFIG_PHYS_ADDR_T_64BIT is not set 280# CONFIG_PHYS_ADDR_T_64BIT is not set
278CONFIG_ZONE_DMA_FLAG=1 281CONFIG_ZONE_DMA_FLAG=1
279CONFIG_VIRT_TO_BUS=y 282CONFIG_VIRT_TO_BUS=y
280# CONFIG_BFIN_GPTIMERS is not set 283CONFIG_BFIN_GPTIMERS=m
281# CONFIG_DMA_UNCACHED_4M is not set 284# CONFIG_DMA_UNCACHED_4M is not set
282# CONFIG_DMA_UNCACHED_2M is not set 285# CONFIG_DMA_UNCACHED_2M is not set
283CONFIG_DMA_UNCACHED_1M=y 286CONFIG_DMA_UNCACHED_1M=y
@@ -578,7 +581,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
578# CONFIG_BLK_DEV_HD is not set 581# CONFIG_BLK_DEV_HD is not set
579CONFIG_MISC_DEVICES=y 582CONFIG_MISC_DEVICES=y
580# CONFIG_EEPROM_93CX6 is not set 583# CONFIG_EEPROM_93CX6 is not set
584# CONFIG_ICS932S401 is not set
581# CONFIG_ENCLOSURE_SERVICES is not set 585# CONFIG_ENCLOSURE_SERVICES is not set
586# CONFIG_C2PORT is not set
582CONFIG_HAVE_IDE=y 587CONFIG_HAVE_IDE=y
583# CONFIG_IDE is not set 588# CONFIG_IDE is not set
584 589
@@ -612,6 +617,7 @@ CONFIG_SMC91X=y
612# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 617# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
613# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 618# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
614# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 619# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
620# CONFIG_B44 is not set
615CONFIG_NETDEV_1000=y 621CONFIG_NETDEV_1000=y
616# CONFIG_AX88180 is not set 622# CONFIG_AX88180 is not set
617CONFIG_NETDEV_10000=y 623CONFIG_NETDEV_10000=y
@@ -671,10 +677,10 @@ CONFIG_CONFIG_INPUT_PCF8574=m
671# CONFIG_SPI_ADC_BF533 is not set 677# CONFIG_SPI_ADC_BF533 is not set
672# CONFIG_BF5xx_PPIFCD is not set 678# CONFIG_BF5xx_PPIFCD is not set
673# CONFIG_BFIN_SIMPLE_TIMER is not set 679# CONFIG_BFIN_SIMPLE_TIMER is not set
674# CONFIG_BF5xx_PPI is not set 680CONFIG_BF5xx_PPI=m
675CONFIG_BFIN_SPORT=y 681CONFIG_BFIN_SPORT=m
676# CONFIG_BFIN_TIMER_LATENCY is not set 682# CONFIG_BFIN_TIMER_LATENCY is not set
677CONFIG_TWI_LCD=m 683# CONFIG_TWI_LCD is not set
678CONFIG_BFIN_DMA_INTERFACE=m 684CONFIG_BFIN_DMA_INTERFACE=m
679CONFIG_SIMPLE_GPIO=m 685CONFIG_SIMPLE_GPIO=m
680# CONFIG_VT is not set 686# CONFIG_VT is not set
@@ -765,6 +771,7 @@ CONFIG_SPI_MASTER=y
765# 771#
766CONFIG_SPI_BFIN=y 772CONFIG_SPI_BFIN=y
767# CONFIG_SPI_BFIN_LOCK is not set 773# CONFIG_SPI_BFIN_LOCK is not set
774# CONFIG_SPI_BFIN_SPORT is not set
768# CONFIG_SPI_BITBANG is not set 775# CONFIG_SPI_BITBANG is not set
769 776
770# 777#
@@ -777,60 +784,7 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
777# CONFIG_GPIOLIB is not set 784# CONFIG_GPIOLIB is not set
778# CONFIG_W1 is not set 785# CONFIG_W1 is not set
779# CONFIG_POWER_SUPPLY is not set 786# CONFIG_POWER_SUPPLY is not set
780CONFIG_HWMON=y 787# CONFIG_HWMON is not set
781# CONFIG_HWMON_VID is not set
782# CONFIG_SENSORS_AD7414 is not set
783# CONFIG_SENSORS_AD7418 is not set
784# CONFIG_SENSORS_ADCXX is not set
785# CONFIG_SENSORS_ADM1021 is not set
786# CONFIG_SENSORS_ADM1025 is not set
787# CONFIG_SENSORS_ADM1026 is not set
788# CONFIG_SENSORS_ADM1029 is not set
789# CONFIG_SENSORS_ADM1031 is not set
790# CONFIG_SENSORS_ADM9240 is not set
791# CONFIG_SENSORS_ADT7470 is not set
792# CONFIG_SENSORS_ADT7473 is not set
793# CONFIG_SENSORS_ATXP1 is not set
794# CONFIG_SENSORS_DS1621 is not set
795# CONFIG_SENSORS_F71805F is not set
796# CONFIG_SENSORS_F71882FG is not set
797# CONFIG_SENSORS_F75375S is not set
798# CONFIG_SENSORS_GL518SM is not set
799# CONFIG_SENSORS_GL520SM is not set
800# CONFIG_SENSORS_IT87 is not set
801# CONFIG_SENSORS_LM63 is not set
802# CONFIG_SENSORS_LM70 is not set
803# CONFIG_SENSORS_LM75 is not set
804# CONFIG_SENSORS_LM77 is not set
805# CONFIG_SENSORS_LM78 is not set
806# CONFIG_SENSORS_LM80 is not set
807# CONFIG_SENSORS_LM83 is not set
808# CONFIG_SENSORS_LM85 is not set
809# CONFIG_SENSORS_LM87 is not set
810# CONFIG_SENSORS_LM90 is not set
811# CONFIG_SENSORS_LM92 is not set
812# CONFIG_SENSORS_LM93 is not set
813# CONFIG_SENSORS_MAX1111 is not set
814# CONFIG_SENSORS_MAX1619 is not set
815# CONFIG_SENSORS_MAX6650 is not set
816# CONFIG_SENSORS_PC87360 is not set
817# CONFIG_SENSORS_PC87427 is not set
818# CONFIG_SENSORS_DME1737 is not set
819# CONFIG_SENSORS_SMSC47M1 is not set
820# CONFIG_SENSORS_SMSC47M192 is not set
821# CONFIG_SENSORS_SMSC47B397 is not set
822# CONFIG_SENSORS_ADS7828 is not set
823# CONFIG_SENSORS_THMC50 is not set
824# CONFIG_SENSORS_VT1211 is not set
825# CONFIG_SENSORS_W83781D is not set
826# CONFIG_SENSORS_W83791D is not set
827# CONFIG_SENSORS_W83792D is not set
828# CONFIG_SENSORS_W83793 is not set
829# CONFIG_SENSORS_W83L785TS is not set
830# CONFIG_SENSORS_W83L786NG is not set
831# CONFIG_SENSORS_W83627HF is not set
832# CONFIG_SENSORS_W83627EHF is not set
833# CONFIG_HWMON_DEBUG_CHIP is not set
834# CONFIG_THERMAL is not set 788# CONFIG_THERMAL is not set
835# CONFIG_THERMAL_HWMON is not set 789# CONFIG_THERMAL_HWMON is not set
836CONFIG_WATCHDOG=y 790CONFIG_WATCHDOG=y
@@ -841,6 +795,12 @@ CONFIG_WATCHDOG=y
841# 795#
842# CONFIG_SOFT_WATCHDOG is not set 796# CONFIG_SOFT_WATCHDOG is not set
843CONFIG_BFIN_WDT=y 797CONFIG_BFIN_WDT=y
798CONFIG_SSB_POSSIBLE=y
799
800#
801# Sonics Silicon Backplane
802#
803# CONFIG_SSB is not set
844 804
845# 805#
846# Multifunction device drivers 806# Multifunction device drivers
@@ -851,6 +811,7 @@ CONFIG_BFIN_WDT=y
851# CONFIG_MFD_TMIO is not set 811# CONFIG_MFD_TMIO is not set
852# CONFIG_MFD_WM8400 is not set 812# CONFIG_MFD_WM8400 is not set
853# CONFIG_MFD_WM8350_I2C is not set 813# CONFIG_MFD_WM8350_I2C is not set
814# CONFIG_REGULATOR is not set
854 815
855# 816#
856# Multimedia devices 817# Multimedia devices
@@ -909,6 +870,7 @@ CONFIG_ADV7393_1XMEM=y
909# CONFIG_FB_S1D13XXX is not set 870# CONFIG_FB_S1D13XXX is not set
910# CONFIG_FB_VIRTUAL is not set 871# CONFIG_FB_VIRTUAL is not set
911# CONFIG_FB_METRONOME is not set 872# CONFIG_FB_METRONOME is not set
873# CONFIG_FB_MB862XX is not set
912# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 874# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
913 875
914# 876#
@@ -1018,12 +980,14 @@ CONFIG_RTC_INTF_DEV=y
1018# CONFIG_RTC_DRV_M41T80 is not set 980# CONFIG_RTC_DRV_M41T80 is not set
1019# CONFIG_RTC_DRV_S35390A is not set 981# CONFIG_RTC_DRV_S35390A is not set
1020# CONFIG_RTC_DRV_FM3130 is not set 982# CONFIG_RTC_DRV_FM3130 is not set
983# CONFIG_RTC_DRV_RX8581 is not set
1021 984
1022# 985#
1023# SPI RTC drivers 986# SPI RTC drivers
1024# 987#
1025# CONFIG_RTC_DRV_M41T94 is not set 988# CONFIG_RTC_DRV_M41T94 is not set
1026# CONFIG_RTC_DRV_DS1305 is not set 989# CONFIG_RTC_DRV_DS1305 is not set
990# CONFIG_RTC_DRV_DS1390 is not set
1027# CONFIG_RTC_DRV_MAX6902 is not set 991# CONFIG_RTC_DRV_MAX6902 is not set
1028# CONFIG_RTC_DRV_R9701 is not set 992# CONFIG_RTC_DRV_R9701 is not set
1029# CONFIG_RTC_DRV_RS5C348 is not set 993# CONFIG_RTC_DRV_RS5C348 is not set
@@ -1244,6 +1208,13 @@ CONFIG_DEBUG_INFO=y
1244# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1208# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1245# CONFIG_FAULT_INJECTION is not set 1209# CONFIG_FAULT_INJECTION is not set
1246# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1210# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1211
1212#
1213# Tracers
1214#
1215# CONFIG_SCHED_TRACER is not set
1216# CONFIG_CONTEXT_SWITCH_TRACER is not set
1217# CONFIG_BOOT_TRACER is not set
1247# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1218# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1248# CONFIG_SAMPLES is not set 1219# CONFIG_SAMPLES is not set
1249CONFIG_HAVE_ARCH_KGDB=y 1220CONFIG_HAVE_ARCH_KGDB=y
@@ -1282,6 +1253,7 @@ CONFIG_CRYPTO=y
1282# 1253#
1283# CONFIG_CRYPTO_FIPS is not set 1254# CONFIG_CRYPTO_FIPS is not set
1284# CONFIG_CRYPTO_MANAGER is not set 1255# CONFIG_CRYPTO_MANAGER is not set
1256# CONFIG_CRYPTO_MANAGER2 is not set
1285# CONFIG_CRYPTO_GF128MUL is not set 1257# CONFIG_CRYPTO_GF128MUL is not set
1286# CONFIG_CRYPTO_NULL is not set 1258# CONFIG_CRYPTO_NULL is not set
1287# CONFIG_CRYPTO_CRYPTD is not set 1259# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 9e62b9f40eb1..591f6edda4f7 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -1,7 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28.7
4# Tue Dec 30 17:24:37 2008
5# 4#
6# CONFIG_MMU is not set 5# CONFIG_MMU is not set
7# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -37,14 +36,13 @@ CONFIG_IKCONFIG_PROC=y
37CONFIG_LOG_BUF_SHIFT=14 36CONFIG_LOG_BUF_SHIFT=14
38# CONFIG_CGROUPS is not set 37# CONFIG_CGROUPS is not set
39# CONFIG_GROUP_SCHED is not set 38# CONFIG_GROUP_SCHED is not set
40# CONFIG_SYSFS_DEPRECATED is not set
41# CONFIG_SYSFS_DEPRECATED_V2 is not set 39# CONFIG_SYSFS_DEPRECATED_V2 is not set
42# CONFIG_RELAY is not set 40# CONFIG_RELAY is not set
43# CONFIG_NAMESPACES is not set 41# CONFIG_NAMESPACES is not set
44CONFIG_BLK_DEV_INITRD=y 42CONFIG_BLK_DEV_INITRD=y
45CONFIG_INITRAMFS_SOURCE="" 43CONFIG_INITRAMFS_SOURCE=""
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SYSCTL=y 45# CONFIG_SYSCTL is not set
48CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
49CONFIG_UID16=y 47CONFIG_UID16=y
50CONFIG_SYSCTL_SYSCALL=y 48CONFIG_SYSCTL_SYSCALL=y
@@ -57,13 +55,13 @@ CONFIG_BUG=y
57# CONFIG_ELF_CORE is not set 55# CONFIG_ELF_CORE is not set
58CONFIG_COMPAT_BRK=y 56CONFIG_COMPAT_BRK=y
59CONFIG_BASE_FULL=y 57CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 58# CONFIG_FUTEX is not set
61CONFIG_ANON_INODES=y 59CONFIG_ANON_INODES=y
62CONFIG_EPOLL=y 60CONFIG_EPOLL=y
63CONFIG_SIGNALFD=y 61CONFIG_SIGNALFD=y
64CONFIG_TIMERFD=y 62CONFIG_TIMERFD=y
65CONFIG_EVENTFD=y 63CONFIG_EVENTFD=y
66CONFIG_AIO=y 64# CONFIG_AIO is not set
67CONFIG_VM_EVENT_COUNTERS=y 65CONFIG_VM_EVENT_COUNTERS=y
68CONFIG_SLAB=y 66CONFIG_SLAB=y
69# CONFIG_SLUB is not set 67# CONFIG_SLUB is not set
@@ -134,10 +132,15 @@ CONFIG_BF537=y
134# CONFIG_BF538 is not set 132# CONFIG_BF538 is not set
135# CONFIG_BF539 is not set 133# CONFIG_BF539 is not set
136# CONFIG_BF542 is not set 134# CONFIG_BF542 is not set
135# CONFIG_BF542M is not set
137# CONFIG_BF544 is not set 136# CONFIG_BF544 is not set
137# CONFIG_BF544M is not set
138# CONFIG_BF547 is not set 138# CONFIG_BF547 is not set
139# CONFIG_BF547M is not set
139# CONFIG_BF548 is not set 140# CONFIG_BF548 is not set
141# CONFIG_BF548M is not set
140# CONFIG_BF549 is not set 142# CONFIG_BF549 is not set
143# CONFIG_BF549M is not set
141# CONFIG_BF561 is not set 144# CONFIG_BF561 is not set
142CONFIG_BF_REV_MIN=2 145CONFIG_BF_REV_MIN=2
143CONFIG_BF_REV_MAX=3 146CONFIG_BF_REV_MAX=3
@@ -184,7 +187,6 @@ CONFIG_BFIN537_STAMP=y
184# CONFIG_BFIN537_BLUETECHNIX_TCM is not set 187# CONFIG_BFIN537_BLUETECHNIX_TCM is not set
185# CONFIG_PNAV10 is not set 188# CONFIG_PNAV10 is not set
186# CONFIG_CAMSIG_MINOTAUR is not set 189# CONFIG_CAMSIG_MINOTAUR is not set
187# CONFIG_GENERIC_BF537_BOARD is not set
188 190
189# 191#
190# BF537 Specific Configuration 192# BF537 Specific Configuration
@@ -589,7 +591,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
589# CONFIG_BLK_DEV_HD is not set 591# CONFIG_BLK_DEV_HD is not set
590CONFIG_MISC_DEVICES=y 592CONFIG_MISC_DEVICES=y
591# CONFIG_EEPROM_93CX6 is not set 593# CONFIG_EEPROM_93CX6 is not set
594# CONFIG_ICS932S401 is not set
592# CONFIG_ENCLOSURE_SERVICES is not set 595# CONFIG_ENCLOSURE_SERVICES is not set
596# CONFIG_C2PORT is not set
593CONFIG_HAVE_IDE=y 597CONFIG_HAVE_IDE=y
594# CONFIG_IDE is not set 598# CONFIG_IDE is not set
595 599
@@ -644,6 +648,7 @@ CONFIG_BFIN_RX_DESC_NUM=20
644# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 648# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
645# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 649# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
646# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 650# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
651# CONFIG_B44 is not set
647CONFIG_NETDEV_1000=y 652CONFIG_NETDEV_1000=y
648# CONFIG_AX88180 is not set 653# CONFIG_AX88180 is not set
649CONFIG_NETDEV_10000=y 654CONFIG_NETDEV_10000=y
@@ -706,10 +711,10 @@ CONFIG_SERIO_LIBPS2=y
706# CONFIG_SPI_ADC_BF533 is not set 711# CONFIG_SPI_ADC_BF533 is not set
707# CONFIG_BF5xx_PPIFCD is not set 712# CONFIG_BF5xx_PPIFCD is not set
708# CONFIG_BFIN_SIMPLE_TIMER is not set 713# CONFIG_BFIN_SIMPLE_TIMER is not set
709# CONFIG_BF5xx_PPI is not set 714CONFIG_BF5xx_PPI=m
710CONFIG_BFIN_SPORT=m 715CONFIG_BFIN_SPORT=m
711# CONFIG_BFIN_TIMER_LATENCY is not set 716# CONFIG_BFIN_TIMER_LATENCY is not set
712CONFIG_TWI_LCD=m 717# CONFIG_TWI_LCD is not set
713CONFIG_BFIN_DMA_INTERFACE=m 718CONFIG_BFIN_DMA_INTERFACE=m
714CONFIG_SIMPLE_GPIO=m 719CONFIG_SIMPLE_GPIO=m
715# CONFIG_VT is not set 720# CONFIG_VT is not set
@@ -808,6 +813,7 @@ CONFIG_SPI_MASTER=y
808# 813#
809CONFIG_SPI_BFIN=y 814CONFIG_SPI_BFIN=y
810# CONFIG_SPI_BFIN_LOCK is not set 815# CONFIG_SPI_BFIN_LOCK is not set
816# CONFIG_SPI_BFIN_SPORT is not set
811# CONFIG_SPI_BITBANG is not set 817# CONFIG_SPI_BITBANG is not set
812 818
813# 819#
@@ -820,60 +826,7 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
820# CONFIG_GPIOLIB is not set 826# CONFIG_GPIOLIB is not set
821# CONFIG_W1 is not set 827# CONFIG_W1 is not set
822# CONFIG_POWER_SUPPLY is not set 828# CONFIG_POWER_SUPPLY is not set
823CONFIG_HWMON=y 829# CONFIG_HWMON is not set
824# CONFIG_HWMON_VID is not set
825# CONFIG_SENSORS_AD7414 is not set
826# CONFIG_SENSORS_AD7418 is not set
827# CONFIG_SENSORS_ADCXX is not set
828# CONFIG_SENSORS_ADM1021 is not set
829# CONFIG_SENSORS_ADM1025 is not set
830# CONFIG_SENSORS_ADM1026 is not set
831# CONFIG_SENSORS_ADM1029 is not set
832# CONFIG_SENSORS_ADM1031 is not set
833# CONFIG_SENSORS_ADM9240 is not set
834# CONFIG_SENSORS_ADT7470 is not set
835# CONFIG_SENSORS_ADT7473 is not set
836# CONFIG_SENSORS_ATXP1 is not set
837# CONFIG_SENSORS_DS1621 is not set
838# CONFIG_SENSORS_F71805F is not set
839# CONFIG_SENSORS_F71882FG is not set
840# CONFIG_SENSORS_F75375S is not set
841# CONFIG_SENSORS_GL518SM is not set
842# CONFIG_SENSORS_GL520SM is not set
843# CONFIG_SENSORS_IT87 is not set
844# CONFIG_SENSORS_LM63 is not set
845# CONFIG_SENSORS_LM70 is not set
846# CONFIG_SENSORS_LM75 is not set
847# CONFIG_SENSORS_LM77 is not set
848# CONFIG_SENSORS_LM78 is not set
849# CONFIG_SENSORS_LM80 is not set
850# CONFIG_SENSORS_LM83 is not set
851# CONFIG_SENSORS_LM85 is not set
852# CONFIG_SENSORS_LM87 is not set
853# CONFIG_SENSORS_LM90 is not set
854# CONFIG_SENSORS_LM92 is not set
855# CONFIG_SENSORS_LM93 is not set
856# CONFIG_SENSORS_MAX1111 is not set
857# CONFIG_SENSORS_MAX1619 is not set
858# CONFIG_SENSORS_MAX6650 is not set
859# CONFIG_SENSORS_PC87360 is not set
860# CONFIG_SENSORS_PC87427 is not set
861# CONFIG_SENSORS_DME1737 is not set
862# CONFIG_SENSORS_SMSC47M1 is not set
863# CONFIG_SENSORS_SMSC47M192 is not set
864# CONFIG_SENSORS_SMSC47B397 is not set
865# CONFIG_SENSORS_ADS7828 is not set
866# CONFIG_SENSORS_THMC50 is not set
867# CONFIG_SENSORS_VT1211 is not set
868# CONFIG_SENSORS_W83781D is not set
869# CONFIG_SENSORS_W83791D is not set
870# CONFIG_SENSORS_W83792D is not set
871# CONFIG_SENSORS_W83793 is not set
872# CONFIG_SENSORS_W83L785TS is not set
873# CONFIG_SENSORS_W83L786NG is not set
874# CONFIG_SENSORS_W83627HF is not set
875# CONFIG_SENSORS_W83627EHF is not set
876# CONFIG_HWMON_DEBUG_CHIP is not set
877# CONFIG_THERMAL is not set 830# CONFIG_THERMAL is not set
878# CONFIG_THERMAL_HWMON is not set 831# CONFIG_THERMAL_HWMON is not set
879CONFIG_WATCHDOG=y 832CONFIG_WATCHDOG=y
@@ -884,6 +837,12 @@ CONFIG_WATCHDOG=y
884# 837#
885# CONFIG_SOFT_WATCHDOG is not set 838# CONFIG_SOFT_WATCHDOG is not set
886CONFIG_BFIN_WDT=y 839CONFIG_BFIN_WDT=y
840CONFIG_SSB_POSSIBLE=y
841
842#
843# Sonics Silicon Backplane
844#
845# CONFIG_SSB is not set
887 846
888# 847#
889# Multifunction device drivers 848# Multifunction device drivers
@@ -894,6 +853,7 @@ CONFIG_BFIN_WDT=y
894# CONFIG_MFD_TMIO is not set 853# CONFIG_MFD_TMIO is not set
895# CONFIG_MFD_WM8400 is not set 854# CONFIG_MFD_WM8400 is not set
896# CONFIG_MFD_WM8350_I2C is not set 855# CONFIG_MFD_WM8350_I2C is not set
856# CONFIG_REGULATOR is not set
897 857
898# 858#
899# Multimedia devices 859# Multimedia devices
@@ -957,6 +917,7 @@ CONFIG_ADV7393_1XMEM=y
957# CONFIG_FB_S1D13XXX is not set 917# CONFIG_FB_S1D13XXX is not set
958# CONFIG_FB_VIRTUAL is not set 918# CONFIG_FB_VIRTUAL is not set
959# CONFIG_FB_METRONOME is not set 919# CONFIG_FB_METRONOME is not set
920# CONFIG_FB_MB862XX is not set
960CONFIG_BACKLIGHT_LCD_SUPPORT=y 921CONFIG_BACKLIGHT_LCD_SUPPORT=y
961CONFIG_LCD_CLASS_DEVICE=m 922CONFIG_LCD_CLASS_DEVICE=m
962# CONFIG_LCD_LTV350QV is not set 923# CONFIG_LCD_LTV350QV is not set
@@ -1074,12 +1035,14 @@ CONFIG_RTC_INTF_DEV=y
1074# CONFIG_RTC_DRV_M41T80 is not set 1035# CONFIG_RTC_DRV_M41T80 is not set
1075# CONFIG_RTC_DRV_S35390A is not set 1036# CONFIG_RTC_DRV_S35390A is not set
1076# CONFIG_RTC_DRV_FM3130 is not set 1037# CONFIG_RTC_DRV_FM3130 is not set
1038# CONFIG_RTC_DRV_RX8581 is not set
1077 1039
1078# 1040#
1079# SPI RTC drivers 1041# SPI RTC drivers
1080# 1042#
1081# CONFIG_RTC_DRV_M41T94 is not set 1043# CONFIG_RTC_DRV_M41T94 is not set
1082# CONFIG_RTC_DRV_DS1305 is not set 1044# CONFIG_RTC_DRV_DS1305 is not set
1045# CONFIG_RTC_DRV_DS1390 is not set
1083# CONFIG_RTC_DRV_MAX6902 is not set 1046# CONFIG_RTC_DRV_MAX6902 is not set
1084# CONFIG_RTC_DRV_R9701 is not set 1047# CONFIG_RTC_DRV_R9701 is not set
1085# CONFIG_RTC_DRV_RS5C348 is not set 1048# CONFIG_RTC_DRV_RS5C348 is not set
@@ -1300,6 +1263,13 @@ CONFIG_DEBUG_INFO=y
1300# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1263# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1301# CONFIG_FAULT_INJECTION is not set 1264# CONFIG_FAULT_INJECTION is not set
1302# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1265# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1266
1267#
1268# Tracers
1269#
1270# CONFIG_SCHED_TRACER is not set
1271# CONFIG_CONTEXT_SWITCH_TRACER is not set
1272# CONFIG_BOOT_TRACER is not set
1303# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1273# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1304# CONFIG_SAMPLES is not set 1274# CONFIG_SAMPLES is not set
1305CONFIG_HAVE_ARCH_KGDB=y 1275CONFIG_HAVE_ARCH_KGDB=y
@@ -1338,6 +1308,7 @@ CONFIG_CRYPTO=y
1338# 1308#
1339# CONFIG_CRYPTO_FIPS is not set 1309# CONFIG_CRYPTO_FIPS is not set
1340# CONFIG_CRYPTO_MANAGER is not set 1310# CONFIG_CRYPTO_MANAGER is not set
1311# CONFIG_CRYPTO_MANAGER2 is not set
1341# CONFIG_CRYPTO_GF128MUL is not set 1312# CONFIG_CRYPTO_GF128MUL is not set
1342# CONFIG_CRYPTO_NULL is not set 1313# CONFIG_CRYPTO_NULL is not set
1343# CONFIG_CRYPTO_CRYPTD is not set 1314# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig
index dd6ad6be1c87..1a8e8c3adf98 100644
--- a/arch/blackfin/configs/BF538-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF538-EZKIT_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28.7
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -42,7 +42,7 @@ CONFIG_LOG_BUF_SHIFT=14
42CONFIG_BLK_DEV_INITRD=y 42CONFIG_BLK_DEV_INITRD=y
43CONFIG_INITRAMFS_SOURCE="" 43CONFIG_INITRAMFS_SOURCE=""
44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
45CONFIG_SYSCTL=y 45# CONFIG_SYSCTL is not set
46CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
47CONFIG_UID16=y 47CONFIG_UID16=y
48CONFIG_SYSCTL_SYSCALL=y 48CONFIG_SYSCTL_SYSCALL=y
@@ -55,13 +55,13 @@ CONFIG_BUG=y
55# CONFIG_ELF_CORE is not set 55# CONFIG_ELF_CORE is not set
56CONFIG_COMPAT_BRK=y 56CONFIG_COMPAT_BRK=y
57CONFIG_BASE_FULL=y 57CONFIG_BASE_FULL=y
58CONFIG_FUTEX=y 58# CONFIG_FUTEX is not set
59CONFIG_ANON_INODES=y 59CONFIG_ANON_INODES=y
60CONFIG_EPOLL=y 60CONFIG_EPOLL=y
61CONFIG_SIGNALFD=y 61CONFIG_SIGNALFD=y
62CONFIG_TIMERFD=y 62CONFIG_TIMERFD=y
63CONFIG_EVENTFD=y 63CONFIG_EVENTFD=y
64CONFIG_AIO=y 64# CONFIG_AIO is not set
65CONFIG_VM_EVENT_COUNTERS=y 65CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_SLAB=y 66CONFIG_SLAB=y
67# CONFIG_SLUB is not set 67# CONFIG_SLUB is not set
@@ -132,10 +132,15 @@ CONFIG_PREEMPT_VOLUNTARY=y
132CONFIG_BF538=y 132CONFIG_BF538=y
133# CONFIG_BF539 is not set 133# CONFIG_BF539 is not set
134# CONFIG_BF542 is not set 134# CONFIG_BF542 is not set
135# CONFIG_BF542M is not set
135# CONFIG_BF544 is not set 136# CONFIG_BF544 is not set
137# CONFIG_BF544M is not set
136# CONFIG_BF547 is not set 138# CONFIG_BF547 is not set
139# CONFIG_BF547M is not set
137# CONFIG_BF548 is not set 140# CONFIG_BF548 is not set
141# CONFIG_BF548M is not set
138# CONFIG_BF549 is not set 142# CONFIG_BF549 is not set
143# CONFIG_BF549M is not set
139# CONFIG_BF561 is not set 144# CONFIG_BF561 is not set
140CONFIG_BF_REV_MIN=4 145CONFIG_BF_REV_MIN=4
141CONFIG_BF_REV_MAX=5 146CONFIG_BF_REV_MAX=5
@@ -293,7 +298,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
293# CONFIG_PHYS_ADDR_T_64BIT is not set 298# CONFIG_PHYS_ADDR_T_64BIT is not set
294CONFIG_ZONE_DMA_FLAG=1 299CONFIG_ZONE_DMA_FLAG=1
295CONFIG_VIRT_TO_BUS=y 300CONFIG_VIRT_TO_BUS=y
296CONFIG_BFIN_GPTIMERS=y 301CONFIG_BFIN_GPTIMERS=m
297# CONFIG_DMA_UNCACHED_4M is not set 302# CONFIG_DMA_UNCACHED_4M is not set
298# CONFIG_DMA_UNCACHED_2M is not set 303# CONFIG_DMA_UNCACHED_2M is not set
299CONFIG_DMA_UNCACHED_1M=y 304CONFIG_DMA_UNCACHED_1M=y
@@ -354,7 +359,6 @@ CONFIG_BINFMT_ZFLAT=y
354# 359#
355# CONFIG_PM is not set 360# CONFIG_PM is not set
356CONFIG_ARCH_SUSPEND_POSSIBLE=y 361CONFIG_ARCH_SUSPEND_POSSIBLE=y
357# CONFIG_PM_WAKEUP_BY_GPIO is not set
358 362
359# 363#
360# CPU Frequency scaling 364# CPU Frequency scaling
@@ -645,6 +649,7 @@ CONFIG_SMC91X=y
645# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 649# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
646# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 650# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
647# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 651# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
652# CONFIG_B44 is not set
648# CONFIG_NETDEV_1000 is not set 653# CONFIG_NETDEV_1000 is not set
649# CONFIG_NETDEV_10000 is not set 654# CONFIG_NETDEV_10000 is not set
650 655
@@ -690,7 +695,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
690# CONFIG_TOUCHSCREEN_AD7877 is not set 695# CONFIG_TOUCHSCREEN_AD7877 is not set
691# CONFIG_TOUCHSCREEN_AD7879_I2C is not set 696# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
692CONFIG_TOUCHSCREEN_AD7879_SPI=y 697CONFIG_TOUCHSCREEN_AD7879_SPI=y
693CONFIG_TOUCHSCREEN_AD7879=m 698CONFIG_TOUCHSCREEN_AD7879=y
694# CONFIG_TOUCHSCREEN_FUJITSU is not set 699# CONFIG_TOUCHSCREEN_FUJITSU is not set
695# CONFIG_TOUCHSCREEN_GUNZE is not set 700# CONFIG_TOUCHSCREEN_GUNZE is not set
696# CONFIG_TOUCHSCREEN_ELO is not set 701# CONFIG_TOUCHSCREEN_ELO is not set
@@ -718,8 +723,8 @@ CONFIG_INPUT_MISC=y
718# CONFIG_SPI_ADC_BF533 is not set 723# CONFIG_SPI_ADC_BF533 is not set
719# CONFIG_BF5xx_PPIFCD is not set 724# CONFIG_BF5xx_PPIFCD is not set
720# CONFIG_BFIN_SIMPLE_TIMER is not set 725# CONFIG_BFIN_SIMPLE_TIMER is not set
721# CONFIG_BF5xx_PPI is not set 726CONFIG_BF5xx_PPI=m
722CONFIG_BFIN_SPORT=y 727CONFIG_BFIN_SPORT=m
723# CONFIG_BFIN_TIMER_LATENCY is not set 728# CONFIG_BFIN_TIMER_LATENCY is not set
724# CONFIG_TWI_LCD is not set 729# CONFIG_TWI_LCD is not set
725CONFIG_BFIN_DMA_INTERFACE=m 730CONFIG_BFIN_DMA_INTERFACE=m
@@ -762,7 +767,7 @@ CONFIG_UNIX98_PTYS=y
762# CONFIG_R3964 is not set 767# CONFIG_R3964 is not set
763# CONFIG_RAW_DRIVER is not set 768# CONFIG_RAW_DRIVER is not set
764# CONFIG_TCG_TPM is not set 769# CONFIG_TCG_TPM is not set
765CONFIG_I2C=y 770CONFIG_I2C=m
766CONFIG_I2C_BOARDINFO=y 771CONFIG_I2C_BOARDINFO=y
767# CONFIG_I2C_CHARDEV is not set 772# CONFIG_I2C_CHARDEV is not set
768CONFIG_I2C_HELPER_AUTO=y 773CONFIG_I2C_HELPER_AUTO=y
@@ -774,7 +779,7 @@ CONFIG_I2C_HELPER_AUTO=y
774# 779#
775# I2C system bus drivers (mostly embedded / system-on-chip) 780# I2C system bus drivers (mostly embedded / system-on-chip)
776# 781#
777CONFIG_I2C_BLACKFIN_TWI=y 782CONFIG_I2C_BLACKFIN_TWI=m
778CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100 783CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
779# CONFIG_I2C_GPIO is not set 784# CONFIG_I2C_GPIO is not set
780# CONFIG_I2C_OCORES is not set 785# CONFIG_I2C_OCORES is not set
@@ -818,6 +823,7 @@ CONFIG_SPI_MASTER=y
818# 823#
819CONFIG_SPI_BFIN=y 824CONFIG_SPI_BFIN=y
820# CONFIG_SPI_BFIN_LOCK is not set 825# CONFIG_SPI_BFIN_LOCK is not set
826# CONFIG_SPI_BFIN_SPORT is not set
821# CONFIG_SPI_BITBANG is not set 827# CONFIG_SPI_BITBANG is not set
822 828
823# 829#
@@ -830,60 +836,7 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
830# CONFIG_GPIOLIB is not set 836# CONFIG_GPIOLIB is not set
831# CONFIG_W1 is not set 837# CONFIG_W1 is not set
832# CONFIG_POWER_SUPPLY is not set 838# CONFIG_POWER_SUPPLY is not set
833CONFIG_HWMON=y 839# CONFIG_HWMON is not set
834# CONFIG_HWMON_VID is not set
835# CONFIG_SENSORS_AD7414 is not set
836# CONFIG_SENSORS_AD7418 is not set
837# CONFIG_SENSORS_ADCXX is not set
838# CONFIG_SENSORS_ADM1021 is not set
839# CONFIG_SENSORS_ADM1025 is not set
840# CONFIG_SENSORS_ADM1026 is not set
841# CONFIG_SENSORS_ADM1029 is not set
842# CONFIG_SENSORS_ADM1031 is not set
843# CONFIG_SENSORS_ADM9240 is not set
844# CONFIG_SENSORS_ADT7470 is not set
845# CONFIG_SENSORS_ADT7473 is not set
846# CONFIG_SENSORS_ATXP1 is not set
847# CONFIG_SENSORS_DS1621 is not set
848# CONFIG_SENSORS_F71805F is not set
849# CONFIG_SENSORS_F71882FG is not set
850# CONFIG_SENSORS_F75375S is not set
851# CONFIG_SENSORS_GL518SM is not set
852# CONFIG_SENSORS_GL520SM is not set
853# CONFIG_SENSORS_IT87 is not set
854# CONFIG_SENSORS_LM63 is not set
855# CONFIG_SENSORS_LM70 is not set
856# CONFIG_SENSORS_LM75 is not set
857# CONFIG_SENSORS_LM77 is not set
858# CONFIG_SENSORS_LM78 is not set
859# CONFIG_SENSORS_LM80 is not set
860# CONFIG_SENSORS_LM83 is not set
861# CONFIG_SENSORS_LM85 is not set
862# CONFIG_SENSORS_LM87 is not set
863# CONFIG_SENSORS_LM90 is not set
864# CONFIG_SENSORS_LM92 is not set
865# CONFIG_SENSORS_LM93 is not set
866# CONFIG_SENSORS_MAX1111 is not set
867# CONFIG_SENSORS_MAX1619 is not set
868# CONFIG_SENSORS_MAX6650 is not set
869# CONFIG_SENSORS_PC87360 is not set
870# CONFIG_SENSORS_PC87427 is not set
871# CONFIG_SENSORS_DME1737 is not set
872# CONFIG_SENSORS_SMSC47M1 is not set
873# CONFIG_SENSORS_SMSC47M192 is not set
874# CONFIG_SENSORS_SMSC47B397 is not set
875# CONFIG_SENSORS_ADS7828 is not set
876# CONFIG_SENSORS_THMC50 is not set
877# CONFIG_SENSORS_VT1211 is not set
878# CONFIG_SENSORS_W83781D is not set
879# CONFIG_SENSORS_W83791D is not set
880# CONFIG_SENSORS_W83792D is not set
881# CONFIG_SENSORS_W83793 is not set
882# CONFIG_SENSORS_W83L785TS is not set
883# CONFIG_SENSORS_W83L786NG is not set
884# CONFIG_SENSORS_W83627HF is not set
885# CONFIG_SENSORS_W83627EHF is not set
886# CONFIG_HWMON_DEBUG_CHIP is not set
887# CONFIG_THERMAL is not set 840# CONFIG_THERMAL is not set
888# CONFIG_THERMAL_HWMON is not set 841# CONFIG_THERMAL_HWMON is not set
889CONFIG_WATCHDOG=y 842CONFIG_WATCHDOG=y
@@ -894,6 +847,12 @@ CONFIG_WATCHDOG=y
894# 847#
895# CONFIG_SOFT_WATCHDOG is not set 848# CONFIG_SOFT_WATCHDOG is not set
896CONFIG_BFIN_WDT=y 849CONFIG_BFIN_WDT=y
850CONFIG_SSB_POSSIBLE=y
851
852#
853# Sonics Silicon Backplane
854#
855# CONFIG_SSB is not set
897 856
898# 857#
899# Multifunction device drivers 858# Multifunction device drivers
@@ -904,6 +863,7 @@ CONFIG_BFIN_WDT=y
904# CONFIG_MFD_TMIO is not set 863# CONFIG_MFD_TMIO is not set
905# CONFIG_MFD_WM8400 is not set 864# CONFIG_MFD_WM8400 is not set
906# CONFIG_MFD_WM8350_I2C is not set 865# CONFIG_MFD_WM8350_I2C is not set
866# CONFIG_REGULATOR is not set
907 867
908# 868#
909# Multimedia devices 869# Multimedia devices
@@ -954,6 +914,7 @@ CONFIG_FB_BFIN_LQ035Q1=m
954# CONFIG_FB_S1D13XXX is not set 914# CONFIG_FB_S1D13XXX is not set
955# CONFIG_FB_VIRTUAL is not set 915# CONFIG_FB_VIRTUAL is not set
956# CONFIG_FB_METRONOME is not set 916# CONFIG_FB_METRONOME is not set
917# CONFIG_FB_MB862XX is not set
957# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 918# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
958 919
959# 920#
@@ -1007,12 +968,14 @@ CONFIG_RTC_INTF_DEV=y
1007# CONFIG_RTC_DRV_M41T80 is not set 968# CONFIG_RTC_DRV_M41T80 is not set
1008# CONFIG_RTC_DRV_S35390A is not set 969# CONFIG_RTC_DRV_S35390A is not set
1009# CONFIG_RTC_DRV_FM3130 is not set 970# CONFIG_RTC_DRV_FM3130 is not set
971# CONFIG_RTC_DRV_RX8581 is not set
1010 972
1011# 973#
1012# SPI RTC drivers 974# SPI RTC drivers
1013# 975#
1014# CONFIG_RTC_DRV_M41T94 is not set 976# CONFIG_RTC_DRV_M41T94 is not set
1015# CONFIG_RTC_DRV_DS1305 is not set 977# CONFIG_RTC_DRV_DS1305 is not set
978# CONFIG_RTC_DRV_DS1390 is not set
1016# CONFIG_RTC_DRV_MAX6902 is not set 979# CONFIG_RTC_DRV_MAX6902 is not set
1017# CONFIG_RTC_DRV_R9701 is not set 980# CONFIG_RTC_DRV_R9701 is not set
1018# CONFIG_RTC_DRV_RS5C348 is not set 981# CONFIG_RTC_DRV_RS5C348 is not set
@@ -1233,6 +1196,13 @@ CONFIG_DEBUG_INFO=y
1233# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1196# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1234# CONFIG_FAULT_INJECTION is not set 1197# CONFIG_FAULT_INJECTION is not set
1235CONFIG_SYSCTL_SYSCALL_CHECK=y 1198CONFIG_SYSCTL_SYSCALL_CHECK=y
1199
1200#
1201# Tracers
1202#
1203# CONFIG_SCHED_TRACER is not set
1204# CONFIG_CONTEXT_SWITCH_TRACER is not set
1205# CONFIG_BOOT_TRACER is not set
1236# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1206# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1237# CONFIG_SAMPLES is not set 1207# CONFIG_SAMPLES is not set
1238CONFIG_HAVE_ARCH_KGDB=y 1208CONFIG_HAVE_ARCH_KGDB=y
@@ -1271,6 +1241,7 @@ CONFIG_CRYPTO=y
1271# 1241#
1272# CONFIG_CRYPTO_FIPS is not set 1242# CONFIG_CRYPTO_FIPS is not set
1273# CONFIG_CRYPTO_MANAGER is not set 1243# CONFIG_CRYPTO_MANAGER is not set
1244# CONFIG_CRYPTO_MANAGER2 is not set
1274# CONFIG_CRYPTO_GF128MUL is not set 1245# CONFIG_CRYPTO_GF128MUL is not set
1275# CONFIG_CRYPTO_NULL is not set 1246# CONFIG_CRYPTO_NULL is not set
1276# CONFIG_CRYPTO_CRYPTD is not set 1247# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index 6bc2fb1b2a70..2cd1c2b218d7 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28.7
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -36,14 +36,13 @@ CONFIG_IKCONFIG_PROC=y
36CONFIG_LOG_BUF_SHIFT=14 36CONFIG_LOG_BUF_SHIFT=14
37# CONFIG_CGROUPS is not set 37# CONFIG_CGROUPS is not set
38# CONFIG_GROUP_SCHED is not set 38# CONFIG_GROUP_SCHED is not set
39# CONFIG_SYSFS_DEPRECATED is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 39# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 40# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 41# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 42CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 43CONFIG_INITRAMFS_SOURCE=""
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 45# CONFIG_SYSCTL is not set
47CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
48CONFIG_UID16=y 47CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y 48CONFIG_SYSCTL_SYSCALL=y
@@ -56,13 +55,13 @@ CONFIG_BUG=y
56# CONFIG_ELF_CORE is not set 55# CONFIG_ELF_CORE is not set
57CONFIG_COMPAT_BRK=y 56CONFIG_COMPAT_BRK=y
58CONFIG_BASE_FULL=y 57CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y 58# CONFIG_FUTEX is not set
60CONFIG_ANON_INODES=y 59CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y 60CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y 61CONFIG_SIGNALFD=y
63CONFIG_TIMERFD=y 62CONFIG_TIMERFD=y
64CONFIG_EVENTFD=y 63CONFIG_EVENTFD=y
65CONFIG_AIO=y 64# CONFIG_AIO is not set
66CONFIG_VM_EVENT_COUNTERS=y 65CONFIG_VM_EVENT_COUNTERS=y
67CONFIG_SLAB=y 66CONFIG_SLAB=y
68# CONFIG_SLUB is not set 67# CONFIG_SLUB is not set
@@ -133,16 +132,21 @@ CONFIG_PREEMPT_VOLUNTARY=y
133# CONFIG_BF538 is not set 132# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 133# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 134# CONFIG_BF542 is not set
135# CONFIG_BF542M is not set
136# CONFIG_BF544 is not set 136# CONFIG_BF544 is not set
137# CONFIG_BF544M is not set
137# CONFIG_BF547 is not set 138# CONFIG_BF547 is not set
139# CONFIG_BF547M is not set
138CONFIG_BF548=y 140CONFIG_BF548=y
141# CONFIG_BF548M is not set
139# CONFIG_BF549 is not set 142# CONFIG_BF549 is not set
143# CONFIG_BF549M is not set
140# CONFIG_BF561 is not set 144# CONFIG_BF561 is not set
141CONFIG_BF_REV_MIN=0 145CONFIG_BF_REV_MIN=0
142CONFIG_BF_REV_MAX=2 146CONFIG_BF_REV_MAX=2
143CONFIG_BF_REV_0_0=y 147# CONFIG_BF_REV_0_0 is not set
144# CONFIG_BF_REV_0_1 is not set 148# CONFIG_BF_REV_0_1 is not set
145# CONFIG_BF_REV_0_2 is not set 149CONFIG_BF_REV_0_2=y
146# CONFIG_BF_REV_0_3 is not set 150# CONFIG_BF_REV_0_3 is not set
147# CONFIG_BF_REV_0_4 is not set 151# CONFIG_BF_REV_0_4 is not set
148# CONFIG_BF_REV_0_5 is not set 152# CONFIG_BF_REV_0_5 is not set
@@ -348,7 +352,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
348# CONFIG_PHYS_ADDR_T_64BIT is not set 352# CONFIG_PHYS_ADDR_T_64BIT is not set
349CONFIG_ZONE_DMA_FLAG=1 353CONFIG_ZONE_DMA_FLAG=1
350CONFIG_VIRT_TO_BUS=y 354CONFIG_VIRT_TO_BUS=y
351# CONFIG_BFIN_GPTIMERS is not set 355CONFIG_BFIN_GPTIMERS=m
352# CONFIG_DMA_UNCACHED_4M is not set 356# CONFIG_DMA_UNCACHED_4M is not set
353CONFIG_DMA_UNCACHED_2M=y 357CONFIG_DMA_UNCACHED_2M=y
354# CONFIG_DMA_UNCACHED_1M is not set 358# CONFIG_DMA_UNCACHED_1M is not set
@@ -413,7 +417,6 @@ CONFIG_BINFMT_ZFLAT=y
413# 417#
414# CONFIG_PM is not set 418# CONFIG_PM is not set
415CONFIG_ARCH_SUSPEND_POSSIBLE=y 419CONFIG_ARCH_SUSPEND_POSSIBLE=y
416# CONFIG_PM_WAKEUP_BY_GPIO is not set
417 420
418# 421#
419# CPU Frequency scaling 422# CPU Frequency scaling
@@ -512,9 +515,9 @@ CONFIG_IRCOMM=m
512# 515#
513CONFIG_IRTTY_SIR=m 516CONFIG_IRTTY_SIR=m
514CONFIG_BFIN_SIR=m 517CONFIG_BFIN_SIR=m
515CONFIG_BFIN_SIR3=y
516# CONFIG_BFIN_SIR0 is not set 518# CONFIG_BFIN_SIR0 is not set
517# CONFIG_BFIN_SIR2 is not set 519# CONFIG_BFIN_SIR2 is not set
520CONFIG_BFIN_SIR3=y
518CONFIG_SIR_BFIN_DMA=y 521CONFIG_SIR_BFIN_DMA=y
519# CONFIG_SIR_BFIN_PIO is not set 522# CONFIG_SIR_BFIN_PIO is not set
520 523
@@ -538,7 +541,8 @@ CONFIG_SIR_BFIN_DMA=y
538CONFIG_WIRELESS=y 541CONFIG_WIRELESS=y
539# CONFIG_CFG80211 is not set 542# CONFIG_CFG80211 is not set
540CONFIG_WIRELESS_OLD_REGULATORY=y 543CONFIG_WIRELESS_OLD_REGULATORY=y
541# CONFIG_WIRELESS_EXT is not set 544CONFIG_WIRELESS_EXT=y
545CONFIG_WIRELESS_EXT_SYSFS=y
542# CONFIG_MAC80211 is not set 546# CONFIG_MAC80211 is not set
543# CONFIG_IEEE80211 is not set 547# CONFIG_IEEE80211 is not set
544# CONFIG_RFKILL is not set 548# CONFIG_RFKILL is not set
@@ -554,7 +558,9 @@ CONFIG_WIRELESS_OLD_REGULATORY=y
554CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 558CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
555CONFIG_STANDALONE=y 559CONFIG_STANDALONE=y
556CONFIG_PREVENT_FIRMWARE_BUILD=y 560CONFIG_PREVENT_FIRMWARE_BUILD=y
557# CONFIG_FW_LOADER is not set 561CONFIG_FW_LOADER=m
562CONFIG_FIRMWARE_IN_KERNEL=y
563CONFIG_EXTRA_FIRMWARE=""
558# CONFIG_DEBUG_DRIVER is not set 564# CONFIG_DEBUG_DRIVER is not set
559# CONFIG_DEBUG_DEVRES is not set 565# CONFIG_DEBUG_DEVRES is not set
560# CONFIG_SYS_HYPERVISOR is not set 566# CONFIG_SYS_HYPERVISOR is not set
@@ -668,7 +674,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
668# CONFIG_BLK_DEV_HD is not set 674# CONFIG_BLK_DEV_HD is not set
669CONFIG_MISC_DEVICES=y 675CONFIG_MISC_DEVICES=y
670# CONFIG_EEPROM_93CX6 is not set 676# CONFIG_EEPROM_93CX6 is not set
677# CONFIG_ICS932S401 is not set
671# CONFIG_ENCLOSURE_SERVICES is not set 678# CONFIG_ENCLOSURE_SERVICES is not set
679# CONFIG_C2PORT is not set
672CONFIG_HAVE_IDE=y 680CONFIG_HAVE_IDE=y
673# CONFIG_IDE is not set 681# CONFIG_IDE is not set
674 682
@@ -743,6 +751,7 @@ CONFIG_SMSC911X=y
743# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 751# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
744# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 752# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
745# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 753# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
754# CONFIG_B44 is not set
746CONFIG_NETDEV_1000=y 755CONFIG_NETDEV_1000=y
747# CONFIG_AX88180 is not set 756# CONFIG_AX88180 is not set
748CONFIG_NETDEV_10000=y 757CONFIG_NETDEV_10000=y
@@ -751,8 +760,16 @@ CONFIG_NETDEV_10000=y
751# Wireless LAN 760# Wireless LAN
752# 761#
753# CONFIG_WLAN_PRE80211 is not set 762# CONFIG_WLAN_PRE80211 is not set
754# CONFIG_WLAN_80211 is not set 763CONFIG_WLAN_80211=y
764CONFIG_LIBERTAS=m
765# CONFIG_LIBERTAS_USB is not set
766CONFIG_LIBERTAS_SDIO=m
767CONFIG_POWEROF2_BLOCKSIZE_ONLY=y
768# CONFIG_LIBERTAS_DEBUG is not set
769# CONFIG_USB_ZD1201 is not set
770# CONFIG_USB_NET_RNDIS_WLAN is not set
755# CONFIG_IWLWIFI_LEDS is not set 771# CONFIG_IWLWIFI_LEDS is not set
772# CONFIG_HOSTAP is not set
756 773
757# 774#
758# USB Network Adapters 775# USB Network Adapters
@@ -844,8 +861,8 @@ CONFIG_INPUT_MISC=y
844# CONFIG_SPI_ADC_BF533 is not set 861# CONFIG_SPI_ADC_BF533 is not set
845# CONFIG_BF5xx_PPIFCD is not set 862# CONFIG_BF5xx_PPIFCD is not set
846# CONFIG_BFIN_SIMPLE_TIMER is not set 863# CONFIG_BFIN_SIMPLE_TIMER is not set
847# CONFIG_BF5xx_PPI is not set 864CONFIG_BF5xx_PPI=m
848# CONFIG_BFIN_SPORT is not set 865CONFIG_BFIN_SPORT=m
849# CONFIG_BFIN_TIMER_LATENCY is not set 866# CONFIG_BFIN_TIMER_LATENCY is not set
850# CONFIG_TWI_LCD is not set 867# CONFIG_TWI_LCD is not set
851CONFIG_BFIN_DMA_INTERFACE=m 868CONFIG_BFIN_DMA_INTERFACE=m
@@ -950,6 +967,7 @@ CONFIG_SPI_MASTER=y
950# 967#
951CONFIG_SPI_BFIN=y 968CONFIG_SPI_BFIN=y
952# CONFIG_SPI_BFIN_LOCK is not set 969# CONFIG_SPI_BFIN_LOCK is not set
970# CONFIG_SPI_BFIN_SPORT is not set
953# CONFIG_SPI_BITBANG is not set 971# CONFIG_SPI_BITBANG is not set
954 972
955# 973#
@@ -962,60 +980,7 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
962# CONFIG_GPIOLIB is not set 980# CONFIG_GPIOLIB is not set
963# CONFIG_W1 is not set 981# CONFIG_W1 is not set
964# CONFIG_POWER_SUPPLY is not set 982# CONFIG_POWER_SUPPLY is not set
965CONFIG_HWMON=y 983# CONFIG_HWMON is not set
966# CONFIG_HWMON_VID is not set
967# CONFIG_SENSORS_AD7414 is not set
968# CONFIG_SENSORS_AD7418 is not set
969# CONFIG_SENSORS_ADCXX is not set
970# CONFIG_SENSORS_ADM1021 is not set
971# CONFIG_SENSORS_ADM1025 is not set
972# CONFIG_SENSORS_ADM1026 is not set
973# CONFIG_SENSORS_ADM1029 is not set
974# CONFIG_SENSORS_ADM1031 is not set
975# CONFIG_SENSORS_ADM9240 is not set
976# CONFIG_SENSORS_ADT7470 is not set
977# CONFIG_SENSORS_ADT7473 is not set
978# CONFIG_SENSORS_ATXP1 is not set
979# CONFIG_SENSORS_DS1621 is not set
980# CONFIG_SENSORS_F71805F is not set
981# CONFIG_SENSORS_F71882FG is not set
982# CONFIG_SENSORS_F75375S is not set
983# CONFIG_SENSORS_GL518SM is not set
984# CONFIG_SENSORS_GL520SM is not set
985# CONFIG_SENSORS_IT87 is not set
986# CONFIG_SENSORS_LM63 is not set
987# CONFIG_SENSORS_LM70 is not set
988# CONFIG_SENSORS_LM75 is not set
989# CONFIG_SENSORS_LM77 is not set
990# CONFIG_SENSORS_LM78 is not set
991# CONFIG_SENSORS_LM80 is not set
992# CONFIG_SENSORS_LM83 is not set
993# CONFIG_SENSORS_LM85 is not set
994# CONFIG_SENSORS_LM87 is not set
995# CONFIG_SENSORS_LM90 is not set
996# CONFIG_SENSORS_LM92 is not set
997# CONFIG_SENSORS_LM93 is not set
998# CONFIG_SENSORS_MAX1111 is not set
999# CONFIG_SENSORS_MAX1619 is not set
1000# CONFIG_SENSORS_MAX6650 is not set
1001# CONFIG_SENSORS_PC87360 is not set
1002# CONFIG_SENSORS_PC87427 is not set
1003# CONFIG_SENSORS_DME1737 is not set
1004# CONFIG_SENSORS_SMSC47M1 is not set
1005# CONFIG_SENSORS_SMSC47M192 is not set
1006# CONFIG_SENSORS_SMSC47B397 is not set
1007# CONFIG_SENSORS_ADS7828 is not set
1008# CONFIG_SENSORS_THMC50 is not set
1009# CONFIG_SENSORS_VT1211 is not set
1010# CONFIG_SENSORS_W83781D is not set
1011# CONFIG_SENSORS_W83791D is not set
1012# CONFIG_SENSORS_W83792D is not set
1013# CONFIG_SENSORS_W83793 is not set
1014# CONFIG_SENSORS_W83L785TS is not set
1015# CONFIG_SENSORS_W83L786NG is not set
1016# CONFIG_SENSORS_W83627HF is not set
1017# CONFIG_SENSORS_W83627EHF is not set
1018# CONFIG_HWMON_DEBUG_CHIP is not set
1019# CONFIG_THERMAL is not set 984# CONFIG_THERMAL is not set
1020# CONFIG_THERMAL_HWMON is not set 985# CONFIG_THERMAL_HWMON is not set
1021CONFIG_WATCHDOG=y 986CONFIG_WATCHDOG=y
@@ -1031,6 +996,12 @@ CONFIG_BFIN_WDT=y
1031# USB-based Watchdog Cards 996# USB-based Watchdog Cards
1032# 997#
1033# CONFIG_USBPCWATCHDOG is not set 998# CONFIG_USBPCWATCHDOG is not set
999CONFIG_SSB_POSSIBLE=y
1000
1001#
1002# Sonics Silicon Backplane
1003#
1004# CONFIG_SSB is not set
1034 1005
1035# 1006#
1036# Multifunction device drivers 1007# Multifunction device drivers
@@ -1039,8 +1010,10 @@ CONFIG_BFIN_WDT=y
1039# CONFIG_MFD_SM501 is not set 1010# CONFIG_MFD_SM501 is not set
1040# CONFIG_HTC_PASIC3 is not set 1011# CONFIG_HTC_PASIC3 is not set
1041# CONFIG_MFD_TMIO is not set 1012# CONFIG_MFD_TMIO is not set
1013# CONFIG_PMIC_DA903X is not set
1042# CONFIG_MFD_WM8400 is not set 1014# CONFIG_MFD_WM8400 is not set
1043# CONFIG_MFD_WM8350_I2C is not set 1015# CONFIG_MFD_WM8350_I2C is not set
1016# CONFIG_REGULATOR is not set
1044 1017
1045# 1018#
1046# Multimedia devices 1019# Multimedia devices
@@ -1092,6 +1065,7 @@ CONFIG_FB_BF54X_LQ043=y
1092# CONFIG_FB_S1D13XXX is not set 1065# CONFIG_FB_S1D13XXX is not set
1093# CONFIG_FB_VIRTUAL is not set 1066# CONFIG_FB_VIRTUAL is not set
1094# CONFIG_FB_METRONOME is not set 1067# CONFIG_FB_METRONOME is not set
1068# CONFIG_FB_MB862XX is not set
1095# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 1069# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1096 1070
1097# 1071#
@@ -1243,15 +1217,15 @@ CONFIG_USB_MUSB_HDRC=y
1243CONFIG_USB_MUSB_SOC=y 1217CONFIG_USB_MUSB_SOC=y
1244 1218
1245# 1219#
1246# Blackfin high speed USB support 1220# Blackfin high speed USB Support
1247# 1221#
1248CONFIG_USB_MUSB_HOST=y 1222CONFIG_USB_MUSB_HOST=y
1249# CONFIG_USB_MUSB_PERIPHERAL is not set 1223# CONFIG_USB_MUSB_PERIPHERAL is not set
1250# CONFIG_USB_MUSB_OTG is not set 1224# CONFIG_USB_MUSB_OTG is not set
1225# CONFIG_USB_GADGET_MUSB_HDRC is not set
1251CONFIG_USB_MUSB_HDRC_HCD=y 1226CONFIG_USB_MUSB_HDRC_HCD=y
1252# CONFIG_MUSB_PIO_ONLY is not set 1227CONFIG_MUSB_PIO_ONLY=y
1253CONFIG_USB_INVENTRA_DMA=y 1228CONFIG_MUSB_DMA_POLL=y
1254# CONFIG_USB_TI_CPPI_DMA is not set
1255# CONFIG_USB_MUSB_DEBUG is not set 1229# CONFIG_USB_MUSB_DEBUG is not set
1256 1230
1257# 1231#
@@ -1263,11 +1237,11 @@ CONFIG_USB_INVENTRA_DMA=y
1263# CONFIG_USB_TMC is not set 1237# CONFIG_USB_TMC is not set
1264 1238
1265# 1239#
1266# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1240# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1267# 1241#
1268 1242
1269# 1243#
1270# may also be needed; see USB_STORAGE Help for more information 1244# see USB_STORAGE Help for more information
1271# 1245#
1272CONFIG_USB_STORAGE=m 1246CONFIG_USB_STORAGE=m
1273# CONFIG_USB_STORAGE_DEBUG is not set 1247# CONFIG_USB_STORAGE_DEBUG is not set
@@ -1321,7 +1295,31 @@ CONFIG_USB_STORAGE=m
1321# CONFIG_USB_ISIGHTFW is not set 1295# CONFIG_USB_ISIGHTFW is not set
1322# CONFIG_USB_VST is not set 1296# CONFIG_USB_VST is not set
1323# CONFIG_USB_GADGET is not set 1297# CONFIG_USB_GADGET is not set
1324CONFIG_MMC=m 1298# CONFIG_USB_GADGET_AT91 is not set
1299# CONFIG_USB_GADGET_ATMEL_USBA is not set
1300# CONFIG_USB_GADGET_FSL_USB2 is not set
1301# CONFIG_USB_GADGET_LH7A40X is not set
1302# CONFIG_USB_GADGET_OMAP is not set
1303# CONFIG_USB_GADGET_PXA25X is not set
1304# CONFIG_USB_GADGET_PXA27X is not set
1305# CONFIG_USB_GADGET_S3C2410 is not set
1306# CONFIG_USB_GADGET_M66592 is not set
1307# CONFIG_USB_GADGET_AMD5536UDC is not set
1308# CONFIG_USB_GADGET_FSL_QE is not set
1309# CONFIG_USB_GADGET_NET2272 is not set
1310# CONFIG_USB_GADGET_NET2280 is not set
1311# CONFIG_USB_GADGET_GOKU is not set
1312# CONFIG_USB_GADGET_DUMMY_HCD is not set
1313# CONFIG_USB_ZERO is not set
1314# CONFIG_USB_AUDIO is not set
1315# CONFIG_USB_ETH is not set
1316# CONFIG_USB_GADGETFS is not set
1317# CONFIG_USB_FILE_STORAGE is not set
1318# CONFIG_USB_G_SERIAL is not set
1319# CONFIG_USB_MIDI_GADGET is not set
1320# CONFIG_USB_G_PRINTER is not set
1321# CONFIG_USB_CDC_COMPOSITE is not set
1322CONFIG_MMC=y
1325# CONFIG_MMC_DEBUG is not set 1323# CONFIG_MMC_DEBUG is not set
1326# CONFIG_MMC_UNSAFE_RESUME is not set 1324# CONFIG_MMC_UNSAFE_RESUME is not set
1327 1325
@@ -1337,8 +1335,9 @@ CONFIG_MMC_BLOCK_BOUNCE=y
1337# MMC/SD/SDIO Host Controller Drivers 1335# MMC/SD/SDIO Host Controller Drivers
1338# 1336#
1339# CONFIG_MMC_SDHCI is not set 1337# CONFIG_MMC_SDHCI is not set
1340CONFIG_SDH_BFIN=m 1338CONFIG_SDH_BFIN=y
1341# CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND is not set 1339# CONFIG_SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND is not set
1340# CONFIG_SDH_BFIN_ENABLE_SDIO_IRQ is not set
1342# CONFIG_MMC_SPI is not set 1341# CONFIG_MMC_SPI is not set
1343# CONFIG_MEMSTICK is not set 1342# CONFIG_MEMSTICK is not set
1344# CONFIG_NEW_LEDS is not set 1343# CONFIG_NEW_LEDS is not set
@@ -1373,12 +1372,14 @@ CONFIG_RTC_INTF_DEV=y
1373# CONFIG_RTC_DRV_M41T80 is not set 1372# CONFIG_RTC_DRV_M41T80 is not set
1374# CONFIG_RTC_DRV_S35390A is not set 1373# CONFIG_RTC_DRV_S35390A is not set
1375# CONFIG_RTC_DRV_FM3130 is not set 1374# CONFIG_RTC_DRV_FM3130 is not set
1375# CONFIG_RTC_DRV_RX8581 is not set
1376 1376
1377# 1377#
1378# SPI RTC drivers 1378# SPI RTC drivers
1379# 1379#
1380# CONFIG_RTC_DRV_M41T94 is not set 1380# CONFIG_RTC_DRV_M41T94 is not set
1381# CONFIG_RTC_DRV_DS1305 is not set 1381# CONFIG_RTC_DRV_DS1305 is not set
1382# CONFIG_RTC_DRV_DS1390 is not set
1382# CONFIG_RTC_DRV_MAX6902 is not set 1383# CONFIG_RTC_DRV_MAX6902 is not set
1383# CONFIG_RTC_DRV_R9701 is not set 1384# CONFIG_RTC_DRV_R9701 is not set
1384# CONFIG_RTC_DRV_RS5C348 is not set 1385# CONFIG_RTC_DRV_RS5C348 is not set
@@ -1641,6 +1642,13 @@ CONFIG_DEBUG_INFO=y
1641# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1642# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1642# CONFIG_FAULT_INJECTION is not set 1643# CONFIG_FAULT_INJECTION is not set
1643# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1644# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1645
1646#
1647# Tracers
1648#
1649# CONFIG_SCHED_TRACER is not set
1650# CONFIG_CONTEXT_SWITCH_TRACER is not set
1651# CONFIG_BOOT_TRACER is not set
1644# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1652# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1645# CONFIG_SAMPLES is not set 1653# CONFIG_SAMPLES is not set
1646CONFIG_HAVE_ARCH_KGDB=y 1654CONFIG_HAVE_ARCH_KGDB=y
@@ -1680,6 +1688,7 @@ CONFIG_CRYPTO=y
1680# 1688#
1681# CONFIG_CRYPTO_FIPS is not set 1689# CONFIG_CRYPTO_FIPS is not set
1682# CONFIG_CRYPTO_MANAGER is not set 1690# CONFIG_CRYPTO_MANAGER is not set
1691# CONFIG_CRYPTO_MANAGER2 is not set
1683# CONFIG_CRYPTO_GF128MUL is not set 1692# CONFIG_CRYPTO_GF128MUL is not set
1684# CONFIG_CRYPTO_NULL is not set 1693# CONFIG_CRYPTO_NULL is not set
1685# CONFIG_CRYPTO_CRYPTD is not set 1694# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index 69714fb3e608..4a6ea8e31df7 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28.7
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -36,14 +36,13 @@ CONFIG_IKCONFIG_PROC=y
36CONFIG_LOG_BUF_SHIFT=14 36CONFIG_LOG_BUF_SHIFT=14
37# CONFIG_CGROUPS is not set 37# CONFIG_CGROUPS is not set
38# CONFIG_GROUP_SCHED is not set 38# CONFIG_GROUP_SCHED is not set
39# CONFIG_SYSFS_DEPRECATED is not set
40# CONFIG_SYSFS_DEPRECATED_V2 is not set 39# CONFIG_SYSFS_DEPRECATED_V2 is not set
41# CONFIG_RELAY is not set 40# CONFIG_RELAY is not set
42# CONFIG_NAMESPACES is not set 41# CONFIG_NAMESPACES is not set
43CONFIG_BLK_DEV_INITRD=y 42CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 43CONFIG_INITRAMFS_SOURCE=""
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 45# CONFIG_SYSCTL is not set
47CONFIG_EMBEDDED=y 46CONFIG_EMBEDDED=y
48CONFIG_UID16=y 47CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y 48CONFIG_SYSCTL_SYSCALL=y
@@ -56,13 +55,13 @@ CONFIG_BUG=y
56# CONFIG_ELF_CORE is not set 55# CONFIG_ELF_CORE is not set
57CONFIG_COMPAT_BRK=y 56CONFIG_COMPAT_BRK=y
58CONFIG_BASE_FULL=y 57CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y 58# CONFIG_FUTEX is not set
60CONFIG_ANON_INODES=y 59CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y 60CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y 61CONFIG_SIGNALFD=y
63CONFIG_TIMERFD=y 62CONFIG_TIMERFD=y
64CONFIG_EVENTFD=y 63CONFIG_EVENTFD=y
65CONFIG_AIO=y 64# CONFIG_AIO is not set
66CONFIG_VM_EVENT_COUNTERS=y 65CONFIG_VM_EVENT_COUNTERS=y
67CONFIG_SLAB=y 66CONFIG_SLAB=y
68# CONFIG_SLUB is not set 67# CONFIG_SLUB is not set
@@ -133,10 +132,15 @@ CONFIG_PREEMPT_VOLUNTARY=y
133# CONFIG_BF538 is not set 132# CONFIG_BF538 is not set
134# CONFIG_BF539 is not set 133# CONFIG_BF539 is not set
135# CONFIG_BF542 is not set 134# CONFIG_BF542 is not set
135# CONFIG_BF542M is not set
136# CONFIG_BF544 is not set 136# CONFIG_BF544 is not set
137# CONFIG_BF544M is not set
137# CONFIG_BF547 is not set 138# CONFIG_BF547 is not set
139# CONFIG_BF547M is not set
138# CONFIG_BF548 is not set 140# CONFIG_BF548 is not set
141# CONFIG_BF548M is not set
139# CONFIG_BF549 is not set 142# CONFIG_BF549 is not set
143# CONFIG_BF549M is not set
140CONFIG_BF561=y 144CONFIG_BF561=y
141# CONFIG_SMP is not set 145# CONFIG_SMP is not set
142CONFIG_BF_REV_MIN=3 146CONFIG_BF_REV_MIN=3
@@ -166,7 +170,6 @@ CONFIG_IRQ_SPI_ERROR=7
166CONFIG_BFIN561_EZKIT=y 170CONFIG_BFIN561_EZKIT=y
167# CONFIG_BFIN561_TEPLA is not set 171# CONFIG_BFIN561_TEPLA is not set
168# CONFIG_BFIN561_BLUETECHNIX_CM is not set 172# CONFIG_BFIN561_BLUETECHNIX_CM is not set
169# CONFIG_GENERIC_BF561_BOARD is not set
170 173
171# 174#
172# BF561 Specific Configuration 175# BF561 Specific Configuration
@@ -316,7 +319,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
316# CONFIG_PHYS_ADDR_T_64BIT is not set 319# CONFIG_PHYS_ADDR_T_64BIT is not set
317CONFIG_ZONE_DMA_FLAG=1 320CONFIG_ZONE_DMA_FLAG=1
318CONFIG_VIRT_TO_BUS=y 321CONFIG_VIRT_TO_BUS=y
319# CONFIG_BFIN_GPTIMERS is not set 322CONFIG_BFIN_GPTIMERS=m
320# CONFIG_DMA_UNCACHED_4M is not set 323# CONFIG_DMA_UNCACHED_4M is not set
321# CONFIG_DMA_UNCACHED_2M is not set 324# CONFIG_DMA_UNCACHED_2M is not set
322CONFIG_DMA_UNCACHED_1M=y 325CONFIG_DMA_UNCACHED_1M=y
@@ -382,7 +385,6 @@ CONFIG_BINFMT_ZFLAT=y
382# 385#
383# CONFIG_PM is not set 386# CONFIG_PM is not set
384CONFIG_ARCH_SUSPEND_POSSIBLE=y 387CONFIG_ARCH_SUSPEND_POSSIBLE=y
385# CONFIG_PM_WAKEUP_BY_GPIO is not set
386 388
387# 389#
388# CPU Frequency scaling 390# CPU Frequency scaling
@@ -612,6 +614,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
612CONFIG_MISC_DEVICES=y 614CONFIG_MISC_DEVICES=y
613# CONFIG_EEPROM_93CX6 is not set 615# CONFIG_EEPROM_93CX6 is not set
614# CONFIG_ENCLOSURE_SERVICES is not set 616# CONFIG_ENCLOSURE_SERVICES is not set
617# CONFIG_C2PORT is not set
615CONFIG_HAVE_IDE=y 618CONFIG_HAVE_IDE=y
616# CONFIG_IDE is not set 619# CONFIG_IDE is not set
617 620
@@ -645,6 +648,7 @@ CONFIG_SMC91X=y
645# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 648# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
646# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 649# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
647# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 650# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
651# CONFIG_B44 is not set
648CONFIG_NETDEV_1000=y 652CONFIG_NETDEV_1000=y
649# CONFIG_AX88180 is not set 653# CONFIG_AX88180 is not set
650CONFIG_NETDEV_10000=y 654CONFIG_NETDEV_10000=y
@@ -751,6 +755,7 @@ CONFIG_SPI_MASTER=y
751# 755#
752CONFIG_SPI_BFIN=y 756CONFIG_SPI_BFIN=y
753# CONFIG_SPI_BFIN_LOCK is not set 757# CONFIG_SPI_BFIN_LOCK is not set
758# CONFIG_SPI_BFIN_SPORT is not set
754# CONFIG_SPI_BITBANG is not set 759# CONFIG_SPI_BITBANG is not set
755 760
756# 761#
@@ -763,22 +768,7 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
763# CONFIG_GPIOLIB is not set 768# CONFIG_GPIOLIB is not set
764# CONFIG_W1 is not set 769# CONFIG_W1 is not set
765# CONFIG_POWER_SUPPLY is not set 770# CONFIG_POWER_SUPPLY is not set
766CONFIG_HWMON=y 771# CONFIG_HWMON is not set
767# CONFIG_HWMON_VID is not set
768# CONFIG_SENSORS_ADCXX is not set
769# CONFIG_SENSORS_F71805F is not set
770# CONFIG_SENSORS_F71882FG is not set
771# CONFIG_SENSORS_IT87 is not set
772# CONFIG_SENSORS_LM70 is not set
773# CONFIG_SENSORS_MAX1111 is not set
774# CONFIG_SENSORS_PC87360 is not set
775# CONFIG_SENSORS_PC87427 is not set
776# CONFIG_SENSORS_SMSC47M1 is not set
777# CONFIG_SENSORS_SMSC47B397 is not set
778# CONFIG_SENSORS_VT1211 is not set
779# CONFIG_SENSORS_W83627HF is not set
780# CONFIG_SENSORS_W83627EHF is not set
781# CONFIG_HWMON_DEBUG_CHIP is not set
782# CONFIG_THERMAL is not set 772# CONFIG_THERMAL is not set
783# CONFIG_THERMAL_HWMON is not set 773# CONFIG_THERMAL_HWMON is not set
784CONFIG_WATCHDOG=y 774CONFIG_WATCHDOG=y
@@ -789,6 +779,12 @@ CONFIG_WATCHDOG=y
789# 779#
790# CONFIG_SOFT_WATCHDOG is not set 780# CONFIG_SOFT_WATCHDOG is not set
791CONFIG_BFIN_WDT=y 781CONFIG_BFIN_WDT=y
782CONFIG_SSB_POSSIBLE=y
783
784#
785# Sonics Silicon Backplane
786#
787# CONFIG_SSB is not set
792 788
793# 789#
794# Multifunction device drivers 790# Multifunction device drivers
@@ -797,7 +793,7 @@ CONFIG_BFIN_WDT=y
797# CONFIG_MFD_SM501 is not set 793# CONFIG_MFD_SM501 is not set
798# CONFIG_HTC_PASIC3 is not set 794# CONFIG_HTC_PASIC3 is not set
799# CONFIG_MFD_TMIO is not set 795# CONFIG_MFD_TMIO is not set
800# CONFIG_MFD_WM8400 is not set 796# CONFIG_REGULATOR is not set
801 797
802# 798#
803# Multimedia devices 799# Multimedia devices
@@ -1041,6 +1037,13 @@ CONFIG_DEBUG_INFO=y
1041# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1037# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1042# CONFIG_FAULT_INJECTION is not set 1038# CONFIG_FAULT_INJECTION is not set
1043# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1039# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1040
1041#
1042# Tracers
1043#
1044# CONFIG_SCHED_TRACER is not set
1045# CONFIG_CONTEXT_SWITCH_TRACER is not set
1046# CONFIG_BOOT_TRACER is not set
1044# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1047# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1045# CONFIG_SAMPLES is not set 1048# CONFIG_SAMPLES is not set
1046CONFIG_HAVE_ARCH_KGDB=y 1049CONFIG_HAVE_ARCH_KGDB=y
@@ -1079,6 +1082,7 @@ CONFIG_CRYPTO=y
1079# 1082#
1080# CONFIG_CRYPTO_FIPS is not set 1083# CONFIG_CRYPTO_FIPS is not set
1081# CONFIG_CRYPTO_MANAGER is not set 1084# CONFIG_CRYPTO_MANAGER is not set
1085# CONFIG_CRYPTO_MANAGER2 is not set
1082# CONFIG_CRYPTO_GF128MUL is not set 1086# CONFIG_CRYPTO_GF128MUL is not set
1083# CONFIG_CRYPTO_NULL is not set 1087# CONFIG_CRYPTO_NULL is not set
1084# CONFIG_CRYPTO_CRYPTD is not set 1088# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/BlackStamp_defconfig b/arch/blackfin/configs/BlackStamp_defconfig
index 017c6ea071b5..ef1a2c84ace1 100644
--- a/arch/blackfin/configs/BlackStamp_defconfig
+++ b/arch/blackfin/configs/BlackStamp_defconfig
@@ -43,7 +43,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
43CONFIG_BLK_DEV_INITRD=y 43CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 44CONFIG_INITRAMFS_SOURCE=""
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 46# CONFIG_SYSCTL is not set
47CONFIG_EMBEDDED=y 47CONFIG_EMBEDDED=y
48CONFIG_UID16=y 48CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y 49CONFIG_SYSCTL_SYSCALL=y
@@ -56,7 +56,7 @@ CONFIG_BUG=y
56# CONFIG_ELF_CORE is not set 56# CONFIG_ELF_CORE is not set
57CONFIG_COMPAT_BRK=y 57CONFIG_COMPAT_BRK=y
58CONFIG_BASE_FULL=y 58CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y 59# CONFIG_FUTEX is not set
60CONFIG_ANON_INODES=y 60CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y 61CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y 62CONFIG_SIGNALFD=y
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig
index d880ef786770..e2fc588e4336 100644
--- a/arch/blackfin/configs/CM-BF527_defconfig
+++ b/arch/blackfin/configs/CM-BF527_defconfig
@@ -43,7 +43,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
43CONFIG_BLK_DEV_INITRD=y 43CONFIG_BLK_DEV_INITRD=y
44CONFIG_INITRAMFS_SOURCE="" 44CONFIG_INITRAMFS_SOURCE=""
45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 45# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
46CONFIG_SYSCTL=y 46# CONFIG_SYSCTL is not set
47CONFIG_EMBEDDED=y 47CONFIG_EMBEDDED=y
48CONFIG_UID16=y 48CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y 49CONFIG_SYSCTL_SYSCALL=y
@@ -56,13 +56,13 @@ CONFIG_BUG=y
56# CONFIG_ELF_CORE is not set 56# CONFIG_ELF_CORE is not set
57CONFIG_COMPAT_BRK=y 57CONFIG_COMPAT_BRK=y
58CONFIG_BASE_FULL=y 58CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y 59# CONFIG_FUTEX is not set
60CONFIG_ANON_INODES=y 60CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y 61CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y 62CONFIG_SIGNALFD=y
63CONFIG_TIMERFD=y 63CONFIG_TIMERFD=y
64CONFIG_EVENTFD=y 64CONFIG_EVENTFD=y
65CONFIG_AIO=y 65# CONFIG_AIO is not set
66CONFIG_VM_EVENT_COUNTERS=y 66CONFIG_VM_EVENT_COUNTERS=y
67CONFIG_SLAB=y 67CONFIG_SLAB=y
68# CONFIG_SLUB is not set 68# CONFIG_SLUB is not set
diff --git a/arch/blackfin/configs/CM-BF533_defconfig b/arch/blackfin/configs/CM-BF533_defconfig
index 085211b9e4e4..65a8bbb8d647 100644
--- a/arch/blackfin/configs/CM-BF533_defconfig
+++ b/arch/blackfin/configs/CM-BF533_defconfig
@@ -46,7 +46,7 @@ CONFIG_LOG_BUF_SHIFT=14
46# CONFIG_RELAY is not set 46# CONFIG_RELAY is not set
47# CONFIG_BLK_DEV_INITRD is not set 47# CONFIG_BLK_DEV_INITRD is not set
48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
49CONFIG_SYSCTL=y 49# CONFIG_SYSCTL is not set
50CONFIG_EMBEDDED=y 50CONFIG_EMBEDDED=y
51# CONFIG_UID16 is not set 51# CONFIG_UID16 is not set
52CONFIG_SYSCTL_SYSCALL=y 52CONFIG_SYSCTL_SYSCALL=y
@@ -57,7 +57,7 @@ CONFIG_PRINTK=y
57CONFIG_BUG=y 57CONFIG_BUG=y
58# CONFIG_ELF_CORE is not set 58# CONFIG_ELF_CORE is not set
59CONFIG_BASE_FULL=y 59CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 60# CONFIG_FUTEX is not set
61CONFIG_ANON_INODES=y 61CONFIG_ANON_INODES=y
62CONFIG_EPOLL=y 62CONFIG_EPOLL=y
63CONFIG_SIGNALFD=y 63CONFIG_SIGNALFD=y
diff --git a/arch/blackfin/configs/CM-BF537E_defconfig b/arch/blackfin/configs/CM-BF537E_defconfig
index 750203e27a46..9b7e9d781145 100644
--- a/arch/blackfin/configs/CM-BF537E_defconfig
+++ b/arch/blackfin/configs/CM-BF537E_defconfig
@@ -46,7 +46,7 @@ CONFIG_LOG_BUF_SHIFT=14
46# CONFIG_RELAY is not set 46# CONFIG_RELAY is not set
47# CONFIG_BLK_DEV_INITRD is not set 47# CONFIG_BLK_DEV_INITRD is not set
48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
49CONFIG_SYSCTL=y 49# CONFIG_SYSCTL is not set
50CONFIG_EMBEDDED=y 50CONFIG_EMBEDDED=y
51# CONFIG_UID16 is not set 51# CONFIG_UID16 is not set
52CONFIG_SYSCTL_SYSCALL=y 52CONFIG_SYSCTL_SYSCALL=y
@@ -57,7 +57,7 @@ CONFIG_PRINTK=y
57CONFIG_BUG=y 57CONFIG_BUG=y
58# CONFIG_ELF_CORE is not set 58# CONFIG_ELF_CORE is not set
59CONFIG_BASE_FULL=y 59CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 60# CONFIG_FUTEX is not set
61CONFIG_ANON_INODES=y 61CONFIG_ANON_INODES=y
62CONFIG_EPOLL=y 62CONFIG_EPOLL=y
63CONFIG_SIGNALFD=y 63CONFIG_SIGNALFD=y
diff --git a/arch/blackfin/configs/CM-BF537U_defconfig b/arch/blackfin/configs/CM-BF537U_defconfig
index dec8a7d5cc0e..569523c1c034 100644
--- a/arch/blackfin/configs/CM-BF537U_defconfig
+++ b/arch/blackfin/configs/CM-BF537U_defconfig
@@ -46,7 +46,7 @@ CONFIG_LOG_BUF_SHIFT=14
46# CONFIG_RELAY is not set 46# CONFIG_RELAY is not set
47# CONFIG_BLK_DEV_INITRD is not set 47# CONFIG_BLK_DEV_INITRD is not set
48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
49CONFIG_SYSCTL=y 49# CONFIG_SYSCTL is not set
50CONFIG_EMBEDDED=y 50CONFIG_EMBEDDED=y
51# CONFIG_UID16 is not set 51# CONFIG_UID16 is not set
52CONFIG_SYSCTL_SYSCALL=y 52CONFIG_SYSCTL_SYSCALL=y
@@ -57,7 +57,7 @@ CONFIG_PRINTK=y
57CONFIG_BUG=y 57CONFIG_BUG=y
58# CONFIG_ELF_CORE is not set 58# CONFIG_ELF_CORE is not set
59CONFIG_BASE_FULL=y 59CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 60# CONFIG_FUTEX is not set
61CONFIG_ANON_INODES=y 61CONFIG_ANON_INODES=y
62CONFIG_EPOLL=y 62CONFIG_EPOLL=y
63CONFIG_SIGNALFD=y 63CONFIG_SIGNALFD=y
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig
index f410430b4e3d..035b635e599c 100644
--- a/arch/blackfin/configs/CM-BF548_defconfig
+++ b/arch/blackfin/configs/CM-BF548_defconfig
@@ -46,7 +46,7 @@ CONFIG_FAIR_USER_SCHED=y
46CONFIG_BLK_DEV_INITRD=y 46CONFIG_BLK_DEV_INITRD=y
47CONFIG_INITRAMFS_SOURCE="" 47CONFIG_INITRAMFS_SOURCE=""
48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
49CONFIG_SYSCTL=y 49# CONFIG_SYSCTL is not set
50CONFIG_EMBEDDED=y 50CONFIG_EMBEDDED=y
51CONFIG_UID16=y 51CONFIG_UID16=y
52CONFIG_SYSCTL_SYSCALL=y 52CONFIG_SYSCTL_SYSCALL=y
@@ -57,7 +57,7 @@ CONFIG_PRINTK=y
57CONFIG_BUG=y 57CONFIG_BUG=y
58# CONFIG_ELF_CORE is not set 58# CONFIG_ELF_CORE is not set
59CONFIG_BASE_FULL=y 59CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 60# CONFIG_FUTEX is not set
61CONFIG_ANON_INODES=y 61CONFIG_ANON_INODES=y
62CONFIG_EPOLL=y 62CONFIG_EPOLL=y
63CONFIG_SIGNALFD=y 63CONFIG_SIGNALFD=y
diff --git a/arch/blackfin/configs/CM-BF561_defconfig b/arch/blackfin/configs/CM-BF561_defconfig
index 346bc7af8f42..7015e42ccce5 100644
--- a/arch/blackfin/configs/CM-BF561_defconfig
+++ b/arch/blackfin/configs/CM-BF561_defconfig
@@ -46,7 +46,7 @@ CONFIG_FAIR_USER_SCHED=y
46# CONFIG_RELAY is not set 46# CONFIG_RELAY is not set
47# CONFIG_BLK_DEV_INITRD is not set 47# CONFIG_BLK_DEV_INITRD is not set
48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
49CONFIG_SYSCTL=y 49# CONFIG_SYSCTL is not set
50CONFIG_EMBEDDED=y 50CONFIG_EMBEDDED=y
51# CONFIG_UID16 is not set 51# CONFIG_UID16 is not set
52CONFIG_SYSCTL_SYSCALL=y 52CONFIG_SYSCTL_SYSCALL=y
@@ -57,7 +57,7 @@ CONFIG_PRINTK=y
57CONFIG_BUG=y 57CONFIG_BUG=y
58# CONFIG_ELF_CORE is not set 58# CONFIG_ELF_CORE is not set
59CONFIG_BASE_FULL=y 59CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 60# CONFIG_FUTEX is not set
61CONFIG_ANON_INODES=y 61CONFIG_ANON_INODES=y
62CONFIG_EPOLL=y 62CONFIG_EPOLL=y
63CONFIG_SIGNALFD=y 63CONFIG_SIGNALFD=y
diff --git a/arch/blackfin/configs/H8606_defconfig b/arch/blackfin/configs/H8606_defconfig
index bd553da15db8..dfc8e1ddd77a 100644
--- a/arch/blackfin/configs/H8606_defconfig
+++ b/arch/blackfin/configs/H8606_defconfig
@@ -45,7 +45,7 @@ CONFIG_SYSFS_DEPRECATED=y
45# CONFIG_RELAY is not set 45# CONFIG_RELAY is not set
46# CONFIG_BLK_DEV_INITRD is not set 46# CONFIG_BLK_DEV_INITRD is not set
47# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 47# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
48CONFIG_SYSCTL=y 48# CONFIG_SYSCTL is not set
49CONFIG_EMBEDDED=y 49CONFIG_EMBEDDED=y
50CONFIG_UID16=y 50CONFIG_UID16=y
51CONFIG_SYSCTL_SYSCALL=y 51CONFIG_SYSCTL_SYSCALL=y
@@ -56,7 +56,7 @@ CONFIG_PRINTK=y
56CONFIG_BUG=y 56CONFIG_BUG=y
57# CONFIG_ELF_CORE is not set 57# CONFIG_ELF_CORE is not set
58CONFIG_BASE_FULL=y 58CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y 59# CONFIG_FUTEX is not set
60CONFIG_ANON_INODES=y 60CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y 61CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y 62CONFIG_SIGNALFD=y
diff --git a/arch/blackfin/configs/IP0X_defconfig b/arch/blackfin/configs/IP0X_defconfig
index 7db93874c987..95a5f91aebaa 100644
--- a/arch/blackfin/configs/IP0X_defconfig
+++ b/arch/blackfin/configs/IP0X_defconfig
@@ -46,7 +46,7 @@ CONFIG_SYSFS_DEPRECATED=y
46CONFIG_BLK_DEV_INITRD=y 46CONFIG_BLK_DEV_INITRD=y
47CONFIG_INITRAMFS_SOURCE="" 47CONFIG_INITRAMFS_SOURCE=""
48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 48# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
49CONFIG_SYSCTL=y 49# CONFIG_SYSCTL is not set
50CONFIG_EMBEDDED=y 50CONFIG_EMBEDDED=y
51CONFIG_UID16=y 51CONFIG_UID16=y
52CONFIG_SYSCTL_SYSCALL=y 52CONFIG_SYSCTL_SYSCALL=y
@@ -57,7 +57,7 @@ CONFIG_PRINTK=y
57CONFIG_BUG=y 57CONFIG_BUG=y
58# CONFIG_ELF_CORE is not set 58# CONFIG_ELF_CORE is not set
59CONFIG_BASE_FULL=y 59CONFIG_BASE_FULL=y
60CONFIG_FUTEX=y 60# CONFIG_FUTEX is not set
61CONFIG_ANON_INODES=y 61CONFIG_ANON_INODES=y
62CONFIG_EPOLL=y 62CONFIG_EPOLL=y
63CONFIG_SIGNALFD=y 63CONFIG_SIGNALFD=y
diff --git a/arch/blackfin/configs/PNAV-10_defconfig b/arch/blackfin/configs/PNAV-10_defconfig
index ad096702ac16..78e24080e7f1 100644
--- a/arch/blackfin/configs/PNAV-10_defconfig
+++ b/arch/blackfin/configs/PNAV-10_defconfig
@@ -1,6 +1,6 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc2 3# Linux kernel version: 2.6.28.7
4# 4#
5# CONFIG_MMU is not set 5# CONFIG_MMU is not set
6# CONFIG_FPU is not set 6# CONFIG_FPU is not set
@@ -35,13 +35,12 @@ CONFIG_SYSVIPC_SYSCTL=y
35CONFIG_LOG_BUF_SHIFT=14 35CONFIG_LOG_BUF_SHIFT=14
36# CONFIG_CGROUPS is not set 36# CONFIG_CGROUPS is not set
37# CONFIG_GROUP_SCHED is not set 37# CONFIG_GROUP_SCHED is not set
38# CONFIG_SYSFS_DEPRECATED is not set
39# CONFIG_SYSFS_DEPRECATED_V2 is not set 38# CONFIG_SYSFS_DEPRECATED_V2 is not set
40# CONFIG_RELAY is not set 39# CONFIG_RELAY is not set
41# CONFIG_NAMESPACES is not set 40# CONFIG_NAMESPACES is not set
42# CONFIG_BLK_DEV_INITRD is not set 41# CONFIG_BLK_DEV_INITRD is not set
43# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 42# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
44CONFIG_SYSCTL=y 43# CONFIG_SYSCTL is not set
45CONFIG_EMBEDDED=y 44CONFIG_EMBEDDED=y
46CONFIG_UID16=y 45CONFIG_UID16=y
47CONFIG_SYSCTL_SYSCALL=y 46CONFIG_SYSCTL_SYSCALL=y
@@ -53,13 +52,13 @@ CONFIG_BUG=y
53# CONFIG_ELF_CORE is not set 52# CONFIG_ELF_CORE is not set
54CONFIG_COMPAT_BRK=y 53CONFIG_COMPAT_BRK=y
55CONFIG_BASE_FULL=y 54CONFIG_BASE_FULL=y
56CONFIG_FUTEX=y 55# CONFIG_FUTEX is not set
57CONFIG_ANON_INODES=y 56CONFIG_ANON_INODES=y
58CONFIG_EPOLL=y 57CONFIG_EPOLL=y
59CONFIG_SIGNALFD=y 58CONFIG_SIGNALFD=y
60CONFIG_TIMERFD=y 59CONFIG_TIMERFD=y
61CONFIG_EVENTFD=y 60CONFIG_EVENTFD=y
62CONFIG_AIO=y 61# CONFIG_AIO is not set
63CONFIG_VM_EVENT_COUNTERS=y 62CONFIG_VM_EVENT_COUNTERS=y
64CONFIG_SLAB=y 63CONFIG_SLAB=y
65# CONFIG_SLUB is not set 64# CONFIG_SLUB is not set
@@ -130,10 +129,15 @@ CONFIG_BF537=y
130# CONFIG_BF538 is not set 129# CONFIG_BF538 is not set
131# CONFIG_BF539 is not set 130# CONFIG_BF539 is not set
132# CONFIG_BF542 is not set 131# CONFIG_BF542 is not set
132# CONFIG_BF542M is not set
133# CONFIG_BF544 is not set 133# CONFIG_BF544 is not set
134# CONFIG_BF544M is not set
134# CONFIG_BF547 is not set 135# CONFIG_BF547 is not set
136# CONFIG_BF547M is not set
135# CONFIG_BF548 is not set 137# CONFIG_BF548 is not set
138# CONFIG_BF548M is not set
136# CONFIG_BF549 is not set 139# CONFIG_BF549 is not set
140# CONFIG_BF549M is not set
137# CONFIG_BF561 is not set 141# CONFIG_BF561 is not set
138CONFIG_BF_REV_MIN=2 142CONFIG_BF_REV_MIN=2
139CONFIG_BF_REV_MAX=3 143CONFIG_BF_REV_MAX=3
@@ -180,7 +184,6 @@ CONFIG_IRQ_SPI=10
180# CONFIG_BFIN537_BLUETECHNIX_TCM is not set 184# CONFIG_BFIN537_BLUETECHNIX_TCM is not set
181CONFIG_PNAV10=y 185CONFIG_PNAV10=y
182# CONFIG_CAMSIG_MINOTAUR is not set 186# CONFIG_CAMSIG_MINOTAUR is not set
183# CONFIG_GENERIC_BF537_BOARD is not set
184 187
185# 188#
186# BF537 Specific Configuration 189# BF537 Specific Configuration
@@ -341,7 +344,6 @@ CONFIG_BINFMT_ZFLAT=y
341# 344#
342# CONFIG_PM is not set 345# CONFIG_PM is not set
343CONFIG_ARCH_SUSPEND_POSSIBLE=y 346CONFIG_ARCH_SUSPEND_POSSIBLE=y
344# CONFIG_PM_WAKEUP_BY_GPIO is not set
345 347
346# 348#
347# CPU Frequency scaling 349# CPU Frequency scaling
@@ -538,7 +540,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
538# CONFIG_BLK_DEV_HD is not set 540# CONFIG_BLK_DEV_HD is not set
539CONFIG_MISC_DEVICES=y 541CONFIG_MISC_DEVICES=y
540# CONFIG_EEPROM_93CX6 is not set 542# CONFIG_EEPROM_93CX6 is not set
543# CONFIG_ICS932S401 is not set
541# CONFIG_ENCLOSURE_SERVICES is not set 544# CONFIG_ENCLOSURE_SERVICES is not set
545# CONFIG_C2PORT is not set
542CONFIG_HAVE_IDE=y 546CONFIG_HAVE_IDE=y
543# CONFIG_IDE is not set 547# CONFIG_IDE is not set
544 548
@@ -593,6 +597,7 @@ CONFIG_BFIN_MAC_RMII=y
593# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 597# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
594# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 598# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
595# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 599# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
600# CONFIG_B44 is not set
596CONFIG_NETDEV_1000=y 601CONFIG_NETDEV_1000=y
597# CONFIG_AX88180 is not set 602# CONFIG_AX88180 is not set
598CONFIG_NETDEV_10000=y 603CONFIG_NETDEV_10000=y
@@ -776,6 +781,7 @@ CONFIG_SPI_MASTER=y
776# 781#
777CONFIG_SPI_BFIN=y 782CONFIG_SPI_BFIN=y
778# CONFIG_SPI_BFIN_LOCK is not set 783# CONFIG_SPI_BFIN_LOCK is not set
784# CONFIG_SPI_BFIN_SPORT is not set
779# CONFIG_SPI_BITBANG is not set 785# CONFIG_SPI_BITBANG is not set
780 786
781# 787#
@@ -799,6 +805,7 @@ CONFIG_HWMON=y
799# CONFIG_SENSORS_ADM1029 is not set 805# CONFIG_SENSORS_ADM1029 is not set
800# CONFIG_SENSORS_ADM1031 is not set 806# CONFIG_SENSORS_ADM1031 is not set
801# CONFIG_SENSORS_ADM9240 is not set 807# CONFIG_SENSORS_ADM9240 is not set
808# CONFIG_SENSORS_ADT7462 is not set
802# CONFIG_SENSORS_ADT7470 is not set 809# CONFIG_SENSORS_ADT7470 is not set
803# CONFIG_SENSORS_ADT7473 is not set 810# CONFIG_SENSORS_ADT7473 is not set
804# CONFIG_SENSORS_ATXP1 is not set 811# CONFIG_SENSORS_ATXP1 is not set
@@ -845,6 +852,12 @@ CONFIG_HWMON=y
845# CONFIG_THERMAL is not set 852# CONFIG_THERMAL is not set
846# CONFIG_THERMAL_HWMON is not set 853# CONFIG_THERMAL_HWMON is not set
847# CONFIG_WATCHDOG is not set 854# CONFIG_WATCHDOG is not set
855CONFIG_SSB_POSSIBLE=y
856
857#
858# Sonics Silicon Backplane
859#
860# CONFIG_SSB is not set
848 861
849# 862#
850# Multifunction device drivers 863# Multifunction device drivers
@@ -853,8 +866,10 @@ CONFIG_HWMON=y
853# CONFIG_MFD_SM501 is not set 866# CONFIG_MFD_SM501 is not set
854# CONFIG_HTC_PASIC3 is not set 867# CONFIG_HTC_PASIC3 is not set
855# CONFIG_MFD_TMIO is not set 868# CONFIG_MFD_TMIO is not set
869# CONFIG_PMIC_DA903X is not set
856# CONFIG_MFD_WM8400 is not set 870# CONFIG_MFD_WM8400 is not set
857# CONFIG_MFD_WM8350_I2C is not set 871# CONFIG_MFD_WM8350_I2C is not set
872# CONFIG_REGULATOR is not set
858 873
859# 874#
860# Multimedia devices 875# Multimedia devices
@@ -910,6 +925,7 @@ CONFIG_FB_BFIN_LANDSCAPE=y
910# CONFIG_FB_S1D13XXX is not set 925# CONFIG_FB_S1D13XXX is not set
911# CONFIG_FB_VIRTUAL is not set 926# CONFIG_FB_VIRTUAL is not set
912# CONFIG_FB_METRONOME is not set 927# CONFIG_FB_METRONOME is not set
928# CONFIG_FB_MB862XX is not set
913CONFIG_BACKLIGHT_LCD_SUPPORT=y 929CONFIG_BACKLIGHT_LCD_SUPPORT=y
914CONFIG_LCD_CLASS_DEVICE=y 930CONFIG_LCD_CLASS_DEVICE=y
915# CONFIG_LCD_LTV350QV is not set 931# CONFIG_LCD_LTV350QV is not set
@@ -966,7 +982,7 @@ CONFIG_USB_ARCH_HAS_HCD=y
966# 982#
967 983
968# 984#
969# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 985# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
970# 986#
971# CONFIG_USB_GADGET is not set 987# CONFIG_USB_GADGET is not set
972# CONFIG_MMC is not set 988# CONFIG_MMC is not set
@@ -1003,12 +1019,14 @@ CONFIG_RTC_INTF_DEV=y
1003# CONFIG_RTC_DRV_M41T80 is not set 1019# CONFIG_RTC_DRV_M41T80 is not set
1004# CONFIG_RTC_DRV_S35390A is not set 1020# CONFIG_RTC_DRV_S35390A is not set
1005# CONFIG_RTC_DRV_FM3130 is not set 1021# CONFIG_RTC_DRV_FM3130 is not set
1022# CONFIG_RTC_DRV_RX8581 is not set
1006 1023
1007# 1024#
1008# SPI RTC drivers 1025# SPI RTC drivers
1009# 1026#
1010# CONFIG_RTC_DRV_M41T94 is not set 1027# CONFIG_RTC_DRV_M41T94 is not set
1011# CONFIG_RTC_DRV_DS1305 is not set 1028# CONFIG_RTC_DRV_DS1305 is not set
1029# CONFIG_RTC_DRV_DS1390 is not set
1012# CONFIG_RTC_DRV_MAX6902 is not set 1030# CONFIG_RTC_DRV_MAX6902 is not set
1013# CONFIG_RTC_DRV_R9701 is not set 1031# CONFIG_RTC_DRV_R9701 is not set
1014# CONFIG_RTC_DRV_RS5C348 is not set 1032# CONFIG_RTC_DRV_RS5C348 is not set
@@ -1196,6 +1214,10 @@ CONFIG_FRAME_WARN=1024
1196# CONFIG_DEBUG_MEMORY_INIT is not set 1214# CONFIG_DEBUG_MEMORY_INIT is not set
1197# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1215# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1198# CONFIG_SYSCTL_SYSCALL_CHECK is not set 1216# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1217
1218#
1219# Tracers
1220#
1199# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1221# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1200# CONFIG_SAMPLES is not set 1222# CONFIG_SAMPLES is not set
1201CONFIG_HAVE_ARCH_KGDB=y 1223CONFIG_HAVE_ARCH_KGDB=y
@@ -1230,6 +1252,7 @@ CONFIG_CRYPTO=y
1230# 1252#
1231# CONFIG_CRYPTO_FIPS is not set 1253# CONFIG_CRYPTO_FIPS is not set
1232# CONFIG_CRYPTO_MANAGER is not set 1254# CONFIG_CRYPTO_MANAGER is not set
1255# CONFIG_CRYPTO_MANAGER2 is not set
1233# CONFIG_CRYPTO_GF128MUL is not set 1256# CONFIG_CRYPTO_GF128MUL is not set
1234# CONFIG_CRYPTO_NULL is not set 1257# CONFIG_CRYPTO_NULL is not set
1235# CONFIG_CRYPTO_CRYPTD is not set 1258# CONFIG_CRYPTO_CRYPTD is not set
diff --git a/arch/blackfin/configs/SRV1_defconfig b/arch/blackfin/configs/SRV1_defconfig
index a46529c6ade3..2bc0779d22ea 100644
--- a/arch/blackfin/configs/SRV1_defconfig
+++ b/arch/blackfin/configs/SRV1_defconfig
@@ -49,7 +49,7 @@ CONFIG_SYSFS_DEPRECATED=y
49CONFIG_BLK_DEV_INITRD=y 49CONFIG_BLK_DEV_INITRD=y
50CONFIG_INITRAMFS_SOURCE="" 50CONFIG_INITRAMFS_SOURCE=""
51# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 51# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
52CONFIG_SYSCTL=y 52# CONFIG_SYSCTL is not set
53CONFIG_EMBEDDED=y 53CONFIG_EMBEDDED=y
54CONFIG_UID16=y 54CONFIG_UID16=y
55CONFIG_SYSCTL_SYSCALL=y 55CONFIG_SYSCTL_SYSCALL=y
@@ -61,7 +61,7 @@ CONFIG_PRINTK=y
61CONFIG_BUG=y 61CONFIG_BUG=y
62# CONFIG_ELF_CORE is not set 62# CONFIG_ELF_CORE is not set
63CONFIG_BASE_FULL=y 63CONFIG_BASE_FULL=y
64CONFIG_FUTEX=y 64# CONFIG_FUTEX is not set
65CONFIG_ANON_INODES=y 65CONFIG_ANON_INODES=y
66CONFIG_EPOLL=y 66CONFIG_EPOLL=y
67CONFIG_SIGNALFD=y 67CONFIG_SIGNALFD=y
diff --git a/arch/blackfin/configs/TCM-BF537_defconfig b/arch/blackfin/configs/TCM-BF537_defconfig
index 97a1f1d20dcf..e65b3a49214f 100644
--- a/arch/blackfin/configs/TCM-BF537_defconfig
+++ b/arch/blackfin/configs/TCM-BF537_defconfig
@@ -39,7 +39,7 @@ CONFIG_LOG_BUF_SHIFT=14
39# CONFIG_NAMESPACES is not set 39# CONFIG_NAMESPACES is not set
40# CONFIG_BLK_DEV_INITRD is not set 40# CONFIG_BLK_DEV_INITRD is not set
41# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 41# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
42CONFIG_SYSCTL=y 42# CONFIG_SYSCTL is not set
43CONFIG_EMBEDDED=y 43CONFIG_EMBEDDED=y
44# CONFIG_UID16 is not set 44# CONFIG_UID16 is not set
45CONFIG_SYSCTL_SYSCALL=y 45CONFIG_SYSCTL_SYSCALL=y
@@ -51,13 +51,13 @@ CONFIG_BUG=y
51# CONFIG_ELF_CORE is not set 51# CONFIG_ELF_CORE is not set
52CONFIG_COMPAT_BRK=y 52CONFIG_COMPAT_BRK=y
53CONFIG_BASE_FULL=y 53CONFIG_BASE_FULL=y
54CONFIG_FUTEX=y 54# CONFIG_FUTEX is not set
55CONFIG_ANON_INODES=y 55CONFIG_ANON_INODES=y
56CONFIG_EPOLL=y 56CONFIG_EPOLL=y
57CONFIG_SIGNALFD=y 57CONFIG_SIGNALFD=y
58CONFIG_TIMERFD=y 58CONFIG_TIMERFD=y
59CONFIG_EVENTFD=y 59CONFIG_EVENTFD=y
60CONFIG_AIO=y 60# CONFIG_AIO is not set
61CONFIG_VM_EVENT_COUNTERS=y 61CONFIG_VM_EVENT_COUNTERS=y
62CONFIG_SLAB=y 62CONFIG_SLAB=y
63# CONFIG_SLUB is not set 63# CONFIG_SLUB is not set
diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h
index 1306e6b22946..0292d58f9362 100644
--- a/arch/blackfin/include/asm/bfin5xx_spi.h
+++ b/arch/blackfin/include/asm/bfin5xx_spi.h
@@ -110,7 +110,7 @@
110struct bfin5xx_spi_master { 110struct bfin5xx_spi_master {
111 u16 num_chipselect; 111 u16 num_chipselect;
112 u8 enable_dma; 112 u8 enable_dma;
113 u16 pin_req[4]; 113 u16 pin_req[7];
114}; 114};
115 115
116/* spi_board_info.controller_data for SPI slave devices, 116/* spi_board_info.controller_data for SPI slave devices,
diff --git a/arch/blackfin/include/asm/bfin_sport.h b/arch/blackfin/include/asm/bfin_sport.h
index 65a651db5b07..b558908e1c79 100644
--- a/arch/blackfin/include/asm/bfin_sport.h
+++ b/arch/blackfin/include/asm/bfin_sport.h
@@ -9,6 +9,13 @@
9#ifndef __BFIN_SPORT_H__ 9#ifndef __BFIN_SPORT_H__
10#define __BFIN_SPORT_H__ 10#define __BFIN_SPORT_H__
11 11
12#ifdef __KERNEL__
13#include <linux/cdev.h>
14#include <linux/mutex.h>
15#include <linux/sched.h>
16#include <linux/wait.h>
17#endif
18
12#define SPORT_MAJOR 237 19#define SPORT_MAJOR 237
13#define SPORT_NR_DEVS 2 20#define SPORT_NR_DEVS 2
14 21
@@ -119,7 +126,7 @@ struct sport_dev {
119 int tx_len; 126 int tx_len;
120 int tx_sent; 127 int tx_sent;
121 128
122 int sport_err_irq; 129 int err_irq;
123 130
124 struct mutex mutex; /* mutual exclusion semaphore */ 131 struct mutex mutex; /* mutual exclusion semaphore */
125 struct task_struct *task; 132 struct task_struct *task;
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index d4a082ef75b4..fe139619351f 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -110,7 +110,7 @@
110* MODIFICATION HISTORY : 110* MODIFICATION HISTORY :
111**************************************************************/ 111**************************************************************/
112 112
113#ifndef BF548_FAMILY 113#ifndef CONFIG_BF54x
114void set_gpio_dir(unsigned, unsigned short); 114void set_gpio_dir(unsigned, unsigned short);
115void set_gpio_inen(unsigned, unsigned short); 115void set_gpio_inen(unsigned, unsigned short);
116void set_gpio_polar(unsigned, unsigned short); 116void set_gpio_polar(unsigned, unsigned short);
@@ -303,7 +303,10 @@ static inline void gpio_set_value(unsigned gpio, int value)
303 303
304static inline int gpio_to_irq(unsigned gpio) 304static inline int gpio_to_irq(unsigned gpio)
305{ 305{
306 return (gpio + GPIO_IRQ_BASE); 306 if (likely(gpio < MAX_BLACKFIN_GPIOS))
307 return gpio + GPIO_IRQ_BASE;
308
309 return -EINVAL;
307} 310}
308 311
309static inline int irq_to_gpio(unsigned irq) 312static inline int irq_to_gpio(unsigned irq)
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h
index 0520d2aac8f3..b0f847ae4bf4 100644
--- a/arch/blackfin/include/asm/gptimers.h
+++ b/arch/blackfin/include/asm/gptimers.h
@@ -15,16 +15,16 @@
15#include <asm/blackfin.h> 15#include <asm/blackfin.h>
16 16
17/* 17/*
18 * BF537/BF527: 8 timers: 18 * BF51x/BF52x/BF537: 8 timers:
19 */ 19 */
20#if defined(BF527_FAMILY) || defined(BF537_FAMILY) 20#if defined(CONFIG_BF51x) || defined(CONFIG_BF52x) || defined(BF537_FAMILY)
21# define MAX_BLACKFIN_GPTIMERS 8 21# define MAX_BLACKFIN_GPTIMERS 8
22# define TIMER0_GROUP_REG TIMER_ENABLE 22# define TIMER0_GROUP_REG TIMER_ENABLE
23#endif 23#endif
24/* 24/*
25 * BF54x: 11 timers (BF542: 8 timers): 25 * BF54x: 11 timers (BF542: 8 timers):
26 */ 26 */
27#if defined(BF548_FAMILY) 27#if defined(CONFIG_BF54x)
28# ifdef CONFIG_BF542 28# ifdef CONFIG_BF542
29# define MAX_BLACKFIN_GPTIMERS 8 29# define MAX_BLACKFIN_GPTIMERS 8
30# else 30# else
diff --git a/arch/blackfin/include/asm/percpu.h b/arch/blackfin/include/asm/percpu.h
index 797c0c165069..c94c7bc88c71 100644
--- a/arch/blackfin/include/asm/percpu.h
+++ b/arch/blackfin/include/asm/percpu.h
@@ -3,14 +3,4 @@
3 3
4#include <asm-generic/percpu.h> 4#include <asm-generic/percpu.h>
5 5
6#ifdef CONFIG_MODULES
7#define PERCPU_MODULE_RESERVE 8192
8#else
9#define PERCPU_MODULE_RESERVE 0
10#endif
11
12#define PERCPU_ENOUGH_ROOM \
13 (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
14 PERCPU_MODULE_RESERVE)
15
16#endif /* __ARCH_BLACKFIN_PERCPU__ */ 6#endif /* __ARCH_BLACKFIN_PERCPU__ */
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 51dac55c524a..a0678da40532 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -69,7 +69,7 @@ enum {
69static struct gpio_port_t * const gpio_array[] = { 69static struct gpio_port_t * const gpio_array[] = {
70#if defined(BF533_FAMILY) || defined(BF538_FAMILY) 70#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
71 (struct gpio_port_t *) FIO_FLAG_D, 71 (struct gpio_port_t *) FIO_FLAG_D,
72#elif defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) 72#elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
73 (struct gpio_port_t *) PORTFIO, 73 (struct gpio_port_t *) PORTFIO,
74 (struct gpio_port_t *) PORTGIO, 74 (struct gpio_port_t *) PORTGIO,
75 (struct gpio_port_t *) PORTHIO, 75 (struct gpio_port_t *) PORTHIO,
@@ -77,7 +77,7 @@ static struct gpio_port_t * const gpio_array[] = {
77 (struct gpio_port_t *) FIO0_FLAG_D, 77 (struct gpio_port_t *) FIO0_FLAG_D,
78 (struct gpio_port_t *) FIO1_FLAG_D, 78 (struct gpio_port_t *) FIO1_FLAG_D,
79 (struct gpio_port_t *) FIO2_FLAG_D, 79 (struct gpio_port_t *) FIO2_FLAG_D,
80#elif defined(BF548_FAMILY) 80#elif defined(CONFIG_BF54x)
81 (struct gpio_port_t *)PORTA_FER, 81 (struct gpio_port_t *)PORTA_FER,
82 (struct gpio_port_t *)PORTB_FER, 82 (struct gpio_port_t *)PORTB_FER,
83 (struct gpio_port_t *)PORTC_FER, 83 (struct gpio_port_t *)PORTC_FER,
@@ -93,7 +93,7 @@ static struct gpio_port_t * const gpio_array[] = {
93#endif 93#endif
94}; 94};
95 95
96#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) 96#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
97static unsigned short * const port_fer[] = { 97static unsigned short * const port_fer[] = {
98 (unsigned short *) PORTF_FER, 98 (unsigned short *) PORTF_FER,
99 (unsigned short *) PORTG_FER, 99 (unsigned short *) PORTG_FER,
@@ -109,11 +109,11 @@ static unsigned short * const port_mux[] = {
109 109
110static const 110static const
111u8 pmux_offset[][16] = { 111u8 pmux_offset[][16] = {
112# if defined(BF527_FAMILY) 112# if defined(CONFIG_BF52x)
113 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */ 113 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
114 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */ 114 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
115 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */ 115 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
116# elif defined(BF518_FAMILY) 116# elif defined(CONFIG_BF51x)
117 { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */ 117 { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
118 { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */ 118 { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
119 { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */ 119 { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
@@ -139,7 +139,7 @@ static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
139 139
140inline int check_gpio(unsigned gpio) 140inline int check_gpio(unsigned gpio)
141{ 141{
142#if defined(BF548_FAMILY) 142#if defined(CONFIG_BF54x)
143 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 143 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
144 || gpio == GPIO_PH14 || gpio == GPIO_PH15 144 || gpio == GPIO_PH14 || gpio == GPIO_PH15
145 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15) 145 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
@@ -187,13 +187,13 @@ static void port_setup(unsigned gpio, unsigned short usage)
187 if (check_gpio(gpio)) 187 if (check_gpio(gpio))
188 return; 188 return;
189 189
190#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) 190#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
191 if (usage == GPIO_USAGE) 191 if (usage == GPIO_USAGE)
192 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio); 192 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
193 else 193 else
194 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio); 194 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
195 SSYNC(); 195 SSYNC();
196#elif defined(BF548_FAMILY) 196#elif defined(CONFIG_BF54x)
197 if (usage == GPIO_USAGE) 197 if (usage == GPIO_USAGE)
198 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio); 198 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
199 else 199 else
@@ -273,7 +273,7 @@ static void portmux_setup(unsigned short per)
273 } 273 }
274 } 274 }
275} 275}
276#elif defined(BF548_FAMILY) 276#elif defined(CONFIG_BF54x)
277inline void portmux_setup(unsigned short per) 277inline void portmux_setup(unsigned short per)
278{ 278{
279 u32 pmux; 279 u32 pmux;
@@ -297,7 +297,7 @@ inline u16 get_portmux(unsigned short per)
297 297
298 return (pmux >> (2 * gpio_sub_n(ident)) & 0x3); 298 return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
299} 299}
300#elif defined(BF527_FAMILY) || defined(BF518_FAMILY) 300#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
301inline void portmux_setup(unsigned short per) 301inline void portmux_setup(unsigned short per)
302{ 302{
303 u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per); 303 u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
@@ -322,7 +322,7 @@ static int __init bfin_gpio_init(void)
322arch_initcall(bfin_gpio_init); 322arch_initcall(bfin_gpio_init);
323 323
324 324
325#ifndef BF548_FAMILY 325#ifndef CONFIG_BF54x
326/*********************************************************** 326/***********************************************************
327* 327*
328* FUNCTIONS: Blackfin General Purpose Ports Access Functions 328* FUNCTIONS: Blackfin General Purpose Ports Access Functions
@@ -489,7 +489,7 @@ static const unsigned int sic_iwr_irqs[] = {
489 IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX 489 IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
490#elif defined(BF538_FAMILY) 490#elif defined(BF538_FAMILY)
491 IRQ_PORTF_INTB 491 IRQ_PORTF_INTB
492#elif defined(BF527_FAMILY) || defined(BF518_FAMILY) 492#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
493 IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB 493 IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
494#elif defined(BF561_FAMILY) 494#elif defined(BF561_FAMILY)
495 IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB 495 IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
@@ -586,7 +586,7 @@ u32 bfin_pm_standby_setup(void)
586 gpio_array[bank]->maskb = 0; 586 gpio_array[bank]->maskb = 0;
587 587
588 if (mask) { 588 if (mask) {
589#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) 589#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
590 gpio_bank_saved[bank].fer = *port_fer[bank]; 590 gpio_bank_saved[bank].fer = *port_fer[bank];
591#endif 591#endif
592 gpio_bank_saved[bank].inen = gpio_array[bank]->inen; 592 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
@@ -631,7 +631,7 @@ void bfin_pm_standby_restore(void)
631 bank = gpio_bank(i); 631 bank = gpio_bank(i);
632 632
633 if (mask) { 633 if (mask) {
634#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) 634#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
635 *port_fer[bank] = gpio_bank_saved[bank].fer; 635 *port_fer[bank] = gpio_bank_saved[bank].fer;
636#endif 636#endif
637 gpio_array[bank]->inen = gpio_bank_saved[bank].inen; 637 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
@@ -657,9 +657,9 @@ void bfin_gpio_pm_hibernate_suspend(void)
657 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { 657 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
658 bank = gpio_bank(i); 658 bank = gpio_bank(i);
659 659
660#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) 660#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
661 gpio_bank_saved[bank].fer = *port_fer[bank]; 661 gpio_bank_saved[bank].fer = *port_fer[bank];
662#if defined(BF527_FAMILY) || defined(BF518_FAMILY) 662#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
663 gpio_bank_saved[bank].mux = *port_mux[bank]; 663 gpio_bank_saved[bank].mux = *port_mux[bank];
664#else 664#else
665 if (bank == 0) 665 if (bank == 0)
@@ -685,8 +685,8 @@ void bfin_gpio_pm_hibernate_restore(void)
685 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { 685 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
686 bank = gpio_bank(i); 686 bank = gpio_bank(i);
687 687
688#if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) 688#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
689#if defined(BF527_FAMILY) || defined(BF518_FAMILY) 689#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
690 *port_mux[bank] = gpio_bank_saved[bank].mux; 690 *port_mux[bank] = gpio_bank_saved[bank].mux;
691#else 691#else
692 if (bank == 0) 692 if (bank == 0)
@@ -710,7 +710,7 @@ void bfin_gpio_pm_hibernate_restore(void)
710 710
711 711
712#endif 712#endif
713#else /* BF548_FAMILY */ 713#else /* CONFIG_BF54x */
714#ifdef CONFIG_PM 714#ifdef CONFIG_PM
715 715
716u32 bfin_pm_standby_setup(void) 716u32 bfin_pm_standby_setup(void)
@@ -762,7 +762,7 @@ unsigned short get_gpio_dir(unsigned gpio)
762} 762}
763EXPORT_SYMBOL(get_gpio_dir); 763EXPORT_SYMBOL(get_gpio_dir);
764 764
765#endif /* BF548_FAMILY */ 765#endif /* CONFIG_BF54x */
766 766
767/*********************************************************** 767/***********************************************************
768* 768*
@@ -802,7 +802,8 @@ int peripheral_request(unsigned short per, const char *label)
802 */ 802 */
803 if (unlikely(!check_gpio(ident) && 803 if (unlikely(!check_gpio(ident) &&
804 reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) { 804 reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
805 dump_stack(); 805 if (system_state == SYSTEM_BOOTING)
806 dump_stack();
806 printk(KERN_ERR 807 printk(KERN_ERR
807 "%s: Peripheral %d is already reserved as GPIO by %s !\n", 808 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
808 __func__, ident, get_label(ident)); 809 __func__, ident, get_label(ident));
@@ -817,7 +818,7 @@ int peripheral_request(unsigned short per, const char *label)
817 * be requested and used by several drivers 818 * be requested and used by several drivers
818 */ 819 */
819 820
820#ifdef BF548_FAMILY 821#ifdef CONFIG_BF54x
821 if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) { 822 if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
822#else 823#else
823 if (!(per & P_MAYSHARE)) { 824 if (!(per & P_MAYSHARE)) {
@@ -830,7 +831,8 @@ int peripheral_request(unsigned short per, const char *label)
830 if (cmp_label(ident, label) == 0) 831 if (cmp_label(ident, label) == 0)
831 goto anyway; 832 goto anyway;
832 833
833 dump_stack(); 834 if (system_state == SYSTEM_BOOTING)
835 dump_stack();
834 printk(KERN_ERR 836 printk(KERN_ERR
835 "%s: Peripheral %d function %d is already reserved by %s !\n", 837 "%s: Peripheral %d function %d is already reserved by %s !\n",
836 __func__, ident, P_FUNCT2MUX(per), get_label(ident)); 838 __func__, ident, P_FUNCT2MUX(per), get_label(ident));
@@ -946,14 +948,16 @@ int bfin_gpio_request(unsigned gpio, const char *label)
946 } 948 }
947 949
948 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) { 950 if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
949 dump_stack(); 951 if (system_state == SYSTEM_BOOTING)
952 dump_stack();
950 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n", 953 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
951 gpio, get_label(gpio)); 954 gpio, get_label(gpio));
952 local_irq_restore_hw(flags); 955 local_irq_restore_hw(flags);
953 return -EBUSY; 956 return -EBUSY;
954 } 957 }
955 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) { 958 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
956 dump_stack(); 959 if (system_state == SYSTEM_BOOTING)
960 dump_stack();
957 printk(KERN_ERR 961 printk(KERN_ERR
958 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n", 962 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
959 gpio, get_label(gpio)); 963 gpio, get_label(gpio));
@@ -964,7 +968,7 @@ int bfin_gpio_request(unsigned gpio, const char *label)
964 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!" 968 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
965 " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio); 969 " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
966 } 970 }
967#ifndef BF548_FAMILY 971#ifndef CONFIG_BF54x
968 else { /* Reset POLAR setting when acquiring a gpio for the first time */ 972 else { /* Reset POLAR setting when acquiring a gpio for the first time */
969 set_gpio_polar(gpio, 0); 973 set_gpio_polar(gpio, 0);
970 } 974 }
@@ -993,7 +997,8 @@ void bfin_gpio_free(unsigned gpio)
993 local_irq_save_hw(flags); 997 local_irq_save_hw(flags);
994 998
995 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) { 999 if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
996 dump_stack(); 1000 if (system_state == SYSTEM_BOOTING)
1001 dump_stack();
997 gpio_error(gpio); 1002 gpio_error(gpio);
998 local_irq_restore_hw(flags); 1003 local_irq_restore_hw(flags);
999 return; 1004 return;
@@ -1017,7 +1022,8 @@ int bfin_gpio_irq_request(unsigned gpio, const char *label)
1017 local_irq_save_hw(flags); 1022 local_irq_save_hw(flags);
1018 1023
1019 if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) { 1024 if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1020 dump_stack(); 1025 if (system_state == SYSTEM_BOOTING)
1026 dump_stack();
1021 printk(KERN_ERR 1027 printk(KERN_ERR
1022 "bfin-gpio: GPIO %d is already reserved as gpio-irq !\n", 1028 "bfin-gpio: GPIO %d is already reserved as gpio-irq !\n",
1023 gpio); 1029 gpio);
@@ -1025,7 +1031,8 @@ int bfin_gpio_irq_request(unsigned gpio, const char *label)
1025 return -EBUSY; 1031 return -EBUSY;
1026 } 1032 }
1027 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) { 1033 if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
1028 dump_stack(); 1034 if (system_state == SYSTEM_BOOTING)
1035 dump_stack();
1029 printk(KERN_ERR 1036 printk(KERN_ERR
1030 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n", 1037 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1031 gpio, get_label(gpio)); 1038 gpio, get_label(gpio));
@@ -1057,7 +1064,8 @@ void bfin_gpio_irq_free(unsigned gpio)
1057 local_irq_save_hw(flags); 1064 local_irq_save_hw(flags);
1058 1065
1059 if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) { 1066 if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
1060 dump_stack(); 1067 if (system_state == SYSTEM_BOOTING)
1068 dump_stack();
1061 gpio_error(gpio); 1069 gpio_error(gpio);
1062 local_irq_restore_hw(flags); 1070 local_irq_restore_hw(flags);
1063 return; 1071 return;
@@ -1072,7 +1080,7 @@ void bfin_gpio_irq_free(unsigned gpio)
1072 1080
1073static inline void __bfin_gpio_direction_input(unsigned gpio) 1081static inline void __bfin_gpio_direction_input(unsigned gpio)
1074{ 1082{
1075#ifdef BF548_FAMILY 1083#ifdef CONFIG_BF54x
1076 gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio); 1084 gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
1077#else 1085#else
1078 gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio); 1086 gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
@@ -1100,13 +1108,13 @@ EXPORT_SYMBOL(bfin_gpio_direction_input);
1100 1108
1101void bfin_gpio_irq_prepare(unsigned gpio) 1109void bfin_gpio_irq_prepare(unsigned gpio)
1102{ 1110{
1103#ifdef BF548_FAMILY 1111#ifdef CONFIG_BF54x
1104 unsigned long flags; 1112 unsigned long flags;
1105#endif 1113#endif
1106 1114
1107 port_setup(gpio, GPIO_USAGE); 1115 port_setup(gpio, GPIO_USAGE);
1108 1116
1109#ifdef BF548_FAMILY 1117#ifdef CONFIG_BF54x
1110 local_irq_save_hw(flags); 1118 local_irq_save_hw(flags);
1111 __bfin_gpio_direction_input(gpio); 1119 __bfin_gpio_direction_input(gpio);
1112 local_irq_restore_hw(flags); 1120 local_irq_restore_hw(flags);
@@ -1135,7 +1143,7 @@ int bfin_gpio_direction_output(unsigned gpio, int value)
1135 1143
1136 gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio); 1144 gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1137 gpio_set_value(gpio, value); 1145 gpio_set_value(gpio, value);
1138#ifdef BF548_FAMILY 1146#ifdef CONFIG_BF54x
1139 gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio); 1147 gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
1140#else 1148#else
1141 gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio); 1149 gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
@@ -1150,7 +1158,7 @@ EXPORT_SYMBOL(bfin_gpio_direction_output);
1150 1158
1151int bfin_gpio_get_value(unsigned gpio) 1159int bfin_gpio_get_value(unsigned gpio)
1152{ 1160{
1153#ifdef BF548_FAMILY 1161#ifdef CONFIG_BF54x
1154 return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio))); 1162 return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
1155#else 1163#else
1156 unsigned long flags; 1164 unsigned long flags;
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c
index bd052a67032e..401bd32aa499 100644
--- a/arch/blackfin/kernel/irqchip.c
+++ b/arch/blackfin/kernel/irqchip.c
@@ -70,6 +70,11 @@ static struct irq_desc bad_irq_desc = {
70#endif 70#endif
71}; 71};
72 72
73#ifdef CONFIG_CPUMASK_OFFSTACK
74/* We are not allocating a variable-sized bad_irq_desc.affinity */
75#error "Blackfin architecture does not support CONFIG_CPUMASK_OFFSTACK."
76#endif
77
73int show_interrupts(struct seq_file *p, void *v) 78int show_interrupts(struct seq_file *p, void *v)
74{ 79{
75 int i = *(loff_t *) v, j; 80 int i = *(loff_t *) v, j;
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index 4b4341da0585..27952ae047d8 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -183,6 +183,7 @@ SECTIONS
183 . = ALIGN(4); 183 . = ALIGN(4);
184 __etext_l1 = .; 184 __etext_l1 = .;
185 } 185 }
186 ASSERT (SIZEOF(.text_l1) <= L1_CODE_LENGTH, "L1 text overflow!")
186 187
187 .data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1)) 188 .data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1))
188 { 189 {
@@ -200,6 +201,7 @@ SECTIONS
200 . = ALIGN(4); 201 . = ALIGN(4);
201 __ebss_l1 = .; 202 __ebss_l1 = .;
202 } 203 }
204 ASSERT (SIZEOF(.data_a_l1) <= L1_DATA_A_LENGTH, "L1 data A overflow!")
203 205
204 .data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1)) 206 .data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
205 { 207 {
@@ -214,6 +216,7 @@ SECTIONS
214 . = ALIGN(4); 216 . = ALIGN(4);
215 __ebss_b_l1 = .; 217 __ebss_b_l1 = .;
216 } 218 }
219 ASSERT (SIZEOF(.data_b_l1) <= L1_DATA_B_LENGTH, "L1 data B overflow!")
217 220
218 __l2_lma_start = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1); 221 __l2_lma_start = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1);
219 222
@@ -239,6 +242,7 @@ SECTIONS
239 . = ALIGN(4); 242 . = ALIGN(4);
240 __ebss_l2 = .; 243 __ebss_l2 = .;
241 } 244 }
245 ASSERT (SIZEOF(.text_data_l1) <= L2_LENGTH, "L2 overflow!")
242 246
243 /* Force trailing alignment of our init section so that when we 247 /* Force trailing alignment of our init section so that when we
244 * free our init memory, we don't leave behind a partial page. 248 * free our init memory, we don't leave behind a partial page.
diff --git a/arch/blackfin/mach-bf518/include/mach/blackfin.h b/arch/blackfin/mach-bf518/include/mach/blackfin.h
index d1a2b9ca6227..267bb7c8bfb5 100644
--- a/arch/blackfin/mach-bf518/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf518/include/mach/blackfin.h
@@ -32,8 +32,6 @@
32#ifndef _MACH_BLACKFIN_H_ 32#ifndef _MACH_BLACKFIN_H_
33#define _MACH_BLACKFIN_H_ 33#define _MACH_BLACKFIN_H_
34 34
35#define BF518_FAMILY
36
37#include "bf518.h" 35#include "bf518.h"
38#include "mem_map.h" 36#include "mem_map.h"
39#include "defBF512.h" 37#include "defBF512.h"
diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF514.h b/arch/blackfin/mach-bf518/include/mach/cdefBF514.h
index 9521e178fb28..dfe492dfe54e 100644
--- a/arch/blackfin/mach-bf518/include/mach/cdefBF514.h
+++ b/arch/blackfin/mach-bf518/include/mach/cdefBF514.h
@@ -45,4 +45,71 @@
45 45
46/* The following are the #defines needed by ADSP-BF514 that are not in the common header */ 46/* The following are the #defines needed by ADSP-BF514 that are not in the common header */
47 47
48/* Removable Storage Interface Registers */
49
50#define bfin_read_RSI_PWR_CTL() bfin_read16(RSI_PWR_CONTROL)
51#define bfin_write_RSI_PWR_CTL(val) bfin_write16(RSI_PWR_CONTROL, val)
52#define bfin_read_RSI_CLK_CTL() bfin_read16(RSI_CLK_CONTROL)
53#define bfin_write_RSI_CLK_CTL(val) bfin_write16(RSI_CLK_CONTROL, val)
54#define bfin_read_RSI_ARGUMENT() bfin_read32(RSI_ARGUMENT)
55#define bfin_write_RSI_ARGUMENT(val) bfin_write32(RSI_ARGUMENT, val)
56#define bfin_read_RSI_COMMAND() bfin_read16(RSI_COMMAND)
57#define bfin_write_RSI_COMMAND(val) bfin_write16(RSI_COMMAND, val)
58#define bfin_read_RSI_RESP_CMD() bfin_read16(RSI_RESP_CMD)
59#define bfin_write_RSI_RESP_CMD(val) bfin_write16(RSI_RESP_CMD, val)
60#define bfin_read_RSI_RESPONSE0() bfin_read32(RSI_RESPONSE0)
61#define bfin_write_RSI_RESPONSE0(val) bfin_write32(RSI_RESPONSE0, val)
62#define bfin_read_RSI_RESPONSE1() bfin_read32(RSI_RESPONSE1)
63#define bfin_write_RSI_RESPONSE1(val) bfin_write32(RSI_RESPONSE1, val)
64#define bfin_read_RSI_RESPONSE2() bfin_read32(RSI_RESPONSE2)
65#define bfin_write_RSI_RESPONSE2(val) bfin_write32(RSI_RESPONSE2, val)
66#define bfin_read_RSI_RESPONSE3() bfin_read32(RSI_RESPONSE3)
67#define bfin_write_RSI_RESPONSE3(val) bfin_write32(RSI_RESPONSE3, val)
68#define bfin_read_RSI_DATA_TIMER() bfin_read32(RSI_DATA_TIMER)
69#define bfin_write_RSI_DATA_TIMER(val) bfin_write32(RSI_DATA_TIMER, val)
70#define bfin_read_RSI_DATA_LGTH() bfin_read16(RSI_DATA_LGTH)
71#define bfin_write_RSI_DATA_LGTH(val) bfin_write16(RSI_DATA_LGTH, val)
72#define bfin_read_RSI_DATA_CTL() bfin_read16(RSI_DATA_CONTROL)
73#define bfin_write_RSI_DATA_CTL(val) bfin_write16(RSI_DATA_CONTROL, val)
74#define bfin_read_RSI_DATA_CNT() bfin_read16(RSI_DATA_CNT)
75#define bfin_write_RSI_DATA_CNT(val) bfin_write16(RSI_DATA_CNT, val)
76#define bfin_read_RSI_STATUS() bfin_read32(RSI_STATUS)
77#define bfin_write_RSI_STATUS(val) bfin_write32(RSI_STATUS, val)
78#define bfin_read_RSI_STATUS_CLR() bfin_read16(RSI_STATUSCL)
79#define bfin_write_RSI_STATUS_CLR(val) bfin_write16(RSI_STATUSCL, val)
80#define bfin_read_RSI_MASK0() bfin_read32(RSI_MASK0)
81#define bfin_write_RSI_MASK0(val) bfin_write32(RSI_MASK0, val)
82#define bfin_read_RSI_MASK1() bfin_read32(RSI_MASK1)
83#define bfin_write_RSI_MASK1(val) bfin_write32(RSI_MASK1, val)
84#define bfin_read_RSI_FIFO_CNT() bfin_read16(RSI_FIFO_CNT)
85#define bfin_write_RSI_FIFO_CNT(val) bfin_write16(RSI_FIFO_CNT, val)
86#define bfin_read_RSI_CEATA_CTL() bfin_read16(RSI_CEATA_CONTROL)
87#define bfin_write_RSI_CEATA_CTL(val) bfin_write16(RSI_CEATA_CONTROL, val)
88#define bfin_read_RSI_FIFO() bfin_read32(RSI_FIFO)
89#define bfin_write_RSI_FIFO(val) bfin_write32(RSI_FIFO, val)
90#define bfin_read_RSI_E_STATUS() bfin_read16(RSI_ESTAT)
91#define bfin_write_RSI_E_STATUS(val) bfin_write16(RSI_ESTAT, val)
92#define bfin_read_RSI_E_MASK() bfin_read16(RSI_EMASK)
93#define bfin_write_RSI_E_MASK(val) bfin_write16(RSI_EMASK, val)
94#define bfin_read_RSI_CFG() bfin_read16(RSI_CONFIG)
95#define bfin_write_RSI_CFG(val) bfin_write16(RSI_CONFIG, val)
96#define bfin_read_RSI_RD_WAIT_EN() bfin_read16(RSI_RD_WAIT_EN)
97#define bfin_write_RSI_RD_WAIT_EN(val) bfin_write16(RSI_RD_WAIT_EN, val)
98#define bfin_read_RSI_PID0() bfin_read16(RSI_PID0)
99#define bfin_write_RSI_PID0(val) bfin_write16(RSI_PID0, val)
100#define bfin_read_RSI_PID1() bfin_read16(RSI_PID1)
101#define bfin_write_RSI_PID1(val) bfin_write16(RSI_PID1, val)
102#define bfin_read_RSI_PID2() bfin_read16(RSI_PID2)
103#define bfin_write_RSI_PID2(val) bfin_write16(RSI_PID2, val)
104#define bfin_read_RSI_PID3() bfin_read16(RSI_PID3)
105#define bfin_write_RSI_PID3(val) bfin_write16(RSI_PID3, val)
106#define bfin_read_RSI_PID4() bfin_read16(RSI_PID4)
107#define bfin_write_RSI_PID4(val) bfin_write16(RSI_PID4, val)
108#define bfin_read_RSI_PID5() bfin_read16(RSI_PID5)
109#define bfin_write_RSI_PID5(val) bfin_write16(RSI_PID5, val)
110#define bfin_read_RSI_PID6() bfin_read16(RSI_PID6)
111#define bfin_write_RSI_PID6(val) bfin_write16(RSI_PID6, val)
112#define bfin_read_RSI_PID7() bfin_read16(RSI_PID7)
113#define bfin_write_RSI_PID7(val) bfin_write16(RSI_PID7, val)
114
48#endif /* _CDEF_BF514_H */ 115#endif /* _CDEF_BF514_H */
diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF516.h b/arch/blackfin/mach-bf518/include/mach/cdefBF516.h
index 4e26ccfcef97..14df43d4677a 100644
--- a/arch/blackfin/mach-bf518/include/mach/cdefBF516.h
+++ b/arch/blackfin/mach-bf518/include/mach/cdefBF516.h
@@ -210,4 +210,71 @@
210#define bfin_read_EMAC_TXC_ABORT() bfin_read32(EMAC_TXC_ABORT) 210#define bfin_read_EMAC_TXC_ABORT() bfin_read32(EMAC_TXC_ABORT)
211#define bfin_write_EMAC_TXC_ABORT(val) bfin_write32(EMAC_TXC_ABORT, val) 211#define bfin_write_EMAC_TXC_ABORT(val) bfin_write32(EMAC_TXC_ABORT, val)
212 212
213/* Removable Storage Interface Registers */
214
215#define bfin_read_RSI_PWR_CTL() bfin_read16(RSI_PWR_CONTROL)
216#define bfin_write_RSI_PWR_CTL(val) bfin_write16(RSI_PWR_CONTROL, val)
217#define bfin_read_RSI_CLK_CTL() bfin_read16(RSI_CLK_CONTROL)
218#define bfin_write_RSI_CLK_CTL(val) bfin_write16(RSI_CLK_CONTROL, val)
219#define bfin_read_RSI_ARGUMENT() bfin_read32(RSI_ARGUMENT)
220#define bfin_write_RSI_ARGUMENT(val) bfin_write32(RSI_ARGUMENT, val)
221#define bfin_read_RSI_COMMAND() bfin_read16(RSI_COMMAND)
222#define bfin_write_RSI_COMMAND(val) bfin_write16(RSI_COMMAND, val)
223#define bfin_read_RSI_RESP_CMD() bfin_read16(RSI_RESP_CMD)
224#define bfin_write_RSI_RESP_CMD(val) bfin_write16(RSI_RESP_CMD, val)
225#define bfin_read_RSI_RESPONSE0() bfin_read32(RSI_RESPONSE0)
226#define bfin_write_RSI_RESPONSE0(val) bfin_write32(RSI_RESPONSE0, val)
227#define bfin_read_RSI_RESPONSE1() bfin_read32(RSI_RESPONSE1)
228#define bfin_write_RSI_RESPONSE1(val) bfin_write32(RSI_RESPONSE1, val)
229#define bfin_read_RSI_RESPONSE2() bfin_read32(RSI_RESPONSE2)
230#define bfin_write_RSI_RESPONSE2(val) bfin_write32(RSI_RESPONSE2, val)
231#define bfin_read_RSI_RESPONSE3() bfin_read32(RSI_RESPONSE3)
232#define bfin_write_RSI_RESPONSE3(val) bfin_write32(RSI_RESPONSE3, val)
233#define bfin_read_RSI_DATA_TIMER() bfin_read32(RSI_DATA_TIMER)
234#define bfin_write_RSI_DATA_TIMER(val) bfin_write32(RSI_DATA_TIMER, val)
235#define bfin_read_RSI_DATA_LGTH() bfin_read16(RSI_DATA_LGTH)
236#define bfin_write_RSI_DATA_LGTH(val) bfin_write16(RSI_DATA_LGTH, val)
237#define bfin_read_RSI_DATA_CTL() bfin_read16(RSI_DATA_CONTROL)
238#define bfin_write_RSI_DATA_CTL(val) bfin_write16(RSI_DATA_CONTROL, val)
239#define bfin_read_RSI_DATA_CNT() bfin_read16(RSI_DATA_CNT)
240#define bfin_write_RSI_DATA_CNT(val) bfin_write16(RSI_DATA_CNT, val)
241#define bfin_read_RSI_STATUS() bfin_read32(RSI_STATUS)
242#define bfin_write_RSI_STATUS(val) bfin_write32(RSI_STATUS, val)
243#define bfin_read_RSI_STATUS_CLR() bfin_read16(RSI_STATUSCL)
244#define bfin_write_RSI_STATUS_CLR(val) bfin_write16(RSI_STATUSCL, val)
245#define bfin_read_RSI_MASK0() bfin_read32(RSI_MASK0)
246#define bfin_write_RSI_MASK0(val) bfin_write32(RSI_MASK0, val)
247#define bfin_read_RSI_MASK1() bfin_read32(RSI_MASK1)
248#define bfin_write_RSI_MASK1(val) bfin_write32(RSI_MASK1, val)
249#define bfin_read_RSI_FIFO_CNT() bfin_read16(RSI_FIFO_CNT)
250#define bfin_write_RSI_FIFO_CNT(val) bfin_write16(RSI_FIFO_CNT, val)
251#define bfin_read_RSI_CEATA_CTL() bfin_read16(RSI_CEATA_CONTROL)
252#define bfin_write_RSI_CEATA_CTL(val) bfin_write16(RSI_CEATA_CONTROL, val)
253#define bfin_read_RSI_FIFO() bfin_read32(RSI_FIFO)
254#define bfin_write_RSI_FIFO(val) bfin_write32(RSI_FIFO, val)
255#define bfin_read_RSI_E_STATUS() bfin_read16(RSI_ESTAT)
256#define bfin_write_RSI_E_STATUS(val) bfin_write16(RSI_ESTAT, val)
257#define bfin_read_RSI_E_MASK() bfin_read16(RSI_EMASK)
258#define bfin_write_RSI_E_MASK(val) bfin_write16(RSI_EMASK, val)
259#define bfin_read_RSI_CFG() bfin_read16(RSI_CONFIG)
260#define bfin_write_RSI_CFG(val) bfin_write16(RSI_CONFIG, val)
261#define bfin_read_RSI_RD_WAIT_EN() bfin_read16(RSI_RD_WAIT_EN)
262#define bfin_write_RSI_RD_WAIT_EN(val) bfin_write16(RSI_RD_WAIT_EN, val)
263#define bfin_read_RSI_PID0() bfin_read16(RSI_PID0)
264#define bfin_write_RSI_PID0(val) bfin_write16(RSI_PID0, val)
265#define bfin_read_RSI_PID1() bfin_read16(RSI_PID1)
266#define bfin_write_RSI_PID1(val) bfin_write16(RSI_PID1, val)
267#define bfin_read_RSI_PID2() bfin_read16(RSI_PID2)
268#define bfin_write_RSI_PID2(val) bfin_write16(RSI_PID2, val)
269#define bfin_read_RSI_PID3() bfin_read16(RSI_PID3)
270#define bfin_write_RSI_PID3(val) bfin_write16(RSI_PID3, val)
271#define bfin_read_RSI_PID4() bfin_read16(RSI_PID4)
272#define bfin_write_RSI_PID4(val) bfin_write16(RSI_PID4, val)
273#define bfin_read_RSI_PID5() bfin_read16(RSI_PID5)
274#define bfin_write_RSI_PID5(val) bfin_write16(RSI_PID5, val)
275#define bfin_read_RSI_PID6() bfin_read16(RSI_PID6)
276#define bfin_write_RSI_PID6(val) bfin_write16(RSI_PID6, val)
277#define bfin_read_RSI_PID7() bfin_read16(RSI_PID7)
278#define bfin_write_RSI_PID7(val) bfin_write16(RSI_PID7, val)
279
213#endif /* _CDEF_BF516_H */ 280#endif /* _CDEF_BF516_H */
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF514.h b/arch/blackfin/mach-bf518/include/mach/defBF514.h
index 543f2913b3f5..56ee5a7c2007 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF514.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF514.h
@@ -110,4 +110,139 @@
110#define RSI_PID6 0xFFC03FF8 /* RSI Peripheral ID Register 6 */ 110#define RSI_PID6 0xFFC03FF8 /* RSI Peripheral ID Register 6 */
111#define RSI_PID7 0xFFC03FFC /* RSI Peripheral ID Register 7 */ 111#define RSI_PID7 0xFFC03FFC /* RSI Peripheral ID Register 7 */
112 112
113/* ********************************************************** */
114/* SINGLE BIT MACRO PAIRS (bit mask and negated one) */
115/* and MULTI BIT READ MACROS */
116/* ********************************************************** */
117
118/* Bit masks for SDH_COMMAND */
119
120#define CMD_IDX 0x3f /* Command Index */
121#define CMD_RSP 0x40 /* Response */
122#define CMD_L_RSP 0x80 /* Long Response */
123#define CMD_INT_E 0x100 /* Command Interrupt */
124#define CMD_PEND_E 0x200 /* Command Pending */
125#define CMD_E 0x400 /* Command Enable */
126
127/* Bit masks for SDH_PWR_CTL */
128
129#define PWR_ON 0x3 /* Power On */
130#if 0
131#define TBD 0x3c /* TBD */
132#endif
133#define SD_CMD_OD 0x40 /* Open Drain Output */
134#define ROD_CTL 0x80 /* Rod Control */
135
136/* Bit masks for SDH_CLK_CTL */
137
138#define CLKDIV 0xff /* MC_CLK Divisor */
139#define CLK_E 0x100 /* MC_CLK Bus Clock Enable */
140#define PWR_SV_E 0x200 /* Power Save Enable */
141#define CLKDIV_BYPASS 0x400 /* Bypass Divisor */
142#define WIDE_BUS 0x800 /* Wide Bus Mode Enable */
143
144/* Bit masks for SDH_RESP_CMD */
145
146#define RESP_CMD 0x3f /* Response Command */
147
148/* Bit masks for SDH_DATA_CTL */
149
150#define DTX_E 0x1 /* Data Transfer Enable */
151#define DTX_DIR 0x2 /* Data Transfer Direction */
152#define DTX_MODE 0x4 /* Data Transfer Mode */
153#define DTX_DMA_E 0x8 /* Data Transfer DMA Enable */
154#define DTX_BLK_LGTH 0xf0 /* Data Transfer Block Length */
155
156/* Bit masks for SDH_STATUS */
157
158#define CMD_CRC_FAIL 0x1 /* CMD CRC Fail */
159#define DAT_CRC_FAIL 0x2 /* Data CRC Fail */
160#define CMD_TIME_OUT 0x4 /* CMD Time Out */
161#define DAT_TIME_OUT 0x8 /* Data Time Out */
162#define TX_UNDERRUN 0x10 /* Transmit Underrun */
163#define RX_OVERRUN 0x20 /* Receive Overrun */
164#define CMD_RESP_END 0x40 /* CMD Response End */
165#define CMD_SENT 0x80 /* CMD Sent */
166#define DAT_END 0x100 /* Data End */
167#define START_BIT_ERR 0x200 /* Start Bit Error */
168#define DAT_BLK_END 0x400 /* Data Block End */
169#define CMD_ACT 0x800 /* CMD Active */
170#define TX_ACT 0x1000 /* Transmit Active */
171#define RX_ACT 0x2000 /* Receive Active */
172#define TX_FIFO_STAT 0x4000 /* Transmit FIFO Status */
173#define RX_FIFO_STAT 0x8000 /* Receive FIFO Status */
174#define TX_FIFO_FULL 0x10000 /* Transmit FIFO Full */
175#define RX_FIFO_FULL 0x20000 /* Receive FIFO Full */
176#define TX_FIFO_ZERO 0x40000 /* Transmit FIFO Empty */
177#define RX_DAT_ZERO 0x80000 /* Receive FIFO Empty */
178#define TX_DAT_RDY 0x100000 /* Transmit Data Available */
179#define RX_FIFO_RDY 0x200000 /* Receive Data Available */
180
181/* Bit masks for SDH_STATUS_CLR */
182
183#define CMD_CRC_FAIL_STAT 0x1 /* CMD CRC Fail Status */
184#define DAT_CRC_FAIL_STAT 0x2 /* Data CRC Fail Status */
185#define CMD_TIMEOUT_STAT 0x4 /* CMD Time Out Status */
186#define DAT_TIMEOUT_STAT 0x8 /* Data Time Out status */
187#define TX_UNDERRUN_STAT 0x10 /* Transmit Underrun Status */
188#define RX_OVERRUN_STAT 0x20 /* Receive Overrun Status */
189#define CMD_RESP_END_STAT 0x40 /* CMD Response End Status */
190#define CMD_SENT_STAT 0x80 /* CMD Sent Status */
191#define DAT_END_STAT 0x100 /* Data End Status */
192#define START_BIT_ERR_STAT 0x200 /* Start Bit Error Status */
193#define DAT_BLK_END_STAT 0x400 /* Data Block End Status */
194
195/* Bit masks for SDH_MASK0 */
196
197#define CMD_CRC_FAIL_MASK 0x1 /* CMD CRC Fail Mask */
198#define DAT_CRC_FAIL_MASK 0x2 /* Data CRC Fail Mask */
199#define CMD_TIMEOUT_MASK 0x4 /* CMD Time Out Mask */
200#define DAT_TIMEOUT_MASK 0x8 /* Data Time Out Mask */
201#define TX_UNDERRUN_MASK 0x10 /* Transmit Underrun Mask */
202#define RX_OVERRUN_MASK 0x20 /* Receive Overrun Mask */
203#define CMD_RESP_END_MASK 0x40 /* CMD Response End Mask */
204#define CMD_SENT_MASK 0x80 /* CMD Sent Mask */
205#define DAT_END_MASK 0x100 /* Data End Mask */
206#define START_BIT_ERR_MASK 0x200 /* Start Bit Error Mask */
207#define DAT_BLK_END_MASK 0x400 /* Data Block End Mask */
208#define CMD_ACT_MASK 0x800 /* CMD Active Mask */
209#define TX_ACT_MASK 0x1000 /* Transmit Active Mask */
210#define RX_ACT_MASK 0x2000 /* Receive Active Mask */
211#define TX_FIFO_STAT_MASK 0x4000 /* Transmit FIFO Status Mask */
212#define RX_FIFO_STAT_MASK 0x8000 /* Receive FIFO Status Mask */
213#define TX_FIFO_FULL_MASK 0x10000 /* Transmit FIFO Full Mask */
214#define RX_FIFO_FULL_MASK 0x20000 /* Receive FIFO Full Mask */
215#define TX_FIFO_ZERO_MASK 0x40000 /* Transmit FIFO Empty Mask */
216#define RX_DAT_ZERO_MASK 0x80000 /* Receive FIFO Empty Mask */
217#define TX_DAT_RDY_MASK 0x100000 /* Transmit Data Available Mask */
218#define RX_FIFO_RDY_MASK 0x200000 /* Receive Data Available Mask */
219
220/* Bit masks for SDH_FIFO_CNT */
221
222#define FIFO_COUNT 0x7fff /* FIFO Count */
223
224/* Bit masks for SDH_E_STATUS */
225
226#define SDIO_INT_DET 0x2 /* SDIO Int Detected */
227#define SD_CARD_DET 0x10 /* SD Card Detect */
228
229/* Bit masks for SDH_E_MASK */
230
231#define SDIO_MSK 0x2 /* Mask SDIO Int Detected */
232#define SCD_MSK 0x40 /* Mask Card Detect */
233
234/* Bit masks for SDH_CFG */
235
236#define CLKS_EN 0x1 /* Clocks Enable */
237#define SD4E 0x4 /* SDIO 4-Bit Enable */
238#define MWE 0x8 /* Moving Window Enable */
239#define SD_RST 0x10 /* SDMMC Reset */
240#define PUP_SDDAT 0x20 /* Pull-up SD_DAT */
241#define PUP_SDDAT3 0x40 /* Pull-up SD_DAT3 */
242#define PD_SDDAT3 0x80 /* Pull-down SD_DAT3 */
243
244/* Bit masks for SDH_RD_WAIT_EN */
245
246#define RWR 0x1 /* Read Wait Request */
247
113#endif /* _DEF_BF514_H */ 248#endif /* _DEF_BF514_H */
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF516.h b/arch/blackfin/mach-bf518/include/mach/defBF516.h
index 149a269306c5..dfc93843517d 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF516.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF516.h
@@ -487,4 +487,139 @@
487#define RSI_PID6 0xFFC03FF8 /* RSI Peripheral ID Register 6 */ 487#define RSI_PID6 0xFFC03FF8 /* RSI Peripheral ID Register 6 */
488#define RSI_PID7 0xFFC03FFC /* RSI Peripheral ID Register 7 */ 488#define RSI_PID7 0xFFC03FFC /* RSI Peripheral ID Register 7 */
489 489
490/* ********************************************************** */
491/* SINGLE BIT MACRO PAIRS (bit mask and negated one) */
492/* and MULTI BIT READ MACROS */
493/* ********************************************************** */
494
495/* Bit masks for SDH_COMMAND */
496
497#define CMD_IDX 0x3f /* Command Index */
498#define CMD_RSP 0x40 /* Response */
499#define CMD_L_RSP 0x80 /* Long Response */
500#define CMD_INT_E 0x100 /* Command Interrupt */
501#define CMD_PEND_E 0x200 /* Command Pending */
502#define CMD_E 0x400 /* Command Enable */
503
504/* Bit masks for SDH_PWR_CTL */
505
506#define PWR_ON 0x3 /* Power On */
507#if 0
508#define TBD 0x3c /* TBD */
509#endif
510#define SD_CMD_OD 0x40 /* Open Drain Output */
511#define ROD_CTL 0x80 /* Rod Control */
512
513/* Bit masks for SDH_CLK_CTL */
514
515#define CLKDIV 0xff /* MC_CLK Divisor */
516#define CLK_E 0x100 /* MC_CLK Bus Clock Enable */
517#define PWR_SV_E 0x200 /* Power Save Enable */
518#define CLKDIV_BYPASS 0x400 /* Bypass Divisor */
519#define WIDE_BUS 0x800 /* Wide Bus Mode Enable */
520
521/* Bit masks for SDH_RESP_CMD */
522
523#define RESP_CMD 0x3f /* Response Command */
524
525/* Bit masks for SDH_DATA_CTL */
526
527#define DTX_E 0x1 /* Data Transfer Enable */
528#define DTX_DIR 0x2 /* Data Transfer Direction */
529#define DTX_MODE 0x4 /* Data Transfer Mode */
530#define DTX_DMA_E 0x8 /* Data Transfer DMA Enable */
531#define DTX_BLK_LGTH 0xf0 /* Data Transfer Block Length */
532
533/* Bit masks for SDH_STATUS */
534
535#define CMD_CRC_FAIL 0x1 /* CMD CRC Fail */
536#define DAT_CRC_FAIL 0x2 /* Data CRC Fail */
537#define CMD_TIME_OUT 0x4 /* CMD Time Out */
538#define DAT_TIME_OUT 0x8 /* Data Time Out */
539#define TX_UNDERRUN 0x10 /* Transmit Underrun */
540#define RX_OVERRUN 0x20 /* Receive Overrun */
541#define CMD_RESP_END 0x40 /* CMD Response End */
542#define CMD_SENT 0x80 /* CMD Sent */
543#define DAT_END 0x100 /* Data End */
544#define START_BIT_ERR 0x200 /* Start Bit Error */
545#define DAT_BLK_END 0x400 /* Data Block End */
546#define CMD_ACT 0x800 /* CMD Active */
547#define TX_ACT 0x1000 /* Transmit Active */
548#define RX_ACT 0x2000 /* Receive Active */
549#define TX_FIFO_STAT 0x4000 /* Transmit FIFO Status */
550#define RX_FIFO_STAT 0x8000 /* Receive FIFO Status */
551#define TX_FIFO_FULL 0x10000 /* Transmit FIFO Full */
552#define RX_FIFO_FULL 0x20000 /* Receive FIFO Full */
553#define TX_FIFO_ZERO 0x40000 /* Transmit FIFO Empty */
554#define RX_DAT_ZERO 0x80000 /* Receive FIFO Empty */
555#define TX_DAT_RDY 0x100000 /* Transmit Data Available */
556#define RX_FIFO_RDY 0x200000 /* Receive Data Available */
557
558/* Bit masks for SDH_STATUS_CLR */
559
560#define CMD_CRC_FAIL_STAT 0x1 /* CMD CRC Fail Status */
561#define DAT_CRC_FAIL_STAT 0x2 /* Data CRC Fail Status */
562#define CMD_TIMEOUT_STAT 0x4 /* CMD Time Out Status */
563#define DAT_TIMEOUT_STAT 0x8 /* Data Time Out status */
564#define TX_UNDERRUN_STAT 0x10 /* Transmit Underrun Status */
565#define RX_OVERRUN_STAT 0x20 /* Receive Overrun Status */
566#define CMD_RESP_END_STAT 0x40 /* CMD Response End Status */
567#define CMD_SENT_STAT 0x80 /* CMD Sent Status */
568#define DAT_END_STAT 0x100 /* Data End Status */
569#define START_BIT_ERR_STAT 0x200 /* Start Bit Error Status */
570#define DAT_BLK_END_STAT 0x400 /* Data Block End Status */
571
572/* Bit masks for SDH_MASK0 */
573
574#define CMD_CRC_FAIL_MASK 0x1 /* CMD CRC Fail Mask */
575#define DAT_CRC_FAIL_MASK 0x2 /* Data CRC Fail Mask */
576#define CMD_TIMEOUT_MASK 0x4 /* CMD Time Out Mask */
577#define DAT_TIMEOUT_MASK 0x8 /* Data Time Out Mask */
578#define TX_UNDERRUN_MASK 0x10 /* Transmit Underrun Mask */
579#define RX_OVERRUN_MASK 0x20 /* Receive Overrun Mask */
580#define CMD_RESP_END_MASK 0x40 /* CMD Response End Mask */
581#define CMD_SENT_MASK 0x80 /* CMD Sent Mask */
582#define DAT_END_MASK 0x100 /* Data End Mask */
583#define START_BIT_ERR_MASK 0x200 /* Start Bit Error Mask */
584#define DAT_BLK_END_MASK 0x400 /* Data Block End Mask */
585#define CMD_ACT_MASK 0x800 /* CMD Active Mask */
586#define TX_ACT_MASK 0x1000 /* Transmit Active Mask */
587#define RX_ACT_MASK 0x2000 /* Receive Active Mask */
588#define TX_FIFO_STAT_MASK 0x4000 /* Transmit FIFO Status Mask */
589#define RX_FIFO_STAT_MASK 0x8000 /* Receive FIFO Status Mask */
590#define TX_FIFO_FULL_MASK 0x10000 /* Transmit FIFO Full Mask */
591#define RX_FIFO_FULL_MASK 0x20000 /* Receive FIFO Full Mask */
592#define TX_FIFO_ZERO_MASK 0x40000 /* Transmit FIFO Empty Mask */
593#define RX_DAT_ZERO_MASK 0x80000 /* Receive FIFO Empty Mask */
594#define TX_DAT_RDY_MASK 0x100000 /* Transmit Data Available Mask */
595#define RX_FIFO_RDY_MASK 0x200000 /* Receive Data Available Mask */
596
597/* Bit masks for SDH_FIFO_CNT */
598
599#define FIFO_COUNT 0x7fff /* FIFO Count */
600
601/* Bit masks for SDH_E_STATUS */
602
603#define SDIO_INT_DET 0x2 /* SDIO Int Detected */
604#define SD_CARD_DET 0x10 /* SD Card Detect */
605
606/* Bit masks for SDH_E_MASK */
607
608#define SDIO_MSK 0x2 /* Mask SDIO Int Detected */
609#define SCD_MSK 0x40 /* Mask Card Detect */
610
611/* Bit masks for SDH_CFG */
612
613#define CLKS_EN 0x1 /* Clocks Enable */
614#define SD4E 0x4 /* SDIO 4-Bit Enable */
615#define MWE 0x8 /* Moving Window Enable */
616#define SD_RST 0x10 /* SDMMC Reset */
617#define PUP_SDDAT 0x20 /* Pull-up SD_DAT */
618#define PUP_SDDAT3 0x40 /* Pull-up SD_DAT3 */
619#define PD_SDDAT3 0x80 /* Pull-down SD_DAT3 */
620
621/* Bit masks for SDH_RD_WAIT_EN */
622
623#define RWR 0x1 /* Read Wait Request */
624
490#endif /* _DEF_BF516_H */ 625#endif /* _DEF_BF516_H */
diff --git a/arch/blackfin/mach-bf527/include/mach/blackfin.h b/arch/blackfin/mach-bf527/include/mach/blackfin.h
index 297821e2d79a..417abcd61f4d 100644
--- a/arch/blackfin/mach-bf527/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf527/include/mach/blackfin.h
@@ -32,8 +32,6 @@
32#ifndef _MACH_BLACKFIN_H_ 32#ifndef _MACH_BLACKFIN_H_
33#define _MACH_BLACKFIN_H_ 33#define _MACH_BLACKFIN_H_
34 34
35#define BF527_FAMILY
36
37#include "bf527.h" 35#include "bf527.h"
38#include "mem_map.h" 36#include "mem_map.h"
39#include "defBF522.h" 37#include "defBF522.h"
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index cd04c5e44878..0572926da23f 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -843,6 +843,71 @@ static struct platform_device bfin_spi0_device = {
843}; 843};
844#endif /* spi master and devices */ 844#endif /* spi master and devices */
845 845
846#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
847
848/* SPORT SPI controller data */
849static struct bfin5xx_spi_master bfin_sport_spi0_info = {
850 .num_chipselect = 1, /* master only supports one device */
851 .enable_dma = 0, /* master don't support DMA */
852 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
853 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
854};
855
856static struct resource bfin_sport_spi0_resource[] = {
857 [0] = {
858 .start = SPORT0_TCR1,
859 .end = SPORT0_TCR1 + 0xFF,
860 .flags = IORESOURCE_MEM,
861 },
862 [1] = {
863 .start = IRQ_SPORT0_ERROR,
864 .end = IRQ_SPORT0_ERROR,
865 .flags = IORESOURCE_IRQ,
866 },
867};
868
869static struct platform_device bfin_sport_spi0_device = {
870 .name = "bfin-sport-spi",
871 .id = 1, /* Bus number */
872 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
873 .resource = bfin_sport_spi0_resource,
874 .dev = {
875 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
876 },
877};
878
879static struct bfin5xx_spi_master bfin_sport_spi1_info = {
880 .num_chipselect = 1, /* master only supports one device */
881 .enable_dma = 0, /* master don't support DMA */
882 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
883 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
884};
885
886static struct resource bfin_sport_spi1_resource[] = {
887 [0] = {
888 .start = SPORT1_TCR1,
889 .end = SPORT1_TCR1 + 0xFF,
890 .flags = IORESOURCE_MEM,
891 },
892 [1] = {
893 .start = IRQ_SPORT1_ERROR,
894 .end = IRQ_SPORT1_ERROR,
895 .flags = IORESOURCE_IRQ,
896 },
897};
898
899static struct platform_device bfin_sport_spi1_device = {
900 .name = "bfin-sport-spi",
901 .id = 2, /* Bus number */
902 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
903 .resource = bfin_sport_spi1_resource,
904 .dev = {
905 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
906 },
907};
908
909#endif /* sport spi master and devices */
910
846#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 911#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
847static struct platform_device bfin_fb_device = { 912static struct platform_device bfin_fb_device = {
848 .name = "bf537-lq035", 913 .name = "bf537-lq035",
@@ -1073,6 +1138,141 @@ static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1073}; 1138};
1074#endif 1139#endif
1075 1140
1141#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1142#include <linux/mfd/adp5520.h>
1143
1144 /*
1145 * ADP5520/5501 Backlight Data
1146 */
1147
1148static struct adp5520_backlight_platfrom_data adp5520_backlight_data = {
1149 .fade_in = FADE_T_1200ms,
1150 .fade_out = FADE_T_1200ms,
1151 .fade_led_law = BL_LAW_LINEAR,
1152 .en_ambl_sens = 1,
1153 .abml_filt = BL_AMBL_FILT_640ms,
1154 .l1_daylight_max = BL_CUR_mA(15),
1155 .l1_daylight_dim = BL_CUR_mA(0),
1156 .l2_office_max = BL_CUR_mA(7),
1157 .l2_office_dim = BL_CUR_mA(0),
1158 .l3_dark_max = BL_CUR_mA(3),
1159 .l3_dark_dim = BL_CUR_mA(0),
1160 .l2_trip = L2_COMP_CURR_uA(700),
1161 .l2_hyst = L2_COMP_CURR_uA(50),
1162 .l3_trip = L3_COMP_CURR_uA(80),
1163 .l3_hyst = L3_COMP_CURR_uA(20),
1164};
1165
1166 /*
1167 * ADP5520/5501 LEDs Data
1168 */
1169
1170#include <linux/leds.h>
1171
1172static struct led_info adp5520_leds[] = {
1173 {
1174 .name = "adp5520-led1",
1175 .default_trigger = "none",
1176 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | LED_OFFT_600ms,
1177 },
1178#ifdef ADP5520_EN_ALL_LEDS
1179 {
1180 .name = "adp5520-led2",
1181 .default_trigger = "none",
1182 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1183 },
1184 {
1185 .name = "adp5520-led3",
1186 .default_trigger = "none",
1187 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1188 },
1189#endif
1190};
1191
1192static struct adp5520_leds_platfrom_data adp5520_leds_data = {
1193 .num_leds = ARRAY_SIZE(adp5520_leds),
1194 .leds = adp5520_leds,
1195 .fade_in = FADE_T_600ms,
1196 .fade_out = FADE_T_600ms,
1197 .led_on_time = LED_ONT_600ms,
1198};
1199
1200 /*
1201 * ADP5520 GPIO Data
1202 */
1203
1204static struct adp5520_gpio_platfrom_data adp5520_gpio_data = {
1205 .gpio_start = 50,
1206 .gpio_en_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
1207 .gpio_pullup_mask = GPIO_C1 | GPIO_C2 | GPIO_R2,
1208};
1209
1210 /*
1211 * ADP5520 Keypad Data
1212 */
1213
1214#include <linux/input.h>
1215static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1216 [KEY(0, 0)] = KEY_GRAVE,
1217 [KEY(0, 1)] = KEY_1,
1218 [KEY(0, 2)] = KEY_2,
1219 [KEY(0, 3)] = KEY_3,
1220 [KEY(1, 0)] = KEY_4,
1221 [KEY(1, 1)] = KEY_5,
1222 [KEY(1, 2)] = KEY_6,
1223 [KEY(1, 3)] = KEY_7,
1224 [KEY(2, 0)] = KEY_8,
1225 [KEY(2, 1)] = KEY_9,
1226 [KEY(2, 2)] = KEY_0,
1227 [KEY(2, 3)] = KEY_MINUS,
1228 [KEY(3, 0)] = KEY_EQUAL,
1229 [KEY(3, 1)] = KEY_BACKSLASH,
1230 [KEY(3, 2)] = KEY_BACKSPACE,
1231 [KEY(3, 3)] = KEY_ENTER,
1232};
1233
1234static struct adp5520_keys_platfrom_data adp5520_keys_data = {
1235 .rows_en_mask = ROW_R3 | ROW_R2 | ROW_R1 | ROW_R0,
1236 .cols_en_mask = COL_C3 | COL_C2 | COL_C1 | COL_C0,
1237 .keymap = adp5520_keymap,
1238 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1239 .repeat = 0,
1240};
1241
1242 /*
1243 * ADP5520/5501 Multifuction Device Init Data
1244 */
1245
1246static struct adp5520_subdev_info adp5520_subdevs[] = {
1247 {
1248 .name = "adp5520-backlight",
1249 .id = ID_ADP5520,
1250 .platform_data = &adp5520_backlight_data,
1251 },
1252 {
1253 .name = "adp5520-led",
1254 .id = ID_ADP5520,
1255 .platform_data = &adp5520_leds_data,
1256 },
1257 {
1258 .name = "adp5520-gpio",
1259 .id = ID_ADP5520,
1260 .platform_data = &adp5520_gpio_data,
1261 },
1262 {
1263 .name = "adp5520-keys",
1264 .id = ID_ADP5520,
1265 .platform_data = &adp5520_keys_data,
1266 },
1267};
1268
1269static struct adp5520_platform_data adp5520_pdev_data = {
1270 .num_subdevs = ARRAY_SIZE(adp5520_subdevs),
1271 .subdevs = adp5520_subdevs,
1272};
1273
1274#endif
1275
1076static struct i2c_board_info __initdata bfin_i2c_board_info[] = { 1276static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
1077#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE) 1277#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
1078 { 1278 {
@@ -1105,6 +1305,13 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
1105 .platform_data = (void *)&adp5588_kpad_data, 1305 .platform_data = (void *)&adp5588_kpad_data,
1106 }, 1306 },
1107#endif 1307#endif
1308#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1309 {
1310 I2C_BOARD_INFO("pmic-adp5520", 0x32),
1311 .irq = IRQ_PF7,
1312 .platform_data = (void *)&adp5520_pdev_data,
1313 },
1314#endif
1108}; 1315};
1109 1316
1110#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 1317#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
@@ -1120,8 +1327,11 @@ static struct platform_device bfin_sport1_uart_device = {
1120#endif 1327#endif
1121 1328
1122#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 1329#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1123#define PATA_INT IRQ_PF5 1330#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1331/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
1124 1332
1333#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1334#define PATA_INT IRQ_PF5
1125static struct pata_platform_info bfin_pata_platform_data = { 1335static struct pata_platform_info bfin_pata_platform_data = {
1126 .ioport_shift = 1, 1336 .ioport_shift = 1,
1127 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED, 1337 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
@@ -1144,6 +1354,24 @@ static struct resource bfin_pata_resources[] = {
1144 .flags = IORESOURCE_IRQ, 1354 .flags = IORESOURCE_IRQ,
1145 }, 1355 },
1146}; 1356};
1357#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
1358static struct pata_platform_info bfin_pata_platform_data = {
1359 .ioport_shift = 0,
1360};
1361
1362static struct resource bfin_pata_resources[] = {
1363 {
1364 .start = 0x20211820,
1365 .end = 0x2021183F,
1366 .flags = IORESOURCE_MEM,
1367 },
1368 {
1369 .start = 0x2021181C,
1370 .end = 0x2021181F,
1371 .flags = IORESOURCE_MEM,
1372 },
1373};
1374#endif
1147 1375
1148static struct platform_device bfin_pata_device = { 1376static struct platform_device bfin_pata_device = {
1149 .name = "pata_platform", 1377 .name = "pata_platform",
@@ -1232,6 +1460,11 @@ static struct platform_device *stamp_devices[] __initdata = {
1232 &bfin_spi0_device, 1460 &bfin_spi0_device,
1233#endif 1461#endif
1234 1462
1463#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1464 &bfin_sport_spi0_device,
1465 &bfin_sport_spi1_device,
1466#endif
1467
1235#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 1468#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1236 &bfin_fb_device, 1469 &bfin_fb_device,
1237#endif 1470#endif
diff --git a/arch/blackfin/mach-bf548/include/mach/blackfin.h b/arch/blackfin/mach-bf548/include/mach/blackfin.h
index 0c0e3e2c3c21..cf6c1500222a 100644
--- a/arch/blackfin/mach-bf548/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf548/include/mach/blackfin.h
@@ -32,8 +32,6 @@
32#ifndef _MACH_BLACKFIN_H_ 32#ifndef _MACH_BLACKFIN_H_
33#define _MACH_BLACKFIN_H_ 33#define _MACH_BLACKFIN_H_
34 34
35#define BF548_FAMILY
36
37#include "bf548.h" 35#include "bf548.h"
38#include "mem_map.h" 36#include "mem_map.h"
39#include "anomaly.h" 37#include "anomaly.h"
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index f48a6aebb49b..bce5a84be49f 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -287,7 +287,7 @@ int bfin_pm_suspend_mem_enter(void)
287static int bfin_pm_valid(suspend_state_t state) 287static int bfin_pm_valid(suspend_state_t state)
288{ 288{
289 return (state == PM_SUSPEND_STANDBY 289 return (state == PM_SUSPEND_STANDBY
290#ifndef BF533_FAMILY 290#if !(defined(BF533_FAMILY) || defined(CONFIG_BF561))
291 /* 291 /*
292 * On BF533/2/1: 292 * On BF533/2/1:
293 * If we enter Hibernate the SCKE Pin is driven Low, 293 * If we enter Hibernate the SCKE Pin is driven Low,
diff --git a/arch/ia64/include/asm/percpu.h b/arch/ia64/include/asm/percpu.h
index 77f30b664b4e..30cf46534dd2 100644
--- a/arch/ia64/include/asm/percpu.h
+++ b/arch/ia64/include/asm/percpu.h
@@ -27,12 +27,12 @@ extern void *per_cpu_init(void);
27 27
28#else /* ! SMP */ 28#else /* ! SMP */
29 29
30#define PER_CPU_ATTRIBUTES __attribute__((__section__(".data.percpu")))
31
32#define per_cpu_init() (__phys_per_cpu_start) 30#define per_cpu_init() (__phys_per_cpu_start)
33 31
34#endif /* SMP */ 32#endif /* SMP */
35 33
34#define PER_CPU_BASE_SECTION ".data.percpu"
35
36/* 36/*
37 * Be extremely careful when taking the address of this variable! Due to virtual 37 * Be extremely careful when taking the address of this variable! Due to virtual
38 * remapping, it is different from the canonical address returned by __get_cpu_var(var)! 38 * remapping, it is different from the canonical address returned by __get_cpu_var(var)!
diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h
index 32f3af1641c5..3193f4417e16 100644
--- a/arch/ia64/include/asm/topology.h
+++ b/arch/ia64/include/asm/topology.h
@@ -84,7 +84,7 @@ void build_cpu_to_node_map(void);
84 .child = NULL, \ 84 .child = NULL, \
85 .groups = NULL, \ 85 .groups = NULL, \
86 .min_interval = 8, \ 86 .min_interval = 8, \
87 .max_interval = 8*(min(num_online_cpus(), 32)), \ 87 .max_interval = 8*(min(num_online_cpus(), 32U)), \
88 .busy_factor = 64, \ 88 .busy_factor = 64, \
89 .imbalance_pct = 125, \ 89 .imbalance_pct = 125, \
90 .cache_nice_tries = 2, \ 90 .cache_nice_tries = 2, \
diff --git a/arch/ia64/include/asm/uv/uv.h b/arch/ia64/include/asm/uv/uv.h
new file mode 100644
index 000000000000..61b5bdfd980e
--- /dev/null
+++ b/arch/ia64/include/asm/uv/uv.h
@@ -0,0 +1,13 @@
1#ifndef _ASM_IA64_UV_UV_H
2#define _ASM_IA64_UV_UV_H
3
4#include <asm/system.h>
5#include <asm/sn/simulator.h>
6
7static inline int is_uv_system(void)
8{
9 /* temporary support for running on hardware simulator */
10 return IS_MEDUSA() || ia64_platform_is("uv");
11}
12
13#endif /* _ASM_IA64_UV_UV_H */
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index d541671caf4a..bdef2ce38c8b 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -199,6 +199,10 @@ char *__init __acpi_map_table(unsigned long phys_addr, unsigned long size)
199 return __va(phys_addr); 199 return __va(phys_addr);
200} 200}
201 201
202void __init __acpi_unmap_table(char *map, unsigned long size)
203{
204}
205
202/* -------------------------------------------------------------------------- 206/* --------------------------------------------------------------------------
203 Boot-time Table Parsing 207 Boot-time Table Parsing
204 -------------------------------------------------------------------------- */ 208 -------------------------------------------------------------------------- */
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index e13125058bed..166e0d839fa0 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -880,7 +880,7 @@ iosapic_unregister_intr (unsigned int gsi)
880 if (iosapic_intr_info[irq].count == 0) { 880 if (iosapic_intr_info[irq].count == 0) {
881#ifdef CONFIG_SMP 881#ifdef CONFIG_SMP
882 /* Clear affinity */ 882 /* Clear affinity */
883 cpus_setall(idesc->affinity); 883 cpumask_setall(idesc->affinity);
884#endif 884#endif
885 /* Clear the interrupt information */ 885 /* Clear the interrupt information */
886 iosapic_intr_info[irq].dest = 0; 886 iosapic_intr_info[irq].dest = 0;
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index 4f596613bffd..7429752ef5ad 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -103,7 +103,7 @@ static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };
103void set_irq_affinity_info (unsigned int irq, int hwid, int redir) 103void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
104{ 104{
105 if (irq < NR_IRQS) { 105 if (irq < NR_IRQS) {
106 cpumask_copy(&irq_desc[irq].affinity, 106 cpumask_copy(irq_desc[irq].affinity,
107 cpumask_of(cpu_logical_id(hwid))); 107 cpumask_of(cpu_logical_id(hwid)));
108 irq_redir[irq] = (char) (redir & 0xff); 108 irq_redir[irq] = (char) (redir & 0xff);
109 } 109 }
@@ -148,7 +148,7 @@ static void migrate_irqs(void)
148 if (desc->status == IRQ_PER_CPU) 148 if (desc->status == IRQ_PER_CPU)
149 continue; 149 continue;
150 150
151 if (cpumask_any_and(&irq_desc[irq].affinity, cpu_online_mask) 151 if (cpumask_any_and(irq_desc[irq].affinity, cpu_online_mask)
152 >= nr_cpu_ids) { 152 >= nr_cpu_ids) {
153 /* 153 /*
154 * Save it for phase 2 processing 154 * Save it for phase 2 processing
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index 28d3d483db92..acc4d19ae62a 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -493,14 +493,15 @@ ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
493 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR); 493 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
494 ia64_srlz_d(); 494 ia64_srlz_d();
495 while (vector != IA64_SPURIOUS_INT_VECTOR) { 495 while (vector != IA64_SPURIOUS_INT_VECTOR) {
496 int irq = local_vector_to_irq(vector);
497 struct irq_desc *desc = irq_to_desc(irq);
498
496 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) { 499 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
497 smp_local_flush_tlb(); 500 smp_local_flush_tlb();
498 kstat_this_cpu.irqs[vector]++; 501 kstat_incr_irqs_this_cpu(irq, desc);
499 } else if (unlikely(IS_RESCHEDULE(vector))) 502 } else if (unlikely(IS_RESCHEDULE(vector))) {
500 kstat_this_cpu.irqs[vector]++; 503 kstat_incr_irqs_this_cpu(irq, desc);
501 else { 504 } else {
502 int irq = local_vector_to_irq(vector);
503
504 ia64_setreg(_IA64_REG_CR_TPR, vector); 505 ia64_setreg(_IA64_REG_CR_TPR, vector);
505 ia64_srlz_d(); 506 ia64_srlz_d();
506 507
@@ -543,22 +544,24 @@ void ia64_process_pending_intr(void)
543 544
544 vector = ia64_get_ivr(); 545 vector = ia64_get_ivr();
545 546
546 irq_enter(); 547 irq_enter();
547 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR); 548 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
548 ia64_srlz_d(); 549 ia64_srlz_d();
549 550
550 /* 551 /*
551 * Perform normal interrupt style processing 552 * Perform normal interrupt style processing
552 */ 553 */
553 while (vector != IA64_SPURIOUS_INT_VECTOR) { 554 while (vector != IA64_SPURIOUS_INT_VECTOR) {
555 int irq = local_vector_to_irq(vector);
556 struct irq_desc *desc = irq_to_desc(irq);
557
554 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) { 558 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
555 smp_local_flush_tlb(); 559 smp_local_flush_tlb();
556 kstat_this_cpu.irqs[vector]++; 560 kstat_incr_irqs_this_cpu(irq, desc);
557 } else if (unlikely(IS_RESCHEDULE(vector))) 561 } else if (unlikely(IS_RESCHEDULE(vector))) {
558 kstat_this_cpu.irqs[vector]++; 562 kstat_incr_irqs_this_cpu(irq, desc);
559 else { 563 } else {
560 struct pt_regs *old_regs = set_irq_regs(NULL); 564 struct pt_regs *old_regs = set_irq_regs(NULL);
561 int irq = local_vector_to_irq(vector);
562 565
563 ia64_setreg(_IA64_REG_CR_TPR, vector); 566 ia64_setreg(_IA64_REG_CR_TPR, vector);
564 ia64_srlz_d(); 567 ia64_srlz_d();
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 368ee4e5266d..2b15e233f7fe 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -38,7 +38,7 @@ static void ia64_set_msi_irq_affinity(unsigned int irq,
38 msg.data = data; 38 msg.data = data;
39 39
40 write_msi_msg(irq, &msg); 40 write_msi_msg(irq, &msg);
41 irq_desc[irq].affinity = cpumask_of_cpu(cpu); 41 cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
42} 42}
43#endif /* CONFIG_SMP */ 43#endif /* CONFIG_SMP */
44 44
@@ -150,7 +150,7 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
150 msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu)); 150 msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
151 151
152 dmar_msi_write(irq, &msg); 152 dmar_msi_write(irq, &msg);
153 irq_desc[irq].affinity = *mask; 153 cpumask_copy(irq_desc[irq].affinity, mask);
154} 154}
155#endif /* CONFIG_SMP */ 155#endif /* CONFIG_SMP */
156 156
diff --git a/arch/ia64/kernel/vmlinux.lds.S b/arch/ia64/kernel/vmlinux.lds.S
index 10a7d47e8510..3765efc5f963 100644
--- a/arch/ia64/kernel/vmlinux.lds.S
+++ b/arch/ia64/kernel/vmlinux.lds.S
@@ -213,16 +213,9 @@ SECTIONS
213 { *(.data.cacheline_aligned) } 213 { *(.data.cacheline_aligned) }
214 214
215 /* Per-cpu data: */ 215 /* Per-cpu data: */
216 percpu : { } :percpu
217 . = ALIGN(PERCPU_PAGE_SIZE); 216 . = ALIGN(PERCPU_PAGE_SIZE);
218 __phys_per_cpu_start = .; 217 PERCPU_VADDR(PERCPU_ADDR, :percpu)
219 .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET) 218 __phys_per_cpu_start = __per_cpu_load;
220 {
221 __per_cpu_start = .;
222 *(.data.percpu)
223 *(.data.percpu.shared_aligned)
224 __per_cpu_end = .;
225 }
226 . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits 219 . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits
227 * into percpu page size 220 * into percpu page size
228 */ 221 */
diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c
index ca553b0429ce..81e428943d73 100644
--- a/arch/ia64/sn/kernel/msi_sn.c
+++ b/arch/ia64/sn/kernel/msi_sn.c
@@ -205,7 +205,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq,
205 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff); 205 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
206 206
207 write_msi_msg(irq, &msg); 207 write_msi_msg(irq, &msg);
208 irq_desc[irq].affinity = *cpu_mask; 208 cpumask_copy(irq_desc[irq].affinity, cpu_mask);
209} 209}
210#endif /* CONFIG_SMP */ 210#endif /* CONFIG_SMP */
211 211
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index abc62aa744ac..3214ade02d10 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -66,7 +66,7 @@ extern void smtc_forward_irq(unsigned int irq);
66 */ 66 */
67#define IRQ_AFFINITY_HOOK(irq) \ 67#define IRQ_AFFINITY_HOOK(irq) \
68do { \ 68do { \
69 if (!cpu_isset(smp_processor_id(), irq_desc[irq].affinity)) { \ 69 if (!cpumask_test_cpu(smp_processor_id(), irq_desc[irq].affinity)) {\
70 smtc_forward_irq(irq); \ 70 smtc_forward_irq(irq); \
71 irq_exit(); \ 71 irq_exit(); \
72 return; \ 72 return; \
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index 494a49a317e9..87deb8f6c458 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -187,7 +187,7 @@ static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
187 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask); 187 set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask);
188 188
189 } 189 }
190 irq_desc[irq].affinity = *cpumask; 190 cpumask_copy(irq_desc[irq].affinity, cpumask);
191 spin_unlock_irqrestore(&gic_lock, flags); 191 spin_unlock_irqrestore(&gic_lock, flags);
192 192
193} 193}
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index b6cca01ff82b..5f5af7d4c890 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -686,7 +686,7 @@ void smtc_forward_irq(unsigned int irq)
686 * and efficiency, we just pick the easiest one to find. 686 * and efficiency, we just pick the easiest one to find.
687 */ 687 */
688 688
689 target = first_cpu(irq_desc[irq].affinity); 689 target = cpumask_first(irq_desc[irq].affinity);
690 690
691 /* 691 /*
692 * We depend on the platform code to have correctly processed 692 * We depend on the platform code to have correctly processed
@@ -921,11 +921,13 @@ void ipi_decode(struct smtc_ipi *pipi)
921 struct clock_event_device *cd; 921 struct clock_event_device *cd;
922 void *arg_copy = pipi->arg; 922 void *arg_copy = pipi->arg;
923 int type_copy = pipi->type; 923 int type_copy = pipi->type;
924 int irq = MIPS_CPU_IRQ_BASE + 1;
925
924 smtc_ipi_nq(&freeIPIq, pipi); 926 smtc_ipi_nq(&freeIPIq, pipi);
925 switch (type_copy) { 927 switch (type_copy) {
926 case SMTC_CLOCK_TICK: 928 case SMTC_CLOCK_TICK:
927 irq_enter(); 929 irq_enter();
928 kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + 1]++; 930 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
929 cd = &per_cpu(mips_clockevent_device, cpu); 931 cd = &per_cpu(mips_clockevent_device, cpu);
930 cd->event_handler(cd); 932 cd->event_handler(cd);
931 irq_exit(); 933 irq_exit();
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c
index aabd7274507b..5ba31888fefb 100644
--- a/arch/mips/mti-malta/malta-smtc.c
+++ b/arch/mips/mti-malta/malta-smtc.c
@@ -116,7 +116,7 @@ struct plat_smp_ops msmtc_smp_ops = {
116 116
117void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) 117void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
118{ 118{
119 cpumask_t tmask = *affinity; 119 cpumask_t tmask;
120 int cpu = 0; 120 int cpu = 0;
121 void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff); 121 void smtc_set_irq_affinity(unsigned int irq, cpumask_t aff);
122 122
@@ -139,11 +139,12 @@ void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
139 * be made to forward to an offline "CPU". 139 * be made to forward to an offline "CPU".
140 */ 140 */
141 141
142 cpumask_copy(&tmask, affinity);
142 for_each_cpu(cpu, affinity) { 143 for_each_cpu(cpu, affinity) {
143 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu)) 144 if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
144 cpu_clear(cpu, tmask); 145 cpu_clear(cpu, tmask);
145 } 146 }
146 irq_desc[irq].affinity = tmask; 147 cpumask_copy(irq_desc[irq].affinity, &tmask);
147 148
148 if (cpus_empty(tmask)) 149 if (cpus_empty(tmask))
149 /* 150 /*
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index f8b18af141a1..0ecd5fe9486e 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -155,7 +155,7 @@ static void indy_buserror_irq(void)
155 int irq = SGI_BUSERR_IRQ; 155 int irq = SGI_BUSERR_IRQ;
156 156
157 irq_enter(); 157 irq_enter();
158 kstat_this_cpu.irqs[irq]++; 158 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
159 ip22_be_interrupt(irq); 159 ip22_be_interrupt(irq);
160 irq_exit(); 160 irq_exit();
161} 161}
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 3dcb27ec0c53..c8f7d2328b24 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -122,7 +122,7 @@ void indy_8254timer_irq(void)
122 char c; 122 char c;
123 123
124 irq_enter(); 124 irq_enter();
125 kstat_this_cpu.irqs[irq]++; 125 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
126 printk(KERN_ALERT "Oops, got 8254 interrupt.\n"); 126 printk(KERN_ALERT "Oops, got 8254 interrupt.\n");
127 ArcRead(0, &c, 1, &cnt); 127 ArcRead(0, &c, 1, &cnt);
128 ArcEnterInteractiveMode(); 128 ArcEnterInteractiveMode();
diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c
index dddfda8e8294..314691648c97 100644
--- a/arch/mips/sibyte/bcm1480/smp.c
+++ b/arch/mips/sibyte/bcm1480/smp.c
@@ -178,9 +178,10 @@ struct plat_smp_ops bcm1480_smp_ops = {
178void bcm1480_mailbox_interrupt(void) 178void bcm1480_mailbox_interrupt(void)
179{ 179{
180 int cpu = smp_processor_id(); 180 int cpu = smp_processor_id();
181 int irq = K_BCM1480_INT_MBOX_0_0;
181 unsigned int action; 182 unsigned int action;
182 183
183 kstat_this_cpu.irqs[K_BCM1480_INT_MBOX_0_0]++; 184 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
184 /* Load the mailbox register to figure out what we're supposed to do */ 185 /* Load the mailbox register to figure out what we're supposed to do */
185 action = (__raw_readq(mailbox_0_regs[cpu]) >> 48) & 0xffff; 186 action = (__raw_readq(mailbox_0_regs[cpu]) >> 48) & 0xffff;
186 187
diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c
index 5950a288a7da..cad14003b84f 100644
--- a/arch/mips/sibyte/sb1250/smp.c
+++ b/arch/mips/sibyte/sb1250/smp.c
@@ -166,9 +166,10 @@ struct plat_smp_ops sb_smp_ops = {
166void sb1250_mailbox_interrupt(void) 166void sb1250_mailbox_interrupt(void)
167{ 167{
168 int cpu = smp_processor_id(); 168 int cpu = smp_processor_id();
169 int irq = K_INT_MBOX_0;
169 unsigned int action; 170 unsigned int action;
170 171
171 kstat_this_cpu.irqs[K_INT_MBOX_0]++; 172 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
172 /* Load the mailbox register to figure out what we're supposed to do */ 173 /* Load the mailbox register to figure out what we're supposed to do */
173 action = (____raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff; 174 action = (____raw_readq(mailbox_regs[cpu]) >> 48) & 0xffff;
174 175
diff --git a/arch/mn10300/kernel/mn10300-watchdog.c b/arch/mn10300/kernel/mn10300-watchdog.c
index 10811e981d20..2e370d88a87a 100644
--- a/arch/mn10300/kernel/mn10300-watchdog.c
+++ b/arch/mn10300/kernel/mn10300-watchdog.c
@@ -130,6 +130,7 @@ void watchdog_interrupt(struct pt_regs *regs, enum exception_code excep)
130 * the stack NMI-atomically, it's safe to use smp_processor_id(). 130 * the stack NMI-atomically, it's safe to use smp_processor_id().
131 */ 131 */
132 int sum, cpu = smp_processor_id(); 132 int sum, cpu = smp_processor_id();
133 int irq = NMIIRQ;
133 u8 wdt, tmp; 134 u8 wdt, tmp;
134 135
135 wdt = WDCTR & ~WDCTR_WDCNE; 136 wdt = WDCTR & ~WDCTR_WDCNE;
@@ -138,7 +139,7 @@ void watchdog_interrupt(struct pt_regs *regs, enum exception_code excep)
138 NMICR = NMICR_WDIF; 139 NMICR = NMICR_WDIF;
139 140
140 nmi_count(cpu)++; 141 nmi_count(cpu)++;
141 kstat_this_cpu.irqs[NMIIRQ]++; 142 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq));
142 sum = irq_stat[cpu].__irq_count; 143 sum = irq_stat[cpu].__irq_count;
143 144
144 if (last_irq_sums[cpu] == sum) { 145 if (last_irq_sums[cpu] == sum) {
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index adfd617b4c18..1c740f5cbd63 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -138,7 +138,7 @@ static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
138 if (cpu_dest < 0) 138 if (cpu_dest < 0)
139 return; 139 return;
140 140
141 cpumask_copy(&irq_desc[irq].affinity, &cpumask_of_cpu(cpu_dest)); 141 cpumask_copy(&irq_desc[irq].affinity, dest);
142} 142}
143#endif 143#endif
144 144
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 17efb7118db1..1b55ffdf0026 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -231,7 +231,7 @@ void fixup_irqs(cpumask_t map)
231 if (irq_desc[irq].status & IRQ_PER_CPU) 231 if (irq_desc[irq].status & IRQ_PER_CPU)
232 continue; 232 continue;
233 233
234 cpus_and(mask, irq_desc[irq].affinity, map); 234 cpumask_and(&mask, irq_desc[irq].affinity, &map);
235 if (any_online_cpu(mask) == NR_CPUS) { 235 if (any_online_cpu(mask) == NR_CPUS) {
236 printk("Breaking affinity for irq %i\n", irq); 236 printk("Breaking affinity for irq %i\n", irq);
237 mask = map; 237 mask = map;
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 161b9b9691f0..67f07f453385 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -181,13 +181,7 @@ SECTIONS
181 __initramfs_end = .; 181 __initramfs_end = .;
182 } 182 }
183#endif 183#endif
184 . = ALIGN(PAGE_SIZE); 184 PERCPU(PAGE_SIZE)
185 .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) {
186 __per_cpu_start = .;
187 *(.data.percpu)
188 *(.data.percpu.shared_aligned)
189 __per_cpu_end = .;
190 }
191 185
192 . = ALIGN(8); 186 . = ALIGN(8);
193 .machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) { 187 .machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) {
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 84e058f1e1cc..80b513449f4c 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -153,9 +153,10 @@ static int get_irq_server(unsigned int virq, unsigned int strict_check)
153{ 153{
154 int server; 154 int server;
155 /* For the moment only implement delivery to all cpus or one cpu */ 155 /* For the moment only implement delivery to all cpus or one cpu */
156 cpumask_t cpumask = irq_desc[virq].affinity; 156 cpumask_t cpumask;
157 cpumask_t tmp = CPU_MASK_NONE; 157 cpumask_t tmp = CPU_MASK_NONE;
158 158
159 cpumask_copy(&cpumask, irq_desc[virq].affinity);
159 if (!distribute_irqs) 160 if (!distribute_irqs)
160 return default_server; 161 return default_server;
161 162
@@ -869,7 +870,7 @@ void xics_migrate_irqs_away(void)
869 virq, cpu); 870 virq, cpu);
870 871
871 /* Reset affinity to all cpus */ 872 /* Reset affinity to all cpus */
872 irq_desc[virq].affinity = CPU_MASK_ALL; 873 cpumask_setall(irq_desc[virq].affinity);
873 desc->chip->set_affinity(virq, cpu_all_mask); 874 desc->chip->set_affinity(virq, cpu_all_mask);
874unlock: 875unlock:
875 spin_unlock_irqrestore(&desc->lock, flags); 876 spin_unlock_irqrestore(&desc->lock, flags);
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index a35297dbac28..532e205303a2 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -566,9 +566,10 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic)
566#ifdef CONFIG_SMP 566#ifdef CONFIG_SMP
567static int irq_choose_cpu(unsigned int virt_irq) 567static int irq_choose_cpu(unsigned int virt_irq)
568{ 568{
569 cpumask_t mask = irq_desc[virt_irq].affinity; 569 cpumask_t mask;
570 int cpuid; 570 int cpuid;
571 571
572 cpumask_copy(&mask, irq_desc[virt_irq].affinity);
572 if (cpus_equal(mask, CPU_MASK_ALL)) { 573 if (cpus_equal(mask, CPU_MASK_ALL)) {
573 static int irq_rover; 574 static int irq_rover;
574 static DEFINE_SPINLOCK(irq_rover_lock); 575 static DEFINE_SPINLOCK(irq_rover_lock);
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index 8ba064f08a6f..d0d6a515499a 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -252,9 +252,10 @@ struct irq_handler_data {
252#ifdef CONFIG_SMP 252#ifdef CONFIG_SMP
253static int irq_choose_cpu(unsigned int virt_irq) 253static int irq_choose_cpu(unsigned int virt_irq)
254{ 254{
255 cpumask_t mask = irq_desc[virt_irq].affinity; 255 cpumask_t mask;
256 int cpuid; 256 int cpuid;
257 257
258 cpumask_copy(&mask, irq_desc[virt_irq].affinity);
258 if (cpus_equal(mask, CPU_MASK_ALL)) { 259 if (cpus_equal(mask, CPU_MASK_ALL)) {
259 static int irq_rover; 260 static int irq_rover;
260 static DEFINE_SPINLOCK(irq_rover_lock); 261 static DEFINE_SPINLOCK(irq_rover_lock);
@@ -805,7 +806,7 @@ void fixup_irqs(void)
805 !(irq_desc[irq].status & IRQ_PER_CPU)) { 806 !(irq_desc[irq].status & IRQ_PER_CPU)) {
806 if (irq_desc[irq].chip->set_affinity) 807 if (irq_desc[irq].chip->set_affinity)
807 irq_desc[irq].chip->set_affinity(irq, 808 irq_desc[irq].chip->set_affinity(irq,
808 &irq_desc[irq].affinity); 809 irq_desc[irq].affinity);
809 } 810 }
810 spin_unlock_irqrestore(&irq_desc[irq].lock, flags); 811 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
811 } 812 }
diff --git a/arch/sparc/kernel/time_64.c b/arch/sparc/kernel/time_64.c
index 4ee2e48c4b39..db310aa00183 100644
--- a/arch/sparc/kernel/time_64.c
+++ b/arch/sparc/kernel/time_64.c
@@ -36,10 +36,10 @@
36#include <linux/clocksource.h> 36#include <linux/clocksource.h>
37#include <linux/of_device.h> 37#include <linux/of_device.h>
38#include <linux/platform_device.h> 38#include <linux/platform_device.h>
39#include <linux/irq.h>
40 39
41#include <asm/oplib.h> 40#include <asm/oplib.h>
42#include <asm/timer.h> 41#include <asm/timer.h>
42#include <asm/irq.h>
43#include <asm/io.h> 43#include <asm/io.h>
44#include <asm/prom.h> 44#include <asm/prom.h>
45#include <asm/starfire.h> 45#include <asm/starfire.h>
@@ -724,14 +724,12 @@ void timer_interrupt(int irq, struct pt_regs *regs)
724 unsigned long tick_mask = tick_ops->softint_mask; 724 unsigned long tick_mask = tick_ops->softint_mask;
725 int cpu = smp_processor_id(); 725 int cpu = smp_processor_id();
726 struct clock_event_device *evt = &per_cpu(sparc64_events, cpu); 726 struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
727 struct irq_desc *desc;
728 727
729 clear_softint(tick_mask); 728 clear_softint(tick_mask);
730 729
731 irq_enter(); 730 irq_enter();
732 731
733 desc = irq_to_desc(0); 732 kstat_incr_irqs_this_cpu(0, irq_to_desc(0));
734 kstat_incr_irqs_this_cpu(0, desc);
735 733
736 if (unlikely(!evt->event_handler)) { 734 if (unlikely(!evt->event_handler)) {
737 printk(KERN_WARNING 735 printk(KERN_WARNING
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 3a330a437c6f..06c02c00d7d9 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -5,7 +5,7 @@ mainmenu "Linux Kernel Configuration for x86"
5config 64BIT 5config 64BIT
6 bool "64-bit kernel" if ARCH = "x86" 6 bool "64-bit kernel" if ARCH = "x86"
7 default ARCH = "x86_64" 7 default ARCH = "x86_64"
8 help 8 ---help---
9 Say yes to build a 64-bit kernel - formerly known as x86_64 9 Say yes to build a 64-bit kernel - formerly known as x86_64
10 Say no to build a 32-bit kernel - formerly known as i386 10 Say no to build a 32-bit kernel - formerly known as i386
11 11
@@ -34,12 +34,15 @@ config X86
34 select HAVE_FUNCTION_TRACER 34 select HAVE_FUNCTION_TRACER
35 select HAVE_FUNCTION_GRAPH_TRACER 35 select HAVE_FUNCTION_GRAPH_TRACER
36 select HAVE_FUNCTION_TRACE_MCOUNT_TEST 36 select HAVE_FUNCTION_TRACE_MCOUNT_TEST
37 select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64) 37 select HAVE_KVM
38 select HAVE_ARCH_KGDB if !X86_VOYAGER 38 select HAVE_ARCH_KGDB
39 select HAVE_ARCH_TRACEHOOK 39 select HAVE_ARCH_TRACEHOOK
40 select HAVE_GENERIC_DMA_COHERENT if X86_32 40 select HAVE_GENERIC_DMA_COHERENT if X86_32
41 select HAVE_EFFICIENT_UNALIGNED_ACCESS 41 select HAVE_EFFICIENT_UNALIGNED_ACCESS
42 select USER_STACKTRACE_SUPPORT 42 select USER_STACKTRACE_SUPPORT
43 select HAVE_KERNEL_GZIP
44 select HAVE_KERNEL_BZIP2
45 select HAVE_KERNEL_LZMA
43 46
44config ARCH_DEFCONFIG 47config ARCH_DEFCONFIG
45 string 48 string
@@ -133,18 +136,19 @@ config ARCH_HAS_CACHE_LINE_SIZE
133 def_bool y 136 def_bool y
134 137
135config HAVE_SETUP_PER_CPU_AREA 138config HAVE_SETUP_PER_CPU_AREA
136 def_bool X86_64_SMP || (X86_SMP && !X86_VOYAGER) 139 def_bool y
140
141config HAVE_DYNAMIC_PER_CPU_AREA
142 def_bool y
137 143
138config HAVE_CPUMASK_OF_CPU_MAP 144config HAVE_CPUMASK_OF_CPU_MAP
139 def_bool X86_64_SMP 145 def_bool X86_64_SMP
140 146
141config ARCH_HIBERNATION_POSSIBLE 147config ARCH_HIBERNATION_POSSIBLE
142 def_bool y 148 def_bool y
143 depends on !SMP || !X86_VOYAGER
144 149
145config ARCH_SUSPEND_POSSIBLE 150config ARCH_SUSPEND_POSSIBLE
146 def_bool y 151 def_bool y
147 depends on !X86_VOYAGER
148 152
149config ZONE_DMA32 153config ZONE_DMA32
150 bool 154 bool
@@ -177,11 +181,6 @@ config GENERIC_PENDING_IRQ
177 depends on GENERIC_HARDIRQS && SMP 181 depends on GENERIC_HARDIRQS && SMP
178 default y 182 default y
179 183
180config X86_SMP
181 bool
182 depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64)
183 default y
184
185config USE_GENERIC_SMP_HELPERS 184config USE_GENERIC_SMP_HELPERS
186 def_bool y 185 def_bool y
187 depends on SMP 186 depends on SMP
@@ -197,19 +196,17 @@ config X86_64_SMP
197config X86_HT 196config X86_HT
198 bool 197 bool
199 depends on SMP 198 depends on SMP
200 depends on (X86_32 && !X86_VOYAGER) || X86_64
201 default y
202
203config X86_BIOS_REBOOT
204 bool
205 depends on !X86_VOYAGER
206 default y 199 default y
207 200
208config X86_TRAMPOLINE 201config X86_TRAMPOLINE
209 bool 202 bool
210 depends on X86_SMP || (X86_VOYAGER && SMP) || (64BIT && ACPI_SLEEP) 203 depends on SMP || (64BIT && ACPI_SLEEP)
211 default y 204 default y
212 205
206config X86_32_LAZY_GS
207 def_bool y
208 depends on X86_32 && !CC_STACKPROTECTOR
209
213config KTIME_SCALAR 210config KTIME_SCALAR
214 def_bool X86_32 211 def_bool X86_32
215source "init/Kconfig" 212source "init/Kconfig"
@@ -247,14 +244,24 @@ config SMP
247 244
248 If you don't know what to do here, say N. 245 If you don't know what to do here, say N.
249 246
250config X86_HAS_BOOT_CPU_ID 247config X86_X2APIC
251 def_bool y 248 bool "Support x2apic"
252 depends on X86_VOYAGER 249 depends on X86_LOCAL_APIC && X86_64
250 ---help---
251 This enables x2apic support on CPUs that have this feature.
252
253 This allows 32-bit apic IDs (so it can support very large systems),
254 and accesses the local apic via MSRs not via mmio.
255
256 ( On certain CPU models you may need to enable INTR_REMAP too,
257 to get functional x2apic mode. )
258
259 If you don't know what to do here, say N.
253 260
254config SPARSE_IRQ 261config SPARSE_IRQ
255 bool "Support sparse irq numbering" 262 bool "Support sparse irq numbering"
256 depends on PCI_MSI || HT_IRQ 263 depends on PCI_MSI || HT_IRQ
257 help 264 ---help---
258 This enables support for sparse irqs. This is useful for distro 265 This enables support for sparse irqs. This is useful for distro
259 kernels that want to define a high CONFIG_NR_CPUS value but still 266 kernels that want to define a high CONFIG_NR_CPUS value but still
260 want to have low kernel memory footprint on smaller machines. 267 want to have low kernel memory footprint on smaller machines.
@@ -268,114 +275,140 @@ config NUMA_MIGRATE_IRQ_DESC
268 bool "Move irq desc when changing irq smp_affinity" 275 bool "Move irq desc when changing irq smp_affinity"
269 depends on SPARSE_IRQ && NUMA 276 depends on SPARSE_IRQ && NUMA
270 default n 277 default n
271 help 278 ---help---
272 This enables moving irq_desc to cpu/node that irq will use handled. 279 This enables moving irq_desc to cpu/node that irq will use handled.
273 280
274 If you don't know what to do here, say N. 281 If you don't know what to do here, say N.
275 282
276config X86_FIND_SMP_CONFIG
277 def_bool y
278 depends on X86_MPPARSE || X86_VOYAGER
279
280config X86_MPPARSE 283config X86_MPPARSE
281 bool "Enable MPS table" if ACPI 284 bool "Enable MPS table" if ACPI
282 default y 285 default y
283 depends on X86_LOCAL_APIC 286 depends on X86_LOCAL_APIC
284 help 287 ---help---
285 For old smp systems that do not have proper acpi support. Newer systems 288 For old smp systems that do not have proper acpi support. Newer systems
286 (esp with 64bit cpus) with acpi support, MADT and DSDT will override it 289 (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
287 290
288choice 291config X86_BIGSMP
289 prompt "Subarchitecture Type" 292 bool "Support for big SMP systems with more than 8 CPUs"
290 default X86_PC 293 depends on X86_32 && SMP
294 ---help---
295 This option is needed for the systems that have more than 8 CPUs
291 296
292config X86_PC 297if X86_32
293 bool "PC-compatible" 298config X86_EXTENDED_PLATFORM
294 help 299 bool "Support for extended (non-PC) x86 platforms"
295 Choose this option if your computer is a standard PC or compatible. 300 default y
301 ---help---
302 If you disable this option then the kernel will only support
303 standard PC platforms. (which covers the vast majority of
304 systems out there.)
305
306 If you enable this option then you'll be able to select support
307 for the following (non-PC) 32 bit x86 platforms:
308 AMD Elan
309 NUMAQ (IBM/Sequent)
310 RDC R-321x SoC
311 SGI 320/540 (Visual Workstation)
312 Summit/EXA (IBM x440)
313 Unisys ES7000 IA32 series
314
315 If you have one of these systems, or if you want to build a
316 generic distribution kernel, say Y here - otherwise say N.
317endif
318
319if X86_64
320config X86_EXTENDED_PLATFORM
321 bool "Support for extended (non-PC) x86 platforms"
322 default y
323 ---help---
324 If you disable this option then the kernel will only support
325 standard PC platforms. (which covers the vast majority of
326 systems out there.)
327
328 If you enable this option then you'll be able to select support
329 for the following (non-PC) 64 bit x86 platforms:
330 ScaleMP vSMP
331 SGI Ultraviolet
332
333 If you have one of these systems, or if you want to build a
334 generic distribution kernel, say Y here - otherwise say N.
335endif
336# This is an alphabetically sorted list of 64 bit extended platforms
337# Please maintain the alphabetic order if and when there are additions
338
339config X86_VSMP
340 bool "ScaleMP vSMP"
341 select PARAVIRT
342 depends on X86_64 && PCI
343 depends on X86_EXTENDED_PLATFORM
344 ---help---
345 Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
346 supposed to run on these EM64T-based machines. Only choose this option
347 if you have one of these machines.
348
349config X86_UV
350 bool "SGI Ultraviolet"
351 depends on X86_64
352 depends on X86_EXTENDED_PLATFORM
353 select X86_X2APIC
354 ---help---
355 This option is needed in order to support SGI Ultraviolet systems.
356 If you don't have one of these, you should say N here.
357
358# Following is an alphabetically sorted list of 32 bit extended platforms
359# Please maintain the alphabetic order if and when there are additions
296 360
297config X86_ELAN 361config X86_ELAN
298 bool "AMD Elan" 362 bool "AMD Elan"
299 depends on X86_32 363 depends on X86_32
300 help 364 depends on X86_EXTENDED_PLATFORM
365 ---help---
301 Select this for an AMD Elan processor. 366 Select this for an AMD Elan processor.
302 367
303 Do not use this option for K6/Athlon/Opteron processors! 368 Do not use this option for K6/Athlon/Opteron processors!
304 369
305 If unsure, choose "PC-compatible" instead. 370 If unsure, choose "PC-compatible" instead.
306 371
307config X86_VOYAGER 372config X86_RDC321X
308 bool "Voyager (NCR)" 373 bool "RDC R-321x SoC"
309 depends on X86_32 && (SMP || BROKEN) && !PCI
310 help
311 Voyager is an MCA-based 32-way capable SMP architecture proprietary
312 to NCR Corp. Machine classes 345x/35xx/4100/51xx are Voyager-based.
313
314 *** WARNING ***
315
316 If you do not specifically know you have a Voyager based machine,
317 say N here, otherwise the kernel you build will not be bootable.
318
319config X86_GENERICARCH
320 bool "Generic architecture"
321 depends on X86_32 374 depends on X86_32
322 help 375 depends on X86_EXTENDED_PLATFORM
323 This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default 376 select M486
377 select X86_REBOOTFIXUPS
378 ---help---
379 This option is needed for RDC R-321x system-on-chip, also known
380 as R-8610-(G).
381 If you don't have one of these chips, you should say N here.
382
383config X86_32_NON_STANDARD
384 bool "Support non-standard 32-bit SMP architectures"
385 depends on X86_32 && SMP
386 depends on X86_EXTENDED_PLATFORM
387 ---help---
388 This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default
324 subarchitectures. It is intended for a generic binary kernel. 389 subarchitectures. It is intended for a generic binary kernel.
325 if you select them all, kernel will probe it one by one. and will 390 if you select them all, kernel will probe it one by one. and will
326 fallback to default. 391 fallback to default.
327 392
328if X86_GENERICARCH 393# Alphabetically sorted list of Non standard 32 bit platforms
329 394
330config X86_NUMAQ 395config X86_NUMAQ
331 bool "NUMAQ (IBM/Sequent)" 396 bool "NUMAQ (IBM/Sequent)"
332 depends on SMP && X86_32 && PCI && X86_MPPARSE 397 depends on X86_32_NON_STANDARD
333 select NUMA 398 select NUMA
334 help 399 select X86_MPPARSE
400 ---help---
335 This option is used for getting Linux to run on a NUMAQ (IBM/Sequent) 401 This option is used for getting Linux to run on a NUMAQ (IBM/Sequent)
336 NUMA multiquad box. This changes the way that processors are 402 NUMA multiquad box. This changes the way that processors are
337 bootstrapped, and uses Clustered Logical APIC addressing mode instead 403 bootstrapped, and uses Clustered Logical APIC addressing mode instead
338 of Flat Logical. You will need a new lynxer.elf file to flash your 404 of Flat Logical. You will need a new lynxer.elf file to flash your
339 firmware with - send email to <Martin.Bligh@us.ibm.com>. 405 firmware with - send email to <Martin.Bligh@us.ibm.com>.
340 406
341config X86_SUMMIT
342 bool "Summit/EXA (IBM x440)"
343 depends on X86_32 && SMP
344 help
345 This option is needed for IBM systems that use the Summit/EXA chipset.
346 In particular, it is needed for the x440.
347
348config X86_ES7000
349 bool "Support for Unisys ES7000 IA32 series"
350 depends on X86_32 && SMP
351 help
352 Support for Unisys ES7000 systems. Say 'Y' here if this kernel is
353 supposed to run on an IA32-based Unisys ES7000 system.
354
355config X86_BIGSMP
356 bool "Support for big SMP systems with more than 8 CPUs"
357 depends on X86_32 && SMP
358 help
359 This option is needed for the systems that have more than 8 CPUs
360 and if the system is not of any sub-arch type above.
361
362endif
363
364config X86_VSMP
365 bool "Support for ScaleMP vSMP"
366 select PARAVIRT
367 depends on X86_64 && PCI
368 help
369 Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is
370 supposed to run on these EM64T-based machines. Only choose this option
371 if you have one of these machines.
372
373endchoice
374
375config X86_VISWS 407config X86_VISWS
376 bool "SGI 320/540 (Visual Workstation)" 408 bool "SGI 320/540 (Visual Workstation)"
377 depends on X86_32 && PCI && !X86_VOYAGER && X86_MPPARSE && PCI_GODIRECT 409 depends on X86_32 && PCI && X86_MPPARSE && PCI_GODIRECT
378 help 410 depends on X86_32_NON_STANDARD
411 ---help---
379 The SGI Visual Workstation series is an IA32-based workstation 412 The SGI Visual Workstation series is an IA32-based workstation
380 based on SGI systems chips with some legacy PC hardware attached. 413 based on SGI systems chips with some legacy PC hardware attached.
381 414
@@ -384,21 +417,25 @@ config X86_VISWS
384 A kernel compiled for the Visual Workstation will run on general 417 A kernel compiled for the Visual Workstation will run on general
385 PCs as well. See <file:Documentation/sgi-visws.txt> for details. 418 PCs as well. See <file:Documentation/sgi-visws.txt> for details.
386 419
387config X86_RDC321X 420config X86_SUMMIT
388 bool "RDC R-321x SoC" 421 bool "Summit/EXA (IBM x440)"
389 depends on X86_32 422 depends on X86_32_NON_STANDARD
390 select M486 423 ---help---
391 select X86_REBOOTFIXUPS 424 This option is needed for IBM systems that use the Summit/EXA chipset.
392 help 425 In particular, it is needed for the x440.
393 This option is needed for RDC R-321x system-on-chip, also known 426
394 as R-8610-(G). 427config X86_ES7000
395 If you don't have one of these chips, you should say N here. 428 bool "Unisys ES7000 IA32 series"
429 depends on X86_32_NON_STANDARD && X86_BIGSMP
430 ---help---
431 Support for Unisys ES7000 systems. Say 'Y' here if this kernel is
432 supposed to run on an IA32-based Unisys ES7000 system.
396 433
397config SCHED_OMIT_FRAME_POINTER 434config SCHED_OMIT_FRAME_POINTER
398 def_bool y 435 def_bool y
399 prompt "Single-depth WCHAN output" 436 prompt "Single-depth WCHAN output"
400 depends on X86 437 depends on X86
401 help 438 ---help---
402 Calculate simpler /proc/<PID>/wchan values. If this option 439 Calculate simpler /proc/<PID>/wchan values. If this option
403 is disabled then wchan values will recurse back to the 440 is disabled then wchan values will recurse back to the
404 caller function. This provides more accurate wchan values, 441 caller function. This provides more accurate wchan values,
@@ -408,7 +445,7 @@ config SCHED_OMIT_FRAME_POINTER
408 445
409menuconfig PARAVIRT_GUEST 446menuconfig PARAVIRT_GUEST
410 bool "Paravirtualized guest support" 447 bool "Paravirtualized guest support"
411 help 448 ---help---
412 Say Y here to get to see options related to running Linux under 449 Say Y here to get to see options related to running Linux under
413 various hypervisors. This option alone does not add any kernel code. 450 various hypervisors. This option alone does not add any kernel code.
414 451
@@ -422,8 +459,7 @@ config VMI
422 bool "VMI Guest support" 459 bool "VMI Guest support"
423 select PARAVIRT 460 select PARAVIRT
424 depends on X86_32 461 depends on X86_32
425 depends on !X86_VOYAGER 462 ---help---
426 help
427 VMI provides a paravirtualized interface to the VMware ESX server 463 VMI provides a paravirtualized interface to the VMware ESX server
428 (it could be used by other hypervisors in theory too, but is not 464 (it could be used by other hypervisors in theory too, but is not
429 at the moment), by linking the kernel to a GPL-ed ROM module 465 at the moment), by linking the kernel to a GPL-ed ROM module
@@ -433,8 +469,7 @@ config KVM_CLOCK
433 bool "KVM paravirtualized clock" 469 bool "KVM paravirtualized clock"
434 select PARAVIRT 470 select PARAVIRT
435 select PARAVIRT_CLOCK 471 select PARAVIRT_CLOCK
436 depends on !X86_VOYAGER 472 ---help---
437 help
438 Turning on this option will allow you to run a paravirtualized clock 473 Turning on this option will allow you to run a paravirtualized clock
439 when running over the KVM hypervisor. Instead of relying on a PIT 474 when running over the KVM hypervisor. Instead of relying on a PIT
440 (or probably other) emulation by the underlying device model, the host 475 (or probably other) emulation by the underlying device model, the host
@@ -444,17 +479,15 @@ config KVM_CLOCK
444config KVM_GUEST 479config KVM_GUEST
445 bool "KVM Guest support" 480 bool "KVM Guest support"
446 select PARAVIRT 481 select PARAVIRT
447 depends on !X86_VOYAGER 482 ---help---
448 help 483 This option enables various optimizations for running under the KVM
449 This option enables various optimizations for running under the KVM 484 hypervisor.
450 hypervisor.
451 485
452source "arch/x86/lguest/Kconfig" 486source "arch/x86/lguest/Kconfig"
453 487
454config PARAVIRT 488config PARAVIRT
455 bool "Enable paravirtualization code" 489 bool "Enable paravirtualization code"
456 depends on !X86_VOYAGER 490 ---help---
457 help
458 This changes the kernel so it can modify itself when it is run 491 This changes the kernel so it can modify itself when it is run
459 under a hypervisor, potentially improving performance significantly 492 under a hypervisor, potentially improving performance significantly
460 over full virtualization. However, when run without a hypervisor 493 over full virtualization. However, when run without a hypervisor
@@ -467,51 +500,51 @@ config PARAVIRT_CLOCK
467endif 500endif
468 501
469config PARAVIRT_DEBUG 502config PARAVIRT_DEBUG
470 bool "paravirt-ops debugging" 503 bool "paravirt-ops debugging"
471 depends on PARAVIRT && DEBUG_KERNEL 504 depends on PARAVIRT && DEBUG_KERNEL
472 help 505 ---help---
473 Enable to debug paravirt_ops internals. Specifically, BUG if 506 Enable to debug paravirt_ops internals. Specifically, BUG if
474 a paravirt_op is missing when it is called. 507 a paravirt_op is missing when it is called.
475 508
476config MEMTEST 509config MEMTEST
477 bool "Memtest" 510 bool "Memtest"
478 help 511 ---help---
479 This option adds a kernel parameter 'memtest', which allows memtest 512 This option adds a kernel parameter 'memtest', which allows memtest
480 to be set. 513 to be set.
481 memtest=0, mean disabled; -- default 514 memtest=0, mean disabled; -- default
482 memtest=1, mean do 1 test pattern; 515 memtest=1, mean do 1 test pattern;
483 ... 516 ...
484 memtest=4, mean do 4 test patterns. 517 memtest=4, mean do 4 test patterns.
485 If you are unsure how to answer this question, answer N. 518 If you are unsure how to answer this question, answer N.
486 519
487config X86_SUMMIT_NUMA 520config X86_SUMMIT_NUMA
488 def_bool y 521 def_bool y
489 depends on X86_32 && NUMA && X86_GENERICARCH 522 depends on X86_32 && NUMA && X86_32_NON_STANDARD
490 523
491config X86_CYCLONE_TIMER 524config X86_CYCLONE_TIMER
492 def_bool y 525 def_bool y
493 depends on X86_GENERICARCH 526 depends on X86_32_NON_STANDARD
494 527
495source "arch/x86/Kconfig.cpu" 528source "arch/x86/Kconfig.cpu"
496 529
497config HPET_TIMER 530config HPET_TIMER
498 def_bool X86_64 531 def_bool X86_64
499 prompt "HPET Timer Support" if X86_32 532 prompt "HPET Timer Support" if X86_32
500 help 533 ---help---
501 Use the IA-PC HPET (High Precision Event Timer) to manage 534 Use the IA-PC HPET (High Precision Event Timer) to manage
502 time in preference to the PIT and RTC, if a HPET is 535 time in preference to the PIT and RTC, if a HPET is
503 present. 536 present.
504 HPET is the next generation timer replacing legacy 8254s. 537 HPET is the next generation timer replacing legacy 8254s.
505 The HPET provides a stable time base on SMP 538 The HPET provides a stable time base on SMP
506 systems, unlike the TSC, but it is more expensive to access, 539 systems, unlike the TSC, but it is more expensive to access,
507 as it is off-chip. You can find the HPET spec at 540 as it is off-chip. You can find the HPET spec at
508 <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>. 541 <http://www.intel.com/hardwaredesign/hpetspec_1.pdf>.
509 542
510 You can safely choose Y here. However, HPET will only be 543 You can safely choose Y here. However, HPET will only be
511 activated if the platform and the BIOS support this feature. 544 activated if the platform and the BIOS support this feature.
512 Otherwise the 8254 will be used for timing services. 545 Otherwise the 8254 will be used for timing services.
513 546
514 Choose N to continue using the legacy 8254 timer. 547 Choose N to continue using the legacy 8254 timer.
515 548
516config HPET_EMULATE_RTC 549config HPET_EMULATE_RTC
517 def_bool y 550 def_bool y
@@ -522,7 +555,7 @@ config HPET_EMULATE_RTC
522config DMI 555config DMI
523 default y 556 default y
524 bool "Enable DMI scanning" if EMBEDDED 557 bool "Enable DMI scanning" if EMBEDDED
525 help 558 ---help---
526 Enabled scanning of DMI to identify machine quirks. Say Y 559 Enabled scanning of DMI to identify machine quirks. Say Y
527 here unless you have verified that your setup is not 560 here unless you have verified that your setup is not
528 affected by entries in the DMI blacklist. Required by PNP 561 affected by entries in the DMI blacklist. Required by PNP
@@ -534,7 +567,7 @@ config GART_IOMMU
534 select SWIOTLB 567 select SWIOTLB
535 select AGP 568 select AGP
536 depends on X86_64 && PCI 569 depends on X86_64 && PCI
537 help 570 ---help---
538 Support for full DMA access of devices with 32bit memory access only 571 Support for full DMA access of devices with 32bit memory access only
539 on systems with more than 3GB. This is usually needed for USB, 572 on systems with more than 3GB. This is usually needed for USB,
540 sound, many IDE/SATA chipsets and some other devices. 573 sound, many IDE/SATA chipsets and some other devices.
@@ -549,7 +582,7 @@ config CALGARY_IOMMU
549 bool "IBM Calgary IOMMU support" 582 bool "IBM Calgary IOMMU support"
550 select SWIOTLB 583 select SWIOTLB
551 depends on X86_64 && PCI && EXPERIMENTAL 584 depends on X86_64 && PCI && EXPERIMENTAL
552 help 585 ---help---
553 Support for hardware IOMMUs in IBM's xSeries x366 and x460 586 Support for hardware IOMMUs in IBM's xSeries x366 and x460
554 systems. Needed to run systems with more than 3GB of memory 587 systems. Needed to run systems with more than 3GB of memory
555 properly with 32-bit PCI devices that do not support DAC 588 properly with 32-bit PCI devices that do not support DAC
@@ -567,7 +600,7 @@ config CALGARY_IOMMU_ENABLED_BY_DEFAULT
567 def_bool y 600 def_bool y
568 prompt "Should Calgary be enabled by default?" 601 prompt "Should Calgary be enabled by default?"
569 depends on CALGARY_IOMMU 602 depends on CALGARY_IOMMU
570 help 603 ---help---
571 Should Calgary be enabled by default? if you choose 'y', Calgary 604 Should Calgary be enabled by default? if you choose 'y', Calgary
572 will be used (if it exists). If you choose 'n', Calgary will not be 605 will be used (if it exists). If you choose 'n', Calgary will not be
573 used even if it exists. If you choose 'n' and would like to use 606 used even if it exists. If you choose 'n' and would like to use
@@ -579,7 +612,7 @@ config AMD_IOMMU
579 select SWIOTLB 612 select SWIOTLB
580 select PCI_MSI 613 select PCI_MSI
581 depends on X86_64 && PCI && ACPI 614 depends on X86_64 && PCI && ACPI
582 help 615 ---help---
583 With this option you can enable support for AMD IOMMU hardware in 616 With this option you can enable support for AMD IOMMU hardware in
584 your system. An IOMMU is a hardware component which provides 617 your system. An IOMMU is a hardware component which provides
585 remapping of DMA memory accesses from devices. With an AMD IOMMU you 618 remapping of DMA memory accesses from devices. With an AMD IOMMU you
@@ -594,7 +627,7 @@ config AMD_IOMMU_STATS
594 bool "Export AMD IOMMU statistics to debugfs" 627 bool "Export AMD IOMMU statistics to debugfs"
595 depends on AMD_IOMMU 628 depends on AMD_IOMMU
596 select DEBUG_FS 629 select DEBUG_FS
597 help 630 ---help---
598 This option enables code in the AMD IOMMU driver to collect various 631 This option enables code in the AMD IOMMU driver to collect various
599 statistics about whats happening in the driver and exports that 632 statistics about whats happening in the driver and exports that
600 information to userspace via debugfs. 633 information to userspace via debugfs.
@@ -603,7 +636,7 @@ config AMD_IOMMU_STATS
603# need this always selected by IOMMU for the VIA workaround 636# need this always selected by IOMMU for the VIA workaround
604config SWIOTLB 637config SWIOTLB
605 def_bool y if X86_64 638 def_bool y if X86_64
606 help 639 ---help---
607 Support for software bounce buffers used on x86-64 systems 640 Support for software bounce buffers used on x86-64 systems
608 which don't have a hardware IOMMU (e.g. the current generation 641 which don't have a hardware IOMMU (e.g. the current generation
609 of Intel's x86-64 CPUs). Using this PCI devices which can only 642 of Intel's x86-64 CPUs). Using this PCI devices which can only
@@ -621,7 +654,7 @@ config MAXSMP
621 depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL 654 depends on X86_64 && SMP && DEBUG_KERNEL && EXPERIMENTAL
622 select CPUMASK_OFFSTACK 655 select CPUMASK_OFFSTACK
623 default n 656 default n
624 help 657 ---help---
625 Configure maximum number of CPUS and NUMA Nodes for this architecture. 658 Configure maximum number of CPUS and NUMA Nodes for this architecture.
626 If unsure, say N. 659 If unsure, say N.
627 660
@@ -632,7 +665,7 @@ config NR_CPUS
632 default "4096" if MAXSMP 665 default "4096" if MAXSMP
633 default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000) 666 default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000)
634 default "8" if SMP 667 default "8" if SMP
635 help 668 ---help---
636 This allows you to specify the maximum number of CPUs which this 669 This allows you to specify the maximum number of CPUs which this
637 kernel will support. The maximum supported value is 512 and the 670 kernel will support. The maximum supported value is 512 and the
638 minimum value which makes sense is 2. 671 minimum value which makes sense is 2.
@@ -643,7 +676,7 @@ config NR_CPUS
643config SCHED_SMT 676config SCHED_SMT
644 bool "SMT (Hyperthreading) scheduler support" 677 bool "SMT (Hyperthreading) scheduler support"
645 depends on X86_HT 678 depends on X86_HT
646 help 679 ---help---
647 SMT scheduler support improves the CPU scheduler's decision making 680 SMT scheduler support improves the CPU scheduler's decision making
648 when dealing with Intel Pentium 4 chips with HyperThreading at a 681 when dealing with Intel Pentium 4 chips with HyperThreading at a
649 cost of slightly increased overhead in some places. If unsure say 682 cost of slightly increased overhead in some places. If unsure say
@@ -653,7 +686,7 @@ config SCHED_MC
653 def_bool y 686 def_bool y
654 prompt "Multi-core scheduler support" 687 prompt "Multi-core scheduler support"
655 depends on X86_HT 688 depends on X86_HT
656 help 689 ---help---
657 Multi-core scheduler support improves the CPU scheduler's decision 690 Multi-core scheduler support improves the CPU scheduler's decision
658 making when dealing with multi-core CPU chips at a cost of slightly 691 making when dealing with multi-core CPU chips at a cost of slightly
659 increased overhead in some places. If unsure say N here. 692 increased overhead in some places. If unsure say N here.
@@ -662,8 +695,8 @@ source "kernel/Kconfig.preempt"
662 695
663config X86_UP_APIC 696config X86_UP_APIC
664 bool "Local APIC support on uniprocessors" 697 bool "Local APIC support on uniprocessors"
665 depends on X86_32 && !SMP && !(X86_VOYAGER || X86_GENERICARCH) 698 depends on X86_32 && !SMP && !X86_32_NON_STANDARD
666 help 699 ---help---
667 A local APIC (Advanced Programmable Interrupt Controller) is an 700 A local APIC (Advanced Programmable Interrupt Controller) is an
668 integrated interrupt controller in the CPU. If you have a single-CPU 701 integrated interrupt controller in the CPU. If you have a single-CPU
669 system which has a processor with a local APIC, you can say Y here to 702 system which has a processor with a local APIC, you can say Y here to
@@ -676,7 +709,7 @@ config X86_UP_APIC
676config X86_UP_IOAPIC 709config X86_UP_IOAPIC
677 bool "IO-APIC support on uniprocessors" 710 bool "IO-APIC support on uniprocessors"
678 depends on X86_UP_APIC 711 depends on X86_UP_APIC
679 help 712 ---help---
680 An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an 713 An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
681 SMP-capable replacement for PC-style interrupt controllers. Most 714 SMP-capable replacement for PC-style interrupt controllers. Most
682 SMP systems and many recent uniprocessor systems have one. 715 SMP systems and many recent uniprocessor systems have one.
@@ -687,11 +720,11 @@ config X86_UP_IOAPIC
687 720
688config X86_LOCAL_APIC 721config X86_LOCAL_APIC
689 def_bool y 722 def_bool y
690 depends on X86_64 || (X86_32 && (X86_UP_APIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH)) 723 depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
691 724
692config X86_IO_APIC 725config X86_IO_APIC
693 def_bool y 726 def_bool y
694 depends on X86_64 || (X86_32 && (X86_UP_IOAPIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH)) 727 depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
695 728
696config X86_VISWS_APIC 729config X86_VISWS_APIC
697 def_bool y 730 def_bool y
@@ -701,7 +734,7 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
701 bool "Reroute for broken boot IRQs" 734 bool "Reroute for broken boot IRQs"
702 default n 735 default n
703 depends on X86_IO_APIC 736 depends on X86_IO_APIC
704 help 737 ---help---
705 This option enables a workaround that fixes a source of 738 This option enables a workaround that fixes a source of
706 spurious interrupts. This is recommended when threaded 739 spurious interrupts. This is recommended when threaded
707 interrupt handling is used on systems where the generation of 740 interrupt handling is used on systems where the generation of
@@ -723,7 +756,6 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
723 756
724config X86_MCE 757config X86_MCE
725 bool "Machine Check Exception" 758 bool "Machine Check Exception"
726 depends on !X86_VOYAGER
727 ---help--- 759 ---help---
728 Machine Check Exception support allows the processor to notify the 760 Machine Check Exception support allows the processor to notify the
729 kernel if it detects a problem (e.g. overheating, component failure). 761 kernel if it detects a problem (e.g. overheating, component failure).
@@ -742,7 +774,7 @@ config X86_MCE_INTEL
742 def_bool y 774 def_bool y
743 prompt "Intel MCE features" 775 prompt "Intel MCE features"
744 depends on X86_64 && X86_MCE && X86_LOCAL_APIC 776 depends on X86_64 && X86_MCE && X86_LOCAL_APIC
745 help 777 ---help---
746 Additional support for intel specific MCE features such as 778 Additional support for intel specific MCE features such as
747 the thermal monitor. 779 the thermal monitor.
748 780
@@ -750,14 +782,14 @@ config X86_MCE_AMD
750 def_bool y 782 def_bool y
751 prompt "AMD MCE features" 783 prompt "AMD MCE features"
752 depends on X86_64 && X86_MCE && X86_LOCAL_APIC 784 depends on X86_64 && X86_MCE && X86_LOCAL_APIC
753 help 785 ---help---
754 Additional support for AMD specific MCE features such as 786 Additional support for AMD specific MCE features such as
755 the DRAM Error Threshold. 787 the DRAM Error Threshold.
756 788
757config X86_MCE_NONFATAL 789config X86_MCE_NONFATAL
758 tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4" 790 tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"
759 depends on X86_32 && X86_MCE 791 depends on X86_32 && X86_MCE
760 help 792 ---help---
761 Enabling this feature starts a timer that triggers every 5 seconds which 793 Enabling this feature starts a timer that triggers every 5 seconds which
762 will look at the machine check registers to see if anything happened. 794 will look at the machine check registers to see if anything happened.
763 Non-fatal problems automatically get corrected (but still logged). 795 Non-fatal problems automatically get corrected (but still logged).
@@ -770,7 +802,7 @@ config X86_MCE_NONFATAL
770config X86_MCE_P4THERMAL 802config X86_MCE_P4THERMAL
771 bool "check for P4 thermal throttling interrupt." 803 bool "check for P4 thermal throttling interrupt."
772 depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP) 804 depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP)
773 help 805 ---help---
774 Enabling this feature will cause a message to be printed when the P4 806 Enabling this feature will cause a message to be printed when the P4
775 enters thermal throttling. 807 enters thermal throttling.
776 808
@@ -778,11 +810,11 @@ config VM86
778 bool "Enable VM86 support" if EMBEDDED 810 bool "Enable VM86 support" if EMBEDDED
779 default y 811 default y
780 depends on X86_32 812 depends on X86_32
781 help 813 ---help---
782 This option is required by programs like DOSEMU to run 16-bit legacy 814 This option is required by programs like DOSEMU to run 16-bit legacy
783 code on X86 processors. It also may be needed by software like 815 code on X86 processors. It also may be needed by software like
784 XFree86 to initialize some video cards via BIOS. Disabling this 816 XFree86 to initialize some video cards via BIOS. Disabling this
785 option saves about 6k. 817 option saves about 6k.
786 818
787config TOSHIBA 819config TOSHIBA
788 tristate "Toshiba Laptop support" 820 tristate "Toshiba Laptop support"
@@ -856,33 +888,33 @@ config MICROCODE
856 module will be called microcode. 888 module will be called microcode.
857 889
858config MICROCODE_INTEL 890config MICROCODE_INTEL
859 bool "Intel microcode patch loading support" 891 bool "Intel microcode patch loading support"
860 depends on MICROCODE 892 depends on MICROCODE
861 default MICROCODE 893 default MICROCODE
862 select FW_LOADER 894 select FW_LOADER
863 --help--- 895 ---help---
864 This options enables microcode patch loading support for Intel 896 This options enables microcode patch loading support for Intel
865 processors. 897 processors.
866 898
867 For latest news and information on obtaining all the required 899 For latest news and information on obtaining all the required
868 Intel ingredients for this driver, check: 900 Intel ingredients for this driver, check:
869 <http://www.urbanmyth.org/microcode/>. 901 <http://www.urbanmyth.org/microcode/>.
870 902
871config MICROCODE_AMD 903config MICROCODE_AMD
872 bool "AMD microcode patch loading support" 904 bool "AMD microcode patch loading support"
873 depends on MICROCODE 905 depends on MICROCODE
874 select FW_LOADER 906 select FW_LOADER
875 --help--- 907 ---help---
876 If you select this option, microcode patch loading support for AMD 908 If you select this option, microcode patch loading support for AMD
877 processors will be enabled. 909 processors will be enabled.
878 910
879 config MICROCODE_OLD_INTERFACE 911config MICROCODE_OLD_INTERFACE
880 def_bool y 912 def_bool y
881 depends on MICROCODE 913 depends on MICROCODE
882 914
883config X86_MSR 915config X86_MSR
884 tristate "/dev/cpu/*/msr - Model-specific register support" 916 tristate "/dev/cpu/*/msr - Model-specific register support"
885 help 917 ---help---
886 This device gives privileged processes access to the x86 918 This device gives privileged processes access to the x86
887 Model-Specific Registers (MSRs). It is a character device with 919 Model-Specific Registers (MSRs). It is a character device with
888 major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr. 920 major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
@@ -891,7 +923,7 @@ config X86_MSR
891 923
892config X86_CPUID 924config X86_CPUID
893 tristate "/dev/cpu/*/cpuid - CPU information support" 925 tristate "/dev/cpu/*/cpuid - CPU information support"
894 help 926 ---help---
895 This device gives processes access to the x86 CPUID instruction to 927 This device gives processes access to the x86 CPUID instruction to
896 be executed on a specific processor. It is a character device 928 be executed on a specific processor. It is a character device
897 with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to 929 with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
@@ -943,7 +975,7 @@ config NOHIGHMEM
943config HIGHMEM4G 975config HIGHMEM4G
944 bool "4GB" 976 bool "4GB"
945 depends on !X86_NUMAQ 977 depends on !X86_NUMAQ
946 help 978 ---help---
947 Select this if you have a 32-bit processor and between 1 and 4 979 Select this if you have a 32-bit processor and between 1 and 4
948 gigabytes of physical RAM. 980 gigabytes of physical RAM.
949 981
@@ -951,7 +983,7 @@ config HIGHMEM64G
951 bool "64GB" 983 bool "64GB"
952 depends on !M386 && !M486 984 depends on !M386 && !M486
953 select X86_PAE 985 select X86_PAE
954 help 986 ---help---
955 Select this if you have a 32-bit processor and more than 4 987 Select this if you have a 32-bit processor and more than 4
956 gigabytes of physical RAM. 988 gigabytes of physical RAM.
957 989
@@ -962,7 +994,7 @@ choice
962 prompt "Memory split" if EMBEDDED 994 prompt "Memory split" if EMBEDDED
963 default VMSPLIT_3G 995 default VMSPLIT_3G
964 depends on X86_32 996 depends on X86_32
965 help 997 ---help---
966 Select the desired split between kernel and user memory. 998 Select the desired split between kernel and user memory.
967 999
968 If the address range available to the kernel is less than the 1000 If the address range available to the kernel is less than the
@@ -1008,20 +1040,20 @@ config HIGHMEM
1008config X86_PAE 1040config X86_PAE
1009 bool "PAE (Physical Address Extension) Support" 1041 bool "PAE (Physical Address Extension) Support"
1010 depends on X86_32 && !HIGHMEM4G 1042 depends on X86_32 && !HIGHMEM4G
1011 help 1043 ---help---
1012 PAE is required for NX support, and furthermore enables 1044 PAE is required for NX support, and furthermore enables
1013 larger swapspace support for non-overcommit purposes. It 1045 larger swapspace support for non-overcommit purposes. It
1014 has the cost of more pagetable lookup overhead, and also 1046 has the cost of more pagetable lookup overhead, and also
1015 consumes more pagetable space per process. 1047 consumes more pagetable space per process.
1016 1048
1017config ARCH_PHYS_ADDR_T_64BIT 1049config ARCH_PHYS_ADDR_T_64BIT
1018 def_bool X86_64 || X86_PAE 1050 def_bool X86_64 || X86_PAE
1019 1051
1020config DIRECT_GBPAGES 1052config DIRECT_GBPAGES
1021 bool "Enable 1GB pages for kernel pagetables" if EMBEDDED 1053 bool "Enable 1GB pages for kernel pagetables" if EMBEDDED
1022 default y 1054 default y
1023 depends on X86_64 1055 depends on X86_64
1024 help 1056 ---help---
1025 Allow the kernel linear mapping to use 1GB pages on CPUs that 1057 Allow the kernel linear mapping to use 1GB pages on CPUs that
1026 support it. This can improve the kernel's performance a tiny bit by 1058 support it. This can improve the kernel's performance a tiny bit by
1027 reducing TLB pressure. If in doubt, say "Y". 1059 reducing TLB pressure. If in doubt, say "Y".
@@ -1031,9 +1063,8 @@ config NUMA
1031 bool "Numa Memory Allocation and Scheduler Support" 1063 bool "Numa Memory Allocation and Scheduler Support"
1032 depends on SMP 1064 depends on SMP
1033 depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL) 1065 depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL)
1034 default n if X86_PC
1035 default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP) 1066 default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
1036 help 1067 ---help---
1037 Enable NUMA (Non Uniform Memory Access) support. 1068 Enable NUMA (Non Uniform Memory Access) support.
1038 1069
1039 The kernel will try to allocate memory used by a CPU on the 1070 The kernel will try to allocate memory used by a CPU on the
@@ -1056,19 +1087,19 @@ config K8_NUMA
1056 def_bool y 1087 def_bool y
1057 prompt "Old style AMD Opteron NUMA detection" 1088 prompt "Old style AMD Opteron NUMA detection"
1058 depends on X86_64 && NUMA && PCI 1089 depends on X86_64 && NUMA && PCI
1059 help 1090 ---help---
1060 Enable K8 NUMA node topology detection. You should say Y here if 1091 Enable K8 NUMA node topology detection. You should say Y here if
1061 you have a multi processor AMD K8 system. This uses an old 1092 you have a multi processor AMD K8 system. This uses an old
1062 method to read the NUMA configuration directly from the builtin 1093 method to read the NUMA configuration directly from the builtin
1063 Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA 1094 Northbridge of Opteron. It is recommended to use X86_64_ACPI_NUMA
1064 instead, which also takes priority if both are compiled in. 1095 instead, which also takes priority if both are compiled in.
1065 1096
1066config X86_64_ACPI_NUMA 1097config X86_64_ACPI_NUMA
1067 def_bool y 1098 def_bool y
1068 prompt "ACPI NUMA detection" 1099 prompt "ACPI NUMA detection"
1069 depends on X86_64 && NUMA && ACPI && PCI 1100 depends on X86_64 && NUMA && ACPI && PCI
1070 select ACPI_NUMA 1101 select ACPI_NUMA
1071 help 1102 ---help---
1072 Enable ACPI SRAT based node topology detection. 1103 Enable ACPI SRAT based node topology detection.
1073 1104
1074# Some NUMA nodes have memory ranges that span 1105# Some NUMA nodes have memory ranges that span
@@ -1083,7 +1114,7 @@ config NODES_SPAN_OTHER_NODES
1083config NUMA_EMU 1114config NUMA_EMU
1084 bool "NUMA emulation" 1115 bool "NUMA emulation"
1085 depends on X86_64 && NUMA 1116 depends on X86_64 && NUMA
1086 help 1117 ---help---
1087 Enable NUMA emulation. A flat machine will be split 1118 Enable NUMA emulation. A flat machine will be split
1088 into virtual nodes when booted with "numa=fake=N", where N is the 1119 into virtual nodes when booted with "numa=fake=N", where N is the
1089 number of nodes. This is only useful for debugging. 1120 number of nodes. This is only useful for debugging.
@@ -1096,11 +1127,11 @@ config NODES_SHIFT
1096 default "4" if X86_NUMAQ 1127 default "4" if X86_NUMAQ
1097 default "3" 1128 default "3"
1098 depends on NEED_MULTIPLE_NODES 1129 depends on NEED_MULTIPLE_NODES
1099 help 1130 ---help---
1100 Specify the maximum number of NUMA Nodes available on the target 1131 Specify the maximum number of NUMA Nodes available on the target
1101 system. Increases memory reserved to accomodate various tables. 1132 system. Increases memory reserved to accomodate various tables.
1102 1133
1103config HAVE_ARCH_BOOTMEM_NODE 1134config HAVE_ARCH_BOOTMEM
1104 def_bool y 1135 def_bool y
1105 depends on X86_32 && NUMA 1136 depends on X86_32 && NUMA
1106 1137
@@ -1134,7 +1165,7 @@ config ARCH_SPARSEMEM_DEFAULT
1134 1165
1135config ARCH_SPARSEMEM_ENABLE 1166config ARCH_SPARSEMEM_ENABLE
1136 def_bool y 1167 def_bool y
1137 depends on X86_64 || NUMA || (EXPERIMENTAL && X86_PC) || X86_GENERICARCH 1168 depends on X86_64 || NUMA || (EXPERIMENTAL && X86_32) || X86_32_NON_STANDARD
1138 select SPARSEMEM_STATIC if X86_32 1169 select SPARSEMEM_STATIC if X86_32
1139 select SPARSEMEM_VMEMMAP_ENABLE if X86_64 1170 select SPARSEMEM_VMEMMAP_ENABLE if X86_64
1140 1171
@@ -1151,61 +1182,61 @@ source "mm/Kconfig"
1151config HIGHPTE 1182config HIGHPTE
1152 bool "Allocate 3rd-level pagetables from highmem" 1183 bool "Allocate 3rd-level pagetables from highmem"
1153 depends on X86_32 && (HIGHMEM4G || HIGHMEM64G) 1184 depends on X86_32 && (HIGHMEM4G || HIGHMEM64G)
1154 help 1185 ---help---
1155 The VM uses one page table entry for each page of physical memory. 1186 The VM uses one page table entry for each page of physical memory.
1156 For systems with a lot of RAM, this can be wasteful of precious 1187 For systems with a lot of RAM, this can be wasteful of precious
1157 low memory. Setting this option will put user-space page table 1188 low memory. Setting this option will put user-space page table
1158 entries in high memory. 1189 entries in high memory.
1159 1190
1160config X86_CHECK_BIOS_CORRUPTION 1191config X86_CHECK_BIOS_CORRUPTION
1161 bool "Check for low memory corruption" 1192 bool "Check for low memory corruption"
1162 help 1193 ---help---
1163 Periodically check for memory corruption in low memory, which 1194 Periodically check for memory corruption in low memory, which
1164 is suspected to be caused by BIOS. Even when enabled in the 1195 is suspected to be caused by BIOS. Even when enabled in the
1165 configuration, it is disabled at runtime. Enable it by 1196 configuration, it is disabled at runtime. Enable it by
1166 setting "memory_corruption_check=1" on the kernel command 1197 setting "memory_corruption_check=1" on the kernel command
1167 line. By default it scans the low 64k of memory every 60 1198 line. By default it scans the low 64k of memory every 60
1168 seconds; see the memory_corruption_check_size and 1199 seconds; see the memory_corruption_check_size and
1169 memory_corruption_check_period parameters in 1200 memory_corruption_check_period parameters in
1170 Documentation/kernel-parameters.txt to adjust this. 1201 Documentation/kernel-parameters.txt to adjust this.
1171 1202
1172 When enabled with the default parameters, this option has 1203 When enabled with the default parameters, this option has
1173 almost no overhead, as it reserves a relatively small amount 1204 almost no overhead, as it reserves a relatively small amount
1174 of memory and scans it infrequently. It both detects corruption 1205 of memory and scans it infrequently. It both detects corruption
1175 and prevents it from affecting the running system. 1206 and prevents it from affecting the running system.
1176 1207
1177 It is, however, intended as a diagnostic tool; if repeatable 1208 It is, however, intended as a diagnostic tool; if repeatable
1178 BIOS-originated corruption always affects the same memory, 1209 BIOS-originated corruption always affects the same memory,
1179 you can use memmap= to prevent the kernel from using that 1210 you can use memmap= to prevent the kernel from using that
1180 memory. 1211 memory.
1181 1212
1182config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK 1213config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
1183 bool "Set the default setting of memory_corruption_check" 1214 bool "Set the default setting of memory_corruption_check"
1184 depends on X86_CHECK_BIOS_CORRUPTION 1215 depends on X86_CHECK_BIOS_CORRUPTION
1185 default y 1216 default y
1186 help 1217 ---help---
1187 Set whether the default state of memory_corruption_check is 1218 Set whether the default state of memory_corruption_check is
1188 on or off. 1219 on or off.
1189 1220
1190config X86_RESERVE_LOW_64K 1221config X86_RESERVE_LOW_64K
1191 bool "Reserve low 64K of RAM on AMI/Phoenix BIOSen" 1222 bool "Reserve low 64K of RAM on AMI/Phoenix BIOSen"
1192 default y 1223 default y
1193 help 1224 ---help---
1194 Reserve the first 64K of physical RAM on BIOSes that are known 1225 Reserve the first 64K of physical RAM on BIOSes that are known
1195 to potentially corrupt that memory range. A numbers of BIOSes are 1226 to potentially corrupt that memory range. A numbers of BIOSes are
1196 known to utilize this area during suspend/resume, so it must not 1227 known to utilize this area during suspend/resume, so it must not
1197 be used by the kernel. 1228 be used by the kernel.
1198 1229
1199 Set this to N if you are absolutely sure that you trust the BIOS 1230 Set this to N if you are absolutely sure that you trust the BIOS
1200 to get all its memory reservations and usages right. 1231 to get all its memory reservations and usages right.
1201 1232
1202 If you have doubts about the BIOS (e.g. suspend/resume does not 1233 If you have doubts about the BIOS (e.g. suspend/resume does not
1203 work or there's kernel crashes after certain hardware hotplug 1234 work or there's kernel crashes after certain hardware hotplug
1204 events) and it's not AMI or Phoenix, then you might want to enable 1235 events) and it's not AMI or Phoenix, then you might want to enable
1205 X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check typical 1236 X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check typical
1206 corruption patterns. 1237 corruption patterns.
1207 1238
1208 Say Y if unsure. 1239 Say Y if unsure.
1209 1240
1210config MATH_EMULATION 1241config MATH_EMULATION
1211 bool 1242 bool
@@ -1271,7 +1302,7 @@ config MTRR_SANITIZER
1271 def_bool y 1302 def_bool y
1272 prompt "MTRR cleanup support" 1303 prompt "MTRR cleanup support"
1273 depends on MTRR 1304 depends on MTRR
1274 help 1305 ---help---
1275 Convert MTRR layout from continuous to discrete, so X drivers can 1306 Convert MTRR layout from continuous to discrete, so X drivers can
1276 add writeback entries. 1307 add writeback entries.
1277 1308
@@ -1286,7 +1317,7 @@ config MTRR_SANITIZER_ENABLE_DEFAULT
1286 range 0 1 1317 range 0 1
1287 default "0" 1318 default "0"
1288 depends on MTRR_SANITIZER 1319 depends on MTRR_SANITIZER
1289 help 1320 ---help---
1290 Enable mtrr cleanup default value 1321 Enable mtrr cleanup default value
1291 1322
1292config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT 1323config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
@@ -1294,7 +1325,7 @@ config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
1294 range 0 7 1325 range 0 7
1295 default "1" 1326 default "1"
1296 depends on MTRR_SANITIZER 1327 depends on MTRR_SANITIZER
1297 help 1328 ---help---
1298 mtrr cleanup spare entries default, it can be changed via 1329 mtrr cleanup spare entries default, it can be changed via
1299 mtrr_spare_reg_nr=N on the kernel command line. 1330 mtrr_spare_reg_nr=N on the kernel command line.
1300 1331
@@ -1302,7 +1333,7 @@ config X86_PAT
1302 bool 1333 bool
1303 prompt "x86 PAT support" 1334 prompt "x86 PAT support"
1304 depends on MTRR 1335 depends on MTRR
1305 help 1336 ---help---
1306 Use PAT attributes to setup page level cache control. 1337 Use PAT attributes to setup page level cache control.
1307 1338
1308 PATs are the modern equivalents of MTRRs and are much more 1339 PATs are the modern equivalents of MTRRs and are much more
@@ -1317,20 +1348,20 @@ config EFI
1317 bool "EFI runtime service support" 1348 bool "EFI runtime service support"
1318 depends on ACPI 1349 depends on ACPI
1319 ---help--- 1350 ---help---
1320 This enables the kernel to use EFI runtime services that are 1351 This enables the kernel to use EFI runtime services that are
1321 available (such as the EFI variable services). 1352 available (such as the EFI variable services).
1322 1353
1323 This option is only useful on systems that have EFI firmware. 1354 This option is only useful on systems that have EFI firmware.
1324 In addition, you should use the latest ELILO loader available 1355 In addition, you should use the latest ELILO loader available
1325 at <http://elilo.sourceforge.net> in order to take advantage 1356 at <http://elilo.sourceforge.net> in order to take advantage
1326 of EFI runtime services. However, even with this option, the 1357 of EFI runtime services. However, even with this option, the
1327 resultant kernel should continue to boot on existing non-EFI 1358 resultant kernel should continue to boot on existing non-EFI
1328 platforms. 1359 platforms.
1329 1360
1330config SECCOMP 1361config SECCOMP
1331 def_bool y 1362 def_bool y
1332 prompt "Enable seccomp to safely compute untrusted bytecode" 1363 prompt "Enable seccomp to safely compute untrusted bytecode"
1333 help 1364 ---help---
1334 This kernel feature is useful for number crunching applications 1365 This kernel feature is useful for number crunching applications
1335 that may need to compute untrusted bytecode during their 1366 that may need to compute untrusted bytecode during their
1336 execution. By using pipes or other transports made available to 1367 execution. By using pipes or other transports made available to
@@ -1343,13 +1374,16 @@ config SECCOMP
1343 1374
1344 If unsure, say Y. Only embedded should say N here. 1375 If unsure, say Y. Only embedded should say N here.
1345 1376
1377config CC_STACKPROTECTOR_ALL
1378 bool
1379
1346config CC_STACKPROTECTOR 1380config CC_STACKPROTECTOR
1347 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" 1381 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1348 depends on X86_64 && EXPERIMENTAL && BROKEN 1382 select CC_STACKPROTECTOR_ALL
1349 help 1383 ---help---
1350 This option turns on the -fstack-protector GCC feature. This 1384 This option turns on the -fstack-protector GCC feature. This
1351 feature puts, at the beginning of critical functions, a canary 1385 feature puts, at the beginning of functions, a canary value on
1352 value on the stack just before the return address, and validates 1386 the stack just before the return address, and validates
1353 the value just before actually returning. Stack based buffer 1387 the value just before actually returning. Stack based buffer
1354 overflows (that need to overwrite this return address) now also 1388 overflows (that need to overwrite this return address) now also
1355 overwrite the canary, which gets detected and the attack is then 1389 overwrite the canary, which gets detected and the attack is then
@@ -1357,22 +1391,14 @@ config CC_STACKPROTECTOR
1357 1391
1358 This feature requires gcc version 4.2 or above, or a distribution 1392 This feature requires gcc version 4.2 or above, or a distribution
1359 gcc with the feature backported. Older versions are automatically 1393 gcc with the feature backported. Older versions are automatically
1360 detected and for those versions, this configuration option is ignored. 1394 detected and for those versions, this configuration option is
1361 1395 ignored. (and a warning is printed during bootup)
1362config CC_STACKPROTECTOR_ALL
1363 bool "Use stack-protector for all functions"
1364 depends on CC_STACKPROTECTOR
1365 help
1366 Normally, GCC only inserts the canary value protection for
1367 functions that use large-ish on-stack buffers. By enabling
1368 this option, GCC will be asked to do this for ALL functions.
1369 1396
1370source kernel/Kconfig.hz 1397source kernel/Kconfig.hz
1371 1398
1372config KEXEC 1399config KEXEC
1373 bool "kexec system call" 1400 bool "kexec system call"
1374 depends on X86_BIOS_REBOOT 1401 ---help---
1375 help
1376 kexec is a system call that implements the ability to shutdown your 1402 kexec is a system call that implements the ability to shutdown your
1377 current kernel, and to start another kernel. It is like a reboot 1403 current kernel, and to start another kernel. It is like a reboot
1378 but it is independent of the system firmware. And like a reboot 1404 but it is independent of the system firmware. And like a reboot
@@ -1389,7 +1415,7 @@ config KEXEC
1389config CRASH_DUMP 1415config CRASH_DUMP
1390 bool "kernel crash dumps" 1416 bool "kernel crash dumps"
1391 depends on X86_64 || (X86_32 && HIGHMEM) 1417 depends on X86_64 || (X86_32 && HIGHMEM)
1392 help 1418 ---help---
1393 Generate crash dump after being started by kexec. 1419 Generate crash dump after being started by kexec.
1394 This should be normally only set in special crash dump kernels 1420 This should be normally only set in special crash dump kernels
1395 which are loaded in the main kernel with kexec-tools into 1421 which are loaded in the main kernel with kexec-tools into
@@ -1404,7 +1430,7 @@ config KEXEC_JUMP
1404 bool "kexec jump (EXPERIMENTAL)" 1430 bool "kexec jump (EXPERIMENTAL)"
1405 depends on EXPERIMENTAL 1431 depends on EXPERIMENTAL
1406 depends on KEXEC && HIBERNATION && X86_32 1432 depends on KEXEC && HIBERNATION && X86_32
1407 help 1433 ---help---
1408 Jump between original kernel and kexeced kernel and invoke 1434 Jump between original kernel and kexeced kernel and invoke
1409 code in physical address mode via KEXEC 1435 code in physical address mode via KEXEC
1410 1436
@@ -1413,7 +1439,7 @@ config PHYSICAL_START
1413 default "0x1000000" if X86_NUMAQ 1439 default "0x1000000" if X86_NUMAQ
1414 default "0x200000" if X86_64 1440 default "0x200000" if X86_64
1415 default "0x100000" 1441 default "0x100000"
1416 help 1442 ---help---
1417 This gives the physical address where the kernel is loaded. 1443 This gives the physical address where the kernel is loaded.
1418 1444
1419 If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then 1445 If kernel is a not relocatable (CONFIG_RELOCATABLE=n) then
@@ -1454,7 +1480,7 @@ config PHYSICAL_START
1454config RELOCATABLE 1480config RELOCATABLE
1455 bool "Build a relocatable kernel (EXPERIMENTAL)" 1481 bool "Build a relocatable kernel (EXPERIMENTAL)"
1456 depends on EXPERIMENTAL 1482 depends on EXPERIMENTAL
1457 help 1483 ---help---
1458 This builds a kernel image that retains relocation information 1484 This builds a kernel image that retains relocation information
1459 so it can be loaded someplace besides the default 1MB. 1485 so it can be loaded someplace besides the default 1MB.
1460 The relocations tend to make the kernel binary about 10% larger, 1486 The relocations tend to make the kernel binary about 10% larger,
@@ -1474,7 +1500,7 @@ config PHYSICAL_ALIGN
1474 default "0x100000" if X86_32 1500 default "0x100000" if X86_32
1475 default "0x200000" if X86_64 1501 default "0x200000" if X86_64
1476 range 0x2000 0x400000 1502 range 0x2000 0x400000
1477 help 1503 ---help---
1478 This value puts the alignment restrictions on physical address 1504 This value puts the alignment restrictions on physical address
1479 where kernel is loaded and run from. Kernel is compiled for an 1505 where kernel is loaded and run from. Kernel is compiled for an
1480 address which meets above alignment restriction. 1506 address which meets above alignment restriction.
@@ -1495,7 +1521,7 @@ config PHYSICAL_ALIGN
1495 1521
1496config HOTPLUG_CPU 1522config HOTPLUG_CPU
1497 bool "Support for hot-pluggable CPUs" 1523 bool "Support for hot-pluggable CPUs"
1498 depends on SMP && HOTPLUG && !X86_VOYAGER 1524 depends on SMP && HOTPLUG
1499 ---help--- 1525 ---help---
1500 Say Y here to allow turning CPUs off and on. CPUs can be 1526 Say Y here to allow turning CPUs off and on. CPUs can be
1501 controlled through /sys/devices/system/cpu. 1527 controlled through /sys/devices/system/cpu.
@@ -1507,7 +1533,7 @@ config COMPAT_VDSO
1507 def_bool y 1533 def_bool y
1508 prompt "Compat VDSO support" 1534 prompt "Compat VDSO support"
1509 depends on X86_32 || IA32_EMULATION 1535 depends on X86_32 || IA32_EMULATION
1510 help 1536 ---help---
1511 Map the 32-bit VDSO to the predictable old-style address too. 1537 Map the 32-bit VDSO to the predictable old-style address too.
1512 ---help--- 1538 ---help---
1513 Say N here if you are running a sufficiently recent glibc 1539 Say N here if you are running a sufficiently recent glibc
@@ -1519,7 +1545,7 @@ config COMPAT_VDSO
1519config CMDLINE_BOOL 1545config CMDLINE_BOOL
1520 bool "Built-in kernel command line" 1546 bool "Built-in kernel command line"
1521 default n 1547 default n
1522 help 1548 ---help---
1523 Allow for specifying boot arguments to the kernel at 1549 Allow for specifying boot arguments to the kernel at
1524 build time. On some systems (e.g. embedded ones), it is 1550 build time. On some systems (e.g. embedded ones), it is
1525 necessary or convenient to provide some or all of the 1551 necessary or convenient to provide some or all of the
@@ -1537,7 +1563,7 @@ config CMDLINE
1537 string "Built-in kernel command string" 1563 string "Built-in kernel command string"
1538 depends on CMDLINE_BOOL 1564 depends on CMDLINE_BOOL
1539 default "" 1565 default ""
1540 help 1566 ---help---
1541 Enter arguments here that should be compiled into the kernel 1567 Enter arguments here that should be compiled into the kernel
1542 image and used at boot time. If the boot loader provides a 1568 image and used at boot time. If the boot loader provides a
1543 command line at boot time, it is appended to this string to 1569 command line at boot time, it is appended to this string to
@@ -1554,7 +1580,7 @@ config CMDLINE_OVERRIDE
1554 bool "Built-in command line overrides boot loader arguments" 1580 bool "Built-in command line overrides boot loader arguments"
1555 default n 1581 default n
1556 depends on CMDLINE_BOOL 1582 depends on CMDLINE_BOOL
1557 help 1583 ---help---
1558 Set this option to 'Y' to have the kernel ignore the boot loader 1584 Set this option to 'Y' to have the kernel ignore the boot loader
1559 command line, and use ONLY the built-in command line. 1585 command line, and use ONLY the built-in command line.
1560 1586
@@ -1576,7 +1602,6 @@ config HAVE_ARCH_EARLY_PFN_TO_NID
1576 depends on NUMA 1602 depends on NUMA
1577 1603
1578menu "Power management and ACPI options" 1604menu "Power management and ACPI options"
1579 depends on !X86_VOYAGER
1580 1605
1581config ARCH_HIBERNATION_HEADER 1606config ARCH_HIBERNATION_HEADER
1582 def_bool y 1607 def_bool y
@@ -1654,7 +1679,7 @@ if APM
1654 1679
1655config APM_IGNORE_USER_SUSPEND 1680config APM_IGNORE_USER_SUSPEND
1656 bool "Ignore USER SUSPEND" 1681 bool "Ignore USER SUSPEND"
1657 help 1682 ---help---
1658 This option will ignore USER SUSPEND requests. On machines with a 1683 This option will ignore USER SUSPEND requests. On machines with a
1659 compliant APM BIOS, you want to say N. However, on the NEC Versa M 1684 compliant APM BIOS, you want to say N. However, on the NEC Versa M
1660 series notebooks, it is necessary to say Y because of a BIOS bug. 1685 series notebooks, it is necessary to say Y because of a BIOS bug.
@@ -1678,7 +1703,7 @@ config APM_DO_ENABLE
1678 1703
1679config APM_CPU_IDLE 1704config APM_CPU_IDLE
1680 bool "Make CPU Idle calls when idle" 1705 bool "Make CPU Idle calls when idle"
1681 help 1706 ---help---
1682 Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. 1707 Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
1683 On some machines, this can activate improved power savings, such as 1708 On some machines, this can activate improved power savings, such as
1684 a slowed CPU clock rate, when the machine is idle. These idle calls 1709 a slowed CPU clock rate, when the machine is idle. These idle calls
@@ -1689,7 +1714,7 @@ config APM_CPU_IDLE
1689 1714
1690config APM_DISPLAY_BLANK 1715config APM_DISPLAY_BLANK
1691 bool "Enable console blanking using APM" 1716 bool "Enable console blanking using APM"
1692 help 1717 ---help---
1693 Enable console blanking using the APM. Some laptops can use this to 1718 Enable console blanking using the APM. Some laptops can use this to
1694 turn off the LCD backlight when the screen blanker of the Linux 1719 turn off the LCD backlight when the screen blanker of the Linux
1695 virtual console blanks the screen. Note that this is only used by 1720 virtual console blanks the screen. Note that this is only used by
@@ -1702,7 +1727,7 @@ config APM_DISPLAY_BLANK
1702 1727
1703config APM_ALLOW_INTS 1728config APM_ALLOW_INTS
1704 bool "Allow interrupts during APM BIOS calls" 1729 bool "Allow interrupts during APM BIOS calls"
1705 help 1730 ---help---
1706 Normally we disable external interrupts while we are making calls to 1731 Normally we disable external interrupts while we are making calls to
1707 the APM BIOS as a measure to lessen the effects of a badly behaving 1732 the APM BIOS as a measure to lessen the effects of a badly behaving
1708 BIOS implementation. The BIOS should reenable interrupts if it 1733 BIOS implementation. The BIOS should reenable interrupts if it
@@ -1727,7 +1752,7 @@ config PCI
1727 bool "PCI support" 1752 bool "PCI support"
1728 default y 1753 default y
1729 select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC) 1754 select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
1730 help 1755 ---help---
1731 Find out whether you have a PCI motherboard. PCI is the name of a 1756 Find out whether you have a PCI motherboard. PCI is the name of a
1732 bus system, i.e. the way the CPU talks to the other stuff inside 1757 bus system, i.e. the way the CPU talks to the other stuff inside
1733 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 1758 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
@@ -1798,7 +1823,7 @@ config PCI_MMCONFIG
1798config DMAR 1823config DMAR
1799 bool "Support for DMA Remapping Devices (EXPERIMENTAL)" 1824 bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
1800 depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL 1825 depends on X86_64 && PCI_MSI && ACPI && EXPERIMENTAL
1801 help 1826 ---help---
1802 DMA remapping (DMAR) devices support enables independent address 1827 DMA remapping (DMAR) devices support enables independent address
1803 translations for Direct Memory Access (DMA) from devices. 1828 translations for Direct Memory Access (DMA) from devices.
1804 These DMA remapping devices are reported via ACPI tables 1829 These DMA remapping devices are reported via ACPI tables
@@ -1820,29 +1845,30 @@ config DMAR_GFX_WA
1820 def_bool y 1845 def_bool y
1821 prompt "Support for Graphics workaround" 1846 prompt "Support for Graphics workaround"
1822 depends on DMAR 1847 depends on DMAR
1823 help 1848 ---help---
1824 Current Graphics drivers tend to use physical address 1849 Current Graphics drivers tend to use physical address
1825 for DMA and avoid using DMA APIs. Setting this config 1850 for DMA and avoid using DMA APIs. Setting this config
1826 option permits the IOMMU driver to set a unity map for 1851 option permits the IOMMU driver to set a unity map for
1827 all the OS-visible memory. Hence the driver can continue 1852 all the OS-visible memory. Hence the driver can continue
1828 to use physical addresses for DMA. 1853 to use physical addresses for DMA.
1829 1854
1830config DMAR_FLOPPY_WA 1855config DMAR_FLOPPY_WA
1831 def_bool y 1856 def_bool y
1832 depends on DMAR 1857 depends on DMAR
1833 help 1858 ---help---
1834 Floppy disk drivers are know to bypass DMA API calls 1859 Floppy disk drivers are know to bypass DMA API calls
1835 thereby failing to work when IOMMU is enabled. This 1860 thereby failing to work when IOMMU is enabled. This
1836 workaround will setup a 1:1 mapping for the first 1861 workaround will setup a 1:1 mapping for the first
1837 16M to make floppy (an ISA device) work. 1862 16M to make floppy (an ISA device) work.
1838 1863
1839config INTR_REMAP 1864config INTR_REMAP
1840 bool "Support for Interrupt Remapping (EXPERIMENTAL)" 1865 bool "Support for Interrupt Remapping (EXPERIMENTAL)"
1841 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL 1866 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL
1842 help 1867 select X86_X2APIC
1843 Supports Interrupt remapping for IO-APIC and MSI devices. 1868 ---help---
1844 To use x2apic mode in the CPU's which support x2APIC enhancements or 1869 Supports Interrupt remapping for IO-APIC and MSI devices.
1845 to support platforms with CPU's having > 8 bit APIC ID, say Y. 1870 To use x2apic mode in the CPU's which support x2APIC enhancements or
1871 to support platforms with CPU's having > 8 bit APIC ID, say Y.
1846 1872
1847source "drivers/pci/pcie/Kconfig" 1873source "drivers/pci/pcie/Kconfig"
1848 1874
@@ -1856,8 +1882,7 @@ if X86_32
1856 1882
1857config ISA 1883config ISA
1858 bool "ISA support" 1884 bool "ISA support"
1859 depends on !X86_VOYAGER 1885 ---help---
1860 help
1861 Find out whether you have ISA slots on your motherboard. ISA is the 1886 Find out whether you have ISA slots on your motherboard. ISA is the
1862 name of a bus system, i.e. the way the CPU talks to the other stuff 1887 name of a bus system, i.e. the way the CPU talks to the other stuff
1863 inside your box. Other bus systems are PCI, EISA, MicroChannel 1888 inside your box. Other bus systems are PCI, EISA, MicroChannel
@@ -1883,9 +1908,8 @@ config EISA
1883source "drivers/eisa/Kconfig" 1908source "drivers/eisa/Kconfig"
1884 1909
1885config MCA 1910config MCA
1886 bool "MCA support" if !X86_VOYAGER 1911 bool "MCA support"
1887 default y if X86_VOYAGER 1912 ---help---
1888 help
1889 MicroChannel Architecture is found in some IBM PS/2 machines and 1913 MicroChannel Architecture is found in some IBM PS/2 machines and
1890 laptops. It is a bus system similar to PCI or ISA. See 1914 laptops. It is a bus system similar to PCI or ISA. See
1891 <file:Documentation/mca.txt> (and especially the web page given 1915 <file:Documentation/mca.txt> (and especially the web page given
@@ -1895,8 +1919,7 @@ source "drivers/mca/Kconfig"
1895 1919
1896config SCx200 1920config SCx200
1897 tristate "NatSemi SCx200 support" 1921 tristate "NatSemi SCx200 support"
1898 depends on !X86_VOYAGER 1922 ---help---
1899 help
1900 This provides basic support for National Semiconductor's 1923 This provides basic support for National Semiconductor's
1901 (now AMD's) Geode processors. The driver probes for the 1924 (now AMD's) Geode processors. The driver probes for the
1902 PCI-IDs of several on-chip devices, so its a good dependency 1925 PCI-IDs of several on-chip devices, so its a good dependency
@@ -1908,7 +1931,7 @@ config SCx200HR_TIMER
1908 tristate "NatSemi SCx200 27MHz High-Resolution Timer Support" 1931 tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
1909 depends on SCx200 && GENERIC_TIME 1932 depends on SCx200 && GENERIC_TIME
1910 default y 1933 default y
1911 help 1934 ---help---
1912 This driver provides a clocksource built upon the on-chip 1935 This driver provides a clocksource built upon the on-chip
1913 27MHz high-resolution timer. Its also a workaround for 1936 27MHz high-resolution timer. Its also a workaround for
1914 NSC Geode SC-1100's buggy TSC, which loses time when the 1937 NSC Geode SC-1100's buggy TSC, which loses time when the
@@ -1919,7 +1942,7 @@ config GEODE_MFGPT_TIMER
1919 def_bool y 1942 def_bool y
1920 prompt "Geode Multi-Function General Purpose Timer (MFGPT) events" 1943 prompt "Geode Multi-Function General Purpose Timer (MFGPT) events"
1921 depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS 1944 depends on MGEODE_LX && GENERIC_TIME && GENERIC_CLOCKEVENTS
1922 help 1945 ---help---
1923 This driver provides a clock event source based on the MFGPT 1946 This driver provides a clock event source based on the MFGPT
1924 timer(s) in the CS5535 and CS5536 companion chip for the geode. 1947 timer(s) in the CS5535 and CS5536 companion chip for the geode.
1925 MFGPTs have a better resolution and max interval than the 1948 MFGPTs have a better resolution and max interval than the
@@ -1928,7 +1951,7 @@ config GEODE_MFGPT_TIMER
1928config OLPC 1951config OLPC
1929 bool "One Laptop Per Child support" 1952 bool "One Laptop Per Child support"
1930 default n 1953 default n
1931 help 1954 ---help---
1932 Add support for detecting the unique features of the OLPC 1955 Add support for detecting the unique features of the OLPC
1933 XO hardware. 1956 XO hardware.
1934 1957
@@ -1953,16 +1976,16 @@ config IA32_EMULATION
1953 bool "IA32 Emulation" 1976 bool "IA32 Emulation"
1954 depends on X86_64 1977 depends on X86_64
1955 select COMPAT_BINFMT_ELF 1978 select COMPAT_BINFMT_ELF
1956 help 1979 ---help---
1957 Include code to run 32-bit programs under a 64-bit kernel. You should 1980 Include code to run 32-bit programs under a 64-bit kernel. You should
1958 likely turn this on, unless you're 100% sure that you don't have any 1981 likely turn this on, unless you're 100% sure that you don't have any
1959 32-bit programs left. 1982 32-bit programs left.
1960 1983
1961config IA32_AOUT 1984config IA32_AOUT
1962 tristate "IA32 a.out support" 1985 tristate "IA32 a.out support"
1963 depends on IA32_EMULATION 1986 depends on IA32_EMULATION
1964 help 1987 ---help---
1965 Support old a.out binaries in the 32bit emulation. 1988 Support old a.out binaries in the 32bit emulation.
1966 1989
1967config COMPAT 1990config COMPAT
1968 def_bool y 1991 def_bool y
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index c98d52e82966..a95eaf0e582a 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -50,7 +50,7 @@ config M386
50config M486 50config M486
51 bool "486" 51 bool "486"
52 depends on X86_32 52 depends on X86_32
53 help 53 ---help---
54 Select this for a 486 series processor, either Intel or one of the 54 Select this for a 486 series processor, either Intel or one of the
55 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX, 55 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
56 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or 56 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
@@ -59,7 +59,7 @@ config M486
59config M586 59config M586
60 bool "586/K5/5x86/6x86/6x86MX" 60 bool "586/K5/5x86/6x86/6x86MX"
61 depends on X86_32 61 depends on X86_32
62 help 62 ---help---
63 Select this for an 586 or 686 series processor such as the AMD K5, 63 Select this for an 586 or 686 series processor such as the AMD K5,
64 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not 64 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
65 assume the RDTSC (Read Time Stamp Counter) instruction. 65 assume the RDTSC (Read Time Stamp Counter) instruction.
@@ -67,21 +67,21 @@ config M586
67config M586TSC 67config M586TSC
68 bool "Pentium-Classic" 68 bool "Pentium-Classic"
69 depends on X86_32 69 depends on X86_32
70 help 70 ---help---
71 Select this for a Pentium Classic processor with the RDTSC (Read 71 Select this for a Pentium Classic processor with the RDTSC (Read
72 Time Stamp Counter) instruction for benchmarking. 72 Time Stamp Counter) instruction for benchmarking.
73 73
74config M586MMX 74config M586MMX
75 bool "Pentium-MMX" 75 bool "Pentium-MMX"
76 depends on X86_32 76 depends on X86_32
77 help 77 ---help---
78 Select this for a Pentium with the MMX graphics/multimedia 78 Select this for a Pentium with the MMX graphics/multimedia
79 extended instructions. 79 extended instructions.
80 80
81config M686 81config M686
82 bool "Pentium-Pro" 82 bool "Pentium-Pro"
83 depends on X86_32 83 depends on X86_32
84 help 84 ---help---
85 Select this for Intel Pentium Pro chips. This enables the use of 85 Select this for Intel Pentium Pro chips. This enables the use of
86 Pentium Pro extended instructions, and disables the init-time guard 86 Pentium Pro extended instructions, and disables the init-time guard
87 against the f00f bug found in earlier Pentiums. 87 against the f00f bug found in earlier Pentiums.
@@ -89,7 +89,7 @@ config M686
89config MPENTIUMII 89config MPENTIUMII
90 bool "Pentium-II/Celeron(pre-Coppermine)" 90 bool "Pentium-II/Celeron(pre-Coppermine)"
91 depends on X86_32 91 depends on X86_32
92 help 92 ---help---
93 Select this for Intel chips based on the Pentium-II and 93 Select this for Intel chips based on the Pentium-II and
94 pre-Coppermine Celeron core. This option enables an unaligned 94 pre-Coppermine Celeron core. This option enables an unaligned
95 copy optimization, compiles the kernel with optimization flags 95 copy optimization, compiles the kernel with optimization flags
@@ -99,7 +99,7 @@ config MPENTIUMII
99config MPENTIUMIII 99config MPENTIUMIII
100 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon" 100 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
101 depends on X86_32 101 depends on X86_32
102 help 102 ---help---
103 Select this for Intel chips based on the Pentium-III and 103 Select this for Intel chips based on the Pentium-III and
104 Celeron-Coppermine core. This option enables use of some 104 Celeron-Coppermine core. This option enables use of some
105 extended prefetch instructions in addition to the Pentium II 105 extended prefetch instructions in addition to the Pentium II
@@ -108,14 +108,14 @@ config MPENTIUMIII
108config MPENTIUMM 108config MPENTIUMM
109 bool "Pentium M" 109 bool "Pentium M"
110 depends on X86_32 110 depends on X86_32
111 help 111 ---help---
112 Select this for Intel Pentium M (not Pentium-4 M) 112 Select this for Intel Pentium M (not Pentium-4 M)
113 notebook chips. 113 notebook chips.
114 114
115config MPENTIUM4 115config MPENTIUM4
116 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon" 116 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
117 depends on X86_32 117 depends on X86_32
118 help 118 ---help---
119 Select this for Intel Pentium 4 chips. This includes the 119 Select this for Intel Pentium 4 chips. This includes the
120 Pentium 4, Pentium D, P4-based Celeron and Xeon, and 120 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
121 Pentium-4 M (not Pentium M) chips. This option enables compile 121 Pentium-4 M (not Pentium M) chips. This option enables compile
@@ -151,7 +151,7 @@ config MPENTIUM4
151config MK6 151config MK6
152 bool "K6/K6-II/K6-III" 152 bool "K6/K6-II/K6-III"
153 depends on X86_32 153 depends on X86_32
154 help 154 ---help---
155 Select this for an AMD K6-family processor. Enables use of 155 Select this for an AMD K6-family processor. Enables use of
156 some extended instructions, and passes appropriate optimization 156 some extended instructions, and passes appropriate optimization
157 flags to GCC. 157 flags to GCC.
@@ -159,14 +159,14 @@ config MK6
159config MK7 159config MK7
160 bool "Athlon/Duron/K7" 160 bool "Athlon/Duron/K7"
161 depends on X86_32 161 depends on X86_32
162 help 162 ---help---
163 Select this for an AMD Athlon K7-family processor. Enables use of 163 Select this for an AMD Athlon K7-family processor. Enables use of
164 some extended instructions, and passes appropriate optimization 164 some extended instructions, and passes appropriate optimization
165 flags to GCC. 165 flags to GCC.
166 166
167config MK8 167config MK8
168 bool "Opteron/Athlon64/Hammer/K8" 168 bool "Opteron/Athlon64/Hammer/K8"
169 help 169 ---help---
170 Select this for an AMD Opteron or Athlon64 Hammer-family processor. 170 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
171 Enables use of some extended instructions, and passes appropriate 171 Enables use of some extended instructions, and passes appropriate
172 optimization flags to GCC. 172 optimization flags to GCC.
@@ -174,7 +174,7 @@ config MK8
174config MCRUSOE 174config MCRUSOE
175 bool "Crusoe" 175 bool "Crusoe"
176 depends on X86_32 176 depends on X86_32
177 help 177 ---help---
178 Select this for a Transmeta Crusoe processor. Treats the processor 178 Select this for a Transmeta Crusoe processor. Treats the processor
179 like a 586 with TSC, and sets some GCC optimization flags (like a 179 like a 586 with TSC, and sets some GCC optimization flags (like a
180 Pentium Pro with no alignment requirements). 180 Pentium Pro with no alignment requirements).
@@ -182,13 +182,13 @@ config MCRUSOE
182config MEFFICEON 182config MEFFICEON
183 bool "Efficeon" 183 bool "Efficeon"
184 depends on X86_32 184 depends on X86_32
185 help 185 ---help---
186 Select this for a Transmeta Efficeon processor. 186 Select this for a Transmeta Efficeon processor.
187 187
188config MWINCHIPC6 188config MWINCHIPC6
189 bool "Winchip-C6" 189 bool "Winchip-C6"
190 depends on X86_32 190 depends on X86_32
191 help 191 ---help---
192 Select this for an IDT Winchip C6 chip. Linux and GCC 192 Select this for an IDT Winchip C6 chip. Linux and GCC
193 treat this chip as a 586TSC with some extended instructions 193 treat this chip as a 586TSC with some extended instructions
194 and alignment requirements. 194 and alignment requirements.
@@ -196,7 +196,7 @@ config MWINCHIPC6
196config MWINCHIP3D 196config MWINCHIP3D
197 bool "Winchip-2/Winchip-2A/Winchip-3" 197 bool "Winchip-2/Winchip-2A/Winchip-3"
198 depends on X86_32 198 depends on X86_32
199 help 199 ---help---
200 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC 200 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
201 treat this chip as a 586TSC with some extended instructions 201 treat this chip as a 586TSC with some extended instructions
202 and alignment requirements. Also enable out of order memory 202 and alignment requirements. Also enable out of order memory
@@ -206,19 +206,19 @@ config MWINCHIP3D
206config MGEODEGX1 206config MGEODEGX1
207 bool "GeodeGX1" 207 bool "GeodeGX1"
208 depends on X86_32 208 depends on X86_32
209 help 209 ---help---
210 Select this for a Geode GX1 (Cyrix MediaGX) chip. 210 Select this for a Geode GX1 (Cyrix MediaGX) chip.
211 211
212config MGEODE_LX 212config MGEODE_LX
213 bool "Geode GX/LX" 213 bool "Geode GX/LX"
214 depends on X86_32 214 depends on X86_32
215 help 215 ---help---
216 Select this for AMD Geode GX and LX processors. 216 Select this for AMD Geode GX and LX processors.
217 217
218config MCYRIXIII 218config MCYRIXIII
219 bool "CyrixIII/VIA-C3" 219 bool "CyrixIII/VIA-C3"
220 depends on X86_32 220 depends on X86_32
221 help 221 ---help---
222 Select this for a Cyrix III or C3 chip. Presently Linux and GCC 222 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
223 treat this chip as a generic 586. Whilst the CPU is 686 class, 223 treat this chip as a generic 586. Whilst the CPU is 686 class,
224 it lacks the cmov extension which gcc assumes is present when 224 it lacks the cmov extension which gcc assumes is present when
@@ -230,7 +230,7 @@ config MCYRIXIII
230config MVIAC3_2 230config MVIAC3_2
231 bool "VIA C3-2 (Nehemiah)" 231 bool "VIA C3-2 (Nehemiah)"
232 depends on X86_32 232 depends on X86_32
233 help 233 ---help---
234 Select this for a VIA C3 "Nehemiah". Selecting this enables usage 234 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
235 of SSE and tells gcc to treat the CPU as a 686. 235 of SSE and tells gcc to treat the CPU as a 686.
236 Note, this kernel will not boot on older (pre model 9) C3s. 236 Note, this kernel will not boot on older (pre model 9) C3s.
@@ -238,14 +238,14 @@ config MVIAC3_2
238config MVIAC7 238config MVIAC7
239 bool "VIA C7" 239 bool "VIA C7"
240 depends on X86_32 240 depends on X86_32
241 help 241 ---help---
242 Select this for a VIA C7. Selecting this uses the correct cache 242 Select this for a VIA C7. Selecting this uses the correct cache
243 shift and tells gcc to treat the CPU as a 686. 243 shift and tells gcc to treat the CPU as a 686.
244 244
245config MPSC 245config MPSC
246 bool "Intel P4 / older Netburst based Xeon" 246 bool "Intel P4 / older Netburst based Xeon"
247 depends on X86_64 247 depends on X86_64
248 help 248 ---help---
249 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey 249 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
250 Xeon CPUs with Intel 64bit which is compatible with x86-64. 250 Xeon CPUs with Intel 64bit which is compatible with x86-64.
251 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the 251 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
@@ -255,7 +255,7 @@ config MPSC
255 255
256config MCORE2 256config MCORE2
257 bool "Core 2/newer Xeon" 257 bool "Core 2/newer Xeon"
258 help 258 ---help---
259 259
260 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 260 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
261 53xx) CPUs. You can distinguish newer from older Xeons by the CPU 261 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
@@ -265,7 +265,7 @@ config MCORE2
265config GENERIC_CPU 265config GENERIC_CPU
266 bool "Generic-x86-64" 266 bool "Generic-x86-64"
267 depends on X86_64 267 depends on X86_64
268 help 268 ---help---
269 Generic x86-64 CPU. 269 Generic x86-64 CPU.
270 Run equally well on all x86-64 CPUs. 270 Run equally well on all x86-64 CPUs.
271 271
@@ -274,7 +274,7 @@ endchoice
274config X86_GENERIC 274config X86_GENERIC
275 bool "Generic x86 support" 275 bool "Generic x86 support"
276 depends on X86_32 276 depends on X86_32
277 help 277 ---help---
278 Instead of just including optimizations for the selected 278 Instead of just including optimizations for the selected
279 x86 variant (e.g. PII, Crusoe or Athlon), include some more 279 x86 variant (e.g. PII, Crusoe or Athlon), include some more
280 generic optimizations as well. This will make the kernel 280 generic optimizations as well. This will make the kernel
@@ -294,25 +294,23 @@ config X86_CPU
294# Define implied options from the CPU selection here 294# Define implied options from the CPU selection here
295config X86_L1_CACHE_BYTES 295config X86_L1_CACHE_BYTES
296 int 296 int
297 default "128" if GENERIC_CPU || MPSC 297 default "128" if MPSC
298 default "64" if MK8 || MCORE2 298 default "64" if GENERIC_CPU || MK8 || MCORE2 || X86_32
299 depends on X86_64
300 299
301config X86_INTERNODE_CACHE_BYTES 300config X86_INTERNODE_CACHE_BYTES
302 int 301 int
303 default "4096" if X86_VSMP 302 default "4096" if X86_VSMP
304 default X86_L1_CACHE_BYTES if !X86_VSMP 303 default X86_L1_CACHE_BYTES if !X86_VSMP
305 depends on X86_64
306 304
307config X86_CMPXCHG 305config X86_CMPXCHG
308 def_bool X86_64 || (X86_32 && !M386) 306 def_bool X86_64 || (X86_32 && !M386)
309 307
310config X86_L1_CACHE_SHIFT 308config X86_L1_CACHE_SHIFT
311 int 309 int
312 default "7" if MPENTIUM4 || X86_GENERIC || GENERIC_CPU || MPSC 310 default "7" if MPENTIUM4 || MPSC
313 default "4" if X86_ELAN || M486 || M386 || MGEODEGX1 311 default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
314 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX 312 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
315 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7 313 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7 || X86_GENERIC || GENERIC_CPU
316 314
317config X86_XADD 315config X86_XADD
318 def_bool y 316 def_bool y
@@ -321,7 +319,7 @@ config X86_XADD
321config X86_PPRO_FENCE 319config X86_PPRO_FENCE
322 bool "PentiumPro memory ordering errata workaround" 320 bool "PentiumPro memory ordering errata workaround"
323 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1 321 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
324 help 322 ---help---
325 Old PentiumPro multiprocessor systems had errata that could cause 323 Old PentiumPro multiprocessor systems had errata that could cause
326 memory operations to violate the x86 ordering standard in rare cases. 324 memory operations to violate the x86 ordering standard in rare cases.
327 Enabling this option will attempt to work around some (but not all) 325 Enabling this option will attempt to work around some (but not all)
@@ -414,14 +412,14 @@ config X86_DEBUGCTLMSR
414 412
415menuconfig PROCESSOR_SELECT 413menuconfig PROCESSOR_SELECT
416 bool "Supported processor vendors" if EMBEDDED 414 bool "Supported processor vendors" if EMBEDDED
417 help 415 ---help---
418 This lets you choose what x86 vendor support code your kernel 416 This lets you choose what x86 vendor support code your kernel
419 will include. 417 will include.
420 418
421config CPU_SUP_INTEL 419config CPU_SUP_INTEL
422 default y 420 default y
423 bool "Support Intel processors" if PROCESSOR_SELECT 421 bool "Support Intel processors" if PROCESSOR_SELECT
424 help 422 ---help---
425 This enables detection, tunings and quirks for Intel processors 423 This enables detection, tunings and quirks for Intel processors
426 424
427 You need this enabled if you want your kernel to run on an 425 You need this enabled if you want your kernel to run on an
@@ -435,7 +433,7 @@ config CPU_SUP_CYRIX_32
435 default y 433 default y
436 bool "Support Cyrix processors" if PROCESSOR_SELECT 434 bool "Support Cyrix processors" if PROCESSOR_SELECT
437 depends on !64BIT 435 depends on !64BIT
438 help 436 ---help---
439 This enables detection, tunings and quirks for Cyrix processors 437 This enables detection, tunings and quirks for Cyrix processors
440 438
441 You need this enabled if you want your kernel to run on a 439 You need this enabled if you want your kernel to run on a
@@ -448,7 +446,7 @@ config CPU_SUP_CYRIX_32
448config CPU_SUP_AMD 446config CPU_SUP_AMD
449 default y 447 default y
450 bool "Support AMD processors" if PROCESSOR_SELECT 448 bool "Support AMD processors" if PROCESSOR_SELECT
451 help 449 ---help---
452 This enables detection, tunings and quirks for AMD processors 450 This enables detection, tunings and quirks for AMD processors
453 451
454 You need this enabled if you want your kernel to run on an 452 You need this enabled if you want your kernel to run on an
@@ -462,7 +460,7 @@ config CPU_SUP_CENTAUR_32
462 default y 460 default y
463 bool "Support Centaur processors" if PROCESSOR_SELECT 461 bool "Support Centaur processors" if PROCESSOR_SELECT
464 depends on !64BIT 462 depends on !64BIT
465 help 463 ---help---
466 This enables detection, tunings and quirks for Centaur processors 464 This enables detection, tunings and quirks for Centaur processors
467 465
468 You need this enabled if you want your kernel to run on a 466 You need this enabled if you want your kernel to run on a
@@ -476,7 +474,7 @@ config CPU_SUP_CENTAUR_64
476 default y 474 default y
477 bool "Support Centaur processors" if PROCESSOR_SELECT 475 bool "Support Centaur processors" if PROCESSOR_SELECT
478 depends on 64BIT 476 depends on 64BIT
479 help 477 ---help---
480 This enables detection, tunings and quirks for Centaur processors 478 This enables detection, tunings and quirks for Centaur processors
481 479
482 You need this enabled if you want your kernel to run on a 480 You need this enabled if you want your kernel to run on a
@@ -490,7 +488,7 @@ config CPU_SUP_TRANSMETA_32
490 default y 488 default y
491 bool "Support Transmeta processors" if PROCESSOR_SELECT 489 bool "Support Transmeta processors" if PROCESSOR_SELECT
492 depends on !64BIT 490 depends on !64BIT
493 help 491 ---help---
494 This enables detection, tunings and quirks for Transmeta processors 492 This enables detection, tunings and quirks for Transmeta processors
495 493
496 You need this enabled if you want your kernel to run on a 494 You need this enabled if you want your kernel to run on a
@@ -504,7 +502,7 @@ config CPU_SUP_UMC_32
504 default y 502 default y
505 bool "Support UMC processors" if PROCESSOR_SELECT 503 bool "Support UMC processors" if PROCESSOR_SELECT
506 depends on !64BIT 504 depends on !64BIT
507 help 505 ---help---
508 This enables detection, tunings and quirks for UMC processors 506 This enables detection, tunings and quirks for UMC processors
509 507
510 You need this enabled if you want your kernel to run on a 508 You need this enabled if you want your kernel to run on a
@@ -523,7 +521,7 @@ config X86_PTRACE_BTS
523 bool "Branch Trace Store" 521 bool "Branch Trace Store"
524 default y 522 default y
525 depends on X86_DEBUGCTLMSR 523 depends on X86_DEBUGCTLMSR
526 help 524 ---help---
527 This adds a ptrace interface to the hardware's branch trace store. 525 This adds a ptrace interface to the hardware's branch trace store.
528 526
529 Debuggers may use it to collect an execution trace of the debugged 527 Debuggers may use it to collect an execution trace of the debugged
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index e1983fa025d2..fdb45df608b6 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -7,7 +7,7 @@ source "lib/Kconfig.debug"
7 7
8config STRICT_DEVMEM 8config STRICT_DEVMEM
9 bool "Filter access to /dev/mem" 9 bool "Filter access to /dev/mem"
10 help 10 ---help---
11 If this option is disabled, you allow userspace (root) access to all 11 If this option is disabled, you allow userspace (root) access to all
12 of memory, including kernel and userspace memory. Accidental 12 of memory, including kernel and userspace memory. Accidental
13 access to this is obviously disastrous, but specific access can 13 access to this is obviously disastrous, but specific access can
@@ -25,7 +25,7 @@ config STRICT_DEVMEM
25config X86_VERBOSE_BOOTUP 25config X86_VERBOSE_BOOTUP
26 bool "Enable verbose x86 bootup info messages" 26 bool "Enable verbose x86 bootup info messages"
27 default y 27 default y
28 help 28 ---help---
29 Enables the informational output from the decompression stage 29 Enables the informational output from the decompression stage
30 (e.g. bzImage) of the boot. If you disable this you will still 30 (e.g. bzImage) of the boot. If you disable this you will still
31 see errors. Disable this if you want silent bootup. 31 see errors. Disable this if you want silent bootup.
@@ -33,7 +33,7 @@ config X86_VERBOSE_BOOTUP
33config EARLY_PRINTK 33config EARLY_PRINTK
34 bool "Early printk" if EMBEDDED 34 bool "Early printk" if EMBEDDED
35 default y 35 default y
36 help 36 ---help---
37 Write kernel log output directly into the VGA buffer or to a serial 37 Write kernel log output directly into the VGA buffer or to a serial
38 port. 38 port.
39 39
@@ -47,7 +47,7 @@ config EARLY_PRINTK_DBGP
47 bool "Early printk via EHCI debug port" 47 bool "Early printk via EHCI debug port"
48 default n 48 default n
49 depends on EARLY_PRINTK && PCI 49 depends on EARLY_PRINTK && PCI
50 help 50 ---help---
51 Write kernel log output directly into the EHCI debug port. 51 Write kernel log output directly into the EHCI debug port.
52 52
53 This is useful for kernel debugging when your machine crashes very 53 This is useful for kernel debugging when your machine crashes very
@@ -59,14 +59,14 @@ config EARLY_PRINTK_DBGP
59config DEBUG_STACKOVERFLOW 59config DEBUG_STACKOVERFLOW
60 bool "Check for stack overflows" 60 bool "Check for stack overflows"
61 depends on DEBUG_KERNEL 61 depends on DEBUG_KERNEL
62 help 62 ---help---
63 This option will cause messages to be printed if free stack space 63 This option will cause messages to be printed if free stack space
64 drops below a certain limit. 64 drops below a certain limit.
65 65
66config DEBUG_STACK_USAGE 66config DEBUG_STACK_USAGE
67 bool "Stack utilization instrumentation" 67 bool "Stack utilization instrumentation"
68 depends on DEBUG_KERNEL 68 depends on DEBUG_KERNEL
69 help 69 ---help---
70 Enables the display of the minimum amount of free stack which each 70 Enables the display of the minimum amount of free stack which each
71 task has ever had available in the sysrq-T and sysrq-P debug output. 71 task has ever had available in the sysrq-T and sysrq-P debug output.
72 72
@@ -75,7 +75,7 @@ config DEBUG_STACK_USAGE
75config DEBUG_PAGEALLOC 75config DEBUG_PAGEALLOC
76 bool "Debug page memory allocations" 76 bool "Debug page memory allocations"
77 depends on DEBUG_KERNEL 77 depends on DEBUG_KERNEL
78 help 78 ---help---
79 Unmap pages from the kernel linear mapping after free_pages(). 79 Unmap pages from the kernel linear mapping after free_pages().
80 This results in a large slowdown, but helps to find certain types 80 This results in a large slowdown, but helps to find certain types
81 of memory corruptions. 81 of memory corruptions.
@@ -83,9 +83,9 @@ config DEBUG_PAGEALLOC
83config DEBUG_PER_CPU_MAPS 83config DEBUG_PER_CPU_MAPS
84 bool "Debug access to per_cpu maps" 84 bool "Debug access to per_cpu maps"
85 depends on DEBUG_KERNEL 85 depends on DEBUG_KERNEL
86 depends on X86_SMP 86 depends on SMP
87 default n 87 default n
88 help 88 ---help---
89 Say Y to verify that the per_cpu map being accessed has 89 Say Y to verify that the per_cpu map being accessed has
90 been setup. Adds a fair amount of code to kernel memory 90 been setup. Adds a fair amount of code to kernel memory
91 and decreases performance. 91 and decreases performance.
@@ -96,7 +96,7 @@ config X86_PTDUMP
96 bool "Export kernel pagetable layout to userspace via debugfs" 96 bool "Export kernel pagetable layout to userspace via debugfs"
97 depends on DEBUG_KERNEL 97 depends on DEBUG_KERNEL
98 select DEBUG_FS 98 select DEBUG_FS
99 help 99 ---help---
100 Say Y here if you want to show the kernel pagetable layout in a 100 Say Y here if you want to show the kernel pagetable layout in a
101 debugfs file. This information is only useful for kernel developers 101 debugfs file. This information is only useful for kernel developers
102 who are working in architecture specific areas of the kernel. 102 who are working in architecture specific areas of the kernel.
@@ -108,7 +108,7 @@ config DEBUG_RODATA
108 bool "Write protect kernel read-only data structures" 108 bool "Write protect kernel read-only data structures"
109 default y 109 default y
110 depends on DEBUG_KERNEL 110 depends on DEBUG_KERNEL
111 help 111 ---help---
112 Mark the kernel read-only data as write-protected in the pagetables, 112 Mark the kernel read-only data as write-protected in the pagetables,
113 in order to catch accidental (and incorrect) writes to such const 113 in order to catch accidental (and incorrect) writes to such const
114 data. This is recommended so that we can catch kernel bugs sooner. 114 data. This is recommended so that we can catch kernel bugs sooner.
@@ -117,7 +117,8 @@ config DEBUG_RODATA
117config DEBUG_RODATA_TEST 117config DEBUG_RODATA_TEST
118 bool "Testcase for the DEBUG_RODATA feature" 118 bool "Testcase for the DEBUG_RODATA feature"
119 depends on DEBUG_RODATA 119 depends on DEBUG_RODATA
120 help 120 default y
121 ---help---
121 This option enables a testcase for the DEBUG_RODATA 122 This option enables a testcase for the DEBUG_RODATA
122 feature as well as for the change_page_attr() infrastructure. 123 feature as well as for the change_page_attr() infrastructure.
123 If in doubt, say "N" 124 If in doubt, say "N"
@@ -125,7 +126,7 @@ config DEBUG_RODATA_TEST
125config DEBUG_NX_TEST 126config DEBUG_NX_TEST
126 tristate "Testcase for the NX non-executable stack feature" 127 tristate "Testcase for the NX non-executable stack feature"
127 depends on DEBUG_KERNEL && m 128 depends on DEBUG_KERNEL && m
128 help 129 ---help---
129 This option enables a testcase for the CPU NX capability 130 This option enables a testcase for the CPU NX capability
130 and the software setup of this feature. 131 and the software setup of this feature.
131 If in doubt, say "N" 132 If in doubt, say "N"
@@ -133,7 +134,7 @@ config DEBUG_NX_TEST
133config 4KSTACKS 134config 4KSTACKS
134 bool "Use 4Kb for kernel stacks instead of 8Kb" 135 bool "Use 4Kb for kernel stacks instead of 8Kb"
135 depends on X86_32 136 depends on X86_32
136 help 137 ---help---
137 If you say Y here the kernel will use a 4Kb stacksize for the 138 If you say Y here the kernel will use a 4Kb stacksize for the
138 kernel stack attached to each process/thread. This facilitates 139 kernel stack attached to each process/thread. This facilitates
139 running more threads on a system and also reduces the pressure 140 running more threads on a system and also reduces the pressure
@@ -144,7 +145,7 @@ config DOUBLEFAULT
144 default y 145 default y
145 bool "Enable doublefault exception handler" if EMBEDDED 146 bool "Enable doublefault exception handler" if EMBEDDED
146 depends on X86_32 147 depends on X86_32
147 help 148 ---help---
148 This option allows trapping of rare doublefault exceptions that 149 This option allows trapping of rare doublefault exceptions that
149 would otherwise cause a system to silently reboot. Disabling this 150 would otherwise cause a system to silently reboot. Disabling this
150 option saves about 4k and might cause you much additional grey 151 option saves about 4k and might cause you much additional grey
@@ -154,7 +155,7 @@ config IOMMU_DEBUG
154 bool "Enable IOMMU debugging" 155 bool "Enable IOMMU debugging"
155 depends on GART_IOMMU && DEBUG_KERNEL 156 depends on GART_IOMMU && DEBUG_KERNEL
156 depends on X86_64 157 depends on X86_64
157 help 158 ---help---
158 Force the IOMMU to on even when you have less than 4GB of 159 Force the IOMMU to on even when you have less than 4GB of
159 memory and add debugging code. On overflow always panic. And 160 memory and add debugging code. On overflow always panic. And
160 allow to enable IOMMU leak tracing. Can be disabled at boot 161 allow to enable IOMMU leak tracing. Can be disabled at boot
@@ -170,7 +171,7 @@ config IOMMU_LEAK
170 bool "IOMMU leak tracing" 171 bool "IOMMU leak tracing"
171 depends on DEBUG_KERNEL 172 depends on DEBUG_KERNEL
172 depends on IOMMU_DEBUG 173 depends on IOMMU_DEBUG
173 help 174 ---help---
174 Add a simple leak tracer to the IOMMU code. This is useful when you 175 Add a simple leak tracer to the IOMMU code. This is useful when you
175 are debugging a buggy device driver that leaks IOMMU mappings. 176 are debugging a buggy device driver that leaks IOMMU mappings.
176 177
@@ -203,25 +204,25 @@ choice
203 204
204config IO_DELAY_0X80 205config IO_DELAY_0X80
205 bool "port 0x80 based port-IO delay [recommended]" 206 bool "port 0x80 based port-IO delay [recommended]"
206 help 207 ---help---
207 This is the traditional Linux IO delay used for in/out_p. 208 This is the traditional Linux IO delay used for in/out_p.
208 It is the most tested hence safest selection here. 209 It is the most tested hence safest selection here.
209 210
210config IO_DELAY_0XED 211config IO_DELAY_0XED
211 bool "port 0xed based port-IO delay" 212 bool "port 0xed based port-IO delay"
212 help 213 ---help---
213 Use port 0xed as the IO delay. This frees up port 0x80 which is 214 Use port 0xed as the IO delay. This frees up port 0x80 which is
214 often used as a hardware-debug port. 215 often used as a hardware-debug port.
215 216
216config IO_DELAY_UDELAY 217config IO_DELAY_UDELAY
217 bool "udelay based port-IO delay" 218 bool "udelay based port-IO delay"
218 help 219 ---help---
219 Use udelay(2) as the IO delay method. This provides the delay 220 Use udelay(2) as the IO delay method. This provides the delay
220 while not having any side-effect on the IO port space. 221 while not having any side-effect on the IO port space.
221 222
222config IO_DELAY_NONE 223config IO_DELAY_NONE
223 bool "no port-IO delay" 224 bool "no port-IO delay"
224 help 225 ---help---
225 No port-IO delay. Will break on old boxes that require port-IO 226 No port-IO delay. Will break on old boxes that require port-IO
226 delay for certain operations. Should work on most new machines. 227 delay for certain operations. Should work on most new machines.
227 228
@@ -255,18 +256,18 @@ config DEBUG_BOOT_PARAMS
255 bool "Debug boot parameters" 256 bool "Debug boot parameters"
256 depends on DEBUG_KERNEL 257 depends on DEBUG_KERNEL
257 depends on DEBUG_FS 258 depends on DEBUG_FS
258 help 259 ---help---
259 This option will cause struct boot_params to be exported via debugfs. 260 This option will cause struct boot_params to be exported via debugfs.
260 261
261config CPA_DEBUG 262config CPA_DEBUG
262 bool "CPA self-test code" 263 bool "CPA self-test code"
263 depends on DEBUG_KERNEL 264 depends on DEBUG_KERNEL
264 help 265 ---help---
265 Do change_page_attr() self-tests every 30 seconds. 266 Do change_page_attr() self-tests every 30 seconds.
266 267
267config OPTIMIZE_INLINING 268config OPTIMIZE_INLINING
268 bool "Allow gcc to uninline functions marked 'inline'" 269 bool "Allow gcc to uninline functions marked 'inline'"
269 help 270 ---help---
270 This option determines if the kernel forces gcc to inline the functions 271 This option determines if the kernel forces gcc to inline the functions
271 developers have marked 'inline'. Doing so takes away freedom from gcc to 272 developers have marked 'inline'. Doing so takes away freedom from gcc to
272 do what it thinks is best, which is desirable for the gcc 3.x series of 273 do what it thinks is best, which is desirable for the gcc 3.x series of
@@ -279,4 +280,3 @@ config OPTIMIZE_INLINING
279 If unsure, say N. 280 If unsure, say N.
280 281
281endmenu 282endmenu
282
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index d1a47adb5aec..1836191839ee 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -70,14 +70,17 @@ else
70 # this works around some issues with generating unwind tables in older gccs 70 # this works around some issues with generating unwind tables in older gccs
71 # newer gccs do it by default 71 # newer gccs do it by default
72 KBUILD_CFLAGS += -maccumulate-outgoing-args 72 KBUILD_CFLAGS += -maccumulate-outgoing-args
73endif
73 74
74 stackp := $(CONFIG_SHELL) $(srctree)/scripts/gcc-x86_64-has-stack-protector.sh 75ifdef CONFIG_CC_STACKPROTECTOR
75 stackp-$(CONFIG_CC_STACKPROTECTOR) := $(shell $(stackp) \ 76 cc_has_sp := $(srctree)/scripts/gcc-x86_$(BITS)-has-stack-protector.sh
76 "$(CC)" -fstack-protector ) 77 ifeq ($(shell $(CONFIG_SHELL) $(cc_has_sp) $(CC)),y)
77 stackp-$(CONFIG_CC_STACKPROTECTOR_ALL) += $(shell $(stackp) \ 78 stackp-y := -fstack-protector
78 "$(CC)" -fstack-protector-all ) 79 stackp-$(CONFIG_CC_STACKPROTECTOR_ALL) += -fstack-protector-all
79 80 KBUILD_CFLAGS += $(stackp-y)
80 KBUILD_CFLAGS += $(stackp-y) 81 else
82 $(warning stack protector enabled but no compiler support)
83 endif
81endif 84endif
82 85
83# Stackpointer is addressed different for 32 bit and 64 bit x86 86# Stackpointer is addressed different for 32 bit and 64 bit x86
@@ -102,29 +105,6 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
102# prevent gcc from generating any FP code by mistake 105# prevent gcc from generating any FP code by mistake
103KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,) 106KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,)
104 107
105###
106# Sub architecture support
107# fcore-y is linked before mcore-y files.
108
109# Default subarch .c files
110mcore-y := arch/x86/mach-default/
111
112# Voyager subarch support
113mflags-$(CONFIG_X86_VOYAGER) := -Iarch/x86/include/asm/mach-voyager
114mcore-$(CONFIG_X86_VOYAGER) := arch/x86/mach-voyager/
115
116# generic subarchitecture
117mflags-$(CONFIG_X86_GENERICARCH):= -Iarch/x86/include/asm/mach-generic
118fcore-$(CONFIG_X86_GENERICARCH) += arch/x86/mach-generic/
119mcore-$(CONFIG_X86_GENERICARCH) := arch/x86/mach-default/
120
121# default subarch .h files
122mflags-y += -Iarch/x86/include/asm/mach-default
123
124# 64 bit does not support subarch support - clear sub arch variables
125fcore-$(CONFIG_X86_64) :=
126mcore-$(CONFIG_X86_64) :=
127
128KBUILD_CFLAGS += $(mflags-y) 108KBUILD_CFLAGS += $(mflags-y)
129KBUILD_AFLAGS += $(mflags-y) 109KBUILD_AFLAGS += $(mflags-y)
130 110
@@ -150,9 +130,6 @@ core-$(CONFIG_LGUEST_GUEST) += arch/x86/lguest/
150core-y += arch/x86/kernel/ 130core-y += arch/x86/kernel/
151core-y += arch/x86/mm/ 131core-y += arch/x86/mm/
152 132
153# Remaining sub architecture files
154core-y += $(mcore-y)
155
156core-y += arch/x86/crypto/ 133core-y += arch/x86/crypto/
157core-y += arch/x86/vdso/ 134core-y += arch/x86/vdso/
158core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/ 135core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index cd48c7210016..c70eff69a1fb 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -32,7 +32,6 @@ setup-y += a20.o cmdline.o copy.o cpu.o cpucheck.o edd.o
32setup-y += header.o main.o mca.o memory.o pm.o pmjump.o 32setup-y += header.o main.o mca.o memory.o pm.o pmjump.o
33setup-y += printf.o string.o tty.o video.o video-mode.o version.o 33setup-y += printf.o string.o tty.o video.o video-mode.o version.o
34setup-$(CONFIG_X86_APM_BOOT) += apm.o 34setup-$(CONFIG_X86_APM_BOOT) += apm.o
35setup-$(CONFIG_X86_VOYAGER) += voyager.o
36 35
37# The link order of the video-*.o modules can matter. In particular, 36# The link order of the video-*.o modules can matter. In particular,
38# video-vga.o *must* be listed first, followed by video-vesa.o. 37# video-vga.o *must* be listed first, followed by video-vesa.o.
diff --git a/arch/x86/boot/a20.c b/arch/x86/boot/a20.c
index 4063d630deff..7c19ce8c2442 100644
--- a/arch/x86/boot/a20.c
+++ b/arch/x86/boot/a20.c
@@ -2,6 +2,7 @@
2 * 2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds 3 * Copyright (C) 1991, 1992 Linus Torvalds
4 * Copyright 2007-2008 rPath, Inc. - All Rights Reserved 4 * Copyright 2007-2008 rPath, Inc. - All Rights Reserved
5 * Copyright 2009 Intel Corporation
5 * 6 *
6 * This file is part of the Linux kernel, and is made available under 7 * This file is part of the Linux kernel, and is made available under
7 * the terms of the GNU General Public License version 2. 8 * the terms of the GNU General Public License version 2.
@@ -15,16 +16,23 @@
15#include "boot.h" 16#include "boot.h"
16 17
17#define MAX_8042_LOOPS 100000 18#define MAX_8042_LOOPS 100000
19#define MAX_8042_FF 32
18 20
19static int empty_8042(void) 21static int empty_8042(void)
20{ 22{
21 u8 status; 23 u8 status;
22 int loops = MAX_8042_LOOPS; 24 int loops = MAX_8042_LOOPS;
25 int ffs = MAX_8042_FF;
23 26
24 while (loops--) { 27 while (loops--) {
25 io_delay(); 28 io_delay();
26 29
27 status = inb(0x64); 30 status = inb(0x64);
31 if (status == 0xff) {
32 /* FF is a plausible, but very unlikely status */
33 if (!--ffs)
34 return -1; /* Assume no KBC present */
35 }
28 if (status & 1) { 36 if (status & 1) {
29 /* Read and discard input data */ 37 /* Read and discard input data */
30 io_delay(); 38 io_delay();
@@ -118,44 +126,37 @@ static void enable_a20_fast(void)
118 126
119int enable_a20(void) 127int enable_a20(void)
120{ 128{
121#if defined(CONFIG_X86_ELAN)
122 /* Elan croaks if we try to touch the KBC */
123 enable_a20_fast();
124 while (!a20_test_long())
125 ;
126 return 0;
127#elif defined(CONFIG_X86_VOYAGER)
128 /* On Voyager, a20_test() is unsafe? */
129 enable_a20_kbc();
130 return 0;
131#else
132 int loops = A20_ENABLE_LOOPS; 129 int loops = A20_ENABLE_LOOPS;
133 while (loops--) { 130 int kbc_err;
134 /* First, check to see if A20 is already enabled 131
135 (legacy free, etc.) */ 132 while (loops--) {
136 if (a20_test_short()) 133 /* First, check to see if A20 is already enabled
137 return 0; 134 (legacy free, etc.) */
138 135 if (a20_test_short())
139 /* Next, try the BIOS (INT 0x15, AX=0x2401) */ 136 return 0;
140 enable_a20_bios(); 137
141 if (a20_test_short()) 138 /* Next, try the BIOS (INT 0x15, AX=0x2401) */
142 return 0; 139 enable_a20_bios();
143 140 if (a20_test_short())
144 /* Try enabling A20 through the keyboard controller */ 141 return 0;
145 empty_8042(); 142
146 if (a20_test_short()) 143 /* Try enabling A20 through the keyboard controller */
147 return 0; /* BIOS worked, but with delayed reaction */ 144 kbc_err = empty_8042();
148 145
149 enable_a20_kbc(); 146 if (a20_test_short())
150 if (a20_test_long()) 147 return 0; /* BIOS worked, but with delayed reaction */
151 return 0; 148
152 149 if (!kbc_err) {
153 /* Finally, try enabling the "fast A20 gate" */ 150 enable_a20_kbc();
154 enable_a20_fast(); 151 if (a20_test_long())
155 if (a20_test_long()) 152 return 0;
156 return 0; 153 }
157 } 154
158 155 /* Finally, try enabling the "fast A20 gate" */
159 return -1; 156 enable_a20_fast();
160#endif 157 if (a20_test_long())
158 return 0;
159 }
160
161 return -1;
161} 162}
diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h
index cc0ef13fba7a..7b2692e897e5 100644
--- a/arch/x86/boot/boot.h
+++ b/arch/x86/boot/boot.h
@@ -302,9 +302,6 @@ void probe_cards(int unsafe);
302/* video-vesa.c */ 302/* video-vesa.c */
303void vesa_store_edid(void); 303void vesa_store_edid(void);
304 304
305/* voyager.c */
306int query_voyager(void);
307
308#endif /* __ASSEMBLY__ */ 305#endif /* __ASSEMBLY__ */
309 306
310#endif /* BOOT_BOOT_H */ 307#endif /* BOOT_BOOT_H */
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
index 1771c804e02f..3ca4c194b8e5 100644
--- a/arch/x86/boot/compressed/Makefile
+++ b/arch/x86/boot/compressed/Makefile
@@ -4,7 +4,7 @@
4# create a compressed vmlinux image from the original vmlinux 4# create a compressed vmlinux image from the original vmlinux
5# 5#
6 6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz head_$(BITS).o misc.o piggy.o 7targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma head_$(BITS).o misc.o piggy.o
8 8
9KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 9KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2
10KBUILD_CFLAGS += -fno-strict-aliasing -fPIC 10KBUILD_CFLAGS += -fno-strict-aliasing -fPIC
@@ -47,18 +47,35 @@ ifeq ($(CONFIG_X86_32),y)
47ifdef CONFIG_RELOCATABLE 47ifdef CONFIG_RELOCATABLE
48$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE 48$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE
49 $(call if_changed,gzip) 49 $(call if_changed,gzip)
50$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin.all FORCE
51 $(call if_changed,bzip2)
52$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin.all FORCE
53 $(call if_changed,lzma)
50else 54else
51$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE 55$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
52 $(call if_changed,gzip) 56 $(call if_changed,gzip)
57$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
58 $(call if_changed,bzip2)
59$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
60 $(call if_changed,lzma)
53endif 61endif
54LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T 62LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T
55 63
56else 64else
65
57$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE 66$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
58 $(call if_changed,gzip) 67 $(call if_changed,gzip)
68$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
69 $(call if_changed,bzip2)
70$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
71 $(call if_changed,lzma)
59 72
60LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T 73LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T
61endif 74endif
62 75
63$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE 76suffix_$(CONFIG_KERNEL_GZIP) = gz
77suffix_$(CONFIG_KERNEL_BZIP2) = bz2
78suffix_$(CONFIG_KERNEL_LZMA) = lzma
79
80$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix_y) FORCE
64 $(call if_changed,ld) 81 $(call if_changed,ld)
diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S
index 29c5fbf08392..3a8a866fb2e2 100644
--- a/arch/x86/boot/compressed/head_32.S
+++ b/arch/x86/boot/compressed/head_32.S
@@ -25,14 +25,12 @@
25 25
26#include <linux/linkage.h> 26#include <linux/linkage.h>
27#include <asm/segment.h> 27#include <asm/segment.h>
28#include <asm/page.h> 28#include <asm/page_types.h>
29#include <asm/boot.h> 29#include <asm/boot.h>
30#include <asm/asm-offsets.h> 30#include <asm/asm-offsets.h>
31 31
32.section ".text.head","ax",@progbits 32.section ".text.head","ax",@progbits
33 .globl startup_32 33ENTRY(startup_32)
34
35startup_32:
36 cld 34 cld
37 /* test KEEP_SEGMENTS flag to see if the bootloader is asking 35 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
38 * us to not reload segments */ 36 * us to not reload segments */
@@ -113,6 +111,8 @@ startup_32:
113 */ 111 */
114 leal relocated(%ebx), %eax 112 leal relocated(%ebx), %eax
115 jmp *%eax 113 jmp *%eax
114ENDPROC(startup_32)
115
116.section ".text" 116.section ".text"
117relocated: 117relocated:
118 118
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index 1d5dff4123e1..ed4a82948002 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -26,8 +26,8 @@
26 26
27#include <linux/linkage.h> 27#include <linux/linkage.h>
28#include <asm/segment.h> 28#include <asm/segment.h>
29#include <asm/pgtable.h> 29#include <asm/pgtable_types.h>
30#include <asm/page.h> 30#include <asm/page_types.h>
31#include <asm/boot.h> 31#include <asm/boot.h>
32#include <asm/msr.h> 32#include <asm/msr.h>
33#include <asm/processor-flags.h> 33#include <asm/processor-flags.h>
@@ -35,9 +35,7 @@
35 35
36.section ".text.head" 36.section ".text.head"
37 .code32 37 .code32
38 .globl startup_32 38ENTRY(startup_32)
39
40startup_32:
41 cld 39 cld
42 /* test KEEP_SEGMENTS flag to see if the bootloader is asking 40 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
43 * us to not reload segments */ 41 * us to not reload segments */
@@ -176,6 +174,7 @@ startup_32:
176 174
177 /* Jump from 32bit compatibility mode into 64bit mode. */ 175 /* Jump from 32bit compatibility mode into 64bit mode. */
178 lret 176 lret
177ENDPROC(startup_32)
179 178
180no_longmode: 179no_longmode:
181 /* This isn't an x86-64 CPU so hang */ 180 /* This isn't an x86-64 CPU so hang */
@@ -295,7 +294,6 @@ relocated:
295 call decompress_kernel 294 call decompress_kernel
296 popq %rsi 295 popq %rsi
297 296
298
299/* 297/*
300 * Jump to the decompressed kernel. 298 * Jump to the decompressed kernel.
301 */ 299 */
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c
index da062216948a..e45be73684ff 100644
--- a/arch/x86/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc.c
@@ -116,71 +116,13 @@
116/* 116/*
117 * gzip declarations 117 * gzip declarations
118 */ 118 */
119
120#define OF(args) args
121#define STATIC static 119#define STATIC static
122 120
123#undef memset 121#undef memset
124#undef memcpy 122#undef memcpy
125#define memzero(s, n) memset((s), 0, (n)) 123#define memzero(s, n) memset((s), 0, (n))
126 124
127typedef unsigned char uch;
128typedef unsigned short ush;
129typedef unsigned long ulg;
130
131/*
132 * Window size must be at least 32k, and a power of two.
133 * We don't actually have a window just a huge output buffer,
134 * so we report a 2G window size, as that should always be
135 * larger than our output buffer:
136 */
137#define WSIZE 0x80000000
138
139/* Input buffer: */
140static unsigned char *inbuf;
141
142/* Sliding window buffer (and final output buffer): */
143static unsigned char *window;
144
145/* Valid bytes in inbuf: */
146static unsigned insize;
147
148/* Index of next byte to be processed in inbuf: */
149static unsigned inptr;
150
151/* Bytes in output buffer: */
152static unsigned outcnt;
153
154/* gzip flag byte */
155#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
156#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gz file */
157#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
158#define ORIG_NAM 0x08 /* bit 3 set: original file name present */
159#define COMMENT 0x10 /* bit 4 set: file comment present */
160#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
161#define RESERVED 0xC0 /* bit 6, 7: reserved */
162
163#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
164
165/* Diagnostic functions */
166#ifdef DEBUG
167# define Assert(cond, msg) do { if (!(cond)) error(msg); } while (0)
168# define Trace(x) do { fprintf x; } while (0)
169# define Tracev(x) do { if (verbose) fprintf x ; } while (0)
170# define Tracevv(x) do { if (verbose > 1) fprintf x ; } while (0)
171# define Tracec(c, x) do { if (verbose && (c)) fprintf x ; } while (0)
172# define Tracecv(c, x) do { if (verbose > 1 && (c)) fprintf x ; } while (0)
173#else
174# define Assert(cond, msg)
175# define Trace(x)
176# define Tracev(x)
177# define Tracevv(x)
178# define Tracec(c, x)
179# define Tracecv(c, x)
180#endif
181 125
182static int fill_inbuf(void);
183static void flush_window(void);
184static void error(char *m); 126static void error(char *m);
185 127
186/* 128/*
@@ -189,13 +131,8 @@ static void error(char *m);
189static struct boot_params *real_mode; /* Pointer to real-mode data */ 131static struct boot_params *real_mode; /* Pointer to real-mode data */
190static int quiet; 132static int quiet;
191 133
192extern unsigned char input_data[];
193extern int input_len;
194
195static long bytes_out;
196
197static void *memset(void *s, int c, unsigned n); 134static void *memset(void *s, int c, unsigned n);
198static void *memcpy(void *dest, const void *src, unsigned n); 135void *memcpy(void *dest, const void *src, unsigned n);
199 136
200static void __putstr(int, const char *); 137static void __putstr(int, const char *);
201#define putstr(__x) __putstr(0, __x) 138#define putstr(__x) __putstr(0, __x)
@@ -213,7 +150,17 @@ static char *vidmem;
213static int vidport; 150static int vidport;
214static int lines, cols; 151static int lines, cols;
215 152
216#include "../../../../lib/inflate.c" 153#ifdef CONFIG_KERNEL_GZIP
154#include "../../../../lib/decompress_inflate.c"
155#endif
156
157#ifdef CONFIG_KERNEL_BZIP2
158#include "../../../../lib/decompress_bunzip2.c"
159#endif
160
161#ifdef CONFIG_KERNEL_LZMA
162#include "../../../../lib/decompress_unlzma.c"
163#endif
217 164
218static void scroll(void) 165static void scroll(void)
219{ 166{
@@ -282,7 +229,7 @@ static void *memset(void *s, int c, unsigned n)
282 return s; 229 return s;
283} 230}
284 231
285static void *memcpy(void *dest, const void *src, unsigned n) 232void *memcpy(void *dest, const void *src, unsigned n)
286{ 233{
287 int i; 234 int i;
288 const char *s = src; 235 const char *s = src;
@@ -293,38 +240,6 @@ static void *memcpy(void *dest, const void *src, unsigned n)
293 return dest; 240 return dest;
294} 241}
295 242
296/* ===========================================================================
297 * Fill the input buffer. This is called only when the buffer is empty
298 * and at least one byte is really needed.
299 */
300static int fill_inbuf(void)
301{
302 error("ran out of input data");
303 return 0;
304}
305
306/* ===========================================================================
307 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
308 * (Used for the decompressed data only.)
309 */
310static void flush_window(void)
311{
312 /* With my window equal to my output buffer
313 * I only need to compute the crc here.
314 */
315 unsigned long c = crc; /* temporary variable */
316 unsigned n;
317 unsigned char *in, ch;
318
319 in = window;
320 for (n = 0; n < outcnt; n++) {
321 ch = *in++;
322 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
323 }
324 crc = c;
325 bytes_out += (unsigned long)outcnt;
326 outcnt = 0;
327}
328 243
329static void error(char *x) 244static void error(char *x)
330{ 245{
@@ -407,12 +322,8 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap,
407 lines = real_mode->screen_info.orig_video_lines; 322 lines = real_mode->screen_info.orig_video_lines;
408 cols = real_mode->screen_info.orig_video_cols; 323 cols = real_mode->screen_info.orig_video_cols;
409 324
410 window = output; /* Output buffer (Normally at 1M) */
411 free_mem_ptr = heap; /* Heap */ 325 free_mem_ptr = heap; /* Heap */
412 free_mem_end_ptr = heap + BOOT_HEAP_SIZE; 326 free_mem_end_ptr = heap + BOOT_HEAP_SIZE;
413 inbuf = input_data; /* Input buffer */
414 insize = input_len;
415 inptr = 0;
416 327
417#ifdef CONFIG_X86_64 328#ifdef CONFIG_X86_64
418 if ((unsigned long)output & (__KERNEL_ALIGN - 1)) 329 if ((unsigned long)output & (__KERNEL_ALIGN - 1))
@@ -430,10 +341,9 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap,
430#endif 341#endif
431#endif 342#endif
432 343
433 makecrc();
434 if (!quiet) 344 if (!quiet)
435 putstr("\nDecompressing Linux... "); 345 putstr("\nDecompressing Linux... ");
436 gunzip(); 346 decompress(input_data, input_len, NULL, NULL, output, NULL, error);
437 parse_elf(output); 347 parse_elf(output);
438 if (!quiet) 348 if (!quiet)
439 putstr("done.\nBooting the kernel.\n"); 349 putstr("done.\nBooting the kernel.\n");
diff --git a/arch/x86/boot/copy.S b/arch/x86/boot/copy.S
index ef50c84e8b4b..11f272c6f5e9 100644
--- a/arch/x86/boot/copy.S
+++ b/arch/x86/boot/copy.S
@@ -8,6 +8,8 @@
8 * 8 *
9 * ----------------------------------------------------------------------- */ 9 * ----------------------------------------------------------------------- */
10 10
11#include <linux/linkage.h>
12
11/* 13/*
12 * Memory copy routines 14 * Memory copy routines
13 */ 15 */
@@ -15,9 +17,7 @@
15 .code16gcc 17 .code16gcc
16 .text 18 .text
17 19
18 .globl memcpy 20GLOBAL(memcpy)
19 .type memcpy, @function
20memcpy:
21 pushw %si 21 pushw %si
22 pushw %di 22 pushw %di
23 movw %ax, %di 23 movw %ax, %di
@@ -31,11 +31,9 @@ memcpy:
31 popw %di 31 popw %di
32 popw %si 32 popw %si
33 ret 33 ret
34 .size memcpy, .-memcpy 34ENDPROC(memcpy)
35 35
36 .globl memset 36GLOBAL(memset)
37 .type memset, @function
38memset:
39 pushw %di 37 pushw %di
40 movw %ax, %di 38 movw %ax, %di
41 movzbl %dl, %eax 39 movzbl %dl, %eax
@@ -48,52 +46,42 @@ memset:
48 rep; stosb 46 rep; stosb
49 popw %di 47 popw %di
50 ret 48 ret
51 .size memset, .-memset 49ENDPROC(memset)
52 50
53 .globl copy_from_fs 51GLOBAL(copy_from_fs)
54 .type copy_from_fs, @function
55copy_from_fs:
56 pushw %ds 52 pushw %ds
57 pushw %fs 53 pushw %fs
58 popw %ds 54 popw %ds
59 call memcpy 55 call memcpy
60 popw %ds 56 popw %ds
61 ret 57 ret
62 .size copy_from_fs, .-copy_from_fs 58ENDPROC(copy_from_fs)
63 59
64 .globl copy_to_fs 60GLOBAL(copy_to_fs)
65 .type copy_to_fs, @function
66copy_to_fs:
67 pushw %es 61 pushw %es
68 pushw %fs 62 pushw %fs
69 popw %es 63 popw %es
70 call memcpy 64 call memcpy
71 popw %es 65 popw %es
72 ret 66 ret
73 .size copy_to_fs, .-copy_to_fs 67ENDPROC(copy_to_fs)
74 68
75#if 0 /* Not currently used, but can be enabled as needed */ 69#if 0 /* Not currently used, but can be enabled as needed */
76 70GLOBAL(copy_from_gs)
77 .globl copy_from_gs
78 .type copy_from_gs, @function
79copy_from_gs:
80 pushw %ds 71 pushw %ds
81 pushw %gs 72 pushw %gs
82 popw %ds 73 popw %ds
83 call memcpy 74 call memcpy
84 popw %ds 75 popw %ds
85 ret 76 ret
86 .size copy_from_gs, .-copy_from_gs 77ENDPROC(copy_from_gs)
87 .globl copy_to_gs
88 78
89 .type copy_to_gs, @function 79GLOBAL(copy_to_gs)
90copy_to_gs:
91 pushw %es 80 pushw %es
92 pushw %gs 81 pushw %gs
93 popw %es 82 popw %es
94 call memcpy 83 call memcpy
95 popw %es 84 popw %es
96 ret 85 ret
97 .size copy_to_gs, .-copy_to_gs 86ENDPROC(copy_to_gs)
98
99#endif 87#endif
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S
index b993062e9a5f..7ccff4884a23 100644
--- a/arch/x86/boot/header.S
+++ b/arch/x86/boot/header.S
@@ -19,7 +19,7 @@
19#include <linux/utsrelease.h> 19#include <linux/utsrelease.h>
20#include <asm/boot.h> 20#include <asm/boot.h>
21#include <asm/e820.h> 21#include <asm/e820.h>
22#include <asm/page.h> 22#include <asm/page_types.h>
23#include <asm/setup.h> 23#include <asm/setup.h>
24#include "boot.h" 24#include "boot.h"
25#include "offsets.h" 25#include "offsets.h"
diff --git a/arch/x86/boot/main.c b/arch/x86/boot/main.c
index 197421db1af1..58f0415d3ae0 100644
--- a/arch/x86/boot/main.c
+++ b/arch/x86/boot/main.c
@@ -149,11 +149,6 @@ void main(void)
149 /* Query MCA information */ 149 /* Query MCA information */
150 query_mca(); 150 query_mca();
151 151
152 /* Voyager */
153#ifdef CONFIG_X86_VOYAGER
154 query_voyager();
155#endif
156
157 /* Query Intel SpeedStep (IST) information */ 152 /* Query Intel SpeedStep (IST) information */
158 query_ist(); 153 query_ist();
159 154
diff --git a/arch/x86/boot/pmjump.S b/arch/x86/boot/pmjump.S
index 141b6e20ed31..019c17a75851 100644
--- a/arch/x86/boot/pmjump.S
+++ b/arch/x86/boot/pmjump.S
@@ -15,18 +15,15 @@
15#include <asm/boot.h> 15#include <asm/boot.h>
16#include <asm/processor-flags.h> 16#include <asm/processor-flags.h>
17#include <asm/segment.h> 17#include <asm/segment.h>
18#include <linux/linkage.h>
18 19
19 .text 20 .text
20
21 .globl protected_mode_jump
22 .type protected_mode_jump, @function
23
24 .code16 21 .code16
25 22
26/* 23/*
27 * void protected_mode_jump(u32 entrypoint, u32 bootparams); 24 * void protected_mode_jump(u32 entrypoint, u32 bootparams);
28 */ 25 */
29protected_mode_jump: 26GLOBAL(protected_mode_jump)
30 movl %edx, %esi # Pointer to boot_params table 27 movl %edx, %esi # Pointer to boot_params table
31 28
32 xorl %ebx, %ebx 29 xorl %ebx, %ebx
@@ -47,12 +44,10 @@ protected_mode_jump:
47 .byte 0x66, 0xea # ljmpl opcode 44 .byte 0x66, 0xea # ljmpl opcode
482: .long in_pm32 # offset 452: .long in_pm32 # offset
49 .word __BOOT_CS # segment 46 .word __BOOT_CS # segment
50 47ENDPROC(protected_mode_jump)
51 .size protected_mode_jump, .-protected_mode_jump
52 48
53 .code32 49 .code32
54 .type in_pm32, @function 50GLOBAL(in_pm32)
55in_pm32:
56 # Set up data segments for flat 32-bit mode 51 # Set up data segments for flat 32-bit mode
57 movl %ecx, %ds 52 movl %ecx, %ds
58 movl %ecx, %es 53 movl %ecx, %es
@@ -78,5 +73,4 @@ in_pm32:
78 lldt %cx 73 lldt %cx
79 74
80 jmpl *%eax # Jump to the 32-bit entrypoint 75 jmpl *%eax # Jump to the 32-bit entrypoint
81 76ENDPROC(in_pm32)
82 .size in_pm32, .-in_pm32
diff --git a/arch/x86/boot/voyager.c b/arch/x86/boot/voyager.c
deleted file mode 100644
index 433909d61e5c..000000000000
--- a/arch/x86/boot/voyager.c
+++ /dev/null
@@ -1,40 +0,0 @@
1/* -*- linux-c -*- ------------------------------------------------------- *
2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 * Copyright 2007 rPath, Inc. - All Rights Reserved
5 *
6 * This file is part of the Linux kernel, and is made available under
7 * the terms of the GNU General Public License version 2.
8 *
9 * ----------------------------------------------------------------------- */
10
11/*
12 * Get the Voyager config information
13 */
14
15#include "boot.h"
16
17int query_voyager(void)
18{
19 u8 err;
20 u16 es, di;
21 /* Abuse the apm_bios_info area for this */
22 u8 *data_ptr = (u8 *)&boot_params.apm_bios_info;
23
24 data_ptr[0] = 0xff; /* Flag on config not found(?) */
25
26 asm("pushw %%es ; "
27 "int $0x15 ; "
28 "setc %0 ; "
29 "movw %%es, %1 ; "
30 "popw %%es"
31 : "=q" (err), "=r" (es), "=D" (di)
32 : "a" (0xffc0));
33
34 if (err)
35 return -1; /* Not Voyager */
36
37 set_fs(es);
38 copy_from_fs(data_ptr, di, 7); /* Table is 7 bytes apparently */
39 return 0;
40}
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index edba00d98ac3..235b81d0f6f2 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -1,14 +1,13 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc5 3# Linux kernel version: 2.6.29-rc4
4# Wed Sep 3 17:23:09 2008 4# Tue Feb 24 15:50:58 2009
5# 5#
6# CONFIG_64BIT is not set 6# CONFIG_64BIT is not set
7CONFIG_X86_32=y 7CONFIG_X86_32=y
8# CONFIG_X86_64 is not set 8# CONFIG_X86_64 is not set
9CONFIG_X86=y 9CONFIG_X86=y
10CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" 10CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"
11# CONFIG_GENERIC_LOCKBREAK is not set
12CONFIG_GENERIC_TIME=y 11CONFIG_GENERIC_TIME=y
13CONFIG_GENERIC_CMOS_UPDATE=y 12CONFIG_GENERIC_CMOS_UPDATE=y
14CONFIG_CLOCKSOURCE_WATCHDOG=y 13CONFIG_CLOCKSOURCE_WATCHDOG=y
@@ -24,16 +23,14 @@ CONFIG_GENERIC_ISA_DMA=y
24CONFIG_GENERIC_IOMAP=y 23CONFIG_GENERIC_IOMAP=y
25CONFIG_GENERIC_BUG=y 24CONFIG_GENERIC_BUG=y
26CONFIG_GENERIC_HWEIGHT=y 25CONFIG_GENERIC_HWEIGHT=y
27# CONFIG_GENERIC_GPIO is not set
28CONFIG_ARCH_MAY_HAVE_PC_FDC=y 26CONFIG_ARCH_MAY_HAVE_PC_FDC=y
29# CONFIG_RWSEM_GENERIC_SPINLOCK is not set 27# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
30CONFIG_RWSEM_XCHGADD_ALGORITHM=y 28CONFIG_RWSEM_XCHGADD_ALGORITHM=y
31# CONFIG_ARCH_HAS_ILOG2_U32 is not set
32# CONFIG_ARCH_HAS_ILOG2_U64 is not set
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 29CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_GENERIC_CALIBRATE_DELAY=y 30CONFIG_GENERIC_CALIBRATE_DELAY=y
35# CONFIG_GENERIC_TIME_VSYSCALL is not set 31# CONFIG_GENERIC_TIME_VSYSCALL is not set
36CONFIG_ARCH_HAS_CPU_RELAX=y 32CONFIG_ARCH_HAS_CPU_RELAX=y
33CONFIG_ARCH_HAS_DEFAULT_IDLE=y
37CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y 34CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
38CONFIG_HAVE_SETUP_PER_CPU_AREA=y 35CONFIG_HAVE_SETUP_PER_CPU_AREA=y
39# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set 36# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set
@@ -42,12 +39,12 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
42# CONFIG_ZONE_DMA32 is not set 39# CONFIG_ZONE_DMA32 is not set
43CONFIG_ARCH_POPULATES_NODE_MAP=y 40CONFIG_ARCH_POPULATES_NODE_MAP=y
44# CONFIG_AUDIT_ARCH is not set 41# CONFIG_AUDIT_ARCH is not set
45CONFIG_ARCH_SUPPORTS_AOUT=y
46CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y 42CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
47CONFIG_GENERIC_HARDIRQS=y 43CONFIG_GENERIC_HARDIRQS=y
48CONFIG_GENERIC_IRQ_PROBE=y 44CONFIG_GENERIC_IRQ_PROBE=y
49CONFIG_GENERIC_PENDING_IRQ=y 45CONFIG_GENERIC_PENDING_IRQ=y
50CONFIG_X86_SMP=y 46CONFIG_X86_SMP=y
47CONFIG_USE_GENERIC_SMP_HELPERS=y
51CONFIG_X86_32_SMP=y 48CONFIG_X86_32_SMP=y
52CONFIG_X86_HT=y 49CONFIG_X86_HT=y
53CONFIG_X86_BIOS_REBOOT=y 50CONFIG_X86_BIOS_REBOOT=y
@@ -76,30 +73,44 @@ CONFIG_TASK_IO_ACCOUNTING=y
76CONFIG_AUDIT=y 73CONFIG_AUDIT=y
77CONFIG_AUDITSYSCALL=y 74CONFIG_AUDITSYSCALL=y
78CONFIG_AUDIT_TREE=y 75CONFIG_AUDIT_TREE=y
76
77#
78# RCU Subsystem
79#
80# CONFIG_CLASSIC_RCU is not set
81CONFIG_TREE_RCU=y
82# CONFIG_PREEMPT_RCU is not set
83# CONFIG_RCU_TRACE is not set
84CONFIG_RCU_FANOUT=32
85# CONFIG_RCU_FANOUT_EXACT is not set
86# CONFIG_TREE_RCU_TRACE is not set
87# CONFIG_PREEMPT_RCU_TRACE is not set
79# CONFIG_IKCONFIG is not set 88# CONFIG_IKCONFIG is not set
80CONFIG_LOG_BUF_SHIFT=18 89CONFIG_LOG_BUF_SHIFT=18
81CONFIG_CGROUPS=y
82# CONFIG_CGROUP_DEBUG is not set
83CONFIG_CGROUP_NS=y
84# CONFIG_CGROUP_DEVICE is not set
85CONFIG_CPUSETS=y
86CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y 90CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
87CONFIG_GROUP_SCHED=y 91CONFIG_GROUP_SCHED=y
88CONFIG_FAIR_GROUP_SCHED=y 92CONFIG_FAIR_GROUP_SCHED=y
89# CONFIG_RT_GROUP_SCHED is not set 93# CONFIG_RT_GROUP_SCHED is not set
90# CONFIG_USER_SCHED is not set 94# CONFIG_USER_SCHED is not set
91CONFIG_CGROUP_SCHED=y 95CONFIG_CGROUP_SCHED=y
96CONFIG_CGROUPS=y
97# CONFIG_CGROUP_DEBUG is not set
98CONFIG_CGROUP_NS=y
99CONFIG_CGROUP_FREEZER=y
100# CONFIG_CGROUP_DEVICE is not set
101CONFIG_CPUSETS=y
102CONFIG_PROC_PID_CPUSET=y
92CONFIG_CGROUP_CPUACCT=y 103CONFIG_CGROUP_CPUACCT=y
93CONFIG_RESOURCE_COUNTERS=y 104CONFIG_RESOURCE_COUNTERS=y
94# CONFIG_CGROUP_MEM_RES_CTLR is not set 105# CONFIG_CGROUP_MEM_RES_CTLR is not set
95# CONFIG_SYSFS_DEPRECATED_V2 is not set 106# CONFIG_SYSFS_DEPRECATED_V2 is not set
96CONFIG_PROC_PID_CPUSET=y
97CONFIG_RELAY=y 107CONFIG_RELAY=y
98CONFIG_NAMESPACES=y 108CONFIG_NAMESPACES=y
99CONFIG_UTS_NS=y 109CONFIG_UTS_NS=y
100CONFIG_IPC_NS=y 110CONFIG_IPC_NS=y
101CONFIG_USER_NS=y 111CONFIG_USER_NS=y
102CONFIG_PID_NS=y 112CONFIG_PID_NS=y
113CONFIG_NET_NS=y
103CONFIG_BLK_DEV_INITRD=y 114CONFIG_BLK_DEV_INITRD=y
104CONFIG_INITRAMFS_SOURCE="" 115CONFIG_INITRAMFS_SOURCE=""
105CONFIG_CC_OPTIMIZE_FOR_SIZE=y 116CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -124,12 +135,15 @@ CONFIG_SIGNALFD=y
124CONFIG_TIMERFD=y 135CONFIG_TIMERFD=y
125CONFIG_EVENTFD=y 136CONFIG_EVENTFD=y
126CONFIG_SHMEM=y 137CONFIG_SHMEM=y
138CONFIG_AIO=y
127CONFIG_VM_EVENT_COUNTERS=y 139CONFIG_VM_EVENT_COUNTERS=y
140CONFIG_PCI_QUIRKS=y
128CONFIG_SLUB_DEBUG=y 141CONFIG_SLUB_DEBUG=y
129# CONFIG_SLAB is not set 142# CONFIG_SLAB is not set
130CONFIG_SLUB=y 143CONFIG_SLUB=y
131# CONFIG_SLOB is not set 144# CONFIG_SLOB is not set
132CONFIG_PROFILING=y 145CONFIG_PROFILING=y
146CONFIG_TRACEPOINTS=y
133CONFIG_MARKERS=y 147CONFIG_MARKERS=y
134# CONFIG_OPROFILE is not set 148# CONFIG_OPROFILE is not set
135CONFIG_HAVE_OPROFILE=y 149CONFIG_HAVE_OPROFILE=y
@@ -139,15 +153,10 @@ CONFIG_KRETPROBES=y
139CONFIG_HAVE_IOREMAP_PROT=y 153CONFIG_HAVE_IOREMAP_PROT=y
140CONFIG_HAVE_KPROBES=y 154CONFIG_HAVE_KPROBES=y
141CONFIG_HAVE_KRETPROBES=y 155CONFIG_HAVE_KRETPROBES=y
142# CONFIG_HAVE_ARCH_TRACEHOOK is not set 156CONFIG_HAVE_ARCH_TRACEHOOK=y
143# CONFIG_HAVE_DMA_ATTRS is not set
144CONFIG_USE_GENERIC_SMP_HELPERS=y
145# CONFIG_HAVE_CLK is not set
146CONFIG_PROC_PAGE_MONITOR=y
147CONFIG_HAVE_GENERIC_DMA_COHERENT=y 157CONFIG_HAVE_GENERIC_DMA_COHERENT=y
148CONFIG_SLABINFO=y 158CONFIG_SLABINFO=y
149CONFIG_RT_MUTEXES=y 159CONFIG_RT_MUTEXES=y
150# CONFIG_TINY_SHMEM is not set
151CONFIG_BASE_SMALL=0 160CONFIG_BASE_SMALL=0
152CONFIG_MODULES=y 161CONFIG_MODULES=y
153# CONFIG_MODULE_FORCE_LOAD is not set 162# CONFIG_MODULE_FORCE_LOAD is not set
@@ -155,12 +164,10 @@ CONFIG_MODULE_UNLOAD=y
155CONFIG_MODULE_FORCE_UNLOAD=y 164CONFIG_MODULE_FORCE_UNLOAD=y
156# CONFIG_MODVERSIONS is not set 165# CONFIG_MODVERSIONS is not set
157# CONFIG_MODULE_SRCVERSION_ALL is not set 166# CONFIG_MODULE_SRCVERSION_ALL is not set
158CONFIG_KMOD=y
159CONFIG_STOP_MACHINE=y 167CONFIG_STOP_MACHINE=y
160CONFIG_BLOCK=y 168CONFIG_BLOCK=y
161# CONFIG_LBD is not set 169# CONFIG_LBD is not set
162CONFIG_BLK_DEV_IO_TRACE=y 170CONFIG_BLK_DEV_IO_TRACE=y
163# CONFIG_LSF is not set
164CONFIG_BLK_DEV_BSG=y 171CONFIG_BLK_DEV_BSG=y
165# CONFIG_BLK_DEV_INTEGRITY is not set 172# CONFIG_BLK_DEV_INTEGRITY is not set
166 173
@@ -176,7 +183,7 @@ CONFIG_IOSCHED_CFQ=y
176CONFIG_DEFAULT_CFQ=y 183CONFIG_DEFAULT_CFQ=y
177# CONFIG_DEFAULT_NOOP is not set 184# CONFIG_DEFAULT_NOOP is not set
178CONFIG_DEFAULT_IOSCHED="cfq" 185CONFIG_DEFAULT_IOSCHED="cfq"
179CONFIG_CLASSIC_RCU=y 186CONFIG_FREEZER=y
180 187
181# 188#
182# Processor type and features 189# Processor type and features
@@ -186,15 +193,14 @@ CONFIG_NO_HZ=y
186CONFIG_HIGH_RES_TIMERS=y 193CONFIG_HIGH_RES_TIMERS=y
187CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 194CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
188CONFIG_SMP=y 195CONFIG_SMP=y
196CONFIG_SPARSE_IRQ=y
189CONFIG_X86_FIND_SMP_CONFIG=y 197CONFIG_X86_FIND_SMP_CONFIG=y
190CONFIG_X86_MPPARSE=y 198CONFIG_X86_MPPARSE=y
191CONFIG_X86_PC=y
192# CONFIG_X86_ELAN is not set 199# CONFIG_X86_ELAN is not set
193# CONFIG_X86_VOYAGER is not set
194# CONFIG_X86_GENERICARCH is not set 200# CONFIG_X86_GENERICARCH is not set
195# CONFIG_X86_VSMP is not set 201# CONFIG_X86_VSMP is not set
196# CONFIG_X86_RDC321X is not set 202# CONFIG_X86_RDC321X is not set
197CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 203CONFIG_SCHED_OMIT_FRAME_POINTER=y
198# CONFIG_PARAVIRT_GUEST is not set 204# CONFIG_PARAVIRT_GUEST is not set
199# CONFIG_MEMTEST is not set 205# CONFIG_MEMTEST is not set
200# CONFIG_M386 is not set 206# CONFIG_M386 is not set
@@ -238,10 +244,19 @@ CONFIG_X86_TSC=y
238CONFIG_X86_CMOV=y 244CONFIG_X86_CMOV=y
239CONFIG_X86_MINIMUM_CPU_FAMILY=4 245CONFIG_X86_MINIMUM_CPU_FAMILY=4
240CONFIG_X86_DEBUGCTLMSR=y 246CONFIG_X86_DEBUGCTLMSR=y
247CONFIG_CPU_SUP_INTEL=y
248CONFIG_CPU_SUP_CYRIX_32=y
249CONFIG_CPU_SUP_AMD=y
250CONFIG_CPU_SUP_CENTAUR_32=y
251CONFIG_CPU_SUP_TRANSMETA_32=y
252CONFIG_CPU_SUP_UMC_32=y
253CONFIG_X86_DS=y
254CONFIG_X86_PTRACE_BTS=y
241CONFIG_HPET_TIMER=y 255CONFIG_HPET_TIMER=y
242CONFIG_HPET_EMULATE_RTC=y 256CONFIG_HPET_EMULATE_RTC=y
243CONFIG_DMI=y 257CONFIG_DMI=y
244# CONFIG_IOMMU_HELPER is not set 258# CONFIG_IOMMU_HELPER is not set
259# CONFIG_IOMMU_API is not set
245CONFIG_NR_CPUS=64 260CONFIG_NR_CPUS=64
246CONFIG_SCHED_SMT=y 261CONFIG_SCHED_SMT=y
247CONFIG_SCHED_MC=y 262CONFIG_SCHED_MC=y
@@ -250,12 +265,17 @@ CONFIG_PREEMPT_VOLUNTARY=y
250# CONFIG_PREEMPT is not set 265# CONFIG_PREEMPT is not set
251CONFIG_X86_LOCAL_APIC=y 266CONFIG_X86_LOCAL_APIC=y
252CONFIG_X86_IO_APIC=y 267CONFIG_X86_IO_APIC=y
253# CONFIG_X86_MCE is not set 268CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
269CONFIG_X86_MCE=y
270CONFIG_X86_MCE_NONFATAL=y
271CONFIG_X86_MCE_P4THERMAL=y
254CONFIG_VM86=y 272CONFIG_VM86=y
255# CONFIG_TOSHIBA is not set 273# CONFIG_TOSHIBA is not set
256# CONFIG_I8K is not set 274# CONFIG_I8K is not set
257CONFIG_X86_REBOOTFIXUPS=y 275CONFIG_X86_REBOOTFIXUPS=y
258CONFIG_MICROCODE=y 276CONFIG_MICROCODE=y
277CONFIG_MICROCODE_INTEL=y
278CONFIG_MICROCODE_AMD=y
259CONFIG_MICROCODE_OLD_INTERFACE=y 279CONFIG_MICROCODE_OLD_INTERFACE=y
260CONFIG_X86_MSR=y 280CONFIG_X86_MSR=y
261CONFIG_X86_CPUID=y 281CONFIG_X86_CPUID=y
@@ -264,6 +284,7 @@ CONFIG_HIGHMEM4G=y
264# CONFIG_HIGHMEM64G is not set 284# CONFIG_HIGHMEM64G is not set
265CONFIG_PAGE_OFFSET=0xC0000000 285CONFIG_PAGE_OFFSET=0xC0000000
266CONFIG_HIGHMEM=y 286CONFIG_HIGHMEM=y
287# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
267CONFIG_ARCH_FLATMEM_ENABLE=y 288CONFIG_ARCH_FLATMEM_ENABLE=y
268CONFIG_ARCH_SPARSEMEM_ENABLE=y 289CONFIG_ARCH_SPARSEMEM_ENABLE=y
269CONFIG_ARCH_SELECT_MEMORY_MODEL=y 290CONFIG_ARCH_SELECT_MEMORY_MODEL=y
@@ -274,14 +295,17 @@ CONFIG_FLATMEM_MANUAL=y
274CONFIG_FLATMEM=y 295CONFIG_FLATMEM=y
275CONFIG_FLAT_NODE_MEM_MAP=y 296CONFIG_FLAT_NODE_MEM_MAP=y
276CONFIG_SPARSEMEM_STATIC=y 297CONFIG_SPARSEMEM_STATIC=y
277# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
278CONFIG_PAGEFLAGS_EXTENDED=y 298CONFIG_PAGEFLAGS_EXTENDED=y
279CONFIG_SPLIT_PTLOCK_CPUS=4 299CONFIG_SPLIT_PTLOCK_CPUS=4
280CONFIG_RESOURCES_64BIT=y 300# CONFIG_PHYS_ADDR_T_64BIT is not set
281CONFIG_ZONE_DMA_FLAG=1 301CONFIG_ZONE_DMA_FLAG=1
282CONFIG_BOUNCE=y 302CONFIG_BOUNCE=y
283CONFIG_VIRT_TO_BUS=y 303CONFIG_VIRT_TO_BUS=y
304CONFIG_UNEVICTABLE_LRU=y
284CONFIG_HIGHPTE=y 305CONFIG_HIGHPTE=y
306CONFIG_X86_CHECK_BIOS_CORRUPTION=y
307CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
308CONFIG_X86_RESERVE_LOW_64K=y
285# CONFIG_MATH_EMULATION is not set 309# CONFIG_MATH_EMULATION is not set
286CONFIG_MTRR=y 310CONFIG_MTRR=y
287# CONFIG_MTRR_SANITIZER is not set 311# CONFIG_MTRR_SANITIZER is not set
@@ -302,10 +326,11 @@ CONFIG_PHYSICAL_START=0x1000000
302CONFIG_PHYSICAL_ALIGN=0x200000 326CONFIG_PHYSICAL_ALIGN=0x200000
303CONFIG_HOTPLUG_CPU=y 327CONFIG_HOTPLUG_CPU=y
304# CONFIG_COMPAT_VDSO is not set 328# CONFIG_COMPAT_VDSO is not set
329# CONFIG_CMDLINE_BOOL is not set
305CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 330CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
306 331
307# 332#
308# Power management options 333# Power management and ACPI options
309# 334#
310CONFIG_PM=y 335CONFIG_PM=y
311CONFIG_PM_DEBUG=y 336CONFIG_PM_DEBUG=y
@@ -331,19 +356,13 @@ CONFIG_ACPI_BATTERY=y
331CONFIG_ACPI_BUTTON=y 356CONFIG_ACPI_BUTTON=y
332CONFIG_ACPI_FAN=y 357CONFIG_ACPI_FAN=y
333CONFIG_ACPI_DOCK=y 358CONFIG_ACPI_DOCK=y
334# CONFIG_ACPI_BAY is not set
335CONFIG_ACPI_PROCESSOR=y 359CONFIG_ACPI_PROCESSOR=y
336CONFIG_ACPI_HOTPLUG_CPU=y 360CONFIG_ACPI_HOTPLUG_CPU=y
337CONFIG_ACPI_THERMAL=y 361CONFIG_ACPI_THERMAL=y
338# CONFIG_ACPI_WMI is not set
339# CONFIG_ACPI_ASUS is not set
340# CONFIG_ACPI_TOSHIBA is not set
341# CONFIG_ACPI_CUSTOM_DSDT is not set 362# CONFIG_ACPI_CUSTOM_DSDT is not set
342CONFIG_ACPI_BLACKLIST_YEAR=0 363CONFIG_ACPI_BLACKLIST_YEAR=0
343# CONFIG_ACPI_DEBUG is not set 364# CONFIG_ACPI_DEBUG is not set
344CONFIG_ACPI_EC=y
345# CONFIG_ACPI_PCI_SLOT is not set 365# CONFIG_ACPI_PCI_SLOT is not set
346CONFIG_ACPI_POWER=y
347CONFIG_ACPI_SYSTEM=y 366CONFIG_ACPI_SYSTEM=y
348CONFIG_X86_PM_TIMER=y 367CONFIG_X86_PM_TIMER=y
349CONFIG_ACPI_CONTAINER=y 368CONFIG_ACPI_CONTAINER=y
@@ -388,7 +407,6 @@ CONFIG_X86_ACPI_CPUFREQ=y
388# 407#
389# shared options 408# shared options
390# 409#
391# CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set
392# CONFIG_X86_SPEEDSTEP_LIB is not set 410# CONFIG_X86_SPEEDSTEP_LIB is not set
393CONFIG_CPU_IDLE=y 411CONFIG_CPU_IDLE=y
394CONFIG_CPU_IDLE_GOV_LADDER=y 412CONFIG_CPU_IDLE_GOV_LADDER=y
@@ -415,6 +433,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y
415CONFIG_PCI_MSI=y 433CONFIG_PCI_MSI=y
416# CONFIG_PCI_LEGACY is not set 434# CONFIG_PCI_LEGACY is not set
417# CONFIG_PCI_DEBUG is not set 435# CONFIG_PCI_DEBUG is not set
436# CONFIG_PCI_STUB is not set
418CONFIG_HT_IRQ=y 437CONFIG_HT_IRQ=y
419CONFIG_ISA_DMA_API=y 438CONFIG_ISA_DMA_API=y
420# CONFIG_ISA is not set 439# CONFIG_ISA is not set
@@ -452,13 +471,17 @@ CONFIG_HOTPLUG_PCI=y
452# Executable file formats / Emulations 471# Executable file formats / Emulations
453# 472#
454CONFIG_BINFMT_ELF=y 473CONFIG_BINFMT_ELF=y
474CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
475CONFIG_HAVE_AOUT=y
455# CONFIG_BINFMT_AOUT is not set 476# CONFIG_BINFMT_AOUT is not set
456CONFIG_BINFMT_MISC=y 477CONFIG_BINFMT_MISC=y
478CONFIG_HAVE_ATOMIC_IOMAP=y
457CONFIG_NET=y 479CONFIG_NET=y
458 480
459# 481#
460# Networking options 482# Networking options
461# 483#
484CONFIG_COMPAT_NET_DEV_OPS=y
462CONFIG_PACKET=y 485CONFIG_PACKET=y
463CONFIG_PACKET_MMAP=y 486CONFIG_PACKET_MMAP=y
464CONFIG_UNIX=y 487CONFIG_UNIX=y
@@ -519,7 +542,6 @@ CONFIG_DEFAULT_CUBIC=y
519# CONFIG_DEFAULT_RENO is not set 542# CONFIG_DEFAULT_RENO is not set
520CONFIG_DEFAULT_TCP_CONG="cubic" 543CONFIG_DEFAULT_TCP_CONG="cubic"
521CONFIG_TCP_MD5SIG=y 544CONFIG_TCP_MD5SIG=y
522# CONFIG_IP_VS is not set
523CONFIG_IPV6=y 545CONFIG_IPV6=y
524# CONFIG_IPV6_PRIVACY is not set 546# CONFIG_IPV6_PRIVACY is not set
525# CONFIG_IPV6_ROUTER_PREF is not set 547# CONFIG_IPV6_ROUTER_PREF is not set
@@ -557,19 +579,21 @@ CONFIG_NF_CONNTRACK_IRC=y
557CONFIG_NF_CONNTRACK_SIP=y 579CONFIG_NF_CONNTRACK_SIP=y
558CONFIG_NF_CT_NETLINK=y 580CONFIG_NF_CT_NETLINK=y
559CONFIG_NETFILTER_XTABLES=y 581CONFIG_NETFILTER_XTABLES=y
582CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
560CONFIG_NETFILTER_XT_TARGET_MARK=y 583CONFIG_NETFILTER_XT_TARGET_MARK=y
561CONFIG_NETFILTER_XT_TARGET_NFLOG=y 584CONFIG_NETFILTER_XT_TARGET_NFLOG=y
562CONFIG_NETFILTER_XT_TARGET_SECMARK=y 585CONFIG_NETFILTER_XT_TARGET_SECMARK=y
563CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
564CONFIG_NETFILTER_XT_TARGET_TCPMSS=y 586CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
565CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y 587CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
566CONFIG_NETFILTER_XT_MATCH_MARK=y 588CONFIG_NETFILTER_XT_MATCH_MARK=y
567CONFIG_NETFILTER_XT_MATCH_POLICY=y 589CONFIG_NETFILTER_XT_MATCH_POLICY=y
568CONFIG_NETFILTER_XT_MATCH_STATE=y 590CONFIG_NETFILTER_XT_MATCH_STATE=y
591# CONFIG_IP_VS is not set
569 592
570# 593#
571# IP: Netfilter Configuration 594# IP: Netfilter Configuration
572# 595#
596CONFIG_NF_DEFRAG_IPV4=y
573CONFIG_NF_CONNTRACK_IPV4=y 597CONFIG_NF_CONNTRACK_IPV4=y
574CONFIG_NF_CONNTRACK_PROC_COMPAT=y 598CONFIG_NF_CONNTRACK_PROC_COMPAT=y
575CONFIG_IP_NF_IPTABLES=y 599CONFIG_IP_NF_IPTABLES=y
@@ -595,8 +619,8 @@ CONFIG_IP_NF_MANGLE=y
595CONFIG_NF_CONNTRACK_IPV6=y 619CONFIG_NF_CONNTRACK_IPV6=y
596CONFIG_IP6_NF_IPTABLES=y 620CONFIG_IP6_NF_IPTABLES=y
597CONFIG_IP6_NF_MATCH_IPV6HEADER=y 621CONFIG_IP6_NF_MATCH_IPV6HEADER=y
598CONFIG_IP6_NF_FILTER=y
599CONFIG_IP6_NF_TARGET_LOG=y 622CONFIG_IP6_NF_TARGET_LOG=y
623CONFIG_IP6_NF_FILTER=y
600CONFIG_IP6_NF_TARGET_REJECT=y 624CONFIG_IP6_NF_TARGET_REJECT=y
601CONFIG_IP6_NF_MANGLE=y 625CONFIG_IP6_NF_MANGLE=y
602# CONFIG_IP_DCCP is not set 626# CONFIG_IP_DCCP is not set
@@ -604,6 +628,7 @@ CONFIG_IP6_NF_MANGLE=y
604# CONFIG_TIPC is not set 628# CONFIG_TIPC is not set
605# CONFIG_ATM is not set 629# CONFIG_ATM is not set
606# CONFIG_BRIDGE is not set 630# CONFIG_BRIDGE is not set
631# CONFIG_NET_DSA is not set
607# CONFIG_VLAN_8021Q is not set 632# CONFIG_VLAN_8021Q is not set
608# CONFIG_DECNET is not set 633# CONFIG_DECNET is not set
609CONFIG_LLC=y 634CONFIG_LLC=y
@@ -623,6 +648,7 @@ CONFIG_NET_SCHED=y
623# CONFIG_NET_SCH_HTB is not set 648# CONFIG_NET_SCH_HTB is not set
624# CONFIG_NET_SCH_HFSC is not set 649# CONFIG_NET_SCH_HFSC is not set
625# CONFIG_NET_SCH_PRIO is not set 650# CONFIG_NET_SCH_PRIO is not set
651# CONFIG_NET_SCH_MULTIQ is not set
626# CONFIG_NET_SCH_RED is not set 652# CONFIG_NET_SCH_RED is not set
627# CONFIG_NET_SCH_SFQ is not set 653# CONFIG_NET_SCH_SFQ is not set
628# CONFIG_NET_SCH_TEQL is not set 654# CONFIG_NET_SCH_TEQL is not set
@@ -630,6 +656,7 @@ CONFIG_NET_SCHED=y
630# CONFIG_NET_SCH_GRED is not set 656# CONFIG_NET_SCH_GRED is not set
631# CONFIG_NET_SCH_DSMARK is not set 657# CONFIG_NET_SCH_DSMARK is not set
632# CONFIG_NET_SCH_NETEM is not set 658# CONFIG_NET_SCH_NETEM is not set
659# CONFIG_NET_SCH_DRR is not set
633# CONFIG_NET_SCH_INGRESS is not set 660# CONFIG_NET_SCH_INGRESS is not set
634 661
635# 662#
@@ -644,6 +671,7 @@ CONFIG_NET_CLS=y
644# CONFIG_NET_CLS_RSVP is not set 671# CONFIG_NET_CLS_RSVP is not set
645# CONFIG_NET_CLS_RSVP6 is not set 672# CONFIG_NET_CLS_RSVP6 is not set
646# CONFIG_NET_CLS_FLOW is not set 673# CONFIG_NET_CLS_FLOW is not set
674# CONFIG_NET_CLS_CGROUP is not set
647CONFIG_NET_EMATCH=y 675CONFIG_NET_EMATCH=y
648CONFIG_NET_EMATCH_STACK=32 676CONFIG_NET_EMATCH_STACK=32
649# CONFIG_NET_EMATCH_CMP is not set 677# CONFIG_NET_EMATCH_CMP is not set
@@ -659,7 +687,9 @@ CONFIG_NET_CLS_ACT=y
659# CONFIG_NET_ACT_NAT is not set 687# CONFIG_NET_ACT_NAT is not set
660# CONFIG_NET_ACT_PEDIT is not set 688# CONFIG_NET_ACT_PEDIT is not set
661# CONFIG_NET_ACT_SIMP is not set 689# CONFIG_NET_ACT_SIMP is not set
690# CONFIG_NET_ACT_SKBEDIT is not set
662CONFIG_NET_SCH_FIFO=y 691CONFIG_NET_SCH_FIFO=y
692# CONFIG_DCB is not set
663 693
664# 694#
665# Network testing 695# Network testing
@@ -676,29 +706,33 @@ CONFIG_HAMRADIO=y
676# CONFIG_IRDA is not set 706# CONFIG_IRDA is not set
677# CONFIG_BT is not set 707# CONFIG_BT is not set
678# CONFIG_AF_RXRPC is not set 708# CONFIG_AF_RXRPC is not set
709# CONFIG_PHONET is not set
679CONFIG_FIB_RULES=y 710CONFIG_FIB_RULES=y
680 711CONFIG_WIRELESS=y
681#
682# Wireless
683#
684CONFIG_CFG80211=y 712CONFIG_CFG80211=y
713# CONFIG_CFG80211_REG_DEBUG is not set
685CONFIG_NL80211=y 714CONFIG_NL80211=y
715CONFIG_WIRELESS_OLD_REGULATORY=y
686CONFIG_WIRELESS_EXT=y 716CONFIG_WIRELESS_EXT=y
687CONFIG_WIRELESS_EXT_SYSFS=y 717CONFIG_WIRELESS_EXT_SYSFS=y
718# CONFIG_LIB80211 is not set
688CONFIG_MAC80211=y 719CONFIG_MAC80211=y
689 720
690# 721#
691# Rate control algorithm selection 722# Rate control algorithm selection
692# 723#
693CONFIG_MAC80211_RC_PID=y 724CONFIG_MAC80211_RC_MINSTREL=y
694CONFIG_MAC80211_RC_DEFAULT_PID=y 725# CONFIG_MAC80211_RC_DEFAULT_PID is not set
695CONFIG_MAC80211_RC_DEFAULT="pid" 726CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
727CONFIG_MAC80211_RC_DEFAULT="minstrel"
696# CONFIG_MAC80211_MESH is not set 728# CONFIG_MAC80211_MESH is not set
697CONFIG_MAC80211_LEDS=y 729CONFIG_MAC80211_LEDS=y
698# CONFIG_MAC80211_DEBUGFS is not set 730# CONFIG_MAC80211_DEBUGFS is not set
699# CONFIG_MAC80211_DEBUG_MENU is not set 731# CONFIG_MAC80211_DEBUG_MENU is not set
700# CONFIG_IEEE80211 is not set 732# CONFIG_WIMAX is not set
701# CONFIG_RFKILL is not set 733CONFIG_RFKILL=y
734# CONFIG_RFKILL_INPUT is not set
735CONFIG_RFKILL_LEDS=y
702# CONFIG_NET_9P is not set 736# CONFIG_NET_9P is not set
703 737
704# 738#
@@ -722,7 +756,7 @@ CONFIG_PROC_EVENTS=y
722# CONFIG_MTD is not set 756# CONFIG_MTD is not set
723# CONFIG_PARPORT is not set 757# CONFIG_PARPORT is not set
724CONFIG_PNP=y 758CONFIG_PNP=y
725# CONFIG_PNP_DEBUG is not set 759CONFIG_PNP_DEBUG_MESSAGES=y
726 760
727# 761#
728# Protocols 762# Protocols
@@ -750,20 +784,19 @@ CONFIG_BLK_DEV_RAM_SIZE=16384
750CONFIG_MISC_DEVICES=y 784CONFIG_MISC_DEVICES=y
751# CONFIG_IBM_ASM is not set 785# CONFIG_IBM_ASM is not set
752# CONFIG_PHANTOM is not set 786# CONFIG_PHANTOM is not set
753# CONFIG_EEPROM_93CX6 is not set
754# CONFIG_SGI_IOC4 is not set 787# CONFIG_SGI_IOC4 is not set
755# CONFIG_TIFM_CORE is not set 788# CONFIG_TIFM_CORE is not set
756# CONFIG_ACER_WMI is not set 789# CONFIG_ICS932S401 is not set
757# CONFIG_ASUS_LAPTOP is not set
758# CONFIG_FUJITSU_LAPTOP is not set
759# CONFIG_TC1100_WMI is not set
760# CONFIG_MSI_LAPTOP is not set
761# CONFIG_COMPAL_LAPTOP is not set
762# CONFIG_SONY_LAPTOP is not set
763# CONFIG_THINKPAD_ACPI is not set
764# CONFIG_INTEL_MENLOW is not set
765# CONFIG_ENCLOSURE_SERVICES is not set 790# CONFIG_ENCLOSURE_SERVICES is not set
766# CONFIG_HP_ILO is not set 791# CONFIG_HP_ILO is not set
792# CONFIG_C2PORT is not set
793
794#
795# EEPROM support
796#
797# CONFIG_EEPROM_AT24 is not set
798# CONFIG_EEPROM_LEGACY is not set
799# CONFIG_EEPROM_93CX6 is not set
767CONFIG_HAVE_IDE=y 800CONFIG_HAVE_IDE=y
768# CONFIG_IDE is not set 801# CONFIG_IDE is not set
769 802
@@ -802,7 +835,7 @@ CONFIG_SCSI_WAIT_SCAN=m
802# 835#
803CONFIG_SCSI_SPI_ATTRS=y 836CONFIG_SCSI_SPI_ATTRS=y
804# CONFIG_SCSI_FC_ATTRS is not set 837# CONFIG_SCSI_FC_ATTRS is not set
805CONFIG_SCSI_ISCSI_ATTRS=y 838# CONFIG_SCSI_ISCSI_ATTRS is not set
806# CONFIG_SCSI_SAS_ATTRS is not set 839# CONFIG_SCSI_SAS_ATTRS is not set
807# CONFIG_SCSI_SAS_LIBSAS is not set 840# CONFIG_SCSI_SAS_LIBSAS is not set
808# CONFIG_SCSI_SRP_ATTRS is not set 841# CONFIG_SCSI_SRP_ATTRS is not set
@@ -875,6 +908,7 @@ CONFIG_PATA_OLDPIIX=y
875CONFIG_PATA_SCH=y 908CONFIG_PATA_SCH=y
876CONFIG_MD=y 909CONFIG_MD=y
877CONFIG_BLK_DEV_MD=y 910CONFIG_BLK_DEV_MD=y
911CONFIG_MD_AUTODETECT=y
878# CONFIG_MD_LINEAR is not set 912# CONFIG_MD_LINEAR is not set
879# CONFIG_MD_RAID0 is not set 913# CONFIG_MD_RAID0 is not set
880# CONFIG_MD_RAID1 is not set 914# CONFIG_MD_RAID1 is not set
@@ -930,6 +964,9 @@ CONFIG_PHYLIB=y
930# CONFIG_BROADCOM_PHY is not set 964# CONFIG_BROADCOM_PHY is not set
931# CONFIG_ICPLUS_PHY is not set 965# CONFIG_ICPLUS_PHY is not set
932# CONFIG_REALTEK_PHY is not set 966# CONFIG_REALTEK_PHY is not set
967# CONFIG_NATIONAL_PHY is not set
968# CONFIG_STE10XP is not set
969# CONFIG_LSI_ET1011C_PHY is not set
933# CONFIG_FIXED_PHY is not set 970# CONFIG_FIXED_PHY is not set
934# CONFIG_MDIO_BITBANG is not set 971# CONFIG_MDIO_BITBANG is not set
935CONFIG_NET_ETHERNET=y 972CONFIG_NET_ETHERNET=y
@@ -953,6 +990,9 @@ CONFIG_NET_TULIP=y
953# CONFIG_IBM_NEW_EMAC_RGMII is not set 990# CONFIG_IBM_NEW_EMAC_RGMII is not set
954# CONFIG_IBM_NEW_EMAC_TAH is not set 991# CONFIG_IBM_NEW_EMAC_TAH is not set
955# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 992# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
993# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
994# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
995# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
956CONFIG_NET_PCI=y 996CONFIG_NET_PCI=y
957# CONFIG_PCNET32 is not set 997# CONFIG_PCNET32 is not set
958# CONFIG_AMD8111_ETH is not set 998# CONFIG_AMD8111_ETH is not set
@@ -960,7 +1000,6 @@ CONFIG_NET_PCI=y
960# CONFIG_B44 is not set 1000# CONFIG_B44 is not set
961CONFIG_FORCEDETH=y 1001CONFIG_FORCEDETH=y
962# CONFIG_FORCEDETH_NAPI is not set 1002# CONFIG_FORCEDETH_NAPI is not set
963# CONFIG_EEPRO100 is not set
964CONFIG_E100=y 1003CONFIG_E100=y
965# CONFIG_FEALNX is not set 1004# CONFIG_FEALNX is not set
966# CONFIG_NATSEMI is not set 1005# CONFIG_NATSEMI is not set
@@ -974,15 +1013,16 @@ CONFIG_8139TOO=y
974# CONFIG_R6040 is not set 1013# CONFIG_R6040 is not set
975# CONFIG_SIS900 is not set 1014# CONFIG_SIS900 is not set
976# CONFIG_EPIC100 is not set 1015# CONFIG_EPIC100 is not set
1016# CONFIG_SMSC9420 is not set
977# CONFIG_SUNDANCE is not set 1017# CONFIG_SUNDANCE is not set
978# CONFIG_TLAN is not set 1018# CONFIG_TLAN is not set
979# CONFIG_VIA_RHINE is not set 1019# CONFIG_VIA_RHINE is not set
980# CONFIG_SC92031 is not set 1020# CONFIG_SC92031 is not set
1021# CONFIG_ATL2 is not set
981CONFIG_NETDEV_1000=y 1022CONFIG_NETDEV_1000=y
982# CONFIG_ACENIC is not set 1023# CONFIG_ACENIC is not set
983# CONFIG_DL2K is not set 1024# CONFIG_DL2K is not set
984CONFIG_E1000=y 1025CONFIG_E1000=y
985# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
986CONFIG_E1000E=y 1026CONFIG_E1000E=y
987# CONFIG_IP1000 is not set 1027# CONFIG_IP1000 is not set
988# CONFIG_IGB is not set 1028# CONFIG_IGB is not set
@@ -1000,18 +1040,23 @@ CONFIG_BNX2=y
1000# CONFIG_QLA3XXX is not set 1040# CONFIG_QLA3XXX is not set
1001# CONFIG_ATL1 is not set 1041# CONFIG_ATL1 is not set
1002# CONFIG_ATL1E is not set 1042# CONFIG_ATL1E is not set
1043# CONFIG_JME is not set
1003CONFIG_NETDEV_10000=y 1044CONFIG_NETDEV_10000=y
1004# CONFIG_CHELSIO_T1 is not set 1045# CONFIG_CHELSIO_T1 is not set
1046CONFIG_CHELSIO_T3_DEPENDS=y
1005# CONFIG_CHELSIO_T3 is not set 1047# CONFIG_CHELSIO_T3 is not set
1048# CONFIG_ENIC is not set
1006# CONFIG_IXGBE is not set 1049# CONFIG_IXGBE is not set
1007# CONFIG_IXGB is not set 1050# CONFIG_IXGB is not set
1008# CONFIG_S2IO is not set 1051# CONFIG_S2IO is not set
1009# CONFIG_MYRI10GE is not set 1052# CONFIG_MYRI10GE is not set
1010# CONFIG_NETXEN_NIC is not set 1053# CONFIG_NETXEN_NIC is not set
1011# CONFIG_NIU is not set 1054# CONFIG_NIU is not set
1055# CONFIG_MLX4_EN is not set
1012# CONFIG_MLX4_CORE is not set 1056# CONFIG_MLX4_CORE is not set
1013# CONFIG_TEHUTI is not set 1057# CONFIG_TEHUTI is not set
1014# CONFIG_BNX2X is not set 1058# CONFIG_BNX2X is not set
1059# CONFIG_QLGE is not set
1015# CONFIG_SFC is not set 1060# CONFIG_SFC is not set
1016CONFIG_TR=y 1061CONFIG_TR=y
1017# CONFIG_IBMOL is not set 1062# CONFIG_IBMOL is not set
@@ -1025,9 +1070,8 @@ CONFIG_TR=y
1025# CONFIG_WLAN_PRE80211 is not set 1070# CONFIG_WLAN_PRE80211 is not set
1026CONFIG_WLAN_80211=y 1071CONFIG_WLAN_80211=y
1027# CONFIG_PCMCIA_RAYCS is not set 1072# CONFIG_PCMCIA_RAYCS is not set
1028# CONFIG_IPW2100 is not set
1029# CONFIG_IPW2200 is not set
1030# CONFIG_LIBERTAS is not set 1073# CONFIG_LIBERTAS is not set
1074# CONFIG_LIBERTAS_THINFIRM is not set
1031# CONFIG_AIRO is not set 1075# CONFIG_AIRO is not set
1032# CONFIG_HERMES is not set 1076# CONFIG_HERMES is not set
1033# CONFIG_ATMEL is not set 1077# CONFIG_ATMEL is not set
@@ -1044,6 +1088,8 @@ CONFIG_WLAN_80211=y
1044CONFIG_ATH5K=y 1088CONFIG_ATH5K=y
1045# CONFIG_ATH5K_DEBUG is not set 1089# CONFIG_ATH5K_DEBUG is not set
1046# CONFIG_ATH9K is not set 1090# CONFIG_ATH9K is not set
1091# CONFIG_IPW2100 is not set
1092# CONFIG_IPW2200 is not set
1047# CONFIG_IWLCORE is not set 1093# CONFIG_IWLCORE is not set
1048# CONFIG_IWLWIFI_LEDS is not set 1094# CONFIG_IWLWIFI_LEDS is not set
1049# CONFIG_IWLAGN is not set 1095# CONFIG_IWLAGN is not set
@@ -1055,6 +1101,10 @@ CONFIG_ATH5K=y
1055# CONFIG_RT2X00 is not set 1101# CONFIG_RT2X00 is not set
1056 1102
1057# 1103#
1104# Enable WiMAX (Networking options) to see the WiMAX drivers
1105#
1106
1107#
1058# USB Network Adapters 1108# USB Network Adapters
1059# 1109#
1060# CONFIG_USB_CATC is not set 1110# CONFIG_USB_CATC is not set
@@ -1062,6 +1112,7 @@ CONFIG_ATH5K=y
1062# CONFIG_USB_PEGASUS is not set 1112# CONFIG_USB_PEGASUS is not set
1063# CONFIG_USB_RTL8150 is not set 1113# CONFIG_USB_RTL8150 is not set
1064# CONFIG_USB_USBNET is not set 1114# CONFIG_USB_USBNET is not set
1115# CONFIG_USB_HSO is not set
1065CONFIG_NET_PCMCIA=y 1116CONFIG_NET_PCMCIA=y
1066# CONFIG_PCMCIA_3C589 is not set 1117# CONFIG_PCMCIA_3C589 is not set
1067# CONFIG_PCMCIA_3C574 is not set 1118# CONFIG_PCMCIA_3C574 is not set
@@ -1123,6 +1174,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y
1123CONFIG_MOUSE_PS2_SYNAPTICS=y 1174CONFIG_MOUSE_PS2_SYNAPTICS=y
1124CONFIG_MOUSE_PS2_LIFEBOOK=y 1175CONFIG_MOUSE_PS2_LIFEBOOK=y
1125CONFIG_MOUSE_PS2_TRACKPOINT=y 1176CONFIG_MOUSE_PS2_TRACKPOINT=y
1177# CONFIG_MOUSE_PS2_ELANTECH is not set
1126# CONFIG_MOUSE_PS2_TOUCHKIT is not set 1178# CONFIG_MOUSE_PS2_TOUCHKIT is not set
1127# CONFIG_MOUSE_SERIAL is not set 1179# CONFIG_MOUSE_SERIAL is not set
1128# CONFIG_MOUSE_APPLETOUCH is not set 1180# CONFIG_MOUSE_APPLETOUCH is not set
@@ -1160,15 +1212,16 @@ CONFIG_INPUT_TOUCHSCREEN=y
1160# CONFIG_TOUCHSCREEN_FUJITSU is not set 1212# CONFIG_TOUCHSCREEN_FUJITSU is not set
1161# CONFIG_TOUCHSCREEN_GUNZE is not set 1213# CONFIG_TOUCHSCREEN_GUNZE is not set
1162# CONFIG_TOUCHSCREEN_ELO is not set 1214# CONFIG_TOUCHSCREEN_ELO is not set
1215# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
1163# CONFIG_TOUCHSCREEN_MTOUCH is not set 1216# CONFIG_TOUCHSCREEN_MTOUCH is not set
1164# CONFIG_TOUCHSCREEN_INEXIO is not set 1217# CONFIG_TOUCHSCREEN_INEXIO is not set
1165# CONFIG_TOUCHSCREEN_MK712 is not set 1218# CONFIG_TOUCHSCREEN_MK712 is not set
1166# CONFIG_TOUCHSCREEN_PENMOUNT is not set 1219# CONFIG_TOUCHSCREEN_PENMOUNT is not set
1167# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 1220# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
1168# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 1221# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
1169# CONFIG_TOUCHSCREEN_UCB1400 is not set
1170# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set 1222# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
1171# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set 1223# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
1224# CONFIG_TOUCHSCREEN_TSC2007 is not set
1172CONFIG_INPUT_MISC=y 1225CONFIG_INPUT_MISC=y
1173# CONFIG_INPUT_PCSPKR is not set 1226# CONFIG_INPUT_PCSPKR is not set
1174# CONFIG_INPUT_APANEL is not set 1227# CONFIG_INPUT_APANEL is not set
@@ -1179,6 +1232,7 @@ CONFIG_INPUT_MISC=y
1179# CONFIG_INPUT_KEYSPAN_REMOTE is not set 1232# CONFIG_INPUT_KEYSPAN_REMOTE is not set
1180# CONFIG_INPUT_POWERMATE is not set 1233# CONFIG_INPUT_POWERMATE is not set
1181# CONFIG_INPUT_YEALINK is not set 1234# CONFIG_INPUT_YEALINK is not set
1235# CONFIG_INPUT_CM109 is not set
1182# CONFIG_INPUT_UINPUT is not set 1236# CONFIG_INPUT_UINPUT is not set
1183 1237
1184# 1238#
@@ -1245,6 +1299,7 @@ CONFIG_SERIAL_CORE=y
1245CONFIG_SERIAL_CORE_CONSOLE=y 1299CONFIG_SERIAL_CORE_CONSOLE=y
1246# CONFIG_SERIAL_JSM is not set 1300# CONFIG_SERIAL_JSM is not set
1247CONFIG_UNIX98_PTYS=y 1301CONFIG_UNIX98_PTYS=y
1302# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1248# CONFIG_LEGACY_PTYS is not set 1303# CONFIG_LEGACY_PTYS is not set
1249# CONFIG_IPMI_HANDLER is not set 1304# CONFIG_IPMI_HANDLER is not set
1250CONFIG_HW_RANDOM=y 1305CONFIG_HW_RANDOM=y
@@ -1279,6 +1334,7 @@ CONFIG_I2C=y
1279CONFIG_I2C_BOARDINFO=y 1334CONFIG_I2C_BOARDINFO=y
1280# CONFIG_I2C_CHARDEV is not set 1335# CONFIG_I2C_CHARDEV is not set
1281CONFIG_I2C_HELPER_AUTO=y 1336CONFIG_I2C_HELPER_AUTO=y
1337CONFIG_I2C_ALGOBIT=y
1282 1338
1283# 1339#
1284# I2C Hardware Bus support 1340# I2C Hardware Bus support
@@ -1331,8 +1387,6 @@ CONFIG_I2C_I801=y
1331# Miscellaneous I2C Chip support 1387# Miscellaneous I2C Chip support
1332# 1388#
1333# CONFIG_DS1682 is not set 1389# CONFIG_DS1682 is not set
1334# CONFIG_EEPROM_AT24 is not set
1335# CONFIG_EEPROM_LEGACY is not set
1336# CONFIG_SENSORS_PCF8574 is not set 1390# CONFIG_SENSORS_PCF8574 is not set
1337# CONFIG_PCF8575 is not set 1391# CONFIG_PCF8575 is not set
1338# CONFIG_SENSORS_PCA9539 is not set 1392# CONFIG_SENSORS_PCA9539 is not set
@@ -1351,8 +1405,78 @@ CONFIG_POWER_SUPPLY=y
1351# CONFIG_POWER_SUPPLY_DEBUG is not set 1405# CONFIG_POWER_SUPPLY_DEBUG is not set
1352# CONFIG_PDA_POWER is not set 1406# CONFIG_PDA_POWER is not set
1353# CONFIG_BATTERY_DS2760 is not set 1407# CONFIG_BATTERY_DS2760 is not set
1354# CONFIG_HWMON is not set 1408# CONFIG_BATTERY_BQ27x00 is not set
1409CONFIG_HWMON=y
1410# CONFIG_HWMON_VID is not set
1411# CONFIG_SENSORS_ABITUGURU is not set
1412# CONFIG_SENSORS_ABITUGURU3 is not set
1413# CONFIG_SENSORS_AD7414 is not set
1414# CONFIG_SENSORS_AD7418 is not set
1415# CONFIG_SENSORS_ADM1021 is not set
1416# CONFIG_SENSORS_ADM1025 is not set
1417# CONFIG_SENSORS_ADM1026 is not set
1418# CONFIG_SENSORS_ADM1029 is not set
1419# CONFIG_SENSORS_ADM1031 is not set
1420# CONFIG_SENSORS_ADM9240 is not set
1421# CONFIG_SENSORS_ADT7462 is not set
1422# CONFIG_SENSORS_ADT7470 is not set
1423# CONFIG_SENSORS_ADT7473 is not set
1424# CONFIG_SENSORS_ADT7475 is not set
1425# CONFIG_SENSORS_K8TEMP is not set
1426# CONFIG_SENSORS_ASB100 is not set
1427# CONFIG_SENSORS_ATXP1 is not set
1428# CONFIG_SENSORS_DS1621 is not set
1429# CONFIG_SENSORS_I5K_AMB is not set
1430# CONFIG_SENSORS_F71805F is not set
1431# CONFIG_SENSORS_F71882FG is not set
1432# CONFIG_SENSORS_F75375S is not set
1433# CONFIG_SENSORS_FSCHER is not set
1434# CONFIG_SENSORS_FSCPOS is not set
1435# CONFIG_SENSORS_FSCHMD is not set
1436# CONFIG_SENSORS_GL518SM is not set
1437# CONFIG_SENSORS_GL520SM is not set
1438# CONFIG_SENSORS_CORETEMP is not set
1439# CONFIG_SENSORS_IT87 is not set
1440# CONFIG_SENSORS_LM63 is not set
1441# CONFIG_SENSORS_LM75 is not set
1442# CONFIG_SENSORS_LM77 is not set
1443# CONFIG_SENSORS_LM78 is not set
1444# CONFIG_SENSORS_LM80 is not set
1445# CONFIG_SENSORS_LM83 is not set
1446# CONFIG_SENSORS_LM85 is not set
1447# CONFIG_SENSORS_LM87 is not set
1448# CONFIG_SENSORS_LM90 is not set
1449# CONFIG_SENSORS_LM92 is not set
1450# CONFIG_SENSORS_LM93 is not set
1451# CONFIG_SENSORS_LTC4245 is not set
1452# CONFIG_SENSORS_MAX1619 is not set
1453# CONFIG_SENSORS_MAX6650 is not set
1454# CONFIG_SENSORS_PC87360 is not set
1455# CONFIG_SENSORS_PC87427 is not set
1456# CONFIG_SENSORS_SIS5595 is not set
1457# CONFIG_SENSORS_DME1737 is not set
1458# CONFIG_SENSORS_SMSC47M1 is not set
1459# CONFIG_SENSORS_SMSC47M192 is not set
1460# CONFIG_SENSORS_SMSC47B397 is not set
1461# CONFIG_SENSORS_ADS7828 is not set
1462# CONFIG_SENSORS_THMC50 is not set
1463# CONFIG_SENSORS_VIA686A is not set
1464# CONFIG_SENSORS_VT1211 is not set
1465# CONFIG_SENSORS_VT8231 is not set
1466# CONFIG_SENSORS_W83781D is not set
1467# CONFIG_SENSORS_W83791D is not set
1468# CONFIG_SENSORS_W83792D is not set
1469# CONFIG_SENSORS_W83793 is not set
1470# CONFIG_SENSORS_W83L785TS is not set
1471# CONFIG_SENSORS_W83L786NG is not set
1472# CONFIG_SENSORS_W83627HF is not set
1473# CONFIG_SENSORS_W83627EHF is not set
1474# CONFIG_SENSORS_HDAPS is not set
1475# CONFIG_SENSORS_LIS3LV02D is not set
1476# CONFIG_SENSORS_APPLESMC is not set
1477# CONFIG_HWMON_DEBUG_CHIP is not set
1355CONFIG_THERMAL=y 1478CONFIG_THERMAL=y
1479# CONFIG_THERMAL_HWMON is not set
1356CONFIG_WATCHDOG=y 1480CONFIG_WATCHDOG=y
1357# CONFIG_WATCHDOG_NOWAYOUT is not set 1481# CONFIG_WATCHDOG_NOWAYOUT is not set
1358 1482
@@ -1372,6 +1496,7 @@ CONFIG_WATCHDOG=y
1372# CONFIG_I6300ESB_WDT is not set 1496# CONFIG_I6300ESB_WDT is not set
1373# CONFIG_ITCO_WDT is not set 1497# CONFIG_ITCO_WDT is not set
1374# CONFIG_IT8712F_WDT is not set 1498# CONFIG_IT8712F_WDT is not set
1499# CONFIG_IT87_WDT is not set
1375# CONFIG_HP_WATCHDOG is not set 1500# CONFIG_HP_WATCHDOG is not set
1376# CONFIG_SC1200_WDT is not set 1501# CONFIG_SC1200_WDT is not set
1377# CONFIG_PC87413_WDT is not set 1502# CONFIG_PC87413_WDT is not set
@@ -1379,9 +1504,11 @@ CONFIG_WATCHDOG=y
1379# CONFIG_SBC8360_WDT is not set 1504# CONFIG_SBC8360_WDT is not set
1380# CONFIG_SBC7240_WDT is not set 1505# CONFIG_SBC7240_WDT is not set
1381# CONFIG_CPU5_WDT is not set 1506# CONFIG_CPU5_WDT is not set
1507# CONFIG_SMSC_SCH311X_WDT is not set
1382# CONFIG_SMSC37B787_WDT is not set 1508# CONFIG_SMSC37B787_WDT is not set
1383# CONFIG_W83627HF_WDT is not set 1509# CONFIG_W83627HF_WDT is not set
1384# CONFIG_W83697HF_WDT is not set 1510# CONFIG_W83697HF_WDT is not set
1511# CONFIG_W83697UG_WDT is not set
1385# CONFIG_W83877F_WDT is not set 1512# CONFIG_W83877F_WDT is not set
1386# CONFIG_W83977F_WDT is not set 1513# CONFIG_W83977F_WDT is not set
1387# CONFIG_MACHZ_WDT is not set 1514# CONFIG_MACHZ_WDT is not set
@@ -1397,11 +1524,11 @@ CONFIG_WATCHDOG=y
1397# USB-based Watchdog Cards 1524# USB-based Watchdog Cards
1398# 1525#
1399# CONFIG_USBPCWATCHDOG is not set 1526# CONFIG_USBPCWATCHDOG is not set
1527CONFIG_SSB_POSSIBLE=y
1400 1528
1401# 1529#
1402# Sonics Silicon Backplane 1530# Sonics Silicon Backplane
1403# 1531#
1404CONFIG_SSB_POSSIBLE=y
1405# CONFIG_SSB is not set 1532# CONFIG_SSB is not set
1406 1533
1407# 1534#
@@ -1410,7 +1537,13 @@ CONFIG_SSB_POSSIBLE=y
1410# CONFIG_MFD_CORE is not set 1537# CONFIG_MFD_CORE is not set
1411# CONFIG_MFD_SM501 is not set 1538# CONFIG_MFD_SM501 is not set
1412# CONFIG_HTC_PASIC3 is not set 1539# CONFIG_HTC_PASIC3 is not set
1540# CONFIG_TWL4030_CORE is not set
1413# CONFIG_MFD_TMIO is not set 1541# CONFIG_MFD_TMIO is not set
1542# CONFIG_PMIC_DA903X is not set
1543# CONFIG_MFD_WM8400 is not set
1544# CONFIG_MFD_WM8350_I2C is not set
1545# CONFIG_MFD_PCF50633 is not set
1546# CONFIG_REGULATOR is not set
1414 1547
1415# 1548#
1416# Multimedia devices 1549# Multimedia devices
@@ -1450,6 +1583,7 @@ CONFIG_DRM=y
1450# CONFIG_DRM_I810 is not set 1583# CONFIG_DRM_I810 is not set
1451# CONFIG_DRM_I830 is not set 1584# CONFIG_DRM_I830 is not set
1452CONFIG_DRM_I915=y 1585CONFIG_DRM_I915=y
1586# CONFIG_DRM_I915_KMS is not set
1453# CONFIG_DRM_MGA is not set 1587# CONFIG_DRM_MGA is not set
1454# CONFIG_DRM_SIS is not set 1588# CONFIG_DRM_SIS is not set
1455# CONFIG_DRM_VIA is not set 1589# CONFIG_DRM_VIA is not set
@@ -1459,6 +1593,7 @@ CONFIG_DRM_I915=y
1459CONFIG_FB=y 1593CONFIG_FB=y
1460# CONFIG_FIRMWARE_EDID is not set 1594# CONFIG_FIRMWARE_EDID is not set
1461# CONFIG_FB_DDC is not set 1595# CONFIG_FB_DDC is not set
1596# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1462CONFIG_FB_CFB_FILLRECT=y 1597CONFIG_FB_CFB_FILLRECT=y
1463CONFIG_FB_CFB_COPYAREA=y 1598CONFIG_FB_CFB_COPYAREA=y
1464CONFIG_FB_CFB_IMAGEBLIT=y 1599CONFIG_FB_CFB_IMAGEBLIT=y
@@ -1487,7 +1622,6 @@ CONFIG_FB_TILEBLITTING=y
1487# CONFIG_FB_UVESA is not set 1622# CONFIG_FB_UVESA is not set
1488# CONFIG_FB_VESA is not set 1623# CONFIG_FB_VESA is not set
1489CONFIG_FB_EFI=y 1624CONFIG_FB_EFI=y
1490# CONFIG_FB_IMAC is not set
1491# CONFIG_FB_N411 is not set 1625# CONFIG_FB_N411 is not set
1492# CONFIG_FB_HGA is not set 1626# CONFIG_FB_HGA is not set
1493# CONFIG_FB_S1D13XXX is not set 1627# CONFIG_FB_S1D13XXX is not set
@@ -1503,6 +1637,7 @@ CONFIG_FB_EFI=y
1503# CONFIG_FB_S3 is not set 1637# CONFIG_FB_S3 is not set
1504# CONFIG_FB_SAVAGE is not set 1638# CONFIG_FB_SAVAGE is not set
1505# CONFIG_FB_SIS is not set 1639# CONFIG_FB_SIS is not set
1640# CONFIG_FB_VIA is not set
1506# CONFIG_FB_NEOMAGIC is not set 1641# CONFIG_FB_NEOMAGIC is not set
1507# CONFIG_FB_KYRO is not set 1642# CONFIG_FB_KYRO is not set
1508# CONFIG_FB_3DFX is not set 1643# CONFIG_FB_3DFX is not set
@@ -1515,12 +1650,15 @@ CONFIG_FB_EFI=y
1515# CONFIG_FB_CARMINE is not set 1650# CONFIG_FB_CARMINE is not set
1516# CONFIG_FB_GEODE is not set 1651# CONFIG_FB_GEODE is not set
1517# CONFIG_FB_VIRTUAL is not set 1652# CONFIG_FB_VIRTUAL is not set
1653# CONFIG_FB_METRONOME is not set
1654# CONFIG_FB_MB862XX is not set
1518CONFIG_BACKLIGHT_LCD_SUPPORT=y 1655CONFIG_BACKLIGHT_LCD_SUPPORT=y
1519# CONFIG_LCD_CLASS_DEVICE is not set 1656# CONFIG_LCD_CLASS_DEVICE is not set
1520CONFIG_BACKLIGHT_CLASS_DEVICE=y 1657CONFIG_BACKLIGHT_CLASS_DEVICE=y
1521# CONFIG_BACKLIGHT_CORGI is not set 1658CONFIG_BACKLIGHT_GENERIC=y
1522# CONFIG_BACKLIGHT_PROGEAR is not set 1659# CONFIG_BACKLIGHT_PROGEAR is not set
1523# CONFIG_BACKLIGHT_MBP_NVIDIA is not set 1660# CONFIG_BACKLIGHT_MBP_NVIDIA is not set
1661# CONFIG_BACKLIGHT_SAHARA is not set
1524 1662
1525# 1663#
1526# Display device support 1664# Display device support
@@ -1540,10 +1678,12 @@ CONFIG_LOGO=y
1540# CONFIG_LOGO_LINUX_VGA16 is not set 1678# CONFIG_LOGO_LINUX_VGA16 is not set
1541CONFIG_LOGO_LINUX_CLUT224=y 1679CONFIG_LOGO_LINUX_CLUT224=y
1542CONFIG_SOUND=y 1680CONFIG_SOUND=y
1681CONFIG_SOUND_OSS_CORE=y
1543CONFIG_SND=y 1682CONFIG_SND=y
1544CONFIG_SND_TIMER=y 1683CONFIG_SND_TIMER=y
1545CONFIG_SND_PCM=y 1684CONFIG_SND_PCM=y
1546CONFIG_SND_HWDEP=y 1685CONFIG_SND_HWDEP=y
1686CONFIG_SND_JACK=y
1547CONFIG_SND_SEQUENCER=y 1687CONFIG_SND_SEQUENCER=y
1548CONFIG_SND_SEQ_DUMMY=y 1688CONFIG_SND_SEQ_DUMMY=y
1549CONFIG_SND_OSSEMUL=y 1689CONFIG_SND_OSSEMUL=y
@@ -1551,6 +1691,8 @@ CONFIG_SND_MIXER_OSS=y
1551CONFIG_SND_PCM_OSS=y 1691CONFIG_SND_PCM_OSS=y
1552CONFIG_SND_PCM_OSS_PLUGINS=y 1692CONFIG_SND_PCM_OSS_PLUGINS=y
1553CONFIG_SND_SEQUENCER_OSS=y 1693CONFIG_SND_SEQUENCER_OSS=y
1694CONFIG_SND_HRTIMER=y
1695CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
1554CONFIG_SND_DYNAMIC_MINORS=y 1696CONFIG_SND_DYNAMIC_MINORS=y
1555CONFIG_SND_SUPPORT_OLD_API=y 1697CONFIG_SND_SUPPORT_OLD_API=y
1556CONFIG_SND_VERBOSE_PROCFS=y 1698CONFIG_SND_VERBOSE_PROCFS=y
@@ -1605,11 +1747,16 @@ CONFIG_SND_PCI=y
1605# CONFIG_SND_FM801 is not set 1747# CONFIG_SND_FM801 is not set
1606CONFIG_SND_HDA_INTEL=y 1748CONFIG_SND_HDA_INTEL=y
1607CONFIG_SND_HDA_HWDEP=y 1749CONFIG_SND_HDA_HWDEP=y
1750# CONFIG_SND_HDA_RECONFIG is not set
1751# CONFIG_SND_HDA_INPUT_BEEP is not set
1608CONFIG_SND_HDA_CODEC_REALTEK=y 1752CONFIG_SND_HDA_CODEC_REALTEK=y
1609CONFIG_SND_HDA_CODEC_ANALOG=y 1753CONFIG_SND_HDA_CODEC_ANALOG=y
1610CONFIG_SND_HDA_CODEC_SIGMATEL=y 1754CONFIG_SND_HDA_CODEC_SIGMATEL=y
1611CONFIG_SND_HDA_CODEC_VIA=y 1755CONFIG_SND_HDA_CODEC_VIA=y
1612CONFIG_SND_HDA_CODEC_ATIHDMI=y 1756CONFIG_SND_HDA_CODEC_ATIHDMI=y
1757CONFIG_SND_HDA_CODEC_NVHDMI=y
1758CONFIG_SND_HDA_CODEC_INTELHDMI=y
1759CONFIG_SND_HDA_ELD=y
1613CONFIG_SND_HDA_CODEC_CONEXANT=y 1760CONFIG_SND_HDA_CODEC_CONEXANT=y
1614CONFIG_SND_HDA_CODEC_CMEDIA=y 1761CONFIG_SND_HDA_CODEC_CMEDIA=y
1615CONFIG_SND_HDA_CODEC_SI3054=y 1762CONFIG_SND_HDA_CODEC_SI3054=y
@@ -1643,6 +1790,7 @@ CONFIG_SND_USB=y
1643# CONFIG_SND_USB_AUDIO is not set 1790# CONFIG_SND_USB_AUDIO is not set
1644# CONFIG_SND_USB_USX2Y is not set 1791# CONFIG_SND_USB_USX2Y is not set
1645# CONFIG_SND_USB_CAIAQ is not set 1792# CONFIG_SND_USB_CAIAQ is not set
1793# CONFIG_SND_USB_US122L is not set
1646CONFIG_SND_PCMCIA=y 1794CONFIG_SND_PCMCIA=y
1647# CONFIG_SND_VXPOCKET is not set 1795# CONFIG_SND_VXPOCKET is not set
1648# CONFIG_SND_PDAUDIOCF is not set 1796# CONFIG_SND_PDAUDIOCF is not set
@@ -1657,15 +1805,37 @@ CONFIG_HIDRAW=y
1657# USB Input Devices 1805# USB Input Devices
1658# 1806#
1659CONFIG_USB_HID=y 1807CONFIG_USB_HID=y
1660CONFIG_USB_HIDINPUT_POWERBOOK=y
1661CONFIG_HID_FF=y
1662CONFIG_HID_PID=y 1808CONFIG_HID_PID=y
1809CONFIG_USB_HIDDEV=y
1810
1811#
1812# Special HID drivers
1813#
1814CONFIG_HID_COMPAT=y
1815CONFIG_HID_A4TECH=y
1816CONFIG_HID_APPLE=y
1817CONFIG_HID_BELKIN=y
1818CONFIG_HID_CHERRY=y
1819CONFIG_HID_CHICONY=y
1820CONFIG_HID_CYPRESS=y
1821CONFIG_HID_EZKEY=y
1822CONFIG_HID_GYRATION=y
1823CONFIG_HID_LOGITECH=y
1663CONFIG_LOGITECH_FF=y 1824CONFIG_LOGITECH_FF=y
1664# CONFIG_LOGIRUMBLEPAD2_FF is not set 1825# CONFIG_LOGIRUMBLEPAD2_FF is not set
1826CONFIG_HID_MICROSOFT=y
1827CONFIG_HID_MONTEREY=y
1828CONFIG_HID_NTRIG=y
1829CONFIG_HID_PANTHERLORD=y
1665CONFIG_PANTHERLORD_FF=y 1830CONFIG_PANTHERLORD_FF=y
1831CONFIG_HID_PETALYNX=y
1832CONFIG_HID_SAMSUNG=y
1833CONFIG_HID_SONY=y
1834CONFIG_HID_SUNPLUS=y
1835# CONFIG_GREENASIA_FF is not set
1836CONFIG_HID_TOPSEED=y
1666CONFIG_THRUSTMASTER_FF=y 1837CONFIG_THRUSTMASTER_FF=y
1667CONFIG_ZEROPLUS_FF=y 1838CONFIG_ZEROPLUS_FF=y
1668CONFIG_USB_HIDDEV=y
1669CONFIG_USB_SUPPORT=y 1839CONFIG_USB_SUPPORT=y
1670CONFIG_USB_ARCH_HAS_HCD=y 1840CONFIG_USB_ARCH_HAS_HCD=y
1671CONFIG_USB_ARCH_HAS_OHCI=y 1841CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1683,6 +1853,8 @@ CONFIG_USB_DEVICEFS=y
1683CONFIG_USB_SUSPEND=y 1853CONFIG_USB_SUSPEND=y
1684# CONFIG_USB_OTG is not set 1854# CONFIG_USB_OTG is not set
1685CONFIG_USB_MON=y 1855CONFIG_USB_MON=y
1856# CONFIG_USB_WUSB is not set
1857# CONFIG_USB_WUSB_CBAF is not set
1686 1858
1687# 1859#
1688# USB Host Controller Drivers 1860# USB Host Controller Drivers
@@ -1691,6 +1863,7 @@ CONFIG_USB_MON=y
1691CONFIG_USB_EHCI_HCD=y 1863CONFIG_USB_EHCI_HCD=y
1692# CONFIG_USB_EHCI_ROOT_HUB_TT is not set 1864# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1693# CONFIG_USB_EHCI_TT_NEWSCHED is not set 1865# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1866# CONFIG_USB_OXU210HP_HCD is not set
1694# CONFIG_USB_ISP116X_HCD is not set 1867# CONFIG_USB_ISP116X_HCD is not set
1695# CONFIG_USB_ISP1760_HCD is not set 1868# CONFIG_USB_ISP1760_HCD is not set
1696CONFIG_USB_OHCI_HCD=y 1869CONFIG_USB_OHCI_HCD=y
@@ -1700,6 +1873,8 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1700CONFIG_USB_UHCI_HCD=y 1873CONFIG_USB_UHCI_HCD=y
1701# CONFIG_USB_SL811_HCD is not set 1874# CONFIG_USB_SL811_HCD is not set
1702# CONFIG_USB_R8A66597_HCD is not set 1875# CONFIG_USB_R8A66597_HCD is not set
1876# CONFIG_USB_WHCI_HCD is not set
1877# CONFIG_USB_HWA_HCD is not set
1703 1878
1704# 1879#
1705# USB Device Class drivers 1880# USB Device Class drivers
@@ -1707,20 +1882,20 @@ CONFIG_USB_UHCI_HCD=y
1707# CONFIG_USB_ACM is not set 1882# CONFIG_USB_ACM is not set
1708CONFIG_USB_PRINTER=y 1883CONFIG_USB_PRINTER=y
1709# CONFIG_USB_WDM is not set 1884# CONFIG_USB_WDM is not set
1885# CONFIG_USB_TMC is not set
1710 1886
1711# 1887#
1712# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1888# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1713# 1889#
1714 1890
1715# 1891#
1716# may also be needed; see USB_STORAGE Help for more information 1892# see USB_STORAGE Help for more information
1717# 1893#
1718CONFIG_USB_STORAGE=y 1894CONFIG_USB_STORAGE=y
1719# CONFIG_USB_STORAGE_DEBUG is not set 1895# CONFIG_USB_STORAGE_DEBUG is not set
1720# CONFIG_USB_STORAGE_DATAFAB is not set 1896# CONFIG_USB_STORAGE_DATAFAB is not set
1721# CONFIG_USB_STORAGE_FREECOM is not set 1897# CONFIG_USB_STORAGE_FREECOM is not set
1722# CONFIG_USB_STORAGE_ISD200 is not set 1898# CONFIG_USB_STORAGE_ISD200 is not set
1723# CONFIG_USB_STORAGE_DPCM is not set
1724# CONFIG_USB_STORAGE_USBAT is not set 1899# CONFIG_USB_STORAGE_USBAT is not set
1725# CONFIG_USB_STORAGE_SDDR09 is not set 1900# CONFIG_USB_STORAGE_SDDR09 is not set
1726# CONFIG_USB_STORAGE_SDDR55 is not set 1901# CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1728,7 +1903,6 @@ CONFIG_USB_STORAGE=y
1728# CONFIG_USB_STORAGE_ALAUDA is not set 1903# CONFIG_USB_STORAGE_ALAUDA is not set
1729# CONFIG_USB_STORAGE_ONETOUCH is not set 1904# CONFIG_USB_STORAGE_ONETOUCH is not set
1730# CONFIG_USB_STORAGE_KARMA is not set 1905# CONFIG_USB_STORAGE_KARMA is not set
1731# CONFIG_USB_STORAGE_SIERRA is not set
1732# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set 1906# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1733CONFIG_USB_LIBUSUAL=y 1907CONFIG_USB_LIBUSUAL=y
1734 1908
@@ -1749,6 +1923,7 @@ CONFIG_USB_LIBUSUAL=y
1749# CONFIG_USB_EMI62 is not set 1923# CONFIG_USB_EMI62 is not set
1750# CONFIG_USB_EMI26 is not set 1924# CONFIG_USB_EMI26 is not set
1751# CONFIG_USB_ADUTUX is not set 1925# CONFIG_USB_ADUTUX is not set
1926# CONFIG_USB_SEVSEG is not set
1752# CONFIG_USB_RIO500 is not set 1927# CONFIG_USB_RIO500 is not set
1753# CONFIG_USB_LEGOTOWER is not set 1928# CONFIG_USB_LEGOTOWER is not set
1754# CONFIG_USB_LCD is not set 1929# CONFIG_USB_LCD is not set
@@ -1766,7 +1941,13 @@ CONFIG_USB_LIBUSUAL=y
1766# CONFIG_USB_IOWARRIOR is not set 1941# CONFIG_USB_IOWARRIOR is not set
1767# CONFIG_USB_TEST is not set 1942# CONFIG_USB_TEST is not set
1768# CONFIG_USB_ISIGHTFW is not set 1943# CONFIG_USB_ISIGHTFW is not set
1944# CONFIG_USB_VST is not set
1769# CONFIG_USB_GADGET is not set 1945# CONFIG_USB_GADGET is not set
1946
1947#
1948# OTG and related infrastructure
1949#
1950# CONFIG_UWB is not set
1770# CONFIG_MMC is not set 1951# CONFIG_MMC is not set
1771# CONFIG_MEMSTICK is not set 1952# CONFIG_MEMSTICK is not set
1772CONFIG_NEW_LEDS=y 1953CONFIG_NEW_LEDS=y
@@ -1775,6 +1956,7 @@ CONFIG_LEDS_CLASS=y
1775# 1956#
1776# LED drivers 1957# LED drivers
1777# 1958#
1959# CONFIG_LEDS_ALIX2 is not set
1778# CONFIG_LEDS_PCA9532 is not set 1960# CONFIG_LEDS_PCA9532 is not set
1779# CONFIG_LEDS_CLEVO_MAIL is not set 1961# CONFIG_LEDS_CLEVO_MAIL is not set
1780# CONFIG_LEDS_PCA955X is not set 1962# CONFIG_LEDS_PCA955X is not set
@@ -1785,6 +1967,7 @@ CONFIG_LEDS_CLASS=y
1785CONFIG_LEDS_TRIGGERS=y 1967CONFIG_LEDS_TRIGGERS=y
1786# CONFIG_LEDS_TRIGGER_TIMER is not set 1968# CONFIG_LEDS_TRIGGER_TIMER is not set
1787# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set 1969# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
1970# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
1788# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set 1971# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1789# CONFIG_ACCESSIBILITY is not set 1972# CONFIG_ACCESSIBILITY is not set
1790# CONFIG_INFINIBAND is not set 1973# CONFIG_INFINIBAND is not set
@@ -1824,6 +2007,7 @@ CONFIG_RTC_INTF_DEV=y
1824# CONFIG_RTC_DRV_M41T80 is not set 2007# CONFIG_RTC_DRV_M41T80 is not set
1825# CONFIG_RTC_DRV_S35390A is not set 2008# CONFIG_RTC_DRV_S35390A is not set
1826# CONFIG_RTC_DRV_FM3130 is not set 2009# CONFIG_RTC_DRV_FM3130 is not set
2010# CONFIG_RTC_DRV_RX8581 is not set
1827 2011
1828# 2012#
1829# SPI RTC drivers 2013# SPI RTC drivers
@@ -1833,12 +2017,15 @@ CONFIG_RTC_INTF_DEV=y
1833# Platform RTC drivers 2017# Platform RTC drivers
1834# 2018#
1835CONFIG_RTC_DRV_CMOS=y 2019CONFIG_RTC_DRV_CMOS=y
2020# CONFIG_RTC_DRV_DS1286 is not set
1836# CONFIG_RTC_DRV_DS1511 is not set 2021# CONFIG_RTC_DRV_DS1511 is not set
1837# CONFIG_RTC_DRV_DS1553 is not set 2022# CONFIG_RTC_DRV_DS1553 is not set
1838# CONFIG_RTC_DRV_DS1742 is not set 2023# CONFIG_RTC_DRV_DS1742 is not set
1839# CONFIG_RTC_DRV_STK17TA8 is not set 2024# CONFIG_RTC_DRV_STK17TA8 is not set
1840# CONFIG_RTC_DRV_M48T86 is not set 2025# CONFIG_RTC_DRV_M48T86 is not set
2026# CONFIG_RTC_DRV_M48T35 is not set
1841# CONFIG_RTC_DRV_M48T59 is not set 2027# CONFIG_RTC_DRV_M48T59 is not set
2028# CONFIG_RTC_DRV_BQ4802 is not set
1842# CONFIG_RTC_DRV_V3020 is not set 2029# CONFIG_RTC_DRV_V3020 is not set
1843 2030
1844# 2031#
@@ -1851,6 +2038,22 @@ CONFIG_DMADEVICES=y
1851# 2038#
1852# CONFIG_INTEL_IOATDMA is not set 2039# CONFIG_INTEL_IOATDMA is not set
1853# CONFIG_UIO is not set 2040# CONFIG_UIO is not set
2041# CONFIG_STAGING is not set
2042CONFIG_X86_PLATFORM_DEVICES=y
2043# CONFIG_ACER_WMI is not set
2044# CONFIG_ASUS_LAPTOP is not set
2045# CONFIG_FUJITSU_LAPTOP is not set
2046# CONFIG_TC1100_WMI is not set
2047# CONFIG_MSI_LAPTOP is not set
2048# CONFIG_PANASONIC_LAPTOP is not set
2049# CONFIG_COMPAL_LAPTOP is not set
2050# CONFIG_SONY_LAPTOP is not set
2051# CONFIG_THINKPAD_ACPI is not set
2052# CONFIG_INTEL_MENLOW is not set
2053CONFIG_EEEPC_LAPTOP=y
2054# CONFIG_ACPI_WMI is not set
2055# CONFIG_ACPI_ASUS is not set
2056# CONFIG_ACPI_TOSHIBA is not set
1854 2057
1855# 2058#
1856# Firmware Drivers 2059# Firmware Drivers
@@ -1861,8 +2064,7 @@ CONFIG_EFI_VARS=y
1861# CONFIG_DELL_RBU is not set 2064# CONFIG_DELL_RBU is not set
1862# CONFIG_DCDBAS is not set 2065# CONFIG_DCDBAS is not set
1863CONFIG_DMIID=y 2066CONFIG_DMIID=y
1864CONFIG_ISCSI_IBFT_FIND=y 2067# CONFIG_ISCSI_IBFT_FIND is not set
1865CONFIG_ISCSI_IBFT=y
1866 2068
1867# 2069#
1868# File systems 2070# File systems
@@ -1872,21 +2074,24 @@ CONFIG_EXT3_FS=y
1872CONFIG_EXT3_FS_XATTR=y 2074CONFIG_EXT3_FS_XATTR=y
1873CONFIG_EXT3_FS_POSIX_ACL=y 2075CONFIG_EXT3_FS_POSIX_ACL=y
1874CONFIG_EXT3_FS_SECURITY=y 2076CONFIG_EXT3_FS_SECURITY=y
1875# CONFIG_EXT4DEV_FS is not set 2077# CONFIG_EXT4_FS is not set
1876CONFIG_JBD=y 2078CONFIG_JBD=y
1877# CONFIG_JBD_DEBUG is not set 2079# CONFIG_JBD_DEBUG is not set
1878CONFIG_FS_MBCACHE=y 2080CONFIG_FS_MBCACHE=y
1879# CONFIG_REISERFS_FS is not set 2081# CONFIG_REISERFS_FS is not set
1880# CONFIG_JFS_FS is not set 2082# CONFIG_JFS_FS is not set
1881CONFIG_FS_POSIX_ACL=y 2083CONFIG_FS_POSIX_ACL=y
2084CONFIG_FILE_LOCKING=y
1882# CONFIG_XFS_FS is not set 2085# CONFIG_XFS_FS is not set
1883# CONFIG_OCFS2_FS is not set 2086# CONFIG_OCFS2_FS is not set
2087# CONFIG_BTRFS_FS is not set
1884CONFIG_DNOTIFY=y 2088CONFIG_DNOTIFY=y
1885CONFIG_INOTIFY=y 2089CONFIG_INOTIFY=y
1886CONFIG_INOTIFY_USER=y 2090CONFIG_INOTIFY_USER=y
1887CONFIG_QUOTA=y 2091CONFIG_QUOTA=y
1888CONFIG_QUOTA_NETLINK_INTERFACE=y 2092CONFIG_QUOTA_NETLINK_INTERFACE=y
1889# CONFIG_PRINT_QUOTA_WARNING is not set 2093# CONFIG_PRINT_QUOTA_WARNING is not set
2094CONFIG_QUOTA_TREE=y
1890# CONFIG_QFMT_V1 is not set 2095# CONFIG_QFMT_V1 is not set
1891CONFIG_QFMT_V2=y 2096CONFIG_QFMT_V2=y
1892CONFIG_QUOTACTL=y 2097CONFIG_QUOTACTL=y
@@ -1920,16 +2125,14 @@ CONFIG_PROC_FS=y
1920CONFIG_PROC_KCORE=y 2125CONFIG_PROC_KCORE=y
1921CONFIG_PROC_VMCORE=y 2126CONFIG_PROC_VMCORE=y
1922CONFIG_PROC_SYSCTL=y 2127CONFIG_PROC_SYSCTL=y
2128CONFIG_PROC_PAGE_MONITOR=y
1923CONFIG_SYSFS=y 2129CONFIG_SYSFS=y
1924CONFIG_TMPFS=y 2130CONFIG_TMPFS=y
1925CONFIG_TMPFS_POSIX_ACL=y 2131CONFIG_TMPFS_POSIX_ACL=y
1926CONFIG_HUGETLBFS=y 2132CONFIG_HUGETLBFS=y
1927CONFIG_HUGETLB_PAGE=y 2133CONFIG_HUGETLB_PAGE=y
1928# CONFIG_CONFIGFS_FS is not set 2134# CONFIG_CONFIGFS_FS is not set
1929 2135CONFIG_MISC_FILESYSTEMS=y
1930#
1931# Miscellaneous filesystems
1932#
1933# CONFIG_ADFS_FS is not set 2136# CONFIG_ADFS_FS is not set
1934# CONFIG_AFFS_FS is not set 2137# CONFIG_AFFS_FS is not set
1935# CONFIG_ECRYPT_FS is not set 2138# CONFIG_ECRYPT_FS is not set
@@ -1939,6 +2142,7 @@ CONFIG_HUGETLB_PAGE=y
1939# CONFIG_BFS_FS is not set 2142# CONFIG_BFS_FS is not set
1940# CONFIG_EFS_FS is not set 2143# CONFIG_EFS_FS is not set
1941# CONFIG_CRAMFS is not set 2144# CONFIG_CRAMFS is not set
2145# CONFIG_SQUASHFS is not set
1942# CONFIG_VXFS_FS is not set 2146# CONFIG_VXFS_FS is not set
1943# CONFIG_MINIX_FS is not set 2147# CONFIG_MINIX_FS is not set
1944# CONFIG_OMFS_FS is not set 2148# CONFIG_OMFS_FS is not set
@@ -1960,6 +2164,7 @@ CONFIG_NFS_ACL_SUPPORT=y
1960CONFIG_NFS_COMMON=y 2164CONFIG_NFS_COMMON=y
1961CONFIG_SUNRPC=y 2165CONFIG_SUNRPC=y
1962CONFIG_SUNRPC_GSS=y 2166CONFIG_SUNRPC_GSS=y
2167# CONFIG_SUNRPC_REGISTER_V4 is not set
1963CONFIG_RPCSEC_GSS_KRB5=y 2168CONFIG_RPCSEC_GSS_KRB5=y
1964# CONFIG_RPCSEC_GSS_SPKM3 is not set 2169# CONFIG_RPCSEC_GSS_SPKM3 is not set
1965# CONFIG_SMB_FS is not set 2170# CONFIG_SMB_FS is not set
@@ -2036,7 +2241,7 @@ CONFIG_NLS_UTF8=y
2036# 2241#
2037CONFIG_TRACE_IRQFLAGS_SUPPORT=y 2242CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2038CONFIG_PRINTK_TIME=y 2243CONFIG_PRINTK_TIME=y
2039CONFIG_ENABLE_WARN_DEPRECATED=y 2244# CONFIG_ENABLE_WARN_DEPRECATED is not set
2040CONFIG_ENABLE_MUST_CHECK=y 2245CONFIG_ENABLE_MUST_CHECK=y
2041CONFIG_FRAME_WARN=2048 2246CONFIG_FRAME_WARN=2048
2042CONFIG_MAGIC_SYSRQ=y 2247CONFIG_MAGIC_SYSRQ=y
@@ -2066,33 +2271,54 @@ CONFIG_TIMER_STATS=y
2066CONFIG_DEBUG_BUGVERBOSE=y 2271CONFIG_DEBUG_BUGVERBOSE=y
2067# CONFIG_DEBUG_INFO is not set 2272# CONFIG_DEBUG_INFO is not set
2068# CONFIG_DEBUG_VM is not set 2273# CONFIG_DEBUG_VM is not set
2274# CONFIG_DEBUG_VIRTUAL is not set
2069# CONFIG_DEBUG_WRITECOUNT is not set 2275# CONFIG_DEBUG_WRITECOUNT is not set
2070CONFIG_DEBUG_MEMORY_INIT=y 2276CONFIG_DEBUG_MEMORY_INIT=y
2071# CONFIG_DEBUG_LIST is not set 2277# CONFIG_DEBUG_LIST is not set
2072# CONFIG_DEBUG_SG is not set 2278# CONFIG_DEBUG_SG is not set
2279# CONFIG_DEBUG_NOTIFIERS is not set
2280CONFIG_ARCH_WANT_FRAME_POINTERS=y
2073CONFIG_FRAME_POINTER=y 2281CONFIG_FRAME_POINTER=y
2074# CONFIG_BOOT_PRINTK_DELAY is not set 2282# CONFIG_BOOT_PRINTK_DELAY is not set
2075# CONFIG_RCU_TORTURE_TEST is not set 2283# CONFIG_RCU_TORTURE_TEST is not set
2284# CONFIG_RCU_CPU_STALL_DETECTOR is not set
2076# CONFIG_KPROBES_SANITY_TEST is not set 2285# CONFIG_KPROBES_SANITY_TEST is not set
2077# CONFIG_BACKTRACE_SELF_TEST is not set 2286# CONFIG_BACKTRACE_SELF_TEST is not set
2287# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
2078# CONFIG_LKDTM is not set 2288# CONFIG_LKDTM is not set
2079# CONFIG_FAULT_INJECTION is not set 2289# CONFIG_FAULT_INJECTION is not set
2080# CONFIG_LATENCYTOP is not set 2290# CONFIG_LATENCYTOP is not set
2081CONFIG_SYSCTL_SYSCALL_CHECK=y 2291CONFIG_SYSCTL_SYSCALL_CHECK=y
2082CONFIG_HAVE_FTRACE=y 2292CONFIG_USER_STACKTRACE_SUPPORT=y
2293CONFIG_HAVE_FUNCTION_TRACER=y
2294CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
2295CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
2083CONFIG_HAVE_DYNAMIC_FTRACE=y 2296CONFIG_HAVE_DYNAMIC_FTRACE=y
2084# CONFIG_FTRACE is not set 2297CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
2298CONFIG_HAVE_HW_BRANCH_TRACER=y
2299
2300#
2301# Tracers
2302#
2303# CONFIG_FUNCTION_TRACER is not set
2085# CONFIG_IRQSOFF_TRACER is not set 2304# CONFIG_IRQSOFF_TRACER is not set
2086# CONFIG_SYSPROF_TRACER is not set 2305# CONFIG_SYSPROF_TRACER is not set
2087# CONFIG_SCHED_TRACER is not set 2306# CONFIG_SCHED_TRACER is not set
2088# CONFIG_CONTEXT_SWITCH_TRACER is not set 2307# CONFIG_CONTEXT_SWITCH_TRACER is not set
2308# CONFIG_BOOT_TRACER is not set
2309# CONFIG_TRACE_BRANCH_PROFILING is not set
2310# CONFIG_POWER_TRACER is not set
2311# CONFIG_STACK_TRACER is not set
2312# CONFIG_HW_BRANCH_TRACER is not set
2089CONFIG_PROVIDE_OHCI1394_DMA_INIT=y 2313CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
2314# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
2090# CONFIG_SAMPLES is not set 2315# CONFIG_SAMPLES is not set
2091CONFIG_HAVE_ARCH_KGDB=y 2316CONFIG_HAVE_ARCH_KGDB=y
2092# CONFIG_KGDB is not set 2317# CONFIG_KGDB is not set
2093# CONFIG_STRICT_DEVMEM is not set 2318# CONFIG_STRICT_DEVMEM is not set
2094CONFIG_X86_VERBOSE_BOOTUP=y 2319CONFIG_X86_VERBOSE_BOOTUP=y
2095CONFIG_EARLY_PRINTK=y 2320CONFIG_EARLY_PRINTK=y
2321CONFIG_EARLY_PRINTK_DBGP=y
2096CONFIG_DEBUG_STACKOVERFLOW=y 2322CONFIG_DEBUG_STACKOVERFLOW=y
2097CONFIG_DEBUG_STACK_USAGE=y 2323CONFIG_DEBUG_STACK_USAGE=y
2098# CONFIG_DEBUG_PAGEALLOC is not set 2324# CONFIG_DEBUG_PAGEALLOC is not set
@@ -2123,8 +2349,10 @@ CONFIG_OPTIMIZE_INLINING=y
2123CONFIG_KEYS=y 2349CONFIG_KEYS=y
2124CONFIG_KEYS_DEBUG_PROC_KEYS=y 2350CONFIG_KEYS_DEBUG_PROC_KEYS=y
2125CONFIG_SECURITY=y 2351CONFIG_SECURITY=y
2352# CONFIG_SECURITYFS is not set
2126CONFIG_SECURITY_NETWORK=y 2353CONFIG_SECURITY_NETWORK=y
2127# CONFIG_SECURITY_NETWORK_XFRM is not set 2354# CONFIG_SECURITY_NETWORK_XFRM is not set
2355# CONFIG_SECURITY_PATH is not set
2128CONFIG_SECURITY_FILE_CAPABILITIES=y 2356CONFIG_SECURITY_FILE_CAPABILITIES=y
2129# CONFIG_SECURITY_ROOTPLUG is not set 2357# CONFIG_SECURITY_ROOTPLUG is not set
2130CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536 2358CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536
@@ -2135,7 +2363,6 @@ CONFIG_SECURITY_SELINUX_DISABLE=y
2135CONFIG_SECURITY_SELINUX_DEVELOP=y 2363CONFIG_SECURITY_SELINUX_DEVELOP=y
2136CONFIG_SECURITY_SELINUX_AVC_STATS=y 2364CONFIG_SECURITY_SELINUX_AVC_STATS=y
2137CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 2365CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
2138# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
2139# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set 2366# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
2140# CONFIG_SECURITY_SMACK is not set 2367# CONFIG_SECURITY_SMACK is not set
2141CONFIG_CRYPTO=y 2368CONFIG_CRYPTO=y
@@ -2143,11 +2370,18 @@ CONFIG_CRYPTO=y
2143# 2370#
2144# Crypto core or helper 2371# Crypto core or helper
2145# 2372#
2373# CONFIG_CRYPTO_FIPS is not set
2146CONFIG_CRYPTO_ALGAPI=y 2374CONFIG_CRYPTO_ALGAPI=y
2375CONFIG_CRYPTO_ALGAPI2=y
2147CONFIG_CRYPTO_AEAD=y 2376CONFIG_CRYPTO_AEAD=y
2377CONFIG_CRYPTO_AEAD2=y
2148CONFIG_CRYPTO_BLKCIPHER=y 2378CONFIG_CRYPTO_BLKCIPHER=y
2379CONFIG_CRYPTO_BLKCIPHER2=y
2149CONFIG_CRYPTO_HASH=y 2380CONFIG_CRYPTO_HASH=y
2381CONFIG_CRYPTO_HASH2=y
2382CONFIG_CRYPTO_RNG2=y
2150CONFIG_CRYPTO_MANAGER=y 2383CONFIG_CRYPTO_MANAGER=y
2384CONFIG_CRYPTO_MANAGER2=y
2151# CONFIG_CRYPTO_GF128MUL is not set 2385# CONFIG_CRYPTO_GF128MUL is not set
2152# CONFIG_CRYPTO_NULL is not set 2386# CONFIG_CRYPTO_NULL is not set
2153# CONFIG_CRYPTO_CRYPTD is not set 2387# CONFIG_CRYPTO_CRYPTD is not set
@@ -2182,6 +2416,7 @@ CONFIG_CRYPTO_HMAC=y
2182# Digest 2416# Digest
2183# 2417#
2184# CONFIG_CRYPTO_CRC32C is not set 2418# CONFIG_CRYPTO_CRC32C is not set
2419# CONFIG_CRYPTO_CRC32C_INTEL is not set
2185# CONFIG_CRYPTO_MD4 is not set 2420# CONFIG_CRYPTO_MD4 is not set
2186CONFIG_CRYPTO_MD5=y 2421CONFIG_CRYPTO_MD5=y
2187# CONFIG_CRYPTO_MICHAEL_MIC is not set 2422# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -2222,6 +2457,11 @@ CONFIG_CRYPTO_DES=y
2222# 2457#
2223# CONFIG_CRYPTO_DEFLATE is not set 2458# CONFIG_CRYPTO_DEFLATE is not set
2224# CONFIG_CRYPTO_LZO is not set 2459# CONFIG_CRYPTO_LZO is not set
2460
2461#
2462# Random Number Generation
2463#
2464# CONFIG_CRYPTO_ANSI_CPRNG is not set
2225CONFIG_CRYPTO_HW=y 2465CONFIG_CRYPTO_HW=y
2226# CONFIG_CRYPTO_DEV_PADLOCK is not set 2466# CONFIG_CRYPTO_DEV_PADLOCK is not set
2227# CONFIG_CRYPTO_DEV_GEODE is not set 2467# CONFIG_CRYPTO_DEV_GEODE is not set
@@ -2239,6 +2479,7 @@ CONFIG_VIRTUALIZATION=y
2239CONFIG_BITREVERSE=y 2479CONFIG_BITREVERSE=y
2240CONFIG_GENERIC_FIND_FIRST_BIT=y 2480CONFIG_GENERIC_FIND_FIRST_BIT=y
2241CONFIG_GENERIC_FIND_NEXT_BIT=y 2481CONFIG_GENERIC_FIND_NEXT_BIT=y
2482CONFIG_GENERIC_FIND_LAST_BIT=y
2242# CONFIG_CRC_CCITT is not set 2483# CONFIG_CRC_CCITT is not set
2243# CONFIG_CRC16 is not set 2484# CONFIG_CRC16 is not set
2244CONFIG_CRC_T10DIF=y 2485CONFIG_CRC_T10DIF=y
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig
index 322dd2748fc9..9fe5d212ab4c 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -1,14 +1,13 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.27-rc5 3# Linux kernel version: 2.6.29-rc4
4# Wed Sep 3 17:13:39 2008 4# Tue Feb 24 15:44:16 2009
5# 5#
6CONFIG_64BIT=y 6CONFIG_64BIT=y
7# CONFIG_X86_32 is not set 7# CONFIG_X86_32 is not set
8CONFIG_X86_64=y 8CONFIG_X86_64=y
9CONFIG_X86=y 9CONFIG_X86=y
10CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" 10CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig"
11# CONFIG_GENERIC_LOCKBREAK is not set
12CONFIG_GENERIC_TIME=y 11CONFIG_GENERIC_TIME=y
13CONFIG_GENERIC_CMOS_UPDATE=y 12CONFIG_GENERIC_CMOS_UPDATE=y
14CONFIG_CLOCKSOURCE_WATCHDOG=y 13CONFIG_CLOCKSOURCE_WATCHDOG=y
@@ -23,17 +22,16 @@ CONFIG_ZONE_DMA=y
23CONFIG_GENERIC_ISA_DMA=y 22CONFIG_GENERIC_ISA_DMA=y
24CONFIG_GENERIC_IOMAP=y 23CONFIG_GENERIC_IOMAP=y
25CONFIG_GENERIC_BUG=y 24CONFIG_GENERIC_BUG=y
25CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
26CONFIG_GENERIC_HWEIGHT=y 26CONFIG_GENERIC_HWEIGHT=y
27# CONFIG_GENERIC_GPIO is not set
28CONFIG_ARCH_MAY_HAVE_PC_FDC=y 27CONFIG_ARCH_MAY_HAVE_PC_FDC=y
29CONFIG_RWSEM_GENERIC_SPINLOCK=y 28CONFIG_RWSEM_GENERIC_SPINLOCK=y
30# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 29# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
31# CONFIG_ARCH_HAS_ILOG2_U32 is not set
32# CONFIG_ARCH_HAS_ILOG2_U64 is not set
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 30CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_GENERIC_CALIBRATE_DELAY=y 31CONFIG_GENERIC_CALIBRATE_DELAY=y
35CONFIG_GENERIC_TIME_VSYSCALL=y 32CONFIG_GENERIC_TIME_VSYSCALL=y
36CONFIG_ARCH_HAS_CPU_RELAX=y 33CONFIG_ARCH_HAS_CPU_RELAX=y
34CONFIG_ARCH_HAS_DEFAULT_IDLE=y
37CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y 35CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
38CONFIG_HAVE_SETUP_PER_CPU_AREA=y 36CONFIG_HAVE_SETUP_PER_CPU_AREA=y
39CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y 37CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y
@@ -42,12 +40,12 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
42CONFIG_ZONE_DMA32=y 40CONFIG_ZONE_DMA32=y
43CONFIG_ARCH_POPULATES_NODE_MAP=y 41CONFIG_ARCH_POPULATES_NODE_MAP=y
44CONFIG_AUDIT_ARCH=y 42CONFIG_AUDIT_ARCH=y
45CONFIG_ARCH_SUPPORTS_AOUT=y
46CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y 43CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
47CONFIG_GENERIC_HARDIRQS=y 44CONFIG_GENERIC_HARDIRQS=y
48CONFIG_GENERIC_IRQ_PROBE=y 45CONFIG_GENERIC_IRQ_PROBE=y
49CONFIG_GENERIC_PENDING_IRQ=y 46CONFIG_GENERIC_PENDING_IRQ=y
50CONFIG_X86_SMP=y 47CONFIG_X86_SMP=y
48CONFIG_USE_GENERIC_SMP_HELPERS=y
51CONFIG_X86_64_SMP=y 49CONFIG_X86_64_SMP=y
52CONFIG_X86_HT=y 50CONFIG_X86_HT=y
53CONFIG_X86_BIOS_REBOOT=y 51CONFIG_X86_BIOS_REBOOT=y
@@ -76,30 +74,44 @@ CONFIG_TASK_IO_ACCOUNTING=y
76CONFIG_AUDIT=y 74CONFIG_AUDIT=y
77CONFIG_AUDITSYSCALL=y 75CONFIG_AUDITSYSCALL=y
78CONFIG_AUDIT_TREE=y 76CONFIG_AUDIT_TREE=y
77
78#
79# RCU Subsystem
80#
81# CONFIG_CLASSIC_RCU is not set
82CONFIG_TREE_RCU=y
83# CONFIG_PREEMPT_RCU is not set
84# CONFIG_RCU_TRACE is not set
85CONFIG_RCU_FANOUT=64
86# CONFIG_RCU_FANOUT_EXACT is not set
87# CONFIG_TREE_RCU_TRACE is not set
88# CONFIG_PREEMPT_RCU_TRACE is not set
79# CONFIG_IKCONFIG is not set 89# CONFIG_IKCONFIG is not set
80CONFIG_LOG_BUF_SHIFT=18 90CONFIG_LOG_BUF_SHIFT=18
81CONFIG_CGROUPS=y
82# CONFIG_CGROUP_DEBUG is not set
83CONFIG_CGROUP_NS=y
84# CONFIG_CGROUP_DEVICE is not set
85CONFIG_CPUSETS=y
86CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y 91CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
87CONFIG_GROUP_SCHED=y 92CONFIG_GROUP_SCHED=y
88CONFIG_FAIR_GROUP_SCHED=y 93CONFIG_FAIR_GROUP_SCHED=y
89# CONFIG_RT_GROUP_SCHED is not set 94# CONFIG_RT_GROUP_SCHED is not set
90# CONFIG_USER_SCHED is not set 95# CONFIG_USER_SCHED is not set
91CONFIG_CGROUP_SCHED=y 96CONFIG_CGROUP_SCHED=y
97CONFIG_CGROUPS=y
98# CONFIG_CGROUP_DEBUG is not set
99CONFIG_CGROUP_NS=y
100CONFIG_CGROUP_FREEZER=y
101# CONFIG_CGROUP_DEVICE is not set
102CONFIG_CPUSETS=y
103CONFIG_PROC_PID_CPUSET=y
92CONFIG_CGROUP_CPUACCT=y 104CONFIG_CGROUP_CPUACCT=y
93CONFIG_RESOURCE_COUNTERS=y 105CONFIG_RESOURCE_COUNTERS=y
94# CONFIG_CGROUP_MEM_RES_CTLR is not set 106# CONFIG_CGROUP_MEM_RES_CTLR is not set
95# CONFIG_SYSFS_DEPRECATED_V2 is not set 107# CONFIG_SYSFS_DEPRECATED_V2 is not set
96CONFIG_PROC_PID_CPUSET=y
97CONFIG_RELAY=y 108CONFIG_RELAY=y
98CONFIG_NAMESPACES=y 109CONFIG_NAMESPACES=y
99CONFIG_UTS_NS=y 110CONFIG_UTS_NS=y
100CONFIG_IPC_NS=y 111CONFIG_IPC_NS=y
101CONFIG_USER_NS=y 112CONFIG_USER_NS=y
102CONFIG_PID_NS=y 113CONFIG_PID_NS=y
114CONFIG_NET_NS=y
103CONFIG_BLK_DEV_INITRD=y 115CONFIG_BLK_DEV_INITRD=y
104CONFIG_INITRAMFS_SOURCE="" 116CONFIG_INITRAMFS_SOURCE=""
105CONFIG_CC_OPTIMIZE_FOR_SIZE=y 117CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -124,12 +136,15 @@ CONFIG_SIGNALFD=y
124CONFIG_TIMERFD=y 136CONFIG_TIMERFD=y
125CONFIG_EVENTFD=y 137CONFIG_EVENTFD=y
126CONFIG_SHMEM=y 138CONFIG_SHMEM=y
139CONFIG_AIO=y
127CONFIG_VM_EVENT_COUNTERS=y 140CONFIG_VM_EVENT_COUNTERS=y
141CONFIG_PCI_QUIRKS=y
128CONFIG_SLUB_DEBUG=y 142CONFIG_SLUB_DEBUG=y
129# CONFIG_SLAB is not set 143# CONFIG_SLAB is not set
130CONFIG_SLUB=y 144CONFIG_SLUB=y
131# CONFIG_SLOB is not set 145# CONFIG_SLOB is not set
132CONFIG_PROFILING=y 146CONFIG_PROFILING=y
147CONFIG_TRACEPOINTS=y
133CONFIG_MARKERS=y 148CONFIG_MARKERS=y
134# CONFIG_OPROFILE is not set 149# CONFIG_OPROFILE is not set
135CONFIG_HAVE_OPROFILE=y 150CONFIG_HAVE_OPROFILE=y
@@ -139,15 +154,10 @@ CONFIG_KRETPROBES=y
139CONFIG_HAVE_IOREMAP_PROT=y 154CONFIG_HAVE_IOREMAP_PROT=y
140CONFIG_HAVE_KPROBES=y 155CONFIG_HAVE_KPROBES=y
141CONFIG_HAVE_KRETPROBES=y 156CONFIG_HAVE_KRETPROBES=y
142# CONFIG_HAVE_ARCH_TRACEHOOK is not set 157CONFIG_HAVE_ARCH_TRACEHOOK=y
143# CONFIG_HAVE_DMA_ATTRS is not set
144CONFIG_USE_GENERIC_SMP_HELPERS=y
145# CONFIG_HAVE_CLK is not set
146CONFIG_PROC_PAGE_MONITOR=y
147# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set 158# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
148CONFIG_SLABINFO=y 159CONFIG_SLABINFO=y
149CONFIG_RT_MUTEXES=y 160CONFIG_RT_MUTEXES=y
150# CONFIG_TINY_SHMEM is not set
151CONFIG_BASE_SMALL=0 161CONFIG_BASE_SMALL=0
152CONFIG_MODULES=y 162CONFIG_MODULES=y
153# CONFIG_MODULE_FORCE_LOAD is not set 163# CONFIG_MODULE_FORCE_LOAD is not set
@@ -155,7 +165,6 @@ CONFIG_MODULE_UNLOAD=y
155CONFIG_MODULE_FORCE_UNLOAD=y 165CONFIG_MODULE_FORCE_UNLOAD=y
156# CONFIG_MODVERSIONS is not set 166# CONFIG_MODVERSIONS is not set
157# CONFIG_MODULE_SRCVERSION_ALL is not set 167# CONFIG_MODULE_SRCVERSION_ALL is not set
158CONFIG_KMOD=y
159CONFIG_STOP_MACHINE=y 168CONFIG_STOP_MACHINE=y
160CONFIG_BLOCK=y 169CONFIG_BLOCK=y
161CONFIG_BLK_DEV_IO_TRACE=y 170CONFIG_BLK_DEV_IO_TRACE=y
@@ -175,7 +184,7 @@ CONFIG_IOSCHED_CFQ=y
175CONFIG_DEFAULT_CFQ=y 184CONFIG_DEFAULT_CFQ=y
176# CONFIG_DEFAULT_NOOP is not set 185# CONFIG_DEFAULT_NOOP is not set
177CONFIG_DEFAULT_IOSCHED="cfq" 186CONFIG_DEFAULT_IOSCHED="cfq"
178CONFIG_CLASSIC_RCU=y 187CONFIG_FREEZER=y
179 188
180# 189#
181# Processor type and features 190# Processor type and features
@@ -185,13 +194,14 @@ CONFIG_NO_HZ=y
185CONFIG_HIGH_RES_TIMERS=y 194CONFIG_HIGH_RES_TIMERS=y
186CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 195CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
187CONFIG_SMP=y 196CONFIG_SMP=y
197CONFIG_SPARSE_IRQ=y
198# CONFIG_NUMA_MIGRATE_IRQ_DESC is not set
188CONFIG_X86_FIND_SMP_CONFIG=y 199CONFIG_X86_FIND_SMP_CONFIG=y
189CONFIG_X86_MPPARSE=y 200CONFIG_X86_MPPARSE=y
190CONFIG_X86_PC=y
191# CONFIG_X86_ELAN is not set 201# CONFIG_X86_ELAN is not set
192# CONFIG_X86_VOYAGER is not set
193# CONFIG_X86_GENERICARCH is not set 202# CONFIG_X86_GENERICARCH is not set
194# CONFIG_X86_VSMP is not set 203# CONFIG_X86_VSMP is not set
204CONFIG_SCHED_OMIT_FRAME_POINTER=y
195# CONFIG_PARAVIRT_GUEST is not set 205# CONFIG_PARAVIRT_GUEST is not set
196# CONFIG_MEMTEST is not set 206# CONFIG_MEMTEST is not set
197# CONFIG_M386 is not set 207# CONFIG_M386 is not set
@@ -230,6 +240,11 @@ CONFIG_X86_CMPXCHG64=y
230CONFIG_X86_CMOV=y 240CONFIG_X86_CMOV=y
231CONFIG_X86_MINIMUM_CPU_FAMILY=64 241CONFIG_X86_MINIMUM_CPU_FAMILY=64
232CONFIG_X86_DEBUGCTLMSR=y 242CONFIG_X86_DEBUGCTLMSR=y
243CONFIG_CPU_SUP_INTEL=y
244CONFIG_CPU_SUP_AMD=y
245CONFIG_CPU_SUP_CENTAUR_64=y
246CONFIG_X86_DS=y
247CONFIG_X86_PTRACE_BTS=y
233CONFIG_HPET_TIMER=y 248CONFIG_HPET_TIMER=y
234CONFIG_HPET_EMULATE_RTC=y 249CONFIG_HPET_EMULATE_RTC=y
235CONFIG_DMI=y 250CONFIG_DMI=y
@@ -237,8 +252,11 @@ CONFIG_GART_IOMMU=y
237CONFIG_CALGARY_IOMMU=y 252CONFIG_CALGARY_IOMMU=y
238CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y 253CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y
239CONFIG_AMD_IOMMU=y 254CONFIG_AMD_IOMMU=y
255CONFIG_AMD_IOMMU_STATS=y
240CONFIG_SWIOTLB=y 256CONFIG_SWIOTLB=y
241CONFIG_IOMMU_HELPER=y 257CONFIG_IOMMU_HELPER=y
258CONFIG_IOMMU_API=y
259# CONFIG_MAXSMP is not set
242CONFIG_NR_CPUS=64 260CONFIG_NR_CPUS=64
243CONFIG_SCHED_SMT=y 261CONFIG_SCHED_SMT=y
244CONFIG_SCHED_MC=y 262CONFIG_SCHED_MC=y
@@ -247,12 +265,19 @@ CONFIG_PREEMPT_VOLUNTARY=y
247# CONFIG_PREEMPT is not set 265# CONFIG_PREEMPT is not set
248CONFIG_X86_LOCAL_APIC=y 266CONFIG_X86_LOCAL_APIC=y
249CONFIG_X86_IO_APIC=y 267CONFIG_X86_IO_APIC=y
250# CONFIG_X86_MCE is not set 268CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
269CONFIG_X86_MCE=y
270CONFIG_X86_MCE_INTEL=y
271CONFIG_X86_MCE_AMD=y
251# CONFIG_I8K is not set 272# CONFIG_I8K is not set
252CONFIG_MICROCODE=y 273CONFIG_MICROCODE=y
274CONFIG_MICROCODE_INTEL=y
275CONFIG_MICROCODE_AMD=y
253CONFIG_MICROCODE_OLD_INTERFACE=y 276CONFIG_MICROCODE_OLD_INTERFACE=y
254CONFIG_X86_MSR=y 277CONFIG_X86_MSR=y
255CONFIG_X86_CPUID=y 278CONFIG_X86_CPUID=y
279CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
280CONFIG_DIRECT_GBPAGES=y
256CONFIG_NUMA=y 281CONFIG_NUMA=y
257CONFIG_K8_NUMA=y 282CONFIG_K8_NUMA=y
258CONFIG_X86_64_ACPI_NUMA=y 283CONFIG_X86_64_ACPI_NUMA=y
@@ -269,7 +294,6 @@ CONFIG_SPARSEMEM_MANUAL=y
269CONFIG_SPARSEMEM=y 294CONFIG_SPARSEMEM=y
270CONFIG_NEED_MULTIPLE_NODES=y 295CONFIG_NEED_MULTIPLE_NODES=y
271CONFIG_HAVE_MEMORY_PRESENT=y 296CONFIG_HAVE_MEMORY_PRESENT=y
272# CONFIG_SPARSEMEM_STATIC is not set
273CONFIG_SPARSEMEM_EXTREME=y 297CONFIG_SPARSEMEM_EXTREME=y
274CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y 298CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
275CONFIG_SPARSEMEM_VMEMMAP=y 299CONFIG_SPARSEMEM_VMEMMAP=y
@@ -280,10 +304,14 @@ CONFIG_SPARSEMEM_VMEMMAP=y
280CONFIG_PAGEFLAGS_EXTENDED=y 304CONFIG_PAGEFLAGS_EXTENDED=y
281CONFIG_SPLIT_PTLOCK_CPUS=4 305CONFIG_SPLIT_PTLOCK_CPUS=4
282CONFIG_MIGRATION=y 306CONFIG_MIGRATION=y
283CONFIG_RESOURCES_64BIT=y 307CONFIG_PHYS_ADDR_T_64BIT=y
284CONFIG_ZONE_DMA_FLAG=1 308CONFIG_ZONE_DMA_FLAG=1
285CONFIG_BOUNCE=y 309CONFIG_BOUNCE=y
286CONFIG_VIRT_TO_BUS=y 310CONFIG_VIRT_TO_BUS=y
311CONFIG_UNEVICTABLE_LRU=y
312CONFIG_X86_CHECK_BIOS_CORRUPTION=y
313CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
314CONFIG_X86_RESERVE_LOW_64K=y
287CONFIG_MTRR=y 315CONFIG_MTRR=y
288# CONFIG_MTRR_SANITIZER is not set 316# CONFIG_MTRR_SANITIZER is not set
289CONFIG_X86_PAT=y 317CONFIG_X86_PAT=y
@@ -302,11 +330,12 @@ CONFIG_PHYSICAL_START=0x1000000
302CONFIG_PHYSICAL_ALIGN=0x200000 330CONFIG_PHYSICAL_ALIGN=0x200000
303CONFIG_HOTPLUG_CPU=y 331CONFIG_HOTPLUG_CPU=y
304# CONFIG_COMPAT_VDSO is not set 332# CONFIG_COMPAT_VDSO is not set
333# CONFIG_CMDLINE_BOOL is not set
305CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 334CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
306CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y 335CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y
307 336
308# 337#
309# Power management options 338# Power management and ACPI options
310# 339#
311CONFIG_ARCH_HIBERNATION_HEADER=y 340CONFIG_ARCH_HIBERNATION_HEADER=y
312CONFIG_PM=y 341CONFIG_PM=y
@@ -333,20 +362,14 @@ CONFIG_ACPI_BATTERY=y
333CONFIG_ACPI_BUTTON=y 362CONFIG_ACPI_BUTTON=y
334CONFIG_ACPI_FAN=y 363CONFIG_ACPI_FAN=y
335CONFIG_ACPI_DOCK=y 364CONFIG_ACPI_DOCK=y
336# CONFIG_ACPI_BAY is not set
337CONFIG_ACPI_PROCESSOR=y 365CONFIG_ACPI_PROCESSOR=y
338CONFIG_ACPI_HOTPLUG_CPU=y 366CONFIG_ACPI_HOTPLUG_CPU=y
339CONFIG_ACPI_THERMAL=y 367CONFIG_ACPI_THERMAL=y
340CONFIG_ACPI_NUMA=y 368CONFIG_ACPI_NUMA=y
341# CONFIG_ACPI_WMI is not set
342# CONFIG_ACPI_ASUS is not set
343# CONFIG_ACPI_TOSHIBA is not set
344# CONFIG_ACPI_CUSTOM_DSDT is not set 369# CONFIG_ACPI_CUSTOM_DSDT is not set
345CONFIG_ACPI_BLACKLIST_YEAR=0 370CONFIG_ACPI_BLACKLIST_YEAR=0
346# CONFIG_ACPI_DEBUG is not set 371# CONFIG_ACPI_DEBUG is not set
347CONFIG_ACPI_EC=y
348# CONFIG_ACPI_PCI_SLOT is not set 372# CONFIG_ACPI_PCI_SLOT is not set
349CONFIG_ACPI_POWER=y
350CONFIG_ACPI_SYSTEM=y 373CONFIG_ACPI_SYSTEM=y
351CONFIG_X86_PM_TIMER=y 374CONFIG_X86_PM_TIMER=y
352CONFIG_ACPI_CONTAINER=y 375CONFIG_ACPI_CONTAINER=y
@@ -381,13 +404,17 @@ CONFIG_X86_ACPI_CPUFREQ=y
381# 404#
382# shared options 405# shared options
383# 406#
384# CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set
385# CONFIG_X86_SPEEDSTEP_LIB is not set 407# CONFIG_X86_SPEEDSTEP_LIB is not set
386CONFIG_CPU_IDLE=y 408CONFIG_CPU_IDLE=y
387CONFIG_CPU_IDLE_GOV_LADDER=y 409CONFIG_CPU_IDLE_GOV_LADDER=y
388CONFIG_CPU_IDLE_GOV_MENU=y 410CONFIG_CPU_IDLE_GOV_MENU=y
389 411
390# 412#
413# Memory power savings
414#
415# CONFIG_I7300_IDLE is not set
416
417#
391# Bus options (PCI etc.) 418# Bus options (PCI etc.)
392# 419#
393CONFIG_PCI=y 420CONFIG_PCI=y
@@ -395,8 +422,10 @@ CONFIG_PCI_DIRECT=y
395CONFIG_PCI_MMCONFIG=y 422CONFIG_PCI_MMCONFIG=y
396CONFIG_PCI_DOMAINS=y 423CONFIG_PCI_DOMAINS=y
397CONFIG_DMAR=y 424CONFIG_DMAR=y
425# CONFIG_DMAR_DEFAULT_ON is not set
398CONFIG_DMAR_GFX_WA=y 426CONFIG_DMAR_GFX_WA=y
399CONFIG_DMAR_FLOPPY_WA=y 427CONFIG_DMAR_FLOPPY_WA=y
428# CONFIG_INTR_REMAP is not set
400CONFIG_PCIEPORTBUS=y 429CONFIG_PCIEPORTBUS=y
401# CONFIG_HOTPLUG_PCI_PCIE is not set 430# CONFIG_HOTPLUG_PCI_PCIE is not set
402CONFIG_PCIEAER=y 431CONFIG_PCIEAER=y
@@ -405,6 +434,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y
405CONFIG_PCI_MSI=y 434CONFIG_PCI_MSI=y
406# CONFIG_PCI_LEGACY is not set 435# CONFIG_PCI_LEGACY is not set
407# CONFIG_PCI_DEBUG is not set 436# CONFIG_PCI_DEBUG is not set
437# CONFIG_PCI_STUB is not set
408CONFIG_HT_IRQ=y 438CONFIG_HT_IRQ=y
409CONFIG_ISA_DMA_API=y 439CONFIG_ISA_DMA_API=y
410CONFIG_K8_NB=y 440CONFIG_K8_NB=y
@@ -438,6 +468,8 @@ CONFIG_HOTPLUG_PCI=y
438# 468#
439CONFIG_BINFMT_ELF=y 469CONFIG_BINFMT_ELF=y
440CONFIG_COMPAT_BINFMT_ELF=y 470CONFIG_COMPAT_BINFMT_ELF=y
471CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
472# CONFIG_HAVE_AOUT is not set
441CONFIG_BINFMT_MISC=y 473CONFIG_BINFMT_MISC=y
442CONFIG_IA32_EMULATION=y 474CONFIG_IA32_EMULATION=y
443# CONFIG_IA32_AOUT is not set 475# CONFIG_IA32_AOUT is not set
@@ -449,6 +481,7 @@ CONFIG_NET=y
449# 481#
450# Networking options 482# Networking options
451# 483#
484CONFIG_COMPAT_NET_DEV_OPS=y
452CONFIG_PACKET=y 485CONFIG_PACKET=y
453CONFIG_PACKET_MMAP=y 486CONFIG_PACKET_MMAP=y
454CONFIG_UNIX=y 487CONFIG_UNIX=y
@@ -509,7 +542,6 @@ CONFIG_DEFAULT_CUBIC=y
509# CONFIG_DEFAULT_RENO is not set 542# CONFIG_DEFAULT_RENO is not set
510CONFIG_DEFAULT_TCP_CONG="cubic" 543CONFIG_DEFAULT_TCP_CONG="cubic"
511CONFIG_TCP_MD5SIG=y 544CONFIG_TCP_MD5SIG=y
512# CONFIG_IP_VS is not set
513CONFIG_IPV6=y 545CONFIG_IPV6=y
514# CONFIG_IPV6_PRIVACY is not set 546# CONFIG_IPV6_PRIVACY is not set
515# CONFIG_IPV6_ROUTER_PREF is not set 547# CONFIG_IPV6_ROUTER_PREF is not set
@@ -547,19 +579,21 @@ CONFIG_NF_CONNTRACK_IRC=y
547CONFIG_NF_CONNTRACK_SIP=y 579CONFIG_NF_CONNTRACK_SIP=y
548CONFIG_NF_CT_NETLINK=y 580CONFIG_NF_CT_NETLINK=y
549CONFIG_NETFILTER_XTABLES=y 581CONFIG_NETFILTER_XTABLES=y
582CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
550CONFIG_NETFILTER_XT_TARGET_MARK=y 583CONFIG_NETFILTER_XT_TARGET_MARK=y
551CONFIG_NETFILTER_XT_TARGET_NFLOG=y 584CONFIG_NETFILTER_XT_TARGET_NFLOG=y
552CONFIG_NETFILTER_XT_TARGET_SECMARK=y 585CONFIG_NETFILTER_XT_TARGET_SECMARK=y
553CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
554CONFIG_NETFILTER_XT_TARGET_TCPMSS=y 586CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
555CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y 587CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
556CONFIG_NETFILTER_XT_MATCH_MARK=y 588CONFIG_NETFILTER_XT_MATCH_MARK=y
557CONFIG_NETFILTER_XT_MATCH_POLICY=y 589CONFIG_NETFILTER_XT_MATCH_POLICY=y
558CONFIG_NETFILTER_XT_MATCH_STATE=y 590CONFIG_NETFILTER_XT_MATCH_STATE=y
591# CONFIG_IP_VS is not set
559 592
560# 593#
561# IP: Netfilter Configuration 594# IP: Netfilter Configuration
562# 595#
596CONFIG_NF_DEFRAG_IPV4=y
563CONFIG_NF_CONNTRACK_IPV4=y 597CONFIG_NF_CONNTRACK_IPV4=y
564CONFIG_NF_CONNTRACK_PROC_COMPAT=y 598CONFIG_NF_CONNTRACK_PROC_COMPAT=y
565CONFIG_IP_NF_IPTABLES=y 599CONFIG_IP_NF_IPTABLES=y
@@ -585,8 +619,8 @@ CONFIG_IP_NF_MANGLE=y
585CONFIG_NF_CONNTRACK_IPV6=y 619CONFIG_NF_CONNTRACK_IPV6=y
586CONFIG_IP6_NF_IPTABLES=y 620CONFIG_IP6_NF_IPTABLES=y
587CONFIG_IP6_NF_MATCH_IPV6HEADER=y 621CONFIG_IP6_NF_MATCH_IPV6HEADER=y
588CONFIG_IP6_NF_FILTER=y
589CONFIG_IP6_NF_TARGET_LOG=y 622CONFIG_IP6_NF_TARGET_LOG=y
623CONFIG_IP6_NF_FILTER=y
590CONFIG_IP6_NF_TARGET_REJECT=y 624CONFIG_IP6_NF_TARGET_REJECT=y
591CONFIG_IP6_NF_MANGLE=y 625CONFIG_IP6_NF_MANGLE=y
592# CONFIG_IP_DCCP is not set 626# CONFIG_IP_DCCP is not set
@@ -594,6 +628,7 @@ CONFIG_IP6_NF_MANGLE=y
594# CONFIG_TIPC is not set 628# CONFIG_TIPC is not set
595# CONFIG_ATM is not set 629# CONFIG_ATM is not set
596# CONFIG_BRIDGE is not set 630# CONFIG_BRIDGE is not set
631# CONFIG_NET_DSA is not set
597# CONFIG_VLAN_8021Q is not set 632# CONFIG_VLAN_8021Q is not set
598# CONFIG_DECNET is not set 633# CONFIG_DECNET is not set
599CONFIG_LLC=y 634CONFIG_LLC=y
@@ -613,6 +648,7 @@ CONFIG_NET_SCHED=y
613# CONFIG_NET_SCH_HTB is not set 648# CONFIG_NET_SCH_HTB is not set
614# CONFIG_NET_SCH_HFSC is not set 649# CONFIG_NET_SCH_HFSC is not set
615# CONFIG_NET_SCH_PRIO is not set 650# CONFIG_NET_SCH_PRIO is not set
651# CONFIG_NET_SCH_MULTIQ is not set
616# CONFIG_NET_SCH_RED is not set 652# CONFIG_NET_SCH_RED is not set
617# CONFIG_NET_SCH_SFQ is not set 653# CONFIG_NET_SCH_SFQ is not set
618# CONFIG_NET_SCH_TEQL is not set 654# CONFIG_NET_SCH_TEQL is not set
@@ -620,6 +656,7 @@ CONFIG_NET_SCHED=y
620# CONFIG_NET_SCH_GRED is not set 656# CONFIG_NET_SCH_GRED is not set
621# CONFIG_NET_SCH_DSMARK is not set 657# CONFIG_NET_SCH_DSMARK is not set
622# CONFIG_NET_SCH_NETEM is not set 658# CONFIG_NET_SCH_NETEM is not set
659# CONFIG_NET_SCH_DRR is not set
623# CONFIG_NET_SCH_INGRESS is not set 660# CONFIG_NET_SCH_INGRESS is not set
624 661
625# 662#
@@ -634,6 +671,7 @@ CONFIG_NET_CLS=y
634# CONFIG_NET_CLS_RSVP is not set 671# CONFIG_NET_CLS_RSVP is not set
635# CONFIG_NET_CLS_RSVP6 is not set 672# CONFIG_NET_CLS_RSVP6 is not set
636# CONFIG_NET_CLS_FLOW is not set 673# CONFIG_NET_CLS_FLOW is not set
674# CONFIG_NET_CLS_CGROUP is not set
637CONFIG_NET_EMATCH=y 675CONFIG_NET_EMATCH=y
638CONFIG_NET_EMATCH_STACK=32 676CONFIG_NET_EMATCH_STACK=32
639# CONFIG_NET_EMATCH_CMP is not set 677# CONFIG_NET_EMATCH_CMP is not set
@@ -649,7 +687,9 @@ CONFIG_NET_CLS_ACT=y
649# CONFIG_NET_ACT_NAT is not set 687# CONFIG_NET_ACT_NAT is not set
650# CONFIG_NET_ACT_PEDIT is not set 688# CONFIG_NET_ACT_PEDIT is not set
651# CONFIG_NET_ACT_SIMP is not set 689# CONFIG_NET_ACT_SIMP is not set
690# CONFIG_NET_ACT_SKBEDIT is not set
652CONFIG_NET_SCH_FIFO=y 691CONFIG_NET_SCH_FIFO=y
692# CONFIG_DCB is not set
653 693
654# 694#
655# Network testing 695# Network testing
@@ -666,29 +706,33 @@ CONFIG_HAMRADIO=y
666# CONFIG_IRDA is not set 706# CONFIG_IRDA is not set
667# CONFIG_BT is not set 707# CONFIG_BT is not set
668# CONFIG_AF_RXRPC is not set 708# CONFIG_AF_RXRPC is not set
709# CONFIG_PHONET is not set
669CONFIG_FIB_RULES=y 710CONFIG_FIB_RULES=y
670 711CONFIG_WIRELESS=y
671#
672# Wireless
673#
674CONFIG_CFG80211=y 712CONFIG_CFG80211=y
713# CONFIG_CFG80211_REG_DEBUG is not set
675CONFIG_NL80211=y 714CONFIG_NL80211=y
715CONFIG_WIRELESS_OLD_REGULATORY=y
676CONFIG_WIRELESS_EXT=y 716CONFIG_WIRELESS_EXT=y
677CONFIG_WIRELESS_EXT_SYSFS=y 717CONFIG_WIRELESS_EXT_SYSFS=y
718# CONFIG_LIB80211 is not set
678CONFIG_MAC80211=y 719CONFIG_MAC80211=y
679 720
680# 721#
681# Rate control algorithm selection 722# Rate control algorithm selection
682# 723#
683CONFIG_MAC80211_RC_PID=y 724CONFIG_MAC80211_RC_MINSTREL=y
684CONFIG_MAC80211_RC_DEFAULT_PID=y 725# CONFIG_MAC80211_RC_DEFAULT_PID is not set
685CONFIG_MAC80211_RC_DEFAULT="pid" 726CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
727CONFIG_MAC80211_RC_DEFAULT="minstrel"
686# CONFIG_MAC80211_MESH is not set 728# CONFIG_MAC80211_MESH is not set
687CONFIG_MAC80211_LEDS=y 729CONFIG_MAC80211_LEDS=y
688# CONFIG_MAC80211_DEBUGFS is not set 730# CONFIG_MAC80211_DEBUGFS is not set
689# CONFIG_MAC80211_DEBUG_MENU is not set 731# CONFIG_MAC80211_DEBUG_MENU is not set
690# CONFIG_IEEE80211 is not set 732# CONFIG_WIMAX is not set
691# CONFIG_RFKILL is not set 733CONFIG_RFKILL=y
734# CONFIG_RFKILL_INPUT is not set
735CONFIG_RFKILL_LEDS=y
692# CONFIG_NET_9P is not set 736# CONFIG_NET_9P is not set
693 737
694# 738#
@@ -712,7 +756,7 @@ CONFIG_PROC_EVENTS=y
712# CONFIG_MTD is not set 756# CONFIG_MTD is not set
713# CONFIG_PARPORT is not set 757# CONFIG_PARPORT is not set
714CONFIG_PNP=y 758CONFIG_PNP=y
715# CONFIG_PNP_DEBUG is not set 759CONFIG_PNP_DEBUG_MESSAGES=y
716 760
717# 761#
718# Protocols 762# Protocols
@@ -740,21 +784,21 @@ CONFIG_BLK_DEV_RAM_SIZE=16384
740CONFIG_MISC_DEVICES=y 784CONFIG_MISC_DEVICES=y
741# CONFIG_IBM_ASM is not set 785# CONFIG_IBM_ASM is not set
742# CONFIG_PHANTOM is not set 786# CONFIG_PHANTOM is not set
743# CONFIG_EEPROM_93CX6 is not set
744# CONFIG_SGI_IOC4 is not set 787# CONFIG_SGI_IOC4 is not set
745# CONFIG_TIFM_CORE is not set 788# CONFIG_TIFM_CORE is not set
746# CONFIG_ACER_WMI is not set 789# CONFIG_ICS932S401 is not set
747# CONFIG_ASUS_LAPTOP is not set
748# CONFIG_FUJITSU_LAPTOP is not set
749# CONFIG_MSI_LAPTOP is not set
750# CONFIG_COMPAL_LAPTOP is not set
751# CONFIG_SONY_LAPTOP is not set
752# CONFIG_THINKPAD_ACPI is not set
753# CONFIG_INTEL_MENLOW is not set
754# CONFIG_ENCLOSURE_SERVICES is not set 790# CONFIG_ENCLOSURE_SERVICES is not set
755# CONFIG_SGI_XP is not set 791# CONFIG_SGI_XP is not set
756# CONFIG_HP_ILO is not set 792# CONFIG_HP_ILO is not set
757# CONFIG_SGI_GRU is not set 793# CONFIG_SGI_GRU is not set
794# CONFIG_C2PORT is not set
795
796#
797# EEPROM support
798#
799# CONFIG_EEPROM_AT24 is not set
800# CONFIG_EEPROM_LEGACY is not set
801# CONFIG_EEPROM_93CX6 is not set
758CONFIG_HAVE_IDE=y 802CONFIG_HAVE_IDE=y
759# CONFIG_IDE is not set 803# CONFIG_IDE is not set
760 804
@@ -793,7 +837,7 @@ CONFIG_SCSI_WAIT_SCAN=m
793# 837#
794CONFIG_SCSI_SPI_ATTRS=y 838CONFIG_SCSI_SPI_ATTRS=y
795# CONFIG_SCSI_FC_ATTRS is not set 839# CONFIG_SCSI_FC_ATTRS is not set
796CONFIG_SCSI_ISCSI_ATTRS=y 840# CONFIG_SCSI_ISCSI_ATTRS is not set
797# CONFIG_SCSI_SAS_ATTRS is not set 841# CONFIG_SCSI_SAS_ATTRS is not set
798# CONFIG_SCSI_SAS_LIBSAS is not set 842# CONFIG_SCSI_SAS_LIBSAS is not set
799# CONFIG_SCSI_SRP_ATTRS is not set 843# CONFIG_SCSI_SRP_ATTRS is not set
@@ -864,6 +908,7 @@ CONFIG_PATA_OLDPIIX=y
864CONFIG_PATA_SCH=y 908CONFIG_PATA_SCH=y
865CONFIG_MD=y 909CONFIG_MD=y
866CONFIG_BLK_DEV_MD=y 910CONFIG_BLK_DEV_MD=y
911CONFIG_MD_AUTODETECT=y
867# CONFIG_MD_LINEAR is not set 912# CONFIG_MD_LINEAR is not set
868# CONFIG_MD_RAID0 is not set 913# CONFIG_MD_RAID0 is not set
869# CONFIG_MD_RAID1 is not set 914# CONFIG_MD_RAID1 is not set
@@ -919,6 +964,9 @@ CONFIG_PHYLIB=y
919# CONFIG_BROADCOM_PHY is not set 964# CONFIG_BROADCOM_PHY is not set
920# CONFIG_ICPLUS_PHY is not set 965# CONFIG_ICPLUS_PHY is not set
921# CONFIG_REALTEK_PHY is not set 966# CONFIG_REALTEK_PHY is not set
967# CONFIG_NATIONAL_PHY is not set
968# CONFIG_STE10XP is not set
969# CONFIG_LSI_ET1011C_PHY is not set
922# CONFIG_FIXED_PHY is not set 970# CONFIG_FIXED_PHY is not set
923# CONFIG_MDIO_BITBANG is not set 971# CONFIG_MDIO_BITBANG is not set
924CONFIG_NET_ETHERNET=y 972CONFIG_NET_ETHERNET=y
@@ -942,6 +990,9 @@ CONFIG_NET_TULIP=y
942# CONFIG_IBM_NEW_EMAC_RGMII is not set 990# CONFIG_IBM_NEW_EMAC_RGMII is not set
943# CONFIG_IBM_NEW_EMAC_TAH is not set 991# CONFIG_IBM_NEW_EMAC_TAH is not set
944# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 992# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
993# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
994# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
995# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
945CONFIG_NET_PCI=y 996CONFIG_NET_PCI=y
946# CONFIG_PCNET32 is not set 997# CONFIG_PCNET32 is not set
947# CONFIG_AMD8111_ETH is not set 998# CONFIG_AMD8111_ETH is not set
@@ -949,7 +1000,6 @@ CONFIG_NET_PCI=y
949# CONFIG_B44 is not set 1000# CONFIG_B44 is not set
950CONFIG_FORCEDETH=y 1001CONFIG_FORCEDETH=y
951# CONFIG_FORCEDETH_NAPI is not set 1002# CONFIG_FORCEDETH_NAPI is not set
952# CONFIG_EEPRO100 is not set
953CONFIG_E100=y 1003CONFIG_E100=y
954# CONFIG_FEALNX is not set 1004# CONFIG_FEALNX is not set
955# CONFIG_NATSEMI is not set 1005# CONFIG_NATSEMI is not set
@@ -963,15 +1013,16 @@ CONFIG_8139TOO_PIO=y
963# CONFIG_R6040 is not set 1013# CONFIG_R6040 is not set
964# CONFIG_SIS900 is not set 1014# CONFIG_SIS900 is not set
965# CONFIG_EPIC100 is not set 1015# CONFIG_EPIC100 is not set
1016# CONFIG_SMSC9420 is not set
966# CONFIG_SUNDANCE is not set 1017# CONFIG_SUNDANCE is not set
967# CONFIG_TLAN is not set 1018# CONFIG_TLAN is not set
968# CONFIG_VIA_RHINE is not set 1019# CONFIG_VIA_RHINE is not set
969# CONFIG_SC92031 is not set 1020# CONFIG_SC92031 is not set
1021# CONFIG_ATL2 is not set
970CONFIG_NETDEV_1000=y 1022CONFIG_NETDEV_1000=y
971# CONFIG_ACENIC is not set 1023# CONFIG_ACENIC is not set
972# CONFIG_DL2K is not set 1024# CONFIG_DL2K is not set
973CONFIG_E1000=y 1025CONFIG_E1000=y
974# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
975# CONFIG_E1000E is not set 1026# CONFIG_E1000E is not set
976# CONFIG_IP1000 is not set 1027# CONFIG_IP1000 is not set
977# CONFIG_IGB is not set 1028# CONFIG_IGB is not set
@@ -989,18 +1040,23 @@ CONFIG_TIGON3=y
989# CONFIG_QLA3XXX is not set 1040# CONFIG_QLA3XXX is not set
990# CONFIG_ATL1 is not set 1041# CONFIG_ATL1 is not set
991# CONFIG_ATL1E is not set 1042# CONFIG_ATL1E is not set
1043# CONFIG_JME is not set
992CONFIG_NETDEV_10000=y 1044CONFIG_NETDEV_10000=y
993# CONFIG_CHELSIO_T1 is not set 1045# CONFIG_CHELSIO_T1 is not set
1046CONFIG_CHELSIO_T3_DEPENDS=y
994# CONFIG_CHELSIO_T3 is not set 1047# CONFIG_CHELSIO_T3 is not set
1048# CONFIG_ENIC is not set
995# CONFIG_IXGBE is not set 1049# CONFIG_IXGBE is not set
996# CONFIG_IXGB is not set 1050# CONFIG_IXGB is not set
997# CONFIG_S2IO is not set 1051# CONFIG_S2IO is not set
998# CONFIG_MYRI10GE is not set 1052# CONFIG_MYRI10GE is not set
999# CONFIG_NETXEN_NIC is not set 1053# CONFIG_NETXEN_NIC is not set
1000# CONFIG_NIU is not set 1054# CONFIG_NIU is not set
1055# CONFIG_MLX4_EN is not set
1001# CONFIG_MLX4_CORE is not set 1056# CONFIG_MLX4_CORE is not set
1002# CONFIG_TEHUTI is not set 1057# CONFIG_TEHUTI is not set
1003# CONFIG_BNX2X is not set 1058# CONFIG_BNX2X is not set
1059# CONFIG_QLGE is not set
1004# CONFIG_SFC is not set 1060# CONFIG_SFC is not set
1005CONFIG_TR=y 1061CONFIG_TR=y
1006# CONFIG_IBMOL is not set 1062# CONFIG_IBMOL is not set
@@ -1013,9 +1069,8 @@ CONFIG_TR=y
1013# CONFIG_WLAN_PRE80211 is not set 1069# CONFIG_WLAN_PRE80211 is not set
1014CONFIG_WLAN_80211=y 1070CONFIG_WLAN_80211=y
1015# CONFIG_PCMCIA_RAYCS is not set 1071# CONFIG_PCMCIA_RAYCS is not set
1016# CONFIG_IPW2100 is not set
1017# CONFIG_IPW2200 is not set
1018# CONFIG_LIBERTAS is not set 1072# CONFIG_LIBERTAS is not set
1073# CONFIG_LIBERTAS_THINFIRM is not set
1019# CONFIG_AIRO is not set 1074# CONFIG_AIRO is not set
1020# CONFIG_HERMES is not set 1075# CONFIG_HERMES is not set
1021# CONFIG_ATMEL is not set 1076# CONFIG_ATMEL is not set
@@ -1032,6 +1087,8 @@ CONFIG_WLAN_80211=y
1032CONFIG_ATH5K=y 1087CONFIG_ATH5K=y
1033# CONFIG_ATH5K_DEBUG is not set 1088# CONFIG_ATH5K_DEBUG is not set
1034# CONFIG_ATH9K is not set 1089# CONFIG_ATH9K is not set
1090# CONFIG_IPW2100 is not set
1091# CONFIG_IPW2200 is not set
1035# CONFIG_IWLCORE is not set 1092# CONFIG_IWLCORE is not set
1036# CONFIG_IWLWIFI_LEDS is not set 1093# CONFIG_IWLWIFI_LEDS is not set
1037# CONFIG_IWLAGN is not set 1094# CONFIG_IWLAGN is not set
@@ -1043,6 +1100,10 @@ CONFIG_ATH5K=y
1043# CONFIG_RT2X00 is not set 1100# CONFIG_RT2X00 is not set
1044 1101
1045# 1102#
1103# Enable WiMAX (Networking options) to see the WiMAX drivers
1104#
1105
1106#
1046# USB Network Adapters 1107# USB Network Adapters
1047# 1108#
1048# CONFIG_USB_CATC is not set 1109# CONFIG_USB_CATC is not set
@@ -1050,6 +1111,7 @@ CONFIG_ATH5K=y
1050# CONFIG_USB_PEGASUS is not set 1111# CONFIG_USB_PEGASUS is not set
1051# CONFIG_USB_RTL8150 is not set 1112# CONFIG_USB_RTL8150 is not set
1052# CONFIG_USB_USBNET is not set 1113# CONFIG_USB_USBNET is not set
1114# CONFIG_USB_HSO is not set
1053CONFIG_NET_PCMCIA=y 1115CONFIG_NET_PCMCIA=y
1054# CONFIG_PCMCIA_3C589 is not set 1116# CONFIG_PCMCIA_3C589 is not set
1055# CONFIG_PCMCIA_3C574 is not set 1117# CONFIG_PCMCIA_3C574 is not set
@@ -1059,6 +1121,7 @@ CONFIG_NET_PCMCIA=y
1059# CONFIG_PCMCIA_SMC91C92 is not set 1121# CONFIG_PCMCIA_SMC91C92 is not set
1060# CONFIG_PCMCIA_XIRC2PS is not set 1122# CONFIG_PCMCIA_XIRC2PS is not set
1061# CONFIG_PCMCIA_AXNET is not set 1123# CONFIG_PCMCIA_AXNET is not set
1124# CONFIG_PCMCIA_IBMTR is not set
1062# CONFIG_WAN is not set 1125# CONFIG_WAN is not set
1063CONFIG_FDDI=y 1126CONFIG_FDDI=y
1064# CONFIG_DEFXX is not set 1127# CONFIG_DEFXX is not set
@@ -1110,6 +1173,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y
1110CONFIG_MOUSE_PS2_SYNAPTICS=y 1173CONFIG_MOUSE_PS2_SYNAPTICS=y
1111CONFIG_MOUSE_PS2_LIFEBOOK=y 1174CONFIG_MOUSE_PS2_LIFEBOOK=y
1112CONFIG_MOUSE_PS2_TRACKPOINT=y 1175CONFIG_MOUSE_PS2_TRACKPOINT=y
1176# CONFIG_MOUSE_PS2_ELANTECH is not set
1113# CONFIG_MOUSE_PS2_TOUCHKIT is not set 1177# CONFIG_MOUSE_PS2_TOUCHKIT is not set
1114# CONFIG_MOUSE_SERIAL is not set 1178# CONFIG_MOUSE_SERIAL is not set
1115# CONFIG_MOUSE_APPLETOUCH is not set 1179# CONFIG_MOUSE_APPLETOUCH is not set
@@ -1147,15 +1211,16 @@ CONFIG_INPUT_TOUCHSCREEN=y
1147# CONFIG_TOUCHSCREEN_FUJITSU is not set 1211# CONFIG_TOUCHSCREEN_FUJITSU is not set
1148# CONFIG_TOUCHSCREEN_GUNZE is not set 1212# CONFIG_TOUCHSCREEN_GUNZE is not set
1149# CONFIG_TOUCHSCREEN_ELO is not set 1213# CONFIG_TOUCHSCREEN_ELO is not set
1214# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
1150# CONFIG_TOUCHSCREEN_MTOUCH is not set 1215# CONFIG_TOUCHSCREEN_MTOUCH is not set
1151# CONFIG_TOUCHSCREEN_INEXIO is not set 1216# CONFIG_TOUCHSCREEN_INEXIO is not set
1152# CONFIG_TOUCHSCREEN_MK712 is not set 1217# CONFIG_TOUCHSCREEN_MK712 is not set
1153# CONFIG_TOUCHSCREEN_PENMOUNT is not set 1218# CONFIG_TOUCHSCREEN_PENMOUNT is not set
1154# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 1219# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
1155# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 1220# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
1156# CONFIG_TOUCHSCREEN_UCB1400 is not set
1157# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set 1221# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
1158# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set 1222# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
1223# CONFIG_TOUCHSCREEN_TSC2007 is not set
1159CONFIG_INPUT_MISC=y 1224CONFIG_INPUT_MISC=y
1160# CONFIG_INPUT_PCSPKR is not set 1225# CONFIG_INPUT_PCSPKR is not set
1161# CONFIG_INPUT_APANEL is not set 1226# CONFIG_INPUT_APANEL is not set
@@ -1165,6 +1230,7 @@ CONFIG_INPUT_MISC=y
1165# CONFIG_INPUT_KEYSPAN_REMOTE is not set 1230# CONFIG_INPUT_KEYSPAN_REMOTE is not set
1166# CONFIG_INPUT_POWERMATE is not set 1231# CONFIG_INPUT_POWERMATE is not set
1167# CONFIG_INPUT_YEALINK is not set 1232# CONFIG_INPUT_YEALINK is not set
1233# CONFIG_INPUT_CM109 is not set
1168# CONFIG_INPUT_UINPUT is not set 1234# CONFIG_INPUT_UINPUT is not set
1169 1235
1170# 1236#
@@ -1231,6 +1297,7 @@ CONFIG_SERIAL_CORE=y
1231CONFIG_SERIAL_CORE_CONSOLE=y 1297CONFIG_SERIAL_CORE_CONSOLE=y
1232# CONFIG_SERIAL_JSM is not set 1298# CONFIG_SERIAL_JSM is not set
1233CONFIG_UNIX98_PTYS=y 1299CONFIG_UNIX98_PTYS=y
1300# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1234# CONFIG_LEGACY_PTYS is not set 1301# CONFIG_LEGACY_PTYS is not set
1235# CONFIG_IPMI_HANDLER is not set 1302# CONFIG_IPMI_HANDLER is not set
1236CONFIG_HW_RANDOM=y 1303CONFIG_HW_RANDOM=y
@@ -1260,6 +1327,7 @@ CONFIG_I2C=y
1260CONFIG_I2C_BOARDINFO=y 1327CONFIG_I2C_BOARDINFO=y
1261# CONFIG_I2C_CHARDEV is not set 1328# CONFIG_I2C_CHARDEV is not set
1262CONFIG_I2C_HELPER_AUTO=y 1329CONFIG_I2C_HELPER_AUTO=y
1330CONFIG_I2C_ALGOBIT=y
1263 1331
1264# 1332#
1265# I2C Hardware Bus support 1333# I2C Hardware Bus support
@@ -1311,8 +1379,6 @@ CONFIG_I2C_I801=y
1311# Miscellaneous I2C Chip support 1379# Miscellaneous I2C Chip support
1312# 1380#
1313# CONFIG_DS1682 is not set 1381# CONFIG_DS1682 is not set
1314# CONFIG_EEPROM_AT24 is not set
1315# CONFIG_EEPROM_LEGACY is not set
1316# CONFIG_SENSORS_PCF8574 is not set 1382# CONFIG_SENSORS_PCF8574 is not set
1317# CONFIG_PCF8575 is not set 1383# CONFIG_PCF8575 is not set
1318# CONFIG_SENSORS_PCA9539 is not set 1384# CONFIG_SENSORS_PCA9539 is not set
@@ -1331,8 +1397,78 @@ CONFIG_POWER_SUPPLY=y
1331# CONFIG_POWER_SUPPLY_DEBUG is not set 1397# CONFIG_POWER_SUPPLY_DEBUG is not set
1332# CONFIG_PDA_POWER is not set 1398# CONFIG_PDA_POWER is not set
1333# CONFIG_BATTERY_DS2760 is not set 1399# CONFIG_BATTERY_DS2760 is not set
1334# CONFIG_HWMON is not set 1400# CONFIG_BATTERY_BQ27x00 is not set
1401CONFIG_HWMON=y
1402# CONFIG_HWMON_VID is not set
1403# CONFIG_SENSORS_ABITUGURU is not set
1404# CONFIG_SENSORS_ABITUGURU3 is not set
1405# CONFIG_SENSORS_AD7414 is not set
1406# CONFIG_SENSORS_AD7418 is not set
1407# CONFIG_SENSORS_ADM1021 is not set
1408# CONFIG_SENSORS_ADM1025 is not set
1409# CONFIG_SENSORS_ADM1026 is not set
1410# CONFIG_SENSORS_ADM1029 is not set
1411# CONFIG_SENSORS_ADM1031 is not set
1412# CONFIG_SENSORS_ADM9240 is not set
1413# CONFIG_SENSORS_ADT7462 is not set
1414# CONFIG_SENSORS_ADT7470 is not set
1415# CONFIG_SENSORS_ADT7473 is not set
1416# CONFIG_SENSORS_ADT7475 is not set
1417# CONFIG_SENSORS_K8TEMP is not set
1418# CONFIG_SENSORS_ASB100 is not set
1419# CONFIG_SENSORS_ATXP1 is not set
1420# CONFIG_SENSORS_DS1621 is not set
1421# CONFIG_SENSORS_I5K_AMB is not set
1422# CONFIG_SENSORS_F71805F is not set
1423# CONFIG_SENSORS_F71882FG is not set
1424# CONFIG_SENSORS_F75375S is not set
1425# CONFIG_SENSORS_FSCHER is not set
1426# CONFIG_SENSORS_FSCPOS is not set
1427# CONFIG_SENSORS_FSCHMD is not set
1428# CONFIG_SENSORS_GL518SM is not set
1429# CONFIG_SENSORS_GL520SM is not set
1430# CONFIG_SENSORS_CORETEMP is not set
1431# CONFIG_SENSORS_IT87 is not set
1432# CONFIG_SENSORS_LM63 is not set
1433# CONFIG_SENSORS_LM75 is not set
1434# CONFIG_SENSORS_LM77 is not set
1435# CONFIG_SENSORS_LM78 is not set
1436# CONFIG_SENSORS_LM80 is not set
1437# CONFIG_SENSORS_LM83 is not set
1438# CONFIG_SENSORS_LM85 is not set
1439# CONFIG_SENSORS_LM87 is not set
1440# CONFIG_SENSORS_LM90 is not set
1441# CONFIG_SENSORS_LM92 is not set
1442# CONFIG_SENSORS_LM93 is not set
1443# CONFIG_SENSORS_LTC4245 is not set
1444# CONFIG_SENSORS_MAX1619 is not set
1445# CONFIG_SENSORS_MAX6650 is not set
1446# CONFIG_SENSORS_PC87360 is not set
1447# CONFIG_SENSORS_PC87427 is not set
1448# CONFIG_SENSORS_SIS5595 is not set
1449# CONFIG_SENSORS_DME1737 is not set
1450# CONFIG_SENSORS_SMSC47M1 is not set
1451# CONFIG_SENSORS_SMSC47M192 is not set
1452# CONFIG_SENSORS_SMSC47B397 is not set
1453# CONFIG_SENSORS_ADS7828 is not set
1454# CONFIG_SENSORS_THMC50 is not set
1455# CONFIG_SENSORS_VIA686A is not set
1456# CONFIG_SENSORS_VT1211 is not set
1457# CONFIG_SENSORS_VT8231 is not set
1458# CONFIG_SENSORS_W83781D is not set
1459# CONFIG_SENSORS_W83791D is not set
1460# CONFIG_SENSORS_W83792D is not set
1461# CONFIG_SENSORS_W83793 is not set
1462# CONFIG_SENSORS_W83L785TS is not set
1463# CONFIG_SENSORS_W83L786NG is not set
1464# CONFIG_SENSORS_W83627HF is not set
1465# CONFIG_SENSORS_W83627EHF is not set
1466# CONFIG_SENSORS_HDAPS is not set
1467# CONFIG_SENSORS_LIS3LV02D is not set
1468# CONFIG_SENSORS_APPLESMC is not set
1469# CONFIG_HWMON_DEBUG_CHIP is not set
1335CONFIG_THERMAL=y 1470CONFIG_THERMAL=y
1471# CONFIG_THERMAL_HWMON is not set
1336CONFIG_WATCHDOG=y 1472CONFIG_WATCHDOG=y
1337# CONFIG_WATCHDOG_NOWAYOUT is not set 1473# CONFIG_WATCHDOG_NOWAYOUT is not set
1338 1474
@@ -1352,15 +1488,18 @@ CONFIG_WATCHDOG=y
1352# CONFIG_I6300ESB_WDT is not set 1488# CONFIG_I6300ESB_WDT is not set
1353# CONFIG_ITCO_WDT is not set 1489# CONFIG_ITCO_WDT is not set
1354# CONFIG_IT8712F_WDT is not set 1490# CONFIG_IT8712F_WDT is not set
1491# CONFIG_IT87_WDT is not set
1355# CONFIG_HP_WATCHDOG is not set 1492# CONFIG_HP_WATCHDOG is not set
1356# CONFIG_SC1200_WDT is not set 1493# CONFIG_SC1200_WDT is not set
1357# CONFIG_PC87413_WDT is not set 1494# CONFIG_PC87413_WDT is not set
1358# CONFIG_60XX_WDT is not set 1495# CONFIG_60XX_WDT is not set
1359# CONFIG_SBC8360_WDT is not set 1496# CONFIG_SBC8360_WDT is not set
1360# CONFIG_CPU5_WDT is not set 1497# CONFIG_CPU5_WDT is not set
1498# CONFIG_SMSC_SCH311X_WDT is not set
1361# CONFIG_SMSC37B787_WDT is not set 1499# CONFIG_SMSC37B787_WDT is not set
1362# CONFIG_W83627HF_WDT is not set 1500# CONFIG_W83627HF_WDT is not set
1363# CONFIG_W83697HF_WDT is not set 1501# CONFIG_W83697HF_WDT is not set
1502# CONFIG_W83697UG_WDT is not set
1364# CONFIG_W83877F_WDT is not set 1503# CONFIG_W83877F_WDT is not set
1365# CONFIG_W83977F_WDT is not set 1504# CONFIG_W83977F_WDT is not set
1366# CONFIG_MACHZ_WDT is not set 1505# CONFIG_MACHZ_WDT is not set
@@ -1376,11 +1515,11 @@ CONFIG_WATCHDOG=y
1376# USB-based Watchdog Cards 1515# USB-based Watchdog Cards
1377# 1516#
1378# CONFIG_USBPCWATCHDOG is not set 1517# CONFIG_USBPCWATCHDOG is not set
1518CONFIG_SSB_POSSIBLE=y
1379 1519
1380# 1520#
1381# Sonics Silicon Backplane 1521# Sonics Silicon Backplane
1382# 1522#
1383CONFIG_SSB_POSSIBLE=y
1384# CONFIG_SSB is not set 1523# CONFIG_SSB is not set
1385 1524
1386# 1525#
@@ -1389,7 +1528,13 @@ CONFIG_SSB_POSSIBLE=y
1389# CONFIG_MFD_CORE is not set 1528# CONFIG_MFD_CORE is not set
1390# CONFIG_MFD_SM501 is not set 1529# CONFIG_MFD_SM501 is not set
1391# CONFIG_HTC_PASIC3 is not set 1530# CONFIG_HTC_PASIC3 is not set
1531# CONFIG_TWL4030_CORE is not set
1392# CONFIG_MFD_TMIO is not set 1532# CONFIG_MFD_TMIO is not set
1533# CONFIG_PMIC_DA903X is not set
1534# CONFIG_MFD_WM8400 is not set
1535# CONFIG_MFD_WM8350_I2C is not set
1536# CONFIG_MFD_PCF50633 is not set
1537# CONFIG_REGULATOR is not set
1393 1538
1394# 1539#
1395# Multimedia devices 1540# Multimedia devices
@@ -1423,6 +1568,7 @@ CONFIG_DRM=y
1423# CONFIG_DRM_I810 is not set 1568# CONFIG_DRM_I810 is not set
1424# CONFIG_DRM_I830 is not set 1569# CONFIG_DRM_I830 is not set
1425CONFIG_DRM_I915=y 1570CONFIG_DRM_I915=y
1571CONFIG_DRM_I915_KMS=y
1426# CONFIG_DRM_MGA is not set 1572# CONFIG_DRM_MGA is not set
1427# CONFIG_DRM_SIS is not set 1573# CONFIG_DRM_SIS is not set
1428# CONFIG_DRM_VIA is not set 1574# CONFIG_DRM_VIA is not set
@@ -1432,6 +1578,7 @@ CONFIG_DRM_I915=y
1432CONFIG_FB=y 1578CONFIG_FB=y
1433# CONFIG_FIRMWARE_EDID is not set 1579# CONFIG_FIRMWARE_EDID is not set
1434# CONFIG_FB_DDC is not set 1580# CONFIG_FB_DDC is not set
1581# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1435CONFIG_FB_CFB_FILLRECT=y 1582CONFIG_FB_CFB_FILLRECT=y
1436CONFIG_FB_CFB_COPYAREA=y 1583CONFIG_FB_CFB_COPYAREA=y
1437CONFIG_FB_CFB_IMAGEBLIT=y 1584CONFIG_FB_CFB_IMAGEBLIT=y
@@ -1460,7 +1607,6 @@ CONFIG_FB_TILEBLITTING=y
1460# CONFIG_FB_UVESA is not set 1607# CONFIG_FB_UVESA is not set
1461# CONFIG_FB_VESA is not set 1608# CONFIG_FB_VESA is not set
1462CONFIG_FB_EFI=y 1609CONFIG_FB_EFI=y
1463# CONFIG_FB_IMAC is not set
1464# CONFIG_FB_N411 is not set 1610# CONFIG_FB_N411 is not set
1465# CONFIG_FB_HGA is not set 1611# CONFIG_FB_HGA is not set
1466# CONFIG_FB_S1D13XXX is not set 1612# CONFIG_FB_S1D13XXX is not set
@@ -1475,6 +1621,7 @@ CONFIG_FB_EFI=y
1475# CONFIG_FB_S3 is not set 1621# CONFIG_FB_S3 is not set
1476# CONFIG_FB_SAVAGE is not set 1622# CONFIG_FB_SAVAGE is not set
1477# CONFIG_FB_SIS is not set 1623# CONFIG_FB_SIS is not set
1624# CONFIG_FB_VIA is not set
1478# CONFIG_FB_NEOMAGIC is not set 1625# CONFIG_FB_NEOMAGIC is not set
1479# CONFIG_FB_KYRO is not set 1626# CONFIG_FB_KYRO is not set
1480# CONFIG_FB_3DFX is not set 1627# CONFIG_FB_3DFX is not set
@@ -1486,12 +1633,15 @@ CONFIG_FB_EFI=y
1486# CONFIG_FB_CARMINE is not set 1633# CONFIG_FB_CARMINE is not set
1487# CONFIG_FB_GEODE is not set 1634# CONFIG_FB_GEODE is not set
1488# CONFIG_FB_VIRTUAL is not set 1635# CONFIG_FB_VIRTUAL is not set
1636# CONFIG_FB_METRONOME is not set
1637# CONFIG_FB_MB862XX is not set
1489CONFIG_BACKLIGHT_LCD_SUPPORT=y 1638CONFIG_BACKLIGHT_LCD_SUPPORT=y
1490# CONFIG_LCD_CLASS_DEVICE is not set 1639# CONFIG_LCD_CLASS_DEVICE is not set
1491CONFIG_BACKLIGHT_CLASS_DEVICE=y 1640CONFIG_BACKLIGHT_CLASS_DEVICE=y
1492# CONFIG_BACKLIGHT_CORGI is not set 1641CONFIG_BACKLIGHT_GENERIC=y
1493# CONFIG_BACKLIGHT_PROGEAR is not set 1642# CONFIG_BACKLIGHT_PROGEAR is not set
1494# CONFIG_BACKLIGHT_MBP_NVIDIA is not set 1643# CONFIG_BACKLIGHT_MBP_NVIDIA is not set
1644# CONFIG_BACKLIGHT_SAHARA is not set
1495 1645
1496# 1646#
1497# Display device support 1647# Display device support
@@ -1511,10 +1661,12 @@ CONFIG_LOGO=y
1511# CONFIG_LOGO_LINUX_VGA16 is not set 1661# CONFIG_LOGO_LINUX_VGA16 is not set
1512CONFIG_LOGO_LINUX_CLUT224=y 1662CONFIG_LOGO_LINUX_CLUT224=y
1513CONFIG_SOUND=y 1663CONFIG_SOUND=y
1664CONFIG_SOUND_OSS_CORE=y
1514CONFIG_SND=y 1665CONFIG_SND=y
1515CONFIG_SND_TIMER=y 1666CONFIG_SND_TIMER=y
1516CONFIG_SND_PCM=y 1667CONFIG_SND_PCM=y
1517CONFIG_SND_HWDEP=y 1668CONFIG_SND_HWDEP=y
1669CONFIG_SND_JACK=y
1518CONFIG_SND_SEQUENCER=y 1670CONFIG_SND_SEQUENCER=y
1519CONFIG_SND_SEQ_DUMMY=y 1671CONFIG_SND_SEQ_DUMMY=y
1520CONFIG_SND_OSSEMUL=y 1672CONFIG_SND_OSSEMUL=y
@@ -1522,6 +1674,8 @@ CONFIG_SND_MIXER_OSS=y
1522CONFIG_SND_PCM_OSS=y 1674CONFIG_SND_PCM_OSS=y
1523CONFIG_SND_PCM_OSS_PLUGINS=y 1675CONFIG_SND_PCM_OSS_PLUGINS=y
1524CONFIG_SND_SEQUENCER_OSS=y 1676CONFIG_SND_SEQUENCER_OSS=y
1677CONFIG_SND_HRTIMER=y
1678CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
1525CONFIG_SND_DYNAMIC_MINORS=y 1679CONFIG_SND_DYNAMIC_MINORS=y
1526CONFIG_SND_SUPPORT_OLD_API=y 1680CONFIG_SND_SUPPORT_OLD_API=y
1527CONFIG_SND_VERBOSE_PROCFS=y 1681CONFIG_SND_VERBOSE_PROCFS=y
@@ -1575,11 +1729,16 @@ CONFIG_SND_PCI=y
1575# CONFIG_SND_FM801 is not set 1729# CONFIG_SND_FM801 is not set
1576CONFIG_SND_HDA_INTEL=y 1730CONFIG_SND_HDA_INTEL=y
1577CONFIG_SND_HDA_HWDEP=y 1731CONFIG_SND_HDA_HWDEP=y
1732# CONFIG_SND_HDA_RECONFIG is not set
1733# CONFIG_SND_HDA_INPUT_BEEP is not set
1578CONFIG_SND_HDA_CODEC_REALTEK=y 1734CONFIG_SND_HDA_CODEC_REALTEK=y
1579CONFIG_SND_HDA_CODEC_ANALOG=y 1735CONFIG_SND_HDA_CODEC_ANALOG=y
1580CONFIG_SND_HDA_CODEC_SIGMATEL=y 1736CONFIG_SND_HDA_CODEC_SIGMATEL=y
1581CONFIG_SND_HDA_CODEC_VIA=y 1737CONFIG_SND_HDA_CODEC_VIA=y
1582CONFIG_SND_HDA_CODEC_ATIHDMI=y 1738CONFIG_SND_HDA_CODEC_ATIHDMI=y
1739CONFIG_SND_HDA_CODEC_NVHDMI=y
1740CONFIG_SND_HDA_CODEC_INTELHDMI=y
1741CONFIG_SND_HDA_ELD=y
1583CONFIG_SND_HDA_CODEC_CONEXANT=y 1742CONFIG_SND_HDA_CODEC_CONEXANT=y
1584CONFIG_SND_HDA_CODEC_CMEDIA=y 1743CONFIG_SND_HDA_CODEC_CMEDIA=y
1585CONFIG_SND_HDA_CODEC_SI3054=y 1744CONFIG_SND_HDA_CODEC_SI3054=y
@@ -1612,6 +1771,7 @@ CONFIG_SND_USB=y
1612# CONFIG_SND_USB_AUDIO is not set 1771# CONFIG_SND_USB_AUDIO is not set
1613# CONFIG_SND_USB_USX2Y is not set 1772# CONFIG_SND_USB_USX2Y is not set
1614# CONFIG_SND_USB_CAIAQ is not set 1773# CONFIG_SND_USB_CAIAQ is not set
1774# CONFIG_SND_USB_US122L is not set
1615CONFIG_SND_PCMCIA=y 1775CONFIG_SND_PCMCIA=y
1616# CONFIG_SND_VXPOCKET is not set 1776# CONFIG_SND_VXPOCKET is not set
1617# CONFIG_SND_PDAUDIOCF is not set 1777# CONFIG_SND_PDAUDIOCF is not set
@@ -1626,15 +1786,37 @@ CONFIG_HIDRAW=y
1626# USB Input Devices 1786# USB Input Devices
1627# 1787#
1628CONFIG_USB_HID=y 1788CONFIG_USB_HID=y
1629CONFIG_USB_HIDINPUT_POWERBOOK=y
1630CONFIG_HID_FF=y
1631CONFIG_HID_PID=y 1789CONFIG_HID_PID=y
1790CONFIG_USB_HIDDEV=y
1791
1792#
1793# Special HID drivers
1794#
1795CONFIG_HID_COMPAT=y
1796CONFIG_HID_A4TECH=y
1797CONFIG_HID_APPLE=y
1798CONFIG_HID_BELKIN=y
1799CONFIG_HID_CHERRY=y
1800CONFIG_HID_CHICONY=y
1801CONFIG_HID_CYPRESS=y
1802CONFIG_HID_EZKEY=y
1803CONFIG_HID_GYRATION=y
1804CONFIG_HID_LOGITECH=y
1632CONFIG_LOGITECH_FF=y 1805CONFIG_LOGITECH_FF=y
1633# CONFIG_LOGIRUMBLEPAD2_FF is not set 1806# CONFIG_LOGIRUMBLEPAD2_FF is not set
1807CONFIG_HID_MICROSOFT=y
1808CONFIG_HID_MONTEREY=y
1809CONFIG_HID_NTRIG=y
1810CONFIG_HID_PANTHERLORD=y
1634CONFIG_PANTHERLORD_FF=y 1811CONFIG_PANTHERLORD_FF=y
1812CONFIG_HID_PETALYNX=y
1813CONFIG_HID_SAMSUNG=y
1814CONFIG_HID_SONY=y
1815CONFIG_HID_SUNPLUS=y
1816# CONFIG_GREENASIA_FF is not set
1817CONFIG_HID_TOPSEED=y
1635CONFIG_THRUSTMASTER_FF=y 1818CONFIG_THRUSTMASTER_FF=y
1636CONFIG_ZEROPLUS_FF=y 1819CONFIG_ZEROPLUS_FF=y
1637CONFIG_USB_HIDDEV=y
1638CONFIG_USB_SUPPORT=y 1820CONFIG_USB_SUPPORT=y
1639CONFIG_USB_ARCH_HAS_HCD=y 1821CONFIG_USB_ARCH_HAS_HCD=y
1640CONFIG_USB_ARCH_HAS_OHCI=y 1822CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1652,6 +1834,8 @@ CONFIG_USB_DEVICEFS=y
1652CONFIG_USB_SUSPEND=y 1834CONFIG_USB_SUSPEND=y
1653# CONFIG_USB_OTG is not set 1835# CONFIG_USB_OTG is not set
1654CONFIG_USB_MON=y 1836CONFIG_USB_MON=y
1837# CONFIG_USB_WUSB is not set
1838# CONFIG_USB_WUSB_CBAF is not set
1655 1839
1656# 1840#
1657# USB Host Controller Drivers 1841# USB Host Controller Drivers
@@ -1660,6 +1844,7 @@ CONFIG_USB_MON=y
1660CONFIG_USB_EHCI_HCD=y 1844CONFIG_USB_EHCI_HCD=y
1661# CONFIG_USB_EHCI_ROOT_HUB_TT is not set 1845# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1662# CONFIG_USB_EHCI_TT_NEWSCHED is not set 1846# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1847# CONFIG_USB_OXU210HP_HCD is not set
1663# CONFIG_USB_ISP116X_HCD is not set 1848# CONFIG_USB_ISP116X_HCD is not set
1664# CONFIG_USB_ISP1760_HCD is not set 1849# CONFIG_USB_ISP1760_HCD is not set
1665CONFIG_USB_OHCI_HCD=y 1850CONFIG_USB_OHCI_HCD=y
@@ -1669,6 +1854,8 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1669CONFIG_USB_UHCI_HCD=y 1854CONFIG_USB_UHCI_HCD=y
1670# CONFIG_USB_SL811_HCD is not set 1855# CONFIG_USB_SL811_HCD is not set
1671# CONFIG_USB_R8A66597_HCD is not set 1856# CONFIG_USB_R8A66597_HCD is not set
1857# CONFIG_USB_WHCI_HCD is not set
1858# CONFIG_USB_HWA_HCD is not set
1672 1859
1673# 1860#
1674# USB Device Class drivers 1861# USB Device Class drivers
@@ -1676,20 +1863,20 @@ CONFIG_USB_UHCI_HCD=y
1676# CONFIG_USB_ACM is not set 1863# CONFIG_USB_ACM is not set
1677CONFIG_USB_PRINTER=y 1864CONFIG_USB_PRINTER=y
1678# CONFIG_USB_WDM is not set 1865# CONFIG_USB_WDM is not set
1866# CONFIG_USB_TMC is not set
1679 1867
1680# 1868#
1681# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1869# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1682# 1870#
1683 1871
1684# 1872#
1685# may also be needed; see USB_STORAGE Help for more information 1873# see USB_STORAGE Help for more information
1686# 1874#
1687CONFIG_USB_STORAGE=y 1875CONFIG_USB_STORAGE=y
1688# CONFIG_USB_STORAGE_DEBUG is not set 1876# CONFIG_USB_STORAGE_DEBUG is not set
1689# CONFIG_USB_STORAGE_DATAFAB is not set 1877# CONFIG_USB_STORAGE_DATAFAB is not set
1690# CONFIG_USB_STORAGE_FREECOM is not set 1878# CONFIG_USB_STORAGE_FREECOM is not set
1691# CONFIG_USB_STORAGE_ISD200 is not set 1879# CONFIG_USB_STORAGE_ISD200 is not set
1692# CONFIG_USB_STORAGE_DPCM is not set
1693# CONFIG_USB_STORAGE_USBAT is not set 1880# CONFIG_USB_STORAGE_USBAT is not set
1694# CONFIG_USB_STORAGE_SDDR09 is not set 1881# CONFIG_USB_STORAGE_SDDR09 is not set
1695# CONFIG_USB_STORAGE_SDDR55 is not set 1882# CONFIG_USB_STORAGE_SDDR55 is not set
@@ -1697,7 +1884,6 @@ CONFIG_USB_STORAGE=y
1697# CONFIG_USB_STORAGE_ALAUDA is not set 1884# CONFIG_USB_STORAGE_ALAUDA is not set
1698# CONFIG_USB_STORAGE_ONETOUCH is not set 1885# CONFIG_USB_STORAGE_ONETOUCH is not set
1699# CONFIG_USB_STORAGE_KARMA is not set 1886# CONFIG_USB_STORAGE_KARMA is not set
1700# CONFIG_USB_STORAGE_SIERRA is not set
1701# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set 1887# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1702CONFIG_USB_LIBUSUAL=y 1888CONFIG_USB_LIBUSUAL=y
1703 1889
@@ -1718,6 +1904,7 @@ CONFIG_USB_LIBUSUAL=y
1718# CONFIG_USB_EMI62 is not set 1904# CONFIG_USB_EMI62 is not set
1719# CONFIG_USB_EMI26 is not set 1905# CONFIG_USB_EMI26 is not set
1720# CONFIG_USB_ADUTUX is not set 1906# CONFIG_USB_ADUTUX is not set
1907# CONFIG_USB_SEVSEG is not set
1721# CONFIG_USB_RIO500 is not set 1908# CONFIG_USB_RIO500 is not set
1722# CONFIG_USB_LEGOTOWER is not set 1909# CONFIG_USB_LEGOTOWER is not set
1723# CONFIG_USB_LCD is not set 1910# CONFIG_USB_LCD is not set
@@ -1735,7 +1922,13 @@ CONFIG_USB_LIBUSUAL=y
1735# CONFIG_USB_IOWARRIOR is not set 1922# CONFIG_USB_IOWARRIOR is not set
1736# CONFIG_USB_TEST is not set 1923# CONFIG_USB_TEST is not set
1737# CONFIG_USB_ISIGHTFW is not set 1924# CONFIG_USB_ISIGHTFW is not set
1925# CONFIG_USB_VST is not set
1738# CONFIG_USB_GADGET is not set 1926# CONFIG_USB_GADGET is not set
1927
1928#
1929# OTG and related infrastructure
1930#
1931# CONFIG_UWB is not set
1739# CONFIG_MMC is not set 1932# CONFIG_MMC is not set
1740# CONFIG_MEMSTICK is not set 1933# CONFIG_MEMSTICK is not set
1741CONFIG_NEW_LEDS=y 1934CONFIG_NEW_LEDS=y
@@ -1744,6 +1937,7 @@ CONFIG_LEDS_CLASS=y
1744# 1937#
1745# LED drivers 1938# LED drivers
1746# 1939#
1940# CONFIG_LEDS_ALIX2 is not set
1747# CONFIG_LEDS_PCA9532 is not set 1941# CONFIG_LEDS_PCA9532 is not set
1748# CONFIG_LEDS_CLEVO_MAIL is not set 1942# CONFIG_LEDS_CLEVO_MAIL is not set
1749# CONFIG_LEDS_PCA955X is not set 1943# CONFIG_LEDS_PCA955X is not set
@@ -1754,6 +1948,7 @@ CONFIG_LEDS_CLASS=y
1754CONFIG_LEDS_TRIGGERS=y 1948CONFIG_LEDS_TRIGGERS=y
1755# CONFIG_LEDS_TRIGGER_TIMER is not set 1949# CONFIG_LEDS_TRIGGER_TIMER is not set
1756# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set 1950# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
1951# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
1757# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set 1952# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1758# CONFIG_ACCESSIBILITY is not set 1953# CONFIG_ACCESSIBILITY is not set
1759# CONFIG_INFINIBAND is not set 1954# CONFIG_INFINIBAND is not set
@@ -1793,6 +1988,7 @@ CONFIG_RTC_INTF_DEV=y
1793# CONFIG_RTC_DRV_M41T80 is not set 1988# CONFIG_RTC_DRV_M41T80 is not set
1794# CONFIG_RTC_DRV_S35390A is not set 1989# CONFIG_RTC_DRV_S35390A is not set
1795# CONFIG_RTC_DRV_FM3130 is not set 1990# CONFIG_RTC_DRV_FM3130 is not set
1991# CONFIG_RTC_DRV_RX8581 is not set
1796 1992
1797# 1993#
1798# SPI RTC drivers 1994# SPI RTC drivers
@@ -1802,12 +1998,15 @@ CONFIG_RTC_INTF_DEV=y
1802# Platform RTC drivers 1998# Platform RTC drivers
1803# 1999#
1804CONFIG_RTC_DRV_CMOS=y 2000CONFIG_RTC_DRV_CMOS=y
2001# CONFIG_RTC_DRV_DS1286 is not set
1805# CONFIG_RTC_DRV_DS1511 is not set 2002# CONFIG_RTC_DRV_DS1511 is not set
1806# CONFIG_RTC_DRV_DS1553 is not set 2003# CONFIG_RTC_DRV_DS1553 is not set
1807# CONFIG_RTC_DRV_DS1742 is not set 2004# CONFIG_RTC_DRV_DS1742 is not set
1808# CONFIG_RTC_DRV_STK17TA8 is not set 2005# CONFIG_RTC_DRV_STK17TA8 is not set
1809# CONFIG_RTC_DRV_M48T86 is not set 2006# CONFIG_RTC_DRV_M48T86 is not set
2007# CONFIG_RTC_DRV_M48T35 is not set
1810# CONFIG_RTC_DRV_M48T59 is not set 2008# CONFIG_RTC_DRV_M48T59 is not set
2009# CONFIG_RTC_DRV_BQ4802 is not set
1811# CONFIG_RTC_DRV_V3020 is not set 2010# CONFIG_RTC_DRV_V3020 is not set
1812 2011
1813# 2012#
@@ -1820,6 +2019,21 @@ CONFIG_DMADEVICES=y
1820# 2019#
1821# CONFIG_INTEL_IOATDMA is not set 2020# CONFIG_INTEL_IOATDMA is not set
1822# CONFIG_UIO is not set 2021# CONFIG_UIO is not set
2022# CONFIG_STAGING is not set
2023CONFIG_X86_PLATFORM_DEVICES=y
2024# CONFIG_ACER_WMI is not set
2025# CONFIG_ASUS_LAPTOP is not set
2026# CONFIG_FUJITSU_LAPTOP is not set
2027# CONFIG_MSI_LAPTOP is not set
2028# CONFIG_PANASONIC_LAPTOP is not set
2029# CONFIG_COMPAL_LAPTOP is not set
2030# CONFIG_SONY_LAPTOP is not set
2031# CONFIG_THINKPAD_ACPI is not set
2032# CONFIG_INTEL_MENLOW is not set
2033CONFIG_EEEPC_LAPTOP=y
2034# CONFIG_ACPI_WMI is not set
2035# CONFIG_ACPI_ASUS is not set
2036# CONFIG_ACPI_TOSHIBA is not set
1823 2037
1824# 2038#
1825# Firmware Drivers 2039# Firmware Drivers
@@ -1830,8 +2044,7 @@ CONFIG_EFI_VARS=y
1830# CONFIG_DELL_RBU is not set 2044# CONFIG_DELL_RBU is not set
1831# CONFIG_DCDBAS is not set 2045# CONFIG_DCDBAS is not set
1832CONFIG_DMIID=y 2046CONFIG_DMIID=y
1833CONFIG_ISCSI_IBFT_FIND=y 2047# CONFIG_ISCSI_IBFT_FIND is not set
1834CONFIG_ISCSI_IBFT=y
1835 2048
1836# 2049#
1837# File systems 2050# File systems
@@ -1841,22 +2054,25 @@ CONFIG_EXT3_FS=y
1841CONFIG_EXT3_FS_XATTR=y 2054CONFIG_EXT3_FS_XATTR=y
1842CONFIG_EXT3_FS_POSIX_ACL=y 2055CONFIG_EXT3_FS_POSIX_ACL=y
1843CONFIG_EXT3_FS_SECURITY=y 2056CONFIG_EXT3_FS_SECURITY=y
1844# CONFIG_EXT4DEV_FS is not set 2057# CONFIG_EXT4_FS is not set
1845CONFIG_JBD=y 2058CONFIG_JBD=y
1846# CONFIG_JBD_DEBUG is not set 2059# CONFIG_JBD_DEBUG is not set
1847CONFIG_FS_MBCACHE=y 2060CONFIG_FS_MBCACHE=y
1848# CONFIG_REISERFS_FS is not set 2061# CONFIG_REISERFS_FS is not set
1849# CONFIG_JFS_FS is not set 2062# CONFIG_JFS_FS is not set
1850CONFIG_FS_POSIX_ACL=y 2063CONFIG_FS_POSIX_ACL=y
2064CONFIG_FILE_LOCKING=y
1851# CONFIG_XFS_FS is not set 2065# CONFIG_XFS_FS is not set
1852# CONFIG_GFS2_FS is not set 2066# CONFIG_GFS2_FS is not set
1853# CONFIG_OCFS2_FS is not set 2067# CONFIG_OCFS2_FS is not set
2068# CONFIG_BTRFS_FS is not set
1854CONFIG_DNOTIFY=y 2069CONFIG_DNOTIFY=y
1855CONFIG_INOTIFY=y 2070CONFIG_INOTIFY=y
1856CONFIG_INOTIFY_USER=y 2071CONFIG_INOTIFY_USER=y
1857CONFIG_QUOTA=y 2072CONFIG_QUOTA=y
1858CONFIG_QUOTA_NETLINK_INTERFACE=y 2073CONFIG_QUOTA_NETLINK_INTERFACE=y
1859# CONFIG_PRINT_QUOTA_WARNING is not set 2074# CONFIG_PRINT_QUOTA_WARNING is not set
2075CONFIG_QUOTA_TREE=y
1860# CONFIG_QFMT_V1 is not set 2076# CONFIG_QFMT_V1 is not set
1861CONFIG_QFMT_V2=y 2077CONFIG_QFMT_V2=y
1862CONFIG_QUOTACTL=y 2078CONFIG_QUOTACTL=y
@@ -1890,16 +2106,14 @@ CONFIG_PROC_FS=y
1890CONFIG_PROC_KCORE=y 2106CONFIG_PROC_KCORE=y
1891CONFIG_PROC_VMCORE=y 2107CONFIG_PROC_VMCORE=y
1892CONFIG_PROC_SYSCTL=y 2108CONFIG_PROC_SYSCTL=y
2109CONFIG_PROC_PAGE_MONITOR=y
1893CONFIG_SYSFS=y 2110CONFIG_SYSFS=y
1894CONFIG_TMPFS=y 2111CONFIG_TMPFS=y
1895CONFIG_TMPFS_POSIX_ACL=y 2112CONFIG_TMPFS_POSIX_ACL=y
1896CONFIG_HUGETLBFS=y 2113CONFIG_HUGETLBFS=y
1897CONFIG_HUGETLB_PAGE=y 2114CONFIG_HUGETLB_PAGE=y
1898# CONFIG_CONFIGFS_FS is not set 2115# CONFIG_CONFIGFS_FS is not set
1899 2116CONFIG_MISC_FILESYSTEMS=y
1900#
1901# Miscellaneous filesystems
1902#
1903# CONFIG_ADFS_FS is not set 2117# CONFIG_ADFS_FS is not set
1904# CONFIG_AFFS_FS is not set 2118# CONFIG_AFFS_FS is not set
1905# CONFIG_ECRYPT_FS is not set 2119# CONFIG_ECRYPT_FS is not set
@@ -1909,6 +2123,7 @@ CONFIG_HUGETLB_PAGE=y
1909# CONFIG_BFS_FS is not set 2123# CONFIG_BFS_FS is not set
1910# CONFIG_EFS_FS is not set 2124# CONFIG_EFS_FS is not set
1911# CONFIG_CRAMFS is not set 2125# CONFIG_CRAMFS is not set
2126# CONFIG_SQUASHFS is not set
1912# CONFIG_VXFS_FS is not set 2127# CONFIG_VXFS_FS is not set
1913# CONFIG_MINIX_FS is not set 2128# CONFIG_MINIX_FS is not set
1914# CONFIG_OMFS_FS is not set 2129# CONFIG_OMFS_FS is not set
@@ -1930,6 +2145,7 @@ CONFIG_NFS_ACL_SUPPORT=y
1930CONFIG_NFS_COMMON=y 2145CONFIG_NFS_COMMON=y
1931CONFIG_SUNRPC=y 2146CONFIG_SUNRPC=y
1932CONFIG_SUNRPC_GSS=y 2147CONFIG_SUNRPC_GSS=y
2148# CONFIG_SUNRPC_REGISTER_V4 is not set
1933CONFIG_RPCSEC_GSS_KRB5=y 2149CONFIG_RPCSEC_GSS_KRB5=y
1934# CONFIG_RPCSEC_GSS_SPKM3 is not set 2150# CONFIG_RPCSEC_GSS_SPKM3 is not set
1935# CONFIG_SMB_FS is not set 2151# CONFIG_SMB_FS is not set
@@ -2006,7 +2222,7 @@ CONFIG_NLS_UTF8=y
2006# 2222#
2007CONFIG_TRACE_IRQFLAGS_SUPPORT=y 2223CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2008CONFIG_PRINTK_TIME=y 2224CONFIG_PRINTK_TIME=y
2009CONFIG_ENABLE_WARN_DEPRECATED=y 2225# CONFIG_ENABLE_WARN_DEPRECATED is not set
2010CONFIG_ENABLE_MUST_CHECK=y 2226CONFIG_ENABLE_MUST_CHECK=y
2011CONFIG_FRAME_WARN=2048 2227CONFIG_FRAME_WARN=2048
2012CONFIG_MAGIC_SYSRQ=y 2228CONFIG_MAGIC_SYSRQ=y
@@ -2035,40 +2251,60 @@ CONFIG_TIMER_STATS=y
2035CONFIG_DEBUG_BUGVERBOSE=y 2251CONFIG_DEBUG_BUGVERBOSE=y
2036# CONFIG_DEBUG_INFO is not set 2252# CONFIG_DEBUG_INFO is not set
2037# CONFIG_DEBUG_VM is not set 2253# CONFIG_DEBUG_VM is not set
2254# CONFIG_DEBUG_VIRTUAL is not set
2038# CONFIG_DEBUG_WRITECOUNT is not set 2255# CONFIG_DEBUG_WRITECOUNT is not set
2039CONFIG_DEBUG_MEMORY_INIT=y 2256CONFIG_DEBUG_MEMORY_INIT=y
2040# CONFIG_DEBUG_LIST is not set 2257# CONFIG_DEBUG_LIST is not set
2041# CONFIG_DEBUG_SG is not set 2258# CONFIG_DEBUG_SG is not set
2259# CONFIG_DEBUG_NOTIFIERS is not set
2260CONFIG_ARCH_WANT_FRAME_POINTERS=y
2042CONFIG_FRAME_POINTER=y 2261CONFIG_FRAME_POINTER=y
2043# CONFIG_BOOT_PRINTK_DELAY is not set 2262# CONFIG_BOOT_PRINTK_DELAY is not set
2044# CONFIG_RCU_TORTURE_TEST is not set 2263# CONFIG_RCU_TORTURE_TEST is not set
2264# CONFIG_RCU_CPU_STALL_DETECTOR is not set
2045# CONFIG_KPROBES_SANITY_TEST is not set 2265# CONFIG_KPROBES_SANITY_TEST is not set
2046# CONFIG_BACKTRACE_SELF_TEST is not set 2266# CONFIG_BACKTRACE_SELF_TEST is not set
2267# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
2047# CONFIG_LKDTM is not set 2268# CONFIG_LKDTM is not set
2048# CONFIG_FAULT_INJECTION is not set 2269# CONFIG_FAULT_INJECTION is not set
2049# CONFIG_LATENCYTOP is not set 2270# CONFIG_LATENCYTOP is not set
2050CONFIG_SYSCTL_SYSCALL_CHECK=y 2271CONFIG_SYSCTL_SYSCALL_CHECK=y
2051CONFIG_HAVE_FTRACE=y 2272CONFIG_USER_STACKTRACE_SUPPORT=y
2273CONFIG_HAVE_FUNCTION_TRACER=y
2274CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
2275CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
2052CONFIG_HAVE_DYNAMIC_FTRACE=y 2276CONFIG_HAVE_DYNAMIC_FTRACE=y
2053# CONFIG_FTRACE is not set 2277CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
2278CONFIG_HAVE_HW_BRANCH_TRACER=y
2279
2280#
2281# Tracers
2282#
2283# CONFIG_FUNCTION_TRACER is not set
2054# CONFIG_IRQSOFF_TRACER is not set 2284# CONFIG_IRQSOFF_TRACER is not set
2055# CONFIG_SYSPROF_TRACER is not set 2285# CONFIG_SYSPROF_TRACER is not set
2056# CONFIG_SCHED_TRACER is not set 2286# CONFIG_SCHED_TRACER is not set
2057# CONFIG_CONTEXT_SWITCH_TRACER is not set 2287# CONFIG_CONTEXT_SWITCH_TRACER is not set
2288# CONFIG_BOOT_TRACER is not set
2289# CONFIG_TRACE_BRANCH_PROFILING is not set
2290# CONFIG_POWER_TRACER is not set
2291# CONFIG_STACK_TRACER is not set
2292# CONFIG_HW_BRANCH_TRACER is not set
2058CONFIG_PROVIDE_OHCI1394_DMA_INIT=y 2293CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
2294# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
2059# CONFIG_SAMPLES is not set 2295# CONFIG_SAMPLES is not set
2060CONFIG_HAVE_ARCH_KGDB=y 2296CONFIG_HAVE_ARCH_KGDB=y
2061# CONFIG_KGDB is not set 2297# CONFIG_KGDB is not set
2062# CONFIG_STRICT_DEVMEM is not set 2298# CONFIG_STRICT_DEVMEM is not set
2063CONFIG_X86_VERBOSE_BOOTUP=y 2299CONFIG_X86_VERBOSE_BOOTUP=y
2064CONFIG_EARLY_PRINTK=y 2300CONFIG_EARLY_PRINTK=y
2301CONFIG_EARLY_PRINTK_DBGP=y
2065CONFIG_DEBUG_STACKOVERFLOW=y 2302CONFIG_DEBUG_STACKOVERFLOW=y
2066CONFIG_DEBUG_STACK_USAGE=y 2303CONFIG_DEBUG_STACK_USAGE=y
2067# CONFIG_DEBUG_PAGEALLOC is not set 2304# CONFIG_DEBUG_PAGEALLOC is not set
2068# CONFIG_DEBUG_PER_CPU_MAPS is not set 2305# CONFIG_DEBUG_PER_CPU_MAPS is not set
2069# CONFIG_X86_PTDUMP is not set 2306# CONFIG_X86_PTDUMP is not set
2070CONFIG_DEBUG_RODATA=y 2307CONFIG_DEBUG_RODATA=y
2071# CONFIG_DIRECT_GBPAGES is not set
2072# CONFIG_DEBUG_RODATA_TEST is not set 2308# CONFIG_DEBUG_RODATA_TEST is not set
2073CONFIG_DEBUG_NX_TEST=m 2309CONFIG_DEBUG_NX_TEST=m
2074# CONFIG_IOMMU_DEBUG is not set 2310# CONFIG_IOMMU_DEBUG is not set
@@ -2092,8 +2328,10 @@ CONFIG_OPTIMIZE_INLINING=y
2092CONFIG_KEYS=y 2328CONFIG_KEYS=y
2093CONFIG_KEYS_DEBUG_PROC_KEYS=y 2329CONFIG_KEYS_DEBUG_PROC_KEYS=y
2094CONFIG_SECURITY=y 2330CONFIG_SECURITY=y
2331# CONFIG_SECURITYFS is not set
2095CONFIG_SECURITY_NETWORK=y 2332CONFIG_SECURITY_NETWORK=y
2096# CONFIG_SECURITY_NETWORK_XFRM is not set 2333# CONFIG_SECURITY_NETWORK_XFRM is not set
2334# CONFIG_SECURITY_PATH is not set
2097CONFIG_SECURITY_FILE_CAPABILITIES=y 2335CONFIG_SECURITY_FILE_CAPABILITIES=y
2098# CONFIG_SECURITY_ROOTPLUG is not set 2336# CONFIG_SECURITY_ROOTPLUG is not set
2099CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536 2337CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536
@@ -2104,7 +2342,6 @@ CONFIG_SECURITY_SELINUX_DISABLE=y
2104CONFIG_SECURITY_SELINUX_DEVELOP=y 2342CONFIG_SECURITY_SELINUX_DEVELOP=y
2105CONFIG_SECURITY_SELINUX_AVC_STATS=y 2343CONFIG_SECURITY_SELINUX_AVC_STATS=y
2106CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 2344CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
2107# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
2108# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set 2345# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
2109# CONFIG_SECURITY_SMACK is not set 2346# CONFIG_SECURITY_SMACK is not set
2110CONFIG_CRYPTO=y 2347CONFIG_CRYPTO=y
@@ -2112,11 +2349,18 @@ CONFIG_CRYPTO=y
2112# 2349#
2113# Crypto core or helper 2350# Crypto core or helper
2114# 2351#
2352# CONFIG_CRYPTO_FIPS is not set
2115CONFIG_CRYPTO_ALGAPI=y 2353CONFIG_CRYPTO_ALGAPI=y
2354CONFIG_CRYPTO_ALGAPI2=y
2116CONFIG_CRYPTO_AEAD=y 2355CONFIG_CRYPTO_AEAD=y
2356CONFIG_CRYPTO_AEAD2=y
2117CONFIG_CRYPTO_BLKCIPHER=y 2357CONFIG_CRYPTO_BLKCIPHER=y
2358CONFIG_CRYPTO_BLKCIPHER2=y
2118CONFIG_CRYPTO_HASH=y 2359CONFIG_CRYPTO_HASH=y
2360CONFIG_CRYPTO_HASH2=y
2361CONFIG_CRYPTO_RNG2=y
2119CONFIG_CRYPTO_MANAGER=y 2362CONFIG_CRYPTO_MANAGER=y
2363CONFIG_CRYPTO_MANAGER2=y
2120# CONFIG_CRYPTO_GF128MUL is not set 2364# CONFIG_CRYPTO_GF128MUL is not set
2121# CONFIG_CRYPTO_NULL is not set 2365# CONFIG_CRYPTO_NULL is not set
2122# CONFIG_CRYPTO_CRYPTD is not set 2366# CONFIG_CRYPTO_CRYPTD is not set
@@ -2151,6 +2395,7 @@ CONFIG_CRYPTO_HMAC=y
2151# Digest 2395# Digest
2152# 2396#
2153# CONFIG_CRYPTO_CRC32C is not set 2397# CONFIG_CRYPTO_CRC32C is not set
2398# CONFIG_CRYPTO_CRC32C_INTEL is not set
2154# CONFIG_CRYPTO_MD4 is not set 2399# CONFIG_CRYPTO_MD4 is not set
2155CONFIG_CRYPTO_MD5=y 2400CONFIG_CRYPTO_MD5=y
2156# CONFIG_CRYPTO_MICHAEL_MIC is not set 2401# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -2191,6 +2436,11 @@ CONFIG_CRYPTO_DES=y
2191# 2436#
2192# CONFIG_CRYPTO_DEFLATE is not set 2437# CONFIG_CRYPTO_DEFLATE is not set
2193# CONFIG_CRYPTO_LZO is not set 2438# CONFIG_CRYPTO_LZO is not set
2439
2440#
2441# Random Number Generation
2442#
2443# CONFIG_CRYPTO_ANSI_CPRNG is not set
2194CONFIG_CRYPTO_HW=y 2444CONFIG_CRYPTO_HW=y
2195# CONFIG_CRYPTO_DEV_HIFN_795X is not set 2445# CONFIG_CRYPTO_DEV_HIFN_795X is not set
2196CONFIG_HAVE_KVM=y 2446CONFIG_HAVE_KVM=y
@@ -2205,6 +2455,7 @@ CONFIG_VIRTUALIZATION=y
2205CONFIG_BITREVERSE=y 2455CONFIG_BITREVERSE=y
2206CONFIG_GENERIC_FIND_FIRST_BIT=y 2456CONFIG_GENERIC_FIND_FIRST_BIT=y
2207CONFIG_GENERIC_FIND_NEXT_BIT=y 2457CONFIG_GENERIC_FIND_NEXT_BIT=y
2458CONFIG_GENERIC_FIND_LAST_BIT=y
2208# CONFIG_CRC_CCITT is not set 2459# CONFIG_CRC_CCITT is not set
2209# CONFIG_CRC16 is not set 2460# CONFIG_CRC16 is not set
2210CONFIG_CRC_T10DIF=y 2461CONFIG_CRC_T10DIF=y
diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c
index 9dabd00e9805..588a7aa937e1 100644
--- a/arch/x86/ia32/ia32_signal.c
+++ b/arch/x86/ia32/ia32_signal.c
@@ -33,8 +33,6 @@
33#include <asm/sigframe.h> 33#include <asm/sigframe.h>
34#include <asm/sys_ia32.h> 34#include <asm/sys_ia32.h>
35 35
36#define DEBUG_SIG 0
37
38#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 36#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
39 37
40#define FIX_EFLAGS (X86_EFLAGS_AC | X86_EFLAGS_OF | \ 38#define FIX_EFLAGS (X86_EFLAGS_AC | X86_EFLAGS_OF | \
@@ -46,78 +44,83 @@ void signal_fault(struct pt_regs *regs, void __user *frame, char *where);
46 44
47int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from) 45int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)
48{ 46{
49 int err; 47 int err = 0;
50 48
51 if (!access_ok(VERIFY_WRITE, to, sizeof(compat_siginfo_t))) 49 if (!access_ok(VERIFY_WRITE, to, sizeof(compat_siginfo_t)))
52 return -EFAULT; 50 return -EFAULT;
53 51
54 /* If you change siginfo_t structure, please make sure that 52 put_user_try {
55 this code is fixed accordingly. 53 /* If you change siginfo_t structure, please make sure that
56 It should never copy any pad contained in the structure 54 this code is fixed accordingly.
57 to avoid security leaks, but must copy the generic 55 It should never copy any pad contained in the structure
58 3 ints plus the relevant union member. */ 56 to avoid security leaks, but must copy the generic
59 err = __put_user(from->si_signo, &to->si_signo); 57 3 ints plus the relevant union member. */
60 err |= __put_user(from->si_errno, &to->si_errno); 58 put_user_ex(from->si_signo, &to->si_signo);
61 err |= __put_user((short)from->si_code, &to->si_code); 59 put_user_ex(from->si_errno, &to->si_errno);
62 60 put_user_ex((short)from->si_code, &to->si_code);
63 if (from->si_code < 0) { 61
64 err |= __put_user(from->si_pid, &to->si_pid); 62 if (from->si_code < 0) {
65 err |= __put_user(from->si_uid, &to->si_uid); 63 put_user_ex(from->si_pid, &to->si_pid);
66 err |= __put_user(ptr_to_compat(from->si_ptr), &to->si_ptr); 64 put_user_ex(from->si_uid, &to->si_uid);
67 } else { 65 put_user_ex(ptr_to_compat(from->si_ptr), &to->si_ptr);
68 /* 66 } else {
69 * First 32bits of unions are always present: 67 /*
70 * si_pid === si_band === si_tid === si_addr(LS half) 68 * First 32bits of unions are always present:
71 */ 69 * si_pid === si_band === si_tid === si_addr(LS half)
72 err |= __put_user(from->_sifields._pad[0], 70 */
73 &to->_sifields._pad[0]); 71 put_user_ex(from->_sifields._pad[0],
74 switch (from->si_code >> 16) { 72 &to->_sifields._pad[0]);
75 case __SI_FAULT >> 16: 73 switch (from->si_code >> 16) {
76 break; 74 case __SI_FAULT >> 16:
77 case __SI_CHLD >> 16: 75 break;
78 err |= __put_user(from->si_utime, &to->si_utime); 76 case __SI_CHLD >> 16:
79 err |= __put_user(from->si_stime, &to->si_stime); 77 put_user_ex(from->si_utime, &to->si_utime);
80 err |= __put_user(from->si_status, &to->si_status); 78 put_user_ex(from->si_stime, &to->si_stime);
81 /* FALL THROUGH */ 79 put_user_ex(from->si_status, &to->si_status);
82 default: 80 /* FALL THROUGH */
83 case __SI_KILL >> 16: 81 default:
84 err |= __put_user(from->si_uid, &to->si_uid); 82 case __SI_KILL >> 16:
85 break; 83 put_user_ex(from->si_uid, &to->si_uid);
86 case __SI_POLL >> 16: 84 break;
87 err |= __put_user(from->si_fd, &to->si_fd); 85 case __SI_POLL >> 16:
88 break; 86 put_user_ex(from->si_fd, &to->si_fd);
89 case __SI_TIMER >> 16: 87 break;
90 err |= __put_user(from->si_overrun, &to->si_overrun); 88 case __SI_TIMER >> 16:
91 err |= __put_user(ptr_to_compat(from->si_ptr), 89 put_user_ex(from->si_overrun, &to->si_overrun);
92 &to->si_ptr); 90 put_user_ex(ptr_to_compat(from->si_ptr),
93 break; 91 &to->si_ptr);
94 /* This is not generated by the kernel as of now. */ 92 break;
95 case __SI_RT >> 16: 93 /* This is not generated by the kernel as of now. */
96 case __SI_MESGQ >> 16: 94 case __SI_RT >> 16:
97 err |= __put_user(from->si_uid, &to->si_uid); 95 case __SI_MESGQ >> 16:
98 err |= __put_user(from->si_int, &to->si_int); 96 put_user_ex(from->si_uid, &to->si_uid);
99 break; 97 put_user_ex(from->si_int, &to->si_int);
98 break;
99 }
100 } 100 }
101 } 101 } put_user_catch(err);
102
102 return err; 103 return err;
103} 104}
104 105
105int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from) 106int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)
106{ 107{
107 int err; 108 int err = 0;
108 u32 ptr32; 109 u32 ptr32;
109 110
110 if (!access_ok(VERIFY_READ, from, sizeof(compat_siginfo_t))) 111 if (!access_ok(VERIFY_READ, from, sizeof(compat_siginfo_t)))
111 return -EFAULT; 112 return -EFAULT;
112 113
113 err = __get_user(to->si_signo, &from->si_signo); 114 get_user_try {
114 err |= __get_user(to->si_errno, &from->si_errno); 115 get_user_ex(to->si_signo, &from->si_signo);
115 err |= __get_user(to->si_code, &from->si_code); 116 get_user_ex(to->si_errno, &from->si_errno);
117 get_user_ex(to->si_code, &from->si_code);
116 118
117 err |= __get_user(to->si_pid, &from->si_pid); 119 get_user_ex(to->si_pid, &from->si_pid);
118 err |= __get_user(to->si_uid, &from->si_uid); 120 get_user_ex(to->si_uid, &from->si_uid);
119 err |= __get_user(ptr32, &from->si_ptr); 121 get_user_ex(ptr32, &from->si_ptr);
120 to->si_ptr = compat_ptr(ptr32); 122 to->si_ptr = compat_ptr(ptr32);
123 } get_user_catch(err);
121 124
122 return err; 125 return err;
123} 126}
@@ -142,17 +145,23 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr,
142 struct pt_regs *regs) 145 struct pt_regs *regs)
143{ 146{
144 stack_t uss, uoss; 147 stack_t uss, uoss;
145 int ret; 148 int ret, err = 0;
146 mm_segment_t seg; 149 mm_segment_t seg;
147 150
148 if (uss_ptr) { 151 if (uss_ptr) {
149 u32 ptr; 152 u32 ptr;
150 153
151 memset(&uss, 0, sizeof(stack_t)); 154 memset(&uss, 0, sizeof(stack_t));
152 if (!access_ok(VERIFY_READ, uss_ptr, sizeof(stack_ia32_t)) || 155 if (!access_ok(VERIFY_READ, uss_ptr, sizeof(stack_ia32_t)))
153 __get_user(ptr, &uss_ptr->ss_sp) || 156 return -EFAULT;
154 __get_user(uss.ss_flags, &uss_ptr->ss_flags) || 157
155 __get_user(uss.ss_size, &uss_ptr->ss_size)) 158 get_user_try {
159 get_user_ex(ptr, &uss_ptr->ss_sp);
160 get_user_ex(uss.ss_flags, &uss_ptr->ss_flags);
161 get_user_ex(uss.ss_size, &uss_ptr->ss_size);
162 } get_user_catch(err);
163
164 if (err)
156 return -EFAULT; 165 return -EFAULT;
157 uss.ss_sp = compat_ptr(ptr); 166 uss.ss_sp = compat_ptr(ptr);
158 } 167 }
@@ -161,10 +170,16 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr,
161 ret = do_sigaltstack(uss_ptr ? &uss : NULL, &uoss, regs->sp); 170 ret = do_sigaltstack(uss_ptr ? &uss : NULL, &uoss, regs->sp);
162 set_fs(seg); 171 set_fs(seg);
163 if (ret >= 0 && uoss_ptr) { 172 if (ret >= 0 && uoss_ptr) {
164 if (!access_ok(VERIFY_WRITE, uoss_ptr, sizeof(stack_ia32_t)) || 173 if (!access_ok(VERIFY_WRITE, uoss_ptr, sizeof(stack_ia32_t)))
165 __put_user(ptr_to_compat(uoss.ss_sp), &uoss_ptr->ss_sp) || 174 return -EFAULT;
166 __put_user(uoss.ss_flags, &uoss_ptr->ss_flags) || 175
167 __put_user(uoss.ss_size, &uoss_ptr->ss_size)) 176 put_user_try {
177 put_user_ex(ptr_to_compat(uoss.ss_sp), &uoss_ptr->ss_sp);
178 put_user_ex(uoss.ss_flags, &uoss_ptr->ss_flags);
179 put_user_ex(uoss.ss_size, &uoss_ptr->ss_size);
180 } put_user_catch(err);
181
182 if (err)
168 ret = -EFAULT; 183 ret = -EFAULT;
169 } 184 }
170 return ret; 185 return ret;
@@ -173,75 +188,78 @@ asmlinkage long sys32_sigaltstack(const stack_ia32_t __user *uss_ptr,
173/* 188/*
174 * Do a signal return; undo the signal stack. 189 * Do a signal return; undo the signal stack.
175 */ 190 */
191#define loadsegment_gs(v) load_gs_index(v)
192#define loadsegment_fs(v) loadsegment(fs, v)
193#define loadsegment_ds(v) loadsegment(ds, v)
194#define loadsegment_es(v) loadsegment(es, v)
195
196#define get_user_seg(seg) ({ unsigned int v; savesegment(seg, v); v; })
197#define set_user_seg(seg, v) loadsegment_##seg(v)
198
176#define COPY(x) { \ 199#define COPY(x) { \
177 err |= __get_user(regs->x, &sc->x); \ 200 get_user_ex(regs->x, &sc->x); \
178} 201}
179 202
180#define COPY_SEG_CPL3(seg) { \ 203#define GET_SEG(seg) ({ \
181 unsigned short tmp; \ 204 unsigned short tmp; \
182 err |= __get_user(tmp, &sc->seg); \ 205 get_user_ex(tmp, &sc->seg); \
183 regs->seg = tmp | 3; \ 206 tmp; \
184} 207})
208
209#define COPY_SEG_CPL3(seg) do { \
210 regs->seg = GET_SEG(seg) | 3; \
211} while (0)
185 212
186#define RELOAD_SEG(seg) { \ 213#define RELOAD_SEG(seg) { \
187 unsigned int cur, pre; \ 214 unsigned int pre = GET_SEG(seg); \
188 err |= __get_user(pre, &sc->seg); \ 215 unsigned int cur = get_user_seg(seg); \
189 savesegment(seg, cur); \
190 pre |= 3; \ 216 pre |= 3; \
191 if (pre != cur) \ 217 if (pre != cur) \
192 loadsegment(seg, pre); \ 218 set_user_seg(seg, pre); \
193} 219}
194 220
195static int ia32_restore_sigcontext(struct pt_regs *regs, 221static int ia32_restore_sigcontext(struct pt_regs *regs,
196 struct sigcontext_ia32 __user *sc, 222 struct sigcontext_ia32 __user *sc,
197 unsigned int *pax) 223 unsigned int *pax)
198{ 224{
199 unsigned int tmpflags, gs, oldgs, err = 0; 225 unsigned int tmpflags, err = 0;
200 void __user *buf; 226 void __user *buf;
201 u32 tmp; 227 u32 tmp;
202 228
203 /* Always make any pending restarted system calls return -EINTR */ 229 /* Always make any pending restarted system calls return -EINTR */
204 current_thread_info()->restart_block.fn = do_no_restart_syscall; 230 current_thread_info()->restart_block.fn = do_no_restart_syscall;
205 231
206#if DEBUG_SIG 232 get_user_try {
207 printk(KERN_DEBUG "SIG restore_sigcontext: " 233 /*
208 "sc=%p err(%x) eip(%x) cs(%x) flg(%x)\n", 234 * Reload fs and gs if they have changed in the signal
209 sc, sc->err, sc->ip, sc->cs, sc->flags); 235 * handler. This does not handle long fs/gs base changes in
210#endif 236 * the handler, but does not clobber them at least in the
211 237 * normal case.
212 /* 238 */
213 * Reload fs and gs if they have changed in the signal 239 RELOAD_SEG(gs);
214 * handler. This does not handle long fs/gs base changes in 240 RELOAD_SEG(fs);
215 * the handler, but does not clobber them at least in the 241 RELOAD_SEG(ds);
216 * normal case. 242 RELOAD_SEG(es);
217 */ 243
218 err |= __get_user(gs, &sc->gs); 244 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
219 gs |= 3; 245 COPY(dx); COPY(cx); COPY(ip);
220 savesegment(gs, oldgs); 246 /* Don't touch extended registers */
221 if (gs != oldgs) 247
222 load_gs_index(gs); 248 COPY_SEG_CPL3(cs);
223 249 COPY_SEG_CPL3(ss);
224 RELOAD_SEG(fs); 250
225 RELOAD_SEG(ds); 251 get_user_ex(tmpflags, &sc->flags);
226 RELOAD_SEG(es); 252 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
227 253 /* disable syscall checks */
228 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx); 254 regs->orig_ax = -1;
229 COPY(dx); COPY(cx); COPY(ip); 255
230 /* Don't touch extended registers */ 256 get_user_ex(tmp, &sc->fpstate);
231 257 buf = compat_ptr(tmp);
232 COPY_SEG_CPL3(cs); 258 err |= restore_i387_xstate_ia32(buf);
233 COPY_SEG_CPL3(ss); 259
234 260 get_user_ex(*pax, &sc->ax);
235 err |= __get_user(tmpflags, &sc->flags); 261 } get_user_catch(err);
236 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); 262
237 /* disable syscall checks */
238 regs->orig_ax = -1;
239
240 err |= __get_user(tmp, &sc->fpstate);
241 buf = compat_ptr(tmp);
242 err |= restore_i387_xstate_ia32(buf);
243
244 err |= __get_user(*pax, &sc->ax);
245 return err; 263 return err;
246} 264}
247 265
@@ -317,38 +335,36 @@ static int ia32_setup_sigcontext(struct sigcontext_ia32 __user *sc,
317 void __user *fpstate, 335 void __user *fpstate,
318 struct pt_regs *regs, unsigned int mask) 336 struct pt_regs *regs, unsigned int mask)
319{ 337{
320 int tmp, err = 0; 338 int err = 0;
321 339
322 savesegment(gs, tmp); 340 put_user_try {
323 err |= __put_user(tmp, (unsigned int __user *)&sc->gs); 341 put_user_ex(get_user_seg(gs), (unsigned int __user *)&sc->gs);
324 savesegment(fs, tmp); 342 put_user_ex(get_user_seg(fs), (unsigned int __user *)&sc->fs);
325 err |= __put_user(tmp, (unsigned int __user *)&sc->fs); 343 put_user_ex(get_user_seg(ds), (unsigned int __user *)&sc->ds);
326 savesegment(ds, tmp); 344 put_user_ex(get_user_seg(es), (unsigned int __user *)&sc->es);
327 err |= __put_user(tmp, (unsigned int __user *)&sc->ds); 345
328 savesegment(es, tmp); 346 put_user_ex(regs->di, &sc->di);
329 err |= __put_user(tmp, (unsigned int __user *)&sc->es); 347 put_user_ex(regs->si, &sc->si);
330 348 put_user_ex(regs->bp, &sc->bp);
331 err |= __put_user(regs->di, &sc->di); 349 put_user_ex(regs->sp, &sc->sp);
332 err |= __put_user(regs->si, &sc->si); 350 put_user_ex(regs->bx, &sc->bx);
333 err |= __put_user(regs->bp, &sc->bp); 351 put_user_ex(regs->dx, &sc->dx);
334 err |= __put_user(regs->sp, &sc->sp); 352 put_user_ex(regs->cx, &sc->cx);
335 err |= __put_user(regs->bx, &sc->bx); 353 put_user_ex(regs->ax, &sc->ax);
336 err |= __put_user(regs->dx, &sc->dx); 354 put_user_ex(current->thread.trap_no, &sc->trapno);
337 err |= __put_user(regs->cx, &sc->cx); 355 put_user_ex(current->thread.error_code, &sc->err);
338 err |= __put_user(regs->ax, &sc->ax); 356 put_user_ex(regs->ip, &sc->ip);
339 err |= __put_user(current->thread.trap_no, &sc->trapno); 357 put_user_ex(regs->cs, (unsigned int __user *)&sc->cs);
340 err |= __put_user(current->thread.error_code, &sc->err); 358 put_user_ex(regs->flags, &sc->flags);
341 err |= __put_user(regs->ip, &sc->ip); 359 put_user_ex(regs->sp, &sc->sp_at_signal);
342 err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs); 360 put_user_ex(regs->ss, (unsigned int __user *)&sc->ss);
343 err |= __put_user(regs->flags, &sc->flags); 361
344 err |= __put_user(regs->sp, &sc->sp_at_signal); 362 put_user_ex(ptr_to_compat(fpstate), &sc->fpstate);
345 err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss); 363
346 364 /* non-iBCS2 extensions.. */
347 err |= __put_user(ptr_to_compat(fpstate), &sc->fpstate); 365 put_user_ex(mask, &sc->oldmask);
348 366 put_user_ex(current->thread.cr2, &sc->cr2);
349 /* non-iBCS2 extensions.. */ 367 } put_user_catch(err);
350 err |= __put_user(mask, &sc->oldmask);
351 err |= __put_user(current->thread.cr2, &sc->cr2);
352 368
353 return err; 369 return err;
354} 370}
@@ -437,13 +453,17 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
437 else 453 else
438 restorer = &frame->retcode; 454 restorer = &frame->retcode;
439 } 455 }
440 err |= __put_user(ptr_to_compat(restorer), &frame->pretcode);
441 456
442 /* 457 put_user_try {
443 * These are actually not used anymore, but left because some 458 put_user_ex(ptr_to_compat(restorer), &frame->pretcode);
444 * gdb versions depend on them as a marker. 459
445 */ 460 /*
446 err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode); 461 * These are actually not used anymore, but left because some
462 * gdb versions depend on them as a marker.
463 */
464 put_user_ex(*((u64 *)&code), (u64 *)frame->retcode);
465 } put_user_catch(err);
466
447 if (err) 467 if (err)
448 return -EFAULT; 468 return -EFAULT;
449 469
@@ -462,11 +482,6 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
462 regs->cs = __USER32_CS; 482 regs->cs = __USER32_CS;
463 regs->ss = __USER32_DS; 483 regs->ss = __USER32_DS;
464 484
465#if DEBUG_SIG
466 printk(KERN_DEBUG "SIG deliver (%s:%d): sp=%p pc=%lx ra=%u\n",
467 current->comm, current->pid, frame, regs->ip, frame->pretcode);
468#endif
469
470 return 0; 485 return 0;
471} 486}
472 487
@@ -496,41 +511,40 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
496 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) 511 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
497 return -EFAULT; 512 return -EFAULT;
498 513
499 err |= __put_user(sig, &frame->sig); 514 put_user_try {
500 err |= __put_user(ptr_to_compat(&frame->info), &frame->pinfo); 515 put_user_ex(sig, &frame->sig);
501 err |= __put_user(ptr_to_compat(&frame->uc), &frame->puc); 516 put_user_ex(ptr_to_compat(&frame->info), &frame->pinfo);
502 err |= copy_siginfo_to_user32(&frame->info, info); 517 put_user_ex(ptr_to_compat(&frame->uc), &frame->puc);
503 if (err) 518 err |= copy_siginfo_to_user32(&frame->info, info);
504 return -EFAULT;
505 519
506 /* Create the ucontext. */ 520 /* Create the ucontext. */
507 if (cpu_has_xsave) 521 if (cpu_has_xsave)
508 err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags); 522 put_user_ex(UC_FP_XSTATE, &frame->uc.uc_flags);
509 else 523 else
510 err |= __put_user(0, &frame->uc.uc_flags); 524 put_user_ex(0, &frame->uc.uc_flags);
511 err |= __put_user(0, &frame->uc.uc_link); 525 put_user_ex(0, &frame->uc.uc_link);
512 err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); 526 put_user_ex(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
513 err |= __put_user(sas_ss_flags(regs->sp), 527 put_user_ex(sas_ss_flags(regs->sp),
514 &frame->uc.uc_stack.ss_flags); 528 &frame->uc.uc_stack.ss_flags);
515 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); 529 put_user_ex(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
516 err |= ia32_setup_sigcontext(&frame->uc.uc_mcontext, fpstate, 530 err |= ia32_setup_sigcontext(&frame->uc.uc_mcontext, fpstate,
517 regs, set->sig[0]); 531 regs, set->sig[0]);
518 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); 532 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
519 if (err) 533
520 return -EFAULT; 534 if (ka->sa.sa_flags & SA_RESTORER)
535 restorer = ka->sa.sa_restorer;
536 else
537 restorer = VDSO32_SYMBOL(current->mm->context.vdso,
538 rt_sigreturn);
539 put_user_ex(ptr_to_compat(restorer), &frame->pretcode);
540
541 /*
542 * Not actually used anymore, but left because some gdb
543 * versions need it.
544 */
545 put_user_ex(*((u64 *)&code), (u64 *)frame->retcode);
546 } put_user_catch(err);
521 547
522 if (ka->sa.sa_flags & SA_RESTORER)
523 restorer = ka->sa.sa_restorer;
524 else
525 restorer = VDSO32_SYMBOL(current->mm->context.vdso,
526 rt_sigreturn);
527 err |= __put_user(ptr_to_compat(restorer), &frame->pretcode);
528
529 /*
530 * Not actually used anymore, but left because some gdb
531 * versions need it.
532 */
533 err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);
534 if (err) 548 if (err)
535 return -EFAULT; 549 return -EFAULT;
536 550
@@ -549,10 +563,5 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
549 regs->cs = __USER32_CS; 563 regs->cs = __USER32_CS;
550 regs->ss = __USER32_DS; 564 regs->ss = __USER32_DS;
551 565
552#if DEBUG_SIG
553 printk(KERN_DEBUG "SIG deliver (%s:%d): sp=%p pc=%lx ra=%u\n",
554 current->comm, current->pid, frame, regs->ip, frame->pretcode);
555#endif
556
557 return 0; 566 return 0;
558} 567}
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 8ef8876666b2..db0c803170ab 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -112,8 +112,8 @@ ENTRY(ia32_sysenter_target)
112 CFI_DEF_CFA rsp,0 112 CFI_DEF_CFA rsp,0
113 CFI_REGISTER rsp,rbp 113 CFI_REGISTER rsp,rbp
114 SWAPGS_UNSAFE_STACK 114 SWAPGS_UNSAFE_STACK
115 movq %gs:pda_kernelstack, %rsp 115 movq PER_CPU_VAR(kernel_stack), %rsp
116 addq $(PDA_STACKOFFSET),%rsp 116 addq $(KERNEL_STACK_OFFSET),%rsp
117 /* 117 /*
118 * No need to follow this irqs on/off section: the syscall 118 * No need to follow this irqs on/off section: the syscall
119 * disabled irqs, here we enable it straight after entry: 119 * disabled irqs, here we enable it straight after entry:
@@ -273,13 +273,13 @@ ENDPROC(ia32_sysenter_target)
273ENTRY(ia32_cstar_target) 273ENTRY(ia32_cstar_target)
274 CFI_STARTPROC32 simple 274 CFI_STARTPROC32 simple
275 CFI_SIGNAL_FRAME 275 CFI_SIGNAL_FRAME
276 CFI_DEF_CFA rsp,PDA_STACKOFFSET 276 CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET
277 CFI_REGISTER rip,rcx 277 CFI_REGISTER rip,rcx
278 /*CFI_REGISTER rflags,r11*/ 278 /*CFI_REGISTER rflags,r11*/
279 SWAPGS_UNSAFE_STACK 279 SWAPGS_UNSAFE_STACK
280 movl %esp,%r8d 280 movl %esp,%r8d
281 CFI_REGISTER rsp,r8 281 CFI_REGISTER rsp,r8
282 movq %gs:pda_kernelstack,%rsp 282 movq PER_CPU_VAR(kernel_stack),%rsp
283 /* 283 /*
284 * No need to follow this irqs on/off section: the syscall 284 * No need to follow this irqs on/off section: the syscall
285 * disabled irqs and here we enable it straight after entry: 285 * disabled irqs and here we enable it straight after entry:
diff --git a/arch/x86/include/asm/a.out-core.h b/arch/x86/include/asm/a.out-core.h
index 3c601f8224be..bb70e397aa84 100644
--- a/arch/x86/include/asm/a.out-core.h
+++ b/arch/x86/include/asm/a.out-core.h
@@ -55,7 +55,7 @@ static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
55 dump->regs.ds = (u16)regs->ds; 55 dump->regs.ds = (u16)regs->ds;
56 dump->regs.es = (u16)regs->es; 56 dump->regs.es = (u16)regs->es;
57 dump->regs.fs = (u16)regs->fs; 57 dump->regs.fs = (u16)regs->fs;
58 savesegment(gs, dump->regs.gs); 58 dump->regs.gs = get_user_gs(regs);
59 dump->regs.orig_ax = regs->orig_ax; 59 dump->regs.orig_ax = regs->orig_ax;
60 dump->regs.ip = regs->ip; 60 dump->regs.ip = regs->ip;
61 dump->regs.cs = (u16)regs->cs; 61 dump->regs.cs = (u16)regs->cs;
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h
index 9830681446ad..4518dc500903 100644
--- a/arch/x86/include/asm/acpi.h
+++ b/arch/x86/include/asm/acpi.h
@@ -102,9 +102,6 @@ static inline void disable_acpi(void)
102 acpi_noirq = 1; 102 acpi_noirq = 1;
103} 103}
104 104
105/* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */
106#define FIX_ACPI_PAGES 4
107
108extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq); 105extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
109 106
110static inline void acpi_noirq_set(void) { acpi_noirq = 1; } 107static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index ab1d51a8855e..4ef949c1972e 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -1,15 +1,18 @@
1#ifndef _ASM_X86_APIC_H 1#ifndef _ASM_X86_APIC_H
2#define _ASM_X86_APIC_H 2#define _ASM_X86_APIC_H
3 3
4#include <linux/pm.h> 4#include <linux/cpumask.h>
5#include <linux/delay.h> 5#include <linux/delay.h>
6#include <linux/pm.h>
6 7
7#include <asm/alternative.h> 8#include <asm/alternative.h>
8#include <asm/fixmap.h> 9#include <asm/cpufeature.h>
9#include <asm/apicdef.h>
10#include <asm/processor.h> 10#include <asm/processor.h>
11#include <asm/apicdef.h>
12#include <asm/atomic.h>
13#include <asm/fixmap.h>
14#include <asm/mpspec.h>
11#include <asm/system.h> 15#include <asm/system.h>
12#include <asm/cpufeature.h>
13#include <asm/msr.h> 16#include <asm/msr.h>
14 17
15#define ARCH_APICTIMER_STOPS_ON_C3 1 18#define ARCH_APICTIMER_STOPS_ON_C3 1
@@ -33,7 +36,13 @@
33 } while (0) 36 } while (0)
34 37
35 38
39#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
36extern void generic_apic_probe(void); 40extern void generic_apic_probe(void);
41#else
42static inline void generic_apic_probe(void)
43{
44}
45#endif
37 46
38#ifdef CONFIG_X86_LOCAL_APIC 47#ifdef CONFIG_X86_LOCAL_APIC
39 48
@@ -41,6 +50,21 @@ extern unsigned int apic_verbosity;
41extern int local_apic_timer_c2_ok; 50extern int local_apic_timer_c2_ok;
42 51
43extern int disable_apic; 52extern int disable_apic;
53
54#ifdef CONFIG_SMP
55extern void __inquire_remote_apic(int apicid);
56#else /* CONFIG_SMP */
57static inline void __inquire_remote_apic(int apicid)
58{
59}
60#endif /* CONFIG_SMP */
61
62static inline void default_inquire_remote_apic(int apicid)
63{
64 if (apic_verbosity >= APIC_DEBUG)
65 __inquire_remote_apic(apicid);
66}
67
44/* 68/*
45 * Basic functions accessing APICs. 69 * Basic functions accessing APICs.
46 */ 70 */
@@ -51,7 +75,14 @@ extern int disable_apic;
51#define setup_secondary_clock setup_secondary_APIC_clock 75#define setup_secondary_clock setup_secondary_APIC_clock
52#endif 76#endif
53 77
78#ifdef CONFIG_X86_VSMP
54extern int is_vsmp_box(void); 79extern int is_vsmp_box(void);
80#else
81static inline int is_vsmp_box(void)
82{
83 return 0;
84}
85#endif
55extern void xapic_wait_icr_idle(void); 86extern void xapic_wait_icr_idle(void);
56extern u32 safe_xapic_wait_icr_idle(void); 87extern u32 safe_xapic_wait_icr_idle(void);
57extern void xapic_icr_write(u32, u32); 88extern void xapic_icr_write(u32, u32);
@@ -71,6 +102,12 @@ static inline u32 native_apic_mem_read(u32 reg)
71 return *((volatile u32 *)(APIC_BASE + reg)); 102 return *((volatile u32 *)(APIC_BASE + reg));
72} 103}
73 104
105extern void native_apic_wait_icr_idle(void);
106extern u32 native_safe_apic_wait_icr_idle(void);
107extern void native_apic_icr_write(u32 low, u32 id);
108extern u64 native_apic_icr_read(void);
109
110#ifdef CONFIG_X86_X2APIC
74static inline void native_apic_msr_write(u32 reg, u32 v) 111static inline void native_apic_msr_write(u32 reg, u32 v)
75{ 112{
76 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || 113 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
@@ -91,8 +128,32 @@ static inline u32 native_apic_msr_read(u32 reg)
91 return low; 128 return low;
92} 129}
93 130
94#ifndef CONFIG_X86_32 131static inline void native_x2apic_wait_icr_idle(void)
95extern int x2apic; 132{
133 /* no need to wait for icr idle in x2apic */
134 return;
135}
136
137static inline u32 native_safe_x2apic_wait_icr_idle(void)
138{
139 /* no need to wait for icr idle in x2apic */
140 return 0;
141}
142
143static inline void native_x2apic_icr_write(u32 low, u32 id)
144{
145 wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
146}
147
148static inline u64 native_x2apic_icr_read(void)
149{
150 unsigned long val;
151
152 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val);
153 return val;
154}
155
156extern int x2apic, x2apic_phys;
96extern void check_x2apic(void); 157extern void check_x2apic(void);
97extern void enable_x2apic(void); 158extern void enable_x2apic(void);
98extern void enable_IR_x2apic(void); 159extern void enable_IR_x2apic(void);
@@ -110,30 +171,24 @@ static inline int x2apic_enabled(void)
110 return 0; 171 return 0;
111} 172}
112#else 173#else
113#define x2apic_enabled() 0 174static inline void check_x2apic(void)
175{
176}
177static inline void enable_x2apic(void)
178{
179}
180static inline void enable_IR_x2apic(void)
181{
182}
183static inline int x2apic_enabled(void)
184{
185 return 0;
186}
114#endif 187#endif
115 188
116struct apic_ops {
117 u32 (*read)(u32 reg);
118 void (*write)(u32 reg, u32 v);
119 u64 (*icr_read)(void);
120 void (*icr_write)(u32 low, u32 high);
121 void (*wait_icr_idle)(void);
122 u32 (*safe_wait_icr_idle)(void);
123};
124
125extern struct apic_ops *apic_ops;
126
127#define apic_read (apic_ops->read)
128#define apic_write (apic_ops->write)
129#define apic_icr_read (apic_ops->icr_read)
130#define apic_icr_write (apic_ops->icr_write)
131#define apic_wait_icr_idle (apic_ops->wait_icr_idle)
132#define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
133
134extern int get_physical_broadcast(void); 189extern int get_physical_broadcast(void);
135 190
136#ifdef CONFIG_X86_64 191#ifdef CONFIG_X86_X2APIC
137static inline void ack_x2APIC_irq(void) 192static inline void ack_x2APIC_irq(void)
138{ 193{
139 /* Docs say use 0 for future compatibility */ 194 /* Docs say use 0 for future compatibility */
@@ -141,18 +196,6 @@ static inline void ack_x2APIC_irq(void)
141} 196}
142#endif 197#endif
143 198
144
145static inline void ack_APIC_irq(void)
146{
147 /*
148 * ack_APIC_irq() actually gets compiled as a single instruction
149 * ... yummie.
150 */
151
152 /* Docs say use 0 for future compatibility */
153 apic_write(APIC_EOI, 0);
154}
155
156extern int lapic_get_maxlvt(void); 199extern int lapic_get_maxlvt(void);
157extern void clear_local_APIC(void); 200extern void clear_local_APIC(void);
158extern void connect_bsp_APIC(void); 201extern void connect_bsp_APIC(void);
@@ -196,4 +239,327 @@ static inline void disable_local_APIC(void) { }
196 239
197#endif /* !CONFIG_X86_LOCAL_APIC */ 240#endif /* !CONFIG_X86_LOCAL_APIC */
198 241
242#ifdef CONFIG_X86_64
243#define SET_APIC_ID(x) (apic->set_apic_id(x))
244#else
245
246#endif
247
248/*
249 * Copyright 2004 James Cleverdon, IBM.
250 * Subject to the GNU Public License, v.2
251 *
252 * Generic APIC sub-arch data struct.
253 *
254 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
255 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
256 * James Cleverdon.
257 */
258struct apic {
259 char *name;
260
261 int (*probe)(void);
262 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
263 int (*apic_id_registered)(void);
264
265 u32 irq_delivery_mode;
266 u32 irq_dest_mode;
267
268 const struct cpumask *(*target_cpus)(void);
269
270 int disable_esr;
271
272 int dest_logical;
273 unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
274 unsigned long (*check_apicid_present)(int apicid);
275
276 void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
277 void (*init_apic_ldr)(void);
278
279 physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
280
281 void (*setup_apic_routing)(void);
282 int (*multi_timer_check)(int apic, int irq);
283 int (*apicid_to_node)(int logical_apicid);
284 int (*cpu_to_logical_apicid)(int cpu);
285 int (*cpu_present_to_apicid)(int mps_cpu);
286 physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
287 void (*setup_portio_remap)(void);
288 int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
289 void (*enable_apic_mode)(void);
290 int (*phys_pkg_id)(int cpuid_apic, int index_msb);
291
292 /*
293 * When one of the next two hooks returns 1 the apic
294 * is switched to this. Essentially they are additional
295 * probe functions:
296 */
297 int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid);
298
299 unsigned int (*get_apic_id)(unsigned long x);
300 unsigned long (*set_apic_id)(unsigned int id);
301 unsigned long apic_id_mask;
302
303 unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
304 unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
305 const struct cpumask *andmask);
306
307 /* ipi */
308 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
309 void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
310 int vector);
311 void (*send_IPI_allbutself)(int vector);
312 void (*send_IPI_all)(int vector);
313 void (*send_IPI_self)(int vector);
314
315 /* wakeup_secondary_cpu */
316 int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip);
317
318 int trampoline_phys_low;
319 int trampoline_phys_high;
320
321 void (*wait_for_init_deassert)(atomic_t *deassert);
322 void (*smp_callin_clear_local_apic)(void);
323 void (*inquire_remote_apic)(int apicid);
324
325 /* apic ops */
326 u32 (*read)(u32 reg);
327 void (*write)(u32 reg, u32 v);
328 u64 (*icr_read)(void);
329 void (*icr_write)(u32 low, u32 high);
330 void (*wait_icr_idle)(void);
331 u32 (*safe_wait_icr_idle)(void);
332};
333
334/*
335 * Pointer to the local APIC driver in use on this system (there's
336 * always just one such driver in use - the kernel decides via an
337 * early probing process which one it picks - and then sticks to it):
338 */
339extern struct apic *apic;
340
341/*
342 * APIC functionality to boot other CPUs - only used on SMP:
343 */
344#ifdef CONFIG_SMP
345extern atomic_t init_deasserted;
346extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
347#endif
348
349static inline u32 apic_read(u32 reg)
350{
351 return apic->read(reg);
352}
353
354static inline void apic_write(u32 reg, u32 val)
355{
356 apic->write(reg, val);
357}
358
359static inline u64 apic_icr_read(void)
360{
361 return apic->icr_read();
362}
363
364static inline void apic_icr_write(u32 low, u32 high)
365{
366 apic->icr_write(low, high);
367}
368
369static inline void apic_wait_icr_idle(void)
370{
371 apic->wait_icr_idle();
372}
373
374static inline u32 safe_apic_wait_icr_idle(void)
375{
376 return apic->safe_wait_icr_idle();
377}
378
379
380static inline void ack_APIC_irq(void)
381{
382 /*
383 * ack_APIC_irq() actually gets compiled as a single instruction
384 * ... yummie.
385 */
386
387 /* Docs say use 0 for future compatibility */
388 apic_write(APIC_EOI, 0);
389}
390
391static inline unsigned default_get_apic_id(unsigned long x)
392{
393 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
394
395 if (APIC_XAPIC(ver))
396 return (x >> 24) & 0xFF;
397 else
398 return (x >> 24) & 0x0F;
399}
400
401/*
402 * Warm reset vector default position:
403 */
404#define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467
405#define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469
406
407#ifdef CONFIG_X86_64
408extern struct apic apic_flat;
409extern struct apic apic_physflat;
410extern struct apic apic_x2apic_cluster;
411extern struct apic apic_x2apic_phys;
412extern int default_acpi_madt_oem_check(char *, char *);
413
414extern void apic_send_IPI_self(int vector);
415
416extern struct apic apic_x2apic_uv_x;
417DECLARE_PER_CPU(int, x2apic_extra_bits);
418
419extern int default_cpu_present_to_apicid(int mps_cpu);
420extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
421#endif
422
423static inline void default_wait_for_init_deassert(atomic_t *deassert)
424{
425 while (!atomic_read(deassert))
426 cpu_relax();
427 return;
428}
429
430extern void generic_bigsmp_probe(void);
431
432
433#ifdef CONFIG_X86_LOCAL_APIC
434
435#include <asm/smp.h>
436
437#define APIC_DFR_VALUE (APIC_DFR_FLAT)
438
439static inline const struct cpumask *default_target_cpus(void)
440{
441#ifdef CONFIG_SMP
442 return cpu_online_mask;
443#else
444 return cpumask_of(0);
445#endif
446}
447
448DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
449
450
451static inline unsigned int read_apic_id(void)
452{
453 unsigned int reg;
454
455 reg = apic_read(APIC_ID);
456
457 return apic->get_apic_id(reg);
458}
459
460extern void default_setup_apic_routing(void);
461
462#ifdef CONFIG_X86_32
463/*
464 * Set up the logical destination ID.
465 *
466 * Intel recommends to set DFR, LDR and TPR before enabling
467 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
468 * document number 292116). So here it goes...
469 */
470extern void default_init_apic_ldr(void);
471
472static inline int default_apic_id_registered(void)
473{
474 return physid_isset(read_apic_id(), phys_cpu_present_map);
475}
476
477static inline unsigned int
478default_cpu_mask_to_apicid(const struct cpumask *cpumask)
479{
480 return cpumask_bits(cpumask)[0];
481}
482
483static inline unsigned int
484default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
485 const struct cpumask *andmask)
486{
487 unsigned long mask1 = cpumask_bits(cpumask)[0];
488 unsigned long mask2 = cpumask_bits(andmask)[0];
489 unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
490
491 return (unsigned int)(mask1 & mask2 & mask3);
492}
493
494static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
495{
496 return cpuid_apic >> index_msb;
497}
498
499extern int default_apicid_to_node(int logical_apicid);
500
501#endif
502
503static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
504{
505 return physid_isset(apicid, bitmap);
506}
507
508static inline unsigned long default_check_apicid_present(int bit)
509{
510 return physid_isset(bit, phys_cpu_present_map);
511}
512
513static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
514{
515 return phys_map;
516}
517
518/* Mapping from cpu number to logical apicid */
519static inline int default_cpu_to_logical_apicid(int cpu)
520{
521 return 1 << cpu;
522}
523
524static inline int __default_cpu_present_to_apicid(int mps_cpu)
525{
526 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
527 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
528 else
529 return BAD_APICID;
530}
531
532static inline int
533__default_check_phys_apicid_present(int boot_cpu_physical_apicid)
534{
535 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
536}
537
538#ifdef CONFIG_X86_32
539static inline int default_cpu_present_to_apicid(int mps_cpu)
540{
541 return __default_cpu_present_to_apicid(mps_cpu);
542}
543
544static inline int
545default_check_phys_apicid_present(int boot_cpu_physical_apicid)
546{
547 return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
548}
549#else
550extern int default_cpu_present_to_apicid(int mps_cpu);
551extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
552#endif
553
554static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
555{
556 return physid_mask_of_physid(phys_apicid);
557}
558
559#endif /* CONFIG_X86_LOCAL_APIC */
560
561#ifdef CONFIG_X86_32
562extern u8 cpu_2_logical_apicid[NR_CPUS];
563#endif
564
199#endif /* _ASM_X86_APIC_H */ 565#endif /* _ASM_X86_APIC_H */
diff --git a/arch/x86/include/asm/apicnum.h b/arch/x86/include/asm/apicnum.h
new file mode 100644
index 000000000000..82f613c607ce
--- /dev/null
+++ b/arch/x86/include/asm/apicnum.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_X86_APICNUM_H
2#define _ASM_X86_APICNUM_H
3
4/* define MAX_IO_APICS */
5#ifdef CONFIG_X86_32
6# define MAX_IO_APICS 64
7#else
8# define MAX_IO_APICS 128
9# define MAX_LOCAL_APIC 32768
10#endif
11
12#endif /* _ASM_X86_APICNUM_H */
diff --git a/arch/x86/include/asm/mach-default/apm.h b/arch/x86/include/asm/apm.h
index 20370c6db74b..20370c6db74b 100644
--- a/arch/x86/include/asm/mach-default/apm.h
+++ b/arch/x86/include/asm/apm.h
diff --git a/arch/x86/include/asm/arch_hooks.h b/arch/x86/include/asm/arch_hooks.h
deleted file mode 100644
index cbd4957838a6..000000000000
--- a/arch/x86/include/asm/arch_hooks.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef _ASM_X86_ARCH_HOOKS_H
2#define _ASM_X86_ARCH_HOOKS_H
3
4#include <linux/interrupt.h>
5
6/*
7 * linux/include/asm/arch_hooks.h
8 *
9 * define the architecture specific hooks
10 */
11
12/* these aren't arch hooks, they are generic routines
13 * that can be used by the hooks */
14extern void init_ISA_irqs(void);
15extern irqreturn_t timer_interrupt(int irq, void *dev_id);
16
17/* these are the defined hooks */
18extern void intr_init_hook(void);
19extern void pre_intr_init_hook(void);
20extern void pre_setup_arch_hook(void);
21extern void trap_init_hook(void);
22extern void pre_time_init_hook(void);
23extern void time_init_hook(void);
24extern void mca_nmi_hook(void);
25
26#endif /* _ASM_X86_ARCH_HOOKS_H */
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
deleted file mode 100644
index d8dd9f537911..000000000000
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ /dev/null
@@ -1,155 +0,0 @@
1#ifndef __ASM_MACH_APIC_H
2#define __ASM_MACH_APIC_H
3
4#define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
5#define esr_disable (1)
6
7static inline int apic_id_registered(void)
8{
9 return (1);
10}
11
12static inline const cpumask_t *target_cpus(void)
13{
14#ifdef CONFIG_SMP
15 return &cpu_online_map;
16#else
17 return &cpumask_of_cpu(0);
18#endif
19}
20
21#undef APIC_DEST_LOGICAL
22#define APIC_DEST_LOGICAL 0
23#define APIC_DFR_VALUE (APIC_DFR_FLAT)
24#define INT_DELIVERY_MODE (dest_Fixed)
25#define INT_DEST_MODE (0) /* phys delivery to target proc */
26#define NO_BALANCE_IRQ (0)
27
28static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
29{
30 return (0);
31}
32
33static inline unsigned long check_apicid_present(int bit)
34{
35 return (1);
36}
37
38static inline unsigned long calculate_ldr(int cpu)
39{
40 unsigned long val, id;
41 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
42 id = xapic_phys_to_log_apicid(cpu);
43 val |= SET_APIC_LOGICAL_ID(id);
44 return val;
45}
46
47/*
48 * Set up the logical destination ID.
49 *
50 * Intel recommends to set DFR, LDR and TPR before enabling
51 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
52 * document number 292116). So here it goes...
53 */
54static inline void init_apic_ldr(void)
55{
56 unsigned long val;
57 int cpu = smp_processor_id();
58
59 apic_write(APIC_DFR, APIC_DFR_VALUE);
60 val = calculate_ldr(cpu);
61 apic_write(APIC_LDR, val);
62}
63
64static inline void setup_apic_routing(void)
65{
66 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
67 "Physflat", nr_ioapics);
68}
69
70static inline int multi_timer_check(int apic, int irq)
71{
72 return (0);
73}
74
75static inline int apicid_to_node(int logical_apicid)
76{
77 return apicid_2_node[hard_smp_processor_id()];
78}
79
80static inline int cpu_present_to_apicid(int mps_cpu)
81{
82 if (mps_cpu < nr_cpu_ids)
83 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
84
85 return BAD_APICID;
86}
87
88static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
89{
90 return physid_mask_of_physid(phys_apicid);
91}
92
93extern u8 cpu_2_logical_apicid[];
94/* Mapping from cpu number to logical apicid */
95static inline int cpu_to_logical_apicid(int cpu)
96{
97 if (cpu >= nr_cpu_ids)
98 return BAD_APICID;
99 return cpu_physical_id(cpu);
100}
101
102static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
103{
104 /* For clustered we don't have a good way to do this yet - hack */
105 return physids_promote(0xFFL);
106}
107
108static inline void setup_portio_remap(void)
109{
110}
111
112static inline void enable_apic_mode(void)
113{
114}
115
116static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
117{
118 return (1);
119}
120
121/* As we are using single CPU as destination, pick only one CPU here */
122static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
123{
124 int cpu;
125 int apicid;
126
127 cpu = first_cpu(*cpumask);
128 apicid = cpu_to_logical_apicid(cpu);
129 return apicid;
130}
131
132static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
133 const struct cpumask *andmask)
134{
135 int cpu;
136
137 /*
138 * We're using fixed IRQ delivery, can only return one phys APIC ID.
139 * May as well be the first.
140 */
141 for_each_cpu_and(cpu, cpumask, andmask)
142 if (cpumask_test_cpu(cpu, cpu_online_mask))
143 break;
144 if (cpu < nr_cpu_ids)
145 return cpu_to_logical_apicid(cpu);
146
147 return BAD_APICID;
148}
149
150static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
151{
152 return cpuid_apic >> index_msb;
153}
154
155#endif /* __ASM_MACH_APIC_H */
diff --git a/arch/x86/include/asm/bigsmp/apicdef.h b/arch/x86/include/asm/bigsmp/apicdef.h
deleted file mode 100644
index 392c3f5ef2fe..000000000000
--- a/arch/x86/include/asm/bigsmp/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ASM_MACH_APICDEF_H
2#define __ASM_MACH_APICDEF_H
3
4#define APIC_ID_MASK (0xFF<<24)
5
6static inline unsigned get_apic_id(unsigned long x)
7{
8 return (((x)>>24)&0xFF);
9}
10
11#define GET_APIC_ID(x) get_apic_id(x)
12
13#endif
diff --git a/arch/x86/include/asm/bigsmp/ipi.h b/arch/x86/include/asm/bigsmp/ipi.h
deleted file mode 100644
index 27fcd01b3ae6..000000000000
--- a/arch/x86/include/asm/bigsmp/ipi.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef __ASM_MACH_IPI_H
2#define __ASM_MACH_IPI_H
3
4void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
5void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
6
7static inline void send_IPI_mask(const struct cpumask *mask, int vector)
8{
9 send_IPI_mask_sequence(mask, vector);
10}
11
12static inline void send_IPI_allbutself(int vector)
13{
14 send_IPI_mask_allbutself(cpu_online_mask, vector);
15}
16
17static inline void send_IPI_all(int vector)
18{
19 send_IPI_mask(cpu_online_mask, vector);
20}
21
22#endif /* __ASM_MACH_IPI_H */
diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h
index dd61616cb73d..6526cf08b0e4 100644
--- a/arch/x86/include/asm/boot.h
+++ b/arch/x86/include/asm/boot.h
@@ -10,17 +10,31 @@
10#define EXTENDED_VGA 0xfffe /* 80x50 mode */ 10#define EXTENDED_VGA 0xfffe /* 80x50 mode */
11#define ASK_VGA 0xfffd /* ask for it at bootup */ 11#define ASK_VGA 0xfffd /* ask for it at bootup */
12 12
13#ifdef __KERNEL__
14
13/* Physical address where kernel should be loaded. */ 15/* Physical address where kernel should be loaded. */
14#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \ 16#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \
15 + (CONFIG_PHYSICAL_ALIGN - 1)) \ 17 + (CONFIG_PHYSICAL_ALIGN - 1)) \
16 & ~(CONFIG_PHYSICAL_ALIGN - 1)) 18 & ~(CONFIG_PHYSICAL_ALIGN - 1))
17 19
20#ifdef CONFIG_KERNEL_BZIP2
21#define BOOT_HEAP_SIZE 0x400000
22#else /* !CONFIG_KERNEL_BZIP2 */
23
18#ifdef CONFIG_X86_64 24#ifdef CONFIG_X86_64
19#define BOOT_HEAP_SIZE 0x7000 25#define BOOT_HEAP_SIZE 0x7000
20#define BOOT_STACK_SIZE 0x4000
21#else 26#else
22#define BOOT_HEAP_SIZE 0x4000 27#define BOOT_HEAP_SIZE 0x4000
28#endif
29
30#endif /* !CONFIG_KERNEL_BZIP2 */
31
32#ifdef CONFIG_X86_64
33#define BOOT_STACK_SIZE 0x4000
34#else
23#define BOOT_STACK_SIZE 0x1000 35#define BOOT_STACK_SIZE 0x1000
24#endif 36#endif
25 37
38#endif /* __KERNEL__ */
39
26#endif /* _ASM_X86_BOOT_H */ 40#endif /* _ASM_X86_BOOT_H */
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index 2f8466540fb5..5b301b7ff5f4 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -5,24 +5,43 @@
5#include <linux/mm.h> 5#include <linux/mm.h>
6 6
7/* Caches aren't brain-dead on the intel. */ 7/* Caches aren't brain-dead on the intel. */
8#define flush_cache_all() do { } while (0) 8static inline void flush_cache_all(void) { }
9#define flush_cache_mm(mm) do { } while (0) 9static inline void flush_cache_mm(struct mm_struct *mm) { }
10#define flush_cache_dup_mm(mm) do { } while (0) 10static inline void flush_cache_dup_mm(struct mm_struct *mm) { }
11#define flush_cache_range(vma, start, end) do { } while (0) 11static inline void flush_cache_range(struct vm_area_struct *vma,
12#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) 12 unsigned long start, unsigned long end) { }
13#define flush_dcache_page(page) do { } while (0) 13static inline void flush_cache_page(struct vm_area_struct *vma,
14#define flush_dcache_mmap_lock(mapping) do { } while (0) 14 unsigned long vmaddr, unsigned long pfn) { }
15#define flush_dcache_mmap_unlock(mapping) do { } while (0) 15static inline void flush_dcache_page(struct page *page) { }
16#define flush_icache_range(start, end) do { } while (0) 16static inline void flush_dcache_mmap_lock(struct address_space *mapping) { }
17#define flush_icache_page(vma, pg) do { } while (0) 17static inline void flush_dcache_mmap_unlock(struct address_space *mapping) { }
18#define flush_icache_user_range(vma, pg, adr, len) do { } while (0) 18static inline void flush_icache_range(unsigned long start,
19#define flush_cache_vmap(start, end) do { } while (0) 19 unsigned long end) { }
20#define flush_cache_vunmap(start, end) do { } while (0) 20static inline void flush_icache_page(struct vm_area_struct *vma,
21 struct page *page) { }
22static inline void flush_icache_user_range(struct vm_area_struct *vma,
23 struct page *page,
24 unsigned long addr,
25 unsigned long len) { }
26static inline void flush_cache_vmap(unsigned long start, unsigned long end) { }
27static inline void flush_cache_vunmap(unsigned long start,
28 unsigned long end) { }
21 29
22#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 30static inline void copy_to_user_page(struct vm_area_struct *vma,
23 memcpy((dst), (src), (len)) 31 struct page *page, unsigned long vaddr,
24#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 32 void *dst, const void *src,
25 memcpy((dst), (src), (len)) 33 unsigned long len)
34{
35 memcpy(dst, src, len);
36}
37
38static inline void copy_from_user_page(struct vm_area_struct *vma,
39 struct page *page, unsigned long vaddr,
40 void *dst, const void *src,
41 unsigned long len)
42{
43 memcpy(dst, src, len);
44}
26 45
27#define PG_non_WB PG_arch_1 46#define PG_non_WB PG_arch_1
28PAGEFLAG(NonWB, non_WB) 47PAGEFLAG(NonWB, non_WB)
diff --git a/arch/x86/include/asm/calling.h b/arch/x86/include/asm/calling.h
index 2bc162e0ec6e..0e63c9a2a8d0 100644
--- a/arch/x86/include/asm/calling.h
+++ b/arch/x86/include/asm/calling.h
@@ -1,5 +1,55 @@
1/* 1/*
2 * Some macros to handle stack frames in assembly. 2
3 x86 function call convention, 64-bit:
4 -------------------------------------
5 arguments | callee-saved | extra caller-saved | return
6 [callee-clobbered] | | [callee-clobbered] |
7 ---------------------------------------------------------------------------
8 rdi rsi rdx rcx r8-9 | rbx rbp [*] r12-15 | r10-11 | rax, rdx [**]
9
10 ( rsp is obviously invariant across normal function calls. (gcc can 'merge'
11 functions when it sees tail-call optimization possibilities) rflags is
12 clobbered. Leftover arguments are passed over the stack frame.)
13
14 [*] In the frame-pointers case rbp is fixed to the stack frame.
15
16 [**] for struct return values wider than 64 bits the return convention is a
17 bit more complex: up to 128 bits width we return small structures
18 straight in rax, rdx. For structures larger than that (3 words or
19 larger) the caller puts a pointer to an on-stack return struct
20 [allocated in the caller's stack frame] into the first argument - i.e.
21 into rdi. All other arguments shift up by one in this case.
22 Fortunately this case is rare in the kernel.
23
24For 32-bit we have the following conventions - kernel is built with
25-mregparm=3 and -freg-struct-return:
26
27 x86 function calling convention, 32-bit:
28 ----------------------------------------
29 arguments | callee-saved | extra caller-saved | return
30 [callee-clobbered] | | [callee-clobbered] |
31 -------------------------------------------------------------------------
32 eax edx ecx | ebx edi esi ebp [*] | <none> | eax, edx [**]
33
34 ( here too esp is obviously invariant across normal function calls. eflags
35 is clobbered. Leftover arguments are passed over the stack frame. )
36
37 [*] In the frame-pointers case ebp is fixed to the stack frame.
38
39 [**] We build with -freg-struct-return, which on 32-bit means similar
40 semantics as on 64-bit: edx can be used for a second return value
41 (i.e. covering integer and structure sizes up to 64 bits) - after that
42 it gets more complex and more expensive: 3-word or larger struct returns
43 get done in the caller's frame and the pointer to the return struct goes
44 into regparm0, i.e. eax - the other arguments shift up and the
45 function's register parameters degenerate to regparm=2 in essence.
46
47*/
48
49
50/*
51 * 64-bit system call stack frame layout defines and helpers,
52 * for assembly code:
3 */ 53 */
4 54
5#define R15 0 55#define R15 0
@@ -9,7 +59,7 @@
9#define RBP 32 59#define RBP 32
10#define RBX 40 60#define RBX 40
11 61
12/* arguments: interrupts/non tracing syscalls only save upto here*/ 62/* arguments: interrupts/non tracing syscalls only save up to here: */
13#define R11 48 63#define R11 48
14#define R10 56 64#define R10 56
15#define R9 64 65#define R9 64
@@ -22,7 +72,7 @@
22#define ORIG_RAX 120 /* + error_code */ 72#define ORIG_RAX 120 /* + error_code */
23/* end of arguments */ 73/* end of arguments */
24 74
25/* cpu exception frame or undefined in case of fast syscall. */ 75/* cpu exception frame or undefined in case of fast syscall: */
26#define RIP 128 76#define RIP 128
27#define CS 136 77#define CS 136
28#define EFLAGS 144 78#define EFLAGS 144
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index bae482df6039..b185091bf19c 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -7,6 +7,20 @@
7#include <linux/nodemask.h> 7#include <linux/nodemask.h>
8#include <linux/percpu.h> 8#include <linux/percpu.h>
9 9
10#ifdef CONFIG_SMP
11
12extern void prefill_possible_map(void);
13
14#else /* CONFIG_SMP */
15
16static inline void prefill_possible_map(void) {}
17
18#define cpu_physical_id(cpu) boot_cpu_physical_apicid
19#define safe_smp_processor_id() 0
20#define stack_smp_processor_id() 0
21
22#endif /* CONFIG_SMP */
23
10struct x86_cpu { 24struct x86_cpu {
11 struct cpu cpu; 25 struct cpu cpu;
12}; 26};
@@ -17,4 +31,7 @@ extern void arch_unregister_cpu(int);
17#endif 31#endif
18 32
19DECLARE_PER_CPU(int, cpu_state); 33DECLARE_PER_CPU(int, cpu_state);
34
35extern unsigned int boot_cpu_id;
36
20#endif /* _ASM_X86_CPU_H */ 37#endif /* _ASM_X86_CPU_H */
diff --git a/arch/x86/include/asm/cpumask.h b/arch/x86/include/asm/cpumask.h
new file mode 100644
index 000000000000..a7f3c75f8ad7
--- /dev/null
+++ b/arch/x86/include/asm/cpumask.h
@@ -0,0 +1,32 @@
1#ifndef _ASM_X86_CPUMASK_H
2#define _ASM_X86_CPUMASK_H
3#ifndef __ASSEMBLY__
4#include <linux/cpumask.h>
5
6#ifdef CONFIG_X86_64
7
8extern cpumask_var_t cpu_callin_mask;
9extern cpumask_var_t cpu_callout_mask;
10extern cpumask_var_t cpu_initialized_mask;
11extern cpumask_var_t cpu_sibling_setup_mask;
12
13extern void setup_cpu_local_masks(void);
14
15#else /* CONFIG_X86_32 */
16
17extern cpumask_t cpu_callin_map;
18extern cpumask_t cpu_callout_map;
19extern cpumask_t cpu_initialized;
20extern cpumask_t cpu_sibling_setup_map;
21
22#define cpu_callin_mask ((struct cpumask *)&cpu_callin_map)
23#define cpu_callout_mask ((struct cpumask *)&cpu_callout_map)
24#define cpu_initialized_mask ((struct cpumask *)&cpu_initialized)
25#define cpu_sibling_setup_mask ((struct cpumask *)&cpu_sibling_setup_map)
26
27static inline void setup_cpu_local_masks(void) { }
28
29#endif /* CONFIG_X86_32 */
30
31#endif /* __ASSEMBLY__ */
32#endif /* _ASM_X86_CPUMASK_H */
diff --git a/arch/x86/include/asm/current.h b/arch/x86/include/asm/current.h
index 0930b4f8d672..c68c361697e1 100644
--- a/arch/x86/include/asm/current.h
+++ b/arch/x86/include/asm/current.h
@@ -1,39 +1,21 @@
1#ifndef _ASM_X86_CURRENT_H 1#ifndef _ASM_X86_CURRENT_H
2#define _ASM_X86_CURRENT_H 2#define _ASM_X86_CURRENT_H
3 3
4#ifdef CONFIG_X86_32
5#include <linux/compiler.h> 4#include <linux/compiler.h>
6#include <asm/percpu.h> 5#include <asm/percpu.h>
7 6
7#ifndef __ASSEMBLY__
8struct task_struct; 8struct task_struct;
9 9
10DECLARE_PER_CPU(struct task_struct *, current_task); 10DECLARE_PER_CPU(struct task_struct *, current_task);
11static __always_inline struct task_struct *get_current(void)
12{
13 return x86_read_percpu(current_task);
14}
15
16#else /* X86_32 */
17
18#ifndef __ASSEMBLY__
19#include <asm/pda.h>
20
21struct task_struct;
22 11
23static __always_inline struct task_struct *get_current(void) 12static __always_inline struct task_struct *get_current(void)
24{ 13{
25 return read_pda(pcurrent); 14 return percpu_read(current_task);
26} 15}
27 16
28#else /* __ASSEMBLY__ */ 17#define current get_current()
29
30#include <asm/asm-offsets.h>
31#define GET_CURRENT(reg) movq %gs:(pda_pcurrent),reg
32 18
33#endif /* __ASSEMBLY__ */ 19#endif /* __ASSEMBLY__ */
34 20
35#endif /* X86_32 */
36
37#define current get_current()
38
39#endif /* _ASM_X86_CURRENT_H */ 21#endif /* _ASM_X86_CURRENT_H */
diff --git a/arch/x86/include/asm/mach-default/do_timer.h b/arch/x86/include/asm/do_timer.h
index 23ecda0b28a0..23ecda0b28a0 100644
--- a/arch/x86/include/asm/mach-default/do_timer.h
+++ b/arch/x86/include/asm/do_timer.h
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index f51a3ddde01a..83c1bc8d2e8a 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -112,7 +112,7 @@ extern unsigned int vdso_enabled;
112 * now struct_user_regs, they are different) 112 * now struct_user_regs, they are different)
113 */ 113 */
114 114
115#define ELF_CORE_COPY_REGS(pr_reg, regs) \ 115#define ELF_CORE_COPY_REGS_COMMON(pr_reg, regs) \
116do { \ 116do { \
117 pr_reg[0] = regs->bx; \ 117 pr_reg[0] = regs->bx; \
118 pr_reg[1] = regs->cx; \ 118 pr_reg[1] = regs->cx; \
@@ -124,7 +124,6 @@ do { \
124 pr_reg[7] = regs->ds & 0xffff; \ 124 pr_reg[7] = regs->ds & 0xffff; \
125 pr_reg[8] = regs->es & 0xffff; \ 125 pr_reg[8] = regs->es & 0xffff; \
126 pr_reg[9] = regs->fs & 0xffff; \ 126 pr_reg[9] = regs->fs & 0xffff; \
127 savesegment(gs, pr_reg[10]); \
128 pr_reg[11] = regs->orig_ax; \ 127 pr_reg[11] = regs->orig_ax; \
129 pr_reg[12] = regs->ip; \ 128 pr_reg[12] = regs->ip; \
130 pr_reg[13] = regs->cs & 0xffff; \ 129 pr_reg[13] = regs->cs & 0xffff; \
@@ -133,6 +132,18 @@ do { \
133 pr_reg[16] = regs->ss & 0xffff; \ 132 pr_reg[16] = regs->ss & 0xffff; \
134} while (0); 133} while (0);
135 134
135#define ELF_CORE_COPY_REGS(pr_reg, regs) \
136do { \
137 ELF_CORE_COPY_REGS_COMMON(pr_reg, regs);\
138 pr_reg[10] = get_user_gs(regs); \
139} while (0);
140
141#define ELF_CORE_COPY_KERNEL_REGS(pr_reg, regs) \
142do { \
143 ELF_CORE_COPY_REGS_COMMON(pr_reg, regs);\
144 savesegment(gs, pr_reg[10]); \
145} while (0);
146
136#define ELF_PLATFORM (utsname()->machine) 147#define ELF_PLATFORM (utsname()->machine)
137#define set_personality_64bit() do { } while (0) 148#define set_personality_64bit() do { } while (0)
138 149
diff --git a/arch/x86/include/asm/mach-default/entry_arch.h b/arch/x86/include/asm/entry_arch.h
index 6b1add8e31dd..854d538ae857 100644
--- a/arch/x86/include/asm/mach-default/entry_arch.h
+++ b/arch/x86/include/asm/entry_arch.h
@@ -9,12 +9,28 @@
9 * is no hardware IRQ pin equivalent for them, they are triggered 9 * is no hardware IRQ pin equivalent for them, they are triggered
10 * through the ICC by us (IPIs) 10 * through the ICC by us (IPIs)
11 */ 11 */
12#ifdef CONFIG_X86_SMP 12#ifdef CONFIG_SMP
13BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) 13BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
14BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
15BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) 14BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
16BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR) 15BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
17BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR) 16BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
17
18BUILD_INTERRUPT3(invalidate_interrupt0,INVALIDATE_TLB_VECTOR_START+0,
19 smp_invalidate_interrupt)
20BUILD_INTERRUPT3(invalidate_interrupt1,INVALIDATE_TLB_VECTOR_START+1,
21 smp_invalidate_interrupt)
22BUILD_INTERRUPT3(invalidate_interrupt2,INVALIDATE_TLB_VECTOR_START+2,
23 smp_invalidate_interrupt)
24BUILD_INTERRUPT3(invalidate_interrupt3,INVALIDATE_TLB_VECTOR_START+3,
25 smp_invalidate_interrupt)
26BUILD_INTERRUPT3(invalidate_interrupt4,INVALIDATE_TLB_VECTOR_START+4,
27 smp_invalidate_interrupt)
28BUILD_INTERRUPT3(invalidate_interrupt5,INVALIDATE_TLB_VECTOR_START+5,
29 smp_invalidate_interrupt)
30BUILD_INTERRUPT3(invalidate_interrupt6,INVALIDATE_TLB_VECTOR_START+6,
31 smp_invalidate_interrupt)
32BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7,
33 smp_invalidate_interrupt)
18#endif 34#endif
19 35
20/* 36/*
@@ -25,10 +41,15 @@ BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
25 * a much simpler SMP time architecture: 41 * a much simpler SMP time architecture:
26 */ 42 */
27#ifdef CONFIG_X86_LOCAL_APIC 43#ifdef CONFIG_X86_LOCAL_APIC
44
28BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR) 45BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
29BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR) 46BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
30BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR) 47BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
31 48
49#ifdef CONFIG_PERF_COUNTERS
50BUILD_INTERRUPT(perf_counter_interrupt, LOCAL_PERF_VECTOR)
51#endif
52
32#ifdef CONFIG_X86_MCE_P4THERMAL 53#ifdef CONFIG_X86_MCE_P4THERMAL
33BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR) 54BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
34#endif 55#endif
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
deleted file mode 100644
index c58b9cc74465..000000000000
--- a/arch/x86/include/asm/es7000/apic.h
+++ /dev/null
@@ -1,242 +0,0 @@
1#ifndef __ASM_ES7000_APIC_H
2#define __ASM_ES7000_APIC_H
3
4#include <linux/gfp.h>
5
6#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
7#define esr_disable (1)
8
9static inline int apic_id_registered(void)
10{
11 return (1);
12}
13
14static inline const cpumask_t *target_cpus_cluster(void)
15{
16 return &CPU_MASK_ALL;
17}
18
19static inline const cpumask_t *target_cpus(void)
20{
21 return &cpumask_of_cpu(smp_processor_id());
22}
23
24#define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER)
25#define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio)
26#define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */
27#define NO_BALANCE_IRQ_CLUSTER (1)
28
29#define APIC_DFR_VALUE (APIC_DFR_FLAT)
30#define INT_DELIVERY_MODE (dest_Fixed)
31#define INT_DEST_MODE (0) /* phys delivery to target procs */
32#define NO_BALANCE_IRQ (0)
33#undef APIC_DEST_LOGICAL
34#define APIC_DEST_LOGICAL 0x0
35
36static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
37{
38 return 0;
39}
40static inline unsigned long check_apicid_present(int bit)
41{
42 return physid_isset(bit, phys_cpu_present_map);
43}
44
45#define apicid_cluster(apicid) (apicid & 0xF0)
46
47static inline unsigned long calculate_ldr(int cpu)
48{
49 unsigned long id;
50 id = xapic_phys_to_log_apicid(cpu);
51 return (SET_APIC_LOGICAL_ID(id));
52}
53
54/*
55 * Set up the logical destination ID.
56 *
57 * Intel recommends to set DFR, LdR and TPR before enabling
58 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
59 * document number 292116). So here it goes...
60 */
61static inline void init_apic_ldr_cluster(void)
62{
63 unsigned long val;
64 int cpu = smp_processor_id();
65
66 apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER);
67 val = calculate_ldr(cpu);
68 apic_write(APIC_LDR, val);
69}
70
71static inline void init_apic_ldr(void)
72{
73 unsigned long val;
74 int cpu = smp_processor_id();
75
76 apic_write(APIC_DFR, APIC_DFR_VALUE);
77 val = calculate_ldr(cpu);
78 apic_write(APIC_LDR, val);
79}
80
81extern int apic_version [MAX_APICS];
82static inline void setup_apic_routing(void)
83{
84 int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
85 printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
86 (apic_version[apic] == 0x14) ?
87 "Physical Cluster" : "Logical Cluster",
88 nr_ioapics, cpus_addr(*target_cpus())[0]);
89}
90
91static inline int multi_timer_check(int apic, int irq)
92{
93 return 0;
94}
95
96static inline int apicid_to_node(int logical_apicid)
97{
98 return 0;
99}
100
101
102static inline int cpu_present_to_apicid(int mps_cpu)
103{
104 if (!mps_cpu)
105 return boot_cpu_physical_apicid;
106 else if (mps_cpu < nr_cpu_ids)
107 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
108 else
109 return BAD_APICID;
110}
111
112static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
113{
114 static int id = 0;
115 physid_mask_t mask;
116 mask = physid_mask_of_physid(id);
117 ++id;
118 return mask;
119}
120
121extern u8 cpu_2_logical_apicid[];
122/* Mapping from cpu number to logical apicid */
123static inline int cpu_to_logical_apicid(int cpu)
124{
125#ifdef CONFIG_SMP
126 if (cpu >= nr_cpu_ids)
127 return BAD_APICID;
128 return (int)cpu_2_logical_apicid[cpu];
129#else
130 return logical_smp_processor_id();
131#endif
132}
133
134static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
135{
136 /* For clustered we don't have a good way to do this yet - hack */
137 return physids_promote(0xff);
138}
139
140
141static inline void setup_portio_remap(void)
142{
143}
144
145extern unsigned int boot_cpu_physical_apicid;
146static inline int check_phys_apicid_present(int cpu_physical_apicid)
147{
148 boot_cpu_physical_apicid = read_apic_id();
149 return (1);
150}
151
152static inline unsigned int
153cpu_mask_to_apicid_cluster(const struct cpumask *cpumask)
154{
155 int num_bits_set;
156 int cpus_found = 0;
157 int cpu;
158 int apicid;
159
160 num_bits_set = cpumask_weight(cpumask);
161 /* Return id to all */
162 if (num_bits_set == nr_cpu_ids)
163 return 0xFF;
164 /*
165 * The cpus in the mask must all be on the apic cluster. If are not
166 * on the same apicid cluster return default value of TARGET_CPUS.
167 */
168 cpu = cpumask_first(cpumask);
169 apicid = cpu_to_logical_apicid(cpu);
170 while (cpus_found < num_bits_set) {
171 if (cpumask_test_cpu(cpu, cpumask)) {
172 int new_apicid = cpu_to_logical_apicid(cpu);
173 if (apicid_cluster(apicid) !=
174 apicid_cluster(new_apicid)){
175 printk ("%s: Not a valid mask!\n", __func__);
176 return 0xFF;
177 }
178 apicid = new_apicid;
179 cpus_found++;
180 }
181 cpu++;
182 }
183 return apicid;
184}
185
186static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
187{
188 int num_bits_set;
189 int cpus_found = 0;
190 int cpu;
191 int apicid;
192
193 num_bits_set = cpus_weight(*cpumask);
194 /* Return id to all */
195 if (num_bits_set == nr_cpu_ids)
196 return cpu_to_logical_apicid(0);
197 /*
198 * The cpus in the mask must all be on the apic cluster. If are not
199 * on the same apicid cluster return default value of TARGET_CPUS.
200 */
201 cpu = first_cpu(*cpumask);
202 apicid = cpu_to_logical_apicid(cpu);
203 while (cpus_found < num_bits_set) {
204 if (cpu_isset(cpu, *cpumask)) {
205 int new_apicid = cpu_to_logical_apicid(cpu);
206 if (apicid_cluster(apicid) !=
207 apicid_cluster(new_apicid)){
208 printk ("%s: Not a valid mask!\n", __func__);
209 return cpu_to_logical_apicid(0);
210 }
211 apicid = new_apicid;
212 cpus_found++;
213 }
214 cpu++;
215 }
216 return apicid;
217}
218
219
220static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask,
221 const struct cpumask *andmask)
222{
223 int apicid = cpu_to_logical_apicid(0);
224 cpumask_var_t cpumask;
225
226 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
227 return apicid;
228
229 cpumask_and(cpumask, inmask, andmask);
230 cpumask_and(cpumask, cpumask, cpu_online_mask);
231 apicid = cpu_mask_to_apicid(cpumask);
232
233 free_cpumask_var(cpumask);
234 return apicid;
235}
236
237static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
238{
239 return cpuid_apic >> index_msb;
240}
241
242#endif /* __ASM_ES7000_APIC_H */
diff --git a/arch/x86/include/asm/es7000/apicdef.h b/arch/x86/include/asm/es7000/apicdef.h
deleted file mode 100644
index 8b234a3cb851..000000000000
--- a/arch/x86/include/asm/es7000/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ASM_ES7000_APICDEF_H
2#define __ASM_ES7000_APICDEF_H
3
4#define APIC_ID_MASK (0xFF<<24)
5
6static inline unsigned get_apic_id(unsigned long x)
7{
8 return (((x)>>24)&0xFF);
9}
10
11#define GET_APIC_ID(x) get_apic_id(x)
12
13#endif
diff --git a/arch/x86/include/asm/es7000/ipi.h b/arch/x86/include/asm/es7000/ipi.h
deleted file mode 100644
index 7e8ed24d4b8a..000000000000
--- a/arch/x86/include/asm/es7000/ipi.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef __ASM_ES7000_IPI_H
2#define __ASM_ES7000_IPI_H
3
4void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
5void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
6
7static inline void send_IPI_mask(const struct cpumask *mask, int vector)
8{
9 send_IPI_mask_sequence(mask, vector);
10}
11
12static inline void send_IPI_allbutself(int vector)
13{
14 send_IPI_mask_allbutself(cpu_online_mask, vector);
15}
16
17static inline void send_IPI_all(int vector)
18{
19 send_IPI_mask(cpu_online_mask, vector);
20}
21
22#endif /* __ASM_ES7000_IPI_H */
diff --git a/arch/x86/include/asm/es7000/mpparse.h b/arch/x86/include/asm/es7000/mpparse.h
deleted file mode 100644
index c1629b090ec2..000000000000
--- a/arch/x86/include/asm/es7000/mpparse.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef __ASM_ES7000_MPPARSE_H
2#define __ASM_ES7000_MPPARSE_H
3
4#include <linux/acpi.h>
5
6extern int parse_unisys_oem (char *oemptr);
7extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
8extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
9extern void setup_unisys(void);
10
11#ifndef CONFIG_X86_GENERICARCH
12extern int acpi_madt_oem_check(char *oem_id, char *oem_table_id);
13extern int mps_oem_check(struct mpc_table *mpc, char *oem, char *productid);
14#endif
15
16#ifdef CONFIG_ACPI
17
18static inline int es7000_check_dsdt(void)
19{
20 struct acpi_table_header header;
21
22 if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
23 !strncmp(header.oem_id, "UNISYS", 6))
24 return 1;
25 return 0;
26}
27#endif
28
29#endif /* __ASM_MACH_MPPARSE_H */
diff --git a/arch/x86/include/asm/es7000/wakecpu.h b/arch/x86/include/asm/es7000/wakecpu.h
deleted file mode 100644
index 78f0daaee436..000000000000
--- a/arch/x86/include/asm/es7000/wakecpu.h
+++ /dev/null
@@ -1,37 +0,0 @@
1#ifndef __ASM_ES7000_WAKECPU_H
2#define __ASM_ES7000_WAKECPU_H
3
4#define TRAMPOLINE_PHYS_LOW 0x467
5#define TRAMPOLINE_PHYS_HIGH 0x469
6
7static inline void wait_for_init_deassert(atomic_t *deassert)
8{
9#ifndef CONFIG_ES7000_CLUSTERED_APIC
10 while (!atomic_read(deassert))
11 cpu_relax();
12#endif
13 return;
14}
15
16/* Nothing to do for most platforms, since cleared by the INIT cycle */
17static inline void smp_callin_clear_local_apic(void)
18{
19}
20
21static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
22{
23}
24
25static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
26{
27}
28
29extern void __inquire_remote_apic(int apicid);
30
31static inline void inquire_remote_apic(int apicid)
32{
33 if (apic_verbosity >= APIC_DEBUG)
34 __inquire_remote_apic(apicid);
35}
36
37#endif /* __ASM_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index 23696d44a0af..63a79c77d220 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -1,11 +1,145 @@
1/*
2 * fixmap.h: compile-time virtual memory allocation
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1998 Ingo Molnar
9 *
10 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
11 * x86_32 and x86_64 integration by Gustavo F. Padovan, February 2009
12 */
13
1#ifndef _ASM_X86_FIXMAP_H 14#ifndef _ASM_X86_FIXMAP_H
2#define _ASM_X86_FIXMAP_H 15#define _ASM_X86_FIXMAP_H
3 16
17#ifndef __ASSEMBLY__
18#include <linux/kernel.h>
19#include <asm/acpi.h>
20#include <asm/apicdef.h>
21#include <asm/page.h>
22#ifdef CONFIG_X86_32
23#include <linux/threads.h>
24#include <asm/kmap_types.h>
25#else
26#include <asm/vsyscall.h>
27#endif
28
29/*
30 * We can't declare FIXADDR_TOP as variable for x86_64 because vsyscall
31 * uses fixmaps that relies on FIXADDR_TOP for proper address calculation.
32 * Because of this, FIXADDR_TOP x86 integration was left as later work.
33 */
34#ifdef CONFIG_X86_32
35/* used by vmalloc.c, vsyscall.lds.S.
36 *
37 * Leave one empty page between vmalloc'ed areas and
38 * the start of the fixmap.
39 */
40extern unsigned long __FIXADDR_TOP;
41#define FIXADDR_TOP ((unsigned long)__FIXADDR_TOP)
42
43#define FIXADDR_USER_START __fix_to_virt(FIX_VDSO)
44#define FIXADDR_USER_END __fix_to_virt(FIX_VDSO - 1)
45#else
46#define FIXADDR_TOP (VSYSCALL_END-PAGE_SIZE)
47
48/* Only covers 32bit vsyscalls currently. Need another set for 64bit. */
49#define FIXADDR_USER_START ((unsigned long)VSYSCALL32_VSYSCALL)
50#define FIXADDR_USER_END (FIXADDR_USER_START + PAGE_SIZE)
51#endif
52
53
54/*
55 * Here we define all the compile-time 'special' virtual
56 * addresses. The point is to have a constant address at
57 * compile time, but to set the physical address only
58 * in the boot process.
59 * for x86_32: We allocate these special addresses
60 * from the end of virtual memory (0xfffff000) backwards.
61 * Also this lets us do fail-safe vmalloc(), we
62 * can guarantee that these special addresses and
63 * vmalloc()-ed addresses never overlap.
64 *
65 * These 'compile-time allocated' memory buffers are
66 * fixed-size 4k pages (or larger if used with an increment
67 * higher than 1). Use set_fixmap(idx,phys) to associate
68 * physical memory with fixmap indices.
69 *
70 * TLB entries of such buffers will not be flushed across
71 * task switches.
72 */
73enum fixed_addresses {
4#ifdef CONFIG_X86_32 74#ifdef CONFIG_X86_32
5# include "fixmap_32.h" 75 FIX_HOLE,
76 FIX_VDSO,
6#else 77#else
7# include "fixmap_64.h" 78 VSYSCALL_LAST_PAGE,
79 VSYSCALL_FIRST_PAGE = VSYSCALL_LAST_PAGE
80 + ((VSYSCALL_END-VSYSCALL_START) >> PAGE_SHIFT) - 1,
81 VSYSCALL_HPET,
8#endif 82#endif
83 FIX_DBGP_BASE,
84 FIX_EARLYCON_MEM_BASE,
85#ifdef CONFIG_X86_LOCAL_APIC
86 FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */
87#endif
88#ifdef CONFIG_X86_IO_APIC
89 FIX_IO_APIC_BASE_0,
90 FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1,
91#endif
92#ifdef CONFIG_X86_VISWS_APIC
93 FIX_CO_CPU, /* Cobalt timer */
94 FIX_CO_APIC, /* Cobalt APIC Redirection Table */
95 FIX_LI_PCIA, /* Lithium PCI Bridge A */
96 FIX_LI_PCIB, /* Lithium PCI Bridge B */
97#endif
98#ifdef CONFIG_X86_F00F_BUG
99 FIX_F00F_IDT, /* Virtual mapping for IDT */
100#endif
101#ifdef CONFIG_X86_CYCLONE_TIMER
102 FIX_CYCLONE_TIMER, /*cyclone timer register*/
103#endif
104#ifdef CONFIG_X86_32
105 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
106 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
107#ifdef CONFIG_PCI_MMCONFIG
108 FIX_PCIE_MCFG,
109#endif
110#endif
111#ifdef CONFIG_PARAVIRT
112 FIX_PARAVIRT_BOOTMAP,
113#endif
114 __end_of_permanent_fixed_addresses,
115#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
116 FIX_OHCI1394_BASE,
117#endif
118 /*
119 * 256 temporary boot-time mappings, used by early_ioremap(),
120 * before ioremap() is functional.
121 *
122 * We round it up to the next 256 pages boundary so that we
123 * can have a single pgd entry and a single pte table:
124 */
125#define NR_FIX_BTMAPS 64
126#define FIX_BTMAPS_SLOTS 4
127 FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
128 (__end_of_permanent_fixed_addresses & 255),
129 FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
130#ifdef CONFIG_X86_32
131 FIX_WP_TEST,
132#endif
133 __end_of_fixed_addresses
134};
135
136
137extern void reserve_top_address(unsigned long reserve);
138
139#define FIXADDR_SIZE (__end_of_permanent_fixed_addresses << PAGE_SHIFT)
140#define FIXADDR_BOOT_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
141#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
142#define FIXADDR_BOOT_START (FIXADDR_TOP - FIXADDR_BOOT_SIZE)
9 143
10extern int fixmaps_set; 144extern int fixmaps_set;
11 145
@@ -69,4 +203,5 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
69 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); 203 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
70 return __virt_to_fix(vaddr); 204 return __virt_to_fix(vaddr);
71} 205}
206#endif /* !__ASSEMBLY__ */
72#endif /* _ASM_X86_FIXMAP_H */ 207#endif /* _ASM_X86_FIXMAP_H */
diff --git a/arch/x86/include/asm/fixmap_32.h b/arch/x86/include/asm/fixmap_32.h
deleted file mode 100644
index c7115c1d7217..000000000000
--- a/arch/x86/include/asm/fixmap_32.h
+++ /dev/null
@@ -1,119 +0,0 @@
1/*
2 * fixmap.h: compile-time virtual memory allocation
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1998 Ingo Molnar
9 *
10 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
11 */
12
13#ifndef _ASM_X86_FIXMAP_32_H
14#define _ASM_X86_FIXMAP_32_H
15
16
17/* used by vmalloc.c, vsyscall.lds.S.
18 *
19 * Leave one empty page between vmalloc'ed areas and
20 * the start of the fixmap.
21 */
22extern unsigned long __FIXADDR_TOP;
23#define FIXADDR_USER_START __fix_to_virt(FIX_VDSO)
24#define FIXADDR_USER_END __fix_to_virt(FIX_VDSO - 1)
25
26#ifndef __ASSEMBLY__
27#include <linux/kernel.h>
28#include <asm/acpi.h>
29#include <asm/apicdef.h>
30#include <asm/page.h>
31#include <linux/threads.h>
32#include <asm/kmap_types.h>
33
34/*
35 * Here we define all the compile-time 'special' virtual
36 * addresses. The point is to have a constant address at
37 * compile time, but to set the physical address only
38 * in the boot process. We allocate these special addresses
39 * from the end of virtual memory (0xfffff000) backwards.
40 * Also this lets us do fail-safe vmalloc(), we
41 * can guarantee that these special addresses and
42 * vmalloc()-ed addresses never overlap.
43 *
44 * these 'compile-time allocated' memory buffers are
45 * fixed-size 4k pages. (or larger if used with an increment
46 * highger than 1) use fixmap_set(idx,phys) to associate
47 * physical memory with fixmap indices.
48 *
49 * TLB entries of such buffers will not be flushed across
50 * task switches.
51 */
52enum fixed_addresses {
53 FIX_HOLE,
54 FIX_VDSO,
55 FIX_DBGP_BASE,
56 FIX_EARLYCON_MEM_BASE,
57#ifdef CONFIG_X86_LOCAL_APIC
58 FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */
59#endif
60#ifdef CONFIG_X86_IO_APIC
61 FIX_IO_APIC_BASE_0,
62 FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS-1,
63#endif
64#ifdef CONFIG_X86_VISWS_APIC
65 FIX_CO_CPU, /* Cobalt timer */
66 FIX_CO_APIC, /* Cobalt APIC Redirection Table */
67 FIX_LI_PCIA, /* Lithium PCI Bridge A */
68 FIX_LI_PCIB, /* Lithium PCI Bridge B */
69#endif
70#ifdef CONFIG_X86_F00F_BUG
71 FIX_F00F_IDT, /* Virtual mapping for IDT */
72#endif
73#ifdef CONFIG_X86_CYCLONE_TIMER
74 FIX_CYCLONE_TIMER, /*cyclone timer register*/
75#endif
76 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
77 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
78#ifdef CONFIG_PCI_MMCONFIG
79 FIX_PCIE_MCFG,
80#endif
81#ifdef CONFIG_PARAVIRT
82 FIX_PARAVIRT_BOOTMAP,
83#endif
84 __end_of_permanent_fixed_addresses,
85 /*
86 * 256 temporary boot-time mappings, used by early_ioremap(),
87 * before ioremap() is functional.
88 *
89 * We round it up to the next 256 pages boundary so that we
90 * can have a single pgd entry and a single pte table:
91 */
92#define NR_FIX_BTMAPS 64
93#define FIX_BTMAPS_SLOTS 4
94 FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
95 (__end_of_permanent_fixed_addresses & 255),
96 FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
97 FIX_WP_TEST,
98#ifdef CONFIG_ACPI
99 FIX_ACPI_BEGIN,
100 FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1,
101#endif
102#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
103 FIX_OHCI1394_BASE,
104#endif
105 __end_of_fixed_addresses
106};
107
108extern void reserve_top_address(unsigned long reserve);
109
110
111#define FIXADDR_TOP ((unsigned long)__FIXADDR_TOP)
112
113#define __FIXADDR_SIZE (__end_of_permanent_fixed_addresses << PAGE_SHIFT)
114#define __FIXADDR_BOOT_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
115#define FIXADDR_START (FIXADDR_TOP - __FIXADDR_SIZE)
116#define FIXADDR_BOOT_START (FIXADDR_TOP - __FIXADDR_BOOT_SIZE)
117
118#endif /* !__ASSEMBLY__ */
119#endif /* _ASM_X86_FIXMAP_32_H */
diff --git a/arch/x86/include/asm/fixmap_64.h b/arch/x86/include/asm/fixmap_64.h
deleted file mode 100644
index 8be740977db8..000000000000
--- a/arch/x86/include/asm/fixmap_64.h
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * fixmap.h: compile-time virtual memory allocation
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1998 Ingo Molnar
9 */
10
11#ifndef _ASM_X86_FIXMAP_64_H
12#define _ASM_X86_FIXMAP_64_H
13
14#include <linux/kernel.h>
15#include <asm/acpi.h>
16#include <asm/apicdef.h>
17#include <asm/page.h>
18#include <asm/vsyscall.h>
19
20/*
21 * Here we define all the compile-time 'special' virtual
22 * addresses. The point is to have a constant address at
23 * compile time, but to set the physical address only
24 * in the boot process.
25 *
26 * These 'compile-time allocated' memory buffers are
27 * fixed-size 4k pages (or larger if used with an increment
28 * higher than 1). Use set_fixmap(idx,phys) to associate
29 * physical memory with fixmap indices.
30 *
31 * TLB entries of such buffers will not be flushed across
32 * task switches.
33 */
34
35enum fixed_addresses {
36 VSYSCALL_LAST_PAGE,
37 VSYSCALL_FIRST_PAGE = VSYSCALL_LAST_PAGE
38 + ((VSYSCALL_END-VSYSCALL_START) >> PAGE_SHIFT) - 1,
39 VSYSCALL_HPET,
40 FIX_DBGP_BASE,
41 FIX_EARLYCON_MEM_BASE,
42 FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */
43 FIX_IO_APIC_BASE_0,
44 FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1,
45#ifdef CONFIG_PARAVIRT
46 FIX_PARAVIRT_BOOTMAP,
47#endif
48 __end_of_permanent_fixed_addresses,
49#ifdef CONFIG_ACPI
50 FIX_ACPI_BEGIN,
51 FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1,
52#endif
53#ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT
54 FIX_OHCI1394_BASE,
55#endif
56 /*
57 * 256 temporary boot-time mappings, used by early_ioremap(),
58 * before ioremap() is functional.
59 *
60 * We round it up to the next 256 pages boundary so that we
61 * can have a single pgd entry and a single pte table:
62 */
63#define NR_FIX_BTMAPS 64
64#define FIX_BTMAPS_SLOTS 4
65 FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 -
66 (__end_of_permanent_fixed_addresses & 255),
67 FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_SLOTS - 1,
68 __end_of_fixed_addresses
69};
70
71#define FIXADDR_TOP (VSYSCALL_END-PAGE_SIZE)
72#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
73#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
74
75/* Only covers 32bit vsyscalls currently. Need another set for 64bit. */
76#define FIXADDR_USER_START ((unsigned long)VSYSCALL32_VSYSCALL)
77#define FIXADDR_USER_END (FIXADDR_USER_START + PAGE_SIZE)
78
79#endif /* _ASM_X86_FIXMAP_64_H */
diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h
index d48bee663a6f..4b8b98fa7f25 100644
--- a/arch/x86/include/asm/genapic.h
+++ b/arch/x86/include/asm/genapic.h
@@ -1,5 +1 @@
1#ifdef CONFIG_X86_32 #include <asm/apic.h>
2# include "genapic_32.h"
3#else
4# include "genapic_64.h"
5#endif
diff --git a/arch/x86/include/asm/genapic_32.h b/arch/x86/include/asm/genapic_32.h
deleted file mode 100644
index 2c05b737ee22..000000000000
--- a/arch/x86/include/asm/genapic_32.h
+++ /dev/null
@@ -1,148 +0,0 @@
1#ifndef _ASM_X86_GENAPIC_32_H
2#define _ASM_X86_GENAPIC_32_H
3
4#include <asm/mpspec.h>
5#include <asm/atomic.h>
6
7/*
8 * Generic APIC driver interface.
9 *
10 * An straight forward mapping of the APIC related parts of the
11 * x86 subarchitecture interface to a dynamic object.
12 *
13 * This is used by the "generic" x86 subarchitecture.
14 *
15 * Copyright 2003 Andi Kleen, SuSE Labs.
16 */
17
18struct mpc_bus;
19struct mpc_table;
20struct mpc_cpu;
21
22struct genapic {
23 char *name;
24 int (*probe)(void);
25
26 int (*apic_id_registered)(void);
27 const struct cpumask *(*target_cpus)(void);
28 int int_delivery_mode;
29 int int_dest_mode;
30 int ESR_DISABLE;
31 int apic_destination_logical;
32 unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
33 unsigned long (*check_apicid_present)(int apicid);
34 int no_balance_irq;
35 int no_ioapic_check;
36 void (*init_apic_ldr)(void);
37 physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
38
39 void (*setup_apic_routing)(void);
40 int (*multi_timer_check)(int apic, int irq);
41 int (*apicid_to_node)(int logical_apicid);
42 int (*cpu_to_logical_apicid)(int cpu);
43 int (*cpu_present_to_apicid)(int mps_cpu);
44 physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
45 void (*setup_portio_remap)(void);
46 int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
47 void (*enable_apic_mode)(void);
48 u32 (*phys_pkg_id)(u32 cpuid_apic, int index_msb);
49
50 /* mpparse */
51 /* When one of the next two hooks returns 1 the genapic
52 is switched to this. Essentially they are additional probe
53 functions. */
54 int (*mps_oem_check)(struct mpc_table *mpc, char *oem,
55 char *productid);
56 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
57
58 unsigned (*get_apic_id)(unsigned long x);
59 unsigned long apic_id_mask;
60 unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
61 unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
62 const struct cpumask *andmask);
63 void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
64
65#ifdef CONFIG_SMP
66 /* ipi */
67 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
68 void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
69 int vector);
70 void (*send_IPI_allbutself)(int vector);
71 void (*send_IPI_all)(int vector);
72#endif
73 int (*wakeup_cpu)(int apicid, unsigned long start_eip);
74 int trampoline_phys_low;
75 int trampoline_phys_high;
76 void (*wait_for_init_deassert)(atomic_t *deassert);
77 void (*smp_callin_clear_local_apic)(void);
78 void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
79 void (*restore_NMI_vector)(unsigned short *high, unsigned short *low);
80 void (*inquire_remote_apic)(int apicid);
81};
82
83#define APICFUNC(x) .x = x,
84
85/* More functions could be probably marked IPIFUNC and save some space
86 in UP GENERICARCH kernels, but I don't have the nerve right now
87 to untangle this mess. -AK */
88#ifdef CONFIG_SMP
89#define IPIFUNC(x) APICFUNC(x)
90#else
91#define IPIFUNC(x)
92#endif
93
94#define APIC_INIT(aname, aprobe) \
95{ \
96 .name = aname, \
97 .probe = aprobe, \
98 .int_delivery_mode = INT_DELIVERY_MODE, \
99 .int_dest_mode = INT_DEST_MODE, \
100 .no_balance_irq = NO_BALANCE_IRQ, \
101 .ESR_DISABLE = esr_disable, \
102 .apic_destination_logical = APIC_DEST_LOGICAL, \
103 APICFUNC(apic_id_registered) \
104 APICFUNC(target_cpus) \
105 APICFUNC(check_apicid_used) \
106 APICFUNC(check_apicid_present) \
107 APICFUNC(init_apic_ldr) \
108 APICFUNC(ioapic_phys_id_map) \
109 APICFUNC(setup_apic_routing) \
110 APICFUNC(multi_timer_check) \
111 APICFUNC(apicid_to_node) \
112 APICFUNC(cpu_to_logical_apicid) \
113 APICFUNC(cpu_present_to_apicid) \
114 APICFUNC(apicid_to_cpu_present) \
115 APICFUNC(setup_portio_remap) \
116 APICFUNC(check_phys_apicid_present) \
117 APICFUNC(mps_oem_check) \
118 APICFUNC(get_apic_id) \
119 .apic_id_mask = APIC_ID_MASK, \
120 APICFUNC(cpu_mask_to_apicid) \
121 APICFUNC(cpu_mask_to_apicid_and) \
122 APICFUNC(vector_allocation_domain) \
123 APICFUNC(acpi_madt_oem_check) \
124 IPIFUNC(send_IPI_mask) \
125 IPIFUNC(send_IPI_allbutself) \
126 IPIFUNC(send_IPI_all) \
127 APICFUNC(enable_apic_mode) \
128 APICFUNC(phys_pkg_id) \
129 .trampoline_phys_low = TRAMPOLINE_PHYS_LOW, \
130 .trampoline_phys_high = TRAMPOLINE_PHYS_HIGH, \
131 APICFUNC(wait_for_init_deassert) \
132 APICFUNC(smp_callin_clear_local_apic) \
133 APICFUNC(store_NMI_vector) \
134 APICFUNC(restore_NMI_vector) \
135 APICFUNC(inquire_remote_apic) \
136}
137
138extern struct genapic *genapic;
139extern void es7000_update_genapic_to_cluster(void);
140
141enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
142#define get_uv_system_type() UV_NONE
143#define is_uv_system() 0
144#define uv_wakeup_secondary(a, b) 1
145#define uv_system_init() do {} while (0)
146
147
148#endif /* _ASM_X86_GENAPIC_32_H */
diff --git a/arch/x86/include/asm/genapic_64.h b/arch/x86/include/asm/genapic_64.h
deleted file mode 100644
index adf32fb56aa6..000000000000
--- a/arch/x86/include/asm/genapic_64.h
+++ /dev/null
@@ -1,66 +0,0 @@
1#ifndef _ASM_X86_GENAPIC_64_H
2#define _ASM_X86_GENAPIC_64_H
3
4#include <linux/cpumask.h>
5
6/*
7 * Copyright 2004 James Cleverdon, IBM.
8 * Subject to the GNU Public License, v.2
9 *
10 * Generic APIC sub-arch data struct.
11 *
12 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
13 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
14 * James Cleverdon.
15 */
16
17struct genapic {
18 char *name;
19 int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
20 u32 int_delivery_mode;
21 u32 int_dest_mode;
22 int (*apic_id_registered)(void);
23 const struct cpumask *(*target_cpus)(void);
24 void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
25 void (*init_apic_ldr)(void);
26 /* ipi */
27 void (*send_IPI_mask)(const struct cpumask *mask, int vector);
28 void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
29 int vector);
30 void (*send_IPI_allbutself)(int vector);
31 void (*send_IPI_all)(int vector);
32 void (*send_IPI_self)(int vector);
33 /* */
34 unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
35 unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
36 const struct cpumask *andmask);
37 unsigned int (*phys_pkg_id)(int index_msb);
38 unsigned int (*get_apic_id)(unsigned long x);
39 unsigned long (*set_apic_id)(unsigned int id);
40 unsigned long apic_id_mask;
41 /* wakeup_secondary_cpu */
42 int (*wakeup_cpu)(int apicid, unsigned long start_eip);
43};
44
45extern struct genapic *genapic;
46
47extern struct genapic apic_flat;
48extern struct genapic apic_physflat;
49extern struct genapic apic_x2apic_cluster;
50extern struct genapic apic_x2apic_phys;
51extern int acpi_madt_oem_check(char *, char *);
52
53extern void apic_send_IPI_self(int vector);
54enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
55extern enum uv_system_type get_uv_system_type(void);
56extern int is_uv_system(void);
57
58extern struct genapic apic_x2apic_uv_x;
59DECLARE_PER_CPU(int, x2apic_extra_bits);
60extern void uv_cpu_init(void);
61extern void uv_system_init(void);
62extern int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip);
63
64extern void setup_apic_routing(void);
65
66#endif /* _ASM_X86_GENAPIC_64_H */
diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
index 000787df66e6..176f058e7159 100644
--- a/arch/x86/include/asm/hardirq.h
+++ b/arch/x86/include/asm/hardirq.h
@@ -1,11 +1,52 @@
1#ifdef CONFIG_X86_32 1#ifndef _ASM_X86_HARDIRQ_H
2# include "hardirq_32.h" 2#define _ASM_X86_HARDIRQ_H
3#else 3
4# include "hardirq_64.h" 4#include <linux/threads.h>
5#include <linux/irq.h>
6
7typedef struct {
8 unsigned int __softirq_pending;
9 unsigned int __nmi_count; /* arch dependent */
10 unsigned int irq0_irqs;
11#ifdef CONFIG_X86_LOCAL_APIC
12 unsigned int apic_timer_irqs; /* arch dependent */
13 unsigned int irq_spurious_count;
14#endif
15#ifdef CONFIG_SMP
16 unsigned int irq_resched_count;
17 unsigned int irq_call_count;
18 unsigned int irq_tlb_count;
19#endif
20#ifdef CONFIG_X86_MCE
21 unsigned int irq_thermal_count;
22# ifdef CONFIG_X86_64
23 unsigned int irq_threshold_count;
24# endif
5#endif 25#endif
26} ____cacheline_aligned irq_cpustat_t;
27
28DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
29
30/* We can have at most NR_VECTORS irqs routed to a cpu at a time */
31#define MAX_HARDIRQS_PER_CPU NR_VECTORS
32
33#define __ARCH_IRQ_STAT
34
35#define inc_irq_stat(member) percpu_add(irq_stat.member, 1)
36
37#define local_softirq_pending() percpu_read(irq_stat.__softirq_pending)
38
39#define __ARCH_SET_SOFTIRQ_PENDING
40
41#define set_softirq_pending(x) percpu_write(irq_stat.__softirq_pending, (x))
42#define or_softirq_pending(x) percpu_or(irq_stat.__softirq_pending, (x))
43
44extern void ack_bad_irq(unsigned int irq);
6 45
7extern u64 arch_irq_stat_cpu(unsigned int cpu); 46extern u64 arch_irq_stat_cpu(unsigned int cpu);
8#define arch_irq_stat_cpu arch_irq_stat_cpu 47#define arch_irq_stat_cpu arch_irq_stat_cpu
9 48
10extern u64 arch_irq_stat(void); 49extern u64 arch_irq_stat(void);
11#define arch_irq_stat arch_irq_stat 50#define arch_irq_stat arch_irq_stat
51
52#endif /* _ASM_X86_HARDIRQ_H */
diff --git a/arch/x86/include/asm/hardirq_32.h b/arch/x86/include/asm/hardirq_32.h
deleted file mode 100644
index cf7954d1405f..000000000000
--- a/arch/x86/include/asm/hardirq_32.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef _ASM_X86_HARDIRQ_32_H
2#define _ASM_X86_HARDIRQ_32_H
3
4#include <linux/threads.h>
5#include <linux/irq.h>
6
7typedef struct {
8 unsigned int __softirq_pending;
9 unsigned long idle_timestamp;
10 unsigned int __nmi_count; /* arch dependent */
11 unsigned int apic_timer_irqs; /* arch dependent */
12 unsigned int irq0_irqs;
13 unsigned int irq_resched_count;
14 unsigned int irq_call_count;
15 unsigned int irq_tlb_count;
16 unsigned int irq_thermal_count;
17 unsigned int irq_spurious_count;
18} ____cacheline_aligned irq_cpustat_t;
19
20DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
21
22#define __ARCH_IRQ_STAT
23#define __IRQ_STAT(cpu, member) (per_cpu(irq_stat, cpu).member)
24
25#define inc_irq_stat(member) (__get_cpu_var(irq_stat).member++)
26
27void ack_bad_irq(unsigned int irq);
28#include <linux/irq_cpustat.h>
29
30#endif /* _ASM_X86_HARDIRQ_32_H */
diff --git a/arch/x86/include/asm/hardirq_64.h b/arch/x86/include/asm/hardirq_64.h
deleted file mode 100644
index b5a6b5d56704..000000000000
--- a/arch/x86/include/asm/hardirq_64.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef _ASM_X86_HARDIRQ_64_H
2#define _ASM_X86_HARDIRQ_64_H
3
4#include <linux/threads.h>
5#include <linux/irq.h>
6#include <asm/pda.h>
7#include <asm/apic.h>
8
9/* We can have at most NR_VECTORS irqs routed to a cpu at a time */
10#define MAX_HARDIRQS_PER_CPU NR_VECTORS
11
12#define __ARCH_IRQ_STAT 1
13
14#define inc_irq_stat(member) add_pda(member, 1)
15
16#define local_softirq_pending() read_pda(__softirq_pending)
17
18#define __ARCH_SET_SOFTIRQ_PENDING 1
19
20#define set_softirq_pending(x) write_pda(__softirq_pending, (x))
21#define or_softirq_pending(x) or_pda(__softirq_pending, (x))
22
23extern void ack_bad_irq(unsigned int irq);
24
25#endif /* _ASM_X86_HARDIRQ_64_H */
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 8de644b6b959..370e1c83bb49 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -25,8 +25,6 @@
25#include <asm/irq.h> 25#include <asm/irq.h>
26#include <asm/sections.h> 26#include <asm/sections.h>
27 27
28#define platform_legacy_irq(irq) ((irq) < 16)
29
30/* Interrupt handlers registered during init_IRQ */ 28/* Interrupt handlers registered during init_IRQ */
31extern void apic_timer_interrupt(void); 29extern void apic_timer_interrupt(void);
32extern void error_interrupt(void); 30extern void error_interrupt(void);
@@ -58,7 +56,7 @@ extern void make_8259A_irq(unsigned int irq);
58extern void init_8259A(int aeoi); 56extern void init_8259A(int aeoi);
59 57
60/* IOAPIC */ 58/* IOAPIC */
61#define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs)) 59#define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs))
62extern unsigned long io_apic_irqs; 60extern unsigned long io_apic_irqs;
63 61
64extern void init_VISWS_APIC_irqs(void); 62extern void init_VISWS_APIC_irqs(void);
@@ -67,15 +65,7 @@ extern void disable_IO_APIC(void);
67extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn); 65extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
68extern void setup_ioapic_dest(void); 66extern void setup_ioapic_dest(void);
69 67
70#ifdef CONFIG_X86_64
71extern void enable_IO_APIC(void); 68extern void enable_IO_APIC(void);
72#endif
73
74/* IPI functions */
75#ifdef CONFIG_X86_32
76extern void send_IPI_self(int vector);
77#endif
78extern void send_IPI(int dest, int vector);
79 69
80/* Statistics */ 70/* Statistics */
81extern atomic_t irq_err_count; 71extern atomic_t irq_err_count;
@@ -84,21 +74,11 @@ extern atomic_t irq_mis_count;
84/* EISA */ 74/* EISA */
85extern void eisa_set_level_irq(unsigned int irq); 75extern void eisa_set_level_irq(unsigned int irq);
86 76
87/* Voyager functions */
88extern asmlinkage void vic_cpi_interrupt(void);
89extern asmlinkage void vic_sys_interrupt(void);
90extern asmlinkage void vic_cmn_interrupt(void);
91extern asmlinkage void qic_timer_interrupt(void);
92extern asmlinkage void qic_invalidate_interrupt(void);
93extern asmlinkage void qic_reschedule_interrupt(void);
94extern asmlinkage void qic_enable_irq_interrupt(void);
95extern asmlinkage void qic_call_function_interrupt(void);
96
97/* SMP */ 77/* SMP */
98extern void smp_apic_timer_interrupt(struct pt_regs *); 78extern void smp_apic_timer_interrupt(struct pt_regs *);
99extern void smp_spurious_interrupt(struct pt_regs *); 79extern void smp_spurious_interrupt(struct pt_regs *);
100extern void smp_error_interrupt(struct pt_regs *); 80extern void smp_error_interrupt(struct pt_regs *);
101#ifdef CONFIG_X86_SMP 81#ifdef CONFIG_SMP
102extern void smp_reschedule_interrupt(struct pt_regs *); 82extern void smp_reschedule_interrupt(struct pt_regs *);
103extern void smp_call_function_interrupt(struct pt_regs *); 83extern void smp_call_function_interrupt(struct pt_regs *);
104extern void smp_call_function_single_interrupt(struct pt_regs *); 84extern void smp_call_function_single_interrupt(struct pt_regs *);
diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h
index 58d7091eeb1f..1a99e6c092af 100644
--- a/arch/x86/include/asm/i8259.h
+++ b/arch/x86/include/asm/i8259.h
@@ -60,4 +60,8 @@ extern struct irq_chip i8259A_chip;
60extern void mask_8259A(void); 60extern void mask_8259A(void);
61extern void unmask_8259A(void); 61extern void unmask_8259A(void);
62 62
63#ifdef CONFIG_X86_32
64extern void init_ISA_irqs(void);
65#endif
66
63#endif /* _ASM_X86_I8259_H */ 67#endif /* _ASM_X86_I8259_H */
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index 1dbbdf4be9b4..e5383e3d2f8c 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -5,6 +5,7 @@
5 5
6#include <linux/compiler.h> 6#include <linux/compiler.h>
7#include <asm-generic/int-ll64.h> 7#include <asm-generic/int-ll64.h>
8#include <asm/page.h>
8 9
9#define build_mmio_read(name, size, type, reg, barrier) \ 10#define build_mmio_read(name, size, type, reg, barrier) \
10static inline type name(const volatile void __iomem *addr) \ 11static inline type name(const volatile void __iomem *addr) \
@@ -80,6 +81,98 @@ static inline void writeq(__u64 val, volatile void __iomem *addr)
80#define readq readq 81#define readq readq
81#define writeq writeq 82#define writeq writeq
82 83
84/**
85 * virt_to_phys - map virtual addresses to physical
86 * @address: address to remap
87 *
88 * The returned physical address is the physical (CPU) mapping for
89 * the memory address given. It is only valid to use this function on
90 * addresses directly mapped or allocated via kmalloc.
91 *
92 * This function does not give bus mappings for DMA transfers. In
93 * almost all conceivable cases a device driver should not be using
94 * this function
95 */
96
97static inline phys_addr_t virt_to_phys(volatile void *address)
98{
99 return __pa(address);
100}
101
102/**
103 * phys_to_virt - map physical address to virtual
104 * @address: address to remap
105 *
106 * The returned virtual address is a current CPU mapping for
107 * the memory address given. It is only valid to use this function on
108 * addresses that have a kernel mapping
109 *
110 * This function does not handle bus mappings for DMA transfers. In
111 * almost all conceivable cases a device driver should not be using
112 * this function
113 */
114
115static inline void *phys_to_virt(phys_addr_t address)
116{
117 return __va(address);
118}
119
120/*
121 * Change "struct page" to physical address.
122 */
123#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
124
125/*
126 * ISA I/O bus memory addresses are 1:1 with the physical address.
127 * However, we truncate the address to unsigned int to avoid undesirable
128 * promitions in legacy drivers.
129 */
130static inline unsigned int isa_virt_to_bus(volatile void *address)
131{
132 return (unsigned int)virt_to_phys(address);
133}
134#define isa_page_to_bus(page) ((unsigned int)page_to_phys(page))
135#define isa_bus_to_virt phys_to_virt
136
137/*
138 * However PCI ones are not necessarily 1:1 and therefore these interfaces
139 * are forbidden in portable PCI drivers.
140 *
141 * Allow them on x86 for legacy drivers, though.
142 */
143#define virt_to_bus virt_to_phys
144#define bus_to_virt phys_to_virt
145
146/**
147 * ioremap - map bus memory into CPU space
148 * @offset: bus address of the memory
149 * @size: size of the resource to map
150 *
151 * ioremap performs a platform specific sequence of operations to
152 * make bus memory CPU accessible via the readb/readw/readl/writeb/
153 * writew/writel functions and the other mmio helpers. The returned
154 * address is not guaranteed to be usable directly as a virtual
155 * address.
156 *
157 * If the area you are trying to map is a PCI BAR you should have a
158 * look at pci_iomap().
159 */
160extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
161extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
162extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
163 unsigned long prot_val);
164
165/*
166 * The default ioremap() behavior is non-cached:
167 */
168static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
169{
170 return ioremap_nocache(offset, size);
171}
172
173extern void iounmap(volatile void __iomem *addr);
174
175
83#ifdef CONFIG_X86_32 176#ifdef CONFIG_X86_32
84# include "io_32.h" 177# include "io_32.h"
85#else 178#else
@@ -91,7 +184,7 @@ extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr);
91 184
92extern int ioremap_change_attr(unsigned long vaddr, unsigned long size, 185extern int ioremap_change_attr(unsigned long vaddr, unsigned long size,
93 unsigned long prot_val); 186 unsigned long prot_val);
94extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size); 187extern void __iomem *ioremap_wc(resource_size_t offset, unsigned long size);
95 188
96/* 189/*
97 * early_ioremap() and early_iounmap() are for temporary early boot-time 190 * early_ioremap() and early_iounmap() are for temporary early boot-time
@@ -103,7 +196,7 @@ extern void early_ioremap_reset(void);
103extern void __iomem *early_ioremap(unsigned long offset, unsigned long size); 196extern void __iomem *early_ioremap(unsigned long offset, unsigned long size);
104extern void __iomem *early_memremap(unsigned long offset, unsigned long size); 197extern void __iomem *early_memremap(unsigned long offset, unsigned long size);
105extern void early_iounmap(void __iomem *addr, unsigned long size); 198extern void early_iounmap(void __iomem *addr, unsigned long size);
106extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
107 199
200#define IO_SPACE_LIMIT 0xffff
108 201
109#endif /* _ASM_X86_IO_H */ 202#endif /* _ASM_X86_IO_H */
diff --git a/arch/x86/include/asm/io_32.h b/arch/x86/include/asm/io_32.h
index d8e242e1b396..a299900f5920 100644
--- a/arch/x86/include/asm/io_32.h
+++ b/arch/x86/include/asm/io_32.h
@@ -37,8 +37,6 @@
37 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br> 37 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
38 */ 38 */
39 39
40#define IO_SPACE_LIMIT 0xffff
41
42#define XQUAD_PORTIO_BASE 0xfe400000 40#define XQUAD_PORTIO_BASE 0xfe400000
43#define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */ 41#define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
44 42
@@ -53,92 +51,6 @@
53 */ 51 */
54#define xlate_dev_kmem_ptr(p) p 52#define xlate_dev_kmem_ptr(p) p
55 53
56/**
57 * virt_to_phys - map virtual addresses to physical
58 * @address: address to remap
59 *
60 * The returned physical address is the physical (CPU) mapping for
61 * the memory address given. It is only valid to use this function on
62 * addresses directly mapped or allocated via kmalloc.
63 *
64 * This function does not give bus mappings for DMA transfers. In
65 * almost all conceivable cases a device driver should not be using
66 * this function
67 */
68
69static inline unsigned long virt_to_phys(volatile void *address)
70{
71 return __pa(address);
72}
73
74/**
75 * phys_to_virt - map physical address to virtual
76 * @address: address to remap
77 *
78 * The returned virtual address is a current CPU mapping for
79 * the memory address given. It is only valid to use this function on
80 * addresses that have a kernel mapping
81 *
82 * This function does not handle bus mappings for DMA transfers. In
83 * almost all conceivable cases a device driver should not be using
84 * this function
85 */
86
87static inline void *phys_to_virt(unsigned long address)
88{
89 return __va(address);
90}
91
92/*
93 * Change "struct page" to physical address.
94 */
95#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
96
97/**
98 * ioremap - map bus memory into CPU space
99 * @offset: bus address of the memory
100 * @size: size of the resource to map
101 *
102 * ioremap performs a platform specific sequence of operations to
103 * make bus memory CPU accessible via the readb/readw/readl/writeb/
104 * writew/writel functions and the other mmio helpers. The returned
105 * address is not guaranteed to be usable directly as a virtual
106 * address.
107 *
108 * If the area you are trying to map is a PCI BAR you should have a
109 * look at pci_iomap().
110 */
111extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
112extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
113extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
114 unsigned long prot_val);
115
116/*
117 * The default ioremap() behavior is non-cached:
118 */
119static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
120{
121 return ioremap_nocache(offset, size);
122}
123
124extern void iounmap(volatile void __iomem *addr);
125
126/*
127 * ISA I/O bus memory addresses are 1:1 with the physical address.
128 */
129#define isa_virt_to_bus virt_to_phys
130#define isa_page_to_bus page_to_phys
131#define isa_bus_to_virt phys_to_virt
132
133/*
134 * However PCI ones are not necessarily 1:1 and therefore these interfaces
135 * are forbidden in portable PCI drivers.
136 *
137 * Allow them on x86 for legacy drivers, though.
138 */
139#define virt_to_bus virt_to_phys
140#define bus_to_virt phys_to_virt
141
142static inline void 54static inline void
143memset_io(volatile void __iomem *addr, unsigned char val, int count) 55memset_io(volatile void __iomem *addr, unsigned char val, int count)
144{ 56{
diff --git a/arch/x86/include/asm/io_64.h b/arch/x86/include/asm/io_64.h
index 563c16270ba6..244067893af4 100644
--- a/arch/x86/include/asm/io_64.h
+++ b/arch/x86/include/asm/io_64.h
@@ -136,73 +136,12 @@ __OUTS(b)
136__OUTS(w) 136__OUTS(w)
137__OUTS(l) 137__OUTS(l)
138 138
139#define IO_SPACE_LIMIT 0xffff
140
141#if defined(__KERNEL__) && defined(__x86_64__) 139#if defined(__KERNEL__) && defined(__x86_64__)
142 140
143#include <linux/vmalloc.h> 141#include <linux/vmalloc.h>
144 142
145#ifndef __i386__
146/*
147 * Change virtual addresses to physical addresses and vv.
148 * These are pretty trivial
149 */
150static inline unsigned long virt_to_phys(volatile void *address)
151{
152 return __pa(address);
153}
154
155static inline void *phys_to_virt(unsigned long address)
156{
157 return __va(address);
158}
159#endif
160
161/*
162 * Change "struct page" to physical address.
163 */
164#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
165
166#include <asm-generic/iomap.h> 143#include <asm-generic/iomap.h>
167 144
168/*
169 * This one maps high address device memory and turns off caching for that area.
170 * it's useful if some control registers are in such an area and write combining
171 * or read caching is not desirable:
172 */
173extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
174extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
175extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
176 unsigned long prot_val);
177
178/*
179 * The default ioremap() behavior is non-cached:
180 */
181static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
182{
183 return ioremap_nocache(offset, size);
184}
185
186extern void iounmap(volatile void __iomem *addr);
187
188extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
189
190/*
191 * ISA I/O bus memory addresses are 1:1 with the physical address.
192 */
193#define isa_virt_to_bus virt_to_phys
194#define isa_page_to_bus page_to_phys
195#define isa_bus_to_virt phys_to_virt
196
197/*
198 * However PCI ones are not necessarily 1:1 and therefore these interfaces
199 * are forbidden in portable PCI drivers.
200 *
201 * Allow them on x86 for legacy drivers, though.
202 */
203#define virt_to_bus virt_to_phys
204#define bus_to_virt phys_to_virt
205
206void __memcpy_fromio(void *, unsigned long, unsigned); 145void __memcpy_fromio(void *, unsigned long, unsigned);
207void __memcpy_toio(unsigned long, const void *, unsigned); 146void __memcpy_toio(unsigned long, const void *, unsigned);
208 147
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 7a1f44ac1f17..59cb4a1317b7 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -114,38 +114,16 @@ struct IR_IO_APIC_route_entry {
114extern int nr_ioapics; 114extern int nr_ioapics;
115extern int nr_ioapic_registers[MAX_IO_APICS]; 115extern int nr_ioapic_registers[MAX_IO_APICS];
116 116
117/*
118 * MP-BIOS irq configuration table structures:
119 */
120
121#define MP_MAX_IOAPIC_PIN 127 117#define MP_MAX_IOAPIC_PIN 127
122 118
123struct mp_config_ioapic {
124 unsigned long mp_apicaddr;
125 unsigned int mp_apicid;
126 unsigned char mp_type;
127 unsigned char mp_apicver;
128 unsigned char mp_flags;
129};
130
131struct mp_config_intsrc {
132 unsigned int mp_dstapic;
133 unsigned char mp_type;
134 unsigned char mp_irqtype;
135 unsigned short mp_irqflag;
136 unsigned char mp_srcbus;
137 unsigned char mp_srcbusirq;
138 unsigned char mp_dstirq;
139};
140
141/* I/O APIC entries */ 119/* I/O APIC entries */
142extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS]; 120extern struct mpc_ioapic mp_ioapics[MAX_IO_APICS];
143 121
144/* # of MP IRQ source entries */ 122/* # of MP IRQ source entries */
145extern int mp_irq_entries; 123extern int mp_irq_entries;
146 124
147/* MP IRQ source entries */ 125/* MP IRQ source entries */
148extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; 126extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
149 127
150/* non-0 if default (table-less) MP configuration */ 128/* non-0 if default (table-less) MP configuration */
151extern int mpc_default_type; 129extern int mpc_default_type;
@@ -165,15 +143,6 @@ extern int noioapicreroute;
165/* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */ 143/* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
166extern int timer_through_8259; 144extern int timer_through_8259;
167 145
168static inline void disable_ioapic_setup(void)
169{
170#ifdef CONFIG_PCI
171 noioapicquirk = 1;
172 noioapicreroute = -1;
173#endif
174 skip_ioapic_setup = 1;
175}
176
177/* 146/*
178 * If we use the IO-APIC for IRQ routing, disable automatic 147 * If we use the IO-APIC for IRQ routing, disable automatic
179 * assignment of PCI IRQ's. 148 * assignment of PCI IRQ's.
@@ -200,6 +169,12 @@ extern void reinit_intr_remapped_IO_APIC(int);
200 169
201extern void probe_nr_irqs_gsi(void); 170extern void probe_nr_irqs_gsi(void);
202 171
172extern int setup_ioapic_entry(int apic, int irq,
173 struct IO_APIC_route_entry *entry,
174 unsigned int destination, int trigger,
175 int polarity, int vector);
176extern void ioapic_write_entry(int apic, int pin,
177 struct IO_APIC_route_entry e);
203#else /* !CONFIG_X86_IO_APIC */ 178#else /* !CONFIG_X86_IO_APIC */
204#define io_apic_assign_pci_irqs 0 179#define io_apic_assign_pci_irqs 0
205static const int timer_through_8259 = 0; 180static const int timer_through_8259 = 0;
diff --git a/arch/x86/include/asm/ipi.h b/arch/x86/include/asm/ipi.h
index c745a306f7d3..0b7228268a63 100644
--- a/arch/x86/include/asm/ipi.h
+++ b/arch/x86/include/asm/ipi.h
@@ -1,6 +1,8 @@
1#ifndef _ASM_X86_IPI_H 1#ifndef _ASM_X86_IPI_H
2#define _ASM_X86_IPI_H 2#define _ASM_X86_IPI_H
3 3
4#ifdef CONFIG_X86_LOCAL_APIC
5
4/* 6/*
5 * Copyright 2004 James Cleverdon, IBM. 7 * Copyright 2004 James Cleverdon, IBM.
6 * Subject to the GNU Public License, v.2 8 * Subject to the GNU Public License, v.2
@@ -55,8 +57,8 @@ static inline void __xapic_wait_icr_idle(void)
55 cpu_relax(); 57 cpu_relax();
56} 58}
57 59
58static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, 60static inline void
59 unsigned int dest) 61__default_send_IPI_shortcut(unsigned int shortcut, int vector, unsigned int dest)
60{ 62{
61 /* 63 /*
62 * Subtle. In the case of the 'never do double writes' workaround 64 * Subtle. In the case of the 'never do double writes' workaround
@@ -87,8 +89,8 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
87 * This is used to send an IPI with no shorthand notation (the destination is 89 * This is used to send an IPI with no shorthand notation (the destination is
88 * specified in bits 56 to 63 of the ICR). 90 * specified in bits 56 to 63 of the ICR).
89 */ 91 */
90static inline void __send_IPI_dest_field(unsigned int mask, int vector, 92static inline void
91 unsigned int dest) 93 __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest)
92{ 94{
93 unsigned long cfg; 95 unsigned long cfg;
94 96
@@ -117,41 +119,44 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector,
117 native_apic_mem_write(APIC_ICR, cfg); 119 native_apic_mem_write(APIC_ICR, cfg);
118} 120}
119 121
120static inline void send_IPI_mask_sequence(const struct cpumask *mask, 122extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask,
121 int vector) 123 int vector);
122{ 124extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
123 unsigned long flags; 125 int vector);
124 unsigned long query_cpu; 126extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
127 int vector);
128extern void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
129 int vector);
125 130
126 /* 131/* Avoid include hell */
127 * Hack. The clustered APIC addressing mode doesn't allow us to send 132#define NMI_VECTOR 0x02
128 * to an arbitrary mask, so I do a unicast to each CPU instead. 133
129 * - mbligh 134extern int no_broadcast;
130 */ 135
131 local_irq_save(flags); 136static inline void __default_local_send_IPI_allbutself(int vector)
132 for_each_cpu(query_cpu, mask) { 137{
133 __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu), 138 if (no_broadcast || vector == NMI_VECTOR)
134 vector, APIC_DEST_PHYSICAL); 139 apic->send_IPI_mask_allbutself(cpu_online_mask, vector);
135 } 140 else
136 local_irq_restore(flags); 141 __default_send_IPI_shortcut(APIC_DEST_ALLBUT, vector, apic->dest_logical);
137} 142}
138 143
139static inline void send_IPI_mask_allbutself(const struct cpumask *mask, 144static inline void __default_local_send_IPI_all(int vector)
140 int vector)
141{ 145{
142 unsigned long flags; 146 if (no_broadcast || vector == NMI_VECTOR)
143 unsigned int query_cpu; 147 apic->send_IPI_mask(cpu_online_mask, vector);
144 unsigned int this_cpu = smp_processor_id(); 148 else
145 149 __default_send_IPI_shortcut(APIC_DEST_ALLINC, vector, apic->dest_logical);
146 /* See Hack comment above */
147
148 local_irq_save(flags);
149 for_each_cpu(query_cpu, mask)
150 if (query_cpu != this_cpu)
151 __send_IPI_dest_field(
152 per_cpu(x86_cpu_to_apicid, query_cpu),
153 vector, APIC_DEST_PHYSICAL);
154 local_irq_restore(flags);
155} 150}
156 151
152#ifdef CONFIG_X86_32
153extern void default_send_IPI_mask_logical(const struct cpumask *mask,
154 int vector);
155extern void default_send_IPI_allbutself(int vector);
156extern void default_send_IPI_all(int vector);
157extern void default_send_IPI_self(int vector);
158#endif
159
160#endif
161
157#endif /* _ASM_X86_IPI_H */ 162#endif /* _ASM_X86_IPI_H */
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index 592688ed04d3..107eb2196691 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -36,9 +36,11 @@ static inline int irq_canonicalize(int irq)
36extern void fixup_irqs(void); 36extern void fixup_irqs(void);
37#endif 37#endif
38 38
39extern unsigned int do_IRQ(struct pt_regs *regs);
40extern void init_IRQ(void); 39extern void init_IRQ(void);
41extern void native_init_IRQ(void); 40extern void native_init_IRQ(void);
41extern bool handle_irq(unsigned irq, struct pt_regs *regs);
42
43extern unsigned int do_IRQ(struct pt_regs *regs);
42 44
43/* Interrupt vector management */ 45/* Interrupt vector management */
44extern DECLARE_BITMAP(used_vectors, NR_VECTORS); 46extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
diff --git a/arch/x86/include/asm/irq_regs.h b/arch/x86/include/asm/irq_regs.h
index 89c898ab298b..77843225b7ea 100644
--- a/arch/x86/include/asm/irq_regs.h
+++ b/arch/x86/include/asm/irq_regs.h
@@ -1,5 +1,31 @@
1#ifdef CONFIG_X86_32 1/*
2# include "irq_regs_32.h" 2 * Per-cpu current frame pointer - the location of the last exception frame on
3#else 3 * the stack, stored in the per-cpu area.
4# include "irq_regs_64.h" 4 *
5#endif 5 * Jeremy Fitzhardinge <jeremy@goop.org>
6 */
7#ifndef _ASM_X86_IRQ_REGS_H
8#define _ASM_X86_IRQ_REGS_H
9
10#include <asm/percpu.h>
11
12#define ARCH_HAS_OWN_IRQ_REGS
13
14DECLARE_PER_CPU(struct pt_regs *, irq_regs);
15
16static inline struct pt_regs *get_irq_regs(void)
17{
18 return percpu_read(irq_regs);
19}
20
21static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
22{
23 struct pt_regs *old_regs;
24
25 old_regs = get_irq_regs();
26 percpu_write(irq_regs, new_regs);
27
28 return old_regs;
29}
30
31#endif /* _ASM_X86_IRQ_REGS_32_H */
diff --git a/arch/x86/include/asm/irq_regs_32.h b/arch/x86/include/asm/irq_regs_32.h
deleted file mode 100644
index 86afd7473457..000000000000
--- a/arch/x86/include/asm/irq_regs_32.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Per-cpu current frame pointer - the location of the last exception frame on
3 * the stack, stored in the per-cpu area.
4 *
5 * Jeremy Fitzhardinge <jeremy@goop.org>
6 */
7#ifndef _ASM_X86_IRQ_REGS_32_H
8#define _ASM_X86_IRQ_REGS_32_H
9
10#include <asm/percpu.h>
11
12#define ARCH_HAS_OWN_IRQ_REGS
13
14DECLARE_PER_CPU(struct pt_regs *, irq_regs);
15
16static inline struct pt_regs *get_irq_regs(void)
17{
18 return x86_read_percpu(irq_regs);
19}
20
21static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
22{
23 struct pt_regs *old_regs;
24
25 old_regs = get_irq_regs();
26 x86_write_percpu(irq_regs, new_regs);
27
28 return old_regs;
29}
30
31#endif /* _ASM_X86_IRQ_REGS_32_H */
diff --git a/arch/x86/include/asm/irq_regs_64.h b/arch/x86/include/asm/irq_regs_64.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/arch/x86/include/asm/irq_regs_64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index f7ff65032b9d..8a285f356f8a 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -1,47 +1,69 @@
1#ifndef _ASM_X86_IRQ_VECTORS_H 1#ifndef _ASM_X86_IRQ_VECTORS_H
2#define _ASM_X86_IRQ_VECTORS_H 2#define _ASM_X86_IRQ_VECTORS_H
3 3
4#include <linux/threads.h> 4/*
5 * Linux IRQ vector layout.
6 *
7 * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
8 * be defined by Linux. They are used as a jump table by the CPU when a
9 * given vector is triggered - by a CPU-external, CPU-internal or
10 * software-triggered event.
11 *
12 * Linux sets the kernel code address each entry jumps to early during
13 * bootup, and never changes them. This is the general layout of the
14 * IDT entries:
15 *
16 * Vectors 0 ... 31 : system traps and exceptions - hardcoded events
17 * Vectors 32 ... 127 : device interrupts
18 * Vector 128 : legacy int80 syscall interface
19 * Vectors 129 ... 237 : device interrupts
20 * Vectors 238 ... 255 : special interrupts
21 *
22 * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
23 *
24 * This file enumerates the exact layout of them:
25 */
5 26
6#define NMI_VECTOR 0x02 27#define NMI_VECTOR 0x02
7 28
8/* 29/*
9 * IDT vectors usable for external interrupt sources start 30 * IDT vectors usable for external interrupt sources start
10 * at 0x20: 31 * at 0x20:
11 */ 32 */
12#define FIRST_EXTERNAL_VECTOR 0x20 33#define FIRST_EXTERNAL_VECTOR 0x20
13 34
14#ifdef CONFIG_X86_32 35#ifdef CONFIG_X86_32
15# define SYSCALL_VECTOR 0x80 36# define SYSCALL_VECTOR 0x80
16#else 37#else
17# define IA32_SYSCALL_VECTOR 0x80 38# define IA32_SYSCALL_VECTOR 0x80
18#endif 39#endif
19 40
20/* 41/*
21 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering 42 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
22 * cleanup after irq migration. 43 * cleanup after irq migration.
23 */ 44 */
24#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR 45#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
25 46
26/* 47/*
27 * Vectors 0x30-0x3f are used for ISA interrupts. 48 * Vectors 0x30-0x3f are used for ISA interrupts.
28 */ 49 */
29#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) 50#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
30#define IRQ1_VECTOR (IRQ0_VECTOR + 1) 51
31#define IRQ2_VECTOR (IRQ0_VECTOR + 2) 52#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
32#define IRQ3_VECTOR (IRQ0_VECTOR + 3) 53#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
33#define IRQ4_VECTOR (IRQ0_VECTOR + 4) 54#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
34#define IRQ5_VECTOR (IRQ0_VECTOR + 5) 55#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
35#define IRQ6_VECTOR (IRQ0_VECTOR + 6) 56#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
36#define IRQ7_VECTOR (IRQ0_VECTOR + 7) 57#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
37#define IRQ8_VECTOR (IRQ0_VECTOR + 8) 58#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
38#define IRQ9_VECTOR (IRQ0_VECTOR + 9) 59#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
39#define IRQ10_VECTOR (IRQ0_VECTOR + 10) 60#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
40#define IRQ11_VECTOR (IRQ0_VECTOR + 11) 61#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
41#define IRQ12_VECTOR (IRQ0_VECTOR + 12) 62#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
42#define IRQ13_VECTOR (IRQ0_VECTOR + 13) 63#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
43#define IRQ14_VECTOR (IRQ0_VECTOR + 14) 64#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
44#define IRQ15_VECTOR (IRQ0_VECTOR + 15) 65#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
66#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
45 67
46/* 68/*
47 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff 69 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
@@ -49,119 +71,98 @@
49 * some of the following vectors are 'rare', they are merged 71 * some of the following vectors are 'rare', they are merged
50 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. 72 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
51 * TLB, reschedule and local APIC vectors are performance-critical. 73 * TLB, reschedule and local APIC vectors are performance-critical.
52 *
53 * Vectors 0xf0-0xfa are free (reserved for future Linux use).
54 */ 74 */
55#ifdef CONFIG_X86_32
56
57# define SPURIOUS_APIC_VECTOR 0xff
58# define ERROR_APIC_VECTOR 0xfe
59# define INVALIDATE_TLB_VECTOR 0xfd
60# define RESCHEDULE_VECTOR 0xfc
61# define CALL_FUNCTION_VECTOR 0xfb
62# define CALL_FUNCTION_SINGLE_VECTOR 0xfa
63# define THERMAL_APIC_VECTOR 0xf0
64
65#else
66 75
67#define SPURIOUS_APIC_VECTOR 0xff 76#define SPURIOUS_APIC_VECTOR 0xff
77/*
78 * Sanity check
79 */
80#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
81# error SPURIOUS_APIC_VECTOR definition error
82#endif
83
68#define ERROR_APIC_VECTOR 0xfe 84#define ERROR_APIC_VECTOR 0xfe
69#define RESCHEDULE_VECTOR 0xfd 85#define RESCHEDULE_VECTOR 0xfd
70#define CALL_FUNCTION_VECTOR 0xfc 86#define CALL_FUNCTION_VECTOR 0xfc
71#define CALL_FUNCTION_SINGLE_VECTOR 0xfb 87#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
72#define THERMAL_APIC_VECTOR 0xfa 88#define THERMAL_APIC_VECTOR 0xfa
73#define THRESHOLD_APIC_VECTOR 0xf9
74#define UV_BAU_MESSAGE 0xf8
75#define INVALIDATE_TLB_VECTOR_END 0xf7
76#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
77
78#define NUM_INVALIDATE_TLB_VECTORS 8
79 89
90#ifdef CONFIG_X86_32
91/* 0xf8 - 0xf9 : free */
92#else
93# define THRESHOLD_APIC_VECTOR 0xf9
94# define UV_BAU_MESSAGE 0xf8
80#endif 95#endif
81 96
97/* f0-f7 used for spreading out TLB flushes: */
98#define INVALIDATE_TLB_VECTOR_END 0xf7
99#define INVALIDATE_TLB_VECTOR_START 0xf0
100#define NUM_INVALIDATE_TLB_VECTORS 8
101
82/* 102/*
83 * Local APIC timer IRQ vector is on a different priority level, 103 * Local APIC timer IRQ vector is on a different priority level,
84 * to work around the 'lost local interrupt if more than 2 IRQ 104 * to work around the 'lost local interrupt if more than 2 IRQ
85 * sources per level' errata. 105 * sources per level' errata.
86 */ 106 */
87#define LOCAL_TIMER_VECTOR 0xef 107#define LOCAL_TIMER_VECTOR 0xef
108
109/*
110 * Performance monitoring interrupt vector:
111 */
112#define LOCAL_PERF_VECTOR 0xee
88 113
89/* 114/*
90 * First APIC vector available to drivers: (vectors 0x30-0xee) we 115 * First APIC vector available to drivers: (vectors 0x30-0xee) we
91 * start at 0x31(0x41) to spread out vectors evenly between priority 116 * start at 0x31(0x41) to spread out vectors evenly between priority
92 * levels. (0x80 is the syscall vector) 117 * levels. (0x80 is the syscall vector)
93 */ 118 */
94#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) 119#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
95
96#define NR_VECTORS 256
97 120
98#define FPU_IRQ 13 121#define NR_VECTORS 256
99 122
100#define FIRST_VM86_IRQ 3 123#define FPU_IRQ 13
101#define LAST_VM86_IRQ 15
102#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
103 124
104#define NR_IRQS_LEGACY 16 125#define FIRST_VM86_IRQ 3
126#define LAST_VM86_IRQ 15
105 127
106#if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER) 128#ifndef __ASSEMBLY__
107 129static inline int invalid_vm86_irq(int irq)
108#ifndef CONFIG_SPARSE_IRQ 130{
109# if NR_CPUS < MAX_IO_APICS 131 return irq < FIRST_VM86_IRQ || irq > LAST_VM86_IRQ;
110# define NR_IRQS (NR_VECTORS + (32 * NR_CPUS)) 132}
111# else
112# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
113# endif
114#else
115# if (8 * NR_CPUS) > (32 * MAX_IO_APICS)
116# define NR_IRQS (NR_VECTORS + (8 * NR_CPUS))
117# else
118# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
119# endif
120#endif 133#endif
121 134
122#elif defined(CONFIG_X86_VOYAGER) 135/*
123 136 * Size the maximum number of interrupts.
124# define NR_IRQS 224 137 *
138 * If the irq_desc[] array has a sparse layout, we can size things
139 * generously - it scales up linearly with the maximum number of CPUs,
140 * and the maximum number of IO-APICs, whichever is higher.
141 *
142 * In other cases we size more conservatively, to not create too large
143 * static arrays.
144 */
125 145
126#else /* IO_APIC || VOYAGER */ 146#define NR_IRQS_LEGACY 16
127 147
128# define NR_IRQS 16 148#define CPU_VECTOR_LIMIT ( 8 * NR_CPUS )
149#define IO_APIC_VECTOR_LIMIT ( 32 * MAX_IO_APICS )
129 150
151#ifdef CONFIG_X86_IO_APIC
152# ifdef CONFIG_SPARSE_IRQ
153# define NR_IRQS \
154 (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \
155 (NR_VECTORS + CPU_VECTOR_LIMIT) : \
156 (NR_VECTORS + IO_APIC_VECTOR_LIMIT))
157# else
158# if NR_CPUS < MAX_IO_APICS
159# define NR_IRQS (NR_VECTORS + 4*CPU_VECTOR_LIMIT)
160# else
161# define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
162# endif
163# endif
164#else /* !CONFIG_X86_IO_APIC: */
165# define NR_IRQS NR_IRQS_LEGACY
130#endif 166#endif
131 167
132/* Voyager specific defines */
133/* These define the CPIs we use in linux */
134#define VIC_CPI_LEVEL0 0
135#define VIC_CPI_LEVEL1 1
136/* now the fake CPIs */
137#define VIC_TIMER_CPI 2
138#define VIC_INVALIDATE_CPI 3
139#define VIC_RESCHEDULE_CPI 4
140#define VIC_ENABLE_IRQ_CPI 5
141#define VIC_CALL_FUNCTION_CPI 6
142#define VIC_CALL_FUNCTION_SINGLE_CPI 7
143
144/* Now the QIC CPIs: Since we don't need the two initial levels,
145 * these are 2 less than the VIC CPIs */
146#define QIC_CPI_OFFSET 1
147#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
148#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
149#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
150#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
151#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
152#define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
153
154#define VIC_START_FAKE_CPI VIC_TIMER_CPI
155#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI
156
157/* this is the SYS_INT CPI. */
158#define VIC_SYS_INT 8
159#define VIC_CMN_INT 15
160
161/* This is the boot CPI for alternate processors. It gets overwritten
162 * by the above once the system has activated all available processors */
163#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
164#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
165
166
167#endif /* _ASM_X86_IRQ_VECTORS_H */ 168#endif /* _ASM_X86_IRQ_VECTORS_H */
diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h
index c61d8b2ab8b9..0ceb6d19ed30 100644
--- a/arch/x86/include/asm/kexec.h
+++ b/arch/x86/include/asm/kexec.h
@@ -9,23 +9,8 @@
9# define PAGES_NR 4 9# define PAGES_NR 4
10#else 10#else
11# define PA_CONTROL_PAGE 0 11# define PA_CONTROL_PAGE 0
12# define VA_CONTROL_PAGE 1 12# define PA_TABLE_PAGE 1
13# define PA_PGD 2 13# define PAGES_NR 2
14# define VA_PGD 3
15# define PA_PUD_0 4
16# define VA_PUD_0 5
17# define PA_PMD_0 6
18# define VA_PMD_0 7
19# define PA_PTE_0 8
20# define VA_PTE_0 9
21# define PA_PUD_1 10
22# define VA_PUD_1 11
23# define PA_PMD_1 12
24# define VA_PMD_1 13
25# define PA_PTE_1 14
26# define VA_PTE_1 15
27# define PA_TABLE_PAGE 16
28# define PAGES_NR 17
29#endif 14#endif
30 15
31#ifdef CONFIG_X86_32 16#ifdef CONFIG_X86_32
@@ -157,9 +142,9 @@ relocate_kernel(unsigned long indirection_page,
157 unsigned long start_address) ATTRIB_NORET; 142 unsigned long start_address) ATTRIB_NORET;
158#endif 143#endif
159 144
160#ifdef CONFIG_X86_32
161#define ARCH_HAS_KIMAGE_ARCH 145#define ARCH_HAS_KIMAGE_ARCH
162 146
147#ifdef CONFIG_X86_32
163struct kimage_arch { 148struct kimage_arch {
164 pgd_t *pgd; 149 pgd_t *pgd;
165#ifdef CONFIG_X86_PAE 150#ifdef CONFIG_X86_PAE
@@ -169,6 +154,12 @@ struct kimage_arch {
169 pte_t *pte0; 154 pte_t *pte0;
170 pte_t *pte1; 155 pte_t *pte1;
171}; 156};
157#else
158struct kimage_arch {
159 pud_t *pud;
160 pmd_t *pmd;
161 pte_t *pte;
162};
172#endif 163#endif
173 164
174#endif /* __ASSEMBLY__ */ 165#endif /* __ASSEMBLY__ */
diff --git a/arch/x86/include/asm/linkage.h b/arch/x86/include/asm/linkage.h
index 5d98d0b68ffc..9320e2a8a26a 100644
--- a/arch/x86/include/asm/linkage.h
+++ b/arch/x86/include/asm/linkage.h
@@ -52,70 +52,14 @@
52 52
53#endif 53#endif
54 54
55#define GLOBAL(name) \
56 .globl name; \
57 name:
58
55#ifdef CONFIG_X86_ALIGNMENT_16 59#ifdef CONFIG_X86_ALIGNMENT_16
56#define __ALIGN .align 16,0x90 60#define __ALIGN .align 16,0x90
57#define __ALIGN_STR ".align 16,0x90" 61#define __ALIGN_STR ".align 16,0x90"
58#endif 62#endif
59 63
60/*
61 * to check ENTRY_X86/END_X86 and
62 * KPROBE_ENTRY_X86/KPROBE_END_X86
63 * unbalanced-missed-mixed appearance
64 */
65#define __set_entry_x86 .set ENTRY_X86_IN, 0
66#define __unset_entry_x86 .set ENTRY_X86_IN, 1
67#define __set_kprobe_x86 .set KPROBE_X86_IN, 0
68#define __unset_kprobe_x86 .set KPROBE_X86_IN, 1
69
70#define __macro_err_x86 .error "ENTRY_X86/KPROBE_X86 unbalanced,missed,mixed"
71
72#define __check_entry_x86 \
73 .ifdef ENTRY_X86_IN; \
74 .ifeq ENTRY_X86_IN; \
75 __macro_err_x86; \
76 .abort; \
77 .endif; \
78 .endif
79
80#define __check_kprobe_x86 \
81 .ifdef KPROBE_X86_IN; \
82 .ifeq KPROBE_X86_IN; \
83 __macro_err_x86; \
84 .abort; \
85 .endif; \
86 .endif
87
88#define __check_entry_kprobe_x86 \
89 __check_entry_x86; \
90 __check_kprobe_x86
91
92#define ENTRY_KPROBE_FINAL_X86 __check_entry_kprobe_x86
93
94#define ENTRY_X86(name) \
95 __check_entry_kprobe_x86; \
96 __set_entry_x86; \
97 .globl name; \
98 __ALIGN; \
99 name:
100
101#define END_X86(name) \
102 __unset_entry_x86; \
103 __check_entry_kprobe_x86; \
104 .size name, .-name
105
106#define KPROBE_ENTRY_X86(name) \
107 __check_entry_kprobe_x86; \
108 __set_kprobe_x86; \
109 .pushsection .kprobes.text, "ax"; \
110 .globl name; \
111 __ALIGN; \
112 name:
113
114#define KPROBE_END_X86(name) \
115 __unset_kprobe_x86; \
116 __check_entry_kprobe_x86; \
117 .size name, .-name; \
118 .popsection
119
120#endif /* _ASM_X86_LINKAGE_H */ 64#endif /* _ASM_X86_LINKAGE_H */
121 65
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
deleted file mode 100644
index cc09cbbee27e..000000000000
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ /dev/null
@@ -1,168 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_APIC_H
2#define _ASM_X86_MACH_DEFAULT_MACH_APIC_H
3
4#ifdef CONFIG_X86_LOCAL_APIC
5
6#include <mach_apicdef.h>
7#include <asm/smp.h>
8
9#define APIC_DFR_VALUE (APIC_DFR_FLAT)
10
11static inline const struct cpumask *target_cpus(void)
12{
13#ifdef CONFIG_SMP
14 return cpu_online_mask;
15#else
16 return cpumask_of(0);
17#endif
18}
19
20#define NO_BALANCE_IRQ (0)
21#define esr_disable (0)
22
23#ifdef CONFIG_X86_64
24#include <asm/genapic.h>
25#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
26#define INT_DEST_MODE (genapic->int_dest_mode)
27#define TARGET_CPUS (genapic->target_cpus())
28#define apic_id_registered (genapic->apic_id_registered)
29#define init_apic_ldr (genapic->init_apic_ldr)
30#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
31#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
32#define phys_pkg_id (genapic->phys_pkg_id)
33#define vector_allocation_domain (genapic->vector_allocation_domain)
34#define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID)))
35#define send_IPI_self (genapic->send_IPI_self)
36#define wakeup_secondary_cpu (genapic->wakeup_cpu)
37extern void setup_apic_routing(void);
38#else
39#define INT_DELIVERY_MODE dest_LowestPrio
40#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
41#define TARGET_CPUS (target_cpus())
42#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
43/*
44 * Set up the logical destination ID.
45 *
46 * Intel recommends to set DFR, LDR and TPR before enabling
47 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
48 * document number 292116). So here it goes...
49 */
50static inline void init_apic_ldr(void)
51{
52 unsigned long val;
53
54 apic_write(APIC_DFR, APIC_DFR_VALUE);
55 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
56 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
57 apic_write(APIC_LDR, val);
58}
59
60static inline int apic_id_registered(void)
61{
62 return physid_isset(read_apic_id(), phys_cpu_present_map);
63}
64
65static inline unsigned int cpu_mask_to_apicid(const struct cpumask *cpumask)
66{
67 return cpumask_bits(cpumask)[0];
68}
69
70static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
71 const struct cpumask *andmask)
72{
73 unsigned long mask1 = cpumask_bits(cpumask)[0];
74 unsigned long mask2 = cpumask_bits(andmask)[0];
75 unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
76
77 return (unsigned int)(mask1 & mask2 & mask3);
78}
79
80static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
81{
82 return cpuid_apic >> index_msb;
83}
84
85static inline void setup_apic_routing(void)
86{
87#ifdef CONFIG_X86_IO_APIC
88 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
89 "Flat", nr_ioapics);
90#endif
91}
92
93static inline int apicid_to_node(int logical_apicid)
94{
95#ifdef CONFIG_SMP
96 return apicid_2_node[hard_smp_processor_id()];
97#else
98 return 0;
99#endif
100}
101
102static inline void vector_allocation_domain(int cpu, struct cpumask *retmask)
103{
104 /* Careful. Some cpus do not strictly honor the set of cpus
105 * specified in the interrupt destination when using lowest
106 * priority interrupt delivery mode.
107 *
108 * In particular there was a hyperthreading cpu observed to
109 * deliver interrupts to the wrong hyperthread when only one
110 * hyperthread was specified in the interrupt desitination.
111 */
112 *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
113}
114#endif
115
116static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
117{
118 return physid_isset(apicid, bitmap);
119}
120
121static inline unsigned long check_apicid_present(int bit)
122{
123 return physid_isset(bit, phys_cpu_present_map);
124}
125
126static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
127{
128 return phys_map;
129}
130
131static inline int multi_timer_check(int apic, int irq)
132{
133 return 0;
134}
135
136/* Mapping from cpu number to logical apicid */
137static inline int cpu_to_logical_apicid(int cpu)
138{
139 return 1 << cpu;
140}
141
142static inline int cpu_present_to_apicid(int mps_cpu)
143{
144 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
145 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
146 else
147 return BAD_APICID;
148}
149
150static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
151{
152 return physid_mask_of_physid(phys_apicid);
153}
154
155static inline void setup_portio_remap(void)
156{
157}
158
159static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
160{
161 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
162}
163
164static inline void enable_apic_mode(void)
165{
166}
167#endif /* CONFIG_X86_LOCAL_APIC */
168#endif /* _ASM_X86_MACH_DEFAULT_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mach-default/mach_apicdef.h b/arch/x86/include/asm/mach-default/mach_apicdef.h
deleted file mode 100644
index 53179936d6c6..000000000000
--- a/arch/x86/include/asm/mach-default/mach_apicdef.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H
2#define _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H
3
4#include <asm/apic.h>
5
6#ifdef CONFIG_X86_64
7#define APIC_ID_MASK (genapic->apic_id_mask)
8#define GET_APIC_ID(x) (genapic->get_apic_id(x))
9#define SET_APIC_ID(x) (genapic->set_apic_id(x))
10#else
11#define APIC_ID_MASK (0xF<<24)
12static inline unsigned get_apic_id(unsigned long x)
13{
14 unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
15 if (APIC_XAPIC(ver))
16 return (((x)>>24)&0xFF);
17 else
18 return (((x)>>24)&0xF);
19}
20
21#define GET_APIC_ID(x) get_apic_id(x)
22#endif
23
24#endif /* _ASM_X86_MACH_DEFAULT_MACH_APICDEF_H */
diff --git a/arch/x86/include/asm/mach-default/mach_ipi.h b/arch/x86/include/asm/mach-default/mach_ipi.h
deleted file mode 100644
index 191312d155da..000000000000
--- a/arch/x86/include/asm/mach-default/mach_ipi.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_IPI_H
2#define _ASM_X86_MACH_DEFAULT_MACH_IPI_H
3
4/* Avoid include hell */
5#define NMI_VECTOR 0x02
6
7void send_IPI_mask_bitmask(const struct cpumask *mask, int vector);
8void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
9void __send_IPI_shortcut(unsigned int shortcut, int vector);
10
11extern int no_broadcast;
12
13#ifdef CONFIG_X86_64
14#include <asm/genapic.h>
15#define send_IPI_mask (genapic->send_IPI_mask)
16#define send_IPI_mask_allbutself (genapic->send_IPI_mask_allbutself)
17#else
18static inline void send_IPI_mask(const struct cpumask *mask, int vector)
19{
20 send_IPI_mask_bitmask(mask, vector);
21}
22void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
23#endif
24
25static inline void __local_send_IPI_allbutself(int vector)
26{
27 if (no_broadcast || vector == NMI_VECTOR)
28 send_IPI_mask_allbutself(cpu_online_mask, vector);
29 else
30 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
31}
32
33static inline void __local_send_IPI_all(int vector)
34{
35 if (no_broadcast || vector == NMI_VECTOR)
36 send_IPI_mask(cpu_online_mask, vector);
37 else
38 __send_IPI_shortcut(APIC_DEST_ALLINC, vector);
39}
40
41#ifdef CONFIG_X86_64
42#define send_IPI_allbutself (genapic->send_IPI_allbutself)
43#define send_IPI_all (genapic->send_IPI_all)
44#else
45static inline void send_IPI_allbutself(int vector)
46{
47 /*
48 * if there are no other CPUs in the system then we get an APIC send
49 * error if we try to broadcast, thus avoid sending IPIs in this case.
50 */
51 if (!(num_online_cpus() > 1))
52 return;
53
54 __local_send_IPI_allbutself(vector);
55 return;
56}
57
58static inline void send_IPI_all(int vector)
59{
60 __local_send_IPI_all(vector);
61}
62#endif
63
64#endif /* _ASM_X86_MACH_DEFAULT_MACH_IPI_H */
diff --git a/arch/x86/include/asm/mach-default/mach_mpparse.h b/arch/x86/include/asm/mach-default/mach_mpparse.h
deleted file mode 100644
index c70a263d68cd..000000000000
--- a/arch/x86/include/asm/mach-default/mach_mpparse.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H
2#define _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H
3
4static inline int
5mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
6{
7 return 0;
8}
9
10/* Hook from generic ACPI tables.c */
11static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
12{
13 return 0;
14}
15
16
17#endif /* _ASM_X86_MACH_DEFAULT_MACH_MPPARSE_H */
diff --git a/arch/x86/include/asm/mach-default/mach_mpspec.h b/arch/x86/include/asm/mach-default/mach_mpspec.h
deleted file mode 100644
index e85ede686be8..000000000000
--- a/arch/x86/include/asm/mach-default/mach_mpspec.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H
2#define _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H
3
4#define MAX_IRQ_SOURCES 256
5
6#if CONFIG_BASE_SMALL == 0
7#define MAX_MP_BUSSES 256
8#else
9#define MAX_MP_BUSSES 32
10#endif
11
12#endif /* _ASM_X86_MACH_DEFAULT_MACH_MPSPEC_H */
diff --git a/arch/x86/include/asm/mach-default/mach_wakecpu.h b/arch/x86/include/asm/mach-default/mach_wakecpu.h
deleted file mode 100644
index 89897a6a65b9..000000000000
--- a/arch/x86/include/asm/mach-default/mach_wakecpu.h
+++ /dev/null
@@ -1,41 +0,0 @@
1#ifndef _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
2#define _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H
3
4#define TRAMPOLINE_PHYS_LOW (0x467)
5#define TRAMPOLINE_PHYS_HIGH (0x469)
6
7static inline void wait_for_init_deassert(atomic_t *deassert)
8{
9 while (!atomic_read(deassert))
10 cpu_relax();
11 return;
12}
13
14/* Nothing to do for most platforms, since cleared by the INIT cycle */
15static inline void smp_callin_clear_local_apic(void)
16{
17}
18
19static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
20{
21}
22
23static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
24{
25}
26
27#ifdef CONFIG_SMP
28extern void __inquire_remote_apic(int apicid);
29#else /* CONFIG_SMP */
30static inline void __inquire_remote_apic(int apicid)
31{
32}
33#endif /* CONFIG_SMP */
34
35static inline void inquire_remote_apic(int apicid)
36{
37 if (apic_verbosity >= APIC_DEBUG)
38 __inquire_remote_apic(apicid);
39}
40
41#endif /* _ASM_X86_MACH_DEFAULT_MACH_WAKECPU_H */
diff --git a/arch/x86/include/asm/mach-generic/gpio.h b/arch/x86/include/asm/mach-generic/gpio.h
deleted file mode 100644
index 995c45efdb33..000000000000
--- a/arch/x86/include/asm/mach-generic/gpio.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_GPIO_H
2#define _ASM_X86_MACH_GENERIC_GPIO_H
3
4int gpio_request(unsigned gpio, const char *label);
5void gpio_free(unsigned gpio);
6int gpio_direction_input(unsigned gpio);
7int gpio_direction_output(unsigned gpio, int value);
8int gpio_get_value(unsigned gpio);
9void gpio_set_value(unsigned gpio, int value);
10int gpio_to_irq(unsigned gpio);
11int irq_to_gpio(unsigned irq);
12
13#include <asm-generic/gpio.h> /* cansleep wrappers */
14
15#endif /* _ASM_X86_MACH_GENERIC_GPIO_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h
deleted file mode 100644
index 48553e958ad5..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_apic.h
+++ /dev/null
@@ -1,35 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_APIC_H
2#define _ASM_X86_MACH_GENERIC_MACH_APIC_H
3
4#include <asm/genapic.h>
5
6#define esr_disable (genapic->ESR_DISABLE)
7#define NO_BALANCE_IRQ (genapic->no_balance_irq)
8#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
9#define INT_DEST_MODE (genapic->int_dest_mode)
10#undef APIC_DEST_LOGICAL
11#define APIC_DEST_LOGICAL (genapic->apic_destination_logical)
12#define TARGET_CPUS (genapic->target_cpus())
13#define apic_id_registered (genapic->apic_id_registered)
14#define init_apic_ldr (genapic->init_apic_ldr)
15#define ioapic_phys_id_map (genapic->ioapic_phys_id_map)
16#define setup_apic_routing (genapic->setup_apic_routing)
17#define multi_timer_check (genapic->multi_timer_check)
18#define apicid_to_node (genapic->apicid_to_node)
19#define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid)
20#define cpu_present_to_apicid (genapic->cpu_present_to_apicid)
21#define apicid_to_cpu_present (genapic->apicid_to_cpu_present)
22#define setup_portio_remap (genapic->setup_portio_remap)
23#define check_apicid_present (genapic->check_apicid_present)
24#define check_phys_apicid_present (genapic->check_phys_apicid_present)
25#define check_apicid_used (genapic->check_apicid_used)
26#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
27#define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and)
28#define vector_allocation_domain (genapic->vector_allocation_domain)
29#define enable_apic_mode (genapic->enable_apic_mode)
30#define phys_pkg_id (genapic->phys_pkg_id)
31#define wakeup_secondary_cpu (genapic->wakeup_cpu)
32
33extern void generic_bigsmp_probe(void);
34
35#endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_apicdef.h b/arch/x86/include/asm/mach-generic/mach_apicdef.h
deleted file mode 100644
index 68041f3802f4..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_apicdef.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_APICDEF_H
2#define _ASM_X86_MACH_GENERIC_MACH_APICDEF_H
3
4#ifndef APIC_DEFINITION
5#include <asm/genapic.h>
6
7#define GET_APIC_ID (genapic->get_apic_id)
8#define APIC_ID_MASK (genapic->apic_id_mask)
9#endif
10
11#endif /* _ASM_X86_MACH_GENERIC_MACH_APICDEF_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_ipi.h b/arch/x86/include/asm/mach-generic/mach_ipi.h
deleted file mode 100644
index ffd637e3c3d9..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_ipi.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_IPI_H
2#define _ASM_X86_MACH_GENERIC_MACH_IPI_H
3
4#include <asm/genapic.h>
5
6#define send_IPI_mask (genapic->send_IPI_mask)
7#define send_IPI_allbutself (genapic->send_IPI_allbutself)
8#define send_IPI_all (genapic->send_IPI_all)
9
10#endif /* _ASM_X86_MACH_GENERIC_MACH_IPI_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_mpparse.h b/arch/x86/include/asm/mach-generic/mach_mpparse.h
deleted file mode 100644
index 9444ab8dca94..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_mpparse.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H
2#define _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H
3
4
5extern int mps_oem_check(struct mpc_table *, char *, char *);
6
7extern int acpi_madt_oem_check(char *, char *);
8
9#endif /* _ASM_X86_MACH_GENERIC_MACH_MPPARSE_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_mpspec.h b/arch/x86/include/asm/mach-generic/mach_mpspec.h
deleted file mode 100644
index 3bc407226578..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_mpspec.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H
2#define _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H
3
4#define MAX_IRQ_SOURCES 256
5
6/* Summit or generic (i.e. installer) kernels need lots of bus entries. */
7/* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */
8#define MAX_MP_BUSSES 260
9
10extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
11
12#endif /* _ASM_X86_MACH_GENERIC_MACH_MPSPEC_H */
diff --git a/arch/x86/include/asm/mach-generic/mach_wakecpu.h b/arch/x86/include/asm/mach-generic/mach_wakecpu.h
deleted file mode 100644
index 1ab16b168c8a..000000000000
--- a/arch/x86/include/asm/mach-generic/mach_wakecpu.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
2#define _ASM_X86_MACH_GENERIC_MACH_WAKECPU_H
3
4#define TRAMPOLINE_PHYS_LOW (genapic->trampoline_phys_low)
5#define TRAMPOLINE_PHYS_HIGH (genapic->trampoline_phys_high)
6#define wait_for_init_deassert (genapic->wait_for_init_deassert)
7#define smp_callin_clear_local_apic (genapic->smp_callin_clear_local_apic)
8#define store_NMI_vector (genapic->store_NMI_vector)
9#define restore_NMI_vector (genapic->restore_NMI_vector)
10#define inquire_remote_apic (genapic->inquire_remote_apic)
11
12#endif /* _ASM_X86_MACH_GENERIC_MACH_APIC_H */
diff --git a/arch/x86/include/asm/mach-rdc321x/gpio.h b/arch/x86/include/asm/mach-rdc321x/gpio.h
deleted file mode 100644
index c210ab5788b0..000000000000
--- a/arch/x86/include/asm/mach-rdc321x/gpio.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef _ASM_X86_MACH_RDC321X_GPIO_H
2#define _ASM_X86_MACH_RDC321X_GPIO_H
3
4#include <linux/kernel.h>
5
6extern int rdc_gpio_get_value(unsigned gpio);
7extern void rdc_gpio_set_value(unsigned gpio, int value);
8extern int rdc_gpio_direction_input(unsigned gpio);
9extern int rdc_gpio_direction_output(unsigned gpio, int value);
10extern int rdc_gpio_request(unsigned gpio, const char *label);
11extern void rdc_gpio_free(unsigned gpio);
12extern void __init rdc321x_gpio_setup(void);
13
14/* Wrappers for the arch-neutral GPIO API */
15
16static inline int gpio_request(unsigned gpio, const char *label)
17{
18 return rdc_gpio_request(gpio, label);
19}
20
21static inline void gpio_free(unsigned gpio)
22{
23 might_sleep();
24 rdc_gpio_free(gpio);
25}
26
27static inline int gpio_direction_input(unsigned gpio)
28{
29 return rdc_gpio_direction_input(gpio);
30}
31
32static inline int gpio_direction_output(unsigned gpio, int value)
33{
34 return rdc_gpio_direction_output(gpio, value);
35}
36
37static inline int gpio_get_value(unsigned gpio)
38{
39 return rdc_gpio_get_value(gpio);
40}
41
42static inline void gpio_set_value(unsigned gpio, int value)
43{
44 rdc_gpio_set_value(gpio, value);
45}
46
47static inline int gpio_to_irq(unsigned gpio)
48{
49 return gpio;
50}
51
52static inline int irq_to_gpio(unsigned irq)
53{
54 return irq;
55}
56
57/* For cansleep */
58#include <asm-generic/gpio.h>
59
60#endif /* _ASM_X86_MACH_RDC321X_GPIO_H */
diff --git a/arch/x86/include/asm/mach-voyager/do_timer.h b/arch/x86/include/asm/mach-voyager/do_timer.h
deleted file mode 100644
index 9e5a459fd15b..000000000000
--- a/arch/x86/include/asm/mach-voyager/do_timer.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* defines for inline arch setup functions */
2#include <linux/clockchips.h>
3
4#include <asm/voyager.h>
5#include <asm/i8253.h>
6
7/**
8 * do_timer_interrupt_hook - hook into timer tick
9 *
10 * Call the pit clock event handler. see asm/i8253.h
11 **/
12static inline void do_timer_interrupt_hook(void)
13{
14 global_clock_event->event_handler(global_clock_event);
15 voyager_timer_interrupt();
16}
17
diff --git a/arch/x86/include/asm/mach-voyager/entry_arch.h b/arch/x86/include/asm/mach-voyager/entry_arch.h
deleted file mode 100644
index ae52624b5937..000000000000
--- a/arch/x86/include/asm/mach-voyager/entry_arch.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Copyright (C) 2002
4 *
5 * Author: James.Bottomley@HansenPartnership.com
6 *
7 * linux/arch/i386/voyager/entry_arch.h
8 *
9 * This file builds the VIC and QIC CPI gates
10 */
11
12/* initialise the voyager interrupt gates
13 *
14 * This uses the macros in irq.h to set up assembly jump gates. The
15 * calls are then redirected to the same routine with smp_ prefixed */
16BUILD_INTERRUPT(vic_sys_interrupt, VIC_SYS_INT)
17BUILD_INTERRUPT(vic_cmn_interrupt, VIC_CMN_INT)
18BUILD_INTERRUPT(vic_cpi_interrupt, VIC_CPI_LEVEL0);
19
20/* do all the QIC interrupts */
21BUILD_INTERRUPT(qic_timer_interrupt, QIC_TIMER_CPI);
22BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI);
23BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI);
24BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI);
25BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI);
26BUILD_INTERRUPT(qic_call_function_single_interrupt, QIC_CALL_FUNCTION_SINGLE_CPI);
diff --git a/arch/x86/include/asm/mach-voyager/setup_arch.h b/arch/x86/include/asm/mach-voyager/setup_arch.h
deleted file mode 100644
index 71729ca05cd7..000000000000
--- a/arch/x86/include/asm/mach-voyager/setup_arch.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#include <asm/voyager.h>
2#include <asm/setup.h>
3#define VOYAGER_BIOS_INFO ((struct voyager_bios_info *) \
4 (&boot_params.apm_bios_info))
5
6/* Hook to call BIOS initialisation function */
7
8/* for voyager, pass the voyager BIOS/SUS info area to the detection
9 * routines */
10
11#define ARCH_SETUP voyager_detect(VOYAGER_BIOS_INFO);
12
diff --git a/arch/x86/include/asm/mach-default/mach_timer.h b/arch/x86/include/asm/mach_timer.h
index 853728519ae9..853728519ae9 100644
--- a/arch/x86/include/asm/mach-default/mach_timer.h
+++ b/arch/x86/include/asm/mach_timer.h
diff --git a/arch/x86/include/asm/mach-default/mach_traps.h b/arch/x86/include/asm/mach_traps.h
index f7920601e472..f7920601e472 100644
--- a/arch/x86/include/asm/mach-default/mach_traps.h
+++ b/arch/x86/include/asm/mach_traps.h
diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index 8aeeb3fd73db..f923203dc39a 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -21,11 +21,54 @@ static inline void paravirt_activate_mm(struct mm_struct *prev,
21int init_new_context(struct task_struct *tsk, struct mm_struct *mm); 21int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
22void destroy_context(struct mm_struct *mm); 22void destroy_context(struct mm_struct *mm);
23 23
24#ifdef CONFIG_X86_32 24
25# include "mmu_context_32.h" 25static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
26#else 26{
27# include "mmu_context_64.h" 27#ifdef CONFIG_SMP
28 if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
29 percpu_write(cpu_tlbstate.state, TLBSTATE_LAZY);
30#endif
31}
32
33static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
34 struct task_struct *tsk)
35{
36 unsigned cpu = smp_processor_id();
37
38 if (likely(prev != next)) {
39 /* stop flush ipis for the previous mm */
40 cpu_clear(cpu, prev->cpu_vm_mask);
41#ifdef CONFIG_SMP
42 percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
43 percpu_write(cpu_tlbstate.active_mm, next);
28#endif 44#endif
45 cpu_set(cpu, next->cpu_vm_mask);
46
47 /* Re-load page tables */
48 load_cr3(next->pgd);
49
50 /*
51 * load the LDT, if the LDT is different:
52 */
53 if (unlikely(prev->context.ldt != next->context.ldt))
54 load_LDT_nolock(&next->context);
55 }
56#ifdef CONFIG_SMP
57 else {
58 percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
59 BUG_ON(percpu_read(cpu_tlbstate.active_mm) != next);
60
61 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
62 /* We were in lazy tlb mode and leave_mm disabled
63 * tlb flush IPI delivery. We must reload CR3
64 * to make sure to use no freed page tables.
65 */
66 load_cr3(next->pgd);
67 load_LDT_nolock(&next->context);
68 }
69 }
70#endif
71}
29 72
30#define activate_mm(prev, next) \ 73#define activate_mm(prev, next) \
31do { \ 74do { \
@@ -33,5 +76,17 @@ do { \
33 switch_mm((prev), (next), NULL); \ 76 switch_mm((prev), (next), NULL); \
34} while (0); 77} while (0);
35 78
79#ifdef CONFIG_X86_32
80#define deactivate_mm(tsk, mm) \
81do { \
82 lazy_load_gs(0); \
83} while (0)
84#else
85#define deactivate_mm(tsk, mm) \
86do { \
87 load_gs_index(0); \
88 loadsegment(fs, 0); \
89} while (0)
90#endif
36 91
37#endif /* _ASM_X86_MMU_CONTEXT_H */ 92#endif /* _ASM_X86_MMU_CONTEXT_H */
diff --git a/arch/x86/include/asm/mmu_context_32.h b/arch/x86/include/asm/mmu_context_32.h
deleted file mode 100644
index 7e98ce1d2c0e..000000000000
--- a/arch/x86/include/asm/mmu_context_32.h
+++ /dev/null
@@ -1,55 +0,0 @@
1#ifndef _ASM_X86_MMU_CONTEXT_32_H
2#define _ASM_X86_MMU_CONTEXT_32_H
3
4static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
5{
6#ifdef CONFIG_SMP
7 if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK)
8 x86_write_percpu(cpu_tlbstate.state, TLBSTATE_LAZY);
9#endif
10}
11
12static inline void switch_mm(struct mm_struct *prev,
13 struct mm_struct *next,
14 struct task_struct *tsk)
15{
16 int cpu = smp_processor_id();
17
18 if (likely(prev != next)) {
19 /* stop flush ipis for the previous mm */
20 cpu_clear(cpu, prev->cpu_vm_mask);
21#ifdef CONFIG_SMP
22 x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
23 x86_write_percpu(cpu_tlbstate.active_mm, next);
24#endif
25 cpu_set(cpu, next->cpu_vm_mask);
26
27 /* Re-load page tables */
28 load_cr3(next->pgd);
29
30 /*
31 * load the LDT, if the LDT is different:
32 */
33 if (unlikely(prev->context.ldt != next->context.ldt))
34 load_LDT_nolock(&next->context);
35 }
36#ifdef CONFIG_SMP
37 else {
38 x86_write_percpu(cpu_tlbstate.state, TLBSTATE_OK);
39 BUG_ON(x86_read_percpu(cpu_tlbstate.active_mm) != next);
40
41 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
42 /* We were in lazy tlb mode and leave_mm disabled
43 * tlb flush IPI delivery. We must reload %cr3.
44 */
45 load_cr3(next->pgd);
46 load_LDT_nolock(&next->context);
47 }
48 }
49#endif
50}
51
52#define deactivate_mm(tsk, mm) \
53 asm("movl %0,%%gs": :"r" (0));
54
55#endif /* _ASM_X86_MMU_CONTEXT_32_H */
diff --git a/arch/x86/include/asm/mmu_context_64.h b/arch/x86/include/asm/mmu_context_64.h
deleted file mode 100644
index 677d36e9540a..000000000000
--- a/arch/x86/include/asm/mmu_context_64.h
+++ /dev/null
@@ -1,54 +0,0 @@
1#ifndef _ASM_X86_MMU_CONTEXT_64_H
2#define _ASM_X86_MMU_CONTEXT_64_H
3
4#include <asm/pda.h>
5
6static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
7{
8#ifdef CONFIG_SMP
9 if (read_pda(mmu_state) == TLBSTATE_OK)
10 write_pda(mmu_state, TLBSTATE_LAZY);
11#endif
12}
13
14static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
15 struct task_struct *tsk)
16{
17 unsigned cpu = smp_processor_id();
18 if (likely(prev != next)) {
19 /* stop flush ipis for the previous mm */
20 cpu_clear(cpu, prev->cpu_vm_mask);
21#ifdef CONFIG_SMP
22 write_pda(mmu_state, TLBSTATE_OK);
23 write_pda(active_mm, next);
24#endif
25 cpu_set(cpu, next->cpu_vm_mask);
26 load_cr3(next->pgd);
27
28 if (unlikely(next->context.ldt != prev->context.ldt))
29 load_LDT_nolock(&next->context);
30 }
31#ifdef CONFIG_SMP
32 else {
33 write_pda(mmu_state, TLBSTATE_OK);
34 if (read_pda(active_mm) != next)
35 BUG();
36 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
37 /* We were in lazy tlb mode and leave_mm disabled
38 * tlb flush IPI delivery. We must reload CR3
39 * to make sure to use no freed page tables.
40 */
41 load_cr3(next->pgd);
42 load_LDT_nolock(&next->context);
43 }
44 }
45#endif
46}
47
48#define deactivate_mm(tsk, mm) \
49do { \
50 load_gs_index(0); \
51 asm volatile("movl %0,%%fs"::"r"(0)); \
52} while (0)
53
54#endif /* _ASM_X86_MMU_CONTEXT_64_H */
diff --git a/arch/x86/include/asm/mmzone_32.h b/arch/x86/include/asm/mmzone_32.h
index 105fb90a0635..ede6998bd92c 100644
--- a/arch/x86/include/asm/mmzone_32.h
+++ b/arch/x86/include/asm/mmzone_32.h
@@ -91,46 +91,9 @@ static inline int pfn_valid(int pfn)
91#endif /* CONFIG_DISCONTIGMEM */ 91#endif /* CONFIG_DISCONTIGMEM */
92 92
93#ifdef CONFIG_NEED_MULTIPLE_NODES 93#ifdef CONFIG_NEED_MULTIPLE_NODES
94 94/* always use node 0 for bootmem on this numa platform */
95/* 95#define bootmem_arch_preferred_node(__bdata, size, align, goal, limit) \
96 * Following are macros that are specific to this numa platform. 96 (NODE_DATA(0)->bdata)
97 */
98#define reserve_bootmem(addr, size, flags) \
99 reserve_bootmem_node(NODE_DATA(0), (addr), (size), (flags))
100#define alloc_bootmem(x) \
101 __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
102#define alloc_bootmem_nopanic(x) \
103 __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), SMP_CACHE_BYTES, \
104 __pa(MAX_DMA_ADDRESS))
105#define alloc_bootmem_low(x) \
106 __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, 0)
107#define alloc_bootmem_pages(x) \
108 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
109#define alloc_bootmem_pages_nopanic(x) \
110 __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), PAGE_SIZE, \
111 __pa(MAX_DMA_ADDRESS))
112#define alloc_bootmem_low_pages(x) \
113 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0)
114#define alloc_bootmem_node(pgdat, x) \
115({ \
116 struct pglist_data __maybe_unused \
117 *__alloc_bootmem_node__pgdat = (pgdat); \
118 __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, \
119 __pa(MAX_DMA_ADDRESS)); \
120})
121#define alloc_bootmem_pages_node(pgdat, x) \
122({ \
123 struct pglist_data __maybe_unused \
124 *__alloc_bootmem_node__pgdat = (pgdat); \
125 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, \
126 __pa(MAX_DMA_ADDRESS)); \
127})
128#define alloc_bootmem_low_pages_node(pgdat, x) \
129({ \
130 struct pglist_data __maybe_unused \
131 *__alloc_bootmem_node__pgdat = (pgdat); \
132 __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0); \
133})
134#endif /* CONFIG_NEED_MULTIPLE_NODES */ 97#endif /* CONFIG_NEED_MULTIPLE_NODES */
135 98
136#endif /* _ASM_X86_MMZONE_32_H */ 99#endif /* _ASM_X86_MMZONE_32_H */
diff --git a/arch/x86/include/asm/mpspec.h b/arch/x86/include/asm/mpspec.h
index bd22f2a3713f..642fc7fc8cdc 100644
--- a/arch/x86/include/asm/mpspec.h
+++ b/arch/x86/include/asm/mpspec.h
@@ -9,7 +9,18 @@ extern int apic_version[MAX_APICS];
9extern int pic_mode; 9extern int pic_mode;
10 10
11#ifdef CONFIG_X86_32 11#ifdef CONFIG_X86_32
12#include <mach_mpspec.h> 12
13/*
14 * Summit or generic (i.e. installer) kernels need lots of bus entries.
15 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
16 */
17#if CONFIG_BASE_SMALL == 0
18# define MAX_MP_BUSSES 260
19#else
20# define MAX_MP_BUSSES 32
21#endif
22
23#define MAX_IRQ_SOURCES 256
13 24
14extern unsigned int def_to_bigsmp; 25extern unsigned int def_to_bigsmp;
15extern u8 apicid_2_node[]; 26extern u8 apicid_2_node[];
@@ -20,15 +31,15 @@ extern int mp_bus_id_to_local[MAX_MP_BUSSES];
20extern int quad_local_to_mp_bus_id [NR_CPUS/4][4]; 31extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
21#endif 32#endif
22 33
23#define MAX_APICID 256 34#define MAX_APICID 256
24 35
25#else 36#else /* CONFIG_X86_64: */
26 37
27#define MAX_MP_BUSSES 256 38#define MAX_MP_BUSSES 256
28/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ 39/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
29#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) 40#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
30 41
31#endif 42#endif /* CONFIG_X86_64 */
32 43
33extern void early_find_smp_config(void); 44extern void early_find_smp_config(void);
34extern void early_get_smp_config(void); 45extern void early_get_smp_config(void);
@@ -45,11 +56,13 @@ extern int smp_found_config;
45extern int mpc_default_type; 56extern int mpc_default_type;
46extern unsigned long mp_lapic_addr; 57extern unsigned long mp_lapic_addr;
47 58
48extern void find_smp_config(void);
49extern void get_smp_config(void); 59extern void get_smp_config(void);
60
50#ifdef CONFIG_X86_MPPARSE 61#ifdef CONFIG_X86_MPPARSE
62extern void find_smp_config(void);
51extern void early_reserve_e820_mpc_new(void); 63extern void early_reserve_e820_mpc_new(void);
52#else 64#else
65static inline void find_smp_config(void) { }
53static inline void early_reserve_e820_mpc_new(void) { } 66static inline void early_reserve_e820_mpc_new(void) { }
54#endif 67#endif
55 68
@@ -64,6 +77,8 @@ extern int acpi_probe_gsi(void);
64#ifdef CONFIG_X86_IO_APIC 77#ifdef CONFIG_X86_IO_APIC
65extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, 78extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
66 u32 gsi, int triggering, int polarity); 79 u32 gsi, int triggering, int polarity);
80extern int mp_find_ioapic(int gsi);
81extern int mp_find_ioapic_pin(int ioapic, int gsi);
67#else 82#else
68static inline int 83static inline int
69mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, 84mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
@@ -148,4 +163,8 @@ static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
148 163
149extern physid_mask_t phys_cpu_present_map; 164extern physid_mask_t phys_cpu_present_map;
150 165
166extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
167
168extern int default_acpi_madt_oem_check(char *, char *);
169
151#endif /* _ASM_X86_MPSPEC_H */ 170#endif /* _ASM_X86_MPSPEC_H */
diff --git a/arch/x86/include/asm/mpspec_def.h b/arch/x86/include/asm/mpspec_def.h
index 59568bc4767f..4a7f96d7c188 100644
--- a/arch/x86/include/asm/mpspec_def.h
+++ b/arch/x86/include/asm/mpspec_def.h
@@ -24,17 +24,18 @@
24# endif 24# endif
25#endif 25#endif
26 26
27struct intel_mp_floating { 27/* Intel MP Floating Pointer Structure */
28 char mpf_signature[4]; /* "_MP_" */ 28struct mpf_intel {
29 unsigned int mpf_physptr; /* Configuration table address */ 29 char signature[4]; /* "_MP_" */
30 unsigned char mpf_length; /* Our length (paragraphs) */ 30 unsigned int physptr; /* Configuration table address */
31 unsigned char mpf_specification;/* Specification version */ 31 unsigned char length; /* Our length (paragraphs) */
32 unsigned char mpf_checksum; /* Checksum (makes sum 0) */ 32 unsigned char specification; /* Specification version */
33 unsigned char mpf_feature1; /* Standard or configuration ? */ 33 unsigned char checksum; /* Checksum (makes sum 0) */
34 unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */ 34 unsigned char feature1; /* Standard or configuration ? */
35 unsigned char mpf_feature3; /* Unused (0) */ 35 unsigned char feature2; /* Bit7 set for IMCR|PIC */
36 unsigned char mpf_feature4; /* Unused (0) */ 36 unsigned char feature3; /* Unused (0) */
37 unsigned char mpf_feature5; /* Unused (0) */ 37 unsigned char feature4; /* Unused (0) */
38 unsigned char feature5; /* Unused (0) */
38}; 39};
39 40
40#define MPC_SIGNATURE "PCMP" 41#define MPC_SIGNATURE "PCMP"
diff --git a/arch/x86/include/asm/numa_32.h b/arch/x86/include/asm/numa_32.h
index e9f5db796244..a37229011b56 100644
--- a/arch/x86/include/asm/numa_32.h
+++ b/arch/x86/include/asm/numa_32.h
@@ -4,8 +4,12 @@
4extern int pxm_to_nid(int pxm); 4extern int pxm_to_nid(int pxm);
5extern void numa_remove_cpu(int cpu); 5extern void numa_remove_cpu(int cpu);
6 6
7#ifdef CONFIG_NUMA 7#ifdef CONFIG_HIGHMEM
8extern void set_highmem_pages_init(void); 8extern void set_highmem_pages_init(void);
9#else
10static inline void set_highmem_pages_init(void)
11{
12}
9#endif 13#endif
10 14
11#endif /* _ASM_X86_NUMA_32_H */ 15#endif /* _ASM_X86_NUMA_32_H */
diff --git a/arch/x86/include/asm/numaq.h b/arch/x86/include/asm/numaq.h
index 1e8bd30b4c16..9f0a5f5d29ec 100644
--- a/arch/x86/include/asm/numaq.h
+++ b/arch/x86/include/asm/numaq.h
@@ -31,6 +31,8 @@
31extern int found_numaq; 31extern int found_numaq;
32extern int get_memcfg_numaq(void); 32extern int get_memcfg_numaq(void);
33 33
34extern void *xquad_portio;
35
34/* 36/*
35 * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the 37 * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the
36 */ 38 */
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
deleted file mode 100644
index bf37bc49bd8e..000000000000
--- a/arch/x86/include/asm/numaq/apic.h
+++ /dev/null
@@ -1,142 +0,0 @@
1#ifndef __ASM_NUMAQ_APIC_H
2#define __ASM_NUMAQ_APIC_H
3
4#include <asm/io.h>
5#include <linux/mmzone.h>
6#include <linux/nodemask.h>
7
8#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
9
10static inline const cpumask_t *target_cpus(void)
11{
12 return &CPU_MASK_ALL;
13}
14
15#define NO_BALANCE_IRQ (1)
16#define esr_disable (1)
17
18#define INT_DELIVERY_MODE dest_LowestPrio
19#define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */
20
21static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
22{
23 return physid_isset(apicid, bitmap);
24}
25static inline unsigned long check_apicid_present(int bit)
26{
27 return physid_isset(bit, phys_cpu_present_map);
28}
29#define apicid_cluster(apicid) (apicid & 0xF0)
30
31static inline int apic_id_registered(void)
32{
33 return 1;
34}
35
36static inline void init_apic_ldr(void)
37{
38 /* Already done in NUMA-Q firmware */
39}
40
41static inline void setup_apic_routing(void)
42{
43 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
44 "NUMA-Q", nr_ioapics);
45}
46
47/*
48 * Skip adding the timer int on secondary nodes, which causes
49 * a small but painful rift in the time-space continuum.
50 */
51static inline int multi_timer_check(int apic, int irq)
52{
53 return apic != 0 && irq == 0;
54}
55
56static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
57{
58 /* We don't have a good way to do this yet - hack */
59 return physids_promote(0xFUL);
60}
61
62/* Mapping from cpu number to logical apicid */
63extern u8 cpu_2_logical_apicid[];
64static inline int cpu_to_logical_apicid(int cpu)
65{
66 if (cpu >= nr_cpu_ids)
67 return BAD_APICID;
68 return (int)cpu_2_logical_apicid[cpu];
69}
70
71/*
72 * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
73 * cpu to APIC ID relation to properly interact with the intelligent
74 * mode of the cluster controller.
75 */
76static inline int cpu_present_to_apicid(int mps_cpu)
77{
78 if (mps_cpu < 60)
79 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
80 else
81 return BAD_APICID;
82}
83
84static inline int apicid_to_node(int logical_apicid)
85{
86 return logical_apicid >> 4;
87}
88
89static inline physid_mask_t apicid_to_cpu_present(int logical_apicid)
90{
91 int node = apicid_to_node(logical_apicid);
92 int cpu = __ffs(logical_apicid & 0xf);
93
94 return physid_mask_of_physid(cpu + 4*node);
95}
96
97extern void *xquad_portio;
98
99static inline void setup_portio_remap(void)
100{
101 int num_quads = num_online_nodes();
102
103 if (num_quads <= 1)
104 return;
105
106 printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
107 xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
108 printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
109 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
110}
111
112static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
113{
114 return (1);
115}
116
117static inline void enable_apic_mode(void)
118{
119}
120
121/*
122 * We use physical apicids here, not logical, so just return the default
123 * physical broadcast to stop people from breaking us
124 */
125static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
126{
127 return (int) 0xF;
128}
129
130static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *cpumask,
131 const struct cpumask *andmask)
132{
133 return (int) 0xF;
134}
135
136/* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
137static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
138{
139 return cpuid_apic >> index_msb;
140}
141
142#endif /* __ASM_NUMAQ_APIC_H */
diff --git a/arch/x86/include/asm/numaq/apicdef.h b/arch/x86/include/asm/numaq/apicdef.h
deleted file mode 100644
index e012a46cc22a..000000000000
--- a/arch/x86/include/asm/numaq/apicdef.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef __ASM_NUMAQ_APICDEF_H
2#define __ASM_NUMAQ_APICDEF_H
3
4
5#define APIC_ID_MASK (0xF<<24)
6
7static inline unsigned get_apic_id(unsigned long x)
8{
9 return (((x)>>24)&0x0F);
10}
11
12#define GET_APIC_ID(x) get_apic_id(x)
13
14#endif
diff --git a/arch/x86/include/asm/numaq/ipi.h b/arch/x86/include/asm/numaq/ipi.h
deleted file mode 100644
index a8374c652778..000000000000
--- a/arch/x86/include/asm/numaq/ipi.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef __ASM_NUMAQ_IPI_H
2#define __ASM_NUMAQ_IPI_H
3
4void send_IPI_mask_sequence(const struct cpumask *mask, int vector);
5void send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
6
7static inline void send_IPI_mask(const struct cpumask *mask, int vector)
8{
9 send_IPI_mask_sequence(mask, vector);
10}
11
12static inline void send_IPI_allbutself(int vector)
13{
14 send_IPI_mask_allbutself(cpu_online_mask, vector);
15}
16
17static inline void send_IPI_all(int vector)
18{
19 send_IPI_mask(cpu_online_mask, vector);
20}
21
22#endif /* __ASM_NUMAQ_IPI_H */
diff --git a/arch/x86/include/asm/numaq/mpparse.h b/arch/x86/include/asm/numaq/mpparse.h
deleted file mode 100644
index a2eeefcd1cc7..000000000000
--- a/arch/x86/include/asm/numaq/mpparse.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_NUMAQ_MPPARSE_H
2#define __ASM_NUMAQ_MPPARSE_H
3
4extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
5
6#endif /* __ASM_NUMAQ_MPPARSE_H */
diff --git a/arch/x86/include/asm/numaq/wakecpu.h b/arch/x86/include/asm/numaq/wakecpu.h
deleted file mode 100644
index 6f499df8eddb..000000000000
--- a/arch/x86/include/asm/numaq/wakecpu.h
+++ /dev/null
@@ -1,45 +0,0 @@
1#ifndef __ASM_NUMAQ_WAKECPU_H
2#define __ASM_NUMAQ_WAKECPU_H
3
4/* This file copes with machines that wakeup secondary CPUs by NMIs */
5
6#define TRAMPOLINE_PHYS_LOW (0x8)
7#define TRAMPOLINE_PHYS_HIGH (0xa)
8
9/* We don't do anything here because we use NMI's to boot instead */
10static inline void wait_for_init_deassert(atomic_t *deassert)
11{
12}
13
14/*
15 * Because we use NMIs rather than the INIT-STARTUP sequence to
16 * bootstrap the CPUs, the APIC may be in a weird state. Kick it.
17 */
18static inline void smp_callin_clear_local_apic(void)
19{
20 clear_local_APIC();
21}
22
23static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
24{
25 printk("Storing NMI vector\n");
26 *high =
27 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH));
28 *low =
29 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW));
30}
31
32static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
33{
34 printk("Restoring NMI vector\n");
35 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
36 *high;
37 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
38 *low;
39}
40
41static inline void inquire_remote_apic(int apicid)
42{
43}
44
45#endif /* __ASM_NUMAQ_WAKECPU_H */
diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h
index 776579119a00..89ed9d70b0aa 100644
--- a/arch/x86/include/asm/page.h
+++ b/arch/x86/include/asm/page.h
@@ -1,42 +1,11 @@
1#ifndef _ASM_X86_PAGE_H 1#ifndef _ASM_X86_PAGE_H
2#define _ASM_X86_PAGE_H 2#define _ASM_X86_PAGE_H
3 3
4#include <linux/const.h> 4#include <linux/types.h>
5
6/* PAGE_SHIFT determines the page size */
7#define PAGE_SHIFT 12
8#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
9#define PAGE_MASK (~(PAGE_SIZE-1))
10 5
11#ifdef __KERNEL__ 6#ifdef __KERNEL__
12 7
13#define __PHYSICAL_MASK ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1) 8#include <asm/page_types.h>
14#define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
15
16/* Cast PAGE_MASK to a signed type so that it is sign-extended if
17 virtual addresses are 32-bits but physical addresses are larger
18 (ie, 32-bit PAE). */
19#define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
20
21/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
22#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
23
24/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
25#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
26
27#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
28#define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
29
30#define HPAGE_SHIFT PMD_SHIFT
31#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
32#define HPAGE_MASK (~(HPAGE_SIZE - 1))
33#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
34
35#define HUGE_MAX_HSTATE 2
36
37#ifndef __ASSEMBLY__
38#include <linux/types.h>
39#endif
40 9
41#ifdef CONFIG_X86_64 10#ifdef CONFIG_X86_64
42#include <asm/page_64.h> 11#include <asm/page_64.h>
@@ -44,38 +13,18 @@
44#include <asm/page_32.h> 13#include <asm/page_32.h>
45#endif /* CONFIG_X86_64 */ 14#endif /* CONFIG_X86_64 */
46 15
47#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
48
49#define VM_DATA_DEFAULT_FLAGS \
50 (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
51 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
52
53
54#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
55 17
56typedef struct { pgdval_t pgd; } pgd_t;
57typedef struct { pgprotval_t pgprot; } pgprot_t;
58
59extern int page_is_ram(unsigned long pagenr);
60extern int devmem_is_allowed(unsigned long pagenr);
61extern void map_devmem(unsigned long pfn, unsigned long size,
62 pgprot_t vma_prot);
63extern void unmap_devmem(unsigned long pfn, unsigned long size,
64 pgprot_t vma_prot);
65
66extern unsigned long max_low_pfn_mapped;
67extern unsigned long max_pfn_mapped;
68
69struct page; 18struct page;
70 19
71static inline void clear_user_page(void *page, unsigned long vaddr, 20static inline void clear_user_page(void *page, unsigned long vaddr,
72 struct page *pg) 21 struct page *pg)
73{ 22{
74 clear_page(page); 23 clear_page(page);
75} 24}
76 25
77static inline void copy_user_page(void *to, void *from, unsigned long vaddr, 26static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
78 struct page *topage) 27 struct page *topage)
79{ 28{
80 copy_page(to, from); 29 copy_page(to, from);
81} 30}
@@ -84,99 +33,6 @@ static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
84 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) 33 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
85#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE 34#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
86 35
87static inline pgd_t native_make_pgd(pgdval_t val)
88{
89 return (pgd_t) { val };
90}
91
92static inline pgdval_t native_pgd_val(pgd_t pgd)
93{
94 return pgd.pgd;
95}
96
97#if PAGETABLE_LEVELS >= 3
98#if PAGETABLE_LEVELS == 4
99typedef struct { pudval_t pud; } pud_t;
100
101static inline pud_t native_make_pud(pmdval_t val)
102{
103 return (pud_t) { val };
104}
105
106static inline pudval_t native_pud_val(pud_t pud)
107{
108 return pud.pud;
109}
110#else /* PAGETABLE_LEVELS == 3 */
111#include <asm-generic/pgtable-nopud.h>
112
113static inline pudval_t native_pud_val(pud_t pud)
114{
115 return native_pgd_val(pud.pgd);
116}
117#endif /* PAGETABLE_LEVELS == 4 */
118
119typedef struct { pmdval_t pmd; } pmd_t;
120
121static inline pmd_t native_make_pmd(pmdval_t val)
122{
123 return (pmd_t) { val };
124}
125
126static inline pmdval_t native_pmd_val(pmd_t pmd)
127{
128 return pmd.pmd;
129}
130#else /* PAGETABLE_LEVELS == 2 */
131#include <asm-generic/pgtable-nopmd.h>
132
133static inline pmdval_t native_pmd_val(pmd_t pmd)
134{
135 return native_pgd_val(pmd.pud.pgd);
136}
137#endif /* PAGETABLE_LEVELS >= 3 */
138
139static inline pte_t native_make_pte(pteval_t val)
140{
141 return (pte_t) { .pte = val };
142}
143
144static inline pteval_t native_pte_val(pte_t pte)
145{
146 return pte.pte;
147}
148
149static inline pteval_t native_pte_flags(pte_t pte)
150{
151 return native_pte_val(pte) & PTE_FLAGS_MASK;
152}
153
154#define pgprot_val(x) ((x).pgprot)
155#define __pgprot(x) ((pgprot_t) { (x) } )
156
157#ifdef CONFIG_PARAVIRT
158#include <asm/paravirt.h>
159#else /* !CONFIG_PARAVIRT */
160
161#define pgd_val(x) native_pgd_val(x)
162#define __pgd(x) native_make_pgd(x)
163
164#ifndef __PAGETABLE_PUD_FOLDED
165#define pud_val(x) native_pud_val(x)
166#define __pud(x) native_make_pud(x)
167#endif
168
169#ifndef __PAGETABLE_PMD_FOLDED
170#define pmd_val(x) native_pmd_val(x)
171#define __pmd(x) native_make_pmd(x)
172#endif
173
174#define pte_val(x) native_pte_val(x)
175#define pte_flags(x) native_pte_flags(x)
176#define __pte(x) native_make_pte(x)
177
178#endif /* CONFIG_PARAVIRT */
179
180#define __pa(x) __phys_addr((unsigned long)(x)) 36#define __pa(x) __phys_addr((unsigned long)(x))
181#define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x)) 37#define __pa_nodebug(x) __phys_addr_nodebug((unsigned long)(x))
182/* __pa_symbol should be used for C visible symbols. 38/* __pa_symbol should be used for C visible symbols.
diff --git a/arch/x86/include/asm/page_32.h b/arch/x86/include/asm/page_32.h
index bcde0d7b4325..da4e762406f7 100644
--- a/arch/x86/include/asm/page_32.h
+++ b/arch/x86/include/asm/page_32.h
@@ -1,82 +1,14 @@
1#ifndef _ASM_X86_PAGE_32_H 1#ifndef _ASM_X86_PAGE_32_H
2#define _ASM_X86_PAGE_32_H 2#define _ASM_X86_PAGE_32_H
3 3
4/* 4#include <asm/page_32_types.h>
5 * This handles the memory map.
6 *
7 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
8 * a virtual address space of one gigabyte, which limits the
9 * amount of physical memory you can use to about 950MB.
10 *
11 * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
12 * and CONFIG_HIGHMEM64G options in the kernel configuration.
13 */
14#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
15
16#ifdef CONFIG_4KSTACKS
17#define THREAD_ORDER 0
18#else
19#define THREAD_ORDER 1
20#endif
21#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
22
23#define STACKFAULT_STACK 0
24#define DOUBLEFAULT_STACK 1
25#define NMI_STACK 0
26#define DEBUG_STACK 0
27#define MCE_STACK 0
28#define N_EXCEPTION_STACKS 1
29
30#ifdef CONFIG_X86_PAE
31/* 44=32+12, the limit we can fit into an unsigned long pfn */
32#define __PHYSICAL_MASK_SHIFT 44
33#define __VIRTUAL_MASK_SHIFT 32
34#define PAGETABLE_LEVELS 3
35
36#ifndef __ASSEMBLY__
37typedef u64 pteval_t;
38typedef u64 pmdval_t;
39typedef u64 pudval_t;
40typedef u64 pgdval_t;
41typedef u64 pgprotval_t;
42
43typedef union {
44 struct {
45 unsigned long pte_low, pte_high;
46 };
47 pteval_t pte;
48} pte_t;
49#endif /* __ASSEMBLY__
50 */
51#else /* !CONFIG_X86_PAE */
52#define __PHYSICAL_MASK_SHIFT 32
53#define __VIRTUAL_MASK_SHIFT 32
54#define PAGETABLE_LEVELS 2
55
56#ifndef __ASSEMBLY__
57typedef unsigned long pteval_t;
58typedef unsigned long pmdval_t;
59typedef unsigned long pudval_t;
60typedef unsigned long pgdval_t;
61typedef unsigned long pgprotval_t;
62
63typedef union {
64 pteval_t pte;
65 pteval_t pte_low;
66} pte_t;
67
68#endif /* __ASSEMBLY__ */
69#endif /* CONFIG_X86_PAE */
70 5
71#ifndef __ASSEMBLY__ 6#ifndef __ASSEMBLY__
72typedef struct page *pgtable_t;
73#endif
74 7
75#ifdef CONFIG_HUGETLB_PAGE 8#ifdef CONFIG_HUGETLB_PAGE
76#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA 9#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
77#endif 10#endif
78 11
79#ifndef __ASSEMBLY__
80#define __phys_addr_nodebug(x) ((x) - PAGE_OFFSET) 12#define __phys_addr_nodebug(x) ((x) - PAGE_OFFSET)
81#ifdef CONFIG_DEBUG_VIRTUAL 13#ifdef CONFIG_DEBUG_VIRTUAL
82extern unsigned long __phys_addr(unsigned long); 14extern unsigned long __phys_addr(unsigned long);
@@ -89,23 +21,6 @@ extern unsigned long __phys_addr(unsigned long);
89#define pfn_valid(pfn) ((pfn) < max_mapnr) 21#define pfn_valid(pfn) ((pfn) < max_mapnr)
90#endif /* CONFIG_FLATMEM */ 22#endif /* CONFIG_FLATMEM */
91 23
92extern int nx_enabled;
93
94/*
95 * This much address space is reserved for vmalloc() and iomap()
96 * as well as fixmap mappings.
97 */
98extern unsigned int __VMALLOC_RESERVE;
99extern int sysctl_legacy_va_layout;
100
101extern void find_low_pfn_range(void);
102extern unsigned long init_memory_mapping(unsigned long start,
103 unsigned long end);
104extern void initmem_init(unsigned long, unsigned long);
105extern void free_initmem(void);
106extern void setup_bootmem_allocator(void);
107
108
109#ifdef CONFIG_X86_USE_3DNOW 24#ifdef CONFIG_X86_USE_3DNOW
110#include <asm/mmx.h> 25#include <asm/mmx.h>
111 26
diff --git a/arch/x86/include/asm/page_32_types.h b/arch/x86/include/asm/page_32_types.h
new file mode 100644
index 000000000000..f1e4a79a6e41
--- /dev/null
+++ b/arch/x86/include/asm/page_32_types.h
@@ -0,0 +1,60 @@
1#ifndef _ASM_X86_PAGE_32_DEFS_H
2#define _ASM_X86_PAGE_32_DEFS_H
3
4#include <linux/const.h>
5
6/*
7 * This handles the memory map.
8 *
9 * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
10 * a virtual address space of one gigabyte, which limits the
11 * amount of physical memory you can use to about 950MB.
12 *
13 * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
14 * and CONFIG_HIGHMEM64G options in the kernel configuration.
15 */
16#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
17
18#ifdef CONFIG_4KSTACKS
19#define THREAD_ORDER 0
20#else
21#define THREAD_ORDER 1
22#endif
23#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
24
25#define STACKFAULT_STACK 0
26#define DOUBLEFAULT_STACK 1
27#define NMI_STACK 0
28#define DEBUG_STACK 0
29#define MCE_STACK 0
30#define N_EXCEPTION_STACKS 1
31
32#ifdef CONFIG_X86_PAE
33/* 44=32+12, the limit we can fit into an unsigned long pfn */
34#define __PHYSICAL_MASK_SHIFT 44
35#define __VIRTUAL_MASK_SHIFT 32
36
37#else /* !CONFIG_X86_PAE */
38#define __PHYSICAL_MASK_SHIFT 32
39#define __VIRTUAL_MASK_SHIFT 32
40#endif /* CONFIG_X86_PAE */
41
42#ifndef __ASSEMBLY__
43
44/*
45 * This much address space is reserved for vmalloc() and iomap()
46 * as well as fixmap mappings.
47 */
48extern unsigned int __VMALLOC_RESERVE;
49extern int sysctl_legacy_va_layout;
50
51extern void find_low_pfn_range(void);
52extern unsigned long init_memory_mapping(unsigned long start,
53 unsigned long end);
54extern void initmem_init(unsigned long, unsigned long);
55extern void free_initmem(void);
56extern void setup_bootmem_allocator(void);
57
58#endif /* !__ASSEMBLY__ */
59
60#endif /* _ASM_X86_PAGE_32_DEFS_H */
diff --git a/arch/x86/include/asm/page_64.h b/arch/x86/include/asm/page_64.h
index 5ebca29f44f0..072694ed81a5 100644
--- a/arch/x86/include/asm/page_64.h
+++ b/arch/x86/include/asm/page_64.h
@@ -1,105 +1,6 @@
1#ifndef _ASM_X86_PAGE_64_H 1#ifndef _ASM_X86_PAGE_64_H
2#define _ASM_X86_PAGE_64_H 2#define _ASM_X86_PAGE_64_H
3 3
4#define PAGETABLE_LEVELS 4 4#include <asm/page_64_types.h>
5
6#define THREAD_ORDER 1
7#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
8#define CURRENT_MASK (~(THREAD_SIZE - 1))
9
10#define EXCEPTION_STACK_ORDER 0
11#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
12
13#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
14#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
15
16#define IRQSTACK_ORDER 2
17#define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER)
18
19#define STACKFAULT_STACK 1
20#define DOUBLEFAULT_STACK 2
21#define NMI_STACK 3
22#define DEBUG_STACK 4
23#define MCE_STACK 5
24#define N_EXCEPTION_STACKS 5 /* hw limit: 7 */
25
26#define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
27#define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))
28
29/*
30 * Set __PAGE_OFFSET to the most negative possible address +
31 * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a
32 * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's
33 * what Xen requires.
34 */
35#define __PAGE_OFFSET _AC(0xffff880000000000, UL)
36
37#define __PHYSICAL_START CONFIG_PHYSICAL_START
38#define __KERNEL_ALIGN 0x200000
39
40/*
41 * Make sure kernel is aligned to 2MB address. Catching it at compile
42 * time is better. Change your config file and compile the kernel
43 * for a 2MB aligned address (CONFIG_PHYSICAL_START)
44 */
45#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
46#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
47#endif
48
49#define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START)
50#define __START_KERNEL_map _AC(0xffffffff80000000, UL)
51
52/* See Documentation/x86_64/mm.txt for a description of the memory map. */
53#define __PHYSICAL_MASK_SHIFT 46
54#define __VIRTUAL_MASK_SHIFT 48
55
56/*
57 * Kernel image size is limited to 512 MB (see level2_kernel_pgt in
58 * arch/x86/kernel/head_64.S), and it is mapped here:
59 */
60#define KERNEL_IMAGE_SIZE (512 * 1024 * 1024)
61#define KERNEL_IMAGE_START _AC(0xffffffff80000000, UL)
62
63#ifndef __ASSEMBLY__
64void clear_page(void *page);
65void copy_page(void *to, void *from);
66
67/* duplicated to the one in bootmem.h */
68extern unsigned long max_pfn;
69extern unsigned long phys_base;
70
71extern unsigned long __phys_addr(unsigned long);
72#define __phys_reloc_hide(x) (x)
73
74/*
75 * These are used to make use of C type-checking..
76 */
77typedef unsigned long pteval_t;
78typedef unsigned long pmdval_t;
79typedef unsigned long pudval_t;
80typedef unsigned long pgdval_t;
81typedef unsigned long pgprotval_t;
82
83typedef struct page *pgtable_t;
84
85typedef struct { pteval_t pte; } pte_t;
86
87#define vmemmap ((struct page *)VMEMMAP_START)
88
89extern unsigned long init_memory_mapping(unsigned long start,
90 unsigned long end);
91
92extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
93extern void free_initmem(void);
94
95extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
96extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
97
98#endif /* !__ASSEMBLY__ */
99
100#ifdef CONFIG_FLATMEM
101#define pfn_valid(pfn) ((pfn) < max_pfn)
102#endif
103
104 5
105#endif /* _ASM_X86_PAGE_64_H */ 6#endif /* _ASM_X86_PAGE_64_H */
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h
new file mode 100644
index 000000000000..d38c91b70248
--- /dev/null
+++ b/arch/x86/include/asm/page_64_types.h
@@ -0,0 +1,89 @@
1#ifndef _ASM_X86_PAGE_64_DEFS_H
2#define _ASM_X86_PAGE_64_DEFS_H
3
4#define THREAD_ORDER 1
5#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
6#define CURRENT_MASK (~(THREAD_SIZE - 1))
7
8#define EXCEPTION_STACK_ORDER 0
9#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
10
11#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
12#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
13
14#define IRQ_STACK_ORDER 2
15#define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER)
16
17#define STACKFAULT_STACK 1
18#define DOUBLEFAULT_STACK 2
19#define NMI_STACK 3
20#define DEBUG_STACK 4
21#define MCE_STACK 5
22#define N_EXCEPTION_STACKS 5 /* hw limit: 7 */
23
24#define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
25#define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))
26
27/*
28 * Set __PAGE_OFFSET to the most negative possible address +
29 * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a
30 * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's
31 * what Xen requires.
32 */
33#define __PAGE_OFFSET _AC(0xffff880000000000, UL)
34
35#define __PHYSICAL_START CONFIG_PHYSICAL_START
36#define __KERNEL_ALIGN 0x200000
37
38/*
39 * Make sure kernel is aligned to 2MB address. Catching it at compile
40 * time is better. Change your config file and compile the kernel
41 * for a 2MB aligned address (CONFIG_PHYSICAL_START)
42 */
43#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
44#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
45#endif
46
47#define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START)
48#define __START_KERNEL_map _AC(0xffffffff80000000, UL)
49
50/* See Documentation/x86_64/mm.txt for a description of the memory map. */
51#define __PHYSICAL_MASK_SHIFT 46
52#define __VIRTUAL_MASK_SHIFT 48
53
54/*
55 * Kernel image size is limited to 512 MB (see level2_kernel_pgt in
56 * arch/x86/kernel/head_64.S), and it is mapped here:
57 */
58#define KERNEL_IMAGE_SIZE (512 * 1024 * 1024)
59#define KERNEL_IMAGE_START _AC(0xffffffff80000000, UL)
60
61#ifndef __ASSEMBLY__
62void clear_page(void *page);
63void copy_page(void *to, void *from);
64
65/* duplicated to the one in bootmem.h */
66extern unsigned long max_pfn;
67extern unsigned long phys_base;
68
69extern unsigned long __phys_addr(unsigned long);
70#define __phys_reloc_hide(x) (x)
71
72#define vmemmap ((struct page *)VMEMMAP_START)
73
74extern unsigned long init_memory_mapping(unsigned long start,
75 unsigned long end);
76
77extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
78extern void free_initmem(void);
79
80extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
81extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
82
83#endif /* !__ASSEMBLY__ */
84
85#ifdef CONFIG_FLATMEM
86#define pfn_valid(pfn) ((pfn) < max_pfn)
87#endif
88
89#endif /* _ASM_X86_PAGE_64_DEFS_H */
diff --git a/arch/x86/include/asm/page_types.h b/arch/x86/include/asm/page_types.h
new file mode 100644
index 000000000000..2d625da6603c
--- /dev/null
+++ b/arch/x86/include/asm/page_types.h
@@ -0,0 +1,57 @@
1#ifndef _ASM_X86_PAGE_DEFS_H
2#define _ASM_X86_PAGE_DEFS_H
3
4#include <linux/const.h>
5
6/* PAGE_SHIFT determines the page size */
7#define PAGE_SHIFT 12
8#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
9#define PAGE_MASK (~(PAGE_SIZE-1))
10
11#define __PHYSICAL_MASK ((phys_addr_t)(1ULL << __PHYSICAL_MASK_SHIFT) - 1)
12#define __VIRTUAL_MASK ((1UL << __VIRTUAL_MASK_SHIFT) - 1)
13
14/* Cast PAGE_MASK to a signed type so that it is sign-extended if
15 virtual addresses are 32-bits but physical addresses are larger
16 (ie, 32-bit PAE). */
17#define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK)
18
19#define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
20#define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1))
21
22#define HPAGE_SHIFT PMD_SHIFT
23#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
24#define HPAGE_MASK (~(HPAGE_SIZE - 1))
25#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
26
27#define HUGE_MAX_HSTATE 2
28
29#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
30
31#define VM_DATA_DEFAULT_FLAGS \
32 (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
33 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
34
35#ifdef CONFIG_X86_64
36#include <asm/page_64_types.h>
37#else
38#include <asm/page_32_types.h>
39#endif /* CONFIG_X86_64 */
40
41#ifndef __ASSEMBLY__
42
43struct pgprot;
44
45extern int page_is_ram(unsigned long pagenr);
46extern int devmem_is_allowed(unsigned long pagenr);
47extern void map_devmem(unsigned long pfn, unsigned long size,
48 struct pgprot vma_prot);
49extern void unmap_devmem(unsigned long pfn, unsigned long size,
50 struct pgprot vma_prot);
51
52extern unsigned long max_low_pfn_mapped;
53extern unsigned long max_pfn_mapped;
54
55#endif /* !__ASSEMBLY__ */
56
57#endif /* _ASM_X86_PAGE_DEFS_H */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index e299287e8e33..0617d5cc9712 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -4,7 +4,7 @@
4 * para-virtualization: those hooks are defined here. */ 4 * para-virtualization: those hooks are defined here. */
5 5
6#ifdef CONFIG_PARAVIRT 6#ifdef CONFIG_PARAVIRT
7#include <asm/page.h> 7#include <asm/pgtable_types.h>
8#include <asm/asm.h> 8#include <asm/asm.h>
9 9
10/* Bitmask of what can be clobbered: usually at least eax. */ 10/* Bitmask of what can be clobbered: usually at least eax. */
@@ -12,21 +12,38 @@
12#define CLBR_EAX (1 << 0) 12#define CLBR_EAX (1 << 0)
13#define CLBR_ECX (1 << 1) 13#define CLBR_ECX (1 << 1)
14#define CLBR_EDX (1 << 2) 14#define CLBR_EDX (1 << 2)
15#define CLBR_EDI (1 << 3)
15 16
16#ifdef CONFIG_X86_64 17#ifdef CONFIG_X86_32
17#define CLBR_RSI (1 << 3) 18/* CLBR_ANY should match all regs platform has. For i386, that's just it */
18#define CLBR_RDI (1 << 4) 19#define CLBR_ANY ((1 << 4) - 1)
20
21#define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
22#define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
23#define CLBR_SCRATCH (0)
24#else
25#define CLBR_RAX CLBR_EAX
26#define CLBR_RCX CLBR_ECX
27#define CLBR_RDX CLBR_EDX
28#define CLBR_RDI CLBR_EDI
29#define CLBR_RSI (1 << 4)
19#define CLBR_R8 (1 << 5) 30#define CLBR_R8 (1 << 5)
20#define CLBR_R9 (1 << 6) 31#define CLBR_R9 (1 << 6)
21#define CLBR_R10 (1 << 7) 32#define CLBR_R10 (1 << 7)
22#define CLBR_R11 (1 << 8) 33#define CLBR_R11 (1 << 8)
34
23#define CLBR_ANY ((1 << 9) - 1) 35#define CLBR_ANY ((1 << 9) - 1)
36
37#define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
38 CLBR_RCX | CLBR_R8 | CLBR_R9)
39#define CLBR_RET_REG (CLBR_RAX)
40#define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
41
24#include <asm/desc_defs.h> 42#include <asm/desc_defs.h>
25#else
26/* CLBR_ANY should match all regs platform has. For i386, that's just it */
27#define CLBR_ANY ((1 << 3) - 1)
28#endif /* X86_64 */ 43#endif /* X86_64 */
29 44
45#define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
46
30#ifndef __ASSEMBLY__ 47#ifndef __ASSEMBLY__
31#include <linux/types.h> 48#include <linux/types.h>
32#include <linux/cpumask.h> 49#include <linux/cpumask.h>
@@ -40,6 +57,14 @@ struct tss_struct;
40struct mm_struct; 57struct mm_struct;
41struct desc_struct; 58struct desc_struct;
42 59
60/*
61 * Wrapper type for pointers to code which uses the non-standard
62 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
63 */
64struct paravirt_callee_save {
65 void *func;
66};
67
43/* general info */ 68/* general info */
44struct pv_info { 69struct pv_info {
45 unsigned int kernel_rpl; 70 unsigned int kernel_rpl;
@@ -189,11 +214,15 @@ struct pv_irq_ops {
189 * expected to use X86_EFLAGS_IF; all other bits 214 * expected to use X86_EFLAGS_IF; all other bits
190 * returned from save_fl are undefined, and may be ignored by 215 * returned from save_fl are undefined, and may be ignored by
191 * restore_fl. 216 * restore_fl.
217 *
218 * NOTE: These functions callers expect the callee to preserve
219 * more registers than the standard C calling convention.
192 */ 220 */
193 unsigned long (*save_fl)(void); 221 struct paravirt_callee_save save_fl;
194 void (*restore_fl)(unsigned long); 222 struct paravirt_callee_save restore_fl;
195 void (*irq_disable)(void); 223 struct paravirt_callee_save irq_disable;
196 void (*irq_enable)(void); 224 struct paravirt_callee_save irq_enable;
225
197 void (*safe_halt)(void); 226 void (*safe_halt)(void);
198 void (*halt)(void); 227 void (*halt)(void);
199 228
@@ -244,7 +273,8 @@ struct pv_mmu_ops {
244 void (*flush_tlb_user)(void); 273 void (*flush_tlb_user)(void);
245 void (*flush_tlb_kernel)(void); 274 void (*flush_tlb_kernel)(void);
246 void (*flush_tlb_single)(unsigned long addr); 275 void (*flush_tlb_single)(unsigned long addr);
247 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm, 276 void (*flush_tlb_others)(const struct cpumask *cpus,
277 struct mm_struct *mm,
248 unsigned long va); 278 unsigned long va);
249 279
250 /* Hooks for allocating and freeing a pagetable top-level */ 280 /* Hooks for allocating and freeing a pagetable top-level */
@@ -278,12 +308,11 @@ struct pv_mmu_ops {
278 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr, 308 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
279 pte_t *ptep, pte_t pte); 309 pte_t *ptep, pte_t pte);
280 310
281 pteval_t (*pte_val)(pte_t); 311 struct paravirt_callee_save pte_val;
282 pteval_t (*pte_flags)(pte_t); 312 struct paravirt_callee_save make_pte;
283 pte_t (*make_pte)(pteval_t pte);
284 313
285 pgdval_t (*pgd_val)(pgd_t); 314 struct paravirt_callee_save pgd_val;
286 pgd_t (*make_pgd)(pgdval_t pgd); 315 struct paravirt_callee_save make_pgd;
287 316
288#if PAGETABLE_LEVELS >= 3 317#if PAGETABLE_LEVELS >= 3
289#ifdef CONFIG_X86_PAE 318#ifdef CONFIG_X86_PAE
@@ -298,12 +327,12 @@ struct pv_mmu_ops {
298 327
299 void (*set_pud)(pud_t *pudp, pud_t pudval); 328 void (*set_pud)(pud_t *pudp, pud_t pudval);
300 329
301 pmdval_t (*pmd_val)(pmd_t); 330 struct paravirt_callee_save pmd_val;
302 pmd_t (*make_pmd)(pmdval_t pmd); 331 struct paravirt_callee_save make_pmd;
303 332
304#if PAGETABLE_LEVELS == 4 333#if PAGETABLE_LEVELS == 4
305 pudval_t (*pud_val)(pud_t); 334 struct paravirt_callee_save pud_val;
306 pud_t (*make_pud)(pudval_t pud); 335 struct paravirt_callee_save make_pud;
307 336
308 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval); 337 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
309#endif /* PAGETABLE_LEVELS == 4 */ 338#endif /* PAGETABLE_LEVELS == 4 */
@@ -388,6 +417,8 @@ extern struct pv_lock_ops pv_lock_ops;
388 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":") 417 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
389 418
390unsigned paravirt_patch_nop(void); 419unsigned paravirt_patch_nop(void);
420unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
421unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
391unsigned paravirt_patch_ignore(unsigned len); 422unsigned paravirt_patch_ignore(unsigned len);
392unsigned paravirt_patch_call(void *insnbuf, 423unsigned paravirt_patch_call(void *insnbuf,
393 const void *target, u16 tgt_clobbers, 424 const void *target, u16 tgt_clobbers,
@@ -479,25 +510,45 @@ int paravirt_disable_iospace(void);
479 * makes sure the incoming and outgoing types are always correct. 510 * makes sure the incoming and outgoing types are always correct.
480 */ 511 */
481#ifdef CONFIG_X86_32 512#ifdef CONFIG_X86_32
482#define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx 513#define PVOP_VCALL_ARGS \
514 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
483#define PVOP_CALL_ARGS PVOP_VCALL_ARGS 515#define PVOP_CALL_ARGS PVOP_VCALL_ARGS
516
517#define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
518#define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
519#define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
520
484#define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ 521#define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
485 "=c" (__ecx) 522 "=c" (__ecx)
486#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS 523#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
524
525#define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
526#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
527
487#define EXTRA_CLOBBERS 528#define EXTRA_CLOBBERS
488#define VEXTRA_CLOBBERS 529#define VEXTRA_CLOBBERS
489#else 530#else /* CONFIG_X86_64 */
490#define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx 531#define PVOP_VCALL_ARGS \
532 unsigned long __edi = __edi, __esi = __esi, \
533 __edx = __edx, __ecx = __ecx
491#define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax 534#define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
535
536#define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
537#define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
538#define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
539#define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
540
492#define PVOP_VCALL_CLOBBERS "=D" (__edi), \ 541#define PVOP_VCALL_CLOBBERS "=D" (__edi), \
493 "=S" (__esi), "=d" (__edx), \ 542 "=S" (__esi), "=d" (__edx), \
494 "=c" (__ecx) 543 "=c" (__ecx)
495
496#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) 544#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
497 545
546#define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
547#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
548
498#define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" 549#define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
499#define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" 550#define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
500#endif 551#endif /* CONFIG_X86_32 */
501 552
502#ifdef CONFIG_PARAVIRT_DEBUG 553#ifdef CONFIG_PARAVIRT_DEBUG
503#define PVOP_TEST_NULL(op) BUG_ON(op == NULL) 554#define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
@@ -505,10 +556,11 @@ int paravirt_disable_iospace(void);
505#define PVOP_TEST_NULL(op) ((void)op) 556#define PVOP_TEST_NULL(op) ((void)op)
506#endif 557#endif
507 558
508#define __PVOP_CALL(rettype, op, pre, post, ...) \ 559#define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
560 pre, post, ...) \
509 ({ \ 561 ({ \
510 rettype __ret; \ 562 rettype __ret; \
511 PVOP_CALL_ARGS; \ 563 PVOP_CALL_ARGS; \
512 PVOP_TEST_NULL(op); \ 564 PVOP_TEST_NULL(op); \
513 /* This is 32-bit specific, but is okay in 64-bit */ \ 565 /* This is 32-bit specific, but is okay in 64-bit */ \
514 /* since this condition will never hold */ \ 566 /* since this condition will never hold */ \
@@ -516,70 +568,113 @@ int paravirt_disable_iospace(void);
516 asm volatile(pre \ 568 asm volatile(pre \
517 paravirt_alt(PARAVIRT_CALL) \ 569 paravirt_alt(PARAVIRT_CALL) \
518 post \ 570 post \
519 : PVOP_CALL_CLOBBERS \ 571 : call_clbr \
520 : paravirt_type(op), \ 572 : paravirt_type(op), \
521 paravirt_clobber(CLBR_ANY), \ 573 paravirt_clobber(clbr), \
522 ##__VA_ARGS__ \ 574 ##__VA_ARGS__ \
523 : "memory", "cc" EXTRA_CLOBBERS); \ 575 : "memory", "cc" extra_clbr); \
524 __ret = (rettype)((((u64)__edx) << 32) | __eax); \ 576 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
525 } else { \ 577 } else { \
526 asm volatile(pre \ 578 asm volatile(pre \
527 paravirt_alt(PARAVIRT_CALL) \ 579 paravirt_alt(PARAVIRT_CALL) \
528 post \ 580 post \
529 : PVOP_CALL_CLOBBERS \ 581 : call_clbr \
530 : paravirt_type(op), \ 582 : paravirt_type(op), \
531 paravirt_clobber(CLBR_ANY), \ 583 paravirt_clobber(clbr), \
532 ##__VA_ARGS__ \ 584 ##__VA_ARGS__ \
533 : "memory", "cc" EXTRA_CLOBBERS); \ 585 : "memory", "cc" extra_clbr); \
534 __ret = (rettype)__eax; \ 586 __ret = (rettype)__eax; \
535 } \ 587 } \
536 __ret; \ 588 __ret; \
537 }) 589 })
538#define __PVOP_VCALL(op, pre, post, ...) \ 590
591#define __PVOP_CALL(rettype, op, pre, post, ...) \
592 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
593 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
594
595#define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
596 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
597 PVOP_CALLEE_CLOBBERS, , \
598 pre, post, ##__VA_ARGS__)
599
600
601#define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
539 ({ \ 602 ({ \
540 PVOP_VCALL_ARGS; \ 603 PVOP_VCALL_ARGS; \
541 PVOP_TEST_NULL(op); \ 604 PVOP_TEST_NULL(op); \
542 asm volatile(pre \ 605 asm volatile(pre \
543 paravirt_alt(PARAVIRT_CALL) \ 606 paravirt_alt(PARAVIRT_CALL) \
544 post \ 607 post \
545 : PVOP_VCALL_CLOBBERS \ 608 : call_clbr \
546 : paravirt_type(op), \ 609 : paravirt_type(op), \
547 paravirt_clobber(CLBR_ANY), \ 610 paravirt_clobber(clbr), \
548 ##__VA_ARGS__ \ 611 ##__VA_ARGS__ \
549 : "memory", "cc" VEXTRA_CLOBBERS); \ 612 : "memory", "cc" extra_clbr); \
550 }) 613 })
551 614
615#define __PVOP_VCALL(op, pre, post, ...) \
616 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
617 VEXTRA_CLOBBERS, \
618 pre, post, ##__VA_ARGS__)
619
620#define __PVOP_VCALLEESAVE(rettype, op, pre, post, ...) \
621 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
622 PVOP_VCALLEE_CLOBBERS, , \
623 pre, post, ##__VA_ARGS__)
624
625
626
552#define PVOP_CALL0(rettype, op) \ 627#define PVOP_CALL0(rettype, op) \
553 __PVOP_CALL(rettype, op, "", "") 628 __PVOP_CALL(rettype, op, "", "")
554#define PVOP_VCALL0(op) \ 629#define PVOP_VCALL0(op) \
555 __PVOP_VCALL(op, "", "") 630 __PVOP_VCALL(op, "", "")
556 631
632#define PVOP_CALLEE0(rettype, op) \
633 __PVOP_CALLEESAVE(rettype, op, "", "")
634#define PVOP_VCALLEE0(op) \
635 __PVOP_VCALLEESAVE(op, "", "")
636
637
557#define PVOP_CALL1(rettype, op, arg1) \ 638#define PVOP_CALL1(rettype, op, arg1) \
558 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1))) 639 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
559#define PVOP_VCALL1(op, arg1) \ 640#define PVOP_VCALL1(op, arg1) \
560 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1))) 641 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
642
643#define PVOP_CALLEE1(rettype, op, arg1) \
644 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
645#define PVOP_VCALLEE1(op, arg1) \
646 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
647
561 648
562#define PVOP_CALL2(rettype, op, arg1, arg2) \ 649#define PVOP_CALL2(rettype, op, arg1, arg2) \
563 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ 650 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
564 "1" ((unsigned long)(arg2))) 651 PVOP_CALL_ARG2(arg2))
565#define PVOP_VCALL2(op, arg1, arg2) \ 652#define PVOP_VCALL2(op, arg1, arg2) \
566 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ 653 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
567 "1" ((unsigned long)(arg2))) 654 PVOP_CALL_ARG2(arg2))
655
656#define PVOP_CALLEE2(rettype, op, arg1, arg2) \
657 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
658 PVOP_CALL_ARG2(arg2))
659#define PVOP_VCALLEE2(op, arg1, arg2) \
660 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
661 PVOP_CALL_ARG2(arg2))
662
568 663
569#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ 664#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
570 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ 665 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
571 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3))) 666 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
572#define PVOP_VCALL3(op, arg1, arg2, arg3) \ 667#define PVOP_VCALL3(op, arg1, arg2, arg3) \
573 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ 668 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
574 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3))) 669 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
575 670
576/* This is the only difference in x86_64. We can make it much simpler */ 671/* This is the only difference in x86_64. We can make it much simpler */
577#ifdef CONFIG_X86_32 672#ifdef CONFIG_X86_32
578#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 673#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
579 __PVOP_CALL(rettype, op, \ 674 __PVOP_CALL(rettype, op, \
580 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 675 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
581 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ 676 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
582 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) 677 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
583#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 678#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
584 __PVOP_VCALL(op, \ 679 __PVOP_VCALL(op, \
585 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 680 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
@@ -587,13 +682,13 @@ int paravirt_disable_iospace(void);
587 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) 682 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
588#else 683#else
589#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 684#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
590 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ 685 __PVOP_CALL(rettype, op, "", "", \
591 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \ 686 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
592 "3"((unsigned long)(arg4))) 687 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
593#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 688#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
594 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ 689 __PVOP_VCALL(op, "", "", \
595 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \ 690 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
596 "3"((unsigned long)(arg4))) 691 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
597#endif 692#endif
598 693
599static inline int paravirt_enabled(void) 694static inline int paravirt_enabled(void)
@@ -984,10 +1079,11 @@ static inline void __flush_tlb_single(unsigned long addr)
984 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr); 1079 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
985} 1080}
986 1081
987static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, 1082static inline void flush_tlb_others(const struct cpumask *cpumask,
1083 struct mm_struct *mm,
988 unsigned long va) 1084 unsigned long va)
989{ 1085{
990 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va); 1086 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
991} 1087}
992 1088
993static inline int paravirt_pgd_alloc(struct mm_struct *mm) 1089static inline int paravirt_pgd_alloc(struct mm_struct *mm)
@@ -1059,13 +1155,13 @@ static inline pte_t __pte(pteval_t val)
1059 pteval_t ret; 1155 pteval_t ret;
1060 1156
1061 if (sizeof(pteval_t) > sizeof(long)) 1157 if (sizeof(pteval_t) > sizeof(long))
1062 ret = PVOP_CALL2(pteval_t, 1158 ret = PVOP_CALLEE2(pteval_t,
1063 pv_mmu_ops.make_pte, 1159 pv_mmu_ops.make_pte,
1064 val, (u64)val >> 32); 1160 val, (u64)val >> 32);
1065 else 1161 else
1066 ret = PVOP_CALL1(pteval_t, 1162 ret = PVOP_CALLEE1(pteval_t,
1067 pv_mmu_ops.make_pte, 1163 pv_mmu_ops.make_pte,
1068 val); 1164 val);
1069 1165
1070 return (pte_t) { .pte = ret }; 1166 return (pte_t) { .pte = ret };
1071} 1167}
@@ -1075,29 +1171,12 @@ static inline pteval_t pte_val(pte_t pte)
1075 pteval_t ret; 1171 pteval_t ret;
1076 1172
1077 if (sizeof(pteval_t) > sizeof(long)) 1173 if (sizeof(pteval_t) > sizeof(long))
1078 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val, 1174 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
1079 pte.pte, (u64)pte.pte >> 32); 1175 pte.pte, (u64)pte.pte >> 32);
1080 else
1081 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1082 pte.pte);
1083
1084 return ret;
1085}
1086
1087static inline pteval_t pte_flags(pte_t pte)
1088{
1089 pteval_t ret;
1090
1091 if (sizeof(pteval_t) > sizeof(long))
1092 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1093 pte.pte, (u64)pte.pte >> 32);
1094 else 1176 else
1095 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags, 1177 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
1096 pte.pte); 1178 pte.pte);
1097 1179
1098#ifdef CONFIG_PARAVIRT_DEBUG
1099 BUG_ON(ret & PTE_PFN_MASK);
1100#endif
1101 return ret; 1180 return ret;
1102} 1181}
1103 1182
@@ -1106,11 +1185,11 @@ static inline pgd_t __pgd(pgdval_t val)
1106 pgdval_t ret; 1185 pgdval_t ret;
1107 1186
1108 if (sizeof(pgdval_t) > sizeof(long)) 1187 if (sizeof(pgdval_t) > sizeof(long))
1109 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd, 1188 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
1110 val, (u64)val >> 32); 1189 val, (u64)val >> 32);
1111 else 1190 else
1112 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd, 1191 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
1113 val); 1192 val);
1114 1193
1115 return (pgd_t) { ret }; 1194 return (pgd_t) { ret };
1116} 1195}
@@ -1120,11 +1199,11 @@ static inline pgdval_t pgd_val(pgd_t pgd)
1120 pgdval_t ret; 1199 pgdval_t ret;
1121 1200
1122 if (sizeof(pgdval_t) > sizeof(long)) 1201 if (sizeof(pgdval_t) > sizeof(long))
1123 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val, 1202 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
1124 pgd.pgd, (u64)pgd.pgd >> 32); 1203 pgd.pgd, (u64)pgd.pgd >> 32);
1125 else 1204 else
1126 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val, 1205 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
1127 pgd.pgd); 1206 pgd.pgd);
1128 1207
1129 return ret; 1208 return ret;
1130} 1209}
@@ -1188,11 +1267,11 @@ static inline pmd_t __pmd(pmdval_t val)
1188 pmdval_t ret; 1267 pmdval_t ret;
1189 1268
1190 if (sizeof(pmdval_t) > sizeof(long)) 1269 if (sizeof(pmdval_t) > sizeof(long))
1191 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd, 1270 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
1192 val, (u64)val >> 32); 1271 val, (u64)val >> 32);
1193 else 1272 else
1194 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd, 1273 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
1195 val); 1274 val);
1196 1275
1197 return (pmd_t) { ret }; 1276 return (pmd_t) { ret };
1198} 1277}
@@ -1202,11 +1281,11 @@ static inline pmdval_t pmd_val(pmd_t pmd)
1202 pmdval_t ret; 1281 pmdval_t ret;
1203 1282
1204 if (sizeof(pmdval_t) > sizeof(long)) 1283 if (sizeof(pmdval_t) > sizeof(long))
1205 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val, 1284 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
1206 pmd.pmd, (u64)pmd.pmd >> 32); 1285 pmd.pmd, (u64)pmd.pmd >> 32);
1207 else 1286 else
1208 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val, 1287 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
1209 pmd.pmd); 1288 pmd.pmd);
1210 1289
1211 return ret; 1290 return ret;
1212} 1291}
@@ -1228,11 +1307,11 @@ static inline pud_t __pud(pudval_t val)
1228 pudval_t ret; 1307 pudval_t ret;
1229 1308
1230 if (sizeof(pudval_t) > sizeof(long)) 1309 if (sizeof(pudval_t) > sizeof(long))
1231 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud, 1310 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
1232 val, (u64)val >> 32); 1311 val, (u64)val >> 32);
1233 else 1312 else
1234 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud, 1313 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
1235 val); 1314 val);
1236 1315
1237 return (pud_t) { ret }; 1316 return (pud_t) { ret };
1238} 1317}
@@ -1242,11 +1321,11 @@ static inline pudval_t pud_val(pud_t pud)
1242 pudval_t ret; 1321 pudval_t ret;
1243 1322
1244 if (sizeof(pudval_t) > sizeof(long)) 1323 if (sizeof(pudval_t) > sizeof(long))
1245 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val, 1324 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
1246 pud.pud, (u64)pud.pud >> 32); 1325 pud.pud, (u64)pud.pud >> 32);
1247 else 1326 else
1248 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val, 1327 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
1249 pud.pud); 1328 pud.pud);
1250 1329
1251 return ret; 1330 return ret;
1252} 1331}
@@ -1374,9 +1453,10 @@ static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1374} 1453}
1375 1454
1376void _paravirt_nop(void); 1455void _paravirt_nop(void);
1377#define paravirt_nop ((void *)_paravirt_nop) 1456u32 _paravirt_ident_32(u32);
1457u64 _paravirt_ident_64(u64);
1378 1458
1379void paravirt_use_bytelocks(void); 1459#define paravirt_nop ((void *)_paravirt_nop)
1380 1460
1381#ifdef CONFIG_SMP 1461#ifdef CONFIG_SMP
1382 1462
@@ -1426,12 +1506,37 @@ extern struct paravirt_patch_site __parainstructions[],
1426 __parainstructions_end[]; 1506 __parainstructions_end[];
1427 1507
1428#ifdef CONFIG_X86_32 1508#ifdef CONFIG_X86_32
1429#define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;" 1509#define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
1430#define PV_RESTORE_REGS "popl %%edx; popl %%ecx" 1510#define PV_RESTORE_REGS "popl %edx; popl %ecx;"
1511
1512/* save and restore all caller-save registers, except return value */
1513#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
1514#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
1515
1431#define PV_FLAGS_ARG "0" 1516#define PV_FLAGS_ARG "0"
1432#define PV_EXTRA_CLOBBERS 1517#define PV_EXTRA_CLOBBERS
1433#define PV_VEXTRA_CLOBBERS 1518#define PV_VEXTRA_CLOBBERS
1434#else 1519#else
1520/* save and restore all caller-save registers, except return value */
1521#define PV_SAVE_ALL_CALLER_REGS \
1522 "push %rcx;" \
1523 "push %rdx;" \
1524 "push %rsi;" \
1525 "push %rdi;" \
1526 "push %r8;" \
1527 "push %r9;" \
1528 "push %r10;" \
1529 "push %r11;"
1530#define PV_RESTORE_ALL_CALLER_REGS \
1531 "pop %r11;" \
1532 "pop %r10;" \
1533 "pop %r9;" \
1534 "pop %r8;" \
1535 "pop %rdi;" \
1536 "pop %rsi;" \
1537 "pop %rdx;" \
1538 "pop %rcx;"
1539
1435/* We save some registers, but all of them, that's too much. We clobber all 1540/* We save some registers, but all of them, that's too much. We clobber all
1436 * caller saved registers but the argument parameter */ 1541 * caller saved registers but the argument parameter */
1437#define PV_SAVE_REGS "pushq %%rdi;" 1542#define PV_SAVE_REGS "pushq %%rdi;"
@@ -1441,52 +1546,76 @@ extern struct paravirt_patch_site __parainstructions[],
1441#define PV_FLAGS_ARG "D" 1546#define PV_FLAGS_ARG "D"
1442#endif 1547#endif
1443 1548
1549/*
1550 * Generate a thunk around a function which saves all caller-save
1551 * registers except for the return value. This allows C functions to
1552 * be called from assembler code where fewer than normal registers are
1553 * available. It may also help code generation around calls from C
1554 * code if the common case doesn't use many registers.
1555 *
1556 * When a callee is wrapped in a thunk, the caller can assume that all
1557 * arg regs and all scratch registers are preserved across the
1558 * call. The return value in rax/eax will not be saved, even for void
1559 * functions.
1560 */
1561#define PV_CALLEE_SAVE_REGS_THUNK(func) \
1562 extern typeof(func) __raw_callee_save_##func; \
1563 static void *__##func##__ __used = func; \
1564 \
1565 asm(".pushsection .text;" \
1566 "__raw_callee_save_" #func ": " \
1567 PV_SAVE_ALL_CALLER_REGS \
1568 "call " #func ";" \
1569 PV_RESTORE_ALL_CALLER_REGS \
1570 "ret;" \
1571 ".popsection")
1572
1573/* Get a reference to a callee-save function */
1574#define PV_CALLEE_SAVE(func) \
1575 ((struct paravirt_callee_save) { __raw_callee_save_##func })
1576
1577/* Promise that "func" already uses the right calling convention */
1578#define __PV_IS_CALLEE_SAVE(func) \
1579 ((struct paravirt_callee_save) { func })
1580
1444static inline unsigned long __raw_local_save_flags(void) 1581static inline unsigned long __raw_local_save_flags(void)
1445{ 1582{
1446 unsigned long f; 1583 unsigned long f;
1447 1584
1448 asm volatile(paravirt_alt(PV_SAVE_REGS 1585 asm volatile(paravirt_alt(PARAVIRT_CALL)
1449 PARAVIRT_CALL
1450 PV_RESTORE_REGS)
1451 : "=a"(f) 1586 : "=a"(f)
1452 : paravirt_type(pv_irq_ops.save_fl), 1587 : paravirt_type(pv_irq_ops.save_fl),
1453 paravirt_clobber(CLBR_EAX) 1588 paravirt_clobber(CLBR_EAX)
1454 : "memory", "cc" PV_VEXTRA_CLOBBERS); 1589 : "memory", "cc");
1455 return f; 1590 return f;
1456} 1591}
1457 1592
1458static inline void raw_local_irq_restore(unsigned long f) 1593static inline void raw_local_irq_restore(unsigned long f)
1459{ 1594{
1460 asm volatile(paravirt_alt(PV_SAVE_REGS 1595 asm volatile(paravirt_alt(PARAVIRT_CALL)
1461 PARAVIRT_CALL
1462 PV_RESTORE_REGS)
1463 : "=a"(f) 1596 : "=a"(f)
1464 : PV_FLAGS_ARG(f), 1597 : PV_FLAGS_ARG(f),
1465 paravirt_type(pv_irq_ops.restore_fl), 1598 paravirt_type(pv_irq_ops.restore_fl),
1466 paravirt_clobber(CLBR_EAX) 1599 paravirt_clobber(CLBR_EAX)
1467 : "memory", "cc" PV_EXTRA_CLOBBERS); 1600 : "memory", "cc");
1468} 1601}
1469 1602
1470static inline void raw_local_irq_disable(void) 1603static inline void raw_local_irq_disable(void)
1471{ 1604{
1472 asm volatile(paravirt_alt(PV_SAVE_REGS 1605 asm volatile(paravirt_alt(PARAVIRT_CALL)
1473 PARAVIRT_CALL
1474 PV_RESTORE_REGS)
1475 : 1606 :
1476 : paravirt_type(pv_irq_ops.irq_disable), 1607 : paravirt_type(pv_irq_ops.irq_disable),
1477 paravirt_clobber(CLBR_EAX) 1608 paravirt_clobber(CLBR_EAX)
1478 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS); 1609 : "memory", "eax", "cc");
1479} 1610}
1480 1611
1481static inline void raw_local_irq_enable(void) 1612static inline void raw_local_irq_enable(void)
1482{ 1613{
1483 asm volatile(paravirt_alt(PV_SAVE_REGS 1614 asm volatile(paravirt_alt(PARAVIRT_CALL)
1484 PARAVIRT_CALL
1485 PV_RESTORE_REGS)
1486 : 1615 :
1487 : paravirt_type(pv_irq_ops.irq_enable), 1616 : paravirt_type(pv_irq_ops.irq_enable),
1488 paravirt_clobber(CLBR_EAX) 1617 paravirt_clobber(CLBR_EAX)
1489 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS); 1618 : "memory", "eax", "cc");
1490} 1619}
1491 1620
1492static inline unsigned long __raw_local_irq_save(void) 1621static inline unsigned long __raw_local_irq_save(void)
@@ -1529,33 +1658,49 @@ static inline unsigned long __raw_local_irq_save(void)
1529 .popsection 1658 .popsection
1530 1659
1531 1660
1661#define COND_PUSH(set, mask, reg) \
1662 .if ((~(set)) & mask); push %reg; .endif
1663#define COND_POP(set, mask, reg) \
1664 .if ((~(set)) & mask); pop %reg; .endif
1665
1532#ifdef CONFIG_X86_64 1666#ifdef CONFIG_X86_64
1533#define PV_SAVE_REGS \ 1667
1534 push %rax; \ 1668#define PV_SAVE_REGS(set) \
1535 push %rcx; \ 1669 COND_PUSH(set, CLBR_RAX, rax); \
1536 push %rdx; \ 1670 COND_PUSH(set, CLBR_RCX, rcx); \
1537 push %rsi; \ 1671 COND_PUSH(set, CLBR_RDX, rdx); \
1538 push %rdi; \ 1672 COND_PUSH(set, CLBR_RSI, rsi); \
1539 push %r8; \ 1673 COND_PUSH(set, CLBR_RDI, rdi); \
1540 push %r9; \ 1674 COND_PUSH(set, CLBR_R8, r8); \
1541 push %r10; \ 1675 COND_PUSH(set, CLBR_R9, r9); \
1542 push %r11 1676 COND_PUSH(set, CLBR_R10, r10); \
1543#define PV_RESTORE_REGS \ 1677 COND_PUSH(set, CLBR_R11, r11)
1544 pop %r11; \ 1678#define PV_RESTORE_REGS(set) \
1545 pop %r10; \ 1679 COND_POP(set, CLBR_R11, r11); \
1546 pop %r9; \ 1680 COND_POP(set, CLBR_R10, r10); \
1547 pop %r8; \ 1681 COND_POP(set, CLBR_R9, r9); \
1548 pop %rdi; \ 1682 COND_POP(set, CLBR_R8, r8); \
1549 pop %rsi; \ 1683 COND_POP(set, CLBR_RDI, rdi); \
1550 pop %rdx; \ 1684 COND_POP(set, CLBR_RSI, rsi); \
1551 pop %rcx; \ 1685 COND_POP(set, CLBR_RDX, rdx); \
1552 pop %rax 1686 COND_POP(set, CLBR_RCX, rcx); \
1687 COND_POP(set, CLBR_RAX, rax)
1688
1553#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8) 1689#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1554#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8) 1690#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1555#define PARA_INDIRECT(addr) *addr(%rip) 1691#define PARA_INDIRECT(addr) *addr(%rip)
1556#else 1692#else
1557#define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx 1693#define PV_SAVE_REGS(set) \
1558#define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax 1694 COND_PUSH(set, CLBR_EAX, eax); \
1695 COND_PUSH(set, CLBR_EDI, edi); \
1696 COND_PUSH(set, CLBR_ECX, ecx); \
1697 COND_PUSH(set, CLBR_EDX, edx)
1698#define PV_RESTORE_REGS(set) \
1699 COND_POP(set, CLBR_EDX, edx); \
1700 COND_POP(set, CLBR_ECX, ecx); \
1701 COND_POP(set, CLBR_EDI, edi); \
1702 COND_POP(set, CLBR_EAX, eax)
1703
1559#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4) 1704#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1560#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4) 1705#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1561#define PARA_INDIRECT(addr) *%cs:addr 1706#define PARA_INDIRECT(addr) *%cs:addr
@@ -1567,15 +1712,15 @@ static inline unsigned long __raw_local_irq_save(void)
1567 1712
1568#define DISABLE_INTERRUPTS(clobbers) \ 1713#define DISABLE_INTERRUPTS(clobbers) \
1569 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \ 1714 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1570 PV_SAVE_REGS; \ 1715 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
1571 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \ 1716 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
1572 PV_RESTORE_REGS;) \ 1717 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
1573 1718
1574#define ENABLE_INTERRUPTS(clobbers) \ 1719#define ENABLE_INTERRUPTS(clobbers) \
1575 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \ 1720 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1576 PV_SAVE_REGS; \ 1721 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
1577 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \ 1722 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
1578 PV_RESTORE_REGS;) 1723 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
1579 1724
1580#define USERGS_SYSRET32 \ 1725#define USERGS_SYSRET32 \
1581 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \ 1726 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
@@ -1605,11 +1750,15 @@ static inline unsigned long __raw_local_irq_save(void)
1605 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \ 1750 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1606 swapgs) 1751 swapgs)
1607 1752
1753/*
1754 * Note: swapgs is very special, and in practise is either going to be
1755 * implemented with a single "swapgs" instruction or something very
1756 * special. Either way, we don't need to save any registers for
1757 * it.
1758 */
1608#define SWAPGS \ 1759#define SWAPGS \
1609 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \ 1760 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1610 PV_SAVE_REGS; \ 1761 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
1611 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \
1612 PV_RESTORE_REGS \
1613 ) 1762 )
1614 1763
1615#define GET_CR2_INTO_RCX \ 1764#define GET_CR2_INTO_RCX \
diff --git a/arch/x86/include/asm/pat.h b/arch/x86/include/asm/pat.h
index b8493b3b9890..b0e70056838e 100644
--- a/arch/x86/include/asm/pat.h
+++ b/arch/x86/include/asm/pat.h
@@ -5,10 +5,8 @@
5 5
6#ifdef CONFIG_X86_PAT 6#ifdef CONFIG_X86_PAT
7extern int pat_enabled; 7extern int pat_enabled;
8extern void validate_pat_support(struct cpuinfo_x86 *c);
9#else 8#else
10static const int pat_enabled; 9static const int pat_enabled;
11static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
12#endif 10#endif
13 11
14extern void pat_init(void); 12extern void pat_init(void);
@@ -17,6 +15,7 @@ extern int reserve_memtype(u64 start, u64 end,
17 unsigned long req_type, unsigned long *ret_type); 15 unsigned long req_type, unsigned long *ret_type);
18extern int free_memtype(u64 start, u64 end); 16extern int free_memtype(u64 start, u64 end);
19 17
20extern void pat_disable(char *reason); 18extern int kernel_map_sync_memtype(u64 base, unsigned long size,
19 unsigned long flag);
21 20
22#endif /* _ASM_X86_PAT_H */ 21#endif /* _ASM_X86_PAT_H */
diff --git a/arch/x86/include/asm/mach-default/pci-functions.h b/arch/x86/include/asm/pci-functions.h
index ed0bab427354..ed0bab427354 100644
--- a/arch/x86/include/asm/mach-default/pci-functions.h
+++ b/arch/x86/include/asm/pci-functions.h
diff --git a/arch/x86/include/asm/pda.h b/arch/x86/include/asm/pda.h
deleted file mode 100644
index 2fbfff88df37..000000000000
--- a/arch/x86/include/asm/pda.h
+++ /dev/null
@@ -1,137 +0,0 @@
1#ifndef _ASM_X86_PDA_H
2#define _ASM_X86_PDA_H
3
4#ifndef __ASSEMBLY__
5#include <linux/stddef.h>
6#include <linux/types.h>
7#include <linux/cache.h>
8#include <asm/page.h>
9
10/* Per processor datastructure. %gs points to it while the kernel runs */
11struct x8664_pda {
12 struct task_struct *pcurrent; /* 0 Current process */
13 unsigned long data_offset; /* 8 Per cpu data offset from linker
14 address */
15 unsigned long kernelstack; /* 16 top of kernel stack for current */
16 unsigned long oldrsp; /* 24 user rsp for system call */
17 int irqcount; /* 32 Irq nesting counter. Starts -1 */
18 unsigned int cpunumber; /* 36 Logical CPU number */
19#ifdef CONFIG_CC_STACKPROTECTOR
20 unsigned long stack_canary; /* 40 stack canary value */
21 /* gcc-ABI: this canary MUST be at
22 offset 40!!! */
23#endif
24 char *irqstackptr;
25 short nodenumber; /* number of current node (32k max) */
26 short in_bootmem; /* pda lives in bootmem */
27 unsigned int __softirq_pending;
28 unsigned int __nmi_count; /* number of NMI on this CPUs */
29 short mmu_state;
30 short isidle;
31 struct mm_struct *active_mm;
32 unsigned apic_timer_irqs;
33 unsigned irq0_irqs;
34 unsigned irq_resched_count;
35 unsigned irq_call_count;
36 unsigned irq_tlb_count;
37 unsigned irq_thermal_count;
38 unsigned irq_threshold_count;
39 unsigned irq_spurious_count;
40} ____cacheline_aligned_in_smp;
41
42extern struct x8664_pda **_cpu_pda;
43extern void pda_init(int);
44
45#define cpu_pda(i) (_cpu_pda[i])
46
47/*
48 * There is no fast way to get the base address of the PDA, all the accesses
49 * have to mention %fs/%gs. So it needs to be done this Torvaldian way.
50 */
51extern void __bad_pda_field(void) __attribute__((noreturn));
52
53/*
54 * proxy_pda doesn't actually exist, but tell gcc it is accessed for
55 * all PDA accesses so it gets read/write dependencies right.
56 */
57extern struct x8664_pda _proxy_pda;
58
59#define pda_offset(field) offsetof(struct x8664_pda, field)
60
61#define pda_to_op(op, field, val) \
62do { \
63 typedef typeof(_proxy_pda.field) T__; \
64 if (0) { T__ tmp__; tmp__ = (val); } /* type checking */ \
65 switch (sizeof(_proxy_pda.field)) { \
66 case 2: \
67 asm(op "w %1,%%gs:%c2" : \
68 "+m" (_proxy_pda.field) : \
69 "ri" ((T__)val), \
70 "i"(pda_offset(field))); \
71 break; \
72 case 4: \
73 asm(op "l %1,%%gs:%c2" : \
74 "+m" (_proxy_pda.field) : \
75 "ri" ((T__)val), \
76 "i" (pda_offset(field))); \
77 break; \
78 case 8: \
79 asm(op "q %1,%%gs:%c2": \
80 "+m" (_proxy_pda.field) : \
81 "ri" ((T__)val), \
82 "i"(pda_offset(field))); \
83 break; \
84 default: \
85 __bad_pda_field(); \
86 } \
87} while (0)
88
89#define pda_from_op(op, field) \
90({ \
91 typeof(_proxy_pda.field) ret__; \
92 switch (sizeof(_proxy_pda.field)) { \
93 case 2: \
94 asm(op "w %%gs:%c1,%0" : \
95 "=r" (ret__) : \
96 "i" (pda_offset(field)), \
97 "m" (_proxy_pda.field)); \
98 break; \
99 case 4: \
100 asm(op "l %%gs:%c1,%0": \
101 "=r" (ret__): \
102 "i" (pda_offset(field)), \
103 "m" (_proxy_pda.field)); \
104 break; \
105 case 8: \
106 asm(op "q %%gs:%c1,%0": \
107 "=r" (ret__) : \
108 "i" (pda_offset(field)), \
109 "m" (_proxy_pda.field)); \
110 break; \
111 default: \
112 __bad_pda_field(); \
113 } \
114 ret__; \
115})
116
117#define read_pda(field) pda_from_op("mov", field)
118#define write_pda(field, val) pda_to_op("mov", field, val)
119#define add_pda(field, val) pda_to_op("add", field, val)
120#define sub_pda(field, val) pda_to_op("sub", field, val)
121#define or_pda(field, val) pda_to_op("or", field, val)
122
123/* This is not atomic against other CPUs -- CPU preemption needs to be off */
124#define test_and_clear_bit_pda(bit, field) \
125({ \
126 int old__; \
127 asm volatile("btr %2,%%gs:%c3\n\tsbbl %0,%0" \
128 : "=r" (old__), "+m" (_proxy_pda.field) \
129 : "dIr" (bit), "i" (pda_offset(field)) : "memory");\
130 old__; \
131})
132
133#endif
134
135#define PDA_STACKOFFSET (5*8)
136
137#endif /* _ASM_X86_PDA_H */
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index ece72053ba63..aee103b26d01 100644
--- a/arch/x86/include/asm/percpu.h
+++ b/arch/x86/include/asm/percpu.h
@@ -2,53 +2,12 @@
2#define _ASM_X86_PERCPU_H 2#define _ASM_X86_PERCPU_H
3 3
4#ifdef CONFIG_X86_64 4#ifdef CONFIG_X86_64
5#include <linux/compiler.h> 5#define __percpu_seg gs
6 6#define __percpu_mov_op movq
7/* Same as asm-generic/percpu.h, except that we store the per cpu offset 7#else
8 in the PDA. Longer term the PDA and every per cpu variable 8#define __percpu_seg fs
9 should be just put into a single section and referenced directly 9#define __percpu_mov_op movl
10 from %gs */
11
12#ifdef CONFIG_SMP
13#include <asm/pda.h>
14
15#define __per_cpu_offset(cpu) (cpu_pda(cpu)->data_offset)
16#define __my_cpu_offset read_pda(data_offset)
17
18#define per_cpu_offset(x) (__per_cpu_offset(x))
19
20#endif 10#endif
21#include <asm-generic/percpu.h>
22
23DECLARE_PER_CPU(struct x8664_pda, pda);
24
25/*
26 * These are supposed to be implemented as a single instruction which
27 * operates on the per-cpu data base segment. x86-64 doesn't have
28 * that yet, so this is a fairly inefficient workaround for the
29 * meantime. The single instruction is atomic with respect to
30 * preemption and interrupts, so we need to explicitly disable
31 * interrupts here to achieve the same effect. However, because it
32 * can be used from within interrupt-disable/enable, we can't actually
33 * disable interrupts; disabling preemption is enough.
34 */
35#define x86_read_percpu(var) \
36 ({ \
37 typeof(per_cpu_var(var)) __tmp; \
38 preempt_disable(); \
39 __tmp = __get_cpu_var(var); \
40 preempt_enable(); \
41 __tmp; \
42 })
43
44#define x86_write_percpu(var, val) \
45 do { \
46 preempt_disable(); \
47 __get_cpu_var(var) = (val); \
48 preempt_enable(); \
49 } while(0)
50
51#else /* CONFIG_X86_64 */
52 11
53#ifdef __ASSEMBLY__ 12#ifdef __ASSEMBLY__
54 13
@@ -65,47 +24,48 @@ DECLARE_PER_CPU(struct x8664_pda, pda);
65 * PER_CPU(cpu_gdt_descr, %ebx) 24 * PER_CPU(cpu_gdt_descr, %ebx)
66 */ 25 */
67#ifdef CONFIG_SMP 26#ifdef CONFIG_SMP
68#define PER_CPU(var, reg) \ 27#define PER_CPU(var, reg) \
69 movl %fs:per_cpu__##this_cpu_off, reg; \ 28 __percpu_mov_op %__percpu_seg:per_cpu__this_cpu_off, reg; \
70 lea per_cpu__##var(reg), reg 29 lea per_cpu__##var(reg), reg
71#define PER_CPU_VAR(var) %fs:per_cpu__##var 30#define PER_CPU_VAR(var) %__percpu_seg:per_cpu__##var
72#else /* ! SMP */ 31#else /* ! SMP */
73#define PER_CPU(var, reg) \ 32#define PER_CPU(var, reg) \
74 movl $per_cpu__##var, reg 33 __percpu_mov_op $per_cpu__##var, reg
75#define PER_CPU_VAR(var) per_cpu__##var 34#define PER_CPU_VAR(var) per_cpu__##var
76#endif /* SMP */ 35#endif /* SMP */
77 36
37#ifdef CONFIG_X86_64_SMP
38#define INIT_PER_CPU_VAR(var) init_per_cpu__##var
39#else
40#define INIT_PER_CPU_VAR(var) per_cpu__##var
41#endif
42
78#else /* ...!ASSEMBLY */ 43#else /* ...!ASSEMBLY */
79 44
45#include <linux/stringify.h>
46
47#ifdef CONFIG_SMP
48#define __percpu_arg(x) "%%"__stringify(__percpu_seg)":%P" #x
49#define __my_cpu_offset percpu_read(this_cpu_off)
50#else
51#define __percpu_arg(x) "%" #x
52#endif
53
80/* 54/*
81 * PER_CPU finds an address of a per-cpu variable. 55 * Initialized pointers to per-cpu variables needed for the boot
56 * processor need to use these macros to get the proper address
57 * offset from __per_cpu_load on SMP.
82 * 58 *
83 * Args: 59 * There also must be an entry in vmlinux_64.lds.S
84 * var - variable name
85 * cpu - 32bit register containing the current CPU number
86 *
87 * The resulting address is stored in the "cpu" argument.
88 *
89 * Example:
90 * PER_CPU(cpu_gdt_descr, %ebx)
91 */ 60 */
92#ifdef CONFIG_SMP 61#define DECLARE_INIT_PER_CPU(var) \
93 62 extern typeof(per_cpu_var(var)) init_per_cpu_var(var)
94#define __my_cpu_offset x86_read_percpu(this_cpu_off)
95
96/* fs segment starts at (positive) offset == __per_cpu_offset[cpu] */
97#define __percpu_seg "%%fs:"
98
99#else /* !SMP */
100
101#define __percpu_seg ""
102
103#endif /* SMP */
104
105#include <asm-generic/percpu.h>
106 63
107/* We can use this directly for local CPU (faster). */ 64#ifdef CONFIG_X86_64_SMP
108DECLARE_PER_CPU(unsigned long, this_cpu_off); 65#define init_per_cpu_var(var) init_per_cpu__##var
66#else
67#define init_per_cpu_var(var) per_cpu_var(var)
68#endif
109 69
110/* For arch-specific code, we can use direct single-insn ops (they 70/* For arch-specific code, we can use direct single-insn ops (they
111 * don't give an lvalue though). */ 71 * don't give an lvalue though). */
@@ -120,20 +80,25 @@ do { \
120 } \ 80 } \
121 switch (sizeof(var)) { \ 81 switch (sizeof(var)) { \
122 case 1: \ 82 case 1: \
123 asm(op "b %1,"__percpu_seg"%0" \ 83 asm(op "b %1,"__percpu_arg(0) \
124 : "+m" (var) \ 84 : "+m" (var) \
125 : "ri" ((T__)val)); \ 85 : "ri" ((T__)val)); \
126 break; \ 86 break; \
127 case 2: \ 87 case 2: \
128 asm(op "w %1,"__percpu_seg"%0" \ 88 asm(op "w %1,"__percpu_arg(0) \
129 : "+m" (var) \ 89 : "+m" (var) \
130 : "ri" ((T__)val)); \ 90 : "ri" ((T__)val)); \
131 break; \ 91 break; \
132 case 4: \ 92 case 4: \
133 asm(op "l %1,"__percpu_seg"%0" \ 93 asm(op "l %1,"__percpu_arg(0) \
134 : "+m" (var) \ 94 : "+m" (var) \
135 : "ri" ((T__)val)); \ 95 : "ri" ((T__)val)); \
136 break; \ 96 break; \
97 case 8: \
98 asm(op "q %1,"__percpu_arg(0) \
99 : "+m" (var) \
100 : "re" ((T__)val)); \
101 break; \
137 default: __bad_percpu_size(); \ 102 default: __bad_percpu_size(); \
138 } \ 103 } \
139} while (0) 104} while (0)
@@ -143,17 +108,22 @@ do { \
143 typeof(var) ret__; \ 108 typeof(var) ret__; \
144 switch (sizeof(var)) { \ 109 switch (sizeof(var)) { \
145 case 1: \ 110 case 1: \
146 asm(op "b "__percpu_seg"%1,%0" \ 111 asm(op "b "__percpu_arg(1)",%0" \
147 : "=r" (ret__) \ 112 : "=r" (ret__) \
148 : "m" (var)); \ 113 : "m" (var)); \
149 break; \ 114 break; \
150 case 2: \ 115 case 2: \
151 asm(op "w "__percpu_seg"%1,%0" \ 116 asm(op "w "__percpu_arg(1)",%0" \
152 : "=r" (ret__) \ 117 : "=r" (ret__) \
153 : "m" (var)); \ 118 : "m" (var)); \
154 break; \ 119 break; \
155 case 4: \ 120 case 4: \
156 asm(op "l "__percpu_seg"%1,%0" \ 121 asm(op "l "__percpu_arg(1)",%0" \
122 : "=r" (ret__) \
123 : "m" (var)); \
124 break; \
125 case 8: \
126 asm(op "q "__percpu_arg(1)",%0" \
157 : "=r" (ret__) \ 127 : "=r" (ret__) \
158 : "m" (var)); \ 128 : "m" (var)); \
159 break; \ 129 break; \
@@ -162,13 +132,30 @@ do { \
162 ret__; \ 132 ret__; \
163}) 133})
164 134
165#define x86_read_percpu(var) percpu_from_op("mov", per_cpu__##var) 135#define percpu_read(var) percpu_from_op("mov", per_cpu__##var)
166#define x86_write_percpu(var, val) percpu_to_op("mov", per_cpu__##var, val) 136#define percpu_write(var, val) percpu_to_op("mov", per_cpu__##var, val)
167#define x86_add_percpu(var, val) percpu_to_op("add", per_cpu__##var, val) 137#define percpu_add(var, val) percpu_to_op("add", per_cpu__##var, val)
168#define x86_sub_percpu(var, val) percpu_to_op("sub", per_cpu__##var, val) 138#define percpu_sub(var, val) percpu_to_op("sub", per_cpu__##var, val)
169#define x86_or_percpu(var, val) percpu_to_op("or", per_cpu__##var, val) 139#define percpu_and(var, val) percpu_to_op("and", per_cpu__##var, val)
140#define percpu_or(var, val) percpu_to_op("or", per_cpu__##var, val)
141#define percpu_xor(var, val) percpu_to_op("xor", per_cpu__##var, val)
142
143/* This is not atomic against other CPUs -- CPU preemption needs to be off */
144#define x86_test_and_clear_bit_percpu(bit, var) \
145({ \
146 int old__; \
147 asm volatile("btr %2,"__percpu_arg(1)"\n\tsbbl %0,%0" \
148 : "=r" (old__), "+m" (per_cpu__##var) \
149 : "dIr" (bit)); \
150 old__; \
151})
152
153#include <asm-generic/percpu.h>
154
155/* We can use this directly for local CPU (faster). */
156DECLARE_PER_CPU(unsigned long, this_cpu_off);
157
170#endif /* !__ASSEMBLY__ */ 158#endif /* !__ASSEMBLY__ */
171#endif /* !CONFIG_X86_64 */
172 159
173#ifdef CONFIG_SMP 160#ifdef CONFIG_SMP
174 161
@@ -195,9 +182,9 @@ do { \
195#define early_per_cpu_ptr(_name) (_name##_early_ptr) 182#define early_per_cpu_ptr(_name) (_name##_early_ptr)
196#define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx]) 183#define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx])
197#define early_per_cpu(_name, _cpu) \ 184#define early_per_cpu(_name, _cpu) \
198 (early_per_cpu_ptr(_name) ? \ 185 *(early_per_cpu_ptr(_name) ? \
199 early_per_cpu_ptr(_name)[_cpu] : \ 186 &early_per_cpu_ptr(_name)[_cpu] : \
200 per_cpu(_name, _cpu)) 187 &per_cpu(_name, _cpu))
201 188
202#else /* !CONFIG_SMP */ 189#else /* !CONFIG_SMP */
203#define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ 190#define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \
diff --git a/arch/x86/include/asm/pgtable-2level.h b/arch/x86/include/asm/pgtable-2level.h
index e0d199fe1d83..c1774ac9da7a 100644
--- a/arch/x86/include/asm/pgtable-2level.h
+++ b/arch/x86/include/asm/pgtable-2level.h
@@ -53,8 +53,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp)
53#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp) 53#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
54#endif 54#endif
55 55
56#define pte_none(x) (!(x).pte_low)
57
58/* 56/*
59 * Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken, 57 * Bits _PAGE_BIT_PRESENT, _PAGE_BIT_FILE and _PAGE_BIT_PROTNONE are taken,
60 * split up the 29 bits of offset into this range: 58 * split up the 29 bits of offset into this range:
diff --git a/arch/x86/include/asm/pgtable-2level-defs.h b/arch/x86/include/asm/pgtable-2level_types.h
index d77db8990eaa..daacc23e3fb9 100644
--- a/arch/x86/include/asm/pgtable-2level-defs.h
+++ b/arch/x86/include/asm/pgtable-2level_types.h
@@ -1,7 +1,23 @@
1#ifndef _ASM_X86_PGTABLE_2LEVEL_DEFS_H 1#ifndef _ASM_X86_PGTABLE_2LEVEL_DEFS_H
2#define _ASM_X86_PGTABLE_2LEVEL_DEFS_H 2#define _ASM_X86_PGTABLE_2LEVEL_DEFS_H
3 3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6
7typedef unsigned long pteval_t;
8typedef unsigned long pmdval_t;
9typedef unsigned long pudval_t;
10typedef unsigned long pgdval_t;
11typedef unsigned long pgprotval_t;
12
13typedef union {
14 pteval_t pte;
15 pteval_t pte_low;
16} pte_t;
17#endif /* !__ASSEMBLY__ */
18
4#define SHARED_KERNEL_PMD 0 19#define SHARED_KERNEL_PMD 0
20#define PAGETABLE_LEVELS 2
5 21
6/* 22/*
7 * traditional i386 two-level paging structure: 23 * traditional i386 two-level paging structure:
@@ -10,6 +26,7 @@
10#define PGDIR_SHIFT 22 26#define PGDIR_SHIFT 22
11#define PTRS_PER_PGD 1024 27#define PTRS_PER_PGD 1024
12 28
29
13/* 30/*
14 * the i386 is two-level, so we don't really have any 31 * the i386 is two-level, so we don't really have any
15 * PMD directory physically. 32 * PMD directory physically.
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index 447da43cddb3..3f13cdf61156 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -18,21 +18,6 @@
18 printk("%s:%d: bad pgd %p(%016Lx).\n", \ 18 printk("%s:%d: bad pgd %p(%016Lx).\n", \
19 __FILE__, __LINE__, &(e), pgd_val(e)) 19 __FILE__, __LINE__, &(e), pgd_val(e))
20 20
21static inline int pud_none(pud_t pud)
22{
23 return pud_val(pud) == 0;
24}
25
26static inline int pud_bad(pud_t pud)
27{
28 return (pud_val(pud) & ~(PTE_PFN_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0;
29}
30
31static inline int pud_present(pud_t pud)
32{
33 return pud_val(pud) & _PAGE_PRESENT;
34}
35
36/* Rules for using set_pte: the pte being assigned *must* be 21/* Rules for using set_pte: the pte being assigned *must* be
37 * either not present or in a state where the hardware will 22 * either not present or in a state where the hardware will
38 * not attempt to update the pte. In places where this is 23 * not attempt to update the pte. In places where this is
@@ -120,15 +105,6 @@ static inline void pud_clear(pud_t *pudp)
120 write_cr3(pgd); 105 write_cr3(pgd);
121} 106}
122 107
123#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
124
125#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PTE_PFN_MASK))
126
127
128/* Find an entry in the second-level page table.. */
129#define pmd_offset(pud, address) ((pmd_t *)pud_page_vaddr(*(pud)) + \
130 pmd_index(address))
131
132#ifdef CONFIG_SMP 108#ifdef CONFIG_SMP
133static inline pte_t native_ptep_get_and_clear(pte_t *ptep) 109static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
134{ 110{
@@ -145,17 +121,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
145#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp) 121#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
146#endif 122#endif
147 123
148#define __HAVE_ARCH_PTE_SAME
149static inline int pte_same(pte_t a, pte_t b)
150{
151 return a.pte_low == b.pte_low && a.pte_high == b.pte_high;
152}
153
154static inline int pte_none(pte_t pte)
155{
156 return !pte.pte_low && !pte.pte_high;
157}
158
159/* 124/*
160 * Bits 0, 6 and 7 are taken in the low part of the pte, 125 * Bits 0, 6 and 7 are taken in the low part of the pte,
161 * put the 32 bits of offset into the high part. 126 * put the 32 bits of offset into the high part.
diff --git a/arch/x86/include/asm/pgtable-3level-defs.h b/arch/x86/include/asm/pgtable-3level_types.h
index 62561367653c..1bd5876c8649 100644
--- a/arch/x86/include/asm/pgtable-3level-defs.h
+++ b/arch/x86/include/asm/pgtable-3level_types.h
@@ -1,12 +1,31 @@
1#ifndef _ASM_X86_PGTABLE_3LEVEL_DEFS_H 1#ifndef _ASM_X86_PGTABLE_3LEVEL_DEFS_H
2#define _ASM_X86_PGTABLE_3LEVEL_DEFS_H 2#define _ASM_X86_PGTABLE_3LEVEL_DEFS_H
3 3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6
7typedef u64 pteval_t;
8typedef u64 pmdval_t;
9typedef u64 pudval_t;
10typedef u64 pgdval_t;
11typedef u64 pgprotval_t;
12
13typedef union {
14 struct {
15 unsigned long pte_low, pte_high;
16 };
17 pteval_t pte;
18} pte_t;
19#endif /* !__ASSEMBLY__ */
20
4#ifdef CONFIG_PARAVIRT 21#ifdef CONFIG_PARAVIRT
5#define SHARED_KERNEL_PMD (pv_info.shared_kernel_pmd) 22#define SHARED_KERNEL_PMD (pv_info.shared_kernel_pmd)
6#else 23#else
7#define SHARED_KERNEL_PMD 1 24#define SHARED_KERNEL_PMD 1
8#endif 25#endif
9 26
27#define PAGETABLE_LEVELS 3
28
10/* 29/*
11 * PGDIR_SHIFT determines what a top-level page table entry can map 30 * PGDIR_SHIFT determines what a top-level page table entry can map
12 */ 31 */
@@ -25,4 +44,5 @@
25 */ 44 */
26#define PTRS_PER_PTE 512 45#define PTRS_PER_PTE 512
27 46
47
28#endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */ 48#endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 4f5af8447d54..d0812e155f1d 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -1,164 +1,9 @@
1#ifndef _ASM_X86_PGTABLE_H 1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H 2#define _ASM_X86_PGTABLE_H
3 3
4#define FIRST_USER_ADDRESS 0 4#include <asm/page.h>
5
6#define _PAGE_BIT_PRESENT 0 /* is present */
7#define _PAGE_BIT_RW 1 /* writeable */
8#define _PAGE_BIT_USER 2 /* userspace addressable */
9#define _PAGE_BIT_PWT 3 /* page write through */
10#define _PAGE_BIT_PCD 4 /* page cache disabled */
11#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
12#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
13#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
14#define _PAGE_BIT_PAT 7 /* on 4KB pages */
15#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
16#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
17#define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */
18#define _PAGE_BIT_UNUSED3 11
19#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
20#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1
21#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
22#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
23
24/* If _PAGE_BIT_PRESENT is clear, we use these: */
25/* - if the user mapped it with PROT_NONE; pte_present gives true */
26#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
27/* - set: nonlinear file mapping, saved PTE; unset:swap */
28#define _PAGE_BIT_FILE _PAGE_BIT_DIRTY
29
30#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
31#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
32#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
33#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
34#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
35#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
36#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
37#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
38#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
39#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
40#define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP)
41#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
42#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
43#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
44#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
45#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
46#define __HAVE_ARCH_PTE_SPECIAL
47
48#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
49#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
50#else
51#define _PAGE_NX (_AT(pteval_t, 0))
52#endif
53 5
54#define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE) 6#include <asm/pgtable_types.h>
55#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
56
57#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
58 _PAGE_ACCESSED | _PAGE_DIRTY)
59#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
60 _PAGE_DIRTY)
61
62/* Set of bits not changed in pte_modify */
63#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
64 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
65
66#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
67#define _PAGE_CACHE_WB (0)
68#define _PAGE_CACHE_WC (_PAGE_PWT)
69#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
70#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
71
72#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
73#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
74 _PAGE_ACCESSED | _PAGE_NX)
75
76#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
77 _PAGE_USER | _PAGE_ACCESSED)
78#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
79 _PAGE_ACCESSED | _PAGE_NX)
80#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
81 _PAGE_ACCESSED)
82#define PAGE_COPY PAGE_COPY_NOEXEC
83#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
84 _PAGE_ACCESSED | _PAGE_NX)
85#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
86 _PAGE_ACCESSED)
87
88#define __PAGE_KERNEL_EXEC \
89 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
90#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
91
92#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
93#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
94#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
95#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
96#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
97#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
98#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
99#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
100#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
101#define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
102#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
103
104#define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP)
105#define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP)
106#define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP)
107#define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP)
108
109#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
110#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
111#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
112#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
113#define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC)
114#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
115#define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS)
116#define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
117#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
118#define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
119#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
120#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
121#define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
122
123#define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
124#define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
125#define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS)
126#define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC)
127
128/* xwr */
129#define __P000 PAGE_NONE
130#define __P001 PAGE_READONLY
131#define __P010 PAGE_COPY
132#define __P011 PAGE_COPY
133#define __P100 PAGE_READONLY_EXEC
134#define __P101 PAGE_READONLY_EXEC
135#define __P110 PAGE_COPY_EXEC
136#define __P111 PAGE_COPY_EXEC
137
138#define __S000 PAGE_NONE
139#define __S001 PAGE_READONLY
140#define __S010 PAGE_SHARED
141#define __S011 PAGE_SHARED
142#define __S100 PAGE_READONLY_EXEC
143#define __S101 PAGE_READONLY_EXEC
144#define __S110 PAGE_SHARED_EXEC
145#define __S111 PAGE_SHARED_EXEC
146
147/*
148 * early identity mapping pte attrib macros.
149 */
150#ifdef CONFIG_X86_64
151#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
152#else
153/*
154 * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
155 * bits are combined, this will alow user to access the high address mapped
156 * VDSO in the presence of CONFIG_COMPAT_VDSO
157 */
158#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
159#define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
160#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
161#endif
162 7
163/* 8/*
164 * Macro to mark a page protection value as UC- 9 * Macro to mark a page protection value as UC-
@@ -170,9 +15,6 @@
170 15
171#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
172 17
173#define pgprot_writecombine pgprot_writecombine
174extern pgprot_t pgprot_writecombine(pgprot_t prot);
175
176/* 18/*
177 * ZERO_PAGE is a global shared page that is always zero: used 19 * ZERO_PAGE is a global shared page that is always zero: used
178 * for zero-mapped memory areas etc.. 20 * for zero-mapped memory areas etc..
@@ -183,6 +25,66 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
183extern spinlock_t pgd_lock; 25extern spinlock_t pgd_lock;
184extern struct list_head pgd_list; 26extern struct list_head pgd_list;
185 27
28#ifdef CONFIG_PARAVIRT
29#include <asm/paravirt.h>
30#else /* !CONFIG_PARAVIRT */
31#define set_pte(ptep, pte) native_set_pte(ptep, pte)
32#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
33
34#define set_pte_present(mm, addr, ptep, pte) \
35 native_set_pte_present(mm, addr, ptep, pte)
36#define set_pte_atomic(ptep, pte) \
37 native_set_pte_atomic(ptep, pte)
38
39#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
40
41#ifndef __PAGETABLE_PUD_FOLDED
42#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
43#define pgd_clear(pgd) native_pgd_clear(pgd)
44#endif
45
46#ifndef set_pud
47# define set_pud(pudp, pud) native_set_pud(pudp, pud)
48#endif
49
50#ifndef __PAGETABLE_PMD_FOLDED
51#define pud_clear(pud) native_pud_clear(pud)
52#endif
53
54#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
55#define pmd_clear(pmd) native_pmd_clear(pmd)
56
57#define pte_update(mm, addr, ptep) do { } while (0)
58#define pte_update_defer(mm, addr, ptep) do { } while (0)
59
60static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
61{
62 native_pagetable_setup_start(base);
63}
64
65static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
66{
67 native_pagetable_setup_done(base);
68}
69
70#define pgd_val(x) native_pgd_val(x)
71#define __pgd(x) native_make_pgd(x)
72
73#ifndef __PAGETABLE_PUD_FOLDED
74#define pud_val(x) native_pud_val(x)
75#define __pud(x) native_make_pud(x)
76#endif
77
78#ifndef __PAGETABLE_PMD_FOLDED
79#define pmd_val(x) native_pmd_val(x)
80#define __pmd(x) native_make_pmd(x)
81#endif
82
83#define pte_val(x) native_pte_val(x)
84#define __pte(x) native_make_pte(x)
85
86#endif /* CONFIG_PARAVIRT */
87
186/* 88/*
187 * The following only work if pte_present() is true. 89 * The following only work if pte_present() is true.
188 * Undefined behaviour if not.. 90 * Undefined behaviour if not..
@@ -236,72 +138,84 @@ static inline unsigned long pte_pfn(pte_t pte)
236 138
237static inline int pmd_large(pmd_t pte) 139static inline int pmd_large(pmd_t pte)
238{ 140{
239 return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) == 141 return (pmd_flags(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
240 (_PAGE_PSE | _PAGE_PRESENT); 142 (_PAGE_PSE | _PAGE_PRESENT);
241} 143}
242 144
145static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
146{
147 pteval_t v = native_pte_val(pte);
148
149 return native_make_pte(v | set);
150}
151
152static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
153{
154 pteval_t v = native_pte_val(pte);
155
156 return native_make_pte(v & ~clear);
157}
158
243static inline pte_t pte_mkclean(pte_t pte) 159static inline pte_t pte_mkclean(pte_t pte)
244{ 160{
245 return __pte(pte_val(pte) & ~_PAGE_DIRTY); 161 return pte_clear_flags(pte, _PAGE_DIRTY);
246} 162}
247 163
248static inline pte_t pte_mkold(pte_t pte) 164static inline pte_t pte_mkold(pte_t pte)
249{ 165{
250 return __pte(pte_val(pte) & ~_PAGE_ACCESSED); 166 return pte_clear_flags(pte, _PAGE_ACCESSED);
251} 167}
252 168
253static inline pte_t pte_wrprotect(pte_t pte) 169static inline pte_t pte_wrprotect(pte_t pte)
254{ 170{
255 return __pte(pte_val(pte) & ~_PAGE_RW); 171 return pte_clear_flags(pte, _PAGE_RW);
256} 172}
257 173
258static inline pte_t pte_mkexec(pte_t pte) 174static inline pte_t pte_mkexec(pte_t pte)
259{ 175{
260 return __pte(pte_val(pte) & ~_PAGE_NX); 176 return pte_clear_flags(pte, _PAGE_NX);
261} 177}
262 178
263static inline pte_t pte_mkdirty(pte_t pte) 179static inline pte_t pte_mkdirty(pte_t pte)
264{ 180{
265 return __pte(pte_val(pte) | _PAGE_DIRTY); 181 return pte_set_flags(pte, _PAGE_DIRTY);
266} 182}
267 183
268static inline pte_t pte_mkyoung(pte_t pte) 184static inline pte_t pte_mkyoung(pte_t pte)
269{ 185{
270 return __pte(pte_val(pte) | _PAGE_ACCESSED); 186 return pte_set_flags(pte, _PAGE_ACCESSED);
271} 187}
272 188
273static inline pte_t pte_mkwrite(pte_t pte) 189static inline pte_t pte_mkwrite(pte_t pte)
274{ 190{
275 return __pte(pte_val(pte) | _PAGE_RW); 191 return pte_set_flags(pte, _PAGE_RW);
276} 192}
277 193
278static inline pte_t pte_mkhuge(pte_t pte) 194static inline pte_t pte_mkhuge(pte_t pte)
279{ 195{
280 return __pte(pte_val(pte) | _PAGE_PSE); 196 return pte_set_flags(pte, _PAGE_PSE);
281} 197}
282 198
283static inline pte_t pte_clrhuge(pte_t pte) 199static inline pte_t pte_clrhuge(pte_t pte)
284{ 200{
285 return __pte(pte_val(pte) & ~_PAGE_PSE); 201 return pte_clear_flags(pte, _PAGE_PSE);
286} 202}
287 203
288static inline pte_t pte_mkglobal(pte_t pte) 204static inline pte_t pte_mkglobal(pte_t pte)
289{ 205{
290 return __pte(pte_val(pte) | _PAGE_GLOBAL); 206 return pte_set_flags(pte, _PAGE_GLOBAL);
291} 207}
292 208
293static inline pte_t pte_clrglobal(pte_t pte) 209static inline pte_t pte_clrglobal(pte_t pte)
294{ 210{
295 return __pte(pte_val(pte) & ~_PAGE_GLOBAL); 211 return pte_clear_flags(pte, _PAGE_GLOBAL);
296} 212}
297 213
298static inline pte_t pte_mkspecial(pte_t pte) 214static inline pte_t pte_mkspecial(pte_t pte)
299{ 215{
300 return __pte(pte_val(pte) | _PAGE_SPECIAL); 216 return pte_set_flags(pte, _PAGE_SPECIAL);
301} 217}
302 218
303extern pteval_t __supported_pte_mask;
304
305/* 219/*
306 * Mask out unsupported bits in a present pgprot. Non-present pgprots 220 * Mask out unsupported bits in a present pgprot. Non-present pgprots
307 * can use those bits for other purposes, so leave them be. 221 * can use those bits for other purposes, so leave them be.
@@ -374,82 +288,197 @@ static inline int is_new_memtype_allowed(unsigned long flags,
374 return 1; 288 return 1;
375} 289}
376 290
377#ifndef __ASSEMBLY__ 291pmd_t *populate_extra_pmd(unsigned long vaddr);
378/* Indicate that x86 has its own track and untrack pfn vma functions */ 292pte_t *populate_extra_pte(unsigned long vaddr);
379#define __HAVE_PFNMAP_TRACKING 293#endif /* __ASSEMBLY__ */
380
381#define __HAVE_PHYS_MEM_ACCESS_PROT
382struct file;
383pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
384 unsigned long size, pgprot_t vma_prot);
385int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
386 unsigned long size, pgprot_t *vma_prot);
387#endif
388
389/* Install a pte for a particular vaddr in kernel space. */
390void set_pte_vaddr(unsigned long vaddr, pte_t pte);
391 294
392#ifdef CONFIG_X86_32 295#ifdef CONFIG_X86_32
393extern void native_pagetable_setup_start(pgd_t *base); 296# include "pgtable_32.h"
394extern void native_pagetable_setup_done(pgd_t *base);
395#else 297#else
396static inline void native_pagetable_setup_start(pgd_t *base) {} 298# include "pgtable_64.h"
397static inline void native_pagetable_setup_done(pgd_t *base) {}
398#endif 299#endif
399 300
400struct seq_file; 301#ifndef __ASSEMBLY__
401extern void arch_report_meminfo(struct seq_file *m); 302#include <linux/mm_types.h>
402 303
403#ifdef CONFIG_PARAVIRT 304static inline int pte_none(pte_t pte)
404#include <asm/paravirt.h> 305{
405#else /* !CONFIG_PARAVIRT */ 306 return !pte.pte;
406#define set_pte(ptep, pte) native_set_pte(ptep, pte) 307}
407#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
408 308
409#define set_pte_present(mm, addr, ptep, pte) \ 309#define __HAVE_ARCH_PTE_SAME
410 native_set_pte_present(mm, addr, ptep, pte) 310static inline int pte_same(pte_t a, pte_t b)
411#define set_pte_atomic(ptep, pte) \ 311{
412 native_set_pte_atomic(ptep, pte) 312 return a.pte == b.pte;
313}
413 314
414#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 315static inline int pte_present(pte_t a)
316{
317 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
318}
415 319
416#ifndef __PAGETABLE_PUD_FOLDED 320static inline int pmd_present(pmd_t pmd)
417#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 321{
418#define pgd_clear(pgd) native_pgd_clear(pgd) 322 return pmd_flags(pmd) & _PAGE_PRESENT;
419#endif 323}
420 324
421#ifndef set_pud 325static inline int pmd_none(pmd_t pmd)
422# define set_pud(pudp, pud) native_set_pud(pudp, pud) 326{
423#endif 327 /* Only check low word on 32-bit platforms, since it might be
328 out of sync with upper half. */
329 return (unsigned long)native_pmd_val(pmd) == 0;
330}
424 331
425#ifndef __PAGETABLE_PMD_FOLDED 332static inline unsigned long pmd_page_vaddr(pmd_t pmd)
426#define pud_clear(pud) native_pud_clear(pud) 333{
427#endif 334 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
335}
428 336
429#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 337/*
430#define pmd_clear(pmd) native_pmd_clear(pmd) 338 * Currently stuck as a macro due to indirect forward reference to
339 * linux/mmzone.h's __section_mem_map_addr() definition:
340 */
341#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
431 342
432#define pte_update(mm, addr, ptep) do { } while (0) 343/*
433#define pte_update_defer(mm, addr, ptep) do { } while (0) 344 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
345 *
346 * this macro returns the index of the entry in the pmd page which would
347 * control the given virtual address
348 */
349static inline unsigned pmd_index(unsigned long address)
350{
351 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
352}
434 353
435static inline void __init paravirt_pagetable_setup_start(pgd_t *base) 354/*
355 * Conversion functions: convert a page and protection to a page entry,
356 * and a page entry and page directory to the page they refer to.
357 *
358 * (Currently stuck as a macro because of indirect forward reference
359 * to linux/mm.h:page_to_nid())
360 */
361#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
362
363/*
364 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
365 *
366 * this function returns the index of the entry in the pte page which would
367 * control the given virtual address
368 */
369static inline unsigned pte_index(unsigned long address)
436{ 370{
437 native_pagetable_setup_start(base); 371 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
438} 372}
439 373
440static inline void __init paravirt_pagetable_setup_done(pgd_t *base) 374static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
441{ 375{
442 native_pagetable_setup_done(base); 376 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
443} 377}
444#endif /* CONFIG_PARAVIRT */
445 378
446#endif /* __ASSEMBLY__ */ 379static inline int pmd_bad(pmd_t pmd)
380{
381 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
382}
447 383
448#ifdef CONFIG_X86_32 384static inline unsigned long pages_to_mb(unsigned long npg)
449# include "pgtable_32.h" 385{
386 return npg >> (20 - PAGE_SHIFT);
387}
388
389#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
390 remap_pfn_range(vma, vaddr, pfn, size, prot)
391
392#if PAGETABLE_LEVELS > 2
393static inline int pud_none(pud_t pud)
394{
395 return native_pud_val(pud) == 0;
396}
397
398static inline int pud_present(pud_t pud)
399{
400 return pud_flags(pud) & _PAGE_PRESENT;
401}
402
403static inline unsigned long pud_page_vaddr(pud_t pud)
404{
405 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
406}
407
408/*
409 * Currently stuck as a macro due to indirect forward reference to
410 * linux/mmzone.h's __section_mem_map_addr() definition:
411 */
412#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
413
414/* Find an entry in the second-level page table.. */
415static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
416{
417 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
418}
419
420static inline unsigned long pmd_pfn(pmd_t pmd)
421{
422 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
423}
424
425static inline int pud_large(pud_t pud)
426{
427 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
428 (_PAGE_PSE | _PAGE_PRESENT);
429}
430
431static inline int pud_bad(pud_t pud)
432{
433 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
434}
450#else 435#else
451# include "pgtable_64.h" 436static inline int pud_large(pud_t pud)
452#endif 437{
438 return 0;
439}
440#endif /* PAGETABLE_LEVELS > 2 */
441
442#if PAGETABLE_LEVELS > 3
443static inline int pgd_present(pgd_t pgd)
444{
445 return pgd_flags(pgd) & _PAGE_PRESENT;
446}
447
448static inline unsigned long pgd_page_vaddr(pgd_t pgd)
449{
450 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
451}
452
453/*
454 * Currently stuck as a macro due to indirect forward reference to
455 * linux/mmzone.h's __section_mem_map_addr() definition:
456 */
457#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
458
459/* to find an entry in a page-table-directory. */
460static inline unsigned pud_index(unsigned long address)
461{
462 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
463}
464
465static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
466{
467 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
468}
469
470static inline int pgd_bad(pgd_t pgd)
471{
472 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
473}
474
475static inline int pgd_none(pgd_t pgd)
476{
477 return !native_pgd_val(pgd);
478}
479#endif /* PAGETABLE_LEVELS > 3 */
480
481#endif /* __ASSEMBLY__ */
453 482
454/* 483/*
455 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] 484 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
@@ -476,28 +505,6 @@ static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
476 505
477#ifndef __ASSEMBLY__ 506#ifndef __ASSEMBLY__
478 507
479enum {
480 PG_LEVEL_NONE,
481 PG_LEVEL_4K,
482 PG_LEVEL_2M,
483 PG_LEVEL_1G,
484 PG_LEVEL_NUM
485};
486
487#ifdef CONFIG_PROC_FS
488extern void update_page_count(int level, unsigned long pages);
489#else
490static inline void update_page_count(int level, unsigned long pages) { }
491#endif
492
493/*
494 * Helper function that returns the kernel pagetable entry controlling
495 * the virtual address 'address'. NULL means no pagetable entry present.
496 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
497 * as a pte too.
498 */
499extern pte_t *lookup_address(unsigned long address, unsigned int *level);
500
501/* local pte updates need not use xchg for locking */ 508/* local pte updates need not use xchg for locking */
502static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 509static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
503{ 510{
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
index 72b020deb46b..97612fc7632f 100644
--- a/arch/x86/include/asm/pgtable_32.h
+++ b/arch/x86/include/asm/pgtable_32.h
@@ -1,6 +1,7 @@
1#ifndef _ASM_X86_PGTABLE_32_H 1#ifndef _ASM_X86_PGTABLE_32_H
2#define _ASM_X86_PGTABLE_32_H 2#define _ASM_X86_PGTABLE_32_H
3 3
4#include <asm/pgtable_32_types.h>
4 5
5/* 6/*
6 * The Linux memory management assumes a three-level page table setup. On 7 * The Linux memory management assumes a three-level page table setup. On
@@ -33,47 +34,6 @@ void paging_init(void);
33 34
34extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t); 35extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
35 36
36/*
37 * The Linux x86 paging architecture is 'compile-time dual-mode', it
38 * implements both the traditional 2-level x86 page tables and the
39 * newer 3-level PAE-mode page tables.
40 */
41#ifdef CONFIG_X86_PAE
42# include <asm/pgtable-3level-defs.h>
43# define PMD_SIZE (1UL << PMD_SHIFT)
44# define PMD_MASK (~(PMD_SIZE - 1))
45#else
46# include <asm/pgtable-2level-defs.h>
47#endif
48
49#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
50#define PGDIR_MASK (~(PGDIR_SIZE - 1))
51
52/* Just any arbitrary offset to the start of the vmalloc VM area: the
53 * current 8MB value just means that there will be a 8MB "hole" after the
54 * physical memory until the kernel virtual memory starts. That means that
55 * any out-of-bounds memory accesses will hopefully be caught.
56 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
57 * area for the same reason. ;)
58 */
59#define VMALLOC_OFFSET (8 * 1024 * 1024)
60#define VMALLOC_START ((unsigned long)high_memory + VMALLOC_OFFSET)
61#ifdef CONFIG_X86_PAE
62#define LAST_PKMAP 512
63#else
64#define LAST_PKMAP 1024
65#endif
66
67#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
68 & PMD_MASK)
69
70#ifdef CONFIG_HIGHMEM
71# define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE)
72#else
73# define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE)
74#endif
75
76#define MAXMEM (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
77 37
78/* 38/*
79 * Define this if things work differently on an i386 and an i486: 39 * Define this if things work differently on an i386 and an i486:
@@ -85,55 +45,12 @@ extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
85/* The boot page tables (all created as a single array) */ 45/* The boot page tables (all created as a single array) */
86extern unsigned long pg0[]; 46extern unsigned long pg0[];
87 47
88#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
89
90/* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
91#define pmd_none(x) (!(unsigned long)pmd_val((x)))
92#define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT)
93#define pmd_bad(x) ((pmd_val(x) & (PTE_FLAGS_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
94
95#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
96
97#ifdef CONFIG_X86_PAE 48#ifdef CONFIG_X86_PAE
98# include <asm/pgtable-3level.h> 49# include <asm/pgtable-3level.h>
99#else 50#else
100# include <asm/pgtable-2level.h> 51# include <asm/pgtable-2level.h>
101#endif 52#endif
102 53
103/*
104 * Conversion functions: convert a page and protection to a page entry,
105 * and a page entry and page directory to the page they refer to.
106 */
107#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
108
109
110static inline int pud_large(pud_t pud) { return 0; }
111
112/*
113 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
114 *
115 * this macro returns the index of the entry in the pmd page which would
116 * control the given virtual address
117 */
118#define pmd_index(address) \
119 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
120
121/*
122 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
123 *
124 * this macro returns the index of the entry in the pte page which would
125 * control the given virtual address
126 */
127#define pte_index(address) \
128 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
129#define pte_offset_kernel(dir, address) \
130 ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index((address)))
131
132#define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
133
134#define pmd_page_vaddr(pmd) \
135 ((unsigned long)__va(pmd_val((pmd)) & PTE_PFN_MASK))
136
137#if defined(CONFIG_HIGHPTE) 54#if defined(CONFIG_HIGHPTE)
138#define pte_offset_map(dir, address) \ 55#define pte_offset_map(dir, address) \
139 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) + \ 56 ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE0) + \
@@ -176,7 +93,4 @@ do { \
176#define kern_addr_valid(kaddr) (0) 93#define kern_addr_valid(kaddr) (0)
177#endif 94#endif
178 95
179#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
180 remap_pfn_range(vma, vaddr, pfn, size, prot)
181
182#endif /* _ASM_X86_PGTABLE_32_H */ 96#endif /* _ASM_X86_PGTABLE_32_H */
diff --git a/arch/x86/include/asm/pgtable_32_types.h b/arch/x86/include/asm/pgtable_32_types.h
new file mode 100644
index 000000000000..bd8df3b2fe04
--- /dev/null
+++ b/arch/x86/include/asm/pgtable_32_types.h
@@ -0,0 +1,46 @@
1#ifndef _ASM_X86_PGTABLE_32_DEFS_H
2#define _ASM_X86_PGTABLE_32_DEFS_H
3
4/*
5 * The Linux x86 paging architecture is 'compile-time dual-mode', it
6 * implements both the traditional 2-level x86 page tables and the
7 * newer 3-level PAE-mode page tables.
8 */
9#ifdef CONFIG_X86_PAE
10# include <asm/pgtable-3level_types.h>
11# define PMD_SIZE (1UL << PMD_SHIFT)
12# define PMD_MASK (~(PMD_SIZE - 1))
13#else
14# include <asm/pgtable-2level_types.h>
15#endif
16
17#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
18#define PGDIR_MASK (~(PGDIR_SIZE - 1))
19
20/* Just any arbitrary offset to the start of the vmalloc VM area: the
21 * current 8MB value just means that there will be a 8MB "hole" after the
22 * physical memory until the kernel virtual memory starts. That means that
23 * any out-of-bounds memory accesses will hopefully be caught.
24 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
25 * area for the same reason. ;)
26 */
27#define VMALLOC_OFFSET (8 * 1024 * 1024)
28#define VMALLOC_START ((unsigned long)high_memory + VMALLOC_OFFSET)
29#ifdef CONFIG_X86_PAE
30#define LAST_PKMAP 512
31#else
32#define LAST_PKMAP 1024
33#endif
34
35#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE * (LAST_PKMAP + 1)) \
36 & PMD_MASK)
37
38#ifdef CONFIG_HIGHMEM
39# define VMALLOC_END (PKMAP_BASE - 2 * PAGE_SIZE)
40#else
41# define VMALLOC_END (FIXADDR_START - 2 * PAGE_SIZE)
42#endif
43
44#define MAXMEM (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
45
46#endif /* _ASM_X86_PGTABLE_32_DEFS_H */
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index ba09289accaa..6b87bc6d5018 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -2,6 +2,8 @@
2#define _ASM_X86_PGTABLE_64_H 2#define _ASM_X86_PGTABLE_64_H
3 3
4#include <linux/const.h> 4#include <linux/const.h>
5#include <asm/pgtable_64_types.h>
6
5#ifndef __ASSEMBLY__ 7#ifndef __ASSEMBLY__
6 8
7/* 9/*
@@ -11,7 +13,6 @@
11#include <asm/processor.h> 13#include <asm/processor.h>
12#include <linux/bitops.h> 14#include <linux/bitops.h>
13#include <linux/threads.h> 15#include <linux/threads.h>
14#include <asm/pda.h>
15 16
16extern pud_t level3_kernel_pgt[512]; 17extern pud_t level3_kernel_pgt[512];
17extern pud_t level3_ident_pgt[512]; 18extern pud_t level3_ident_pgt[512];
@@ -26,32 +27,6 @@ extern void paging_init(void);
26 27
27#endif /* !__ASSEMBLY__ */ 28#endif /* !__ASSEMBLY__ */
28 29
29#define SHARED_KERNEL_PMD 0
30
31/*
32 * PGDIR_SHIFT determines what a top-level page table entry can map
33 */
34#define PGDIR_SHIFT 39
35#define PTRS_PER_PGD 512
36
37/*
38 * 3rd level page
39 */
40#define PUD_SHIFT 30
41#define PTRS_PER_PUD 512
42
43/*
44 * PMD_SHIFT determines the size of the area a middle-level
45 * page table can map
46 */
47#define PMD_SHIFT 21
48#define PTRS_PER_PMD 512
49
50/*
51 * entries per page directory level
52 */
53#define PTRS_PER_PTE 512
54
55#ifndef __ASSEMBLY__ 30#ifndef __ASSEMBLY__
56 31
57#define pte_ERROR(e) \ 32#define pte_ERROR(e) \
@@ -67,9 +42,6 @@ extern void paging_init(void);
67 printk("%s:%d: bad pgd %p(%016lx).\n", \ 42 printk("%s:%d: bad pgd %p(%016lx).\n", \
68 __FILE__, __LINE__, &(e), pgd_val(e)) 43 __FILE__, __LINE__, &(e), pgd_val(e))
69 44
70#define pgd_none(x) (!pgd_val(x))
71#define pud_none(x) (!pud_val(x))
72
73struct mm_struct; 45struct mm_struct;
74 46
75void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte); 47void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte);
@@ -134,48 +106,6 @@ static inline void native_pgd_clear(pgd_t *pgd)
134 native_set_pgd(pgd, native_make_pgd(0)); 106 native_set_pgd(pgd, native_make_pgd(0));
135} 107}
136 108
137#define pte_same(a, b) ((a).pte == (b).pte)
138
139#endif /* !__ASSEMBLY__ */
140
141#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
142#define PMD_MASK (~(PMD_SIZE - 1))
143#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
144#define PUD_MASK (~(PUD_SIZE - 1))
145#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
146#define PGDIR_MASK (~(PGDIR_SIZE - 1))
147
148
149#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
150#define VMALLOC_START _AC(0xffffc20000000000, UL)
151#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
152#define VMEMMAP_START _AC(0xffffe20000000000, UL)
153#define MODULES_VADDR _AC(0xffffffffa0000000, UL)
154#define MODULES_END _AC(0xffffffffff000000, UL)
155#define MODULES_LEN (MODULES_END - MODULES_VADDR)
156
157#ifndef __ASSEMBLY__
158
159static inline int pgd_bad(pgd_t pgd)
160{
161 return (pgd_val(pgd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
162}
163
164static inline int pud_bad(pud_t pud)
165{
166 return (pud_val(pud) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
167}
168
169static inline int pmd_bad(pmd_t pmd)
170{
171 return (pmd_val(pmd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE;
172}
173
174#define pte_none(x) (!pte_val((x)))
175#define pte_present(x) (pte_val((x)) & (_PAGE_PRESENT | _PAGE_PROTNONE))
176
177#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */
178
179/* 109/*
180 * Conversion functions: convert a page and protection to a page entry, 110 * Conversion functions: convert a page and protection to a page entry,
181 * and a page entry and page directory to the page they refer to. 111 * and a page entry and page directory to the page they refer to.
@@ -184,41 +114,12 @@ static inline int pmd_bad(pmd_t pmd)
184/* 114/*
185 * Level 4 access. 115 * Level 4 access.
186 */ 116 */
187#define pgd_page_vaddr(pgd) \
188 ((unsigned long)__va((unsigned long)pgd_val((pgd)) & PTE_PFN_MASK))
189#define pgd_page(pgd) (pfn_to_page(pgd_val((pgd)) >> PAGE_SHIFT))
190#define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
191static inline int pgd_large(pgd_t pgd) { return 0; } 117static inline int pgd_large(pgd_t pgd) { return 0; }
192#define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE) 118#define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE)
193 119
194/* PUD - Level3 access */ 120/* PUD - Level3 access */
195/* to find an entry in a page-table-directory. */
196#define pud_page_vaddr(pud) \
197 ((unsigned long)__va(pud_val((pud)) & PHYSICAL_PAGE_MASK))
198#define pud_page(pud) (pfn_to_page(pud_val((pud)) >> PAGE_SHIFT))
199#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
200#define pud_offset(pgd, address) \
201 ((pud_t *)pgd_page_vaddr(*(pgd)) + pud_index((address)))
202#define pud_present(pud) (pud_val((pud)) & _PAGE_PRESENT)
203
204static inline int pud_large(pud_t pte)
205{
206 return (pud_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
207 (_PAGE_PSE | _PAGE_PRESENT);
208}
209 121
210/* PMD - Level 2 access */ 122/* PMD - Level 2 access */
211#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val((pmd)) & PTE_PFN_MASK))
212#define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT))
213
214#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
215#define pmd_offset(dir, address) ((pmd_t *)pud_page_vaddr(*(dir)) + \
216 pmd_index(address))
217#define pmd_none(x) (!pmd_val((x)))
218#define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT)
219#define pfn_pmd(nr, prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val((prot))))
220#define pmd_pfn(x) ((pmd_val((x)) & __PHYSICAL_MASK) >> PAGE_SHIFT)
221
222#define pte_to_pgoff(pte) ((pte_val((pte)) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT) 123#define pte_to_pgoff(pte) ((pte_val((pte)) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
223#define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | \ 124#define pgoff_to_pte(off) ((pte_t) { .pte = ((off) << PAGE_SHIFT) | \
224 _PAGE_FILE }) 125 _PAGE_FILE })
@@ -226,13 +127,6 @@ static inline int pud_large(pud_t pte)
226 127
227/* PTE - Level 1 access. */ 128/* PTE - Level 1 access. */
228 129
229/* page, protection -> pte */
230#define mk_pte(page, pgprot) pfn_pte(page_to_pfn((page)), (pgprot))
231
232#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
233#define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
234 pte_index((address)))
235
236/* x86-64 always has all page tables mapped. */ 130/* x86-64 always has all page tables mapped. */
237#define pte_offset_map(dir, address) pte_offset_kernel((dir), (address)) 131#define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
238#define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address)) 132#define pte_offset_map_nested(dir, address) pte_offset_kernel((dir), (address))
@@ -266,9 +160,6 @@ extern int direct_gbpages;
266extern int kern_addr_valid(unsigned long addr); 160extern int kern_addr_valid(unsigned long addr);
267extern void cleanup_highmap(void); 161extern void cleanup_highmap(void);
268 162
269#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
270 remap_pfn_range(vma, vaddr, pfn, size, prot)
271
272#define HAVE_ARCH_UNMAPPED_AREA 163#define HAVE_ARCH_UNMAPPED_AREA
273#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN 164#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
274 165
diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h
new file mode 100644
index 000000000000..fbf42b8e0383
--- /dev/null
+++ b/arch/x86/include/asm/pgtable_64_types.h
@@ -0,0 +1,63 @@
1#ifndef _ASM_X86_PGTABLE_64_DEFS_H
2#define _ASM_X86_PGTABLE_64_DEFS_H
3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6
7/*
8 * These are used to make use of C type-checking..
9 */
10typedef unsigned long pteval_t;
11typedef unsigned long pmdval_t;
12typedef unsigned long pudval_t;
13typedef unsigned long pgdval_t;
14typedef unsigned long pgprotval_t;
15
16typedef struct { pteval_t pte; } pte_t;
17
18#endif /* !__ASSEMBLY__ */
19
20#define SHARED_KERNEL_PMD 0
21#define PAGETABLE_LEVELS 4
22
23/*
24 * PGDIR_SHIFT determines what a top-level page table entry can map
25 */
26#define PGDIR_SHIFT 39
27#define PTRS_PER_PGD 512
28
29/*
30 * 3rd level page
31 */
32#define PUD_SHIFT 30
33#define PTRS_PER_PUD 512
34
35/*
36 * PMD_SHIFT determines the size of the area a middle-level
37 * page table can map
38 */
39#define PMD_SHIFT 21
40#define PTRS_PER_PMD 512
41
42/*
43 * entries per page directory level
44 */
45#define PTRS_PER_PTE 512
46
47#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
48#define PMD_MASK (~(PMD_SIZE - 1))
49#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
50#define PUD_MASK (~(PUD_SIZE - 1))
51#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
52#define PGDIR_MASK (~(PGDIR_SIZE - 1))
53
54
55#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
56#define VMALLOC_START _AC(0xffffc20000000000, UL)
57#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
58#define VMEMMAP_START _AC(0xffffe20000000000, UL)
59#define MODULES_VADDR _AC(0xffffffffa0000000, UL)
60#define MODULES_END _AC(0xffffffffff000000, UL)
61#define MODULES_LEN (MODULES_END - MODULES_VADDR)
62
63#endif /* _ASM_X86_PGTABLE_64_DEFS_H */
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
new file mode 100644
index 000000000000..4d258ad76a0f
--- /dev/null
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -0,0 +1,328 @@
1#ifndef _ASM_X86_PGTABLE_DEFS_H
2#define _ASM_X86_PGTABLE_DEFS_H
3
4#include <linux/const.h>
5#include <asm/page_types.h>
6
7#define FIRST_USER_ADDRESS 0
8
9#define _PAGE_BIT_PRESENT 0 /* is present */
10#define _PAGE_BIT_RW 1 /* writeable */
11#define _PAGE_BIT_USER 2 /* userspace addressable */
12#define _PAGE_BIT_PWT 3 /* page write through */
13#define _PAGE_BIT_PCD 4 /* page cache disabled */
14#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
15#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
16#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
17#define _PAGE_BIT_PAT 7 /* on 4KB pages */
18#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
19#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
20#define _PAGE_BIT_IOMAP 10 /* flag used to indicate IO mapping */
21#define _PAGE_BIT_UNUSED3 11
22#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
23#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1
24#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
25#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
26
27/* If _PAGE_BIT_PRESENT is clear, we use these: */
28/* - if the user mapped it with PROT_NONE; pte_present gives true */
29#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
30/* - set: nonlinear file mapping, saved PTE; unset:swap */
31#define _PAGE_BIT_FILE _PAGE_BIT_DIRTY
32
33#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
34#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
35#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
36#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
37#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
38#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
39#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
40#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
41#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
42#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
43#define _PAGE_IOMAP (_AT(pteval_t, 1) << _PAGE_BIT_IOMAP)
44#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
45#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
46#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
47#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
48#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
49#define __HAVE_ARCH_PTE_SPECIAL
50
51#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
52#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
53#else
54#define _PAGE_NX (_AT(pteval_t, 0))
55#endif
56
57#define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE)
58#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
59
60#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
61 _PAGE_ACCESSED | _PAGE_DIRTY)
62#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
63 _PAGE_DIRTY)
64
65/* Set of bits not changed in pte_modify */
66#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
67 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
68
69#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
70#define _PAGE_CACHE_WB (0)
71#define _PAGE_CACHE_WC (_PAGE_PWT)
72#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
73#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
74
75#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
76#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
77 _PAGE_ACCESSED | _PAGE_NX)
78
79#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
80 _PAGE_USER | _PAGE_ACCESSED)
81#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
82 _PAGE_ACCESSED | _PAGE_NX)
83#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
84 _PAGE_ACCESSED)
85#define PAGE_COPY PAGE_COPY_NOEXEC
86#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
87 _PAGE_ACCESSED | _PAGE_NX)
88#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
89 _PAGE_ACCESSED)
90
91#define __PAGE_KERNEL_EXEC \
92 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
93#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
94
95#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
96#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
97#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
98#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
99#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
100#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
101#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
102#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
103#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
104#define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
105#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
106
107#define __PAGE_KERNEL_IO (__PAGE_KERNEL | _PAGE_IOMAP)
108#define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE | _PAGE_IOMAP)
109#define __PAGE_KERNEL_IO_UC_MINUS (__PAGE_KERNEL_UC_MINUS | _PAGE_IOMAP)
110#define __PAGE_KERNEL_IO_WC (__PAGE_KERNEL_WC | _PAGE_IOMAP)
111
112#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
113#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
114#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
115#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
116#define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC)
117#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
118#define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS)
119#define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
120#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
121#define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
122#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
123#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
124#define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
125
126#define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
127#define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
128#define PAGE_KERNEL_IO_UC_MINUS __pgprot(__PAGE_KERNEL_IO_UC_MINUS)
129#define PAGE_KERNEL_IO_WC __pgprot(__PAGE_KERNEL_IO_WC)
130
131/* xwr */
132#define __P000 PAGE_NONE
133#define __P001 PAGE_READONLY
134#define __P010 PAGE_COPY
135#define __P011 PAGE_COPY
136#define __P100 PAGE_READONLY_EXEC
137#define __P101 PAGE_READONLY_EXEC
138#define __P110 PAGE_COPY_EXEC
139#define __P111 PAGE_COPY_EXEC
140
141#define __S000 PAGE_NONE
142#define __S001 PAGE_READONLY
143#define __S010 PAGE_SHARED
144#define __S011 PAGE_SHARED
145#define __S100 PAGE_READONLY_EXEC
146#define __S101 PAGE_READONLY_EXEC
147#define __S110 PAGE_SHARED_EXEC
148#define __S111 PAGE_SHARED_EXEC
149
150/*
151 * early identity mapping pte attrib macros.
152 */
153#ifdef CONFIG_X86_64
154#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
155#else
156/*
157 * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
158 * bits are combined, this will alow user to access the high address mapped
159 * VDSO in the presence of CONFIG_COMPAT_VDSO
160 */
161#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
162#define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
163#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
164#endif
165
166#ifdef CONFIG_X86_32
167# include "pgtable_32_types.h"
168#else
169# include "pgtable_64_types.h"
170#endif
171
172#ifndef __ASSEMBLY__
173
174#include <linux/types.h>
175
176/* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */
177#define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
178
179/* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */
180#define PTE_FLAGS_MASK (~PTE_PFN_MASK)
181
182typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
183
184typedef struct { pgdval_t pgd; } pgd_t;
185
186static inline pgd_t native_make_pgd(pgdval_t val)
187{
188 return (pgd_t) { val };
189}
190
191static inline pgdval_t native_pgd_val(pgd_t pgd)
192{
193 return pgd.pgd;
194}
195
196static inline pgdval_t pgd_flags(pgd_t pgd)
197{
198 return native_pgd_val(pgd) & PTE_FLAGS_MASK;
199}
200
201#if PAGETABLE_LEVELS > 3
202typedef struct { pudval_t pud; } pud_t;
203
204static inline pud_t native_make_pud(pmdval_t val)
205{
206 return (pud_t) { val };
207}
208
209static inline pudval_t native_pud_val(pud_t pud)
210{
211 return pud.pud;
212}
213#else
214#include <asm-generic/pgtable-nopud.h>
215
216static inline pudval_t native_pud_val(pud_t pud)
217{
218 return native_pgd_val(pud.pgd);
219}
220#endif
221
222#if PAGETABLE_LEVELS > 2
223typedef struct { pmdval_t pmd; } pmd_t;
224
225static inline pmd_t native_make_pmd(pmdval_t val)
226{
227 return (pmd_t) { val };
228}
229
230static inline pmdval_t native_pmd_val(pmd_t pmd)
231{
232 return pmd.pmd;
233}
234#else
235#include <asm-generic/pgtable-nopmd.h>
236
237static inline pmdval_t native_pmd_val(pmd_t pmd)
238{
239 return native_pgd_val(pmd.pud.pgd);
240}
241#endif
242
243static inline pudval_t pud_flags(pud_t pud)
244{
245 return native_pud_val(pud) & PTE_FLAGS_MASK;
246}
247
248static inline pmdval_t pmd_flags(pmd_t pmd)
249{
250 return native_pmd_val(pmd) & PTE_FLAGS_MASK;
251}
252
253static inline pte_t native_make_pte(pteval_t val)
254{
255 return (pte_t) { .pte = val };
256}
257
258static inline pteval_t native_pte_val(pte_t pte)
259{
260 return pte.pte;
261}
262
263static inline pteval_t pte_flags(pte_t pte)
264{
265 return native_pte_val(pte) & PTE_FLAGS_MASK;
266}
267
268#define pgprot_val(x) ((x).pgprot)
269#define __pgprot(x) ((pgprot_t) { (x) } )
270
271
272typedef struct page *pgtable_t;
273
274extern pteval_t __supported_pte_mask;
275extern int nx_enabled;
276
277#define pgprot_writecombine pgprot_writecombine
278extern pgprot_t pgprot_writecombine(pgprot_t prot);
279
280/* Indicate that x86 has its own track and untrack pfn vma functions */
281#define __HAVE_PFNMAP_TRACKING
282
283#define __HAVE_PHYS_MEM_ACCESS_PROT
284struct file;
285pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
286 unsigned long size, pgprot_t vma_prot);
287int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
288 unsigned long size, pgprot_t *vma_prot);
289
290/* Install a pte for a particular vaddr in kernel space. */
291void set_pte_vaddr(unsigned long vaddr, pte_t pte);
292
293#ifdef CONFIG_X86_32
294extern void native_pagetable_setup_start(pgd_t *base);
295extern void native_pagetable_setup_done(pgd_t *base);
296#else
297static inline void native_pagetable_setup_start(pgd_t *base) {}
298static inline void native_pagetable_setup_done(pgd_t *base) {}
299#endif
300
301struct seq_file;
302extern void arch_report_meminfo(struct seq_file *m);
303
304enum {
305 PG_LEVEL_NONE,
306 PG_LEVEL_4K,
307 PG_LEVEL_2M,
308 PG_LEVEL_1G,
309 PG_LEVEL_NUM
310};
311
312#ifdef CONFIG_PROC_FS
313extern void update_page_count(int level, unsigned long pages);
314#else
315static inline void update_page_count(int level, unsigned long pages) { }
316#endif
317
318/*
319 * Helper function that returns the kernel pagetable entry controlling
320 * the virtual address 'address'. NULL means no pagetable entry present.
321 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
322 * as a pte too.
323 */
324extern pte_t *lookup_address(unsigned long address, unsigned int *level);
325
326#endif /* !__ASSEMBLY__ */
327
328#endif /* _ASM_X86_PGTABLE_DEFS_H */
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 3bfd5235a9eb..76139506c3e4 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -16,6 +16,7 @@ struct mm_struct;
16#include <asm/cpufeature.h> 16#include <asm/cpufeature.h>
17#include <asm/system.h> 17#include <asm/system.h>
18#include <asm/page.h> 18#include <asm/page.h>
19#include <asm/pgtable_types.h>
19#include <asm/percpu.h> 20#include <asm/percpu.h>
20#include <asm/msr.h> 21#include <asm/msr.h>
21#include <asm/desc_defs.h> 22#include <asm/desc_defs.h>
@@ -73,7 +74,7 @@ struct cpuinfo_x86 {
73 char pad0; 74 char pad0;
74#else 75#else
75 /* Number of 4K pages in DTLB/ITLB combined(in pages): */ 76 /* Number of 4K pages in DTLB/ITLB combined(in pages): */
76 int x86_tlbsize; 77 int x86_tlbsize;
77 __u8 x86_virt_bits; 78 __u8 x86_virt_bits;
78 __u8 x86_phys_bits; 79 __u8 x86_phys_bits;
79#endif 80#endif
@@ -247,7 +248,6 @@ struct x86_hw_tss {
247#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long)) 248#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
248#define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap) 249#define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap)
249#define INVALID_IO_BITMAP_OFFSET 0x8000 250#define INVALID_IO_BITMAP_OFFSET 0x8000
250#define INVALID_IO_BITMAP_OFFSET_LAZY 0x9000
251 251
252struct tss_struct { 252struct tss_struct {
253 /* 253 /*
@@ -262,11 +262,6 @@ struct tss_struct {
262 * be within the limit. 262 * be within the limit.
263 */ 263 */
264 unsigned long io_bitmap[IO_BITMAP_LONGS + 1]; 264 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
265 /*
266 * Cache the current maximum and the last task that used the bitmap:
267 */
268 unsigned long io_bitmap_max;
269 struct thread_struct *io_bitmap_owner;
270 265
271 /* 266 /*
272 * .. and then another 0x100 bytes for the emergency kernel stack: 267 * .. and then another 0x100 bytes for the emergency kernel stack:
@@ -378,9 +373,30 @@ union thread_xstate {
378 373
379#ifdef CONFIG_X86_64 374#ifdef CONFIG_X86_64
380DECLARE_PER_CPU(struct orig_ist, orig_ist); 375DECLARE_PER_CPU(struct orig_ist, orig_ist);
376
377union irq_stack_union {
378 char irq_stack[IRQ_STACK_SIZE];
379 /*
380 * GCC hardcodes the stack canary as %gs:40. Since the
381 * irq_stack is the object at %gs:0, we reserve the bottom
382 * 48 bytes of the irq stack for the canary.
383 */
384 struct {
385 char gs_base[40];
386 unsigned long stack_canary;
387 };
388};
389
390DECLARE_PER_CPU(union irq_stack_union, irq_stack_union);
391DECLARE_INIT_PER_CPU(irq_stack_union);
392
393DECLARE_PER_CPU(char *, irq_stack_ptr);
394#else /* X86_64 */
395#ifdef CONFIG_CC_STACKPROTECTOR
396DECLARE_PER_CPU(unsigned long, stack_canary);
381#endif 397#endif
398#endif /* X86_64 */
382 399
383extern void print_cpu_info(struct cpuinfo_x86 *);
384extern unsigned int xstate_size; 400extern unsigned int xstate_size;
385extern void free_thread_xstate(struct task_struct *); 401extern void free_thread_xstate(struct task_struct *);
386extern struct kmem_cache *task_xstate_cachep; 402extern struct kmem_cache *task_xstate_cachep;
@@ -752,9 +768,9 @@ extern int sysenter_setup(void);
752extern struct desc_ptr early_gdt_descr; 768extern struct desc_ptr early_gdt_descr;
753 769
754extern void cpu_set_gdt(int); 770extern void cpu_set_gdt(int);
755extern void switch_to_new_gdt(void); 771extern void switch_to_new_gdt(int);
772extern void load_percpu_segment(int);
756extern void cpu_init(void); 773extern void cpu_init(void);
757extern void init_gdt(int cpu);
758 774
759static inline unsigned long get_debugctlmsr(void) 775static inline unsigned long get_debugctlmsr(void)
760{ 776{
@@ -839,6 +855,7 @@ static inline void spin_lock_prefetch(const void *x)
839 * User space process size: 3GB (default). 855 * User space process size: 3GB (default).
840 */ 856 */
841#define TASK_SIZE PAGE_OFFSET 857#define TASK_SIZE PAGE_OFFSET
858#define TASK_SIZE_MAX TASK_SIZE
842#define STACK_TOP TASK_SIZE 859#define STACK_TOP TASK_SIZE
843#define STACK_TOP_MAX STACK_TOP 860#define STACK_TOP_MAX STACK_TOP
844 861
@@ -898,7 +915,7 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk);
898/* 915/*
899 * User space process size. 47bits minus one guard page. 916 * User space process size. 47bits minus one guard page.
900 */ 917 */
901#define TASK_SIZE64 ((1UL << 47) - PAGE_SIZE) 918#define TASK_SIZE_MAX ((1UL << 47) - PAGE_SIZE)
902 919
903/* This decides where the kernel will search for a free chunk of vm 920/* This decides where the kernel will search for a free chunk of vm
904 * space during mmap's. 921 * space during mmap's.
@@ -907,12 +924,12 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk);
907 0xc0000000 : 0xFFFFe000) 924 0xc0000000 : 0xFFFFe000)
908 925
909#define TASK_SIZE (test_thread_flag(TIF_IA32) ? \ 926#define TASK_SIZE (test_thread_flag(TIF_IA32) ? \
910 IA32_PAGE_OFFSET : TASK_SIZE64) 927 IA32_PAGE_OFFSET : TASK_SIZE_MAX)
911#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \ 928#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_IA32)) ? \
912 IA32_PAGE_OFFSET : TASK_SIZE64) 929 IA32_PAGE_OFFSET : TASK_SIZE_MAX)
913 930
914#define STACK_TOP TASK_SIZE 931#define STACK_TOP TASK_SIZE
915#define STACK_TOP_MAX TASK_SIZE64 932#define STACK_TOP_MAX TASK_SIZE_MAX
916 933
917#define INIT_THREAD { \ 934#define INIT_THREAD { \
918 .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \ 935 .sp0 = (unsigned long)&init_stack + sizeof(init_stack) \
diff --git a/arch/x86/include/asm/proto.h b/arch/x86/include/asm/proto.h
index d6a22f92ba77..49fb3ecf3bb3 100644
--- a/arch/x86/include/asm/proto.h
+++ b/arch/x86/include/asm/proto.h
@@ -18,11 +18,7 @@ extern void syscall32_cpu_init(void);
18 18
19extern void check_efer(void); 19extern void check_efer(void);
20 20
21#ifdef CONFIG_X86_BIOS_REBOOT
22extern int reboot_force; 21extern int reboot_force;
23#else
24static const int reboot_force = 0;
25#endif
26 22
27long do_arch_prctl(struct task_struct *task, int code, unsigned long addr); 23long do_arch_prctl(struct task_struct *task, int code, unsigned long addr);
28 24
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 6d34d954c228..e304b66abeea 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -28,7 +28,7 @@ struct pt_regs {
28 int xds; 28 int xds;
29 int xes; 29 int xes;
30 int xfs; 30 int xfs;
31 /* int gs; */ 31 int xgs;
32 long orig_eax; 32 long orig_eax;
33 long eip; 33 long eip;
34 int xcs; 34 int xcs;
@@ -50,7 +50,7 @@ struct pt_regs {
50 unsigned long ds; 50 unsigned long ds;
51 unsigned long es; 51 unsigned long es;
52 unsigned long fs; 52 unsigned long fs;
53 /* int gs; */ 53 unsigned long gs;
54 unsigned long orig_ax; 54 unsigned long orig_ax;
55 unsigned long ip; 55 unsigned long ip;
56 unsigned long cs; 56 unsigned long cs;
diff --git a/arch/x86/include/asm/mach-rdc321x/rdc321x_defs.h b/arch/x86/include/asm/rdc321x_defs.h
index c8e9c8bed3d0..c8e9c8bed3d0 100644
--- a/arch/x86/include/asm/mach-rdc321x/rdc321x_defs.h
+++ b/arch/x86/include/asm/rdc321x_defs.h
diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
index 1dc1b51ac623..14e0ed86a6f9 100644
--- a/arch/x86/include/asm/segment.h
+++ b/arch/x86/include/asm/segment.h
@@ -61,7 +61,7 @@
61 * 61 *
62 * 26 - ESPFIX small SS 62 * 26 - ESPFIX small SS
63 * 27 - per-cpu [ offset to per-cpu data area ] 63 * 27 - per-cpu [ offset to per-cpu data area ]
64 * 28 - unused 64 * 28 - stack_canary-20 [ for stack protector ]
65 * 29 - unused 65 * 29 - unused
66 * 30 - unused 66 * 30 - unused
67 * 31 - TSS for double fault handler 67 * 31 - TSS for double fault handler
@@ -95,6 +95,13 @@
95#define __KERNEL_PERCPU 0 95#define __KERNEL_PERCPU 0
96#endif 96#endif
97 97
98#define GDT_ENTRY_STACK_CANARY (GDT_ENTRY_KERNEL_BASE + 16)
99#ifdef CONFIG_CC_STACKPROTECTOR
100#define __KERNEL_STACK_CANARY (GDT_ENTRY_STACK_CANARY * 8)
101#else
102#define __KERNEL_STACK_CANARY 0
103#endif
104
98#define GDT_ENTRY_DOUBLEFAULT_TSS 31 105#define GDT_ENTRY_DOUBLEFAULT_TSS 31
99 106
100/* 107/*
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index c2308f5250fd..05c6f6b11fd5 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -13,6 +13,7 @@
13struct mpc_cpu; 13struct mpc_cpu;
14struct mpc_bus; 14struct mpc_bus;
15struct mpc_oemtable; 15struct mpc_oemtable;
16
16struct x86_quirks { 17struct x86_quirks {
17 int (*arch_pre_time_init)(void); 18 int (*arch_pre_time_init)(void);
18 int (*arch_time_init)(void); 19 int (*arch_time_init)(void);
@@ -28,11 +29,18 @@ struct x86_quirks {
28 void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name); 29 void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
29 void (*mpc_oem_pci_bus)(struct mpc_bus *m); 30 void (*mpc_oem_pci_bus)(struct mpc_bus *m);
30 void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable, 31 void (*smp_read_mpc_oem)(struct mpc_oemtable *oemtable,
31 unsigned short oemsize); 32 unsigned short oemsize);
32 int (*setup_ioapic_ids)(void); 33 int (*setup_ioapic_ids)(void);
33 int (*update_genapic)(void);
34}; 34};
35 35
36extern void x86_quirk_pre_intr_init(void);
37extern void x86_quirk_intr_init(void);
38
39extern void x86_quirk_trap_init(void);
40
41extern void x86_quirk_pre_time_init(void);
42extern void x86_quirk_time_init(void);
43
36#endif /* __ASSEMBLY__ */ 44#endif /* __ASSEMBLY__ */
37 45
38#ifdef __i386__ 46#ifdef __i386__
@@ -56,7 +64,11 @@ struct x86_quirks {
56#include <asm/bootparam.h> 64#include <asm/bootparam.h>
57 65
58/* Interrupt control for vSMPowered x86_64 systems */ 66/* Interrupt control for vSMPowered x86_64 systems */
67#ifdef CONFIG_X86_VSMP
59void vsmp_init(void); 68void vsmp_init(void);
69#else
70static inline void vsmp_init(void) { }
71#endif
60 72
61void setup_bios_corruption_check(void); 73void setup_bios_corruption_check(void);
62 74
@@ -68,8 +80,6 @@ static inline void visws_early_detect(void) { }
68static inline int is_visws_box(void) { return 0; } 80static inline int is_visws_box(void) { return 0; }
69#endif 81#endif
70 82
71extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
72extern int wakeup_secondary_cpu_via_init(int apicid, unsigned long start_eip);
73extern struct x86_quirks *x86_quirks; 83extern struct x86_quirks *x86_quirks;
74extern unsigned long saved_video_mode; 84extern unsigned long saved_video_mode;
75 85
@@ -99,7 +109,6 @@ extern unsigned long init_pg_tables_start;
99extern unsigned long init_pg_tables_end; 109extern unsigned long init_pg_tables_end;
100 110
101#else 111#else
102void __init x86_64_init_pda(void);
103void __init x86_64_start_kernel(char *real_mode); 112void __init x86_64_start_kernel(char *real_mode);
104void __init x86_64_start_reservations(char *real_mode_data); 113void __init x86_64_start_reservations(char *real_mode_data);
105 114
diff --git a/arch/x86/include/asm/mach-default/setup_arch.h b/arch/x86/include/asm/setup_arch.h
index 38846208b548..38846208b548 100644
--- a/arch/x86/include/asm/mach-default/setup_arch.h
+++ b/arch/x86/include/asm/setup_arch.h
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 19953df61c52..47d0e21f2b9e 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -15,34 +15,8 @@
15# include <asm/io_apic.h> 15# include <asm/io_apic.h>
16# endif 16# endif
17#endif 17#endif
18#include <asm/pda.h>
19#include <asm/thread_info.h> 18#include <asm/thread_info.h>
20 19#include <asm/cpumask.h>
21#ifdef CONFIG_X86_64
22
23extern cpumask_var_t cpu_callin_mask;
24extern cpumask_var_t cpu_callout_mask;
25extern cpumask_var_t cpu_initialized_mask;
26extern cpumask_var_t cpu_sibling_setup_mask;
27
28#else /* CONFIG_X86_32 */
29
30extern cpumask_t cpu_callin_map;
31extern cpumask_t cpu_callout_map;
32extern cpumask_t cpu_initialized;
33extern cpumask_t cpu_sibling_setup_map;
34
35#define cpu_callin_mask ((struct cpumask *)&cpu_callin_map)
36#define cpu_callout_mask ((struct cpumask *)&cpu_callout_map)
37#define cpu_initialized_mask ((struct cpumask *)&cpu_initialized)
38#define cpu_sibling_setup_mask ((struct cpumask *)&cpu_sibling_setup_map)
39
40#endif /* CONFIG_X86_32 */
41
42extern void (*mtrr_hook)(void);
43extern void zap_low_mappings(void);
44
45extern int __cpuinit get_local_pda(int cpu);
46 20
47extern int smp_num_siblings; 21extern int smp_num_siblings;
48extern unsigned int num_processors; 22extern unsigned int num_processors;
@@ -50,9 +24,7 @@ extern unsigned int num_processors;
50DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); 24DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
51DECLARE_PER_CPU(cpumask_t, cpu_core_map); 25DECLARE_PER_CPU(cpumask_t, cpu_core_map);
52DECLARE_PER_CPU(u16, cpu_llc_id); 26DECLARE_PER_CPU(u16, cpu_llc_id);
53#ifdef CONFIG_X86_32
54DECLARE_PER_CPU(int, cpu_number); 27DECLARE_PER_CPU(int, cpu_number);
55#endif
56 28
57static inline struct cpumask *cpu_sibling_mask(int cpu) 29static inline struct cpumask *cpu_sibling_mask(int cpu)
58{ 30{
@@ -167,8 +139,6 @@ void play_dead_common(void);
167void native_send_call_func_ipi(const struct cpumask *mask); 139void native_send_call_func_ipi(const struct cpumask *mask);
168void native_send_call_func_single_ipi(int cpu); 140void native_send_call_func_single_ipi(int cpu);
169 141
170extern void prefill_possible_map(void);
171
172void smp_store_cpu_info(int id); 142void smp_store_cpu_info(int id);
173#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) 143#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
174 144
@@ -177,10 +147,6 @@ static inline int num_booting_cpus(void)
177{ 147{
178 return cpumask_weight(cpu_callout_mask); 148 return cpumask_weight(cpu_callout_mask);
179} 149}
180#else
181static inline void prefill_possible_map(void)
182{
183}
184#endif /* CONFIG_SMP */ 150#endif /* CONFIG_SMP */
185 151
186extern unsigned disabled_cpus __cpuinitdata; 152extern unsigned disabled_cpus __cpuinitdata;
@@ -191,11 +157,11 @@ extern unsigned disabled_cpus __cpuinitdata;
191 * from the initial startup. We map APIC_BASE very early in page_setup(), 157 * from the initial startup. We map APIC_BASE very early in page_setup(),
192 * so this is correct in the x86 case. 158 * so this is correct in the x86 case.
193 */ 159 */
194#define raw_smp_processor_id() (x86_read_percpu(cpu_number)) 160#define raw_smp_processor_id() (percpu_read(cpu_number))
195extern int safe_smp_processor_id(void); 161extern int safe_smp_processor_id(void);
196 162
197#elif defined(CONFIG_X86_64_SMP) 163#elif defined(CONFIG_X86_64_SMP)
198#define raw_smp_processor_id() read_pda(cpunumber) 164#define raw_smp_processor_id() (percpu_read(cpu_number))
199 165
200#define stack_smp_processor_id() \ 166#define stack_smp_processor_id() \
201({ \ 167({ \
@@ -205,10 +171,6 @@ extern int safe_smp_processor_id(void);
205}) 171})
206#define safe_smp_processor_id() smp_processor_id() 172#define safe_smp_processor_id() smp_processor_id()
207 173
208#else /* !CONFIG_X86_32_SMP && !CONFIG_X86_64_SMP */
209#define cpu_physical_id(cpu) boot_cpu_physical_apicid
210#define safe_smp_processor_id() 0
211#define stack_smp_processor_id() 0
212#endif 174#endif
213 175
214#ifdef CONFIG_X86_LOCAL_APIC 176#ifdef CONFIG_X86_LOCAL_APIC
@@ -220,28 +182,9 @@ static inline int logical_smp_processor_id(void)
220 return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR)); 182 return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
221} 183}
222 184
223#include <mach_apicdef.h>
224static inline unsigned int read_apic_id(void)
225{
226 unsigned int reg;
227
228 reg = *(u32 *)(APIC_BASE + APIC_ID);
229
230 return GET_APIC_ID(reg);
231}
232#endif 185#endif
233 186
234
235# if defined(APIC_DEFINITION) || defined(CONFIG_X86_64)
236extern int hard_smp_processor_id(void); 187extern int hard_smp_processor_id(void);
237# else
238#include <mach_apicdef.h>
239static inline int hard_smp_processor_id(void)
240{
241 /* we don't want to mark this access volatile - bad code generation */
242 return read_apic_id();
243}
244# endif /* APIC_DEFINITION */
245 188
246#else /* CONFIG_X86_LOCAL_APIC */ 189#else /* CONFIG_X86_LOCAL_APIC */
247 190
@@ -251,11 +194,5 @@ static inline int hard_smp_processor_id(void)
251 194
252#endif /* CONFIG_X86_LOCAL_APIC */ 195#endif /* CONFIG_X86_LOCAL_APIC */
253 196
254#ifdef CONFIG_X86_HAS_BOOT_CPU_ID
255extern unsigned char boot_cpu_id;
256#else
257#define boot_cpu_id 0
258#endif
259
260#endif /* __ASSEMBLY__ */ 197#endif /* __ASSEMBLY__ */
261#endif /* _ASM_X86_SMP_H */ 198#endif /* _ASM_X86_SMP_H */
diff --git a/arch/x86/include/asm/mach-default/smpboot_hooks.h b/arch/x86/include/asm/smpboot_hooks.h
index 23bf52103b89..1def60114906 100644
--- a/arch/x86/include/asm/mach-default/smpboot_hooks.h
+++ b/arch/x86/include/asm/smpboot_hooks.h
@@ -13,10 +13,10 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
13 CMOS_WRITE(0xa, 0xf); 13 CMOS_WRITE(0xa, 0xf);
14 local_flush_tlb(); 14 local_flush_tlb();
15 pr_debug("1.\n"); 15 pr_debug("1.\n");
16 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) = 16 *((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_high)) =
17 start_eip >> 4; 17 start_eip >> 4;
18 pr_debug("2.\n"); 18 pr_debug("2.\n");
19 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 19 *((volatile unsigned short *)phys_to_virt(apic->trampoline_phys_low)) =
20 start_eip & 0xf; 20 start_eip & 0xf;
21 pr_debug("3.\n"); 21 pr_debug("3.\n");
22} 22}
@@ -34,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void)
34 */ 34 */
35 CMOS_WRITE(0, 0xf); 35 CMOS_WRITE(0, 0xf);
36 36
37 *((volatile long *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0; 37 *((volatile long *)phys_to_virt(apic->trampoline_phys_low)) = 0;
38} 38}
39 39
40static inline void __init smpboot_setup_io_apic(void) 40static inline void __init smpboot_setup_io_apic(void)
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h
index 8247e94ac6b1..3a5696656680 100644
--- a/arch/x86/include/asm/spinlock.h
+++ b/arch/x86/include/asm/spinlock.h
@@ -172,70 +172,8 @@ static inline int __ticket_spin_is_contended(raw_spinlock_t *lock)
172 return (((tmp >> TICKET_SHIFT) - tmp) & ((1 << TICKET_SHIFT) - 1)) > 1; 172 return (((tmp >> TICKET_SHIFT) - tmp) & ((1 << TICKET_SHIFT) - 1)) > 1;
173} 173}
174 174
175#ifdef CONFIG_PARAVIRT 175#ifndef CONFIG_PARAVIRT
176/*
177 * Define virtualization-friendly old-style lock byte lock, for use in
178 * pv_lock_ops if desired.
179 *
180 * This differs from the pre-2.6.24 spinlock by always using xchgb
181 * rather than decb to take the lock; this allows it to use a
182 * zero-initialized lock structure. It also maintains a 1-byte
183 * contention counter, so that we can implement
184 * __byte_spin_is_contended.
185 */
186struct __byte_spinlock {
187 s8 lock;
188 s8 spinners;
189};
190
191static inline int __byte_spin_is_locked(raw_spinlock_t *lock)
192{
193 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
194 return bl->lock != 0;
195}
196
197static inline int __byte_spin_is_contended(raw_spinlock_t *lock)
198{
199 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
200 return bl->spinners != 0;
201}
202
203static inline void __byte_spin_lock(raw_spinlock_t *lock)
204{
205 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
206 s8 val = 1;
207
208 asm("1: xchgb %1, %0\n"
209 " test %1,%1\n"
210 " jz 3f\n"
211 " " LOCK_PREFIX "incb %2\n"
212 "2: rep;nop\n"
213 " cmpb $1, %0\n"
214 " je 2b\n"
215 " " LOCK_PREFIX "decb %2\n"
216 " jmp 1b\n"
217 "3:"
218 : "+m" (bl->lock), "+q" (val), "+m" (bl->spinners): : "memory");
219}
220
221static inline int __byte_spin_trylock(raw_spinlock_t *lock)
222{
223 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
224 u8 old = 1;
225
226 asm("xchgb %1,%0"
227 : "+m" (bl->lock), "+q" (old) : : "memory");
228 176
229 return old == 0;
230}
231
232static inline void __byte_spin_unlock(raw_spinlock_t *lock)
233{
234 struct __byte_spinlock *bl = (struct __byte_spinlock *)lock;
235 smp_wmb();
236 bl->lock = 0;
237}
238#else /* !CONFIG_PARAVIRT */
239static inline int __raw_spin_is_locked(raw_spinlock_t *lock) 177static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
240{ 178{
241 return __ticket_spin_is_locked(lock); 179 return __ticket_spin_is_locked(lock);
@@ -268,7 +206,7 @@ static __always_inline void __raw_spin_lock_flags(raw_spinlock_t *lock,
268 __raw_spin_lock(lock); 206 __raw_spin_lock(lock);
269} 207}
270 208
271#endif /* CONFIG_PARAVIRT */ 209#endif
272 210
273static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock) 211static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock)
274{ 212{
@@ -330,8 +268,7 @@ static inline int __raw_read_trylock(raw_rwlock_t *lock)
330{ 268{
331 atomic_t *count = (atomic_t *)lock; 269 atomic_t *count = (atomic_t *)lock;
332 270
333 atomic_dec(count); 271 if (atomic_dec_return(count) >= 0)
334 if (atomic_read(count) >= 0)
335 return 1; 272 return 1;
336 atomic_inc(count); 273 atomic_inc(count);
337 return 0; 274 return 0;
diff --git a/arch/x86/include/asm/stackprotector.h b/arch/x86/include/asm/stackprotector.h
new file mode 100644
index 000000000000..c2d742c6e15f
--- /dev/null
+++ b/arch/x86/include/asm/stackprotector.h
@@ -0,0 +1,124 @@
1/*
2 * GCC stack protector support.
3 *
4 * Stack protector works by putting predefined pattern at the start of
5 * the stack frame and verifying that it hasn't been overwritten when
6 * returning from the function. The pattern is called stack canary
7 * and unfortunately gcc requires it to be at a fixed offset from %gs.
8 * On x86_64, the offset is 40 bytes and on x86_32 20 bytes. x86_64
9 * and x86_32 use segment registers differently and thus handles this
10 * requirement differently.
11 *
12 * On x86_64, %gs is shared by percpu area and stack canary. All
13 * percpu symbols are zero based and %gs points to the base of percpu
14 * area. The first occupant of the percpu area is always
15 * irq_stack_union which contains stack_canary at offset 40. Userland
16 * %gs is always saved and restored on kernel entry and exit using
17 * swapgs, so stack protector doesn't add any complexity there.
18 *
19 * On x86_32, it's slightly more complicated. As in x86_64, %gs is
20 * used for userland TLS. Unfortunately, some processors are much
21 * slower at loading segment registers with different value when
22 * entering and leaving the kernel, so the kernel uses %fs for percpu
23 * area and manages %gs lazily so that %gs is switched only when
24 * necessary, usually during task switch.
25 *
26 * As gcc requires the stack canary at %gs:20, %gs can't be managed
27 * lazily if stack protector is enabled, so the kernel saves and
28 * restores userland %gs on kernel entry and exit. This behavior is
29 * controlled by CONFIG_X86_32_LAZY_GS and accessors are defined in
30 * system.h to hide the details.
31 */
32
33#ifndef _ASM_STACKPROTECTOR_H
34#define _ASM_STACKPROTECTOR_H 1
35
36#ifdef CONFIG_CC_STACKPROTECTOR
37
38#include <asm/tsc.h>
39#include <asm/processor.h>
40#include <asm/percpu.h>
41#include <asm/system.h>
42#include <asm/desc.h>
43#include <linux/random.h>
44
45/*
46 * 24 byte read-only segment initializer for stack canary. Linker
47 * can't handle the address bit shifting. Address will be set in
48 * head_32 for boot CPU and setup_per_cpu_areas() for others.
49 */
50#define GDT_STACK_CANARY_INIT \
51 [GDT_ENTRY_STACK_CANARY] = { { { 0x00000018, 0x00409000 } } },
52
53/*
54 * Initialize the stackprotector canary value.
55 *
56 * NOTE: this must only be called from functions that never return,
57 * and it must always be inlined.
58 */
59static __always_inline void boot_init_stack_canary(void)
60{
61 u64 canary;
62 u64 tsc;
63
64#ifdef CONFIG_X86_64
65 BUILD_BUG_ON(offsetof(union irq_stack_union, stack_canary) != 40);
66#endif
67 /*
68 * We both use the random pool and the current TSC as a source
69 * of randomness. The TSC only matters for very early init,
70 * there it already has some randomness on most systems. Later
71 * on during the bootup the random pool has true entropy too.
72 */
73 get_random_bytes(&canary, sizeof(canary));
74 tsc = __native_read_tsc();
75 canary += tsc + (tsc << 32UL);
76
77 current->stack_canary = canary;
78#ifdef CONFIG_X86_64
79 percpu_write(irq_stack_union.stack_canary, canary);
80#else
81 percpu_write(stack_canary, canary);
82#endif
83}
84
85static inline void setup_stack_canary_segment(int cpu)
86{
87#ifdef CONFIG_X86_32
88 unsigned long canary = (unsigned long)&per_cpu(stack_canary, cpu) - 20;
89 struct desc_struct *gdt_table = get_cpu_gdt_table(cpu);
90 struct desc_struct desc;
91
92 desc = gdt_table[GDT_ENTRY_STACK_CANARY];
93 desc.base0 = canary & 0xffff;
94 desc.base1 = (canary >> 16) & 0xff;
95 desc.base2 = (canary >> 24) & 0xff;
96 write_gdt_entry(gdt_table, GDT_ENTRY_STACK_CANARY, &desc, DESCTYPE_S);
97#endif
98}
99
100static inline void load_stack_canary_segment(void)
101{
102#ifdef CONFIG_X86_32
103 asm("mov %0, %%gs" : : "r" (__KERNEL_STACK_CANARY) : "memory");
104#endif
105}
106
107#else /* CC_STACKPROTECTOR */
108
109#define GDT_STACK_CANARY_INIT
110
111/* dummy boot_init_stack_canary() is defined in linux/stackprotector.h */
112
113static inline void setup_stack_canary_segment(int cpu)
114{ }
115
116static inline void load_stack_canary_segment(void)
117{
118#ifdef CONFIG_X86_32
119 asm volatile ("mov %0, %%gs" : : "r" (0));
120#endif
121}
122
123#endif /* CC_STACKPROTECTOR */
124#endif /* _ASM_STACKPROTECTOR_H */
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
deleted file mode 100644
index 93d2c8667cfe..000000000000
--- a/arch/x86/include/asm/summit/apic.h
+++ /dev/null
@@ -1,202 +0,0 @@
1#ifndef __ASM_SUMMIT_APIC_H
2#define __ASM_SUMMIT_APIC_H
3
4#include <asm/smp.h>
5#include <linux/gfp.h>
6
7#define esr_disable (1)
8#define NO_BALANCE_IRQ (0)
9
10/* In clustered mode, the high nibble of APIC ID is a cluster number.
11 * The low nibble is a 4-bit bitmap. */
12#define XAPIC_DEST_CPUS_SHIFT 4
13#define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
14#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
15
16#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
17
18static inline const cpumask_t *target_cpus(void)
19{
20 /* CPU_MASK_ALL (0xff) has undefined behaviour with
21 * dest_LowestPrio mode logical clustered apic interrupt routing
22 * Just start on cpu 0. IRQ balancing will spread load
23 */
24 return &cpumask_of_cpu(0);
25}
26
27#define INT_DELIVERY_MODE (dest_LowestPrio)
28#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
29
30static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
31{
32 return 0;
33}
34
35/* we don't use the phys_cpu_present_map to indicate apicid presence */
36static inline unsigned long check_apicid_present(int bit)
37{
38 return 1;
39}
40
41#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
42
43extern u8 cpu_2_logical_apicid[];
44
45static inline void init_apic_ldr(void)
46{
47 unsigned long val, id;
48 int count = 0;
49 u8 my_id = (u8)hard_smp_processor_id();
50 u8 my_cluster = (u8)apicid_cluster(my_id);
51#ifdef CONFIG_SMP
52 u8 lid;
53 int i;
54
55 /* Create logical APIC IDs by counting CPUs already in cluster. */
56 for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
57 lid = cpu_2_logical_apicid[i];
58 if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
59 ++count;
60 }
61#endif
62 /* We only have a 4 wide bitmap in cluster mode. If a deranged
63 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
64 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
65 id = my_cluster | (1UL << count);
66 apic_write(APIC_DFR, APIC_DFR_VALUE);
67 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
68 val |= SET_APIC_LOGICAL_ID(id);
69 apic_write(APIC_LDR, val);
70}
71
72static inline int multi_timer_check(int apic, int irq)
73{
74 return 0;
75}
76
77static inline int apic_id_registered(void)
78{
79 return 1;
80}
81
82static inline void setup_apic_routing(void)
83{
84 printk("Enabling APIC mode: Summit. Using %d I/O APICs\n",
85 nr_ioapics);
86}
87
88static inline int apicid_to_node(int logical_apicid)
89{
90#ifdef CONFIG_SMP
91 return apicid_2_node[hard_smp_processor_id()];
92#else
93 return 0;
94#endif
95}
96
97/* Mapping from cpu number to logical apicid */
98static inline int cpu_to_logical_apicid(int cpu)
99{
100#ifdef CONFIG_SMP
101 if (cpu >= nr_cpu_ids)
102 return BAD_APICID;
103 return (int)cpu_2_logical_apicid[cpu];
104#else
105 return logical_smp_processor_id();
106#endif
107}
108
109static inline int cpu_present_to_apicid(int mps_cpu)
110{
111 if (mps_cpu < nr_cpu_ids)
112 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
113 else
114 return BAD_APICID;
115}
116
117static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)
118{
119 /* For clustered we don't have a good way to do this yet - hack */
120 return physids_promote(0x0F);
121}
122
123static inline physid_mask_t apicid_to_cpu_present(int apicid)
124{
125 return physid_mask_of_physid(0);
126}
127
128static inline void setup_portio_remap(void)
129{
130}
131
132static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
133{
134 return 1;
135}
136
137static inline void enable_apic_mode(void)
138{
139}
140
141static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
142{
143 int num_bits_set;
144 int cpus_found = 0;
145 int cpu;
146 int apicid;
147
148 num_bits_set = cpus_weight(*cpumask);
149 /* Return id to all */
150 if (num_bits_set >= nr_cpu_ids)
151 return (int) 0xFF;
152 /*
153 * The cpus in the mask must all be on the apic cluster. If are not
154 * on the same apicid cluster return default value of TARGET_CPUS.
155 */
156 cpu = first_cpu(*cpumask);
157 apicid = cpu_to_logical_apicid(cpu);
158 while (cpus_found < num_bits_set) {
159 if (cpu_isset(cpu, *cpumask)) {
160 int new_apicid = cpu_to_logical_apicid(cpu);
161 if (apicid_cluster(apicid) !=
162 apicid_cluster(new_apicid)){
163 printk ("%s: Not a valid mask!\n", __func__);
164 return 0xFF;
165 }
166 apicid = apicid | new_apicid;
167 cpus_found++;
168 }
169 cpu++;
170 }
171 return apicid;
172}
173
174static inline unsigned int cpu_mask_to_apicid_and(const struct cpumask *inmask,
175 const struct cpumask *andmask)
176{
177 int apicid = cpu_to_logical_apicid(0);
178 cpumask_var_t cpumask;
179
180 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
181 return apicid;
182
183 cpumask_and(cpumask, inmask, andmask);
184 cpumask_and(cpumask, cpumask, cpu_online_mask);
185 apicid = cpu_mask_to_apicid(cpumask);
186
187 free_cpumask_var(cpumask);
188 return apicid;
189}
190
191/* cpuid returns the value latched in the HW at reset, not the APIC ID
192 * register's value. For any box whose BIOS changes APIC IDs, like
193 * clustered APIC systems, we must use hard_smp_processor_id.
194 *
195 * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
196 */
197static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
198{
199 return hard_smp_processor_id() >> index_msb;
200}
201
202#endif /* __ASM_SUMMIT_APIC_H */
diff --git a/arch/x86/include/asm/summit/apicdef.h b/arch/x86/include/asm/summit/apicdef.h
deleted file mode 100644
index f3fbca1f61c1..000000000000
--- a/arch/x86/include/asm/summit/apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ASM_SUMMIT_APICDEF_H
2#define __ASM_SUMMIT_APICDEF_H
3
4#define APIC_ID_MASK (0xFF<<24)
5
6static inline unsigned get_apic_id(unsigned long x)
7{
8 return (x>>24)&0xFF;
9}
10
11#define GET_APIC_ID(x) get_apic_id(x)
12
13#endif
diff --git a/arch/x86/include/asm/summit/ipi.h b/arch/x86/include/asm/summit/ipi.h
deleted file mode 100644
index a8a2c24f50cc..000000000000
--- a/arch/x86/include/asm/summit/ipi.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef __ASM_SUMMIT_IPI_H
2#define __ASM_SUMMIT_IPI_H
3
4void send_IPI_mask_sequence(const cpumask_t *mask, int vector);
5void send_IPI_mask_allbutself(const cpumask_t *mask, int vector);
6
7static inline void send_IPI_mask(const cpumask_t *mask, int vector)
8{
9 send_IPI_mask_sequence(mask, vector);
10}
11
12static inline void send_IPI_allbutself(int vector)
13{
14 cpumask_t mask = cpu_online_map;
15 cpu_clear(smp_processor_id(), mask);
16
17 if (!cpus_empty(mask))
18 send_IPI_mask(&mask, vector);
19}
20
21static inline void send_IPI_all(int vector)
22{
23 send_IPI_mask(&cpu_online_map, vector);
24}
25
26#endif /* __ASM_SUMMIT_IPI_H */
diff --git a/arch/x86/include/asm/summit/mpparse.h b/arch/x86/include/asm/summit/mpparse.h
deleted file mode 100644
index 380e86c02363..000000000000
--- a/arch/x86/include/asm/summit/mpparse.h
+++ /dev/null
@@ -1,109 +0,0 @@
1#ifndef __ASM_SUMMIT_MPPARSE_H
2#define __ASM_SUMMIT_MPPARSE_H
3
4#include <asm/tsc.h>
5
6extern int use_cyclone;
7
8#ifdef CONFIG_X86_SUMMIT_NUMA
9extern void setup_summit(void);
10#else
11#define setup_summit() {}
12#endif
13
14static inline int mps_oem_check(struct mpc_table *mpc, char *oem,
15 char *productid)
16{
17 if (!strncmp(oem, "IBM ENSW", 8) &&
18 (!strncmp(productid, "VIGIL SMP", 9)
19 || !strncmp(productid, "EXA", 3)
20 || !strncmp(productid, "RUTHLESS SMP", 12))){
21 mark_tsc_unstable("Summit based system");
22 use_cyclone = 1; /*enable cyclone-timer*/
23 setup_summit();
24 return 1;
25 }
26 return 0;
27}
28
29/* Hook from generic ACPI tables.c */
30static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
31{
32 if (!strncmp(oem_id, "IBM", 3) &&
33 (!strncmp(oem_table_id, "SERVIGIL", 8)
34 || !strncmp(oem_table_id, "EXA", 3))){
35 mark_tsc_unstable("Summit based system");
36 use_cyclone = 1; /*enable cyclone-timer*/
37 setup_summit();
38 return 1;
39 }
40 return 0;
41}
42
43struct rio_table_hdr {
44 unsigned char version; /* Version number of this data structure */
45 /* Version 3 adds chassis_num & WP_index */
46 unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil) */
47 unsigned char num_rio_dev; /* # of RIO I/O devices (Cyclones and Winnipegs) */
48} __attribute__((packed));
49
50struct scal_detail {
51 unsigned char node_id; /* Scalability Node ID */
52 unsigned long CBAR; /* Address of 1MB register space */
53 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
54 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
55 unsigned char port1node; /* Node ID port connected to: 0xFF = None */
56 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
57 unsigned char port2node; /* Node ID port connected to: 0xFF = None */
58 unsigned char port2port; /* Port num port connected to: 0,1,2, or 0xFF=None */
59 unsigned char chassis_num; /* 1 based Chassis number (1 = boot node) */
60} __attribute__((packed));
61
62struct rio_detail {
63 unsigned char node_id; /* RIO Node ID */
64 unsigned long BBAR; /* Address of 1MB register space */
65 unsigned char type; /* Type of device */
66 unsigned char owner_id; /* For WPEG: Node ID of Cyclone that owns this WPEG*/
67 /* For CYC: Node ID of Twister that owns this CYC */
68 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
69 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
70 unsigned char port1node; /* Node ID port connected to: 0xFF=None */
71 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
72 unsigned char first_slot; /* For WPEG: Lowest slot number below this WPEG */
73 /* For CYC: 0 */
74 unsigned char status; /* For WPEG: Bit 0 = 1 : the XAPIC is used */
75 /* = 0 : the XAPIC is not used, ie:*/
76 /* ints fwded to another XAPIC */
77 /* Bits1:7 Reserved */
78 /* For CYC: Bits0:7 Reserved */
79 unsigned char WP_index; /* For WPEG: WPEG instance index - lower ones have */
80 /* lower slot numbers/PCI bus numbers */
81 /* For CYC: No meaning */
82 unsigned char chassis_num; /* 1 based Chassis number */
83 /* For LookOut WPEGs this field indicates the */
84 /* Expansion Chassis #, enumerated from Boot */
85 /* Node WPEG external port, then Boot Node CYC */
86 /* external port, then Next Vigil chassis WPEG */
87 /* external port, etc. */
88 /* Shared Lookouts have only 1 chassis number (the */
89 /* first one assigned) */
90} __attribute__((packed));
91
92
93typedef enum {
94 CompatTwister = 0, /* Compatibility Twister */
95 AltTwister = 1, /* Alternate Twister of internal 8-way */
96 CompatCyclone = 2, /* Compatibility Cyclone */
97 AltCyclone = 3, /* Alternate Cyclone of internal 8-way */
98 CompatWPEG = 4, /* Compatibility WPEG */
99 AltWPEG = 5, /* Second Planar WPEG */
100 LookOutAWPEG = 6, /* LookOut WPEG */
101 LookOutBWPEG = 7, /* LookOut WPEG */
102} node_type;
103
104static inline int is_WPEG(struct rio_detail *rio){
105 return (rio->type == CompatWPEG || rio->type == AltWPEG ||
106 rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
107}
108
109#endif /* __ASM_SUMMIT_MPPARSE_H */
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index e26d34b0bc79..7043408f6904 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -29,21 +29,21 @@ asmlinkage int sys_get_thread_area(struct user_desc __user *);
29/* X86_32 only */ 29/* X86_32 only */
30#ifdef CONFIG_X86_32 30#ifdef CONFIG_X86_32
31/* kernel/process_32.c */ 31/* kernel/process_32.c */
32asmlinkage int sys_fork(struct pt_regs); 32int sys_fork(struct pt_regs *);
33asmlinkage int sys_clone(struct pt_regs); 33int sys_clone(struct pt_regs *);
34asmlinkage int sys_vfork(struct pt_regs); 34int sys_vfork(struct pt_regs *);
35asmlinkage int sys_execve(struct pt_regs); 35int sys_execve(struct pt_regs *);
36 36
37/* kernel/signal_32.c */ 37/* kernel/signal_32.c */
38asmlinkage int sys_sigsuspend(int, int, old_sigset_t); 38asmlinkage int sys_sigsuspend(int, int, old_sigset_t);
39asmlinkage int sys_sigaction(int, const struct old_sigaction __user *, 39asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
40 struct old_sigaction __user *); 40 struct old_sigaction __user *);
41asmlinkage int sys_sigaltstack(unsigned long); 41int sys_sigaltstack(struct pt_regs *);
42asmlinkage unsigned long sys_sigreturn(unsigned long); 42unsigned long sys_sigreturn(struct pt_regs *);
43asmlinkage int sys_rt_sigreturn(unsigned long); 43long sys_rt_sigreturn(struct pt_regs *);
44 44
45/* kernel/ioport.c */ 45/* kernel/ioport.c */
46asmlinkage long sys_iopl(unsigned long); 46long sys_iopl(struct pt_regs *);
47 47
48/* kernel/sys_i386_32.c */ 48/* kernel/sys_i386_32.c */
49asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long, 49asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
@@ -59,8 +59,8 @@ struct oldold_utsname;
59asmlinkage int sys_olduname(struct oldold_utsname __user *); 59asmlinkage int sys_olduname(struct oldold_utsname __user *);
60 60
61/* kernel/vm86_32.c */ 61/* kernel/vm86_32.c */
62asmlinkage int sys_vm86old(struct pt_regs); 62int sys_vm86old(struct pt_regs *);
63asmlinkage int sys_vm86(struct pt_regs); 63int sys_vm86(struct pt_regs *);
64 64
65#else /* CONFIG_X86_32 */ 65#else /* CONFIG_X86_32 */
66 66
@@ -82,7 +82,7 @@ asmlinkage long sys_iopl(unsigned int, struct pt_regs *);
82/* kernel/signal_64.c */ 82/* kernel/signal_64.c */
83asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *, 83asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *,
84 struct pt_regs *); 84 struct pt_regs *);
85asmlinkage long sys_rt_sigreturn(struct pt_regs *); 85long sys_rt_sigreturn(struct pt_regs *);
86 86
87/* kernel/sys_x86_64.c */ 87/* kernel/sys_x86_64.c */
88asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long, 88asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h
index 8e626ea33a1a..643c59b4bc6e 100644
--- a/arch/x86/include/asm/system.h
+++ b/arch/x86/include/asm/system.h
@@ -20,9 +20,26 @@
20struct task_struct; /* one of the stranger aspects of C forward declarations */ 20struct task_struct; /* one of the stranger aspects of C forward declarations */
21struct task_struct *__switch_to(struct task_struct *prev, 21struct task_struct *__switch_to(struct task_struct *prev,
22 struct task_struct *next); 22 struct task_struct *next);
23struct tss_struct;
24void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
25 struct tss_struct *tss);
23 26
24#ifdef CONFIG_X86_32 27#ifdef CONFIG_X86_32
25 28
29#ifdef CONFIG_CC_STACKPROTECTOR
30#define __switch_canary \
31 "movl %P[task_canary](%[next]), %%ebx\n\t" \
32 "movl %%ebx, "__percpu_arg([stack_canary])"\n\t"
33#define __switch_canary_oparam \
34 , [stack_canary] "=m" (per_cpu_var(stack_canary))
35#define __switch_canary_iparam \
36 , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
37#else /* CC_STACKPROTECTOR */
38#define __switch_canary
39#define __switch_canary_oparam
40#define __switch_canary_iparam
41#endif /* CC_STACKPROTECTOR */
42
26/* 43/*
27 * Saving eflags is important. It switches not only IOPL between tasks, 44 * Saving eflags is important. It switches not only IOPL between tasks,
28 * it also protects other tasks from NT leaking through sysenter etc. 45 * it also protects other tasks from NT leaking through sysenter etc.
@@ -44,6 +61,7 @@ do { \
44 "movl %[next_sp],%%esp\n\t" /* restore ESP */ \ 61 "movl %[next_sp],%%esp\n\t" /* restore ESP */ \
45 "movl $1f,%[prev_ip]\n\t" /* save EIP */ \ 62 "movl $1f,%[prev_ip]\n\t" /* save EIP */ \
46 "pushl %[next_ip]\n\t" /* restore EIP */ \ 63 "pushl %[next_ip]\n\t" /* restore EIP */ \
64 __switch_canary \
47 "jmp __switch_to\n" /* regparm call */ \ 65 "jmp __switch_to\n" /* regparm call */ \
48 "1:\t" \ 66 "1:\t" \
49 "popl %%ebp\n\t" /* restore EBP */ \ 67 "popl %%ebp\n\t" /* restore EBP */ \
@@ -58,6 +76,8 @@ do { \
58 "=b" (ebx), "=c" (ecx), "=d" (edx), \ 76 "=b" (ebx), "=c" (ecx), "=d" (edx), \
59 "=S" (esi), "=D" (edi) \ 77 "=S" (esi), "=D" (edi) \
60 \ 78 \
79 __switch_canary_oparam \
80 \
61 /* input parameters: */ \ 81 /* input parameters: */ \
62 : [next_sp] "m" (next->thread.sp), \ 82 : [next_sp] "m" (next->thread.sp), \
63 [next_ip] "m" (next->thread.ip), \ 83 [next_ip] "m" (next->thread.ip), \
@@ -66,6 +86,8 @@ do { \
66 [prev] "a" (prev), \ 86 [prev] "a" (prev), \
67 [next] "d" (next) \ 87 [next] "d" (next) \
68 \ 88 \
89 __switch_canary_iparam \
90 \
69 : /* reloaded segment registers */ \ 91 : /* reloaded segment registers */ \
70 "memory"); \ 92 "memory"); \
71} while (0) 93} while (0)
@@ -86,27 +108,44 @@ do { \
86 , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \ 108 , "rcx", "rbx", "rdx", "r8", "r9", "r10", "r11", \
87 "r12", "r13", "r14", "r15" 109 "r12", "r13", "r14", "r15"
88 110
111#ifdef CONFIG_CC_STACKPROTECTOR
112#define __switch_canary \
113 "movq %P[task_canary](%%rsi),%%r8\n\t" \
114 "movq %%r8,"__percpu_arg([gs_canary])"\n\t"
115#define __switch_canary_oparam \
116 , [gs_canary] "=m" (per_cpu_var(irq_stack_union.stack_canary))
117#define __switch_canary_iparam \
118 , [task_canary] "i" (offsetof(struct task_struct, stack_canary))
119#else /* CC_STACKPROTECTOR */
120#define __switch_canary
121#define __switch_canary_oparam
122#define __switch_canary_iparam
123#endif /* CC_STACKPROTECTOR */
124
89/* Save restore flags to clear handle leaking NT */ 125/* Save restore flags to clear handle leaking NT */
90#define switch_to(prev, next, last) \ 126#define switch_to(prev, next, last) \
91 asm volatile(SAVE_CONTEXT \ 127 asm volatile(SAVE_CONTEXT \
92 "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \ 128 "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \
93 "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \ 129 "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \
94 "call __switch_to\n\t" \ 130 "call __switch_to\n\t" \
95 ".globl thread_return\n" \ 131 ".globl thread_return\n" \
96 "thread_return:\n\t" \ 132 "thread_return:\n\t" \
97 "movq %%gs:%P[pda_pcurrent],%%rsi\n\t" \ 133 "movq "__percpu_arg([current_task])",%%rsi\n\t" \
134 __switch_canary \
98 "movq %P[thread_info](%%rsi),%%r8\n\t" \ 135 "movq %P[thread_info](%%rsi),%%r8\n\t" \
99 LOCK_PREFIX "btr %[tif_fork],%P[ti_flags](%%r8)\n\t" \
100 "movq %%rax,%%rdi\n\t" \ 136 "movq %%rax,%%rdi\n\t" \
101 "jc ret_from_fork\n\t" \ 137 "testl %[_tif_fork],%P[ti_flags](%%r8)\n\t" \
138 "jnz ret_from_fork\n\t" \
102 RESTORE_CONTEXT \ 139 RESTORE_CONTEXT \
103 : "=a" (last) \ 140 : "=a" (last) \
141 __switch_canary_oparam \
104 : [next] "S" (next), [prev] "D" (prev), \ 142 : [next] "S" (next), [prev] "D" (prev), \
105 [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \ 143 [threadrsp] "i" (offsetof(struct task_struct, thread.sp)), \
106 [ti_flags] "i" (offsetof(struct thread_info, flags)), \ 144 [ti_flags] "i" (offsetof(struct thread_info, flags)), \
107 [tif_fork] "i" (TIF_FORK), \ 145 [_tif_fork] "i" (_TIF_FORK), \
108 [thread_info] "i" (offsetof(struct task_struct, stack)), \ 146 [thread_info] "i" (offsetof(struct task_struct, stack)), \
109 [pda_pcurrent] "i" (offsetof(struct x8664_pda, pcurrent)) \ 147 [current_task] "m" (per_cpu_var(current_task)) \
148 __switch_canary_iparam \
110 : "memory", "cc" __EXTRA_CLOBBER) 149 : "memory", "cc" __EXTRA_CLOBBER)
111#endif 150#endif
112 151
@@ -165,6 +204,25 @@ extern void native_load_gs_index(unsigned);
165#define savesegment(seg, value) \ 204#define savesegment(seg, value) \
166 asm("mov %%" #seg ",%0":"=r" (value) : : "memory") 205 asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
167 206
207/*
208 * x86_32 user gs accessors.
209 */
210#ifdef CONFIG_X86_32
211#ifdef CONFIG_X86_32_LAZY_GS
212#define get_user_gs(regs) (u16)({unsigned long v; savesegment(gs, v); v;})
213#define set_user_gs(regs, v) loadsegment(gs, (unsigned long)(v))
214#define task_user_gs(tsk) ((tsk)->thread.gs)
215#define lazy_save_gs(v) savesegment(gs, (v))
216#define lazy_load_gs(v) loadsegment(gs, (v))
217#else /* X86_32_LAZY_GS */
218#define get_user_gs(regs) (u16)((regs)->gs)
219#define set_user_gs(regs, v) do { (regs)->gs = (v); } while (0)
220#define task_user_gs(tsk) (task_pt_regs(tsk)->gs)
221#define lazy_save_gs(v) do { } while (0)
222#define lazy_load_gs(v) do { } while (0)
223#endif /* X86_32_LAZY_GS */
224#endif /* X86_32 */
225
168static inline unsigned long get_limit(unsigned long segment) 226static inline unsigned long get_limit(unsigned long segment)
169{ 227{
170 unsigned long __limit; 228 unsigned long __limit;
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index 98789647baa9..df9d5f78385e 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -40,6 +40,7 @@ struct thread_info {
40 */ 40 */
41 __u8 supervisor_stack[0]; 41 __u8 supervisor_stack[0];
42#endif 42#endif
43 int uaccess_err;
43}; 44};
44 45
45#define INIT_THREAD_INFO(tsk) \ 46#define INIT_THREAD_INFO(tsk) \
@@ -194,25 +195,21 @@ static inline struct thread_info *current_thread_info(void)
194 195
195#else /* X86_32 */ 196#else /* X86_32 */
196 197
197#include <asm/pda.h> 198#include <asm/percpu.h>
199#define KERNEL_STACK_OFFSET (5*8)
198 200
199/* 201/*
200 * macros/functions for gaining access to the thread information structure 202 * macros/functions for gaining access to the thread information structure
201 * preempt_count needs to be 1 initially, until the scheduler is functional. 203 * preempt_count needs to be 1 initially, until the scheduler is functional.
202 */ 204 */
203#ifndef __ASSEMBLY__ 205#ifndef __ASSEMBLY__
204static inline struct thread_info *current_thread_info(void) 206DECLARE_PER_CPU(unsigned long, kernel_stack);
205{
206 struct thread_info *ti;
207 ti = (void *)(read_pda(kernelstack) + PDA_STACKOFFSET - THREAD_SIZE);
208 return ti;
209}
210 207
211/* do not use in interrupt context */ 208static inline struct thread_info *current_thread_info(void)
212static inline struct thread_info *stack_thread_info(void)
213{ 209{
214 struct thread_info *ti; 210 struct thread_info *ti;
215 asm("andq %%rsp,%0; " : "=r" (ti) : "0" (~(THREAD_SIZE - 1))); 211 ti = (void *)(percpu_read(kernel_stack) +
212 KERNEL_STACK_OFFSET - THREAD_SIZE);
216 return ti; 213 return ti;
217} 214}
218 215
@@ -220,8 +217,8 @@ static inline struct thread_info *stack_thread_info(void)
220 217
221/* how to get the thread information struct from ASM */ 218/* how to get the thread information struct from ASM */
222#define GET_THREAD_INFO(reg) \ 219#define GET_THREAD_INFO(reg) \
223 movq %gs:pda_kernelstack,reg ; \ 220 movq PER_CPU_VAR(kernel_stack),reg ; \
224 subq $(THREAD_SIZE-PDA_STACKOFFSET),reg 221 subq $(THREAD_SIZE-KERNEL_STACK_OFFSET),reg
225 222
226#endif 223#endif
227 224
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
index 4f5c24724856..a81195eaa2b3 100644
--- a/arch/x86/include/asm/timer.h
+++ b/arch/x86/include/asm/timer.h
@@ -3,6 +3,7 @@
3#include <linux/init.h> 3#include <linux/init.h>
4#include <linux/pm.h> 4#include <linux/pm.h>
5#include <linux/percpu.h> 5#include <linux/percpu.h>
6#include <linux/interrupt.h>
6 7
7#define TICK_SIZE (tick_nsec / 1000) 8#define TICK_SIZE (tick_nsec / 1000)
8 9
@@ -11,8 +12,9 @@ unsigned long native_calibrate_tsc(void);
11 12
12#ifdef CONFIG_X86_32 13#ifdef CONFIG_X86_32
13extern int timer_ack; 14extern int timer_ack;
14#endif
15extern int recalibrate_cpu_khz(void); 15extern int recalibrate_cpu_khz(void);
16extern irqreturn_t timer_interrupt(int irq, void *dev_id);
17#endif /* CONFIG_X86_32 */
16 18
17extern int no_timer_check; 19extern int no_timer_check;
18 20
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 0e7bbb549116..d3539f998f88 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -113,7 +113,7 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
113 __flush_tlb(); 113 __flush_tlb();
114} 114}
115 115
116static inline void native_flush_tlb_others(const cpumask_t *cpumask, 116static inline void native_flush_tlb_others(const struct cpumask *cpumask,
117 struct mm_struct *mm, 117 struct mm_struct *mm,
118 unsigned long va) 118 unsigned long va)
119{ 119{
@@ -142,31 +142,28 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
142 flush_tlb_mm(vma->vm_mm); 142 flush_tlb_mm(vma->vm_mm);
143} 143}
144 144
145void native_flush_tlb_others(const cpumask_t *cpumask, struct mm_struct *mm, 145void native_flush_tlb_others(const struct cpumask *cpumask,
146 unsigned long va); 146 struct mm_struct *mm, unsigned long va);
147 147
148#define TLBSTATE_OK 1 148#define TLBSTATE_OK 1
149#define TLBSTATE_LAZY 2 149#define TLBSTATE_LAZY 2
150 150
151#ifdef CONFIG_X86_32
152struct tlb_state { 151struct tlb_state {
153 struct mm_struct *active_mm; 152 struct mm_struct *active_mm;
154 int state; 153 int state;
155 char __cacheline_padding[L1_CACHE_BYTES-8];
156}; 154};
157DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate); 155DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);
158 156
159void reset_lazy_tlbstate(void);
160#else
161static inline void reset_lazy_tlbstate(void) 157static inline void reset_lazy_tlbstate(void)
162{ 158{
159 percpu_write(cpu_tlbstate.state, 0);
160 percpu_write(cpu_tlbstate.active_mm, &init_mm);
163} 161}
164#endif
165 162
166#endif /* SMP */ 163#endif /* SMP */
167 164
168#ifndef CONFIG_PARAVIRT 165#ifndef CONFIG_PARAVIRT
169#define flush_tlb_others(mask, mm, va) native_flush_tlb_others(&mask, mm, va) 166#define flush_tlb_others(mask, mm, va) native_flush_tlb_others(mask, mm, va)
170#endif 167#endif
171 168
172static inline void flush_tlb_kernel_range(unsigned long start, 169static inline void flush_tlb_kernel_range(unsigned long start,
@@ -175,4 +172,6 @@ static inline void flush_tlb_kernel_range(unsigned long start,
175 flush_tlb_all(); 172 flush_tlb_all();
176} 173}
177 174
175extern void zap_low_mappings(void);
176
178#endif /* _ASM_X86_TLBFLUSH_H */ 177#endif /* _ASM_X86_TLBFLUSH_H */
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 4e2f2e0aab27..77cfb2cfb386 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -74,6 +74,8 @@ static inline const struct cpumask *cpumask_of_node(int node)
74 return &node_to_cpumask_map[node]; 74 return &node_to_cpumask_map[node];
75} 75}
76 76
77static inline void setup_node_to_cpumask_map(void) { }
78
77#else /* CONFIG_X86_64 */ 79#else /* CONFIG_X86_64 */
78 80
79/* Mappings between node number and cpus on that node. */ 81/* Mappings between node number and cpus on that node. */
@@ -83,7 +85,8 @@ extern cpumask_t *node_to_cpumask_map;
83DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map); 85DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map);
84 86
85/* Returns the number of the current Node. */ 87/* Returns the number of the current Node. */
86#define numa_node_id() read_pda(nodenumber) 88DECLARE_PER_CPU(int, node_number);
89#define numa_node_id() percpu_read(node_number)
87 90
88#ifdef CONFIG_DEBUG_PER_CPU_MAPS 91#ifdef CONFIG_DEBUG_PER_CPU_MAPS
89extern int cpu_to_node(int cpu); 92extern int cpu_to_node(int cpu);
@@ -102,10 +105,7 @@ static inline int cpu_to_node(int cpu)
102/* Same function but used if called before per_cpu areas are setup */ 105/* Same function but used if called before per_cpu areas are setup */
103static inline int early_cpu_to_node(int cpu) 106static inline int early_cpu_to_node(int cpu)
104{ 107{
105 if (early_per_cpu_ptr(x86_cpu_to_node_map)) 108 return early_per_cpu(x86_cpu_to_node_map, cpu);
106 return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
107
108 return per_cpu(x86_cpu_to_node_map, cpu);
109} 109}
110 110
111/* Returns a pointer to the cpumask of CPUs on Node 'node'. */ 111/* Returns a pointer to the cpumask of CPUs on Node 'node'. */
@@ -122,6 +122,8 @@ static inline cpumask_t node_to_cpumask(int node)
122 122
123#endif /* !CONFIG_DEBUG_PER_CPU_MAPS */ 123#endif /* !CONFIG_DEBUG_PER_CPU_MAPS */
124 124
125extern void setup_node_to_cpumask_map(void);
126
125/* 127/*
126 * Replace default node_to_cpumask_ptr with optimized version 128 * Replace default node_to_cpumask_ptr with optimized version
127 * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)" 129 * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"
@@ -192,9 +194,20 @@ extern int __node_distance(int, int);
192 194
193#else /* !CONFIG_NUMA */ 195#else /* !CONFIG_NUMA */
194 196
195#define numa_node_id() 0 197static inline int numa_node_id(void)
196#define cpu_to_node(cpu) 0 198{
197#define early_cpu_to_node(cpu) 0 199 return 0;
200}
201
202static inline int cpu_to_node(int cpu)
203{
204 return 0;
205}
206
207static inline int early_cpu_to_node(int cpu)
208{
209 return 0;
210}
198 211
199static inline const cpumask_t *cpumask_of_node(int node) 212static inline const cpumask_t *cpumask_of_node(int node)
200{ 213{
@@ -209,6 +222,8 @@ static inline int node_to_first_cpu(int node)
209 return first_cpu(cpu_online_map); 222 return first_cpu(cpu_online_map);
210} 223}
211 224
225static inline void setup_node_to_cpumask_map(void) { }
226
212/* 227/*
213 * Replace default node_to_cpumask_ptr with optimized version 228 * Replace default node_to_cpumask_ptr with optimized version
214 * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)" 229 * Deprecated: use "const struct cpumask *mask = cpumask_of_node(node)"
diff --git a/arch/x86/include/asm/trampoline.h b/arch/x86/include/asm/trampoline.h
index 780ba0ab94f9..90f06c25221d 100644
--- a/arch/x86/include/asm/trampoline.h
+++ b/arch/x86/include/asm/trampoline.h
@@ -13,6 +13,7 @@ extern unsigned char *trampoline_base;
13 13
14extern unsigned long init_rsp; 14extern unsigned long init_rsp;
15extern unsigned long initial_code; 15extern unsigned long initial_code;
16extern unsigned long initial_gs;
16 17
17#define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE) 18#define TRAMPOLINE_SIZE roundup(trampoline_end - trampoline_data, PAGE_SIZE)
18#define TRAMPOLINE_BASE 0x6000 19#define TRAMPOLINE_BASE 0x6000
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index cf3bb053da0b..0d5342515b86 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -41,7 +41,7 @@ dotraplinkage void do_int3(struct pt_regs *, long);
41dotraplinkage void do_overflow(struct pt_regs *, long); 41dotraplinkage void do_overflow(struct pt_regs *, long);
42dotraplinkage void do_bounds(struct pt_regs *, long); 42dotraplinkage void do_bounds(struct pt_regs *, long);
43dotraplinkage void do_invalid_op(struct pt_regs *, long); 43dotraplinkage void do_invalid_op(struct pt_regs *, long);
44dotraplinkage void do_device_not_available(struct pt_regs); 44dotraplinkage void do_device_not_available(struct pt_regs *, long);
45dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long); 45dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *, long);
46dotraplinkage void do_invalid_TSS(struct pt_regs *, long); 46dotraplinkage void do_invalid_TSS(struct pt_regs *, long);
47dotraplinkage void do_segment_not_present(struct pt_regs *, long); 47dotraplinkage void do_segment_not_present(struct pt_regs *, long);
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 4340055b7559..b685ece89d5c 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -121,7 +121,7 @@ extern int __get_user_bad(void);
121 121
122#define __get_user_x(size, ret, x, ptr) \ 122#define __get_user_x(size, ret, x, ptr) \
123 asm volatile("call __get_user_" #size \ 123 asm volatile("call __get_user_" #size \
124 : "=a" (ret),"=d" (x) \ 124 : "=a" (ret), "=d" (x) \
125 : "0" (ptr)) \ 125 : "0" (ptr)) \
126 126
127/* Careful: we have to cast the result to the type of the pointer 127/* Careful: we have to cast the result to the type of the pointer
@@ -181,12 +181,12 @@ extern int __get_user_bad(void);
181 181
182#define __put_user_x(size, x, ptr, __ret_pu) \ 182#define __put_user_x(size, x, ptr, __ret_pu) \
183 asm volatile("call __put_user_" #size : "=a" (__ret_pu) \ 183 asm volatile("call __put_user_" #size : "=a" (__ret_pu) \
184 :"0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx") 184 : "0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")
185 185
186 186
187 187
188#ifdef CONFIG_X86_32 188#ifdef CONFIG_X86_32
189#define __put_user_u64(x, addr, err) \ 189#define __put_user_asm_u64(x, addr, err, errret) \
190 asm volatile("1: movl %%eax,0(%2)\n" \ 190 asm volatile("1: movl %%eax,0(%2)\n" \
191 "2: movl %%edx,4(%2)\n" \ 191 "2: movl %%edx,4(%2)\n" \
192 "3:\n" \ 192 "3:\n" \
@@ -197,14 +197,24 @@ extern int __get_user_bad(void);
197 _ASM_EXTABLE(1b, 4b) \ 197 _ASM_EXTABLE(1b, 4b) \
198 _ASM_EXTABLE(2b, 4b) \ 198 _ASM_EXTABLE(2b, 4b) \
199 : "=r" (err) \ 199 : "=r" (err) \
200 : "A" (x), "r" (addr), "i" (-EFAULT), "0" (err)) 200 : "A" (x), "r" (addr), "i" (errret), "0" (err))
201
202#define __put_user_asm_ex_u64(x, addr) \
203 asm volatile("1: movl %%eax,0(%1)\n" \
204 "2: movl %%edx,4(%1)\n" \
205 "3:\n" \
206 _ASM_EXTABLE(1b, 2b - 1b) \
207 _ASM_EXTABLE(2b, 3b - 2b) \
208 : : "A" (x), "r" (addr))
201 209
202#define __put_user_x8(x, ptr, __ret_pu) \ 210#define __put_user_x8(x, ptr, __ret_pu) \
203 asm volatile("call __put_user_8" : "=a" (__ret_pu) \ 211 asm volatile("call __put_user_8" : "=a" (__ret_pu) \
204 : "A" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx") 212 : "A" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx")
205#else 213#else
206#define __put_user_u64(x, ptr, retval) \ 214#define __put_user_asm_u64(x, ptr, retval, errret) \
207 __put_user_asm(x, ptr, retval, "q", "", "Zr", -EFAULT) 215 __put_user_asm(x, ptr, retval, "q", "", "Zr", errret)
216#define __put_user_asm_ex_u64(x, addr) \
217 __put_user_asm_ex(x, addr, "q", "", "Zr")
208#define __put_user_x8(x, ptr, __ret_pu) __put_user_x(8, x, ptr, __ret_pu) 218#define __put_user_x8(x, ptr, __ret_pu) __put_user_x(8, x, ptr, __ret_pu)
209#endif 219#endif
210 220
@@ -276,10 +286,32 @@ do { \
276 __put_user_asm(x, ptr, retval, "w", "w", "ir", errret); \ 286 __put_user_asm(x, ptr, retval, "w", "w", "ir", errret); \
277 break; \ 287 break; \
278 case 4: \ 288 case 4: \
279 __put_user_asm(x, ptr, retval, "l", "k", "ir", errret);\ 289 __put_user_asm(x, ptr, retval, "l", "k", "ir", errret); \
280 break; \ 290 break; \
281 case 8: \ 291 case 8: \
282 __put_user_u64((__typeof__(*ptr))(x), ptr, retval); \ 292 __put_user_asm_u64((__typeof__(*ptr))(x), ptr, retval, \
293 errret); \
294 break; \
295 default: \
296 __put_user_bad(); \
297 } \
298} while (0)
299
300#define __put_user_size_ex(x, ptr, size) \
301do { \
302 __chk_user_ptr(ptr); \
303 switch (size) { \
304 case 1: \
305 __put_user_asm_ex(x, ptr, "b", "b", "iq"); \
306 break; \
307 case 2: \
308 __put_user_asm_ex(x, ptr, "w", "w", "ir"); \
309 break; \
310 case 4: \
311 __put_user_asm_ex(x, ptr, "l", "k", "ir"); \
312 break; \
313 case 8: \
314 __put_user_asm_ex_u64((__typeof__(*ptr))(x), ptr); \
283 break; \ 315 break; \
284 default: \ 316 default: \
285 __put_user_bad(); \ 317 __put_user_bad(); \
@@ -311,9 +343,12 @@ do { \
311 343
312#ifdef CONFIG_X86_32 344#ifdef CONFIG_X86_32
313#define __get_user_asm_u64(x, ptr, retval, errret) (x) = __get_user_bad() 345#define __get_user_asm_u64(x, ptr, retval, errret) (x) = __get_user_bad()
346#define __get_user_asm_ex_u64(x, ptr) (x) = __get_user_bad()
314#else 347#else
315#define __get_user_asm_u64(x, ptr, retval, errret) \ 348#define __get_user_asm_u64(x, ptr, retval, errret) \
316 __get_user_asm(x, ptr, retval, "q", "", "=r", errret) 349 __get_user_asm(x, ptr, retval, "q", "", "=r", errret)
350#define __get_user_asm_ex_u64(x, ptr) \
351 __get_user_asm_ex(x, ptr, "q", "", "=r")
317#endif 352#endif
318 353
319#define __get_user_size(x, ptr, size, retval, errret) \ 354#define __get_user_size(x, ptr, size, retval, errret) \
@@ -350,6 +385,33 @@ do { \
350 : "=r" (err), ltype(x) \ 385 : "=r" (err), ltype(x) \
351 : "m" (__m(addr)), "i" (errret), "0" (err)) 386 : "m" (__m(addr)), "i" (errret), "0" (err))
352 387
388#define __get_user_size_ex(x, ptr, size) \
389do { \
390 __chk_user_ptr(ptr); \
391 switch (size) { \
392 case 1: \
393 __get_user_asm_ex(x, ptr, "b", "b", "=q"); \
394 break; \
395 case 2: \
396 __get_user_asm_ex(x, ptr, "w", "w", "=r"); \
397 break; \
398 case 4: \
399 __get_user_asm_ex(x, ptr, "l", "k", "=r"); \
400 break; \
401 case 8: \
402 __get_user_asm_ex_u64(x, ptr); \
403 break; \
404 default: \
405 (x) = __get_user_bad(); \
406 } \
407} while (0)
408
409#define __get_user_asm_ex(x, addr, itype, rtype, ltype) \
410 asm volatile("1: mov"itype" %1,%"rtype"0\n" \
411 "2:\n" \
412 _ASM_EXTABLE(1b, 2b - 1b) \
413 : ltype(x) : "m" (__m(addr)))
414
353#define __put_user_nocheck(x, ptr, size) \ 415#define __put_user_nocheck(x, ptr, size) \
354({ \ 416({ \
355 int __pu_err; \ 417 int __pu_err; \
@@ -385,6 +447,26 @@ struct __large_struct { unsigned long buf[100]; };
385 _ASM_EXTABLE(1b, 3b) \ 447 _ASM_EXTABLE(1b, 3b) \
386 : "=r"(err) \ 448 : "=r"(err) \
387 : ltype(x), "m" (__m(addr)), "i" (errret), "0" (err)) 449 : ltype(x), "m" (__m(addr)), "i" (errret), "0" (err))
450
451#define __put_user_asm_ex(x, addr, itype, rtype, ltype) \
452 asm volatile("1: mov"itype" %"rtype"0,%1\n" \
453 "2:\n" \
454 _ASM_EXTABLE(1b, 2b - 1b) \
455 : : ltype(x), "m" (__m(addr)))
456
457/*
458 * uaccess_try and catch
459 */
460#define uaccess_try do { \
461 int prev_err = current_thread_info()->uaccess_err; \
462 current_thread_info()->uaccess_err = 0; \
463 barrier();
464
465#define uaccess_catch(err) \
466 (err) |= current_thread_info()->uaccess_err; \
467 current_thread_info()->uaccess_err = prev_err; \
468} while (0)
469
388/** 470/**
389 * __get_user: - Get a simple variable from user space, with less checking. 471 * __get_user: - Get a simple variable from user space, with less checking.
390 * @x: Variable to store result. 472 * @x: Variable to store result.
@@ -408,6 +490,7 @@ struct __large_struct { unsigned long buf[100]; };
408 490
409#define __get_user(x, ptr) \ 491#define __get_user(x, ptr) \
410 __get_user_nocheck((x), (ptr), sizeof(*(ptr))) 492 __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
493
411/** 494/**
412 * __put_user: - Write a simple value into user space, with less checking. 495 * __put_user: - Write a simple value into user space, with less checking.
413 * @x: Value to copy to user space. 496 * @x: Value to copy to user space.
@@ -435,6 +518,45 @@ struct __large_struct { unsigned long buf[100]; };
435#define __put_user_unaligned __put_user 518#define __put_user_unaligned __put_user
436 519
437/* 520/*
521 * {get|put}_user_try and catch
522 *
523 * get_user_try {
524 * get_user_ex(...);
525 * } get_user_catch(err)
526 */
527#define get_user_try uaccess_try
528#define get_user_catch(err) uaccess_catch(err)
529
530#define get_user_ex(x, ptr) do { \
531 unsigned long __gue_val; \
532 __get_user_size_ex((__gue_val), (ptr), (sizeof(*(ptr)))); \
533 (x) = (__force __typeof__(*(ptr)))__gue_val; \
534} while (0)
535
536#ifdef CONFIG_X86_WP_WORKS_OK
537
538#define put_user_try uaccess_try
539#define put_user_catch(err) uaccess_catch(err)
540
541#define put_user_ex(x, ptr) \
542 __put_user_size_ex((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
543
544#else /* !CONFIG_X86_WP_WORKS_OK */
545
546#define put_user_try do { \
547 int __uaccess_err = 0;
548
549#define put_user_catch(err) \
550 (err) |= __uaccess_err; \
551} while (0)
552
553#define put_user_ex(x, ptr) do { \
554 __uaccess_err |= __put_user(x, ptr); \
555} while (0)
556
557#endif /* CONFIG_X86_WP_WORKS_OK */
558
559/*
438 * movsl can be slow when source and dest are not both 8-byte aligned 560 * movsl can be slow when source and dest are not both 8-byte aligned
439 */ 561 */
440#ifdef CONFIG_X86_INTEL_USERCOPY 562#ifdef CONFIG_X86_INTEL_USERCOPY
diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h
index 84210c479fca..8cc687326eb8 100644
--- a/arch/x86/include/asm/uaccess_64.h
+++ b/arch/x86/include/asm/uaccess_64.h
@@ -188,16 +188,16 @@ __copy_to_user_inatomic(void __user *dst, const void *src, unsigned size)
188extern long __copy_user_nocache(void *dst, const void __user *src, 188extern long __copy_user_nocache(void *dst, const void __user *src,
189 unsigned size, int zerorest); 189 unsigned size, int zerorest);
190 190
191static inline int __copy_from_user_nocache(void *dst, const void __user *src, 191static inline int
192 unsigned size) 192__copy_from_user_nocache(void *dst, const void __user *src, unsigned size)
193{ 193{
194 might_sleep(); 194 might_sleep();
195 return __copy_user_nocache(dst, src, size, 1); 195 return __copy_user_nocache(dst, src, size, 1);
196} 196}
197 197
198static inline int __copy_from_user_inatomic_nocache(void *dst, 198static inline int
199 const void __user *src, 199__copy_from_user_inatomic_nocache(void *dst, const void __user *src,
200 unsigned size) 200 unsigned size)
201{ 201{
202 return __copy_user_nocache(dst, src, size, 0); 202 return __copy_user_nocache(dst, src, size, 0);
203} 203}
diff --git a/arch/x86/include/asm/uv/uv.h b/arch/x86/include/asm/uv/uv.h
new file mode 100644
index 000000000000..c0a01b5d985b
--- /dev/null
+++ b/arch/x86/include/asm/uv/uv.h
@@ -0,0 +1,33 @@
1#ifndef _ASM_X86_UV_UV_H
2#define _ASM_X86_UV_UV_H
3
4enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
5
6struct cpumask;
7struct mm_struct;
8
9#ifdef CONFIG_X86_UV
10
11extern enum uv_system_type get_uv_system_type(void);
12extern int is_uv_system(void);
13extern void uv_cpu_init(void);
14extern void uv_system_init(void);
15extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
16 struct mm_struct *mm,
17 unsigned long va,
18 unsigned int cpu);
19
20#else /* X86_UV */
21
22static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; }
23static inline int is_uv_system(void) { return 0; }
24static inline void uv_cpu_init(void) { }
25static inline void uv_system_init(void) { }
26static inline const struct cpumask *
27uv_flush_tlb_others(const struct cpumask *cpumask, struct mm_struct *mm,
28 unsigned long va, unsigned int cpu)
29{ return cpumask; }
30
31#endif /* X86_UV */
32
33#endif /* _ASM_X86_UV_UV_H */
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index 50423c7b56b2..9b0e61bf7a88 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -325,7 +325,6 @@ static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
325#define cpubit_isset(cpu, bau_local_cpumask) \ 325#define cpubit_isset(cpu, bau_local_cpumask) \
326 test_bit((cpu), (bau_local_cpumask).bits) 326 test_bit((cpu), (bau_local_cpumask).bits)
327 327
328extern int uv_flush_tlb_others(cpumask_t *, struct mm_struct *, unsigned long);
329extern void uv_bau_message_intr1(void); 328extern void uv_bau_message_intr1(void);
330extern void uv_bau_timeout_intr1(void); 329extern void uv_bau_timeout_intr1(void);
331 330
diff --git a/arch/x86/include/asm/vic.h b/arch/x86/include/asm/vic.h
deleted file mode 100644
index 53100f353612..000000000000
--- a/arch/x86/include/asm/vic.h
+++ /dev/null
@@ -1,61 +0,0 @@
1/* Copyright (C) 1999,2001
2 *
3 * Author: J.E.J.Bottomley@HansenPartnership.com
4 *
5 * Standard include definitions for the NCR Voyager Interrupt Controller */
6
7/* The eight CPI vectors. To activate a CPI, you write a bit mask
8 * corresponding to the processor set to be interrupted into the
9 * relevant register. That set of CPUs will then be interrupted with
10 * the CPI */
11static const int VIC_CPI_Registers[] =
12 {0xFC00, 0xFC01, 0xFC08, 0xFC09,
13 0xFC10, 0xFC11, 0xFC18, 0xFC19 };
14
15#define VIC_PROC_WHO_AM_I 0xfc29
16# define QUAD_IDENTIFIER 0xC0
17# define EIGHT_SLOT_IDENTIFIER 0xE0
18#define QIC_EXTENDED_PROCESSOR_SELECT 0xFC72
19#define VIC_CPI_BASE_REGISTER 0xFC41
20#define VIC_PROCESSOR_ID 0xFC21
21# define VIC_CPU_MASQUERADE_ENABLE 0x8
22
23#define VIC_CLAIM_REGISTER_0 0xFC38
24#define VIC_CLAIM_REGISTER_1 0xFC39
25#define VIC_REDIRECT_REGISTER_0 0xFC60
26#define VIC_REDIRECT_REGISTER_1 0xFC61
27#define VIC_PRIORITY_REGISTER 0xFC20
28
29#define VIC_PRIMARY_MC_BASE 0xFC48
30#define VIC_SECONDARY_MC_BASE 0xFC49
31
32#define QIC_PROCESSOR_ID 0xFC71
33# define QIC_CPUID_ENABLE 0x08
34
35#define QIC_VIC_CPI_BASE_REGISTER 0xFC79
36#define QIC_CPI_BASE_REGISTER 0xFC7A
37
38#define QIC_MASK_REGISTER0 0xFC80
39/* NOTE: these are masked high, enabled low */
40# define QIC_PERF_TIMER 0x01
41# define QIC_LPE 0x02
42# define QIC_SYS_INT 0x04
43# define QIC_CMN_INT 0x08
44/* at the moment, just enable CMN_INT, disable SYS_INT */
45# define QIC_DEFAULT_MASK0 (~(QIC_CMN_INT /* | VIC_SYS_INT */))
46#define QIC_MASK_REGISTER1 0xFC81
47# define QIC_BOOT_CPI_MASK 0xFE
48/* Enable CPI's 1-6 inclusive */
49# define QIC_CPI_ENABLE 0x81
50
51#define QIC_INTERRUPT_CLEAR0 0xFC8A
52#define QIC_INTERRUPT_CLEAR1 0xFC8B
53
54/* this is where we place the CPI vectors */
55#define VIC_DEFAULT_CPI_BASE 0xC0
56/* this is where we place the QIC CPI vectors */
57#define QIC_DEFAULT_CPI_BASE 0xD0
58
59#define VIC_BOOT_INTERRUPT_MASK 0xfe
60
61extern void smp_vic_timer_interrupt(void);
diff --git a/arch/x86/include/asm/voyager.h b/arch/x86/include/asm/voyager.h
deleted file mode 100644
index b3e647307625..000000000000
--- a/arch/x86/include/asm/voyager.h
+++ /dev/null
@@ -1,529 +0,0 @@
1/* Copyright (C) 1999,2001
2 *
3 * Author: J.E.J.Bottomley@HansenPartnership.com
4 *
5 * Standard include definitions for the NCR Voyager system */
6
7#undef VOYAGER_DEBUG
8#undef VOYAGER_CAT_DEBUG
9
10#ifdef VOYAGER_DEBUG
11#define VDEBUG(x) printk x
12#else
13#define VDEBUG(x)
14#endif
15
16/* There are three levels of voyager machine: 3,4 and 5. The rule is
17 * if it's less than 3435 it's a Level 3 except for a 3360 which is
18 * a level 4. A 3435 or above is a Level 5 */
19#define VOYAGER_LEVEL5_AND_ABOVE 0x3435
20#define VOYAGER_LEVEL4 0x3360
21
22/* The L4 DINO ASIC */
23#define VOYAGER_DINO 0x43
24
25/* voyager ports in standard I/O space */
26#define VOYAGER_MC_SETUP 0x96
27
28
29#define VOYAGER_CAT_CONFIG_PORT 0x97
30# define VOYAGER_CAT_DESELECT 0xff
31#define VOYAGER_SSPB_RELOCATION_PORT 0x98
32
33/* Valid CAT controller commands */
34/* start instruction register cycle */
35#define VOYAGER_CAT_IRCYC 0x01
36/* start data register cycle */
37#define VOYAGER_CAT_DRCYC 0x02
38/* move to execute state */
39#define VOYAGER_CAT_RUN 0x0F
40/* end operation */
41#define VOYAGER_CAT_END 0x80
42/* hold in idle state */
43#define VOYAGER_CAT_HOLD 0x90
44/* single step an "intest" vector */
45#define VOYAGER_CAT_STEP 0xE0
46/* return cat controller to CLEMSON mode */
47#define VOYAGER_CAT_CLEMSON 0xFF
48
49/* the default cat command header */
50#define VOYAGER_CAT_HEADER 0x7F
51
52/* the range of possible CAT module ids in the system */
53#define VOYAGER_MIN_MODULE 0x10
54#define VOYAGER_MAX_MODULE 0x1f
55
56/* The voyager registers per asic */
57#define VOYAGER_ASIC_ID_REG 0x00
58#define VOYAGER_ASIC_TYPE_REG 0x01
59/* the sub address registers can be made auto incrementing on reads */
60#define VOYAGER_AUTO_INC_REG 0x02
61# define VOYAGER_AUTO_INC 0x04
62# define VOYAGER_NO_AUTO_INC 0xfb
63#define VOYAGER_SUBADDRDATA 0x03
64#define VOYAGER_SCANPATH 0x05
65# define VOYAGER_CONNECT_ASIC 0x01
66# define VOYAGER_DISCONNECT_ASIC 0xfe
67#define VOYAGER_SUBADDRLO 0x06
68#define VOYAGER_SUBADDRHI 0x07
69#define VOYAGER_SUBMODSELECT 0x08
70#define VOYAGER_SUBMODPRESENT 0x09
71
72#define VOYAGER_SUBADDR_LO 0xff
73#define VOYAGER_SUBADDR_HI 0xffff
74
75/* the maximum size of a scan path -- used to form instructions */
76#define VOYAGER_MAX_SCAN_PATH 0x100
77/* the biggest possible register size (in bytes) */
78#define VOYAGER_MAX_REG_SIZE 4
79
80/* Total number of possible modules (including submodules) */
81#define VOYAGER_MAX_MODULES 16
82/* Largest number of asics per module */
83#define VOYAGER_MAX_ASICS_PER_MODULE 7
84
85/* the CAT asic of each module is always the first one */
86#define VOYAGER_CAT_ID 0
87#define VOYAGER_PSI 0x1a
88
89/* voyager instruction operations and registers */
90#define VOYAGER_READ_CONFIG 0x1
91#define VOYAGER_WRITE_CONFIG 0x2
92#define VOYAGER_BYPASS 0xff
93
94typedef struct voyager_asic {
95 __u8 asic_addr; /* ASIC address; Level 4 */
96 __u8 asic_type; /* ASIC type */
97 __u8 asic_id; /* ASIC id */
98 __u8 jtag_id[4]; /* JTAG id */
99 __u8 asic_location; /* Location within scan path; start w/ 0 */
100 __u8 bit_location; /* Location within bit stream; start w/ 0 */
101 __u8 ireg_length; /* Instruction register length */
102 __u16 subaddr; /* Amount of sub address space */
103 struct voyager_asic *next; /* Next asic in linked list */
104} voyager_asic_t;
105
106typedef struct voyager_module {
107 __u8 module_addr; /* Module address */
108 __u8 scan_path_connected; /* Scan path connected */
109 __u16 ee_size; /* Size of the EEPROM */
110 __u16 num_asics; /* Number of Asics */
111 __u16 inst_bits; /* Instruction bits in the scan path */
112 __u16 largest_reg; /* Largest register in the scan path */
113 __u16 smallest_reg; /* Smallest register in the scan path */
114 voyager_asic_t *asic; /* First ASIC in scan path (CAT_I) */
115 struct voyager_module *submodule; /* Submodule pointer */
116 struct voyager_module *next; /* Next module in linked list */
117} voyager_module_t;
118
119typedef struct voyager_eeprom_hdr {
120 __u8 module_id[4];
121 __u8 version_id;
122 __u8 config_id;
123 __u16 boundry_id; /* boundary scan id */
124 __u16 ee_size; /* size of EEPROM */
125 __u8 assembly[11]; /* assembly # */
126 __u8 assembly_rev; /* assembly rev */
127 __u8 tracer[4]; /* tracer number */
128 __u16 assembly_cksum; /* asm checksum */
129 __u16 power_consump; /* pwr requirements */
130 __u16 num_asics; /* number of asics */
131 __u16 bist_time; /* min. bist time */
132 __u16 err_log_offset; /* error log offset */
133 __u16 scan_path_offset;/* scan path offset */
134 __u16 cct_offset;
135 __u16 log_length; /* length of err log */
136 __u16 xsum_end; /* offset to end of
137 checksum */
138 __u8 reserved[4];
139 __u8 sflag; /* starting sentinal */
140 __u8 part_number[13]; /* prom part number */
141 __u8 version[10]; /* version number */
142 __u8 signature[8];
143 __u16 eeprom_chksum;
144 __u32 data_stamp_offset;
145 __u8 eflag ; /* ending sentinal */
146} __attribute__((packed)) voyager_eprom_hdr_t;
147
148
149
150#define VOYAGER_EPROM_SIZE_OFFSET \
151 ((__u16)(&(((voyager_eprom_hdr_t *)0)->ee_size)))
152#define VOYAGER_XSUM_END_OFFSET 0x2a
153
154/* the following three definitions are for internal table layouts
155 * in the module EPROMs. We really only care about the IDs and
156 * offsets */
157typedef struct voyager_sp_table {
158 __u8 asic_id;
159 __u8 bypass_flag;
160 __u16 asic_data_offset;
161 __u16 config_data_offset;
162} __attribute__((packed)) voyager_sp_table_t;
163
164typedef struct voyager_jtag_table {
165 __u8 icode[4];
166 __u8 runbist[4];
167 __u8 intest[4];
168 __u8 samp_preld[4];
169 __u8 ireg_len;
170} __attribute__((packed)) voyager_jtt_t;
171
172typedef struct voyager_asic_data_table {
173 __u8 jtag_id[4];
174 __u16 length_bsr;
175 __u16 length_bist_reg;
176 __u32 bist_clk;
177 __u16 subaddr_bits;
178 __u16 seed_bits;
179 __u16 sig_bits;
180 __u16 jtag_offset;
181} __attribute__((packed)) voyager_at_t;
182
183/* Voyager Interrupt Controller (VIC) registers */
184
185/* Base to add to Cross Processor Interrupts (CPIs) when triggering
186 * the CPU IRQ line */
187/* register defines for the WCBICs (one per processor) */
188#define VOYAGER_WCBIC0 0x41 /* bus A node P1 processor 0 */
189#define VOYAGER_WCBIC1 0x49 /* bus A node P1 processor 1 */
190#define VOYAGER_WCBIC2 0x51 /* bus A node P2 processor 0 */
191#define VOYAGER_WCBIC3 0x59 /* bus A node P2 processor 1 */
192#define VOYAGER_WCBIC4 0x61 /* bus B node P1 processor 0 */
193#define VOYAGER_WCBIC5 0x69 /* bus B node P1 processor 1 */
194#define VOYAGER_WCBIC6 0x71 /* bus B node P2 processor 0 */
195#define VOYAGER_WCBIC7 0x79 /* bus B node P2 processor 1 */
196
197
198/* top of memory registers */
199#define VOYAGER_WCBIC_TOM_L 0x4
200#define VOYAGER_WCBIC_TOM_H 0x5
201
202/* register defines for Voyager Memory Contol (VMC)
203 * these are present on L4 machines only */
204#define VOYAGER_VMC1 0x81
205#define VOYAGER_VMC2 0x91
206#define VOYAGER_VMC3 0xa1
207#define VOYAGER_VMC4 0xb1
208
209/* VMC Ports */
210#define VOYAGER_VMC_MEMORY_SETUP 0x9
211# define VMC_Interleaving 0x01
212# define VMC_4Way 0x02
213# define VMC_EvenCacheLines 0x04
214# define VMC_HighLine 0x08
215# define VMC_Start0_Enable 0x20
216# define VMC_Start1_Enable 0x40
217# define VMC_Vremap 0x80
218#define VOYAGER_VMC_BANK_DENSITY 0xa
219# define VMC_BANK_EMPTY 0
220# define VMC_BANK_4MB 1
221# define VMC_BANK_16MB 2
222# define VMC_BANK_64MB 3
223# define VMC_BANK0_MASK 0x03
224# define VMC_BANK1_MASK 0x0C
225# define VMC_BANK2_MASK 0x30
226# define VMC_BANK3_MASK 0xC0
227
228/* Magellan Memory Controller (MMC) defines - present on L5 */
229#define VOYAGER_MMC_ASIC_ID 1
230/* the two memory modules corresponding to memory cards in the system */
231#define VOYAGER_MMC_MEMORY0_MODULE 0x14
232#define VOYAGER_MMC_MEMORY1_MODULE 0x15
233/* the Magellan Memory Address (MMA) defines */
234#define VOYAGER_MMA_ASIC_ID 2
235
236/* Submodule number for the Quad Baseboard */
237#define VOYAGER_QUAD_BASEBOARD 1
238
239/* ASIC defines for the Quad Baseboard */
240#define VOYAGER_QUAD_QDATA0 1
241#define VOYAGER_QUAD_QDATA1 2
242#define VOYAGER_QUAD_QABC 3
243
244/* Useful areas in extended CMOS */
245#define VOYAGER_PROCESSOR_PRESENT_MASK 0x88a
246#define VOYAGER_MEMORY_CLICKMAP 0xa23
247#define VOYAGER_DUMP_LOCATION 0xb1a
248
249/* SUS In Control bit - used to tell SUS that we don't need to be
250 * babysat anymore */
251#define VOYAGER_SUS_IN_CONTROL_PORT 0x3ff
252# define VOYAGER_IN_CONTROL_FLAG 0x80
253
254/* Voyager PSI defines */
255#define VOYAGER_PSI_STATUS_REG 0x08
256# define PSI_DC_FAIL 0x01
257# define PSI_MON 0x02
258# define PSI_FAULT 0x04
259# define PSI_ALARM 0x08
260# define PSI_CURRENT 0x10
261# define PSI_DVM 0x20
262# define PSI_PSCFAULT 0x40
263# define PSI_STAT_CHG 0x80
264
265#define VOYAGER_PSI_SUPPLY_REG 0x8000
266 /* read */
267# define PSI_FAIL_DC 0x01
268# define PSI_FAIL_AC 0x02
269# define PSI_MON_INT 0x04
270# define PSI_SWITCH_OFF 0x08
271# define PSI_HX_OFF 0x10
272# define PSI_SECURITY 0x20
273# define PSI_CMOS_BATT_LOW 0x40
274# define PSI_CMOS_BATT_FAIL 0x80
275 /* write */
276# define PSI_CLR_SWITCH_OFF 0x13
277# define PSI_CLR_HX_OFF 0x14
278# define PSI_CLR_CMOS_BATT_FAIL 0x17
279
280#define VOYAGER_PSI_MASK 0x8001
281# define PSI_MASK_MASK 0x10
282
283#define VOYAGER_PSI_AC_FAIL_REG 0x8004
284#define AC_FAIL_STAT_CHANGE 0x80
285
286#define VOYAGER_PSI_GENERAL_REG 0x8007
287 /* read */
288# define PSI_SWITCH_ON 0x01
289# define PSI_SWITCH_ENABLED 0x02
290# define PSI_ALARM_ENABLED 0x08
291# define PSI_SECURE_ENABLED 0x10
292# define PSI_COLD_RESET 0x20
293# define PSI_COLD_START 0x80
294 /* write */
295# define PSI_POWER_DOWN 0x10
296# define PSI_SWITCH_DISABLE 0x01
297# define PSI_SWITCH_ENABLE 0x11
298# define PSI_CLEAR 0x12
299# define PSI_ALARM_DISABLE 0x03
300# define PSI_ALARM_ENABLE 0x13
301# define PSI_CLEAR_COLD_RESET 0x05
302# define PSI_SET_COLD_RESET 0x15
303# define PSI_CLEAR_COLD_START 0x07
304# define PSI_SET_COLD_START 0x17
305
306
307
308struct voyager_bios_info {
309 __u8 len;
310 __u8 major;
311 __u8 minor;
312 __u8 debug;
313 __u8 num_classes;
314 __u8 class_1;
315 __u8 class_2;
316};
317
318/* The following structures and definitions are for the Kernel/SUS
319 * interface these are needed to find out how SUS initialised any Quad
320 * boards in the system */
321
322#define NUMBER_OF_MC_BUSSES 2
323#define SLOTS_PER_MC_BUS 8
324#define MAX_CPUS 16 /* 16 way CPU system */
325#define MAX_PROCESSOR_BOARDS 4 /* 4 processor slot system */
326#define MAX_CACHE_LEVELS 4 /* # of cache levels supported */
327#define MAX_SHARED_CPUS 4 /* # of CPUs that can share a LARC */
328#define NUMBER_OF_POS_REGS 8
329
330typedef struct {
331 __u8 MC_Slot;
332 __u8 POS_Values[NUMBER_OF_POS_REGS];
333} __attribute__((packed)) MC_SlotInformation_t;
334
335struct QuadDescription {
336 __u8 Type; /* for type 0 (DYADIC or MONADIC) all fields
337 * will be zero except for slot */
338 __u8 StructureVersion;
339 __u32 CPI_BaseAddress;
340 __u32 LARC_BankSize;
341 __u32 LocalMemoryStateBits;
342 __u8 Slot; /* Processor slots 1 - 4 */
343} __attribute__((packed));
344
345struct ProcBoardInfo {
346 __u8 Type;
347 __u8 StructureVersion;
348 __u8 NumberOfBoards;
349 struct QuadDescription QuadData[MAX_PROCESSOR_BOARDS];
350} __attribute__((packed));
351
352struct CacheDescription {
353 __u8 Level;
354 __u32 TotalSize;
355 __u16 LineSize;
356 __u8 Associativity;
357 __u8 CacheType;
358 __u8 WriteType;
359 __u8 Number_CPUs_SharedBy;
360 __u8 Shared_CPUs_Hardware_IDs[MAX_SHARED_CPUS];
361
362} __attribute__((packed));
363
364struct CPU_Description {
365 __u8 CPU_HardwareId;
366 char *FRU_String;
367 __u8 NumberOfCacheLevels;
368 struct CacheDescription CacheLevelData[MAX_CACHE_LEVELS];
369} __attribute__((packed));
370
371struct CPU_Info {
372 __u8 Type;
373 __u8 StructureVersion;
374 __u8 NumberOf_CPUs;
375 struct CPU_Description CPU_Data[MAX_CPUS];
376} __attribute__((packed));
377
378
379/*
380 * This structure will be used by SUS and the OS.
381 * The assumption about this structure is that no blank space is
382 * packed in it by our friend the compiler.
383 */
384typedef struct {
385 __u8 Mailbox_SUS; /* Written to by SUS to give
386 commands/response to the OS */
387 __u8 Mailbox_OS; /* Written to by the OS to give
388 commands/response to SUS */
389 __u8 SUS_MailboxVersion; /* Tells the OS which iteration of the
390 interface SUS supports */
391 __u8 OS_MailboxVersion; /* Tells SUS which iteration of the
392 interface the OS supports */
393 __u32 OS_Flags; /* Flags set by the OS as info for
394 SUS */
395 __u32 SUS_Flags; /* Flags set by SUS as info
396 for the OS */
397 __u32 WatchDogPeriod; /* Watchdog period (in seconds) which
398 the DP uses to see if the OS
399 is dead */
400 __u32 WatchDogCount; /* Updated by the OS on every tic. */
401 __u32 MemoryFor_SUS_ErrorLog; /* Flat 32 bit address which tells SUS
402 where to stuff the SUS error log
403 on a dump */
404 MC_SlotInformation_t MC_SlotInfo[NUMBER_OF_MC_BUSSES*SLOTS_PER_MC_BUS];
405 /* Storage for MCA POS data */
406 /* All new SECOND_PASS_INTERFACE fields added from this point */
407 struct ProcBoardInfo *BoardData;
408 struct CPU_Info *CPU_Data;
409 /* All new fields must be added from this point */
410} Voyager_KernelSUS_Mbox_t;
411
412/* structure for finding the right memory address to send a QIC CPI to */
413struct voyager_qic_cpi {
414 /* Each cache line (32 bytes) can trigger a cpi. The cpi
415 * read/write may occur anywhere in the cache line---pick the
416 * middle to be safe */
417 struct {
418 __u32 pad1[3];
419 __u32 cpi;
420 __u32 pad2[4];
421 } qic_cpi[8];
422};
423
424struct voyager_status {
425 __u32 power_fail:1;
426 __u32 switch_off:1;
427 __u32 request_from_kernel:1;
428};
429
430struct voyager_psi_regs {
431 __u8 cat_id;
432 __u8 cat_dev;
433 __u8 cat_control;
434 __u8 subaddr;
435 __u8 dummy4;
436 __u8 checkbit;
437 __u8 subaddr_low;
438 __u8 subaddr_high;
439 __u8 intstatus;
440 __u8 stat1;
441 __u8 stat3;
442 __u8 fault;
443 __u8 tms;
444 __u8 gen;
445 __u8 sysconf;
446 __u8 dummy15;
447};
448
449struct voyager_psi_subregs {
450 __u8 supply;
451 __u8 mask;
452 __u8 present;
453 __u8 DCfail;
454 __u8 ACfail;
455 __u8 fail;
456 __u8 UPSfail;
457 __u8 genstatus;
458};
459
460struct voyager_psi {
461 struct voyager_psi_regs regs;
462 struct voyager_psi_subregs subregs;
463};
464
465struct voyager_SUS {
466#define VOYAGER_DUMP_BUTTON_NMI 0x1
467#define VOYAGER_SUS_VALID 0x2
468#define VOYAGER_SYSINT_COMPLETE 0x3
469 __u8 SUS_mbox;
470#define VOYAGER_NO_COMMAND 0x0
471#define VOYAGER_IGNORE_DUMP 0x1
472#define VOYAGER_DO_DUMP 0x2
473#define VOYAGER_SYSINT_HANDSHAKE 0x3
474#define VOYAGER_DO_MEM_DUMP 0x4
475#define VOYAGER_SYSINT_WAS_RECOVERED 0x5
476 __u8 kernel_mbox;
477#define VOYAGER_MAILBOX_VERSION 0x10
478 __u8 SUS_version;
479 __u8 kernel_version;
480#define VOYAGER_OS_HAS_SYSINT 0x1
481#define VOYAGER_OS_IN_PROGRESS 0x2
482#define VOYAGER_UPDATING_WDPERIOD 0x4
483 __u32 kernel_flags;
484#define VOYAGER_SUS_BOOTING 0x1
485#define VOYAGER_SUS_IN_PROGRESS 0x2
486 __u32 SUS_flags;
487 __u32 watchdog_period;
488 __u32 watchdog_count;
489 __u32 SUS_errorlog;
490 /* lots of system configuration stuff under here */
491};
492
493/* Variables exported by voyager_smp */
494extern __u32 voyager_extended_vic_processors;
495extern __u32 voyager_allowed_boot_processors;
496extern __u32 voyager_quad_processors;
497extern struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS];
498extern struct voyager_SUS *voyager_SUS;
499
500/* variables exported always */
501extern struct task_struct *voyager_thread;
502extern int voyager_level;
503extern struct voyager_status voyager_status;
504
505/* functions exported by the voyager and voyager_smp modules */
506extern int voyager_cat_readb(__u8 module, __u8 asic, int reg);
507extern void voyager_cat_init(void);
508extern void voyager_detect(struct voyager_bios_info *);
509extern void voyager_trap_init(void);
510extern void voyager_setup_irqs(void);
511extern int voyager_memory_detect(int region, __u32 *addr, __u32 *length);
512extern void voyager_smp_intr_init(void);
513extern __u8 voyager_extended_cmos_read(__u16 cmos_address);
514extern void voyager_smp_dump(void);
515extern void voyager_timer_interrupt(void);
516extern void smp_local_timer_interrupt(void);
517extern void voyager_power_off(void);
518extern void smp_voyager_power_off(void *dummy);
519extern void voyager_restart(void);
520extern void voyager_cat_power_off(void);
521extern void voyager_cat_do_common_interrupt(void);
522extern void voyager_handle_nmi(void);
523extern void voyager_smp_intr_init(void);
524/* Commands for the following are */
525#define VOYAGER_PSI_READ 0
526#define VOYAGER_PSI_WRITE 1
527#define VOYAGER_PSI_SUBREAD 2
528#define VOYAGER_PSI_SUBWRITE 3
529extern void voyager_cat_psi(__u8, __u16, __u8 *);
diff --git a/arch/x86/include/asm/xen/events.h b/arch/x86/include/asm/xen/events.h
index 19144184983a..1df35417c412 100644
--- a/arch/x86/include/asm/xen/events.h
+++ b/arch/x86/include/asm/xen/events.h
@@ -15,10 +15,4 @@ static inline int xen_irqs_disabled(struct pt_regs *regs)
15 return raw_irqs_disabled_flags(regs->flags); 15 return raw_irqs_disabled_flags(regs->flags);
16} 16}
17 17
18static inline void xen_do_IRQ(int irq, struct pt_regs *regs)
19{
20 regs->orig_ax = ~irq;
21 do_IRQ(regs);
22}
23
24#endif /* _ASM_X86_XEN_EVENTS_H */ 18#endif /* _ASM_X86_XEN_EVENTS_H */
diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h
index 81fbd735aec4..d5b7e90c0edf 100644
--- a/arch/x86/include/asm/xen/hypervisor.h
+++ b/arch/x86/include/asm/xen/hypervisor.h
@@ -38,22 +38,30 @@ extern struct shared_info *HYPERVISOR_shared_info;
38extern struct start_info *xen_start_info; 38extern struct start_info *xen_start_info;
39 39
40enum xen_domain_type { 40enum xen_domain_type {
41 XEN_NATIVE, 41 XEN_NATIVE, /* running on bare hardware */
42 XEN_PV_DOMAIN, 42 XEN_PV_DOMAIN, /* running in a PV domain */
43 XEN_HVM_DOMAIN, 43 XEN_HVM_DOMAIN, /* running in a Xen hvm domain */
44}; 44};
45 45
46extern enum xen_domain_type xen_domain_type;
47
48#ifdef CONFIG_XEN 46#ifdef CONFIG_XEN
49#define xen_domain() (xen_domain_type != XEN_NATIVE) 47extern enum xen_domain_type xen_domain_type;
50#else 48#else
51#define xen_domain() (0) 49#define xen_domain_type XEN_NATIVE
52#endif 50#endif
53 51
54#define xen_pv_domain() (xen_domain() && xen_domain_type == XEN_PV_DOMAIN) 52#define xen_domain() (xen_domain_type != XEN_NATIVE)
55#define xen_hvm_domain() (xen_domain() && xen_domain_type == XEN_HVM_DOMAIN) 53#define xen_pv_domain() (xen_domain() && \
54 xen_domain_type == XEN_PV_DOMAIN)
55#define xen_hvm_domain() (xen_domain() && \
56 xen_domain_type == XEN_HVM_DOMAIN)
57
58#ifdef CONFIG_XEN_DOM0
59#include <xen/interface/xen.h>
56 60
57#define xen_initial_domain() (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN) 61#define xen_initial_domain() (xen_pv_domain() && \
62 xen_start_info->flags & SIF_INITDOMAIN)
63#else /* !CONFIG_XEN_DOM0 */
64#define xen_initial_domain() (0)
65#endif /* CONFIG_XEN_DOM0 */
58 66
59#endif /* _ASM_X86_XEN_HYPERVISOR_H */ 67#endif /* _ASM_X86_XEN_HYPERVISOR_H */
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h
index 4bd990ee43df..1a918dde46b5 100644
--- a/arch/x86/include/asm/xen/page.h
+++ b/arch/x86/include/asm/xen/page.h
@@ -164,6 +164,7 @@ static inline pte_t __pte_ma(pteval_t x)
164 164
165 165
166xmaddr_t arbitrary_virt_to_machine(void *address); 166xmaddr_t arbitrary_virt_to_machine(void *address);
167unsigned long arbitrary_virt_to_mfn(void *vaddr);
167void make_lowmem_page_readonly(void *vaddr); 168void make_lowmem_page_readonly(void *vaddr);
168void make_lowmem_page_readwrite(void *vaddr); 169void make_lowmem_page_readwrite(void *vaddr);
169 170
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index d364df03c1d6..95f216bbfaf1 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -23,11 +23,12 @@ nostackp := $(call cc-option, -fno-stack-protector)
23CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp) 23CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp)
24CFLAGS_hpet.o := $(nostackp) 24CFLAGS_hpet.o := $(nostackp)
25CFLAGS_tsc.o := $(nostackp) 25CFLAGS_tsc.o := $(nostackp)
26CFLAGS_paravirt.o := $(nostackp)
26 27
27obj-y := process_$(BITS).o signal.o entry_$(BITS).o 28obj-y := process_$(BITS).o signal.o entry_$(BITS).o
28obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o 29obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
29obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o 30obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o
30obj-y += setup.o i8259.o irqinit_$(BITS).o setup_percpu.o 31obj-y += setup.o i8259.o irqinit_$(BITS).o
31obj-$(CONFIG_X86_VISWS) += visws_quirks.o 32obj-$(CONFIG_X86_VISWS) += visws_quirks.o
32obj-$(CONFIG_X86_32) += probe_roms_32.o 33obj-$(CONFIG_X86_32) += probe_roms_32.o
33obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o 34obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o
@@ -49,31 +50,27 @@ obj-y += step.o
49obj-$(CONFIG_STACKTRACE) += stacktrace.o 50obj-$(CONFIG_STACKTRACE) += stacktrace.o
50obj-y += cpu/ 51obj-y += cpu/
51obj-y += acpi/ 52obj-y += acpi/
52obj-$(CONFIG_X86_BIOS_REBOOT) += reboot.o 53obj-y += reboot.o
53obj-$(CONFIG_MCA) += mca_32.o 54obj-$(CONFIG_MCA) += mca_32.o
54obj-$(CONFIG_X86_MSR) += msr.o 55obj-$(CONFIG_X86_MSR) += msr.o
55obj-$(CONFIG_X86_CPUID) += cpuid.o 56obj-$(CONFIG_X86_CPUID) += cpuid.o
56obj-$(CONFIG_PCI) += early-quirks.o 57obj-$(CONFIG_PCI) += early-quirks.o
57apm-y := apm_32.o 58apm-y := apm_32.o
58obj-$(CONFIG_APM) += apm.o 59obj-$(CONFIG_APM) += apm.o
59obj-$(CONFIG_X86_SMP) += smp.o 60obj-$(CONFIG_SMP) += smp.o
60obj-$(CONFIG_X86_SMP) += smpboot.o tsc_sync.o ipi.o tlb_$(BITS).o 61obj-$(CONFIG_SMP) += smpboot.o tsc_sync.o
61obj-$(CONFIG_X86_32_SMP) += smpcommon.o 62obj-$(CONFIG_SMP) += setup_percpu.o
62obj-$(CONFIG_X86_64_SMP) += tsc_sync.o smpcommon.o 63obj-$(CONFIG_X86_64_SMP) += tsc_sync.o
63obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o 64obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o
64obj-$(CONFIG_X86_MPPARSE) += mpparse.o 65obj-$(CONFIG_X86_MPPARSE) += mpparse.o
65obj-$(CONFIG_X86_LOCAL_APIC) += apic.o nmi.o 66obj-y += apic/
66obj-$(CONFIG_X86_IO_APIC) += io_apic.o
67obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o 67obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o
68obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 68obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
69obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o 69obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
70obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o 70obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o
71obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o 71obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o
72obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o 72obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o
73obj-$(CONFIG_X86_NUMAQ) += numaq_32.o 73obj-$(CONFIG_X86_VSMP) += vsmp_64.o
74obj-$(CONFIG_X86_ES7000) += es7000_32.o
75obj-$(CONFIG_X86_SUMMIT_NUMA) += summit_32.o
76obj-y += vsmp_64.o
77obj-$(CONFIG_KPROBES) += kprobes.o 74obj-$(CONFIG_KPROBES) += kprobes.o
78obj-$(CONFIG_MODULES) += module_$(BITS).o 75obj-$(CONFIG_MODULES) += module_$(BITS).o
79obj-$(CONFIG_EFI) += efi.o efi_$(BITS).o efi_stub_$(BITS).o 76obj-$(CONFIG_EFI) += efi.o efi_$(BITS).o efi_stub_$(BITS).o
@@ -114,16 +111,13 @@ obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o # NB rename without _64
114### 111###
115# 64 bit specific files 112# 64 bit specific files
116ifeq ($(CONFIG_X86_64),y) 113ifeq ($(CONFIG_X86_64),y)
117 obj-y += genapic_64.o genapic_flat_64.o genx2apic_uv_x.o tlb_uv.o 114 obj-$(CONFIG_X86_UV) += tlb_uv.o bios_uv.o uv_irq.o uv_sysfs.o
118 obj-y += bios_uv.o uv_irq.o uv_sysfs.o 115 obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o
119 obj-y += genx2apic_cluster.o 116 obj-$(CONFIG_AUDIT) += audit_64.o
120 obj-y += genx2apic_phys.o 117
121 obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o 118 obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o
122 obj-$(CONFIG_AUDIT) += audit_64.o 119 obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o
123 120 obj-$(CONFIG_AMD_IOMMU) += amd_iommu_init.o amd_iommu.o
124 obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o 121
125 obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o 122 obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o
126 obj-$(CONFIG_AMD_IOMMU) += amd_iommu_init.o amd_iommu.o
127
128 obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o
129endif 123endif
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 7678f10c4568..a18eb7ce2236 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -37,15 +37,10 @@
37#include <asm/pgtable.h> 37#include <asm/pgtable.h>
38#include <asm/io_apic.h> 38#include <asm/io_apic.h>
39#include <asm/apic.h> 39#include <asm/apic.h>
40#include <asm/genapic.h>
41#include <asm/io.h> 40#include <asm/io.h>
42#include <asm/mpspec.h> 41#include <asm/mpspec.h>
43#include <asm/smp.h> 42#include <asm/smp.h>
44 43
45#ifdef CONFIG_X86_LOCAL_APIC
46# include <mach_apic.h>
47#endif
48
49static int __initdata acpi_force = 0; 44static int __initdata acpi_force = 0;
50u32 acpi_rsdt_forced; 45u32 acpi_rsdt_forced;
51#ifdef CONFIG_ACPI 46#ifdef CONFIG_ACPI
@@ -56,16 +51,7 @@ int acpi_disabled = 1;
56EXPORT_SYMBOL(acpi_disabled); 51EXPORT_SYMBOL(acpi_disabled);
57 52
58#ifdef CONFIG_X86_64 53#ifdef CONFIG_X86_64
59 54# include <asm/proto.h>
60#include <asm/proto.h>
61
62#else /* X86 */
63
64#ifdef CONFIG_X86_LOCAL_APIC
65#include <mach_apic.h>
66#include <mach_mpparse.h>
67#endif /* CONFIG_X86_LOCAL_APIC */
68
69#endif /* X86 */ 55#endif /* X86 */
70 56
71#define BAD_MADT_ENTRY(entry, end) ( \ 57#define BAD_MADT_ENTRY(entry, end) ( \
@@ -121,35 +107,18 @@ enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
121 */ 107 */
122char *__init __acpi_map_table(unsigned long phys, unsigned long size) 108char *__init __acpi_map_table(unsigned long phys, unsigned long size)
123{ 109{
124 unsigned long base, offset, mapped_size;
125 int idx;
126 110
127 if (!phys || !size) 111 if (!phys || !size)
128 return NULL; 112 return NULL;
129 113
130 if (phys+size <= (max_low_pfn_mapped << PAGE_SHIFT)) 114 return early_ioremap(phys, size);
131 return __va(phys); 115}
132 116void __init __acpi_unmap_table(char *map, unsigned long size)
133 offset = phys & (PAGE_SIZE - 1); 117{
134 mapped_size = PAGE_SIZE - offset; 118 if (!map || !size)
135 clear_fixmap(FIX_ACPI_END); 119 return;
136 set_fixmap(FIX_ACPI_END, phys);
137 base = fix_to_virt(FIX_ACPI_END);
138
139 /*
140 * Most cases can be covered by the below.
141 */
142 idx = FIX_ACPI_END;
143 while (mapped_size < size) {
144 if (--idx < FIX_ACPI_BEGIN)
145 return NULL; /* cannot handle this */
146 phys += PAGE_SIZE;
147 clear_fixmap(idx);
148 set_fixmap(idx, phys);
149 mapped_size += PAGE_SIZE;
150 }
151 120
152 return ((unsigned char *)base + offset); 121 early_iounmap(map, size);
153} 122}
154 123
155#ifdef CONFIG_PCI_MMCONFIG 124#ifdef CONFIG_PCI_MMCONFIG
@@ -239,7 +208,8 @@ static int __init acpi_parse_madt(struct acpi_table_header *table)
239 madt->address); 208 madt->address);
240 } 209 }
241 210
242 acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id); 211 default_acpi_madt_oem_check(madt->header.oem_id,
212 madt->header.oem_table_id);
243 213
244 return 0; 214 return 0;
245} 215}
@@ -884,7 +854,7 @@ static struct {
884 DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); 854 DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
885} mp_ioapic_routing[MAX_IO_APICS]; 855} mp_ioapic_routing[MAX_IO_APICS];
886 856
887static int mp_find_ioapic(int gsi) 857int mp_find_ioapic(int gsi)
888{ 858{
889 int i = 0; 859 int i = 0;
890 860
@@ -899,6 +869,16 @@ static int mp_find_ioapic(int gsi)
899 return -1; 869 return -1;
900} 870}
901 871
872int mp_find_ioapic_pin(int ioapic, int gsi)
873{
874 if (WARN_ON(ioapic == -1))
875 return -1;
876 if (WARN_ON(gsi > mp_ioapic_routing[ioapic].gsi_end))
877 return -1;
878
879 return gsi - mp_ioapic_routing[ioapic].gsi_base;
880}
881
902static u8 __init uniq_ioapic_id(u8 id) 882static u8 __init uniq_ioapic_id(u8 id)
903{ 883{
904#ifdef CONFIG_X86_32 884#ifdef CONFIG_X86_32
@@ -912,8 +892,8 @@ static u8 __init uniq_ioapic_id(u8 id)
912 DECLARE_BITMAP(used, 256); 892 DECLARE_BITMAP(used, 256);
913 bitmap_zero(used, 256); 893 bitmap_zero(used, 256);
914 for (i = 0; i < nr_ioapics; i++) { 894 for (i = 0; i < nr_ioapics; i++) {
915 struct mp_config_ioapic *ia = &mp_ioapics[i]; 895 struct mpc_ioapic *ia = &mp_ioapics[i];
916 __set_bit(ia->mp_apicid, used); 896 __set_bit(ia->apicid, used);
917 } 897 }
918 if (!test_bit(id, used)) 898 if (!test_bit(id, used))
919 return id; 899 return id;
@@ -945,29 +925,29 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
945 925
946 idx = nr_ioapics; 926 idx = nr_ioapics;
947 927
948 mp_ioapics[idx].mp_type = MP_IOAPIC; 928 mp_ioapics[idx].type = MP_IOAPIC;
949 mp_ioapics[idx].mp_flags = MPC_APIC_USABLE; 929 mp_ioapics[idx].flags = MPC_APIC_USABLE;
950 mp_ioapics[idx].mp_apicaddr = address; 930 mp_ioapics[idx].apicaddr = address;
951 931
952 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); 932 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
953 mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id); 933 mp_ioapics[idx].apicid = uniq_ioapic_id(id);
954#ifdef CONFIG_X86_32 934#ifdef CONFIG_X86_32
955 mp_ioapics[idx].mp_apicver = io_apic_get_version(idx); 935 mp_ioapics[idx].apicver = io_apic_get_version(idx);
956#else 936#else
957 mp_ioapics[idx].mp_apicver = 0; 937 mp_ioapics[idx].apicver = 0;
958#endif 938#endif
959 /* 939 /*
960 * Build basic GSI lookup table to facilitate gsi->io_apic lookups 940 * Build basic GSI lookup table to facilitate gsi->io_apic lookups
961 * and to prevent reprogramming of IOAPIC pins (PCI GSIs). 941 * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
962 */ 942 */
963 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid; 943 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].apicid;
964 mp_ioapic_routing[idx].gsi_base = gsi_base; 944 mp_ioapic_routing[idx].gsi_base = gsi_base;
965 mp_ioapic_routing[idx].gsi_end = gsi_base + 945 mp_ioapic_routing[idx].gsi_end = gsi_base +
966 io_apic_get_redir_entries(idx); 946 io_apic_get_redir_entries(idx);
967 947
968 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, " 948 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
969 "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid, 949 "GSI %d-%d\n", idx, mp_ioapics[idx].apicid,
970 mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr, 950 mp_ioapics[idx].apicver, mp_ioapics[idx].apicaddr,
971 mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); 951 mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end);
972 952
973 nr_ioapics++; 953 nr_ioapics++;
@@ -996,19 +976,19 @@ int __init acpi_probe_gsi(void)
996 return max_gsi + 1; 976 return max_gsi + 1;
997} 977}
998 978
999static void assign_to_mp_irq(struct mp_config_intsrc *m, 979static void assign_to_mp_irq(struct mpc_intsrc *m,
1000 struct mp_config_intsrc *mp_irq) 980 struct mpc_intsrc *mp_irq)
1001{ 981{
1002 memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); 982 memcpy(mp_irq, m, sizeof(struct mpc_intsrc));
1003} 983}
1004 984
1005static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, 985static int mp_irq_cmp(struct mpc_intsrc *mp_irq,
1006 struct mp_config_intsrc *m) 986 struct mpc_intsrc *m)
1007{ 987{
1008 return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); 988 return memcmp(mp_irq, m, sizeof(struct mpc_intsrc));
1009} 989}
1010 990
1011static void save_mp_irq(struct mp_config_intsrc *m) 991static void save_mp_irq(struct mpc_intsrc *m)
1012{ 992{
1013 int i; 993 int i;
1014 994
@@ -1026,7 +1006,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
1026{ 1006{
1027 int ioapic; 1007 int ioapic;
1028 int pin; 1008 int pin;
1029 struct mp_config_intsrc mp_irq; 1009 struct mpc_intsrc mp_irq;
1030 1010
1031 /* 1011 /*
1032 * Convert 'gsi' to 'ioapic.pin'. 1012 * Convert 'gsi' to 'ioapic.pin'.
@@ -1034,7 +1014,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
1034 ioapic = mp_find_ioapic(gsi); 1014 ioapic = mp_find_ioapic(gsi);
1035 if (ioapic < 0) 1015 if (ioapic < 0)
1036 return; 1016 return;
1037 pin = gsi - mp_ioapic_routing[ioapic].gsi_base; 1017 pin = mp_find_ioapic_pin(ioapic, gsi);
1038 1018
1039 /* 1019 /*
1040 * TBD: This check is for faulty timer entries, where the override 1020 * TBD: This check is for faulty timer entries, where the override
@@ -1044,13 +1024,13 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
1044 if ((bus_irq == 0) && (trigger == 3)) 1024 if ((bus_irq == 0) && (trigger == 3))
1045 trigger = 1; 1025 trigger = 1;
1046 1026
1047 mp_irq.mp_type = MP_INTSRC; 1027 mp_irq.type = MP_INTSRC;
1048 mp_irq.mp_irqtype = mp_INT; 1028 mp_irq.irqtype = mp_INT;
1049 mp_irq.mp_irqflag = (trigger << 2) | polarity; 1029 mp_irq.irqflag = (trigger << 2) | polarity;
1050 mp_irq.mp_srcbus = MP_ISA_BUS; 1030 mp_irq.srcbus = MP_ISA_BUS;
1051 mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ 1031 mp_irq.srcbusirq = bus_irq; /* IRQ */
1052 mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */ 1032 mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */
1053 mp_irq.mp_dstirq = pin; /* INTIN# */ 1033 mp_irq.dstirq = pin; /* INTIN# */
1054 1034
1055 save_mp_irq(&mp_irq); 1035 save_mp_irq(&mp_irq);
1056} 1036}
@@ -1060,7 +1040,7 @@ void __init mp_config_acpi_legacy_irqs(void)
1060 int i; 1040 int i;
1061 int ioapic; 1041 int ioapic;
1062 unsigned int dstapic; 1042 unsigned int dstapic;
1063 struct mp_config_intsrc mp_irq; 1043 struct mpc_intsrc mp_irq;
1064 1044
1065#if defined (CONFIG_MCA) || defined (CONFIG_EISA) 1045#if defined (CONFIG_MCA) || defined (CONFIG_EISA)
1066 /* 1046 /*
@@ -1085,7 +1065,7 @@ void __init mp_config_acpi_legacy_irqs(void)
1085 ioapic = mp_find_ioapic(0); 1065 ioapic = mp_find_ioapic(0);
1086 if (ioapic < 0) 1066 if (ioapic < 0)
1087 return; 1067 return;
1088 dstapic = mp_ioapics[ioapic].mp_apicid; 1068 dstapic = mp_ioapics[ioapic].apicid;
1089 1069
1090 /* 1070 /*
1091 * Use the default configuration for the IRQs 0-15. Unless 1071 * Use the default configuration for the IRQs 0-15. Unless
@@ -1095,16 +1075,14 @@ void __init mp_config_acpi_legacy_irqs(void)
1095 int idx; 1075 int idx;
1096 1076
1097 for (idx = 0; idx < mp_irq_entries; idx++) { 1077 for (idx = 0; idx < mp_irq_entries; idx++) {
1098 struct mp_config_intsrc *irq = mp_irqs + idx; 1078 struct mpc_intsrc *irq = mp_irqs + idx;
1099 1079
1100 /* Do we already have a mapping for this ISA IRQ? */ 1080 /* Do we already have a mapping for this ISA IRQ? */
1101 if (irq->mp_srcbus == MP_ISA_BUS 1081 if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i)
1102 && irq->mp_srcbusirq == i)
1103 break; 1082 break;
1104 1083
1105 /* Do we already have a mapping for this IOAPIC pin */ 1084 /* Do we already have a mapping for this IOAPIC pin */
1106 if (irq->mp_dstapic == dstapic && 1085 if (irq->dstapic == dstapic && irq->dstirq == i)
1107 irq->mp_dstirq == i)
1108 break; 1086 break;
1109 } 1087 }
1110 1088
@@ -1113,13 +1091,13 @@ void __init mp_config_acpi_legacy_irqs(void)
1113 continue; /* IRQ already used */ 1091 continue; /* IRQ already used */
1114 } 1092 }
1115 1093
1116 mp_irq.mp_type = MP_INTSRC; 1094 mp_irq.type = MP_INTSRC;
1117 mp_irq.mp_irqflag = 0; /* Conforming */ 1095 mp_irq.irqflag = 0; /* Conforming */
1118 mp_irq.mp_srcbus = MP_ISA_BUS; 1096 mp_irq.srcbus = MP_ISA_BUS;
1119 mp_irq.mp_dstapic = dstapic; 1097 mp_irq.dstapic = dstapic;
1120 mp_irq.mp_irqtype = mp_INT; 1098 mp_irq.irqtype = mp_INT;
1121 mp_irq.mp_srcbusirq = i; /* Identity mapped */ 1099 mp_irq.srcbusirq = i; /* Identity mapped */
1122 mp_irq.mp_dstirq = i; 1100 mp_irq.dstirq = i;
1123 1101
1124 save_mp_irq(&mp_irq); 1102 save_mp_irq(&mp_irq);
1125 } 1103 }
@@ -1156,7 +1134,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
1156 return gsi; 1134 return gsi;
1157 } 1135 }
1158 1136
1159 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; 1137 ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
1160 1138
1161#ifdef CONFIG_X86_32 1139#ifdef CONFIG_X86_32
1162 if (ioapic_renumber_irq) 1140 if (ioapic_renumber_irq)
@@ -1230,22 +1208,22 @@ int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
1230 u32 gsi, int triggering, int polarity) 1208 u32 gsi, int triggering, int polarity)
1231{ 1209{
1232#ifdef CONFIG_X86_MPPARSE 1210#ifdef CONFIG_X86_MPPARSE
1233 struct mp_config_intsrc mp_irq; 1211 struct mpc_intsrc mp_irq;
1234 int ioapic; 1212 int ioapic;
1235 1213
1236 if (!acpi_ioapic) 1214 if (!acpi_ioapic)
1237 return 0; 1215 return 0;
1238 1216
1239 /* print the entry should happen on mptable identically */ 1217 /* print the entry should happen on mptable identically */
1240 mp_irq.mp_type = MP_INTSRC; 1218 mp_irq.type = MP_INTSRC;
1241 mp_irq.mp_irqtype = mp_INT; 1219 mp_irq.irqtype = mp_INT;
1242 mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | 1220 mp_irq.irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
1243 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); 1221 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
1244 mp_irq.mp_srcbus = number; 1222 mp_irq.srcbus = number;
1245 mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); 1223 mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
1246 ioapic = mp_find_ioapic(gsi); 1224 ioapic = mp_find_ioapic(gsi);
1247 mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; 1225 mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id;
1248 mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; 1226 mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
1249 1227
1250 save_mp_irq(&mp_irq); 1228 save_mp_irq(&mp_irq);
1251#endif 1229#endif
@@ -1372,7 +1350,7 @@ static void __init acpi_process_madt(void)
1372 if (!error) { 1350 if (!error) {
1373 acpi_lapic = 1; 1351 acpi_lapic = 1;
1374 1352
1375#ifdef CONFIG_X86_GENERICARCH 1353#ifdef CONFIG_X86_BIGSMP
1376 generic_bigsmp_probe(); 1354 generic_bigsmp_probe();
1377#endif 1355#endif
1378 /* 1356 /*
@@ -1384,9 +1362,8 @@ static void __init acpi_process_madt(void)
1384 acpi_ioapic = 1; 1362 acpi_ioapic = 1;
1385 1363
1386 smp_found_config = 1; 1364 smp_found_config = 1;
1387#ifdef CONFIG_X86_32 1365 if (apic->setup_apic_routing)
1388 setup_apic_routing(); 1366 apic->setup_apic_routing();
1389#endif
1390 } 1367 }
1391 } 1368 }
1392 if (error == -EINVAL) { 1369 if (error == -EINVAL) {
diff --git a/arch/x86/kernel/acpi/realmode/wakeup.S b/arch/x86/kernel/acpi/realmode/wakeup.S
index 3355973b12ac..580b4e296010 100644
--- a/arch/x86/kernel/acpi/realmode/wakeup.S
+++ b/arch/x86/kernel/acpi/realmode/wakeup.S
@@ -3,8 +3,8 @@
3 */ 3 */
4#include <asm/segment.h> 4#include <asm/segment.h>
5#include <asm/msr-index.h> 5#include <asm/msr-index.h>
6#include <asm/page.h> 6#include <asm/page_types.h>
7#include <asm/pgtable.h> 7#include <asm/pgtable_types.h>
8#include <asm/processor-flags.h> 8#include <asm/processor-flags.h>
9 9
10 .code16 10 .code16
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index a60c1f3bcb87..7c243a2c5115 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -101,6 +101,7 @@ int acpi_save_state_mem(void)
101 stack_start.sp = temp_stack + sizeof(temp_stack); 101 stack_start.sp = temp_stack + sizeof(temp_stack);
102 early_gdt_descr.address = 102 early_gdt_descr.address =
103 (unsigned long)get_cpu_gdt_table(smp_processor_id()); 103 (unsigned long)get_cpu_gdt_table(smp_processor_id());
104 initial_gs = per_cpu_offset(smp_processor_id());
104#endif 105#endif
105 initial_code = (unsigned long)wakeup_long64; 106 initial_code = (unsigned long)wakeup_long64;
106 saved_magic = 0x123456789abcdef0; 107 saved_magic = 0x123456789abcdef0;
diff --git a/arch/x86/kernel/acpi/wakeup_32.S b/arch/x86/kernel/acpi/wakeup_32.S
index a12e6a9fb659..8ded418b0593 100644
--- a/arch/x86/kernel/acpi/wakeup_32.S
+++ b/arch/x86/kernel/acpi/wakeup_32.S
@@ -1,7 +1,7 @@
1 .section .text.page_aligned 1 .section .text.page_aligned
2#include <linux/linkage.h> 2#include <linux/linkage.h>
3#include <asm/segment.h> 3#include <asm/segment.h>
4#include <asm/page.h> 4#include <asm/page_types.h>
5 5
6# Copyright 2003, 2008 Pavel Machek <pavel@suse.cz>, distribute under GPLv2 6# Copyright 2003, 2008 Pavel Machek <pavel@suse.cz>, distribute under GPLv2
7 7
diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S
index 96258d9dc974..8ea5164cbd04 100644
--- a/arch/x86/kernel/acpi/wakeup_64.S
+++ b/arch/x86/kernel/acpi/wakeup_64.S
@@ -1,8 +1,8 @@
1.text 1.text
2#include <linux/linkage.h> 2#include <linux/linkage.h>
3#include <asm/segment.h> 3#include <asm/segment.h>
4#include <asm/pgtable.h> 4#include <asm/pgtable_types.h>
5#include <asm/page.h> 5#include <asm/page_types.h>
6#include <asm/msr.h> 6#include <asm/msr.h>
7#include <asm/asm-offsets.h> 7#include <asm/asm-offsets.h>
8 8
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index a84ac7b570e6..6907b8e85d52 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -498,12 +498,12 @@ void *text_poke_early(void *addr, const void *opcode, size_t len)
498 */ 498 */
499void *__kprobes text_poke(void *addr, const void *opcode, size_t len) 499void *__kprobes text_poke(void *addr, const void *opcode, size_t len)
500{ 500{
501 unsigned long flags;
502 char *vaddr; 501 char *vaddr;
503 int nr_pages = 2; 502 int nr_pages = 2;
504 struct page *pages[2]; 503 struct page *pages[2];
505 int i; 504 int i;
506 505
506 might_sleep();
507 if (!core_kernel_text((unsigned long)addr)) { 507 if (!core_kernel_text((unsigned long)addr)) {
508 pages[0] = vmalloc_to_page(addr); 508 pages[0] = vmalloc_to_page(addr);
509 pages[1] = vmalloc_to_page(addr + PAGE_SIZE); 509 pages[1] = vmalloc_to_page(addr + PAGE_SIZE);
@@ -517,9 +517,9 @@ void *__kprobes text_poke(void *addr, const void *opcode, size_t len)
517 nr_pages = 1; 517 nr_pages = 1;
518 vaddr = vmap(pages, nr_pages, VM_MAP, PAGE_KERNEL); 518 vaddr = vmap(pages, nr_pages, VM_MAP, PAGE_KERNEL);
519 BUG_ON(!vaddr); 519 BUG_ON(!vaddr);
520 local_irq_save(flags); 520 local_irq_disable();
521 memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len); 521 memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len);
522 local_irq_restore(flags); 522 local_irq_enable();
523 vunmap(vaddr); 523 vunmap(vaddr);
524 sync_core(); 524 sync_core();
525 /* Could also do a CLFLUSH here to speed up CPU recovery; but 525 /* Could also do a CLFLUSH here to speed up CPU recovery; but
diff --git a/arch/x86/kernel/apic/Makefile b/arch/x86/kernel/apic/Makefile
new file mode 100644
index 000000000000..da7b7b9f8bd8
--- /dev/null
+++ b/arch/x86/kernel/apic/Makefile
@@ -0,0 +1,19 @@
1#
2# Makefile for local APIC drivers and for the IO-APIC code
3#
4
5obj-$(CONFIG_X86_LOCAL_APIC) += apic.o probe_$(BITS).o ipi.o nmi.o
6obj-$(CONFIG_X86_IO_APIC) += io_apic.o
7obj-$(CONFIG_SMP) += ipi.o
8
9ifeq ($(CONFIG_X86_64),y)
10obj-y += apic_flat_64.o
11obj-$(CONFIG_X86_X2APIC) += x2apic_cluster.o
12obj-$(CONFIG_X86_X2APIC) += x2apic_phys.o
13obj-$(CONFIG_X86_UV) += x2apic_uv_x.o
14endif
15
16obj-$(CONFIG_X86_BIGSMP) += bigsmp_32.o
17obj-$(CONFIG_X86_NUMAQ) += numaq_32.o
18obj-$(CONFIG_X86_ES7000) += es7000_32.o
19obj-$(CONFIG_X86_SUMMIT) += summit_32.o
diff --git a/arch/x86/kernel/apic.c b/arch/x86/kernel/apic/apic.c
index 570f36e44e59..f9cecdfd05c5 100644
--- a/arch/x86/kernel/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Local APIC handling, local APIC timers 2 * Local APIC handling, local APIC timers
3 * 3 *
4 * (c) 1999, 2000 Ingo Molnar <mingo@redhat.com> 4 * (c) 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
5 * 5 *
6 * Fixes 6 * Fixes
7 * Maciej W. Rozycki : Bits for genuine 82489DX APICs; 7 * Maciej W. Rozycki : Bits for genuine 82489DX APICs;
@@ -14,51 +14,69 @@
14 * Mikael Pettersson : PM converted to driver model. 14 * Mikael Pettersson : PM converted to driver model.
15 */ 15 */
16 16
17#include <linux/init.h>
18
19#include <linux/mm.h>
20#include <linux/delay.h>
21#include <linux/bootmem.h>
22#include <linux/interrupt.h>
23#include <linux/mc146818rtc.h>
24#include <linux/kernel_stat.h> 17#include <linux/kernel_stat.h>
25#include <linux/sysdev.h> 18#include <linux/mc146818rtc.h>
26#include <linux/ioport.h>
27#include <linux/cpu.h>
28#include <linux/clockchips.h>
29#include <linux/acpi_pmtmr.h> 19#include <linux/acpi_pmtmr.h>
20#include <linux/clockchips.h>
21#include <linux/interrupt.h>
22#include <linux/bootmem.h>
23#include <linux/ftrace.h>
24#include <linux/ioport.h>
30#include <linux/module.h> 25#include <linux/module.h>
31#include <linux/dmi.h> 26#include <linux/sysdev.h>
27#include <linux/delay.h>
28#include <linux/timex.h>
32#include <linux/dmar.h> 29#include <linux/dmar.h>
33#include <linux/ftrace.h> 30#include <linux/init.h>
34#include <linux/smp.h> 31#include <linux/cpu.h>
32#include <linux/dmi.h>
35#include <linux/nmi.h> 33#include <linux/nmi.h>
36#include <linux/timex.h> 34#include <linux/smp.h>
35#include <linux/mm.h>
37 36
37#include <asm/pgalloc.h>
38#include <asm/atomic.h> 38#include <asm/atomic.h>
39#include <asm/mtrr.h>
40#include <asm/mpspec.h> 39#include <asm/mpspec.h>
41#include <asm/desc.h>
42#include <asm/arch_hooks.h>
43#include <asm/hpet.h>
44#include <asm/pgalloc.h>
45#include <asm/i8253.h> 40#include <asm/i8253.h>
46#include <asm/idle.h> 41#include <asm/i8259.h>
47#include <asm/proto.h> 42#include <asm/proto.h>
48#include <asm/apic.h> 43#include <asm/apic.h>
49#include <asm/i8259.h> 44#include <asm/desc.h>
45#include <asm/hpet.h>
46#include <asm/idle.h>
47#include <asm/mtrr.h>
50#include <asm/smp.h> 48#include <asm/smp.h>
51 49
52#include <mach_apic.h> 50unsigned int num_processors;
53#include <mach_apicdef.h> 51
54#include <mach_ipi.h> 52unsigned disabled_cpus __cpuinitdata;
53
54/* Processor that is doing the boot up */
55unsigned int boot_cpu_physical_apicid = -1U;
55 56
56/* 57/*
57 * Sanity check 58 * The highest APIC ID seen during enumeration.
59 *
60 * This determines the messaging protocol we can use: if all APIC IDs
61 * are in the 0 ... 7 range, then we can use logical addressing which
62 * has some performance advantages (better broadcasting).
63 *
64 * If there's an APIC ID above 8, we use physical addressing.
58 */ 65 */
59#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F) 66unsigned int max_physical_apicid;
60# error SPURIOUS_APIC_VECTOR definition error 67
61#endif 68/*
69 * Bitmask of physically existing CPUs:
70 */
71physid_mask_t phys_cpu_present_map;
72
73/*
74 * Map cpu index to physical APIC ID
75 */
76DEFINE_EARLY_PER_CPU(u16, x86_cpu_to_apicid, BAD_APICID);
77DEFINE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid, BAD_APICID);
78EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid);
79EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
62 80
63#ifdef CONFIG_X86_32 81#ifdef CONFIG_X86_32
64/* 82/*
@@ -92,11 +110,7 @@ static __init int setup_apicpmtimer(char *s)
92__setup("apicpmtimer", setup_apicpmtimer); 110__setup("apicpmtimer", setup_apicpmtimer);
93#endif 111#endif
94 112
95#ifdef CONFIG_X86_64 113#ifdef CONFIG_X86_X2APIC
96#define HAVE_X2APIC
97#endif
98
99#ifdef HAVE_X2APIC
100int x2apic; 114int x2apic;
101/* x2apic enabled before OS handover */ 115/* x2apic enabled before OS handover */
102static int x2apic_preenabled; 116static int x2apic_preenabled;
@@ -194,18 +208,13 @@ static int modern_apic(void)
194 return lapic_get_version() >= 0x14; 208 return lapic_get_version() >= 0x14;
195} 209}
196 210
197/* 211void native_apic_wait_icr_idle(void)
198 * Paravirt kernels also might be using these below ops. So we still
199 * use generic apic_read()/apic_write(), which might be pointing to different
200 * ops in PARAVIRT case.
201 */
202void xapic_wait_icr_idle(void)
203{ 212{
204 while (apic_read(APIC_ICR) & APIC_ICR_BUSY) 213 while (apic_read(APIC_ICR) & APIC_ICR_BUSY)
205 cpu_relax(); 214 cpu_relax();
206} 215}
207 216
208u32 safe_xapic_wait_icr_idle(void) 217u32 native_safe_apic_wait_icr_idle(void)
209{ 218{
210 u32 send_status; 219 u32 send_status;
211 int timeout; 220 int timeout;
@@ -221,13 +230,13 @@ u32 safe_xapic_wait_icr_idle(void)
221 return send_status; 230 return send_status;
222} 231}
223 232
224void xapic_icr_write(u32 low, u32 id) 233void native_apic_icr_write(u32 low, u32 id)
225{ 234{
226 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id)); 235 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id));
227 apic_write(APIC_ICR, low); 236 apic_write(APIC_ICR, low);
228} 237}
229 238
230static u64 xapic_icr_read(void) 239u64 native_apic_icr_read(void)
231{ 240{
232 u32 icr1, icr2; 241 u32 icr1, icr2;
233 242
@@ -237,54 +246,6 @@ static u64 xapic_icr_read(void)
237 return icr1 | ((u64)icr2 << 32); 246 return icr1 | ((u64)icr2 << 32);
238} 247}
239 248
240static struct apic_ops xapic_ops = {
241 .read = native_apic_mem_read,
242 .write = native_apic_mem_write,
243 .icr_read = xapic_icr_read,
244 .icr_write = xapic_icr_write,
245 .wait_icr_idle = xapic_wait_icr_idle,
246 .safe_wait_icr_idle = safe_xapic_wait_icr_idle,
247};
248
249struct apic_ops __read_mostly *apic_ops = &xapic_ops;
250EXPORT_SYMBOL_GPL(apic_ops);
251
252#ifdef HAVE_X2APIC
253static void x2apic_wait_icr_idle(void)
254{
255 /* no need to wait for icr idle in x2apic */
256 return;
257}
258
259static u32 safe_x2apic_wait_icr_idle(void)
260{
261 /* no need to wait for icr idle in x2apic */
262 return 0;
263}
264
265void x2apic_icr_write(u32 low, u32 id)
266{
267 wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low);
268}
269
270static u64 x2apic_icr_read(void)
271{
272 unsigned long val;
273
274 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val);
275 return val;
276}
277
278static struct apic_ops x2apic_ops = {
279 .read = native_apic_msr_read,
280 .write = native_apic_msr_write,
281 .icr_read = x2apic_icr_read,
282 .icr_write = x2apic_icr_write,
283 .wait_icr_idle = x2apic_wait_icr_idle,
284 .safe_wait_icr_idle = safe_x2apic_wait_icr_idle,
285};
286#endif
287
288/** 249/**
289 * enable_NMI_through_LVT0 - enable NMI through local vector table 0 250 * enable_NMI_through_LVT0 - enable NMI through local vector table 0
290 */ 251 */
@@ -457,7 +418,7 @@ static void lapic_timer_setup(enum clock_event_mode mode,
457static void lapic_timer_broadcast(const struct cpumask *mask) 418static void lapic_timer_broadcast(const struct cpumask *mask)
458{ 419{
459#ifdef CONFIG_SMP 420#ifdef CONFIG_SMP
460 send_IPI_mask(mask, LOCAL_TIMER_VECTOR); 421 apic->send_IPI_mask(mask, LOCAL_TIMER_VECTOR);
461#endif 422#endif
462} 423}
463 424
@@ -535,7 +496,8 @@ static void __init lapic_cal_handler(struct clock_event_device *dev)
535 } 496 }
536} 497}
537 498
538static int __init calibrate_by_pmtimer(long deltapm, long *delta) 499static int __init
500calibrate_by_pmtimer(long deltapm, long *delta, long *deltatsc)
539{ 501{
540 const long pm_100ms = PMTMR_TICKS_PER_SEC / 10; 502 const long pm_100ms = PMTMR_TICKS_PER_SEC / 10;
541 const long pm_thresh = pm_100ms / 100; 503 const long pm_thresh = pm_100ms / 100;
@@ -546,7 +508,7 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta)
546 return -1; 508 return -1;
547#endif 509#endif
548 510
549 apic_printk(APIC_VERBOSE, "... PM timer delta = %ld\n", deltapm); 511 apic_printk(APIC_VERBOSE, "... PM-Timer delta = %ld\n", deltapm);
550 512
551 /* Check, if the PM timer is available */ 513 /* Check, if the PM timer is available */
552 if (!deltapm) 514 if (!deltapm)
@@ -556,19 +518,30 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta)
556 518
557 if (deltapm > (pm_100ms - pm_thresh) && 519 if (deltapm > (pm_100ms - pm_thresh) &&
558 deltapm < (pm_100ms + pm_thresh)) { 520 deltapm < (pm_100ms + pm_thresh)) {
559 apic_printk(APIC_VERBOSE, "... PM timer result ok\n"); 521 apic_printk(APIC_VERBOSE, "... PM-Timer result ok\n");
560 } else { 522 return 0;
561 res = (((u64)deltapm) * mult) >> 22; 523 }
562 do_div(res, 1000000); 524
563 pr_warning("APIC calibration not consistent " 525 res = (((u64)deltapm) * mult) >> 22;
564 "with PM Timer: %ldms instead of 100ms\n", 526 do_div(res, 1000000);
565 (long)res); 527 pr_warning("APIC calibration not consistent "
566 /* Correct the lapic counter value */ 528 "with PM-Timer: %ldms instead of 100ms\n",(long)res);
567 res = (((u64)(*delta)) * pm_100ms); 529
530 /* Correct the lapic counter value */
531 res = (((u64)(*delta)) * pm_100ms);
532 do_div(res, deltapm);
533 pr_info("APIC delta adjusted to PM-Timer: "
534 "%lu (%ld)\n", (unsigned long)res, *delta);
535 *delta = (long)res;
536
537 /* Correct the tsc counter value */
538 if (cpu_has_tsc) {
539 res = (((u64)(*deltatsc)) * pm_100ms);
568 do_div(res, deltapm); 540 do_div(res, deltapm);
569 pr_info("APIC delta adjusted to PM-Timer: " 541 apic_printk(APIC_VERBOSE, "TSC delta adjusted to "
570 "%lu (%ld)\n", (unsigned long)res, *delta); 542 "PM-Timer: %lu (%ld) \n",
571 *delta = (long)res; 543 (unsigned long)res, *deltatsc);
544 *deltatsc = (long)res;
572 } 545 }
573 546
574 return 0; 547 return 0;
@@ -579,7 +552,7 @@ static int __init calibrate_APIC_clock(void)
579 struct clock_event_device *levt = &__get_cpu_var(lapic_events); 552 struct clock_event_device *levt = &__get_cpu_var(lapic_events);
580 void (*real_handler)(struct clock_event_device *dev); 553 void (*real_handler)(struct clock_event_device *dev);
581 unsigned long deltaj; 554 unsigned long deltaj;
582 long delta; 555 long delta, deltatsc;
583 int pm_referenced = 0; 556 int pm_referenced = 0;
584 557
585 local_irq_disable(); 558 local_irq_disable();
@@ -609,9 +582,11 @@ static int __init calibrate_APIC_clock(void)
609 delta = lapic_cal_t1 - lapic_cal_t2; 582 delta = lapic_cal_t1 - lapic_cal_t2;
610 apic_printk(APIC_VERBOSE, "... lapic delta = %ld\n", delta); 583 apic_printk(APIC_VERBOSE, "... lapic delta = %ld\n", delta);
611 584
585 deltatsc = (long)(lapic_cal_tsc2 - lapic_cal_tsc1);
586
612 /* we trust the PM based calibration if possible */ 587 /* we trust the PM based calibration if possible */
613 pm_referenced = !calibrate_by_pmtimer(lapic_cal_pm2 - lapic_cal_pm1, 588 pm_referenced = !calibrate_by_pmtimer(lapic_cal_pm2 - lapic_cal_pm1,
614 &delta); 589 &delta, &deltatsc);
615 590
616 /* Calculate the scaled math multiplication factor */ 591 /* Calculate the scaled math multiplication factor */
617 lapic_clockevent.mult = div_sc(delta, TICK_NSEC * LAPIC_CAL_LOOPS, 592 lapic_clockevent.mult = div_sc(delta, TICK_NSEC * LAPIC_CAL_LOOPS,
@@ -629,11 +604,10 @@ static int __init calibrate_APIC_clock(void)
629 calibration_result); 604 calibration_result);
630 605
631 if (cpu_has_tsc) { 606 if (cpu_has_tsc) {
632 delta = (long)(lapic_cal_tsc2 - lapic_cal_tsc1);
633 apic_printk(APIC_VERBOSE, "..... CPU clock speed is " 607 apic_printk(APIC_VERBOSE, "..... CPU clock speed is "
634 "%ld.%04ld MHz.\n", 608 "%ld.%04ld MHz.\n",
635 (delta / LAPIC_CAL_LOOPS) / (1000000 / HZ), 609 (deltatsc / LAPIC_CAL_LOOPS) / (1000000 / HZ),
636 (delta / LAPIC_CAL_LOOPS) % (1000000 / HZ)); 610 (deltatsc / LAPIC_CAL_LOOPS) % (1000000 / HZ));
637 } 611 }
638 612
639 apic_printk(APIC_VERBOSE, "..... host bus clock speed is " 613 apic_printk(APIC_VERBOSE, "..... host bus clock speed is "
@@ -991,11 +965,11 @@ int __init verify_local_APIC(void)
991 */ 965 */
992 reg0 = apic_read(APIC_ID); 966 reg0 = apic_read(APIC_ID);
993 apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg0); 967 apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg0);
994 apic_write(APIC_ID, reg0 ^ APIC_ID_MASK); 968 apic_write(APIC_ID, reg0 ^ apic->apic_id_mask);
995 reg1 = apic_read(APIC_ID); 969 reg1 = apic_read(APIC_ID);
996 apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg1); 970 apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg1);
997 apic_write(APIC_ID, reg0); 971 apic_write(APIC_ID, reg0);
998 if (reg1 != (reg0 ^ APIC_ID_MASK)) 972 if (reg1 != (reg0 ^ apic->apic_id_mask))
999 return 0; 973 return 0;
1000 974
1001 /* 975 /*
@@ -1089,7 +1063,7 @@ static void __cpuinit lapic_setup_esr(void)
1089 return; 1063 return;
1090 } 1064 }
1091 1065
1092 if (esr_disable) { 1066 if (apic->disable_esr) {
1093 /* 1067 /*
1094 * Something untraceable is creating bad interrupts on 1068 * Something untraceable is creating bad interrupts on
1095 * secondary quads ... for the moment, just leave the 1069 * secondary quads ... for the moment, just leave the
@@ -1130,9 +1104,14 @@ void __cpuinit setup_local_APIC(void)
1130 unsigned int value; 1104 unsigned int value;
1131 int i, j; 1105 int i, j;
1132 1106
1107 if (disable_apic) {
1108 arch_disable_smp_support();
1109 return;
1110 }
1111
1133#ifdef CONFIG_X86_32 1112#ifdef CONFIG_X86_32
1134 /* Pound the ESR really hard over the head with a big hammer - mbligh */ 1113 /* Pound the ESR really hard over the head with a big hammer - mbligh */
1135 if (lapic_is_integrated() && esr_disable) { 1114 if (lapic_is_integrated() && apic->disable_esr) {
1136 apic_write(APIC_ESR, 0); 1115 apic_write(APIC_ESR, 0);
1137 apic_write(APIC_ESR, 0); 1116 apic_write(APIC_ESR, 0);
1138 apic_write(APIC_ESR, 0); 1117 apic_write(APIC_ESR, 0);
@@ -1146,7 +1125,7 @@ void __cpuinit setup_local_APIC(void)
1146 * Double-check whether this APIC is really registered. 1125 * Double-check whether this APIC is really registered.
1147 * This is meaningless in clustered apic mode, so we skip it. 1126 * This is meaningless in clustered apic mode, so we skip it.
1148 */ 1127 */
1149 if (!apic_id_registered()) 1128 if (!apic->apic_id_registered())
1150 BUG(); 1129 BUG();
1151 1130
1152 /* 1131 /*
@@ -1154,7 +1133,7 @@ void __cpuinit setup_local_APIC(void)
1154 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel 1133 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
1155 * document number 292116). So here it goes... 1134 * document number 292116). So here it goes...
1156 */ 1135 */
1157 init_apic_ldr(); 1136 apic->init_apic_ldr();
1158 1137
1159 /* 1138 /*
1160 * Set Task Priority to 'accept all'. We never change this 1139 * Set Task Priority to 'accept all'. We never change this
@@ -1282,17 +1261,12 @@ void __cpuinit end_local_APIC_setup(void)
1282 apic_pm_activate(); 1261 apic_pm_activate();
1283} 1262}
1284 1263
1285#ifdef HAVE_X2APIC 1264#ifdef CONFIG_X86_X2APIC
1286void check_x2apic(void) 1265void check_x2apic(void)
1287{ 1266{
1288 int msr, msr2; 1267 if (x2apic_enabled()) {
1289
1290 rdmsr(MSR_IA32_APICBASE, msr, msr2);
1291
1292 if (msr & X2APIC_ENABLE) {
1293 pr_info("x2apic enabled by BIOS, switching to x2apic ops\n"); 1268 pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
1294 x2apic_preenabled = x2apic = 1; 1269 x2apic_preenabled = x2apic = 1;
1295 apic_ops = &x2apic_ops;
1296 } 1270 }
1297} 1271}
1298 1272
@@ -1300,6 +1274,9 @@ void enable_x2apic(void)
1300{ 1274{
1301 int msr, msr2; 1275 int msr, msr2;
1302 1276
1277 if (!x2apic)
1278 return;
1279
1303 rdmsr(MSR_IA32_APICBASE, msr, msr2); 1280 rdmsr(MSR_IA32_APICBASE, msr, msr2);
1304 if (!(msr & X2APIC_ENABLE)) { 1281 if (!(msr & X2APIC_ENABLE)) {
1305 pr_info("Enabling x2apic\n"); 1282 pr_info("Enabling x2apic\n");
@@ -1363,7 +1340,6 @@ void __init enable_IR_x2apic(void)
1363 1340
1364 if (!x2apic) { 1341 if (!x2apic) {
1365 x2apic = 1; 1342 x2apic = 1;
1366 apic_ops = &x2apic_ops;
1367 enable_x2apic(); 1343 enable_x2apic();
1368 } 1344 }
1369 1345
@@ -1401,7 +1377,7 @@ end:
1401 1377
1402 return; 1378 return;
1403} 1379}
1404#endif /* HAVE_X2APIC */ 1380#endif /* CONFIG_X86_X2APIC */
1405 1381
1406#ifdef CONFIG_X86_64 1382#ifdef CONFIG_X86_64
1407/* 1383/*
@@ -1532,7 +1508,7 @@ void __init early_init_lapic_mapping(void)
1532 */ 1508 */
1533void __init init_apic_mappings(void) 1509void __init init_apic_mappings(void)
1534{ 1510{
1535#ifdef HAVE_X2APIC 1511#ifdef CONFIG_X86_X2APIC
1536 if (x2apic) { 1512 if (x2apic) {
1537 boot_cpu_physical_apicid = read_apic_id(); 1513 boot_cpu_physical_apicid = read_apic_id();
1538 return; 1514 return;
@@ -1570,11 +1546,11 @@ int apic_version[MAX_APICS];
1570 1546
1571int __init APIC_init_uniprocessor(void) 1547int __init APIC_init_uniprocessor(void)
1572{ 1548{
1573#ifdef CONFIG_X86_64
1574 if (disable_apic) { 1549 if (disable_apic) {
1575 pr_info("Apic disabled\n"); 1550 pr_info("Apic disabled\n");
1576 return -1; 1551 return -1;
1577 } 1552 }
1553#ifdef CONFIG_X86_64
1578 if (!cpu_has_apic) { 1554 if (!cpu_has_apic) {
1579 disable_apic = 1; 1555 disable_apic = 1;
1580 pr_info("Apic disabled by BIOS\n"); 1556 pr_info("Apic disabled by BIOS\n");
@@ -1596,11 +1572,9 @@ int __init APIC_init_uniprocessor(void)
1596 } 1572 }
1597#endif 1573#endif
1598 1574
1599#ifdef HAVE_X2APIC
1600 enable_IR_x2apic(); 1575 enable_IR_x2apic();
1601#endif
1602#ifdef CONFIG_X86_64 1576#ifdef CONFIG_X86_64
1603 setup_apic_routing(); 1577 default_setup_apic_routing();
1604#endif 1578#endif
1605 1579
1606 verify_local_APIC(); 1580 verify_local_APIC();
@@ -1621,35 +1595,31 @@ int __init APIC_init_uniprocessor(void)
1621 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); 1595 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
1622 setup_local_APIC(); 1596 setup_local_APIC();
1623 1597
1624#ifdef CONFIG_X86_64 1598#ifdef CONFIG_X86_IO_APIC
1625 /* 1599 /*
1626 * Now enable IO-APICs, actually call clear_IO_APIC 1600 * Now enable IO-APICs, actually call clear_IO_APIC
1627 * We need clear_IO_APIC before enabling vector on BP 1601 * We need clear_IO_APIC before enabling error vector
1628 */ 1602 */
1629 if (!skip_ioapic_setup && nr_ioapics) 1603 if (!skip_ioapic_setup && nr_ioapics)
1630 enable_IO_APIC(); 1604 enable_IO_APIC();
1631#endif 1605#endif
1632 1606
1633#ifdef CONFIG_X86_IO_APIC
1634 if (!smp_found_config || skip_ioapic_setup || !nr_ioapics)
1635#endif
1636 localise_nmi_watchdog();
1637 end_local_APIC_setup(); 1607 end_local_APIC_setup();
1638 1608
1639#ifdef CONFIG_X86_IO_APIC 1609#ifdef CONFIG_X86_IO_APIC
1640 if (smp_found_config && !skip_ioapic_setup && nr_ioapics) 1610 if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
1641 setup_IO_APIC(); 1611 setup_IO_APIC();
1642# ifdef CONFIG_X86_64 1612 else {
1643 else
1644 nr_ioapics = 0; 1613 nr_ioapics = 0;
1645# endif 1614 localise_nmi_watchdog();
1615 }
1616#else
1617 localise_nmi_watchdog();
1646#endif 1618#endif
1647 1619
1620 setup_boot_clock();
1648#ifdef CONFIG_X86_64 1621#ifdef CONFIG_X86_64
1649 setup_boot_APIC_clock();
1650 check_nmi_watchdog(); 1622 check_nmi_watchdog();
1651#else
1652 setup_boot_clock();
1653#endif 1623#endif
1654 1624
1655 return 0; 1625 return 0;
@@ -1738,7 +1708,8 @@ void __init connect_bsp_APIC(void)
1738 outb(0x01, 0x23); 1708 outb(0x01, 0x23);
1739 } 1709 }
1740#endif 1710#endif
1741 enable_apic_mode(); 1711 if (apic->enable_apic_mode)
1712 apic->enable_apic_mode();
1742} 1713}
1743 1714
1744/** 1715/**
@@ -1876,29 +1847,39 @@ void __cpuinit generic_processor_info(int apicid, int version)
1876 } 1847 }
1877#endif 1848#endif
1878 1849
1879#if defined(CONFIG_X86_SMP) || defined(CONFIG_X86_64) 1850#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
1880 /* are we being called early in kernel startup? */ 1851 early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;
1881 if (early_per_cpu_ptr(x86_cpu_to_apicid)) { 1852 early_per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
1882 u16 *cpu_to_apicid = early_per_cpu_ptr(x86_cpu_to_apicid);
1883 u16 *bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid);
1884
1885 cpu_to_apicid[cpu] = apicid;
1886 bios_cpu_apicid[cpu] = apicid;
1887 } else {
1888 per_cpu(x86_cpu_to_apicid, cpu) = apicid;
1889 per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
1890 }
1891#endif 1853#endif
1892 1854
1893 set_cpu_possible(cpu, true); 1855 set_cpu_possible(cpu, true);
1894 set_cpu_present(cpu, true); 1856 set_cpu_present(cpu, true);
1895} 1857}
1896 1858
1897#ifdef CONFIG_X86_64
1898int hard_smp_processor_id(void) 1859int hard_smp_processor_id(void)
1899{ 1860{
1900 return read_apic_id(); 1861 return read_apic_id();
1901} 1862}
1863
1864void default_init_apic_ldr(void)
1865{
1866 unsigned long val;
1867
1868 apic_write(APIC_DFR, APIC_DFR_VALUE);
1869 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
1870 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
1871 apic_write(APIC_LDR, val);
1872}
1873
1874#ifdef CONFIG_X86_32
1875int default_apicid_to_node(int logical_apicid)
1876{
1877#ifdef CONFIG_SMP
1878 return apicid_2_node[hard_smp_processor_id()];
1879#else
1880 return 0;
1881#endif
1882}
1902#endif 1883#endif
1903 1884
1904/* 1885/*
@@ -1976,7 +1957,7 @@ static int lapic_resume(struct sys_device *dev)
1976 1957
1977 local_irq_save(flags); 1958 local_irq_save(flags);
1978 1959
1979#ifdef HAVE_X2APIC 1960#ifdef CONFIG_X86_X2APIC
1980 if (x2apic) 1961 if (x2apic)
1981 enable_x2apic(); 1962 enable_x2apic();
1982 else 1963 else
diff --git a/arch/x86/kernel/genapic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index 34185488e4fb..f933822dba18 100644
--- a/arch/x86/kernel/genapic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -17,9 +17,8 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/hardirq.h> 18#include <linux/hardirq.h>
19#include <asm/smp.h> 19#include <asm/smp.h>
20#include <asm/apic.h>
20#include <asm/ipi.h> 21#include <asm/ipi.h>
21#include <asm/genapic.h>
22#include <mach_apicdef.h>
23 22
24#ifdef CONFIG_ACPI 23#ifdef CONFIG_ACPI
25#include <acpi/acpi_bus.h> 24#include <acpi/acpi_bus.h>
@@ -74,7 +73,7 @@ static inline void _flat_send_IPI_mask(unsigned long mask, int vector)
74 unsigned long flags; 73 unsigned long flags;
75 74
76 local_irq_save(flags); 75 local_irq_save(flags);
77 __send_IPI_dest_field(mask, vector, APIC_DEST_LOGICAL); 76 __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
78 local_irq_restore(flags); 77 local_irq_restore(flags);
79} 78}
80 79
@@ -85,14 +84,15 @@ static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector)
85 _flat_send_IPI_mask(mask, vector); 84 _flat_send_IPI_mask(mask, vector);
86} 85}
87 86
88static void flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, 87static void
89 int vector) 88 flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector)
90{ 89{
91 unsigned long mask = cpumask_bits(cpumask)[0]; 90 unsigned long mask = cpumask_bits(cpumask)[0];
92 int cpu = smp_processor_id(); 91 int cpu = smp_processor_id();
93 92
94 if (cpu < BITS_PER_LONG) 93 if (cpu < BITS_PER_LONG)
95 clear_bit(cpu, &mask); 94 clear_bit(cpu, &mask);
95
96 _flat_send_IPI_mask(mask, vector); 96 _flat_send_IPI_mask(mask, vector);
97} 97}
98 98
@@ -114,23 +114,27 @@ static void flat_send_IPI_allbutself(int vector)
114 _flat_send_IPI_mask(mask, vector); 114 _flat_send_IPI_mask(mask, vector);
115 } 115 }
116 } else if (num_online_cpus() > 1) { 116 } else if (num_online_cpus() > 1) {
117 __send_IPI_shortcut(APIC_DEST_ALLBUT, vector,APIC_DEST_LOGICAL); 117 __default_send_IPI_shortcut(APIC_DEST_ALLBUT,
118 vector, apic->dest_logical);
118 } 119 }
119} 120}
120 121
121static void flat_send_IPI_all(int vector) 122static void flat_send_IPI_all(int vector)
122{ 123{
123 if (vector == NMI_VECTOR) 124 if (vector == NMI_VECTOR) {
124 flat_send_IPI_mask(cpu_online_mask, vector); 125 flat_send_IPI_mask(cpu_online_mask, vector);
125 else 126 } else {
126 __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL); 127 __default_send_IPI_shortcut(APIC_DEST_ALLINC,
128 vector, apic->dest_logical);
129 }
127} 130}
128 131
129static unsigned int get_apic_id(unsigned long x) 132static unsigned int flat_get_apic_id(unsigned long x)
130{ 133{
131 unsigned int id; 134 unsigned int id;
132 135
133 id = (((x)>>24) & 0xFFu); 136 id = (((x)>>24) & 0xFFu);
137
134 return id; 138 return id;
135} 139}
136 140
@@ -146,7 +150,7 @@ static unsigned int read_xapic_id(void)
146{ 150{
147 unsigned int id; 151 unsigned int id;
148 152
149 id = get_apic_id(apic_read(APIC_ID)); 153 id = flat_get_apic_id(apic_read(APIC_ID));
150 return id; 154 return id;
151} 155}
152 156
@@ -169,31 +173,67 @@ static unsigned int flat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
169 return mask1 & mask2; 173 return mask1 & mask2;
170} 174}
171 175
172static unsigned int phys_pkg_id(int index_msb) 176static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
173{ 177{
174 return hard_smp_processor_id() >> index_msb; 178 return hard_smp_processor_id() >> index_msb;
175} 179}
176 180
177struct genapic apic_flat = { 181struct apic apic_flat = {
178 .name = "flat", 182 .name = "flat",
179 .acpi_madt_oem_check = flat_acpi_madt_oem_check, 183 .probe = NULL,
180 .int_delivery_mode = dest_LowestPrio, 184 .acpi_madt_oem_check = flat_acpi_madt_oem_check,
181 .int_dest_mode = (APIC_DEST_LOGICAL != 0), 185 .apic_id_registered = flat_apic_id_registered,
182 .target_cpus = flat_target_cpus, 186
183 .vector_allocation_domain = flat_vector_allocation_domain, 187 .irq_delivery_mode = dest_LowestPrio,
184 .apic_id_registered = flat_apic_id_registered, 188 .irq_dest_mode = 1, /* logical */
185 .init_apic_ldr = flat_init_apic_ldr, 189
186 .send_IPI_all = flat_send_IPI_all, 190 .target_cpus = flat_target_cpus,
187 .send_IPI_allbutself = flat_send_IPI_allbutself, 191 .disable_esr = 0,
188 .send_IPI_mask = flat_send_IPI_mask, 192 .dest_logical = APIC_DEST_LOGICAL,
189 .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself, 193 .check_apicid_used = NULL,
190 .send_IPI_self = apic_send_IPI_self, 194 .check_apicid_present = NULL,
191 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid, 195
192 .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and, 196 .vector_allocation_domain = flat_vector_allocation_domain,
193 .phys_pkg_id = phys_pkg_id, 197 .init_apic_ldr = flat_init_apic_ldr,
194 .get_apic_id = get_apic_id, 198
195 .set_apic_id = set_apic_id, 199 .ioapic_phys_id_map = NULL,
196 .apic_id_mask = (0xFFu<<24), 200 .setup_apic_routing = NULL,
201 .multi_timer_check = NULL,
202 .apicid_to_node = NULL,
203 .cpu_to_logical_apicid = NULL,
204 .cpu_present_to_apicid = default_cpu_present_to_apicid,
205 .apicid_to_cpu_present = NULL,
206 .setup_portio_remap = NULL,
207 .check_phys_apicid_present = default_check_phys_apicid_present,
208 .enable_apic_mode = NULL,
209 .phys_pkg_id = flat_phys_pkg_id,
210 .mps_oem_check = NULL,
211
212 .get_apic_id = flat_get_apic_id,
213 .set_apic_id = set_apic_id,
214 .apic_id_mask = 0xFFu << 24,
215
216 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
217 .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and,
218
219 .send_IPI_mask = flat_send_IPI_mask,
220 .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
221 .send_IPI_allbutself = flat_send_IPI_allbutself,
222 .send_IPI_all = flat_send_IPI_all,
223 .send_IPI_self = apic_send_IPI_self,
224
225 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
226 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
227 .wait_for_init_deassert = NULL,
228 .smp_callin_clear_local_apic = NULL,
229 .inquire_remote_apic = NULL,
230
231 .read = native_apic_mem_read,
232 .write = native_apic_mem_write,
233 .icr_read = native_apic_icr_read,
234 .icr_write = native_apic_icr_write,
235 .wait_icr_idle = native_apic_wait_icr_idle,
236 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
197}; 237};
198 238
199/* 239/*
@@ -232,18 +272,18 @@ static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask)
232 272
233static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector) 273static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)
234{ 274{
235 send_IPI_mask_sequence(cpumask, vector); 275 default_send_IPI_mask_sequence_phys(cpumask, vector);
236} 276}
237 277
238static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask, 278static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
239 int vector) 279 int vector)
240{ 280{
241 send_IPI_mask_allbutself(cpumask, vector); 281 default_send_IPI_mask_allbutself_phys(cpumask, vector);
242} 282}
243 283
244static void physflat_send_IPI_allbutself(int vector) 284static void physflat_send_IPI_allbutself(int vector)
245{ 285{
246 send_IPI_mask_allbutself(cpu_online_mask, vector); 286 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
247} 287}
248 288
249static void physflat_send_IPI_all(int vector) 289static void physflat_send_IPI_all(int vector)
@@ -276,32 +316,72 @@ physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
276 * We're using fixed IRQ delivery, can only return one phys APIC ID. 316 * We're using fixed IRQ delivery, can only return one phys APIC ID.
277 * May as well be the first. 317 * May as well be the first.
278 */ 318 */
279 for_each_cpu_and(cpu, cpumask, andmask) 319 for_each_cpu_and(cpu, cpumask, andmask) {
280 if (cpumask_test_cpu(cpu, cpu_online_mask)) 320 if (cpumask_test_cpu(cpu, cpu_online_mask))
281 break; 321 break;
322 }
282 if (cpu < nr_cpu_ids) 323 if (cpu < nr_cpu_ids)
283 return per_cpu(x86_cpu_to_apicid, cpu); 324 return per_cpu(x86_cpu_to_apicid, cpu);
325
284 return BAD_APICID; 326 return BAD_APICID;
285} 327}
286 328
287struct genapic apic_physflat = { 329struct apic apic_physflat = {
288 .name = "physical flat", 330
289 .acpi_madt_oem_check = physflat_acpi_madt_oem_check, 331 .name = "physical flat",
290 .int_delivery_mode = dest_Fixed, 332 .probe = NULL,
291 .int_dest_mode = (APIC_DEST_PHYSICAL != 0), 333 .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
292 .target_cpus = physflat_target_cpus, 334 .apic_id_registered = flat_apic_id_registered,
293 .vector_allocation_domain = physflat_vector_allocation_domain, 335
294 .apic_id_registered = flat_apic_id_registered, 336 .irq_delivery_mode = dest_Fixed,
295 .init_apic_ldr = flat_init_apic_ldr,/*not needed, but shouldn't hurt*/ 337 .irq_dest_mode = 0, /* physical */
296 .send_IPI_all = physflat_send_IPI_all, 338
297 .send_IPI_allbutself = physflat_send_IPI_allbutself, 339 .target_cpus = physflat_target_cpus,
298 .send_IPI_mask = physflat_send_IPI_mask, 340 .disable_esr = 0,
299 .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself, 341 .dest_logical = 0,
300 .send_IPI_self = apic_send_IPI_self, 342 .check_apicid_used = NULL,
301 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid, 343 .check_apicid_present = NULL,
302 .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and, 344
303 .phys_pkg_id = phys_pkg_id, 345 .vector_allocation_domain = physflat_vector_allocation_domain,
304 .get_apic_id = get_apic_id, 346 /* not needed, but shouldn't hurt: */
305 .set_apic_id = set_apic_id, 347 .init_apic_ldr = flat_init_apic_ldr,
306 .apic_id_mask = (0xFFu<<24), 348
349 .ioapic_phys_id_map = NULL,
350 .setup_apic_routing = NULL,
351 .multi_timer_check = NULL,
352 .apicid_to_node = NULL,
353 .cpu_to_logical_apicid = NULL,
354 .cpu_present_to_apicid = default_cpu_present_to_apicid,
355 .apicid_to_cpu_present = NULL,
356 .setup_portio_remap = NULL,
357 .check_phys_apicid_present = default_check_phys_apicid_present,
358 .enable_apic_mode = NULL,
359 .phys_pkg_id = flat_phys_pkg_id,
360 .mps_oem_check = NULL,
361
362 .get_apic_id = flat_get_apic_id,
363 .set_apic_id = set_apic_id,
364 .apic_id_mask = 0xFFu << 24,
365
366 .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
367 .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,
368
369 .send_IPI_mask = physflat_send_IPI_mask,
370 .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,
371 .send_IPI_allbutself = physflat_send_IPI_allbutself,
372 .send_IPI_all = physflat_send_IPI_all,
373 .send_IPI_self = apic_send_IPI_self,
374
375 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
376 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
377 .wait_for_init_deassert = NULL,
378 .smp_callin_clear_local_apic = NULL,
379 .inquire_remote_apic = NULL,
380
381 .read = native_apic_mem_read,
382 .write = native_apic_mem_write,
383 .icr_read = native_apic_icr_read,
384 .icr_write = native_apic_icr_write,
385 .wait_icr_idle = native_apic_wait_icr_idle,
386 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
307}; 387};
diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c
new file mode 100644
index 000000000000..d806ecaa948f
--- /dev/null
+++ b/arch/x86/kernel/apic/bigsmp_32.c
@@ -0,0 +1,267 @@
1/*
2 * APIC driver for "bigsmp" xAPIC machines with more than 8 virtual CPUs.
3 *
4 * Drives the local APIC in "clustered mode".
5 */
6#include <linux/threads.h>
7#include <linux/cpumask.h>
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/dmi.h>
11#include <linux/smp.h>
12
13#include <asm/apicdef.h>
14#include <asm/fixmap.h>
15#include <asm/mpspec.h>
16#include <asm/apic.h>
17#include <asm/ipi.h>
18
19static unsigned bigsmp_get_apic_id(unsigned long x)
20{
21 return (x >> 24) & 0xFF;
22}
23
24static int bigsmp_apic_id_registered(void)
25{
26 return 1;
27}
28
29static const cpumask_t *bigsmp_target_cpus(void)
30{
31#ifdef CONFIG_SMP
32 return &cpu_online_map;
33#else
34 return &cpumask_of_cpu(0);
35#endif
36}
37
38static unsigned long bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
39{
40 return 0;
41}
42
43static unsigned long bigsmp_check_apicid_present(int bit)
44{
45 return 1;
46}
47
48static inline unsigned long calculate_ldr(int cpu)
49{
50 unsigned long val, id;
51
52 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
53 id = per_cpu(x86_bios_cpu_apicid, cpu);
54 val |= SET_APIC_LOGICAL_ID(id);
55
56 return val;
57}
58
59/*
60 * Set up the logical destination ID.
61 *
62 * Intel recommends to set DFR, LDR and TPR before enabling
63 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
64 * document number 292116). So here it goes...
65 */
66static void bigsmp_init_apic_ldr(void)
67{
68 unsigned long val;
69 int cpu = smp_processor_id();
70
71 apic_write(APIC_DFR, APIC_DFR_FLAT);
72 val = calculate_ldr(cpu);
73 apic_write(APIC_LDR, val);
74}
75
76static void bigsmp_setup_apic_routing(void)
77{
78 printk(KERN_INFO
79 "Enabling APIC mode: Physflat. Using %d I/O APICs\n",
80 nr_ioapics);
81}
82
83static int bigsmp_apicid_to_node(int logical_apicid)
84{
85 return apicid_2_node[hard_smp_processor_id()];
86}
87
88static int bigsmp_cpu_present_to_apicid(int mps_cpu)
89{
90 if (mps_cpu < nr_cpu_ids)
91 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
92
93 return BAD_APICID;
94}
95
96static physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
97{
98 return physid_mask_of_physid(phys_apicid);
99}
100
101/* Mapping from cpu number to logical apicid */
102static inline int bigsmp_cpu_to_logical_apicid(int cpu)
103{
104 if (cpu >= nr_cpu_ids)
105 return BAD_APICID;
106 return cpu_physical_id(cpu);
107}
108
109static physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
110{
111 /* For clustered we don't have a good way to do this yet - hack */
112 return physids_promote(0xFFL);
113}
114
115static int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
116{
117 return 1;
118}
119
120/* As we are using single CPU as destination, pick only one CPU here */
121static unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask)
122{
123 return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask));
124}
125
126static unsigned int bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
127 const struct cpumask *andmask)
128{
129 int cpu;
130
131 /*
132 * We're using fixed IRQ delivery, can only return one phys APIC ID.
133 * May as well be the first.
134 */
135 for_each_cpu_and(cpu, cpumask, andmask) {
136 if (cpumask_test_cpu(cpu, cpu_online_mask))
137 break;
138 }
139 if (cpu < nr_cpu_ids)
140 return bigsmp_cpu_to_logical_apicid(cpu);
141
142 return BAD_APICID;
143}
144
145static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
146{
147 return cpuid_apic >> index_msb;
148}
149
150static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector)
151{
152 default_send_IPI_mask_sequence_phys(mask, vector);
153}
154
155static void bigsmp_send_IPI_allbutself(int vector)
156{
157 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
158}
159
160static void bigsmp_send_IPI_all(int vector)
161{
162 bigsmp_send_IPI_mask(cpu_online_mask, vector);
163}
164
165static int dmi_bigsmp; /* can be set by dmi scanners */
166
167static int hp_ht_bigsmp(const struct dmi_system_id *d)
168{
169 printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
170 dmi_bigsmp = 1;
171
172 return 0;
173}
174
175
176static const struct dmi_system_id bigsmp_dmi_table[] = {
177 { hp_ht_bigsmp, "HP ProLiant DL760 G2",
178 { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
179 DMI_MATCH(DMI_BIOS_VERSION, "P44-"),
180 }
181 },
182
183 { hp_ht_bigsmp, "HP ProLiant DL740",
184 { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
185 DMI_MATCH(DMI_BIOS_VERSION, "P47-"),
186 }
187 },
188 { } /* NULL entry stops DMI scanning */
189};
190
191static void bigsmp_vector_allocation_domain(int cpu, cpumask_t *retmask)
192{
193 cpus_clear(*retmask);
194 cpu_set(cpu, *retmask);
195}
196
197static int probe_bigsmp(void)
198{
199 if (def_to_bigsmp)
200 dmi_bigsmp = 1;
201 else
202 dmi_check_system(bigsmp_dmi_table);
203
204 return dmi_bigsmp;
205}
206
207struct apic apic_bigsmp = {
208
209 .name = "bigsmp",
210 .probe = probe_bigsmp,
211 .acpi_madt_oem_check = NULL,
212 .apic_id_registered = bigsmp_apic_id_registered,
213
214 .irq_delivery_mode = dest_Fixed,
215 /* phys delivery to target CPU: */
216 .irq_dest_mode = 0,
217
218 .target_cpus = bigsmp_target_cpus,
219 .disable_esr = 1,
220 .dest_logical = 0,
221 .check_apicid_used = bigsmp_check_apicid_used,
222 .check_apicid_present = bigsmp_check_apicid_present,
223
224 .vector_allocation_domain = bigsmp_vector_allocation_domain,
225 .init_apic_ldr = bigsmp_init_apic_ldr,
226
227 .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map,
228 .setup_apic_routing = bigsmp_setup_apic_routing,
229 .multi_timer_check = NULL,
230 .apicid_to_node = bigsmp_apicid_to_node,
231 .cpu_to_logical_apicid = bigsmp_cpu_to_logical_apicid,
232 .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid,
233 .apicid_to_cpu_present = bigsmp_apicid_to_cpu_present,
234 .setup_portio_remap = NULL,
235 .check_phys_apicid_present = bigsmp_check_phys_apicid_present,
236 .enable_apic_mode = NULL,
237 .phys_pkg_id = bigsmp_phys_pkg_id,
238 .mps_oem_check = NULL,
239
240 .get_apic_id = bigsmp_get_apic_id,
241 .set_apic_id = NULL,
242 .apic_id_mask = 0xFF << 24,
243
244 .cpu_mask_to_apicid = bigsmp_cpu_mask_to_apicid,
245 .cpu_mask_to_apicid_and = bigsmp_cpu_mask_to_apicid_and,
246
247 .send_IPI_mask = bigsmp_send_IPI_mask,
248 .send_IPI_mask_allbutself = NULL,
249 .send_IPI_allbutself = bigsmp_send_IPI_allbutself,
250 .send_IPI_all = bigsmp_send_IPI_all,
251 .send_IPI_self = default_send_IPI_self,
252
253 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
254 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
255
256 .wait_for_init_deassert = default_wait_for_init_deassert,
257
258 .smp_callin_clear_local_apic = NULL,
259 .inquire_remote_apic = default_inquire_remote_apic,
260
261 .read = native_apic_mem_read,
262 .write = native_apic_mem_write,
263 .icr_read = native_apic_icr_read,
264 .icr_write = native_apic_icr_write,
265 .wait_icr_idle = native_apic_wait_icr_idle,
266 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
267};
diff --git a/arch/x86/kernel/apic/es7000_32.c b/arch/x86/kernel/apic/es7000_32.c
new file mode 100644
index 000000000000..19588f2770ee
--- /dev/null
+++ b/arch/x86/kernel/apic/es7000_32.c
@@ -0,0 +1,780 @@
1/*
2 * Written by: Garry Forsgren, Unisys Corporation
3 * Natalie Protasevich, Unisys Corporation
4 *
5 * This file contains the code to configure and interface
6 * with Unisys ES7000 series hardware system manager.
7 *
8 * Copyright (c) 2003 Unisys Corporation.
9 * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar
10 *
11 * All Rights Reserved.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it would be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write the Free Software Foundation, Inc., 59
23 * Temple Place - Suite 330, Boston MA 02111-1307, USA.
24 *
25 * Contact information: Unisys Corporation, Township Line & Union Meeting
26 * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
27 *
28 * http://www.unisys.com
29 */
30#include <linux/notifier.h>
31#include <linux/spinlock.h>
32#include <linux/cpumask.h>
33#include <linux/threads.h>
34#include <linux/kernel.h>
35#include <linux/module.h>
36#include <linux/reboot.h>
37#include <linux/string.h>
38#include <linux/types.h>
39#include <linux/errno.h>
40#include <linux/acpi.h>
41#include <linux/init.h>
42#include <linux/nmi.h>
43#include <linux/smp.h>
44#include <linux/io.h>
45
46#include <asm/apicdef.h>
47#include <asm/atomic.h>
48#include <asm/fixmap.h>
49#include <asm/mpspec.h>
50#include <asm/setup.h>
51#include <asm/apic.h>
52#include <asm/ipi.h>
53
54/*
55 * ES7000 chipsets
56 */
57
58#define NON_UNISYS 0
59#define ES7000_CLASSIC 1
60#define ES7000_ZORRO 2
61
62#define MIP_REG 1
63#define MIP_PSAI_REG 4
64
65#define MIP_BUSY 1
66#define MIP_SPIN 0xf0000
67#define MIP_VALID 0x0100000000000000ULL
68#define MIP_SW_APIC 0x1020b
69
70#define MIP_PORT(val) ((val >> 32) & 0xffff)
71
72#define MIP_RD_LO(val) (val & 0xffffffff)
73
74struct mip_reg {
75 unsigned long long off_0x00;
76 unsigned long long off_0x08;
77 unsigned long long off_0x10;
78 unsigned long long off_0x18;
79 unsigned long long off_0x20;
80 unsigned long long off_0x28;
81 unsigned long long off_0x30;
82 unsigned long long off_0x38;
83};
84
85struct mip_reg_info {
86 unsigned long long mip_info;
87 unsigned long long delivery_info;
88 unsigned long long host_reg;
89 unsigned long long mip_reg;
90};
91
92struct psai {
93 unsigned long long entry_type;
94 unsigned long long addr;
95 unsigned long long bep_addr;
96};
97
98#ifdef CONFIG_ACPI
99
100struct es7000_oem_table {
101 struct acpi_table_header Header;
102 u32 OEMTableAddr;
103 u32 OEMTableSize;
104};
105
106static unsigned long oem_addrX;
107static unsigned long oem_size;
108
109#endif
110
111/*
112 * ES7000 Globals
113 */
114
115static volatile unsigned long *psai;
116static struct mip_reg *mip_reg;
117static struct mip_reg *host_reg;
118static int mip_port;
119static unsigned long mip_addr;
120static unsigned long host_addr;
121
122int es7000_plat;
123
124/*
125 * GSI override for ES7000 platforms.
126 */
127
128static unsigned int base;
129
130static int
131es7000_rename_gsi(int ioapic, int gsi)
132{
133 if (es7000_plat == ES7000_ZORRO)
134 return gsi;
135
136 if (!base) {
137 int i;
138 for (i = 0; i < nr_ioapics; i++)
139 base += nr_ioapic_registers[i];
140 }
141
142 if (!ioapic && (gsi < 16))
143 gsi += base;
144
145 return gsi;
146}
147
148static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
149{
150 unsigned long vect = 0, psaival = 0;
151
152 if (psai == NULL)
153 return -1;
154
155 vect = ((unsigned long)__pa(eip)/0x1000) << 16;
156 psaival = (0x1000000 | vect | cpu);
157
158 while (*psai & 0x1000000)
159 ;
160
161 *psai = psaival;
162
163 return 0;
164}
165
166static int es7000_apic_is_cluster(void)
167{
168 /* MPENTIUMIII */
169 if (boot_cpu_data.x86 == 6 &&
170 (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11))
171 return 1;
172
173 return 0;
174}
175
176static void setup_unisys(void)
177{
178 /*
179 * Determine the generation of the ES7000 currently running.
180 *
181 * es7000_plat = 1 if the machine is a 5xx ES7000 box
182 * es7000_plat = 2 if the machine is a x86_64 ES7000 box
183 *
184 */
185 if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
186 es7000_plat = ES7000_ZORRO;
187 else
188 es7000_plat = ES7000_CLASSIC;
189 ioapic_renumber_irq = es7000_rename_gsi;
190}
191
192/*
193 * Parse the OEM Table:
194 */
195static int parse_unisys_oem(char *oemptr)
196{
197 int i;
198 int success = 0;
199 unsigned char type, size;
200 unsigned long val;
201 char *tp = NULL;
202 struct psai *psaip = NULL;
203 struct mip_reg_info *mi;
204 struct mip_reg *host, *mip;
205
206 tp = oemptr;
207
208 tp += 8;
209
210 for (i = 0; i <= 6; i++) {
211 type = *tp++;
212 size = *tp++;
213 tp -= 2;
214 switch (type) {
215 case MIP_REG:
216 mi = (struct mip_reg_info *)tp;
217 val = MIP_RD_LO(mi->host_reg);
218 host_addr = val;
219 host = (struct mip_reg *)val;
220 host_reg = __va(host);
221 val = MIP_RD_LO(mi->mip_reg);
222 mip_port = MIP_PORT(mi->mip_info);
223 mip_addr = val;
224 mip = (struct mip_reg *)val;
225 mip_reg = __va(mip);
226 pr_debug("es7000_mipcfg: host_reg = 0x%lx \n",
227 (unsigned long)host_reg);
228 pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n",
229 (unsigned long)mip_reg);
230 success++;
231 break;
232 case MIP_PSAI_REG:
233 psaip = (struct psai *)tp;
234 if (tp != NULL) {
235 if (psaip->addr)
236 psai = __va(psaip->addr);
237 else
238 psai = NULL;
239 success++;
240 }
241 break;
242 default:
243 break;
244 }
245 tp += size;
246 }
247
248 if (success < 2)
249 es7000_plat = NON_UNISYS;
250 else
251 setup_unisys();
252
253 return es7000_plat;
254}
255
256#ifdef CONFIG_ACPI
257static int find_unisys_acpi_oem_table(unsigned long *oem_addr)
258{
259 struct acpi_table_header *header = NULL;
260 struct es7000_oem_table *table;
261 acpi_size tbl_size;
262 acpi_status ret;
263 int i = 0;
264
265 for (;;) {
266 ret = acpi_get_table_with_size("OEM1", i++, &header, &tbl_size);
267 if (!ACPI_SUCCESS(ret))
268 return -1;
269
270 if (!memcmp((char *) &header->oem_id, "UNISYS", 6))
271 break;
272
273 early_acpi_os_unmap_memory(header, tbl_size);
274 }
275
276 table = (void *)header;
277
278 oem_addrX = table->OEMTableAddr;
279 oem_size = table->OEMTableSize;
280
281 early_acpi_os_unmap_memory(header, tbl_size);
282
283 *oem_addr = (unsigned long)__acpi_map_table(oem_addrX, oem_size);
284
285 return 0;
286}
287
288static void unmap_unisys_acpi_oem_table(unsigned long oem_addr)
289{
290 if (!oem_addr)
291 return;
292
293 __acpi_unmap_table((char *)oem_addr, oem_size);
294}
295
296static int es7000_check_dsdt(void)
297{
298 struct acpi_table_header header;
299
300 if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) &&
301 !strncmp(header.oem_id, "UNISYS", 6))
302 return 1;
303 return 0;
304}
305
306static int es7000_acpi_ret;
307
308/* Hook from generic ACPI tables.c */
309static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
310{
311 unsigned long oem_addr = 0;
312 int check_dsdt;
313 int ret = 0;
314
315 /* check dsdt at first to avoid clear fix_map for oem_addr */
316 check_dsdt = es7000_check_dsdt();
317
318 if (!find_unisys_acpi_oem_table(&oem_addr)) {
319 if (check_dsdt) {
320 ret = parse_unisys_oem((char *)oem_addr);
321 } else {
322 setup_unisys();
323 ret = 1;
324 }
325 /*
326 * we need to unmap it
327 */
328 unmap_unisys_acpi_oem_table(oem_addr);
329 }
330
331 es7000_acpi_ret = ret;
332
333 return ret && !es7000_apic_is_cluster();
334}
335
336static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id)
337{
338 int ret = es7000_acpi_ret;
339
340 return ret && es7000_apic_is_cluster();
341}
342
343#else /* !CONFIG_ACPI: */
344static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
345{
346 return 0;
347}
348
349static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id)
350{
351 return 0;
352}
353#endif /* !CONFIG_ACPI */
354
355static void es7000_spin(int n)
356{
357 int i = 0;
358
359 while (i++ < n)
360 rep_nop();
361}
362
363static int es7000_mip_write(struct mip_reg *mip_reg)
364{
365 int status = 0;
366 int spin;
367
368 spin = MIP_SPIN;
369 while ((host_reg->off_0x38 & MIP_VALID) != 0) {
370 if (--spin <= 0) {
371 WARN(1, "Timeout waiting for Host Valid Flag\n");
372 return -1;
373 }
374 es7000_spin(MIP_SPIN);
375 }
376
377 memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
378 outb(1, mip_port);
379
380 spin = MIP_SPIN;
381
382 while ((mip_reg->off_0x38 & MIP_VALID) == 0) {
383 if (--spin <= 0) {
384 WARN(1, "Timeout waiting for MIP Valid Flag\n");
385 return -1;
386 }
387 es7000_spin(MIP_SPIN);
388 }
389
390 status = (mip_reg->off_0x00 & 0xffff0000000000ULL) >> 48;
391 mip_reg->off_0x38 &= ~MIP_VALID;
392
393 return status;
394}
395
396static void es7000_enable_apic_mode(void)
397{
398 struct mip_reg es7000_mip_reg;
399 int mip_status;
400
401 if (!es7000_plat)
402 return;
403
404 printk(KERN_INFO "ES7000: Enabling APIC mode.\n");
405 memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
406 es7000_mip_reg.off_0x00 = MIP_SW_APIC;
407 es7000_mip_reg.off_0x38 = MIP_VALID;
408
409 while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0)
410 WARN(1, "Command failed, status = %x\n", mip_status);
411}
412
413static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask)
414{
415 /* Careful. Some cpus do not strictly honor the set of cpus
416 * specified in the interrupt destination when using lowest
417 * priority interrupt delivery mode.
418 *
419 * In particular there was a hyperthreading cpu observed to
420 * deliver interrupts to the wrong hyperthread when only one
421 * hyperthread was specified in the interrupt desitination.
422 */
423 *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
424}
425
426
427static void es7000_wait_for_init_deassert(atomic_t *deassert)
428{
429 while (!atomic_read(deassert))
430 cpu_relax();
431}
432
433static unsigned int es7000_get_apic_id(unsigned long x)
434{
435 return (x >> 24) & 0xFF;
436}
437
438static void es7000_send_IPI_mask(const struct cpumask *mask, int vector)
439{
440 default_send_IPI_mask_sequence_phys(mask, vector);
441}
442
443static void es7000_send_IPI_allbutself(int vector)
444{
445 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
446}
447
448static void es7000_send_IPI_all(int vector)
449{
450 es7000_send_IPI_mask(cpu_online_mask, vector);
451}
452
453static int es7000_apic_id_registered(void)
454{
455 return 1;
456}
457
458static const cpumask_t *target_cpus_cluster(void)
459{
460 return &CPU_MASK_ALL;
461}
462
463static const cpumask_t *es7000_target_cpus(void)
464{
465 return &cpumask_of_cpu(smp_processor_id());
466}
467
468static unsigned long
469es7000_check_apicid_used(physid_mask_t bitmap, int apicid)
470{
471 return 0;
472}
473static unsigned long es7000_check_apicid_present(int bit)
474{
475 return physid_isset(bit, phys_cpu_present_map);
476}
477
478static unsigned long calculate_ldr(int cpu)
479{
480 unsigned long id = per_cpu(x86_bios_cpu_apicid, cpu);
481
482 return SET_APIC_LOGICAL_ID(id);
483}
484
485/*
486 * Set up the logical destination ID.
487 *
488 * Intel recommends to set DFR, LdR and TPR before enabling
489 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
490 * document number 292116). So here it goes...
491 */
492static void es7000_init_apic_ldr_cluster(void)
493{
494 unsigned long val;
495 int cpu = smp_processor_id();
496
497 apic_write(APIC_DFR, APIC_DFR_CLUSTER);
498 val = calculate_ldr(cpu);
499 apic_write(APIC_LDR, val);
500}
501
502static void es7000_init_apic_ldr(void)
503{
504 unsigned long val;
505 int cpu = smp_processor_id();
506
507 apic_write(APIC_DFR, APIC_DFR_FLAT);
508 val = calculate_ldr(cpu);
509 apic_write(APIC_LDR, val);
510}
511
512static void es7000_setup_apic_routing(void)
513{
514 int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
515
516 printk(KERN_INFO
517 "Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
518 (apic_version[apic] == 0x14) ?
519 "Physical Cluster" : "Logical Cluster",
520 nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
521}
522
523static int es7000_apicid_to_node(int logical_apicid)
524{
525 return 0;
526}
527
528
529static int es7000_cpu_present_to_apicid(int mps_cpu)
530{
531 if (!mps_cpu)
532 return boot_cpu_physical_apicid;
533 else if (mps_cpu < nr_cpu_ids)
534 return per_cpu(x86_bios_cpu_apicid, mps_cpu);
535 else
536 return BAD_APICID;
537}
538
539static int cpu_id;
540
541static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid)
542{
543 physid_mask_t mask;
544
545 mask = physid_mask_of_physid(cpu_id);
546 ++cpu_id;
547
548 return mask;
549}
550
551/* Mapping from cpu number to logical apicid */
552static int es7000_cpu_to_logical_apicid(int cpu)
553{
554#ifdef CONFIG_SMP
555 if (cpu >= nr_cpu_ids)
556 return BAD_APICID;
557 return cpu_2_logical_apicid[cpu];
558#else
559 return logical_smp_processor_id();
560#endif
561}
562
563static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map)
564{
565 /* For clustered we don't have a good way to do this yet - hack */
566 return physids_promote(0xff);
567}
568
569static int es7000_check_phys_apicid_present(int cpu_physical_apicid)
570{
571 boot_cpu_physical_apicid = read_apic_id();
572 return 1;
573}
574
575static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask)
576{
577 unsigned int round = 0;
578 int cpu, uninitialized_var(apicid);
579
580 /*
581 * The cpus in the mask must all be on the apic cluster.
582 */
583 for_each_cpu(cpu, cpumask) {
584 int new_apicid = es7000_cpu_to_logical_apicid(cpu);
585
586 if (round && APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) {
587 WARN(1, "Not a valid mask!");
588
589 return BAD_APICID;
590 }
591 apicid = new_apicid;
592 round++;
593 }
594 return apicid;
595}
596
597static unsigned int
598es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask,
599 const struct cpumask *andmask)
600{
601 int apicid = es7000_cpu_to_logical_apicid(0);
602 cpumask_var_t cpumask;
603
604 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
605 return apicid;
606
607 cpumask_and(cpumask, inmask, andmask);
608 cpumask_and(cpumask, cpumask, cpu_online_mask);
609 apicid = es7000_cpu_mask_to_apicid(cpumask);
610
611 free_cpumask_var(cpumask);
612
613 return apicid;
614}
615
616static int es7000_phys_pkg_id(int cpuid_apic, int index_msb)
617{
618 return cpuid_apic >> index_msb;
619}
620
621static int probe_es7000(void)
622{
623 /* probed later in mptable/ACPI hooks */
624 return 0;
625}
626
627static int es7000_mps_ret;
628static int es7000_mps_oem_check(struct mpc_table *mpc, char *oem,
629 char *productid)
630{
631 int ret = 0;
632
633 if (mpc->oemptr) {
634 struct mpc_oemtable *oem_table =
635 (struct mpc_oemtable *)mpc->oemptr;
636
637 if (!strncmp(oem, "UNISYS", 6))
638 ret = parse_unisys_oem((char *)oem_table);
639 }
640
641 es7000_mps_ret = ret;
642
643 return ret && !es7000_apic_is_cluster();
644}
645
646static int es7000_mps_oem_check_cluster(struct mpc_table *mpc, char *oem,
647 char *productid)
648{
649 int ret = es7000_mps_ret;
650
651 return ret && es7000_apic_is_cluster();
652}
653
654struct apic apic_es7000_cluster = {
655
656 .name = "es7000",
657 .probe = probe_es7000,
658 .acpi_madt_oem_check = es7000_acpi_madt_oem_check_cluster,
659 .apic_id_registered = es7000_apic_id_registered,
660
661 .irq_delivery_mode = dest_LowestPrio,
662 /* logical delivery broadcast to all procs: */
663 .irq_dest_mode = 1,
664
665 .target_cpus = target_cpus_cluster,
666 .disable_esr = 1,
667 .dest_logical = 0,
668 .check_apicid_used = es7000_check_apicid_used,
669 .check_apicid_present = es7000_check_apicid_present,
670
671 .vector_allocation_domain = es7000_vector_allocation_domain,
672 .init_apic_ldr = es7000_init_apic_ldr_cluster,
673
674 .ioapic_phys_id_map = es7000_ioapic_phys_id_map,
675 .setup_apic_routing = es7000_setup_apic_routing,
676 .multi_timer_check = NULL,
677 .apicid_to_node = es7000_apicid_to_node,
678 .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid,
679 .cpu_present_to_apicid = es7000_cpu_present_to_apicid,
680 .apicid_to_cpu_present = es7000_apicid_to_cpu_present,
681 .setup_portio_remap = NULL,
682 .check_phys_apicid_present = es7000_check_phys_apicid_present,
683 .enable_apic_mode = es7000_enable_apic_mode,
684 .phys_pkg_id = es7000_phys_pkg_id,
685 .mps_oem_check = es7000_mps_oem_check_cluster,
686
687 .get_apic_id = es7000_get_apic_id,
688 .set_apic_id = NULL,
689 .apic_id_mask = 0xFF << 24,
690
691 .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid,
692 .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and,
693
694 .send_IPI_mask = es7000_send_IPI_mask,
695 .send_IPI_mask_allbutself = NULL,
696 .send_IPI_allbutself = es7000_send_IPI_allbutself,
697 .send_IPI_all = es7000_send_IPI_all,
698 .send_IPI_self = default_send_IPI_self,
699
700 .wakeup_secondary_cpu = wakeup_secondary_cpu_via_mip,
701
702 .trampoline_phys_low = 0x467,
703 .trampoline_phys_high = 0x469,
704
705 .wait_for_init_deassert = NULL,
706
707 /* Nothing to do for most platforms, since cleared by the INIT cycle: */
708 .smp_callin_clear_local_apic = NULL,
709 .inquire_remote_apic = default_inquire_remote_apic,
710
711 .read = native_apic_mem_read,
712 .write = native_apic_mem_write,
713 .icr_read = native_apic_icr_read,
714 .icr_write = native_apic_icr_write,
715 .wait_icr_idle = native_apic_wait_icr_idle,
716 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
717};
718
719struct apic apic_es7000 = {
720
721 .name = "es7000",
722 .probe = probe_es7000,
723 .acpi_madt_oem_check = es7000_acpi_madt_oem_check,
724 .apic_id_registered = es7000_apic_id_registered,
725
726 .irq_delivery_mode = dest_Fixed,
727 /* phys delivery to target CPUs: */
728 .irq_dest_mode = 0,
729
730 .target_cpus = es7000_target_cpus,
731 .disable_esr = 1,
732 .dest_logical = 0,
733 .check_apicid_used = es7000_check_apicid_used,
734 .check_apicid_present = es7000_check_apicid_present,
735
736 .vector_allocation_domain = es7000_vector_allocation_domain,
737 .init_apic_ldr = es7000_init_apic_ldr,
738
739 .ioapic_phys_id_map = es7000_ioapic_phys_id_map,
740 .setup_apic_routing = es7000_setup_apic_routing,
741 .multi_timer_check = NULL,
742 .apicid_to_node = es7000_apicid_to_node,
743 .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid,
744 .cpu_present_to_apicid = es7000_cpu_present_to_apicid,
745 .apicid_to_cpu_present = es7000_apicid_to_cpu_present,
746 .setup_portio_remap = NULL,
747 .check_phys_apicid_present = es7000_check_phys_apicid_present,
748 .enable_apic_mode = es7000_enable_apic_mode,
749 .phys_pkg_id = es7000_phys_pkg_id,
750 .mps_oem_check = es7000_mps_oem_check,
751
752 .get_apic_id = es7000_get_apic_id,
753 .set_apic_id = NULL,
754 .apic_id_mask = 0xFF << 24,
755
756 .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid,
757 .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and,
758
759 .send_IPI_mask = es7000_send_IPI_mask,
760 .send_IPI_mask_allbutself = NULL,
761 .send_IPI_allbutself = es7000_send_IPI_allbutself,
762 .send_IPI_all = es7000_send_IPI_all,
763 .send_IPI_self = default_send_IPI_self,
764
765 .trampoline_phys_low = 0x467,
766 .trampoline_phys_high = 0x469,
767
768 .wait_for_init_deassert = es7000_wait_for_init_deassert,
769
770 /* Nothing to do for most platforms, since cleared by the INIT cycle: */
771 .smp_callin_clear_local_apic = NULL,
772 .inquire_remote_apic = default_inquire_remote_apic,
773
774 .read = native_apic_mem_read,
775 .write = native_apic_mem_write,
776 .icr_read = native_apic_icr_read,
777 .icr_write = native_apic_icr_write,
778 .wait_icr_idle = native_apic_wait_icr_idle,
779 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
780};
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index bc7ac4da90d7..00e6071cefc4 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Intel IO-APIC support for multi-Pentium hosts. 2 * Intel IO-APIC support for multi-Pentium hosts.
3 * 3 *
4 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar, Hajnalka Szabo 4 * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo
5 * 5 *
6 * Many thanks to Stig Venaas for trying out countless experimental 6 * Many thanks to Stig Venaas for trying out countless experimental
7 * patches and reporting/debugging problems patiently! 7 * patches and reporting/debugging problems patiently!
@@ -46,6 +46,7 @@
46#include <asm/idle.h> 46#include <asm/idle.h>
47#include <asm/io.h> 47#include <asm/io.h>
48#include <asm/smp.h> 48#include <asm/smp.h>
49#include <asm/cpu.h>
49#include <asm/desc.h> 50#include <asm/desc.h>
50#include <asm/proto.h> 51#include <asm/proto.h>
51#include <asm/acpi.h> 52#include <asm/acpi.h>
@@ -61,9 +62,7 @@
61#include <asm/uv/uv_hub.h> 62#include <asm/uv/uv_hub.h>
62#include <asm/uv/uv_irq.h> 63#include <asm/uv/uv_irq.h>
63 64
64#include <mach_ipi.h> 65#include <asm/apic.h>
65#include <mach_apic.h>
66#include <mach_apicdef.h>
67 66
68#define __apicdebuginit(type) static type __init 67#define __apicdebuginit(type) static type __init
69 68
@@ -82,11 +81,11 @@ static DEFINE_SPINLOCK(vector_lock);
82int nr_ioapic_registers[MAX_IO_APICS]; 81int nr_ioapic_registers[MAX_IO_APICS];
83 82
84/* I/O APIC entries */ 83/* I/O APIC entries */
85struct mp_config_ioapic mp_ioapics[MAX_IO_APICS]; 84struct mpc_ioapic mp_ioapics[MAX_IO_APICS];
86int nr_ioapics; 85int nr_ioapics;
87 86
88/* MP IRQ source entries */ 87/* MP IRQ source entries */
89struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; 88struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES];
90 89
91/* # of MP IRQ source entries */ 90/* # of MP IRQ source entries */
92int mp_irq_entries; 91int mp_irq_entries;
@@ -99,10 +98,19 @@ DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
99 98
100int skip_ioapic_setup; 99int skip_ioapic_setup;
101 100
101void arch_disable_smp_support(void)
102{
103#ifdef CONFIG_PCI
104 noioapicquirk = 1;
105 noioapicreroute = -1;
106#endif
107 skip_ioapic_setup = 1;
108}
109
102static int __init parse_noapic(char *str) 110static int __init parse_noapic(char *str)
103{ 111{
104 /* disable IO-APIC */ 112 /* disable IO-APIC */
105 disable_ioapic_setup(); 113 arch_disable_smp_support();
106 return 0; 114 return 0;
107} 115}
108early_param("noapic", parse_noapic); 116early_param("noapic", parse_noapic);
@@ -356,7 +364,7 @@ set_extra_move_desc(struct irq_desc *desc, const struct cpumask *mask)
356 364
357 if (!cfg->move_in_progress) { 365 if (!cfg->move_in_progress) {
358 /* it means that domain is not changed */ 366 /* it means that domain is not changed */
359 if (!cpumask_intersects(&desc->affinity, mask)) 367 if (!cpumask_intersects(desc->affinity, mask))
360 cfg->move_desc_pending = 1; 368 cfg->move_desc_pending = 1;
361 } 369 }
362} 370}
@@ -386,7 +394,7 @@ struct io_apic {
386static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) 394static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)
387{ 395{
388 return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) 396 return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx)
389 + (mp_ioapics[idx].mp_apicaddr & ~PAGE_MASK); 397 + (mp_ioapics[idx].apicaddr & ~PAGE_MASK);
390} 398}
391 399
392static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) 400static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
@@ -478,7 +486,7 @@ __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
478 io_apic_write(apic, 0x10 + 2*pin, eu.w1); 486 io_apic_write(apic, 0x10 + 2*pin, eu.w1);
479} 487}
480 488
481static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) 489void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
482{ 490{
483 unsigned long flags; 491 unsigned long flags;
484 spin_lock_irqsave(&ioapic_lock, flags); 492 spin_lock_irqsave(&ioapic_lock, flags);
@@ -513,11 +521,11 @@ static void send_cleanup_vector(struct irq_cfg *cfg)
513 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) 521 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
514 cfg->move_cleanup_count++; 522 cfg->move_cleanup_count++;
515 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask) 523 for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
516 send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR); 524 apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR);
517 } else { 525 } else {
518 cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask); 526 cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask);
519 cfg->move_cleanup_count = cpumask_weight(cleanup_mask); 527 cfg->move_cleanup_count = cpumask_weight(cleanup_mask);
520 send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); 528 apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
521 free_cpumask_var(cleanup_mask); 529 free_cpumask_var(cleanup_mask);
522 } 530 }
523 cfg->move_in_progress = 0; 531 cfg->move_in_progress = 0;
@@ -562,8 +570,9 @@ static int
562assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask); 570assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask);
563 571
564/* 572/*
565 * Either sets desc->affinity to a valid value, and returns cpu_mask_to_apicid 573 * Either sets desc->affinity to a valid value, and returns
566 * of that, or returns BAD_APICID and leaves desc->affinity untouched. 574 * ->cpu_mask_to_apicid of that, or returns BAD_APICID and
575 * leaves desc->affinity untouched.
567 */ 576 */
568static unsigned int 577static unsigned int
569set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) 578set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
@@ -579,9 +588,10 @@ set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
579 if (assign_irq_vector(irq, cfg, mask)) 588 if (assign_irq_vector(irq, cfg, mask))
580 return BAD_APICID; 589 return BAD_APICID;
581 590
582 cpumask_and(&desc->affinity, cfg->domain, mask); 591 cpumask_and(desc->affinity, cfg->domain, mask);
583 set_extra_move_desc(desc, mask); 592 set_extra_move_desc(desc, mask);
584 return cpu_mask_to_apicid_and(&desc->affinity, cpu_online_mask); 593
594 return apic->cpu_mask_to_apicid_and(desc->affinity, cpu_online_mask);
585} 595}
586 596
587static void 597static void
@@ -796,23 +806,6 @@ static void clear_IO_APIC (void)
796 clear_IO_APIC_pin(apic, pin); 806 clear_IO_APIC_pin(apic, pin);
797} 807}
798 808
799#if !defined(CONFIG_SMP) && defined(CONFIG_X86_32)
800void send_IPI_self(int vector)
801{
802 unsigned int cfg;
803
804 /*
805 * Wait for idle.
806 */
807 apic_wait_icr_idle();
808 cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL;
809 /*
810 * Send the IPI. The write to APIC_ICR fires this off.
811 */
812 apic_write(APIC_ICR, cfg);
813}
814#endif /* !CONFIG_SMP && CONFIG_X86_32*/
815
816#ifdef CONFIG_X86_32 809#ifdef CONFIG_X86_32
817/* 810/*
818 * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to 811 * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to
@@ -820,8 +813,9 @@ void send_IPI_self(int vector)
820 */ 813 */
821 814
822#define MAX_PIRQS 8 815#define MAX_PIRQS 8
823static int pirq_entries [MAX_PIRQS]; 816static int pirq_entries[MAX_PIRQS] = {
824static int pirqs_enabled; 817 [0 ... MAX_PIRQS - 1] = -1
818};
825 819
826static int __init ioapic_pirq_setup(char *str) 820static int __init ioapic_pirq_setup(char *str)
827{ 821{
@@ -830,10 +824,6 @@ static int __init ioapic_pirq_setup(char *str)
830 824
831 get_options(str, ARRAY_SIZE(ints), ints); 825 get_options(str, ARRAY_SIZE(ints), ints);
832 826
833 for (i = 0; i < MAX_PIRQS; i++)
834 pirq_entries[i] = -1;
835
836 pirqs_enabled = 1;
837 apic_printk(APIC_VERBOSE, KERN_INFO 827 apic_printk(APIC_VERBOSE, KERN_INFO
838 "PIRQ redirection, working around broken MP-BIOS.\n"); 828 "PIRQ redirection, working around broken MP-BIOS.\n");
839 max = MAX_PIRQS; 829 max = MAX_PIRQS;
@@ -944,10 +934,10 @@ static int find_irq_entry(int apic, int pin, int type)
944 int i; 934 int i;
945 935
946 for (i = 0; i < mp_irq_entries; i++) 936 for (i = 0; i < mp_irq_entries; i++)
947 if (mp_irqs[i].mp_irqtype == type && 937 if (mp_irqs[i].irqtype == type &&
948 (mp_irqs[i].mp_dstapic == mp_ioapics[apic].mp_apicid || 938 (mp_irqs[i].dstapic == mp_ioapics[apic].apicid ||
949 mp_irqs[i].mp_dstapic == MP_APIC_ALL) && 939 mp_irqs[i].dstapic == MP_APIC_ALL) &&
950 mp_irqs[i].mp_dstirq == pin) 940 mp_irqs[i].dstirq == pin)
951 return i; 941 return i;
952 942
953 return -1; 943 return -1;
@@ -961,13 +951,13 @@ static int __init find_isa_irq_pin(int irq, int type)
961 int i; 951 int i;
962 952
963 for (i = 0; i < mp_irq_entries; i++) { 953 for (i = 0; i < mp_irq_entries; i++) {
964 int lbus = mp_irqs[i].mp_srcbus; 954 int lbus = mp_irqs[i].srcbus;
965 955
966 if (test_bit(lbus, mp_bus_not_pci) && 956 if (test_bit(lbus, mp_bus_not_pci) &&
967 (mp_irqs[i].mp_irqtype == type) && 957 (mp_irqs[i].irqtype == type) &&
968 (mp_irqs[i].mp_srcbusirq == irq)) 958 (mp_irqs[i].srcbusirq == irq))
969 959
970 return mp_irqs[i].mp_dstirq; 960 return mp_irqs[i].dstirq;
971 } 961 }
972 return -1; 962 return -1;
973} 963}
@@ -977,17 +967,17 @@ static int __init find_isa_irq_apic(int irq, int type)
977 int i; 967 int i;
978 968
979 for (i = 0; i < mp_irq_entries; i++) { 969 for (i = 0; i < mp_irq_entries; i++) {
980 int lbus = mp_irqs[i].mp_srcbus; 970 int lbus = mp_irqs[i].srcbus;
981 971
982 if (test_bit(lbus, mp_bus_not_pci) && 972 if (test_bit(lbus, mp_bus_not_pci) &&
983 (mp_irqs[i].mp_irqtype == type) && 973 (mp_irqs[i].irqtype == type) &&
984 (mp_irqs[i].mp_srcbusirq == irq)) 974 (mp_irqs[i].srcbusirq == irq))
985 break; 975 break;
986 } 976 }
987 if (i < mp_irq_entries) { 977 if (i < mp_irq_entries) {
988 int apic; 978 int apic;
989 for(apic = 0; apic < nr_ioapics; apic++) { 979 for(apic = 0; apic < nr_ioapics; apic++) {
990 if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic) 980 if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic)
991 return apic; 981 return apic;
992 } 982 }
993 } 983 }
@@ -1012,23 +1002,23 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin)
1012 return -1; 1002 return -1;
1013 } 1003 }
1014 for (i = 0; i < mp_irq_entries; i++) { 1004 for (i = 0; i < mp_irq_entries; i++) {
1015 int lbus = mp_irqs[i].mp_srcbus; 1005 int lbus = mp_irqs[i].srcbus;
1016 1006
1017 for (apic = 0; apic < nr_ioapics; apic++) 1007 for (apic = 0; apic < nr_ioapics; apic++)
1018 if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic || 1008 if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic ||
1019 mp_irqs[i].mp_dstapic == MP_APIC_ALL) 1009 mp_irqs[i].dstapic == MP_APIC_ALL)
1020 break; 1010 break;
1021 1011
1022 if (!test_bit(lbus, mp_bus_not_pci) && 1012 if (!test_bit(lbus, mp_bus_not_pci) &&
1023 !mp_irqs[i].mp_irqtype && 1013 !mp_irqs[i].irqtype &&
1024 (bus == lbus) && 1014 (bus == lbus) &&
1025 (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) { 1015 (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
1026 int irq = pin_2_irq(i,apic,mp_irqs[i].mp_dstirq); 1016 int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq);
1027 1017
1028 if (!(apic || IO_APIC_IRQ(irq))) 1018 if (!(apic || IO_APIC_IRQ(irq)))
1029 continue; 1019 continue;
1030 1020
1031 if (pin == (mp_irqs[i].mp_srcbusirq & 3)) 1021 if (pin == (mp_irqs[i].srcbusirq & 3))
1032 return irq; 1022 return irq;
1033 /* 1023 /*
1034 * Use the first all-but-pin matching entry as a 1024 * Use the first all-but-pin matching entry as a
@@ -1071,7 +1061,7 @@ static int EISA_ELCR(unsigned int irq)
1071 * EISA conforming in the MP table, that means its trigger type must 1061 * EISA conforming in the MP table, that means its trigger type must
1072 * be read in from the ELCR */ 1062 * be read in from the ELCR */
1073 1063
1074#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mp_srcbusirq)) 1064#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].srcbusirq))
1075#define default_EISA_polarity(idx) default_ISA_polarity(idx) 1065#define default_EISA_polarity(idx) default_ISA_polarity(idx)
1076 1066
1077/* PCI interrupts are always polarity one level triggered, 1067/* PCI interrupts are always polarity one level triggered,
@@ -1088,13 +1078,13 @@ static int EISA_ELCR(unsigned int irq)
1088 1078
1089static int MPBIOS_polarity(int idx) 1079static int MPBIOS_polarity(int idx)
1090{ 1080{
1091 int bus = mp_irqs[idx].mp_srcbus; 1081 int bus = mp_irqs[idx].srcbus;
1092 int polarity; 1082 int polarity;
1093 1083
1094 /* 1084 /*
1095 * Determine IRQ line polarity (high active or low active): 1085 * Determine IRQ line polarity (high active or low active):
1096 */ 1086 */
1097 switch (mp_irqs[idx].mp_irqflag & 3) 1087 switch (mp_irqs[idx].irqflag & 3)
1098 { 1088 {
1099 case 0: /* conforms, ie. bus-type dependent polarity */ 1089 case 0: /* conforms, ie. bus-type dependent polarity */
1100 if (test_bit(bus, mp_bus_not_pci)) 1090 if (test_bit(bus, mp_bus_not_pci))
@@ -1130,13 +1120,13 @@ static int MPBIOS_polarity(int idx)
1130 1120
1131static int MPBIOS_trigger(int idx) 1121static int MPBIOS_trigger(int idx)
1132{ 1122{
1133 int bus = mp_irqs[idx].mp_srcbus; 1123 int bus = mp_irqs[idx].srcbus;
1134 int trigger; 1124 int trigger;
1135 1125
1136 /* 1126 /*
1137 * Determine IRQ trigger mode (edge or level sensitive): 1127 * Determine IRQ trigger mode (edge or level sensitive):
1138 */ 1128 */
1139 switch ((mp_irqs[idx].mp_irqflag>>2) & 3) 1129 switch ((mp_irqs[idx].irqflag>>2) & 3)
1140 { 1130 {
1141 case 0: /* conforms, ie. bus-type dependent */ 1131 case 0: /* conforms, ie. bus-type dependent */
1142 if (test_bit(bus, mp_bus_not_pci)) 1132 if (test_bit(bus, mp_bus_not_pci))
@@ -1214,16 +1204,16 @@ int (*ioapic_renumber_irq)(int ioapic, int irq);
1214static int pin_2_irq(int idx, int apic, int pin) 1204static int pin_2_irq(int idx, int apic, int pin)
1215{ 1205{
1216 int irq, i; 1206 int irq, i;
1217 int bus = mp_irqs[idx].mp_srcbus; 1207 int bus = mp_irqs[idx].srcbus;
1218 1208
1219 /* 1209 /*
1220 * Debugging check, we are in big trouble if this message pops up! 1210 * Debugging check, we are in big trouble if this message pops up!
1221 */ 1211 */
1222 if (mp_irqs[idx].mp_dstirq != pin) 1212 if (mp_irqs[idx].dstirq != pin)
1223 printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); 1213 printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n");
1224 1214
1225 if (test_bit(bus, mp_bus_not_pci)) { 1215 if (test_bit(bus, mp_bus_not_pci)) {
1226 irq = mp_irqs[idx].mp_srcbusirq; 1216 irq = mp_irqs[idx].srcbusirq;
1227 } else { 1217 } else {
1228 /* 1218 /*
1229 * PCI IRQs are mapped in order 1219 * PCI IRQs are mapped in order
@@ -1315,7 +1305,7 @@ __assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask)
1315 int new_cpu; 1305 int new_cpu;
1316 int vector, offset; 1306 int vector, offset;
1317 1307
1318 vector_allocation_domain(cpu, tmp_mask); 1308 apic->vector_allocation_domain(cpu, tmp_mask);
1319 1309
1320 vector = current_vector; 1310 vector = current_vector;
1321 offset = current_offset; 1311 offset = current_offset;
@@ -1485,10 +1475,10 @@ static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long t
1485 handle_edge_irq, "edge"); 1475 handle_edge_irq, "edge");
1486} 1476}
1487 1477
1488static int setup_ioapic_entry(int apic, int irq, 1478int setup_ioapic_entry(int apic_id, int irq,
1489 struct IO_APIC_route_entry *entry, 1479 struct IO_APIC_route_entry *entry,
1490 unsigned int destination, int trigger, 1480 unsigned int destination, int trigger,
1491 int polarity, int vector) 1481 int polarity, int vector)
1492{ 1482{
1493 /* 1483 /*
1494 * add it to the IO-APIC irq-routing table: 1484 * add it to the IO-APIC irq-routing table:
@@ -1497,25 +1487,25 @@ static int setup_ioapic_entry(int apic, int irq,
1497 1487
1498#ifdef CONFIG_INTR_REMAP 1488#ifdef CONFIG_INTR_REMAP
1499 if (intr_remapping_enabled) { 1489 if (intr_remapping_enabled) {
1500 struct intel_iommu *iommu = map_ioapic_to_ir(apic); 1490 struct intel_iommu *iommu = map_ioapic_to_ir(apic_id);
1501 struct irte irte; 1491 struct irte irte;
1502 struct IR_IO_APIC_route_entry *ir_entry = 1492 struct IR_IO_APIC_route_entry *ir_entry =
1503 (struct IR_IO_APIC_route_entry *) entry; 1493 (struct IR_IO_APIC_route_entry *) entry;
1504 int index; 1494 int index;
1505 1495
1506 if (!iommu) 1496 if (!iommu)
1507 panic("No mapping iommu for ioapic %d\n", apic); 1497 panic("No mapping iommu for ioapic %d\n", apic_id);
1508 1498
1509 index = alloc_irte(iommu, irq, 1); 1499 index = alloc_irte(iommu, irq, 1);
1510 if (index < 0) 1500 if (index < 0)
1511 panic("Failed to allocate IRTE for ioapic %d\n", apic); 1501 panic("Failed to allocate IRTE for ioapic %d\n", apic_id);
1512 1502
1513 memset(&irte, 0, sizeof(irte)); 1503 memset(&irte, 0, sizeof(irte));
1514 1504
1515 irte.present = 1; 1505 irte.present = 1;
1516 irte.dst_mode = INT_DEST_MODE; 1506 irte.dst_mode = apic->irq_dest_mode;
1517 irte.trigger_mode = trigger; 1507 irte.trigger_mode = trigger;
1518 irte.dlvry_mode = INT_DELIVERY_MODE; 1508 irte.dlvry_mode = apic->irq_delivery_mode;
1519 irte.vector = vector; 1509 irte.vector = vector;
1520 irte.dest_id = IRTE_DEST(destination); 1510 irte.dest_id = IRTE_DEST(destination);
1521 1511
@@ -1528,8 +1518,8 @@ static int setup_ioapic_entry(int apic, int irq,
1528 } else 1518 } else
1529#endif 1519#endif
1530 { 1520 {
1531 entry->delivery_mode = INT_DELIVERY_MODE; 1521 entry->delivery_mode = apic->irq_delivery_mode;
1532 entry->dest_mode = INT_DEST_MODE; 1522 entry->dest_mode = apic->irq_dest_mode;
1533 entry->dest = destination; 1523 entry->dest = destination;
1534 } 1524 }
1535 1525
@@ -1546,7 +1536,7 @@ static int setup_ioapic_entry(int apic, int irq,
1546 return 0; 1536 return 0;
1547} 1537}
1548 1538
1549static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_desc *desc, 1539static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq_desc *desc,
1550 int trigger, int polarity) 1540 int trigger, int polarity)
1551{ 1541{
1552 struct irq_cfg *cfg; 1542 struct irq_cfg *cfg;
@@ -1558,22 +1548,22 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_de
1558 1548
1559 cfg = desc->chip_data; 1549 cfg = desc->chip_data;
1560 1550
1561 if (assign_irq_vector(irq, cfg, TARGET_CPUS)) 1551 if (assign_irq_vector(irq, cfg, apic->target_cpus()))
1562 return; 1552 return;
1563 1553
1564 dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS); 1554 dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
1565 1555
1566 apic_printk(APIC_VERBOSE,KERN_DEBUG 1556 apic_printk(APIC_VERBOSE,KERN_DEBUG
1567 "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> " 1557 "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "
1568 "IRQ %d Mode:%i Active:%i)\n", 1558 "IRQ %d Mode:%i Active:%i)\n",
1569 apic, mp_ioapics[apic].mp_apicid, pin, cfg->vector, 1559 apic_id, mp_ioapics[apic_id].apicid, pin, cfg->vector,
1570 irq, trigger, polarity); 1560 irq, trigger, polarity);
1571 1561
1572 1562
1573 if (setup_ioapic_entry(mp_ioapics[apic].mp_apicid, irq, &entry, 1563 if (setup_ioapic_entry(mp_ioapics[apic_id].apicid, irq, &entry,
1574 dest, trigger, polarity, cfg->vector)) { 1564 dest, trigger, polarity, cfg->vector)) {
1575 printk("Failed to setup ioapic entry for ioapic %d, pin %d\n", 1565 printk("Failed to setup ioapic entry for ioapic %d, pin %d\n",
1576 mp_ioapics[apic].mp_apicid, pin); 1566 mp_ioapics[apic_id].apicid, pin);
1577 __clear_irq_vector(irq, cfg); 1567 __clear_irq_vector(irq, cfg);
1578 return; 1568 return;
1579 } 1569 }
@@ -1582,12 +1572,12 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, struct irq_de
1582 if (irq < NR_IRQS_LEGACY) 1572 if (irq < NR_IRQS_LEGACY)
1583 disable_8259A_irq(irq); 1573 disable_8259A_irq(irq);
1584 1574
1585 ioapic_write_entry(apic, pin, entry); 1575 ioapic_write_entry(apic_id, pin, entry);
1586} 1576}
1587 1577
1588static void __init setup_IO_APIC_irqs(void) 1578static void __init setup_IO_APIC_irqs(void)
1589{ 1579{
1590 int apic, pin, idx, irq; 1580 int apic_id, pin, idx, irq;
1591 int notcon = 0; 1581 int notcon = 0;
1592 struct irq_desc *desc; 1582 struct irq_desc *desc;
1593 struct irq_cfg *cfg; 1583 struct irq_cfg *cfg;
@@ -1595,21 +1585,19 @@ static void __init setup_IO_APIC_irqs(void)
1595 1585
1596 apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); 1586 apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
1597 1587
1598 for (apic = 0; apic < nr_ioapics; apic++) { 1588 for (apic_id = 0; apic_id < nr_ioapics; apic_id++) {
1599 for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { 1589 for (pin = 0; pin < nr_ioapic_registers[apic_id]; pin++) {
1600 1590
1601 idx = find_irq_entry(apic, pin, mp_INT); 1591 idx = find_irq_entry(apic_id, pin, mp_INT);
1602 if (idx == -1) { 1592 if (idx == -1) {
1603 if (!notcon) { 1593 if (!notcon) {
1604 notcon = 1; 1594 notcon = 1;
1605 apic_printk(APIC_VERBOSE, 1595 apic_printk(APIC_VERBOSE,
1606 KERN_DEBUG " %d-%d", 1596 KERN_DEBUG " %d-%d",
1607 mp_ioapics[apic].mp_apicid, 1597 mp_ioapics[apic_id].apicid, pin);
1608 pin);
1609 } else 1598 } else
1610 apic_printk(APIC_VERBOSE, " %d-%d", 1599 apic_printk(APIC_VERBOSE, " %d-%d",
1611 mp_ioapics[apic].mp_apicid, 1600 mp_ioapics[apic_id].apicid, pin);
1612 pin);
1613 continue; 1601 continue;
1614 } 1602 }
1615 if (notcon) { 1603 if (notcon) {
@@ -1618,20 +1606,25 @@ static void __init setup_IO_APIC_irqs(void)
1618 notcon = 0; 1606 notcon = 0;
1619 } 1607 }
1620 1608
1621 irq = pin_2_irq(idx, apic, pin); 1609 irq = pin_2_irq(idx, apic_id, pin);
1622#ifdef CONFIG_X86_32 1610
1623 if (multi_timer_check(apic, irq)) 1611 /*
1612 * Skip the timer IRQ if there's a quirk handler
1613 * installed and if it returns 1:
1614 */
1615 if (apic->multi_timer_check &&
1616 apic->multi_timer_check(apic_id, irq))
1624 continue; 1617 continue;
1625#endif 1618
1626 desc = irq_to_desc_alloc_cpu(irq, cpu); 1619 desc = irq_to_desc_alloc_cpu(irq, cpu);
1627 if (!desc) { 1620 if (!desc) {
1628 printk(KERN_INFO "can not get irq_desc for %d\n", irq); 1621 printk(KERN_INFO "can not get irq_desc for %d\n", irq);
1629 continue; 1622 continue;
1630 } 1623 }
1631 cfg = desc->chip_data; 1624 cfg = desc->chip_data;
1632 add_pin_to_irq_cpu(cfg, cpu, apic, pin); 1625 add_pin_to_irq_cpu(cfg, cpu, apic_id, pin);
1633 1626
1634 setup_IO_APIC_irq(apic, pin, irq, desc, 1627 setup_IO_APIC_irq(apic_id, pin, irq, desc,
1635 irq_trigger(idx), irq_polarity(idx)); 1628 irq_trigger(idx), irq_polarity(idx));
1636 } 1629 }
1637 } 1630 }
@@ -1644,7 +1637,7 @@ static void __init setup_IO_APIC_irqs(void)
1644/* 1637/*
1645 * Set up the timer pin, possibly with the 8259A-master behind. 1638 * Set up the timer pin, possibly with the 8259A-master behind.
1646 */ 1639 */
1647static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, 1640static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
1648 int vector) 1641 int vector)
1649{ 1642{
1650 struct IO_APIC_route_entry entry; 1643 struct IO_APIC_route_entry entry;
@@ -1660,10 +1653,10 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
1660 * We use logical delivery to get the timer IRQ 1653 * We use logical delivery to get the timer IRQ
1661 * to the first CPU. 1654 * to the first CPU.
1662 */ 1655 */
1663 entry.dest_mode = INT_DEST_MODE; 1656 entry.dest_mode = apic->irq_dest_mode;
1664 entry.mask = 1; /* mask IRQ now */ 1657 entry.mask = 0; /* don't mask IRQ for edge */
1665 entry.dest = cpu_mask_to_apicid(TARGET_CPUS); 1658 entry.dest = apic->cpu_mask_to_apicid(apic->target_cpus());
1666 entry.delivery_mode = INT_DELIVERY_MODE; 1659 entry.delivery_mode = apic->irq_delivery_mode;
1667 entry.polarity = 0; 1660 entry.polarity = 0;
1668 entry.trigger = 0; 1661 entry.trigger = 0;
1669 entry.vector = vector; 1662 entry.vector = vector;
@@ -1677,7 +1670,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
1677 /* 1670 /*
1678 * Add it to the IO-APIC irq-routing table: 1671 * Add it to the IO-APIC irq-routing table:
1679 */ 1672 */
1680 ioapic_write_entry(apic, pin, entry); 1673 ioapic_write_entry(apic_id, pin, entry);
1681} 1674}
1682 1675
1683 1676
@@ -1699,7 +1692,7 @@ __apicdebuginit(void) print_IO_APIC(void)
1699 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); 1692 printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
1700 for (i = 0; i < nr_ioapics; i++) 1693 for (i = 0; i < nr_ioapics; i++)
1701 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", 1694 printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n",
1702 mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]); 1695 mp_ioapics[i].apicid, nr_ioapic_registers[i]);
1703 1696
1704 /* 1697 /*
1705 * We are a bit conservative about what we expect. We have to 1698 * We are a bit conservative about what we expect. We have to
@@ -1719,7 +1712,7 @@ __apicdebuginit(void) print_IO_APIC(void)
1719 spin_unlock_irqrestore(&ioapic_lock, flags); 1712 spin_unlock_irqrestore(&ioapic_lock, flags);
1720 1713
1721 printk("\n"); 1714 printk("\n");
1722 printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].mp_apicid); 1715 printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].apicid);
1723 printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); 1716 printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw);
1724 printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); 1717 printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID);
1725 printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type); 1718 printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type);
@@ -1980,13 +1973,6 @@ void __init enable_IO_APIC(void)
1980 int apic; 1973 int apic;
1981 unsigned long flags; 1974 unsigned long flags;
1982 1975
1983#ifdef CONFIG_X86_32
1984 int i;
1985 if (!pirqs_enabled)
1986 for (i = 0; i < MAX_PIRQS; i++)
1987 pirq_entries[i] = -1;
1988#endif
1989
1990 /* 1976 /*
1991 * The number of IO-APIC IRQ registers (== #pins): 1977 * The number of IO-APIC IRQ registers (== #pins):
1992 */ 1978 */
@@ -2090,7 +2076,7 @@ static void __init setup_ioapic_ids_from_mpc(void)
2090{ 2076{
2091 union IO_APIC_reg_00 reg_00; 2077 union IO_APIC_reg_00 reg_00;
2092 physid_mask_t phys_id_present_map; 2078 physid_mask_t phys_id_present_map;
2093 int apic; 2079 int apic_id;
2094 int i; 2080 int i;
2095 unsigned char old_id; 2081 unsigned char old_id;
2096 unsigned long flags; 2082 unsigned long flags;
@@ -2109,26 +2095,26 @@ static void __init setup_ioapic_ids_from_mpc(void)
2109 * This is broken; anything with a real cpu count has to 2095 * This is broken; anything with a real cpu count has to
2110 * circumvent this idiocy regardless. 2096 * circumvent this idiocy regardless.
2111 */ 2097 */
2112 phys_id_present_map = ioapic_phys_id_map(phys_cpu_present_map); 2098 phys_id_present_map = apic->ioapic_phys_id_map(phys_cpu_present_map);
2113 2099
2114 /* 2100 /*
2115 * Set the IOAPIC ID to the value stored in the MPC table. 2101 * Set the IOAPIC ID to the value stored in the MPC table.
2116 */ 2102 */
2117 for (apic = 0; apic < nr_ioapics; apic++) { 2103 for (apic_id = 0; apic_id < nr_ioapics; apic_id++) {
2118 2104
2119 /* Read the register 0 value */ 2105 /* Read the register 0 value */
2120 spin_lock_irqsave(&ioapic_lock, flags); 2106 spin_lock_irqsave(&ioapic_lock, flags);
2121 reg_00.raw = io_apic_read(apic, 0); 2107 reg_00.raw = io_apic_read(apic_id, 0);
2122 spin_unlock_irqrestore(&ioapic_lock, flags); 2108 spin_unlock_irqrestore(&ioapic_lock, flags);
2123 2109
2124 old_id = mp_ioapics[apic].mp_apicid; 2110 old_id = mp_ioapics[apic_id].apicid;
2125 2111
2126 if (mp_ioapics[apic].mp_apicid >= get_physical_broadcast()) { 2112 if (mp_ioapics[apic_id].apicid >= get_physical_broadcast()) {
2127 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", 2113 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n",
2128 apic, mp_ioapics[apic].mp_apicid); 2114 apic_id, mp_ioapics[apic_id].apicid);
2129 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", 2115 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
2130 reg_00.bits.ID); 2116 reg_00.bits.ID);
2131 mp_ioapics[apic].mp_apicid = reg_00.bits.ID; 2117 mp_ioapics[apic_id].apicid = reg_00.bits.ID;
2132 } 2118 }
2133 2119
2134 /* 2120 /*
@@ -2136,10 +2122,10 @@ static void __init setup_ioapic_ids_from_mpc(void)
2136 * system must have a unique ID or we get lots of nice 2122 * system must have a unique ID or we get lots of nice
2137 * 'stuck on smp_invalidate_needed IPI wait' messages. 2123 * 'stuck on smp_invalidate_needed IPI wait' messages.
2138 */ 2124 */
2139 if (check_apicid_used(phys_id_present_map, 2125 if (apic->check_apicid_used(phys_id_present_map,
2140 mp_ioapics[apic].mp_apicid)) { 2126 mp_ioapics[apic_id].apicid)) {
2141 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", 2127 printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n",
2142 apic, mp_ioapics[apic].mp_apicid); 2128 apic_id, mp_ioapics[apic_id].apicid);
2143 for (i = 0; i < get_physical_broadcast(); i++) 2129 for (i = 0; i < get_physical_broadcast(); i++)
2144 if (!physid_isset(i, phys_id_present_map)) 2130 if (!physid_isset(i, phys_id_present_map))
2145 break; 2131 break;
@@ -2148,13 +2134,13 @@ static void __init setup_ioapic_ids_from_mpc(void)
2148 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", 2134 printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
2149 i); 2135 i);
2150 physid_set(i, phys_id_present_map); 2136 physid_set(i, phys_id_present_map);
2151 mp_ioapics[apic].mp_apicid = i; 2137 mp_ioapics[apic_id].apicid = i;
2152 } else { 2138 } else {
2153 physid_mask_t tmp; 2139 physid_mask_t tmp;
2154 tmp = apicid_to_cpu_present(mp_ioapics[apic].mp_apicid); 2140 tmp = apic->apicid_to_cpu_present(mp_ioapics[apic_id].apicid);
2155 apic_printk(APIC_VERBOSE, "Setting %d in the " 2141 apic_printk(APIC_VERBOSE, "Setting %d in the "
2156 "phys_id_present_map\n", 2142 "phys_id_present_map\n",
2157 mp_ioapics[apic].mp_apicid); 2143 mp_ioapics[apic_id].apicid);
2158 physids_or(phys_id_present_map, phys_id_present_map, tmp); 2144 physids_or(phys_id_present_map, phys_id_present_map, tmp);
2159 } 2145 }
2160 2146
@@ -2163,11 +2149,11 @@ static void __init setup_ioapic_ids_from_mpc(void)
2163 * We need to adjust the IRQ routing table 2149 * We need to adjust the IRQ routing table
2164 * if the ID changed. 2150 * if the ID changed.
2165 */ 2151 */
2166 if (old_id != mp_ioapics[apic].mp_apicid) 2152 if (old_id != mp_ioapics[apic_id].apicid)
2167 for (i = 0; i < mp_irq_entries; i++) 2153 for (i = 0; i < mp_irq_entries; i++)
2168 if (mp_irqs[i].mp_dstapic == old_id) 2154 if (mp_irqs[i].dstapic == old_id)
2169 mp_irqs[i].mp_dstapic 2155 mp_irqs[i].dstapic
2170 = mp_ioapics[apic].mp_apicid; 2156 = mp_ioapics[apic_id].apicid;
2171 2157
2172 /* 2158 /*
2173 * Read the right value from the MPC table and 2159 * Read the right value from the MPC table and
@@ -2175,20 +2161,20 @@ static void __init setup_ioapic_ids_from_mpc(void)
2175 */ 2161 */
2176 apic_printk(APIC_VERBOSE, KERN_INFO 2162 apic_printk(APIC_VERBOSE, KERN_INFO
2177 "...changing IO-APIC physical APIC ID to %d ...", 2163 "...changing IO-APIC physical APIC ID to %d ...",
2178 mp_ioapics[apic].mp_apicid); 2164 mp_ioapics[apic_id].apicid);
2179 2165
2180 reg_00.bits.ID = mp_ioapics[apic].mp_apicid; 2166 reg_00.bits.ID = mp_ioapics[apic_id].apicid;
2181 spin_lock_irqsave(&ioapic_lock, flags); 2167 spin_lock_irqsave(&ioapic_lock, flags);
2182 io_apic_write(apic, 0, reg_00.raw); 2168 io_apic_write(apic_id, 0, reg_00.raw);
2183 spin_unlock_irqrestore(&ioapic_lock, flags); 2169 spin_unlock_irqrestore(&ioapic_lock, flags);
2184 2170
2185 /* 2171 /*
2186 * Sanity check 2172 * Sanity check
2187 */ 2173 */
2188 spin_lock_irqsave(&ioapic_lock, flags); 2174 spin_lock_irqsave(&ioapic_lock, flags);
2189 reg_00.raw = io_apic_read(apic, 0); 2175 reg_00.raw = io_apic_read(apic_id, 0);
2190 spin_unlock_irqrestore(&ioapic_lock, flags); 2176 spin_unlock_irqrestore(&ioapic_lock, flags);
2191 if (reg_00.bits.ID != mp_ioapics[apic].mp_apicid) 2177 if (reg_00.bits.ID != mp_ioapics[apic_id].apicid)
2192 printk("could not set ID!\n"); 2178 printk("could not set ID!\n");
2193 else 2179 else
2194 apic_printk(APIC_VERBOSE, " ok.\n"); 2180 apic_printk(APIC_VERBOSE, " ok.\n");
@@ -2291,7 +2277,7 @@ static int ioapic_retrigger_irq(unsigned int irq)
2291 unsigned long flags; 2277 unsigned long flags;
2292 2278
2293 spin_lock_irqsave(&vector_lock, flags); 2279 spin_lock_irqsave(&vector_lock, flags);
2294 send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector); 2280 apic->send_IPI_mask(cpumask_of(cpumask_first(cfg->domain)), cfg->vector);
2295 spin_unlock_irqrestore(&vector_lock, flags); 2281 spin_unlock_irqrestore(&vector_lock, flags);
2296 2282
2297 return 1; 2283 return 1;
@@ -2299,7 +2285,7 @@ static int ioapic_retrigger_irq(unsigned int irq)
2299#else 2285#else
2300static int ioapic_retrigger_irq(unsigned int irq) 2286static int ioapic_retrigger_irq(unsigned int irq)
2301{ 2287{
2302 send_IPI_self(irq_cfg(irq)->vector); 2288 apic->send_IPI_self(irq_cfg(irq)->vector);
2303 2289
2304 return 1; 2290 return 1;
2305} 2291}
@@ -2363,7 +2349,7 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
2363 2349
2364 set_extra_move_desc(desc, mask); 2350 set_extra_move_desc(desc, mask);
2365 2351
2366 dest = cpu_mask_to_apicid_and(cfg->domain, mask); 2352 dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask);
2367 2353
2368 modify_ioapic_rte = desc->status & IRQ_LEVEL; 2354 modify_ioapic_rte = desc->status & IRQ_LEVEL;
2369 if (modify_ioapic_rte) { 2355 if (modify_ioapic_rte) {
@@ -2383,7 +2369,7 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
2383 if (cfg->move_in_progress) 2369 if (cfg->move_in_progress)
2384 send_cleanup_vector(cfg); 2370 send_cleanup_vector(cfg);
2385 2371
2386 cpumask_copy(&desc->affinity, mask); 2372 cpumask_copy(desc->affinity, mask);
2387} 2373}
2388 2374
2389static int migrate_irq_remapped_level_desc(struct irq_desc *desc) 2375static int migrate_irq_remapped_level_desc(struct irq_desc *desc)
@@ -2405,11 +2391,11 @@ static int migrate_irq_remapped_level_desc(struct irq_desc *desc)
2405 } 2391 }
2406 2392
2407 /* everthing is clear. we have right of way */ 2393 /* everthing is clear. we have right of way */
2408 migrate_ioapic_irq_desc(desc, &desc->pending_mask); 2394 migrate_ioapic_irq_desc(desc, desc->pending_mask);
2409 2395
2410 ret = 0; 2396 ret = 0;
2411 desc->status &= ~IRQ_MOVE_PENDING; 2397 desc->status &= ~IRQ_MOVE_PENDING;
2412 cpumask_clear(&desc->pending_mask); 2398 cpumask_clear(desc->pending_mask);
2413 2399
2414unmask: 2400unmask:
2415 unmask_IO_APIC_irq_desc(desc); 2401 unmask_IO_APIC_irq_desc(desc);
@@ -2434,7 +2420,7 @@ static void ir_irq_migration(struct work_struct *work)
2434 continue; 2420 continue;
2435 } 2421 }
2436 2422
2437 desc->chip->set_affinity(irq, &desc->pending_mask); 2423 desc->chip->set_affinity(irq, desc->pending_mask);
2438 spin_unlock_irqrestore(&desc->lock, flags); 2424 spin_unlock_irqrestore(&desc->lock, flags);
2439 } 2425 }
2440 } 2426 }
@@ -2448,7 +2434,7 @@ static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
2448{ 2434{
2449 if (desc->status & IRQ_LEVEL) { 2435 if (desc->status & IRQ_LEVEL) {
2450 desc->status |= IRQ_MOVE_PENDING; 2436 desc->status |= IRQ_MOVE_PENDING;
2451 cpumask_copy(&desc->pending_mask, mask); 2437 cpumask_copy(desc->pending_mask, mask);
2452 migrate_irq_remapped_level_desc(desc); 2438 migrate_irq_remapped_level_desc(desc);
2453 return; 2439 return;
2454 } 2440 }
@@ -2516,7 +2502,7 @@ static void irq_complete_move(struct irq_desc **descp)
2516 2502
2517 /* domain has not changed, but affinity did */ 2503 /* domain has not changed, but affinity did */
2518 me = smp_processor_id(); 2504 me = smp_processor_id();
2519 if (cpu_isset(me, desc->affinity)) { 2505 if (cpumask_test_cpu(me, desc->affinity)) {
2520 *descp = desc = move_irq_desc(desc, me); 2506 *descp = desc = move_irq_desc(desc, me);
2521 /* get the new one */ 2507 /* get the new one */
2522 cfg = desc->chip_data; 2508 cfg = desc->chip_data;
@@ -2867,19 +2853,15 @@ static inline void __init check_timer(void)
2867 int cpu = boot_cpu_id; 2853 int cpu = boot_cpu_id;
2868 int apic1, pin1, apic2, pin2; 2854 int apic1, pin1, apic2, pin2;
2869 unsigned long flags; 2855 unsigned long flags;
2870 unsigned int ver;
2871 int no_pin1 = 0; 2856 int no_pin1 = 0;
2872 2857
2873 local_irq_save(flags); 2858 local_irq_save(flags);
2874 2859
2875 ver = apic_read(APIC_LVR);
2876 ver = GET_APIC_VERSION(ver);
2877
2878 /* 2860 /*
2879 * get/set the timer IRQ vector: 2861 * get/set the timer IRQ vector:
2880 */ 2862 */
2881 disable_8259A_irq(0); 2863 disable_8259A_irq(0);
2882 assign_irq_vector(0, cfg, TARGET_CPUS); 2864 assign_irq_vector(0, cfg, apic->target_cpus());
2883 2865
2884 /* 2866 /*
2885 * As IRQ0 is to be enabled in the 8259A, the virtual 2867 * As IRQ0 is to be enabled in the 8259A, the virtual
@@ -2893,7 +2875,13 @@ static inline void __init check_timer(void)
2893 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); 2875 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
2894 init_8259A(1); 2876 init_8259A(1);
2895#ifdef CONFIG_X86_32 2877#ifdef CONFIG_X86_32
2896 timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver)); 2878 {
2879 unsigned int ver;
2880
2881 ver = apic_read(APIC_LVR);
2882 ver = GET_APIC_VERSION(ver);
2883 timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
2884 }
2897#endif 2885#endif
2898 2886
2899 pin1 = find_isa_irq_pin(0, mp_INT); 2887 pin1 = find_isa_irq_pin(0, mp_INT);
@@ -2932,8 +2920,17 @@ static inline void __init check_timer(void)
2932 if (no_pin1) { 2920 if (no_pin1) {
2933 add_pin_to_irq_cpu(cfg, cpu, apic1, pin1); 2921 add_pin_to_irq_cpu(cfg, cpu, apic1, pin1);
2934 setup_timer_IRQ0_pin(apic1, pin1, cfg->vector); 2922 setup_timer_IRQ0_pin(apic1, pin1, cfg->vector);
2923 } else {
2924 /* for edge trigger, setup_IO_APIC_irq already
2925 * leave it unmasked.
2926 * so only need to unmask if it is level-trigger
2927 * do we really have level trigger timer?
2928 */
2929 int idx;
2930 idx = find_irq_entry(apic1, pin1, mp_INT);
2931 if (idx != -1 && irq_trigger(idx))
2932 unmask_IO_APIC_irq_desc(desc);
2935 } 2933 }
2936 unmask_IO_APIC_irq_desc(desc);
2937 if (timer_irq_works()) { 2934 if (timer_irq_works()) {
2938 if (nmi_watchdog == NMI_IO_APIC) { 2935 if (nmi_watchdog == NMI_IO_APIC) {
2939 setup_nmi(); 2936 setup_nmi();
@@ -2947,6 +2944,7 @@ static inline void __init check_timer(void)
2947 if (intr_remapping_enabled) 2944 if (intr_remapping_enabled)
2948 panic("timer doesn't work through Interrupt-remapped IO-APIC"); 2945 panic("timer doesn't work through Interrupt-remapped IO-APIC");
2949#endif 2946#endif
2947 local_irq_disable();
2950 clear_IO_APIC_pin(apic1, pin1); 2948 clear_IO_APIC_pin(apic1, pin1);
2951 if (!no_pin1) 2949 if (!no_pin1)
2952 apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: " 2950 apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: "
@@ -2961,7 +2959,6 @@ static inline void __init check_timer(void)
2961 */ 2959 */
2962 replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2); 2960 replace_pin_at_irq_cpu(cfg, cpu, apic1, pin1, apic2, pin2);
2963 setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); 2961 setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
2964 unmask_IO_APIC_irq_desc(desc);
2965 enable_8259A_irq(0); 2962 enable_8259A_irq(0);
2966 if (timer_irq_works()) { 2963 if (timer_irq_works()) {
2967 apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); 2964 apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");
@@ -2976,6 +2973,7 @@ static inline void __init check_timer(void)
2976 /* 2973 /*
2977 * Cleanup, just in case ... 2974 * Cleanup, just in case ...
2978 */ 2975 */
2976 local_irq_disable();
2979 disable_8259A_irq(0); 2977 disable_8259A_irq(0);
2980 clear_IO_APIC_pin(apic2, pin2); 2978 clear_IO_APIC_pin(apic2, pin2);
2981 apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); 2979 apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n");
@@ -3001,6 +2999,7 @@ static inline void __init check_timer(void)
3001 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); 2999 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
3002 goto out; 3000 goto out;
3003 } 3001 }
3002 local_irq_disable();
3004 disable_8259A_irq(0); 3003 disable_8259A_irq(0);
3005 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); 3004 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
3006 apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); 3005 apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n");
@@ -3018,6 +3017,7 @@ static inline void __init check_timer(void)
3018 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); 3017 apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
3019 goto out; 3018 goto out;
3020 } 3019 }
3020 local_irq_disable();
3021 apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n"); 3021 apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n");
3022 panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a " 3022 panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a "
3023 "report. Then try booting with the 'noapic' option.\n"); 3023 "report. Then try booting with the 'noapic' option.\n");
@@ -3047,13 +3047,9 @@ out:
3047void __init setup_IO_APIC(void) 3047void __init setup_IO_APIC(void)
3048{ 3048{
3049 3049
3050#ifdef CONFIG_X86_32
3051 enable_IO_APIC();
3052#else
3053 /* 3050 /*
3054 * calling enable_IO_APIC() is moved to setup_local_APIC for BP 3051 * calling enable_IO_APIC() is moved to setup_local_APIC for BP
3055 */ 3052 */
3056#endif
3057 3053
3058 io_apic_irqs = ~PIC_IRQS; 3054 io_apic_irqs = ~PIC_IRQS;
3059 3055
@@ -3118,8 +3114,8 @@ static int ioapic_resume(struct sys_device *dev)
3118 3114
3119 spin_lock_irqsave(&ioapic_lock, flags); 3115 spin_lock_irqsave(&ioapic_lock, flags);
3120 reg_00.raw = io_apic_read(dev->id, 0); 3116 reg_00.raw = io_apic_read(dev->id, 0);
3121 if (reg_00.bits.ID != mp_ioapics[dev->id].mp_apicid) { 3117 if (reg_00.bits.ID != mp_ioapics[dev->id].apicid) {
3122 reg_00.bits.ID = mp_ioapics[dev->id].mp_apicid; 3118 reg_00.bits.ID = mp_ioapics[dev->id].apicid;
3123 io_apic_write(dev->id, 0, reg_00.raw); 3119 io_apic_write(dev->id, 0, reg_00.raw);
3124 } 3120 }
3125 spin_unlock_irqrestore(&ioapic_lock, flags); 3121 spin_unlock_irqrestore(&ioapic_lock, flags);
@@ -3169,6 +3165,7 @@ static int __init ioapic_init_sysfs(void)
3169 3165
3170device_initcall(ioapic_init_sysfs); 3166device_initcall(ioapic_init_sysfs);
3171 3167
3168static int nr_irqs_gsi = NR_IRQS_LEGACY;
3172/* 3169/*
3173 * Dynamic irq allocate and deallocation 3170 * Dynamic irq allocate and deallocation
3174 */ 3171 */
@@ -3183,11 +3180,11 @@ unsigned int create_irq_nr(unsigned int irq_want)
3183 struct irq_desc *desc_new = NULL; 3180 struct irq_desc *desc_new = NULL;
3184 3181
3185 irq = 0; 3182 irq = 0;
3186 spin_lock_irqsave(&vector_lock, flags); 3183 if (irq_want < nr_irqs_gsi)
3187 for (new = irq_want; new < NR_IRQS; new++) { 3184 irq_want = nr_irqs_gsi;
3188 if (platform_legacy_irq(new))
3189 continue;
3190 3185
3186 spin_lock_irqsave(&vector_lock, flags);
3187 for (new = irq_want; new < nr_irqs; new++) {
3191 desc_new = irq_to_desc_alloc_cpu(new, cpu); 3188 desc_new = irq_to_desc_alloc_cpu(new, cpu);
3192 if (!desc_new) { 3189 if (!desc_new) {
3193 printk(KERN_INFO "can not get irq_desc for %d\n", new); 3190 printk(KERN_INFO "can not get irq_desc for %d\n", new);
@@ -3197,7 +3194,7 @@ unsigned int create_irq_nr(unsigned int irq_want)
3197 3194
3198 if (cfg_new->vector != 0) 3195 if (cfg_new->vector != 0)
3199 continue; 3196 continue;
3200 if (__assign_irq_vector(new, cfg_new, TARGET_CPUS) == 0) 3197 if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0)
3201 irq = new; 3198 irq = new;
3202 break; 3199 break;
3203 } 3200 }
@@ -3212,7 +3209,6 @@ unsigned int create_irq_nr(unsigned int irq_want)
3212 return irq; 3209 return irq;
3213} 3210}
3214 3211
3215static int nr_irqs_gsi = NR_IRQS_LEGACY;
3216int create_irq(void) 3212int create_irq(void)
3217{ 3213{
3218 unsigned int irq_want; 3214 unsigned int irq_want;
@@ -3259,12 +3255,15 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
3259 int err; 3255 int err;
3260 unsigned dest; 3256 unsigned dest;
3261 3257
3258 if (disable_apic)
3259 return -ENXIO;
3260
3262 cfg = irq_cfg(irq); 3261 cfg = irq_cfg(irq);
3263 err = assign_irq_vector(irq, cfg, TARGET_CPUS); 3262 err = assign_irq_vector(irq, cfg, apic->target_cpus());
3264 if (err) 3263 if (err)
3265 return err; 3264 return err;
3266 3265
3267 dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS); 3266 dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
3268 3267
3269#ifdef CONFIG_INTR_REMAP 3268#ifdef CONFIG_INTR_REMAP
3270 if (irq_remapped(irq)) { 3269 if (irq_remapped(irq)) {
@@ -3278,9 +3277,9 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
3278 memset (&irte, 0, sizeof(irte)); 3277 memset (&irte, 0, sizeof(irte));
3279 3278
3280 irte.present = 1; 3279 irte.present = 1;
3281 irte.dst_mode = INT_DEST_MODE; 3280 irte.dst_mode = apic->irq_dest_mode;
3282 irte.trigger_mode = 0; /* edge */ 3281 irte.trigger_mode = 0; /* edge */
3283 irte.dlvry_mode = INT_DELIVERY_MODE; 3282 irte.dlvry_mode = apic->irq_delivery_mode;
3284 irte.vector = cfg->vector; 3283 irte.vector = cfg->vector;
3285 irte.dest_id = IRTE_DEST(dest); 3284 irte.dest_id = IRTE_DEST(dest);
3286 3285
@@ -3298,10 +3297,10 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
3298 msg->address_hi = MSI_ADDR_BASE_HI; 3297 msg->address_hi = MSI_ADDR_BASE_HI;
3299 msg->address_lo = 3298 msg->address_lo =
3300 MSI_ADDR_BASE_LO | 3299 MSI_ADDR_BASE_LO |
3301 ((INT_DEST_MODE == 0) ? 3300 ((apic->irq_dest_mode == 0) ?
3302 MSI_ADDR_DEST_MODE_PHYSICAL: 3301 MSI_ADDR_DEST_MODE_PHYSICAL:
3303 MSI_ADDR_DEST_MODE_LOGICAL) | 3302 MSI_ADDR_DEST_MODE_LOGICAL) |
3304 ((INT_DELIVERY_MODE != dest_LowestPrio) ? 3303 ((apic->irq_delivery_mode != dest_LowestPrio) ?
3305 MSI_ADDR_REDIRECTION_CPU: 3304 MSI_ADDR_REDIRECTION_CPU:
3306 MSI_ADDR_REDIRECTION_LOWPRI) | 3305 MSI_ADDR_REDIRECTION_LOWPRI) |
3307 MSI_ADDR_DEST_ID(dest); 3306 MSI_ADDR_DEST_ID(dest);
@@ -3309,7 +3308,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
3309 msg->data = 3308 msg->data =
3310 MSI_DATA_TRIGGER_EDGE | 3309 MSI_DATA_TRIGGER_EDGE |
3311 MSI_DATA_LEVEL_ASSERT | 3310 MSI_DATA_LEVEL_ASSERT |
3312 ((INT_DELIVERY_MODE != dest_LowestPrio) ? 3311 ((apic->irq_delivery_mode != dest_LowestPrio) ?
3313 MSI_DATA_DELIVERY_FIXED: 3312 MSI_DATA_DELIVERY_FIXED:
3314 MSI_DATA_DELIVERY_LOWPRI) | 3313 MSI_DATA_DELIVERY_LOWPRI) |
3315 MSI_DATA_VECTOR(cfg->vector); 3314 MSI_DATA_VECTOR(cfg->vector);
@@ -3464,40 +3463,6 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
3464 return 0; 3463 return 0;
3465} 3464}
3466 3465
3467int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc)
3468{
3469 unsigned int irq;
3470 int ret;
3471 unsigned int irq_want;
3472
3473 irq_want = nr_irqs_gsi;
3474 irq = create_irq_nr(irq_want);
3475 if (irq == 0)
3476 return -1;
3477
3478#ifdef CONFIG_INTR_REMAP
3479 if (!intr_remapping_enabled)
3480 goto no_ir;
3481
3482 ret = msi_alloc_irte(dev, irq, 1);
3483 if (ret < 0)
3484 goto error;
3485no_ir:
3486#endif
3487 ret = setup_msi_irq(dev, msidesc, irq);
3488 if (ret < 0) {
3489 destroy_irq(irq);
3490 return ret;
3491 }
3492 return 0;
3493
3494#ifdef CONFIG_INTR_REMAP
3495error:
3496 destroy_irq(irq);
3497 return ret;
3498#endif
3499}
3500
3501int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 3466int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
3502{ 3467{
3503 unsigned int irq; 3468 unsigned int irq;
@@ -3514,9 +3479,9 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
3514 sub_handle = 0; 3479 sub_handle = 0;
3515 list_for_each_entry(msidesc, &dev->msi_list, list) { 3480 list_for_each_entry(msidesc, &dev->msi_list, list) {
3516 irq = create_irq_nr(irq_want); 3481 irq = create_irq_nr(irq_want);
3517 irq_want++;
3518 if (irq == 0) 3482 if (irq == 0)
3519 return -1; 3483 return -1;
3484 irq_want = irq + 1;
3520#ifdef CONFIG_INTR_REMAP 3485#ifdef CONFIG_INTR_REMAP
3521 if (!intr_remapping_enabled) 3486 if (!intr_remapping_enabled)
3522 goto no_ir; 3487 goto no_ir;
@@ -3727,13 +3692,17 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
3727 struct irq_cfg *cfg; 3692 struct irq_cfg *cfg;
3728 int err; 3693 int err;
3729 3694
3695 if (disable_apic)
3696 return -ENXIO;
3697
3730 cfg = irq_cfg(irq); 3698 cfg = irq_cfg(irq);
3731 err = assign_irq_vector(irq, cfg, TARGET_CPUS); 3699 err = assign_irq_vector(irq, cfg, apic->target_cpus());
3732 if (!err) { 3700 if (!err) {
3733 struct ht_irq_msg msg; 3701 struct ht_irq_msg msg;
3734 unsigned dest; 3702 unsigned dest;
3735 3703
3736 dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS); 3704 dest = apic->cpu_mask_to_apicid_and(cfg->domain,
3705 apic->target_cpus());
3737 3706
3738 msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest); 3707 msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest);
3739 3708
@@ -3741,11 +3710,11 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
3741 HT_IRQ_LOW_BASE | 3710 HT_IRQ_LOW_BASE |
3742 HT_IRQ_LOW_DEST_ID(dest) | 3711 HT_IRQ_LOW_DEST_ID(dest) |
3743 HT_IRQ_LOW_VECTOR(cfg->vector) | 3712 HT_IRQ_LOW_VECTOR(cfg->vector) |
3744 ((INT_DEST_MODE == 0) ? 3713 ((apic->irq_dest_mode == 0) ?
3745 HT_IRQ_LOW_DM_PHYSICAL : 3714 HT_IRQ_LOW_DM_PHYSICAL :
3746 HT_IRQ_LOW_DM_LOGICAL) | 3715 HT_IRQ_LOW_DM_LOGICAL) |
3747 HT_IRQ_LOW_RQEOI_EDGE | 3716 HT_IRQ_LOW_RQEOI_EDGE |
3748 ((INT_DELIVERY_MODE != dest_LowestPrio) ? 3717 ((apic->irq_delivery_mode != dest_LowestPrio) ?
3749 HT_IRQ_LOW_MT_FIXED : 3718 HT_IRQ_LOW_MT_FIXED :
3750 HT_IRQ_LOW_MT_ARBITRATED) | 3719 HT_IRQ_LOW_MT_ARBITRATED) |
3751 HT_IRQ_LOW_IRQ_MASKED; 3720 HT_IRQ_LOW_IRQ_MASKED;
@@ -3761,7 +3730,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
3761} 3730}
3762#endif /* CONFIG_HT_IRQ */ 3731#endif /* CONFIG_HT_IRQ */
3763 3732
3764#ifdef CONFIG_X86_64 3733#ifdef CONFIG_X86_UV
3765/* 3734/*
3766 * Re-target the irq to the specified CPU and enable the specified MMR located 3735 * Re-target the irq to the specified CPU and enable the specified MMR located
3767 * on the specified blade to allow the sending of MSIs to the specified CPU. 3736 * on the specified blade to allow the sending of MSIs to the specified CPU.
@@ -3793,12 +3762,12 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
3793 BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long)); 3762 BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
3794 3763
3795 entry->vector = cfg->vector; 3764 entry->vector = cfg->vector;
3796 entry->delivery_mode = INT_DELIVERY_MODE; 3765 entry->delivery_mode = apic->irq_delivery_mode;
3797 entry->dest_mode = INT_DEST_MODE; 3766 entry->dest_mode = apic->irq_dest_mode;
3798 entry->polarity = 0; 3767 entry->polarity = 0;
3799 entry->trigger = 0; 3768 entry->trigger = 0;
3800 entry->mask = 0; 3769 entry->mask = 0;
3801 entry->dest = cpu_mask_to_apicid(eligible_cpu); 3770 entry->dest = apic->cpu_mask_to_apicid(eligible_cpu);
3802 3771
3803 mmr_pnode = uv_blade_to_pnode(mmr_blade); 3772 mmr_pnode = uv_blade_to_pnode(mmr_blade);
3804 uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value); 3773 uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
@@ -3861,6 +3830,28 @@ void __init probe_nr_irqs_gsi(void)
3861 printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi); 3830 printk(KERN_DEBUG "nr_irqs_gsi: %d\n", nr_irqs_gsi);
3862} 3831}
3863 3832
3833#ifdef CONFIG_SPARSE_IRQ
3834int __init arch_probe_nr_irqs(void)
3835{
3836 int nr;
3837
3838 if (nr_irqs > (NR_VECTORS * nr_cpu_ids))
3839 nr_irqs = NR_VECTORS * nr_cpu_ids;
3840
3841 nr = nr_irqs_gsi + 8 * nr_cpu_ids;
3842#if defined(CONFIG_PCI_MSI) || defined(CONFIG_HT_IRQ)
3843 /*
3844 * for MSI and HT dyn irq
3845 */
3846 nr += nr_irqs_gsi * 16;
3847#endif
3848 if (nr < nr_irqs)
3849 nr_irqs = nr;
3850
3851 return 0;
3852}
3853#endif
3854
3864/* -------------------------------------------------------------------------- 3855/* --------------------------------------------------------------------------
3865 ACPI-based IOAPIC Configuration 3856 ACPI-based IOAPIC Configuration
3866 -------------------------------------------------------------------------- */ 3857 -------------------------------------------------------------------------- */
@@ -3886,7 +3877,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
3886 */ 3877 */
3887 3878
3888 if (physids_empty(apic_id_map)) 3879 if (physids_empty(apic_id_map))
3889 apic_id_map = ioapic_phys_id_map(phys_cpu_present_map); 3880 apic_id_map = apic->ioapic_phys_id_map(phys_cpu_present_map);
3890 3881
3891 spin_lock_irqsave(&ioapic_lock, flags); 3882 spin_lock_irqsave(&ioapic_lock, flags);
3892 reg_00.raw = io_apic_read(ioapic, 0); 3883 reg_00.raw = io_apic_read(ioapic, 0);
@@ -3902,10 +3893,10 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
3902 * Every APIC in a system must have a unique ID or we get lots of nice 3893 * Every APIC in a system must have a unique ID or we get lots of nice
3903 * 'stuck on smp_invalidate_needed IPI wait' messages. 3894 * 'stuck on smp_invalidate_needed IPI wait' messages.
3904 */ 3895 */
3905 if (check_apicid_used(apic_id_map, apic_id)) { 3896 if (apic->check_apicid_used(apic_id_map, apic_id)) {
3906 3897
3907 for (i = 0; i < get_physical_broadcast(); i++) { 3898 for (i = 0; i < get_physical_broadcast(); i++) {
3908 if (!check_apicid_used(apic_id_map, i)) 3899 if (!apic->check_apicid_used(apic_id_map, i))
3909 break; 3900 break;
3910 } 3901 }
3911 3902
@@ -3918,7 +3909,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
3918 apic_id = i; 3909 apic_id = i;
3919 } 3910 }
3920 3911
3921 tmp = apicid_to_cpu_present(apic_id); 3912 tmp = apic->apicid_to_cpu_present(apic_id);
3922 physids_or(apic_id_map, apic_id_map, tmp); 3913 physids_or(apic_id_map, apic_id_map, tmp);
3923 3914
3924 if (reg_00.bits.ID != apic_id) { 3915 if (reg_00.bits.ID != apic_id) {
@@ -3995,8 +3986,8 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)
3995 return -1; 3986 return -1;
3996 3987
3997 for (i = 0; i < mp_irq_entries; i++) 3988 for (i = 0; i < mp_irq_entries; i++)
3998 if (mp_irqs[i].mp_irqtype == mp_INT && 3989 if (mp_irqs[i].irqtype == mp_INT &&
3999 mp_irqs[i].mp_srcbusirq == bus_irq) 3990 mp_irqs[i].srcbusirq == bus_irq)
4000 break; 3991 break;
4001 if (i >= mp_irq_entries) 3992 if (i >= mp_irq_entries)
4002 return -1; 3993 return -1;
@@ -4011,7 +4002,7 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)
4011/* 4002/*
4012 * This function currently is only a helper for the i386 smp boot process where 4003 * This function currently is only a helper for the i386 smp boot process where
4013 * we need to reprogram the ioredtbls to cater for the cpus which have come online 4004 * we need to reprogram the ioredtbls to cater for the cpus which have come online
4014 * so mask in all cases should simply be TARGET_CPUS 4005 * so mask in all cases should simply be apic->target_cpus()
4015 */ 4006 */
4016#ifdef CONFIG_SMP 4007#ifdef CONFIG_SMP
4017void __init setup_ioapic_dest(void) 4008void __init setup_ioapic_dest(void)
@@ -4050,9 +4041,9 @@ void __init setup_ioapic_dest(void)
4050 */ 4041 */
4051 if (desc->status & 4042 if (desc->status &
4052 (IRQ_NO_BALANCING | IRQ_AFFINITY_SET)) 4043 (IRQ_NO_BALANCING | IRQ_AFFINITY_SET))
4053 mask = &desc->affinity; 4044 mask = desc->affinity;
4054 else 4045 else
4055 mask = TARGET_CPUS; 4046 mask = apic->target_cpus();
4056 4047
4057#ifdef CONFIG_INTR_REMAP 4048#ifdef CONFIG_INTR_REMAP
4058 if (intr_remapping_enabled) 4049 if (intr_remapping_enabled)
@@ -4111,7 +4102,7 @@ void __init ioapic_init_mappings(void)
4111 ioapic_res = ioapic_setup_resources(); 4102 ioapic_res = ioapic_setup_resources();
4112 for (i = 0; i < nr_ioapics; i++) { 4103 for (i = 0; i < nr_ioapics; i++) {
4113 if (smp_found_config) { 4104 if (smp_found_config) {
4114 ioapic_phys = mp_ioapics[i].mp_apicaddr; 4105 ioapic_phys = mp_ioapics[i].apicaddr;
4115#ifdef CONFIG_X86_32 4106#ifdef CONFIG_X86_32
4116 if (!ioapic_phys) { 4107 if (!ioapic_phys) {
4117 printk(KERN_ERR 4108 printk(KERN_ERR
diff --git a/arch/x86/kernel/apic/ipi.c b/arch/x86/kernel/apic/ipi.c
new file mode 100644
index 000000000000..dbf5445727a9
--- /dev/null
+++ b/arch/x86/kernel/apic/ipi.c
@@ -0,0 +1,164 @@
1#include <linux/cpumask.h>
2#include <linux/interrupt.h>
3#include <linux/init.h>
4
5#include <linux/mm.h>
6#include <linux/delay.h>
7#include <linux/spinlock.h>
8#include <linux/kernel_stat.h>
9#include <linux/mc146818rtc.h>
10#include <linux/cache.h>
11#include <linux/cpu.h>
12#include <linux/module.h>
13
14#include <asm/smp.h>
15#include <asm/mtrr.h>
16#include <asm/tlbflush.h>
17#include <asm/mmu_context.h>
18#include <asm/apic.h>
19#include <asm/proto.h>
20#include <asm/ipi.h>
21
22void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector)
23{
24 unsigned long query_cpu;
25 unsigned long flags;
26
27 /*
28 * Hack. The clustered APIC addressing mode doesn't allow us to send
29 * to an arbitrary mask, so I do a unicast to each CPU instead.
30 * - mbligh
31 */
32 local_irq_save(flags);
33 for_each_cpu(query_cpu, mask) {
34 __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
35 query_cpu), vector, APIC_DEST_PHYSICAL);
36 }
37 local_irq_restore(flags);
38}
39
40void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
41 int vector)
42{
43 unsigned int this_cpu = smp_processor_id();
44 unsigned int query_cpu;
45 unsigned long flags;
46
47 /* See Hack comment above */
48
49 local_irq_save(flags);
50 for_each_cpu(query_cpu, mask) {
51 if (query_cpu == this_cpu)
52 continue;
53 __default_send_IPI_dest_field(per_cpu(x86_cpu_to_apicid,
54 query_cpu), vector, APIC_DEST_PHYSICAL);
55 }
56 local_irq_restore(flags);
57}
58
59void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
60 int vector)
61{
62 unsigned long flags;
63 unsigned int query_cpu;
64
65 /*
66 * Hack. The clustered APIC addressing mode doesn't allow us to send
67 * to an arbitrary mask, so I do a unicasts to each CPU instead. This
68 * should be modified to do 1 message per cluster ID - mbligh
69 */
70
71 local_irq_save(flags);
72 for_each_cpu(query_cpu, mask)
73 __default_send_IPI_dest_field(
74 apic->cpu_to_logical_apicid(query_cpu), vector,
75 apic->dest_logical);
76 local_irq_restore(flags);
77}
78
79void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
80 int vector)
81{
82 unsigned long flags;
83 unsigned int query_cpu;
84 unsigned int this_cpu = smp_processor_id();
85
86 /* See Hack comment above */
87
88 local_irq_save(flags);
89 for_each_cpu(query_cpu, mask) {
90 if (query_cpu == this_cpu)
91 continue;
92 __default_send_IPI_dest_field(
93 apic->cpu_to_logical_apicid(query_cpu), vector,
94 apic->dest_logical);
95 }
96 local_irq_restore(flags);
97}
98
99#ifdef CONFIG_X86_32
100
101/*
102 * This is only used on smaller machines.
103 */
104void default_send_IPI_mask_logical(const struct cpumask *cpumask, int vector)
105{
106 unsigned long mask = cpumask_bits(cpumask)[0];
107 unsigned long flags;
108
109 local_irq_save(flags);
110 WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]);
111 __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
112 local_irq_restore(flags);
113}
114
115void default_send_IPI_allbutself(int vector)
116{
117 /*
118 * if there are no other CPUs in the system then we get an APIC send
119 * error if we try to broadcast, thus avoid sending IPIs in this case.
120 */
121 if (!(num_online_cpus() > 1))
122 return;
123
124 __default_local_send_IPI_allbutself(vector);
125}
126
127void default_send_IPI_all(int vector)
128{
129 __default_local_send_IPI_all(vector);
130}
131
132void default_send_IPI_self(int vector)
133{
134 __default_send_IPI_shortcut(APIC_DEST_SELF, vector, apic->dest_logical);
135}
136
137/* must come after the send_IPI functions above for inlining */
138static int convert_apicid_to_cpu(int apic_id)
139{
140 int i;
141
142 for_each_possible_cpu(i) {
143 if (per_cpu(x86_cpu_to_apicid, i) == apic_id)
144 return i;
145 }
146 return -1;
147}
148
149int safe_smp_processor_id(void)
150{
151 int apicid, cpuid;
152
153 if (!boot_cpu_has(X86_FEATURE_APIC))
154 return 0;
155
156 apicid = hard_smp_processor_id();
157 if (apicid == BAD_APICID)
158 return 0;
159
160 cpuid = convert_apicid_to_cpu(apicid);
161
162 return cpuid >= 0 ? cpuid : 0;
163}
164#endif
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/apic/nmi.c
index 7228979f1e7f..bdfad80c3cf1 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/apic/nmi.c
@@ -34,7 +34,7 @@
34 34
35#include <asm/mce.h> 35#include <asm/mce.h>
36 36
37#include <mach_traps.h> 37#include <asm/mach_traps.h>
38 38
39int unknown_nmi_panic; 39int unknown_nmi_panic;
40int nmi_watchdog_enabled; 40int nmi_watchdog_enabled;
@@ -61,11 +61,7 @@ static int endflag __initdata;
61 61
62static inline unsigned int get_nmi_count(int cpu) 62static inline unsigned int get_nmi_count(int cpu)
63{ 63{
64#ifdef CONFIG_X86_64 64 return per_cpu(irq_stat, cpu).__nmi_count;
65 return cpu_pda(cpu)->__nmi_count;
66#else
67 return nmi_count(cpu);
68#endif
69} 65}
70 66
71static inline int mce_in_progress(void) 67static inline int mce_in_progress(void)
@@ -82,12 +78,8 @@ static inline int mce_in_progress(void)
82 */ 78 */
83static inline unsigned int get_timer_irqs(int cpu) 79static inline unsigned int get_timer_irqs(int cpu)
84{ 80{
85#ifdef CONFIG_X86_64
86 return read_pda(apic_timer_irqs) + read_pda(irq0_irqs);
87#else
88 return per_cpu(irq_stat, cpu).apic_timer_irqs + 81 return per_cpu(irq_stat, cpu).apic_timer_irqs +
89 per_cpu(irq_stat, cpu).irq0_irqs; 82 per_cpu(irq_stat, cpu).irq0_irqs;
90#endif
91} 83}
92 84
93#ifdef CONFIG_SMP 85#ifdef CONFIG_SMP
diff --git a/arch/x86/kernel/apic/numaq_32.c b/arch/x86/kernel/apic/numaq_32.c
new file mode 100644
index 000000000000..ba2fc6465534
--- /dev/null
+++ b/arch/x86/kernel/apic/numaq_32.c
@@ -0,0 +1,557 @@
1/*
2 * Written by: Patricia Gaughen, IBM Corporation
3 *
4 * Copyright (C) 2002, IBM Corp.
5 * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar
6 *
7 * All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
17 * NON INFRINGEMENT. See the GNU General Public License for more
18 * details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 *
24 * Send feedback to <gone@us.ibm.com>
25 */
26#include <linux/nodemask.h>
27#include <linux/topology.h>
28#include <linux/bootmem.h>
29#include <linux/threads.h>
30#include <linux/cpumask.h>
31#include <linux/kernel.h>
32#include <linux/mmzone.h>
33#include <linux/module.h>
34#include <linux/string.h>
35#include <linux/init.h>
36#include <linux/numa.h>
37#include <linux/smp.h>
38#include <linux/io.h>
39#include <linux/mm.h>
40
41#include <asm/processor.h>
42#include <asm/fixmap.h>
43#include <asm/mpspec.h>
44#include <asm/numaq.h>
45#include <asm/setup.h>
46#include <asm/apic.h>
47#include <asm/e820.h>
48#include <asm/ipi.h>
49
50#define MB_TO_PAGES(addr) ((addr) << (20 - PAGE_SHIFT))
51
52int found_numaq;
53
54/*
55 * Have to match translation table entries to main table entries by counter
56 * hence the mpc_record variable .... can't see a less disgusting way of
57 * doing this ....
58 */
59struct mpc_trans {
60 unsigned char mpc_type;
61 unsigned char trans_len;
62 unsigned char trans_type;
63 unsigned char trans_quad;
64 unsigned char trans_global;
65 unsigned char trans_local;
66 unsigned short trans_reserved;
67};
68
69/* x86_quirks member */
70static int mpc_record;
71
72static struct mpc_trans *translation_table[MAX_MPC_ENTRY];
73
74int mp_bus_id_to_node[MAX_MP_BUSSES];
75int mp_bus_id_to_local[MAX_MP_BUSSES];
76int quad_local_to_mp_bus_id[NR_CPUS/4][4];
77
78
79static inline void numaq_register_node(int node, struct sys_cfg_data *scd)
80{
81 struct eachquadmem *eq = scd->eq + node;
82
83 node_set_online(node);
84
85 /* Convert to pages */
86 node_start_pfn[node] =
87 MB_TO_PAGES(eq->hi_shrd_mem_start - eq->priv_mem_size);
88
89 node_end_pfn[node] =
90 MB_TO_PAGES(eq->hi_shrd_mem_start + eq->hi_shrd_mem_size);
91
92 e820_register_active_regions(node, node_start_pfn[node],
93 node_end_pfn[node]);
94
95 memory_present(node, node_start_pfn[node], node_end_pfn[node]);
96
97 node_remap_size[node] = node_memmap_size_bytes(node,
98 node_start_pfn[node],
99 node_end_pfn[node]);
100}
101
102/*
103 * Function: smp_dump_qct()
104 *
105 * Description: gets memory layout from the quad config table. This
106 * function also updates node_online_map with the nodes (quads) present.
107 */
108static void __init smp_dump_qct(void)
109{
110 struct sys_cfg_data *scd;
111 int node;
112
113 scd = (void *)__va(SYS_CFG_DATA_PRIV_ADDR);
114
115 nodes_clear(node_online_map);
116 for_each_node(node) {
117 if (scd->quads_present31_0 & (1 << node))
118 numaq_register_node(node, scd);
119 }
120}
121
122void __cpuinit numaq_tsc_disable(void)
123{
124 if (!found_numaq)
125 return;
126
127 if (num_online_nodes() > 1) {
128 printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
129 setup_clear_cpu_cap(X86_FEATURE_TSC);
130 }
131}
132
133static int __init numaq_pre_time_init(void)
134{
135 numaq_tsc_disable();
136 return 0;
137}
138
139static inline int generate_logical_apicid(int quad, int phys_apicid)
140{
141 return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
142}
143
144/* x86_quirks member */
145static int mpc_apic_id(struct mpc_cpu *m)
146{
147 int quad = translation_table[mpc_record]->trans_quad;
148 int logical_apicid = generate_logical_apicid(quad, m->apicid);
149
150 printk(KERN_DEBUG
151 "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
152 m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8,
153 (m->cpufeature & CPU_MODEL_MASK) >> 4,
154 m->apicver, quad, logical_apicid);
155
156 return logical_apicid;
157}
158
159/* x86_quirks member */
160static void mpc_oem_bus_info(struct mpc_bus *m, char *name)
161{
162 int quad = translation_table[mpc_record]->trans_quad;
163 int local = translation_table[mpc_record]->trans_local;
164
165 mp_bus_id_to_node[m->busid] = quad;
166 mp_bus_id_to_local[m->busid] = local;
167
168 printk(KERN_INFO "Bus #%d is %s (node %d)\n", m->busid, name, quad);
169}
170
171/* x86_quirks member */
172static void mpc_oem_pci_bus(struct mpc_bus *m)
173{
174 int quad = translation_table[mpc_record]->trans_quad;
175 int local = translation_table[mpc_record]->trans_local;
176
177 quad_local_to_mp_bus_id[quad][local] = m->busid;
178}
179
180static void __init MP_translation_info(struct mpc_trans *m)
181{
182 printk(KERN_INFO
183 "Translation: record %d, type %d, quad %d, global %d, local %d\n",
184 mpc_record, m->trans_type, m->trans_quad, m->trans_global,
185 m->trans_local);
186
187 if (mpc_record >= MAX_MPC_ENTRY)
188 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
189 else
190 translation_table[mpc_record] = m; /* stash this for later */
191
192 if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
193 node_set_online(m->trans_quad);
194}
195
196static int __init mpf_checksum(unsigned char *mp, int len)
197{
198 int sum = 0;
199
200 while (len--)
201 sum += *mp++;
202
203 return sum & 0xFF;
204}
205
206/*
207 * Read/parse the MPC oem tables
208 */
209static void __init
210 smp_read_mpc_oem(struct mpc_oemtable *oemtable, unsigned short oemsize)
211{
212 int count = sizeof(*oemtable); /* the header size */
213 unsigned char *oemptr = ((unsigned char *)oemtable) + count;
214
215 mpc_record = 0;
216 printk(KERN_INFO
217 "Found an OEM MPC table at %8p - parsing it ... \n", oemtable);
218
219 if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) {
220 printk(KERN_WARNING
221 "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
222 oemtable->signature[0], oemtable->signature[1],
223 oemtable->signature[2], oemtable->signature[3]);
224 return;
225 }
226
227 if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) {
228 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
229 return;
230 }
231
232 while (count < oemtable->length) {
233 switch (*oemptr) {
234 case MP_TRANSLATION:
235 {
236 struct mpc_trans *m = (void *)oemptr;
237
238 MP_translation_info(m);
239 oemptr += sizeof(*m);
240 count += sizeof(*m);
241 ++mpc_record;
242 break;
243 }
244 default:
245 printk(KERN_WARNING
246 "Unrecognised OEM table entry type! - %d\n",
247 (int)*oemptr);
248 return;
249 }
250 }
251}
252
253static int __init numaq_setup_ioapic_ids(void)
254{
255 /* so can skip it */
256 return 1;
257}
258
259static struct x86_quirks numaq_x86_quirks __initdata = {
260 .arch_pre_time_init = numaq_pre_time_init,
261 .arch_time_init = NULL,
262 .arch_pre_intr_init = NULL,
263 .arch_memory_setup = NULL,
264 .arch_intr_init = NULL,
265 .arch_trap_init = NULL,
266 .mach_get_smp_config = NULL,
267 .mach_find_smp_config = NULL,
268 .mpc_record = &mpc_record,
269 .mpc_apic_id = mpc_apic_id,
270 .mpc_oem_bus_info = mpc_oem_bus_info,
271 .mpc_oem_pci_bus = mpc_oem_pci_bus,
272 .smp_read_mpc_oem = smp_read_mpc_oem,
273 .setup_ioapic_ids = numaq_setup_ioapic_ids,
274};
275
276static __init void early_check_numaq(void)
277{
278 /*
279 * Find possible boot-time SMP configuration:
280 */
281 early_find_smp_config();
282
283 /*
284 * get boot-time SMP configuration:
285 */
286 if (smp_found_config)
287 early_get_smp_config();
288
289 if (found_numaq)
290 x86_quirks = &numaq_x86_quirks;
291}
292
293int __init get_memcfg_numaq(void)
294{
295 early_check_numaq();
296 if (!found_numaq)
297 return 0;
298 smp_dump_qct();
299
300 return 1;
301}
302
303#define NUMAQ_APIC_DFR_VALUE (APIC_DFR_CLUSTER)
304
305static inline unsigned int numaq_get_apic_id(unsigned long x)
306{
307 return (x >> 24) & 0x0F;
308}
309
310static inline void numaq_send_IPI_mask(const struct cpumask *mask, int vector)
311{
312 default_send_IPI_mask_sequence_logical(mask, vector);
313}
314
315static inline void numaq_send_IPI_allbutself(int vector)
316{
317 default_send_IPI_mask_allbutself_logical(cpu_online_mask, vector);
318}
319
320static inline void numaq_send_IPI_all(int vector)
321{
322 numaq_send_IPI_mask(cpu_online_mask, vector);
323}
324
325#define NUMAQ_TRAMPOLINE_PHYS_LOW (0x8)
326#define NUMAQ_TRAMPOLINE_PHYS_HIGH (0xa)
327
328/*
329 * Because we use NMIs rather than the INIT-STARTUP sequence to
330 * bootstrap the CPUs, the APIC may be in a weird state. Kick it:
331 */
332static inline void numaq_smp_callin_clear_local_apic(void)
333{
334 clear_local_APIC();
335}
336
337static inline const cpumask_t *numaq_target_cpus(void)
338{
339 return &CPU_MASK_ALL;
340}
341
342static inline unsigned long
343numaq_check_apicid_used(physid_mask_t bitmap, int apicid)
344{
345 return physid_isset(apicid, bitmap);
346}
347
348static inline unsigned long numaq_check_apicid_present(int bit)
349{
350 return physid_isset(bit, phys_cpu_present_map);
351}
352
353static inline int numaq_apic_id_registered(void)
354{
355 return 1;
356}
357
358static inline void numaq_init_apic_ldr(void)
359{
360 /* Already done in NUMA-Q firmware */
361}
362
363static inline void numaq_setup_apic_routing(void)
364{
365 printk(KERN_INFO
366 "Enabling APIC mode: NUMA-Q. Using %d I/O APICs\n",
367 nr_ioapics);
368}
369
370/*
371 * Skip adding the timer int on secondary nodes, which causes
372 * a small but painful rift in the time-space continuum.
373 */
374static inline int numaq_multi_timer_check(int apic, int irq)
375{
376 return apic != 0 && irq == 0;
377}
378
379static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map)
380{
381 /* We don't have a good way to do this yet - hack */
382 return physids_promote(0xFUL);
383}
384
385static inline int numaq_cpu_to_logical_apicid(int cpu)
386{
387 if (cpu >= nr_cpu_ids)
388 return BAD_APICID;
389 return cpu_2_logical_apicid[cpu];
390}
391
392/*
393 * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
394 * cpu to APIC ID relation to properly interact with the intelligent
395 * mode of the cluster controller.
396 */
397static inline int numaq_cpu_present_to_apicid(int mps_cpu)
398{
399 if (mps_cpu < 60)
400 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
401 else
402 return BAD_APICID;
403}
404
405static inline int numaq_apicid_to_node(int logical_apicid)
406{
407 return logical_apicid >> 4;
408}
409
410static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid)
411{
412 int node = numaq_apicid_to_node(logical_apicid);
413 int cpu = __ffs(logical_apicid & 0xf);
414
415 return physid_mask_of_physid(cpu + 4*node);
416}
417
418/* Where the IO area was mapped on multiquad, always 0 otherwise */
419void *xquad_portio;
420
421static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid)
422{
423 return 1;
424}
425
426/*
427 * We use physical apicids here, not logical, so just return the default
428 * physical broadcast to stop people from breaking us
429 */
430static inline unsigned int numaq_cpu_mask_to_apicid(const cpumask_t *cpumask)
431{
432 return 0x0F;
433}
434
435static inline unsigned int
436numaq_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
437 const struct cpumask *andmask)
438{
439 return 0x0F;
440}
441
442/* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
443static inline int numaq_phys_pkg_id(int cpuid_apic, int index_msb)
444{
445 return cpuid_apic >> index_msb;
446}
447
448static int
449numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
450{
451 if (strncmp(oem, "IBM NUMA", 8))
452 printk(KERN_ERR "Warning! Not a NUMA-Q system!\n");
453 else
454 found_numaq = 1;
455
456 return found_numaq;
457}
458
459static int probe_numaq(void)
460{
461 /* already know from get_memcfg_numaq() */
462 return found_numaq;
463}
464
465static void numaq_vector_allocation_domain(int cpu, cpumask_t *retmask)
466{
467 /* Careful. Some cpus do not strictly honor the set of cpus
468 * specified in the interrupt destination when using lowest
469 * priority interrupt delivery mode.
470 *
471 * In particular there was a hyperthreading cpu observed to
472 * deliver interrupts to the wrong hyperthread when only one
473 * hyperthread was specified in the interrupt desitination.
474 */
475 *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
476}
477
478static void numaq_setup_portio_remap(void)
479{
480 int num_quads = num_online_nodes();
481
482 if (num_quads <= 1)
483 return;
484
485 printk(KERN_INFO
486 "Remapping cross-quad port I/O for %d quads\n", num_quads);
487
488 xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
489
490 printk(KERN_INFO
491 "xquad_portio vaddr 0x%08lx, len %08lx\n",
492 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
493}
494
495struct apic apic_numaq = {
496
497 .name = "NUMAQ",
498 .probe = probe_numaq,
499 .acpi_madt_oem_check = NULL,
500 .apic_id_registered = numaq_apic_id_registered,
501
502 .irq_delivery_mode = dest_LowestPrio,
503 /* physical delivery on LOCAL quad: */
504 .irq_dest_mode = 0,
505
506 .target_cpus = numaq_target_cpus,
507 .disable_esr = 1,
508 .dest_logical = APIC_DEST_LOGICAL,
509 .check_apicid_used = numaq_check_apicid_used,
510 .check_apicid_present = numaq_check_apicid_present,
511
512 .vector_allocation_domain = numaq_vector_allocation_domain,
513 .init_apic_ldr = numaq_init_apic_ldr,
514
515 .ioapic_phys_id_map = numaq_ioapic_phys_id_map,
516 .setup_apic_routing = numaq_setup_apic_routing,
517 .multi_timer_check = numaq_multi_timer_check,
518 .apicid_to_node = numaq_apicid_to_node,
519 .cpu_to_logical_apicid = numaq_cpu_to_logical_apicid,
520 .cpu_present_to_apicid = numaq_cpu_present_to_apicid,
521 .apicid_to_cpu_present = numaq_apicid_to_cpu_present,
522 .setup_portio_remap = numaq_setup_portio_remap,
523 .check_phys_apicid_present = numaq_check_phys_apicid_present,
524 .enable_apic_mode = NULL,
525 .phys_pkg_id = numaq_phys_pkg_id,
526 .mps_oem_check = numaq_mps_oem_check,
527
528 .get_apic_id = numaq_get_apic_id,
529 .set_apic_id = NULL,
530 .apic_id_mask = 0x0F << 24,
531
532 .cpu_mask_to_apicid = numaq_cpu_mask_to_apicid,
533 .cpu_mask_to_apicid_and = numaq_cpu_mask_to_apicid_and,
534
535 .send_IPI_mask = numaq_send_IPI_mask,
536 .send_IPI_mask_allbutself = NULL,
537 .send_IPI_allbutself = numaq_send_IPI_allbutself,
538 .send_IPI_all = numaq_send_IPI_all,
539 .send_IPI_self = default_send_IPI_self,
540
541 .wakeup_secondary_cpu = wakeup_secondary_cpu_via_nmi,
542 .trampoline_phys_low = NUMAQ_TRAMPOLINE_PHYS_LOW,
543 .trampoline_phys_high = NUMAQ_TRAMPOLINE_PHYS_HIGH,
544
545 /* We don't do anything here because we use NMI's to boot instead */
546 .wait_for_init_deassert = NULL,
547
548 .smp_callin_clear_local_apic = numaq_smp_callin_clear_local_apic,
549 .inquire_remote_apic = NULL,
550
551 .read = native_apic_mem_read,
552 .write = native_apic_mem_write,
553 .icr_read = native_apic_icr_read,
554 .icr_write = native_apic_icr_write,
555 .wait_icr_idle = native_apic_wait_icr_idle,
556 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
557};
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
new file mode 100644
index 000000000000..141c99a1c264
--- /dev/null
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -0,0 +1,284 @@
1/*
2 * Default generic APIC driver. This handles up to 8 CPUs.
3 *
4 * Copyright 2003 Andi Kleen, SuSE Labs.
5 * Subject to the GNU Public License, v.2
6 *
7 * Generic x86 APIC driver probe layer.
8 */
9#include <linux/threads.h>
10#include <linux/cpumask.h>
11#include <linux/module.h>
12#include <linux/string.h>
13#include <linux/kernel.h>
14#include <linux/ctype.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <asm/fixmap.h>
18#include <asm/mpspec.h>
19#include <asm/apicdef.h>
20#include <asm/apic.h>
21#include <asm/setup.h>
22
23#include <linux/threads.h>
24#include <linux/cpumask.h>
25#include <asm/mpspec.h>
26#include <asm/fixmap.h>
27#include <asm/apicdef.h>
28#include <linux/kernel.h>
29#include <linux/string.h>
30#include <linux/smp.h>
31#include <linux/init.h>
32#include <asm/ipi.h>
33
34#include <linux/smp.h>
35#include <linux/init.h>
36#include <linux/interrupt.h>
37#include <asm/acpi.h>
38#include <asm/e820.h>
39#include <asm/setup.h>
40
41#ifdef CONFIG_HOTPLUG_CPU
42#define DEFAULT_SEND_IPI (1)
43#else
44#define DEFAULT_SEND_IPI (0)
45#endif
46
47int no_broadcast = DEFAULT_SEND_IPI;
48
49static __init int no_ipi_broadcast(char *str)
50{
51 get_option(&str, &no_broadcast);
52 pr_info("Using %s mode\n",
53 no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
54 return 1;
55}
56__setup("no_ipi_broadcast=", no_ipi_broadcast);
57
58static int __init print_ipi_mode(void)
59{
60 pr_info("Using IPI %s mode\n",
61 no_broadcast ? "No-Shortcut" : "Shortcut");
62 return 0;
63}
64late_initcall(print_ipi_mode);
65
66void default_setup_apic_routing(void)
67{
68#ifdef CONFIG_X86_IO_APIC
69 printk(KERN_INFO
70 "Enabling APIC mode: Flat. Using %d I/O APICs\n",
71 nr_ioapics);
72#endif
73}
74
75static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
76{
77 /*
78 * Careful. Some cpus do not strictly honor the set of cpus
79 * specified in the interrupt destination when using lowest
80 * priority interrupt delivery mode.
81 *
82 * In particular there was a hyperthreading cpu observed to
83 * deliver interrupts to the wrong hyperthread when only one
84 * hyperthread was specified in the interrupt desitination.
85 */
86 *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
87}
88
89/* should be called last. */
90static int probe_default(void)
91{
92 return 1;
93}
94
95struct apic apic_default = {
96
97 .name = "default",
98 .probe = probe_default,
99 .acpi_madt_oem_check = NULL,
100 .apic_id_registered = default_apic_id_registered,
101
102 .irq_delivery_mode = dest_LowestPrio,
103 /* logical delivery broadcast to all CPUs: */
104 .irq_dest_mode = 1,
105
106 .target_cpus = default_target_cpus,
107 .disable_esr = 0,
108 .dest_logical = APIC_DEST_LOGICAL,
109 .check_apicid_used = default_check_apicid_used,
110 .check_apicid_present = default_check_apicid_present,
111
112 .vector_allocation_domain = default_vector_allocation_domain,
113 .init_apic_ldr = default_init_apic_ldr,
114
115 .ioapic_phys_id_map = default_ioapic_phys_id_map,
116 .setup_apic_routing = default_setup_apic_routing,
117 .multi_timer_check = NULL,
118 .apicid_to_node = default_apicid_to_node,
119 .cpu_to_logical_apicid = default_cpu_to_logical_apicid,
120 .cpu_present_to_apicid = default_cpu_present_to_apicid,
121 .apicid_to_cpu_present = default_apicid_to_cpu_present,
122 .setup_portio_remap = NULL,
123 .check_phys_apicid_present = default_check_phys_apicid_present,
124 .enable_apic_mode = NULL,
125 .phys_pkg_id = default_phys_pkg_id,
126 .mps_oem_check = NULL,
127
128 .get_apic_id = default_get_apic_id,
129 .set_apic_id = NULL,
130 .apic_id_mask = 0x0F << 24,
131
132 .cpu_mask_to_apicid = default_cpu_mask_to_apicid,
133 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
134
135 .send_IPI_mask = default_send_IPI_mask_logical,
136 .send_IPI_mask_allbutself = default_send_IPI_mask_allbutself_logical,
137 .send_IPI_allbutself = default_send_IPI_allbutself,
138 .send_IPI_all = default_send_IPI_all,
139 .send_IPI_self = default_send_IPI_self,
140
141 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
142 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
143
144 .wait_for_init_deassert = default_wait_for_init_deassert,
145
146 .smp_callin_clear_local_apic = NULL,
147 .inquire_remote_apic = default_inquire_remote_apic,
148
149 .read = native_apic_mem_read,
150 .write = native_apic_mem_write,
151 .icr_read = native_apic_icr_read,
152 .icr_write = native_apic_icr_write,
153 .wait_icr_idle = native_apic_wait_icr_idle,
154 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
155};
156
157extern struct apic apic_numaq;
158extern struct apic apic_summit;
159extern struct apic apic_bigsmp;
160extern struct apic apic_es7000;
161extern struct apic apic_es7000_cluster;
162extern struct apic apic_default;
163
164struct apic *apic = &apic_default;
165EXPORT_SYMBOL_GPL(apic);
166
167static struct apic *apic_probe[] __initdata = {
168#ifdef CONFIG_X86_NUMAQ
169 &apic_numaq,
170#endif
171#ifdef CONFIG_X86_SUMMIT
172 &apic_summit,
173#endif
174#ifdef CONFIG_X86_BIGSMP
175 &apic_bigsmp,
176#endif
177#ifdef CONFIG_X86_ES7000
178 &apic_es7000,
179 &apic_es7000_cluster,
180#endif
181 &apic_default, /* must be last */
182 NULL,
183};
184
185static int cmdline_apic __initdata;
186static int __init parse_apic(char *arg)
187{
188 int i;
189
190 if (!arg)
191 return -EINVAL;
192
193 for (i = 0; apic_probe[i]; i++) {
194 if (!strcmp(apic_probe[i]->name, arg)) {
195 apic = apic_probe[i];
196 cmdline_apic = 1;
197 return 0;
198 }
199 }
200
201 /* Parsed again by __setup for debug/verbose */
202 return 0;
203}
204early_param("apic", parse_apic);
205
206void __init generic_bigsmp_probe(void)
207{
208#ifdef CONFIG_X86_BIGSMP
209 /*
210 * This routine is used to switch to bigsmp mode when
211 * - There is no apic= option specified by the user
212 * - generic_apic_probe() has chosen apic_default as the sub_arch
213 * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
214 */
215
216 if (!cmdline_apic && apic == &apic_default) {
217 if (apic_bigsmp.probe()) {
218 apic = &apic_bigsmp;
219 printk(KERN_INFO "Overriding APIC driver with %s\n",
220 apic->name);
221 }
222 }
223#endif
224}
225
226void __init generic_apic_probe(void)
227{
228 if (!cmdline_apic) {
229 int i;
230 for (i = 0; apic_probe[i]; i++) {
231 if (apic_probe[i]->probe()) {
232 apic = apic_probe[i];
233 break;
234 }
235 }
236 /* Not visible without early console */
237 if (!apic_probe[i])
238 panic("Didn't find an APIC driver");
239 }
240 printk(KERN_INFO "Using APIC driver %s\n", apic->name);
241}
242
243/* These functions can switch the APIC even after the initial ->probe() */
244
245int __init
246generic_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
247{
248 int i;
249
250 for (i = 0; apic_probe[i]; ++i) {
251 if (!apic_probe[i]->mps_oem_check)
252 continue;
253 if (!apic_probe[i]->mps_oem_check(mpc, oem, productid))
254 continue;
255
256 if (!cmdline_apic) {
257 apic = apic_probe[i];
258 printk(KERN_INFO "Switched to APIC driver `%s'.\n",
259 apic->name);
260 }
261 return 1;
262 }
263 return 0;
264}
265
266int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
267{
268 int i;
269
270 for (i = 0; apic_probe[i]; ++i) {
271 if (!apic_probe[i]->acpi_madt_oem_check)
272 continue;
273 if (!apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id))
274 continue;
275
276 if (!cmdline_apic) {
277 apic = apic_probe[i];
278 printk(KERN_INFO "Switched to APIC driver `%s'.\n",
279 apic->name);
280 }
281 return 1;
282 }
283 return 0;
284}
diff --git a/arch/x86/kernel/genapic_64.c b/arch/x86/kernel/apic/probe_64.c
index 2bced78b0b8e..8d7748efe6a8 100644
--- a/arch/x86/kernel/genapic_64.c
+++ b/arch/x86/kernel/apic/probe_64.c
@@ -19,22 +19,27 @@
19#include <linux/dmar.h> 19#include <linux/dmar.h>
20 20
21#include <asm/smp.h> 21#include <asm/smp.h>
22#include <asm/apic.h>
22#include <asm/ipi.h> 23#include <asm/ipi.h>
23#include <asm/genapic.h>
24#include <asm/setup.h> 24#include <asm/setup.h>
25 25
26extern struct genapic apic_flat; 26extern struct apic apic_flat;
27extern struct genapic apic_physflat; 27extern struct apic apic_physflat;
28extern struct genapic apic_x2xpic_uv_x; 28extern struct apic apic_x2xpic_uv_x;
29extern struct genapic apic_x2apic_phys; 29extern struct apic apic_x2apic_phys;
30extern struct genapic apic_x2apic_cluster; 30extern struct apic apic_x2apic_cluster;
31 31
32struct genapic __read_mostly *genapic = &apic_flat; 32struct apic __read_mostly *apic = &apic_flat;
33EXPORT_SYMBOL_GPL(apic);
33 34
34static struct genapic *apic_probe[] __initdata = { 35static struct apic *apic_probe[] __initdata = {
36#ifdef CONFIG_X86_UV
35 &apic_x2apic_uv_x, 37 &apic_x2apic_uv_x,
38#endif
39#ifdef CONFIG_X86_X2APIC
36 &apic_x2apic_phys, 40 &apic_x2apic_phys,
37 &apic_x2apic_cluster, 41 &apic_x2apic_cluster,
42#endif
38 &apic_physflat, 43 &apic_physflat,
39 NULL, 44 NULL,
40}; 45};
@@ -42,39 +47,45 @@ static struct genapic *apic_probe[] __initdata = {
42/* 47/*
43 * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode. 48 * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode.
44 */ 49 */
45void __init setup_apic_routing(void) 50void __init default_setup_apic_routing(void)
46{ 51{
47 if (genapic == &apic_x2apic_phys || genapic == &apic_x2apic_cluster) { 52#ifdef CONFIG_X86_X2APIC
48 if (!intr_remapping_enabled) 53 if (x2apic && (apic != &apic_x2apic_phys &&
49 genapic = &apic_flat; 54#ifdef CONFIG_X86_UV
55 apic != &apic_x2apic_uv_x &&
56#endif
57 apic != &apic_x2apic_cluster)) {
58 if (x2apic_phys)
59 apic = &apic_x2apic_phys;
60 else
61 apic = &apic_x2apic_cluster;
62 printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
50 } 63 }
64#endif
51 65
52 if (genapic == &apic_flat) { 66 if (apic == &apic_flat) {
53 if (max_physical_apicid >= 8) 67 if (max_physical_apicid >= 8)
54 genapic = &apic_physflat; 68 apic = &apic_physflat;
55 printk(KERN_INFO "Setting APIC routing to %s\n", genapic->name); 69 printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
56 } 70 }
57
58 if (x86_quirks->update_genapic)
59 x86_quirks->update_genapic();
60} 71}
61 72
62/* Same for both flat and physical. */ 73/* Same for both flat and physical. */
63 74
64void apic_send_IPI_self(int vector) 75void apic_send_IPI_self(int vector)
65{ 76{
66 __send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL); 77 __default_send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL);
67} 78}
68 79
69int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id) 80int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
70{ 81{
71 int i; 82 int i;
72 83
73 for (i = 0; apic_probe[i]; ++i) { 84 for (i = 0; apic_probe[i]; ++i) {
74 if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { 85 if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) {
75 genapic = apic_probe[i]; 86 apic = apic_probe[i];
76 printk(KERN_INFO "Setting APIC routing to %s.\n", 87 printk(KERN_INFO "Setting APIC routing to %s.\n",
77 genapic->name); 88 apic->name);
78 return 1; 89 return 1;
79 } 90 }
80 } 91 }
diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c
new file mode 100644
index 000000000000..aac52fa873ff
--- /dev/null
+++ b/arch/x86/kernel/apic/summit_32.c
@@ -0,0 +1,579 @@
1/*
2 * IBM Summit-Specific Code
3 *
4 * Written By: Matthew Dobson, IBM Corporation
5 *
6 * Copyright (c) 2003 IBM Corp.
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <colpatch@us.ibm.com>
26 *
27 */
28
29#include <linux/mm.h>
30#include <linux/init.h>
31#include <asm/io.h>
32#include <asm/bios_ebda.h>
33
34/*
35 * APIC driver for the IBM "Summit" chipset.
36 */
37#include <linux/threads.h>
38#include <linux/cpumask.h>
39#include <asm/mpspec.h>
40#include <asm/apic.h>
41#include <asm/smp.h>
42#include <asm/fixmap.h>
43#include <asm/apicdef.h>
44#include <asm/ipi.h>
45#include <linux/kernel.h>
46#include <linux/string.h>
47#include <linux/init.h>
48#include <linux/gfp.h>
49#include <linux/smp.h>
50
51static unsigned summit_get_apic_id(unsigned long x)
52{
53 return (x >> 24) & 0xFF;
54}
55
56static inline void summit_send_IPI_mask(const cpumask_t *mask, int vector)
57{
58 default_send_IPI_mask_sequence_logical(mask, vector);
59}
60
61static void summit_send_IPI_allbutself(int vector)
62{
63 cpumask_t mask = cpu_online_map;
64 cpu_clear(smp_processor_id(), mask);
65
66 if (!cpus_empty(mask))
67 summit_send_IPI_mask(&mask, vector);
68}
69
70static void summit_send_IPI_all(int vector)
71{
72 summit_send_IPI_mask(&cpu_online_map, vector);
73}
74
75#include <asm/tsc.h>
76
77extern int use_cyclone;
78
79#ifdef CONFIG_X86_SUMMIT_NUMA
80static void setup_summit(void);
81#else
82static inline void setup_summit(void) {}
83#endif
84
85static int summit_mps_oem_check(struct mpc_table *mpc, char *oem,
86 char *productid)
87{
88 if (!strncmp(oem, "IBM ENSW", 8) &&
89 (!strncmp(productid, "VIGIL SMP", 9)
90 || !strncmp(productid, "EXA", 3)
91 || !strncmp(productid, "RUTHLESS SMP", 12))){
92 mark_tsc_unstable("Summit based system");
93 use_cyclone = 1; /*enable cyclone-timer*/
94 setup_summit();
95 return 1;
96 }
97 return 0;
98}
99
100/* Hook from generic ACPI tables.c */
101static int summit_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
102{
103 if (!strncmp(oem_id, "IBM", 3) &&
104 (!strncmp(oem_table_id, "SERVIGIL", 8)
105 || !strncmp(oem_table_id, "EXA", 3))){
106 mark_tsc_unstable("Summit based system");
107 use_cyclone = 1; /*enable cyclone-timer*/
108 setup_summit();
109 return 1;
110 }
111 return 0;
112}
113
114struct rio_table_hdr {
115 unsigned char version; /* Version number of this data structure */
116 /* Version 3 adds chassis_num & WP_index */
117 unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil) */
118 unsigned char num_rio_dev; /* # of RIO I/O devices (Cyclones and Winnipegs) */
119} __attribute__((packed));
120
121struct scal_detail {
122 unsigned char node_id; /* Scalability Node ID */
123 unsigned long CBAR; /* Address of 1MB register space */
124 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
125 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
126 unsigned char port1node; /* Node ID port connected to: 0xFF = None */
127 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
128 unsigned char port2node; /* Node ID port connected to: 0xFF = None */
129 unsigned char port2port; /* Port num port connected to: 0,1,2, or 0xFF=None */
130 unsigned char chassis_num; /* 1 based Chassis number (1 = boot node) */
131} __attribute__((packed));
132
133struct rio_detail {
134 unsigned char node_id; /* RIO Node ID */
135 unsigned long BBAR; /* Address of 1MB register space */
136 unsigned char type; /* Type of device */
137 unsigned char owner_id; /* For WPEG: Node ID of Cyclone that owns this WPEG*/
138 /* For CYC: Node ID of Twister that owns this CYC */
139 unsigned char port0node; /* Node ID port connected to: 0xFF=None */
140 unsigned char port0port; /* Port num port connected to: 0,1,2, or 0xFF=None */
141 unsigned char port1node; /* Node ID port connected to: 0xFF=None */
142 unsigned char port1port; /* Port num port connected to: 0,1,2, or 0xFF=None */
143 unsigned char first_slot; /* For WPEG: Lowest slot number below this WPEG */
144 /* For CYC: 0 */
145 unsigned char status; /* For WPEG: Bit 0 = 1 : the XAPIC is used */
146 /* = 0 : the XAPIC is not used, ie:*/
147 /* ints fwded to another XAPIC */
148 /* Bits1:7 Reserved */
149 /* For CYC: Bits0:7 Reserved */
150 unsigned char WP_index; /* For WPEG: WPEG instance index - lower ones have */
151 /* lower slot numbers/PCI bus numbers */
152 /* For CYC: No meaning */
153 unsigned char chassis_num; /* 1 based Chassis number */
154 /* For LookOut WPEGs this field indicates the */
155 /* Expansion Chassis #, enumerated from Boot */
156 /* Node WPEG external port, then Boot Node CYC */
157 /* external port, then Next Vigil chassis WPEG */
158 /* external port, etc. */
159 /* Shared Lookouts have only 1 chassis number (the */
160 /* first one assigned) */
161} __attribute__((packed));
162
163
164typedef enum {
165 CompatTwister = 0, /* Compatibility Twister */
166 AltTwister = 1, /* Alternate Twister of internal 8-way */
167 CompatCyclone = 2, /* Compatibility Cyclone */
168 AltCyclone = 3, /* Alternate Cyclone of internal 8-way */
169 CompatWPEG = 4, /* Compatibility WPEG */
170 AltWPEG = 5, /* Second Planar WPEG */
171 LookOutAWPEG = 6, /* LookOut WPEG */
172 LookOutBWPEG = 7, /* LookOut WPEG */
173} node_type;
174
175static inline int is_WPEG(struct rio_detail *rio){
176 return (rio->type == CompatWPEG || rio->type == AltWPEG ||
177 rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
178}
179
180
181/* In clustered mode, the high nibble of APIC ID is a cluster number.
182 * The low nibble is a 4-bit bitmap. */
183#define XAPIC_DEST_CPUS_SHIFT 4
184#define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
185#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
186
187#define SUMMIT_APIC_DFR_VALUE (APIC_DFR_CLUSTER)
188
189static const cpumask_t *summit_target_cpus(void)
190{
191 /* CPU_MASK_ALL (0xff) has undefined behaviour with
192 * dest_LowestPrio mode logical clustered apic interrupt routing
193 * Just start on cpu 0. IRQ balancing will spread load
194 */
195 return &cpumask_of_cpu(0);
196}
197
198static unsigned long summit_check_apicid_used(physid_mask_t bitmap, int apicid)
199{
200 return 0;
201}
202
203/* we don't use the phys_cpu_present_map to indicate apicid presence */
204static unsigned long summit_check_apicid_present(int bit)
205{
206 return 1;
207}
208
209static void summit_init_apic_ldr(void)
210{
211 unsigned long val, id;
212 int count = 0;
213 u8 my_id = (u8)hard_smp_processor_id();
214 u8 my_cluster = APIC_CLUSTER(my_id);
215#ifdef CONFIG_SMP
216 u8 lid;
217 int i;
218
219 /* Create logical APIC IDs by counting CPUs already in cluster. */
220 for (count = 0, i = nr_cpu_ids; --i >= 0; ) {
221 lid = cpu_2_logical_apicid[i];
222 if (lid != BAD_APICID && APIC_CLUSTER(lid) == my_cluster)
223 ++count;
224 }
225#endif
226 /* We only have a 4 wide bitmap in cluster mode. If a deranged
227 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
228 BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
229 id = my_cluster | (1UL << count);
230 apic_write(APIC_DFR, SUMMIT_APIC_DFR_VALUE);
231 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
232 val |= SET_APIC_LOGICAL_ID(id);
233 apic_write(APIC_LDR, val);
234}
235
236static int summit_apic_id_registered(void)
237{
238 return 1;
239}
240
241static void summit_setup_apic_routing(void)
242{
243 printk("Enabling APIC mode: Summit. Using %d I/O APICs\n",
244 nr_ioapics);
245}
246
247static int summit_apicid_to_node(int logical_apicid)
248{
249#ifdef CONFIG_SMP
250 return apicid_2_node[hard_smp_processor_id()];
251#else
252 return 0;
253#endif
254}
255
256/* Mapping from cpu number to logical apicid */
257static inline int summit_cpu_to_logical_apicid(int cpu)
258{
259#ifdef CONFIG_SMP
260 if (cpu >= nr_cpu_ids)
261 return BAD_APICID;
262 return cpu_2_logical_apicid[cpu];
263#else
264 return logical_smp_processor_id();
265#endif
266}
267
268static int summit_cpu_present_to_apicid(int mps_cpu)
269{
270 if (mps_cpu < nr_cpu_ids)
271 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
272 else
273 return BAD_APICID;
274}
275
276static physid_mask_t summit_ioapic_phys_id_map(physid_mask_t phys_id_map)
277{
278 /* For clustered we don't have a good way to do this yet - hack */
279 return physids_promote(0x0F);
280}
281
282static physid_mask_t summit_apicid_to_cpu_present(int apicid)
283{
284 return physid_mask_of_physid(0);
285}
286
287static int summit_check_phys_apicid_present(int boot_cpu_physical_apicid)
288{
289 return 1;
290}
291
292static unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask)
293{
294 unsigned int round = 0;
295 int cpu, apicid = 0;
296
297 /*
298 * The cpus in the mask must all be on the apic cluster.
299 */
300 for_each_cpu(cpu, cpumask) {
301 int new_apicid = summit_cpu_to_logical_apicid(cpu);
302
303 if (round && APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) {
304 printk("%s: Not a valid mask!\n", __func__);
305 return BAD_APICID;
306 }
307 apicid |= new_apicid;
308 round++;
309 }
310 return apicid;
311}
312
313static unsigned int summit_cpu_mask_to_apicid_and(const struct cpumask *inmask,
314 const struct cpumask *andmask)
315{
316 int apicid = summit_cpu_to_logical_apicid(0);
317 cpumask_var_t cpumask;
318
319 if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC))
320 return apicid;
321
322 cpumask_and(cpumask, inmask, andmask);
323 cpumask_and(cpumask, cpumask, cpu_online_mask);
324 apicid = summit_cpu_mask_to_apicid(cpumask);
325
326 free_cpumask_var(cpumask);
327
328 return apicid;
329}
330
331/*
332 * cpuid returns the value latched in the HW at reset, not the APIC ID
333 * register's value. For any box whose BIOS changes APIC IDs, like
334 * clustered APIC systems, we must use hard_smp_processor_id.
335 *
336 * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
337 */
338static int summit_phys_pkg_id(int cpuid_apic, int index_msb)
339{
340 return hard_smp_processor_id() >> index_msb;
341}
342
343static int probe_summit(void)
344{
345 /* probed later in mptable/ACPI hooks */
346 return 0;
347}
348
349static void summit_vector_allocation_domain(int cpu, cpumask_t *retmask)
350{
351 /* Careful. Some cpus do not strictly honor the set of cpus
352 * specified in the interrupt destination when using lowest
353 * priority interrupt delivery mode.
354 *
355 * In particular there was a hyperthreading cpu observed to
356 * deliver interrupts to the wrong hyperthread when only one
357 * hyperthread was specified in the interrupt desitination.
358 */
359 *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
360}
361
362#ifdef CONFIG_X86_SUMMIT_NUMA
363static struct rio_table_hdr *rio_table_hdr;
364static struct scal_detail *scal_devs[MAX_NUMNODES];
365static struct rio_detail *rio_devs[MAX_NUMNODES*4];
366
367#ifndef CONFIG_X86_NUMAQ
368static int mp_bus_id_to_node[MAX_MP_BUSSES];
369#endif
370
371static int setup_pci_node_map_for_wpeg(int wpeg_num, int last_bus)
372{
373 int twister = 0, node = 0;
374 int i, bus, num_buses;
375
376 for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
377 if (rio_devs[i]->node_id == rio_devs[wpeg_num]->owner_id) {
378 twister = rio_devs[i]->owner_id;
379 break;
380 }
381 }
382 if (i == rio_table_hdr->num_rio_dev) {
383 printk(KERN_ERR "%s: Couldn't find owner Cyclone for Winnipeg!\n", __func__);
384 return last_bus;
385 }
386
387 for (i = 0; i < rio_table_hdr->num_scal_dev; i++) {
388 if (scal_devs[i]->node_id == twister) {
389 node = scal_devs[i]->node_id;
390 break;
391 }
392 }
393 if (i == rio_table_hdr->num_scal_dev) {
394 printk(KERN_ERR "%s: Couldn't find owner Twister for Cyclone!\n", __func__);
395 return last_bus;
396 }
397
398 switch (rio_devs[wpeg_num]->type) {
399 case CompatWPEG:
400 /*
401 * The Compatibility Winnipeg controls the 2 legacy buses,
402 * the 66MHz PCI bus [2 slots] and the 2 "extra" buses in case
403 * a PCI-PCI bridge card is used in either slot: total 5 buses.
404 */
405 num_buses = 5;
406 break;
407 case AltWPEG:
408 /*
409 * The Alternate Winnipeg controls the 2 133MHz buses [1 slot
410 * each], their 2 "extra" buses, the 100MHz bus [2 slots] and
411 * the "extra" buses for each of those slots: total 7 buses.
412 */
413 num_buses = 7;
414 break;
415 case LookOutAWPEG:
416 case LookOutBWPEG:
417 /*
418 * A Lookout Winnipeg controls 3 100MHz buses [2 slots each]
419 * & the "extra" buses for each of those slots: total 9 buses.
420 */
421 num_buses = 9;
422 break;
423 default:
424 printk(KERN_INFO "%s: Unsupported Winnipeg type!\n", __func__);
425 return last_bus;
426 }
427
428 for (bus = last_bus; bus < last_bus + num_buses; bus++)
429 mp_bus_id_to_node[bus] = node;
430 return bus;
431}
432
433static int build_detail_arrays(void)
434{
435 unsigned long ptr;
436 int i, scal_detail_size, rio_detail_size;
437
438 if (rio_table_hdr->num_scal_dev > MAX_NUMNODES) {
439 printk(KERN_WARNING "%s: MAX_NUMNODES too low! Defined as %d, but system has %d nodes.\n", __func__, MAX_NUMNODES, rio_table_hdr->num_scal_dev);
440 return 0;
441 }
442
443 switch (rio_table_hdr->version) {
444 default:
445 printk(KERN_WARNING "%s: Invalid Rio Grande Table Version: %d\n", __func__, rio_table_hdr->version);
446 return 0;
447 case 2:
448 scal_detail_size = 11;
449 rio_detail_size = 13;
450 break;
451 case 3:
452 scal_detail_size = 12;
453 rio_detail_size = 15;
454 break;
455 }
456
457 ptr = (unsigned long)rio_table_hdr + 3;
458 for (i = 0; i < rio_table_hdr->num_scal_dev; i++, ptr += scal_detail_size)
459 scal_devs[i] = (struct scal_detail *)ptr;
460
461 for (i = 0; i < rio_table_hdr->num_rio_dev; i++, ptr += rio_detail_size)
462 rio_devs[i] = (struct rio_detail *)ptr;
463
464 return 1;
465}
466
467void setup_summit(void)
468{
469 unsigned long ptr;
470 unsigned short offset;
471 int i, next_wpeg, next_bus = 0;
472
473 /* The pointer to the EBDA is stored in the word @ phys 0x40E(40:0E) */
474 ptr = get_bios_ebda();
475 ptr = (unsigned long)phys_to_virt(ptr);
476
477 rio_table_hdr = NULL;
478 offset = 0x180;
479 while (offset) {
480 /* The block id is stored in the 2nd word */
481 if (*((unsigned short *)(ptr + offset + 2)) == 0x4752) {
482 /* set the pointer past the offset & block id */
483 rio_table_hdr = (struct rio_table_hdr *)(ptr + offset + 4);
484 break;
485 }
486 /* The next offset is stored in the 1st word. 0 means no more */
487 offset = *((unsigned short *)(ptr + offset));
488 }
489 if (!rio_table_hdr) {
490 printk(KERN_ERR "%s: Unable to locate Rio Grande Table in EBDA - bailing!\n", __func__);
491 return;
492 }
493
494 if (!build_detail_arrays())
495 return;
496
497 /* The first Winnipeg we're looking for has an index of 0 */
498 next_wpeg = 0;
499 do {
500 for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
501 if (is_WPEG(rio_devs[i]) && rio_devs[i]->WP_index == next_wpeg) {
502 /* It's the Winnipeg we're looking for! */
503 next_bus = setup_pci_node_map_for_wpeg(i, next_bus);
504 next_wpeg++;
505 break;
506 }
507 }
508 /*
509 * If we go through all Rio devices and don't find one with
510 * the next index, it means we've found all the Winnipegs,
511 * and thus all the PCI buses.
512 */
513 if (i == rio_table_hdr->num_rio_dev)
514 next_wpeg = 0;
515 } while (next_wpeg != 0);
516}
517#endif
518
519struct apic apic_summit = {
520
521 .name = "summit",
522 .probe = probe_summit,
523 .acpi_madt_oem_check = summit_acpi_madt_oem_check,
524 .apic_id_registered = summit_apic_id_registered,
525
526 .irq_delivery_mode = dest_LowestPrio,
527 /* logical delivery broadcast to all CPUs: */
528 .irq_dest_mode = 1,
529
530 .target_cpus = summit_target_cpus,
531 .disable_esr = 1,
532 .dest_logical = APIC_DEST_LOGICAL,
533 .check_apicid_used = summit_check_apicid_used,
534 .check_apicid_present = summit_check_apicid_present,
535
536 .vector_allocation_domain = summit_vector_allocation_domain,
537 .init_apic_ldr = summit_init_apic_ldr,
538
539 .ioapic_phys_id_map = summit_ioapic_phys_id_map,
540 .setup_apic_routing = summit_setup_apic_routing,
541 .multi_timer_check = NULL,
542 .apicid_to_node = summit_apicid_to_node,
543 .cpu_to_logical_apicid = summit_cpu_to_logical_apicid,
544 .cpu_present_to_apicid = summit_cpu_present_to_apicid,
545 .apicid_to_cpu_present = summit_apicid_to_cpu_present,
546 .setup_portio_remap = NULL,
547 .check_phys_apicid_present = summit_check_phys_apicid_present,
548 .enable_apic_mode = NULL,
549 .phys_pkg_id = summit_phys_pkg_id,
550 .mps_oem_check = summit_mps_oem_check,
551
552 .get_apic_id = summit_get_apic_id,
553 .set_apic_id = NULL,
554 .apic_id_mask = 0xFF << 24,
555
556 .cpu_mask_to_apicid = summit_cpu_mask_to_apicid,
557 .cpu_mask_to_apicid_and = summit_cpu_mask_to_apicid_and,
558
559 .send_IPI_mask = summit_send_IPI_mask,
560 .send_IPI_mask_allbutself = NULL,
561 .send_IPI_allbutself = summit_send_IPI_allbutself,
562 .send_IPI_all = summit_send_IPI_all,
563 .send_IPI_self = default_send_IPI_self,
564
565 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
566 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
567
568 .wait_for_init_deassert = default_wait_for_init_deassert,
569
570 .smp_callin_clear_local_apic = NULL,
571 .inquire_remote_apic = default_inquire_remote_apic,
572
573 .read = native_apic_mem_read,
574 .write = native_apic_mem_write,
575 .icr_read = native_apic_icr_read,
576 .icr_write = native_apic_icr_write,
577 .wait_icr_idle = native_apic_wait_icr_idle,
578 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
579};
diff --git a/arch/x86/kernel/genx2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index 6ce497cc372d..8fb87b6dd633 100644
--- a/arch/x86/kernel/genx2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -7,17 +7,14 @@
7#include <linux/dmar.h> 7#include <linux/dmar.h>
8 8
9#include <asm/smp.h> 9#include <asm/smp.h>
10#include <asm/apic.h>
10#include <asm/ipi.h> 11#include <asm/ipi.h>
11#include <asm/genapic.h>
12 12
13DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); 13DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
14 14
15static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 15static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
16{ 16{
17 if (cpu_has_x2apic) 17 return x2apic_enabled();
18 return 1;
19
20 return 0;
21} 18}
22 19
23/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ 20/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
@@ -36,8 +33,8 @@ static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
36 cpumask_set_cpu(cpu, retmask); 33 cpumask_set_cpu(cpu, retmask);
37} 34}
38 35
39static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, 36static void
40 unsigned int dest) 37 __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
41{ 38{
42 unsigned long cfg; 39 unsigned long cfg;
43 40
@@ -46,7 +43,7 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
46 /* 43 /*
47 * send the IPI. 44 * send the IPI.
48 */ 45 */
49 x2apic_icr_write(cfg, apicid); 46 native_x2apic_icr_write(cfg, apicid);
50} 47}
51 48
52/* 49/*
@@ -57,45 +54,50 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
57 */ 54 */
58static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) 55static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
59{ 56{
60 unsigned long flags;
61 unsigned long query_cpu; 57 unsigned long query_cpu;
58 unsigned long flags;
62 59
63 local_irq_save(flags); 60 local_irq_save(flags);
64 for_each_cpu(query_cpu, mask) 61 for_each_cpu(query_cpu, mask) {
65 __x2apic_send_IPI_dest( 62 __x2apic_send_IPI_dest(
66 per_cpu(x86_cpu_to_logical_apicid, query_cpu), 63 per_cpu(x86_cpu_to_logical_apicid, query_cpu),
67 vector, APIC_DEST_LOGICAL); 64 vector, apic->dest_logical);
65 }
68 local_irq_restore(flags); 66 local_irq_restore(flags);
69} 67}
70 68
71static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, 69static void
72 int vector) 70 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
73{ 71{
74 unsigned long flags;
75 unsigned long query_cpu;
76 unsigned long this_cpu = smp_processor_id(); 72 unsigned long this_cpu = smp_processor_id();
73 unsigned long query_cpu;
74 unsigned long flags;
77 75
78 local_irq_save(flags); 76 local_irq_save(flags);
79 for_each_cpu(query_cpu, mask) 77 for_each_cpu(query_cpu, mask) {
80 if (query_cpu != this_cpu) 78 if (query_cpu == this_cpu)
81 __x2apic_send_IPI_dest( 79 continue;
80 __x2apic_send_IPI_dest(
82 per_cpu(x86_cpu_to_logical_apicid, query_cpu), 81 per_cpu(x86_cpu_to_logical_apicid, query_cpu),
83 vector, APIC_DEST_LOGICAL); 82 vector, apic->dest_logical);
83 }
84 local_irq_restore(flags); 84 local_irq_restore(flags);
85} 85}
86 86
87static void x2apic_send_IPI_allbutself(int vector) 87static void x2apic_send_IPI_allbutself(int vector)
88{ 88{
89 unsigned long flags;
90 unsigned long query_cpu;
91 unsigned long this_cpu = smp_processor_id(); 89 unsigned long this_cpu = smp_processor_id();
90 unsigned long query_cpu;
91 unsigned long flags;
92 92
93 local_irq_save(flags); 93 local_irq_save(flags);
94 for_each_online_cpu(query_cpu) 94 for_each_online_cpu(query_cpu) {
95 if (query_cpu != this_cpu) 95 if (query_cpu == this_cpu)
96 __x2apic_send_IPI_dest( 96 continue;
97 __x2apic_send_IPI_dest(
97 per_cpu(x86_cpu_to_logical_apicid, query_cpu), 98 per_cpu(x86_cpu_to_logical_apicid, query_cpu),
98 vector, APIC_DEST_LOGICAL); 99 vector, apic->dest_logical);
100 }
99 local_irq_restore(flags); 101 local_irq_restore(flags);
100} 102}
101 103
@@ -111,21 +113,21 @@ static int x2apic_apic_id_registered(void)
111 113
112static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) 114static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
113{ 115{
114 int cpu;
115
116 /* 116 /*
117 * We're using fixed IRQ delivery, can only return one logical APIC ID. 117 * We're using fixed IRQ delivery, can only return one logical APIC ID.
118 * May as well be the first. 118 * May as well be the first.
119 */ 119 */
120 cpu = cpumask_first(cpumask); 120 int cpu = cpumask_first(cpumask);
121
121 if ((unsigned)cpu < nr_cpu_ids) 122 if ((unsigned)cpu < nr_cpu_ids)
122 return per_cpu(x86_cpu_to_logical_apicid, cpu); 123 return per_cpu(x86_cpu_to_logical_apicid, cpu);
123 else 124 else
124 return BAD_APICID; 125 return BAD_APICID;
125} 126}
126 127
127static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 128static unsigned int
128 const struct cpumask *andmask) 129x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
130 const struct cpumask *andmask)
129{ 131{
130 int cpu; 132 int cpu;
131 133
@@ -133,15 +135,18 @@ static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
133 * We're using fixed IRQ delivery, can only return one logical APIC ID. 135 * We're using fixed IRQ delivery, can only return one logical APIC ID.
134 * May as well be the first. 136 * May as well be the first.
135 */ 137 */
136 for_each_cpu_and(cpu, cpumask, andmask) 138 for_each_cpu_and(cpu, cpumask, andmask) {
137 if (cpumask_test_cpu(cpu, cpu_online_mask)) 139 if (cpumask_test_cpu(cpu, cpu_online_mask))
138 break; 140 break;
141 }
142
139 if (cpu < nr_cpu_ids) 143 if (cpu < nr_cpu_ids)
140 return per_cpu(x86_cpu_to_logical_apicid, cpu); 144 return per_cpu(x86_cpu_to_logical_apicid, cpu);
145
141 return BAD_APICID; 146 return BAD_APICID;
142} 147}
143 148
144static unsigned int get_apic_id(unsigned long x) 149static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x)
145{ 150{
146 unsigned int id; 151 unsigned int id;
147 152
@@ -157,7 +162,7 @@ static unsigned long set_apic_id(unsigned int id)
157 return x; 162 return x;
158} 163}
159 164
160static unsigned int phys_pkg_id(int index_msb) 165static int x2apic_cluster_phys_pkg_id(int initial_apicid, int index_msb)
161{ 166{
162 return current_cpu_data.initial_apicid >> index_msb; 167 return current_cpu_data.initial_apicid >> index_msb;
163} 168}
@@ -172,27 +177,63 @@ static void init_x2apic_ldr(void)
172 int cpu = smp_processor_id(); 177 int cpu = smp_processor_id();
173 178
174 per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR); 179 per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR);
175 return; 180}
176} 181
177 182struct apic apic_x2apic_cluster = {
178struct genapic apic_x2apic_cluster = { 183
179 .name = "cluster x2apic", 184 .name = "cluster x2apic",
180 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, 185 .probe = NULL,
181 .int_delivery_mode = dest_LowestPrio, 186 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
182 .int_dest_mode = (APIC_DEST_LOGICAL != 0), 187 .apic_id_registered = x2apic_apic_id_registered,
183 .target_cpus = x2apic_target_cpus, 188
184 .vector_allocation_domain = x2apic_vector_allocation_domain, 189 .irq_delivery_mode = dest_LowestPrio,
185 .apic_id_registered = x2apic_apic_id_registered, 190 .irq_dest_mode = 1, /* logical */
186 .init_apic_ldr = init_x2apic_ldr, 191
187 .send_IPI_all = x2apic_send_IPI_all, 192 .target_cpus = x2apic_target_cpus,
188 .send_IPI_allbutself = x2apic_send_IPI_allbutself, 193 .disable_esr = 0,
189 .send_IPI_mask = x2apic_send_IPI_mask, 194 .dest_logical = APIC_DEST_LOGICAL,
190 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, 195 .check_apicid_used = NULL,
191 .send_IPI_self = x2apic_send_IPI_self, 196 .check_apicid_present = NULL,
192 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, 197
193 .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, 198 .vector_allocation_domain = x2apic_vector_allocation_domain,
194 .phys_pkg_id = phys_pkg_id, 199 .init_apic_ldr = init_x2apic_ldr,
195 .get_apic_id = get_apic_id, 200
196 .set_apic_id = set_apic_id, 201 .ioapic_phys_id_map = NULL,
197 .apic_id_mask = (0xFFFFFFFFu), 202 .setup_apic_routing = NULL,
203 .multi_timer_check = NULL,
204 .apicid_to_node = NULL,
205 .cpu_to_logical_apicid = NULL,
206 .cpu_present_to_apicid = default_cpu_present_to_apicid,
207 .apicid_to_cpu_present = NULL,
208 .setup_portio_remap = NULL,
209 .check_phys_apicid_present = default_check_phys_apicid_present,
210 .enable_apic_mode = NULL,
211 .phys_pkg_id = x2apic_cluster_phys_pkg_id,
212 .mps_oem_check = NULL,
213
214 .get_apic_id = x2apic_cluster_phys_get_apic_id,
215 .set_apic_id = set_apic_id,
216 .apic_id_mask = 0xFFFFFFFFu,
217
218 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
219 .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
220
221 .send_IPI_mask = x2apic_send_IPI_mask,
222 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
223 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
224 .send_IPI_all = x2apic_send_IPI_all,
225 .send_IPI_self = x2apic_send_IPI_self,
226
227 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
228 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
229 .wait_for_init_deassert = NULL,
230 .smp_callin_clear_local_apic = NULL,
231 .inquire_remote_apic = NULL,
232
233 .read = native_apic_msr_read,
234 .write = native_apic_msr_write,
235 .icr_read = native_x2apic_icr_read,
236 .icr_write = native_x2apic_icr_write,
237 .wait_icr_idle = native_x2apic_wait_icr_idle,
238 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
198}; 239};
diff --git a/arch/x86/kernel/genx2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
index 21bcc0e098ba..23625b9f98b2 100644
--- a/arch/x86/kernel/genx2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -7,10 +7,10 @@
7#include <linux/dmar.h> 7#include <linux/dmar.h>
8 8
9#include <asm/smp.h> 9#include <asm/smp.h>
10#include <asm/apic.h>
10#include <asm/ipi.h> 11#include <asm/ipi.h>
11#include <asm/genapic.h>
12 12
13static int x2apic_phys; 13int x2apic_phys;
14 14
15static int set_x2apic_phys_mode(char *arg) 15static int set_x2apic_phys_mode(char *arg)
16{ 16{
@@ -21,10 +21,10 @@ early_param("x2apic_phys", set_x2apic_phys_mode);
21 21
22static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 22static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
23{ 23{
24 if (cpu_has_x2apic && x2apic_phys) 24 if (x2apic_phys)
25 return 1; 25 return x2apic_enabled();
26 26 else
27 return 0; 27 return 0;
28} 28}
29 29
30/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ 30/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
@@ -50,13 +50,13 @@ static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
50 /* 50 /*
51 * send the IPI. 51 * send the IPI.
52 */ 52 */
53 x2apic_icr_write(cfg, apicid); 53 native_x2apic_icr_write(cfg, apicid);
54} 54}
55 55
56static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) 56static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
57{ 57{
58 unsigned long flags;
59 unsigned long query_cpu; 58 unsigned long query_cpu;
59 unsigned long flags;
60 60
61 local_irq_save(flags); 61 local_irq_save(flags);
62 for_each_cpu(query_cpu, mask) { 62 for_each_cpu(query_cpu, mask) {
@@ -66,12 +66,12 @@ static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
66 local_irq_restore(flags); 66 local_irq_restore(flags);
67} 67}
68 68
69static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, 69static void
70 int vector) 70 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
71{ 71{
72 unsigned long flags;
73 unsigned long query_cpu;
74 unsigned long this_cpu = smp_processor_id(); 72 unsigned long this_cpu = smp_processor_id();
73 unsigned long query_cpu;
74 unsigned long flags;
75 75
76 local_irq_save(flags); 76 local_irq_save(flags);
77 for_each_cpu(query_cpu, mask) { 77 for_each_cpu(query_cpu, mask) {
@@ -85,16 +85,17 @@ static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
85 85
86static void x2apic_send_IPI_allbutself(int vector) 86static void x2apic_send_IPI_allbutself(int vector)
87{ 87{
88 unsigned long flags;
89 unsigned long query_cpu;
90 unsigned long this_cpu = smp_processor_id(); 88 unsigned long this_cpu = smp_processor_id();
89 unsigned long query_cpu;
90 unsigned long flags;
91 91
92 local_irq_save(flags); 92 local_irq_save(flags);
93 for_each_online_cpu(query_cpu) 93 for_each_online_cpu(query_cpu) {
94 if (query_cpu != this_cpu) 94 if (query_cpu == this_cpu)
95 __x2apic_send_IPI_dest( 95 continue;
96 per_cpu(x86_cpu_to_apicid, query_cpu), 96 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
97 vector, APIC_DEST_PHYSICAL); 97 vector, APIC_DEST_PHYSICAL);
98 }
98 local_irq_restore(flags); 99 local_irq_restore(flags);
99} 100}
100 101
@@ -110,21 +111,21 @@ static int x2apic_apic_id_registered(void)
110 111
111static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask) 112static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
112{ 113{
113 int cpu;
114
115 /* 114 /*
116 * We're using fixed IRQ delivery, can only return one phys APIC ID. 115 * We're using fixed IRQ delivery, can only return one phys APIC ID.
117 * May as well be the first. 116 * May as well be the first.
118 */ 117 */
119 cpu = cpumask_first(cpumask); 118 int cpu = cpumask_first(cpumask);
119
120 if ((unsigned)cpu < nr_cpu_ids) 120 if ((unsigned)cpu < nr_cpu_ids)
121 return per_cpu(x86_cpu_to_apicid, cpu); 121 return per_cpu(x86_cpu_to_apicid, cpu);
122 else 122 else
123 return BAD_APICID; 123 return BAD_APICID;
124} 124}
125 125
126static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 126static unsigned int
127 const struct cpumask *andmask) 127x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
128 const struct cpumask *andmask)
128{ 129{
129 int cpu; 130 int cpu;
130 131
@@ -132,31 +133,28 @@ static unsigned int x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
132 * We're using fixed IRQ delivery, can only return one phys APIC ID. 133 * We're using fixed IRQ delivery, can only return one phys APIC ID.
133 * May as well be the first. 134 * May as well be the first.
134 */ 135 */
135 for_each_cpu_and(cpu, cpumask, andmask) 136 for_each_cpu_and(cpu, cpumask, andmask) {
136 if (cpumask_test_cpu(cpu, cpu_online_mask)) 137 if (cpumask_test_cpu(cpu, cpu_online_mask))
137 break; 138 break;
139 }
140
138 if (cpu < nr_cpu_ids) 141 if (cpu < nr_cpu_ids)
139 return per_cpu(x86_cpu_to_apicid, cpu); 142 return per_cpu(x86_cpu_to_apicid, cpu);
143
140 return BAD_APICID; 144 return BAD_APICID;
141} 145}
142 146
143static unsigned int get_apic_id(unsigned long x) 147static unsigned int x2apic_phys_get_apic_id(unsigned long x)
144{ 148{
145 unsigned int id; 149 return x;
146
147 id = x;
148 return id;
149} 150}
150 151
151static unsigned long set_apic_id(unsigned int id) 152static unsigned long set_apic_id(unsigned int id)
152{ 153{
153 unsigned long x; 154 return id;
154
155 x = id;
156 return x;
157} 155}
158 156
159static unsigned int phys_pkg_id(int index_msb) 157static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
160{ 158{
161 return current_cpu_data.initial_apicid >> index_msb; 159 return current_cpu_data.initial_apicid >> index_msb;
162} 160}
@@ -168,27 +166,63 @@ static void x2apic_send_IPI_self(int vector)
168 166
169static void init_x2apic_ldr(void) 167static void init_x2apic_ldr(void)
170{ 168{
171 return; 169}
172} 170
173 171struct apic apic_x2apic_phys = {
174struct genapic apic_x2apic_phys = { 172
175 .name = "physical x2apic", 173 .name = "physical x2apic",
176 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, 174 .probe = NULL,
177 .int_delivery_mode = dest_Fixed, 175 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
178 .int_dest_mode = (APIC_DEST_PHYSICAL != 0), 176 .apic_id_registered = x2apic_apic_id_registered,
179 .target_cpus = x2apic_target_cpus, 177
180 .vector_allocation_domain = x2apic_vector_allocation_domain, 178 .irq_delivery_mode = dest_Fixed,
181 .apic_id_registered = x2apic_apic_id_registered, 179 .irq_dest_mode = 0, /* physical */
182 .init_apic_ldr = init_x2apic_ldr, 180
183 .send_IPI_all = x2apic_send_IPI_all, 181 .target_cpus = x2apic_target_cpus,
184 .send_IPI_allbutself = x2apic_send_IPI_allbutself, 182 .disable_esr = 0,
185 .send_IPI_mask = x2apic_send_IPI_mask, 183 .dest_logical = 0,
186 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, 184 .check_apicid_used = NULL,
187 .send_IPI_self = x2apic_send_IPI_self, 185 .check_apicid_present = NULL,
188 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, 186
189 .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, 187 .vector_allocation_domain = x2apic_vector_allocation_domain,
190 .phys_pkg_id = phys_pkg_id, 188 .init_apic_ldr = init_x2apic_ldr,
191 .get_apic_id = get_apic_id, 189
192 .set_apic_id = set_apic_id, 190 .ioapic_phys_id_map = NULL,
193 .apic_id_mask = (0xFFFFFFFFu), 191 .setup_apic_routing = NULL,
192 .multi_timer_check = NULL,
193 .apicid_to_node = NULL,
194 .cpu_to_logical_apicid = NULL,
195 .cpu_present_to_apicid = default_cpu_present_to_apicid,
196 .apicid_to_cpu_present = NULL,
197 .setup_portio_remap = NULL,
198 .check_phys_apicid_present = default_check_phys_apicid_present,
199 .enable_apic_mode = NULL,
200 .phys_pkg_id = x2apic_phys_pkg_id,
201 .mps_oem_check = NULL,
202
203 .get_apic_id = x2apic_phys_get_apic_id,
204 .set_apic_id = set_apic_id,
205 .apic_id_mask = 0xFFFFFFFFu,
206
207 .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
208 .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
209
210 .send_IPI_mask = x2apic_send_IPI_mask,
211 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
212 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
213 .send_IPI_all = x2apic_send_IPI_all,
214 .send_IPI_self = x2apic_send_IPI_self,
215
216 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
217 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
218 .wait_for_init_deassert = NULL,
219 .smp_callin_clear_local_apic = NULL,
220 .inquire_remote_apic = NULL,
221
222 .read = native_apic_msr_read,
223 .write = native_apic_msr_write,
224 .icr_read = native_x2apic_icr_read,
225 .icr_write = native_x2apic_icr_write,
226 .wait_icr_idle = native_x2apic_wait_icr_idle,
227 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
194}; 228};
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index b193e082f6ce..1bd6da1f8fad 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -7,27 +7,28 @@
7 * 7 *
8 * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved. 8 * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved.
9 */ 9 */
10
11#include <linux/kernel.h>
12#include <linux/threads.h>
13#include <linux/cpu.h>
14#include <linux/cpumask.h> 10#include <linux/cpumask.h>
11#include <linux/hardirq.h>
12#include <linux/proc_fs.h>
13#include <linux/threads.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
15#include <linux/string.h> 16#include <linux/string.h>
16#include <linux/ctype.h> 17#include <linux/ctype.h>
17#include <linux/init.h>
18#include <linux/sched.h> 18#include <linux/sched.h>
19#include <linux/module.h>
20#include <linux/hardirq.h>
21#include <linux/timer.h> 19#include <linux/timer.h>
22#include <linux/proc_fs.h> 20#include <linux/cpu.h>
23#include <asm/current.h> 21#include <linux/init.h>
24#include <asm/smp.h> 22
25#include <asm/ipi.h>
26#include <asm/genapic.h>
27#include <asm/pgtable.h>
28#include <asm/uv/uv_mmrs.h> 23#include <asm/uv/uv_mmrs.h>
29#include <asm/uv/uv_hub.h> 24#include <asm/uv/uv_hub.h>
25#include <asm/current.h>
26#include <asm/pgtable.h>
30#include <asm/uv/bios.h> 27#include <asm/uv/bios.h>
28#include <asm/uv/uv.h>
29#include <asm/apic.h>
30#include <asm/ipi.h>
31#include <asm/smp.h>
31 32
32DEFINE_PER_CPU(int, x2apic_extra_bits); 33DEFINE_PER_CPU(int, x2apic_extra_bits);
33 34
@@ -90,39 +91,43 @@ static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask)
90 cpumask_set_cpu(cpu, retmask); 91 cpumask_set_cpu(cpu, retmask);
91} 92}
92 93
93int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip) 94static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
94{ 95{
96#ifdef CONFIG_SMP
95 unsigned long val; 97 unsigned long val;
96 int pnode; 98 int pnode;
97 99
98 pnode = uv_apicid_to_pnode(phys_apicid); 100 pnode = uv_apicid_to_pnode(phys_apicid);
99 val = (1UL << UVH_IPI_INT_SEND_SHFT) | 101 val = (1UL << UVH_IPI_INT_SEND_SHFT) |
100 (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | 102 (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) |
101 (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | 103 ((start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) |
102 APIC_DM_INIT; 104 APIC_DM_INIT;
103 uv_write_global_mmr64(pnode, UVH_IPI_INT, val); 105 uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
104 mdelay(10); 106 mdelay(10);
105 107
106 val = (1UL << UVH_IPI_INT_SEND_SHFT) | 108 val = (1UL << UVH_IPI_INT_SEND_SHFT) |
107 (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | 109 (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) |
108 (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | 110 ((start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) |
109 APIC_DM_STARTUP; 111 APIC_DM_STARTUP;
110 uv_write_global_mmr64(pnode, UVH_IPI_INT, val); 112 uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
113
114 atomic_set(&init_deasserted, 1);
115#endif
111 return 0; 116 return 0;
112} 117}
113 118
114static void uv_send_IPI_one(int cpu, int vector) 119static void uv_send_IPI_one(int cpu, int vector)
115{ 120{
116 unsigned long val, apicid, lapicid; 121 unsigned long val, apicid;
117 int pnode; 122 int pnode;
118 123
119 apicid = per_cpu(x86_cpu_to_apicid, cpu); 124 apicid = per_cpu(x86_cpu_to_apicid, cpu);
120 lapicid = apicid & 0x3f; /* ZZZ macro needed */
121 pnode = uv_apicid_to_pnode(apicid); 125 pnode = uv_apicid_to_pnode(apicid);
122 val = 126
123 (1UL << UVH_IPI_INT_SEND_SHFT) | (lapicid << 127 val = (1UL << UVH_IPI_INT_SEND_SHFT) |
124 UVH_IPI_INT_APIC_ID_SHFT) | 128 (apicid << UVH_IPI_INT_APIC_ID_SHFT) |
125 (vector << UVH_IPI_INT_VECTOR_SHFT); 129 (vector << UVH_IPI_INT_VECTOR_SHFT);
130
126 uv_write_global_mmr64(pnode, UVH_IPI_INT, val); 131 uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
127} 132}
128 133
@@ -136,22 +141,24 @@ static void uv_send_IPI_mask(const struct cpumask *mask, int vector)
136 141
137static void uv_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) 142static void uv_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
138{ 143{
139 unsigned int cpu;
140 unsigned int this_cpu = smp_processor_id(); 144 unsigned int this_cpu = smp_processor_id();
145 unsigned int cpu;
141 146
142 for_each_cpu(cpu, mask) 147 for_each_cpu(cpu, mask) {
143 if (cpu != this_cpu) 148 if (cpu != this_cpu)
144 uv_send_IPI_one(cpu, vector); 149 uv_send_IPI_one(cpu, vector);
150 }
145} 151}
146 152
147static void uv_send_IPI_allbutself(int vector) 153static void uv_send_IPI_allbutself(int vector)
148{ 154{
149 unsigned int cpu;
150 unsigned int this_cpu = smp_processor_id(); 155 unsigned int this_cpu = smp_processor_id();
156 unsigned int cpu;
151 157
152 for_each_online_cpu(cpu) 158 for_each_online_cpu(cpu) {
153 if (cpu != this_cpu) 159 if (cpu != this_cpu)
154 uv_send_IPI_one(cpu, vector); 160 uv_send_IPI_one(cpu, vector);
161 }
155} 162}
156 163
157static void uv_send_IPI_all(int vector) 164static void uv_send_IPI_all(int vector)
@@ -170,21 +177,21 @@ static void uv_init_apic_ldr(void)
170 177
171static unsigned int uv_cpu_mask_to_apicid(const struct cpumask *cpumask) 178static unsigned int uv_cpu_mask_to_apicid(const struct cpumask *cpumask)
172{ 179{
173 int cpu;
174
175 /* 180 /*
176 * We're using fixed IRQ delivery, can only return one phys APIC ID. 181 * We're using fixed IRQ delivery, can only return one phys APIC ID.
177 * May as well be the first. 182 * May as well be the first.
178 */ 183 */
179 cpu = cpumask_first(cpumask); 184 int cpu = cpumask_first(cpumask);
185
180 if ((unsigned)cpu < nr_cpu_ids) 186 if ((unsigned)cpu < nr_cpu_ids)
181 return per_cpu(x86_cpu_to_apicid, cpu); 187 return per_cpu(x86_cpu_to_apicid, cpu);
182 else 188 else
183 return BAD_APICID; 189 return BAD_APICID;
184} 190}
185 191
186static unsigned int uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 192static unsigned int
187 const struct cpumask *andmask) 193uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
194 const struct cpumask *andmask)
188{ 195{
189 int cpu; 196 int cpu;
190 197
@@ -192,15 +199,17 @@ static unsigned int uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
192 * We're using fixed IRQ delivery, can only return one phys APIC ID. 199 * We're using fixed IRQ delivery, can only return one phys APIC ID.
193 * May as well be the first. 200 * May as well be the first.
194 */ 201 */
195 for_each_cpu_and(cpu, cpumask, andmask) 202 for_each_cpu_and(cpu, cpumask, andmask) {
196 if (cpumask_test_cpu(cpu, cpu_online_mask)) 203 if (cpumask_test_cpu(cpu, cpu_online_mask))
197 break; 204 break;
205 }
198 if (cpu < nr_cpu_ids) 206 if (cpu < nr_cpu_ids)
199 return per_cpu(x86_cpu_to_apicid, cpu); 207 return per_cpu(x86_cpu_to_apicid, cpu);
208
200 return BAD_APICID; 209 return BAD_APICID;
201} 210}
202 211
203static unsigned int get_apic_id(unsigned long x) 212static unsigned int x2apic_get_apic_id(unsigned long x)
204{ 213{
205 unsigned int id; 214 unsigned int id;
206 215
@@ -222,10 +231,10 @@ static unsigned long set_apic_id(unsigned int id)
222static unsigned int uv_read_apic_id(void) 231static unsigned int uv_read_apic_id(void)
223{ 232{
224 233
225 return get_apic_id(apic_read(APIC_ID)); 234 return x2apic_get_apic_id(apic_read(APIC_ID));
226} 235}
227 236
228static unsigned int phys_pkg_id(int index_msb) 237static int uv_phys_pkg_id(int initial_apicid, int index_msb)
229{ 238{
230 return uv_read_apic_id() >> index_msb; 239 return uv_read_apic_id() >> index_msb;
231} 240}
@@ -235,26 +244,64 @@ static void uv_send_IPI_self(int vector)
235 apic_write(APIC_SELF_IPI, vector); 244 apic_write(APIC_SELF_IPI, vector);
236} 245}
237 246
238struct genapic apic_x2apic_uv_x = { 247struct apic apic_x2apic_uv_x = {
239 .name = "UV large system", 248
240 .acpi_madt_oem_check = uv_acpi_madt_oem_check, 249 .name = "UV large system",
241 .int_delivery_mode = dest_Fixed, 250 .probe = NULL,
242 .int_dest_mode = (APIC_DEST_PHYSICAL != 0), 251 .acpi_madt_oem_check = uv_acpi_madt_oem_check,
243 .target_cpus = uv_target_cpus, 252 .apic_id_registered = uv_apic_id_registered,
244 .vector_allocation_domain = uv_vector_allocation_domain, 253
245 .apic_id_registered = uv_apic_id_registered, 254 .irq_delivery_mode = dest_Fixed,
246 .init_apic_ldr = uv_init_apic_ldr, 255 .irq_dest_mode = 1, /* logical */
247 .send_IPI_all = uv_send_IPI_all, 256
248 .send_IPI_allbutself = uv_send_IPI_allbutself, 257 .target_cpus = uv_target_cpus,
249 .send_IPI_mask = uv_send_IPI_mask, 258 .disable_esr = 0,
250 .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself, 259 .dest_logical = APIC_DEST_LOGICAL,
251 .send_IPI_self = uv_send_IPI_self, 260 .check_apicid_used = NULL,
252 .cpu_mask_to_apicid = uv_cpu_mask_to_apicid, 261 .check_apicid_present = NULL,
253 .cpu_mask_to_apicid_and = uv_cpu_mask_to_apicid_and, 262
254 .phys_pkg_id = phys_pkg_id, 263 .vector_allocation_domain = uv_vector_allocation_domain,
255 .get_apic_id = get_apic_id, 264 .init_apic_ldr = uv_init_apic_ldr,
256 .set_apic_id = set_apic_id, 265
257 .apic_id_mask = (0xFFFFFFFFu), 266 .ioapic_phys_id_map = NULL,
267 .setup_apic_routing = NULL,
268 .multi_timer_check = NULL,
269 .apicid_to_node = NULL,
270 .cpu_to_logical_apicid = NULL,
271 .cpu_present_to_apicid = default_cpu_present_to_apicid,
272 .apicid_to_cpu_present = NULL,
273 .setup_portio_remap = NULL,
274 .check_phys_apicid_present = default_check_phys_apicid_present,
275 .enable_apic_mode = NULL,
276 .phys_pkg_id = uv_phys_pkg_id,
277 .mps_oem_check = NULL,
278
279 .get_apic_id = x2apic_get_apic_id,
280 .set_apic_id = set_apic_id,
281 .apic_id_mask = 0xFFFFFFFFu,
282
283 .cpu_mask_to_apicid = uv_cpu_mask_to_apicid,
284 .cpu_mask_to_apicid_and = uv_cpu_mask_to_apicid_and,
285
286 .send_IPI_mask = uv_send_IPI_mask,
287 .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself,
288 .send_IPI_allbutself = uv_send_IPI_allbutself,
289 .send_IPI_all = uv_send_IPI_all,
290 .send_IPI_self = uv_send_IPI_self,
291
292 .wakeup_secondary_cpu = uv_wakeup_secondary,
293 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
294 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
295 .wait_for_init_deassert = NULL,
296 .smp_callin_clear_local_apic = NULL,
297 .inquire_remote_apic = NULL,
298
299 .read = native_apic_msr_read,
300 .write = native_apic_msr_write,
301 .icr_read = native_x2apic_icr_read,
302 .icr_write = native_x2apic_icr_write,
303 .wait_icr_idle = native_x2apic_wait_icr_idle,
304 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
258}; 305};
259 306
260static __cpuinit void set_x2apic_extra_bits(int pnode) 307static __cpuinit void set_x2apic_extra_bits(int pnode)
@@ -322,7 +369,7 @@ static __init void map_high(char *id, unsigned long base, int shift,
322 paddr = base << shift; 369 paddr = base << shift;
323 bytes = (1UL << shift) * (max_pnode + 1); 370 bytes = (1UL << shift) * (max_pnode + 1);
324 printk(KERN_INFO "UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr, 371 printk(KERN_INFO "UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr,
325 paddr + bytes); 372 paddr + bytes);
326 if (map_type == map_uc) 373 if (map_type == map_uc)
327 init_extra_mapping_uc(paddr, bytes); 374 init_extra_mapping_uc(paddr, bytes);
328 else 375 else
@@ -485,7 +532,7 @@ late_initcall(uv_init_heartbeat);
485 532
486/* 533/*
487 * Called on each cpu to initialize the per_cpu UV data area. 534 * Called on each cpu to initialize the per_cpu UV data area.
488 * ZZZ hotplug not supported yet 535 * FIXME: hotplug not supported yet
489 */ 536 */
490void __cpuinit uv_cpu_init(void) 537void __cpuinit uv_cpu_init(void)
491{ 538{
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 266ec6c18b6c..10033fe718e0 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -301,7 +301,7 @@ extern int (*console_blank_hook)(int);
301 */ 301 */
302#define APM_ZERO_SEGS 302#define APM_ZERO_SEGS
303 303
304#include "apm.h" 304#include <asm/apm.h>
305 305
306/* 306/*
307 * Define to re-initialize the interrupt 0 timer to 100 Hz after a suspend. 307 * Define to re-initialize the interrupt 0 timer to 100 Hz after a suspend.
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
index ee4df08feee6..fbf2f33e3080 100644
--- a/arch/x86/kernel/asm-offsets_32.c
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -75,6 +75,7 @@ void foo(void)
75 OFFSET(PT_DS, pt_regs, ds); 75 OFFSET(PT_DS, pt_regs, ds);
76 OFFSET(PT_ES, pt_regs, es); 76 OFFSET(PT_ES, pt_regs, es);
77 OFFSET(PT_FS, pt_regs, fs); 77 OFFSET(PT_FS, pt_regs, fs);
78 OFFSET(PT_GS, pt_regs, gs);
78 OFFSET(PT_ORIG_EAX, pt_regs, orig_ax); 79 OFFSET(PT_ORIG_EAX, pt_regs, orig_ax);
79 OFFSET(PT_EIP, pt_regs, ip); 80 OFFSET(PT_EIP, pt_regs, ip);
80 OFFSET(PT_CS, pt_regs, cs); 81 OFFSET(PT_CS, pt_regs, cs);
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c
index 1d41d3f1edbc..8793ab33e2c1 100644
--- a/arch/x86/kernel/asm-offsets_64.c
+++ b/arch/x86/kernel/asm-offsets_64.c
@@ -11,7 +11,6 @@
11#include <linux/hardirq.h> 11#include <linux/hardirq.h>
12#include <linux/suspend.h> 12#include <linux/suspend.h>
13#include <linux/kbuild.h> 13#include <linux/kbuild.h>
14#include <asm/pda.h>
15#include <asm/processor.h> 14#include <asm/processor.h>
16#include <asm/segment.h> 15#include <asm/segment.h>
17#include <asm/thread_info.h> 16#include <asm/thread_info.h>
@@ -48,16 +47,6 @@ int main(void)
48#endif 47#endif
49 BLANK(); 48 BLANK();
50#undef ENTRY 49#undef ENTRY
51#define ENTRY(entry) DEFINE(pda_ ## entry, offsetof(struct x8664_pda, entry))
52 ENTRY(kernelstack);
53 ENTRY(oldrsp);
54 ENTRY(pcurrent);
55 ENTRY(irqcount);
56 ENTRY(cpunumber);
57 ENTRY(irqstackptr);
58 ENTRY(data_offset);
59 BLANK();
60#undef ENTRY
61#ifdef CONFIG_PARAVIRT 50#ifdef CONFIG_PARAVIRT
62 BLANK(); 51 BLANK();
63 OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled); 52 OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled);
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 2cf23634b6d9..6882a735d9c0 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -7,7 +7,7 @@
7#include <asm/pat.h> 7#include <asm/pat.h>
8#include <asm/processor.h> 8#include <asm/processor.h>
9 9
10#include <mach_apic.h> 10#include <asm/apic.h>
11 11
12struct cpuid_bit { 12struct cpuid_bit {
13 u16 feature; 13 u16 feature;
@@ -69,7 +69,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
69 */ 69 */
70void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c) 70void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
71{ 71{
72#ifdef CONFIG_X86_SMP 72#ifdef CONFIG_SMP
73 unsigned int eax, ebx, ecx, edx, sub_index; 73 unsigned int eax, ebx, ecx, edx, sub_index;
74 unsigned int ht_mask_width, core_plus_mask_width; 74 unsigned int ht_mask_width, core_plus_mask_width;
75 unsigned int core_select_mask, core_level_siblings; 75 unsigned int core_select_mask, core_level_siblings;
@@ -116,22 +116,14 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
116 116
117 core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width; 117 core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
118 118
119#ifdef CONFIG_X86_32 119 c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width)
120 c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width)
121 & core_select_mask; 120 & core_select_mask;
122 c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width); 121 c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width);
123 /* 122 /*
124 * Reinit the apicid, now that we have extended initial_apicid. 123 * Reinit the apicid, now that we have extended initial_apicid.
125 */ 124 */
126 c->apicid = phys_pkg_id(c->initial_apicid, 0); 125 c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
127#else 126
128 c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask;
129 c->phys_proc_id = phys_pkg_id(core_plus_mask_width);
130 /*
131 * Reinit the apicid, now that we have extended initial_apicid.
132 */
133 c->apicid = phys_pkg_id(0);
134#endif
135 c->x86_max_cores = (core_level_siblings / smp_num_siblings); 127 c->x86_max_cores = (core_level_siblings / smp_num_siblings);
136 128
137 129
@@ -143,37 +135,3 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
143 return; 135 return;
144#endif 136#endif
145} 137}
146
147#ifdef CONFIG_X86_PAT
148void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
149{
150 if (!cpu_has_pat)
151 pat_disable("PAT not supported by CPU.");
152
153 switch (c->x86_vendor) {
154 case X86_VENDOR_INTEL:
155 /*
156 * There is a known erratum on Pentium III and Core Solo
157 * and Core Duo CPUs.
158 * " Page with PAT set to WC while associated MTRR is UC
159 * may consolidate to UC "
160 * Because of this erratum, it is better to stick with
161 * setting WC in MTRR rather than using PAT on these CPUs.
162 *
163 * Enable PAT WC only on P4, Core 2 or later CPUs.
164 */
165 if (c->x86 > 0x6 || (c->x86 == 6 && c->x86_model >= 15))
166 return;
167
168 pat_disable("PAT WC disabled due to known CPU erratum.");
169 return;
170
171 case X86_VENDOR_AMD:
172 case X86_VENDOR_CENTAUR:
173 case X86_VENDOR_TRANSMETA:
174 return;
175 }
176
177 pat_disable("PAT disabled. Not yet verified on this CPU type.");
178}
179#endif
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 7c878f6aa919..25423a5b80ed 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -12,8 +12,6 @@
12# include <asm/cacheflush.h> 12# include <asm/cacheflush.h>
13#endif 13#endif
14 14
15#include <mach_apic.h>
16
17#include "cpu.h" 15#include "cpu.h"
18 16
19#ifdef CONFIG_X86_32 17#ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 83492b1f93b1..826d5c876278 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -21,14 +21,14 @@
21#include <asm/asm.h> 21#include <asm/asm.h>
22#include <asm/numa.h> 22#include <asm/numa.h>
23#include <asm/smp.h> 23#include <asm/smp.h>
24#ifdef CONFIG_X86_LOCAL_APIC 24#include <asm/cpu.h>
25#include <asm/mpspec.h> 25#include <asm/cpumask.h>
26#include <asm/apic.h> 26#include <asm/apic.h>
27#include <mach_apic.h> 27
28#include <asm/genapic.h> 28#ifdef CONFIG_X86_LOCAL_APIC
29#include <asm/uv/uv.h>
29#endif 30#endif
30 31
31#include <asm/pda.h>
32#include <asm/pgtable.h> 32#include <asm/pgtable.h>
33#include <asm/processor.h> 33#include <asm/processor.h>
34#include <asm/desc.h> 34#include <asm/desc.h>
@@ -37,6 +37,7 @@
37#include <asm/sections.h> 37#include <asm/sections.h>
38#include <asm/setup.h> 38#include <asm/setup.h>
39#include <asm/hypervisor.h> 39#include <asm/hypervisor.h>
40#include <asm/stackprotector.h>
40 41
41#include "cpu.h" 42#include "cpu.h"
42 43
@@ -50,6 +51,15 @@ cpumask_var_t cpu_initialized_mask;
50/* representing cpus for which sibling maps can be computed */ 51/* representing cpus for which sibling maps can be computed */
51cpumask_var_t cpu_sibling_setup_mask; 52cpumask_var_t cpu_sibling_setup_mask;
52 53
54/* correctly size the local cpu masks */
55void __init setup_cpu_local_masks(void)
56{
57 alloc_bootmem_cpumask_var(&cpu_initialized_mask);
58 alloc_bootmem_cpumask_var(&cpu_callin_mask);
59 alloc_bootmem_cpumask_var(&cpu_callout_mask);
60 alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask);
61}
62
53#else /* CONFIG_X86_32 */ 63#else /* CONFIG_X86_32 */
54 64
55cpumask_t cpu_callin_map; 65cpumask_t cpu_callin_map;
@@ -62,23 +72,23 @@ cpumask_t cpu_sibling_setup_map;
62 72
63static struct cpu_dev *this_cpu __cpuinitdata; 73static struct cpu_dev *this_cpu __cpuinitdata;
64 74
75DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
65#ifdef CONFIG_X86_64 76#ifdef CONFIG_X86_64
66/* We need valid kernel segments for data and code in long mode too 77 /*
67 * IRET will check the segment types kkeil 2000/10/28 78 * We need valid kernel segments for data and code in long mode too
68 * Also sysret mandates a special GDT layout 79 * IRET will check the segment types kkeil 2000/10/28
69 */ 80 * Also sysret mandates a special GDT layout
70/* The TLS descriptors are currently at a different place compared to i386. 81 *
71 Hopefully nobody expects them at a fixed place (Wine?) */ 82 * The TLS descriptors are currently at a different place compared to i386.
72DEFINE_PER_CPU(struct gdt_page, gdt_page) = { .gdt = { 83 * Hopefully nobody expects them at a fixed place (Wine?)
84 */
73 [GDT_ENTRY_KERNEL32_CS] = { { { 0x0000ffff, 0x00cf9b00 } } }, 85 [GDT_ENTRY_KERNEL32_CS] = { { { 0x0000ffff, 0x00cf9b00 } } },
74 [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00af9b00 } } }, 86 [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00af9b00 } } },
75 [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9300 } } }, 87 [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9300 } } },
76 [GDT_ENTRY_DEFAULT_USER32_CS] = { { { 0x0000ffff, 0x00cffb00 } } }, 88 [GDT_ENTRY_DEFAULT_USER32_CS] = { { { 0x0000ffff, 0x00cffb00 } } },
77 [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff300 } } }, 89 [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff300 } } },
78 [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00affb00 } } }, 90 [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00affb00 } } },
79} };
80#else 91#else
81DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
82 [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00cf9a00 } } }, 92 [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00cf9a00 } } },
83 [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9200 } } }, 93 [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9200 } } },
84 [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00cffa00 } } }, 94 [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00cffa00 } } },
@@ -110,9 +120,10 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
110 [GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } }, 120 [GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } },
111 121
112 [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } }, 122 [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } },
113 [GDT_ENTRY_PERCPU] = { { { 0x00000000, 0x00000000 } } }, 123 [GDT_ENTRY_PERCPU] = { { { 0x0000ffff, 0x00cf9200 } } },
114} }; 124 GDT_STACK_CANARY_INIT
115#endif 125#endif
126} };
116EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); 127EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);
117 128
118#ifdef CONFIG_X86_32 129#ifdef CONFIG_X86_32
@@ -213,6 +224,49 @@ static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
213#endif 224#endif
214 225
215/* 226/*
227 * Some CPU features depend on higher CPUID levels, which may not always
228 * be available due to CPUID level capping or broken virtualization
229 * software. Add those features to this table to auto-disable them.
230 */
231struct cpuid_dependent_feature {
232 u32 feature;
233 u32 level;
234};
235static const struct cpuid_dependent_feature __cpuinitconst
236cpuid_dependent_features[] = {
237 { X86_FEATURE_MWAIT, 0x00000005 },
238 { X86_FEATURE_DCA, 0x00000009 },
239 { X86_FEATURE_XSAVE, 0x0000000d },
240 { 0, 0 }
241};
242
243static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
244{
245 const struct cpuid_dependent_feature *df;
246 for (df = cpuid_dependent_features; df->feature; df++) {
247 /*
248 * Note: cpuid_level is set to -1 if unavailable, but
249 * extended_extended_level is set to 0 if unavailable
250 * and the legitimate extended levels are all negative
251 * when signed; hence the weird messing around with
252 * signs here...
253 */
254 if (cpu_has(c, df->feature) &&
255 ((s32)df->level < 0 ?
256 (u32)df->level > (u32)c->extended_cpuid_level :
257 (s32)df->level > (s32)c->cpuid_level)) {
258 clear_cpu_cap(c, df->feature);
259 if (warn)
260 printk(KERN_WARNING
261 "CPU: CPU feature %s disabled "
262 "due to lack of CPUID level 0x%x\n",
263 x86_cap_flags[df->feature],
264 df->level);
265 }
266 }
267}
268
269/*
216 * Naming convention should be: <Name> [(<Codename>)] 270 * Naming convention should be: <Name> [(<Codename>)]
217 * This table only is used unless init_<vendor>() below doesn't set it; 271 * This table only is used unless init_<vendor>() below doesn't set it;
218 * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used 272 * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used
@@ -242,18 +296,29 @@ static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c)
242 296
243__u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata; 297__u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata;
244 298
299void load_percpu_segment(int cpu)
300{
301#ifdef CONFIG_X86_32
302 loadsegment(fs, __KERNEL_PERCPU);
303#else
304 loadsegment(gs, 0);
305 wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu));
306#endif
307 load_stack_canary_segment();
308}
309
245/* Current gdt points %fs at the "master" per-cpu area: after this, 310/* Current gdt points %fs at the "master" per-cpu area: after this,
246 * it's on the real one. */ 311 * it's on the real one. */
247void switch_to_new_gdt(void) 312void switch_to_new_gdt(int cpu)
248{ 313{
249 struct desc_ptr gdt_descr; 314 struct desc_ptr gdt_descr;
250 315
251 gdt_descr.address = (long)get_cpu_gdt_table(smp_processor_id()); 316 gdt_descr.address = (long)get_cpu_gdt_table(cpu);
252 gdt_descr.size = GDT_SIZE - 1; 317 gdt_descr.size = GDT_SIZE - 1;
253 load_gdt(&gdt_descr); 318 load_gdt(&gdt_descr);
254#ifdef CONFIG_X86_32 319 /* Reload the per-cpu base */
255 asm("mov %0, %%fs" : : "r" (__KERNEL_PERCPU) : "memory"); 320
256#endif 321 load_percpu_segment(cpu);
257} 322}
258 323
259static struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {}; 324static struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {};
@@ -383,11 +448,7 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
383 } 448 }
384 449
385 index_msb = get_count_order(smp_num_siblings); 450 index_msb = get_count_order(smp_num_siblings);
386#ifdef CONFIG_X86_64 451 c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb);
387 c->phys_proc_id = phys_pkg_id(index_msb);
388#else
389 c->phys_proc_id = phys_pkg_id(c->initial_apicid, index_msb);
390#endif
391 452
392 smp_num_siblings = smp_num_siblings / c->x86_max_cores; 453 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
393 454
@@ -395,13 +456,8 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
395 456
396 core_bits = get_count_order(c->x86_max_cores); 457 core_bits = get_count_order(c->x86_max_cores);
397 458
398#ifdef CONFIG_X86_64 459 c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) &
399 c->cpu_core_id = phys_pkg_id(index_msb) &
400 ((1 << core_bits) - 1); 460 ((1 << core_bits) - 1);
401#else
402 c->cpu_core_id = phys_pkg_id(c->initial_apicid, index_msb) &
403 ((1 << core_bits) - 1);
404#endif
405 } 461 }
406 462
407out: 463out:
@@ -570,11 +626,10 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
570 if (this_cpu->c_early_init) 626 if (this_cpu->c_early_init)
571 this_cpu->c_early_init(c); 627 this_cpu->c_early_init(c);
572 628
573 validate_pat_support(c);
574
575#ifdef CONFIG_SMP 629#ifdef CONFIG_SMP
576 c->cpu_index = boot_cpu_id; 630 c->cpu_index = boot_cpu_id;
577#endif 631#endif
632 filter_cpuid_features(c, false);
578} 633}
579 634
580void __init early_cpu_init(void) 635void __init early_cpu_init(void)
@@ -637,7 +692,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
637 c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF; 692 c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF;
638#ifdef CONFIG_X86_32 693#ifdef CONFIG_X86_32
639# ifdef CONFIG_X86_HT 694# ifdef CONFIG_X86_HT
640 c->apicid = phys_pkg_id(c->initial_apicid, 0); 695 c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
641# else 696# else
642 c->apicid = c->initial_apicid; 697 c->apicid = c->initial_apicid;
643# endif 698# endif
@@ -684,7 +739,7 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
684 this_cpu->c_identify(c); 739 this_cpu->c_identify(c);
685 740
686#ifdef CONFIG_X86_64 741#ifdef CONFIG_X86_64
687 c->apicid = phys_pkg_id(0); 742 c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
688#endif 743#endif
689 744
690 /* 745 /*
@@ -708,6 +763,9 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
708 * we do "generic changes." 763 * we do "generic changes."
709 */ 764 */
710 765
766 /* Filter out anything that depends on CPUID levels we don't have */
767 filter_cpuid_features(c, true);
768
711 /* If the model name is still unset, do table lookup. */ 769 /* If the model name is still unset, do table lookup. */
712 if (!c->x86_model_id[0]) { 770 if (!c->x86_model_id[0]) {
713 char *p; 771 char *p;
@@ -877,54 +935,22 @@ static __init int setup_disablecpuid(char *arg)
877__setup("clearcpuid=", setup_disablecpuid); 935__setup("clearcpuid=", setup_disablecpuid);
878 936
879#ifdef CONFIG_X86_64 937#ifdef CONFIG_X86_64
880struct x8664_pda **_cpu_pda __read_mostly;
881EXPORT_SYMBOL(_cpu_pda);
882
883struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table }; 938struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
884 939
885static char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss; 940DEFINE_PER_CPU_FIRST(union irq_stack_union,
941 irq_stack_union) __aligned(PAGE_SIZE);
942DEFINE_PER_CPU(char *, irq_stack_ptr) =
943 init_per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64;
886 944
887void __cpuinit pda_init(int cpu) 945DEFINE_PER_CPU(unsigned long, kernel_stack) =
888{ 946 (unsigned long)&init_thread_union - KERNEL_STACK_OFFSET + THREAD_SIZE;
889 struct x8664_pda *pda = cpu_pda(cpu); 947EXPORT_PER_CPU_SYMBOL(kernel_stack);
890 948
891 /* Setup up data that may be needed in __get_free_pages early */ 949DEFINE_PER_CPU(unsigned int, irq_count) = -1;
892 loadsegment(fs, 0);
893 loadsegment(gs, 0);
894 /* Memory clobbers used to order PDA accessed */
895 mb();
896 wrmsrl(MSR_GS_BASE, pda);
897 mb();
898
899 pda->cpunumber = cpu;
900 pda->irqcount = -1;
901 pda->kernelstack = (unsigned long)stack_thread_info() -
902 PDA_STACKOFFSET + THREAD_SIZE;
903 pda->active_mm = &init_mm;
904 pda->mmu_state = 0;
905
906 if (cpu == 0) {
907 /* others are initialized in smpboot.c */
908 pda->pcurrent = &init_task;
909 pda->irqstackptr = boot_cpu_stack;
910 pda->irqstackptr += IRQSTACKSIZE - 64;
911 } else {
912 if (!pda->irqstackptr) {
913 pda->irqstackptr = (char *)
914 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
915 if (!pda->irqstackptr)
916 panic("cannot allocate irqstack for cpu %d",
917 cpu);
918 pda->irqstackptr += IRQSTACKSIZE - 64;
919 }
920 950
921 if (pda->nodenumber == 0 && cpu_to_node(cpu) != NUMA_NO_NODE) 951static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks
922 pda->nodenumber = cpu_to_node(cpu); 952 [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ])
923 } 953 __aligned(PAGE_SIZE);
924}
925
926static char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
927 DEBUG_STKSZ] __page_aligned_bss;
928 954
929extern asmlinkage void ignore_sysret(void); 955extern asmlinkage void ignore_sysret(void);
930 956
@@ -957,16 +983,21 @@ unsigned long kernel_eflags;
957 */ 983 */
958DEFINE_PER_CPU(struct orig_ist, orig_ist); 984DEFINE_PER_CPU(struct orig_ist, orig_ist);
959 985
960#else 986#else /* x86_64 */
961 987
962/* Make sure %fs is initialized properly in idle threads */ 988#ifdef CONFIG_CC_STACKPROTECTOR
989DEFINE_PER_CPU(unsigned long, stack_canary);
990#endif
991
992/* Make sure %fs and %gs are initialized properly in idle threads */
963struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs) 993struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)
964{ 994{
965 memset(regs, 0, sizeof(struct pt_regs)); 995 memset(regs, 0, sizeof(struct pt_regs));
966 regs->fs = __KERNEL_PERCPU; 996 regs->fs = __KERNEL_PERCPU;
997 regs->gs = __KERNEL_STACK_CANARY;
967 return regs; 998 return regs;
968} 999}
969#endif 1000#endif /* x86_64 */
970 1001
971/* 1002/*
972 * cpu_init() initializes state that is per-CPU. Some data is already 1003 * cpu_init() initializes state that is per-CPU. Some data is already
@@ -982,15 +1013,14 @@ void __cpuinit cpu_init(void)
982 struct tss_struct *t = &per_cpu(init_tss, cpu); 1013 struct tss_struct *t = &per_cpu(init_tss, cpu);
983 struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu); 1014 struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
984 unsigned long v; 1015 unsigned long v;
985 char *estacks = NULL;
986 struct task_struct *me; 1016 struct task_struct *me;
987 int i; 1017 int i;
988 1018
989 /* CPU 0 is initialised in head64.c */ 1019#ifdef CONFIG_NUMA
990 if (cpu != 0) 1020 if (cpu != 0 && percpu_read(node_number) == 0 &&
991 pda_init(cpu); 1021 cpu_to_node(cpu) != NUMA_NO_NODE)
992 else 1022 percpu_write(node_number, cpu_to_node(cpu));
993 estacks = boot_exception_stacks; 1023#endif
994 1024
995 me = current; 1025 me = current;
996 1026
@@ -1006,7 +1036,9 @@ void __cpuinit cpu_init(void)
1006 * and set up the GDT descriptor: 1036 * and set up the GDT descriptor:
1007 */ 1037 */
1008 1038
1009 switch_to_new_gdt(); 1039 switch_to_new_gdt(cpu);
1040 loadsegment(fs, 0);
1041
1010 load_idt((const struct desc_ptr *)&idt_descr); 1042 load_idt((const struct desc_ptr *)&idt_descr);
1011 1043
1012 memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8); 1044 memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
@@ -1017,25 +1049,20 @@ void __cpuinit cpu_init(void)
1017 barrier(); 1049 barrier();
1018 1050
1019 check_efer(); 1051 check_efer();
1020 if (cpu != 0 && x2apic) 1052 if (cpu != 0)
1021 enable_x2apic(); 1053 enable_x2apic();
1022 1054
1023 /* 1055 /*
1024 * set up and load the per-CPU TSS 1056 * set up and load the per-CPU TSS
1025 */ 1057 */
1026 if (!orig_ist->ist[0]) { 1058 if (!orig_ist->ist[0]) {
1027 static const unsigned int order[N_EXCEPTION_STACKS] = { 1059 static const unsigned int sizes[N_EXCEPTION_STACKS] = {
1028 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER, 1060 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STKSZ,
1029 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER 1061 [DEBUG_STACK - 1] = DEBUG_STKSZ
1030 }; 1062 };
1063 char *estacks = per_cpu(exception_stacks, cpu);
1031 for (v = 0; v < N_EXCEPTION_STACKS; v++) { 1064 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
1032 if (cpu) { 1065 estacks += sizes[v];
1033 estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
1034 if (!estacks)
1035 panic("Cannot allocate exception "
1036 "stack %ld %d\n", v, cpu);
1037 }
1038 estacks += PAGE_SIZE << order[v];
1039 orig_ist->ist[v] = t->x86_tss.ist[v] = 1066 orig_ist->ist[v] = t->x86_tss.ist[v] =
1040 (unsigned long)estacks; 1067 (unsigned long)estacks;
1041 } 1068 }
@@ -1069,22 +1096,19 @@ void __cpuinit cpu_init(void)
1069 */ 1096 */
1070 if (kgdb_connected && arch_kgdb_ops.correct_hw_break) 1097 if (kgdb_connected && arch_kgdb_ops.correct_hw_break)
1071 arch_kgdb_ops.correct_hw_break(); 1098 arch_kgdb_ops.correct_hw_break();
1072 else { 1099 else
1073#endif 1100#endif
1074 /* 1101 {
1075 * Clear all 6 debug registers: 1102 /*
1076 */ 1103 * Clear all 6 debug registers:
1077 1104 */
1078 set_debugreg(0UL, 0); 1105 set_debugreg(0UL, 0);
1079 set_debugreg(0UL, 1); 1106 set_debugreg(0UL, 1);
1080 set_debugreg(0UL, 2); 1107 set_debugreg(0UL, 2);
1081 set_debugreg(0UL, 3); 1108 set_debugreg(0UL, 3);
1082 set_debugreg(0UL, 6); 1109 set_debugreg(0UL, 6);
1083 set_debugreg(0UL, 7); 1110 set_debugreg(0UL, 7);
1084#ifdef CONFIG_KGDB
1085 /* If the kgdb is connected no debug regs should be altered. */
1086 } 1111 }
1087#endif
1088 1112
1089 fpu_init(); 1113 fpu_init();
1090 1114
@@ -1114,7 +1138,7 @@ void __cpuinit cpu_init(void)
1114 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE); 1138 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
1115 1139
1116 load_idt(&idt_descr); 1140 load_idt(&idt_descr);
1117 switch_to_new_gdt(); 1141 switch_to_new_gdt(cpu);
1118 1142
1119 /* 1143 /*
1120 * Set up and load the per-CPU TSS and LDT 1144 * Set up and load the per-CPU TSS and LDT
@@ -1135,9 +1159,6 @@ void __cpuinit cpu_init(void)
1135 __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); 1159 __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss);
1136#endif 1160#endif
1137 1161
1138 /* Clear %gs. */
1139 asm volatile ("mov %0, %%gs" : : "r" (0));
1140
1141 /* Clear all 6 debug registers: */ 1162 /* Clear all 6 debug registers: */
1142 set_debugreg(0, 0); 1163 set_debugreg(0, 0);
1143 set_debugreg(0, 1); 1164 set_debugreg(0, 1);
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 3babe1f1e912..23da96e57b17 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -601,7 +601,7 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
601 if (!data) 601 if (!data)
602 return -ENOMEM; 602 return -ENOMEM;
603 603
604 data->acpi_data = percpu_ptr(acpi_perf_data, cpu); 604 data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
605 per_cpu(drv_data, cpu) = data; 605 per_cpu(drv_data, cpu) = data;
606 606
607 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) 607 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
diff --git a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
index 3f83ea12c47a..35a257dd4bb7 100644
--- a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
+++ b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
@@ -204,12 +204,12 @@ static int eps_cpu_init(struct cpufreq_policy *policy)
204 } 204 }
205 /* Enable Enhanced PowerSaver */ 205 /* Enable Enhanced PowerSaver */
206 rdmsrl(MSR_IA32_MISC_ENABLE, val); 206 rdmsrl(MSR_IA32_MISC_ENABLE, val);
207 if (!(val & 1 << 16)) { 207 if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
208 val |= 1 << 16; 208 val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
209 wrmsrl(MSR_IA32_MISC_ENABLE, val); 209 wrmsrl(MSR_IA32_MISC_ENABLE, val);
210 /* Can be locked at 0 */ 210 /* Can be locked at 0 */
211 rdmsrl(MSR_IA32_MISC_ENABLE, val); 211 rdmsrl(MSR_IA32_MISC_ENABLE, val);
212 if (!(val & 1 << 16)) { 212 if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
213 printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n"); 213 printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n");
214 return -ENODEV; 214 return -ENODEV;
215 } 215 }
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
index f08998278a3a..c9f1fdc02830 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -390,14 +390,14 @@ static int centrino_cpu_init(struct cpufreq_policy *policy)
390 enable it if not. */ 390 enable it if not. */
391 rdmsr(MSR_IA32_MISC_ENABLE, l, h); 391 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
392 392
393 if (!(l & (1<<16))) { 393 if (!(l & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
394 l |= (1<<16); 394 l |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
395 dprintk("trying to enable Enhanced SpeedStep (%x)\n", l); 395 dprintk("trying to enable Enhanced SpeedStep (%x)\n", l);
396 wrmsr(MSR_IA32_MISC_ENABLE, l, h); 396 wrmsr(MSR_IA32_MISC_ENABLE, l, h);
397 397
398 /* check to see if it stuck */ 398 /* check to see if it stuck */
399 rdmsr(MSR_IA32_MISC_ENABLE, l, h); 399 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
400 if (!(l & (1<<16))) { 400 if (!(l & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
401 printk(KERN_INFO PFX 401 printk(KERN_INFO PFX
402 "couldn't enable Enhanced SpeedStep\n"); 402 "couldn't enable Enhanced SpeedStep\n");
403 return -ENODEV; 403 return -ENODEV;
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 5fff00c70de0..1a89a2b68d15 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -25,7 +25,6 @@
25#ifdef CONFIG_X86_LOCAL_APIC 25#ifdef CONFIG_X86_LOCAL_APIC
26#include <asm/mpspec.h> 26#include <asm/mpspec.h>
27#include <asm/apic.h> 27#include <asm/apic.h>
28#include <mach_apic.h>
29#endif 28#endif
30 29
31static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) 30static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
@@ -69,6 +68,18 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
69 sched_clock_stable = 1; 68 sched_clock_stable = 1;
70 } 69 }
71 70
71 /*
72 * There is a known erratum on Pentium III and Core Solo
73 * and Core Duo CPUs.
74 * " Page with PAT set to WC while associated MTRR is UC
75 * may consolidate to UC "
76 * Because of this erratum, it is better to stick with
77 * setting WC in MTRR rather than using PAT on these CPUs.
78 *
79 * Enable PAT WC only on P4, Core 2 or later CPUs.
80 */
81 if (c->x86 == 6 && c->x86_model < 15)
82 clear_cpu_cap(c, X86_FEATURE_PAT);
72} 83}
73 84
74#ifdef CONFIG_X86_32 85#ifdef CONFIG_X86_32
@@ -141,10 +152,10 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
141 */ 152 */
142 if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) { 153 if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) {
143 rdmsr(MSR_IA32_MISC_ENABLE, lo, hi); 154 rdmsr(MSR_IA32_MISC_ENABLE, lo, hi);
144 if ((lo & (1<<9)) == 0) { 155 if ((lo & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE) == 0) {
145 printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n"); 156 printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n");
146 printk (KERN_INFO "CPU: Disabling hardware prefetching (Errata 037)\n"); 157 printk (KERN_INFO "CPU: Disabling hardware prefetching (Errata 037)\n");
147 lo |= (1<<9); /* Disable hw prefetching */ 158 lo |= MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE;
148 wrmsr (MSR_IA32_MISC_ENABLE, lo, hi); 159 wrmsr (MSR_IA32_MISC_ENABLE, lo, hi);
149 } 160 }
150 } 161 }
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index da299eb85fc0..7293508d8f5c 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -147,7 +147,16 @@ struct _cpuid4_info {
147 union _cpuid4_leaf_ecx ecx; 147 union _cpuid4_leaf_ecx ecx;
148 unsigned long size; 148 unsigned long size;
149 unsigned long can_disable; 149 unsigned long can_disable;
150 cpumask_t shared_cpu_map; /* future?: only cpus/node is needed */ 150 DECLARE_BITMAP(shared_cpu_map, NR_CPUS);
151};
152
153/* subset of above _cpuid4_info w/o shared_cpu_map */
154struct _cpuid4_info_regs {
155 union _cpuid4_leaf_eax eax;
156 union _cpuid4_leaf_ebx ebx;
157 union _cpuid4_leaf_ecx ecx;
158 unsigned long size;
159 unsigned long can_disable;
151}; 160};
152 161
153#ifdef CONFIG_PCI 162#ifdef CONFIG_PCI
@@ -278,7 +287,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
278} 287}
279 288
280static void __cpuinit 289static void __cpuinit
281amd_check_l3_disable(int index, struct _cpuid4_info *this_leaf) 290amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
282{ 291{
283 if (index < 3) 292 if (index < 3)
284 return; 293 return;
@@ -286,7 +295,8 @@ amd_check_l3_disable(int index, struct _cpuid4_info *this_leaf)
286} 295}
287 296
288static int 297static int
289__cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf) 298__cpuinit cpuid4_cache_lookup_regs(int index,
299 struct _cpuid4_info_regs *this_leaf)
290{ 300{
291 union _cpuid4_leaf_eax eax; 301 union _cpuid4_leaf_eax eax;
292 union _cpuid4_leaf_ebx ebx; 302 union _cpuid4_leaf_ebx ebx;
@@ -314,6 +324,15 @@ __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
314 return 0; 324 return 0;
315} 325}
316 326
327static int
328__cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
329{
330 struct _cpuid4_info_regs *leaf_regs =
331 (struct _cpuid4_info_regs *)this_leaf;
332
333 return cpuid4_cache_lookup_regs(index, leaf_regs);
334}
335
317static int __cpuinit find_num_cache_leaves(void) 336static int __cpuinit find_num_cache_leaves(void)
318{ 337{
319 unsigned int eax, ebx, ecx, edx; 338 unsigned int eax, ebx, ecx, edx;
@@ -353,11 +372,10 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
353 * parameters cpuid leaf to find the cache details 372 * parameters cpuid leaf to find the cache details
354 */ 373 */
355 for (i = 0; i < num_cache_leaves; i++) { 374 for (i = 0; i < num_cache_leaves; i++) {
356 struct _cpuid4_info this_leaf; 375 struct _cpuid4_info_regs this_leaf;
357
358 int retval; 376 int retval;
359 377
360 retval = cpuid4_cache_lookup(i, &this_leaf); 378 retval = cpuid4_cache_lookup_regs(i, &this_leaf);
361 if (retval >= 0) { 379 if (retval >= 0) {
362 switch(this_leaf.eax.split.level) { 380 switch(this_leaf.eax.split.level) {
363 case 1: 381 case 1:
@@ -506,17 +524,20 @@ static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
506 num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing; 524 num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing;
507 525
508 if (num_threads_sharing == 1) 526 if (num_threads_sharing == 1)
509 cpu_set(cpu, this_leaf->shared_cpu_map); 527 cpumask_set_cpu(cpu, to_cpumask(this_leaf->shared_cpu_map));
510 else { 528 else {
511 index_msb = get_count_order(num_threads_sharing); 529 index_msb = get_count_order(num_threads_sharing);
512 530
513 for_each_online_cpu(i) { 531 for_each_online_cpu(i) {
514 if (cpu_data(i).apicid >> index_msb == 532 if (cpu_data(i).apicid >> index_msb ==
515 c->apicid >> index_msb) { 533 c->apicid >> index_msb) {
516 cpu_set(i, this_leaf->shared_cpu_map); 534 cpumask_set_cpu(i,
535 to_cpumask(this_leaf->shared_cpu_map));
517 if (i != cpu && per_cpu(cpuid4_info, i)) { 536 if (i != cpu && per_cpu(cpuid4_info, i)) {
518 sibling_leaf = CPUID4_INFO_IDX(i, index); 537 sibling_leaf =
519 cpu_set(cpu, sibling_leaf->shared_cpu_map); 538 CPUID4_INFO_IDX(i, index);
539 cpumask_set_cpu(cpu, to_cpumask(
540 sibling_leaf->shared_cpu_map));
520 } 541 }
521 } 542 }
522 } 543 }
@@ -528,9 +549,10 @@ static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
528 int sibling; 549 int sibling;
529 550
530 this_leaf = CPUID4_INFO_IDX(cpu, index); 551 this_leaf = CPUID4_INFO_IDX(cpu, index);
531 for_each_cpu_mask_nr(sibling, this_leaf->shared_cpu_map) { 552 for_each_cpu(sibling, to_cpumask(this_leaf->shared_cpu_map)) {
532 sibling_leaf = CPUID4_INFO_IDX(sibling, index); 553 sibling_leaf = CPUID4_INFO_IDX(sibling, index);
533 cpu_clear(cpu, sibling_leaf->shared_cpu_map); 554 cpumask_clear_cpu(cpu,
555 to_cpumask(sibling_leaf->shared_cpu_map));
534 } 556 }
535} 557}
536#else 558#else
@@ -635,8 +657,9 @@ static ssize_t show_shared_cpu_map_func(struct _cpuid4_info *this_leaf,
635 int n = 0; 657 int n = 0;
636 658
637 if (len > 1) { 659 if (len > 1) {
638 cpumask_t *mask = &this_leaf->shared_cpu_map; 660 const struct cpumask *mask;
639 661
662 mask = to_cpumask(this_leaf->shared_cpu_map);
640 n = type? 663 n = type?
641 cpulist_scnprintf(buf, len-2, mask) : 664 cpulist_scnprintf(buf, len-2, mask) :
642 cpumask_scnprintf(buf, len-2, mask); 665 cpumask_scnprintf(buf, len-2, mask);
@@ -699,7 +722,8 @@ static struct pci_dev *get_k8_northbridge(int node)
699 722
700static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf) 723static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf)
701{ 724{
702 int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map)); 725 const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map);
726 int node = cpu_to_node(cpumask_first(mask));
703 struct pci_dev *dev = NULL; 727 struct pci_dev *dev = NULL;
704 ssize_t ret = 0; 728 ssize_t ret = 0;
705 int i; 729 int i;
@@ -733,7 +757,8 @@ static ssize_t
733store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf, 757store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf,
734 size_t count) 758 size_t count)
735{ 759{
736 int node = cpu_to_node(first_cpu(this_leaf->shared_cpu_map)); 760 const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map);
761 int node = cpu_to_node(cpumask_first(mask));
737 struct pci_dev *dev = NULL; 762 struct pci_dev *dev = NULL;
738 unsigned int ret, index, val; 763 unsigned int ret, index, val;
739 764
@@ -878,7 +903,7 @@ err_out:
878 return -ENOMEM; 903 return -ENOMEM;
879} 904}
880 905
881static cpumask_t cache_dev_map = CPU_MASK_NONE; 906static DECLARE_BITMAP(cache_dev_map, NR_CPUS);
882 907
883/* Add/Remove cache interface for CPU device */ 908/* Add/Remove cache interface for CPU device */
884static int __cpuinit cache_add_dev(struct sys_device * sys_dev) 909static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
@@ -918,7 +943,7 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
918 } 943 }
919 kobject_uevent(&(this_object->kobj), KOBJ_ADD); 944 kobject_uevent(&(this_object->kobj), KOBJ_ADD);
920 } 945 }
921 cpu_set(cpu, cache_dev_map); 946 cpumask_set_cpu(cpu, to_cpumask(cache_dev_map));
922 947
923 kobject_uevent(per_cpu(cache_kobject, cpu), KOBJ_ADD); 948 kobject_uevent(per_cpu(cache_kobject, cpu), KOBJ_ADD);
924 return 0; 949 return 0;
@@ -931,9 +956,9 @@ static void __cpuinit cache_remove_dev(struct sys_device * sys_dev)
931 956
932 if (per_cpu(cpuid4_info, cpu) == NULL) 957 if (per_cpu(cpuid4_info, cpu) == NULL)
933 return; 958 return;
934 if (!cpu_isset(cpu, cache_dev_map)) 959 if (!cpumask_test_cpu(cpu, to_cpumask(cache_dev_map)))
935 return; 960 return;
936 cpu_clear(cpu, cache_dev_map); 961 cpumask_clear_cpu(cpu, to_cpumask(cache_dev_map));
937 962
938 for (i = 0; i < num_cache_leaves; i++) 963 for (i = 0; i < num_cache_leaves; i++)
939 kobject_put(&(INDEX_KOBJECT_PTR(cpu,i)->kobj)); 964 kobject_put(&(INDEX_KOBJECT_PTR(cpu,i)->kobj));
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
index f2ee0ae29bd6..9817506dd469 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
@@ -67,7 +67,7 @@ static struct threshold_block threshold_defaults = {
67struct threshold_bank { 67struct threshold_bank {
68 struct kobject *kobj; 68 struct kobject *kobj;
69 struct threshold_block *blocks; 69 struct threshold_block *blocks;
70 cpumask_t cpus; 70 cpumask_var_t cpus;
71}; 71};
72static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]); 72static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
73 73
@@ -481,7 +481,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
481 481
482#ifdef CONFIG_SMP 482#ifdef CONFIG_SMP
483 if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */ 483 if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */
484 i = first_cpu(per_cpu(cpu_core_map, cpu)); 484 i = cpumask_first(&per_cpu(cpu_core_map, cpu));
485 485
486 /* first core not up yet */ 486 /* first core not up yet */
487 if (cpu_data(i).cpu_core_id) 487 if (cpu_data(i).cpu_core_id)
@@ -501,7 +501,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
501 if (err) 501 if (err)
502 goto out; 502 goto out;
503 503
504 b->cpus = per_cpu(cpu_core_map, cpu); 504 cpumask_copy(b->cpus, &per_cpu(cpu_core_map, cpu));
505 per_cpu(threshold_banks, cpu)[bank] = b; 505 per_cpu(threshold_banks, cpu)[bank] = b;
506 goto out; 506 goto out;
507 } 507 }
@@ -512,15 +512,20 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
512 err = -ENOMEM; 512 err = -ENOMEM;
513 goto out; 513 goto out;
514 } 514 }
515 if (!alloc_cpumask_var(&b->cpus, GFP_KERNEL)) {
516 kfree(b);
517 err = -ENOMEM;
518 goto out;
519 }
515 520
516 b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj); 521 b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
517 if (!b->kobj) 522 if (!b->kobj)
518 goto out_free; 523 goto out_free;
519 524
520#ifndef CONFIG_SMP 525#ifndef CONFIG_SMP
521 b->cpus = CPU_MASK_ALL; 526 cpumask_setall(b->cpus);
522#else 527#else
523 b->cpus = per_cpu(cpu_core_map, cpu); 528 cpumask_copy(b->cpus, &per_cpu(cpu_core_map, cpu));
524#endif 529#endif
525 530
526 per_cpu(threshold_banks, cpu)[bank] = b; 531 per_cpu(threshold_banks, cpu)[bank] = b;
@@ -529,7 +534,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
529 if (err) 534 if (err)
530 goto out_free; 535 goto out_free;
531 536
532 for_each_cpu_mask_nr(i, b->cpus) { 537 for_each_cpu(i, b->cpus) {
533 if (i == cpu) 538 if (i == cpu)
534 continue; 539 continue;
535 540
@@ -545,6 +550,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
545 550
546out_free: 551out_free:
547 per_cpu(threshold_banks, cpu)[bank] = NULL; 552 per_cpu(threshold_banks, cpu)[bank] = NULL;
553 free_cpumask_var(b->cpus);
548 kfree(b); 554 kfree(b);
549out: 555out:
550 return err; 556 return err;
@@ -619,7 +625,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
619#endif 625#endif
620 626
621 /* remove all sibling symlinks before unregistering */ 627 /* remove all sibling symlinks before unregistering */
622 for_each_cpu_mask_nr(i, b->cpus) { 628 for_each_cpu(i, b->cpus) {
623 if (i == cpu) 629 if (i == cpu)
624 continue; 630 continue;
625 631
@@ -632,6 +638,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
632free_out: 638free_out:
633 kobject_del(b->kobj); 639 kobject_del(b->kobj);
634 kobject_put(b->kobj); 640 kobject_put(b->kobj);
641 free_cpumask_var(b->cpus);
635 kfree(b); 642 kfree(b);
636 per_cpu(threshold_banks, cpu)[bank] = NULL; 643 per_cpu(threshold_banks, cpu)[bank] = NULL;
637} 644}
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index f44c36624360..aa5e287c98e0 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -7,6 +7,7 @@
7#include <linux/interrupt.h> 7#include <linux/interrupt.h>
8#include <linux/percpu.h> 8#include <linux/percpu.h>
9#include <asm/processor.h> 9#include <asm/processor.h>
10#include <asm/apic.h>
10#include <asm/msr.h> 11#include <asm/msr.h>
11#include <asm/mce.h> 12#include <asm/mce.h>
12#include <asm/hw_irq.h> 13#include <asm/hw_irq.h>
@@ -48,13 +49,13 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
48 */ 49 */
49 rdmsr(MSR_IA32_MISC_ENABLE, l, h); 50 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
50 h = apic_read(APIC_LVTTHMR); 51 h = apic_read(APIC_LVTTHMR);
51 if ((l & (1 << 3)) && (h & APIC_DM_SMI)) { 52 if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
52 printk(KERN_DEBUG 53 printk(KERN_DEBUG
53 "CPU%d: Thermal monitoring handled by SMI\n", cpu); 54 "CPU%d: Thermal monitoring handled by SMI\n", cpu);
54 return; 55 return;
55 } 56 }
56 57
57 if (cpu_has(c, X86_FEATURE_TM2) && (l & (1 << 13))) 58 if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))
58 tm2 = 1; 59 tm2 = 1;
59 60
60 if (h & APIC_VECTOR_MASK) { 61 if (h & APIC_VECTOR_MASK) {
@@ -72,7 +73,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
72 wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h); 73 wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h);
73 74
74 rdmsr(MSR_IA32_MISC_ENABLE, l, h); 75 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
75 wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h); 76 wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
76 77
77 l = apic_read(APIC_LVTTHMR); 78 l = apic_read(APIC_LVTTHMR);
78 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); 79 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
diff --git a/arch/x86/kernel/cpu/mcheck/p4.c b/arch/x86/kernel/cpu/mcheck/p4.c
index 9b60fce09f75..f53bdcbaf382 100644
--- a/arch/x86/kernel/cpu/mcheck/p4.c
+++ b/arch/x86/kernel/cpu/mcheck/p4.c
@@ -85,7 +85,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
85 */ 85 */
86 rdmsr(MSR_IA32_MISC_ENABLE, l, h); 86 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
87 h = apic_read(APIC_LVTTHMR); 87 h = apic_read(APIC_LVTTHMR);
88 if ((l & (1<<3)) && (h & APIC_DM_SMI)) { 88 if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
89 printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n", 89 printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n",
90 cpu); 90 cpu);
91 return; /* -EBUSY */ 91 return; /* -EBUSY */
@@ -111,7 +111,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
111 vendor_thermal_interrupt = intel_thermal_interrupt; 111 vendor_thermal_interrupt = intel_thermal_interrupt;
112 112
113 rdmsr(MSR_IA32_MISC_ENABLE, l, h); 113 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
114 wrmsr(MSR_IA32_MISC_ENABLE, l | (1<<3), h); 114 wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
115 115
116 l = apic_read(APIC_LVTTHMR); 116 l = apic_read(APIC_LVTTHMR);
117 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); 117 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 9abd48b22674..f6c70a164e32 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -19,7 +19,7 @@
19#include <linux/nmi.h> 19#include <linux/nmi.h>
20#include <linux/kprobes.h> 20#include <linux/kprobes.h>
21 21
22#include <asm/apic.h> 22#include <asm/genapic.h>
23#include <asm/intel_arch_perfmon.h> 23#include <asm/intel_arch_perfmon.h>
24 24
25struct nmi_watchdog_ctlblk { 25struct nmi_watchdog_ctlblk {
diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index 01b1244ef1c0..d67e0e48bc2d 100644
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -7,11 +7,10 @@
7/* 7/*
8 * Get CPU information for use by the procfs. 8 * Get CPU information for use by the procfs.
9 */ 9 */
10#ifdef CONFIG_X86_32
11static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c, 10static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
12 unsigned int cpu) 11 unsigned int cpu)
13{ 12{
14#ifdef CONFIG_X86_HT 13#ifdef CONFIG_SMP
15 if (c->x86_max_cores * smp_num_siblings > 1) { 14 if (c->x86_max_cores * smp_num_siblings > 1) {
16 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); 15 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
17 seq_printf(m, "siblings\t: %d\n", 16 seq_printf(m, "siblings\t: %d\n",
@@ -24,6 +23,7 @@ static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
24#endif 23#endif
25} 24}
26 25
26#ifdef CONFIG_X86_32
27static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) 27static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
28{ 28{
29 /* 29 /*
@@ -50,22 +50,6 @@ static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
50 c->wp_works_ok ? "yes" : "no"); 50 c->wp_works_ok ? "yes" : "no");
51} 51}
52#else 52#else
53static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
54 unsigned int cpu)
55{
56#ifdef CONFIG_SMP
57 if (c->x86_max_cores * smp_num_siblings > 1) {
58 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
59 seq_printf(m, "siblings\t: %d\n",
60 cpus_weight(per_cpu(cpu_core_map, cpu)));
61 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
62 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
63 seq_printf(m, "apicid\t\t: %d\n", c->apicid);
64 seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid);
65 }
66#endif
67}
68
69static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c) 53static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
70{ 54{
71 seq_printf(m, 55 seq_printf(m,
diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c
index c689d19e35ab..ff958248e61d 100644
--- a/arch/x86/kernel/crash.c
+++ b/arch/x86/kernel/crash.c
@@ -24,12 +24,10 @@
24#include <asm/apic.h> 24#include <asm/apic.h>
25#include <asm/hpet.h> 25#include <asm/hpet.h>
26#include <linux/kdebug.h> 26#include <linux/kdebug.h>
27#include <asm/smp.h> 27#include <asm/cpu.h>
28#include <asm/reboot.h> 28#include <asm/reboot.h>
29#include <asm/virtext.h> 29#include <asm/virtext.h>
30 30
31#include <mach_ipi.h>
32
33 31
34#if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC) 32#if defined(CONFIG_SMP) && defined(CONFIG_X86_LOCAL_APIC)
35 33
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index 6b1f6f6f8661..87d103ded1c3 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -99,7 +99,7 @@ print_context_stack(struct thread_info *tinfo,
99 frame = frame->next_frame; 99 frame = frame->next_frame;
100 bp = (unsigned long) frame; 100 bp = (unsigned long) frame;
101 } else { 101 } else {
102 ops->address(data, addr, bp == 0); 102 ops->address(data, addr, 0);
103 } 103 }
104 print_ftrace_graph_addr(addr, data, ops, tinfo, graph); 104 print_ftrace_graph_addr(addr, data, ops, tinfo, graph);
105 } 105 }
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index c302d0707048..d35db5993fd6 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -106,7 +106,8 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
106 const struct stacktrace_ops *ops, void *data) 106 const struct stacktrace_ops *ops, void *data)
107{ 107{
108 const unsigned cpu = get_cpu(); 108 const unsigned cpu = get_cpu();
109 unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr; 109 unsigned long *irq_stack_end =
110 (unsigned long *)per_cpu(irq_stack_ptr, cpu);
110 unsigned used = 0; 111 unsigned used = 0;
111 struct thread_info *tinfo; 112 struct thread_info *tinfo;
112 int graph = 0; 113 int graph = 0;
@@ -160,23 +161,23 @@ void dump_trace(struct task_struct *task, struct pt_regs *regs,
160 stack = (unsigned long *) estack_end[-2]; 161 stack = (unsigned long *) estack_end[-2];
161 continue; 162 continue;
162 } 163 }
163 if (irqstack_end) { 164 if (irq_stack_end) {
164 unsigned long *irqstack; 165 unsigned long *irq_stack;
165 irqstack = irqstack_end - 166 irq_stack = irq_stack_end -
166 (IRQSTACKSIZE - 64) / sizeof(*irqstack); 167 (IRQ_STACK_SIZE - 64) / sizeof(*irq_stack);
167 168
168 if (stack >= irqstack && stack < irqstack_end) { 169 if (stack >= irq_stack && stack < irq_stack_end) {
169 if (ops->stack(data, "IRQ") < 0) 170 if (ops->stack(data, "IRQ") < 0)
170 break; 171 break;
171 bp = print_context_stack(tinfo, stack, bp, 172 bp = print_context_stack(tinfo, stack, bp,
172 ops, data, irqstack_end, &graph); 173 ops, data, irq_stack_end, &graph);
173 /* 174 /*
174 * We link to the next stack (which would be 175 * We link to the next stack (which would be
175 * the process stack normally) the last 176 * the process stack normally) the last
176 * pointer (index -1 to end) in the IRQ stack: 177 * pointer (index -1 to end) in the IRQ stack:
177 */ 178 */
178 stack = (unsigned long *) (irqstack_end[-1]); 179 stack = (unsigned long *) (irq_stack_end[-1]);
179 irqstack_end = NULL; 180 irq_stack_end = NULL;
180 ops->stack(data, "EOI"); 181 ops->stack(data, "EOI");
181 continue; 182 continue;
182 } 183 }
@@ -199,10 +200,10 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
199 unsigned long *stack; 200 unsigned long *stack;
200 int i; 201 int i;
201 const int cpu = smp_processor_id(); 202 const int cpu = smp_processor_id();
202 unsigned long *irqstack_end = 203 unsigned long *irq_stack_end =
203 (unsigned long *) (cpu_pda(cpu)->irqstackptr); 204 (unsigned long *)(per_cpu(irq_stack_ptr, cpu));
204 unsigned long *irqstack = 205 unsigned long *irq_stack =
205 (unsigned long *) (cpu_pda(cpu)->irqstackptr - IRQSTACKSIZE); 206 (unsigned long *)(per_cpu(irq_stack_ptr, cpu) - IRQ_STACK_SIZE);
206 207
207 /* 208 /*
208 * debugging aid: "show_stack(NULL, NULL);" prints the 209 * debugging aid: "show_stack(NULL, NULL);" prints the
@@ -218,9 +219,9 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
218 219
219 stack = sp; 220 stack = sp;
220 for (i = 0; i < kstack_depth_to_print; i++) { 221 for (i = 0; i < kstack_depth_to_print; i++) {
221 if (stack >= irqstack && stack <= irqstack_end) { 222 if (stack >= irq_stack && stack <= irq_stack_end) {
222 if (stack == irqstack_end) { 223 if (stack == irq_stack_end) {
223 stack = (unsigned long *) (irqstack_end[-1]); 224 stack = (unsigned long *) (irq_stack_end[-1]);
224 printk(" <EOI> "); 225 printk(" <EOI> ");
225 } 226 }
226 } else { 227 } else {
@@ -241,7 +242,7 @@ void show_registers(struct pt_regs *regs)
241 int i; 242 int i;
242 unsigned long sp; 243 unsigned long sp;
243 const int cpu = smp_processor_id(); 244 const int cpu = smp_processor_id();
244 struct task_struct *cur = cpu_pda(cpu)->pcurrent; 245 struct task_struct *cur = current;
245 246
246 sp = regs->sp; 247 sp = regs->sp;
247 printk("CPU %d ", cpu); 248 printk("CPU %d ", cpu);
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index e85826829cf2..508bec1cee27 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -858,6 +858,9 @@ void __init reserve_early_overlap_ok(u64 start, u64 end, char *name)
858 */ 858 */
859void __init reserve_early(u64 start, u64 end, char *name) 859void __init reserve_early(u64 start, u64 end, char *name)
860{ 860{
861 if (start >= end)
862 return;
863
861 drop_overlaps_that_are_ok(start, end); 864 drop_overlaps_that_are_ok(start, end);
862 __reserve_early(start, end, name, 0); 865 __reserve_early(start, end, name, 0);
863} 866}
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index 504ad198e4ad..639ad98238a2 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -13,8 +13,8 @@
13#include <asm/setup.h> 13#include <asm/setup.h>
14#include <xen/hvc-console.h> 14#include <xen/hvc-console.h>
15#include <asm/pci-direct.h> 15#include <asm/pci-direct.h>
16#include <asm/pgtable.h>
17#include <asm/fixmap.h> 16#include <asm/fixmap.h>
17#include <asm/pgtable.h>
18#include <linux/usb/ehci_def.h> 18#include <linux/usb/ehci_def.h>
19 19
20/* Simple VGA output */ 20/* Simple VGA output */
diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c
index eb1ef3b67dd5..1736acc4d7aa 100644
--- a/arch/x86/kernel/efi.c
+++ b/arch/x86/kernel/efi.c
@@ -366,10 +366,12 @@ void __init efi_init(void)
366 SMBIOS_TABLE_GUID)) { 366 SMBIOS_TABLE_GUID)) {
367 efi.smbios = config_tables[i].table; 367 efi.smbios = config_tables[i].table;
368 printk(" SMBIOS=0x%lx ", config_tables[i].table); 368 printk(" SMBIOS=0x%lx ", config_tables[i].table);
369#ifdef CONFIG_X86_UV
369 } else if (!efi_guidcmp(config_tables[i].guid, 370 } else if (!efi_guidcmp(config_tables[i].guid,
370 UV_SYSTEM_TABLE_GUID)) { 371 UV_SYSTEM_TABLE_GUID)) {
371 efi.uv_systab = config_tables[i].table; 372 efi.uv_systab = config_tables[i].table;
372 printk(" UVsystab=0x%lx ", config_tables[i].table); 373 printk(" UVsystab=0x%lx ", config_tables[i].table);
374#endif
373 } else if (!efi_guidcmp(config_tables[i].guid, 375 } else if (!efi_guidcmp(config_tables[i].guid,
374 HCDP_TABLE_GUID)) { 376 HCDP_TABLE_GUID)) {
375 efi.hcdp = config_tables[i].table; 377 efi.hcdp = config_tables[i].table;
diff --git a/arch/x86/kernel/efi_64.c b/arch/x86/kernel/efi_64.c
index cb783b92c50c..22c3b7828c50 100644
--- a/arch/x86/kernel/efi_64.c
+++ b/arch/x86/kernel/efi_64.c
@@ -36,6 +36,7 @@
36#include <asm/proto.h> 36#include <asm/proto.h>
37#include <asm/efi.h> 37#include <asm/efi.h>
38#include <asm/cacheflush.h> 38#include <asm/cacheflush.h>
39#include <asm/fixmap.h>
39 40
40static pgd_t save_pgd __initdata; 41static pgd_t save_pgd __initdata;
41static unsigned long efi_flags __initdata; 42static unsigned long efi_flags __initdata;
diff --git a/arch/x86/kernel/efi_stub_32.S b/arch/x86/kernel/efi_stub_32.S
index ef00bb77d7e4..fbe66e626c09 100644
--- a/arch/x86/kernel/efi_stub_32.S
+++ b/arch/x86/kernel/efi_stub_32.S
@@ -6,7 +6,7 @@
6 */ 6 */
7 7
8#include <linux/linkage.h> 8#include <linux/linkage.h>
9#include <asm/page.h> 9#include <asm/page_types.h>
10 10
11/* 11/*
12 * efi_call_phys(void *, ...) is a function with variable parameters. 12 * efi_call_phys(void *, ...) is a function with variable parameters.
@@ -113,6 +113,7 @@ ENTRY(efi_call_phys)
113 movl (%edx), %ecx 113 movl (%edx), %ecx
114 pushl %ecx 114 pushl %ecx
115 ret 115 ret
116ENDPROC(efi_call_phys)
116.previous 117.previous
117 118
118.data 119.data
diff --git a/arch/x86/kernel/efi_stub_64.S b/arch/x86/kernel/efi_stub_64.S
index 99b47d48c9f4..4c07ccab8146 100644
--- a/arch/x86/kernel/efi_stub_64.S
+++ b/arch/x86/kernel/efi_stub_64.S
@@ -41,6 +41,7 @@ ENTRY(efi_call0)
41 addq $32, %rsp 41 addq $32, %rsp
42 RESTORE_XMM 42 RESTORE_XMM
43 ret 43 ret
44ENDPROC(efi_call0)
44 45
45ENTRY(efi_call1) 46ENTRY(efi_call1)
46 SAVE_XMM 47 SAVE_XMM
@@ -50,6 +51,7 @@ ENTRY(efi_call1)
50 addq $32, %rsp 51 addq $32, %rsp
51 RESTORE_XMM 52 RESTORE_XMM
52 ret 53 ret
54ENDPROC(efi_call1)
53 55
54ENTRY(efi_call2) 56ENTRY(efi_call2)
55 SAVE_XMM 57 SAVE_XMM
@@ -59,6 +61,7 @@ ENTRY(efi_call2)
59 addq $32, %rsp 61 addq $32, %rsp
60 RESTORE_XMM 62 RESTORE_XMM
61 ret 63 ret
64ENDPROC(efi_call2)
62 65
63ENTRY(efi_call3) 66ENTRY(efi_call3)
64 SAVE_XMM 67 SAVE_XMM
@@ -69,6 +72,7 @@ ENTRY(efi_call3)
69 addq $32, %rsp 72 addq $32, %rsp
70 RESTORE_XMM 73 RESTORE_XMM
71 ret 74 ret
75ENDPROC(efi_call3)
72 76
73ENTRY(efi_call4) 77ENTRY(efi_call4)
74 SAVE_XMM 78 SAVE_XMM
@@ -80,6 +84,7 @@ ENTRY(efi_call4)
80 addq $32, %rsp 84 addq $32, %rsp
81 RESTORE_XMM 85 RESTORE_XMM
82 ret 86 ret
87ENDPROC(efi_call4)
83 88
84ENTRY(efi_call5) 89ENTRY(efi_call5)
85 SAVE_XMM 90 SAVE_XMM
@@ -92,6 +97,7 @@ ENTRY(efi_call5)
92 addq $48, %rsp 97 addq $48, %rsp
93 RESTORE_XMM 98 RESTORE_XMM
94 ret 99 ret
100ENDPROC(efi_call5)
95 101
96ENTRY(efi_call6) 102ENTRY(efi_call6)
97 SAVE_XMM 103 SAVE_XMM
@@ -107,3 +113,4 @@ ENTRY(efi_call6)
107 addq $48, %rsp 113 addq $48, %rsp
108 RESTORE_XMM 114 RESTORE_XMM
109 ret 115 ret
116ENDPROC(efi_call6)
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 46469029e9d3..899e8938e79f 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -30,12 +30,13 @@
30 * 1C(%esp) - %ds 30 * 1C(%esp) - %ds
31 * 20(%esp) - %es 31 * 20(%esp) - %es
32 * 24(%esp) - %fs 32 * 24(%esp) - %fs
33 * 28(%esp) - orig_eax 33 * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS
34 * 2C(%esp) - %eip 34 * 2C(%esp) - orig_eax
35 * 30(%esp) - %cs 35 * 30(%esp) - %eip
36 * 34(%esp) - %eflags 36 * 34(%esp) - %cs
37 * 38(%esp) - %oldesp 37 * 38(%esp) - %eflags
38 * 3C(%esp) - %oldss 38 * 3C(%esp) - %oldesp
39 * 40(%esp) - %oldss
39 * 40 *
40 * "current" is in register %ebx during any slow entries. 41 * "current" is in register %ebx during any slow entries.
41 */ 42 */
@@ -46,7 +47,7 @@
46#include <asm/errno.h> 47#include <asm/errno.h>
47#include <asm/segment.h> 48#include <asm/segment.h>
48#include <asm/smp.h> 49#include <asm/smp.h>
49#include <asm/page.h> 50#include <asm/page_types.h>
50#include <asm/desc.h> 51#include <asm/desc.h>
51#include <asm/percpu.h> 52#include <asm/percpu.h>
52#include <asm/dwarf2.h> 53#include <asm/dwarf2.h>
@@ -101,121 +102,221 @@
101#define resume_userspace_sig resume_userspace 102#define resume_userspace_sig resume_userspace
102#endif 103#endif
103 104
104#define SAVE_ALL \ 105/*
105 cld; \ 106 * User gs save/restore
106 pushl %fs; \ 107 *
107 CFI_ADJUST_CFA_OFFSET 4;\ 108 * %gs is used for userland TLS and kernel only uses it for stack
108 /*CFI_REL_OFFSET fs, 0;*/\ 109 * canary which is required to be at %gs:20 by gcc. Read the comment
109 pushl %es; \ 110 * at the top of stackprotector.h for more info.
110 CFI_ADJUST_CFA_OFFSET 4;\ 111 *
111 /*CFI_REL_OFFSET es, 0;*/\ 112 * Local labels 98 and 99 are used.
112 pushl %ds; \ 113 */
113 CFI_ADJUST_CFA_OFFSET 4;\ 114#ifdef CONFIG_X86_32_LAZY_GS
114 /*CFI_REL_OFFSET ds, 0;*/\ 115
115 pushl %eax; \ 116 /* unfortunately push/pop can't be no-op */
116 CFI_ADJUST_CFA_OFFSET 4;\ 117.macro PUSH_GS
117 CFI_REL_OFFSET eax, 0;\ 118 pushl $0
118 pushl %ebp; \ 119 CFI_ADJUST_CFA_OFFSET 4
119 CFI_ADJUST_CFA_OFFSET 4;\ 120.endm
120 CFI_REL_OFFSET ebp, 0;\ 121.macro POP_GS pop=0
121 pushl %edi; \ 122 addl $(4 + \pop), %esp
122 CFI_ADJUST_CFA_OFFSET 4;\ 123 CFI_ADJUST_CFA_OFFSET -(4 + \pop)
123 CFI_REL_OFFSET edi, 0;\ 124.endm
124 pushl %esi; \ 125.macro POP_GS_EX
125 CFI_ADJUST_CFA_OFFSET 4;\ 126.endm
126 CFI_REL_OFFSET esi, 0;\ 127
127 pushl %edx; \ 128 /* all the rest are no-op */
128 CFI_ADJUST_CFA_OFFSET 4;\ 129.macro PTGS_TO_GS
129 CFI_REL_OFFSET edx, 0;\ 130.endm
130 pushl %ecx; \ 131.macro PTGS_TO_GS_EX
131 CFI_ADJUST_CFA_OFFSET 4;\ 132.endm
132 CFI_REL_OFFSET ecx, 0;\ 133.macro GS_TO_REG reg
133 pushl %ebx; \ 134.endm
134 CFI_ADJUST_CFA_OFFSET 4;\ 135.macro REG_TO_PTGS reg
135 CFI_REL_OFFSET ebx, 0;\ 136.endm
136 movl $(__USER_DS), %edx; \ 137.macro SET_KERNEL_GS reg
137 movl %edx, %ds; \ 138.endm
138 movl %edx, %es; \ 139
139 movl $(__KERNEL_PERCPU), %edx; \ 140#else /* CONFIG_X86_32_LAZY_GS */
141
142.macro PUSH_GS
143 pushl %gs
144 CFI_ADJUST_CFA_OFFSET 4
145 /*CFI_REL_OFFSET gs, 0*/
146.endm
147
148.macro POP_GS pop=0
14998: popl %gs
150 CFI_ADJUST_CFA_OFFSET -4
151 /*CFI_RESTORE gs*/
152 .if \pop <> 0
153 add $\pop, %esp
154 CFI_ADJUST_CFA_OFFSET -\pop
155 .endif
156.endm
157.macro POP_GS_EX
158.pushsection .fixup, "ax"
15999: movl $0, (%esp)
160 jmp 98b
161.section __ex_table, "a"
162 .align 4
163 .long 98b, 99b
164.popsection
165.endm
166
167.macro PTGS_TO_GS
16898: mov PT_GS(%esp), %gs
169.endm
170.macro PTGS_TO_GS_EX
171.pushsection .fixup, "ax"
17299: movl $0, PT_GS(%esp)
173 jmp 98b
174.section __ex_table, "a"
175 .align 4
176 .long 98b, 99b
177.popsection
178.endm
179
180.macro GS_TO_REG reg
181 movl %gs, \reg
182 /*CFI_REGISTER gs, \reg*/
183.endm
184.macro REG_TO_PTGS reg
185 movl \reg, PT_GS(%esp)
186 /*CFI_REL_OFFSET gs, PT_GS*/
187.endm
188.macro SET_KERNEL_GS reg
189 movl $(__KERNEL_STACK_CANARY), \reg
190 movl \reg, %gs
191.endm
192
193#endif /* CONFIG_X86_32_LAZY_GS */
194
195.macro SAVE_ALL
196 cld
197 PUSH_GS
198 pushl %fs
199 CFI_ADJUST_CFA_OFFSET 4
200 /*CFI_REL_OFFSET fs, 0;*/
201 pushl %es
202 CFI_ADJUST_CFA_OFFSET 4
203 /*CFI_REL_OFFSET es, 0;*/
204 pushl %ds
205 CFI_ADJUST_CFA_OFFSET 4
206 /*CFI_REL_OFFSET ds, 0;*/
207 pushl %eax
208 CFI_ADJUST_CFA_OFFSET 4
209 CFI_REL_OFFSET eax, 0
210 pushl %ebp
211 CFI_ADJUST_CFA_OFFSET 4
212 CFI_REL_OFFSET ebp, 0
213 pushl %edi
214 CFI_ADJUST_CFA_OFFSET 4
215 CFI_REL_OFFSET edi, 0
216 pushl %esi
217 CFI_ADJUST_CFA_OFFSET 4
218 CFI_REL_OFFSET esi, 0
219 pushl %edx
220 CFI_ADJUST_CFA_OFFSET 4
221 CFI_REL_OFFSET edx, 0
222 pushl %ecx
223 CFI_ADJUST_CFA_OFFSET 4
224 CFI_REL_OFFSET ecx, 0
225 pushl %ebx
226 CFI_ADJUST_CFA_OFFSET 4
227 CFI_REL_OFFSET ebx, 0
228 movl $(__USER_DS), %edx
229 movl %edx, %ds
230 movl %edx, %es
231 movl $(__KERNEL_PERCPU), %edx
140 movl %edx, %fs 232 movl %edx, %fs
233 SET_KERNEL_GS %edx
234.endm
141 235
142#define RESTORE_INT_REGS \ 236.macro RESTORE_INT_REGS
143 popl %ebx; \ 237 popl %ebx
144 CFI_ADJUST_CFA_OFFSET -4;\ 238 CFI_ADJUST_CFA_OFFSET -4
145 CFI_RESTORE ebx;\ 239 CFI_RESTORE ebx
146 popl %ecx; \ 240 popl %ecx
147 CFI_ADJUST_CFA_OFFSET -4;\ 241 CFI_ADJUST_CFA_OFFSET -4
148 CFI_RESTORE ecx;\ 242 CFI_RESTORE ecx
149 popl %edx; \ 243 popl %edx
150 CFI_ADJUST_CFA_OFFSET -4;\ 244 CFI_ADJUST_CFA_OFFSET -4
151 CFI_RESTORE edx;\ 245 CFI_RESTORE edx
152 popl %esi; \ 246 popl %esi
153 CFI_ADJUST_CFA_OFFSET -4;\ 247 CFI_ADJUST_CFA_OFFSET -4
154 CFI_RESTORE esi;\ 248 CFI_RESTORE esi
155 popl %edi; \ 249 popl %edi
156 CFI_ADJUST_CFA_OFFSET -4;\ 250 CFI_ADJUST_CFA_OFFSET -4
157 CFI_RESTORE edi;\ 251 CFI_RESTORE edi
158 popl %ebp; \ 252 popl %ebp
159 CFI_ADJUST_CFA_OFFSET -4;\ 253 CFI_ADJUST_CFA_OFFSET -4
160 CFI_RESTORE ebp;\ 254 CFI_RESTORE ebp
161 popl %eax; \ 255 popl %eax
162 CFI_ADJUST_CFA_OFFSET -4;\ 256 CFI_ADJUST_CFA_OFFSET -4
163 CFI_RESTORE eax 257 CFI_RESTORE eax
258.endm
164 259
165#define RESTORE_REGS \ 260.macro RESTORE_REGS pop=0
166 RESTORE_INT_REGS; \ 261 RESTORE_INT_REGS
1671: popl %ds; \ 2621: popl %ds
168 CFI_ADJUST_CFA_OFFSET -4;\ 263 CFI_ADJUST_CFA_OFFSET -4
169 /*CFI_RESTORE ds;*/\ 264 /*CFI_RESTORE ds;*/
1702: popl %es; \ 2652: popl %es
171 CFI_ADJUST_CFA_OFFSET -4;\ 266 CFI_ADJUST_CFA_OFFSET -4
172 /*CFI_RESTORE es;*/\ 267 /*CFI_RESTORE es;*/
1733: popl %fs; \ 2683: popl %fs
174 CFI_ADJUST_CFA_OFFSET -4;\ 269 CFI_ADJUST_CFA_OFFSET -4
175 /*CFI_RESTORE fs;*/\ 270 /*CFI_RESTORE fs;*/
176.pushsection .fixup,"ax"; \ 271 POP_GS \pop
1774: movl $0,(%esp); \ 272.pushsection .fixup, "ax"
178 jmp 1b; \ 2734: movl $0, (%esp)
1795: movl $0,(%esp); \ 274 jmp 1b
180 jmp 2b; \ 2755: movl $0, (%esp)
1816: movl $0,(%esp); \ 276 jmp 2b
182 jmp 3b; \ 2776: movl $0, (%esp)
183.section __ex_table,"a";\ 278 jmp 3b
184 .align 4; \ 279.section __ex_table, "a"
185 .long 1b,4b; \ 280 .align 4
186 .long 2b,5b; \ 281 .long 1b, 4b
187 .long 3b,6b; \ 282 .long 2b, 5b
283 .long 3b, 6b
188.popsection 284.popsection
285 POP_GS_EX
286.endm
189 287
190#define RING0_INT_FRAME \ 288.macro RING0_INT_FRAME
191 CFI_STARTPROC simple;\ 289 CFI_STARTPROC simple
192 CFI_SIGNAL_FRAME;\ 290 CFI_SIGNAL_FRAME
193 CFI_DEF_CFA esp, 3*4;\ 291 CFI_DEF_CFA esp, 3*4
194 /*CFI_OFFSET cs, -2*4;*/\ 292 /*CFI_OFFSET cs, -2*4;*/
195 CFI_OFFSET eip, -3*4 293 CFI_OFFSET eip, -3*4
294.endm
196 295
197#define RING0_EC_FRAME \ 296.macro RING0_EC_FRAME
198 CFI_STARTPROC simple;\ 297 CFI_STARTPROC simple
199 CFI_SIGNAL_FRAME;\ 298 CFI_SIGNAL_FRAME
200 CFI_DEF_CFA esp, 4*4;\ 299 CFI_DEF_CFA esp, 4*4
201 /*CFI_OFFSET cs, -2*4;*/\ 300 /*CFI_OFFSET cs, -2*4;*/
202 CFI_OFFSET eip, -3*4 301 CFI_OFFSET eip, -3*4
302.endm
203 303
204#define RING0_PTREGS_FRAME \ 304.macro RING0_PTREGS_FRAME
205 CFI_STARTPROC simple;\ 305 CFI_STARTPROC simple
206 CFI_SIGNAL_FRAME;\ 306 CFI_SIGNAL_FRAME
207 CFI_DEF_CFA esp, PT_OLDESP-PT_EBX;\ 307 CFI_DEF_CFA esp, PT_OLDESP-PT_EBX
208 /*CFI_OFFSET cs, PT_CS-PT_OLDESP;*/\ 308 /*CFI_OFFSET cs, PT_CS-PT_OLDESP;*/
209 CFI_OFFSET eip, PT_EIP-PT_OLDESP;\ 309 CFI_OFFSET eip, PT_EIP-PT_OLDESP
210 /*CFI_OFFSET es, PT_ES-PT_OLDESP;*/\ 310 /*CFI_OFFSET es, PT_ES-PT_OLDESP;*/
211 /*CFI_OFFSET ds, PT_DS-PT_OLDESP;*/\ 311 /*CFI_OFFSET ds, PT_DS-PT_OLDESP;*/
212 CFI_OFFSET eax, PT_EAX-PT_OLDESP;\ 312 CFI_OFFSET eax, PT_EAX-PT_OLDESP
213 CFI_OFFSET ebp, PT_EBP-PT_OLDESP;\ 313 CFI_OFFSET ebp, PT_EBP-PT_OLDESP
214 CFI_OFFSET edi, PT_EDI-PT_OLDESP;\ 314 CFI_OFFSET edi, PT_EDI-PT_OLDESP
215 CFI_OFFSET esi, PT_ESI-PT_OLDESP;\ 315 CFI_OFFSET esi, PT_ESI-PT_OLDESP
216 CFI_OFFSET edx, PT_EDX-PT_OLDESP;\ 316 CFI_OFFSET edx, PT_EDX-PT_OLDESP
217 CFI_OFFSET ecx, PT_ECX-PT_OLDESP;\ 317 CFI_OFFSET ecx, PT_ECX-PT_OLDESP
218 CFI_OFFSET ebx, PT_EBX-PT_OLDESP 318 CFI_OFFSET ebx, PT_EBX-PT_OLDESP
319.endm
219 320
220ENTRY(ret_from_fork) 321ENTRY(ret_from_fork)
221 CFI_STARTPROC 322 CFI_STARTPROC
@@ -362,6 +463,7 @@ sysenter_exit:
362 xorl %ebp,%ebp 463 xorl %ebp,%ebp
363 TRACE_IRQS_ON 464 TRACE_IRQS_ON
3641: mov PT_FS(%esp), %fs 4651: mov PT_FS(%esp), %fs
466 PTGS_TO_GS
365 ENABLE_INTERRUPTS_SYSEXIT 467 ENABLE_INTERRUPTS_SYSEXIT
366 468
367#ifdef CONFIG_AUDITSYSCALL 469#ifdef CONFIG_AUDITSYSCALL
@@ -410,6 +512,7 @@ sysexit_audit:
410 .align 4 512 .align 4
411 .long 1b,2b 513 .long 1b,2b
412.popsection 514.popsection
515 PTGS_TO_GS_EX
413ENDPROC(ia32_sysenter_target) 516ENDPROC(ia32_sysenter_target)
414 517
415 # system call handler stub 518 # system call handler stub
@@ -452,8 +555,7 @@ restore_all:
452restore_nocheck: 555restore_nocheck:
453 TRACE_IRQS_IRET 556 TRACE_IRQS_IRET
454restore_nocheck_notrace: 557restore_nocheck_notrace:
455 RESTORE_REGS 558 RESTORE_REGS 4 # skip orig_eax/error_code
456 addl $4, %esp # skip orig_eax/error_code
457 CFI_ADJUST_CFA_OFFSET -4 559 CFI_ADJUST_CFA_OFFSET -4
458irq_return: 560irq_return:
459 INTERRUPT_RETURN 561 INTERRUPT_RETURN
@@ -595,28 +697,50 @@ syscall_badsys:
595END(syscall_badsys) 697END(syscall_badsys)
596 CFI_ENDPROC 698 CFI_ENDPROC
597 699
598#define FIXUP_ESPFIX_STACK \ 700/*
599 /* since we are on a wrong stack, we cant make it a C code :( */ \ 701 * System calls that need a pt_regs pointer.
600 PER_CPU(gdt_page, %ebx); \ 702 */
601 GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah); \ 703#define PTREGSCALL(name) \
602 addl %esp, %eax; \ 704 ALIGN; \
603 pushl $__KERNEL_DS; \ 705ptregs_##name: \
604 CFI_ADJUST_CFA_OFFSET 4; \ 706 leal 4(%esp),%eax; \
605 pushl %eax; \ 707 jmp sys_##name;
606 CFI_ADJUST_CFA_OFFSET 4; \ 708
607 lss (%esp), %esp; \ 709PTREGSCALL(iopl)
608 CFI_ADJUST_CFA_OFFSET -8; 710PTREGSCALL(fork)
609#define UNWIND_ESPFIX_STACK \ 711PTREGSCALL(clone)
610 movl %ss, %eax; \ 712PTREGSCALL(vfork)
611 /* see if on espfix stack */ \ 713PTREGSCALL(execve)
612 cmpw $__ESPFIX_SS, %ax; \ 714PTREGSCALL(sigaltstack)
613 jne 27f; \ 715PTREGSCALL(sigreturn)
614 movl $__KERNEL_DS, %eax; \ 716PTREGSCALL(rt_sigreturn)
615 movl %eax, %ds; \ 717PTREGSCALL(vm86)
616 movl %eax, %es; \ 718PTREGSCALL(vm86old)
617 /* switch to normal stack */ \ 719
618 FIXUP_ESPFIX_STACK; \ 720.macro FIXUP_ESPFIX_STACK
61927:; 721 /* since we are on a wrong stack, we cant make it a C code :( */
722 PER_CPU(gdt_page, %ebx)
723 GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah)
724 addl %esp, %eax
725 pushl $__KERNEL_DS
726 CFI_ADJUST_CFA_OFFSET 4
727 pushl %eax
728 CFI_ADJUST_CFA_OFFSET 4
729 lss (%esp), %esp
730 CFI_ADJUST_CFA_OFFSET -8
731.endm
732.macro UNWIND_ESPFIX_STACK
733 movl %ss, %eax
734 /* see if on espfix stack */
735 cmpw $__ESPFIX_SS, %ax
736 jne 27f
737 movl $__KERNEL_DS, %eax
738 movl %eax, %ds
739 movl %eax, %es
740 /* switch to normal stack */
741 FIXUP_ESPFIX_STACK
74227:
743.endm
620 744
621/* 745/*
622 * Build the entry stubs and pointer table with some assembler magic. 746 * Build the entry stubs and pointer table with some assembler magic.
@@ -672,7 +796,7 @@ common_interrupt:
672ENDPROC(common_interrupt) 796ENDPROC(common_interrupt)
673 CFI_ENDPROC 797 CFI_ENDPROC
674 798
675#define BUILD_INTERRUPT(name, nr) \ 799#define BUILD_INTERRUPT3(name, nr, fn) \
676ENTRY(name) \ 800ENTRY(name) \
677 RING0_INT_FRAME; \ 801 RING0_INT_FRAME; \
678 pushl $~(nr); \ 802 pushl $~(nr); \
@@ -680,13 +804,15 @@ ENTRY(name) \
680 SAVE_ALL; \ 804 SAVE_ALL; \
681 TRACE_IRQS_OFF \ 805 TRACE_IRQS_OFF \
682 movl %esp,%eax; \ 806 movl %esp,%eax; \
683 call smp_##name; \ 807 call fn; \
684 jmp ret_from_intr; \ 808 jmp ret_from_intr; \
685 CFI_ENDPROC; \ 809 CFI_ENDPROC; \
686ENDPROC(name) 810ENDPROC(name)
687 811
812#define BUILD_INTERRUPT(name, nr) BUILD_INTERRUPT3(name, nr, smp_##name)
813
688/* The include is where all of the SMP etc. interrupts come from */ 814/* The include is where all of the SMP etc. interrupts come from */
689#include "entry_arch.h" 815#include <asm/entry_arch.h>
690 816
691ENTRY(coprocessor_error) 817ENTRY(coprocessor_error)
692 RING0_INT_FRAME 818 RING0_INT_FRAME
@@ -1068,7 +1194,10 @@ ENTRY(page_fault)
1068 CFI_ADJUST_CFA_OFFSET 4 1194 CFI_ADJUST_CFA_OFFSET 4
1069 ALIGN 1195 ALIGN
1070error_code: 1196error_code:
1071 /* the function address is in %fs's slot on the stack */ 1197 /* the function address is in %gs's slot on the stack */
1198 pushl %fs
1199 CFI_ADJUST_CFA_OFFSET 4
1200 /*CFI_REL_OFFSET fs, 0*/
1072 pushl %es 1201 pushl %es
1073 CFI_ADJUST_CFA_OFFSET 4 1202 CFI_ADJUST_CFA_OFFSET 4
1074 /*CFI_REL_OFFSET es, 0*/ 1203 /*CFI_REL_OFFSET es, 0*/
@@ -1097,20 +1226,15 @@ error_code:
1097 CFI_ADJUST_CFA_OFFSET 4 1226 CFI_ADJUST_CFA_OFFSET 4
1098 CFI_REL_OFFSET ebx, 0 1227 CFI_REL_OFFSET ebx, 0
1099 cld 1228 cld
1100 pushl %fs
1101 CFI_ADJUST_CFA_OFFSET 4
1102 /*CFI_REL_OFFSET fs, 0*/
1103 movl $(__KERNEL_PERCPU), %ecx 1229 movl $(__KERNEL_PERCPU), %ecx
1104 movl %ecx, %fs 1230 movl %ecx, %fs
1105 UNWIND_ESPFIX_STACK 1231 UNWIND_ESPFIX_STACK
1106 popl %ecx 1232 GS_TO_REG %ecx
1107 CFI_ADJUST_CFA_OFFSET -4 1233 movl PT_GS(%esp), %edi # get the function address
1108 /*CFI_REGISTER es, ecx*/
1109 movl PT_FS(%esp), %edi # get the function address
1110 movl PT_ORIG_EAX(%esp), %edx # get the error code 1234 movl PT_ORIG_EAX(%esp), %edx # get the error code
1111 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart 1235 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
1112 mov %ecx, PT_FS(%esp) 1236 REG_TO_PTGS %ecx
1113 /*CFI_REL_OFFSET fs, ES*/ 1237 SET_KERNEL_GS %ecx
1114 movl $(__USER_DS), %ecx 1238 movl $(__USER_DS), %ecx
1115 movl %ecx, %ds 1239 movl %ecx, %ds
1116 movl %ecx, %es 1240 movl %ecx, %es
@@ -1134,26 +1258,27 @@ END(page_fault)
1134 * by hand onto the new stack - while updating the return eip past 1258 * by hand onto the new stack - while updating the return eip past
1135 * the instruction that would have done it for sysenter. 1259 * the instruction that would have done it for sysenter.
1136 */ 1260 */
1137#define FIX_STACK(offset, ok, label) \ 1261.macro FIX_STACK offset ok label
1138 cmpw $__KERNEL_CS,4(%esp); \ 1262 cmpw $__KERNEL_CS, 4(%esp)
1139 jne ok; \ 1263 jne \ok
1140label: \ 1264\label:
1141 movl TSS_sysenter_sp0+offset(%esp),%esp; \ 1265 movl TSS_sysenter_sp0 + \offset(%esp), %esp
1142 CFI_DEF_CFA esp, 0; \ 1266 CFI_DEF_CFA esp, 0
1143 CFI_UNDEFINED eip; \ 1267 CFI_UNDEFINED eip
1144 pushfl; \ 1268 pushfl
1145 CFI_ADJUST_CFA_OFFSET 4; \ 1269 CFI_ADJUST_CFA_OFFSET 4
1146 pushl $__KERNEL_CS; \ 1270 pushl $__KERNEL_CS
1147 CFI_ADJUST_CFA_OFFSET 4; \ 1271 CFI_ADJUST_CFA_OFFSET 4
1148 pushl $sysenter_past_esp; \ 1272 pushl $sysenter_past_esp
1149 CFI_ADJUST_CFA_OFFSET 4; \ 1273 CFI_ADJUST_CFA_OFFSET 4
1150 CFI_REL_OFFSET eip, 0 1274 CFI_REL_OFFSET eip, 0
1275.endm
1151 1276
1152ENTRY(debug) 1277ENTRY(debug)
1153 RING0_INT_FRAME 1278 RING0_INT_FRAME
1154 cmpl $ia32_sysenter_target,(%esp) 1279 cmpl $ia32_sysenter_target,(%esp)
1155 jne debug_stack_correct 1280 jne debug_stack_correct
1156 FIX_STACK(12, debug_stack_correct, debug_esp_fix_insn) 1281 FIX_STACK 12, debug_stack_correct, debug_esp_fix_insn
1157debug_stack_correct: 1282debug_stack_correct:
1158 pushl $-1 # mark this as an int 1283 pushl $-1 # mark this as an int
1159 CFI_ADJUST_CFA_OFFSET 4 1284 CFI_ADJUST_CFA_OFFSET 4
@@ -1211,7 +1336,7 @@ nmi_stack_correct:
1211 1336
1212nmi_stack_fixup: 1337nmi_stack_fixup:
1213 RING0_INT_FRAME 1338 RING0_INT_FRAME
1214 FIX_STACK(12,nmi_stack_correct, 1) 1339 FIX_STACK 12, nmi_stack_correct, 1
1215 jmp nmi_stack_correct 1340 jmp nmi_stack_correct
1216 1341
1217nmi_debug_stack_check: 1342nmi_debug_stack_check:
@@ -1222,7 +1347,7 @@ nmi_debug_stack_check:
1222 jb nmi_stack_correct 1347 jb nmi_stack_correct
1223 cmpl $debug_esp_fix_insn,(%esp) 1348 cmpl $debug_esp_fix_insn,(%esp)
1224 ja nmi_stack_correct 1349 ja nmi_stack_correct
1225 FIX_STACK(24,nmi_stack_correct, 1) 1350 FIX_STACK 24, nmi_stack_correct, 1
1226 jmp nmi_stack_correct 1351 jmp nmi_stack_correct
1227 1352
1228nmi_espfix_stack: 1353nmi_espfix_stack:
@@ -1234,7 +1359,7 @@ nmi_espfix_stack:
1234 CFI_ADJUST_CFA_OFFSET 4 1359 CFI_ADJUST_CFA_OFFSET 4
1235 pushl %esp 1360 pushl %esp
1236 CFI_ADJUST_CFA_OFFSET 4 1361 CFI_ADJUST_CFA_OFFSET 4
1237 addw $4, (%esp) 1362 addl $4, (%esp)
1238 /* copy the iret frame of 12 bytes */ 1363 /* copy the iret frame of 12 bytes */
1239 .rept 3 1364 .rept 3
1240 pushl 16(%esp) 1365 pushl 16(%esp)
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index a1346217e43c..83d1836b9467 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -48,10 +48,11 @@
48#include <asm/unistd.h> 48#include <asm/unistd.h>
49#include <asm/thread_info.h> 49#include <asm/thread_info.h>
50#include <asm/hw_irq.h> 50#include <asm/hw_irq.h>
51#include <asm/page.h> 51#include <asm/page_types.h>
52#include <asm/irqflags.h> 52#include <asm/irqflags.h>
53#include <asm/paravirt.h> 53#include <asm/paravirt.h>
54#include <asm/ftrace.h> 54#include <asm/ftrace.h>
55#include <asm/percpu.h>
55 56
56/* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ 57/* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
57#include <linux/elf-em.h> 58#include <linux/elf-em.h>
@@ -76,20 +77,17 @@ ENTRY(ftrace_caller)
76 movq 8(%rbp), %rsi 77 movq 8(%rbp), %rsi
77 subq $MCOUNT_INSN_SIZE, %rdi 78 subq $MCOUNT_INSN_SIZE, %rdi
78 79
79.globl ftrace_call 80GLOBAL(ftrace_call)
80ftrace_call:
81 call ftrace_stub 81 call ftrace_stub
82 82
83 MCOUNT_RESTORE_FRAME 83 MCOUNT_RESTORE_FRAME
84 84
85#ifdef CONFIG_FUNCTION_GRAPH_TRACER 85#ifdef CONFIG_FUNCTION_GRAPH_TRACER
86.globl ftrace_graph_call 86GLOBAL(ftrace_graph_call)
87ftrace_graph_call:
88 jmp ftrace_stub 87 jmp ftrace_stub
89#endif 88#endif
90 89
91.globl ftrace_stub 90GLOBAL(ftrace_stub)
92ftrace_stub:
93 retq 91 retq
94END(ftrace_caller) 92END(ftrace_caller)
95 93
@@ -109,8 +107,7 @@ ENTRY(mcount)
109 jnz ftrace_graph_caller 107 jnz ftrace_graph_caller
110#endif 108#endif
111 109
112.globl ftrace_stub 110GLOBAL(ftrace_stub)
113ftrace_stub:
114 retq 111 retq
115 112
116trace: 113trace:
@@ -147,9 +144,7 @@ ENTRY(ftrace_graph_caller)
147 retq 144 retq
148END(ftrace_graph_caller) 145END(ftrace_graph_caller)
149 146
150 147GLOBAL(return_to_handler)
151.globl return_to_handler
152return_to_handler:
153 subq $80, %rsp 148 subq $80, %rsp
154 149
155 movq %rax, (%rsp) 150 movq %rax, (%rsp)
@@ -187,6 +182,7 @@ return_to_handler:
187ENTRY(native_usergs_sysret64) 182ENTRY(native_usergs_sysret64)
188 swapgs 183 swapgs
189 sysretq 184 sysretq
185ENDPROC(native_usergs_sysret64)
190#endif /* CONFIG_PARAVIRT */ 186#endif /* CONFIG_PARAVIRT */
191 187
192 188
@@ -209,7 +205,7 @@ ENTRY(native_usergs_sysret64)
209 205
210 /* %rsp:at FRAMEEND */ 206 /* %rsp:at FRAMEEND */
211 .macro FIXUP_TOP_OF_STACK tmp offset=0 207 .macro FIXUP_TOP_OF_STACK tmp offset=0
212 movq %gs:pda_oldrsp,\tmp 208 movq PER_CPU_VAR(old_rsp),\tmp
213 movq \tmp,RSP+\offset(%rsp) 209 movq \tmp,RSP+\offset(%rsp)
214 movq $__USER_DS,SS+\offset(%rsp) 210 movq $__USER_DS,SS+\offset(%rsp)
215 movq $__USER_CS,CS+\offset(%rsp) 211 movq $__USER_CS,CS+\offset(%rsp)
@@ -220,7 +216,7 @@ ENTRY(native_usergs_sysret64)
220 216
221 .macro RESTORE_TOP_OF_STACK tmp offset=0 217 .macro RESTORE_TOP_OF_STACK tmp offset=0
222 movq RSP+\offset(%rsp),\tmp 218 movq RSP+\offset(%rsp),\tmp
223 movq \tmp,%gs:pda_oldrsp 219 movq \tmp,PER_CPU_VAR(old_rsp)
224 movq EFLAGS+\offset(%rsp),\tmp 220 movq EFLAGS+\offset(%rsp),\tmp
225 movq \tmp,R11+\offset(%rsp) 221 movq \tmp,R11+\offset(%rsp)
226 .endm 222 .endm
@@ -336,15 +332,15 @@ ENTRY(save_args)
336 je 1f 332 je 1f
337 SWAPGS 333 SWAPGS
338 /* 334 /*
339 * irqcount is used to check if a CPU is already on an interrupt stack 335 * irq_count is used to check if a CPU is already on an interrupt stack
340 * or not. While this is essentially redundant with preempt_count it is 336 * or not. While this is essentially redundant with preempt_count it is
341 * a little cheaper to use a separate counter in the PDA (short of 337 * a little cheaper to use a separate counter in the PDA (short of
342 * moving irq_enter into assembly, which would be too much work) 338 * moving irq_enter into assembly, which would be too much work)
343 */ 339 */
3441: incl %gs:pda_irqcount 3401: incl PER_CPU_VAR(irq_count)
345 jne 2f 341 jne 2f
346 popq_cfi %rax /* move return address... */ 342 popq_cfi %rax /* move return address... */
347 mov %gs:pda_irqstackptr,%rsp 343 mov PER_CPU_VAR(irq_stack_ptr),%rsp
348 EMPTY_FRAME 0 344 EMPTY_FRAME 0
349 pushq_cfi %rbp /* backlink for unwinder */ 345 pushq_cfi %rbp /* backlink for unwinder */
350 pushq_cfi %rax /* ... to the new stack */ 346 pushq_cfi %rax /* ... to the new stack */
@@ -409,6 +405,8 @@ END(save_paranoid)
409ENTRY(ret_from_fork) 405ENTRY(ret_from_fork)
410 DEFAULT_FRAME 406 DEFAULT_FRAME
411 407
408 LOCK ; btr $TIF_FORK,TI_flags(%r8)
409
412 push kernel_eflags(%rip) 410 push kernel_eflags(%rip)
413 CFI_ADJUST_CFA_OFFSET 8 411 CFI_ADJUST_CFA_OFFSET 8
414 popf # reset kernel eflags 412 popf # reset kernel eflags
@@ -468,7 +466,7 @@ END(ret_from_fork)
468ENTRY(system_call) 466ENTRY(system_call)
469 CFI_STARTPROC simple 467 CFI_STARTPROC simple
470 CFI_SIGNAL_FRAME 468 CFI_SIGNAL_FRAME
471 CFI_DEF_CFA rsp,PDA_STACKOFFSET 469 CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET
472 CFI_REGISTER rip,rcx 470 CFI_REGISTER rip,rcx
473 /*CFI_REGISTER rflags,r11*/ 471 /*CFI_REGISTER rflags,r11*/
474 SWAPGS_UNSAFE_STACK 472 SWAPGS_UNSAFE_STACK
@@ -479,8 +477,8 @@ ENTRY(system_call)
479 */ 477 */
480ENTRY(system_call_after_swapgs) 478ENTRY(system_call_after_swapgs)
481 479
482 movq %rsp,%gs:pda_oldrsp 480 movq %rsp,PER_CPU_VAR(old_rsp)
483 movq %gs:pda_kernelstack,%rsp 481 movq PER_CPU_VAR(kernel_stack),%rsp
484 /* 482 /*
485 * No need to follow this irqs off/on section - it's straight 483 * No need to follow this irqs off/on section - it's straight
486 * and short: 484 * and short:
@@ -523,7 +521,7 @@ sysret_check:
523 CFI_REGISTER rip,rcx 521 CFI_REGISTER rip,rcx
524 RESTORE_ARGS 0,-ARG_SKIP,1 522 RESTORE_ARGS 0,-ARG_SKIP,1
525 /*CFI_REGISTER rflags,r11*/ 523 /*CFI_REGISTER rflags,r11*/
526 movq %gs:pda_oldrsp, %rsp 524 movq PER_CPU_VAR(old_rsp), %rsp
527 USERGS_SYSRET64 525 USERGS_SYSRET64
528 526
529 CFI_RESTORE_STATE 527 CFI_RESTORE_STATE
@@ -630,16 +628,14 @@ tracesys:
630 * Syscall return path ending with IRET. 628 * Syscall return path ending with IRET.
631 * Has correct top of stack, but partial stack frame. 629 * Has correct top of stack, but partial stack frame.
632 */ 630 */
633 .globl int_ret_from_sys_call 631GLOBAL(int_ret_from_sys_call)
634 .globl int_with_check
635int_ret_from_sys_call:
636 DISABLE_INTERRUPTS(CLBR_NONE) 632 DISABLE_INTERRUPTS(CLBR_NONE)
637 TRACE_IRQS_OFF 633 TRACE_IRQS_OFF
638 testl $3,CS-ARGOFFSET(%rsp) 634 testl $3,CS-ARGOFFSET(%rsp)
639 je retint_restore_args 635 je retint_restore_args
640 movl $_TIF_ALLWORK_MASK,%edi 636 movl $_TIF_ALLWORK_MASK,%edi
641 /* edi: mask to check */ 637 /* edi: mask to check */
642int_with_check: 638GLOBAL(int_with_check)
643 LOCKDEP_SYS_EXIT_IRQ 639 LOCKDEP_SYS_EXIT_IRQ
644 GET_THREAD_INFO(%rcx) 640 GET_THREAD_INFO(%rcx)
645 movl TI_flags(%rcx),%edx 641 movl TI_flags(%rcx),%edx
@@ -833,11 +829,11 @@ common_interrupt:
833 XCPT_FRAME 829 XCPT_FRAME
834 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ 830 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
835 interrupt do_IRQ 831 interrupt do_IRQ
836 /* 0(%rsp): oldrsp-ARGOFFSET */ 832 /* 0(%rsp): old_rsp-ARGOFFSET */
837ret_from_intr: 833ret_from_intr:
838 DISABLE_INTERRUPTS(CLBR_NONE) 834 DISABLE_INTERRUPTS(CLBR_NONE)
839 TRACE_IRQS_OFF 835 TRACE_IRQS_OFF
840 decl %gs:pda_irqcount 836 decl PER_CPU_VAR(irq_count)
841 leaveq 837 leaveq
842 CFI_DEF_CFA_REGISTER rsp 838 CFI_DEF_CFA_REGISTER rsp
843 CFI_ADJUST_CFA_OFFSET -8 839 CFI_ADJUST_CFA_OFFSET -8
@@ -982,8 +978,10 @@ apicinterrupt IRQ_MOVE_CLEANUP_VECTOR \
982 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt 978 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
983#endif 979#endif
984 980
981#ifdef CONFIG_X86_UV
985apicinterrupt UV_BAU_MESSAGE \ 982apicinterrupt UV_BAU_MESSAGE \
986 uv_bau_message_intr1 uv_bau_message_interrupt 983 uv_bau_message_intr1 uv_bau_message_interrupt
984#endif
987apicinterrupt LOCAL_TIMER_VECTOR \ 985apicinterrupt LOCAL_TIMER_VECTOR \
988 apic_timer_interrupt smp_apic_timer_interrupt 986 apic_timer_interrupt smp_apic_timer_interrupt
989 987
@@ -1073,10 +1071,10 @@ ENTRY(\sym)
1073 TRACE_IRQS_OFF 1071 TRACE_IRQS_OFF
1074 movq %rsp,%rdi /* pt_regs pointer */ 1072 movq %rsp,%rdi /* pt_regs pointer */
1075 xorl %esi,%esi /* no error code */ 1073 xorl %esi,%esi /* no error code */
1076 movq %gs:pda_data_offset, %rbp 1074 PER_CPU(init_tss, %rbp)
1077 subq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp) 1075 subq $EXCEPTION_STKSZ, TSS_ist + (\ist - 1) * 8(%rbp)
1078 call \do_sym 1076 call \do_sym
1079 addq $EXCEPTION_STKSZ, per_cpu__init_tss + TSS_ist + (\ist - 1) * 8(%rbp) 1077 addq $EXCEPTION_STKSZ, TSS_ist + (\ist - 1) * 8(%rbp)
1080 jmp paranoid_exit /* %ebx: no swapgs flag */ 1078 jmp paranoid_exit /* %ebx: no swapgs flag */
1081 CFI_ENDPROC 1079 CFI_ENDPROC
1082END(\sym) 1080END(\sym)
@@ -1138,7 +1136,7 @@ ENTRY(native_load_gs_index)
1138 CFI_STARTPROC 1136 CFI_STARTPROC
1139 pushf 1137 pushf
1140 CFI_ADJUST_CFA_OFFSET 8 1138 CFI_ADJUST_CFA_OFFSET 8
1141 DISABLE_INTERRUPTS(CLBR_ANY | ~(CLBR_RDI)) 1139 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1142 SWAPGS 1140 SWAPGS
1143gs_change: 1141gs_change:
1144 movl %edi,%gs 1142 movl %edi,%gs
@@ -1260,14 +1258,14 @@ ENTRY(call_softirq)
1260 CFI_REL_OFFSET rbp,0 1258 CFI_REL_OFFSET rbp,0
1261 mov %rsp,%rbp 1259 mov %rsp,%rbp
1262 CFI_DEF_CFA_REGISTER rbp 1260 CFI_DEF_CFA_REGISTER rbp
1263 incl %gs:pda_irqcount 1261 incl PER_CPU_VAR(irq_count)
1264 cmove %gs:pda_irqstackptr,%rsp 1262 cmove PER_CPU_VAR(irq_stack_ptr),%rsp
1265 push %rbp # backlink for old unwinder 1263 push %rbp # backlink for old unwinder
1266 call __do_softirq 1264 call __do_softirq
1267 leaveq 1265 leaveq
1268 CFI_DEF_CFA_REGISTER rsp 1266 CFI_DEF_CFA_REGISTER rsp
1269 CFI_ADJUST_CFA_OFFSET -8 1267 CFI_ADJUST_CFA_OFFSET -8
1270 decl %gs:pda_irqcount 1268 decl PER_CPU_VAR(irq_count)
1271 ret 1269 ret
1272 CFI_ENDPROC 1270 CFI_ENDPROC
1273END(call_softirq) 1271END(call_softirq)
@@ -1297,15 +1295,15 @@ ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1297 movq %rdi, %rsp # we don't return, adjust the stack frame 1295 movq %rdi, %rsp # we don't return, adjust the stack frame
1298 CFI_ENDPROC 1296 CFI_ENDPROC
1299 DEFAULT_FRAME 1297 DEFAULT_FRAME
130011: incl %gs:pda_irqcount 129811: incl PER_CPU_VAR(irq_count)
1301 movq %rsp,%rbp 1299 movq %rsp,%rbp
1302 CFI_DEF_CFA_REGISTER rbp 1300 CFI_DEF_CFA_REGISTER rbp
1303 cmovzq %gs:pda_irqstackptr,%rsp 1301 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
1304 pushq %rbp # backlink for old unwinder 1302 pushq %rbp # backlink for old unwinder
1305 call xen_evtchn_do_upcall 1303 call xen_evtchn_do_upcall
1306 popq %rsp 1304 popq %rsp
1307 CFI_DEF_CFA_REGISTER rsp 1305 CFI_DEF_CFA_REGISTER rsp
1308 decl %gs:pda_irqcount 1306 decl PER_CPU_VAR(irq_count)
1309 jmp error_exit 1307 jmp error_exit
1310 CFI_ENDPROC 1308 CFI_ENDPROC
1311END(do_hypervisor_callback) 1309END(do_hypervisor_callback)
diff --git a/arch/x86/kernel/es7000_32.c b/arch/x86/kernel/es7000_32.c
deleted file mode 100644
index 53699c931ad4..000000000000
--- a/arch/x86/kernel/es7000_32.c
+++ /dev/null
@@ -1,378 +0,0 @@
1/*
2 * Written by: Garry Forsgren, Unisys Corporation
3 * Natalie Protasevich, Unisys Corporation
4 * This file contains the code to configure and interface
5 * with Unisys ES7000 series hardware system manager.
6 *
7 * Copyright (c) 2003 Unisys Corporation. All Rights Reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it would be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 *
21 * Contact information: Unisys Corporation, Township Line & Union Meeting
22 * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
23 *
24 * http://www.unisys.com
25 */
26
27#include <linux/module.h>
28#include <linux/types.h>
29#include <linux/kernel.h>
30#include <linux/smp.h>
31#include <linux/string.h>
32#include <linux/spinlock.h>
33#include <linux/errno.h>
34#include <linux/notifier.h>
35#include <linux/reboot.h>
36#include <linux/init.h>
37#include <linux/acpi.h>
38#include <asm/io.h>
39#include <asm/nmi.h>
40#include <asm/smp.h>
41#include <asm/atomic.h>
42#include <asm/apicdef.h>
43#include <mach_mpparse.h>
44#include <asm/genapic.h>
45#include <asm/setup.h>
46
47/*
48 * ES7000 chipsets
49 */
50
51#define NON_UNISYS 0
52#define ES7000_CLASSIC 1
53#define ES7000_ZORRO 2
54
55
56#define MIP_REG 1
57#define MIP_PSAI_REG 4
58
59#define MIP_BUSY 1
60#define MIP_SPIN 0xf0000
61#define MIP_VALID 0x0100000000000000ULL
62#define MIP_PORT(VALUE) ((VALUE >> 32) & 0xffff)
63
64#define MIP_RD_LO(VALUE) (VALUE & 0xffffffff)
65
66struct mip_reg_info {
67 unsigned long long mip_info;
68 unsigned long long delivery_info;
69 unsigned long long host_reg;
70 unsigned long long mip_reg;
71};
72
73struct part_info {
74 unsigned char type;
75 unsigned char length;
76 unsigned char part_id;
77 unsigned char apic_mode;
78 unsigned long snum;
79 char ptype[16];
80 char sname[64];
81 char pname[64];
82};
83
84struct psai {
85 unsigned long long entry_type;
86 unsigned long long addr;
87 unsigned long long bep_addr;
88};
89
90struct es7000_mem_info {
91 unsigned char type;
92 unsigned char length;
93 unsigned char resv[6];
94 unsigned long long start;
95 unsigned long long size;
96};
97
98struct es7000_oem_table {
99 unsigned long long hdr;
100 struct mip_reg_info mip;
101 struct part_info pif;
102 struct es7000_mem_info shm;
103 struct psai psai;
104};
105
106#ifdef CONFIG_ACPI
107
108struct oem_table {
109 struct acpi_table_header Header;
110 u32 OEMTableAddr;
111 u32 OEMTableSize;
112};
113
114extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
115extern void unmap_unisys_acpi_oem_table(unsigned long oem_addr);
116#endif
117
118struct mip_reg {
119 unsigned long long off_0;
120 unsigned long long off_8;
121 unsigned long long off_10;
122 unsigned long long off_18;
123 unsigned long long off_20;
124 unsigned long long off_28;
125 unsigned long long off_30;
126 unsigned long long off_38;
127};
128
129#define MIP_SW_APIC 0x1020b
130#define MIP_FUNC(VALUE) (VALUE & 0xff)
131
132/*
133 * ES7000 Globals
134 */
135
136static volatile unsigned long *psai = NULL;
137static struct mip_reg *mip_reg;
138static struct mip_reg *host_reg;
139static int mip_port;
140static unsigned long mip_addr, host_addr;
141
142int es7000_plat;
143
144/*
145 * GSI override for ES7000 platforms.
146 */
147
148static unsigned int base;
149
150static int
151es7000_rename_gsi(int ioapic, int gsi)
152{
153 if (es7000_plat == ES7000_ZORRO)
154 return gsi;
155
156 if (!base) {
157 int i;
158 for (i = 0; i < nr_ioapics; i++)
159 base += nr_ioapic_registers[i];
160 }
161
162 if (!ioapic && (gsi < 16))
163 gsi += base;
164 return gsi;
165}
166
167static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip)
168{
169 unsigned long vect = 0, psaival = 0;
170
171 if (psai == NULL)
172 return -1;
173
174 vect = ((unsigned long)__pa(eip)/0x1000) << 16;
175 psaival = (0x1000000 | vect | cpu);
176
177 while (*psai & 0x1000000)
178 ;
179
180 *psai = psaival;
181
182 return 0;
183}
184
185static void noop_wait_for_deassert(atomic_t *deassert_not_used)
186{
187}
188
189static int __init es7000_update_genapic(void)
190{
191 genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
192
193 /* MPENTIUMIII */
194 if (boot_cpu_data.x86 == 6 &&
195 (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) {
196 es7000_update_genapic_to_cluster();
197 genapic->wait_for_init_deassert = noop_wait_for_deassert;
198 genapic->wakeup_cpu = wakeup_secondary_cpu_via_mip;
199 }
200
201 return 0;
202}
203
204void __init
205setup_unisys(void)
206{
207 /*
208 * Determine the generation of the ES7000 currently running.
209 *
210 * es7000_plat = 1 if the machine is a 5xx ES7000 box
211 * es7000_plat = 2 if the machine is a x86_64 ES7000 box
212 *
213 */
214 if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
215 es7000_plat = ES7000_ZORRO;
216 else
217 es7000_plat = ES7000_CLASSIC;
218 ioapic_renumber_irq = es7000_rename_gsi;
219
220 x86_quirks->update_genapic = es7000_update_genapic;
221}
222
223/*
224 * Parse the OEM Table
225 */
226
227int __init
228parse_unisys_oem (char *oemptr)
229{
230 int i;
231 int success = 0;
232 unsigned char type, size;
233 unsigned long val;
234 char *tp = NULL;
235 struct psai *psaip = NULL;
236 struct mip_reg_info *mi;
237 struct mip_reg *host, *mip;
238
239 tp = oemptr;
240
241 tp += 8;
242
243 for (i=0; i <= 6; i++) {
244 type = *tp++;
245 size = *tp++;
246 tp -= 2;
247 switch (type) {
248 case MIP_REG:
249 mi = (struct mip_reg_info *)tp;
250 val = MIP_RD_LO(mi->host_reg);
251 host_addr = val;
252 host = (struct mip_reg *)val;
253 host_reg = __va(host);
254 val = MIP_RD_LO(mi->mip_reg);
255 mip_port = MIP_PORT(mi->mip_info);
256 mip_addr = val;
257 mip = (struct mip_reg *)val;
258 mip_reg = __va(mip);
259 pr_debug("es7000_mipcfg: host_reg = 0x%lx \n",
260 (unsigned long)host_reg);
261 pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n",
262 (unsigned long)mip_reg);
263 success++;
264 break;
265 case MIP_PSAI_REG:
266 psaip = (struct psai *)tp;
267 if (tp != NULL) {
268 if (psaip->addr)
269 psai = __va(psaip->addr);
270 else
271 psai = NULL;
272 success++;
273 }
274 break;
275 default:
276 break;
277 }
278 tp += size;
279 }
280
281 if (success < 2) {
282 es7000_plat = NON_UNISYS;
283 } else
284 setup_unisys();
285 return es7000_plat;
286}
287
288#ifdef CONFIG_ACPI
289static unsigned long oem_addrX;
290static unsigned long oem_size;
291int __init find_unisys_acpi_oem_table(unsigned long *oem_addr)
292{
293 struct acpi_table_header *header = NULL;
294 int i = 0;
295
296 while (ACPI_SUCCESS(acpi_get_table("OEM1", i++, &header))) {
297 if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) {
298 struct oem_table *t = (struct oem_table *)header;
299
300 oem_addrX = t->OEMTableAddr;
301 oem_size = t->OEMTableSize;
302
303 *oem_addr = (unsigned long)__acpi_map_table(oem_addrX,
304 oem_size);
305 return 0;
306 }
307 }
308 return -1;
309}
310
311void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr)
312{
313}
314#endif
315
316static void
317es7000_spin(int n)
318{
319 int i = 0;
320
321 while (i++ < n)
322 rep_nop();
323}
324
325static int __init
326es7000_mip_write(struct mip_reg *mip_reg)
327{
328 int status = 0;
329 int spin;
330
331 spin = MIP_SPIN;
332 while (((unsigned long long)host_reg->off_38 &
333 (unsigned long long)MIP_VALID) != 0) {
334 if (--spin <= 0) {
335 printk("es7000_mip_write: Timeout waiting for Host Valid Flag");
336 return -1;
337 }
338 es7000_spin(MIP_SPIN);
339 }
340
341 memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
342 outb(1, mip_port);
343
344 spin = MIP_SPIN;
345
346 while (((unsigned long long)mip_reg->off_38 &
347 (unsigned long long)MIP_VALID) == 0) {
348 if (--spin <= 0) {
349 printk("es7000_mip_write: Timeout waiting for MIP Valid Flag");
350 return -1;
351 }
352 es7000_spin(MIP_SPIN);
353 }
354
355 status = ((unsigned long long)mip_reg->off_0 &
356 (unsigned long long)0xffff0000000000ULL) >> 48;
357 mip_reg->off_38 = ((unsigned long long)mip_reg->off_38 &
358 (unsigned long long)~MIP_VALID);
359 return status;
360}
361
362void __init
363es7000_sw_apic(void)
364{
365 if (es7000_plat) {
366 int mip_status;
367 struct mip_reg es7000_mip_reg;
368
369 printk("ES7000: Enabling APIC mode.\n");
370 memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
371 es7000_mip_reg.off_0 = MIP_SW_APIC;
372 es7000_mip_reg.off_38 = (MIP_VALID);
373 while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0)
374 printk("es7000_sw_apic: command failed, status = %x\n",
375 mip_status);
376 return;
377 }
378}
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index b9a4d8c4b935..f5b272247690 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -26,27 +26,6 @@
26#include <asm/bios_ebda.h> 26#include <asm/bios_ebda.h>
27#include <asm/trampoline.h> 27#include <asm/trampoline.h>
28 28
29/* boot cpu pda */
30static struct x8664_pda _boot_cpu_pda;
31
32#ifdef CONFIG_SMP
33/*
34 * We install an empty cpu_pda pointer table to indicate to early users
35 * (numa_set_node) that the cpu_pda pointer table for cpus other than
36 * the boot cpu is not yet setup.
37 */
38static struct x8664_pda *__cpu_pda[NR_CPUS] __initdata;
39#else
40static struct x8664_pda *__cpu_pda[NR_CPUS] __read_mostly;
41#endif
42
43void __init x86_64_init_pda(void)
44{
45 _cpu_pda = __cpu_pda;
46 cpu_pda(0) = &_boot_cpu_pda;
47 pda_init(0);
48}
49
50static void __init zap_identity_mappings(void) 29static void __init zap_identity_mappings(void)
51{ 30{
52 pgd_t *pgd = pgd_offset_k(0UL); 31 pgd_t *pgd = pgd_offset_k(0UL);
@@ -112,8 +91,6 @@ void __init x86_64_start_kernel(char * real_mode_data)
112 if (console_loglevel == 10) 91 if (console_loglevel == 10)
113 early_printk("Kernel alive\n"); 92 early_printk("Kernel alive\n");
114 93
115 x86_64_init_pda();
116
117 x86_64_start_reservations(real_mode_data); 94 x86_64_start_reservations(real_mode_data);
118} 95}
119 96
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index e835b4eea70b..c32ca19d591a 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -11,14 +11,15 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/linkage.h> 12#include <linux/linkage.h>
13#include <asm/segment.h> 13#include <asm/segment.h>
14#include <asm/page.h> 14#include <asm/page_types.h>
15#include <asm/pgtable.h> 15#include <asm/pgtable_types.h>
16#include <asm/desc.h> 16#include <asm/desc.h>
17#include <asm/cache.h> 17#include <asm/cache.h>
18#include <asm/thread_info.h> 18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h> 19#include <asm/asm-offsets.h>
20#include <asm/setup.h> 20#include <asm/setup.h>
21#include <asm/processor-flags.h> 21#include <asm/processor-flags.h>
22#include <asm/percpu.h>
22 23
23/* Physical address */ 24/* Physical address */
24#define pa(X) ((X) - __PAGE_OFFSET) 25#define pa(X) ((X) - __PAGE_OFFSET)
@@ -429,14 +430,34 @@ is386: movl $2,%ecx # set MP
429 ljmp $(__KERNEL_CS),$1f 430 ljmp $(__KERNEL_CS),$1f
4301: movl $(__KERNEL_DS),%eax # reload all the segment registers 4311: movl $(__KERNEL_DS),%eax # reload all the segment registers
431 movl %eax,%ss # after changing gdt. 432 movl %eax,%ss # after changing gdt.
432 movl %eax,%fs # gets reset once there's real percpu
433 433
434 movl $(__USER_DS),%eax # DS/ES contains default USER segment 434 movl $(__USER_DS),%eax # DS/ES contains default USER segment
435 movl %eax,%ds 435 movl %eax,%ds
436 movl %eax,%es 436 movl %eax,%es
437 437
438 xorl %eax,%eax # Clear GS and LDT 438 movl $(__KERNEL_PERCPU), %eax
439 movl %eax,%fs # set this cpu's percpu
440
441#ifdef CONFIG_CC_STACKPROTECTOR
442 /*
443 * The linker can't handle this by relocation. Manually set
444 * base address in stack canary segment descriptor.
445 */
446 cmpb $0,ready
447 jne 1f
448 movl $per_cpu__gdt_page,%eax
449 movl $per_cpu__stack_canary,%ecx
450 subl $20, %ecx
451 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
452 shrl $16, %ecx
453 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
454 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
4551:
456#endif
457 movl $(__KERNEL_STACK_CANARY),%eax
439 movl %eax,%gs 458 movl %eax,%gs
459
460 xorl %eax,%eax # Clear LDT
440 lldt %ax 461 lldt %ax
441 462
442 cld # gcc2 wants the direction flag cleared at all times 463 cld # gcc2 wants the direction flag cleared at all times
@@ -446,8 +467,6 @@ is386: movl $2,%ecx # set MP
446 movb $1, ready 467 movb $1, ready
447 cmpb $0,%cl # the first CPU calls start_kernel 468 cmpb $0,%cl # the first CPU calls start_kernel
448 je 1f 469 je 1f
449 movl $(__KERNEL_PERCPU), %eax
450 movl %eax,%fs # set this cpu's percpu
451 movl (stack_start), %esp 470 movl (stack_start), %esp
4521: 4711:
453#endif /* CONFIG_SMP */ 472#endif /* CONFIG_SMP */
@@ -548,12 +567,8 @@ early_fault:
548 pushl %eax 567 pushl %eax
549 pushl %edx /* trapno */ 568 pushl %edx /* trapno */
550 pushl $fault_msg 569 pushl $fault_msg
551#ifdef CONFIG_EARLY_PRINTK
552 call early_printk
553#else
554 call printk 570 call printk
555#endif 571#endif
556#endif
557 call dump_stack 572 call dump_stack
558hlt_loop: 573hlt_loop:
559 hlt 574 hlt
@@ -580,11 +595,10 @@ ignore_int:
580 pushl 32(%esp) 595 pushl 32(%esp)
581 pushl 40(%esp) 596 pushl 40(%esp)
582 pushl $int_msg 597 pushl $int_msg
583#ifdef CONFIG_EARLY_PRINTK
584 call early_printk
585#else
586 call printk 598 call printk
587#endif 599
600 call dump_stack
601
588 addl $(5*4),%esp 602 addl $(5*4),%esp
589 popl %ds 603 popl %ds
590 popl %es 604 popl %es
@@ -660,7 +674,7 @@ early_recursion_flag:
660 .long 0 674 .long 0
661 675
662int_msg: 676int_msg:
663 .asciz "Unknown interrupt or fault at EIP %p %p %p\n" 677 .asciz "Unknown interrupt or fault at: %p %p %p\n"
664 678
665fault_msg: 679fault_msg:
666/* fault info: */ 680/* fault info: */
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 0e275d495563..54b29bb24e71 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -19,6 +19,7 @@
19#include <asm/msr.h> 19#include <asm/msr.h>
20#include <asm/cache.h> 20#include <asm/cache.h>
21#include <asm/processor-flags.h> 21#include <asm/processor-flags.h>
22#include <asm/percpu.h>
22 23
23#ifdef CONFIG_PARAVIRT 24#ifdef CONFIG_PARAVIRT
24#include <asm/asm-offsets.h> 25#include <asm/asm-offsets.h>
@@ -226,12 +227,15 @@ ENTRY(secondary_startup_64)
226 movl %eax,%fs 227 movl %eax,%fs
227 movl %eax,%gs 228 movl %eax,%gs
228 229
229 /* 230 /* Set up %gs.
230 * Setup up a dummy PDA. this is just for some early bootup code 231 *
231 * that does in_interrupt() 232 * The base of %gs always points to the bottom of the irqstack
232 */ 233 * union. If the stack protector canary is enabled, it is
234 * located at %gs:40. Note that, on SMP, the boot cpu uses
235 * init data section till per cpu areas are set up.
236 */
233 movl $MSR_GS_BASE,%ecx 237 movl $MSR_GS_BASE,%ecx
234 movq $empty_zero_page,%rax 238 movq initial_gs(%rip),%rax
235 movq %rax,%rdx 239 movq %rax,%rdx
236 shrq $32,%rdx 240 shrq $32,%rdx
237 wrmsr 241 wrmsr
@@ -257,6 +261,8 @@ ENTRY(secondary_startup_64)
257 .align 8 261 .align 8
258 ENTRY(initial_code) 262 ENTRY(initial_code)
259 .quad x86_64_start_kernel 263 .quad x86_64_start_kernel
264 ENTRY(initial_gs)
265 .quad INIT_PER_CPU_VAR(irq_stack_union)
260 __FINITDATA 266 __FINITDATA
261 267
262 ENTRY(stack_start) 268 ENTRY(stack_start)
@@ -323,8 +329,6 @@ early_idt_ripmsg:
323#endif /* CONFIG_EARLY_PRINTK */ 329#endif /* CONFIG_EARLY_PRINTK */
324 .previous 330 .previous
325 331
326.balign PAGE_SIZE
327
328#define NEXT_PAGE(name) \ 332#define NEXT_PAGE(name) \
329 .balign PAGE_SIZE; \ 333 .balign PAGE_SIZE; \
330ENTRY(name) 334ENTRY(name)
@@ -401,7 +405,8 @@ NEXT_PAGE(level2_spare_pgt)
401 .globl early_gdt_descr 405 .globl early_gdt_descr
402early_gdt_descr: 406early_gdt_descr:
403 .word GDT_ENTRIES*8-1 407 .word GDT_ENTRIES*8-1
404 .quad per_cpu__gdt_page 408early_gdt_descr_base:
409 .quad INIT_PER_CPU_VAR(gdt_page)
405 410
406ENTRY(phys_base) 411ENTRY(phys_base)
407 /* This must match the first entry in level2_kernel_pgt */ 412 /* This must match the first entry in level2_kernel_pgt */
@@ -412,7 +417,7 @@ ENTRY(phys_base)
412 .section .bss, "aw", @nobits 417 .section .bss, "aw", @nobits
413 .align L1_CACHE_BYTES 418 .align L1_CACHE_BYTES
414ENTRY(idt_table) 419ENTRY(idt_table)
415 .skip 256 * 16 420 .skip IDT_ENTRIES * 16
416 421
417 .section .bss.page_aligned, "aw", @nobits 422 .section .bss.page_aligned, "aw", @nobits
418 .align PAGE_SIZE 423 .align PAGE_SIZE
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index 11d5093eb281..df89102bef80 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -22,7 +22,6 @@
22#include <asm/pgtable.h> 22#include <asm/pgtable.h>
23#include <asm/desc.h> 23#include <asm/desc.h>
24#include <asm/apic.h> 24#include <asm/apic.h>
25#include <asm/arch_hooks.h>
26#include <asm/i8259.h> 25#include <asm/i8259.h>
27 26
28/* 27/*
diff --git a/arch/x86/kernel/ioport.c b/arch/x86/kernel/ioport.c
index b12208f4dfee..99c4d308f16b 100644
--- a/arch/x86/kernel/ioport.c
+++ b/arch/x86/kernel/ioport.c
@@ -85,19 +85,8 @@ asmlinkage long sys_ioperm(unsigned long from, unsigned long num, int turn_on)
85 85
86 t->io_bitmap_max = bytes; 86 t->io_bitmap_max = bytes;
87 87
88#ifdef CONFIG_X86_32
89 /*
90 * Sets the lazy trigger so that the next I/O operation will
91 * reload the correct bitmap.
92 * Reset the owner so that a process switch will not set
93 * tss->io_bitmap_base to IO_BITMAP_OFFSET.
94 */
95 tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET_LAZY;
96 tss->io_bitmap_owner = NULL;
97#else
98 /* Update the TSS: */ 88 /* Update the TSS: */
99 memcpy(tss->io_bitmap, t->io_bitmap_ptr, bytes_updated); 89 memcpy(tss->io_bitmap, t->io_bitmap_ptr, bytes_updated);
100#endif
101 90
102 put_cpu(); 91 put_cpu();
103 92
@@ -131,9 +120,8 @@ static int do_iopl(unsigned int level, struct pt_regs *regs)
131} 120}
132 121
133#ifdef CONFIG_X86_32 122#ifdef CONFIG_X86_32
134asmlinkage long sys_iopl(unsigned long regsp) 123long sys_iopl(struct pt_regs *regs)
135{ 124{
136 struct pt_regs *regs = (struct pt_regs *)&regsp;
137 unsigned int level = regs->bx; 125 unsigned int level = regs->bx;
138 struct thread_struct *t = &current->thread; 126 struct thread_struct *t = &current->thread;
139 int rc; 127 int rc;
diff --git a/arch/x86/kernel/ipi.c b/arch/x86/kernel/ipi.c
deleted file mode 100644
index 285bbf8831fa..000000000000
--- a/arch/x86/kernel/ipi.c
+++ /dev/null
@@ -1,190 +0,0 @@
1#include <linux/cpumask.h>
2#include <linux/interrupt.h>
3#include <linux/init.h>
4
5#include <linux/mm.h>
6#include <linux/delay.h>
7#include <linux/spinlock.h>
8#include <linux/kernel_stat.h>
9#include <linux/mc146818rtc.h>
10#include <linux/cache.h>
11#include <linux/cpu.h>
12#include <linux/module.h>
13
14#include <asm/smp.h>
15#include <asm/mtrr.h>
16#include <asm/tlbflush.h>
17#include <asm/mmu_context.h>
18#include <asm/apic.h>
19#include <asm/proto.h>
20
21#ifdef CONFIG_X86_32
22#include <mach_apic.h>
23#include <mach_ipi.h>
24
25/*
26 * the following functions deal with sending IPIs between CPUs.
27 *
28 * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.
29 */
30
31static inline int __prepare_ICR(unsigned int shortcut, int vector)
32{
33 unsigned int icr = shortcut | APIC_DEST_LOGICAL;
34
35 switch (vector) {
36 default:
37 icr |= APIC_DM_FIXED | vector;
38 break;
39 case NMI_VECTOR:
40 icr |= APIC_DM_NMI;
41 break;
42 }
43 return icr;
44}
45
46static inline int __prepare_ICR2(unsigned int mask)
47{
48 return SET_APIC_DEST_FIELD(mask);
49}
50
51void __send_IPI_shortcut(unsigned int shortcut, int vector)
52{
53 /*
54 * Subtle. In the case of the 'never do double writes' workaround
55 * we have to lock out interrupts to be safe. As we don't care
56 * of the value read we use an atomic rmw access to avoid costly
57 * cli/sti. Otherwise we use an even cheaper single atomic write
58 * to the APIC.
59 */
60 unsigned int cfg;
61
62 /*
63 * Wait for idle.
64 */
65 apic_wait_icr_idle();
66
67 /*
68 * No need to touch the target chip field
69 */
70 cfg = __prepare_ICR(shortcut, vector);
71
72 /*
73 * Send the IPI. The write to APIC_ICR fires this off.
74 */
75 apic_write(APIC_ICR, cfg);
76}
77
78void send_IPI_self(int vector)
79{
80 __send_IPI_shortcut(APIC_DEST_SELF, vector);
81}
82
83/*
84 * This is used to send an IPI with no shorthand notation (the destination is
85 * specified in bits 56 to 63 of the ICR).
86 */
87static inline void __send_IPI_dest_field(unsigned long mask, int vector)
88{
89 unsigned long cfg;
90
91 /*
92 * Wait for idle.
93 */
94 if (unlikely(vector == NMI_VECTOR))
95 safe_apic_wait_icr_idle();
96 else
97 apic_wait_icr_idle();
98
99 /*
100 * prepare target chip field
101 */
102 cfg = __prepare_ICR2(mask);
103 apic_write(APIC_ICR2, cfg);
104
105 /*
106 * program the ICR
107 */
108 cfg = __prepare_ICR(0, vector);
109
110 /*
111 * Send the IPI. The write to APIC_ICR fires this off.
112 */
113 apic_write(APIC_ICR, cfg);
114}
115
116/*
117 * This is only used on smaller machines.
118 */
119void send_IPI_mask_bitmask(const struct cpumask *cpumask, int vector)
120{
121 unsigned long mask = cpumask_bits(cpumask)[0];
122 unsigned long flags;
123
124 local_irq_save(flags);
125 WARN_ON(mask & ~cpumask_bits(cpu_online_mask)[0]);
126 __send_IPI_dest_field(mask, vector);
127 local_irq_restore(flags);
128}
129
130void send_IPI_mask_sequence(const struct cpumask *mask, int vector)
131{
132 unsigned long flags;
133 unsigned int query_cpu;
134
135 /*
136 * Hack. The clustered APIC addressing mode doesn't allow us to send
137 * to an arbitrary mask, so I do a unicasts to each CPU instead. This
138 * should be modified to do 1 message per cluster ID - mbligh
139 */
140
141 local_irq_save(flags);
142 for_each_cpu(query_cpu, mask)
143 __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu), vector);
144 local_irq_restore(flags);
145}
146
147void send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
148{
149 unsigned long flags;
150 unsigned int query_cpu;
151 unsigned int this_cpu = smp_processor_id();
152
153 /* See Hack comment above */
154
155 local_irq_save(flags);
156 for_each_cpu(query_cpu, mask)
157 if (query_cpu != this_cpu)
158 __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu),
159 vector);
160 local_irq_restore(flags);
161}
162
163/* must come after the send_IPI functions above for inlining */
164static int convert_apicid_to_cpu(int apic_id)
165{
166 int i;
167
168 for_each_possible_cpu(i) {
169 if (per_cpu(x86_cpu_to_apicid, i) == apic_id)
170 return i;
171 }
172 return -1;
173}
174
175int safe_smp_processor_id(void)
176{
177 int apicid, cpuid;
178
179 if (!boot_cpu_has(X86_FEATURE_APIC))
180 return 0;
181
182 apicid = hard_smp_processor_id();
183 if (apicid == BAD_APICID)
184 return 0;
185
186 cpuid = convert_apicid_to_cpu(apicid);
187
188 return cpuid >= 0 ? cpuid : 0;
189}
190#endif
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 3973e2df7f87..f13ca1650aaf 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -6,10 +6,12 @@
6#include <linux/kernel_stat.h> 6#include <linux/kernel_stat.h>
7#include <linux/seq_file.h> 7#include <linux/seq_file.h>
8#include <linux/smp.h> 8#include <linux/smp.h>
9#include <linux/ftrace.h>
9 10
10#include <asm/apic.h> 11#include <asm/apic.h>
11#include <asm/io_apic.h> 12#include <asm/io_apic.h>
12#include <asm/irq.h> 13#include <asm/irq.h>
14#include <asm/idle.h>
13 15
14atomic_t irq_err_count; 16atomic_t irq_err_count;
15 17
@@ -36,11 +38,7 @@ void ack_bad_irq(unsigned int irq)
36#endif 38#endif
37} 39}
38 40
39#ifdef CONFIG_X86_32 41#define irq_stats(x) (&per_cpu(irq_stat, x))
40# define irq_stats(x) (&per_cpu(irq_stat, x))
41#else
42# define irq_stats(x) cpu_pda(x)
43#endif
44/* 42/*
45 * /proc/interrupts printing: 43 * /proc/interrupts printing:
46 */ 44 */
@@ -192,4 +190,40 @@ u64 arch_irq_stat(void)
192 return sum; 190 return sum;
193} 191}
194 192
193
194/*
195 * do_IRQ handles all normal device IRQ's (the special
196 * SMP cross-CPU interrupts have their own specific
197 * handlers).
198 */
199unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
200{
201 struct pt_regs *old_regs = set_irq_regs(regs);
202
203 /* high bit used in ret_from_ code */
204 unsigned vector = ~regs->orig_ax;
205 unsigned irq;
206
207 exit_idle();
208 irq_enter();
209
210 irq = __get_cpu_var(vector_irq)[vector];
211
212 if (!handle_irq(irq, regs)) {
213#ifdef CONFIG_X86_64
214 if (!disable_apic)
215 ack_APIC_irq();
216#endif
217
218 if (printk_ratelimit())
219 printk(KERN_EMERG "%s: %d.%d No irq handler for vector (irq %d)\n",
220 __func__, smp_processor_id(), vector, irq);
221 }
222
223 irq_exit();
224
225 set_irq_regs(old_regs);
226 return 1;
227}
228
195EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq); 229EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c
index 74b9ff7341e9..3b09634a5153 100644
--- a/arch/x86/kernel/irq_32.c
+++ b/arch/x86/kernel/irq_32.c
@@ -16,6 +16,7 @@
16#include <linux/cpu.h> 16#include <linux/cpu.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/uaccess.h> 18#include <linux/uaccess.h>
19#include <linux/percpu.h>
19 20
20#include <asm/apic.h> 21#include <asm/apic.h>
21 22
@@ -55,13 +56,13 @@ static inline void print_stack_overflow(void) { }
55union irq_ctx { 56union irq_ctx {
56 struct thread_info tinfo; 57 struct thread_info tinfo;
57 u32 stack[THREAD_SIZE/sizeof(u32)]; 58 u32 stack[THREAD_SIZE/sizeof(u32)];
58}; 59} __attribute__((aligned(PAGE_SIZE)));
59 60
60static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly; 61static DEFINE_PER_CPU(union irq_ctx *, hardirq_ctx);
61static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly; 62static DEFINE_PER_CPU(union irq_ctx *, softirq_ctx);
62 63
63static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss; 64static DEFINE_PER_CPU_PAGE_ALIGNED(union irq_ctx, hardirq_stack);
64static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss; 65static DEFINE_PER_CPU_PAGE_ALIGNED(union irq_ctx, softirq_stack);
65 66
66static void call_on_stack(void *func, void *stack) 67static void call_on_stack(void *func, void *stack)
67{ 68{
@@ -81,7 +82,7 @@ execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq)
81 u32 *isp, arg1, arg2; 82 u32 *isp, arg1, arg2;
82 83
83 curctx = (union irq_ctx *) current_thread_info(); 84 curctx = (union irq_ctx *) current_thread_info();
84 irqctx = hardirq_ctx[smp_processor_id()]; 85 irqctx = __get_cpu_var(hardirq_ctx);
85 86
86 /* 87 /*
87 * this is where we switch to the IRQ stack. However, if we are 88 * this is where we switch to the IRQ stack. However, if we are
@@ -125,34 +126,34 @@ void __cpuinit irq_ctx_init(int cpu)
125{ 126{
126 union irq_ctx *irqctx; 127 union irq_ctx *irqctx;
127 128
128 if (hardirq_ctx[cpu]) 129 if (per_cpu(hardirq_ctx, cpu))
129 return; 130 return;
130 131
131 irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE]; 132 irqctx = &per_cpu(hardirq_stack, cpu);
132 irqctx->tinfo.task = NULL; 133 irqctx->tinfo.task = NULL;
133 irqctx->tinfo.exec_domain = NULL; 134 irqctx->tinfo.exec_domain = NULL;
134 irqctx->tinfo.cpu = cpu; 135 irqctx->tinfo.cpu = cpu;
135 irqctx->tinfo.preempt_count = HARDIRQ_OFFSET; 136 irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
136 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); 137 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
137 138
138 hardirq_ctx[cpu] = irqctx; 139 per_cpu(hardirq_ctx, cpu) = irqctx;
139 140
140 irqctx = (union irq_ctx *) &softirq_stack[cpu*THREAD_SIZE]; 141 irqctx = &per_cpu(softirq_stack, cpu);
141 irqctx->tinfo.task = NULL; 142 irqctx->tinfo.task = NULL;
142 irqctx->tinfo.exec_domain = NULL; 143 irqctx->tinfo.exec_domain = NULL;
143 irqctx->tinfo.cpu = cpu; 144 irqctx->tinfo.cpu = cpu;
144 irqctx->tinfo.preempt_count = 0; 145 irqctx->tinfo.preempt_count = 0;
145 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); 146 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
146 147
147 softirq_ctx[cpu] = irqctx; 148 per_cpu(softirq_ctx, cpu) = irqctx;
148 149
149 printk(KERN_DEBUG "CPU %u irqstacks, hard=%p soft=%p\n", 150 printk(KERN_DEBUG "CPU %u irqstacks, hard=%p soft=%p\n",
150 cpu, hardirq_ctx[cpu], softirq_ctx[cpu]); 151 cpu, per_cpu(hardirq_ctx, cpu), per_cpu(softirq_ctx, cpu));
151} 152}
152 153
153void irq_ctx_exit(int cpu) 154void irq_ctx_exit(int cpu)
154{ 155{
155 hardirq_ctx[cpu] = NULL; 156 per_cpu(hardirq_ctx, cpu) = NULL;
156} 157}
157 158
158asmlinkage void do_softirq(void) 159asmlinkage void do_softirq(void)
@@ -169,7 +170,7 @@ asmlinkage void do_softirq(void)
169 170
170 if (local_softirq_pending()) { 171 if (local_softirq_pending()) {
171 curctx = current_thread_info(); 172 curctx = current_thread_info();
172 irqctx = softirq_ctx[smp_processor_id()]; 173 irqctx = __get_cpu_var(softirq_ctx);
173 irqctx->tinfo.task = curctx->task; 174 irqctx->tinfo.task = curctx->task;
174 irqctx->tinfo.previous_esp = current_stack_pointer; 175 irqctx->tinfo.previous_esp = current_stack_pointer;
175 176
@@ -191,33 +192,16 @@ static inline int
191execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; } 192execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; }
192#endif 193#endif
193 194
194/* 195bool handle_irq(unsigned irq, struct pt_regs *regs)
195 * do_IRQ handles all normal device IRQ's (the special
196 * SMP cross-CPU interrupts have their own specific
197 * handlers).
198 */
199unsigned int do_IRQ(struct pt_regs *regs)
200{ 196{
201 struct pt_regs *old_regs;
202 /* high bit used in ret_from_ code */
203 int overflow;
204 unsigned vector = ~regs->orig_ax;
205 struct irq_desc *desc; 197 struct irq_desc *desc;
206 unsigned irq; 198 int overflow;
207
208
209 old_regs = set_irq_regs(regs);
210 irq_enter();
211 irq = __get_cpu_var(vector_irq)[vector];
212 199
213 overflow = check_stack_overflow(); 200 overflow = check_stack_overflow();
214 201
215 desc = irq_to_desc(irq); 202 desc = irq_to_desc(irq);
216 if (unlikely(!desc)) { 203 if (unlikely(!desc))
217 printk(KERN_EMERG "%s: cannot handle IRQ %d vector %#x cpu %d\n", 204 return false;
218 __func__, irq, vector, smp_processor_id());
219 BUG();
220 }
221 205
222 if (!execute_on_irq_stack(overflow, desc, irq)) { 206 if (!execute_on_irq_stack(overflow, desc, irq)) {
223 if (unlikely(overflow)) 207 if (unlikely(overflow))
@@ -225,13 +209,10 @@ unsigned int do_IRQ(struct pt_regs *regs)
225 desc->handle_irq(irq, desc); 209 desc->handle_irq(irq, desc);
226 } 210 }
227 211
228 irq_exit(); 212 return true;
229 set_irq_regs(old_regs);
230 return 1;
231} 213}
232 214
233#ifdef CONFIG_HOTPLUG_CPU 215#ifdef CONFIG_HOTPLUG_CPU
234#include <mach_apic.h>
235 216
236/* A cpu has been removed from cpu_online_mask. Reset irq affinities. */ 217/* A cpu has been removed from cpu_online_mask. Reset irq affinities. */
237void fixup_irqs(void) 218void fixup_irqs(void)
@@ -248,7 +229,7 @@ void fixup_irqs(void)
248 if (irq == 2) 229 if (irq == 2)
249 continue; 230 continue;
250 231
251 affinity = &desc->affinity; 232 affinity = desc->affinity;
252 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { 233 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
253 printk("Breaking affinity for irq %i\n", irq); 234 printk("Breaking affinity for irq %i\n", irq);
254 affinity = cpu_all_mask; 235 affinity = cpu_all_mask;
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c
index 63c88e6ec025..977d8b43a0dd 100644
--- a/arch/x86/kernel/irq_64.c
+++ b/arch/x86/kernel/irq_64.c
@@ -18,6 +18,13 @@
18#include <linux/smp.h> 18#include <linux/smp.h>
19#include <asm/io_apic.h> 19#include <asm/io_apic.h>
20#include <asm/idle.h> 20#include <asm/idle.h>
21#include <asm/apic.h>
22
23DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
24EXPORT_PER_CPU_SYMBOL(irq_stat);
25
26DEFINE_PER_CPU(struct pt_regs *, irq_regs);
27EXPORT_PER_CPU_SYMBOL(irq_regs);
21 28
22/* 29/*
23 * Probabilistic stack overflow check: 30 * Probabilistic stack overflow check:
@@ -41,42 +48,18 @@ static inline void stack_overflow_check(struct pt_regs *regs)
41#endif 48#endif
42} 49}
43 50
44/* 51bool handle_irq(unsigned irq, struct pt_regs *regs)
45 * do_IRQ handles all normal device IRQ's (the special
46 * SMP cross-CPU interrupts have their own specific
47 * handlers).
48 */
49asmlinkage unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
50{ 52{
51 struct pt_regs *old_regs = set_irq_regs(regs);
52 struct irq_desc *desc; 53 struct irq_desc *desc;
53 54
54 /* high bit used in ret_from_ code */
55 unsigned vector = ~regs->orig_ax;
56 unsigned irq;
57
58 exit_idle();
59 irq_enter();
60 irq = __get_cpu_var(vector_irq)[vector];
61
62 stack_overflow_check(regs); 55 stack_overflow_check(regs);
63 56
64 desc = irq_to_desc(irq); 57 desc = irq_to_desc(irq);
65 if (likely(desc)) 58 if (unlikely(!desc))
66 generic_handle_irq_desc(irq, desc); 59 return false;
67 else {
68 if (!disable_apic)
69 ack_APIC_irq();
70
71 if (printk_ratelimit())
72 printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n",
73 __func__, smp_processor_id(), vector);
74 }
75
76 irq_exit();
77 60
78 set_irq_regs(old_regs); 61 generic_handle_irq_desc(irq, desc);
79 return 1; 62 return true;
80} 63}
81 64
82#ifdef CONFIG_HOTPLUG_CPU 65#ifdef CONFIG_HOTPLUG_CPU
@@ -100,7 +83,7 @@ void fixup_irqs(void)
100 /* interrupt's are disabled at this point */ 83 /* interrupt's are disabled at this point */
101 spin_lock(&desc->lock); 84 spin_lock(&desc->lock);
102 85
103 affinity = &desc->affinity; 86 affinity = desc->affinity;
104 if (!irq_has_action(irq) || 87 if (!irq_has_action(irq) ||
105 cpumask_equal(affinity, cpu_online_mask)) { 88 cpumask_equal(affinity, cpu_online_mask)) {
106 spin_unlock(&desc->lock); 89 spin_unlock(&desc->lock);
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
index 10a09c2f1828..50b8c3a3006c 100644
--- a/arch/x86/kernel/irqinit_32.c
+++ b/arch/x86/kernel/irqinit_32.c
@@ -18,7 +18,7 @@
18#include <asm/pgtable.h> 18#include <asm/pgtable.h>
19#include <asm/desc.h> 19#include <asm/desc.h>
20#include <asm/apic.h> 20#include <asm/apic.h>
21#include <asm/arch_hooks.h> 21#include <asm/setup.h>
22#include <asm/i8259.h> 22#include <asm/i8259.h>
23#include <asm/traps.h> 23#include <asm/traps.h>
24 24
@@ -78,6 +78,15 @@ void __init init_ISA_irqs(void)
78 } 78 }
79} 79}
80 80
81/*
82 * IRQ2 is cascade interrupt to second interrupt controller
83 */
84static struct irqaction irq2 = {
85 .handler = no_action,
86 .mask = CPU_MASK_NONE,
87 .name = "cascade",
88};
89
81DEFINE_PER_CPU(vector_irq_t, vector_irq) = { 90DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
82 [0 ... IRQ0_VECTOR - 1] = -1, 91 [0 ... IRQ0_VECTOR - 1] = -1,
83 [IRQ0_VECTOR] = 0, 92 [IRQ0_VECTOR] = 0,
@@ -118,8 +127,8 @@ void __init native_init_IRQ(void)
118{ 127{
119 int i; 128 int i;
120 129
121 /* all the set up before the call gates are initialised */ 130 /* Execute any quirks before the call gates are initialised: */
122 pre_intr_init_hook(); 131 x86_quirk_pre_intr_init();
123 132
124 /* 133 /*
125 * Cover the whole vector space, no vector can escape 134 * Cover the whole vector space, no vector can escape
@@ -140,8 +149,15 @@ void __init native_init_IRQ(void)
140 */ 149 */
141 alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); 150 alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
142 151
143 /* IPI for invalidation */ 152 /* IPIs for invalidation */
144 alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt); 153 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0);
154 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1);
155 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2);
156 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3);
157 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4);
158 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5);
159 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6);
160 alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7);
145 161
146 /* IPI for generic function call */ 162 /* IPI for generic function call */
147 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); 163 alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
@@ -169,10 +185,14 @@ void __init native_init_IRQ(void)
169 alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); 185 alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
170#endif 186#endif
171 187
172 /* setup after call gates are initialised (usually add in 188 if (!acpi_ioapic)
173 * the architecture specific gates) 189 setup_irq(2, &irq2);
190
191 /*
192 * Call quirks after call gates are initialised (usually add in
193 * the architecture specific gates):
174 */ 194 */
175 intr_init_hook(); 195 x86_quirk_intr_init();
176 196
177 /* 197 /*
178 * External FPU? Set up irq13 if so, for 198 * External FPU? Set up irq13 if so, for
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index 10435a120d22..eedfaebe1063 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -46,7 +46,7 @@
46#include <asm/apicdef.h> 46#include <asm/apicdef.h>
47#include <asm/system.h> 47#include <asm/system.h>
48 48
49#include <mach_ipi.h> 49#include <asm/apic.h>
50 50
51/* 51/*
52 * Put the error code here just in case the user cares: 52 * Put the error code here just in case the user cares:
@@ -347,7 +347,7 @@ void kgdb_post_primary_code(struct pt_regs *regs, int e_vector, int err_code)
347 */ 347 */
348void kgdb_roundup_cpus(unsigned long flags) 348void kgdb_roundup_cpus(unsigned long flags)
349{ 349{
350 send_IPI_allbutself(APIC_DM_NMI); 350 apic->send_IPI_allbutself(APIC_DM_NMI);
351} 351}
352#endif 352#endif
353 353
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 652fce6d2cce..137f2e8132df 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -19,7 +19,6 @@
19#include <linux/clocksource.h> 19#include <linux/clocksource.h>
20#include <linux/kvm_para.h> 20#include <linux/kvm_para.h>
21#include <asm/pvclock.h> 21#include <asm/pvclock.h>
22#include <asm/arch_hooks.h>
23#include <asm/msr.h> 22#include <asm/msr.h>
24#include <asm/apic.h> 23#include <asm/apic.h>
25#include <linux/percpu.h> 24#include <linux/percpu.h>
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index 37f420018a41..f5fc8c781a62 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -121,7 +121,7 @@ static void machine_kexec_page_table_set_one(
121static void machine_kexec_prepare_page_tables(struct kimage *image) 121static void machine_kexec_prepare_page_tables(struct kimage *image)
122{ 122{
123 void *control_page; 123 void *control_page;
124 pmd_t *pmd = 0; 124 pmd_t *pmd = NULL;
125 125
126 control_page = page_address(image->control_code_page); 126 control_page = page_address(image->control_code_page);
127#ifdef CONFIG_X86_PAE 127#ifdef CONFIG_X86_PAE
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index c43caa3a91f3..6993d51b7fd8 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -18,15 +18,6 @@
18#include <asm/mmu_context.h> 18#include <asm/mmu_context.h>
19#include <asm/io.h> 19#include <asm/io.h>
20 20
21#define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE)))
22static u64 kexec_pgd[512] PAGE_ALIGNED;
23static u64 kexec_pud0[512] PAGE_ALIGNED;
24static u64 kexec_pmd0[512] PAGE_ALIGNED;
25static u64 kexec_pte0[512] PAGE_ALIGNED;
26static u64 kexec_pud1[512] PAGE_ALIGNED;
27static u64 kexec_pmd1[512] PAGE_ALIGNED;
28static u64 kexec_pte1[512] PAGE_ALIGNED;
29
30static void init_level2_page(pmd_t *level2p, unsigned long addr) 21static void init_level2_page(pmd_t *level2p, unsigned long addr)
31{ 22{
32 unsigned long end_addr; 23 unsigned long end_addr;
@@ -107,12 +98,65 @@ out:
107 return result; 98 return result;
108} 99}
109 100
101static void free_transition_pgtable(struct kimage *image)
102{
103 free_page((unsigned long)image->arch.pud);
104 free_page((unsigned long)image->arch.pmd);
105 free_page((unsigned long)image->arch.pte);
106}
107
108static int init_transition_pgtable(struct kimage *image, pgd_t *pgd)
109{
110 pud_t *pud;
111 pmd_t *pmd;
112 pte_t *pte;
113 unsigned long vaddr, paddr;
114 int result = -ENOMEM;
115
116 vaddr = (unsigned long)relocate_kernel;
117 paddr = __pa(page_address(image->control_code_page)+PAGE_SIZE);
118 pgd += pgd_index(vaddr);
119 if (!pgd_present(*pgd)) {
120 pud = (pud_t *)get_zeroed_page(GFP_KERNEL);
121 if (!pud)
122 goto err;
123 image->arch.pud = pud;
124 set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE));
125 }
126 pud = pud_offset(pgd, vaddr);
127 if (!pud_present(*pud)) {
128 pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL);
129 if (!pmd)
130 goto err;
131 image->arch.pmd = pmd;
132 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
133 }
134 pmd = pmd_offset(pud, vaddr);
135 if (!pmd_present(*pmd)) {
136 pte = (pte_t *)get_zeroed_page(GFP_KERNEL);
137 if (!pte)
138 goto err;
139 image->arch.pte = pte;
140 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
141 }
142 pte = pte_offset_kernel(pmd, vaddr);
143 set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL_EXEC));
144 return 0;
145err:
146 free_transition_pgtable(image);
147 return result;
148}
149
110 150
111static int init_pgtable(struct kimage *image, unsigned long start_pgtable) 151static int init_pgtable(struct kimage *image, unsigned long start_pgtable)
112{ 152{
113 pgd_t *level4p; 153 pgd_t *level4p;
154 int result;
114 level4p = (pgd_t *)__va(start_pgtable); 155 level4p = (pgd_t *)__va(start_pgtable);
115 return init_level4_page(image, level4p, 0, max_pfn << PAGE_SHIFT); 156 result = init_level4_page(image, level4p, 0, max_pfn << PAGE_SHIFT);
157 if (result)
158 return result;
159 return init_transition_pgtable(image, level4p);
116} 160}
117 161
118static void set_idt(void *newidt, u16 limit) 162static void set_idt(void *newidt, u16 limit)
@@ -174,7 +218,7 @@ int machine_kexec_prepare(struct kimage *image)
174 218
175void machine_kexec_cleanup(struct kimage *image) 219void machine_kexec_cleanup(struct kimage *image)
176{ 220{
177 return; 221 free_transition_pgtable(image);
178} 222}
179 223
180/* 224/*
@@ -195,22 +239,6 @@ void machine_kexec(struct kimage *image)
195 memcpy(control_page, relocate_kernel, PAGE_SIZE); 239 memcpy(control_page, relocate_kernel, PAGE_SIZE);
196 240
197 page_list[PA_CONTROL_PAGE] = virt_to_phys(control_page); 241 page_list[PA_CONTROL_PAGE] = virt_to_phys(control_page);
198 page_list[VA_CONTROL_PAGE] = (unsigned long)relocate_kernel;
199 page_list[PA_PGD] = virt_to_phys(&kexec_pgd);
200 page_list[VA_PGD] = (unsigned long)kexec_pgd;
201 page_list[PA_PUD_0] = virt_to_phys(&kexec_pud0);
202 page_list[VA_PUD_0] = (unsigned long)kexec_pud0;
203 page_list[PA_PMD_0] = virt_to_phys(&kexec_pmd0);
204 page_list[VA_PMD_0] = (unsigned long)kexec_pmd0;
205 page_list[PA_PTE_0] = virt_to_phys(&kexec_pte0);
206 page_list[VA_PTE_0] = (unsigned long)kexec_pte0;
207 page_list[PA_PUD_1] = virt_to_phys(&kexec_pud1);
208 page_list[VA_PUD_1] = (unsigned long)kexec_pud1;
209 page_list[PA_PMD_1] = virt_to_phys(&kexec_pmd1);
210 page_list[VA_PMD_1] = (unsigned long)kexec_pmd1;
211 page_list[PA_PTE_1] = virt_to_phys(&kexec_pte1);
212 page_list[VA_PTE_1] = (unsigned long)kexec_pte1;
213
214 page_list[PA_TABLE_PAGE] = 242 page_list[PA_TABLE_PAGE] =
215 (unsigned long)__pa(page_address(image->control_code_page)); 243 (unsigned long)__pa(page_address(image->control_code_page));
216 244
diff --git a/arch/x86/kernel/mca_32.c b/arch/x86/kernel/mca_32.c
index 2dc183758be3..845d80ce1ef1 100644
--- a/arch/x86/kernel/mca_32.c
+++ b/arch/x86/kernel/mca_32.c
@@ -51,7 +51,6 @@
51#include <linux/ioport.h> 51#include <linux/ioport.h>
52#include <asm/uaccess.h> 52#include <asm/uaccess.h>
53#include <linux/init.h> 53#include <linux/init.h>
54#include <asm/arch_hooks.h>
55 54
56static unsigned char which_scsi; 55static unsigned char which_scsi;
57 56
@@ -474,6 +473,4 @@ void __kprobes mca_handle_nmi(void)
474 * adapter was responsible for the error. 473 * adapter was responsible for the error.
475 */ 474 */
476 bus_for_each_dev(&mca_bus_type, NULL, NULL, mca_handle_nmi_callback); 475 bus_for_each_dev(&mca_bus_type, NULL, NULL, mca_handle_nmi_callback);
477 476}
478 mca_nmi_hook();
479} /* mca_handle_nmi */
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index b7f4c929e615..5e9f4fc51385 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -87,9 +87,9 @@
87#include <linux/cpu.h> 87#include <linux/cpu.h>
88#include <linux/firmware.h> 88#include <linux/firmware.h>
89#include <linux/platform_device.h> 89#include <linux/platform_device.h>
90#include <linux/uaccess.h>
90 91
91#include <asm/msr.h> 92#include <asm/msr.h>
92#include <asm/uaccess.h>
93#include <asm/processor.h> 93#include <asm/processor.h>
94#include <asm/microcode.h> 94#include <asm/microcode.h>
95 95
@@ -196,7 +196,7 @@ static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf)
196 return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1; 196 return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1;
197} 197}
198 198
199static inline int 199static inline int
200update_match_revision(struct microcode_header_intel *mc_header, int rev) 200update_match_revision(struct microcode_header_intel *mc_header, int rev)
201{ 201{
202 return (mc_header->rev <= rev) ? 0 : 1; 202 return (mc_header->rev <= rev) ? 0 : 1;
@@ -442,8 +442,8 @@ static int request_microcode_fw(int cpu, struct device *device)
442 return ret; 442 return ret;
443 } 443 }
444 444
445 ret = generic_load_microcode(cpu, (void*)firmware->data, firmware->size, 445 ret = generic_load_microcode(cpu, (void *)firmware->data,
446 &get_ucode_fw); 446 firmware->size, &get_ucode_fw);
447 447
448 release_firmware(firmware); 448 release_firmware(firmware);
449 449
@@ -460,7 +460,7 @@ static int request_microcode_user(int cpu, const void __user *buf, size_t size)
460 /* We should bind the task to the CPU */ 460 /* We should bind the task to the CPU */
461 BUG_ON(cpu != raw_smp_processor_id()); 461 BUG_ON(cpu != raw_smp_processor_id());
462 462
463 return generic_load_microcode(cpu, (void*)buf, size, &get_ucode_user); 463 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
464} 464}
465 465
466static void microcode_fini_cpu(int cpu) 466static void microcode_fini_cpu(int cpu)
diff --git a/arch/x86/kernel/module_32.c b/arch/x86/kernel/module_32.c
index 3db0a5442eb1..0edd819050e7 100644
--- a/arch/x86/kernel/module_32.c
+++ b/arch/x86/kernel/module_32.c
@@ -42,7 +42,7 @@ void module_free(struct module *mod, void *module_region)
42{ 42{
43 vfree(module_region); 43 vfree(module_region);
44 /* FIXME: If module_region == mod->init_region, trim exception 44 /* FIXME: If module_region == mod->init_region, trim exception
45 table entries. */ 45 table entries. */
46} 46}
47 47
48/* We don't need anything special. */ 48/* We don't need anything special. */
@@ -113,13 +113,13 @@ int module_finalize(const Elf_Ehdr *hdr,
113 *para = NULL; 113 *para = NULL;
114 char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; 114 char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
115 115
116 for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) { 116 for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) {
117 if (!strcmp(".text", secstrings + s->sh_name)) 117 if (!strcmp(".text", secstrings + s->sh_name))
118 text = s; 118 text = s;
119 if (!strcmp(".altinstructions", secstrings + s->sh_name)) 119 if (!strcmp(".altinstructions", secstrings + s->sh_name))
120 alt = s; 120 alt = s;
121 if (!strcmp(".smp_locks", secstrings + s->sh_name)) 121 if (!strcmp(".smp_locks", secstrings + s->sh_name))
122 locks= s; 122 locks = s;
123 if (!strcmp(".parainstructions", secstrings + s->sh_name)) 123 if (!strcmp(".parainstructions", secstrings + s->sh_name))
124 para = s; 124 para = s;
125 } 125 }
diff --git a/arch/x86/kernel/module_64.c b/arch/x86/kernel/module_64.c
index 6ba87830d4b1..c23880b90b5c 100644
--- a/arch/x86/kernel/module_64.c
+++ b/arch/x86/kernel/module_64.c
@@ -30,14 +30,14 @@
30#include <asm/page.h> 30#include <asm/page.h>
31#include <asm/pgtable.h> 31#include <asm/pgtable.h>
32 32
33#define DEBUGP(fmt...) 33#define DEBUGP(fmt...)
34 34
35#ifndef CONFIG_UML 35#ifndef CONFIG_UML
36void module_free(struct module *mod, void *module_region) 36void module_free(struct module *mod, void *module_region)
37{ 37{
38 vfree(module_region); 38 vfree(module_region);
39 /* FIXME: If module_region == mod->init_region, trim exception 39 /* FIXME: If module_region == mod->init_region, trim exception
40 table entries. */ 40 table entries. */
41} 41}
42 42
43void *module_alloc(unsigned long size) 43void *module_alloc(unsigned long size)
@@ -77,7 +77,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
77 Elf64_Rela *rel = (void *)sechdrs[relsec].sh_addr; 77 Elf64_Rela *rel = (void *)sechdrs[relsec].sh_addr;
78 Elf64_Sym *sym; 78 Elf64_Sym *sym;
79 void *loc; 79 void *loc;
80 u64 val; 80 u64 val;
81 81
82 DEBUGP("Applying relocate section %u to %u\n", relsec, 82 DEBUGP("Applying relocate section %u to %u\n", relsec,
83 sechdrs[relsec].sh_info); 83 sechdrs[relsec].sh_info);
@@ -91,11 +91,11 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
91 sym = (Elf64_Sym *)sechdrs[symindex].sh_addr 91 sym = (Elf64_Sym *)sechdrs[symindex].sh_addr
92 + ELF64_R_SYM(rel[i].r_info); 92 + ELF64_R_SYM(rel[i].r_info);
93 93
94 DEBUGP("type %d st_value %Lx r_addend %Lx loc %Lx\n", 94 DEBUGP("type %d st_value %Lx r_addend %Lx loc %Lx\n",
95 (int)ELF64_R_TYPE(rel[i].r_info), 95 (int)ELF64_R_TYPE(rel[i].r_info),
96 sym->st_value, rel[i].r_addend, (u64)loc); 96 sym->st_value, rel[i].r_addend, (u64)loc);
97 97
98 val = sym->st_value + rel[i].r_addend; 98 val = sym->st_value + rel[i].r_addend;
99 99
100 switch (ELF64_R_TYPE(rel[i].r_info)) { 100 switch (ELF64_R_TYPE(rel[i].r_info)) {
101 case R_X86_64_NONE: 101 case R_X86_64_NONE:
@@ -113,16 +113,16 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
113 if ((s64)val != *(s32 *)loc) 113 if ((s64)val != *(s32 *)loc)
114 goto overflow; 114 goto overflow;
115 break; 115 break;
116 case R_X86_64_PC32: 116 case R_X86_64_PC32:
117 val -= (u64)loc; 117 val -= (u64)loc;
118 *(u32 *)loc = val; 118 *(u32 *)loc = val;
119#if 0 119#if 0
120 if ((s64)val != *(s32 *)loc) 120 if ((s64)val != *(s32 *)loc)
121 goto overflow; 121 goto overflow;
122#endif 122#endif
123 break; 123 break;
124 default: 124 default:
125 printk(KERN_ERR "module %s: Unknown rela relocation: %Lu\n", 125 printk(KERN_ERR "module %s: Unknown rela relocation: %llu\n",
126 me->name, ELF64_R_TYPE(rel[i].r_info)); 126 me->name, ELF64_R_TYPE(rel[i].r_info));
127 return -ENOEXEC; 127 return -ENOEXEC;
128 } 128 }
@@ -130,7 +130,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
130 return 0; 130 return 0;
131 131
132overflow: 132overflow:
133 printk(KERN_ERR "overflow in relocation type %d val %Lx\n", 133 printk(KERN_ERR "overflow in relocation type %d val %Lx\n",
134 (int)ELF64_R_TYPE(rel[i].r_info), val); 134 (int)ELF64_R_TYPE(rel[i].r_info), val);
135 printk(KERN_ERR "`%s' likely not compiled with -mcmodel=kernel\n", 135 printk(KERN_ERR "`%s' likely not compiled with -mcmodel=kernel\n",
136 me->name); 136 me->name);
@@ -143,13 +143,13 @@ int apply_relocate(Elf_Shdr *sechdrs,
143 unsigned int relsec, 143 unsigned int relsec,
144 struct module *me) 144 struct module *me)
145{ 145{
146 printk("non add relocation not supported\n"); 146 printk(KERN_ERR "non add relocation not supported\n");
147 return -ENOSYS; 147 return -ENOSYS;
148} 148}
149 149
150int module_finalize(const Elf_Ehdr *hdr, 150int module_finalize(const Elf_Ehdr *hdr,
151 const Elf_Shdr *sechdrs, 151 const Elf_Shdr *sechdrs,
152 struct module *me) 152 struct module *me)
153{ 153{
154 const Elf_Shdr *s, *text = NULL, *alt = NULL, *locks = NULL, 154 const Elf_Shdr *s, *text = NULL, *alt = NULL, *locks = NULL,
155 *para = NULL; 155 *para = NULL;
@@ -161,7 +161,7 @@ int module_finalize(const Elf_Ehdr *hdr,
161 if (!strcmp(".altinstructions", secstrings + s->sh_name)) 161 if (!strcmp(".altinstructions", secstrings + s->sh_name))
162 alt = s; 162 alt = s;
163 if (!strcmp(".smp_locks", secstrings + s->sh_name)) 163 if (!strcmp(".smp_locks", secstrings + s->sh_name))
164 locks= s; 164 locks = s;
165 if (!strcmp(".parainstructions", secstrings + s->sh_name)) 165 if (!strcmp(".parainstructions", secstrings + s->sh_name))
166 para = s; 166 para = s;
167 } 167 }
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index a649a4ccad43..37cb1bda1baf 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -3,7 +3,7 @@
3 * compliant MP-table parsing routines. 3 * compliant MP-table parsing routines.
4 * 4 *
5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> 5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com> 6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
8 */ 8 */
9 9
@@ -29,12 +29,7 @@
29#include <asm/setup.h> 29#include <asm/setup.h>
30#include <asm/smp.h> 30#include <asm/smp.h>
31 31
32#include <mach_apic.h> 32#include <asm/apic.h>
33#ifdef CONFIG_X86_32
34#include <mach_apicdef.h>
35#include <mach_mpparse.h>
36#endif
37
38/* 33/*
39 * Checksum an MP configuration block. 34 * Checksum an MP configuration block.
40 */ 35 */
@@ -144,11 +139,11 @@ static void __init MP_ioapic_info(struct mpc_ioapic *m)
144 if (bad_ioapic(m->apicaddr)) 139 if (bad_ioapic(m->apicaddr))
145 return; 140 return;
146 141
147 mp_ioapics[nr_ioapics].mp_apicaddr = m->apicaddr; 142 mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
148 mp_ioapics[nr_ioapics].mp_apicid = m->apicid; 143 mp_ioapics[nr_ioapics].apicid = m->apicid;
149 mp_ioapics[nr_ioapics].mp_type = m->type; 144 mp_ioapics[nr_ioapics].type = m->type;
150 mp_ioapics[nr_ioapics].mp_apicver = m->apicver; 145 mp_ioapics[nr_ioapics].apicver = m->apicver;
151 mp_ioapics[nr_ioapics].mp_flags = m->flags; 146 mp_ioapics[nr_ioapics].flags = m->flags;
152 nr_ioapics++; 147 nr_ioapics++;
153} 148}
154 149
@@ -160,55 +155,55 @@ static void print_MP_intsrc_info(struct mpc_intsrc *m)
160 m->srcbusirq, m->dstapic, m->dstirq); 155 m->srcbusirq, m->dstapic, m->dstirq);
161} 156}
162 157
163static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq) 158static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
164{ 159{
165 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," 160 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
166 " IRQ %02x, APIC ID %x, APIC INT %02x\n", 161 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
167 mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3, 162 mp_irq->irqtype, mp_irq->irqflag & 3,
168 (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus, 163 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
169 mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq); 164 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
170} 165}
171 166
172static void __init assign_to_mp_irq(struct mpc_intsrc *m, 167static void __init assign_to_mp_irq(struct mpc_intsrc *m,
173 struct mp_config_intsrc *mp_irq) 168 struct mpc_intsrc *mp_irq)
174{ 169{
175 mp_irq->mp_dstapic = m->dstapic; 170 mp_irq->dstapic = m->dstapic;
176 mp_irq->mp_type = m->type; 171 mp_irq->type = m->type;
177 mp_irq->mp_irqtype = m->irqtype; 172 mp_irq->irqtype = m->irqtype;
178 mp_irq->mp_irqflag = m->irqflag; 173 mp_irq->irqflag = m->irqflag;
179 mp_irq->mp_srcbus = m->srcbus; 174 mp_irq->srcbus = m->srcbus;
180 mp_irq->mp_srcbusirq = m->srcbusirq; 175 mp_irq->srcbusirq = m->srcbusirq;
181 mp_irq->mp_dstirq = m->dstirq; 176 mp_irq->dstirq = m->dstirq;
182} 177}
183 178
184static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq, 179static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
185 struct mpc_intsrc *m) 180 struct mpc_intsrc *m)
186{ 181{
187 m->dstapic = mp_irq->mp_dstapic; 182 m->dstapic = mp_irq->dstapic;
188 m->type = mp_irq->mp_type; 183 m->type = mp_irq->type;
189 m->irqtype = mp_irq->mp_irqtype; 184 m->irqtype = mp_irq->irqtype;
190 m->irqflag = mp_irq->mp_irqflag; 185 m->irqflag = mp_irq->irqflag;
191 m->srcbus = mp_irq->mp_srcbus; 186 m->srcbus = mp_irq->srcbus;
192 m->srcbusirq = mp_irq->mp_srcbusirq; 187 m->srcbusirq = mp_irq->srcbusirq;
193 m->dstirq = mp_irq->mp_dstirq; 188 m->dstirq = mp_irq->dstirq;
194} 189}
195 190
196static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq, 191static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
197 struct mpc_intsrc *m) 192 struct mpc_intsrc *m)
198{ 193{
199 if (mp_irq->mp_dstapic != m->dstapic) 194 if (mp_irq->dstapic != m->dstapic)
200 return 1; 195 return 1;
201 if (mp_irq->mp_type != m->type) 196 if (mp_irq->type != m->type)
202 return 2; 197 return 2;
203 if (mp_irq->mp_irqtype != m->irqtype) 198 if (mp_irq->irqtype != m->irqtype)
204 return 3; 199 return 3;
205 if (mp_irq->mp_irqflag != m->irqflag) 200 if (mp_irq->irqflag != m->irqflag)
206 return 4; 201 return 4;
207 if (mp_irq->mp_srcbus != m->srcbus) 202 if (mp_irq->srcbus != m->srcbus)
208 return 5; 203 return 5;
209 if (mp_irq->mp_srcbusirq != m->srcbusirq) 204 if (mp_irq->srcbusirq != m->srcbusirq)
210 return 6; 205 return 6;
211 if (mp_irq->mp_dstirq != m->dstirq) 206 if (mp_irq->dstirq != m->dstirq)
212 return 7; 207 return 7;
213 208
214 return 0; 209 return 0;
@@ -292,16 +287,7 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
292 return 0; 287 return 0;
293 288
294#ifdef CONFIG_X86_32 289#ifdef CONFIG_X86_32
295 /* 290 generic_mps_oem_check(mpc, oem, str);
296 * need to make sure summit and es7000's mps_oem_check is safe to be
297 * called early via genericarch 's mps_oem_check
298 */
299 if (early) {
300#ifdef CONFIG_X86_NUMAQ
301 numaq_mps_oem_check(mpc, oem, str);
302#endif
303 } else
304 mps_oem_check(mpc, oem, str);
305#endif 291#endif
306 /* save the local APIC address, it might be non-default */ 292 /* save the local APIC address, it might be non-default */
307 if (!acpi_lapic) 293 if (!acpi_lapic)
@@ -386,13 +372,13 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
386 (*x86_quirks->mpc_record)++; 372 (*x86_quirks->mpc_record)++;
387 } 373 }
388 374
389#ifdef CONFIG_X86_GENERICARCH 375#ifdef CONFIG_X86_BIGSMP
390 generic_bigsmp_probe(); 376 generic_bigsmp_probe();
391#endif 377#endif
392 378
393#ifdef CONFIG_X86_32 379 if (apic->setup_apic_routing)
394 setup_apic_routing(); 380 apic->setup_apic_routing();
395#endif 381
396 if (!num_processors) 382 if (!num_processors)
397 printk(KERN_ERR "MPTABLE: no processors registered!\n"); 383 printk(KERN_ERR "MPTABLE: no processors registered!\n");
398 return num_processors; 384 return num_processors;
@@ -417,7 +403,7 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type)
417 intsrc.type = MP_INTSRC; 403 intsrc.type = MP_INTSRC;
418 intsrc.irqflag = 0; /* conforming */ 404 intsrc.irqflag = 0; /* conforming */
419 intsrc.srcbus = 0; 405 intsrc.srcbus = 0;
420 intsrc.dstapic = mp_ioapics[0].mp_apicid; 406 intsrc.dstapic = mp_ioapics[0].apicid;
421 407
422 intsrc.irqtype = mp_INT; 408 intsrc.irqtype = mp_INT;
423 409
@@ -570,14 +556,14 @@ static inline void __init construct_default_ISA_mptable(int mpc_default_type)
570 } 556 }
571} 557}
572 558
573static struct intel_mp_floating *mpf_found; 559static struct mpf_intel *mpf_found;
574 560
575/* 561/*
576 * Scan the memory blocks for an SMP configuration block. 562 * Scan the memory blocks for an SMP configuration block.
577 */ 563 */
578static void __init __get_smp_config(unsigned int early) 564static void __init __get_smp_config(unsigned int early)
579{ 565{
580 struct intel_mp_floating *mpf = mpf_found; 566 struct mpf_intel *mpf = mpf_found;
581 567
582 if (!mpf) 568 if (!mpf)
583 return; 569 return;
@@ -598,9 +584,9 @@ static void __init __get_smp_config(unsigned int early)
598 } 584 }
599 585
600 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", 586 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
601 mpf->mpf_specification); 587 mpf->specification);
602#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 588#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
603 if (mpf->mpf_feature2 & (1 << 7)) { 589 if (mpf->feature2 & (1 << 7)) {
604 printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); 590 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
605 pic_mode = 1; 591 pic_mode = 1;
606 } else { 592 } else {
@@ -611,7 +597,7 @@ static void __init __get_smp_config(unsigned int early)
611 /* 597 /*
612 * Now see if we need to read further. 598 * Now see if we need to read further.
613 */ 599 */
614 if (mpf->mpf_feature1 != 0) { 600 if (mpf->feature1 != 0) {
615 if (early) { 601 if (early) {
616 /* 602 /*
617 * local APIC has default address 603 * local APIC has default address
@@ -621,16 +607,16 @@ static void __init __get_smp_config(unsigned int early)
621 } 607 }
622 608
623 printk(KERN_INFO "Default MP configuration #%d\n", 609 printk(KERN_INFO "Default MP configuration #%d\n",
624 mpf->mpf_feature1); 610 mpf->feature1);
625 construct_default_ISA_mptable(mpf->mpf_feature1); 611 construct_default_ISA_mptable(mpf->feature1);
626 612
627 } else if (mpf->mpf_physptr) { 613 } else if (mpf->physptr) {
628 614
629 /* 615 /*
630 * Read the physical hardware table. Anything here will 616 * Read the physical hardware table. Anything here will
631 * override the defaults. 617 * override the defaults.
632 */ 618 */
633 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) { 619 if (!smp_read_mpc(phys_to_virt(mpf->physptr), early)) {
634#ifdef CONFIG_X86_LOCAL_APIC 620#ifdef CONFIG_X86_LOCAL_APIC
635 smp_found_config = 0; 621 smp_found_config = 0;
636#endif 622#endif
@@ -688,32 +674,32 @@ static int __init smp_scan_config(unsigned long base, unsigned long length,
688 unsigned reserve) 674 unsigned reserve)
689{ 675{
690 unsigned int *bp = phys_to_virt(base); 676 unsigned int *bp = phys_to_virt(base);
691 struct intel_mp_floating *mpf; 677 struct mpf_intel *mpf;
692 678
693 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", 679 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
694 bp, length); 680 bp, length);
695 BUILD_BUG_ON(sizeof(*mpf) != 16); 681 BUILD_BUG_ON(sizeof(*mpf) != 16);
696 682
697 while (length > 0) { 683 while (length > 0) {
698 mpf = (struct intel_mp_floating *)bp; 684 mpf = (struct mpf_intel *)bp;
699 if ((*bp == SMP_MAGIC_IDENT) && 685 if ((*bp == SMP_MAGIC_IDENT) &&
700 (mpf->mpf_length == 1) && 686 (mpf->length == 1) &&
701 !mpf_checksum((unsigned char *)bp, 16) && 687 !mpf_checksum((unsigned char *)bp, 16) &&
702 ((mpf->mpf_specification == 1) 688 ((mpf->specification == 1)
703 || (mpf->mpf_specification == 4))) { 689 || (mpf->specification == 4))) {
704#ifdef CONFIG_X86_LOCAL_APIC 690#ifdef CONFIG_X86_LOCAL_APIC
705 smp_found_config = 1; 691 smp_found_config = 1;
706#endif 692#endif
707 mpf_found = mpf; 693 mpf_found = mpf;
708 694
709 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n", 695 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
710 mpf, virt_to_phys(mpf)); 696 mpf, (u64)virt_to_phys(mpf));
711 697
712 if (!reserve) 698 if (!reserve)
713 return 1; 699 return 1;
714 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE, 700 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
715 BOOTMEM_DEFAULT); 701 BOOTMEM_DEFAULT);
716 if (mpf->mpf_physptr) { 702 if (mpf->physptr) {
717 unsigned long size = PAGE_SIZE; 703 unsigned long size = PAGE_SIZE;
718#ifdef CONFIG_X86_32 704#ifdef CONFIG_X86_32
719 /* 705 /*
@@ -722,15 +708,24 @@ static int __init smp_scan_config(unsigned long base, unsigned long length,
722 * the bottom is mapped now. 708 * the bottom is mapped now.
723 * PC-9800's MPC table places on the very last 709 * PC-9800's MPC table places on the very last
724 * of physical memory; so that simply reserving 710 * of physical memory; so that simply reserving
725 * PAGE_SIZE from mpg->mpf_physptr yields BUG() 711 * PAGE_SIZE from mpf->physptr yields BUG()
726 * in reserve_bootmem. 712 * in reserve_bootmem.
713 * also need to make sure physptr is below than
714 * max_low_pfn
715 * we don't need reserve the area above max_low_pfn
727 */ 716 */
728 unsigned long end = max_low_pfn * PAGE_SIZE; 717 unsigned long end = max_low_pfn * PAGE_SIZE;
729 if (mpf->mpf_physptr + size > end) 718
730 size = end - mpf->mpf_physptr; 719 if (mpf->physptr < end) {
731#endif 720 if (mpf->physptr + size > end)
732 reserve_bootmem_generic(mpf->mpf_physptr, size, 721 size = end - mpf->physptr;
722 reserve_bootmem_generic(mpf->physptr, size,
723 BOOTMEM_DEFAULT);
724 }
725#else
726 reserve_bootmem_generic(mpf->physptr, size,
733 BOOTMEM_DEFAULT); 727 BOOTMEM_DEFAULT);
728#endif
734 } 729 }
735 730
736 return 1; 731 return 1;
@@ -809,15 +804,15 @@ static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
809 /* not legacy */ 804 /* not legacy */
810 805
811 for (i = 0; i < mp_irq_entries; i++) { 806 for (i = 0; i < mp_irq_entries; i++) {
812 if (mp_irqs[i].mp_irqtype != mp_INT) 807 if (mp_irqs[i].irqtype != mp_INT)
813 continue; 808 continue;
814 809
815 if (mp_irqs[i].mp_irqflag != 0x0f) 810 if (mp_irqs[i].irqflag != 0x0f)
816 continue; 811 continue;
817 812
818 if (mp_irqs[i].mp_srcbus != m->srcbus) 813 if (mp_irqs[i].srcbus != m->srcbus)
819 continue; 814 continue;
820 if (mp_irqs[i].mp_srcbusirq != m->srcbusirq) 815 if (mp_irqs[i].srcbusirq != m->srcbusirq)
821 continue; 816 continue;
822 if (irq_used[i]) { 817 if (irq_used[i]) {
823 /* already claimed */ 818 /* already claimed */
@@ -922,10 +917,10 @@ static int __init replace_intsrc_all(struct mpc_table *mpc,
922 if (irq_used[i]) 917 if (irq_used[i])
923 continue; 918 continue;
924 919
925 if (mp_irqs[i].mp_irqtype != mp_INT) 920 if (mp_irqs[i].irqtype != mp_INT)
926 continue; 921 continue;
927 922
928 if (mp_irqs[i].mp_irqflag != 0x0f) 923 if (mp_irqs[i].irqflag != 0x0f)
929 continue; 924 continue;
930 925
931 if (nr_m_spare > 0) { 926 if (nr_m_spare > 0) {
@@ -1001,7 +996,7 @@ static int __init update_mp_table(void)
1001{ 996{
1002 char str[16]; 997 char str[16];
1003 char oem[10]; 998 char oem[10];
1004 struct intel_mp_floating *mpf; 999 struct mpf_intel *mpf;
1005 struct mpc_table *mpc, *mpc_new; 1000 struct mpc_table *mpc, *mpc_new;
1006 1001
1007 if (!enable_update_mptable) 1002 if (!enable_update_mptable)
@@ -1014,19 +1009,19 @@ static int __init update_mp_table(void)
1014 /* 1009 /*
1015 * Now see if we need to go further. 1010 * Now see if we need to go further.
1016 */ 1011 */
1017 if (mpf->mpf_feature1 != 0) 1012 if (mpf->feature1 != 0)
1018 return 0; 1013 return 0;
1019 1014
1020 if (!mpf->mpf_physptr) 1015 if (!mpf->physptr)
1021 return 0; 1016 return 0;
1022 1017
1023 mpc = phys_to_virt(mpf->mpf_physptr); 1018 mpc = phys_to_virt(mpf->physptr);
1024 1019
1025 if (!smp_check_mpc(mpc, oem, str)) 1020 if (!smp_check_mpc(mpc, oem, str))
1026 return 0; 1021 return 0;
1027 1022
1028 printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf)); 1023 printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
1029 printk(KERN_INFO "mpf_physptr: %x\n", mpf->mpf_physptr); 1024 printk(KERN_INFO "physptr: %x\n", mpf->physptr);
1030 1025
1031 if (mpc_new_phys && mpc->length > mpc_new_length) { 1026 if (mpc_new_phys && mpc->length > mpc_new_length) {
1032 mpc_new_phys = 0; 1027 mpc_new_phys = 0;
@@ -1047,23 +1042,23 @@ static int __init update_mp_table(void)
1047 } 1042 }
1048 printk(KERN_INFO "use in-positon replacing\n"); 1043 printk(KERN_INFO "use in-positon replacing\n");
1049 } else { 1044 } else {
1050 mpf->mpf_physptr = mpc_new_phys; 1045 mpf->physptr = mpc_new_phys;
1051 mpc_new = phys_to_virt(mpc_new_phys); 1046 mpc_new = phys_to_virt(mpc_new_phys);
1052 memcpy(mpc_new, mpc, mpc->length); 1047 memcpy(mpc_new, mpc, mpc->length);
1053 mpc = mpc_new; 1048 mpc = mpc_new;
1054 /* check if we can modify that */ 1049 /* check if we can modify that */
1055 if (mpc_new_phys - mpf->mpf_physptr) { 1050 if (mpc_new_phys - mpf->physptr) {
1056 struct intel_mp_floating *mpf_new; 1051 struct mpf_intel *mpf_new;
1057 /* steal 16 bytes from [0, 1k) */ 1052 /* steal 16 bytes from [0, 1k) */
1058 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); 1053 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
1059 mpf_new = phys_to_virt(0x400 - 16); 1054 mpf_new = phys_to_virt(0x400 - 16);
1060 memcpy(mpf_new, mpf, 16); 1055 memcpy(mpf_new, mpf, 16);
1061 mpf = mpf_new; 1056 mpf = mpf_new;
1062 mpf->mpf_physptr = mpc_new_phys; 1057 mpf->physptr = mpc_new_phys;
1063 } 1058 }
1064 mpf->mpf_checksum = 0; 1059 mpf->checksum = 0;
1065 mpf->mpf_checksum -= mpf_checksum((unsigned char *)mpf, 16); 1060 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
1066 printk(KERN_INFO "mpf_physptr new: %x\n", mpf->mpf_physptr); 1061 printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
1067 } 1062 }
1068 1063
1069 /* 1064 /*
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c
index 726266695b2c..3cf3413ec626 100644
--- a/arch/x86/kernel/msr.c
+++ b/arch/x86/kernel/msr.c
@@ -35,10 +35,10 @@
35#include <linux/device.h> 35#include <linux/device.h>
36#include <linux/cpu.h> 36#include <linux/cpu.h>
37#include <linux/notifier.h> 37#include <linux/notifier.h>
38#include <linux/uaccess.h>
38 39
39#include <asm/processor.h> 40#include <asm/processor.h>
40#include <asm/msr.h> 41#include <asm/msr.h>
41#include <asm/uaccess.h>
42#include <asm/system.h> 42#include <asm/system.h>
43 43
44static struct class *msr_class; 44static struct class *msr_class;
diff --git a/arch/x86/kernel/numaq_32.c b/arch/x86/kernel/numaq_32.c
deleted file mode 100644
index f2191d4f2717..000000000000
--- a/arch/x86/kernel/numaq_32.c
+++ /dev/null
@@ -1,293 +0,0 @@
1/*
2 * Written by: Patricia Gaughen, IBM Corporation
3 *
4 * Copyright (C) 2002, IBM Corp.
5 *
6 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
16 * NON INFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Send feedback to <gone@us.ibm.com>
24 */
25
26#include <linux/mm.h>
27#include <linux/bootmem.h>
28#include <linux/mmzone.h>
29#include <linux/module.h>
30#include <linux/nodemask.h>
31#include <asm/numaq.h>
32#include <asm/topology.h>
33#include <asm/processor.h>
34#include <asm/genapic.h>
35#include <asm/e820.h>
36#include <asm/setup.h>
37
38#define MB_TO_PAGES(addr) ((addr) << (20 - PAGE_SHIFT))
39
40/*
41 * Function: smp_dump_qct()
42 *
43 * Description: gets memory layout from the quad config table. This
44 * function also updates node_online_map with the nodes (quads) present.
45 */
46static void __init smp_dump_qct(void)
47{
48 int node;
49 struct eachquadmem *eq;
50 struct sys_cfg_data *scd =
51 (struct sys_cfg_data *)__va(SYS_CFG_DATA_PRIV_ADDR);
52
53 nodes_clear(node_online_map);
54 for_each_node(node) {
55 if (scd->quads_present31_0 & (1 << node)) {
56 node_set_online(node);
57 eq = &scd->eq[node];
58 /* Convert to pages */
59 node_start_pfn[node] = MB_TO_PAGES(
60 eq->hi_shrd_mem_start - eq->priv_mem_size);
61 node_end_pfn[node] = MB_TO_PAGES(
62 eq->hi_shrd_mem_start + eq->hi_shrd_mem_size);
63
64 e820_register_active_regions(node, node_start_pfn[node],
65 node_end_pfn[node]);
66 memory_present(node,
67 node_start_pfn[node], node_end_pfn[node]);
68 node_remap_size[node] = node_memmap_size_bytes(node,
69 node_start_pfn[node],
70 node_end_pfn[node]);
71 }
72 }
73}
74
75
76void __cpuinit numaq_tsc_disable(void)
77{
78 if (!found_numaq)
79 return;
80
81 if (num_online_nodes() > 1) {
82 printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
83 setup_clear_cpu_cap(X86_FEATURE_TSC);
84 }
85}
86
87static int __init numaq_pre_time_init(void)
88{
89 numaq_tsc_disable();
90 return 0;
91}
92
93int found_numaq;
94/*
95 * Have to match translation table entries to main table entries by counter
96 * hence the mpc_record variable .... can't see a less disgusting way of
97 * doing this ....
98 */
99struct mpc_config_translation {
100 unsigned char mpc_type;
101 unsigned char trans_len;
102 unsigned char trans_type;
103 unsigned char trans_quad;
104 unsigned char trans_global;
105 unsigned char trans_local;
106 unsigned short trans_reserved;
107};
108
109/* x86_quirks member */
110static int mpc_record;
111static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY]
112 __cpuinitdata;
113
114static inline int generate_logical_apicid(int quad, int phys_apicid)
115{
116 return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
117}
118
119/* x86_quirks member */
120static int mpc_apic_id(struct mpc_cpu *m)
121{
122 int quad = translation_table[mpc_record]->trans_quad;
123 int logical_apicid = generate_logical_apicid(quad, m->apicid);
124
125 printk(KERN_DEBUG "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
126 m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8,
127 (m->cpufeature & CPU_MODEL_MASK) >> 4,
128 m->apicver, quad, logical_apicid);
129 return logical_apicid;
130}
131
132int mp_bus_id_to_node[MAX_MP_BUSSES];
133
134int mp_bus_id_to_local[MAX_MP_BUSSES];
135
136/* x86_quirks member */
137static void mpc_oem_bus_info(struct mpc_bus *m, char *name)
138{
139 int quad = translation_table[mpc_record]->trans_quad;
140 int local = translation_table[mpc_record]->trans_local;
141
142 mp_bus_id_to_node[m->busid] = quad;
143 mp_bus_id_to_local[m->busid] = local;
144 printk(KERN_INFO "Bus #%d is %s (node %d)\n",
145 m->busid, name, quad);
146}
147
148int quad_local_to_mp_bus_id [NR_CPUS/4][4];
149
150/* x86_quirks member */
151static void mpc_oem_pci_bus(struct mpc_bus *m)
152{
153 int quad = translation_table[mpc_record]->trans_quad;
154 int local = translation_table[mpc_record]->trans_local;
155
156 quad_local_to_mp_bus_id[quad][local] = m->busid;
157}
158
159static void __init MP_translation_info(struct mpc_config_translation *m)
160{
161 printk(KERN_INFO
162 "Translation: record %d, type %d, quad %d, global %d, local %d\n",
163 mpc_record, m->trans_type, m->trans_quad, m->trans_global,
164 m->trans_local);
165
166 if (mpc_record >= MAX_MPC_ENTRY)
167 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
168 else
169 translation_table[mpc_record] = m; /* stash this for later */
170 if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
171 node_set_online(m->trans_quad);
172}
173
174static int __init mpf_checksum(unsigned char *mp, int len)
175{
176 int sum = 0;
177
178 while (len--)
179 sum += *mp++;
180
181 return sum & 0xFF;
182}
183
184/*
185 * Read/parse the MPC oem tables
186 */
187
188static void __init smp_read_mpc_oem(struct mpc_oemtable *oemtable,
189 unsigned short oemsize)
190{
191 int count = sizeof(*oemtable); /* the header size */
192 unsigned char *oemptr = ((unsigned char *)oemtable) + count;
193
194 mpc_record = 0;
195 printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n",
196 oemtable);
197 if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) {
198 printk(KERN_WARNING
199 "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
200 oemtable->signature[0], oemtable->signature[1],
201 oemtable->signature[2], oemtable->signature[3]);
202 return;
203 }
204 if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) {
205 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
206 return;
207 }
208 while (count < oemtable->length) {
209 switch (*oemptr) {
210 case MP_TRANSLATION:
211 {
212 struct mpc_config_translation *m =
213 (struct mpc_config_translation *)oemptr;
214 MP_translation_info(m);
215 oemptr += sizeof(*m);
216 count += sizeof(*m);
217 ++mpc_record;
218 break;
219 }
220 default:
221 {
222 printk(KERN_WARNING
223 "Unrecognised OEM table entry type! - %d\n",
224 (int)*oemptr);
225 return;
226 }
227 }
228 }
229}
230
231static int __init numaq_setup_ioapic_ids(void)
232{
233 /* so can skip it */
234 return 1;
235}
236
237static int __init numaq_update_genapic(void)
238{
239 genapic->wakeup_cpu = wakeup_secondary_cpu_via_nmi;
240
241 return 0;
242}
243
244static struct x86_quirks numaq_x86_quirks __initdata = {
245 .arch_pre_time_init = numaq_pre_time_init,
246 .arch_time_init = NULL,
247 .arch_pre_intr_init = NULL,
248 .arch_memory_setup = NULL,
249 .arch_intr_init = NULL,
250 .arch_trap_init = NULL,
251 .mach_get_smp_config = NULL,
252 .mach_find_smp_config = NULL,
253 .mpc_record = &mpc_record,
254 .mpc_apic_id = mpc_apic_id,
255 .mpc_oem_bus_info = mpc_oem_bus_info,
256 .mpc_oem_pci_bus = mpc_oem_pci_bus,
257 .smp_read_mpc_oem = smp_read_mpc_oem,
258 .setup_ioapic_ids = numaq_setup_ioapic_ids,
259 .update_genapic = numaq_update_genapic,
260};
261
262void numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
263{
264 if (strncmp(oem, "IBM NUMA", 8))
265 printk("Warning! Not a NUMA-Q system!\n");
266 else
267 found_numaq = 1;
268}
269
270static __init void early_check_numaq(void)
271{
272 /*
273 * Find possible boot-time SMP configuration:
274 */
275 early_find_smp_config();
276 /*
277 * get boot-time SMP configuration:
278 */
279 if (smp_found_config)
280 early_get_smp_config();
281
282 if (found_numaq)
283 x86_quirks = &numaq_x86_quirks;
284}
285
286int __init get_memcfg_numaq(void)
287{
288 early_check_numaq();
289 if (!found_numaq)
290 return 0;
291 smp_dump_qct();
292 return 1;
293}
diff --git a/arch/x86/kernel/paravirt-spinlocks.c b/arch/x86/kernel/paravirt-spinlocks.c
index 95777b0faa73..3a7c5a44082e 100644
--- a/arch/x86/kernel/paravirt-spinlocks.c
+++ b/arch/x86/kernel/paravirt-spinlocks.c
@@ -26,13 +26,3 @@ struct pv_lock_ops pv_lock_ops = {
26}; 26};
27EXPORT_SYMBOL(pv_lock_ops); 27EXPORT_SYMBOL(pv_lock_ops);
28 28
29void __init paravirt_use_bytelocks(void)
30{
31#ifdef CONFIG_SMP
32 pv_lock_ops.spin_is_locked = __byte_spin_is_locked;
33 pv_lock_ops.spin_is_contended = __byte_spin_is_contended;
34 pv_lock_ops.spin_lock = __byte_spin_lock;
35 pv_lock_ops.spin_trylock = __byte_spin_trylock;
36 pv_lock_ops.spin_unlock = __byte_spin_unlock;
37#endif
38}
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index c6520a4e85d4..63dd358d8ee1 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -28,7 +28,6 @@
28#include <asm/paravirt.h> 28#include <asm/paravirt.h>
29#include <asm/desc.h> 29#include <asm/desc.h>
30#include <asm/setup.h> 30#include <asm/setup.h>
31#include <asm/arch_hooks.h>
32#include <asm/pgtable.h> 31#include <asm/pgtable.h>
33#include <asm/time.h> 32#include <asm/time.h>
34#include <asm/pgalloc.h> 33#include <asm/pgalloc.h>
@@ -44,6 +43,17 @@ void _paravirt_nop(void)
44{ 43{
45} 44}
46 45
46/* identity function, which can be inlined */
47u32 _paravirt_ident_32(u32 x)
48{
49 return x;
50}
51
52u64 _paravirt_ident_64(u64 x)
53{
54 return x;
55}
56
47static void __init default_banner(void) 57static void __init default_banner(void)
48{ 58{
49 printk(KERN_INFO "Booting paravirtualized kernel on %s\n", 59 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
@@ -138,9 +148,16 @@ unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
138 if (opfunc == NULL) 148 if (opfunc == NULL)
139 /* If there's no function, patch it with a ud2a (BUG) */ 149 /* If there's no function, patch it with a ud2a (BUG) */
140 ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a)); 150 ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a));
141 else if (opfunc == paravirt_nop) 151 else if (opfunc == _paravirt_nop)
142 /* If the operation is a nop, then nop the callsite */ 152 /* If the operation is a nop, then nop the callsite */
143 ret = paravirt_patch_nop(); 153 ret = paravirt_patch_nop();
154
155 /* identity functions just return their single argument */
156 else if (opfunc == _paravirt_ident_32)
157 ret = paravirt_patch_ident_32(insnbuf, len);
158 else if (opfunc == _paravirt_ident_64)
159 ret = paravirt_patch_ident_64(insnbuf, len);
160
144 else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) || 161 else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) ||
145 type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) || 162 type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) ||
146 type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) || 163 type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) ||
@@ -318,10 +335,10 @@ struct pv_time_ops pv_time_ops = {
318 335
319struct pv_irq_ops pv_irq_ops = { 336struct pv_irq_ops pv_irq_ops = {
320 .init_IRQ = native_init_IRQ, 337 .init_IRQ = native_init_IRQ,
321 .save_fl = native_save_fl, 338 .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl),
322 .restore_fl = native_restore_fl, 339 .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl),
323 .irq_disable = native_irq_disable, 340 .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable),
324 .irq_enable = native_irq_enable, 341 .irq_enable = __PV_IS_CALLEE_SAVE(native_irq_enable),
325 .safe_halt = native_safe_halt, 342 .safe_halt = native_safe_halt,
326 .halt = native_halt, 343 .halt = native_halt,
327#ifdef CONFIG_X86_64 344#ifdef CONFIG_X86_64
@@ -399,6 +416,14 @@ struct pv_apic_ops pv_apic_ops = {
399#endif 416#endif
400}; 417};
401 418
419#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_PAE)
420/* 32-bit pagetable entries */
421#define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_32)
422#else
423/* 64-bit pagetable entries */
424#define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_64)
425#endif
426
402struct pv_mmu_ops pv_mmu_ops = { 427struct pv_mmu_ops pv_mmu_ops = {
403#ifndef CONFIG_X86_64 428#ifndef CONFIG_X86_64
404 .pagetable_setup_start = native_pagetable_setup_start, 429 .pagetable_setup_start = native_pagetable_setup_start,
@@ -450,22 +475,23 @@ struct pv_mmu_ops pv_mmu_ops = {
450 .pmd_clear = native_pmd_clear, 475 .pmd_clear = native_pmd_clear,
451#endif 476#endif
452 .set_pud = native_set_pud, 477 .set_pud = native_set_pud,
453 .pmd_val = native_pmd_val, 478
454 .make_pmd = native_make_pmd, 479 .pmd_val = PTE_IDENT,
480 .make_pmd = PTE_IDENT,
455 481
456#if PAGETABLE_LEVELS == 4 482#if PAGETABLE_LEVELS == 4
457 .pud_val = native_pud_val, 483 .pud_val = PTE_IDENT,
458 .make_pud = native_make_pud, 484 .make_pud = PTE_IDENT,
485
459 .set_pgd = native_set_pgd, 486 .set_pgd = native_set_pgd,
460#endif 487#endif
461#endif /* PAGETABLE_LEVELS >= 3 */ 488#endif /* PAGETABLE_LEVELS >= 3 */
462 489
463 .pte_val = native_pte_val, 490 .pte_val = PTE_IDENT,
464 .pte_flags = native_pte_flags, 491 .pgd_val = PTE_IDENT,
465 .pgd_val = native_pgd_val,
466 492
467 .make_pte = native_make_pte, 493 .make_pte = PTE_IDENT,
468 .make_pgd = native_make_pgd, 494 .make_pgd = PTE_IDENT,
469 495
470 .dup_mmap = paravirt_nop, 496 .dup_mmap = paravirt_nop,
471 .exit_mmap = paravirt_nop, 497 .exit_mmap = paravirt_nop,
diff --git a/arch/x86/kernel/paravirt_patch_32.c b/arch/x86/kernel/paravirt_patch_32.c
index 9fe644f4861d..d9f32e6d6ab6 100644
--- a/arch/x86/kernel/paravirt_patch_32.c
+++ b/arch/x86/kernel/paravirt_patch_32.c
@@ -12,6 +12,18 @@ DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax");
12DEF_NATIVE(pv_cpu_ops, clts, "clts"); 12DEF_NATIVE(pv_cpu_ops, clts, "clts");
13DEF_NATIVE(pv_cpu_ops, read_tsc, "rdtsc"); 13DEF_NATIVE(pv_cpu_ops, read_tsc, "rdtsc");
14 14
15unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
16{
17 /* arg in %eax, return in %eax */
18 return 0;
19}
20
21unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
22{
23 /* arg in %edx:%eax, return in %edx:%eax */
24 return 0;
25}
26
15unsigned native_patch(u8 type, u16 clobbers, void *ibuf, 27unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
16 unsigned long addr, unsigned len) 28 unsigned long addr, unsigned len)
17{ 29{
diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c
index 061d01df9ae6..3f08f34f93eb 100644
--- a/arch/x86/kernel/paravirt_patch_64.c
+++ b/arch/x86/kernel/paravirt_patch_64.c
@@ -19,6 +19,21 @@ DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
19DEF_NATIVE(pv_cpu_ops, usergs_sysret32, "swapgs; sysretl"); 19DEF_NATIVE(pv_cpu_ops, usergs_sysret32, "swapgs; sysretl");
20DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs"); 20DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs");
21 21
22DEF_NATIVE(, mov32, "mov %edi, %eax");
23DEF_NATIVE(, mov64, "mov %rdi, %rax");
24
25unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
26{
27 return paravirt_patch_insns(insnbuf, len,
28 start__mov32, end__mov32);
29}
30
31unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
32{
33 return paravirt_patch_insns(insnbuf, len,
34 start__mov64, end__mov64);
35}
36
22unsigned native_patch(u8 type, u16 clobbers, void *ibuf, 37unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
23 unsigned long addr, unsigned len) 38 unsigned long addr, unsigned len)
24{ 39{
diff --git a/arch/x86/kernel/probe_roms_32.c b/arch/x86/kernel/probe_roms_32.c
index 675a48c404a5..071e7fea42e5 100644
--- a/arch/x86/kernel/probe_roms_32.c
+++ b/arch/x86/kernel/probe_roms_32.c
@@ -18,7 +18,7 @@
18#include <asm/setup.h> 18#include <asm/setup.h>
19#include <asm/sections.h> 19#include <asm/sections.h>
20#include <asm/io.h> 20#include <asm/io.h>
21#include <setup_arch.h> 21#include <asm/setup_arch.h>
22 22
23static struct resource system_rom_resource = { 23static struct resource system_rom_resource = {
24 .name = "System ROM", 24 .name = "System ROM",
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 6d12f7e37f8c..6afa5232dbb7 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -1,8 +1,8 @@
1#include <linux/errno.h> 1#include <linux/errno.h>
2#include <linux/kernel.h> 2#include <linux/kernel.h>
3#include <linux/mm.h> 3#include <linux/mm.h>
4#include <asm/idle.h>
5#include <linux/smp.h> 4#include <linux/smp.h>
5#include <linux/prctl.h>
6#include <linux/slab.h> 6#include <linux/slab.h>
7#include <linux/sched.h> 7#include <linux/sched.h>
8#include <linux/module.h> 8#include <linux/module.h>
@@ -11,6 +11,9 @@
11#include <linux/ftrace.h> 11#include <linux/ftrace.h>
12#include <asm/system.h> 12#include <asm/system.h>
13#include <asm/apic.h> 13#include <asm/apic.h>
14#include <asm/idle.h>
15#include <asm/uaccess.h>
16#include <asm/i387.h>
14 17
15unsigned long idle_halt; 18unsigned long idle_halt;
16EXPORT_SYMBOL(idle_halt); 19EXPORT_SYMBOL(idle_halt);
@@ -56,6 +59,192 @@ void arch_task_cache_init(void)
56} 59}
57 60
58/* 61/*
62 * Free current thread data structures etc..
63 */
64void exit_thread(void)
65{
66 struct task_struct *me = current;
67 struct thread_struct *t = &me->thread;
68
69 if (me->thread.io_bitmap_ptr) {
70 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
71
72 kfree(t->io_bitmap_ptr);
73 t->io_bitmap_ptr = NULL;
74 clear_thread_flag(TIF_IO_BITMAP);
75 /*
76 * Careful, clear this in the TSS too:
77 */
78 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
79 t->io_bitmap_max = 0;
80 put_cpu();
81 }
82
83 ds_exit_thread(current);
84}
85
86void flush_thread(void)
87{
88 struct task_struct *tsk = current;
89
90#ifdef CONFIG_X86_64
91 if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) {
92 clear_tsk_thread_flag(tsk, TIF_ABI_PENDING);
93 if (test_tsk_thread_flag(tsk, TIF_IA32)) {
94 clear_tsk_thread_flag(tsk, TIF_IA32);
95 } else {
96 set_tsk_thread_flag(tsk, TIF_IA32);
97 current_thread_info()->status |= TS_COMPAT;
98 }
99 }
100#endif
101
102 clear_tsk_thread_flag(tsk, TIF_DEBUG);
103
104 tsk->thread.debugreg0 = 0;
105 tsk->thread.debugreg1 = 0;
106 tsk->thread.debugreg2 = 0;
107 tsk->thread.debugreg3 = 0;
108 tsk->thread.debugreg6 = 0;
109 tsk->thread.debugreg7 = 0;
110 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
111 /*
112 * Forget coprocessor state..
113 */
114 tsk->fpu_counter = 0;
115 clear_fpu(tsk);
116 clear_used_math();
117}
118
119static void hard_disable_TSC(void)
120{
121 write_cr4(read_cr4() | X86_CR4_TSD);
122}
123
124void disable_TSC(void)
125{
126 preempt_disable();
127 if (!test_and_set_thread_flag(TIF_NOTSC))
128 /*
129 * Must flip the CPU state synchronously with
130 * TIF_NOTSC in the current running context.
131 */
132 hard_disable_TSC();
133 preempt_enable();
134}
135
136static void hard_enable_TSC(void)
137{
138 write_cr4(read_cr4() & ~X86_CR4_TSD);
139}
140
141static void enable_TSC(void)
142{
143 preempt_disable();
144 if (test_and_clear_thread_flag(TIF_NOTSC))
145 /*
146 * Must flip the CPU state synchronously with
147 * TIF_NOTSC in the current running context.
148 */
149 hard_enable_TSC();
150 preempt_enable();
151}
152
153int get_tsc_mode(unsigned long adr)
154{
155 unsigned int val;
156
157 if (test_thread_flag(TIF_NOTSC))
158 val = PR_TSC_SIGSEGV;
159 else
160 val = PR_TSC_ENABLE;
161
162 return put_user(val, (unsigned int __user *)adr);
163}
164
165int set_tsc_mode(unsigned int val)
166{
167 if (val == PR_TSC_SIGSEGV)
168 disable_TSC();
169 else if (val == PR_TSC_ENABLE)
170 enable_TSC();
171 else
172 return -EINVAL;
173
174 return 0;
175}
176
177void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
178 struct tss_struct *tss)
179{
180 struct thread_struct *prev, *next;
181
182 prev = &prev_p->thread;
183 next = &next_p->thread;
184
185 if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
186 test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
187 ds_switch_to(prev_p, next_p);
188 else if (next->debugctlmsr != prev->debugctlmsr)
189 update_debugctlmsr(next->debugctlmsr);
190
191 if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
192 set_debugreg(next->debugreg0, 0);
193 set_debugreg(next->debugreg1, 1);
194 set_debugreg(next->debugreg2, 2);
195 set_debugreg(next->debugreg3, 3);
196 /* no 4 and 5 */
197 set_debugreg(next->debugreg6, 6);
198 set_debugreg(next->debugreg7, 7);
199 }
200
201 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
202 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
203 /* prev and next are different */
204 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
205 hard_disable_TSC();
206 else
207 hard_enable_TSC();
208 }
209
210 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
211 /*
212 * Copy the relevant range of the IO bitmap.
213 * Normally this is 128 bytes or less:
214 */
215 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
216 max(prev->io_bitmap_max, next->io_bitmap_max));
217 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
218 /*
219 * Clear any possible leftover bits:
220 */
221 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
222 }
223}
224
225int sys_fork(struct pt_regs *regs)
226{
227 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
228}
229
230/*
231 * This is trivial, and on the face of it looks like it
232 * could equally well be done in user mode.
233 *
234 * Not so, for quite unobvious reasons - register pressure.
235 * In user mode vfork() cannot have a stack frame, and if
236 * done by calling the "clone()" system call directly, you
237 * do not have enough call-clobbered registers to hold all
238 * the information you need.
239 */
240int sys_vfork(struct pt_regs *regs)
241{
242 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
243 NULL, NULL);
244}
245
246
247/*
59 * Idle related variables and functions 248 * Idle related variables and functions
60 */ 249 */
61unsigned long boot_option_idle_override = 0; 250unsigned long boot_option_idle_override = 0;
@@ -350,7 +539,7 @@ static void c1e_idle(void)
350 539
351void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c) 540void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
352{ 541{
353#ifdef CONFIG_X86_SMP 542#ifdef CONFIG_SMP
354 if (pm_idle == poll_idle && smp_num_siblings > 1) { 543 if (pm_idle == poll_idle && smp_num_siblings > 1) {
355 printk(KERN_WARNING "WARNING: polling idle and HT enabled," 544 printk(KERN_WARNING "WARNING: polling idle and HT enabled,"
356 " performance may degrade.\n"); 545 " performance may degrade.\n");
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index bd4da2af08ae..14014d766cad 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -11,6 +11,7 @@
11 11
12#include <stdarg.h> 12#include <stdarg.h>
13 13
14#include <linux/stackprotector.h>
14#include <linux/cpu.h> 15#include <linux/cpu.h>
15#include <linux/errno.h> 16#include <linux/errno.h>
16#include <linux/sched.h> 17#include <linux/sched.h>
@@ -66,9 +67,6 @@ asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
66DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task; 67DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task;
67EXPORT_PER_CPU_SYMBOL(current_task); 68EXPORT_PER_CPU_SYMBOL(current_task);
68 69
69DEFINE_PER_CPU(int, cpu_number);
70EXPORT_PER_CPU_SYMBOL(cpu_number);
71
72/* 70/*
73 * Return saved PC of a blocked thread. 71 * Return saved PC of a blocked thread.
74 */ 72 */
@@ -94,6 +92,15 @@ void cpu_idle(void)
94{ 92{
95 int cpu = smp_processor_id(); 93 int cpu = smp_processor_id();
96 94
95 /*
96 * If we're the non-boot CPU, nothing set the stack canary up
97 * for us. CPU0 already has it initialized but no harm in
98 * doing it again. This is a good place for updating it, as
99 * we wont ever return from this function (so the invalid
100 * canaries already on the stack wont ever trigger).
101 */
102 boot_init_stack_canary();
103
97 current_thread_info()->status |= TS_POLLING; 104 current_thread_info()->status |= TS_POLLING;
98 105
99 /* endless idle loop with no priority at all */ 106 /* endless idle loop with no priority at all */
@@ -108,7 +115,6 @@ void cpu_idle(void)
108 play_dead(); 115 play_dead();
109 116
110 local_irq_disable(); 117 local_irq_disable();
111 __get_cpu_var(irq_stat).idle_timestamp = jiffies;
112 /* Don't trace irqs off for idle */ 118 /* Don't trace irqs off for idle */
113 stop_critical_timings(); 119 stop_critical_timings();
114 pm_idle(); 120 pm_idle();
@@ -132,7 +138,7 @@ void __show_regs(struct pt_regs *regs, int all)
132 if (user_mode_vm(regs)) { 138 if (user_mode_vm(regs)) {
133 sp = regs->sp; 139 sp = regs->sp;
134 ss = regs->ss & 0xffff; 140 ss = regs->ss & 0xffff;
135 savesegment(gs, gs); 141 gs = get_user_gs(regs);
136 } else { 142 } else {
137 sp = (unsigned long) (&regs->sp); 143 sp = (unsigned long) (&regs->sp);
138 savesegment(ss, ss); 144 savesegment(ss, ss);
@@ -213,6 +219,7 @@ int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
213 regs.ds = __USER_DS; 219 regs.ds = __USER_DS;
214 regs.es = __USER_DS; 220 regs.es = __USER_DS;
215 regs.fs = __KERNEL_PERCPU; 221 regs.fs = __KERNEL_PERCPU;
222 regs.gs = __KERNEL_STACK_CANARY;
216 regs.orig_ax = -1; 223 regs.orig_ax = -1;
217 regs.ip = (unsigned long) kernel_thread_helper; 224 regs.ip = (unsigned long) kernel_thread_helper;
218 regs.cs = __KERNEL_CS | get_kernel_rpl(); 225 regs.cs = __KERNEL_CS | get_kernel_rpl();
@@ -223,55 +230,6 @@ int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
223} 230}
224EXPORT_SYMBOL(kernel_thread); 231EXPORT_SYMBOL(kernel_thread);
225 232
226/*
227 * Free current thread data structures etc..
228 */
229void exit_thread(void)
230{
231 /* The process may have allocated an io port bitmap... nuke it. */
232 if (unlikely(test_thread_flag(TIF_IO_BITMAP))) {
233 struct task_struct *tsk = current;
234 struct thread_struct *t = &tsk->thread;
235 int cpu = get_cpu();
236 struct tss_struct *tss = &per_cpu(init_tss, cpu);
237
238 kfree(t->io_bitmap_ptr);
239 t->io_bitmap_ptr = NULL;
240 clear_thread_flag(TIF_IO_BITMAP);
241 /*
242 * Careful, clear this in the TSS too:
243 */
244 memset(tss->io_bitmap, 0xff, tss->io_bitmap_max);
245 t->io_bitmap_max = 0;
246 tss->io_bitmap_owner = NULL;
247 tss->io_bitmap_max = 0;
248 tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET;
249 put_cpu();
250 }
251
252 ds_exit_thread(current);
253}
254
255void flush_thread(void)
256{
257 struct task_struct *tsk = current;
258
259 tsk->thread.debugreg0 = 0;
260 tsk->thread.debugreg1 = 0;
261 tsk->thread.debugreg2 = 0;
262 tsk->thread.debugreg3 = 0;
263 tsk->thread.debugreg6 = 0;
264 tsk->thread.debugreg7 = 0;
265 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
266 clear_tsk_thread_flag(tsk, TIF_DEBUG);
267 /*
268 * Forget coprocessor state..
269 */
270 tsk->fpu_counter = 0;
271 clear_fpu(tsk);
272 clear_used_math();
273}
274
275void release_thread(struct task_struct *dead_task) 233void release_thread(struct task_struct *dead_task)
276{ 234{
277 BUG_ON(dead_task->mm); 235 BUG_ON(dead_task->mm);
@@ -305,7 +263,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
305 263
306 p->thread.ip = (unsigned long) ret_from_fork; 264 p->thread.ip = (unsigned long) ret_from_fork;
307 265
308 savesegment(gs, p->thread.gs); 266 task_user_gs(p) = get_user_gs(regs);
309 267
310 tsk = current; 268 tsk = current;
311 if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) { 269 if (unlikely(test_tsk_thread_flag(tsk, TIF_IO_BITMAP))) {
@@ -343,7 +301,7 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
343void 301void
344start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) 302start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
345{ 303{
346 __asm__("movl %0, %%gs" : : "r"(0)); 304 set_user_gs(regs, 0);
347 regs->fs = 0; 305 regs->fs = 0;
348 set_fs(USER_DS); 306 set_fs(USER_DS);
349 regs->ds = __USER_DS; 307 regs->ds = __USER_DS;
@@ -359,127 +317,6 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
359} 317}
360EXPORT_SYMBOL_GPL(start_thread); 318EXPORT_SYMBOL_GPL(start_thread);
361 319
362static void hard_disable_TSC(void)
363{
364 write_cr4(read_cr4() | X86_CR4_TSD);
365}
366
367void disable_TSC(void)
368{
369 preempt_disable();
370 if (!test_and_set_thread_flag(TIF_NOTSC))
371 /*
372 * Must flip the CPU state synchronously with
373 * TIF_NOTSC in the current running context.
374 */
375 hard_disable_TSC();
376 preempt_enable();
377}
378
379static void hard_enable_TSC(void)
380{
381 write_cr4(read_cr4() & ~X86_CR4_TSD);
382}
383
384static void enable_TSC(void)
385{
386 preempt_disable();
387 if (test_and_clear_thread_flag(TIF_NOTSC))
388 /*
389 * Must flip the CPU state synchronously with
390 * TIF_NOTSC in the current running context.
391 */
392 hard_enable_TSC();
393 preempt_enable();
394}
395
396int get_tsc_mode(unsigned long adr)
397{
398 unsigned int val;
399
400 if (test_thread_flag(TIF_NOTSC))
401 val = PR_TSC_SIGSEGV;
402 else
403 val = PR_TSC_ENABLE;
404
405 return put_user(val, (unsigned int __user *)adr);
406}
407
408int set_tsc_mode(unsigned int val)
409{
410 if (val == PR_TSC_SIGSEGV)
411 disable_TSC();
412 else if (val == PR_TSC_ENABLE)
413 enable_TSC();
414 else
415 return -EINVAL;
416
417 return 0;
418}
419
420static noinline void
421__switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
422 struct tss_struct *tss)
423{
424 struct thread_struct *prev, *next;
425
426 prev = &prev_p->thread;
427 next = &next_p->thread;
428
429 if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
430 test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
431 ds_switch_to(prev_p, next_p);
432 else if (next->debugctlmsr != prev->debugctlmsr)
433 update_debugctlmsr(next->debugctlmsr);
434
435 if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
436 set_debugreg(next->debugreg0, 0);
437 set_debugreg(next->debugreg1, 1);
438 set_debugreg(next->debugreg2, 2);
439 set_debugreg(next->debugreg3, 3);
440 /* no 4 and 5 */
441 set_debugreg(next->debugreg6, 6);
442 set_debugreg(next->debugreg7, 7);
443 }
444
445 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
446 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
447 /* prev and next are different */
448 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
449 hard_disable_TSC();
450 else
451 hard_enable_TSC();
452 }
453
454 if (!test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
455 /*
456 * Disable the bitmap via an invalid offset. We still cache
457 * the previous bitmap owner and the IO bitmap contents:
458 */
459 tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET;
460 return;
461 }
462
463 if (likely(next == tss->io_bitmap_owner)) {
464 /*
465 * Previous owner of the bitmap (hence the bitmap content)
466 * matches the next task, we dont have to do anything but
467 * to set a valid offset in the TSS:
468 */
469 tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
470 return;
471 }
472 /*
473 * Lazy TSS's I/O bitmap copy. We set an invalid offset here
474 * and we let the task to get a GPF in case an I/O instruction
475 * is performed. The handler of the GPF will verify that the
476 * faulting task has a valid I/O bitmap and, it true, does the
477 * real copy and restart the instruction. This will save us
478 * redundant copies when the currently switched task does not
479 * perform any I/O during its timeslice.
480 */
481 tss->x86_tss.io_bitmap_base = INVALID_IO_BITMAP_OFFSET_LAZY;
482}
483 320
484/* 321/*
485 * switch_to(x,yn) should switch tasks from x to y. 322 * switch_to(x,yn) should switch tasks from x to y.
@@ -540,7 +377,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
540 * used %fs or %gs (it does not today), or if the kernel is 377 * used %fs or %gs (it does not today), or if the kernel is
541 * running inside of a hypervisor layer. 378 * running inside of a hypervisor layer.
542 */ 379 */
543 savesegment(gs, prev->gs); 380 lazy_save_gs(prev->gs);
544 381
545 /* 382 /*
546 * Load the per-thread Thread-Local Storage descriptor. 383 * Load the per-thread Thread-Local Storage descriptor.
@@ -586,64 +423,44 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
586 * Restore %gs if needed (which is common) 423 * Restore %gs if needed (which is common)
587 */ 424 */
588 if (prev->gs | next->gs) 425 if (prev->gs | next->gs)
589 loadsegment(gs, next->gs); 426 lazy_load_gs(next->gs);
590 427
591 x86_write_percpu(current_task, next_p); 428 percpu_write(current_task, next_p);
592 429
593 return prev_p; 430 return prev_p;
594} 431}
595 432
596asmlinkage int sys_fork(struct pt_regs regs) 433int sys_clone(struct pt_regs *regs)
597{
598 return do_fork(SIGCHLD, regs.sp, &regs, 0, NULL, NULL);
599}
600
601asmlinkage int sys_clone(struct pt_regs regs)
602{ 434{
603 unsigned long clone_flags; 435 unsigned long clone_flags;
604 unsigned long newsp; 436 unsigned long newsp;
605 int __user *parent_tidptr, *child_tidptr; 437 int __user *parent_tidptr, *child_tidptr;
606 438
607 clone_flags = regs.bx; 439 clone_flags = regs->bx;
608 newsp = regs.cx; 440 newsp = regs->cx;
609 parent_tidptr = (int __user *)regs.dx; 441 parent_tidptr = (int __user *)regs->dx;
610 child_tidptr = (int __user *)regs.di; 442 child_tidptr = (int __user *)regs->di;
611 if (!newsp) 443 if (!newsp)
612 newsp = regs.sp; 444 newsp = regs->sp;
613 return do_fork(clone_flags, newsp, &regs, 0, parent_tidptr, child_tidptr); 445 return do_fork(clone_flags, newsp, regs, 0, parent_tidptr, child_tidptr);
614}
615
616/*
617 * This is trivial, and on the face of it looks like it
618 * could equally well be done in user mode.
619 *
620 * Not so, for quite unobvious reasons - register pressure.
621 * In user mode vfork() cannot have a stack frame, and if
622 * done by calling the "clone()" system call directly, you
623 * do not have enough call-clobbered registers to hold all
624 * the information you need.
625 */
626asmlinkage int sys_vfork(struct pt_regs regs)
627{
628 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs.sp, &regs, 0, NULL, NULL);
629} 446}
630 447
631/* 448/*
632 * sys_execve() executes a new program. 449 * sys_execve() executes a new program.
633 */ 450 */
634asmlinkage int sys_execve(struct pt_regs regs) 451int sys_execve(struct pt_regs *regs)
635{ 452{
636 int error; 453 int error;
637 char *filename; 454 char *filename;
638 455
639 filename = getname((char __user *) regs.bx); 456 filename = getname((char __user *) regs->bx);
640 error = PTR_ERR(filename); 457 error = PTR_ERR(filename);
641 if (IS_ERR(filename)) 458 if (IS_ERR(filename))
642 goto out; 459 goto out;
643 error = do_execve(filename, 460 error = do_execve(filename,
644 (char __user * __user *) regs.cx, 461 (char __user * __user *) regs->cx,
645 (char __user * __user *) regs.dx, 462 (char __user * __user *) regs->dx,
646 &regs); 463 regs);
647 if (error == 0) { 464 if (error == 0) {
648 /* Make sure we don't return using sysenter.. */ 465 /* Make sure we don't return using sysenter.. */
649 set_thread_flag(TIF_IRET); 466 set_thread_flag(TIF_IRET);
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 85b4cb5c1980..abb7e6a7f0c6 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -16,6 +16,7 @@
16 16
17#include <stdarg.h> 17#include <stdarg.h>
18 18
19#include <linux/stackprotector.h>
19#include <linux/cpu.h> 20#include <linux/cpu.h>
20#include <linux/errno.h> 21#include <linux/errno.h>
21#include <linux/sched.h> 22#include <linux/sched.h>
@@ -47,7 +48,6 @@
47#include <asm/processor.h> 48#include <asm/processor.h>
48#include <asm/i387.h> 49#include <asm/i387.h>
49#include <asm/mmu_context.h> 50#include <asm/mmu_context.h>
50#include <asm/pda.h>
51#include <asm/prctl.h> 51#include <asm/prctl.h>
52#include <asm/desc.h> 52#include <asm/desc.h>
53#include <asm/proto.h> 53#include <asm/proto.h>
@@ -58,6 +58,12 @@
58 58
59asmlinkage extern void ret_from_fork(void); 59asmlinkage extern void ret_from_fork(void);
60 60
61DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task;
62EXPORT_PER_CPU_SYMBOL(current_task);
63
64DEFINE_PER_CPU(unsigned long, old_rsp);
65static DEFINE_PER_CPU(unsigned char, is_idle);
66
61unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED; 67unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED;
62 68
63static ATOMIC_NOTIFIER_HEAD(idle_notifier); 69static ATOMIC_NOTIFIER_HEAD(idle_notifier);
@@ -76,13 +82,13 @@ EXPORT_SYMBOL_GPL(idle_notifier_unregister);
76 82
77void enter_idle(void) 83void enter_idle(void)
78{ 84{
79 write_pda(isidle, 1); 85 percpu_write(is_idle, 1);
80 atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL); 86 atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
81} 87}
82 88
83static void __exit_idle(void) 89static void __exit_idle(void)
84{ 90{
85 if (test_and_clear_bit_pda(0, isidle) == 0) 91 if (x86_test_and_clear_bit_percpu(0, is_idle) == 0)
86 return; 92 return;
87 atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL); 93 atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
88} 94}
@@ -112,6 +118,16 @@ static inline void play_dead(void)
112void cpu_idle(void) 118void cpu_idle(void)
113{ 119{
114 current_thread_info()->status |= TS_POLLING; 120 current_thread_info()->status |= TS_POLLING;
121
122 /*
123 * If we're the non-boot CPU, nothing set the stack canary up
124 * for us. CPU0 already has it initialized but no harm in
125 * doing it again. This is a good place for updating it, as
126 * we wont ever return from this function (so the invalid
127 * canaries already on the stack wont ever trigger).
128 */
129 boot_init_stack_canary();
130
115 /* endless idle loop with no priority at all */ 131 /* endless idle loop with no priority at all */
116 while (1) { 132 while (1) {
117 tick_nohz_stop_sched_tick(1); 133 tick_nohz_stop_sched_tick(1);
@@ -221,61 +237,6 @@ void show_regs(struct pt_regs *regs)
221 show_trace(NULL, regs, (void *)(regs + 1), regs->bp); 237 show_trace(NULL, regs, (void *)(regs + 1), regs->bp);
222} 238}
223 239
224/*
225 * Free current thread data structures etc..
226 */
227void exit_thread(void)
228{
229 struct task_struct *me = current;
230 struct thread_struct *t = &me->thread;
231
232 if (me->thread.io_bitmap_ptr) {
233 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
234
235 kfree(t->io_bitmap_ptr);
236 t->io_bitmap_ptr = NULL;
237 clear_thread_flag(TIF_IO_BITMAP);
238 /*
239 * Careful, clear this in the TSS too:
240 */
241 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
242 t->io_bitmap_max = 0;
243 put_cpu();
244 }
245
246 ds_exit_thread(current);
247}
248
249void flush_thread(void)
250{
251 struct task_struct *tsk = current;
252
253 if (test_tsk_thread_flag(tsk, TIF_ABI_PENDING)) {
254 clear_tsk_thread_flag(tsk, TIF_ABI_PENDING);
255 if (test_tsk_thread_flag(tsk, TIF_IA32)) {
256 clear_tsk_thread_flag(tsk, TIF_IA32);
257 } else {
258 set_tsk_thread_flag(tsk, TIF_IA32);
259 current_thread_info()->status |= TS_COMPAT;
260 }
261 }
262 clear_tsk_thread_flag(tsk, TIF_DEBUG);
263
264 tsk->thread.debugreg0 = 0;
265 tsk->thread.debugreg1 = 0;
266 tsk->thread.debugreg2 = 0;
267 tsk->thread.debugreg3 = 0;
268 tsk->thread.debugreg6 = 0;
269 tsk->thread.debugreg7 = 0;
270 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
271 /*
272 * Forget coprocessor state..
273 */
274 tsk->fpu_counter = 0;
275 clear_fpu(tsk);
276 clear_used_math();
277}
278
279void release_thread(struct task_struct *dead_task) 240void release_thread(struct task_struct *dead_task)
280{ 241{
281 if (dead_task->mm) { 242 if (dead_task->mm) {
@@ -397,7 +358,7 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
397 load_gs_index(0); 358 load_gs_index(0);
398 regs->ip = new_ip; 359 regs->ip = new_ip;
399 regs->sp = new_sp; 360 regs->sp = new_sp;
400 write_pda(oldrsp, new_sp); 361 percpu_write(old_rsp, new_sp);
401 regs->cs = __USER_CS; 362 regs->cs = __USER_CS;
402 regs->ss = __USER_DS; 363 regs->ss = __USER_DS;
403 regs->flags = 0x200; 364 regs->flags = 0x200;
@@ -409,118 +370,6 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
409} 370}
410EXPORT_SYMBOL_GPL(start_thread); 371EXPORT_SYMBOL_GPL(start_thread);
411 372
412static void hard_disable_TSC(void)
413{
414 write_cr4(read_cr4() | X86_CR4_TSD);
415}
416
417void disable_TSC(void)
418{
419 preempt_disable();
420 if (!test_and_set_thread_flag(TIF_NOTSC))
421 /*
422 * Must flip the CPU state synchronously with
423 * TIF_NOTSC in the current running context.
424 */
425 hard_disable_TSC();
426 preempt_enable();
427}
428
429static void hard_enable_TSC(void)
430{
431 write_cr4(read_cr4() & ~X86_CR4_TSD);
432}
433
434static void enable_TSC(void)
435{
436 preempt_disable();
437 if (test_and_clear_thread_flag(TIF_NOTSC))
438 /*
439 * Must flip the CPU state synchronously with
440 * TIF_NOTSC in the current running context.
441 */
442 hard_enable_TSC();
443 preempt_enable();
444}
445
446int get_tsc_mode(unsigned long adr)
447{
448 unsigned int val;
449
450 if (test_thread_flag(TIF_NOTSC))
451 val = PR_TSC_SIGSEGV;
452 else
453 val = PR_TSC_ENABLE;
454
455 return put_user(val, (unsigned int __user *)adr);
456}
457
458int set_tsc_mode(unsigned int val)
459{
460 if (val == PR_TSC_SIGSEGV)
461 disable_TSC();
462 else if (val == PR_TSC_ENABLE)
463 enable_TSC();
464 else
465 return -EINVAL;
466
467 return 0;
468}
469
470/*
471 * This special macro can be used to load a debugging register
472 */
473#define loaddebug(thread, r) set_debugreg(thread->debugreg ## r, r)
474
475static inline void __switch_to_xtra(struct task_struct *prev_p,
476 struct task_struct *next_p,
477 struct tss_struct *tss)
478{
479 struct thread_struct *prev, *next;
480
481 prev = &prev_p->thread,
482 next = &next_p->thread;
483
484 if (test_tsk_thread_flag(next_p, TIF_DS_AREA_MSR) ||
485 test_tsk_thread_flag(prev_p, TIF_DS_AREA_MSR))
486 ds_switch_to(prev_p, next_p);
487 else if (next->debugctlmsr != prev->debugctlmsr)
488 update_debugctlmsr(next->debugctlmsr);
489
490 if (test_tsk_thread_flag(next_p, TIF_DEBUG)) {
491 loaddebug(next, 0);
492 loaddebug(next, 1);
493 loaddebug(next, 2);
494 loaddebug(next, 3);
495 /* no 4 and 5 */
496 loaddebug(next, 6);
497 loaddebug(next, 7);
498 }
499
500 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
501 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
502 /* prev and next are different */
503 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
504 hard_disable_TSC();
505 else
506 hard_enable_TSC();
507 }
508
509 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
510 /*
511 * Copy the relevant range of the IO bitmap.
512 * Normally this is 128 bytes or less:
513 */
514 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
515 max(prev->io_bitmap_max, next->io_bitmap_max));
516 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
517 /*
518 * Clear any possible leftover bits:
519 */
520 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
521 }
522}
523
524/* 373/*
525 * switch_to(x,y) should switch tasks from x to y. 374 * switch_to(x,y) should switch tasks from x to y.
526 * 375 *
@@ -618,21 +467,13 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
618 /* 467 /*
619 * Switch the PDA and FPU contexts. 468 * Switch the PDA and FPU contexts.
620 */ 469 */
621 prev->usersp = read_pda(oldrsp); 470 prev->usersp = percpu_read(old_rsp);
622 write_pda(oldrsp, next->usersp); 471 percpu_write(old_rsp, next->usersp);
623 write_pda(pcurrent, next_p); 472 percpu_write(current_task, next_p);
624 473
625 write_pda(kernelstack, 474 percpu_write(kernel_stack,
626 (unsigned long)task_stack_page(next_p) + 475 (unsigned long)task_stack_page(next_p) +
627 THREAD_SIZE - PDA_STACKOFFSET); 476 THREAD_SIZE - KERNEL_STACK_OFFSET);
628#ifdef CONFIG_CC_STACKPROTECTOR
629 write_pda(stack_canary, next_p->stack_canary);
630 /*
631 * Build time only check to make sure the stack_canary is at
632 * offset 40 in the pda; this is a gcc ABI requirement
633 */
634 BUILD_BUG_ON(offsetof(struct x8664_pda, stack_canary) != 40);
635#endif
636 477
637 /* 478 /*
638 * Now maybe reload the debug registers and handle I/O bitmaps 479 * Now maybe reload the debug registers and handle I/O bitmaps
@@ -686,11 +527,6 @@ void set_personality_64bit(void)
686 current->personality &= ~READ_IMPLIES_EXEC; 527 current->personality &= ~READ_IMPLIES_EXEC;
687} 528}
688 529
689asmlinkage long sys_fork(struct pt_regs *regs)
690{
691 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
692}
693
694asmlinkage long 530asmlinkage long
695sys_clone(unsigned long clone_flags, unsigned long newsp, 531sys_clone(unsigned long clone_flags, unsigned long newsp,
696 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs) 532 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
@@ -700,22 +536,6 @@ sys_clone(unsigned long clone_flags, unsigned long newsp,
700 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid); 536 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
701} 537}
702 538
703/*
704 * This is trivial, and on the face of it looks like it
705 * could equally well be done in user mode.
706 *
707 * Not so, for quite unobvious reasons - register pressure.
708 * In user mode vfork() cannot have a stack frame, and if
709 * done by calling the "clone()" system call directly, you
710 * do not have enough call-clobbered registers to hold all
711 * the information you need.
712 */
713asmlinkage long sys_vfork(struct pt_regs *regs)
714{
715 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
716 NULL, NULL);
717}
718
719unsigned long get_wchan(struct task_struct *p) 539unsigned long get_wchan(struct task_struct *p)
720{ 540{
721 unsigned long stack; 541 unsigned long stack;
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 06ca07f6ad86..3d9672e59c16 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -75,10 +75,7 @@ static inline bool invalid_selector(u16 value)
75static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno) 75static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno)
76{ 76{
77 BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0); 77 BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0);
78 regno >>= 2; 78 return &regs->bx + (regno >> 2);
79 if (regno > FS)
80 --regno;
81 return &regs->bx + regno;
82} 79}
83 80
84static u16 get_segment_reg(struct task_struct *task, unsigned long offset) 81static u16 get_segment_reg(struct task_struct *task, unsigned long offset)
@@ -90,9 +87,10 @@ static u16 get_segment_reg(struct task_struct *task, unsigned long offset)
90 if (offset != offsetof(struct user_regs_struct, gs)) 87 if (offset != offsetof(struct user_regs_struct, gs))
91 retval = *pt_regs_access(task_pt_regs(task), offset); 88 retval = *pt_regs_access(task_pt_regs(task), offset);
92 else { 89 else {
93 retval = task->thread.gs;
94 if (task == current) 90 if (task == current)
95 savesegment(gs, retval); 91 retval = get_user_gs(task_pt_regs(task));
92 else
93 retval = task_user_gs(task);
96 } 94 }
97 return retval; 95 return retval;
98} 96}
@@ -126,13 +124,10 @@ static int set_segment_reg(struct task_struct *task,
126 break; 124 break;
127 125
128 case offsetof(struct user_regs_struct, gs): 126 case offsetof(struct user_regs_struct, gs):
129 task->thread.gs = value;
130 if (task == current) 127 if (task == current)
131 /* 128 set_user_gs(task_pt_regs(task), value);
132 * The user-mode %gs is not affected by 129 else
133 * kernel entry, so we must update the CPU. 130 task_user_gs(task) = value;
134 */
135 loadsegment(gs, value);
136 } 131 }
137 132
138 return 0; 133 return 0;
@@ -273,7 +268,7 @@ static unsigned long debugreg_addr_limit(struct task_struct *task)
273 if (test_tsk_thread_flag(task, TIF_IA32)) 268 if (test_tsk_thread_flag(task, TIF_IA32))
274 return IA32_PAGE_OFFSET - 3; 269 return IA32_PAGE_OFFSET - 3;
275#endif 270#endif
276 return TASK_SIZE64 - 7; 271 return TASK_SIZE_MAX - 7;
277} 272}
278 273
279#endif /* CONFIG_X86_32 */ 274#endif /* CONFIG_X86_32 */
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 4526b3a75ed2..2aef36d8aca2 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -14,6 +14,7 @@
14#include <asm/reboot.h> 14#include <asm/reboot.h>
15#include <asm/pci_x86.h> 15#include <asm/pci_x86.h>
16#include <asm/virtext.h> 16#include <asm/virtext.h>
17#include <asm/cpu.h>
17 18
18#ifdef CONFIG_X86_32 19#ifdef CONFIG_X86_32
19# include <linux/dmi.h> 20# include <linux/dmi.h>
@@ -23,8 +24,6 @@
23# include <asm/iommu.h> 24# include <asm/iommu.h>
24#endif 25#endif
25 26
26#include <mach_ipi.h>
27
28/* 27/*
29 * Power off function, if any 28 * Power off function, if any
30 */ 29 */
@@ -658,7 +657,7 @@ static int crash_nmi_callback(struct notifier_block *self,
658 657
659static void smp_send_nmi_allbutself(void) 658static void smp_send_nmi_allbutself(void)
660{ 659{
661 send_IPI_allbutself(NMI_VECTOR); 660 apic->send_IPI_allbutself(NMI_VECTOR);
662} 661}
663 662
664static struct notifier_block crash_nmi_nb = { 663static struct notifier_block crash_nmi_nb = {
diff --git a/arch/x86/kernel/relocate_kernel_32.S b/arch/x86/kernel/relocate_kernel_32.S
index a160f3119725..2064d0aa8d28 100644
--- a/arch/x86/kernel/relocate_kernel_32.S
+++ b/arch/x86/kernel/relocate_kernel_32.S
@@ -7,7 +7,7 @@
7 */ 7 */
8 8
9#include <linux/linkage.h> 9#include <linux/linkage.h>
10#include <asm/page.h> 10#include <asm/page_types.h>
11#include <asm/kexec.h> 11#include <asm/kexec.h>
12#include <asm/processor-flags.h> 12#include <asm/processor-flags.h>
13 13
diff --git a/arch/x86/kernel/relocate_kernel_64.S b/arch/x86/kernel/relocate_kernel_64.S
index f5afe665a82b..d32cfb27a479 100644
--- a/arch/x86/kernel/relocate_kernel_64.S
+++ b/arch/x86/kernel/relocate_kernel_64.S
@@ -7,10 +7,10 @@
7 */ 7 */
8 8
9#include <linux/linkage.h> 9#include <linux/linkage.h>
10#include <asm/page.h> 10#include <asm/page_types.h>
11#include <asm/kexec.h> 11#include <asm/kexec.h>
12#include <asm/processor-flags.h> 12#include <asm/processor-flags.h>
13#include <asm/pgtable.h> 13#include <asm/pgtable_types.h>
14 14
15/* 15/*
16 * Must be relocatable PIC code callable as a C function 16 * Must be relocatable PIC code callable as a C function
@@ -29,122 +29,6 @@ relocate_kernel:
29 * %rdx start address 29 * %rdx start address
30 */ 30 */
31 31
32 /* map the control page at its virtual address */
33
34 movq $0x0000ff8000000000, %r10 /* mask */
35 mov $(39 - 3), %cl /* bits to shift */
36 movq PTR(VA_CONTROL_PAGE)(%rsi), %r11 /* address to map */
37
38 movq %r11, %r9
39 andq %r10, %r9
40 shrq %cl, %r9
41
42 movq PTR(VA_PGD)(%rsi), %r8
43 addq %r8, %r9
44 movq PTR(PA_PUD_0)(%rsi), %r8
45 orq $PAGE_ATTR, %r8
46 movq %r8, (%r9)
47
48 shrq $9, %r10
49 sub $9, %cl
50
51 movq %r11, %r9
52 andq %r10, %r9
53 shrq %cl, %r9
54
55 movq PTR(VA_PUD_0)(%rsi), %r8
56 addq %r8, %r9
57 movq PTR(PA_PMD_0)(%rsi), %r8
58 orq $PAGE_ATTR, %r8
59 movq %r8, (%r9)
60
61 shrq $9, %r10
62 sub $9, %cl
63
64 movq %r11, %r9
65 andq %r10, %r9
66 shrq %cl, %r9
67
68 movq PTR(VA_PMD_0)(%rsi), %r8
69 addq %r8, %r9
70 movq PTR(PA_PTE_0)(%rsi), %r8
71 orq $PAGE_ATTR, %r8
72 movq %r8, (%r9)
73
74 shrq $9, %r10
75 sub $9, %cl
76
77 movq %r11, %r9
78 andq %r10, %r9
79 shrq %cl, %r9
80
81 movq PTR(VA_PTE_0)(%rsi), %r8
82 addq %r8, %r9
83 movq PTR(PA_CONTROL_PAGE)(%rsi), %r8
84 orq $PAGE_ATTR, %r8
85 movq %r8, (%r9)
86
87 /* identity map the control page at its physical address */
88
89 movq $0x0000ff8000000000, %r10 /* mask */
90 mov $(39 - 3), %cl /* bits to shift */
91 movq PTR(PA_CONTROL_PAGE)(%rsi), %r11 /* address to map */
92
93 movq %r11, %r9
94 andq %r10, %r9
95 shrq %cl, %r9
96
97 movq PTR(VA_PGD)(%rsi), %r8
98 addq %r8, %r9
99 movq PTR(PA_PUD_1)(%rsi), %r8
100 orq $PAGE_ATTR, %r8
101 movq %r8, (%r9)
102
103 shrq $9, %r10
104 sub $9, %cl
105
106 movq %r11, %r9
107 andq %r10, %r9
108 shrq %cl, %r9
109
110 movq PTR(VA_PUD_1)(%rsi), %r8
111 addq %r8, %r9
112 movq PTR(PA_PMD_1)(%rsi), %r8
113 orq $PAGE_ATTR, %r8
114 movq %r8, (%r9)
115
116 shrq $9, %r10
117 sub $9, %cl
118
119 movq %r11, %r9
120 andq %r10, %r9
121 shrq %cl, %r9
122
123 movq PTR(VA_PMD_1)(%rsi), %r8
124 addq %r8, %r9
125 movq PTR(PA_PTE_1)(%rsi), %r8
126 orq $PAGE_ATTR, %r8
127 movq %r8, (%r9)
128
129 shrq $9, %r10
130 sub $9, %cl
131
132 movq %r11, %r9
133 andq %r10, %r9
134 shrq %cl, %r9
135
136 movq PTR(VA_PTE_1)(%rsi), %r8
137 addq %r8, %r9
138 movq PTR(PA_CONTROL_PAGE)(%rsi), %r8
139 orq $PAGE_ATTR, %r8
140 movq %r8, (%r9)
141
142relocate_new_kernel:
143 /* %rdi indirection_page
144 * %rsi page_list
145 * %rdx start address
146 */
147
148 /* zero out flags, and disable interrupts */ 32 /* zero out flags, and disable interrupts */
149 pushq $0 33 pushq $0
150 popfq 34 popfq
@@ -156,9 +40,8 @@ relocate_new_kernel:
156 /* get physical address of page table now too */ 40 /* get physical address of page table now too */
157 movq PTR(PA_TABLE_PAGE)(%rsi), %rcx 41 movq PTR(PA_TABLE_PAGE)(%rsi), %rcx
158 42
159 /* switch to new set of page tables */ 43 /* Switch to the identity mapped page tables */
160 movq PTR(PA_PGD)(%rsi), %r9 44 movq %rcx, %cr3
161 movq %r9, %cr3
162 45
163 /* setup a new stack at the end of the physical control page */ 46 /* setup a new stack at the end of the physical control page */
164 lea PAGE_SIZE(%r8), %rsp 47 lea PAGE_SIZE(%r8), %rsp
@@ -194,9 +77,7 @@ identity_mapped:
194 jmp 1f 77 jmp 1f
1951: 781:
196 79
197 /* Switch to the identity mapped page tables, 80 /* Flush the TLB (needed?) */
198 * and flush the TLB.
199 */
200 movq %rcx, %cr3 81 movq %rcx, %cr3
201 82
202 /* Do the copies */ 83 /* Do the copies */
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 6a8811a69324..b746deb9ebc6 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -74,14 +74,15 @@
74#include <asm/e820.h> 74#include <asm/e820.h>
75#include <asm/mpspec.h> 75#include <asm/mpspec.h>
76#include <asm/setup.h> 76#include <asm/setup.h>
77#include <asm/arch_hooks.h>
78#include <asm/efi.h> 77#include <asm/efi.h>
78#include <asm/timer.h>
79#include <asm/i8259.h>
79#include <asm/sections.h> 80#include <asm/sections.h>
80#include <asm/dmi.h> 81#include <asm/dmi.h>
81#include <asm/io_apic.h> 82#include <asm/io_apic.h>
82#include <asm/ist.h> 83#include <asm/ist.h>
83#include <asm/vmi.h> 84#include <asm/vmi.h>
84#include <setup_arch.h> 85#include <asm/setup_arch.h>
85#include <asm/bios_ebda.h> 86#include <asm/bios_ebda.h>
86#include <asm/cacheflush.h> 87#include <asm/cacheflush.h>
87#include <asm/processor.h> 88#include <asm/processor.h>
@@ -89,7 +90,7 @@
89 90
90#include <asm/system.h> 91#include <asm/system.h>
91#include <asm/vsyscall.h> 92#include <asm/vsyscall.h>
92#include <asm/smp.h> 93#include <asm/cpu.h>
93#include <asm/desc.h> 94#include <asm/desc.h>
94#include <asm/dma.h> 95#include <asm/dma.h>
95#include <asm/iommu.h> 96#include <asm/iommu.h>
@@ -97,7 +98,6 @@
97#include <asm/mmu_context.h> 98#include <asm/mmu_context.h>
98#include <asm/proto.h> 99#include <asm/proto.h>
99 100
100#include <mach_apic.h>
101#include <asm/paravirt.h> 101#include <asm/paravirt.h>
102#include <asm/hypervisor.h> 102#include <asm/hypervisor.h>
103 103
@@ -112,6 +112,20 @@
112#define ARCH_SETUP 112#define ARCH_SETUP
113#endif 113#endif
114 114
115unsigned int boot_cpu_id __read_mostly;
116
117#ifdef CONFIG_X86_64
118int default_cpu_present_to_apicid(int mps_cpu)
119{
120 return __default_cpu_present_to_apicid(mps_cpu);
121}
122
123int default_check_phys_apicid_present(int boot_cpu_physical_apicid)
124{
125 return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
126}
127#endif
128
115#ifndef CONFIG_DEBUG_BOOT_PARAMS 129#ifndef CONFIG_DEBUG_BOOT_PARAMS
116struct boot_params __initdata boot_params; 130struct boot_params __initdata boot_params;
117#else 131#else
@@ -586,20 +600,7 @@ static int __init setup_elfcorehdr(char *arg)
586early_param("elfcorehdr", setup_elfcorehdr); 600early_param("elfcorehdr", setup_elfcorehdr);
587#endif 601#endif
588 602
589static int __init default_update_genapic(void) 603static struct x86_quirks default_x86_quirks __initdata;
590{
591#ifdef CONFIG_X86_SMP
592# if defined(CONFIG_X86_GENERICARCH) || defined(CONFIG_X86_64)
593 genapic->wakeup_cpu = wakeup_secondary_cpu_via_init;
594# endif
595#endif
596
597 return 0;
598}
599
600static struct x86_quirks default_x86_quirks __initdata = {
601 .update_genapic = default_update_genapic,
602};
603 604
604struct x86_quirks *x86_quirks __initdata = &default_x86_quirks; 605struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
605 606
@@ -656,7 +657,6 @@ void __init setup_arch(char **cmdline_p)
656#ifdef CONFIG_X86_32 657#ifdef CONFIG_X86_32
657 memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data)); 658 memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data));
658 visws_early_detect(); 659 visws_early_detect();
659 pre_setup_arch_hook();
660#else 660#else
661 printk(KERN_INFO "Command line: %s\n", boot_command_line); 661 printk(KERN_INFO "Command line: %s\n", boot_command_line);
662#endif 662#endif
@@ -824,8 +824,7 @@ void __init setup_arch(char **cmdline_p)
824#else 824#else
825 num_physpages = max_pfn; 825 num_physpages = max_pfn;
826 826
827 if (cpu_has_x2apic) 827 check_x2apic();
828 check_x2apic();
829 828
830 /* How many end-of-memory variables you have, grandma! */ 829 /* How many end-of-memory variables you have, grandma! */
831 /* need this before calling reserve_initrd */ 830 /* need this before calling reserve_initrd */
@@ -865,9 +864,7 @@ void __init setup_arch(char **cmdline_p)
865 864
866 reserve_initrd(); 865 reserve_initrd();
867 866
868#ifdef CONFIG_X86_64
869 vsmp_init(); 867 vsmp_init();
870#endif
871 868
872 io_delay_init(); 869 io_delay_init();
873 870
@@ -893,12 +890,11 @@ void __init setup_arch(char **cmdline_p)
893 */ 890 */
894 acpi_reserve_bootmem(); 891 acpi_reserve_bootmem();
895#endif 892#endif
896#ifdef CONFIG_X86_FIND_SMP_CONFIG
897 /* 893 /*
898 * Find and reserve possible boot-time SMP configuration: 894 * Find and reserve possible boot-time SMP configuration:
899 */ 895 */
900 find_smp_config(); 896 find_smp_config();
901#endif 897
902 reserve_crashkernel(); 898 reserve_crashkernel();
903 899
904#ifdef CONFIG_X86_64 900#ifdef CONFIG_X86_64
@@ -925,9 +921,7 @@ void __init setup_arch(char **cmdline_p)
925 map_vsyscall(); 921 map_vsyscall();
926#endif 922#endif
927 923
928#ifdef CONFIG_X86_GENERICARCH
929 generic_apic_probe(); 924 generic_apic_probe();
930#endif
931 925
932 early_quirks(); 926 early_quirks();
933 927
@@ -978,4 +972,95 @@ void __init setup_arch(char **cmdline_p)
978#endif 972#endif
979} 973}
980 974
975#ifdef CONFIG_X86_32
981 976
977/**
978 * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
979 *
980 * Description:
981 * Perform any necessary interrupt initialisation prior to setting up
982 * the "ordinary" interrupt call gates. For legacy reasons, the ISA
983 * interrupts should be initialised here if the machine emulates a PC
984 * in any way.
985 **/
986void __init x86_quirk_pre_intr_init(void)
987{
988 if (x86_quirks->arch_pre_intr_init) {
989 if (x86_quirks->arch_pre_intr_init())
990 return;
991 }
992 init_ISA_irqs();
993}
994
995/**
996 * x86_quirk_intr_init - post gate setup interrupt initialisation
997 *
998 * Description:
999 * Fill in any interrupts that may have been left out by the general
1000 * init_IRQ() routine. interrupts having to do with the machine rather
1001 * than the devices on the I/O bus (like APIC interrupts in intel MP
1002 * systems) are started here.
1003 **/
1004void __init x86_quirk_intr_init(void)
1005{
1006 if (x86_quirks->arch_intr_init) {
1007 if (x86_quirks->arch_intr_init())
1008 return;
1009 }
1010}
1011
1012/**
1013 * x86_quirk_trap_init - initialise system specific traps
1014 *
1015 * Description:
1016 * Called as the final act of trap_init(). Used in VISWS to initialise
1017 * the various board specific APIC traps.
1018 **/
1019void __init x86_quirk_trap_init(void)
1020{
1021 if (x86_quirks->arch_trap_init) {
1022 if (x86_quirks->arch_trap_init())
1023 return;
1024 }
1025}
1026
1027static struct irqaction irq0 = {
1028 .handler = timer_interrupt,
1029 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
1030 .mask = CPU_MASK_NONE,
1031 .name = "timer"
1032};
1033
1034/**
1035 * x86_quirk_pre_time_init - do any specific initialisations before.
1036 *
1037 **/
1038void __init x86_quirk_pre_time_init(void)
1039{
1040 if (x86_quirks->arch_pre_time_init)
1041 x86_quirks->arch_pre_time_init();
1042}
1043
1044/**
1045 * x86_quirk_time_init - do any specific initialisations for the system timer.
1046 *
1047 * Description:
1048 * Must plug the system timer interrupt source at HZ into the IRQ listed
1049 * in irq_vectors.h:TIMER_IRQ
1050 **/
1051void __init x86_quirk_time_init(void)
1052{
1053 if (x86_quirks->arch_time_init) {
1054 /*
1055 * A nonzero return code does not mean failure, it means
1056 * that the architecture quirk does not want any
1057 * generic (timer) setup to be performed after this:
1058 */
1059 if (x86_quirks->arch_time_init())
1060 return;
1061 }
1062
1063 irq0.mask = cpumask_of_cpu(0);
1064 setup_irq(0, &irq0);
1065}
1066#endif /* CONFIG_X86_32 */
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c
index 01161077a49c..400331b50a53 100644
--- a/arch/x86/kernel/setup_percpu.c
+++ b/arch/x86/kernel/setup_percpu.c
@@ -7,402 +7,439 @@
7#include <linux/crash_dump.h> 7#include <linux/crash_dump.h>
8#include <linux/smp.h> 8#include <linux/smp.h>
9#include <linux/topology.h> 9#include <linux/topology.h>
10#include <linux/pfn.h>
10#include <asm/sections.h> 11#include <asm/sections.h>
11#include <asm/processor.h> 12#include <asm/processor.h>
12#include <asm/setup.h> 13#include <asm/setup.h>
13#include <asm/mpspec.h> 14#include <asm/mpspec.h>
14#include <asm/apicdef.h> 15#include <asm/apicdef.h>
15#include <asm/highmem.h> 16#include <asm/highmem.h>
17#include <asm/proto.h>
18#include <asm/cpumask.h>
19#include <asm/cpu.h>
20#include <asm/stackprotector.h>
16 21
17#ifdef CONFIG_X86_LOCAL_APIC 22#ifdef CONFIG_DEBUG_PER_CPU_MAPS
18unsigned int num_processors; 23# define DBG(x...) printk(KERN_DEBUG x)
19unsigned disabled_cpus __cpuinitdata; 24#else
20/* Processor that is doing the boot up */ 25# define DBG(x...)
21unsigned int boot_cpu_physical_apicid = -1U;
22EXPORT_SYMBOL(boot_cpu_physical_apicid);
23unsigned int max_physical_apicid;
24
25/* Bitmask of physically existing CPUs */
26physid_mask_t phys_cpu_present_map;
27#endif 26#endif
28 27
29/* map cpu index to physical APIC ID */ 28DEFINE_PER_CPU(int, cpu_number);
30DEFINE_EARLY_PER_CPU(u16, x86_cpu_to_apicid, BAD_APICID); 29EXPORT_PER_CPU_SYMBOL(cpu_number);
31DEFINE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid, BAD_APICID);
32EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid);
33EXPORT_EARLY_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
34
35#if defined(CONFIG_NUMA) && defined(CONFIG_X86_64)
36#define X86_64_NUMA 1
37 30
38/* map cpu index to node index */ 31#ifdef CONFIG_X86_64
39DEFINE_EARLY_PER_CPU(int, x86_cpu_to_node_map, NUMA_NO_NODE); 32#define BOOT_PERCPU_OFFSET ((unsigned long)__per_cpu_load)
40EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_node_map); 33#else
34#define BOOT_PERCPU_OFFSET 0
35#endif
41 36
42/* which logical CPUs are on which nodes */ 37DEFINE_PER_CPU(unsigned long, this_cpu_off) = BOOT_PERCPU_OFFSET;
43cpumask_t *node_to_cpumask_map; 38EXPORT_PER_CPU_SYMBOL(this_cpu_off);
44EXPORT_SYMBOL(node_to_cpumask_map);
45 39
46/* setup node_to_cpumask_map */ 40unsigned long __per_cpu_offset[NR_CPUS] __read_mostly = {
47static void __init setup_node_to_cpumask_map(void); 41 [0 ... NR_CPUS-1] = BOOT_PERCPU_OFFSET,
42};
43EXPORT_SYMBOL(__per_cpu_offset);
48 44
45/*
46 * On x86_64 symbols referenced from code should be reachable using
47 * 32bit relocations. Reserve space for static percpu variables in
48 * modules so that they are always served from the first chunk which
49 * is located at the percpu segment base. On x86_32, anything can
50 * address anywhere. No need to reserve space in the first chunk.
51 */
52#ifdef CONFIG_X86_64
53#define PERCPU_FIRST_CHUNK_RESERVE PERCPU_MODULE_RESERVE
49#else 54#else
50static inline void setup_node_to_cpumask_map(void) { } 55#define PERCPU_FIRST_CHUNK_RESERVE 0
51#endif 56#endif
52 57
53#if defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) && defined(CONFIG_X86_SMP) 58/**
54/* 59 * pcpu_need_numa - determine percpu allocation needs to consider NUMA
55 * Copy data used in early init routines from the initial arrays to the 60 *
56 * per cpu data areas. These arrays then become expendable and the 61 * If NUMA is not configured or there is only one NUMA node available,
57 * *_early_ptr's are zeroed indicating that the static arrays are gone. 62 * there is no reason to consider NUMA. This function determines
63 * whether percpu allocation should consider NUMA or not.
64 *
65 * RETURNS:
66 * true if NUMA should be considered; otherwise, false.
58 */ 67 */
59static void __init setup_per_cpu_maps(void) 68static bool __init pcpu_need_numa(void)
60{ 69{
61 int cpu; 70#ifdef CONFIG_NEED_MULTIPLE_NODES
71 pg_data_t *last = NULL;
72 unsigned int cpu;
62 73
63 for_each_possible_cpu(cpu) { 74 for_each_possible_cpu(cpu) {
64 per_cpu(x86_cpu_to_apicid, cpu) = 75 int node = early_cpu_to_node(cpu);
65 early_per_cpu_map(x86_cpu_to_apicid, cpu);
66 per_cpu(x86_bios_cpu_apicid, cpu) =
67 early_per_cpu_map(x86_bios_cpu_apicid, cpu);
68#ifdef X86_64_NUMA
69 per_cpu(x86_cpu_to_node_map, cpu) =
70 early_per_cpu_map(x86_cpu_to_node_map, cpu);
71#endif
72 }
73 76
74 /* indicate the early static arrays will soon be gone */ 77 if (node_online(node) && NODE_DATA(node) &&
75 early_per_cpu_ptr(x86_cpu_to_apicid) = NULL; 78 last && last != NODE_DATA(node))
76 early_per_cpu_ptr(x86_bios_cpu_apicid) = NULL; 79 return true;
77#ifdef X86_64_NUMA 80
78 early_per_cpu_ptr(x86_cpu_to_node_map) = NULL; 81 last = NODE_DATA(node);
82 }
79#endif 83#endif
84 return false;
80} 85}
81 86
82#ifdef CONFIG_X86_32 87/**
83/* 88 * pcpu_alloc_bootmem - NUMA friendly alloc_bootmem wrapper for percpu
84 * Great future not-so-futuristic plan: make i386 and x86_64 do it 89 * @cpu: cpu to allocate for
85 * the same way 90 * @size: size allocation in bytes
86 */ 91 * @align: alignment
87unsigned long __per_cpu_offset[NR_CPUS] __read_mostly; 92 *
88EXPORT_SYMBOL(__per_cpu_offset); 93 * Allocate @size bytes aligned at @align for cpu @cpu. This wrapper
89static inline void setup_cpu_pda_map(void) { } 94 * does the right thing for NUMA regardless of the current
90 95 * configuration.
91#elif !defined(CONFIG_SMP) 96 *
92static inline void setup_cpu_pda_map(void) { } 97 * RETURNS:
93 98 * Pointer to the allocated area on success, NULL on failure.
94#else /* CONFIG_SMP && CONFIG_X86_64 */
95
96/*
97 * Allocate cpu_pda pointer table and array via alloc_bootmem.
98 */ 99 */
99static void __init setup_cpu_pda_map(void) 100static void * __init pcpu_alloc_bootmem(unsigned int cpu, unsigned long size,
101 unsigned long align)
100{ 102{
101 char *pda; 103 const unsigned long goal = __pa(MAX_DMA_ADDRESS);
102 struct x8664_pda **new_cpu_pda; 104#ifdef CONFIG_NEED_MULTIPLE_NODES
103 unsigned long size; 105 int node = early_cpu_to_node(cpu);
104 int cpu; 106 void *ptr;
105 107
106 size = roundup(sizeof(struct x8664_pda), cache_line_size()); 108 if (!node_online(node) || !NODE_DATA(node)) {
107 109 ptr = __alloc_bootmem_nopanic(size, align, goal);
108 /* allocate cpu_pda array and pointer table */ 110 pr_info("cpu %d has no node %d or node-local memory\n",
109 { 111 cpu, node);
110 unsigned long tsize = nr_cpu_ids * sizeof(void *); 112 pr_debug("per cpu data for cpu%d %lu bytes at %016lx\n",
111 unsigned long asize = size * (nr_cpu_ids - 1); 113 cpu, size, __pa(ptr));
112 114 } else {
113 tsize = roundup(tsize, cache_line_size()); 115 ptr = __alloc_bootmem_node_nopanic(NODE_DATA(node),
114 new_cpu_pda = alloc_bootmem(tsize + asize); 116 size, align, goal);
115 pda = (char *)new_cpu_pda + tsize; 117 pr_debug("per cpu data for cpu%d %lu bytes on node%d at "
116 } 118 "%016lx\n", cpu, size, node, __pa(ptr));
117
118 /* initialize pointer table to static pda's */
119 for_each_possible_cpu(cpu) {
120 if (cpu == 0) {
121 /* leave boot cpu pda in place */
122 new_cpu_pda[0] = cpu_pda(0);
123 continue;
124 }
125 new_cpu_pda[cpu] = (struct x8664_pda *)pda;
126 new_cpu_pda[cpu]->in_bootmem = 1;
127 pda += size;
128 } 119 }
129 120 return ptr;
130 /* point to new pointer table */ 121#else
131 _cpu_pda = new_cpu_pda; 122 return __alloc_bootmem_nopanic(size, align, goal);
123#endif
132} 124}
133 125
134#endif /* CONFIG_SMP && CONFIG_X86_64 */ 126/*
135 127 * Remap allocator
136#ifdef CONFIG_X86_64 128 *
129 * This allocator uses PMD page as unit. A PMD page is allocated for
130 * each cpu and each is remapped into vmalloc area using PMD mapping.
131 * As PMD page is quite large, only part of it is used for the first
132 * chunk. Unused part is returned to the bootmem allocator.
133 *
134 * So, the PMD pages are mapped twice - once to the physical mapping
135 * and to the vmalloc area for the first percpu chunk. The double
136 * mapping does add one more PMD TLB entry pressure but still is much
137 * better than only using 4k mappings while still being NUMA friendly.
138 */
139#ifdef CONFIG_NEED_MULTIPLE_NODES
140static size_t pcpur_size __initdata;
141static void **pcpur_ptrs __initdata;
137 142
138/* correctly size the local cpu masks */ 143static struct page * __init pcpur_get_page(unsigned int cpu, int pageno)
139static void __init setup_cpu_local_masks(void)
140{ 144{
141 alloc_bootmem_cpumask_var(&cpu_initialized_mask); 145 size_t off = (size_t)pageno << PAGE_SHIFT;
142 alloc_bootmem_cpumask_var(&cpu_callin_mask);
143 alloc_bootmem_cpumask_var(&cpu_callout_mask);
144 alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask);
145}
146 146
147#else /* CONFIG_X86_32 */ 147 if (off >= pcpur_size)
148 return NULL;
148 149
149static inline void setup_cpu_local_masks(void) 150 return virt_to_page(pcpur_ptrs[cpu] + off);
150{
151} 151}
152 152
153#endif /* CONFIG_X86_32 */ 153static ssize_t __init setup_pcpu_remap(size_t static_size)
154
155/*
156 * Great future plan:
157 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
158 * Always point %gs to its beginning
159 */
160void __init setup_per_cpu_areas(void)
161{ 154{
162 ssize_t size, old_size; 155 static struct vm_struct vm;
163 char *ptr; 156 pg_data_t *last;
164 int cpu; 157 size_t ptrs_size, dyn_size;
165 unsigned long align = 1; 158 unsigned int cpu;
166 159 ssize_t ret;
167 /* Setup cpu_pda map */ 160
168 setup_cpu_pda_map(); 161 /*
162 * If large page isn't supported, there's no benefit in doing
163 * this. Also, on non-NUMA, embedding is better.
164 */
165 if (!cpu_has_pse || pcpu_need_numa())
166 return -EINVAL;
167
168 last = NULL;
169 for_each_possible_cpu(cpu) {
170 int node = early_cpu_to_node(cpu);
169 171
170 /* Copy section for each CPU (we discard the original) */ 172 if (node_online(node) && NODE_DATA(node) &&
171 old_size = PERCPU_ENOUGH_ROOM; 173 last && last != NODE_DATA(node))
172 align = max_t(unsigned long, PAGE_SIZE, align); 174 goto proceed;
173 size = roundup(old_size, align);
174 175
175 pr_info("NR_CPUS:%d nr_cpumask_bits:%d nr_cpu_ids:%d nr_node_ids:%d\n", 176 last = NODE_DATA(node);
176 NR_CPUS, nr_cpumask_bits, nr_cpu_ids, nr_node_ids); 177 }
178 return -EINVAL;
179
180proceed:
181 /*
182 * Currently supports only single page. Supporting multiple
183 * pages won't be too difficult if it ever becomes necessary.
184 */
185 pcpur_size = PFN_ALIGN(static_size + PERCPU_MODULE_RESERVE +
186 PERCPU_DYNAMIC_RESERVE);
187 if (pcpur_size > PMD_SIZE) {
188 pr_warning("PERCPU: static data is larger than large page, "
189 "can't use large page\n");
190 return -EINVAL;
191 }
192 dyn_size = pcpur_size - static_size - PERCPU_FIRST_CHUNK_RESERVE;
177 193
178 pr_info("PERCPU: Allocating %zd bytes of per cpu data\n", size); 194 /* allocate pointer array and alloc large pages */
195 ptrs_size = PFN_ALIGN(num_possible_cpus() * sizeof(pcpur_ptrs[0]));
196 pcpur_ptrs = alloc_bootmem(ptrs_size);
179 197
180 for_each_possible_cpu(cpu) { 198 for_each_possible_cpu(cpu) {
181#ifndef CONFIG_NEED_MULTIPLE_NODES 199 pcpur_ptrs[cpu] = pcpu_alloc_bootmem(cpu, PMD_SIZE, PMD_SIZE);
182 ptr = __alloc_bootmem(size, align, 200 if (!pcpur_ptrs[cpu])
183 __pa(MAX_DMA_ADDRESS)); 201 goto enomem;
184#else 202
185 int node = early_cpu_to_node(cpu); 203 /*
186 if (!node_online(node) || !NODE_DATA(node)) { 204 * Only use pcpur_size bytes and give back the rest.
187 ptr = __alloc_bootmem(size, align, 205 *
188 __pa(MAX_DMA_ADDRESS)); 206 * Ingo: The 2MB up-rounding bootmem is needed to make
189 pr_info("cpu %d has no node %d or node-local memory\n", 207 * sure the partial 2MB page is still fully RAM - it's
190 cpu, node); 208 * not well-specified to have a PAT-incompatible area
191 pr_debug("per cpu data for cpu%d at %016lx\n", 209 * (unmapped RAM, device memory, etc.) in that hole.
192 cpu, __pa(ptr)); 210 */
193 } else { 211 free_bootmem(__pa(pcpur_ptrs[cpu] + pcpur_size),
194 ptr = __alloc_bootmem_node(NODE_DATA(node), size, align, 212 PMD_SIZE - pcpur_size);
195 __pa(MAX_DMA_ADDRESS)); 213
196 pr_debug("per cpu data for cpu%d on node%d at %016lx\n", 214 memcpy(pcpur_ptrs[cpu], __per_cpu_load, static_size);
197 cpu, node, __pa(ptr));
198 }
199#endif
200 per_cpu_offset(cpu) = ptr - __per_cpu_start;
201 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
202 } 215 }
203 216
204 /* Setup percpu data maps */ 217 /* allocate address and map */
205 setup_per_cpu_maps(); 218 vm.flags = VM_ALLOC;
206 219 vm.size = num_possible_cpus() * PMD_SIZE;
207 /* Setup node to cpumask map */ 220 vm_area_register_early(&vm, PMD_SIZE);
208 setup_node_to_cpumask_map();
209
210 /* Setup cpu initialized, callin, callout masks */
211 setup_cpu_local_masks();
212}
213
214#endif
215 221
216#ifdef X86_64_NUMA 222 for_each_possible_cpu(cpu) {
223 pmd_t *pmd;
217 224
218/* 225 pmd = populate_extra_pmd((unsigned long)vm.addr
219 * Allocate node_to_cpumask_map based on number of available nodes 226 + cpu * PMD_SIZE);
220 * Requires node_possible_map to be valid. 227 set_pmd(pmd, pfn_pmd(page_to_pfn(virt_to_page(pcpur_ptrs[cpu])),
221 * 228 PAGE_KERNEL_LARGE));
222 * Note: node_to_cpumask() is not valid until after this is done.
223 */
224static void __init setup_node_to_cpumask_map(void)
225{
226 unsigned int node, num = 0;
227 cpumask_t *map;
228
229 /* setup nr_node_ids if not done yet */
230 if (nr_node_ids == MAX_NUMNODES) {
231 for_each_node_mask(node, node_possible_map)
232 num = node;
233 nr_node_ids = num + 1;
234 } 229 }
235 230
236 /* allocate the map */ 231 /* we're ready, commit */
237 map = alloc_bootmem_low(nr_node_ids * sizeof(cpumask_t)); 232 pr_info("PERCPU: Remapped at %p with large pages, static data "
238 233 "%zu bytes\n", vm.addr, static_size);
239 pr_debug("Node to cpumask map at %p for %d nodes\n", 234
240 map, nr_node_ids); 235 ret = pcpu_setup_first_chunk(pcpur_get_page, static_size,
241 236 PERCPU_FIRST_CHUNK_RESERVE, dyn_size,
242 /* node_to_cpumask() will now work */ 237 PMD_SIZE, vm.addr, NULL);
243 node_to_cpumask_map = map; 238 goto out_free_ar;
239
240enomem:
241 for_each_possible_cpu(cpu)
242 if (pcpur_ptrs[cpu])
243 free_bootmem(__pa(pcpur_ptrs[cpu]), PMD_SIZE);
244 ret = -ENOMEM;
245out_free_ar:
246 free_bootmem(__pa(pcpur_ptrs), ptrs_size);
247 return ret;
244} 248}
245 249#else
246void __cpuinit numa_set_node(int cpu, int node) 250static ssize_t __init setup_pcpu_remap(size_t static_size)
247{ 251{
248 int *cpu_to_node_map = early_per_cpu_ptr(x86_cpu_to_node_map); 252 return -EINVAL;
249
250 if (cpu_pda(cpu) && node != NUMA_NO_NODE)
251 cpu_pda(cpu)->nodenumber = node;
252
253 if (cpu_to_node_map)
254 cpu_to_node_map[cpu] = node;
255
256 else if (per_cpu_offset(cpu))
257 per_cpu(x86_cpu_to_node_map, cpu) = node;
258
259 else
260 pr_debug("Setting node for non-present cpu %d\n", cpu);
261} 253}
254#endif
262 255
263void __cpuinit numa_clear_node(int cpu) 256/*
257 * Embedding allocator
258 *
259 * The first chunk is sized to just contain the static area plus
260 * module and dynamic reserves and embedded into linear physical
261 * mapping so that it can use PMD mapping without additional TLB
262 * pressure.
263 */
264static ssize_t __init setup_pcpu_embed(size_t static_size)
264{ 265{
265 numa_set_node(cpu, NUMA_NO_NODE); 266 size_t reserve = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
267
268 /*
269 * If large page isn't supported, there's no benefit in doing
270 * this. Also, embedding allocation doesn't play well with
271 * NUMA.
272 */
273 if (!cpu_has_pse || pcpu_need_numa())
274 return -EINVAL;
275
276 return pcpu_embed_first_chunk(static_size, PERCPU_FIRST_CHUNK_RESERVE,
277 reserve - PERCPU_FIRST_CHUNK_RESERVE, -1);
266} 278}
267 279
268#ifndef CONFIG_DEBUG_PER_CPU_MAPS 280/*
281 * 4k page allocator
282 *
283 * This is the basic allocator. Static percpu area is allocated
284 * page-by-page and most of initialization is done by the generic
285 * setup function.
286 */
287static struct page **pcpu4k_pages __initdata;
288static int pcpu4k_nr_static_pages __initdata;
269 289
270void __cpuinit numa_add_cpu(int cpu) 290static struct page * __init pcpu4k_get_page(unsigned int cpu, int pageno)
271{ 291{
272 cpu_set(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]); 292 if (pageno < pcpu4k_nr_static_pages)
293 return pcpu4k_pages[cpu * pcpu4k_nr_static_pages + pageno];
294 return NULL;
273} 295}
274 296
275void __cpuinit numa_remove_cpu(int cpu) 297static void __init pcpu4k_populate_pte(unsigned long addr)
276{ 298{
277 cpu_clear(cpu, node_to_cpumask_map[cpu_to_node(cpu)]); 299 populate_extra_pte(addr);
278} 300}
279 301
280#else /* CONFIG_DEBUG_PER_CPU_MAPS */ 302static ssize_t __init setup_pcpu_4k(size_t static_size)
281
282/*
283 * --------- debug versions of the numa functions ---------
284 */
285static void __cpuinit numa_set_cpumask(int cpu, int enable)
286{ 303{
287 int node = cpu_to_node(cpu); 304 size_t pages_size;
288 cpumask_t *mask; 305 unsigned int cpu;
289 char buf[64]; 306 int i, j;
290 307 ssize_t ret;
291 if (node_to_cpumask_map == NULL) { 308
292 printk(KERN_ERR "node_to_cpumask_map NULL\n"); 309 pcpu4k_nr_static_pages = PFN_UP(static_size);
293 dump_stack(); 310
294 return; 311 /* unaligned allocations can't be freed, round up to page size */
295 } 312 pages_size = PFN_ALIGN(pcpu4k_nr_static_pages * num_possible_cpus()
296 313 * sizeof(pcpu4k_pages[0]));
297 mask = &node_to_cpumask_map[node]; 314 pcpu4k_pages = alloc_bootmem(pages_size);
298 if (enable) 315
299 cpu_set(cpu, *mask); 316 /* allocate and copy */
300 else 317 j = 0;
301 cpu_clear(cpu, *mask); 318 for_each_possible_cpu(cpu)
319 for (i = 0; i < pcpu4k_nr_static_pages; i++) {
320 void *ptr;
321
322 ptr = pcpu_alloc_bootmem(cpu, PAGE_SIZE, PAGE_SIZE);
323 if (!ptr)
324 goto enomem;
325
326 memcpy(ptr, __per_cpu_load + i * PAGE_SIZE, PAGE_SIZE);
327 pcpu4k_pages[j++] = virt_to_page(ptr);
328 }
302 329
303 cpulist_scnprintf(buf, sizeof(buf), mask); 330 /* we're ready, commit */
304 printk(KERN_DEBUG "%s cpu %d node %d: mask now %s\n", 331 pr_info("PERCPU: Allocated %d 4k pages, static data %zu bytes\n",
305 enable ? "numa_add_cpu" : "numa_remove_cpu", cpu, node, buf); 332 pcpu4k_nr_static_pages, static_size);
333
334 ret = pcpu_setup_first_chunk(pcpu4k_get_page, static_size,
335 PERCPU_FIRST_CHUNK_RESERVE, -1,
336 -1, NULL, pcpu4k_populate_pte);
337 goto out_free_ar;
338
339enomem:
340 while (--j >= 0)
341 free_bootmem(__pa(page_address(pcpu4k_pages[j])), PAGE_SIZE);
342 ret = -ENOMEM;
343out_free_ar:
344 free_bootmem(__pa(pcpu4k_pages), pages_size);
345 return ret;
306} 346}
307 347
308void __cpuinit numa_add_cpu(int cpu) 348static inline void setup_percpu_segment(int cpu)
309{ 349{
310 numa_set_cpumask(cpu, 1); 350#ifdef CONFIG_X86_32
311} 351 struct desc_struct gdt;
312
313void __cpuinit numa_remove_cpu(int cpu)
314{
315 numa_set_cpumask(cpu, 0);
316}
317 352
318int cpu_to_node(int cpu) 353 pack_descriptor(&gdt, per_cpu_offset(cpu), 0xFFFFF,
319{ 354 0x2 | DESCTYPE_S, 0x8);
320 if (early_per_cpu_ptr(x86_cpu_to_node_map)) { 355 gdt.s = 1;
321 printk(KERN_WARNING 356 write_gdt_entry(get_cpu_gdt_table(cpu),
322 "cpu_to_node(%d): usage too early!\n", cpu); 357 GDT_ENTRY_PERCPU, &gdt, DESCTYPE_S);
323 dump_stack(); 358#endif
324 return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
325 }
326 return per_cpu(x86_cpu_to_node_map, cpu);
327} 359}
328EXPORT_SYMBOL(cpu_to_node);
329 360
330/* 361/*
331 * Same function as cpu_to_node() but used if called before the 362 * Great future plan:
332 * per_cpu areas are setup. 363 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
364 * Always point %gs to its beginning
333 */ 365 */
334int early_cpu_to_node(int cpu) 366void __init setup_per_cpu_areas(void)
335{ 367{
336 if (early_per_cpu_ptr(x86_cpu_to_node_map)) 368 size_t static_size = __per_cpu_end - __per_cpu_start;
337 return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu]; 369 unsigned int cpu;
338 370 unsigned long delta;
339 if (!per_cpu_offset(cpu)) { 371 size_t pcpu_unit_size;
340 printk(KERN_WARNING 372 ssize_t ret;
341 "early_cpu_to_node(%d): no per_cpu area!\n", cpu);
342 dump_stack();
343 return NUMA_NO_NODE;
344 }
345 return per_cpu(x86_cpu_to_node_map, cpu);
346}
347 373
374 pr_info("NR_CPUS:%d nr_cpumask_bits:%d nr_cpu_ids:%d nr_node_ids:%d\n",
375 NR_CPUS, nr_cpumask_bits, nr_cpu_ids, nr_node_ids);
348 376
349/* empty cpumask */ 377 /*
350static const cpumask_t cpu_mask_none; 378 * Allocate percpu area. If PSE is supported, try to make use
351 379 * of large page mappings. Please read comments on top of
352/* 380 * each allocator for details.
353 * Returns a pointer to the bitmask of CPUs on Node 'node'. 381 */
354 */ 382 ret = setup_pcpu_remap(static_size);
355const cpumask_t *cpumask_of_node(int node) 383 if (ret < 0)
356{ 384 ret = setup_pcpu_embed(static_size);
357 if (node_to_cpumask_map == NULL) { 385 if (ret < 0)
358 printk(KERN_WARNING 386 ret = setup_pcpu_4k(static_size);
359 "cpumask_of_node(%d): no node_to_cpumask_map!\n", 387 if (ret < 0)
360 node); 388 panic("cannot allocate static percpu area (%zu bytes, err=%zd)",
361 dump_stack(); 389 static_size, ret);
362 return (const cpumask_t *)&cpu_online_map; 390
363 } 391 pcpu_unit_size = ret;
364 if (node >= nr_node_ids) { 392
365 printk(KERN_WARNING 393 /* alrighty, percpu areas up and running */
366 "cpumask_of_node(%d): node > nr_node_ids(%d)\n", 394 delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
367 node, nr_node_ids); 395 for_each_possible_cpu(cpu) {
368 dump_stack(); 396 per_cpu_offset(cpu) = delta + cpu * pcpu_unit_size;
369 return &cpu_mask_none; 397 per_cpu(this_cpu_off, cpu) = per_cpu_offset(cpu);
370 } 398 per_cpu(cpu_number, cpu) = cpu;
371 return &node_to_cpumask_map[node]; 399 setup_percpu_segment(cpu);
372} 400 setup_stack_canary_segment(cpu);
373EXPORT_SYMBOL(cpumask_of_node); 401 /*
374 402 * Copy data used in early init routines from the
375/* 403 * initial arrays to the per cpu data areas. These
376 * Returns a bitmask of CPUs on Node 'node'. 404 * arrays then become expendable and the *_early_ptr's
377 * 405 * are zeroed indicating that the static arrays are
378 * Side note: this function creates the returned cpumask on the stack 406 * gone.
379 * so with a high NR_CPUS count, excessive stack space is used. The 407 */
380 * node_to_cpumask_ptr function should be used whenever possible. 408#ifdef CONFIG_X86_LOCAL_APIC
381 */ 409 per_cpu(x86_cpu_to_apicid, cpu) =
382cpumask_t node_to_cpumask(int node) 410 early_per_cpu_map(x86_cpu_to_apicid, cpu);
383{ 411 per_cpu(x86_bios_cpu_apicid, cpu) =
384 if (node_to_cpumask_map == NULL) { 412 early_per_cpu_map(x86_bios_cpu_apicid, cpu);
385 printk(KERN_WARNING 413#endif
386 "node_to_cpumask(%d): no node_to_cpumask_map!\n", node); 414#ifdef CONFIG_X86_64
387 dump_stack(); 415 per_cpu(irq_stack_ptr, cpu) =
388 return cpu_online_map; 416 per_cpu(irq_stack_union.irq_stack, cpu) +
389 } 417 IRQ_STACK_SIZE - 64;
390 if (node >= nr_node_ids) { 418#ifdef CONFIG_NUMA
391 printk(KERN_WARNING 419 per_cpu(x86_cpu_to_node_map, cpu) =
392 "node_to_cpumask(%d): node > nr_node_ids(%d)\n", 420 early_per_cpu_map(x86_cpu_to_node_map, cpu);
393 node, nr_node_ids); 421#endif
394 dump_stack(); 422#endif
395 return cpu_mask_none; 423 /*
424 * Up to this point, the boot CPU has been using .data.init
425 * area. Reload any changed state for the boot CPU.
426 */
427 if (cpu == boot_cpu_id)
428 switch_to_new_gdt(cpu);
396 } 429 }
397 return node_to_cpumask_map[node];
398}
399EXPORT_SYMBOL(node_to_cpumask);
400 430
401/* 431 /* indicate the early static arrays will soon be gone */
402 * --------- end of debug versions of the numa functions --------- 432#ifdef CONFIG_X86_LOCAL_APIC
403 */ 433 early_per_cpu_ptr(x86_cpu_to_apicid) = NULL;
404 434 early_per_cpu_ptr(x86_bios_cpu_apicid) = NULL;
405#endif /* CONFIG_DEBUG_PER_CPU_MAPS */ 435#endif
436#if defined(CONFIG_X86_64) && defined(CONFIG_NUMA)
437 early_per_cpu_ptr(x86_cpu_to_node_map) = NULL;
438#endif
406 439
407#endif /* X86_64_NUMA */ 440 /* Setup node to cpumask map */
441 setup_node_to_cpumask_map();
408 442
443 /* Setup cpu initialized, callin, callout masks */
444 setup_cpu_local_masks();
445}
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index df0587f24c54..d2cc6428c587 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -50,27 +50,23 @@
50# define FIX_EFLAGS __FIX_EFLAGS 50# define FIX_EFLAGS __FIX_EFLAGS
51#endif 51#endif
52 52
53#define COPY(x) { \ 53#define COPY(x) do { \
54 err |= __get_user(regs->x, &sc->x); \ 54 get_user_ex(regs->x, &sc->x); \
55} 55} while (0)
56 56
57#define COPY_SEG(seg) { \ 57#define GET_SEG(seg) ({ \
58 unsigned short tmp; \ 58 unsigned short tmp; \
59 err |= __get_user(tmp, &sc->seg); \ 59 get_user_ex(tmp, &sc->seg); \
60 regs->seg = tmp; \ 60 tmp; \
61} 61})
62 62
63#define COPY_SEG_CPL3(seg) { \ 63#define COPY_SEG(seg) do { \
64 unsigned short tmp; \ 64 regs->seg = GET_SEG(seg); \
65 err |= __get_user(tmp, &sc->seg); \ 65} while (0)
66 regs->seg = tmp | 3; \
67}
68 66
69#define GET_SEG(seg) { \ 67#define COPY_SEG_CPL3(seg) do { \
70 unsigned short tmp; \ 68 regs->seg = GET_SEG(seg) | 3; \
71 err |= __get_user(tmp, &sc->seg); \ 69} while (0)
72 loadsegment(seg, tmp); \
73}
74 70
75static int 71static int
76restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, 72restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
@@ -83,45 +79,49 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
83 /* Always make any pending restarted system calls return -EINTR */ 79 /* Always make any pending restarted system calls return -EINTR */
84 current_thread_info()->restart_block.fn = do_no_restart_syscall; 80 current_thread_info()->restart_block.fn = do_no_restart_syscall;
85 81
82 get_user_try {
83
86#ifdef CONFIG_X86_32 84#ifdef CONFIG_X86_32
87 GET_SEG(gs); 85 set_user_gs(regs, GET_SEG(gs));
88 COPY_SEG(fs); 86 COPY_SEG(fs);
89 COPY_SEG(es); 87 COPY_SEG(es);
90 COPY_SEG(ds); 88 COPY_SEG(ds);
91#endif /* CONFIG_X86_32 */ 89#endif /* CONFIG_X86_32 */
92 90
93 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx); 91 COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
94 COPY(dx); COPY(cx); COPY(ip); 92 COPY(dx); COPY(cx); COPY(ip);
95 93
96#ifdef CONFIG_X86_64 94#ifdef CONFIG_X86_64
97 COPY(r8); 95 COPY(r8);
98 COPY(r9); 96 COPY(r9);
99 COPY(r10); 97 COPY(r10);
100 COPY(r11); 98 COPY(r11);
101 COPY(r12); 99 COPY(r12);
102 COPY(r13); 100 COPY(r13);
103 COPY(r14); 101 COPY(r14);
104 COPY(r15); 102 COPY(r15);
105#endif /* CONFIG_X86_64 */ 103#endif /* CONFIG_X86_64 */
106 104
107#ifdef CONFIG_X86_32 105#ifdef CONFIG_X86_32
108 COPY_SEG_CPL3(cs); 106 COPY_SEG_CPL3(cs);
109 COPY_SEG_CPL3(ss); 107 COPY_SEG_CPL3(ss);
110#else /* !CONFIG_X86_32 */ 108#else /* !CONFIG_X86_32 */
111 /* Kernel saves and restores only the CS segment register on signals, 109 /* Kernel saves and restores only the CS segment register on signals,
112 * which is the bare minimum needed to allow mixed 32/64-bit code. 110 * which is the bare minimum needed to allow mixed 32/64-bit code.
113 * App's signal handler can save/restore other segments if needed. */ 111 * App's signal handler can save/restore other segments if needed. */
114 COPY_SEG_CPL3(cs); 112 COPY_SEG_CPL3(cs);
115#endif /* CONFIG_X86_32 */ 113#endif /* CONFIG_X86_32 */
116 114
117 err |= __get_user(tmpflags, &sc->flags); 115 get_user_ex(tmpflags, &sc->flags);
118 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); 116 regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
119 regs->orig_ax = -1; /* disable syscall checks */ 117 regs->orig_ax = -1; /* disable syscall checks */
120 118
121 err |= __get_user(buf, &sc->fpstate); 119 get_user_ex(buf, &sc->fpstate);
122 err |= restore_i387_xstate(buf); 120 err |= restore_i387_xstate(buf);
121
122 get_user_ex(*pax, &sc->ax);
123 } get_user_catch(err);
123 124
124 err |= __get_user(*pax, &sc->ax);
125 return err; 125 return err;
126} 126}
127 127
@@ -131,57 +131,55 @@ setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
131{ 131{
132 int err = 0; 132 int err = 0;
133 133
134#ifdef CONFIG_X86_32 134 put_user_try {
135 {
136 unsigned int tmp;
137 135
138 savesegment(gs, tmp); 136#ifdef CONFIG_X86_32
139 err |= __put_user(tmp, (unsigned int __user *)&sc->gs); 137 put_user_ex(get_user_gs(regs), (unsigned int __user *)&sc->gs);
140 } 138 put_user_ex(regs->fs, (unsigned int __user *)&sc->fs);
141 err |= __put_user(regs->fs, (unsigned int __user *)&sc->fs); 139 put_user_ex(regs->es, (unsigned int __user *)&sc->es);
142 err |= __put_user(regs->es, (unsigned int __user *)&sc->es); 140 put_user_ex(regs->ds, (unsigned int __user *)&sc->ds);
143 err |= __put_user(regs->ds, (unsigned int __user *)&sc->ds);
144#endif /* CONFIG_X86_32 */ 141#endif /* CONFIG_X86_32 */
145 142
146 err |= __put_user(regs->di, &sc->di); 143 put_user_ex(regs->di, &sc->di);
147 err |= __put_user(regs->si, &sc->si); 144 put_user_ex(regs->si, &sc->si);
148 err |= __put_user(regs->bp, &sc->bp); 145 put_user_ex(regs->bp, &sc->bp);
149 err |= __put_user(regs->sp, &sc->sp); 146 put_user_ex(regs->sp, &sc->sp);
150 err |= __put_user(regs->bx, &sc->bx); 147 put_user_ex(regs->bx, &sc->bx);
151 err |= __put_user(regs->dx, &sc->dx); 148 put_user_ex(regs->dx, &sc->dx);
152 err |= __put_user(regs->cx, &sc->cx); 149 put_user_ex(regs->cx, &sc->cx);
153 err |= __put_user(regs->ax, &sc->ax); 150 put_user_ex(regs->ax, &sc->ax);
154#ifdef CONFIG_X86_64 151#ifdef CONFIG_X86_64
155 err |= __put_user(regs->r8, &sc->r8); 152 put_user_ex(regs->r8, &sc->r8);
156 err |= __put_user(regs->r9, &sc->r9); 153 put_user_ex(regs->r9, &sc->r9);
157 err |= __put_user(regs->r10, &sc->r10); 154 put_user_ex(regs->r10, &sc->r10);
158 err |= __put_user(regs->r11, &sc->r11); 155 put_user_ex(regs->r11, &sc->r11);
159 err |= __put_user(regs->r12, &sc->r12); 156 put_user_ex(regs->r12, &sc->r12);
160 err |= __put_user(regs->r13, &sc->r13); 157 put_user_ex(regs->r13, &sc->r13);
161 err |= __put_user(regs->r14, &sc->r14); 158 put_user_ex(regs->r14, &sc->r14);
162 err |= __put_user(regs->r15, &sc->r15); 159 put_user_ex(regs->r15, &sc->r15);
163#endif /* CONFIG_X86_64 */ 160#endif /* CONFIG_X86_64 */
164 161
165 err |= __put_user(current->thread.trap_no, &sc->trapno); 162 put_user_ex(current->thread.trap_no, &sc->trapno);
166 err |= __put_user(current->thread.error_code, &sc->err); 163 put_user_ex(current->thread.error_code, &sc->err);
167 err |= __put_user(regs->ip, &sc->ip); 164 put_user_ex(regs->ip, &sc->ip);
168#ifdef CONFIG_X86_32 165#ifdef CONFIG_X86_32
169 err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs); 166 put_user_ex(regs->cs, (unsigned int __user *)&sc->cs);
170 err |= __put_user(regs->flags, &sc->flags); 167 put_user_ex(regs->flags, &sc->flags);
171 err |= __put_user(regs->sp, &sc->sp_at_signal); 168 put_user_ex(regs->sp, &sc->sp_at_signal);
172 err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss); 169 put_user_ex(regs->ss, (unsigned int __user *)&sc->ss);
173#else /* !CONFIG_X86_32 */ 170#else /* !CONFIG_X86_32 */
174 err |= __put_user(regs->flags, &sc->flags); 171 put_user_ex(regs->flags, &sc->flags);
175 err |= __put_user(regs->cs, &sc->cs); 172 put_user_ex(regs->cs, &sc->cs);
176 err |= __put_user(0, &sc->gs); 173 put_user_ex(0, &sc->gs);
177 err |= __put_user(0, &sc->fs); 174 put_user_ex(0, &sc->fs);
178#endif /* CONFIG_X86_32 */ 175#endif /* CONFIG_X86_32 */
179 176
180 err |= __put_user(fpstate, &sc->fpstate); 177 put_user_ex(fpstate, &sc->fpstate);
181 178
182 /* non-iBCS2 extensions.. */ 179 /* non-iBCS2 extensions.. */
183 err |= __put_user(mask, &sc->oldmask); 180 put_user_ex(mask, &sc->oldmask);
184 err |= __put_user(current->thread.cr2, &sc->cr2); 181 put_user_ex(current->thread.cr2, &sc->cr2);
182 } put_user_catch(err);
185 183
186 return err; 184 return err;
187} 185}
@@ -189,40 +187,35 @@ setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
189/* 187/*
190 * Set up a signal frame. 188 * Set up a signal frame.
191 */ 189 */
192#ifdef CONFIG_X86_32
193static const struct {
194 u16 poplmovl;
195 u32 val;
196 u16 int80;
197} __attribute__((packed)) retcode = {
198 0xb858, /* popl %eax; movl $..., %eax */
199 __NR_sigreturn,
200 0x80cd, /* int $0x80 */
201};
202
203static const struct {
204 u8 movl;
205 u32 val;
206 u16 int80;
207 u8 pad;
208} __attribute__((packed)) rt_retcode = {
209 0xb8, /* movl $..., %eax */
210 __NR_rt_sigreturn,
211 0x80cd, /* int $0x80 */
212 0
213};
214 190
215/* 191/*
216 * Determine which stack to use.. 192 * Determine which stack to use..
217 */ 193 */
194static unsigned long align_sigframe(unsigned long sp)
195{
196#ifdef CONFIG_X86_32
197 /*
198 * Align the stack pointer according to the i386 ABI,
199 * i.e. so that on function entry ((sp + 4) & 15) == 0.
200 */
201 sp = ((sp + 4) & -16ul) - 4;
202#else /* !CONFIG_X86_32 */
203 sp = round_down(sp, 16) - 8;
204#endif
205 return sp;
206}
207
218static inline void __user * 208static inline void __user *
219get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size, 209get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,
220 void **fpstate) 210 void __user **fpstate)
221{ 211{
222 unsigned long sp;
223
224 /* Default to using normal stack */ 212 /* Default to using normal stack */
225 sp = regs->sp; 213 unsigned long sp = regs->sp;
214
215#ifdef CONFIG_X86_64
216 /* redzone */
217 sp -= 128;
218#endif /* CONFIG_X86_64 */
226 219
227 /* 220 /*
228 * If we are on the alternate signal stack and would overflow it, don't. 221 * If we are on the alternate signal stack and would overflow it, don't.
@@ -236,30 +229,52 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,
236 if (sas_ss_flags(sp) == 0) 229 if (sas_ss_flags(sp) == 0)
237 sp = current->sas_ss_sp + current->sas_ss_size; 230 sp = current->sas_ss_sp + current->sas_ss_size;
238 } else { 231 } else {
232#ifdef CONFIG_X86_32
239 /* This is the legacy signal stack switching. */ 233 /* This is the legacy signal stack switching. */
240 if ((regs->ss & 0xffff) != __USER_DS && 234 if ((regs->ss & 0xffff) != __USER_DS &&
241 !(ka->sa.sa_flags & SA_RESTORER) && 235 !(ka->sa.sa_flags & SA_RESTORER) &&
242 ka->sa.sa_restorer) 236 ka->sa.sa_restorer)
243 sp = (unsigned long) ka->sa.sa_restorer; 237 sp = (unsigned long) ka->sa.sa_restorer;
238#endif /* CONFIG_X86_32 */
244 } 239 }
245 240
246 if (used_math()) { 241 if (used_math()) {
247 sp = sp - sig_xstate_size; 242 sp -= sig_xstate_size;
248 *fpstate = (struct _fpstate *) sp; 243#ifdef CONFIG_X86_64
244 sp = round_down(sp, 64);
245#endif /* CONFIG_X86_64 */
246 *fpstate = (void __user *)sp;
247
249 if (save_i387_xstate(*fpstate) < 0) 248 if (save_i387_xstate(*fpstate) < 0)
250 return (void __user *)-1L; 249 return (void __user *)-1L;
251 } 250 }
252 251
253 sp -= frame_size; 252 return (void __user *)align_sigframe(sp - frame_size);
254 /*
255 * Align the stack pointer according to the i386 ABI,
256 * i.e. so that on function entry ((sp + 4) & 15) == 0.
257 */
258 sp = ((sp + 4) & -16ul) - 4;
259
260 return (void __user *) sp;
261} 253}
262 254
255#ifdef CONFIG_X86_32
256static const struct {
257 u16 poplmovl;
258 u32 val;
259 u16 int80;
260} __attribute__((packed)) retcode = {
261 0xb858, /* popl %eax; movl $..., %eax */
262 __NR_sigreturn,
263 0x80cd, /* int $0x80 */
264};
265
266static const struct {
267 u8 movl;
268 u32 val;
269 u16 int80;
270 u8 pad;
271} __attribute__((packed)) rt_retcode = {
272 0xb8, /* movl $..., %eax */
273 __NR_rt_sigreturn,
274 0x80cd, /* int $0x80 */
275 0
276};
277
263static int 278static int
264__setup_frame(int sig, struct k_sigaction *ka, sigset_t *set, 279__setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
265 struct pt_regs *regs) 280 struct pt_regs *regs)
@@ -336,43 +351,41 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
336 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) 351 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
337 return -EFAULT; 352 return -EFAULT;
338 353
339 err |= __put_user(sig, &frame->sig); 354 put_user_try {
340 err |= __put_user(&frame->info, &frame->pinfo); 355 put_user_ex(sig, &frame->sig);
341 err |= __put_user(&frame->uc, &frame->puc); 356 put_user_ex(&frame->info, &frame->pinfo);
342 err |= copy_siginfo_to_user(&frame->info, info); 357 put_user_ex(&frame->uc, &frame->puc);
343 if (err) 358 err |= copy_siginfo_to_user(&frame->info, info);
344 return -EFAULT;
345 359
346 /* Create the ucontext. */ 360 /* Create the ucontext. */
347 if (cpu_has_xsave) 361 if (cpu_has_xsave)
348 err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags); 362 put_user_ex(UC_FP_XSTATE, &frame->uc.uc_flags);
349 else 363 else
350 err |= __put_user(0, &frame->uc.uc_flags); 364 put_user_ex(0, &frame->uc.uc_flags);
351 err |= __put_user(0, &frame->uc.uc_link); 365 put_user_ex(0, &frame->uc.uc_link);
352 err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); 366 put_user_ex(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
353 err |= __put_user(sas_ss_flags(regs->sp), 367 put_user_ex(sas_ss_flags(regs->sp),
354 &frame->uc.uc_stack.ss_flags); 368 &frame->uc.uc_stack.ss_flags);
355 err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); 369 put_user_ex(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
356 err |= setup_sigcontext(&frame->uc.uc_mcontext, fpstate, 370 err |= setup_sigcontext(&frame->uc.uc_mcontext, fpstate,
357 regs, set->sig[0]); 371 regs, set->sig[0]);
358 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); 372 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
359 if (err) 373
360 return -EFAULT; 374 /* Set up to return from userspace. */
361 375 restorer = VDSO32_SYMBOL(current->mm->context.vdso, rt_sigreturn);
362 /* Set up to return from userspace. */ 376 if (ka->sa.sa_flags & SA_RESTORER)
363 restorer = VDSO32_SYMBOL(current->mm->context.vdso, rt_sigreturn); 377 restorer = ka->sa.sa_restorer;
364 if (ka->sa.sa_flags & SA_RESTORER) 378 put_user_ex(restorer, &frame->pretcode);
365 restorer = ka->sa.sa_restorer;
366 err |= __put_user(restorer, &frame->pretcode);
367 379
368 /* 380 /*
369 * This is movl $__NR_rt_sigreturn, %ax ; int $0x80 381 * This is movl $__NR_rt_sigreturn, %ax ; int $0x80
370 * 382 *
371 * WE DO NOT USE IT ANY MORE! It's only left here for historical 383 * WE DO NOT USE IT ANY MORE! It's only left here for historical
372 * reasons and because gdb uses it as a signature to notice 384 * reasons and because gdb uses it as a signature to notice
373 * signal handler stack frames. 385 * signal handler stack frames.
374 */ 386 */
375 err |= __put_user(*((u64 *)&rt_retcode), (u64 *)frame->retcode); 387 put_user_ex(*((u64 *)&rt_retcode), (u64 *)frame->retcode);
388 } put_user_catch(err);
376 389
377 if (err) 390 if (err)
378 return -EFAULT; 391 return -EFAULT;
@@ -392,24 +405,6 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
392 return 0; 405 return 0;
393} 406}
394#else /* !CONFIG_X86_32 */ 407#else /* !CONFIG_X86_32 */
395/*
396 * Determine which stack to use..
397 */
398static void __user *
399get_stack(struct k_sigaction *ka, unsigned long sp, unsigned long size)
400{
401 /* Default to using normal stack - redzone*/
402 sp -= 128;
403
404 /* This is the X/Open sanctioned signal stack switching. */
405 if (ka->sa.sa_flags & SA_ONSTACK) {
406 if (sas_ss_flags(sp) == 0)
407 sp = current->sas_ss_sp + current->sas_ss_size;
408 }
409
410 return (void __user *)round_down(sp - size, 64);
411}
412
413static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, 408static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
414 sigset_t *set, struct pt_regs *regs) 409 sigset_t *set, struct pt_regs *regs)
415{ 410{
@@ -418,15 +413,7 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
418 int err = 0; 413 int err = 0;
419 struct task_struct *me = current; 414 struct task_struct *me = current;
420 415
421 if (used_math()) { 416 frame = get_sigframe(ka, regs, sizeof(struct rt_sigframe), &fp);
422 fp = get_stack(ka, regs->sp, sig_xstate_size);
423 frame = (void __user *)round_down(
424 (unsigned long)fp - sizeof(struct rt_sigframe), 16) - 8;
425
426 if (save_i387_xstate(fp) < 0)
427 return -EFAULT;
428 } else
429 frame = get_stack(ka, regs->sp, sizeof(struct rt_sigframe)) - 8;
430 417
431 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) 418 if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
432 return -EFAULT; 419 return -EFAULT;
@@ -436,28 +423,30 @@ static int __setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
436 return -EFAULT; 423 return -EFAULT;
437 } 424 }
438 425
439 /* Create the ucontext. */ 426 put_user_try {
440 if (cpu_has_xsave) 427 /* Create the ucontext. */
441 err |= __put_user(UC_FP_XSTATE, &frame->uc.uc_flags); 428 if (cpu_has_xsave)
442 else 429 put_user_ex(UC_FP_XSTATE, &frame->uc.uc_flags);
443 err |= __put_user(0, &frame->uc.uc_flags); 430 else
444 err |= __put_user(0, &frame->uc.uc_link); 431 put_user_ex(0, &frame->uc.uc_flags);
445 err |= __put_user(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp); 432 put_user_ex(0, &frame->uc.uc_link);
446 err |= __put_user(sas_ss_flags(regs->sp), 433 put_user_ex(me->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
447 &frame->uc.uc_stack.ss_flags); 434 put_user_ex(sas_ss_flags(regs->sp),
448 err |= __put_user(me->sas_ss_size, &frame->uc.uc_stack.ss_size); 435 &frame->uc.uc_stack.ss_flags);
449 err |= setup_sigcontext(&frame->uc.uc_mcontext, fp, regs, set->sig[0]); 436 put_user_ex(me->sas_ss_size, &frame->uc.uc_stack.ss_size);
450 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); 437 err |= setup_sigcontext(&frame->uc.uc_mcontext, fp, regs, set->sig[0]);
451 438 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
452 /* Set up to return from userspace. If provided, use a stub 439
453 already in userspace. */ 440 /* Set up to return from userspace. If provided, use a stub
454 /* x86-64 should always use SA_RESTORER. */ 441 already in userspace. */
455 if (ka->sa.sa_flags & SA_RESTORER) { 442 /* x86-64 should always use SA_RESTORER. */
456 err |= __put_user(ka->sa.sa_restorer, &frame->pretcode); 443 if (ka->sa.sa_flags & SA_RESTORER) {
457 } else { 444 put_user_ex(ka->sa.sa_restorer, &frame->pretcode);
458 /* could use a vstub here */ 445 } else {
459 return -EFAULT; 446 /* could use a vstub here */
460 } 447 err |= -EFAULT;
448 }
449 } put_user_catch(err);
461 450
462 if (err) 451 if (err)
463 return -EFAULT; 452 return -EFAULT;
@@ -509,31 +498,41 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
509 struct old_sigaction __user *oact) 498 struct old_sigaction __user *oact)
510{ 499{
511 struct k_sigaction new_ka, old_ka; 500 struct k_sigaction new_ka, old_ka;
512 int ret; 501 int ret = 0;
513 502
514 if (act) { 503 if (act) {
515 old_sigset_t mask; 504 old_sigset_t mask;
516 505
517 if (!access_ok(VERIFY_READ, act, sizeof(*act)) || 506 if (!access_ok(VERIFY_READ, act, sizeof(*act)))
518 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
519 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
520 return -EFAULT; 507 return -EFAULT;
521 508
522 __get_user(new_ka.sa.sa_flags, &act->sa_flags); 509 get_user_try {
523 __get_user(mask, &act->sa_mask); 510 get_user_ex(new_ka.sa.sa_handler, &act->sa_handler);
511 get_user_ex(new_ka.sa.sa_flags, &act->sa_flags);
512 get_user_ex(mask, &act->sa_mask);
513 get_user_ex(new_ka.sa.sa_restorer, &act->sa_restorer);
514 } get_user_catch(ret);
515
516 if (ret)
517 return -EFAULT;
524 siginitset(&new_ka.sa.sa_mask, mask); 518 siginitset(&new_ka.sa.sa_mask, mask);
525 } 519 }
526 520
527 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL); 521 ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
528 522
529 if (!ret && oact) { 523 if (!ret && oact) {
530 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) || 524 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
531 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
532 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
533 return -EFAULT; 525 return -EFAULT;
534 526
535 __put_user(old_ka.sa.sa_flags, &oact->sa_flags); 527 put_user_try {
536 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); 528 put_user_ex(old_ka.sa.sa_handler, &oact->sa_handler);
529 put_user_ex(old_ka.sa.sa_flags, &oact->sa_flags);
530 put_user_ex(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
531 put_user_ex(old_ka.sa.sa_restorer, &oact->sa_restorer);
532 } put_user_catch(ret);
533
534 if (ret)
535 return -EFAULT;
537 } 536 }
538 537
539 return ret; 538 return ret;
@@ -541,14 +540,9 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
541#endif /* CONFIG_X86_32 */ 540#endif /* CONFIG_X86_32 */
542 541
543#ifdef CONFIG_X86_32 542#ifdef CONFIG_X86_32
544asmlinkage int sys_sigaltstack(unsigned long bx) 543int sys_sigaltstack(struct pt_regs *regs)
545{ 544{
546 /* 545 const stack_t __user *uss = (const stack_t __user *)regs->bx;
547 * This is needed to make gcc realize it doesn't own the
548 * "struct pt_regs"
549 */
550 struct pt_regs *regs = (struct pt_regs *)&bx;
551 const stack_t __user *uss = (const stack_t __user *)bx;
552 stack_t __user *uoss = (stack_t __user *)regs->cx; 546 stack_t __user *uoss = (stack_t __user *)regs->cx;
553 547
554 return do_sigaltstack(uss, uoss, regs->sp); 548 return do_sigaltstack(uss, uoss, regs->sp);
@@ -566,14 +560,12 @@ sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
566 * Do a signal return; undo the signal stack. 560 * Do a signal return; undo the signal stack.
567 */ 561 */
568#ifdef CONFIG_X86_32 562#ifdef CONFIG_X86_32
569asmlinkage unsigned long sys_sigreturn(unsigned long __unused) 563unsigned long sys_sigreturn(struct pt_regs *regs)
570{ 564{
571 struct sigframe __user *frame; 565 struct sigframe __user *frame;
572 struct pt_regs *regs;
573 unsigned long ax; 566 unsigned long ax;
574 sigset_t set; 567 sigset_t set;
575 568
576 regs = (struct pt_regs *) &__unused;
577 frame = (struct sigframe __user *)(regs->sp - 8); 569 frame = (struct sigframe __user *)(regs->sp - 8);
578 570
579 if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) 571 if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
@@ -600,7 +592,7 @@ badframe:
600} 592}
601#endif /* CONFIG_X86_32 */ 593#endif /* CONFIG_X86_32 */
602 594
603static long do_rt_sigreturn(struct pt_regs *regs) 595long sys_rt_sigreturn(struct pt_regs *regs)
604{ 596{
605 struct rt_sigframe __user *frame; 597 struct rt_sigframe __user *frame;
606 unsigned long ax; 598 unsigned long ax;
@@ -631,25 +623,6 @@ badframe:
631 return 0; 623 return 0;
632} 624}
633 625
634#ifdef CONFIG_X86_32
635/*
636 * Note: do not pass in pt_regs directly as with tail-call optimization
637 * GCC will incorrectly stomp on the caller's frame and corrupt user-space
638 * register state:
639 */
640asmlinkage int sys_rt_sigreturn(unsigned long __unused)
641{
642 struct pt_regs *regs = (struct pt_regs *)&__unused;
643
644 return do_rt_sigreturn(regs);
645}
646#else /* !CONFIG_X86_32 */
647asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
648{
649 return do_rt_sigreturn(regs);
650}
651#endif /* CONFIG_X86_32 */
652
653/* 626/*
654 * OK, we're invoking a handler: 627 * OK, we're invoking a handler:
655 */ 628 */
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index e6faa3316bd2..13f33ea8ccaa 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -2,7 +2,7 @@
2 * Intel SMP support routines. 2 * Intel SMP support routines.
3 * 3 *
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> 4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com> 5 * (c) 1998-99, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * (c) 2002,2003 Andi Kleen, SuSE Labs. 6 * (c) 2002,2003 Andi Kleen, SuSE Labs.
7 * 7 *
8 * i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com> 8 * i386 and x86_64 integration by Glauber Costa <gcosta@redhat.com>
@@ -26,8 +26,7 @@
26#include <asm/tlbflush.h> 26#include <asm/tlbflush.h>
27#include <asm/mmu_context.h> 27#include <asm/mmu_context.h>
28#include <asm/proto.h> 28#include <asm/proto.h>
29#include <mach_ipi.h> 29#include <asm/apic.h>
30#include <mach_apic.h>
31/* 30/*
32 * Some notes on x86 processor bugs affecting SMP operation: 31 * Some notes on x86 processor bugs affecting SMP operation:
33 * 32 *
@@ -118,12 +117,12 @@ static void native_smp_send_reschedule(int cpu)
118 WARN_ON(1); 117 WARN_ON(1);
119 return; 118 return;
120 } 119 }
121 send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR); 120 apic->send_IPI_mask(cpumask_of(cpu), RESCHEDULE_VECTOR);
122} 121}
123 122
124void native_send_call_func_single_ipi(int cpu) 123void native_send_call_func_single_ipi(int cpu)
125{ 124{
126 send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR); 125 apic->send_IPI_mask(cpumask_of(cpu), CALL_FUNCTION_SINGLE_VECTOR);
127} 126}
128 127
129void native_send_call_func_ipi(const struct cpumask *mask) 128void native_send_call_func_ipi(const struct cpumask *mask)
@@ -131,7 +130,7 @@ void native_send_call_func_ipi(const struct cpumask *mask)
131 cpumask_var_t allbutself; 130 cpumask_var_t allbutself;
132 131
133 if (!alloc_cpumask_var(&allbutself, GFP_ATOMIC)) { 132 if (!alloc_cpumask_var(&allbutself, GFP_ATOMIC)) {
134 send_IPI_mask(mask, CALL_FUNCTION_VECTOR); 133 apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
135 return; 134 return;
136 } 135 }
137 136
@@ -140,9 +139,9 @@ void native_send_call_func_ipi(const struct cpumask *mask)
140 139
141 if (cpumask_equal(mask, allbutself) && 140 if (cpumask_equal(mask, allbutself) &&
142 cpumask_equal(cpu_online_mask, cpu_callout_mask)) 141 cpumask_equal(cpu_online_mask, cpu_callout_mask))
143 send_IPI_allbutself(CALL_FUNCTION_VECTOR); 142 apic->send_IPI_allbutself(CALL_FUNCTION_VECTOR);
144 else 143 else
145 send_IPI_mask(mask, CALL_FUNCTION_VECTOR); 144 apic->send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
146 145
147 free_cpumask_var(allbutself); 146 free_cpumask_var(allbutself);
148} 147}
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index bb1a3b1fc87f..249334f5080a 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -2,7 +2,7 @@
2 * x86 SMP booting functions 2 * x86 SMP booting functions
3 * 3 *
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> 4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com> 5 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs. 6 * Copyright 2001 Andi Kleen, SuSE Labs.
7 * 7 *
8 * Much of the core SMP work is based on previous work by Thomas Radke, to 8 * Much of the core SMP work is based on previous work by Thomas Radke, to
@@ -53,7 +53,6 @@
53#include <asm/nmi.h> 53#include <asm/nmi.h>
54#include <asm/irq.h> 54#include <asm/irq.h>
55#include <asm/idle.h> 55#include <asm/idle.h>
56#include <asm/smp.h>
57#include <asm/trampoline.h> 56#include <asm/trampoline.h>
58#include <asm/cpu.h> 57#include <asm/cpu.h>
59#include <asm/numa.h> 58#include <asm/numa.h>
@@ -61,13 +60,12 @@
61#include <asm/tlbflush.h> 60#include <asm/tlbflush.h>
62#include <asm/mtrr.h> 61#include <asm/mtrr.h>
63#include <asm/vmi.h> 62#include <asm/vmi.h>
64#include <asm/genapic.h> 63#include <asm/apic.h>
65#include <asm/setup.h> 64#include <asm/setup.h>
65#include <asm/uv/uv.h>
66#include <linux/mc146818rtc.h> 66#include <linux/mc146818rtc.h>
67 67
68#include <mach_apic.h> 68#include <asm/smpboot_hooks.h>
69#include <mach_wakecpu.h>
70#include <smpboot_hooks.h>
71 69
72#ifdef CONFIG_X86_32 70#ifdef CONFIG_X86_32
73u8 apicid_2_node[MAX_APICID]; 71u8 apicid_2_node[MAX_APICID];
@@ -114,7 +112,7 @@ EXPORT_PER_CPU_SYMBOL(cpu_core_map);
114DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info); 112DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
115EXPORT_PER_CPU_SYMBOL(cpu_info); 113EXPORT_PER_CPU_SYMBOL(cpu_info);
116 114
117static atomic_t init_deasserted; 115atomic_t init_deasserted;
118 116
119 117
120/* Set if we find a B stepping CPU */ 118/* Set if we find a B stepping CPU */
@@ -163,7 +161,7 @@ static void map_cpu_to_logical_apicid(void)
163{ 161{
164 int cpu = smp_processor_id(); 162 int cpu = smp_processor_id();
165 int apicid = logical_smp_processor_id(); 163 int apicid = logical_smp_processor_id();
166 int node = apicid_to_node(apicid); 164 int node = apic->apicid_to_node(apicid);
167 165
168 if (!node_online(node)) 166 if (!node_online(node))
169 node = first_online_node; 167 node = first_online_node;
@@ -196,7 +194,8 @@ static void __cpuinit smp_callin(void)
196 * our local APIC. We have to wait for the IPI or we'll 194 * our local APIC. We have to wait for the IPI or we'll
197 * lock up on an APIC access. 195 * lock up on an APIC access.
198 */ 196 */
199 wait_for_init_deassert(&init_deasserted); 197 if (apic->wait_for_init_deassert)
198 apic->wait_for_init_deassert(&init_deasserted);
200 199
201 /* 200 /*
202 * (This works even if the APIC is not enabled.) 201 * (This works even if the APIC is not enabled.)
@@ -243,7 +242,8 @@ static void __cpuinit smp_callin(void)
243 */ 242 */
244 243
245 pr_debug("CALLIN, before setup_local_APIC().\n"); 244 pr_debug("CALLIN, before setup_local_APIC().\n");
246 smp_callin_clear_local_apic(); 245 if (apic->smp_callin_clear_local_apic)
246 apic->smp_callin_clear_local_apic();
247 setup_local_APIC(); 247 setup_local_APIC();
248 end_local_APIC_setup(); 248 end_local_APIC_setup();
249 map_cpu_to_logical_apicid(); 249 map_cpu_to_logical_apicid();
@@ -583,7 +583,7 @@ wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
583 /* Target chip */ 583 /* Target chip */
584 /* Boot on the stack */ 584 /* Boot on the stack */
585 /* Kick the second */ 585 /* Kick the second */
586 apic_icr_write(APIC_DM_NMI | APIC_DEST_LOGICAL, logical_apicid); 586 apic_icr_write(APIC_DM_NMI | apic->dest_logical, logical_apicid);
587 587
588 pr_debug("Waiting for send to finish...\n"); 588 pr_debug("Waiting for send to finish...\n");
589 send_status = safe_apic_wait_icr_idle(); 589 send_status = safe_apic_wait_icr_idle();
@@ -614,12 +614,6 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
614 unsigned long send_status, accept_status = 0; 614 unsigned long send_status, accept_status = 0;
615 int maxlvt, num_starts, j; 615 int maxlvt, num_starts, j;
616 616
617 if (get_uv_system_type() == UV_NON_UNIQUE_APIC) {
618 send_status = uv_wakeup_secondary(phys_apicid, start_eip);
619 atomic_set(&init_deasserted, 1);
620 return send_status;
621 }
622
623 maxlvt = lapic_get_maxlvt(); 617 maxlvt = lapic_get_maxlvt();
624 618
625 /* 619 /*
@@ -745,78 +739,23 @@ static void __cpuinit do_fork_idle(struct work_struct *work)
745 complete(&c_idle->done); 739 complete(&c_idle->done);
746} 740}
747 741
748#ifdef CONFIG_X86_64
749
750/* __ref because it's safe to call free_bootmem when after_bootmem == 0. */
751static void __ref free_bootmem_pda(struct x8664_pda *oldpda)
752{
753 if (!after_bootmem)
754 free_bootmem((unsigned long)oldpda, sizeof(*oldpda));
755}
756
757/*
758 * Allocate node local memory for the AP pda.
759 *
760 * Must be called after the _cpu_pda pointer table is initialized.
761 */
762int __cpuinit get_local_pda(int cpu)
763{
764 struct x8664_pda *oldpda, *newpda;
765 unsigned long size = sizeof(struct x8664_pda);
766 int node = cpu_to_node(cpu);
767
768 if (cpu_pda(cpu) && !cpu_pda(cpu)->in_bootmem)
769 return 0;
770
771 oldpda = cpu_pda(cpu);
772 newpda = kmalloc_node(size, GFP_ATOMIC, node);
773 if (!newpda) {
774 printk(KERN_ERR "Could not allocate node local PDA "
775 "for CPU %d on node %d\n", cpu, node);
776
777 if (oldpda)
778 return 0; /* have a usable pda */
779 else
780 return -1;
781 }
782
783 if (oldpda) {
784 memcpy(newpda, oldpda, size);
785 free_bootmem_pda(oldpda);
786 }
787
788 newpda->in_bootmem = 0;
789 cpu_pda(cpu) = newpda;
790 return 0;
791}
792#endif /* CONFIG_X86_64 */
793
794static int __cpuinit do_boot_cpu(int apicid, int cpu)
795/* 742/*
796 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad 743 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
797 * (ie clustered apic addressing mode), this is a LOGICAL apic ID. 744 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
798 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu. 745 * Returns zero if CPU booted OK, else error code from
746 * ->wakeup_secondary_cpu.
799 */ 747 */
748static int __cpuinit do_boot_cpu(int apicid, int cpu)
800{ 749{
801 unsigned long boot_error = 0; 750 unsigned long boot_error = 0;
802 int timeout;
803 unsigned long start_ip; 751 unsigned long start_ip;
804 unsigned short nmi_high = 0, nmi_low = 0; 752 int timeout;
805 struct create_idle c_idle = { 753 struct create_idle c_idle = {
806 .cpu = cpu, 754 .cpu = cpu,
807 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done), 755 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
808 }; 756 };
809 INIT_WORK(&c_idle.work, do_fork_idle);
810 757
811#ifdef CONFIG_X86_64 758 INIT_WORK(&c_idle.work, do_fork_idle);
812 /* Allocate node local memory for AP pdas */
813 if (cpu > 0) {
814 boot_error = get_local_pda(cpu);
815 if (boot_error)
816 goto restore_state;
817 /* if can't get pda memory, can't start cpu */
818 }
819#endif
820 759
821 alternatives_smp_switch(1); 760 alternatives_smp_switch(1);
822 761
@@ -847,14 +786,16 @@ static int __cpuinit do_boot_cpu(int apicid, int cpu)
847 786
848 set_idle_for_cpu(cpu, c_idle.idle); 787 set_idle_for_cpu(cpu, c_idle.idle);
849do_rest: 788do_rest:
850#ifdef CONFIG_X86_32
851 per_cpu(current_task, cpu) = c_idle.idle; 789 per_cpu(current_task, cpu) = c_idle.idle;
852 init_gdt(cpu); 790#ifdef CONFIG_X86_32
853 /* Stack for startup_32 can be just as for start_secondary onwards */ 791 /* Stack for startup_32 can be just as for start_secondary onwards */
854 irq_ctx_init(cpu); 792 irq_ctx_init(cpu);
855#else 793#else
856 cpu_pda(cpu)->pcurrent = c_idle.idle;
857 clear_tsk_thread_flag(c_idle.idle, TIF_FORK); 794 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
795 initial_gs = per_cpu_offset(cpu);
796 per_cpu(kernel_stack, cpu) =
797 (unsigned long)task_stack_page(c_idle.idle) -
798 KERNEL_STACK_OFFSET + THREAD_SIZE;
858#endif 799#endif
859 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu); 800 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
860 initial_code = (unsigned long)start_secondary; 801 initial_code = (unsigned long)start_secondary;
@@ -878,8 +819,6 @@ do_rest:
878 819
879 pr_debug("Setting warm reset code and vector.\n"); 820 pr_debug("Setting warm reset code and vector.\n");
880 821
881 store_NMI_vector(&nmi_high, &nmi_low);
882
883 smpboot_setup_warm_reset_vector(start_ip); 822 smpboot_setup_warm_reset_vector(start_ip);
884 /* 823 /*
885 * Be paranoid about clearing APIC errors. 824 * Be paranoid about clearing APIC errors.
@@ -891,9 +830,13 @@ do_rest:
891 } 830 }
892 831
893 /* 832 /*
894 * Starting actual IPI sequence... 833 * Kick the secondary CPU. Use the method in the APIC driver
834 * if it's defined - or use an INIT boot APIC message otherwise:
895 */ 835 */
896 boot_error = wakeup_secondary_cpu(apicid, start_ip); 836 if (apic->wakeup_secondary_cpu)
837 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
838 else
839 boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip);
897 840
898 if (!boot_error) { 841 if (!boot_error) {
899 /* 842 /*
@@ -927,13 +870,11 @@ do_rest:
927 else 870 else
928 /* trampoline code not run */ 871 /* trampoline code not run */
929 printk(KERN_ERR "Not responding.\n"); 872 printk(KERN_ERR "Not responding.\n");
930 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) 873 if (apic->inquire_remote_apic)
931 inquire_remote_apic(apicid); 874 apic->inquire_remote_apic(apicid);
932 } 875 }
933 } 876 }
934#ifdef CONFIG_X86_64 877
935restore_state:
936#endif
937 if (boot_error) { 878 if (boot_error) {
938 /* Try to put things back the way they were before ... */ 879 /* Try to put things back the way they were before ... */
939 numa_remove_cpu(cpu); /* was set by numa_add_cpu */ 880 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
@@ -961,7 +902,7 @@ restore_state:
961 902
962int __cpuinit native_cpu_up(unsigned int cpu) 903int __cpuinit native_cpu_up(unsigned int cpu)
963{ 904{
964 int apicid = cpu_present_to_apicid(cpu); 905 int apicid = apic->cpu_present_to_apicid(cpu);
965 unsigned long flags; 906 unsigned long flags;
966 int err; 907 int err;
967 908
@@ -1054,14 +995,14 @@ static int __init smp_sanity_check(unsigned max_cpus)
1054{ 995{
1055 preempt_disable(); 996 preempt_disable();
1056 997
1057#if defined(CONFIG_X86_PC) && defined(CONFIG_X86_32) 998#if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
1058 if (def_to_bigsmp && nr_cpu_ids > 8) { 999 if (def_to_bigsmp && nr_cpu_ids > 8) {
1059 unsigned int cpu; 1000 unsigned int cpu;
1060 unsigned nr; 1001 unsigned nr;
1061 1002
1062 printk(KERN_WARNING 1003 printk(KERN_WARNING
1063 "More than 8 CPUs detected - skipping them.\n" 1004 "More than 8 CPUs detected - skipping them.\n"
1064 "Use CONFIG_X86_GENERICARCH and CONFIG_X86_BIGSMP.\n"); 1005 "Use CONFIG_X86_BIGSMP.\n");
1065 1006
1066 nr = 0; 1007 nr = 0;
1067 for_each_present_cpu(cpu) { 1008 for_each_present_cpu(cpu) {
@@ -1107,7 +1048,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
1107 * Should not be necessary because the MP table should list the boot 1048 * Should not be necessary because the MP table should list the boot
1108 * CPU too, but we do it for the sake of robustness anyway. 1049 * CPU too, but we do it for the sake of robustness anyway.
1109 */ 1050 */
1110 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) { 1051 if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
1111 printk(KERN_NOTICE 1052 printk(KERN_NOTICE
1112 "weird, boot CPU (#%d) not listed by the BIOS.\n", 1053 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1113 boot_cpu_physical_apicid); 1054 boot_cpu_physical_apicid);
@@ -1125,6 +1066,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
1125 printk(KERN_ERR "... forcing use of dummy APIC emulation." 1066 printk(KERN_ERR "... forcing use of dummy APIC emulation."
1126 "(tell your hw vendor)\n"); 1067 "(tell your hw vendor)\n");
1127 smpboot_clear_io_apic(); 1068 smpboot_clear_io_apic();
1069 arch_disable_smp_support();
1128 return -1; 1070 return -1;
1129 } 1071 }
1130 1072
@@ -1181,9 +1123,9 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
1181 current_thread_info()->cpu = 0; /* needed? */ 1123 current_thread_info()->cpu = 0; /* needed? */
1182 set_cpu_sibling_map(0); 1124 set_cpu_sibling_map(0);
1183 1125
1184#ifdef CONFIG_X86_64
1185 enable_IR_x2apic(); 1126 enable_IR_x2apic();
1186 setup_apic_routing(); 1127#ifdef CONFIG_X86_64
1128 default_setup_apic_routing();
1187#endif 1129#endif
1188 1130
1189 if (smp_sanity_check(max_cpus) < 0) { 1131 if (smp_sanity_check(max_cpus) < 0) {
@@ -1207,18 +1149,18 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
1207 */ 1149 */
1208 setup_local_APIC(); 1150 setup_local_APIC();
1209 1151
1210#ifdef CONFIG_X86_64
1211 /* 1152 /*
1212 * Enable IO APIC before setting up error vector 1153 * Enable IO APIC before setting up error vector
1213 */ 1154 */
1214 if (!skip_ioapic_setup && nr_ioapics) 1155 if (!skip_ioapic_setup && nr_ioapics)
1215 enable_IO_APIC(); 1156 enable_IO_APIC();
1216#endif 1157
1217 end_local_APIC_setup(); 1158 end_local_APIC_setup();
1218 1159
1219 map_cpu_to_logical_apicid(); 1160 map_cpu_to_logical_apicid();
1220 1161
1221 setup_portio_remap(); 1162 if (apic->setup_portio_remap)
1163 apic->setup_portio_remap();
1222 1164
1223 smpboot_setup_io_apic(); 1165 smpboot_setup_io_apic();
1224 /* 1166 /*
@@ -1240,10 +1182,7 @@ out:
1240void __init native_smp_prepare_boot_cpu(void) 1182void __init native_smp_prepare_boot_cpu(void)
1241{ 1183{
1242 int me = smp_processor_id(); 1184 int me = smp_processor_id();
1243#ifdef CONFIG_X86_32 1185 switch_to_new_gdt(me);
1244 init_gdt(me);
1245#endif
1246 switch_to_new_gdt();
1247 /* already set me in cpu_online_mask in boot_cpu_init() */ 1186 /* already set me in cpu_online_mask in boot_cpu_init() */
1248 cpumask_set_cpu(me, cpu_callout_mask); 1187 cpumask_set_cpu(me, cpu_callout_mask);
1249 per_cpu(cpu_state, me) = CPU_ONLINE; 1188 per_cpu(cpu_state, me) = CPU_ONLINE;
diff --git a/arch/x86/kernel/smpcommon.c b/arch/x86/kernel/smpcommon.c
deleted file mode 100644
index 397e309839dd..000000000000
--- a/arch/x86/kernel/smpcommon.c
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * SMP stuff which is common to all sub-architectures.
3 */
4#include <linux/module.h>
5#include <asm/smp.h>
6
7#ifdef CONFIG_X86_32
8DEFINE_PER_CPU(unsigned long, this_cpu_off);
9EXPORT_PER_CPU_SYMBOL(this_cpu_off);
10
11/*
12 * Initialize the CPU's GDT. This is either the boot CPU doing itself
13 * (still using the master per-cpu area), or a CPU doing it for a
14 * secondary which will soon come up.
15 */
16__cpuinit void init_gdt(int cpu)
17{
18 struct desc_struct gdt;
19
20 pack_descriptor(&gdt, __per_cpu_offset[cpu], 0xFFFFF,
21 0x2 | DESCTYPE_S, 0x8);
22 gdt.s = 1;
23
24 write_gdt_entry(get_cpu_gdt_table(cpu),
25 GDT_ENTRY_PERCPU, &gdt, DESCTYPE_S);
26
27 per_cpu(this_cpu_off, cpu) = __per_cpu_offset[cpu];
28 per_cpu(cpu_number, cpu) = cpu;
29}
30#endif
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c
index 10786af95545..f7bddc2e37d1 100644
--- a/arch/x86/kernel/stacktrace.c
+++ b/arch/x86/kernel/stacktrace.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Stack trace management functions 2 * Stack trace management functions
3 * 3 *
4 * Copyright (C) 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com> 4 * Copyright (C) 2006-2009 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
5 */ 5 */
6#include <linux/sched.h> 6#include <linux/sched.h>
7#include <linux/stacktrace.h> 7#include <linux/stacktrace.h>
diff --git a/arch/x86/kernel/summit_32.c b/arch/x86/kernel/summit_32.c
deleted file mode 100644
index 7b987852e876..000000000000
--- a/arch/x86/kernel/summit_32.c
+++ /dev/null
@@ -1,188 +0,0 @@
1/*
2 * IBM Summit-Specific Code
3 *
4 * Written By: Matthew Dobson, IBM Corporation
5 *
6 * Copyright (c) 2003 IBM Corp.
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <colpatch@us.ibm.com>
26 *
27 */
28
29#include <linux/mm.h>
30#include <linux/init.h>
31#include <asm/io.h>
32#include <asm/bios_ebda.h>
33#include <asm/summit/mpparse.h>
34
35static struct rio_table_hdr *rio_table_hdr __initdata;
36static struct scal_detail *scal_devs[MAX_NUMNODES] __initdata;
37static struct rio_detail *rio_devs[MAX_NUMNODES*4] __initdata;
38
39#ifndef CONFIG_X86_NUMAQ
40static int mp_bus_id_to_node[MAX_MP_BUSSES] __initdata;
41#endif
42
43static int __init setup_pci_node_map_for_wpeg(int wpeg_num, int last_bus)
44{
45 int twister = 0, node = 0;
46 int i, bus, num_buses;
47
48 for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
49 if (rio_devs[i]->node_id == rio_devs[wpeg_num]->owner_id) {
50 twister = rio_devs[i]->owner_id;
51 break;
52 }
53 }
54 if (i == rio_table_hdr->num_rio_dev) {
55 printk(KERN_ERR "%s: Couldn't find owner Cyclone for Winnipeg!\n", __func__);
56 return last_bus;
57 }
58
59 for (i = 0; i < rio_table_hdr->num_scal_dev; i++) {
60 if (scal_devs[i]->node_id == twister) {
61 node = scal_devs[i]->node_id;
62 break;
63 }
64 }
65 if (i == rio_table_hdr->num_scal_dev) {
66 printk(KERN_ERR "%s: Couldn't find owner Twister for Cyclone!\n", __func__);
67 return last_bus;
68 }
69
70 switch (rio_devs[wpeg_num]->type) {
71 case CompatWPEG:
72 /*
73 * The Compatibility Winnipeg controls the 2 legacy buses,
74 * the 66MHz PCI bus [2 slots] and the 2 "extra" buses in case
75 * a PCI-PCI bridge card is used in either slot: total 5 buses.
76 */
77 num_buses = 5;
78 break;
79 case AltWPEG:
80 /*
81 * The Alternate Winnipeg controls the 2 133MHz buses [1 slot
82 * each], their 2 "extra" buses, the 100MHz bus [2 slots] and
83 * the "extra" buses for each of those slots: total 7 buses.
84 */
85 num_buses = 7;
86 break;
87 case LookOutAWPEG:
88 case LookOutBWPEG:
89 /*
90 * A Lookout Winnipeg controls 3 100MHz buses [2 slots each]
91 * & the "extra" buses for each of those slots: total 9 buses.
92 */
93 num_buses = 9;
94 break;
95 default:
96 printk(KERN_INFO "%s: Unsupported Winnipeg type!\n", __func__);
97 return last_bus;
98 }
99
100 for (bus = last_bus; bus < last_bus + num_buses; bus++)
101 mp_bus_id_to_node[bus] = node;
102 return bus;
103}
104
105static int __init build_detail_arrays(void)
106{
107 unsigned long ptr;
108 int i, scal_detail_size, rio_detail_size;
109
110 if (rio_table_hdr->num_scal_dev > MAX_NUMNODES) {
111 printk(KERN_WARNING "%s: MAX_NUMNODES too low! Defined as %d, but system has %d nodes.\n", __func__, MAX_NUMNODES, rio_table_hdr->num_scal_dev);
112 return 0;
113 }
114
115 switch (rio_table_hdr->version) {
116 default:
117 printk(KERN_WARNING "%s: Invalid Rio Grande Table Version: %d\n", __func__, rio_table_hdr->version);
118 return 0;
119 case 2:
120 scal_detail_size = 11;
121 rio_detail_size = 13;
122 break;
123 case 3:
124 scal_detail_size = 12;
125 rio_detail_size = 15;
126 break;
127 }
128
129 ptr = (unsigned long)rio_table_hdr + 3;
130 for (i = 0; i < rio_table_hdr->num_scal_dev; i++, ptr += scal_detail_size)
131 scal_devs[i] = (struct scal_detail *)ptr;
132
133 for (i = 0; i < rio_table_hdr->num_rio_dev; i++, ptr += rio_detail_size)
134 rio_devs[i] = (struct rio_detail *)ptr;
135
136 return 1;
137}
138
139void __init setup_summit(void)
140{
141 unsigned long ptr;
142 unsigned short offset;
143 int i, next_wpeg, next_bus = 0;
144
145 /* The pointer to the EBDA is stored in the word @ phys 0x40E(40:0E) */
146 ptr = get_bios_ebda();
147 ptr = (unsigned long)phys_to_virt(ptr);
148
149 rio_table_hdr = NULL;
150 offset = 0x180;
151 while (offset) {
152 /* The block id is stored in the 2nd word */
153 if (*((unsigned short *)(ptr + offset + 2)) == 0x4752) {
154 /* set the pointer past the offset & block id */
155 rio_table_hdr = (struct rio_table_hdr *)(ptr + offset + 4);
156 break;
157 }
158 /* The next offset is stored in the 1st word. 0 means no more */
159 offset = *((unsigned short *)(ptr + offset));
160 }
161 if (!rio_table_hdr) {
162 printk(KERN_ERR "%s: Unable to locate Rio Grande Table in EBDA - bailing!\n", __func__);
163 return;
164 }
165
166 if (!build_detail_arrays())
167 return;
168
169 /* The first Winnipeg we're looking for has an index of 0 */
170 next_wpeg = 0;
171 do {
172 for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
173 if (is_WPEG(rio_devs[i]) && rio_devs[i]->WP_index == next_wpeg) {
174 /* It's the Winnipeg we're looking for! */
175 next_bus = setup_pci_node_map_for_wpeg(i, next_bus);
176 next_wpeg++;
177 break;
178 }
179 }
180 /*
181 * If we go through all Rio devices and don't find one with
182 * the next index, it means we've found all the Winnipegs,
183 * and thus all the PCI buses.
184 */
185 if (i == rio_table_hdr->num_rio_dev)
186 next_wpeg = 0;
187 } while (next_wpeg != 0);
188}
diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S
index e2e86a08f31d..3bdb64829b82 100644
--- a/arch/x86/kernel/syscall_table_32.S
+++ b/arch/x86/kernel/syscall_table_32.S
@@ -1,7 +1,7 @@
1ENTRY(sys_call_table) 1ENTRY(sys_call_table)
2 .long sys_restart_syscall /* 0 - old "setup()" system call, used for restarting */ 2 .long sys_restart_syscall /* 0 - old "setup()" system call, used for restarting */
3 .long sys_exit 3 .long sys_exit
4 .long sys_fork 4 .long ptregs_fork
5 .long sys_read 5 .long sys_read
6 .long sys_write 6 .long sys_write
7 .long sys_open /* 5 */ 7 .long sys_open /* 5 */
@@ -10,7 +10,7 @@ ENTRY(sys_call_table)
10 .long sys_creat 10 .long sys_creat
11 .long sys_link 11 .long sys_link
12 .long sys_unlink /* 10 */ 12 .long sys_unlink /* 10 */
13 .long sys_execve 13 .long ptregs_execve
14 .long sys_chdir 14 .long sys_chdir
15 .long sys_time 15 .long sys_time
16 .long sys_mknod 16 .long sys_mknod
@@ -109,17 +109,17 @@ ENTRY(sys_call_table)
109 .long sys_newlstat 109 .long sys_newlstat
110 .long sys_newfstat 110 .long sys_newfstat
111 .long sys_uname 111 .long sys_uname
112 .long sys_iopl /* 110 */ 112 .long ptregs_iopl /* 110 */
113 .long sys_vhangup 113 .long sys_vhangup
114 .long sys_ni_syscall /* old "idle" system call */ 114 .long sys_ni_syscall /* old "idle" system call */
115 .long sys_vm86old 115 .long ptregs_vm86old
116 .long sys_wait4 116 .long sys_wait4
117 .long sys_swapoff /* 115 */ 117 .long sys_swapoff /* 115 */
118 .long sys_sysinfo 118 .long sys_sysinfo
119 .long sys_ipc 119 .long sys_ipc
120 .long sys_fsync 120 .long sys_fsync
121 .long sys_sigreturn 121 .long ptregs_sigreturn
122 .long sys_clone /* 120 */ 122 .long ptregs_clone /* 120 */
123 .long sys_setdomainname 123 .long sys_setdomainname
124 .long sys_newuname 124 .long sys_newuname
125 .long sys_modify_ldt 125 .long sys_modify_ldt
@@ -165,14 +165,14 @@ ENTRY(sys_call_table)
165 .long sys_mremap 165 .long sys_mremap
166 .long sys_setresuid16 166 .long sys_setresuid16
167 .long sys_getresuid16 /* 165 */ 167 .long sys_getresuid16 /* 165 */
168 .long sys_vm86 168 .long ptregs_vm86
169 .long sys_ni_syscall /* Old sys_query_module */ 169 .long sys_ni_syscall /* Old sys_query_module */
170 .long sys_poll 170 .long sys_poll
171 .long sys_nfsservctl 171 .long sys_nfsservctl
172 .long sys_setresgid16 /* 170 */ 172 .long sys_setresgid16 /* 170 */
173 .long sys_getresgid16 173 .long sys_getresgid16
174 .long sys_prctl 174 .long sys_prctl
175 .long sys_rt_sigreturn 175 .long ptregs_rt_sigreturn
176 .long sys_rt_sigaction 176 .long sys_rt_sigaction
177 .long sys_rt_sigprocmask /* 175 */ 177 .long sys_rt_sigprocmask /* 175 */
178 .long sys_rt_sigpending 178 .long sys_rt_sigpending
@@ -185,11 +185,11 @@ ENTRY(sys_call_table)
185 .long sys_getcwd 185 .long sys_getcwd
186 .long sys_capget 186 .long sys_capget
187 .long sys_capset /* 185 */ 187 .long sys_capset /* 185 */
188 .long sys_sigaltstack 188 .long ptregs_sigaltstack
189 .long sys_sendfile 189 .long sys_sendfile
190 .long sys_ni_syscall /* reserved for streams1 */ 190 .long sys_ni_syscall /* reserved for streams1 */
191 .long sys_ni_syscall /* reserved for streams2 */ 191 .long sys_ni_syscall /* reserved for streams2 */
192 .long sys_vfork /* 190 */ 192 .long ptregs_vfork /* 190 */
193 .long sys_getrlimit 193 .long sys_getrlimit
194 .long sys_mmap2 194 .long sys_mmap2
195 .long sys_truncate64 195 .long sys_truncate64
diff --git a/arch/x86/kernel/time_32.c b/arch/x86/kernel/time_32.c
index 3985cac0ed47..5c5d87f0b2e1 100644
--- a/arch/x86/kernel/time_32.c
+++ b/arch/x86/kernel/time_32.c
@@ -33,12 +33,12 @@
33#include <linux/time.h> 33#include <linux/time.h>
34#include <linux/mca.h> 34#include <linux/mca.h>
35 35
36#include <asm/arch_hooks.h> 36#include <asm/setup.h>
37#include <asm/hpet.h> 37#include <asm/hpet.h>
38#include <asm/time.h> 38#include <asm/time.h>
39#include <asm/timer.h> 39#include <asm/timer.h>
40 40
41#include "do_timer.h" 41#include <asm/do_timer.h>
42 42
43int timer_ack; 43int timer_ack;
44 44
@@ -118,7 +118,7 @@ void __init hpet_time_init(void)
118{ 118{
119 if (!hpet_enable()) 119 if (!hpet_enable())
120 setup_pit_timer(); 120 setup_pit_timer();
121 time_init_hook(); 121 x86_quirk_time_init();
122} 122}
123 123
124/* 124/*
@@ -131,7 +131,7 @@ void __init hpet_time_init(void)
131 */ 131 */
132void __init time_init(void) 132void __init time_init(void)
133{ 133{
134 pre_time_init_hook(); 134 x86_quirk_pre_time_init();
135 tsc_init(); 135 tsc_init();
136 late_time_init = choose_time_init(); 136 late_time_init = choose_time_init();
137} 137}
diff --git a/arch/x86/kernel/tlb_32.c b/arch/x86/kernel/tlb_32.c
deleted file mode 100644
index ce5054642247..000000000000
--- a/arch/x86/kernel/tlb_32.c
+++ /dev/null
@@ -1,256 +0,0 @@
1#include <linux/spinlock.h>
2#include <linux/cpu.h>
3#include <linux/interrupt.h>
4
5#include <asm/tlbflush.h>
6
7DEFINE_PER_CPU(struct tlb_state, cpu_tlbstate)
8 ____cacheline_aligned = { &init_mm, 0, };
9
10/* must come after the send_IPI functions above for inlining */
11#include <mach_ipi.h>
12
13/*
14 * Smarter SMP flushing macros.
15 * c/o Linus Torvalds.
16 *
17 * These mean you can really definitely utterly forget about
18 * writing to user space from interrupts. (Its not allowed anyway).
19 *
20 * Optimizations Manfred Spraul <manfred@colorfullife.com>
21 */
22
23static cpumask_t flush_cpumask;
24static struct mm_struct *flush_mm;
25static unsigned long flush_va;
26static DEFINE_SPINLOCK(tlbstate_lock);
27
28/*
29 * We cannot call mmdrop() because we are in interrupt context,
30 * instead update mm->cpu_vm_mask.
31 *
32 * We need to reload %cr3 since the page tables may be going
33 * away from under us..
34 */
35void leave_mm(int cpu)
36{
37 BUG_ON(x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK);
38 cpu_clear(cpu, x86_read_percpu(cpu_tlbstate.active_mm)->cpu_vm_mask);
39 load_cr3(swapper_pg_dir);
40}
41EXPORT_SYMBOL_GPL(leave_mm);
42
43/*
44 *
45 * The flush IPI assumes that a thread switch happens in this order:
46 * [cpu0: the cpu that switches]
47 * 1) switch_mm() either 1a) or 1b)
48 * 1a) thread switch to a different mm
49 * 1a1) cpu_clear(cpu, old_mm->cpu_vm_mask);
50 * Stop ipi delivery for the old mm. This is not synchronized with
51 * the other cpus, but smp_invalidate_interrupt ignore flush ipis
52 * for the wrong mm, and in the worst case we perform a superfluous
53 * tlb flush.
54 * 1a2) set cpu_tlbstate to TLBSTATE_OK
55 * Now the smp_invalidate_interrupt won't call leave_mm if cpu0
56 * was in lazy tlb mode.
57 * 1a3) update cpu_tlbstate[].active_mm
58 * Now cpu0 accepts tlb flushes for the new mm.
59 * 1a4) cpu_set(cpu, new_mm->cpu_vm_mask);
60 * Now the other cpus will send tlb flush ipis.
61 * 1a4) change cr3.
62 * 1b) thread switch without mm change
63 * cpu_tlbstate[].active_mm is correct, cpu0 already handles
64 * flush ipis.
65 * 1b1) set cpu_tlbstate to TLBSTATE_OK
66 * 1b2) test_and_set the cpu bit in cpu_vm_mask.
67 * Atomically set the bit [other cpus will start sending flush ipis],
68 * and test the bit.
69 * 1b3) if the bit was 0: leave_mm was called, flush the tlb.
70 * 2) switch %%esp, ie current
71 *
72 * The interrupt must handle 2 special cases:
73 * - cr3 is changed before %%esp, ie. it cannot use current->{active_,}mm.
74 * - the cpu performs speculative tlb reads, i.e. even if the cpu only
75 * runs in kernel space, the cpu could load tlb entries for user space
76 * pages.
77 *
78 * The good news is that cpu_tlbstate is local to each cpu, no
79 * write/read ordering problems.
80 */
81
82/*
83 * TLB flush IPI:
84 *
85 * 1) Flush the tlb entries if the cpu uses the mm that's being flushed.
86 * 2) Leave the mm if we are in the lazy tlb mode.
87 */
88
89void smp_invalidate_interrupt(struct pt_regs *regs)
90{
91 unsigned long cpu;
92
93 cpu = get_cpu();
94
95 if (!cpu_isset(cpu, flush_cpumask))
96 goto out;
97 /*
98 * This was a BUG() but until someone can quote me the
99 * line from the intel manual that guarantees an IPI to
100 * multiple CPUs is retried _only_ on the erroring CPUs
101 * its staying as a return
102 *
103 * BUG();
104 */
105
106 if (flush_mm == x86_read_percpu(cpu_tlbstate.active_mm)) {
107 if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_OK) {
108 if (flush_va == TLB_FLUSH_ALL)
109 local_flush_tlb();
110 else
111 __flush_tlb_one(flush_va);
112 } else
113 leave_mm(cpu);
114 }
115 ack_APIC_irq();
116 smp_mb__before_clear_bit();
117 cpu_clear(cpu, flush_cpumask);
118 smp_mb__after_clear_bit();
119out:
120 put_cpu_no_resched();
121 inc_irq_stat(irq_tlb_count);
122}
123
124void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
125 unsigned long va)
126{
127 cpumask_t cpumask = *cpumaskp;
128
129 /*
130 * A couple of (to be removed) sanity checks:
131 *
132 * - current CPU must not be in mask
133 * - mask must exist :)
134 */
135 BUG_ON(cpus_empty(cpumask));
136 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
137 BUG_ON(!mm);
138
139#ifdef CONFIG_HOTPLUG_CPU
140 /* If a CPU which we ran on has gone down, OK. */
141 cpus_and(cpumask, cpumask, cpu_online_map);
142 if (unlikely(cpus_empty(cpumask)))
143 return;
144#endif
145
146 /*
147 * i'm not happy about this global shared spinlock in the
148 * MM hot path, but we'll see how contended it is.
149 * AK: x86-64 has a faster method that could be ported.
150 */
151 spin_lock(&tlbstate_lock);
152
153 flush_mm = mm;
154 flush_va = va;
155 cpus_or(flush_cpumask, cpumask, flush_cpumask);
156
157 /*
158 * Make the above memory operations globally visible before
159 * sending the IPI.
160 */
161 smp_mb();
162 /*
163 * We have to send the IPI only to
164 * CPUs affected.
165 */
166 send_IPI_mask(&cpumask, INVALIDATE_TLB_VECTOR);
167
168 while (!cpus_empty(flush_cpumask))
169 /* nothing. lockup detection does not belong here */
170 cpu_relax();
171
172 flush_mm = NULL;
173 flush_va = 0;
174 spin_unlock(&tlbstate_lock);
175}
176
177void flush_tlb_current_task(void)
178{
179 struct mm_struct *mm = current->mm;
180 cpumask_t cpu_mask;
181
182 preempt_disable();
183 cpu_mask = mm->cpu_vm_mask;
184 cpu_clear(smp_processor_id(), cpu_mask);
185
186 local_flush_tlb();
187 if (!cpus_empty(cpu_mask))
188 flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
189 preempt_enable();
190}
191
192void flush_tlb_mm(struct mm_struct *mm)
193{
194 cpumask_t cpu_mask;
195
196 preempt_disable();
197 cpu_mask = mm->cpu_vm_mask;
198 cpu_clear(smp_processor_id(), cpu_mask);
199
200 if (current->active_mm == mm) {
201 if (current->mm)
202 local_flush_tlb();
203 else
204 leave_mm(smp_processor_id());
205 }
206 if (!cpus_empty(cpu_mask))
207 flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
208
209 preempt_enable();
210}
211
212void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
213{
214 struct mm_struct *mm = vma->vm_mm;
215 cpumask_t cpu_mask;
216
217 preempt_disable();
218 cpu_mask = mm->cpu_vm_mask;
219 cpu_clear(smp_processor_id(), cpu_mask);
220
221 if (current->active_mm == mm) {
222 if (current->mm)
223 __flush_tlb_one(va);
224 else
225 leave_mm(smp_processor_id());
226 }
227
228 if (!cpus_empty(cpu_mask))
229 flush_tlb_others(cpu_mask, mm, va);
230
231 preempt_enable();
232}
233EXPORT_SYMBOL(flush_tlb_page);
234
235static void do_flush_tlb_all(void *info)
236{
237 unsigned long cpu = smp_processor_id();
238
239 __flush_tlb_all();
240 if (x86_read_percpu(cpu_tlbstate.state) == TLBSTATE_LAZY)
241 leave_mm(cpu);
242}
243
244void flush_tlb_all(void)
245{
246 on_each_cpu(do_flush_tlb_all, NULL, 1);
247}
248
249void reset_lazy_tlbstate(void)
250{
251 int cpu = raw_smp_processor_id();
252
253 per_cpu(cpu_tlbstate, cpu).state = 0;
254 per_cpu(cpu_tlbstate, cpu).active_mm = &init_mm;
255}
256
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 6812b829ed83..d038b9c45cf8 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -11,16 +11,15 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12 12
13#include <asm/mmu_context.h> 13#include <asm/mmu_context.h>
14#include <asm/uv/uv.h>
14#include <asm/uv/uv_mmrs.h> 15#include <asm/uv/uv_mmrs.h>
15#include <asm/uv/uv_hub.h> 16#include <asm/uv/uv_hub.h>
16#include <asm/uv/uv_bau.h> 17#include <asm/uv/uv_bau.h>
17#include <asm/genapic.h> 18#include <asm/apic.h>
18#include <asm/idle.h> 19#include <asm/idle.h>
19#include <asm/tsc.h> 20#include <asm/tsc.h>
20#include <asm/irq_vectors.h> 21#include <asm/irq_vectors.h>
21 22
22#include <mach_apic.h>
23
24static struct bau_control **uv_bau_table_bases __read_mostly; 23static struct bau_control **uv_bau_table_bases __read_mostly;
25static int uv_bau_retry_limit __read_mostly; 24static int uv_bau_retry_limit __read_mostly;
26 25
@@ -210,14 +209,15 @@ static int uv_wait_completion(struct bau_desc *bau_desc,
210 * 209 *
211 * Send a broadcast and wait for a broadcast message to complete. 210 * Send a broadcast and wait for a broadcast message to complete.
212 * 211 *
213 * The cpumaskp mask contains the cpus the broadcast was sent to. 212 * The flush_mask contains the cpus the broadcast was sent to.
214 * 213 *
215 * Returns 1 if all remote flushing was done. The mask is zeroed. 214 * Returns NULL if all remote flushing was done. The mask is zeroed.
216 * Returns 0 if some remote flushing remains to be done. The mask is left 215 * Returns @flush_mask if some remote flushing remains to be done. The
217 * unchanged. 216 * mask will have some bits still set.
218 */ 217 */
219int uv_flush_send_and_wait(int cpu, int this_blade, struct bau_desc *bau_desc, 218const struct cpumask *uv_flush_send_and_wait(int cpu, int this_blade,
220 cpumask_t *cpumaskp) 219 struct bau_desc *bau_desc,
220 struct cpumask *flush_mask)
221{ 221{
222 int completion_status = 0; 222 int completion_status = 0;
223 int right_shift; 223 int right_shift;
@@ -257,66 +257,74 @@ int uv_flush_send_and_wait(int cpu, int this_blade, struct bau_desc *bau_desc,
257 * the cpu's, all of which are still in the mask. 257 * the cpu's, all of which are still in the mask.
258 */ 258 */
259 __get_cpu_var(ptcstats).ptc_i++; 259 __get_cpu_var(ptcstats).ptc_i++;
260 return 0; 260 return flush_mask;
261 } 261 }
262 262
263 /* 263 /*
264 * Success, so clear the remote cpu's from the mask so we don't 264 * Success, so clear the remote cpu's from the mask so we don't
265 * use the IPI method of shootdown on them. 265 * use the IPI method of shootdown on them.
266 */ 266 */
267 for_each_cpu_mask(bit, *cpumaskp) { 267 for_each_cpu(bit, flush_mask) {
268 blade = uv_cpu_to_blade_id(bit); 268 blade = uv_cpu_to_blade_id(bit);
269 if (blade == this_blade) 269 if (blade == this_blade)
270 continue; 270 continue;
271 cpu_clear(bit, *cpumaskp); 271 cpumask_clear_cpu(bit, flush_mask);
272 } 272 }
273 if (!cpus_empty(*cpumaskp)) 273 if (!cpumask_empty(flush_mask))
274 return 0; 274 return flush_mask;
275 return 1; 275 return NULL;
276} 276}
277 277
278/** 278/**
279 * uv_flush_tlb_others - globally purge translation cache of a virtual 279 * uv_flush_tlb_others - globally purge translation cache of a virtual
280 * address or all TLB's 280 * address or all TLB's
281 * @cpumaskp: mask of all cpu's in which the address is to be removed 281 * @cpumask: mask of all cpu's in which the address is to be removed
282 * @mm: mm_struct containing virtual address range 282 * @mm: mm_struct containing virtual address range
283 * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu) 283 * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
284 * @cpu: the current cpu
284 * 285 *
285 * This is the entry point for initiating any UV global TLB shootdown. 286 * This is the entry point for initiating any UV global TLB shootdown.
286 * 287 *
287 * Purges the translation caches of all specified processors of the given 288 * Purges the translation caches of all specified processors of the given
288 * virtual address, or purges all TLB's on specified processors. 289 * virtual address, or purges all TLB's on specified processors.
289 * 290 *
290 * The caller has derived the cpumaskp from the mm_struct and has subtracted 291 * The caller has derived the cpumask from the mm_struct. This function
291 * the local cpu from the mask. This function is called only if there 292 * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
292 * are bits set in the mask. (e.g. flush_tlb_page())
293 * 293 *
294 * The cpumaskp is converted into a nodemask of the nodes containing 294 * The cpumask is converted into a nodemask of the nodes containing
295 * the cpus. 295 * the cpus.
296 * 296 *
297 * Returns 1 if all remote flushing was done. 297 * Note that this function should be called with preemption disabled.
298 * Returns 0 if some remote flushing remains to be done. 298 *
299 * Returns NULL if all remote flushing was done.
300 * Returns pointer to cpumask if some remote flushing remains to be
301 * done. The returned pointer is valid till preemption is re-enabled.
299 */ 302 */
300int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm, 303const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
301 unsigned long va) 304 struct mm_struct *mm,
305 unsigned long va, unsigned int cpu)
302{ 306{
307 static DEFINE_PER_CPU(cpumask_t, flush_tlb_mask);
308 struct cpumask *flush_mask = &__get_cpu_var(flush_tlb_mask);
303 int i; 309 int i;
304 int bit; 310 int bit;
305 int blade; 311 int blade;
306 int cpu; 312 int uv_cpu;
307 int this_blade; 313 int this_blade;
308 int locals = 0; 314 int locals = 0;
309 struct bau_desc *bau_desc; 315 struct bau_desc *bau_desc;
310 316
311 cpu = uv_blade_processor_id(); 317 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
318
319 uv_cpu = uv_blade_processor_id();
312 this_blade = uv_numa_blade_id(); 320 this_blade = uv_numa_blade_id();
313 bau_desc = __get_cpu_var(bau_control).descriptor_base; 321 bau_desc = __get_cpu_var(bau_control).descriptor_base;
314 bau_desc += UV_ITEMS_PER_DESCRIPTOR * cpu; 322 bau_desc += UV_ITEMS_PER_DESCRIPTOR * uv_cpu;
315 323
316 bau_nodes_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE); 324 bau_nodes_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
317 325
318 i = 0; 326 i = 0;
319 for_each_cpu_mask(bit, *cpumaskp) { 327 for_each_cpu(bit, flush_mask) {
320 blade = uv_cpu_to_blade_id(bit); 328 blade = uv_cpu_to_blade_id(bit);
321 BUG_ON(blade > (UV_DISTRIBUTION_SIZE - 1)); 329 BUG_ON(blade > (UV_DISTRIBUTION_SIZE - 1));
322 if (blade == this_blade) { 330 if (blade == this_blade) {
@@ -331,17 +339,17 @@ int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm,
331 * no off_node flushing; return status for local node 339 * no off_node flushing; return status for local node
332 */ 340 */
333 if (locals) 341 if (locals)
334 return 0; 342 return flush_mask;
335 else 343 else
336 return 1; 344 return NULL;
337 } 345 }
338 __get_cpu_var(ptcstats).requestor++; 346 __get_cpu_var(ptcstats).requestor++;
339 __get_cpu_var(ptcstats).ntargeted += i; 347 __get_cpu_var(ptcstats).ntargeted += i;
340 348
341 bau_desc->payload.address = va; 349 bau_desc->payload.address = va;
342 bau_desc->payload.sending_cpu = smp_processor_id(); 350 bau_desc->payload.sending_cpu = cpu;
343 351
344 return uv_flush_send_and_wait(cpu, this_blade, bau_desc, cpumaskp); 352 return uv_flush_send_and_wait(uv_cpu, this_blade, bau_desc, flush_mask);
345} 353}
346 354
347/* 355/*
diff --git a/arch/x86/kernel/trampoline_32.S b/arch/x86/kernel/trampoline_32.S
index d8ccc3c6552f..66d874e5404c 100644
--- a/arch/x86/kernel/trampoline_32.S
+++ b/arch/x86/kernel/trampoline_32.S
@@ -29,7 +29,7 @@
29 29
30#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <asm/segment.h> 31#include <asm/segment.h>
32#include <asm/page.h> 32#include <asm/page_types.h>
33 33
34/* We can free up trampoline after bootup if cpu hotplug is not supported. */ 34/* We can free up trampoline after bootup if cpu hotplug is not supported. */
35#ifndef CONFIG_HOTPLUG_CPU 35#ifndef CONFIG_HOTPLUG_CPU
diff --git a/arch/x86/kernel/trampoline_64.S b/arch/x86/kernel/trampoline_64.S
index 894293c598db..cddfb8d386b9 100644
--- a/arch/x86/kernel/trampoline_64.S
+++ b/arch/x86/kernel/trampoline_64.S
@@ -25,10 +25,11 @@
25 */ 25 */
26 26
27#include <linux/linkage.h> 27#include <linux/linkage.h>
28#include <asm/pgtable.h> 28#include <asm/pgtable_types.h>
29#include <asm/page.h> 29#include <asm/page_types.h>
30#include <asm/msr.h> 30#include <asm/msr.h>
31#include <asm/segment.h> 31#include <asm/segment.h>
32#include <asm/processor-flags.h>
32 33
33.section .rodata, "a", @progbits 34.section .rodata, "a", @progbits
34 35
@@ -37,7 +38,7 @@
37ENTRY(trampoline_data) 38ENTRY(trampoline_data)
38r_base = . 39r_base = .
39 cli # We should be safe anyway 40 cli # We should be safe anyway
40 wbinvd 41 wbinvd
41 mov %cs, %ax # Code and data in the same place 42 mov %cs, %ax # Code and data in the same place
42 mov %ax, %ds 43 mov %ax, %ds
43 mov %ax, %es 44 mov %ax, %es
@@ -73,9 +74,8 @@ r_base = .
73 lidtl tidt - r_base # load idt with 0, 0 74 lidtl tidt - r_base # load idt with 0, 0
74 lgdtl tgdt - r_base # load gdt with whatever is appropriate 75 lgdtl tgdt - r_base # load gdt with whatever is appropriate
75 76
76 xor %ax, %ax 77 mov $X86_CR0_PE, %ax # protected mode (PE) bit
77 inc %ax # protected mode (PE) bit 78 lmsw %ax # into protected mode
78 lmsw %ax # into protected mode
79 79
80 # flush prefetch and jump to startup_32 80 # flush prefetch and jump to startup_32
81 ljmpl *(startup_32_vector - r_base) 81 ljmpl *(startup_32_vector - r_base)
@@ -86,9 +86,8 @@ startup_32:
86 movl $__KERNEL_DS, %eax # Initialize the %ds segment register 86 movl $__KERNEL_DS, %eax # Initialize the %ds segment register
87 movl %eax, %ds 87 movl %eax, %ds
88 88
89 xorl %eax, %eax 89 movl $X86_CR4_PAE, %eax
90 btsl $5, %eax # Enable PAE mode 90 movl %eax, %cr4 # Enable PAE mode
91 movl %eax, %cr4
92 91
93 # Setup trampoline 4 level pagetables 92 # Setup trampoline 4 level pagetables
94 leal (trampoline_level4_pgt - r_base)(%esi), %eax 93 leal (trampoline_level4_pgt - r_base)(%esi), %eax
@@ -99,9 +98,9 @@ startup_32:
99 xorl %edx, %edx 98 xorl %edx, %edx
100 wrmsr 99 wrmsr
101 100
102 xorl %eax, %eax 101 # Enable paging and in turn activate Long Mode
103 btsl $31, %eax # Enable paging and in turn activate Long Mode 102 # Enable protected mode
104 btsl $0, %eax # Enable protected mode 103 movl $(X86_CR0_PG | X86_CR0_PE), %eax
105 movl %eax, %cr0 104 movl %eax, %cr0
106 105
107 /* 106 /*
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index a9e7548e1790..a1d288327ff0 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -54,15 +54,14 @@
54#include <asm/desc.h> 54#include <asm/desc.h>
55#include <asm/i387.h> 55#include <asm/i387.h>
56 56
57#include <mach_traps.h> 57#include <asm/mach_traps.h>
58 58
59#ifdef CONFIG_X86_64 59#ifdef CONFIG_X86_64
60#include <asm/pgalloc.h> 60#include <asm/pgalloc.h>
61#include <asm/proto.h> 61#include <asm/proto.h>
62#include <asm/pda.h>
63#else 62#else
64#include <asm/processor-flags.h> 63#include <asm/processor-flags.h>
65#include <asm/arch_hooks.h> 64#include <asm/setup.h>
66#include <asm/traps.h> 65#include <asm/traps.h>
67 66
68#include "cpu/mcheck/mce.h" 67#include "cpu/mcheck/mce.h"
@@ -119,47 +118,6 @@ die_if_kernel(const char *str, struct pt_regs *regs, long err)
119 if (!user_mode_vm(regs)) 118 if (!user_mode_vm(regs))
120 die(str, regs, err); 119 die(str, regs, err);
121} 120}
122
123/*
124 * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
125 * invalid offset set (the LAZY one) and the faulting thread has
126 * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS,
127 * we set the offset field correctly and return 1.
128 */
129static int lazy_iobitmap_copy(void)
130{
131 struct thread_struct *thread;
132 struct tss_struct *tss;
133 int cpu;
134
135 cpu = get_cpu();
136 tss = &per_cpu(init_tss, cpu);
137 thread = &current->thread;
138
139 if (tss->x86_tss.io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
140 thread->io_bitmap_ptr) {
141 memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
142 thread->io_bitmap_max);
143 /*
144 * If the previously set map was extending to higher ports
145 * than the current one, pad extra space with 0xff (no access).
146 */
147 if (thread->io_bitmap_max < tss->io_bitmap_max) {
148 memset((char *) tss->io_bitmap +
149 thread->io_bitmap_max, 0xff,
150 tss->io_bitmap_max - thread->io_bitmap_max);
151 }
152 tss->io_bitmap_max = thread->io_bitmap_max;
153 tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
154 tss->io_bitmap_owner = thread;
155 put_cpu();
156
157 return 1;
158 }
159 put_cpu();
160
161 return 0;
162}
163#endif 121#endif
164 122
165static void __kprobes 123static void __kprobes
@@ -310,11 +268,6 @@ do_general_protection(struct pt_regs *regs, long error_code)
310 conditional_sti(regs); 268 conditional_sti(regs);
311 269
312#ifdef CONFIG_X86_32 270#ifdef CONFIG_X86_32
313 if (lazy_iobitmap_copy()) {
314 /* restart the faulting instruction */
315 return;
316 }
317
318 if (regs->flags & X86_VM_MASK) 271 if (regs->flags & X86_VM_MASK)
319 goto gp_in_vm86; 272 goto gp_in_vm86;
320#endif 273#endif
@@ -914,19 +867,20 @@ void math_emulate(struct math_emu_info *info)
914} 867}
915#endif /* CONFIG_MATH_EMULATION */ 868#endif /* CONFIG_MATH_EMULATION */
916 869
917dotraplinkage void __kprobes do_device_not_available(struct pt_regs regs) 870dotraplinkage void __kprobes
871do_device_not_available(struct pt_regs *regs, long error_code)
918{ 872{
919#ifdef CONFIG_X86_32 873#ifdef CONFIG_X86_32
920 if (read_cr0() & X86_CR0_EM) { 874 if (read_cr0() & X86_CR0_EM) {
921 struct math_emu_info info = { }; 875 struct math_emu_info info = { };
922 876
923 conditional_sti(&regs); 877 conditional_sti(regs);
924 878
925 info.regs = &regs; 879 info.regs = regs;
926 math_emulate(&info); 880 math_emulate(&info);
927 } else { 881 } else {
928 math_state_restore(); /* interrupts still off */ 882 math_state_restore(); /* interrupts still off */
929 conditional_sti(&regs); 883 conditional_sti(regs);
930 } 884 }
931#else 885#else
932 math_state_restore(); 886 math_state_restore();
@@ -942,7 +896,7 @@ dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
942 info.si_signo = SIGILL; 896 info.si_signo = SIGILL;
943 info.si_errno = 0; 897 info.si_errno = 0;
944 info.si_code = ILL_BADSTK; 898 info.si_code = ILL_BADSTK;
945 info.si_addr = 0; 899 info.si_addr = NULL;
946 if (notify_die(DIE_TRAP, "iret exception", 900 if (notify_die(DIE_TRAP, "iret exception",
947 regs, error_code, 32, SIGILL) == NOTIFY_STOP) 901 regs, error_code, 32, SIGILL) == NOTIFY_STOP)
948 return; 902 return;
@@ -1026,6 +980,6 @@ void __init trap_init(void)
1026 cpu_init(); 980 cpu_init();
1027 981
1028#ifdef CONFIG_X86_32 982#ifdef CONFIG_X86_32
1029 trap_init_hook(); 983 x86_quirk_trap_init();
1030#endif 984#endif
1031} 985}
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 08afa1579e6d..7a567ebe6361 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -791,7 +791,7 @@ __cpuinit int unsynchronized_tsc(void)
791 if (!cpu_has_tsc || tsc_unstable) 791 if (!cpu_has_tsc || tsc_unstable)
792 return 1; 792 return 1;
793 793
794#ifdef CONFIG_X86_SMP 794#ifdef CONFIG_SMP
795 if (apic_is_clustered_box()) 795 if (apic_is_clustered_box())
796 return 1; 796 return 1;
797#endif 797#endif
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index d801d06af068..191a876e9e87 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -24,18 +24,14 @@
24 24
25#include <asm/visws/cobalt.h> 25#include <asm/visws/cobalt.h>
26#include <asm/visws/piix4.h> 26#include <asm/visws/piix4.h>
27#include <asm/arch_hooks.h>
28#include <asm/io_apic.h> 27#include <asm/io_apic.h>
29#include <asm/fixmap.h> 28#include <asm/fixmap.h>
30#include <asm/reboot.h> 29#include <asm/reboot.h>
31#include <asm/setup.h> 30#include <asm/setup.h>
31#include <asm/apic.h>
32#include <asm/e820.h> 32#include <asm/e820.h>
33#include <asm/io.h> 33#include <asm/io.h>
34 34
35#include <mach_ipi.h>
36
37#include "mach_apic.h"
38
39#include <linux/kernel_stat.h> 35#include <linux/kernel_stat.h>
40 36
41#include <asm/i8259.h> 37#include <asm/i8259.h>
@@ -49,8 +45,6 @@
49 45
50extern int no_broadcast; 46extern int no_broadcast;
51 47
52#include <asm/apic.h>
53
54char visws_board_type = -1; 48char visws_board_type = -1;
55char visws_board_rev = -1; 49char visws_board_rev = -1;
56 50
@@ -200,7 +194,7 @@ static void __init MP_processor_info(struct mpc_cpu *m)
200 return; 194 return;
201 } 195 }
202 196
203 apic_cpus = apicid_to_cpu_present(m->apicid); 197 apic_cpus = apic->apicid_to_cpu_present(m->apicid);
204 physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus); 198 physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
205 /* 199 /*
206 * Validate version 200 * Validate version
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
index 4eeb5cf9720d..d7ac84e7fc1c 100644
--- a/arch/x86/kernel/vm86_32.c
+++ b/arch/x86/kernel/vm86_32.c
@@ -158,7 +158,7 @@ struct pt_regs *save_v86_state(struct kernel_vm86_regs *regs)
158 ret = KVM86->regs32; 158 ret = KVM86->regs32;
159 159
160 ret->fs = current->thread.saved_fs; 160 ret->fs = current->thread.saved_fs;
161 loadsegment(gs, current->thread.saved_gs); 161 set_user_gs(ret, current->thread.saved_gs);
162 162
163 return ret; 163 return ret;
164} 164}
@@ -197,9 +197,9 @@ out:
197static int do_vm86_irq_handling(int subfunction, int irqnumber); 197static int do_vm86_irq_handling(int subfunction, int irqnumber);
198static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk); 198static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk);
199 199
200asmlinkage int sys_vm86old(struct pt_regs regs) 200int sys_vm86old(struct pt_regs *regs)
201{ 201{
202 struct vm86_struct __user *v86 = (struct vm86_struct __user *)regs.bx; 202 struct vm86_struct __user *v86 = (struct vm86_struct __user *)regs->bx;
203 struct kernel_vm86_struct info; /* declare this _on top_, 203 struct kernel_vm86_struct info; /* declare this _on top_,
204 * this avoids wasting of stack space. 204 * this avoids wasting of stack space.
205 * This remains on the stack until we 205 * This remains on the stack until we
@@ -218,7 +218,7 @@ asmlinkage int sys_vm86old(struct pt_regs regs)
218 if (tmp) 218 if (tmp)
219 goto out; 219 goto out;
220 memset(&info.vm86plus, 0, (int)&info.regs32 - (int)&info.vm86plus); 220 memset(&info.vm86plus, 0, (int)&info.regs32 - (int)&info.vm86plus);
221 info.regs32 = &regs; 221 info.regs32 = regs;
222 tsk->thread.vm86_info = v86; 222 tsk->thread.vm86_info = v86;
223 do_sys_vm86(&info, tsk); 223 do_sys_vm86(&info, tsk);
224 ret = 0; /* we never return here */ 224 ret = 0; /* we never return here */
@@ -227,7 +227,7 @@ out:
227} 227}
228 228
229 229
230asmlinkage int sys_vm86(struct pt_regs regs) 230int sys_vm86(struct pt_regs *regs)
231{ 231{
232 struct kernel_vm86_struct info; /* declare this _on top_, 232 struct kernel_vm86_struct info; /* declare this _on top_,
233 * this avoids wasting of stack space. 233 * this avoids wasting of stack space.
@@ -239,12 +239,12 @@ asmlinkage int sys_vm86(struct pt_regs regs)
239 struct vm86plus_struct __user *v86; 239 struct vm86plus_struct __user *v86;
240 240
241 tsk = current; 241 tsk = current;
242 switch (regs.bx) { 242 switch (regs->bx) {
243 case VM86_REQUEST_IRQ: 243 case VM86_REQUEST_IRQ:
244 case VM86_FREE_IRQ: 244 case VM86_FREE_IRQ:
245 case VM86_GET_IRQ_BITS: 245 case VM86_GET_IRQ_BITS:
246 case VM86_GET_AND_RESET_IRQ: 246 case VM86_GET_AND_RESET_IRQ:
247 ret = do_vm86_irq_handling(regs.bx, (int)regs.cx); 247 ret = do_vm86_irq_handling(regs->bx, (int)regs->cx);
248 goto out; 248 goto out;
249 case VM86_PLUS_INSTALL_CHECK: 249 case VM86_PLUS_INSTALL_CHECK:
250 /* 250 /*
@@ -261,14 +261,14 @@ asmlinkage int sys_vm86(struct pt_regs regs)
261 ret = -EPERM; 261 ret = -EPERM;
262 if (tsk->thread.saved_sp0) 262 if (tsk->thread.saved_sp0)
263 goto out; 263 goto out;
264 v86 = (struct vm86plus_struct __user *)regs.cx; 264 v86 = (struct vm86plus_struct __user *)regs->cx;
265 tmp = copy_vm86_regs_from_user(&info.regs, &v86->regs, 265 tmp = copy_vm86_regs_from_user(&info.regs, &v86->regs,
266 offsetof(struct kernel_vm86_struct, regs32) - 266 offsetof(struct kernel_vm86_struct, regs32) -
267 sizeof(info.regs)); 267 sizeof(info.regs));
268 ret = -EFAULT; 268 ret = -EFAULT;
269 if (tmp) 269 if (tmp)
270 goto out; 270 goto out;
271 info.regs32 = &regs; 271 info.regs32 = regs;
272 info.vm86plus.is_vm86pus = 1; 272 info.vm86plus.is_vm86pus = 1;
273 tsk->thread.vm86_info = (struct vm86_struct __user *)v86; 273 tsk->thread.vm86_info = (struct vm86_struct __user *)v86;
274 do_sys_vm86(&info, tsk); 274 do_sys_vm86(&info, tsk);
@@ -323,7 +323,7 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk
323 info->regs32->ax = 0; 323 info->regs32->ax = 0;
324 tsk->thread.saved_sp0 = tsk->thread.sp0; 324 tsk->thread.saved_sp0 = tsk->thread.sp0;
325 tsk->thread.saved_fs = info->regs32->fs; 325 tsk->thread.saved_fs = info->regs32->fs;
326 savesegment(gs, tsk->thread.saved_gs); 326 tsk->thread.saved_gs = get_user_gs(info->regs32);
327 327
328 tss = &per_cpu(init_tss, get_cpu()); 328 tss = &per_cpu(init_tss, get_cpu());
329 tsk->thread.sp0 = (unsigned long) &info->VM86_TSS_ESP0; 329 tsk->thread.sp0 = (unsigned long) &info->VM86_TSS_ESP0;
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index bef58b4982db..2cc4a90e2cb3 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -680,10 +680,11 @@ static inline int __init activate_vmi(void)
680 para_fill(pv_mmu_ops.write_cr2, SetCR2); 680 para_fill(pv_mmu_ops.write_cr2, SetCR2);
681 para_fill(pv_mmu_ops.write_cr3, SetCR3); 681 para_fill(pv_mmu_ops.write_cr3, SetCR3);
682 para_fill(pv_cpu_ops.write_cr4, SetCR4); 682 para_fill(pv_cpu_ops.write_cr4, SetCR4);
683 para_fill(pv_irq_ops.save_fl, GetInterruptMask); 683
684 para_fill(pv_irq_ops.restore_fl, SetInterruptMask); 684 para_fill(pv_irq_ops.save_fl.func, GetInterruptMask);
685 para_fill(pv_irq_ops.irq_disable, DisableInterrupts); 685 para_fill(pv_irq_ops.restore_fl.func, SetInterruptMask);
686 para_fill(pv_irq_ops.irq_enable, EnableInterrupts); 686 para_fill(pv_irq_ops.irq_disable.func, DisableInterrupts);
687 para_fill(pv_irq_ops.irq_enable.func, EnableInterrupts);
687 688
688 para_fill(pv_cpu_ops.wbinvd, WBINVD); 689 para_fill(pv_cpu_ops.wbinvd, WBINVD);
689 para_fill(pv_cpu_ops.read_tsc, RDTSC); 690 para_fill(pv_cpu_ops.read_tsc, RDTSC);
@@ -797,8 +798,8 @@ static inline int __init activate_vmi(void)
797#endif 798#endif
798 799
799#ifdef CONFIG_X86_LOCAL_APIC 800#ifdef CONFIG_X86_LOCAL_APIC
800 para_fill(apic_ops->read, APICRead); 801 para_fill(apic->read, APICRead);
801 para_fill(apic_ops->write, APICWrite); 802 para_fill(apic->write, APICWrite);
802#endif 803#endif
803 804
804 /* 805 /*
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index e5b088fffa40..33a788d5879c 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -28,7 +28,6 @@
28 28
29#include <asm/vmi.h> 29#include <asm/vmi.h>
30#include <asm/vmi_time.h> 30#include <asm/vmi_time.h>
31#include <asm/arch_hooks.h>
32#include <asm/apicdef.h> 31#include <asm/apicdef.h>
33#include <asm/apic.h> 32#include <asm/apic.h>
34#include <asm/timer.h> 33#include <asm/timer.h>
@@ -256,7 +255,7 @@ void __devinit vmi_time_bsp_init(void)
256 */ 255 */
257 clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL); 256 clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL);
258 local_irq_disable(); 257 local_irq_disable();
259#ifdef CONFIG_X86_SMP 258#ifdef CONFIG_SMP
260 /* 259 /*
261 * XXX handle_percpu_irq only defined for SMP; we need to switch over 260 * XXX handle_percpu_irq only defined for SMP; we need to switch over
262 * to using it, since this is a local interrupt, which each CPU must 261 * to using it, since this is a local interrupt, which each CPU must
@@ -288,8 +287,7 @@ static struct clocksource clocksource_vmi;
288static cycle_t read_real_cycles(void) 287static cycle_t read_real_cycles(void)
289{ 288{
290 cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL); 289 cycle_t ret = (cycle_t)vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL);
291 return ret >= clocksource_vmi.cycle_last ? 290 return max(ret, clocksource_vmi.cycle_last);
292 ret : clocksource_vmi.cycle_last;
293} 291}
294 292
295static struct clocksource clocksource_vmi = { 293static struct clocksource clocksource_vmi = {
diff --git a/arch/x86/kernel/vmlinux_32.lds.S b/arch/x86/kernel/vmlinux_32.lds.S
index 82c67559dde7..0d860963f268 100644
--- a/arch/x86/kernel/vmlinux_32.lds.S
+++ b/arch/x86/kernel/vmlinux_32.lds.S
@@ -12,7 +12,7 @@
12 12
13#include <asm-generic/vmlinux.lds.h> 13#include <asm-generic/vmlinux.lds.h>
14#include <asm/thread_info.h> 14#include <asm/thread_info.h>
15#include <asm/page.h> 15#include <asm/page_types.h>
16#include <asm/cache.h> 16#include <asm/cache.h>
17#include <asm/boot.h> 17#include <asm/boot.h>
18 18
@@ -178,14 +178,7 @@ SECTIONS
178 __initramfs_end = .; 178 __initramfs_end = .;
179 } 179 }
180#endif 180#endif
181 . = ALIGN(PAGE_SIZE); 181 PERCPU(PAGE_SIZE)
182 .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) {
183 __per_cpu_start = .;
184 *(.data.percpu.page_aligned)
185 *(.data.percpu)
186 *(.data.percpu.shared_aligned)
187 __per_cpu_end = .;
188 }
189 . = ALIGN(PAGE_SIZE); 182 . = ALIGN(PAGE_SIZE);
190 /* freed after init ends here */ 183 /* freed after init ends here */
191 184
diff --git a/arch/x86/kernel/vmlinux_64.lds.S b/arch/x86/kernel/vmlinux_64.lds.S
index 1a614c0e6bef..fbfced6f6800 100644
--- a/arch/x86/kernel/vmlinux_64.lds.S
+++ b/arch/x86/kernel/vmlinux_64.lds.S
@@ -5,7 +5,8 @@
5#define LOAD_OFFSET __START_KERNEL_map 5#define LOAD_OFFSET __START_KERNEL_map
6 6
7#include <asm-generic/vmlinux.lds.h> 7#include <asm-generic/vmlinux.lds.h>
8#include <asm/page.h> 8#include <asm/asm-offsets.h>
9#include <asm/page_types.h>
9 10
10#undef i386 /* in case the preprocessor is a 32bit one */ 11#undef i386 /* in case the preprocessor is a 32bit one */
11 12
@@ -13,12 +14,15 @@ OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64")
13OUTPUT_ARCH(i386:x86-64) 14OUTPUT_ARCH(i386:x86-64)
14ENTRY(phys_startup_64) 15ENTRY(phys_startup_64)
15jiffies_64 = jiffies; 16jiffies_64 = jiffies;
16_proxy_pda = 1;
17PHDRS { 17PHDRS {
18 text PT_LOAD FLAGS(5); /* R_E */ 18 text PT_LOAD FLAGS(5); /* R_E */
19 data PT_LOAD FLAGS(7); /* RWE */ 19 data PT_LOAD FLAGS(7); /* RWE */
20 user PT_LOAD FLAGS(7); /* RWE */ 20 user PT_LOAD FLAGS(7); /* RWE */
21 data.init PT_LOAD FLAGS(7); /* RWE */ 21 data.init PT_LOAD FLAGS(7); /* RWE */
22#ifdef CONFIG_SMP
23 percpu PT_LOAD FLAGS(7); /* RWE */
24#endif
25 data.init2 PT_LOAD FLAGS(7); /* RWE */
22 note PT_NOTE FLAGS(0); /* ___ */ 26 note PT_NOTE FLAGS(0); /* ___ */
23} 27}
24SECTIONS 28SECTIONS
@@ -208,14 +212,28 @@ SECTIONS
208 __initramfs_end = .; 212 __initramfs_end = .;
209#endif 213#endif
210 214
215#ifdef CONFIG_SMP
216 /*
217 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
218 * output PHDR, so the next output section - __data_nosave - should
219 * start another section data.init2. Also, pda should be at the head of
220 * percpu area. Preallocate it and define the percpu offset symbol
221 * so that it can be accessed as a percpu variable.
222 */
223 . = ALIGN(PAGE_SIZE);
224 PERCPU_VADDR(0, :percpu)
225#else
211 PERCPU(PAGE_SIZE) 226 PERCPU(PAGE_SIZE)
227#endif
212 228
213 . = ALIGN(PAGE_SIZE); 229 . = ALIGN(PAGE_SIZE);
214 __init_end = .; 230 __init_end = .;
215 231
216 . = ALIGN(PAGE_SIZE); 232 . = ALIGN(PAGE_SIZE);
217 __nosave_begin = .; 233 __nosave_begin = .;
218 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { *(.data.nosave) } 234 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
235 *(.data.nosave)
236 } :data.init2 /* use another section data.init2, see PERCPU_VADDR() above */
219 . = ALIGN(PAGE_SIZE); 237 . = ALIGN(PAGE_SIZE);
220 __nosave_end = .; 238 __nosave_end = .;
221 239
@@ -239,8 +257,21 @@ SECTIONS
239 DWARF_DEBUG 257 DWARF_DEBUG
240} 258}
241 259
260 /*
261 * Per-cpu symbols which need to be offset from __per_cpu_load
262 * for the boot processor.
263 */
264#define INIT_PER_CPU(x) init_per_cpu__##x = per_cpu__##x + __per_cpu_load
265INIT_PER_CPU(gdt_page);
266INIT_PER_CPU(irq_stack_union);
267
242/* 268/*
243 * Build-time check on the image size: 269 * Build-time check on the image size:
244 */ 270 */
245ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), 271ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
246 "kernel image bigger than KERNEL_IMAGE_SIZE") 272 "kernel image bigger than KERNEL_IMAGE_SIZE")
273
274#ifdef CONFIG_SMP
275ASSERT((per_cpu__irq_stack_union == 0),
276 "irq_stack_union is not at start of per-cpu area");
277#endif
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c
index a688f3bfaec2..74de562812cc 100644
--- a/arch/x86/kernel/vsmp_64.c
+++ b/arch/x86/kernel/vsmp_64.c
@@ -22,7 +22,7 @@
22#include <asm/paravirt.h> 22#include <asm/paravirt.h>
23#include <asm/setup.h> 23#include <asm/setup.h>
24 24
25#if defined CONFIG_PCI && defined CONFIG_PARAVIRT 25#ifdef CONFIG_PARAVIRT
26/* 26/*
27 * Interrupt control on vSMPowered systems: 27 * Interrupt control on vSMPowered systems:
28 * ~AC is a shadow of IF. If IF is 'on' AC should be 'off' 28 * ~AC is a shadow of IF. If IF is 'on' AC should be 'off'
@@ -37,6 +37,7 @@ static unsigned long vsmp_save_fl(void)
37 flags &= ~X86_EFLAGS_IF; 37 flags &= ~X86_EFLAGS_IF;
38 return flags; 38 return flags;
39} 39}
40PV_CALLEE_SAVE_REGS_THUNK(vsmp_save_fl);
40 41
41static void vsmp_restore_fl(unsigned long flags) 42static void vsmp_restore_fl(unsigned long flags)
42{ 43{
@@ -46,6 +47,7 @@ static void vsmp_restore_fl(unsigned long flags)
46 flags |= X86_EFLAGS_AC; 47 flags |= X86_EFLAGS_AC;
47 native_restore_fl(flags); 48 native_restore_fl(flags);
48} 49}
50PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl);
49 51
50static void vsmp_irq_disable(void) 52static void vsmp_irq_disable(void)
51{ 53{
@@ -53,6 +55,7 @@ static void vsmp_irq_disable(void)
53 55
54 native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC); 56 native_restore_fl((flags & ~X86_EFLAGS_IF) | X86_EFLAGS_AC);
55} 57}
58PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable);
56 59
57static void vsmp_irq_enable(void) 60static void vsmp_irq_enable(void)
58{ 61{
@@ -60,6 +63,7 @@ static void vsmp_irq_enable(void)
60 63
61 native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC)); 64 native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC));
62} 65}
66PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_enable);
63 67
64static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf, 68static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf,
65 unsigned long addr, unsigned len) 69 unsigned long addr, unsigned len)
@@ -90,10 +94,10 @@ static void __init set_vsmp_pv_ops(void)
90 cap, ctl); 94 cap, ctl);
91 if (cap & ctl & (1 << 4)) { 95 if (cap & ctl & (1 << 4)) {
92 /* Setup irq ops and turn on vSMP IRQ fastpath handling */ 96 /* Setup irq ops and turn on vSMP IRQ fastpath handling */
93 pv_irq_ops.irq_disable = vsmp_irq_disable; 97 pv_irq_ops.irq_disable = PV_CALLEE_SAVE(vsmp_irq_disable);
94 pv_irq_ops.irq_enable = vsmp_irq_enable; 98 pv_irq_ops.irq_enable = PV_CALLEE_SAVE(vsmp_irq_enable);
95 pv_irq_ops.save_fl = vsmp_save_fl; 99 pv_irq_ops.save_fl = PV_CALLEE_SAVE(vsmp_save_fl);
96 pv_irq_ops.restore_fl = vsmp_restore_fl; 100 pv_irq_ops.restore_fl = PV_CALLEE_SAVE(vsmp_restore_fl);
97 pv_init_ops.patch = vsmp_patch; 101 pv_init_ops.patch = vsmp_patch;
98 102
99 ctl &= ~(1 << 4); 103 ctl &= ~(1 << 4);
@@ -110,7 +114,6 @@ static void __init set_vsmp_pv_ops(void)
110} 114}
111#endif 115#endif
112 116
113#ifdef CONFIG_PCI
114static int is_vsmp = -1; 117static int is_vsmp = -1;
115 118
116static void __init detect_vsmp_box(void) 119static void __init detect_vsmp_box(void)
@@ -135,15 +138,6 @@ int is_vsmp_box(void)
135 return 0; 138 return 0;
136 } 139 }
137} 140}
138#else
139static void __init detect_vsmp_box(void)
140{
141}
142int is_vsmp_box(void)
143{
144 return 0;
145}
146#endif
147 141
148void __init vsmp_init(void) 142void __init vsmp_init(void)
149{ 143{
diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c
index 695e426aa354..3909e3ba5ce3 100644
--- a/arch/x86/kernel/x8664_ksyms_64.c
+++ b/arch/x86/kernel/x8664_ksyms_64.c
@@ -58,5 +58,3 @@ EXPORT_SYMBOL(__memcpy);
58EXPORT_SYMBOL(empty_zero_page); 58EXPORT_SYMBOL(empty_zero_page);
59EXPORT_SYMBOL(init_level4_pgt); 59EXPORT_SYMBOL(init_level4_pgt);
60EXPORT_SYMBOL(load_gs_index); 60EXPORT_SYMBOL(load_gs_index);
61
62EXPORT_SYMBOL(_proxy_pda);
diff --git a/arch/x86/lguest/Kconfig b/arch/x86/lguest/Kconfig
index c70e12b1a637..8dab8f7844d3 100644
--- a/arch/x86/lguest/Kconfig
+++ b/arch/x86/lguest/Kconfig
@@ -3,7 +3,6 @@ config LGUEST_GUEST
3 select PARAVIRT 3 select PARAVIRT
4 depends on X86_32 4 depends on X86_32
5 depends on !X86_PAE 5 depends on !X86_PAE
6 depends on !X86_VOYAGER
7 select VIRTIO 6 select VIRTIO
8 select VIRTIO_RING 7 select VIRTIO_RING
9 select VIRTIO_CONSOLE 8 select VIRTIO_CONSOLE
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 960a8d9c049c..9fe4ddaa8f6f 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -173,24 +173,29 @@ static unsigned long save_fl(void)
173{ 173{
174 return lguest_data.irq_enabled; 174 return lguest_data.irq_enabled;
175} 175}
176PV_CALLEE_SAVE_REGS_THUNK(save_fl);
176 177
177/* restore_flags() just sets the flags back to the value given. */ 178/* restore_flags() just sets the flags back to the value given. */
178static void restore_fl(unsigned long flags) 179static void restore_fl(unsigned long flags)
179{ 180{
180 lguest_data.irq_enabled = flags; 181 lguest_data.irq_enabled = flags;
181} 182}
183PV_CALLEE_SAVE_REGS_THUNK(restore_fl);
182 184
183/* Interrupts go off... */ 185/* Interrupts go off... */
184static void irq_disable(void) 186static void irq_disable(void)
185{ 187{
186 lguest_data.irq_enabled = 0; 188 lguest_data.irq_enabled = 0;
187} 189}
190PV_CALLEE_SAVE_REGS_THUNK(irq_disable);
188 191
189/* Interrupts go on... */ 192/* Interrupts go on... */
190static void irq_enable(void) 193static void irq_enable(void)
191{ 194{
192 lguest_data.irq_enabled = X86_EFLAGS_IF; 195 lguest_data.irq_enabled = X86_EFLAGS_IF;
193} 196}
197PV_CALLEE_SAVE_REGS_THUNK(irq_enable);
198
194/*:*/ 199/*:*/
195/*M:003 Note that we don't check for outstanding interrupts when we re-enable 200/*M:003 Note that we don't check for outstanding interrupts when we re-enable
196 * them (or when we unmask an interrupt). This seems to work for the moment, 201 * them (or when we unmask an interrupt). This seems to work for the moment,
@@ -278,7 +283,7 @@ static void lguest_load_tls(struct thread_struct *t, unsigned int cpu)
278 /* There's one problem which normal hardware doesn't have: the Host 283 /* There's one problem which normal hardware doesn't have: the Host
279 * can't handle us removing entries we're currently using. So we clear 284 * can't handle us removing entries we're currently using. So we clear
280 * the GS register here: if it's needed it'll be reloaded anyway. */ 285 * the GS register here: if it's needed it'll be reloaded anyway. */
281 loadsegment(gs, 0); 286 lazy_load_gs(0);
282 lazy_hcall(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu, 0); 287 lazy_hcall(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu, 0);
283} 288}
284 289
@@ -830,13 +835,14 @@ static u32 lguest_apic_safe_wait_icr_idle(void)
830 return 0; 835 return 0;
831} 836}
832 837
833static struct apic_ops lguest_basic_apic_ops = { 838static void set_lguest_basic_apic_ops(void)
834 .read = lguest_apic_read, 839{
835 .write = lguest_apic_write, 840 apic->read = lguest_apic_read;
836 .icr_read = lguest_apic_icr_read, 841 apic->write = lguest_apic_write;
837 .icr_write = lguest_apic_icr_write, 842 apic->icr_read = lguest_apic_icr_read;
838 .wait_icr_idle = lguest_apic_wait_icr_idle, 843 apic->icr_write = lguest_apic_icr_write;
839 .safe_wait_icr_idle = lguest_apic_safe_wait_icr_idle, 844 apic->wait_icr_idle = lguest_apic_wait_icr_idle;
845 apic->safe_wait_icr_idle = lguest_apic_safe_wait_icr_idle;
840}; 846};
841#endif 847#endif
842 848
@@ -991,10 +997,10 @@ __init void lguest_init(void)
991 997
992 /* interrupt-related operations */ 998 /* interrupt-related operations */
993 pv_irq_ops.init_IRQ = lguest_init_IRQ; 999 pv_irq_ops.init_IRQ = lguest_init_IRQ;
994 pv_irq_ops.save_fl = save_fl; 1000 pv_irq_ops.save_fl = PV_CALLEE_SAVE(save_fl);
995 pv_irq_ops.restore_fl = restore_fl; 1001 pv_irq_ops.restore_fl = PV_CALLEE_SAVE(restore_fl);
996 pv_irq_ops.irq_disable = irq_disable; 1002 pv_irq_ops.irq_disable = PV_CALLEE_SAVE(irq_disable);
997 pv_irq_ops.irq_enable = irq_enable; 1003 pv_irq_ops.irq_enable = PV_CALLEE_SAVE(irq_enable);
998 pv_irq_ops.safe_halt = lguest_safe_halt; 1004 pv_irq_ops.safe_halt = lguest_safe_halt;
999 1005
1000 /* init-time operations */ 1006 /* init-time operations */
@@ -1037,7 +1043,7 @@ __init void lguest_init(void)
1037 1043
1038#ifdef CONFIG_X86_LOCAL_APIC 1044#ifdef CONFIG_X86_LOCAL_APIC
1039 /* apic read/write intercepts */ 1045 /* apic read/write intercepts */
1040 apic_ops = &lguest_basic_apic_ops; 1046 set_lguest_basic_apic_ops();
1041#endif 1047#endif
1042 1048
1043 /* time operations */ 1049 /* time operations */
diff --git a/arch/x86/lib/getuser.S b/arch/x86/lib/getuser.S
index ad374003742f..51f1504cddd9 100644
--- a/arch/x86/lib/getuser.S
+++ b/arch/x86/lib/getuser.S
@@ -28,7 +28,7 @@
28 28
29#include <linux/linkage.h> 29#include <linux/linkage.h>
30#include <asm/dwarf2.h> 30#include <asm/dwarf2.h>
31#include <asm/page.h> 31#include <asm/page_types.h>
32#include <asm/errno.h> 32#include <asm/errno.h>
33#include <asm/asm-offsets.h> 33#include <asm/asm-offsets.h>
34#include <asm/thread_info.h> 34#include <asm/thread_info.h>
diff --git a/arch/x86/mach-default/Makefile b/arch/x86/mach-default/Makefile
deleted file mode 100644
index 012fe34459e6..000000000000
--- a/arch/x86/mach-default/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5obj-y := setup.o
diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c
deleted file mode 100644
index 50b591871128..000000000000
--- a/arch/x86/mach-default/setup.c
+++ /dev/null
@@ -1,174 +0,0 @@
1/*
2 * Machine specific setup for generic
3 */
4
5#include <linux/smp.h>
6#include <linux/init.h>
7#include <linux/interrupt.h>
8#include <asm/acpi.h>
9#include <asm/arch_hooks.h>
10#include <asm/e820.h>
11#include <asm/setup.h>
12
13#include <mach_ipi.h>
14
15#ifdef CONFIG_HOTPLUG_CPU
16#define DEFAULT_SEND_IPI (1)
17#else
18#define DEFAULT_SEND_IPI (0)
19#endif
20
21int no_broadcast = DEFAULT_SEND_IPI;
22
23/**
24 * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
25 *
26 * Description:
27 * Perform any necessary interrupt initialisation prior to setting up
28 * the "ordinary" interrupt call gates. For legacy reasons, the ISA
29 * interrupts should be initialised here if the machine emulates a PC
30 * in any way.
31 **/
32void __init pre_intr_init_hook(void)
33{
34 if (x86_quirks->arch_pre_intr_init) {
35 if (x86_quirks->arch_pre_intr_init())
36 return;
37 }
38 init_ISA_irqs();
39}
40
41/*
42 * IRQ2 is cascade interrupt to second interrupt controller
43 */
44static struct irqaction irq2 = {
45 .handler = no_action,
46 .mask = CPU_MASK_NONE,
47 .name = "cascade",
48};
49
50/**
51 * intr_init_hook - post gate setup interrupt initialisation
52 *
53 * Description:
54 * Fill in any interrupts that may have been left out by the general
55 * init_IRQ() routine. interrupts having to do with the machine rather
56 * than the devices on the I/O bus (like APIC interrupts in intel MP
57 * systems) are started here.
58 **/
59void __init intr_init_hook(void)
60{
61 if (x86_quirks->arch_intr_init) {
62 if (x86_quirks->arch_intr_init())
63 return;
64 }
65 if (!acpi_ioapic)
66 setup_irq(2, &irq2);
67
68}
69
70/**
71 * pre_setup_arch_hook - hook called prior to any setup_arch() execution
72 *
73 * Description:
74 * generally used to activate any machine specific identification
75 * routines that may be needed before setup_arch() runs. On Voyager
76 * this is used to get the board revision and type.
77 **/
78void __init pre_setup_arch_hook(void)
79{
80}
81
82/**
83 * trap_init_hook - initialise system specific traps
84 *
85 * Description:
86 * Called as the final act of trap_init(). Used in VISWS to initialise
87 * the various board specific APIC traps.
88 **/
89void __init trap_init_hook(void)
90{
91 if (x86_quirks->arch_trap_init) {
92 if (x86_quirks->arch_trap_init())
93 return;
94 }
95}
96
97static struct irqaction irq0 = {
98 .handler = timer_interrupt,
99 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
100 .mask = CPU_MASK_NONE,
101 .name = "timer"
102};
103
104/**
105 * pre_time_init_hook - do any specific initialisations before.
106 *
107 **/
108void __init pre_time_init_hook(void)
109{
110 if (x86_quirks->arch_pre_time_init)
111 x86_quirks->arch_pre_time_init();
112}
113
114/**
115 * time_init_hook - do any specific initialisations for the system timer.
116 *
117 * Description:
118 * Must plug the system timer interrupt source at HZ into the IRQ listed
119 * in irq_vectors.h:TIMER_IRQ
120 **/
121void __init time_init_hook(void)
122{
123 if (x86_quirks->arch_time_init) {
124 /*
125 * A nonzero return code does not mean failure, it means
126 * that the architecture quirk does not want any
127 * generic (timer) setup to be performed after this:
128 */
129 if (x86_quirks->arch_time_init())
130 return;
131 }
132
133 irq0.mask = cpumask_of_cpu(0);
134 setup_irq(0, &irq0);
135}
136
137#ifdef CONFIG_MCA
138/**
139 * mca_nmi_hook - hook into MCA specific NMI chain
140 *
141 * Description:
142 * The MCA (Microchannel Architecture) has an NMI chain for NMI sources
143 * along the MCA bus. Use this to hook into that chain if you will need
144 * it.
145 **/
146void mca_nmi_hook(void)
147{
148 /*
149 * If I recall correctly, there's a whole bunch of other things that
150 * we can do to check for NMI problems, but that's all I know about
151 * at the moment.
152 */
153 pr_warning("NMI generated from unknown source!\n");
154}
155#endif
156
157static __init int no_ipi_broadcast(char *str)
158{
159 get_option(&str, &no_broadcast);
160 pr_info("Using %s mode\n",
161 no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
162 return 1;
163}
164__setup("no_ipi_broadcast=", no_ipi_broadcast);
165
166static int __init print_ipi_mode(void)
167{
168 pr_info("Using IPI %s mode\n",
169 no_broadcast ? "No-Shortcut" : "Shortcut");
170 return 0;
171}
172
173late_initcall(print_ipi_mode);
174
diff --git a/arch/x86/mach-generic/Makefile b/arch/x86/mach-generic/Makefile
deleted file mode 100644
index 6730f4e7c744..000000000000
--- a/arch/x86/mach-generic/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
1#
2# Makefile for the generic architecture
3#
4
5EXTRA_CFLAGS := -Iarch/x86/kernel
6
7obj-y := probe.o default.o
8obj-$(CONFIG_X86_NUMAQ) += numaq.o
9obj-$(CONFIG_X86_SUMMIT) += summit.o
10obj-$(CONFIG_X86_BIGSMP) += bigsmp.o
11obj-$(CONFIG_X86_ES7000) += es7000.o
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
deleted file mode 100644
index bc4c7840b2a8..000000000000
--- a/arch/x86/mach-generic/bigsmp.c
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * APIC driver for "bigsmp" XAPIC machines with more than 8 virtual CPUs.
3 * Drives the local APIC in "clustered mode".
4 */
5#define APIC_DEFINITION 1
6#include <linux/threads.h>
7#include <linux/cpumask.h>
8#include <asm/mpspec.h>
9#include <asm/genapic.h>
10#include <asm/fixmap.h>
11#include <asm/apicdef.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/dmi.h>
15#include <asm/bigsmp/apicdef.h>
16#include <linux/smp.h>
17#include <asm/bigsmp/apic.h>
18#include <asm/bigsmp/ipi.h>
19#include <asm/mach-default/mach_mpparse.h>
20#include <asm/mach-default/mach_wakecpu.h>
21
22static int dmi_bigsmp; /* can be set by dmi scanners */
23
24static int hp_ht_bigsmp(const struct dmi_system_id *d)
25{
26 printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
27 dmi_bigsmp = 1;
28 return 0;
29}
30
31
32static const struct dmi_system_id bigsmp_dmi_table[] = {
33 { hp_ht_bigsmp, "HP ProLiant DL760 G2",
34 { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
35 DMI_MATCH(DMI_BIOS_VERSION, "P44-"),}
36 },
37
38 { hp_ht_bigsmp, "HP ProLiant DL740",
39 { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
40 DMI_MATCH(DMI_BIOS_VERSION, "P47-"),}
41 },
42 { }
43};
44
45static void vector_allocation_domain(int cpu, cpumask_t *retmask)
46{
47 cpus_clear(*retmask);
48 cpu_set(cpu, *retmask);
49}
50
51static int probe_bigsmp(void)
52{
53 if (def_to_bigsmp)
54 dmi_bigsmp = 1;
55 else
56 dmi_check_system(bigsmp_dmi_table);
57 return dmi_bigsmp;
58}
59
60struct genapic apic_bigsmp = APIC_INIT("bigsmp", probe_bigsmp);
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
deleted file mode 100644
index e63a4a76d8cd..000000000000
--- a/arch/x86/mach-generic/default.c
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * Default generic APIC driver. This handles up to 8 CPUs.
3 */
4#define APIC_DEFINITION 1
5#include <linux/threads.h>
6#include <linux/cpumask.h>
7#include <asm/mpspec.h>
8#include <asm/mach-default/mach_apicdef.h>
9#include <asm/genapic.h>
10#include <asm/fixmap.h>
11#include <asm/apicdef.h>
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/smp.h>
15#include <linux/init.h>
16#include <asm/mach-default/mach_apic.h>
17#include <asm/mach-default/mach_ipi.h>
18#include <asm/mach-default/mach_mpparse.h>
19#include <asm/mach-default/mach_wakecpu.h>
20
21/* should be called last. */
22static int probe_default(void)
23{
24 return 1;
25}
26
27struct genapic apic_default = APIC_INIT("default", probe_default);
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
deleted file mode 100644
index c2ded1448024..000000000000
--- a/arch/x86/mach-generic/es7000.c
+++ /dev/null
@@ -1,103 +0,0 @@
1/*
2 * APIC driver for the Unisys ES7000 chipset.
3 */
4#define APIC_DEFINITION 1
5#include <linux/threads.h>
6#include <linux/cpumask.h>
7#include <asm/mpspec.h>
8#include <asm/genapic.h>
9#include <asm/fixmap.h>
10#include <asm/apicdef.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/init.h>
14#include <asm/es7000/apicdef.h>
15#include <linux/smp.h>
16#include <asm/es7000/apic.h>
17#include <asm/es7000/ipi.h>
18#include <asm/es7000/mpparse.h>
19#include <asm/mach-default/mach_wakecpu.h>
20
21void __init es7000_update_genapic_to_cluster(void)
22{
23 genapic->target_cpus = target_cpus_cluster;
24 genapic->int_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
25 genapic->int_dest_mode = INT_DEST_MODE_CLUSTER;
26 genapic->no_balance_irq = NO_BALANCE_IRQ_CLUSTER;
27
28 genapic->init_apic_ldr = init_apic_ldr_cluster;
29
30 genapic->cpu_mask_to_apicid = cpu_mask_to_apicid_cluster;
31}
32
33static int probe_es7000(void)
34{
35 /* probed later in mptable/ACPI hooks */
36 return 0;
37}
38
39extern void es7000_sw_apic(void);
40static void __init enable_apic_mode(void)
41{
42 es7000_sw_apic();
43 return;
44}
45
46static __init int
47mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
48{
49 if (mpc->oemptr) {
50 struct mpc_oemtable *oem_table =
51 (struct mpc_oemtable *)mpc->oemptr;
52 if (!strncmp(oem, "UNISYS", 6))
53 return parse_unisys_oem((char *)oem_table);
54 }
55 return 0;
56}
57
58#ifdef CONFIG_ACPI
59/* Hook from generic ACPI tables.c */
60static int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
61{
62 unsigned long oem_addr = 0;
63 int check_dsdt;
64 int ret = 0;
65
66 /* check dsdt at first to avoid clear fix_map for oem_addr */
67 check_dsdt = es7000_check_dsdt();
68
69 if (!find_unisys_acpi_oem_table(&oem_addr)) {
70 if (check_dsdt)
71 ret = parse_unisys_oem((char *)oem_addr);
72 else {
73 setup_unisys();
74 ret = 1;
75 }
76 /*
77 * we need to unmap it
78 */
79 unmap_unisys_acpi_oem_table(oem_addr);
80 }
81 return ret;
82}
83#else
84static int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
85{
86 return 0;
87}
88#endif
89
90static void vector_allocation_domain(int cpu, cpumask_t *retmask)
91{
92 /* Careful. Some cpus do not strictly honor the set of cpus
93 * specified in the interrupt destination when using lowest
94 * priority interrupt delivery mode.
95 *
96 * In particular there was a hyperthreading cpu observed to
97 * deliver interrupts to the wrong hyperthread when only one
98 * hyperthread was specified in the interrupt desitination.
99 */
100 *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
101}
102
103struct genapic __initdata_refok apic_es7000 = APIC_INIT("es7000", probe_es7000);
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c
deleted file mode 100644
index 3679e2255645..000000000000
--- a/arch/x86/mach-generic/numaq.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * APIC driver for the IBM NUMAQ chipset.
3 */
4#define APIC_DEFINITION 1
5#include <linux/threads.h>
6#include <linux/cpumask.h>
7#include <asm/mpspec.h>
8#include <asm/genapic.h>
9#include <asm/fixmap.h>
10#include <asm/apicdef.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/init.h>
14#include <asm/numaq/apicdef.h>
15#include <linux/smp.h>
16#include <asm/numaq/apic.h>
17#include <asm/numaq/ipi.h>
18#include <asm/numaq/mpparse.h>
19#include <asm/numaq/wakecpu.h>
20#include <asm/numaq.h>
21
22static int mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
23{
24 numaq_mps_oem_check(mpc, oem, productid);
25 return found_numaq;
26}
27
28static int probe_numaq(void)
29{
30 /* already know from get_memcfg_numaq() */
31 return found_numaq;
32}
33
34/* Hook from generic ACPI tables.c */
35static int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
36{
37 return 0;
38}
39
40static void vector_allocation_domain(int cpu, cpumask_t *retmask)
41{
42 /* Careful. Some cpus do not strictly honor the set of cpus
43 * specified in the interrupt destination when using lowest
44 * priority interrupt delivery mode.
45 *
46 * In particular there was a hyperthreading cpu observed to
47 * deliver interrupts to the wrong hyperthread when only one
48 * hyperthread was specified in the interrupt desitination.
49 */
50 *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
51}
52
53struct genapic apic_numaq = APIC_INIT("NUMAQ", probe_numaq);
diff --git a/arch/x86/mach-generic/probe.c b/arch/x86/mach-generic/probe.c
deleted file mode 100644
index 15a38daef1a8..000000000000
--- a/arch/x86/mach-generic/probe.c
+++ /dev/null
@@ -1,152 +0,0 @@
1/*
2 * Copyright 2003 Andi Kleen, SuSE Labs.
3 * Subject to the GNU Public License, v.2
4 *
5 * Generic x86 APIC driver probe layer.
6 */
7#include <linux/threads.h>
8#include <linux/cpumask.h>
9#include <linux/string.h>
10#include <linux/kernel.h>
11#include <linux/ctype.h>
12#include <linux/init.h>
13#include <linux/errno.h>
14#include <asm/fixmap.h>
15#include <asm/mpspec.h>
16#include <asm/apicdef.h>
17#include <asm/genapic.h>
18#include <asm/setup.h>
19
20extern struct genapic apic_numaq;
21extern struct genapic apic_summit;
22extern struct genapic apic_bigsmp;
23extern struct genapic apic_es7000;
24extern struct genapic apic_default;
25
26struct genapic *genapic = &apic_default;
27
28static struct genapic *apic_probe[] __initdata = {
29#ifdef CONFIG_X86_NUMAQ
30 &apic_numaq,
31#endif
32#ifdef CONFIG_X86_SUMMIT
33 &apic_summit,
34#endif
35#ifdef CONFIG_X86_BIGSMP
36 &apic_bigsmp,
37#endif
38#ifdef CONFIG_X86_ES7000
39 &apic_es7000,
40#endif
41 &apic_default, /* must be last */
42 NULL,
43};
44
45static int cmdline_apic __initdata;
46static int __init parse_apic(char *arg)
47{
48 int i;
49
50 if (!arg)
51 return -EINVAL;
52
53 for (i = 0; apic_probe[i]; i++) {
54 if (!strcmp(apic_probe[i]->name, arg)) {
55 genapic = apic_probe[i];
56 cmdline_apic = 1;
57 return 0;
58 }
59 }
60
61 if (x86_quirks->update_genapic)
62 x86_quirks->update_genapic();
63
64 /* Parsed again by __setup for debug/verbose */
65 return 0;
66}
67early_param("apic", parse_apic);
68
69void __init generic_bigsmp_probe(void)
70{
71#ifdef CONFIG_X86_BIGSMP
72 /*
73 * This routine is used to switch to bigsmp mode when
74 * - There is no apic= option specified by the user
75 * - generic_apic_probe() has chosen apic_default as the sub_arch
76 * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
77 */
78
79 if (!cmdline_apic && genapic == &apic_default) {
80 if (apic_bigsmp.probe()) {
81 genapic = &apic_bigsmp;
82 if (x86_quirks->update_genapic)
83 x86_quirks->update_genapic();
84 printk(KERN_INFO "Overriding APIC driver with %s\n",
85 genapic->name);
86 }
87 }
88#endif
89}
90
91void __init generic_apic_probe(void)
92{
93 if (!cmdline_apic) {
94 int i;
95 for (i = 0; apic_probe[i]; i++) {
96 if (apic_probe[i]->probe()) {
97 genapic = apic_probe[i];
98 break;
99 }
100 }
101 /* Not visible without early console */
102 if (!apic_probe[i])
103 panic("Didn't find an APIC driver");
104
105 if (x86_quirks->update_genapic)
106 x86_quirks->update_genapic();
107 }
108 printk(KERN_INFO "Using APIC driver %s\n", genapic->name);
109}
110
111/* These functions can switch the APIC even after the initial ->probe() */
112
113int __init mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
114{
115 int i;
116 for (i = 0; apic_probe[i]; ++i) {
117 if (apic_probe[i]->mps_oem_check(mpc, oem, productid)) {
118 if (!cmdline_apic) {
119 genapic = apic_probe[i];
120 if (x86_quirks->update_genapic)
121 x86_quirks->update_genapic();
122 printk(KERN_INFO "Switched to APIC driver `%s'.\n",
123 genapic->name);
124 }
125 return 1;
126 }
127 }
128 return 0;
129}
130
131int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
132{
133 int i;
134 for (i = 0; apic_probe[i]; ++i) {
135 if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) {
136 if (!cmdline_apic) {
137 genapic = apic_probe[i];
138 if (x86_quirks->update_genapic)
139 x86_quirks->update_genapic();
140 printk(KERN_INFO "Switched to APIC driver `%s'.\n",
141 genapic->name);
142 }
143 return 1;
144 }
145 }
146 return 0;
147}
148
149int hard_smp_processor_id(void)
150{
151 return genapic->get_apic_id(*(unsigned long *)(APIC_BASE+APIC_ID));
152}
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
deleted file mode 100644
index 2821ffc188b5..000000000000
--- a/arch/x86/mach-generic/summit.c
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * APIC driver for the IBM "Summit" chipset.
3 */
4#define APIC_DEFINITION 1
5#include <linux/threads.h>
6#include <linux/cpumask.h>
7#include <asm/mpspec.h>
8#include <asm/genapic.h>
9#include <asm/fixmap.h>
10#include <asm/apicdef.h>
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/init.h>
14#include <asm/summit/apicdef.h>
15#include <linux/smp.h>
16#include <asm/summit/apic.h>
17#include <asm/summit/ipi.h>
18#include <asm/summit/mpparse.h>
19#include <asm/mach-default/mach_wakecpu.h>
20
21static int probe_summit(void)
22{
23 /* probed later in mptable/ACPI hooks */
24 return 0;
25}
26
27static void vector_allocation_domain(int cpu, cpumask_t *retmask)
28{
29 /* Careful. Some cpus do not strictly honor the set of cpus
30 * specified in the interrupt destination when using lowest
31 * priority interrupt delivery mode.
32 *
33 * In particular there was a hyperthreading cpu observed to
34 * deliver interrupts to the wrong hyperthread when only one
35 * hyperthread was specified in the interrupt desitination.
36 */
37 *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
38}
39
40struct genapic apic_summit = APIC_INIT("summit", probe_summit);
diff --git a/arch/x86/mach-rdc321x/Makefile b/arch/x86/mach-rdc321x/Makefile
deleted file mode 100644
index 8325b4ca431c..000000000000
--- a/arch/x86/mach-rdc321x/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the RDC321x specific parts of the kernel
3#
4obj-$(CONFIG_X86_RDC321X) := gpio.o platform.o
5
diff --git a/arch/x86/mach-rdc321x/gpio.c b/arch/x86/mach-rdc321x/gpio.c
deleted file mode 100644
index 247f33d3a407..000000000000
--- a/arch/x86/mach-rdc321x/gpio.c
+++ /dev/null
@@ -1,194 +0,0 @@
1/*
2 * GPIO support for RDC SoC R3210/R8610
3 *
4 * Copyright (C) 2007, Florian Fainelli <florian@openwrt.org>
5 * Copyright (C) 2008, Volker Weiss <dev@tintuc.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 */
22
23
24#include <linux/spinlock.h>
25#include <linux/io.h>
26#include <linux/types.h>
27#include <linux/module.h>
28
29#include <asm/gpio.h>
30#include <asm/mach-rdc321x/rdc321x_defs.h>
31
32
33/* spin lock to protect our private copy of GPIO data register plus
34 the access to PCI conf registers. */
35static DEFINE_SPINLOCK(gpio_lock);
36
37/* copy of GPIO data registers */
38static u32 gpio_data_reg1;
39static u32 gpio_data_reg2;
40
41static u32 gpio_request_data[2];
42
43
44static inline void rdc321x_conf_write(unsigned addr, u32 value)
45{
46 outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
47 outl(value, RDC3210_CFGREG_DATA);
48}
49
50static inline void rdc321x_conf_or(unsigned addr, u32 value)
51{
52 outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
53 value |= inl(RDC3210_CFGREG_DATA);
54 outl(value, RDC3210_CFGREG_DATA);
55}
56
57static inline u32 rdc321x_conf_read(unsigned addr)
58{
59 outl((1 << 31) | (7 << 11) | addr, RDC3210_CFGREG_ADDR);
60
61 return inl(RDC3210_CFGREG_DATA);
62}
63
64/* configure pin as GPIO */
65static void rdc321x_configure_gpio(unsigned gpio)
66{
67 unsigned long flags;
68
69 spin_lock_irqsave(&gpio_lock, flags);
70 rdc321x_conf_or(gpio < 32
71 ? RDC321X_GPIO_CTRL_REG1 : RDC321X_GPIO_CTRL_REG2,
72 1 << (gpio & 0x1f));
73 spin_unlock_irqrestore(&gpio_lock, flags);
74}
75
76/* initially setup the 2 copies of the gpio data registers.
77 This function must be called by the platform setup code. */
78void __init rdc321x_gpio_setup()
79{
80 /* this might not be, what others (BIOS, bootloader, etc.)
81 wrote to these registers before, but it's a good guess. Still
82 better than just using 0xffffffff. */
83
84 gpio_data_reg1 = rdc321x_conf_read(RDC321X_GPIO_DATA_REG1);
85 gpio_data_reg2 = rdc321x_conf_read(RDC321X_GPIO_DATA_REG2);
86}
87
88/* determine, if gpio number is valid */
89static inline int rdc321x_is_gpio(unsigned gpio)
90{
91 return gpio <= RDC321X_MAX_GPIO;
92}
93
94/* request GPIO */
95int rdc_gpio_request(unsigned gpio, const char *label)
96{
97 unsigned long flags;
98
99 if (!rdc321x_is_gpio(gpio))
100 return -EINVAL;
101
102 spin_lock_irqsave(&gpio_lock, flags);
103 if (gpio_request_data[(gpio & 0x20) ? 1 : 0] & (1 << (gpio & 0x1f)))
104 goto inuse;
105 gpio_request_data[(gpio & 0x20) ? 1 : 0] |= (1 << (gpio & 0x1f));
106 spin_unlock_irqrestore(&gpio_lock, flags);
107
108 return 0;
109inuse:
110 spin_unlock_irqrestore(&gpio_lock, flags);
111 return -EINVAL;
112}
113EXPORT_SYMBOL(rdc_gpio_request);
114
115/* release previously-claimed GPIO */
116void rdc_gpio_free(unsigned gpio)
117{
118 unsigned long flags;
119
120 if (!rdc321x_is_gpio(gpio))
121 return;
122
123 spin_lock_irqsave(&gpio_lock, flags);
124 gpio_request_data[(gpio & 0x20) ? 1 : 0] &= ~(1 << (gpio & 0x1f));
125 spin_unlock_irqrestore(&gpio_lock, flags);
126}
127EXPORT_SYMBOL(rdc_gpio_free);
128
129/* read GPIO pin */
130int rdc_gpio_get_value(unsigned gpio)
131{
132 u32 reg;
133 unsigned long flags;
134
135 spin_lock_irqsave(&gpio_lock, flags);
136 reg = rdc321x_conf_read(gpio < 32
137 ? RDC321X_GPIO_DATA_REG1 : RDC321X_GPIO_DATA_REG2);
138 spin_unlock_irqrestore(&gpio_lock, flags);
139
140 return (1 << (gpio & 0x1f)) & reg ? 1 : 0;
141}
142EXPORT_SYMBOL(rdc_gpio_get_value);
143
144/* set GPIO pin to value */
145void rdc_gpio_set_value(unsigned gpio, int value)
146{
147 unsigned long flags;
148 u32 reg;
149
150 reg = 1 << (gpio & 0x1f);
151 if (gpio < 32) {
152 spin_lock_irqsave(&gpio_lock, flags);
153 if (value)
154 gpio_data_reg1 |= reg;
155 else
156 gpio_data_reg1 &= ~reg;
157 rdc321x_conf_write(RDC321X_GPIO_DATA_REG1, gpio_data_reg1);
158 spin_unlock_irqrestore(&gpio_lock, flags);
159 } else {
160 spin_lock_irqsave(&gpio_lock, flags);
161 if (value)
162 gpio_data_reg2 |= reg;
163 else
164 gpio_data_reg2 &= ~reg;
165 rdc321x_conf_write(RDC321X_GPIO_DATA_REG2, gpio_data_reg2);
166 spin_unlock_irqrestore(&gpio_lock, flags);
167 }
168}
169EXPORT_SYMBOL(rdc_gpio_set_value);
170
171/* configure GPIO pin as input */
172int rdc_gpio_direction_input(unsigned gpio)
173{
174 if (!rdc321x_is_gpio(gpio))
175 return -EINVAL;
176
177 rdc321x_configure_gpio(gpio);
178
179 return 0;
180}
181EXPORT_SYMBOL(rdc_gpio_direction_input);
182
183/* configure GPIO pin as output and set value */
184int rdc_gpio_direction_output(unsigned gpio, int value)
185{
186 if (!rdc321x_is_gpio(gpio))
187 return -EINVAL;
188
189 gpio_set_value(gpio, value);
190 rdc321x_configure_gpio(gpio);
191
192 return 0;
193}
194EXPORT_SYMBOL(rdc_gpio_direction_output);
diff --git a/arch/x86/mach-rdc321x/platform.c b/arch/x86/mach-rdc321x/platform.c
deleted file mode 100644
index 4f4e50c3ad3b..000000000000
--- a/arch/x86/mach-rdc321x/platform.c
+++ /dev/null
@@ -1,69 +0,0 @@
1/*
2 * Generic RDC321x platform devices
3 *
4 * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the
18 * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
19 * Boston, MA 02110-1301, USA.
20 *
21 */
22
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/list.h>
26#include <linux/device.h>
27#include <linux/platform_device.h>
28#include <linux/leds.h>
29
30#include <asm/gpio.h>
31
32/* LEDS */
33static struct gpio_led default_leds[] = {
34 { .name = "rdc:dmz", .gpio = 1, },
35};
36
37static struct gpio_led_platform_data rdc321x_led_data = {
38 .num_leds = ARRAY_SIZE(default_leds),
39 .leds = default_leds,
40};
41
42static struct platform_device rdc321x_leds = {
43 .name = "leds-gpio",
44 .id = -1,
45 .dev = {
46 .platform_data = &rdc321x_led_data,
47 }
48};
49
50/* Watchdog */
51static struct platform_device rdc321x_wdt = {
52 .name = "rdc321x-wdt",
53 .id = -1,
54 .num_resources = 0,
55};
56
57static struct platform_device *rdc321x_devs[] = {
58 &rdc321x_leds,
59 &rdc321x_wdt
60};
61
62static int __init rdc_board_setup(void)
63{
64 rdc321x_gpio_setup();
65
66 return platform_add_devices(rdc321x_devs, ARRAY_SIZE(rdc321x_devs));
67}
68
69arch_initcall(rdc_board_setup);
diff --git a/arch/x86/mach-voyager/Makefile b/arch/x86/mach-voyager/Makefile
deleted file mode 100644
index 15c250b371d3..000000000000
--- a/arch/x86/mach-voyager/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for the linux kernel.
3#
4
5EXTRA_CFLAGS := -Iarch/x86/kernel
6obj-y := setup.o voyager_basic.o voyager_thread.o
7
8obj-$(CONFIG_SMP) += voyager_smp.o voyager_cat.o
diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c
deleted file mode 100644
index 8e5118371f0f..000000000000
--- a/arch/x86/mach-voyager/setup.c
+++ /dev/null
@@ -1,118 +0,0 @@
1/*
2 * Machine specific setup for generic
3 */
4
5#include <linux/init.h>
6#include <linux/interrupt.h>
7#include <asm/arch_hooks.h>
8#include <asm/voyager.h>
9#include <asm/e820.h>
10#include <asm/io.h>
11#include <asm/setup.h>
12
13void __init pre_intr_init_hook(void)
14{
15 init_ISA_irqs();
16}
17
18/*
19 * IRQ2 is cascade interrupt to second interrupt controller
20 */
21static struct irqaction irq2 = {
22 .handler = no_action,
23 .mask = CPU_MASK_NONE,
24 .name = "cascade",
25};
26
27void __init intr_init_hook(void)
28{
29#ifdef CONFIG_SMP
30 voyager_smp_intr_init();
31#endif
32
33 setup_irq(2, &irq2);
34}
35
36static void voyager_disable_tsc(void)
37{
38 /* Voyagers run their CPUs from independent clocks, so disable
39 * the TSC code because we can't sync them */
40 setup_clear_cpu_cap(X86_FEATURE_TSC);
41}
42
43void __init pre_setup_arch_hook(void)
44{
45 voyager_disable_tsc();
46}
47
48void __init pre_time_init_hook(void)
49{
50 voyager_disable_tsc();
51}
52
53void __init trap_init_hook(void)
54{
55}
56
57static struct irqaction irq0 = {
58 .handler = timer_interrupt,
59 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
60 .mask = CPU_MASK_NONE,
61 .name = "timer"
62};
63
64void __init time_init_hook(void)
65{
66 irq0.mask = cpumask_of_cpu(safe_smp_processor_id());
67 setup_irq(0, &irq0);
68}
69
70/* Hook for machine specific memory setup. */
71
72char *__init machine_specific_memory_setup(void)
73{
74 char *who;
75 int new_nr;
76
77 who = "NOT VOYAGER";
78
79 if (voyager_level == 5) {
80 __u32 addr, length;
81 int i;
82
83 who = "Voyager-SUS";
84
85 e820.nr_map = 0;
86 for (i = 0; voyager_memory_detect(i, &addr, &length); i++) {
87 e820_add_region(addr, length, E820_RAM);
88 }
89 return who;
90 } else if (voyager_level == 4) {
91 __u32 tom;
92 __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8;
93 /* select the DINO config space */
94 outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT);
95 /* Read DINO top of memory register */
96 tom = ((inb(catbase + 0x4) & 0xf0) << 16)
97 + ((inb(catbase + 0x5) & 0x7f) << 24);
98
99 if (inb(catbase) != VOYAGER_DINO) {
100 printk(KERN_ERR
101 "Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n");
102 tom = (boot_params.screen_info.ext_mem_k) << 10;
103 }
104 who = "Voyager-TOM";
105 e820_add_region(0, 0x9f000, E820_RAM);
106 /* map from 1M to top of memory */
107 e820_add_region(1 * 1024 * 1024, tom - 1 * 1024 * 1024,
108 E820_RAM);
109 /* FIXME: Should check the ASICs to see if I need to
110 * take out the 8M window. Just do it at the moment
111 * */
112 e820_add_region(8 * 1024 * 1024, 8 * 1024 * 1024,
113 E820_RESERVED);
114 return who;
115 }
116
117 return default_machine_specific_memory_setup();
118}
diff --git a/arch/x86/mach-voyager/voyager_basic.c b/arch/x86/mach-voyager/voyager_basic.c
deleted file mode 100644
index 46d6f8067690..000000000000
--- a/arch/x86/mach-voyager/voyager_basic.c
+++ /dev/null
@@ -1,317 +0,0 @@
1/* Copyright (C) 1999,2001
2 *
3 * Author: J.E.J.Bottomley@HansenPartnership.com
4 *
5 * This file contains all the voyager specific routines for getting
6 * initialisation of the architecture to function. For additional
7 * features see:
8 *
9 * voyager_cat.c - Voyager CAT bus interface
10 * voyager_smp.c - Voyager SMP hal (emulates linux smp.c)
11 */
12
13#include <linux/module.h>
14#include <linux/types.h>
15#include <linux/sched.h>
16#include <linux/ptrace.h>
17#include <linux/ioport.h>
18#include <linux/interrupt.h>
19#include <linux/init.h>
20#include <linux/delay.h>
21#include <linux/reboot.h>
22#include <linux/sysrq.h>
23#include <linux/smp.h>
24#include <linux/nodemask.h>
25#include <asm/io.h>
26#include <asm/voyager.h>
27#include <asm/vic.h>
28#include <linux/pm.h>
29#include <asm/tlbflush.h>
30#include <asm/arch_hooks.h>
31#include <asm/i8253.h>
32
33/*
34 * Power off function, if any
35 */
36void (*pm_power_off) (void);
37EXPORT_SYMBOL(pm_power_off);
38
39int voyager_level = 0;
40
41struct voyager_SUS *voyager_SUS = NULL;
42
43#ifdef CONFIG_SMP
44static void voyager_dump(int dummy1, struct tty_struct *dummy3)
45{
46 /* get here via a sysrq */
47 voyager_smp_dump();
48}
49
50static struct sysrq_key_op sysrq_voyager_dump_op = {
51 .handler = voyager_dump,
52 .help_msg = "Voyager",
53 .action_msg = "Dump Voyager Status",
54};
55#endif
56
57void voyager_detect(struct voyager_bios_info *bios)
58{
59 if (bios->len != 0xff) {
60 int class = (bios->class_1 << 8)
61 | (bios->class_2 & 0xff);
62
63 printk("Voyager System detected.\n"
64 " Class %x, Revision %d.%d\n",
65 class, bios->major, bios->minor);
66 if (class == VOYAGER_LEVEL4)
67 voyager_level = 4;
68 else if (class < VOYAGER_LEVEL5_AND_ABOVE)
69 voyager_level = 3;
70 else
71 voyager_level = 5;
72 printk(" Architecture Level %d\n", voyager_level);
73 if (voyager_level < 4)
74 printk
75 ("\n**WARNING**: Voyager HAL only supports Levels 4 and 5 Architectures at the moment\n\n");
76 /* install the power off handler */
77 pm_power_off = voyager_power_off;
78#ifdef CONFIG_SMP
79 register_sysrq_key('v', &sysrq_voyager_dump_op);
80#endif
81 } else {
82 printk("\n\n**WARNING**: No Voyager Subsystem Found\n");
83 }
84}
85
86void voyager_system_interrupt(int cpl, void *dev_id)
87{
88 printk("Voyager: detected system interrupt\n");
89}
90
91/* Routine to read information from the extended CMOS area */
92__u8 voyager_extended_cmos_read(__u16 addr)
93{
94 outb(addr & 0xff, 0x74);
95 outb((addr >> 8) & 0xff, 0x75);
96 return inb(0x76);
97}
98
99/* internal definitions for the SUS Click Map of memory */
100
101#define CLICK_ENTRIES 16
102#define CLICK_SIZE 4096 /* click to byte conversion for Length */
103
104typedef struct ClickMap {
105 struct Entry {
106 __u32 Address;
107 __u32 Length;
108 } Entry[CLICK_ENTRIES];
109} ClickMap_t;
110
111/* This routine is pretty much an awful hack to read the bios clickmap by
112 * mapping it into page 0. There are usually three regions in the map:
113 * Base Memory
114 * Extended Memory
115 * zero length marker for end of map
116 *
117 * Returns are 0 for failure and 1 for success on extracting region.
118 */
119int __init voyager_memory_detect(int region, __u32 * start, __u32 * length)
120{
121 int i;
122 int retval = 0;
123 __u8 cmos[4];
124 ClickMap_t *map;
125 unsigned long map_addr;
126 unsigned long old;
127
128 if (region >= CLICK_ENTRIES) {
129 printk("Voyager: Illegal ClickMap region %d\n", region);
130 return 0;
131 }
132
133 for (i = 0; i < sizeof(cmos); i++)
134 cmos[i] =
135 voyager_extended_cmos_read(VOYAGER_MEMORY_CLICKMAP + i);
136
137 map_addr = *(unsigned long *)cmos;
138
139 /* steal page 0 for this */
140 old = pg0[0];
141 pg0[0] = ((map_addr & PAGE_MASK) | _PAGE_RW | _PAGE_PRESENT);
142 local_flush_tlb();
143 /* now clear everything out but page 0 */
144 map = (ClickMap_t *) (map_addr & (~PAGE_MASK));
145
146 /* zero length is the end of the clickmap */
147 if (map->Entry[region].Length != 0) {
148 *length = map->Entry[region].Length * CLICK_SIZE;
149 *start = map->Entry[region].Address;
150 retval = 1;
151 }
152
153 /* replace the mapping */
154 pg0[0] = old;
155 local_flush_tlb();
156 return retval;
157}
158
159/* voyager specific handling code for timer interrupts. Used to hand
160 * off the timer tick to the SMP code, since the VIC doesn't have an
161 * internal timer (The QIC does, but that's another story). */
162void voyager_timer_interrupt(void)
163{
164 if ((jiffies & 0x3ff) == 0) {
165
166 /* There seems to be something flaky in either
167 * hardware or software that is resetting the timer 0
168 * count to something much higher than it should be
169 * This seems to occur in the boot sequence, just
170 * before root is mounted. Therefore, every 10
171 * seconds or so, we sanity check the timer zero count
172 * and kick it back to where it should be.
173 *
174 * FIXME: This is the most awful hack yet seen. I
175 * should work out exactly what is interfering with
176 * the timer count settings early in the boot sequence
177 * and swiftly introduce it to something sharp and
178 * pointy. */
179 __u16 val;
180
181 spin_lock(&i8253_lock);
182
183 outb_p(0x00, 0x43);
184 val = inb_p(0x40);
185 val |= inb(0x40) << 8;
186 spin_unlock(&i8253_lock);
187
188 if (val > LATCH) {
189 printk
190 ("\nVOYAGER: countdown timer value too high (%d), resetting\n\n",
191 val);
192 spin_lock(&i8253_lock);
193 outb(0x34, 0x43);
194 outb_p(LATCH & 0xff, 0x40); /* LSB */
195 outb(LATCH >> 8, 0x40); /* MSB */
196 spin_unlock(&i8253_lock);
197 }
198 }
199#ifdef CONFIG_SMP
200 smp_vic_timer_interrupt();
201#endif
202}
203
204void voyager_power_off(void)
205{
206 printk("VOYAGER Power Off\n");
207
208 if (voyager_level == 5) {
209 voyager_cat_power_off();
210 } else if (voyager_level == 4) {
211 /* This doesn't apparently work on most L4 machines,
212 * but the specs say to do this to get automatic power
213 * off. Unfortunately, if it doesn't power off the
214 * machine, it ends up doing a cold restart, which
215 * isn't really intended, so comment out the code */
216#if 0
217 int port;
218
219 /* enable the voyager Configuration Space */
220 outb((inb(VOYAGER_MC_SETUP) & 0xf0) | 0x8, VOYAGER_MC_SETUP);
221 /* the port for the power off flag is an offset from the
222 floating base */
223 port = (inb(VOYAGER_SSPB_RELOCATION_PORT) << 8) + 0x21;
224 /* set the power off flag */
225 outb(inb(port) | 0x1, port);
226#endif
227 }
228 /* and wait for it to happen */
229 local_irq_disable();
230 for (;;)
231 halt();
232}
233
234/* copied from process.c */
235static inline void kb_wait(void)
236{
237 int i;
238
239 for (i = 0; i < 0x10000; i++)
240 if ((inb_p(0x64) & 0x02) == 0)
241 break;
242}
243
244void machine_shutdown(void)
245{
246 /* Architecture specific shutdown needed before a kexec */
247}
248
249void machine_restart(char *cmd)
250{
251 printk("Voyager Warm Restart\n");
252 kb_wait();
253
254 if (voyager_level == 5) {
255 /* write magic values to the RTC to inform system that
256 * shutdown is beginning */
257 outb(0x8f, 0x70);
258 outb(0x5, 0x71);
259
260 udelay(50);
261 outb(0xfe, 0x64); /* pull reset low */
262 } else if (voyager_level == 4) {
263 __u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8;
264 __u8 basebd = inb(VOYAGER_MC_SETUP);
265
266 outb(basebd | 0x08, VOYAGER_MC_SETUP);
267 outb(0x02, catbase + 0x21);
268 }
269 local_irq_disable();
270 for (;;)
271 halt();
272}
273
274void machine_emergency_restart(void)
275{
276 /*for now, just hook this to a warm restart */
277 machine_restart(NULL);
278}
279
280void mca_nmi_hook(void)
281{
282 __u8 dumpval __maybe_unused = inb(0xf823);
283 __u8 swnmi __maybe_unused = inb(0xf813);
284
285 /* FIXME: assume dump switch pressed */
286 /* check to see if the dump switch was pressed */
287 VDEBUG(("VOYAGER: dumpval = 0x%x, swnmi = 0x%x\n", dumpval, swnmi));
288 /* clear swnmi */
289 outb(0xff, 0xf813);
290 /* tell SUS to ignore dump */
291 if (voyager_level == 5 && voyager_SUS != NULL) {
292 if (voyager_SUS->SUS_mbox == VOYAGER_DUMP_BUTTON_NMI) {
293 voyager_SUS->kernel_mbox = VOYAGER_NO_COMMAND;
294 voyager_SUS->kernel_flags |= VOYAGER_OS_IN_PROGRESS;
295 udelay(1000);
296 voyager_SUS->kernel_mbox = VOYAGER_IGNORE_DUMP;
297 voyager_SUS->kernel_flags &= ~VOYAGER_OS_IN_PROGRESS;
298 }
299 }
300 printk(KERN_ERR
301 "VOYAGER: Dump switch pressed, printing CPU%d tracebacks\n",
302 smp_processor_id());
303 show_stack(NULL, NULL);
304 show_state();
305}
306
307void machine_halt(void)
308{
309 /* treat a halt like a power off */
310 machine_power_off();
311}
312
313void machine_power_off(void)
314{
315 if (pm_power_off)
316 pm_power_off();
317}
diff --git a/arch/x86/mach-voyager/voyager_cat.c b/arch/x86/mach-voyager/voyager_cat.c
deleted file mode 100644
index 2ad598c104af..000000000000
--- a/arch/x86/mach-voyager/voyager_cat.c
+++ /dev/null
@@ -1,1197 +0,0 @@
1/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Copyright (C) 1999,2001
4 *
5 * Author: J.E.J.Bottomley@HansenPartnership.com
6 *
7 * This file contains all the logic for manipulating the CAT bus
8 * in a level 5 machine.
9 *
10 * The CAT bus is a serial configuration and test bus. Its primary
11 * uses are to probe the initial configuration of the system and to
12 * diagnose error conditions when a system interrupt occurs. The low
13 * level interface is fairly primitive, so most of this file consists
14 * of bit shift manipulations to send and receive packets on the
15 * serial bus */
16
17#include <linux/types.h>
18#include <linux/completion.h>
19#include <linux/sched.h>
20#include <asm/voyager.h>
21#include <asm/vic.h>
22#include <linux/ioport.h>
23#include <linux/init.h>
24#include <linux/slab.h>
25#include <linux/delay.h>
26#include <asm/io.h>
27
28#ifdef VOYAGER_CAT_DEBUG
29#define CDEBUG(x) printk x
30#else
31#define CDEBUG(x)
32#endif
33
34/* the CAT command port */
35#define CAT_CMD (sspb + 0xe)
36/* the CAT data port */
37#define CAT_DATA (sspb + 0xd)
38
39/* the internal cat functions */
40static void cat_pack(__u8 * msg, __u16 start_bit, __u8 * data, __u16 num_bits);
41static void cat_unpack(__u8 * msg, __u16 start_bit, __u8 * data,
42 __u16 num_bits);
43static void cat_build_header(__u8 * header, const __u16 len,
44 const __u16 smallest_reg_bits,
45 const __u16 longest_reg_bits);
46static int cat_sendinst(voyager_module_t * modp, voyager_asic_t * asicp,
47 __u8 reg, __u8 op);
48static int cat_getdata(voyager_module_t * modp, voyager_asic_t * asicp,
49 __u8 reg, __u8 * value);
50static int cat_shiftout(__u8 * data, __u16 data_bytes, __u16 header_bytes,
51 __u8 pad_bits);
52static int cat_write(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
53 __u8 value);
54static int cat_read(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
55 __u8 * value);
56static int cat_subread(voyager_module_t * modp, voyager_asic_t * asicp,
57 __u16 offset, __u16 len, void *buf);
58static int cat_senddata(voyager_module_t * modp, voyager_asic_t * asicp,
59 __u8 reg, __u8 value);
60static int cat_disconnect(voyager_module_t * modp, voyager_asic_t * asicp);
61static int cat_connect(voyager_module_t * modp, voyager_asic_t * asicp);
62
63static inline const char *cat_module_name(int module_id)
64{
65 switch (module_id) {
66 case 0x10:
67 return "Processor Slot 0";
68 case 0x11:
69 return "Processor Slot 1";
70 case 0x12:
71 return "Processor Slot 2";
72 case 0x13:
73 return "Processor Slot 4";
74 case 0x14:
75 return "Memory Slot 0";
76 case 0x15:
77 return "Memory Slot 1";
78 case 0x18:
79 return "Primary Microchannel";
80 case 0x19:
81 return "Secondary Microchannel";
82 case 0x1a:
83 return "Power Supply Interface";
84 case 0x1c:
85 return "Processor Slot 5";
86 case 0x1d:
87 return "Processor Slot 6";
88 case 0x1e:
89 return "Processor Slot 7";
90 case 0x1f:
91 return "Processor Slot 8";
92 default:
93 return "Unknown Module";
94 }
95}
96
97static int sspb = 0; /* stores the super port location */
98int voyager_8slot = 0; /* set to true if a 51xx monster */
99
100voyager_module_t *voyager_cat_list;
101
102/* the I/O port assignments for the VIC and QIC */
103static struct resource vic_res = {
104 .name = "Voyager Interrupt Controller",
105 .start = 0xFC00,
106 .end = 0xFC6F
107};
108static struct resource qic_res = {
109 .name = "Quad Interrupt Controller",
110 .start = 0xFC70,
111 .end = 0xFCFF
112};
113
114/* This function is used to pack a data bit stream inside a message.
115 * It writes num_bits of the data buffer in msg starting at start_bit.
116 * Note: This function assumes that any unused bit in the data stream
117 * is set to zero so that the ors will work correctly */
118static void
119cat_pack(__u8 * msg, const __u16 start_bit, __u8 * data, const __u16 num_bits)
120{
121 /* compute initial shift needed */
122 const __u16 offset = start_bit % BITS_PER_BYTE;
123 __u16 len = num_bits / BITS_PER_BYTE;
124 __u16 byte = start_bit / BITS_PER_BYTE;
125 __u16 residue = (num_bits % BITS_PER_BYTE) + offset;
126 int i;
127
128 /* adjust if we have more than a byte of residue */
129 if (residue >= BITS_PER_BYTE) {
130 residue -= BITS_PER_BYTE;
131 len++;
132 }
133
134 /* clear out the bits. We assume here that if len==0 then
135 * residue >= offset. This is always true for the catbus
136 * operations */
137 msg[byte] &= 0xff << (BITS_PER_BYTE - offset);
138 msg[byte++] |= data[0] >> offset;
139 if (len == 0)
140 return;
141 for (i = 1; i < len; i++)
142 msg[byte++] = (data[i - 1] << (BITS_PER_BYTE - offset))
143 | (data[i] >> offset);
144 if (residue != 0) {
145 __u8 mask = 0xff >> residue;
146 __u8 last_byte = data[i - 1] << (BITS_PER_BYTE - offset)
147 | (data[i] >> offset);
148
149 last_byte &= ~mask;
150 msg[byte] &= mask;
151 msg[byte] |= last_byte;
152 }
153 return;
154}
155
156/* unpack the data again (same arguments as cat_pack()). data buffer
157 * must be zero populated.
158 *
159 * Function: given a message string move to start_bit and copy num_bits into
160 * data (starting at bit 0 in data).
161 */
162static void
163cat_unpack(__u8 * msg, const __u16 start_bit, __u8 * data, const __u16 num_bits)
164{
165 /* compute initial shift needed */
166 const __u16 offset = start_bit % BITS_PER_BYTE;
167 __u16 len = num_bits / BITS_PER_BYTE;
168 const __u8 last_bits = num_bits % BITS_PER_BYTE;
169 __u16 byte = start_bit / BITS_PER_BYTE;
170 int i;
171
172 if (last_bits != 0)
173 len++;
174
175 /* special case: want < 8 bits from msg and we can get it from
176 * a single byte of the msg */
177 if (len == 0 && BITS_PER_BYTE - offset >= num_bits) {
178 data[0] = msg[byte] << offset;
179 data[0] &= 0xff >> (BITS_PER_BYTE - num_bits);
180 return;
181 }
182 for (i = 0; i < len; i++) {
183 /* this annoying if has to be done just in case a read of
184 * msg one beyond the array causes a panic */
185 if (offset != 0) {
186 data[i] = msg[byte++] << offset;
187 data[i] |= msg[byte] >> (BITS_PER_BYTE - offset);
188 } else {
189 data[i] = msg[byte++];
190 }
191 }
192 /* do we need to truncate the final byte */
193 if (last_bits != 0) {
194 data[i - 1] &= 0xff << (BITS_PER_BYTE - last_bits);
195 }
196 return;
197}
198
199static void
200cat_build_header(__u8 * header, const __u16 len, const __u16 smallest_reg_bits,
201 const __u16 longest_reg_bits)
202{
203 int i;
204 __u16 start_bit = (smallest_reg_bits - 1) % BITS_PER_BYTE;
205 __u8 *last_byte = &header[len - 1];
206
207 if (start_bit == 0)
208 start_bit = 1; /* must have at least one bit in the hdr */
209
210 for (i = 0; i < len; i++)
211 header[i] = 0;
212
213 for (i = start_bit; i > 0; i--)
214 *last_byte = ((*last_byte) << 1) + 1;
215
216}
217
218static int
219cat_sendinst(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, __u8 op)
220{
221 __u8 parity, inst, inst_buf[4] = { 0 };
222 __u8 iseq[VOYAGER_MAX_SCAN_PATH], hseq[VOYAGER_MAX_REG_SIZE];
223 __u16 ibytes, hbytes, padbits;
224 int i;
225
226 /*
227 * Parity is the parity of the register number + 1 (READ_REGISTER
228 * and WRITE_REGISTER always add '1' to the number of bits == 1)
229 */
230 parity = (__u8) (1 + (reg & 0x01) +
231 ((__u8) (reg & 0x02) >> 1) +
232 ((__u8) (reg & 0x04) >> 2) +
233 ((__u8) (reg & 0x08) >> 3)) % 2;
234
235 inst = ((parity << 7) | (reg << 2) | op);
236
237 outb(VOYAGER_CAT_IRCYC, CAT_CMD);
238 if (!modp->scan_path_connected) {
239 if (asicp->asic_id != VOYAGER_CAT_ID) {
240 printk
241 ("**WARNING***: cat_sendinst has disconnected scan path not to CAT asic\n");
242 return 1;
243 }
244 outb(VOYAGER_CAT_HEADER, CAT_DATA);
245 outb(inst, CAT_DATA);
246 if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
247 CDEBUG(("VOYAGER CAT: cat_sendinst failed to get CAT_HEADER\n"));
248 return 1;
249 }
250 return 0;
251 }
252 ibytes = modp->inst_bits / BITS_PER_BYTE;
253 if ((padbits = modp->inst_bits % BITS_PER_BYTE) != 0) {
254 padbits = BITS_PER_BYTE - padbits;
255 ibytes++;
256 }
257 hbytes = modp->largest_reg / BITS_PER_BYTE;
258 if (modp->largest_reg % BITS_PER_BYTE)
259 hbytes++;
260 CDEBUG(("cat_sendinst: ibytes=%d, hbytes=%d\n", ibytes, hbytes));
261 /* initialise the instruction sequence to 0xff */
262 for (i = 0; i < ibytes + hbytes; i++)
263 iseq[i] = 0xff;
264 cat_build_header(hseq, hbytes, modp->smallest_reg, modp->largest_reg);
265 cat_pack(iseq, modp->inst_bits, hseq, hbytes * BITS_PER_BYTE);
266 inst_buf[0] = inst;
267 inst_buf[1] = 0xFF >> (modp->largest_reg % BITS_PER_BYTE);
268 cat_pack(iseq, asicp->bit_location, inst_buf, asicp->ireg_length);
269#ifdef VOYAGER_CAT_DEBUG
270 printk("ins = 0x%x, iseq: ", inst);
271 for (i = 0; i < ibytes + hbytes; i++)
272 printk("0x%x ", iseq[i]);
273 printk("\n");
274#endif
275 if (cat_shiftout(iseq, ibytes, hbytes, padbits)) {
276 CDEBUG(("VOYAGER CAT: cat_sendinst: cat_shiftout failed\n"));
277 return 1;
278 }
279 CDEBUG(("CAT SHIFTOUT DONE\n"));
280 return 0;
281}
282
283static int
284cat_getdata(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
285 __u8 * value)
286{
287 if (!modp->scan_path_connected) {
288 if (asicp->asic_id != VOYAGER_CAT_ID) {
289 CDEBUG(("VOYAGER CAT: ERROR: cat_getdata to CAT asic with scan path connected\n"));
290 return 1;
291 }
292 if (reg > VOYAGER_SUBADDRHI)
293 outb(VOYAGER_CAT_RUN, CAT_CMD);
294 outb(VOYAGER_CAT_DRCYC, CAT_CMD);
295 outb(VOYAGER_CAT_HEADER, CAT_DATA);
296 *value = inb(CAT_DATA);
297 outb(0xAA, CAT_DATA);
298 if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
299 CDEBUG(("cat_getdata: failed to get VOYAGER_CAT_HEADER\n"));
300 return 1;
301 }
302 return 0;
303 } else {
304 __u16 sbits = modp->num_asics - 1 + asicp->ireg_length;
305 __u16 sbytes = sbits / BITS_PER_BYTE;
306 __u16 tbytes;
307 __u8 string[VOYAGER_MAX_SCAN_PATH],
308 trailer[VOYAGER_MAX_REG_SIZE];
309 __u8 padbits;
310 int i;
311
312 outb(VOYAGER_CAT_DRCYC, CAT_CMD);
313
314 if ((padbits = sbits % BITS_PER_BYTE) != 0) {
315 padbits = BITS_PER_BYTE - padbits;
316 sbytes++;
317 }
318 tbytes = asicp->ireg_length / BITS_PER_BYTE;
319 if (asicp->ireg_length % BITS_PER_BYTE)
320 tbytes++;
321 CDEBUG(("cat_getdata: tbytes = %d, sbytes = %d, padbits = %d\n",
322 tbytes, sbytes, padbits));
323 cat_build_header(trailer, tbytes, 1, asicp->ireg_length);
324
325 for (i = tbytes - 1; i >= 0; i--) {
326 outb(trailer[i], CAT_DATA);
327 string[sbytes + i] = inb(CAT_DATA);
328 }
329
330 for (i = sbytes - 1; i >= 0; i--) {
331 outb(0xaa, CAT_DATA);
332 string[i] = inb(CAT_DATA);
333 }
334 *value = 0;
335 cat_unpack(string,
336 padbits + (tbytes * BITS_PER_BYTE) +
337 asicp->asic_location, value, asicp->ireg_length);
338#ifdef VOYAGER_CAT_DEBUG
339 printk("value=0x%x, string: ", *value);
340 for (i = 0; i < tbytes + sbytes; i++)
341 printk("0x%x ", string[i]);
342 printk("\n");
343#endif
344
345 /* sanity check the rest of the return */
346 for (i = 0; i < tbytes; i++) {
347 __u8 input = 0;
348
349 cat_unpack(string, padbits + (i * BITS_PER_BYTE),
350 &input, BITS_PER_BYTE);
351 if (trailer[i] != input) {
352 CDEBUG(("cat_getdata: failed to sanity check rest of ret(%d) 0x%x != 0x%x\n", i, input, trailer[i]));
353 return 1;
354 }
355 }
356 CDEBUG(("cat_getdata DONE\n"));
357 return 0;
358 }
359}
360
361static int
362cat_shiftout(__u8 * data, __u16 data_bytes, __u16 header_bytes, __u8 pad_bits)
363{
364 int i;
365
366 for (i = data_bytes + header_bytes - 1; i >= header_bytes; i--)
367 outb(data[i], CAT_DATA);
368
369 for (i = header_bytes - 1; i >= 0; i--) {
370 __u8 header = 0;
371 __u8 input;
372
373 outb(data[i], CAT_DATA);
374 input = inb(CAT_DATA);
375 CDEBUG(("cat_shiftout: returned 0x%x\n", input));
376 cat_unpack(data, ((data_bytes + i) * BITS_PER_BYTE) - pad_bits,
377 &header, BITS_PER_BYTE);
378 if (input != header) {
379 CDEBUG(("VOYAGER CAT: cat_shiftout failed to return header 0x%x != 0x%x\n", input, header));
380 return 1;
381 }
382 }
383 return 0;
384}
385
386static int
387cat_senddata(voyager_module_t * modp, voyager_asic_t * asicp,
388 __u8 reg, __u8 value)
389{
390 outb(VOYAGER_CAT_DRCYC, CAT_CMD);
391 if (!modp->scan_path_connected) {
392 if (asicp->asic_id != VOYAGER_CAT_ID) {
393 CDEBUG(("VOYAGER CAT: ERROR: scan path disconnected when asic != CAT\n"));
394 return 1;
395 }
396 outb(VOYAGER_CAT_HEADER, CAT_DATA);
397 outb(value, CAT_DATA);
398 if (inb(CAT_DATA) != VOYAGER_CAT_HEADER) {
399 CDEBUG(("cat_senddata: failed to get correct header response to sent data\n"));
400 return 1;
401 }
402 if (reg > VOYAGER_SUBADDRHI) {
403 outb(VOYAGER_CAT_RUN, CAT_CMD);
404 outb(VOYAGER_CAT_END, CAT_CMD);
405 outb(VOYAGER_CAT_RUN, CAT_CMD);
406 }
407
408 return 0;
409 } else {
410 __u16 hbytes = asicp->ireg_length / BITS_PER_BYTE;
411 __u16 dbytes =
412 (modp->num_asics - 1 + asicp->ireg_length) / BITS_PER_BYTE;
413 __u8 padbits, dseq[VOYAGER_MAX_SCAN_PATH],
414 hseq[VOYAGER_MAX_REG_SIZE];
415 int i;
416
417 if ((padbits = (modp->num_asics - 1
418 + asicp->ireg_length) % BITS_PER_BYTE) != 0) {
419 padbits = BITS_PER_BYTE - padbits;
420 dbytes++;
421 }
422 if (asicp->ireg_length % BITS_PER_BYTE)
423 hbytes++;
424
425 cat_build_header(hseq, hbytes, 1, asicp->ireg_length);
426
427 for (i = 0; i < dbytes + hbytes; i++)
428 dseq[i] = 0xff;
429 CDEBUG(("cat_senddata: dbytes=%d, hbytes=%d, padbits=%d\n",
430 dbytes, hbytes, padbits));
431 cat_pack(dseq, modp->num_asics - 1 + asicp->ireg_length,
432 hseq, hbytes * BITS_PER_BYTE);
433 cat_pack(dseq, asicp->asic_location, &value,
434 asicp->ireg_length);
435#ifdef VOYAGER_CAT_DEBUG
436 printk("dseq ");
437 for (i = 0; i < hbytes + dbytes; i++) {
438 printk("0x%x ", dseq[i]);
439 }
440 printk("\n");
441#endif
442 return cat_shiftout(dseq, dbytes, hbytes, padbits);
443 }
444}
445
446static int
447cat_write(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg, __u8 value)
448{
449 if (cat_sendinst(modp, asicp, reg, VOYAGER_WRITE_CONFIG))
450 return 1;
451 return cat_senddata(modp, asicp, reg, value);
452}
453
454static int
455cat_read(voyager_module_t * modp, voyager_asic_t * asicp, __u8 reg,
456 __u8 * value)
457{
458 if (cat_sendinst(modp, asicp, reg, VOYAGER_READ_CONFIG))
459 return 1;
460 return cat_getdata(modp, asicp, reg, value);
461}
462
463static int
464cat_subaddrsetup(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset,
465 __u16 len)
466{
467 __u8 val;
468
469 if (len > 1) {
470 /* set auto increment */
471 __u8 newval;
472
473 if (cat_read(modp, asicp, VOYAGER_AUTO_INC_REG, &val)) {
474 CDEBUG(("cat_subaddrsetup: read of VOYAGER_AUTO_INC_REG failed\n"));
475 return 1;
476 }
477 CDEBUG(("cat_subaddrsetup: VOYAGER_AUTO_INC_REG = 0x%x\n",
478 val));
479 newval = val | VOYAGER_AUTO_INC;
480 if (newval != val) {
481 if (cat_write(modp, asicp, VOYAGER_AUTO_INC_REG, val)) {
482 CDEBUG(("cat_subaddrsetup: write to VOYAGER_AUTO_INC_REG failed\n"));
483 return 1;
484 }
485 }
486 }
487 if (cat_write(modp, asicp, VOYAGER_SUBADDRLO, (__u8) (offset & 0xff))) {
488 CDEBUG(("cat_subaddrsetup: write to SUBADDRLO failed\n"));
489 return 1;
490 }
491 if (asicp->subaddr > VOYAGER_SUBADDR_LO) {
492 if (cat_write
493 (modp, asicp, VOYAGER_SUBADDRHI, (__u8) (offset >> 8))) {
494 CDEBUG(("cat_subaddrsetup: write to SUBADDRHI failed\n"));
495 return 1;
496 }
497 cat_read(modp, asicp, VOYAGER_SUBADDRHI, &val);
498 CDEBUG(("cat_subaddrsetup: offset = %d, hi = %d\n", offset,
499 val));
500 }
501 cat_read(modp, asicp, VOYAGER_SUBADDRLO, &val);
502 CDEBUG(("cat_subaddrsetup: offset = %d, lo = %d\n", offset, val));
503 return 0;
504}
505
506static int
507cat_subwrite(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset,
508 __u16 len, void *buf)
509{
510 int i, retval;
511
512 /* FIXME: need special actions for VOYAGER_CAT_ID here */
513 if (asicp->asic_id == VOYAGER_CAT_ID) {
514 CDEBUG(("cat_subwrite: ATTEMPT TO WRITE TO CAT ASIC\n"));
515 /* FIXME -- This is supposed to be handled better
516 * There is a problem writing to the cat asic in the
517 * PSI. The 30us delay seems to work, though */
518 udelay(30);
519 }
520
521 if ((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) {
522 printk("cat_subwrite: cat_subaddrsetup FAILED\n");
523 return retval;
524 }
525
526 if (cat_sendinst
527 (modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_WRITE_CONFIG)) {
528 printk("cat_subwrite: cat_sendinst FAILED\n");
529 return 1;
530 }
531 for (i = 0; i < len; i++) {
532 if (cat_senddata(modp, asicp, 0xFF, ((__u8 *) buf)[i])) {
533 printk
534 ("cat_subwrite: cat_sendata element at %d FAILED\n",
535 i);
536 return 1;
537 }
538 }
539 return 0;
540}
541static int
542cat_subread(voyager_module_t * modp, voyager_asic_t * asicp, __u16 offset,
543 __u16 len, void *buf)
544{
545 int i, retval;
546
547 if ((retval = cat_subaddrsetup(modp, asicp, offset, len)) != 0) {
548 CDEBUG(("cat_subread: cat_subaddrsetup FAILED\n"));
549 return retval;
550 }
551
552 if (cat_sendinst(modp, asicp, VOYAGER_SUBADDRDATA, VOYAGER_READ_CONFIG)) {
553 CDEBUG(("cat_subread: cat_sendinst failed\n"));
554 return 1;
555 }
556 for (i = 0; i < len; i++) {
557 if (cat_getdata(modp, asicp, 0xFF, &((__u8 *) buf)[i])) {
558 CDEBUG(("cat_subread: cat_getdata element %d failed\n",
559 i));
560 return 1;
561 }
562 }
563 return 0;
564}
565
566/* buffer for storing EPROM data read in during initialisation */
567static __initdata __u8 eprom_buf[0xFFFF];
568static voyager_module_t *voyager_initial_module;
569
570/* Initialise the cat bus components. We assume this is called by the
571 * boot cpu *after* all memory initialisation has been done (so we can
572 * use kmalloc) but before smp initialisation, so we can probe the SMP
573 * configuration and pick up necessary information. */
574void __init voyager_cat_init(void)
575{
576 voyager_module_t **modpp = &voyager_initial_module;
577 voyager_asic_t **asicpp;
578 voyager_asic_t *qabc_asic = NULL;
579 int i, j;
580 unsigned long qic_addr = 0;
581 __u8 qabc_data[0x20];
582 __u8 num_submodules, val;
583 voyager_eprom_hdr_t *eprom_hdr = (voyager_eprom_hdr_t *) & eprom_buf[0];
584
585 __u8 cmos[4];
586 unsigned long addr;
587
588 /* initiallise the SUS mailbox */
589 for (i = 0; i < sizeof(cmos); i++)
590 cmos[i] = voyager_extended_cmos_read(VOYAGER_DUMP_LOCATION + i);
591 addr = *(unsigned long *)cmos;
592 if ((addr & 0xff000000) != 0xff000000) {
593 printk(KERN_ERR
594 "Voyager failed to get SUS mailbox (addr = 0x%lx\n",
595 addr);
596 } else {
597 static struct resource res;
598
599 res.name = "voyager SUS";
600 res.start = addr;
601 res.end = addr + 0x3ff;
602
603 request_resource(&iomem_resource, &res);
604 voyager_SUS = (struct voyager_SUS *)
605 ioremap(addr, 0x400);
606 printk(KERN_NOTICE "Voyager SUS mailbox version 0x%x\n",
607 voyager_SUS->SUS_version);
608 voyager_SUS->kernel_version = VOYAGER_MAILBOX_VERSION;
609 voyager_SUS->kernel_flags = VOYAGER_OS_HAS_SYSINT;
610 }
611
612 /* clear the processor counts */
613 voyager_extended_vic_processors = 0;
614 voyager_quad_processors = 0;
615
616 printk("VOYAGER: beginning CAT bus probe\n");
617 /* set up the SuperSet Port Block which tells us where the
618 * CAT communication port is */
619 sspb = inb(VOYAGER_SSPB_RELOCATION_PORT) * 0x100;
620 VDEBUG(("VOYAGER DEBUG: sspb = 0x%x\n", sspb));
621
622 /* now find out if were 8 slot or normal */
623 if ((inb(VIC_PROC_WHO_AM_I) & EIGHT_SLOT_IDENTIFIER)
624 == EIGHT_SLOT_IDENTIFIER) {
625 voyager_8slot = 1;
626 printk(KERN_NOTICE
627 "Voyager: Eight slot 51xx configuration detected\n");
628 }
629
630 for (i = VOYAGER_MIN_MODULE; i <= VOYAGER_MAX_MODULE; i++) {
631 __u8 input;
632 int asic;
633 __u16 eprom_size;
634 __u16 sp_offset;
635
636 outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT);
637 outb(i, VOYAGER_CAT_CONFIG_PORT);
638
639 /* check the presence of the module */
640 outb(VOYAGER_CAT_RUN, CAT_CMD);
641 outb(VOYAGER_CAT_IRCYC, CAT_CMD);
642 outb(VOYAGER_CAT_HEADER, CAT_DATA);
643 /* stream series of alternating 1's and 0's to stimulate
644 * response */
645 outb(0xAA, CAT_DATA);
646 input = inb(CAT_DATA);
647 outb(VOYAGER_CAT_END, CAT_CMD);
648 if (input != VOYAGER_CAT_HEADER) {
649 continue;
650 }
651 CDEBUG(("VOYAGER DEBUG: found module id 0x%x, %s\n", i,
652 cat_module_name(i)));
653 *modpp = kmalloc(sizeof(voyager_module_t), GFP_KERNEL); /*&voyager_module_storage[cat_count++]; */
654 if (*modpp == NULL) {
655 printk("**WARNING** kmalloc failure in cat_init\n");
656 continue;
657 }
658 memset(*modpp, 0, sizeof(voyager_module_t));
659 /* need temporary asic for cat_subread. It will be
660 * filled in correctly later */
661 (*modpp)->asic = kmalloc(sizeof(voyager_asic_t), GFP_KERNEL); /*&voyager_asic_storage[asic_count]; */
662 if ((*modpp)->asic == NULL) {
663 printk("**WARNING** kmalloc failure in cat_init\n");
664 continue;
665 }
666 memset((*modpp)->asic, 0, sizeof(voyager_asic_t));
667 (*modpp)->asic->asic_id = VOYAGER_CAT_ID;
668 (*modpp)->asic->subaddr = VOYAGER_SUBADDR_HI;
669 (*modpp)->module_addr = i;
670 (*modpp)->scan_path_connected = 0;
671 if (i == VOYAGER_PSI) {
672 /* Exception leg for modules with no EEPROM */
673 printk("Module \"%s\"\n", cat_module_name(i));
674 continue;
675 }
676
677 CDEBUG(("cat_init: Reading eeprom for module 0x%x at offset %d\n", i, VOYAGER_XSUM_END_OFFSET));
678 outb(VOYAGER_CAT_RUN, CAT_CMD);
679 cat_disconnect(*modpp, (*modpp)->asic);
680 if (cat_subread(*modpp, (*modpp)->asic,
681 VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size),
682 &eprom_size)) {
683 printk
684 ("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n",
685 i);
686 outb(VOYAGER_CAT_END, CAT_CMD);
687 continue;
688 }
689 if (eprom_size > sizeof(eprom_buf)) {
690 printk
691 ("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x. Need %d\n",
692 i, eprom_size);
693 outb(VOYAGER_CAT_END, CAT_CMD);
694 continue;
695 }
696 outb(VOYAGER_CAT_END, CAT_CMD);
697 outb(VOYAGER_CAT_RUN, CAT_CMD);
698 CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i,
699 eprom_size));
700 if (cat_subread
701 (*modpp, (*modpp)->asic, 0, eprom_size, eprom_buf)) {
702 outb(VOYAGER_CAT_END, CAT_CMD);
703 continue;
704 }
705 outb(VOYAGER_CAT_END, CAT_CMD);
706 printk("Module \"%s\", version 0x%x, tracer 0x%x, asics %d\n",
707 cat_module_name(i), eprom_hdr->version_id,
708 *((__u32 *) eprom_hdr->tracer), eprom_hdr->num_asics);
709 (*modpp)->ee_size = eprom_hdr->ee_size;
710 (*modpp)->num_asics = eprom_hdr->num_asics;
711 asicpp = &((*modpp)->asic);
712 sp_offset = eprom_hdr->scan_path_offset;
713 /* All we really care about are the Quad cards. We
714 * identify them because they are in a processor slot
715 * and have only four asics */
716 if ((i < 0x10 || (i >= 0x14 && i < 0x1c) || i > 0x1f)) {
717 modpp = &((*modpp)->next);
718 continue;
719 }
720 /* Now we know it's in a processor slot, does it have
721 * a quad baseboard submodule */
722 outb(VOYAGER_CAT_RUN, CAT_CMD);
723 cat_read(*modpp, (*modpp)->asic, VOYAGER_SUBMODPRESENT,
724 &num_submodules);
725 /* lowest two bits, active low */
726 num_submodules = ~(0xfc | num_submodules);
727 CDEBUG(("VOYAGER CAT: %d submodules present\n",
728 num_submodules));
729 if (num_submodules == 0) {
730 /* fill in the dyadic extended processors */
731 __u8 cpu = i & 0x07;
732
733 printk("Module \"%s\": Dyadic Processor Card\n",
734 cat_module_name(i));
735 voyager_extended_vic_processors |= (1 << cpu);
736 cpu += 4;
737 voyager_extended_vic_processors |= (1 << cpu);
738 outb(VOYAGER_CAT_END, CAT_CMD);
739 continue;
740 }
741
742 /* now we want to read the asics on the first submodule,
743 * which should be the quad base board */
744
745 cat_read(*modpp, (*modpp)->asic, VOYAGER_SUBMODSELECT, &val);
746 CDEBUG(("cat_init: SUBMODSELECT value = 0x%x\n", val));
747 val = (val & 0x7c) | VOYAGER_QUAD_BASEBOARD;
748 cat_write(*modpp, (*modpp)->asic, VOYAGER_SUBMODSELECT, val);
749
750 outb(VOYAGER_CAT_END, CAT_CMD);
751
752 CDEBUG(("cat_init: Reading eeprom for module 0x%x at offset %d\n", i, VOYAGER_XSUM_END_OFFSET));
753 outb(VOYAGER_CAT_RUN, CAT_CMD);
754 cat_disconnect(*modpp, (*modpp)->asic);
755 if (cat_subread(*modpp, (*modpp)->asic,
756 VOYAGER_XSUM_END_OFFSET, sizeof(eprom_size),
757 &eprom_size)) {
758 printk
759 ("**WARNING**: Voyager couldn't read EPROM size for module 0x%x\n",
760 i);
761 outb(VOYAGER_CAT_END, CAT_CMD);
762 continue;
763 }
764 if (eprom_size > sizeof(eprom_buf)) {
765 printk
766 ("**WARNING**: Voyager insufficient size to read EPROM data, module 0x%x. Need %d\n",
767 i, eprom_size);
768 outb(VOYAGER_CAT_END, CAT_CMD);
769 continue;
770 }
771 outb(VOYAGER_CAT_END, CAT_CMD);
772 outb(VOYAGER_CAT_RUN, CAT_CMD);
773 CDEBUG(("cat_init: module 0x%x, eeprom_size %d\n", i,
774 eprom_size));
775 if (cat_subread
776 (*modpp, (*modpp)->asic, 0, eprom_size, eprom_buf)) {
777 outb(VOYAGER_CAT_END, CAT_CMD);
778 continue;
779 }
780 outb(VOYAGER_CAT_END, CAT_CMD);
781 /* Now do everything for the QBB submodule 1 */
782 (*modpp)->ee_size = eprom_hdr->ee_size;
783 (*modpp)->num_asics = eprom_hdr->num_asics;
784 asicpp = &((*modpp)->asic);
785 sp_offset = eprom_hdr->scan_path_offset;
786 /* get rid of the dummy CAT asic and read the real one */
787 kfree((*modpp)->asic);
788 for (asic = 0; asic < (*modpp)->num_asics; asic++) {
789 int j;
790 voyager_asic_t *asicp = *asicpp = kzalloc(sizeof(voyager_asic_t), GFP_KERNEL); /*&voyager_asic_storage[asic_count++]; */
791 voyager_sp_table_t *sp_table;
792 voyager_at_t *asic_table;
793 voyager_jtt_t *jtag_table;
794
795 if (asicp == NULL) {
796 printk
797 ("**WARNING** kmalloc failure in cat_init\n");
798 continue;
799 }
800 asicpp = &(asicp->next);
801 asicp->asic_location = asic;
802 sp_table =
803 (voyager_sp_table_t *) (eprom_buf + sp_offset);
804 asicp->asic_id = sp_table->asic_id;
805 asic_table =
806 (voyager_at_t *) (eprom_buf +
807 sp_table->asic_data_offset);
808 for (j = 0; j < 4; j++)
809 asicp->jtag_id[j] = asic_table->jtag_id[j];
810 jtag_table =
811 (voyager_jtt_t *) (eprom_buf +
812 asic_table->jtag_offset);
813 asicp->ireg_length = jtag_table->ireg_len;
814 asicp->bit_location = (*modpp)->inst_bits;
815 (*modpp)->inst_bits += asicp->ireg_length;
816 if (asicp->ireg_length > (*modpp)->largest_reg)
817 (*modpp)->largest_reg = asicp->ireg_length;
818 if (asicp->ireg_length < (*modpp)->smallest_reg ||
819 (*modpp)->smallest_reg == 0)
820 (*modpp)->smallest_reg = asicp->ireg_length;
821 CDEBUG(("asic 0x%x, ireg_length=%d, bit_location=%d\n",
822 asicp->asic_id, asicp->ireg_length,
823 asicp->bit_location));
824 if (asicp->asic_id == VOYAGER_QUAD_QABC) {
825 CDEBUG(("VOYAGER CAT: QABC ASIC found\n"));
826 qabc_asic = asicp;
827 }
828 sp_offset += sizeof(voyager_sp_table_t);
829 }
830 CDEBUG(("Module inst_bits = %d, largest_reg = %d, smallest_reg=%d\n", (*modpp)->inst_bits, (*modpp)->largest_reg, (*modpp)->smallest_reg));
831 /* OK, now we have the QUAD ASICs set up, use them.
832 * we need to:
833 *
834 * 1. Find the Memory area for the Quad CPIs.
835 * 2. Find the Extended VIC processor
836 * 3. Configure a second extended VIC processor (This
837 * cannot be done for the 51xx.
838 * */
839 outb(VOYAGER_CAT_RUN, CAT_CMD);
840 cat_connect(*modpp, (*modpp)->asic);
841 CDEBUG(("CAT CONNECTED!!\n"));
842 cat_subread(*modpp, qabc_asic, 0, sizeof(qabc_data), qabc_data);
843 qic_addr = qabc_data[5] << 8;
844 qic_addr = (qic_addr | qabc_data[6]) << 8;
845 qic_addr = (qic_addr | qabc_data[7]) << 8;
846 printk
847 ("Module \"%s\": Quad Processor Card; CPI 0x%lx, SET=0x%x\n",
848 cat_module_name(i), qic_addr, qabc_data[8]);
849#if 0 /* plumbing fails---FIXME */
850 if ((qabc_data[8] & 0xf0) == 0) {
851 /* FIXME: 32 way 8 CPU slot monster cannot be
852 * plumbed this way---need to check for it */
853
854 printk("Plumbing second Extended Quad Processor\n");
855 /* second VIC line hardwired to Quad CPU 1 */
856 qabc_data[8] |= 0x20;
857 cat_subwrite(*modpp, qabc_asic, 8, 1, &qabc_data[8]);
858#ifdef VOYAGER_CAT_DEBUG
859 /* verify plumbing */
860 cat_subread(*modpp, qabc_asic, 8, 1, &qabc_data[8]);
861 if ((qabc_data[8] & 0xf0) == 0) {
862 CDEBUG(("PLUMBING FAILED: 0x%x\n",
863 qabc_data[8]));
864 }
865#endif
866 }
867#endif
868
869 {
870 struct resource *res =
871 kzalloc(sizeof(struct resource), GFP_KERNEL);
872 res->name = kmalloc(128, GFP_KERNEL);
873 sprintf((char *)res->name, "Voyager %s Quad CPI",
874 cat_module_name(i));
875 res->start = qic_addr;
876 res->end = qic_addr + 0x3ff;
877 request_resource(&iomem_resource, res);
878 }
879
880 qic_addr = (unsigned long)ioremap_cache(qic_addr, 0x400);
881
882 for (j = 0; j < 4; j++) {
883 __u8 cpu;
884
885 if (voyager_8slot) {
886 /* 8 slot has a different mapping,
887 * each slot has only one vic line, so
888 * 1 cpu in each slot must be < 8 */
889 cpu = (i & 0x07) + j * 8;
890 } else {
891 cpu = (i & 0x03) + j * 4;
892 }
893 if ((qabc_data[8] & (1 << j))) {
894 voyager_extended_vic_processors |= (1 << cpu);
895 }
896 if (qabc_data[8] & (1 << (j + 4))) {
897 /* Second SET register plumbed: Quad
898 * card has two VIC connected CPUs.
899 * Secondary cannot be booted as a VIC
900 * CPU */
901 voyager_extended_vic_processors |= (1 << cpu);
902 voyager_allowed_boot_processors &=
903 (~(1 << cpu));
904 }
905
906 voyager_quad_processors |= (1 << cpu);
907 voyager_quad_cpi_addr[cpu] = (struct voyager_qic_cpi *)
908 (qic_addr + (j << 8));
909 CDEBUG(("CPU%d: CPI address 0x%lx\n", cpu,
910 (unsigned long)voyager_quad_cpi_addr[cpu]));
911 }
912 outb(VOYAGER_CAT_END, CAT_CMD);
913
914 *asicpp = NULL;
915 modpp = &((*modpp)->next);
916 }
917 *modpp = NULL;
918 printk
919 ("CAT Bus Initialisation finished: extended procs 0x%x, quad procs 0x%x, allowed vic boot = 0x%x\n",
920 voyager_extended_vic_processors, voyager_quad_processors,
921 voyager_allowed_boot_processors);
922 request_resource(&ioport_resource, &vic_res);
923 if (voyager_quad_processors)
924 request_resource(&ioport_resource, &qic_res);
925 /* set up the front power switch */
926}
927
928int voyager_cat_readb(__u8 module, __u8 asic, int reg)
929{
930 return 0;
931}
932
933static int cat_disconnect(voyager_module_t * modp, voyager_asic_t * asicp)
934{
935 __u8 val;
936 int err = 0;
937
938 if (!modp->scan_path_connected)
939 return 0;
940 if (asicp->asic_id != VOYAGER_CAT_ID) {
941 CDEBUG(("cat_disconnect: ASIC is not CAT\n"));
942 return 1;
943 }
944 err = cat_read(modp, asicp, VOYAGER_SCANPATH, &val);
945 if (err) {
946 CDEBUG(("cat_disconnect: failed to read SCANPATH\n"));
947 return err;
948 }
949 val &= VOYAGER_DISCONNECT_ASIC;
950 err = cat_write(modp, asicp, VOYAGER_SCANPATH, val);
951 if (err) {
952 CDEBUG(("cat_disconnect: failed to write SCANPATH\n"));
953 return err;
954 }
955 outb(VOYAGER_CAT_END, CAT_CMD);
956 outb(VOYAGER_CAT_RUN, CAT_CMD);
957 modp->scan_path_connected = 0;
958
959 return 0;
960}
961
962static int cat_connect(voyager_module_t * modp, voyager_asic_t * asicp)
963{
964 __u8 val;
965 int err = 0;
966
967 if (modp->scan_path_connected)
968 return 0;
969 if (asicp->asic_id != VOYAGER_CAT_ID) {
970 CDEBUG(("cat_connect: ASIC is not CAT\n"));
971 return 1;
972 }
973
974 err = cat_read(modp, asicp, VOYAGER_SCANPATH, &val);
975 if (err) {
976 CDEBUG(("cat_connect: failed to read SCANPATH\n"));
977 return err;
978 }
979 val |= VOYAGER_CONNECT_ASIC;
980 err = cat_write(modp, asicp, VOYAGER_SCANPATH, val);
981 if (err) {
982 CDEBUG(("cat_connect: failed to write SCANPATH\n"));
983 return err;
984 }
985 outb(VOYAGER_CAT_END, CAT_CMD);
986 outb(VOYAGER_CAT_RUN, CAT_CMD);
987 modp->scan_path_connected = 1;
988
989 return 0;
990}
991
992void voyager_cat_power_off(void)
993{
994 /* Power the machine off by writing to the PSI over the CAT
995 * bus */
996 __u8 data;
997 voyager_module_t psi = { 0 };
998 voyager_asic_t psi_asic = { 0 };
999
1000 psi.asic = &psi_asic;
1001 psi.asic->asic_id = VOYAGER_CAT_ID;
1002 psi.asic->subaddr = VOYAGER_SUBADDR_HI;
1003 psi.module_addr = VOYAGER_PSI;
1004 psi.scan_path_connected = 0;
1005
1006 outb(VOYAGER_CAT_END, CAT_CMD);
1007 /* Connect the PSI to the CAT Bus */
1008 outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT);
1009 outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT);
1010 outb(VOYAGER_CAT_RUN, CAT_CMD);
1011 cat_disconnect(&psi, &psi_asic);
1012 /* Read the status */
1013 cat_subread(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data);
1014 outb(VOYAGER_CAT_END, CAT_CMD);
1015 CDEBUG(("PSI STATUS 0x%x\n", data));
1016 /* These two writes are power off prep and perform */
1017 data = PSI_CLEAR;
1018 outb(VOYAGER_CAT_RUN, CAT_CMD);
1019 cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data);
1020 outb(VOYAGER_CAT_END, CAT_CMD);
1021 data = PSI_POWER_DOWN;
1022 outb(VOYAGER_CAT_RUN, CAT_CMD);
1023 cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG, 1, &data);
1024 outb(VOYAGER_CAT_END, CAT_CMD);
1025}
1026
1027struct voyager_status voyager_status = { 0 };
1028
1029void voyager_cat_psi(__u8 cmd, __u16 reg, __u8 * data)
1030{
1031 voyager_module_t psi = { 0 };
1032 voyager_asic_t psi_asic = { 0 };
1033
1034 psi.asic = &psi_asic;
1035 psi.asic->asic_id = VOYAGER_CAT_ID;
1036 psi.asic->subaddr = VOYAGER_SUBADDR_HI;
1037 psi.module_addr = VOYAGER_PSI;
1038 psi.scan_path_connected = 0;
1039
1040 outb(VOYAGER_CAT_END, CAT_CMD);
1041 /* Connect the PSI to the CAT Bus */
1042 outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT);
1043 outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT);
1044 outb(VOYAGER_CAT_RUN, CAT_CMD);
1045 cat_disconnect(&psi, &psi_asic);
1046 switch (cmd) {
1047 case VOYAGER_PSI_READ:
1048 cat_read(&psi, &psi_asic, reg, data);
1049 break;
1050 case VOYAGER_PSI_WRITE:
1051 cat_write(&psi, &psi_asic, reg, *data);
1052 break;
1053 case VOYAGER_PSI_SUBREAD:
1054 cat_subread(&psi, &psi_asic, reg, 1, data);
1055 break;
1056 case VOYAGER_PSI_SUBWRITE:
1057 cat_subwrite(&psi, &psi_asic, reg, 1, data);
1058 break;
1059 default:
1060 printk(KERN_ERR "Voyager PSI, unrecognised command %d\n", cmd);
1061 break;
1062 }
1063 outb(VOYAGER_CAT_END, CAT_CMD);
1064}
1065
1066void voyager_cat_do_common_interrupt(void)
1067{
1068 /* This is caused either by a memory parity error or something
1069 * in the PSI */
1070 __u8 data;
1071 voyager_module_t psi = { 0 };
1072 voyager_asic_t psi_asic = { 0 };
1073 struct voyager_psi psi_reg;
1074 int i;
1075 re_read:
1076 psi.asic = &psi_asic;
1077 psi.asic->asic_id = VOYAGER_CAT_ID;
1078 psi.asic->subaddr = VOYAGER_SUBADDR_HI;
1079 psi.module_addr = VOYAGER_PSI;
1080 psi.scan_path_connected = 0;
1081
1082 outb(VOYAGER_CAT_END, CAT_CMD);
1083 /* Connect the PSI to the CAT Bus */
1084 outb(VOYAGER_CAT_DESELECT, VOYAGER_CAT_CONFIG_PORT);
1085 outb(VOYAGER_PSI, VOYAGER_CAT_CONFIG_PORT);
1086 outb(VOYAGER_CAT_RUN, CAT_CMD);
1087 cat_disconnect(&psi, &psi_asic);
1088 /* Read the status. NOTE: Need to read *all* the PSI regs here
1089 * otherwise the cmn int will be reasserted */
1090 for (i = 0; i < sizeof(psi_reg.regs); i++) {
1091 cat_read(&psi, &psi_asic, i, &((__u8 *) & psi_reg.regs)[i]);
1092 }
1093 outb(VOYAGER_CAT_END, CAT_CMD);
1094 if ((psi_reg.regs.checkbit & 0x02) == 0) {
1095 psi_reg.regs.checkbit |= 0x02;
1096 cat_write(&psi, &psi_asic, 5, psi_reg.regs.checkbit);
1097 printk("VOYAGER RE-READ PSI\n");
1098 goto re_read;
1099 }
1100 outb(VOYAGER_CAT_RUN, CAT_CMD);
1101 for (i = 0; i < sizeof(psi_reg.subregs); i++) {
1102 /* This looks strange, but the PSI doesn't do auto increment
1103 * correctly */
1104 cat_subread(&psi, &psi_asic, VOYAGER_PSI_SUPPLY_REG + i,
1105 1, &((__u8 *) & psi_reg.subregs)[i]);
1106 }
1107 outb(VOYAGER_CAT_END, CAT_CMD);
1108#ifdef VOYAGER_CAT_DEBUG
1109 printk("VOYAGER PSI: ");
1110 for (i = 0; i < sizeof(psi_reg.regs); i++)
1111 printk("%02x ", ((__u8 *) & psi_reg.regs)[i]);
1112 printk("\n ");
1113 for (i = 0; i < sizeof(psi_reg.subregs); i++)
1114 printk("%02x ", ((__u8 *) & psi_reg.subregs)[i]);
1115 printk("\n");
1116#endif
1117 if (psi_reg.regs.intstatus & PSI_MON) {
1118 /* switch off or power fail */
1119
1120 if (psi_reg.subregs.supply & PSI_SWITCH_OFF) {
1121 if (voyager_status.switch_off) {
1122 printk(KERN_ERR
1123 "Voyager front panel switch turned off again---Immediate power off!\n");
1124 voyager_cat_power_off();
1125 /* not reached */
1126 } else {
1127 printk(KERN_ERR
1128 "Voyager front panel switch turned off\n");
1129 voyager_status.switch_off = 1;
1130 voyager_status.request_from_kernel = 1;
1131 wake_up_process(voyager_thread);
1132 }
1133 /* Tell the hardware we're taking care of the
1134 * shutdown, otherwise it will power the box off
1135 * within 3 seconds of the switch being pressed and,
1136 * which is much more important to us, continue to
1137 * assert the common interrupt */
1138 data = PSI_CLR_SWITCH_OFF;
1139 outb(VOYAGER_CAT_RUN, CAT_CMD);
1140 cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_SUPPLY_REG,
1141 1, &data);
1142 outb(VOYAGER_CAT_END, CAT_CMD);
1143 } else {
1144
1145 VDEBUG(("Voyager ac fail reg 0x%x\n",
1146 psi_reg.subregs.ACfail));
1147 if ((psi_reg.subregs.ACfail & AC_FAIL_STAT_CHANGE) == 0) {
1148 /* No further update */
1149 return;
1150 }
1151#if 0
1152 /* Don't bother trying to find out who failed.
1153 * FIXME: This probably makes the code incorrect on
1154 * anything other than a 345x */
1155 for (i = 0; i < 5; i++) {
1156 if (psi_reg.subregs.ACfail & (1 << i)) {
1157 break;
1158 }
1159 }
1160 printk(KERN_NOTICE "AC FAIL IN SUPPLY %d\n", i);
1161#endif
1162 /* DON'T do this: it shuts down the AC PSI
1163 outb(VOYAGER_CAT_RUN, CAT_CMD);
1164 data = PSI_MASK_MASK | i;
1165 cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_MASK,
1166 1, &data);
1167 outb(VOYAGER_CAT_END, CAT_CMD);
1168 */
1169 printk(KERN_ERR "Voyager AC power failure\n");
1170 outb(VOYAGER_CAT_RUN, CAT_CMD);
1171 data = PSI_COLD_START;
1172 cat_subwrite(&psi, &psi_asic, VOYAGER_PSI_GENERAL_REG,
1173 1, &data);
1174 outb(VOYAGER_CAT_END, CAT_CMD);
1175 voyager_status.power_fail = 1;
1176 voyager_status.request_from_kernel = 1;
1177 wake_up_process(voyager_thread);
1178 }
1179
1180 } else if (psi_reg.regs.intstatus & PSI_FAULT) {
1181 /* Major fault! */
1182 printk(KERN_ERR
1183 "Voyager PSI Detected major fault, immediate power off!\n");
1184 voyager_cat_power_off();
1185 /* not reached */
1186 } else if (psi_reg.regs.intstatus & (PSI_DC_FAIL | PSI_ALARM
1187 | PSI_CURRENT | PSI_DVM
1188 | PSI_PSCFAULT | PSI_STAT_CHG)) {
1189 /* other psi fault */
1190
1191 printk(KERN_WARNING "Voyager PSI status 0x%x\n", data);
1192 /* clear the PSI fault */
1193 outb(VOYAGER_CAT_RUN, CAT_CMD);
1194 cat_write(&psi, &psi_asic, VOYAGER_PSI_STATUS_REG, 0);
1195 outb(VOYAGER_CAT_END, CAT_CMD);
1196 }
1197}
diff --git a/arch/x86/mach-voyager/voyager_smp.c b/arch/x86/mach-voyager/voyager_smp.c
deleted file mode 100644
index b9cc84a2a4fc..000000000000
--- a/arch/x86/mach-voyager/voyager_smp.c
+++ /dev/null
@@ -1,1807 +0,0 @@
1/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Copyright (C) 1999,2001
4 *
5 * Author: J.E.J.Bottomley@HansenPartnership.com
6 *
7 * This file provides all the same external entries as smp.c but uses
8 * the voyager hal to provide the functionality
9 */
10#include <linux/cpu.h>
11#include <linux/module.h>
12#include <linux/mm.h>
13#include <linux/kernel_stat.h>
14#include <linux/delay.h>
15#include <linux/mc146818rtc.h>
16#include <linux/cache.h>
17#include <linux/interrupt.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/bootmem.h>
21#include <linux/completion.h>
22#include <asm/desc.h>
23#include <asm/voyager.h>
24#include <asm/vic.h>
25#include <asm/mtrr.h>
26#include <asm/pgalloc.h>
27#include <asm/tlbflush.h>
28#include <asm/arch_hooks.h>
29#include <asm/trampoline.h>
30
31/* TLB state -- visible externally, indexed physically */
32DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { &init_mm, 0 };
33
34/* CPU IRQ affinity -- set to all ones initially */
35static unsigned long cpu_irq_affinity[NR_CPUS] __cacheline_aligned =
36 {[0 ... NR_CPUS-1] = ~0UL };
37
38/* per CPU data structure (for /proc/cpuinfo et al), visible externally
39 * indexed physically */
40DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
41EXPORT_PER_CPU_SYMBOL(cpu_info);
42
43/* physical ID of the CPU used to boot the system */
44unsigned char boot_cpu_id;
45
46/* The memory line addresses for the Quad CPIs */
47struct voyager_qic_cpi *voyager_quad_cpi_addr[NR_CPUS] __cacheline_aligned;
48
49/* The masks for the Extended VIC processors, filled in by cat_init */
50__u32 voyager_extended_vic_processors = 0;
51
52/* Masks for the extended Quad processors which cannot be VIC booted */
53__u32 voyager_allowed_boot_processors = 0;
54
55/* The mask for the Quad Processors (both extended and non-extended) */
56__u32 voyager_quad_processors = 0;
57
58/* Total count of live CPUs, used in process.c to display
59 * the CPU information and in irq.c for the per CPU irq
60 * activity count. Finally exported by i386_ksyms.c */
61static int voyager_extended_cpus = 1;
62
63/* Used for the invalidate map that's also checked in the spinlock */
64static volatile unsigned long smp_invalidate_needed;
65
66/* Bitmask of CPUs present in the system - exported by i386_syms.c, used
67 * by scheduler but indexed physically */
68static cpumask_t voyager_phys_cpu_present_map = CPU_MASK_NONE;
69
70/* The internal functions */
71static void send_CPI(__u32 cpuset, __u8 cpi);
72static void ack_CPI(__u8 cpi);
73static int ack_QIC_CPI(__u8 cpi);
74static void ack_special_QIC_CPI(__u8 cpi);
75static void ack_VIC_CPI(__u8 cpi);
76static void send_CPI_allbutself(__u8 cpi);
77static void mask_vic_irq(unsigned int irq);
78static void unmask_vic_irq(unsigned int irq);
79static unsigned int startup_vic_irq(unsigned int irq);
80static void enable_local_vic_irq(unsigned int irq);
81static void disable_local_vic_irq(unsigned int irq);
82static void before_handle_vic_irq(unsigned int irq);
83static void after_handle_vic_irq(unsigned int irq);
84static void set_vic_irq_affinity(unsigned int irq, const struct cpumask *mask);
85static void ack_vic_irq(unsigned int irq);
86static void vic_enable_cpi(void);
87static void do_boot_cpu(__u8 cpuid);
88static void do_quad_bootstrap(void);
89static void initialize_secondary(void);
90
91int hard_smp_processor_id(void);
92int safe_smp_processor_id(void);
93
94/* Inline functions */
95static inline void send_one_QIC_CPI(__u8 cpu, __u8 cpi)
96{
97 voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi =
98 (smp_processor_id() << 16) + cpi;
99}
100
101static inline void send_QIC_CPI(__u32 cpuset, __u8 cpi)
102{
103 int cpu;
104
105 for_each_online_cpu(cpu) {
106 if (cpuset & (1 << cpu)) {
107#ifdef VOYAGER_DEBUG
108 if (!cpu_online(cpu))
109 VDEBUG(("CPU%d sending cpi %d to CPU%d not in "
110 "cpu_online_map\n",
111 hard_smp_processor_id(), cpi, cpu));
112#endif
113 send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
114 }
115 }
116}
117
118static inline void wrapper_smp_local_timer_interrupt(void)
119{
120 irq_enter();
121 smp_local_timer_interrupt();
122 irq_exit();
123}
124
125static inline void send_one_CPI(__u8 cpu, __u8 cpi)
126{
127 if (voyager_quad_processors & (1 << cpu))
128 send_one_QIC_CPI(cpu, cpi - QIC_CPI_OFFSET);
129 else
130 send_CPI(1 << cpu, cpi);
131}
132
133static inline void send_CPI_allbutself(__u8 cpi)
134{
135 __u8 cpu = smp_processor_id();
136 __u32 mask = cpus_addr(cpu_online_map)[0] & ~(1 << cpu);
137 send_CPI(mask, cpi);
138}
139
140static inline int is_cpu_quad(void)
141{
142 __u8 cpumask = inb(VIC_PROC_WHO_AM_I);
143 return ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER);
144}
145
146static inline int is_cpu_extended(void)
147{
148 __u8 cpu = hard_smp_processor_id();
149
150 return (voyager_extended_vic_processors & (1 << cpu));
151}
152
153static inline int is_cpu_vic_boot(void)
154{
155 __u8 cpu = hard_smp_processor_id();
156
157 return (voyager_extended_vic_processors
158 & voyager_allowed_boot_processors & (1 << cpu));
159}
160
161static inline void ack_CPI(__u8 cpi)
162{
163 switch (cpi) {
164 case VIC_CPU_BOOT_CPI:
165 if (is_cpu_quad() && !is_cpu_vic_boot())
166 ack_QIC_CPI(cpi);
167 else
168 ack_VIC_CPI(cpi);
169 break;
170 case VIC_SYS_INT:
171 case VIC_CMN_INT:
172 /* These are slightly strange. Even on the Quad card,
173 * They are vectored as VIC CPIs */
174 if (is_cpu_quad())
175 ack_special_QIC_CPI(cpi);
176 else
177 ack_VIC_CPI(cpi);
178 break;
179 default:
180 printk("VOYAGER ERROR: CPI%d is in common CPI code\n", cpi);
181 break;
182 }
183}
184
185/* local variables */
186
187/* The VIC IRQ descriptors -- these look almost identical to the
188 * 8259 IRQs except that masks and things must be kept per processor
189 */
190static struct irq_chip vic_chip = {
191 .name = "VIC",
192 .startup = startup_vic_irq,
193 .mask = mask_vic_irq,
194 .unmask = unmask_vic_irq,
195 .set_affinity = set_vic_irq_affinity,
196};
197
198/* used to count up as CPUs are brought on line (starts at 0) */
199static int cpucount = 0;
200
201/* The per cpu profile stuff - used in smp_local_timer_interrupt */
202static DEFINE_PER_CPU(int, prof_multiplier) = 1;
203static DEFINE_PER_CPU(int, prof_old_multiplier) = 1;
204static DEFINE_PER_CPU(int, prof_counter) = 1;
205
206/* the map used to check if a CPU has booted */
207static __u32 cpu_booted_map;
208
209/* the synchronize flag used to hold all secondary CPUs spinning in
210 * a tight loop until the boot sequence is ready for them */
211static cpumask_t smp_commenced_mask = CPU_MASK_NONE;
212
213/* This is for the new dynamic CPU boot code */
214
215/* The per processor IRQ masks (these are usually kept in sync) */
216static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned;
217
218/* the list of IRQs to be enabled by the VIC_ENABLE_IRQ_CPI */
219static __u16 vic_irq_enable_mask[NR_CPUS] __cacheline_aligned = { 0 };
220
221/* Lock for enable/disable of VIC interrupts */
222static __cacheline_aligned DEFINE_SPINLOCK(vic_irq_lock);
223
224/* The boot processor is correctly set up in PC mode when it
225 * comes up, but the secondaries need their master/slave 8259
226 * pairs initializing correctly */
227
228/* Interrupt counters (per cpu) and total - used to try to
229 * even up the interrupt handling routines */
230static long vic_intr_total = 0;
231static long vic_intr_count[NR_CPUS] __cacheline_aligned = { 0 };
232static unsigned long vic_tick[NR_CPUS] __cacheline_aligned = { 0 };
233
234/* Since we can only use CPI0, we fake all the other CPIs */
235static unsigned long vic_cpi_mailbox[NR_CPUS] __cacheline_aligned;
236
237/* debugging routine to read the isr of the cpu's pic */
238static inline __u16 vic_read_isr(void)
239{
240 __u16 isr;
241
242 outb(0x0b, 0xa0);
243 isr = inb(0xa0) << 8;
244 outb(0x0b, 0x20);
245 isr |= inb(0x20);
246
247 return isr;
248}
249
250static __init void qic_setup(void)
251{
252 if (!is_cpu_quad()) {
253 /* not a quad, no setup */
254 return;
255 }
256 outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0);
257 outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1);
258
259 if (is_cpu_extended()) {
260 /* the QIC duplicate of the VIC base register */
261 outb(VIC_DEFAULT_CPI_BASE, QIC_VIC_CPI_BASE_REGISTER);
262 outb(QIC_DEFAULT_CPI_BASE, QIC_CPI_BASE_REGISTER);
263
264 /* FIXME: should set up the QIC timer and memory parity
265 * error vectors here */
266 }
267}
268
269static __init void vic_setup_pic(void)
270{
271 outb(1, VIC_REDIRECT_REGISTER_1);
272 /* clear the claim registers for dynamic routing */
273 outb(0, VIC_CLAIM_REGISTER_0);
274 outb(0, VIC_CLAIM_REGISTER_1);
275
276 outb(0, VIC_PRIORITY_REGISTER);
277 /* Set the Primary and Secondary Microchannel vector
278 * bases to be the same as the ordinary interrupts
279 *
280 * FIXME: This would be more efficient using separate
281 * vectors. */
282 outb(FIRST_EXTERNAL_VECTOR, VIC_PRIMARY_MC_BASE);
283 outb(FIRST_EXTERNAL_VECTOR, VIC_SECONDARY_MC_BASE);
284 /* Now initiallise the master PIC belonging to this CPU by
285 * sending the four ICWs */
286
287 /* ICW1: level triggered, ICW4 needed */
288 outb(0x19, 0x20);
289
290 /* ICW2: vector base */
291 outb(FIRST_EXTERNAL_VECTOR, 0x21);
292
293 /* ICW3: slave at line 2 */
294 outb(0x04, 0x21);
295
296 /* ICW4: 8086 mode */
297 outb(0x01, 0x21);
298
299 /* now the same for the slave PIC */
300
301 /* ICW1: level trigger, ICW4 needed */
302 outb(0x19, 0xA0);
303
304 /* ICW2: slave vector base */
305 outb(FIRST_EXTERNAL_VECTOR + 8, 0xA1);
306
307 /* ICW3: slave ID */
308 outb(0x02, 0xA1);
309
310 /* ICW4: 8086 mode */
311 outb(0x01, 0xA1);
312}
313
314static void do_quad_bootstrap(void)
315{
316 if (is_cpu_quad() && is_cpu_vic_boot()) {
317 int i;
318 unsigned long flags;
319 __u8 cpuid = hard_smp_processor_id();
320
321 local_irq_save(flags);
322
323 for (i = 0; i < 4; i++) {
324 /* FIXME: this would be >>3 &0x7 on the 32 way */
325 if (((cpuid >> 2) & 0x03) == i)
326 /* don't lower our own mask! */
327 continue;
328
329 /* masquerade as local Quad CPU */
330 outb(QIC_CPUID_ENABLE | i, QIC_PROCESSOR_ID);
331 /* enable the startup CPI */
332 outb(QIC_BOOT_CPI_MASK, QIC_MASK_REGISTER1);
333 /* restore cpu id */
334 outb(0, QIC_PROCESSOR_ID);
335 }
336 local_irq_restore(flags);
337 }
338}
339
340void prefill_possible_map(void)
341{
342 /* This is empty on voyager because we need a much
343 * earlier detection which is done in find_smp_config */
344}
345
346/* Set up all the basic stuff: read the SMP config and make all the
347 * SMP information reflect only the boot cpu. All others will be
348 * brought on-line later. */
349void __init find_smp_config(void)
350{
351 int i;
352
353 boot_cpu_id = hard_smp_processor_id();
354
355 printk("VOYAGER SMP: Boot cpu is %d\n", boot_cpu_id);
356
357 /* initialize the CPU structures (moved from smp_boot_cpus) */
358 for (i = 0; i < nr_cpu_ids; i++)
359 cpu_irq_affinity[i] = ~0;
360 cpu_online_map = cpumask_of_cpu(boot_cpu_id);
361
362 /* The boot CPU must be extended */
363 voyager_extended_vic_processors = 1 << boot_cpu_id;
364 /* initially, all of the first 8 CPUs can boot */
365 voyager_allowed_boot_processors = 0xff;
366 /* set up everything for just this CPU, we can alter
367 * this as we start the other CPUs later */
368 /* now get the CPU disposition from the extended CMOS */
369 cpus_addr(voyager_phys_cpu_present_map)[0] =
370 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK);
371 cpus_addr(voyager_phys_cpu_present_map)[0] |=
372 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8;
373 cpus_addr(voyager_phys_cpu_present_map)[0] |=
374 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
375 2) << 16;
376 cpus_addr(voyager_phys_cpu_present_map)[0] |=
377 voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
378 3) << 24;
379 init_cpu_possible(&voyager_phys_cpu_present_map);
380 printk("VOYAGER SMP: voyager_phys_cpu_present_map = 0x%lx\n",
381 cpus_addr(voyager_phys_cpu_present_map)[0]);
382 /* Here we set up the VIC to enable SMP */
383 /* enable the CPIs by writing the base vector to their register */
384 outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER);
385 outb(1, VIC_REDIRECT_REGISTER_1);
386 /* set the claim registers for static routing --- Boot CPU gets
387 * all interrupts untill all other CPUs started */
388 outb(0xff, VIC_CLAIM_REGISTER_0);
389 outb(0xff, VIC_CLAIM_REGISTER_1);
390 /* Set the Primary and Secondary Microchannel vector
391 * bases to be the same as the ordinary interrupts
392 *
393 * FIXME: This would be more efficient using separate
394 * vectors. */
395 outb(FIRST_EXTERNAL_VECTOR, VIC_PRIMARY_MC_BASE);
396 outb(FIRST_EXTERNAL_VECTOR, VIC_SECONDARY_MC_BASE);
397
398 /* Finally tell the firmware that we're driving */
399 outb(inb(VOYAGER_SUS_IN_CONTROL_PORT) | VOYAGER_IN_CONTROL_FLAG,
400 VOYAGER_SUS_IN_CONTROL_PORT);
401
402 current_thread_info()->cpu = boot_cpu_id;
403 x86_write_percpu(cpu_number, boot_cpu_id);
404}
405
406/*
407 * The bootstrap kernel entry code has set these up. Save them
408 * for a given CPU, id is physical */
409void __init smp_store_cpu_info(int id)
410{
411 struct cpuinfo_x86 *c = &cpu_data(id);
412
413 *c = boot_cpu_data;
414 c->cpu_index = id;
415
416 identify_secondary_cpu(c);
417}
418
419/* Routine initially called when a non-boot CPU is brought online */
420static void __init start_secondary(void *unused)
421{
422 __u8 cpuid = hard_smp_processor_id();
423
424 cpu_init();
425
426 /* OK, we're in the routine */
427 ack_CPI(VIC_CPU_BOOT_CPI);
428
429 /* setup the 8259 master slave pair belonging to this CPU ---
430 * we won't actually receive any until the boot CPU
431 * relinquishes it's static routing mask */
432 vic_setup_pic();
433
434 qic_setup();
435
436 if (is_cpu_quad() && !is_cpu_vic_boot()) {
437 /* clear the boot CPI */
438 __u8 dummy;
439
440 dummy =
441 voyager_quad_cpi_addr[cpuid]->qic_cpi[VIC_CPU_BOOT_CPI].cpi;
442 printk("read dummy %d\n", dummy);
443 }
444
445 /* lower the mask to receive CPIs */
446 vic_enable_cpi();
447
448 VDEBUG(("VOYAGER SMP: CPU%d, stack at about %p\n", cpuid, &cpuid));
449
450 notify_cpu_starting(cpuid);
451
452 /* enable interrupts */
453 local_irq_enable();
454
455 /* get our bogomips */
456 calibrate_delay();
457
458 /* save our processor parameters */
459 smp_store_cpu_info(cpuid);
460
461 /* if we're a quad, we may need to bootstrap other CPUs */
462 do_quad_bootstrap();
463
464 /* FIXME: this is rather a poor hack to prevent the CPU
465 * activating softirqs while it's supposed to be waiting for
466 * permission to proceed. Without this, the new per CPU stuff
467 * in the softirqs will fail */
468 local_irq_disable();
469 cpu_set(cpuid, cpu_callin_map);
470
471 /* signal that we're done */
472 cpu_booted_map = 1;
473
474 while (!cpu_isset(cpuid, smp_commenced_mask))
475 rep_nop();
476 local_irq_enable();
477
478 local_flush_tlb();
479
480 cpu_set(cpuid, cpu_online_map);
481 wmb();
482 cpu_idle();
483}
484
485/* Routine to kick start the given CPU and wait for it to report ready
486 * (or timeout in startup). When this routine returns, the requested
487 * CPU is either fully running and configured or known to be dead.
488 *
489 * We call this routine sequentially 1 CPU at a time, so no need for
490 * locking */
491
492static void __init do_boot_cpu(__u8 cpu)
493{
494 struct task_struct *idle;
495 int timeout;
496 unsigned long flags;
497 int quad_boot = (1 << cpu) & voyager_quad_processors
498 & ~(voyager_extended_vic_processors
499 & voyager_allowed_boot_processors);
500
501 /* This is the format of the CPI IDT gate (in real mode) which
502 * we're hijacking to boot the CPU */
503 union IDTFormat {
504 struct seg {
505 __u16 Offset;
506 __u16 Segment;
507 } idt;
508 __u32 val;
509 } hijack_source;
510
511 __u32 *hijack_vector;
512 __u32 start_phys_address = setup_trampoline();
513
514 /* There's a clever trick to this: The linux trampoline is
515 * compiled to begin at absolute location zero, so make the
516 * address zero but have the data segment selector compensate
517 * for the actual address */
518 hijack_source.idt.Offset = start_phys_address & 0x000F;
519 hijack_source.idt.Segment = (start_phys_address >> 4) & 0xFFFF;
520
521 cpucount++;
522 alternatives_smp_switch(1);
523
524 idle = fork_idle(cpu);
525 if (IS_ERR(idle))
526 panic("failed fork for CPU%d", cpu);
527 idle->thread.ip = (unsigned long)start_secondary;
528 /* init_tasks (in sched.c) is indexed logically */
529 stack_start.sp = (void *)idle->thread.sp;
530
531 init_gdt(cpu);
532 per_cpu(current_task, cpu) = idle;
533 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
534 irq_ctx_init(cpu);
535
536 /* Note: Don't modify initial ss override */
537 VDEBUG(("VOYAGER SMP: Booting CPU%d at 0x%lx[%x:%x], stack %p\n", cpu,
538 (unsigned long)hijack_source.val, hijack_source.idt.Segment,
539 hijack_source.idt.Offset, stack_start.sp));
540
541 /* init lowmem identity mapping */
542 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
543 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
544 flush_tlb_all();
545
546 if (quad_boot) {
547 printk("CPU %d: non extended Quad boot\n", cpu);
548 hijack_vector =
549 (__u32 *)
550 phys_to_virt((VIC_CPU_BOOT_CPI + QIC_DEFAULT_CPI_BASE) * 4);
551 *hijack_vector = hijack_source.val;
552 } else {
553 printk("CPU%d: extended VIC boot\n", cpu);
554 hijack_vector =
555 (__u32 *)
556 phys_to_virt((VIC_CPU_BOOT_CPI + VIC_DEFAULT_CPI_BASE) * 4);
557 *hijack_vector = hijack_source.val;
558 /* VIC errata, may also receive interrupt at this address */
559 hijack_vector =
560 (__u32 *)
561 phys_to_virt((VIC_CPU_BOOT_ERRATA_CPI +
562 VIC_DEFAULT_CPI_BASE) * 4);
563 *hijack_vector = hijack_source.val;
564 }
565 /* All non-boot CPUs start with interrupts fully masked. Need
566 * to lower the mask of the CPI we're about to send. We do
567 * this in the VIC by masquerading as the processor we're
568 * about to boot and lowering its interrupt mask */
569 local_irq_save(flags);
570 if (quad_boot) {
571 send_one_QIC_CPI(cpu, VIC_CPU_BOOT_CPI);
572 } else {
573 outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID);
574 /* here we're altering registers belonging to `cpu' */
575
576 outb(VIC_BOOT_INTERRUPT_MASK, 0x21);
577 /* now go back to our original identity */
578 outb(boot_cpu_id, VIC_PROCESSOR_ID);
579
580 /* and boot the CPU */
581
582 send_CPI((1 << cpu), VIC_CPU_BOOT_CPI);
583 }
584 cpu_booted_map = 0;
585 local_irq_restore(flags);
586
587 /* now wait for it to become ready (or timeout) */
588 for (timeout = 0; timeout < 50000; timeout++) {
589 if (cpu_booted_map)
590 break;
591 udelay(100);
592 }
593 /* reset the page table */
594 zap_low_mappings();
595
596 if (cpu_booted_map) {
597 VDEBUG(("CPU%d: Booted successfully, back in CPU %d\n",
598 cpu, smp_processor_id()));
599
600 printk("CPU%d: ", cpu);
601 print_cpu_info(&cpu_data(cpu));
602 wmb();
603 cpu_set(cpu, cpu_callout_map);
604 cpu_set(cpu, cpu_present_map);
605 } else {
606 printk("CPU%d FAILED TO BOOT: ", cpu);
607 if (*
608 ((volatile unsigned char *)phys_to_virt(start_phys_address))
609 == 0xA5)
610 printk("Stuck.\n");
611 else
612 printk("Not responding.\n");
613
614 cpucount--;
615 }
616}
617
618void __init smp_boot_cpus(void)
619{
620 int i;
621
622 /* CAT BUS initialisation must be done after the memory */
623 /* FIXME: The L4 has a catbus too, it just needs to be
624 * accessed in a totally different way */
625 if (voyager_level == 5) {
626 voyager_cat_init();
627
628 /* now that the cat has probed the Voyager System Bus, sanity
629 * check the cpu map */
630 if (((voyager_quad_processors | voyager_extended_vic_processors)
631 & cpus_addr(voyager_phys_cpu_present_map)[0]) !=
632 cpus_addr(voyager_phys_cpu_present_map)[0]) {
633 /* should panic */
634 printk("\n\n***WARNING*** "
635 "Sanity check of CPU present map FAILED\n");
636 }
637 } else if (voyager_level == 4)
638 voyager_extended_vic_processors =
639 cpus_addr(voyager_phys_cpu_present_map)[0];
640
641 /* this sets up the idle task to run on the current cpu */
642 voyager_extended_cpus = 1;
643 /* Remove the global_irq_holder setting, it triggers a BUG() on
644 * schedule at the moment */
645 //global_irq_holder = boot_cpu_id;
646
647 /* FIXME: Need to do something about this but currently only works
648 * on CPUs with a tsc which none of mine have.
649 smp_tune_scheduling();
650 */
651 smp_store_cpu_info(boot_cpu_id);
652 /* setup the jump vector */
653 initial_code = (unsigned long)initialize_secondary;
654 printk("CPU%d: ", boot_cpu_id);
655 print_cpu_info(&cpu_data(boot_cpu_id));
656
657 if (is_cpu_quad()) {
658 /* booting on a Quad CPU */
659 printk("VOYAGER SMP: Boot CPU is Quad\n");
660 qic_setup();
661 do_quad_bootstrap();
662 }
663
664 /* enable our own CPIs */
665 vic_enable_cpi();
666
667 cpu_set(boot_cpu_id, cpu_online_map);
668 cpu_set(boot_cpu_id, cpu_callout_map);
669
670 /* loop over all the extended VIC CPUs and boot them. The
671 * Quad CPUs must be bootstrapped by their extended VIC cpu */
672 for (i = 0; i < nr_cpu_ids; i++) {
673 if (i == boot_cpu_id || !cpu_isset(i, voyager_phys_cpu_present_map))
674 continue;
675 do_boot_cpu(i);
676 /* This udelay seems to be needed for the Quad boots
677 * don't remove unless you know what you're doing */
678 udelay(1000);
679 }
680 /* we could compute the total bogomips here, but why bother?,
681 * Code added from smpboot.c */
682 {
683 unsigned long bogosum = 0;
684
685 for_each_online_cpu(i)
686 bogosum += cpu_data(i).loops_per_jiffy;
687 printk(KERN_INFO "Total of %d processors activated "
688 "(%lu.%02lu BogoMIPS).\n",
689 cpucount + 1, bogosum / (500000 / HZ),
690 (bogosum / (5000 / HZ)) % 100);
691 }
692 voyager_extended_cpus = hweight32(voyager_extended_vic_processors);
693 printk("VOYAGER: Extended (interrupt handling CPUs): "
694 "%d, non-extended: %d\n", voyager_extended_cpus,
695 num_booting_cpus() - voyager_extended_cpus);
696 /* that's it, switch to symmetric mode */
697 outb(0, VIC_PRIORITY_REGISTER);
698 outb(0, VIC_CLAIM_REGISTER_0);
699 outb(0, VIC_CLAIM_REGISTER_1);
700
701 VDEBUG(("VOYAGER SMP: Booted with %d CPUs\n", num_booting_cpus()));
702}
703
704/* Reload the secondary CPUs task structure (this function does not
705 * return ) */
706static void __init initialize_secondary(void)
707{
708#if 0
709 // AC kernels only
710 set_current(hard_get_current());
711#endif
712
713 /*
714 * We don't actually need to load the full TSS,
715 * basically just the stack pointer and the eip.
716 */
717
718 asm volatile ("movl %0,%%esp\n\t"
719 "jmp *%1"::"r" (current->thread.sp),
720 "r"(current->thread.ip));
721}
722
723/* handle a Voyager SYS_INT -- If we don't, the base board will
724 * panic the system.
725 *
726 * System interrupts occur because some problem was detected on the
727 * various busses. To find out what you have to probe all the
728 * hardware via the CAT bus. FIXME: At the moment we do nothing. */
729void smp_vic_sys_interrupt(struct pt_regs *regs)
730{
731 ack_CPI(VIC_SYS_INT);
732 printk("Voyager SYSTEM INTERRUPT\n");
733}
734
735/* Handle a voyager CMN_INT; These interrupts occur either because of
736 * a system status change or because a single bit memory error
737 * occurred. FIXME: At the moment, ignore all this. */
738void smp_vic_cmn_interrupt(struct pt_regs *regs)
739{
740 static __u8 in_cmn_int = 0;
741 static DEFINE_SPINLOCK(cmn_int_lock);
742
743 /* common ints are broadcast, so make sure we only do this once */
744 _raw_spin_lock(&cmn_int_lock);
745 if (in_cmn_int)
746 goto unlock_end;
747
748 in_cmn_int++;
749 _raw_spin_unlock(&cmn_int_lock);
750
751 VDEBUG(("Voyager COMMON INTERRUPT\n"));
752
753 if (voyager_level == 5)
754 voyager_cat_do_common_interrupt();
755
756 _raw_spin_lock(&cmn_int_lock);
757 in_cmn_int = 0;
758 unlock_end:
759 _raw_spin_unlock(&cmn_int_lock);
760 ack_CPI(VIC_CMN_INT);
761}
762
763/*
764 * Reschedule call back. Nothing to do, all the work is done
765 * automatically when we return from the interrupt. */
766static void smp_reschedule_interrupt(void)
767{
768 /* do nothing */
769}
770
771static struct mm_struct *flush_mm;
772static unsigned long flush_va;
773static DEFINE_SPINLOCK(tlbstate_lock);
774
775/*
776 * We cannot call mmdrop() because we are in interrupt context,
777 * instead update mm->cpu_vm_mask.
778 *
779 * We need to reload %cr3 since the page tables may be going
780 * away from under us..
781 */
782static inline void voyager_leave_mm(unsigned long cpu)
783{
784 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
785 BUG();
786 cpu_clear(cpu, per_cpu(cpu_tlbstate, cpu).active_mm->cpu_vm_mask);
787 load_cr3(swapper_pg_dir);
788}
789
790/*
791 * Invalidate call-back
792 */
793static void smp_invalidate_interrupt(void)
794{
795 __u8 cpu = smp_processor_id();
796
797 if (!test_bit(cpu, &smp_invalidate_needed))
798 return;
799 /* This will flood messages. Don't uncomment unless you see
800 * Problems with cross cpu invalidation
801 VDEBUG(("VOYAGER SMP: CPU%d received INVALIDATE_CPI\n",
802 smp_processor_id()));
803 */
804
805 if (flush_mm == per_cpu(cpu_tlbstate, cpu).active_mm) {
806 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK) {
807 if (flush_va == TLB_FLUSH_ALL)
808 local_flush_tlb();
809 else
810 __flush_tlb_one(flush_va);
811 } else
812 voyager_leave_mm(cpu);
813 }
814 smp_mb__before_clear_bit();
815 clear_bit(cpu, &smp_invalidate_needed);
816 smp_mb__after_clear_bit();
817}
818
819/* All the new flush operations for 2.4 */
820
821/* This routine is called with a physical cpu mask */
822static void
823voyager_flush_tlb_others(unsigned long cpumask, struct mm_struct *mm,
824 unsigned long va)
825{
826 int stuck = 50000;
827
828 if (!cpumask)
829 BUG();
830 if ((cpumask & cpus_addr(cpu_online_map)[0]) != cpumask)
831 BUG();
832 if (cpumask & (1 << smp_processor_id()))
833 BUG();
834 if (!mm)
835 BUG();
836
837 spin_lock(&tlbstate_lock);
838
839 flush_mm = mm;
840 flush_va = va;
841 atomic_set_mask(cpumask, &smp_invalidate_needed);
842 /*
843 * We have to send the CPI only to
844 * CPUs affected.
845 */
846 send_CPI(cpumask, VIC_INVALIDATE_CPI);
847
848 while (smp_invalidate_needed) {
849 mb();
850 if (--stuck == 0) {
851 printk("***WARNING*** Stuck doing invalidate CPI "
852 "(CPU%d)\n", smp_processor_id());
853 break;
854 }
855 }
856
857 /* Uncomment only to debug invalidation problems
858 VDEBUG(("VOYAGER SMP: Completed invalidate CPI (CPU%d)\n", cpu));
859 */
860
861 flush_mm = NULL;
862 flush_va = 0;
863 spin_unlock(&tlbstate_lock);
864}
865
866void flush_tlb_current_task(void)
867{
868 struct mm_struct *mm = current->mm;
869 unsigned long cpu_mask;
870
871 preempt_disable();
872
873 cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
874 local_flush_tlb();
875 if (cpu_mask)
876 voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
877
878 preempt_enable();
879}
880
881void flush_tlb_mm(struct mm_struct *mm)
882{
883 unsigned long cpu_mask;
884
885 preempt_disable();
886
887 cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
888
889 if (current->active_mm == mm) {
890 if (current->mm)
891 local_flush_tlb();
892 else
893 voyager_leave_mm(smp_processor_id());
894 }
895 if (cpu_mask)
896 voyager_flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL);
897
898 preempt_enable();
899}
900
901void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
902{
903 struct mm_struct *mm = vma->vm_mm;
904 unsigned long cpu_mask;
905
906 preempt_disable();
907
908 cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id());
909 if (current->active_mm == mm) {
910 if (current->mm)
911 __flush_tlb_one(va);
912 else
913 voyager_leave_mm(smp_processor_id());
914 }
915
916 if (cpu_mask)
917 voyager_flush_tlb_others(cpu_mask, mm, va);
918
919 preempt_enable();
920}
921
922EXPORT_SYMBOL(flush_tlb_page);
923
924/* enable the requested IRQs */
925static void smp_enable_irq_interrupt(void)
926{
927 __u8 irq;
928 __u8 cpu = get_cpu();
929
930 VDEBUG(("VOYAGER SMP: CPU%d enabling irq mask 0x%x\n", cpu,
931 vic_irq_enable_mask[cpu]));
932
933 spin_lock(&vic_irq_lock);
934 for (irq = 0; irq < 16; irq++) {
935 if (vic_irq_enable_mask[cpu] & (1 << irq))
936 enable_local_vic_irq(irq);
937 }
938 vic_irq_enable_mask[cpu] = 0;
939 spin_unlock(&vic_irq_lock);
940
941 put_cpu_no_resched();
942}
943
944/*
945 * CPU halt call-back
946 */
947static void smp_stop_cpu_function(void *dummy)
948{
949 VDEBUG(("VOYAGER SMP: CPU%d is STOPPING\n", smp_processor_id()));
950 cpu_clear(smp_processor_id(), cpu_online_map);
951 local_irq_disable();
952 for (;;)
953 halt();
954}
955
956/* execute a thread on a new CPU. The function to be called must be
957 * previously set up. This is used to schedule a function for
958 * execution on all CPUs - set up the function then broadcast a
959 * function_interrupt CPI to come here on each CPU */
960static void smp_call_function_interrupt(void)
961{
962 irq_enter();
963 generic_smp_call_function_interrupt();
964 __get_cpu_var(irq_stat).irq_call_count++;
965 irq_exit();
966}
967
968static void smp_call_function_single_interrupt(void)
969{
970 irq_enter();
971 generic_smp_call_function_single_interrupt();
972 __get_cpu_var(irq_stat).irq_call_count++;
973 irq_exit();
974}
975
976/* Sorry about the name. In an APIC based system, the APICs
977 * themselves are programmed to send a timer interrupt. This is used
978 * by linux to reschedule the processor. Voyager doesn't have this,
979 * so we use the system clock to interrupt one processor, which in
980 * turn, broadcasts a timer CPI to all the others --- we receive that
981 * CPI here. We don't use this actually for counting so losing
982 * ticks doesn't matter
983 *
984 * FIXME: For those CPUs which actually have a local APIC, we could
985 * try to use it to trigger this interrupt instead of having to
986 * broadcast the timer tick. Unfortunately, all my pentium DYADs have
987 * no local APIC, so I can't do this
988 *
989 * This function is currently a placeholder and is unused in the code */
990void smp_apic_timer_interrupt(struct pt_regs *regs)
991{
992 struct pt_regs *old_regs = set_irq_regs(regs);
993 wrapper_smp_local_timer_interrupt();
994 set_irq_regs(old_regs);
995}
996
997/* All of the QUAD interrupt GATES */
998void smp_qic_timer_interrupt(struct pt_regs *regs)
999{
1000 struct pt_regs *old_regs = set_irq_regs(regs);
1001 ack_QIC_CPI(QIC_TIMER_CPI);
1002 wrapper_smp_local_timer_interrupt();
1003 set_irq_regs(old_regs);
1004}
1005
1006void smp_qic_invalidate_interrupt(struct pt_regs *regs)
1007{
1008 ack_QIC_CPI(QIC_INVALIDATE_CPI);
1009 smp_invalidate_interrupt();
1010}
1011
1012void smp_qic_reschedule_interrupt(struct pt_regs *regs)
1013{
1014 ack_QIC_CPI(QIC_RESCHEDULE_CPI);
1015 smp_reschedule_interrupt();
1016}
1017
1018void smp_qic_enable_irq_interrupt(struct pt_regs *regs)
1019{
1020 ack_QIC_CPI(QIC_ENABLE_IRQ_CPI);
1021 smp_enable_irq_interrupt();
1022}
1023
1024void smp_qic_call_function_interrupt(struct pt_regs *regs)
1025{
1026 ack_QIC_CPI(QIC_CALL_FUNCTION_CPI);
1027 smp_call_function_interrupt();
1028}
1029
1030void smp_qic_call_function_single_interrupt(struct pt_regs *regs)
1031{
1032 ack_QIC_CPI(QIC_CALL_FUNCTION_SINGLE_CPI);
1033 smp_call_function_single_interrupt();
1034}
1035
1036void smp_vic_cpi_interrupt(struct pt_regs *regs)
1037{
1038 struct pt_regs *old_regs = set_irq_regs(regs);
1039 __u8 cpu = smp_processor_id();
1040
1041 if (is_cpu_quad())
1042 ack_QIC_CPI(VIC_CPI_LEVEL0);
1043 else
1044 ack_VIC_CPI(VIC_CPI_LEVEL0);
1045
1046 if (test_and_clear_bit(VIC_TIMER_CPI, &vic_cpi_mailbox[cpu]))
1047 wrapper_smp_local_timer_interrupt();
1048 if (test_and_clear_bit(VIC_INVALIDATE_CPI, &vic_cpi_mailbox[cpu]))
1049 smp_invalidate_interrupt();
1050 if (test_and_clear_bit(VIC_RESCHEDULE_CPI, &vic_cpi_mailbox[cpu]))
1051 smp_reschedule_interrupt();
1052 if (test_and_clear_bit(VIC_ENABLE_IRQ_CPI, &vic_cpi_mailbox[cpu]))
1053 smp_enable_irq_interrupt();
1054 if (test_and_clear_bit(VIC_CALL_FUNCTION_CPI, &vic_cpi_mailbox[cpu]))
1055 smp_call_function_interrupt();
1056 if (test_and_clear_bit(VIC_CALL_FUNCTION_SINGLE_CPI, &vic_cpi_mailbox[cpu]))
1057 smp_call_function_single_interrupt();
1058 set_irq_regs(old_regs);
1059}
1060
1061static void do_flush_tlb_all(void *info)
1062{
1063 unsigned long cpu = smp_processor_id();
1064
1065 __flush_tlb_all();
1066 if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_LAZY)
1067 voyager_leave_mm(cpu);
1068}
1069
1070/* flush the TLB of every active CPU in the system */
1071void flush_tlb_all(void)
1072{
1073 on_each_cpu(do_flush_tlb_all, 0, 1);
1074}
1075
1076/* send a reschedule CPI to one CPU by physical CPU number*/
1077static void voyager_smp_send_reschedule(int cpu)
1078{
1079 send_one_CPI(cpu, VIC_RESCHEDULE_CPI);
1080}
1081
1082int hard_smp_processor_id(void)
1083{
1084 __u8 i;
1085 __u8 cpumask = inb(VIC_PROC_WHO_AM_I);
1086 if ((cpumask & QUAD_IDENTIFIER) == QUAD_IDENTIFIER)
1087 return cpumask & 0x1F;
1088
1089 for (i = 0; i < 8; i++) {
1090 if (cpumask & (1 << i))
1091 return i;
1092 }
1093 printk("** WARNING ** Illegal cpuid returned by VIC: %d", cpumask);
1094 return 0;
1095}
1096
1097int safe_smp_processor_id(void)
1098{
1099 return hard_smp_processor_id();
1100}
1101
1102/* broadcast a halt to all other CPUs */
1103static void voyager_smp_send_stop(void)
1104{
1105 smp_call_function(smp_stop_cpu_function, NULL, 1);
1106}
1107
1108/* this function is triggered in time.c when a clock tick fires
1109 * we need to re-broadcast the tick to all CPUs */
1110void smp_vic_timer_interrupt(void)
1111{
1112 send_CPI_allbutself(VIC_TIMER_CPI);
1113 smp_local_timer_interrupt();
1114}
1115
1116/* local (per CPU) timer interrupt. It does both profiling and
1117 * process statistics/rescheduling.
1118 *
1119 * We do profiling in every local tick, statistics/rescheduling
1120 * happen only every 'profiling multiplier' ticks. The default
1121 * multiplier is 1 and it can be changed by writing the new multiplier
1122 * value into /proc/profile.
1123 */
1124void smp_local_timer_interrupt(void)
1125{
1126 int cpu = smp_processor_id();
1127 long weight;
1128
1129 profile_tick(CPU_PROFILING);
1130 if (--per_cpu(prof_counter, cpu) <= 0) {
1131 /*
1132 * The multiplier may have changed since the last time we got
1133 * to this point as a result of the user writing to
1134 * /proc/profile. In this case we need to adjust the APIC
1135 * timer accordingly.
1136 *
1137 * Interrupts are already masked off at this point.
1138 */
1139 per_cpu(prof_counter, cpu) = per_cpu(prof_multiplier, cpu);
1140 if (per_cpu(prof_counter, cpu) !=
1141 per_cpu(prof_old_multiplier, cpu)) {
1142 /* FIXME: need to update the vic timer tick here */
1143 per_cpu(prof_old_multiplier, cpu) =
1144 per_cpu(prof_counter, cpu);
1145 }
1146
1147 update_process_times(user_mode_vm(get_irq_regs()));
1148 }
1149
1150 if (((1 << cpu) & voyager_extended_vic_processors) == 0)
1151 /* only extended VIC processors participate in
1152 * interrupt distribution */
1153 return;
1154
1155 /*
1156 * We take the 'long' return path, and there every subsystem
1157 * grabs the appropriate locks (kernel lock/ irq lock).
1158 *
1159 * we might want to decouple profiling from the 'long path',
1160 * and do the profiling totally in assembly.
1161 *
1162 * Currently this isn't too much of an issue (performance wise),
1163 * we can take more than 100K local irqs per second on a 100 MHz P5.
1164 */
1165
1166 if ((++vic_tick[cpu] & 0x7) != 0)
1167 return;
1168 /* get here every 16 ticks (about every 1/6 of a second) */
1169
1170 /* Change our priority to give someone else a chance at getting
1171 * the IRQ. The algorithm goes like this:
1172 *
1173 * In the VIC, the dynamically routed interrupt is always
1174 * handled by the lowest priority eligible (i.e. receiving
1175 * interrupts) CPU. If >1 eligible CPUs are equal lowest, the
1176 * lowest processor number gets it.
1177 *
1178 * The priority of a CPU is controlled by a special per-CPU
1179 * VIC priority register which is 3 bits wide 0 being lowest
1180 * and 7 highest priority..
1181 *
1182 * Therefore we subtract the average number of interrupts from
1183 * the number we've fielded. If this number is negative, we
1184 * lower the activity count and if it is positive, we raise
1185 * it.
1186 *
1187 * I'm afraid this still leads to odd looking interrupt counts:
1188 * the totals are all roughly equal, but the individual ones
1189 * look rather skewed.
1190 *
1191 * FIXME: This algorithm is total crap when mixed with SMP
1192 * affinity code since we now try to even up the interrupt
1193 * counts when an affinity binding is keeping them on a
1194 * particular CPU*/
1195 weight = (vic_intr_count[cpu] * voyager_extended_cpus
1196 - vic_intr_total) >> 4;
1197 weight += 4;
1198 if (weight > 7)
1199 weight = 7;
1200 if (weight < 0)
1201 weight = 0;
1202
1203 outb((__u8) weight, VIC_PRIORITY_REGISTER);
1204
1205#ifdef VOYAGER_DEBUG
1206 if ((vic_tick[cpu] & 0xFFF) == 0) {
1207 /* print this message roughly every 25 secs */
1208 printk("VOYAGER SMP: vic_tick[%d] = %lu, weight = %ld\n",
1209 cpu, vic_tick[cpu], weight);
1210 }
1211#endif
1212}
1213
1214/* setup the profiling timer */
1215int setup_profiling_timer(unsigned int multiplier)
1216{
1217 int i;
1218
1219 if ((!multiplier))
1220 return -EINVAL;
1221
1222 /*
1223 * Set the new multiplier for each CPU. CPUs don't start using the
1224 * new values until the next timer interrupt in which they do process
1225 * accounting.
1226 */
1227 for (i = 0; i < nr_cpu_ids; ++i)
1228 per_cpu(prof_multiplier, i) = multiplier;
1229
1230 return 0;
1231}
1232
1233/* This is a bit of a mess, but forced on us by the genirq changes
1234 * there's no genirq handler that really does what voyager wants
1235 * so hack it up with the simple IRQ handler */
1236static void handle_vic_irq(unsigned int irq, struct irq_desc *desc)
1237{
1238 before_handle_vic_irq(irq);
1239 handle_simple_irq(irq, desc);
1240 after_handle_vic_irq(irq);
1241}
1242
1243/* The CPIs are handled in the per cpu 8259s, so they must be
1244 * enabled to be received: FIX: enabling the CPIs in the early
1245 * boot sequence interferes with bug checking; enable them later
1246 * on in smp_init */
1247#define VIC_SET_GATE(cpi, vector) \
1248 set_intr_gate((cpi) + VIC_DEFAULT_CPI_BASE, (vector))
1249#define QIC_SET_GATE(cpi, vector) \
1250 set_intr_gate((cpi) + QIC_DEFAULT_CPI_BASE, (vector))
1251
1252void __init voyager_smp_intr_init(void)
1253{
1254 int i;
1255
1256 /* initialize the per cpu irq mask to all disabled */
1257 for (i = 0; i < nr_cpu_ids; i++)
1258 vic_irq_mask[i] = 0xFFFF;
1259
1260 VIC_SET_GATE(VIC_CPI_LEVEL0, vic_cpi_interrupt);
1261
1262 VIC_SET_GATE(VIC_SYS_INT, vic_sys_interrupt);
1263 VIC_SET_GATE(VIC_CMN_INT, vic_cmn_interrupt);
1264
1265 QIC_SET_GATE(QIC_TIMER_CPI, qic_timer_interrupt);
1266 QIC_SET_GATE(QIC_INVALIDATE_CPI, qic_invalidate_interrupt);
1267 QIC_SET_GATE(QIC_RESCHEDULE_CPI, qic_reschedule_interrupt);
1268 QIC_SET_GATE(QIC_ENABLE_IRQ_CPI, qic_enable_irq_interrupt);
1269 QIC_SET_GATE(QIC_CALL_FUNCTION_CPI, qic_call_function_interrupt);
1270
1271 /* now put the VIC descriptor into the first 48 IRQs
1272 *
1273 * This is for later: first 16 correspond to PC IRQs; next 16
1274 * are Primary MC IRQs and final 16 are Secondary MC IRQs */
1275 for (i = 0; i < 48; i++)
1276 set_irq_chip_and_handler(i, &vic_chip, handle_vic_irq);
1277}
1278
1279/* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per
1280 * processor to receive CPI */
1281static void send_CPI(__u32 cpuset, __u8 cpi)
1282{
1283 int cpu;
1284 __u32 quad_cpuset = (cpuset & voyager_quad_processors);
1285
1286 if (cpi < VIC_START_FAKE_CPI) {
1287 /* fake CPI are only used for booting, so send to the
1288 * extended quads as well---Quads must be VIC booted */
1289 outb((__u8) (cpuset), VIC_CPI_Registers[cpi]);
1290 return;
1291 }
1292 if (quad_cpuset)
1293 send_QIC_CPI(quad_cpuset, cpi);
1294 cpuset &= ~quad_cpuset;
1295 cpuset &= 0xff; /* only first 8 CPUs vaild for VIC CPI */
1296 if (cpuset == 0)
1297 return;
1298 for_each_online_cpu(cpu) {
1299 if (cpuset & (1 << cpu))
1300 set_bit(cpi, &vic_cpi_mailbox[cpu]);
1301 }
1302 if (cpuset)
1303 outb((__u8) cpuset, VIC_CPI_Registers[VIC_CPI_LEVEL0]);
1304}
1305
1306/* Acknowledge receipt of CPI in the QIC, clear in QIC hardware and
1307 * set the cache line to shared by reading it.
1308 *
1309 * DON'T make this inline otherwise the cache line read will be
1310 * optimised away
1311 * */
1312static int ack_QIC_CPI(__u8 cpi)
1313{
1314 __u8 cpu = hard_smp_processor_id();
1315
1316 cpi &= 7;
1317
1318 outb(1 << cpi, QIC_INTERRUPT_CLEAR1);
1319 return voyager_quad_cpi_addr[cpu]->qic_cpi[cpi].cpi;
1320}
1321
1322static void ack_special_QIC_CPI(__u8 cpi)
1323{
1324 switch (cpi) {
1325 case VIC_CMN_INT:
1326 outb(QIC_CMN_INT, QIC_INTERRUPT_CLEAR0);
1327 break;
1328 case VIC_SYS_INT:
1329 outb(QIC_SYS_INT, QIC_INTERRUPT_CLEAR0);
1330 break;
1331 }
1332 /* also clear at the VIC, just in case (nop for non-extended proc) */
1333 ack_VIC_CPI(cpi);
1334}
1335
1336/* Acknowledge receipt of CPI in the VIC (essentially an EOI) */
1337static void ack_VIC_CPI(__u8 cpi)
1338{
1339#ifdef VOYAGER_DEBUG
1340 unsigned long flags;
1341 __u16 isr;
1342 __u8 cpu = smp_processor_id();
1343
1344 local_irq_save(flags);
1345 isr = vic_read_isr();
1346 if ((isr & (1 << (cpi & 7))) == 0) {
1347 printk("VOYAGER SMP: CPU%d lost CPI%d\n", cpu, cpi);
1348 }
1349#endif
1350 /* send specific EOI; the two system interrupts have
1351 * bit 4 set for a separate vector but behave as the
1352 * corresponding 3 bit intr */
1353 outb_p(0x60 | (cpi & 7), 0x20);
1354
1355#ifdef VOYAGER_DEBUG
1356 if ((vic_read_isr() & (1 << (cpi & 7))) != 0) {
1357 printk("VOYAGER SMP: CPU%d still asserting CPI%d\n", cpu, cpi);
1358 }
1359 local_irq_restore(flags);
1360#endif
1361}
1362
1363/* cribbed with thanks from irq.c */
1364#define __byte(x,y) (((unsigned char *)&(y))[x])
1365#define cached_21(cpu) (__byte(0,vic_irq_mask[cpu]))
1366#define cached_A1(cpu) (__byte(1,vic_irq_mask[cpu]))
1367
1368static unsigned int startup_vic_irq(unsigned int irq)
1369{
1370 unmask_vic_irq(irq);
1371
1372 return 0;
1373}
1374
1375/* The enable and disable routines. This is where we run into
1376 * conflicting architectural philosophy. Fundamentally, the voyager
1377 * architecture does not expect to have to disable interrupts globally
1378 * (the IRQ controllers belong to each CPU). The processor masquerade
1379 * which is used to start the system shouldn't be used in a running OS
1380 * since it will cause great confusion if two separate CPUs drive to
1381 * the same IRQ controller (I know, I've tried it).
1382 *
1383 * The solution is a variant on the NCR lazy SPL design:
1384 *
1385 * 1) To disable an interrupt, do nothing (other than set the
1386 * IRQ_DISABLED flag). This dares the interrupt actually to arrive.
1387 *
1388 * 2) If the interrupt dares to come in, raise the local mask against
1389 * it (this will result in all the CPU masks being raised
1390 * eventually).
1391 *
1392 * 3) To enable the interrupt, lower the mask on the local CPU and
1393 * broadcast an Interrupt enable CPI which causes all other CPUs to
1394 * adjust their masks accordingly. */
1395
1396static void unmask_vic_irq(unsigned int irq)
1397{
1398 /* linux doesn't to processor-irq affinity, so enable on
1399 * all CPUs we know about */
1400 int cpu = smp_processor_id(), real_cpu;
1401 __u16 mask = (1 << irq);
1402 __u32 processorList = 0;
1403 unsigned long flags;
1404
1405 VDEBUG(("VOYAGER: unmask_vic_irq(%d) CPU%d affinity 0x%lx\n",
1406 irq, cpu, cpu_irq_affinity[cpu]));
1407 spin_lock_irqsave(&vic_irq_lock, flags);
1408 for_each_online_cpu(real_cpu) {
1409 if (!(voyager_extended_vic_processors & (1 << real_cpu)))
1410 continue;
1411 if (!(cpu_irq_affinity[real_cpu] & mask)) {
1412 /* irq has no affinity for this CPU, ignore */
1413 continue;
1414 }
1415 if (real_cpu == cpu) {
1416 enable_local_vic_irq(irq);
1417 } else if (vic_irq_mask[real_cpu] & mask) {
1418 vic_irq_enable_mask[real_cpu] |= mask;
1419 processorList |= (1 << real_cpu);
1420 }
1421 }
1422 spin_unlock_irqrestore(&vic_irq_lock, flags);
1423 if (processorList)
1424 send_CPI(processorList, VIC_ENABLE_IRQ_CPI);
1425}
1426
1427static void mask_vic_irq(unsigned int irq)
1428{
1429 /* lazy disable, do nothing */
1430}
1431
1432static void enable_local_vic_irq(unsigned int irq)
1433{
1434 __u8 cpu = smp_processor_id();
1435 __u16 mask = ~(1 << irq);
1436 __u16 old_mask = vic_irq_mask[cpu];
1437
1438 vic_irq_mask[cpu] &= mask;
1439 if (vic_irq_mask[cpu] == old_mask)
1440 return;
1441
1442 VDEBUG(("VOYAGER DEBUG: Enabling irq %d in hardware on CPU %d\n",
1443 irq, cpu));
1444
1445 if (irq & 8) {
1446 outb_p(cached_A1(cpu), 0xA1);
1447 (void)inb_p(0xA1);
1448 } else {
1449 outb_p(cached_21(cpu), 0x21);
1450 (void)inb_p(0x21);
1451 }
1452}
1453
1454static void disable_local_vic_irq(unsigned int irq)
1455{
1456 __u8 cpu = smp_processor_id();
1457 __u16 mask = (1 << irq);
1458 __u16 old_mask = vic_irq_mask[cpu];
1459
1460 if (irq == 7)
1461 return;
1462
1463 vic_irq_mask[cpu] |= mask;
1464 if (old_mask == vic_irq_mask[cpu])
1465 return;
1466
1467 VDEBUG(("VOYAGER DEBUG: Disabling irq %d in hardware on CPU %d\n",
1468 irq, cpu));
1469
1470 if (irq & 8) {
1471 outb_p(cached_A1(cpu), 0xA1);
1472 (void)inb_p(0xA1);
1473 } else {
1474 outb_p(cached_21(cpu), 0x21);
1475 (void)inb_p(0x21);
1476 }
1477}
1478
1479/* The VIC is level triggered, so the ack can only be issued after the
1480 * interrupt completes. However, we do Voyager lazy interrupt
1481 * handling here: It is an extremely expensive operation to mask an
1482 * interrupt in the vic, so we merely set a flag (IRQ_DISABLED). If
1483 * this interrupt actually comes in, then we mask and ack here to push
1484 * the interrupt off to another CPU */
1485static void before_handle_vic_irq(unsigned int irq)
1486{
1487 irq_desc_t *desc = irq_to_desc(irq);
1488 __u8 cpu = smp_processor_id();
1489
1490 _raw_spin_lock(&vic_irq_lock);
1491 vic_intr_total++;
1492 vic_intr_count[cpu]++;
1493
1494 if (!(cpu_irq_affinity[cpu] & (1 << irq))) {
1495 /* The irq is not in our affinity mask, push it off
1496 * onto another CPU */
1497 VDEBUG(("VOYAGER DEBUG: affinity triggered disable of irq %d "
1498 "on cpu %d\n", irq, cpu));
1499 disable_local_vic_irq(irq);
1500 /* set IRQ_INPROGRESS to prevent the handler in irq.c from
1501 * actually calling the interrupt routine */
1502 desc->status |= IRQ_REPLAY | IRQ_INPROGRESS;
1503 } else if (desc->status & IRQ_DISABLED) {
1504 /* Damn, the interrupt actually arrived, do the lazy
1505 * disable thing. The interrupt routine in irq.c will
1506 * not handle a IRQ_DISABLED interrupt, so nothing more
1507 * need be done here */
1508 VDEBUG(("VOYAGER DEBUG: lazy disable of irq %d on CPU %d\n",
1509 irq, cpu));
1510 disable_local_vic_irq(irq);
1511 desc->status |= IRQ_REPLAY;
1512 } else {
1513 desc->status &= ~IRQ_REPLAY;
1514 }
1515
1516 _raw_spin_unlock(&vic_irq_lock);
1517}
1518
1519/* Finish the VIC interrupt: basically mask */
1520static void after_handle_vic_irq(unsigned int irq)
1521{
1522 irq_desc_t *desc = irq_to_desc(irq);
1523
1524 _raw_spin_lock(&vic_irq_lock);
1525 {
1526 unsigned int status = desc->status & ~IRQ_INPROGRESS;
1527#ifdef VOYAGER_DEBUG
1528 __u16 isr;
1529#endif
1530
1531 desc->status = status;
1532 if ((status & IRQ_DISABLED))
1533 disable_local_vic_irq(irq);
1534#ifdef VOYAGER_DEBUG
1535 /* DEBUG: before we ack, check what's in progress */
1536 isr = vic_read_isr();
1537 if ((isr & (1 << irq) && !(status & IRQ_REPLAY)) == 0) {
1538 int i;
1539 __u8 cpu = smp_processor_id();
1540 __u8 real_cpu;
1541 int mask; /* Um... initialize me??? --RR */
1542
1543 printk("VOYAGER SMP: CPU%d lost interrupt %d\n",
1544 cpu, irq);
1545 for_each_possible_cpu(real_cpu, mask) {
1546
1547 outb(VIC_CPU_MASQUERADE_ENABLE | real_cpu,
1548 VIC_PROCESSOR_ID);
1549 isr = vic_read_isr();
1550 if (isr & (1 << irq)) {
1551 printk
1552 ("VOYAGER SMP: CPU%d ack irq %d\n",
1553 real_cpu, irq);
1554 ack_vic_irq(irq);
1555 }
1556 outb(cpu, VIC_PROCESSOR_ID);
1557 }
1558 }
1559#endif /* VOYAGER_DEBUG */
1560 /* as soon as we ack, the interrupt is eligible for
1561 * receipt by another CPU so everything must be in
1562 * order here */
1563 ack_vic_irq(irq);
1564 if (status & IRQ_REPLAY) {
1565 /* replay is set if we disable the interrupt
1566 * in the before_handle_vic_irq() routine, so
1567 * clear the in progress bit here to allow the
1568 * next CPU to handle this correctly */
1569 desc->status &= ~(IRQ_REPLAY | IRQ_INPROGRESS);
1570 }
1571#ifdef VOYAGER_DEBUG
1572 isr = vic_read_isr();
1573 if ((isr & (1 << irq)) != 0)
1574 printk("VOYAGER SMP: after_handle_vic_irq() after "
1575 "ack irq=%d, isr=0x%x\n", irq, isr);
1576#endif /* VOYAGER_DEBUG */
1577 }
1578 _raw_spin_unlock(&vic_irq_lock);
1579
1580 /* All code after this point is out of the main path - the IRQ
1581 * may be intercepted by another CPU if reasserted */
1582}
1583
1584/* Linux processor - interrupt affinity manipulations.
1585 *
1586 * For each processor, we maintain a 32 bit irq affinity mask.
1587 * Initially it is set to all 1's so every processor accepts every
1588 * interrupt. In this call, we change the processor's affinity mask:
1589 *
1590 * Change from enable to disable:
1591 *
1592 * If the interrupt ever comes in to the processor, we will disable it
1593 * and ack it to push it off to another CPU, so just accept the mask here.
1594 *
1595 * Change from disable to enable:
1596 *
1597 * change the mask and then do an interrupt enable CPI to re-enable on
1598 * the selected processors */
1599
1600void set_vic_irq_affinity(unsigned int irq, const struct cpumask *mask)
1601{
1602 /* Only extended processors handle interrupts */
1603 unsigned long real_mask;
1604 unsigned long irq_mask = 1 << irq;
1605 int cpu;
1606
1607 real_mask = cpus_addr(*mask)[0] & voyager_extended_vic_processors;
1608
1609 if (cpus_addr(*mask)[0] == 0)
1610 /* can't have no CPUs to accept the interrupt -- extremely
1611 * bad things will happen */
1612 return;
1613
1614 if (irq == 0)
1615 /* can't change the affinity of the timer IRQ. This
1616 * is due to the constraint in the voyager
1617 * architecture that the CPI also comes in on and IRQ
1618 * line and we have chosen IRQ0 for this. If you
1619 * raise the mask on this interrupt, the processor
1620 * will no-longer be able to accept VIC CPIs */
1621 return;
1622
1623 if (irq >= 32)
1624 /* You can only have 32 interrupts in a voyager system
1625 * (and 32 only if you have a secondary microchannel
1626 * bus) */
1627 return;
1628
1629 for_each_online_cpu(cpu) {
1630 unsigned long cpu_mask = 1 << cpu;
1631
1632 if (cpu_mask & real_mask) {
1633 /* enable the interrupt for this cpu */
1634 cpu_irq_affinity[cpu] |= irq_mask;
1635 } else {
1636 /* disable the interrupt for this cpu */
1637 cpu_irq_affinity[cpu] &= ~irq_mask;
1638 }
1639 }
1640 /* this is magic, we now have the correct affinity maps, so
1641 * enable the interrupt. This will send an enable CPI to
1642 * those CPUs who need to enable it in their local masks,
1643 * causing them to correct for the new affinity . If the
1644 * interrupt is currently globally disabled, it will simply be
1645 * disabled again as it comes in (voyager lazy disable). If
1646 * the affinity map is tightened to disable the interrupt on a
1647 * cpu, it will be pushed off when it comes in */
1648 unmask_vic_irq(irq);
1649}
1650
1651static void ack_vic_irq(unsigned int irq)
1652{
1653 if (irq & 8) {
1654 outb(0x62, 0x20); /* Specific EOI to cascade */
1655 outb(0x60 | (irq & 7), 0xA0);
1656 } else {
1657 outb(0x60 | (irq & 7), 0x20);
1658 }
1659}
1660
1661/* enable the CPIs. In the VIC, the CPIs are delivered by the 8259
1662 * but are not vectored by it. This means that the 8259 mask must be
1663 * lowered to receive them */
1664static __init void vic_enable_cpi(void)
1665{
1666 __u8 cpu = smp_processor_id();
1667
1668 /* just take a copy of the current mask (nop for boot cpu) */
1669 vic_irq_mask[cpu] = vic_irq_mask[boot_cpu_id];
1670
1671 enable_local_vic_irq(VIC_CPI_LEVEL0);
1672 enable_local_vic_irq(VIC_CPI_LEVEL1);
1673 /* for sys int and cmn int */
1674 enable_local_vic_irq(7);
1675
1676 if (is_cpu_quad()) {
1677 outb(QIC_DEFAULT_MASK0, QIC_MASK_REGISTER0);
1678 outb(QIC_CPI_ENABLE, QIC_MASK_REGISTER1);
1679 VDEBUG(("VOYAGER SMP: QIC ENABLE CPI: CPU%d: MASK 0x%x\n",
1680 cpu, QIC_CPI_ENABLE));
1681 }
1682
1683 VDEBUG(("VOYAGER SMP: ENABLE CPI: CPU%d: MASK 0x%x\n",
1684 cpu, vic_irq_mask[cpu]));
1685}
1686
1687void voyager_smp_dump()
1688{
1689 int old_cpu = smp_processor_id(), cpu;
1690
1691 /* dump the interrupt masks of each processor */
1692 for_each_online_cpu(cpu) {
1693 __u16 imr, isr, irr;
1694 unsigned long flags;
1695
1696 local_irq_save(flags);
1697 outb(VIC_CPU_MASQUERADE_ENABLE | cpu, VIC_PROCESSOR_ID);
1698 imr = (inb(0xa1) << 8) | inb(0x21);
1699 outb(0x0a, 0xa0);
1700 irr = inb(0xa0) << 8;
1701 outb(0x0a, 0x20);
1702 irr |= inb(0x20);
1703 outb(0x0b, 0xa0);
1704 isr = inb(0xa0) << 8;
1705 outb(0x0b, 0x20);
1706 isr |= inb(0x20);
1707 outb(old_cpu, VIC_PROCESSOR_ID);
1708 local_irq_restore(flags);
1709 printk("\tCPU%d: mask=0x%x, IMR=0x%x, IRR=0x%x, ISR=0x%x\n",
1710 cpu, vic_irq_mask[cpu], imr, irr, isr);
1711#if 0
1712 /* These lines are put in to try to unstick an un ack'd irq */
1713 if (isr != 0) {
1714 int irq;
1715 for (irq = 0; irq < 16; irq++) {
1716 if (isr & (1 << irq)) {
1717 printk("\tCPU%d: ack irq %d\n",
1718 cpu, irq);
1719 local_irq_save(flags);
1720 outb(VIC_CPU_MASQUERADE_ENABLE | cpu,
1721 VIC_PROCESSOR_ID);
1722 ack_vic_irq(irq);
1723 outb(old_cpu, VIC_PROCESSOR_ID);
1724 local_irq_restore(flags);
1725 }
1726 }
1727 }
1728#endif
1729 }
1730}
1731
1732void smp_voyager_power_off(void *dummy)
1733{
1734 if (smp_processor_id() == boot_cpu_id)
1735 voyager_power_off();
1736 else
1737 smp_stop_cpu_function(NULL);
1738}
1739
1740static void __init voyager_smp_prepare_cpus(unsigned int max_cpus)
1741{
1742 /* FIXME: ignore max_cpus for now */
1743 smp_boot_cpus();
1744}
1745
1746static void __cpuinit voyager_smp_prepare_boot_cpu(void)
1747{
1748 init_gdt(smp_processor_id());
1749 switch_to_new_gdt();
1750
1751 cpu_online_map = cpumask_of_cpu(smp_processor_id());
1752 cpu_callout_map = cpumask_of_cpu(smp_processor_id());
1753 cpu_callin_map = CPU_MASK_NONE;
1754 cpu_present_map = cpumask_of_cpu(smp_processor_id());
1755
1756}
1757
1758static int __cpuinit voyager_cpu_up(unsigned int cpu)
1759{
1760 /* This only works at boot for x86. See "rewrite" above. */
1761 if (cpu_isset(cpu, smp_commenced_mask))
1762 return -ENOSYS;
1763
1764 /* In case one didn't come up */
1765 if (!cpu_isset(cpu, cpu_callin_map))
1766 return -EIO;
1767 /* Unleash the CPU! */
1768 cpu_set(cpu, smp_commenced_mask);
1769 while (!cpu_online(cpu))
1770 mb();
1771 return 0;
1772}
1773
1774static void __init voyager_smp_cpus_done(unsigned int max_cpus)
1775{
1776 zap_low_mappings();
1777}
1778
1779void __init smp_setup_processor_id(void)
1780{
1781 current_thread_info()->cpu = hard_smp_processor_id();
1782 x86_write_percpu(cpu_number, hard_smp_processor_id());
1783}
1784
1785static void voyager_send_call_func(const struct cpumask *callmask)
1786{
1787 __u32 mask = cpus_addr(*callmask)[0] & ~(1 << smp_processor_id());
1788 send_CPI(mask, VIC_CALL_FUNCTION_CPI);
1789}
1790
1791static void voyager_send_call_func_single(int cpu)
1792{
1793 send_CPI(1 << cpu, VIC_CALL_FUNCTION_SINGLE_CPI);
1794}
1795
1796struct smp_ops smp_ops = {
1797 .smp_prepare_boot_cpu = voyager_smp_prepare_boot_cpu,
1798 .smp_prepare_cpus = voyager_smp_prepare_cpus,
1799 .cpu_up = voyager_cpu_up,
1800 .smp_cpus_done = voyager_smp_cpus_done,
1801
1802 .smp_send_stop = voyager_smp_send_stop,
1803 .smp_send_reschedule = voyager_smp_send_reschedule,
1804
1805 .send_call_func_ipi = voyager_send_call_func,
1806 .send_call_func_single_ipi = voyager_send_call_func_single,
1807};
diff --git a/arch/x86/mach-voyager/voyager_thread.c b/arch/x86/mach-voyager/voyager_thread.c
deleted file mode 100644
index 15464a20fb38..000000000000
--- a/arch/x86/mach-voyager/voyager_thread.c
+++ /dev/null
@@ -1,128 +0,0 @@
1/* -*- mode: c; c-basic-offset: 8 -*- */
2
3/* Copyright (C) 2001
4 *
5 * Author: J.E.J.Bottomley@HansenPartnership.com
6 *
7 * This module provides the machine status monitor thread for the
8 * voyager architecture. This allows us to monitor the machine
9 * environment (temp, voltage, fan function) and the front panel and
10 * internal UPS. If a fault is detected, this thread takes corrective
11 * action (usually just informing init)
12 * */
13
14#include <linux/module.h>
15#include <linux/mm.h>
16#include <linux/kernel_stat.h>
17#include <linux/delay.h>
18#include <linux/mc146818rtc.h>
19#include <linux/init.h>
20#include <linux/bootmem.h>
21#include <linux/kmod.h>
22#include <linux/completion.h>
23#include <linux/sched.h>
24#include <linux/kthread.h>
25#include <asm/desc.h>
26#include <asm/voyager.h>
27#include <asm/vic.h>
28#include <asm/mtrr.h>
29#include <asm/msr.h>
30
31struct task_struct *voyager_thread;
32static __u8 set_timeout;
33
34static int execute(const char *string)
35{
36 int ret;
37
38 char *envp[] = {
39 "HOME=/",
40 "TERM=linux",
41 "PATH=/sbin:/usr/sbin:/bin:/usr/bin",
42 NULL,
43 };
44 char *argv[] = {
45 "/bin/bash",
46 "-c",
47 (char *)string,
48 NULL,
49 };
50
51 if ((ret =
52 call_usermodehelper(argv[0], argv, envp, UMH_WAIT_PROC)) != 0) {
53 printk(KERN_ERR "Voyager failed to run \"%s\": %i\n", string,
54 ret);
55 }
56 return ret;
57}
58
59static void check_from_kernel(void)
60{
61 if (voyager_status.switch_off) {
62
63 /* FIXME: This should be configurable via proc */
64 execute("umask 600; echo 0 > /etc/initrunlvl; kill -HUP 1");
65 } else if (voyager_status.power_fail) {
66 VDEBUG(("Voyager daemon detected AC power failure\n"));
67
68 /* FIXME: This should be configureable via proc */
69 execute("umask 600; echo F > /etc/powerstatus; kill -PWR 1");
70 set_timeout = 1;
71 }
72}
73
74static void check_continuing_condition(void)
75{
76 if (voyager_status.power_fail) {
77 __u8 data;
78 voyager_cat_psi(VOYAGER_PSI_SUBREAD,
79 VOYAGER_PSI_AC_FAIL_REG, &data);
80 if ((data & 0x1f) == 0) {
81 /* all power restored */
82 printk(KERN_NOTICE
83 "VOYAGER AC power restored, cancelling shutdown\n");
84 /* FIXME: should be user configureable */
85 execute
86 ("umask 600; echo O > /etc/powerstatus; kill -PWR 1");
87 set_timeout = 0;
88 }
89 }
90}
91
92static int thread(void *unused)
93{
94 printk(KERN_NOTICE "Voyager starting monitor thread\n");
95
96 for (;;) {
97 set_current_state(TASK_INTERRUPTIBLE);
98 schedule_timeout(set_timeout ? HZ : MAX_SCHEDULE_TIMEOUT);
99
100 VDEBUG(("Voyager Daemon awoken\n"));
101 if (voyager_status.request_from_kernel == 0) {
102 /* probably awoken from timeout */
103 check_continuing_condition();
104 } else {
105 check_from_kernel();
106 voyager_status.request_from_kernel = 0;
107 }
108 }
109}
110
111static int __init voyager_thread_start(void)
112{
113 voyager_thread = kthread_run(thread, NULL, "kvoyagerd");
114 if (IS_ERR(voyager_thread)) {
115 printk(KERN_ERR
116 "Voyager: Failed to create system monitor thread.\n");
117 return PTR_ERR(voyager_thread);
118 }
119 return 0;
120}
121
122static void __exit voyager_thread_stop(void)
123{
124 kthread_stop(voyager_thread);
125}
126
127module_init(voyager_thread_start);
128module_exit(voyager_thread_stop);
diff --git a/arch/x86/math-emu/get_address.c b/arch/x86/math-emu/get_address.c
index 420b3b6e3915..6ef5e99380f9 100644
--- a/arch/x86/math-emu/get_address.c
+++ b/arch/x86/math-emu/get_address.c
@@ -150,11 +150,9 @@ static long pm_address(u_char FPU_modrm, u_char segment,
150#endif /* PARANOID */ 150#endif /* PARANOID */
151 151
152 switch (segment) { 152 switch (segment) {
153 /* gs isn't used by the kernel, so it still has its
154 user-space value. */
155 case PREFIX_GS_ - 1: 153 case PREFIX_GS_ - 1:
156 /* N.B. - movl %seg, mem is a 2 byte write regardless of prefix */ 154 /* user gs handling can be lazy, use special accessors */
157 savesegment(gs, addr->selector); 155 addr->selector = get_user_gs(FPU_info->regs);
158 break; 156 break;
159 default: 157 default:
160 addr->selector = PM_REG_(segment); 158 addr->selector = PM_REG_(segment);
diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile
index d8cc96a2738f..08537747cb58 100644
--- a/arch/x86/mm/Makefile
+++ b/arch/x86/mm/Makefile
@@ -1,6 +1,8 @@
1obj-y := init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \ 1obj-y := init.o init_$(BITS).o fault.o ioremap.o extable.o pageattr.o mmap.o \
2 pat.o pgtable.o gup.o 2 pat.o pgtable.o gup.o
3 3
4obj-$(CONFIG_SMP) += tlb.o
5
4obj-$(CONFIG_X86_32) += pgtable_32.o iomap_32.o 6obj-$(CONFIG_X86_32) += pgtable_32.o iomap_32.o
5 7
6obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 8obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c
index 7e8db53528a7..61b41ca3b5a2 100644
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -23,6 +23,12 @@ int fixup_exception(struct pt_regs *regs)
23 23
24 fixup = search_exception_tables(regs->ip); 24 fixup = search_exception_tables(regs->ip);
25 if (fixup) { 25 if (fixup) {
26 /* If fixup is less than 16, it means uaccess error */
27 if (fixup->fixup < 16) {
28 current_thread_info()->uaccess_err = -EFAULT;
29 regs->ip += fixup->fixup;
30 return 1;
31 }
26 regs->ip = fixup->fixup; 32 regs->ip = fixup->fixup;
27 return 1; 33 return 1;
28 } 34 }
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index c76ef1d701c9..a03b7279efa0 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -1,73 +1,79 @@
1/* 1/*
2 * Copyright (C) 1995 Linus Torvalds 2 * Copyright (C) 1995 Linus Torvalds
3 * Copyright (C) 2001,2002 Andi Kleen, SuSE Labs. 3 * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs.
4 * Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar
4 */ 5 */
5
6#include <linux/signal.h>
7#include <linux/sched.h>
8#include <linux/kernel.h>
9#include <linux/errno.h>
10#include <linux/string.h>
11#include <linux/types.h>
12#include <linux/ptrace.h>
13#include <linux/mmiotrace.h>
14#include <linux/mman.h>
15#include <linux/mm.h>
16#include <linux/smp.h>
17#include <linux/interrupt.h> 6#include <linux/interrupt.h>
18#include <linux/init.h> 7#include <linux/mmiotrace.h>
19#include <linux/tty.h> 8#include <linux/bootmem.h>
20#include <linux/vt_kern.h> /* For unblank_screen() */
21#include <linux/compiler.h> 9#include <linux/compiler.h>
22#include <linux/highmem.h> 10#include <linux/highmem.h>
23#include <linux/bootmem.h> /* for max_low_pfn */
24#include <linux/vmalloc.h>
25#include <linux/module.h>
26#include <linux/kprobes.h> 11#include <linux/kprobes.h>
27#include <linux/uaccess.h> 12#include <linux/uaccess.h>
13#include <linux/vmalloc.h>
14#include <linux/vt_kern.h>
15#include <linux/signal.h>
16#include <linux/kernel.h>
17#include <linux/ptrace.h>
18#include <linux/string.h>
19#include <linux/module.h>
28#include <linux/kdebug.h> 20#include <linux/kdebug.h>
21#include <linux/errno.h>
22#include <linux/magic.h>
23#include <linux/sched.h>
24#include <linux/types.h>
25#include <linux/init.h>
26#include <linux/mman.h>
27#include <linux/tty.h>
28#include <linux/smp.h>
29#include <linux/mm.h>
30
31#include <asm-generic/sections.h>
29 32
30#include <asm/system.h>
31#include <asm/desc.h>
32#include <asm/segment.h>
33#include <asm/pgalloc.h>
34#include <asm/smp.h>
35#include <asm/tlbflush.h> 33#include <asm/tlbflush.h>
34#include <asm/pgalloc.h>
35#include <asm/segment.h>
36#include <asm/system.h>
36#include <asm/proto.h> 37#include <asm/proto.h>
37#include <asm-generic/sections.h>
38#include <asm/traps.h> 38#include <asm/traps.h>
39#include <asm/desc.h>
39 40
40/* 41/*
41 * Page fault error code bits 42 * Page fault error code bits:
42 * bit 0 == 0 means no page found, 1 means protection fault 43 *
43 * bit 1 == 0 means read, 1 means write 44 * bit 0 == 0: no page found 1: protection fault
44 * bit 2 == 0 means kernel, 1 means user-mode 45 * bit 1 == 0: read access 1: write access
45 * bit 3 == 1 means use of reserved bit detected 46 * bit 2 == 0: kernel-mode access 1: user-mode access
46 * bit 4 == 1 means fault was an instruction fetch 47 * bit 3 == 1: use of reserved bit detected
48 * bit 4 == 1: fault was an instruction fetch
47 */ 49 */
48#define PF_PROT (1<<0) 50enum x86_pf_error_code {
49#define PF_WRITE (1<<1) 51
50#define PF_USER (1<<2) 52 PF_PROT = 1 << 0,
51#define PF_RSVD (1<<3) 53 PF_WRITE = 1 << 1,
52#define PF_INSTR (1<<4) 54 PF_USER = 1 << 2,
55 PF_RSVD = 1 << 3,
56 PF_INSTR = 1 << 4,
57};
53 58
59/*
60 * Returns 0 if mmiotrace is disabled, or if the fault is not
61 * handled by mmiotrace:
62 */
54static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr) 63static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr)
55{ 64{
56#ifdef CONFIG_MMIOTRACE
57 if (unlikely(is_kmmio_active())) 65 if (unlikely(is_kmmio_active()))
58 if (kmmio_handler(regs, addr) == 1) 66 if (kmmio_handler(regs, addr) == 1)
59 return -1; 67 return -1;
60#endif
61 return 0; 68 return 0;
62} 69}
63 70
64static inline int notify_page_fault(struct pt_regs *regs) 71static inline int notify_page_fault(struct pt_regs *regs)
65{ 72{
66#ifdef CONFIG_KPROBES
67 int ret = 0; 73 int ret = 0;
68 74
69 /* kprobe_running() needs smp_processor_id() */ 75 /* kprobe_running() needs smp_processor_id() */
70 if (!user_mode_vm(regs)) { 76 if (kprobes_built_in() && !user_mode_vm(regs)) {
71 preempt_disable(); 77 preempt_disable();
72 if (kprobe_running() && kprobe_fault_handler(regs, 14)) 78 if (kprobe_running() && kprobe_fault_handler(regs, 14))
73 ret = 1; 79 ret = 1;
@@ -75,29 +81,76 @@ static inline int notify_page_fault(struct pt_regs *regs)
75 } 81 }
76 82
77 return ret; 83 return ret;
78#else
79 return 0;
80#endif
81} 84}
82 85
83/* 86/*
84 * X86_32 87 * Prefetch quirks:
85 * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. 88 *
86 * Check that here and ignore it. 89 * 32-bit mode:
90 *
91 * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch.
92 * Check that here and ignore it.
93 *
94 * 64-bit mode:
87 * 95 *
88 * X86_64 96 * Sometimes the CPU reports invalid exceptions on prefetch.
89 * Sometimes the CPU reports invalid exceptions on prefetch. 97 * Check that here and ignore it.
90 * Check that here and ignore it.
91 * 98 *
92 * Opcode checker based on code by Richard Brunner 99 * Opcode checker based on code by Richard Brunner.
93 */ 100 */
94static int is_prefetch(struct pt_regs *regs, unsigned long addr, 101static inline int
95 unsigned long error_code) 102check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr,
103 unsigned char opcode, int *prefetch)
96{ 104{
105 unsigned char instr_hi = opcode & 0xf0;
106 unsigned char instr_lo = opcode & 0x0f;
107
108 switch (instr_hi) {
109 case 0x20:
110 case 0x30:
111 /*
112 * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
113 * In X86_64 long mode, the CPU will signal invalid
114 * opcode if some of these prefixes are present so
115 * X86_64 will never get here anyway
116 */
117 return ((instr_lo & 7) == 0x6);
118#ifdef CONFIG_X86_64
119 case 0x40:
120 /*
121 * In AMD64 long mode 0x40..0x4F are valid REX prefixes
122 * Need to figure out under what instruction mode the
123 * instruction was issued. Could check the LDT for lm,
124 * but for now it's good enough to assume that long
125 * mode only uses well known segments or kernel.
126 */
127 return (!user_mode(regs)) || (regs->cs == __USER_CS);
128#endif
129 case 0x60:
130 /* 0x64 thru 0x67 are valid prefixes in all modes. */
131 return (instr_lo & 0xC) == 0x4;
132 case 0xF0:
133 /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
134 return !instr_lo || (instr_lo>>1) == 1;
135 case 0x00:
136 /* Prefetch instruction is 0x0F0D or 0x0F18 */
137 if (probe_kernel_address(instr, opcode))
138 return 0;
139
140 *prefetch = (instr_lo == 0xF) &&
141 (opcode == 0x0D || opcode == 0x18);
142 return 0;
143 default:
144 return 0;
145 }
146}
147
148static int
149is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr)
150{
151 unsigned char *max_instr;
97 unsigned char *instr; 152 unsigned char *instr;
98 int scan_more = 1;
99 int prefetch = 0; 153 int prefetch = 0;
100 unsigned char *max_instr;
101 154
102 /* 155 /*
103 * If it was a exec (instruction fetch) fault on NX page, then 156 * If it was a exec (instruction fetch) fault on NX page, then
@@ -106,106 +159,170 @@ static int is_prefetch(struct pt_regs *regs, unsigned long addr,
106 if (error_code & PF_INSTR) 159 if (error_code & PF_INSTR)
107 return 0; 160 return 0;
108 161
109 instr = (unsigned char *)convert_ip_to_linear(current, regs); 162 instr = (void *)convert_ip_to_linear(current, regs);
110 max_instr = instr + 15; 163 max_instr = instr + 15;
111 164
112 if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE) 165 if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE)
113 return 0; 166 return 0;
114 167
115 while (scan_more && instr < max_instr) { 168 while (instr < max_instr) {
116 unsigned char opcode; 169 unsigned char opcode;
117 unsigned char instr_hi;
118 unsigned char instr_lo;
119 170
120 if (probe_kernel_address(instr, opcode)) 171 if (probe_kernel_address(instr, opcode))
121 break; 172 break;
122 173
123 instr_hi = opcode & 0xf0;
124 instr_lo = opcode & 0x0f;
125 instr++; 174 instr++;
126 175
127 switch (instr_hi) { 176 if (!check_prefetch_opcode(regs, instr, opcode, &prefetch))
128 case 0x20:
129 case 0x30:
130 /*
131 * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
132 * In X86_64 long mode, the CPU will signal invalid
133 * opcode if some of these prefixes are present so
134 * X86_64 will never get here anyway
135 */
136 scan_more = ((instr_lo & 7) == 0x6);
137 break; 177 break;
138#ifdef CONFIG_X86_64
139 case 0x40:
140 /*
141 * In AMD64 long mode 0x40..0x4F are valid REX prefixes
142 * Need to figure out under what instruction mode the
143 * instruction was issued. Could check the LDT for lm,
144 * but for now it's good enough to assume that long
145 * mode only uses well known segments or kernel.
146 */
147 scan_more = (!user_mode(regs)) || (regs->cs == __USER_CS);
148 break;
149#endif
150 case 0x60:
151 /* 0x64 thru 0x67 are valid prefixes in all modes. */
152 scan_more = (instr_lo & 0xC) == 0x4;
153 break;
154 case 0xF0:
155 /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
156 scan_more = !instr_lo || (instr_lo>>1) == 1;
157 break;
158 case 0x00:
159 /* Prefetch instruction is 0x0F0D or 0x0F18 */
160 scan_more = 0;
161
162 if (probe_kernel_address(instr, opcode))
163 break;
164 prefetch = (instr_lo == 0xF) &&
165 (opcode == 0x0D || opcode == 0x18);
166 break;
167 default:
168 scan_more = 0;
169 break;
170 }
171 } 178 }
172 return prefetch; 179 return prefetch;
173} 180}
174 181
175static void force_sig_info_fault(int si_signo, int si_code, 182static void
176 unsigned long address, struct task_struct *tsk) 183force_sig_info_fault(int si_signo, int si_code, unsigned long address,
184 struct task_struct *tsk)
177{ 185{
178 siginfo_t info; 186 siginfo_t info;
179 187
180 info.si_signo = si_signo; 188 info.si_signo = si_signo;
181 info.si_errno = 0; 189 info.si_errno = 0;
182 info.si_code = si_code; 190 info.si_code = si_code;
183 info.si_addr = (void __user *)address; 191 info.si_addr = (void __user *)address;
192
184 force_sig_info(si_signo, &info, tsk); 193 force_sig_info(si_signo, &info, tsk);
185} 194}
186 195
187#ifdef CONFIG_X86_64 196DEFINE_SPINLOCK(pgd_lock);
188static int bad_address(void *p) 197LIST_HEAD(pgd_list);
198
199#ifdef CONFIG_X86_32
200static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
189{ 201{
190 unsigned long dummy; 202 unsigned index = pgd_index(address);
191 return probe_kernel_address((unsigned long *)p, dummy); 203 pgd_t *pgd_k;
204 pud_t *pud, *pud_k;
205 pmd_t *pmd, *pmd_k;
206
207 pgd += index;
208 pgd_k = init_mm.pgd + index;
209
210 if (!pgd_present(*pgd_k))
211 return NULL;
212
213 /*
214 * set_pgd(pgd, *pgd_k); here would be useless on PAE
215 * and redundant with the set_pmd() on non-PAE. As would
216 * set_pud.
217 */
218 pud = pud_offset(pgd, address);
219 pud_k = pud_offset(pgd_k, address);
220 if (!pud_present(*pud_k))
221 return NULL;
222
223 pmd = pmd_offset(pud, address);
224 pmd_k = pmd_offset(pud_k, address);
225 if (!pmd_present(*pmd_k))
226 return NULL;
227
228 if (!pmd_present(*pmd)) {
229 set_pmd(pmd, *pmd_k);
230 arch_flush_lazy_mmu_mode();
231 } else {
232 BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
233 }
234
235 return pmd_k;
236}
237
238void vmalloc_sync_all(void)
239{
240 unsigned long address;
241
242 if (SHARED_KERNEL_PMD)
243 return;
244
245 for (address = VMALLOC_START & PMD_MASK;
246 address >= TASK_SIZE && address < FIXADDR_TOP;
247 address += PMD_SIZE) {
248
249 unsigned long flags;
250 struct page *page;
251
252 spin_lock_irqsave(&pgd_lock, flags);
253 list_for_each_entry(page, &pgd_list, lru) {
254 if (!vmalloc_sync_one(page_address(page), address))
255 break;
256 }
257 spin_unlock_irqrestore(&pgd_lock, flags);
258 }
259}
260
261/*
262 * 32-bit:
263 *
264 * Handle a fault on the vmalloc or module mapping area
265 */
266static noinline int vmalloc_fault(unsigned long address)
267{
268 unsigned long pgd_paddr;
269 pmd_t *pmd_k;
270 pte_t *pte_k;
271
272 /* Make sure we are in vmalloc area: */
273 if (!(address >= VMALLOC_START && address < VMALLOC_END))
274 return -1;
275
276 /*
277 * Synchronize this task's top level page-table
278 * with the 'reference' page table.
279 *
280 * Do _not_ use "current" here. We might be inside
281 * an interrupt in the middle of a task switch..
282 */
283 pgd_paddr = read_cr3();
284 pmd_k = vmalloc_sync_one(__va(pgd_paddr), address);
285 if (!pmd_k)
286 return -1;
287
288 pte_k = pte_offset_kernel(pmd_k, address);
289 if (!pte_present(*pte_k))
290 return -1;
291
292 return 0;
293}
294
295/*
296 * Did it hit the DOS screen memory VA from vm86 mode?
297 */
298static inline void
299check_v8086_mode(struct pt_regs *regs, unsigned long address,
300 struct task_struct *tsk)
301{
302 unsigned long bit;
303
304 if (!v8086_mode(regs))
305 return;
306
307 bit = (address - 0xA0000) >> PAGE_SHIFT;
308 if (bit < 32)
309 tsk->thread.screen_bitmap |= 1 << bit;
192} 310}
193#endif
194 311
195static void dump_pagetable(unsigned long address) 312static void dump_pagetable(unsigned long address)
196{ 313{
197#ifdef CONFIG_X86_32
198 __typeof__(pte_val(__pte(0))) page; 314 __typeof__(pte_val(__pte(0))) page;
199 315
200 page = read_cr3(); 316 page = read_cr3();
201 page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT]; 317 page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT];
318
202#ifdef CONFIG_X86_PAE 319#ifdef CONFIG_X86_PAE
203 printk("*pdpt = %016Lx ", page); 320 printk("*pdpt = %016Lx ", page);
204 if ((page >> PAGE_SHIFT) < max_low_pfn 321 if ((page >> PAGE_SHIFT) < max_low_pfn
205 && page & _PAGE_PRESENT) { 322 && page & _PAGE_PRESENT) {
206 page &= PAGE_MASK; 323 page &= PAGE_MASK;
207 page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT) 324 page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT)
208 & (PTRS_PER_PMD - 1)]; 325 & (PTRS_PER_PMD - 1)];
209 printk(KERN_CONT "*pde = %016Lx ", page); 326 printk(KERN_CONT "*pde = %016Lx ", page);
210 page &= ~_PAGE_NX; 327 page &= ~_PAGE_NX;
211 } 328 }
@@ -217,19 +334,145 @@ static void dump_pagetable(unsigned long address)
217 * We must not directly access the pte in the highpte 334 * We must not directly access the pte in the highpte
218 * case if the page table is located in highmem. 335 * case if the page table is located in highmem.
219 * And let's rather not kmap-atomic the pte, just in case 336 * And let's rather not kmap-atomic the pte, just in case
220 * it's allocated already. 337 * it's allocated already:
221 */ 338 */
222 if ((page >> PAGE_SHIFT) < max_low_pfn 339 if ((page >> PAGE_SHIFT) < max_low_pfn
223 && (page & _PAGE_PRESENT) 340 && (page & _PAGE_PRESENT)
224 && !(page & _PAGE_PSE)) { 341 && !(page & _PAGE_PSE)) {
342
225 page &= PAGE_MASK; 343 page &= PAGE_MASK;
226 page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT) 344 page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT)
227 & (PTRS_PER_PTE - 1)]; 345 & (PTRS_PER_PTE - 1)];
228 printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page); 346 printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page);
229 } 347 }
230 348
231 printk("\n"); 349 printk("\n");
232#else /* CONFIG_X86_64 */ 350}
351
352#else /* CONFIG_X86_64: */
353
354void vmalloc_sync_all(void)
355{
356 unsigned long address;
357
358 for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END;
359 address += PGDIR_SIZE) {
360
361 const pgd_t *pgd_ref = pgd_offset_k(address);
362 unsigned long flags;
363 struct page *page;
364
365 if (pgd_none(*pgd_ref))
366 continue;
367
368 spin_lock_irqsave(&pgd_lock, flags);
369 list_for_each_entry(page, &pgd_list, lru) {
370 pgd_t *pgd;
371 pgd = (pgd_t *)page_address(page) + pgd_index(address);
372 if (pgd_none(*pgd))
373 set_pgd(pgd, *pgd_ref);
374 else
375 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
376 }
377 spin_unlock_irqrestore(&pgd_lock, flags);
378 }
379}
380
381/*
382 * 64-bit:
383 *
384 * Handle a fault on the vmalloc area
385 *
386 * This assumes no large pages in there.
387 */
388static noinline int vmalloc_fault(unsigned long address)
389{
390 pgd_t *pgd, *pgd_ref;
391 pud_t *pud, *pud_ref;
392 pmd_t *pmd, *pmd_ref;
393 pte_t *pte, *pte_ref;
394
395 /* Make sure we are in vmalloc area: */
396 if (!(address >= VMALLOC_START && address < VMALLOC_END))
397 return -1;
398
399 /*
400 * Copy kernel mappings over when needed. This can also
401 * happen within a race in page table update. In the later
402 * case just flush:
403 */
404 pgd = pgd_offset(current->active_mm, address);
405 pgd_ref = pgd_offset_k(address);
406 if (pgd_none(*pgd_ref))
407 return -1;
408
409 if (pgd_none(*pgd))
410 set_pgd(pgd, *pgd_ref);
411 else
412 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
413
414 /*
415 * Below here mismatches are bugs because these lower tables
416 * are shared:
417 */
418
419 pud = pud_offset(pgd, address);
420 pud_ref = pud_offset(pgd_ref, address);
421 if (pud_none(*pud_ref))
422 return -1;
423
424 if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref))
425 BUG();
426
427 pmd = pmd_offset(pud, address);
428 pmd_ref = pmd_offset(pud_ref, address);
429 if (pmd_none(*pmd_ref))
430 return -1;
431
432 if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref))
433 BUG();
434
435 pte_ref = pte_offset_kernel(pmd_ref, address);
436 if (!pte_present(*pte_ref))
437 return -1;
438
439 pte = pte_offset_kernel(pmd, address);
440
441 /*
442 * Don't use pte_page here, because the mappings can point
443 * outside mem_map, and the NUMA hash lookup cannot handle
444 * that:
445 */
446 if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref))
447 BUG();
448
449 return 0;
450}
451
452static const char errata93_warning[] =
453KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n"
454KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n"
455KERN_ERR "******* Please consider a BIOS update.\n"
456KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n";
457
458/*
459 * No vm86 mode in 64-bit mode:
460 */
461static inline void
462check_v8086_mode(struct pt_regs *regs, unsigned long address,
463 struct task_struct *tsk)
464{
465}
466
467static int bad_address(void *p)
468{
469 unsigned long dummy;
470
471 return probe_kernel_address((unsigned long *)p, dummy);
472}
473
474static void dump_pagetable(unsigned long address)
475{
233 pgd_t *pgd; 476 pgd_t *pgd;
234 pud_t *pud; 477 pud_t *pud;
235 pmd_t *pmd; 478 pmd_t *pmd;
@@ -238,102 +481,77 @@ static void dump_pagetable(unsigned long address)
238 pgd = (pgd_t *)read_cr3(); 481 pgd = (pgd_t *)read_cr3();
239 482
240 pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK); 483 pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK);
484
241 pgd += pgd_index(address); 485 pgd += pgd_index(address);
242 if (bad_address(pgd)) goto bad; 486 if (bad_address(pgd))
487 goto bad;
488
243 printk("PGD %lx ", pgd_val(*pgd)); 489 printk("PGD %lx ", pgd_val(*pgd));
244 if (!pgd_present(*pgd)) goto ret; 490
491 if (!pgd_present(*pgd))
492 goto out;
245 493
246 pud = pud_offset(pgd, address); 494 pud = pud_offset(pgd, address);
247 if (bad_address(pud)) goto bad; 495 if (bad_address(pud))
496 goto bad;
497
248 printk("PUD %lx ", pud_val(*pud)); 498 printk("PUD %lx ", pud_val(*pud));
249 if (!pud_present(*pud) || pud_large(*pud)) 499 if (!pud_present(*pud) || pud_large(*pud))
250 goto ret; 500 goto out;
251 501
252 pmd = pmd_offset(pud, address); 502 pmd = pmd_offset(pud, address);
253 if (bad_address(pmd)) goto bad; 503 if (bad_address(pmd))
504 goto bad;
505
254 printk("PMD %lx ", pmd_val(*pmd)); 506 printk("PMD %lx ", pmd_val(*pmd));
255 if (!pmd_present(*pmd) || pmd_large(*pmd)) goto ret; 507 if (!pmd_present(*pmd) || pmd_large(*pmd))
508 goto out;
256 509
257 pte = pte_offset_kernel(pmd, address); 510 pte = pte_offset_kernel(pmd, address);
258 if (bad_address(pte)) goto bad; 511 if (bad_address(pte))
512 goto bad;
513
259 printk("PTE %lx", pte_val(*pte)); 514 printk("PTE %lx", pte_val(*pte));
260ret: 515out:
261 printk("\n"); 516 printk("\n");
262 return; 517 return;
263bad: 518bad:
264 printk("BAD\n"); 519 printk("BAD\n");
265#endif
266}
267
268#ifdef CONFIG_X86_32
269static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
270{
271 unsigned index = pgd_index(address);
272 pgd_t *pgd_k;
273 pud_t *pud, *pud_k;
274 pmd_t *pmd, *pmd_k;
275
276 pgd += index;
277 pgd_k = init_mm.pgd + index;
278
279 if (!pgd_present(*pgd_k))
280 return NULL;
281
282 /*
283 * set_pgd(pgd, *pgd_k); here would be useless on PAE
284 * and redundant with the set_pmd() on non-PAE. As would
285 * set_pud.
286 */
287
288 pud = pud_offset(pgd, address);
289 pud_k = pud_offset(pgd_k, address);
290 if (!pud_present(*pud_k))
291 return NULL;
292
293 pmd = pmd_offset(pud, address);
294 pmd_k = pmd_offset(pud_k, address);
295 if (!pmd_present(*pmd_k))
296 return NULL;
297 if (!pmd_present(*pmd)) {
298 set_pmd(pmd, *pmd_k);
299 arch_flush_lazy_mmu_mode();
300 } else
301 BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
302 return pmd_k;
303} 520}
304#endif
305 521
306#ifdef CONFIG_X86_64 522#endif /* CONFIG_X86_64 */
307static const char errata93_warning[] =
308KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n"
309KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n"
310KERN_ERR "******* Please consider a BIOS update.\n"
311KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n";
312#endif
313 523
314/* Workaround for K8 erratum #93 & buggy BIOS. 524/*
315 BIOS SMM functions are required to use a specific workaround 525 * Workaround for K8 erratum #93 & buggy BIOS.
316 to avoid corruption of the 64bit RIP register on C stepping K8. 526 *
317 A lot of BIOS that didn't get tested properly miss this. 527 * BIOS SMM functions are required to use a specific workaround
318 The OS sees this as a page fault with the upper 32bits of RIP cleared. 528 * to avoid corruption of the 64bit RIP register on C stepping K8.
319 Try to work around it here. 529 *
320 Note we only handle faults in kernel here. 530 * A lot of BIOS that didn't get tested properly miss this.
321 Does nothing for X86_32 531 *
532 * The OS sees this as a page fault with the upper 32bits of RIP cleared.
533 * Try to work around it here.
534 *
535 * Note we only handle faults in kernel here.
536 * Does nothing on 32-bit.
322 */ 537 */
323static int is_errata93(struct pt_regs *regs, unsigned long address) 538static int is_errata93(struct pt_regs *regs, unsigned long address)
324{ 539{
325#ifdef CONFIG_X86_64 540#ifdef CONFIG_X86_64
326 static int warned; 541 static int once;
542
327 if (address != regs->ip) 543 if (address != regs->ip)
328 return 0; 544 return 0;
545
329 if ((address >> 32) != 0) 546 if ((address >> 32) != 0)
330 return 0; 547 return 0;
548
331 address |= 0xffffffffUL << 32; 549 address |= 0xffffffffUL << 32;
332 if ((address >= (u64)_stext && address <= (u64)_etext) || 550 if ((address >= (u64)_stext && address <= (u64)_etext) ||
333 (address >= MODULES_VADDR && address <= MODULES_END)) { 551 (address >= MODULES_VADDR && address <= MODULES_END)) {
334 if (!warned) { 552 if (!once) {
335 printk(errata93_warning); 553 printk(errata93_warning);
336 warned = 1; 554 once = 1;
337 } 555 }
338 regs->ip = address; 556 regs->ip = address;
339 return 1; 557 return 1;
@@ -343,16 +561,17 @@ static int is_errata93(struct pt_regs *regs, unsigned long address)
343} 561}
344 562
345/* 563/*
346 * Work around K8 erratum #100 K8 in compat mode occasionally jumps to illegal 564 * Work around K8 erratum #100 K8 in compat mode occasionally jumps
347 * addresses >4GB. We catch this in the page fault handler because these 565 * to illegal addresses >4GB.
348 * addresses are not reachable. Just detect this case and return. Any code 566 *
567 * We catch this in the page fault handler because these addresses
568 * are not reachable. Just detect this case and return. Any code
349 * segment in LDT is compatibility mode. 569 * segment in LDT is compatibility mode.
350 */ 570 */
351static int is_errata100(struct pt_regs *regs, unsigned long address) 571static int is_errata100(struct pt_regs *regs, unsigned long address)
352{ 572{
353#ifdef CONFIG_X86_64 573#ifdef CONFIG_X86_64
354 if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && 574 if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32))
355 (address >> 32))
356 return 1; 575 return 1;
357#endif 576#endif
358 return 0; 577 return 0;
@@ -362,8 +581,9 @@ static int is_f00f_bug(struct pt_regs *regs, unsigned long address)
362{ 581{
363#ifdef CONFIG_X86_F00F_BUG 582#ifdef CONFIG_X86_F00F_BUG
364 unsigned long nr; 583 unsigned long nr;
584
365 /* 585 /*
366 * Pentium F0 0F C7 C8 bug workaround. 586 * Pentium F0 0F C7 C8 bug workaround:
367 */ 587 */
368 if (boot_cpu_data.f00f_bug) { 588 if (boot_cpu_data.f00f_bug) {
369 nr = (address - idt_descr.address) >> 3; 589 nr = (address - idt_descr.address) >> 3;
@@ -377,62 +597,277 @@ static int is_f00f_bug(struct pt_regs *regs, unsigned long address)
377 return 0; 597 return 0;
378} 598}
379 599
380static void show_fault_oops(struct pt_regs *regs, unsigned long error_code, 600static const char nx_warning[] = KERN_CRIT
381 unsigned long address) 601"kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n";
602
603static void
604show_fault_oops(struct pt_regs *regs, unsigned long error_code,
605 unsigned long address)
382{ 606{
383#ifdef CONFIG_X86_32
384 if (!oops_may_print()) 607 if (!oops_may_print())
385 return; 608 return;
386#endif
387 609
388#ifdef CONFIG_X86_PAE
389 if (error_code & PF_INSTR) { 610 if (error_code & PF_INSTR) {
390 unsigned int level; 611 unsigned int level;
612
391 pte_t *pte = lookup_address(address, &level); 613 pte_t *pte = lookup_address(address, &level);
392 614
393 if (pte && pte_present(*pte) && !pte_exec(*pte)) 615 if (pte && pte_present(*pte) && !pte_exec(*pte))
394 printk(KERN_CRIT "kernel tried to execute " 616 printk(nx_warning, current_uid());
395 "NX-protected page - exploit attempt? "
396 "(uid: %d)\n", current_uid());
397 } 617 }
398#endif
399 618
400 printk(KERN_ALERT "BUG: unable to handle kernel "); 619 printk(KERN_ALERT "BUG: unable to handle kernel ");
401 if (address < PAGE_SIZE) 620 if (address < PAGE_SIZE)
402 printk(KERN_CONT "NULL pointer dereference"); 621 printk(KERN_CONT "NULL pointer dereference");
403 else 622 else
404 printk(KERN_CONT "paging request"); 623 printk(KERN_CONT "paging request");
624
405 printk(KERN_CONT " at %p\n", (void *) address); 625 printk(KERN_CONT " at %p\n", (void *) address);
406 printk(KERN_ALERT "IP:"); 626 printk(KERN_ALERT "IP:");
407 printk_address(regs->ip, 1); 627 printk_address(regs->ip, 1);
628
408 dump_pagetable(address); 629 dump_pagetable(address);
409} 630}
410 631
411#ifdef CONFIG_X86_64 632static noinline void
412static noinline void pgtable_bad(unsigned long address, struct pt_regs *regs, 633pgtable_bad(struct pt_regs *regs, unsigned long error_code,
413 unsigned long error_code) 634 unsigned long address)
414{ 635{
415 unsigned long flags = oops_begin();
416 int sig = SIGKILL;
417 struct task_struct *tsk; 636 struct task_struct *tsk;
637 unsigned long flags;
638 int sig;
639
640 flags = oops_begin();
641 tsk = current;
642 sig = SIGKILL;
418 643
419 printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", 644 printk(KERN_ALERT "%s: Corrupted page table at address %lx\n",
420 current->comm, address); 645 tsk->comm, address);
421 dump_pagetable(address); 646 dump_pagetable(address);
422 tsk = current; 647
423 tsk->thread.cr2 = address; 648 tsk->thread.cr2 = address;
424 tsk->thread.trap_no = 14; 649 tsk->thread.trap_no = 14;
425 tsk->thread.error_code = error_code; 650 tsk->thread.error_code = error_code;
651
426 if (__die("Bad pagetable", regs, error_code)) 652 if (__die("Bad pagetable", regs, error_code))
427 sig = 0; 653 sig = 0;
654
428 oops_end(flags, regs, sig); 655 oops_end(flags, regs, sig);
429} 656}
430#endif 657
658static noinline void
659no_context(struct pt_regs *regs, unsigned long error_code,
660 unsigned long address)
661{
662 struct task_struct *tsk = current;
663 unsigned long *stackend;
664 unsigned long flags;
665 int sig;
666
667 /* Are we prepared to handle this kernel fault? */
668 if (fixup_exception(regs))
669 return;
670
671 /*
672 * 32-bit:
673 *
674 * Valid to do another page fault here, because if this fault
675 * had been triggered by is_prefetch fixup_exception would have
676 * handled it.
677 *
678 * 64-bit:
679 *
680 * Hall of shame of CPU/BIOS bugs.
681 */
682 if (is_prefetch(regs, error_code, address))
683 return;
684
685 if (is_errata93(regs, address))
686 return;
687
688 /*
689 * Oops. The kernel tried to access some bad page. We'll have to
690 * terminate things with extreme prejudice:
691 */
692 flags = oops_begin();
693
694 show_fault_oops(regs, error_code, address);
695
696 stackend = end_of_stack(tsk);
697 if (*stackend != STACK_END_MAGIC)
698 printk(KERN_ALERT "Thread overran stack, or stack corrupted\n");
699
700 tsk->thread.cr2 = address;
701 tsk->thread.trap_no = 14;
702 tsk->thread.error_code = error_code;
703
704 sig = SIGKILL;
705 if (__die("Oops", regs, error_code))
706 sig = 0;
707
708 /* Executive summary in case the body of the oops scrolled away */
709 printk(KERN_EMERG "CR2: %016lx\n", address);
710
711 oops_end(flags, regs, sig);
712}
713
714/*
715 * Print out info about fatal segfaults, if the show_unhandled_signals
716 * sysctl is set:
717 */
718static inline void
719show_signal_msg(struct pt_regs *regs, unsigned long error_code,
720 unsigned long address, struct task_struct *tsk)
721{
722 if (!unhandled_signal(tsk, SIGSEGV))
723 return;
724
725 if (!printk_ratelimit())
726 return;
727
728 printk(KERN_CONT "%s%s[%d]: segfault at %lx ip %p sp %p error %lx",
729 task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
730 tsk->comm, task_pid_nr(tsk), address,
731 (void *)regs->ip, (void *)regs->sp, error_code);
732
733 print_vma_addr(KERN_CONT " in ", regs->ip);
734
735 printk(KERN_CONT "\n");
736}
737
738static void
739__bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
740 unsigned long address, int si_code)
741{
742 struct task_struct *tsk = current;
743
744 /* User mode accesses just cause a SIGSEGV */
745 if (error_code & PF_USER) {
746 /*
747 * It's possible to have interrupts off here:
748 */
749 local_irq_enable();
750
751 /*
752 * Valid to do another page fault here because this one came
753 * from user space:
754 */
755 if (is_prefetch(regs, error_code, address))
756 return;
757
758 if (is_errata100(regs, address))
759 return;
760
761 if (unlikely(show_unhandled_signals))
762 show_signal_msg(regs, error_code, address, tsk);
763
764 /* Kernel addresses are always protection faults: */
765 tsk->thread.cr2 = address;
766 tsk->thread.error_code = error_code | (address >= TASK_SIZE);
767 tsk->thread.trap_no = 14;
768
769 force_sig_info_fault(SIGSEGV, si_code, address, tsk);
770
771 return;
772 }
773
774 if (is_f00f_bug(regs, address))
775 return;
776
777 no_context(regs, error_code, address);
778}
779
780static noinline void
781bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
782 unsigned long address)
783{
784 __bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR);
785}
786
787static void
788__bad_area(struct pt_regs *regs, unsigned long error_code,
789 unsigned long address, int si_code)
790{
791 struct mm_struct *mm = current->mm;
792
793 /*
794 * Something tried to access memory that isn't in our memory map..
795 * Fix it, but check if it's kernel or user first..
796 */
797 up_read(&mm->mmap_sem);
798
799 __bad_area_nosemaphore(regs, error_code, address, si_code);
800}
801
802static noinline void
803bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address)
804{
805 __bad_area(regs, error_code, address, SEGV_MAPERR);
806}
807
808static noinline void
809bad_area_access_error(struct pt_regs *regs, unsigned long error_code,
810 unsigned long address)
811{
812 __bad_area(regs, error_code, address, SEGV_ACCERR);
813}
814
815/* TODO: fixup for "mm-invoke-oom-killer-from-page-fault.patch" */
816static void
817out_of_memory(struct pt_regs *regs, unsigned long error_code,
818 unsigned long address)
819{
820 /*
821 * We ran out of memory, call the OOM killer, and return the userspace
822 * (which will retry the fault, or kill us if we got oom-killed):
823 */
824 up_read(&current->mm->mmap_sem);
825
826 pagefault_out_of_memory();
827}
828
829static void
830do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address)
831{
832 struct task_struct *tsk = current;
833 struct mm_struct *mm = tsk->mm;
834
835 up_read(&mm->mmap_sem);
836
837 /* Kernel mode? Handle exceptions or die: */
838 if (!(error_code & PF_USER))
839 no_context(regs, error_code, address);
840
841 /* User-space => ok to do another page fault: */
842 if (is_prefetch(regs, error_code, address))
843 return;
844
845 tsk->thread.cr2 = address;
846 tsk->thread.error_code = error_code;
847 tsk->thread.trap_no = 14;
848
849 force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
850}
851
852static noinline void
853mm_fault_error(struct pt_regs *regs, unsigned long error_code,
854 unsigned long address, unsigned int fault)
855{
856 if (fault & VM_FAULT_OOM) {
857 out_of_memory(regs, error_code, address);
858 } else {
859 if (fault & VM_FAULT_SIGBUS)
860 do_sigbus(regs, error_code, address);
861 else
862 BUG();
863 }
864}
431 865
432static int spurious_fault_check(unsigned long error_code, pte_t *pte) 866static int spurious_fault_check(unsigned long error_code, pte_t *pte)
433{ 867{
434 if ((error_code & PF_WRITE) && !pte_write(*pte)) 868 if ((error_code & PF_WRITE) && !pte_write(*pte))
435 return 0; 869 return 0;
870
436 if ((error_code & PF_INSTR) && !pte_exec(*pte)) 871 if ((error_code & PF_INSTR) && !pte_exec(*pte))
437 return 0; 872 return 0;
438 873
@@ -440,21 +875,25 @@ static int spurious_fault_check(unsigned long error_code, pte_t *pte)
440} 875}
441 876
442/* 877/*
443 * Handle a spurious fault caused by a stale TLB entry. This allows 878 * Handle a spurious fault caused by a stale TLB entry.
444 * us to lazily refresh the TLB when increasing the permissions of a 879 *
445 * kernel page (RO -> RW or NX -> X). Doing it eagerly is very 880 * This allows us to lazily refresh the TLB when increasing the
446 * expensive since that implies doing a full cross-processor TLB 881 * permissions of a kernel page (RO -> RW or NX -> X). Doing it
447 * flush, even if no stale TLB entries exist on other processors. 882 * eagerly is very expensive since that implies doing a full
883 * cross-processor TLB flush, even if no stale TLB entries exist
884 * on other processors.
885 *
448 * There are no security implications to leaving a stale TLB when 886 * There are no security implications to leaving a stale TLB when
449 * increasing the permissions on a page. 887 * increasing the permissions on a page.
450 */ 888 */
451static int spurious_fault(unsigned long address, 889static noinline int
452 unsigned long error_code) 890spurious_fault(unsigned long error_code, unsigned long address)
453{ 891{
454 pgd_t *pgd; 892 pgd_t *pgd;
455 pud_t *pud; 893 pud_t *pud;
456 pmd_t *pmd; 894 pmd_t *pmd;
457 pte_t *pte; 895 pte_t *pte;
896 int ret;
458 897
459 /* Reserved-bit violation or user access to kernel space? */ 898 /* Reserved-bit violation or user access to kernel space? */
460 if (error_code & (PF_USER | PF_RSVD)) 899 if (error_code & (PF_USER | PF_RSVD))
@@ -482,127 +921,71 @@ static int spurious_fault(unsigned long address,
482 if (!pte_present(*pte)) 921 if (!pte_present(*pte))
483 return 0; 922 return 0;
484 923
485 return spurious_fault_check(error_code, pte); 924 ret = spurious_fault_check(error_code, pte);
486} 925 if (!ret)
487 926 return 0;
488/*
489 * X86_32
490 * Handle a fault on the vmalloc or module mapping area
491 *
492 * X86_64
493 * Handle a fault on the vmalloc area
494 *
495 * This assumes no large pages in there.
496 */
497static int vmalloc_fault(unsigned long address)
498{
499#ifdef CONFIG_X86_32
500 unsigned long pgd_paddr;
501 pmd_t *pmd_k;
502 pte_t *pte_k;
503
504 /* Make sure we are in vmalloc area */
505 if (!(address >= VMALLOC_START && address < VMALLOC_END))
506 return -1;
507 927
508 /* 928 /*
509 * Synchronize this task's top level page-table 929 * Make sure we have permissions in PMD.
510 * with the 'reference' page table. 930 * If not, then there's a bug in the page tables:
511 *
512 * Do _not_ use "current" here. We might be inside
513 * an interrupt in the middle of a task switch..
514 */ 931 */
515 pgd_paddr = read_cr3(); 932 ret = spurious_fault_check(error_code, (pte_t *) pmd);
516 pmd_k = vmalloc_sync_one(__va(pgd_paddr), address); 933 WARN_ONCE(!ret, "PMD has incorrect permission bits\n");
517 if (!pmd_k)
518 return -1;
519 pte_k = pte_offset_kernel(pmd_k, address);
520 if (!pte_present(*pte_k))
521 return -1;
522 return 0;
523#else
524 pgd_t *pgd, *pgd_ref;
525 pud_t *pud, *pud_ref;
526 pmd_t *pmd, *pmd_ref;
527 pte_t *pte, *pte_ref;
528 934
529 /* Make sure we are in vmalloc area */ 935 return ret;
530 if (!(address >= VMALLOC_START && address < VMALLOC_END)) 936}
531 return -1;
532 937
533 /* Copy kernel mappings over when needed. This can also 938int show_unhandled_signals = 1;
534 happen within a race in page table update. In the later
535 case just flush. */
536 939
537 pgd = pgd_offset(current->active_mm, address); 940static inline int
538 pgd_ref = pgd_offset_k(address); 941access_error(unsigned long error_code, int write, struct vm_area_struct *vma)
539 if (pgd_none(*pgd_ref)) 942{
540 return -1; 943 if (write) {
541 if (pgd_none(*pgd)) 944 /* write, present and write, not present: */
542 set_pgd(pgd, *pgd_ref); 945 if (unlikely(!(vma->vm_flags & VM_WRITE)))
543 else 946 return 1;
544 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); 947 return 0;
948 }
545 949
546 /* Below here mismatches are bugs because these lower tables 950 /* read, present: */
547 are shared */ 951 if (unlikely(error_code & PF_PROT))
952 return 1;
953
954 /* read, not present: */
955 if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))))
956 return 1;
548 957
549 pud = pud_offset(pgd, address);
550 pud_ref = pud_offset(pgd_ref, address);
551 if (pud_none(*pud_ref))
552 return -1;
553 if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref))
554 BUG();
555 pmd = pmd_offset(pud, address);
556 pmd_ref = pmd_offset(pud_ref, address);
557 if (pmd_none(*pmd_ref))
558 return -1;
559 if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref))
560 BUG();
561 pte_ref = pte_offset_kernel(pmd_ref, address);
562 if (!pte_present(*pte_ref))
563 return -1;
564 pte = pte_offset_kernel(pmd, address);
565 /* Don't use pte_page here, because the mappings can point
566 outside mem_map, and the NUMA hash lookup cannot handle
567 that. */
568 if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref))
569 BUG();
570 return 0; 958 return 0;
571#endif
572} 959}
573 960
574int show_unhandled_signals = 1; 961static int fault_in_kernel_space(unsigned long address)
962{
963 return address >= TASK_SIZE_MAX;
964}
575 965
576/* 966/*
577 * This routine handles page faults. It determines the address, 967 * This routine handles page faults. It determines the address,
578 * and the problem, and then passes it off to one of the appropriate 968 * and the problem, and then passes it off to one of the appropriate
579 * routines. 969 * routines.
580 */ 970 */
581#ifdef CONFIG_X86_64 971dotraplinkage void __kprobes
582asmlinkage 972do_page_fault(struct pt_regs *regs, unsigned long error_code)
583#endif
584void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
585{ 973{
586 struct task_struct *tsk;
587 struct mm_struct *mm;
588 struct vm_area_struct *vma; 974 struct vm_area_struct *vma;
975 struct task_struct *tsk;
589 unsigned long address; 976 unsigned long address;
590 int write, si_code; 977 struct mm_struct *mm;
978 int write;
591 int fault; 979 int fault;
592#ifdef CONFIG_X86_64
593 unsigned long flags;
594 int sig;
595#endif
596 980
597 tsk = current; 981 tsk = current;
598 mm = tsk->mm; 982 mm = tsk->mm;
983
599 prefetchw(&mm->mmap_sem); 984 prefetchw(&mm->mmap_sem);
600 985
601 /* get the address */ 986 /* Get the faulting address: */
602 address = read_cr2(); 987 address = read_cr2();
603 988
604 si_code = SEGV_MAPERR;
605
606 if (unlikely(kmmio_fault(regs, address))) 989 if (unlikely(kmmio_fault(regs, address)))
607 return; 990 return;
608 991
@@ -619,319 +1002,147 @@ void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
619 * (error_code & 4) == 0, and that the fault was not a 1002 * (error_code & 4) == 0, and that the fault was not a
620 * protection error (error_code & 9) == 0. 1003 * protection error (error_code & 9) == 0.
621 */ 1004 */
622#ifdef CONFIG_X86_32 1005 if (unlikely(fault_in_kernel_space(address))) {
623 if (unlikely(address >= TASK_SIZE)) {
624#else
625 if (unlikely(address >= TASK_SIZE64)) {
626#endif
627 if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) && 1006 if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) &&
628 vmalloc_fault(address) >= 0) 1007 vmalloc_fault(address) >= 0)
629 return; 1008 return;
630 1009
631 /* Can handle a stale RO->RW TLB */ 1010 /* Can handle a stale RO->RW TLB: */
632 if (spurious_fault(address, error_code)) 1011 if (spurious_fault(error_code, address))
633 return; 1012 return;
634 1013
635 /* kprobes don't want to hook the spurious faults. */ 1014 /* kprobes don't want to hook the spurious faults: */
636 if (notify_page_fault(regs)) 1015 if (notify_page_fault(regs))
637 return; 1016 return;
638 /* 1017 /*
639 * Don't take the mm semaphore here. If we fixup a prefetch 1018 * Don't take the mm semaphore here. If we fixup a prefetch
640 * fault we could otherwise deadlock. 1019 * fault we could otherwise deadlock:
641 */ 1020 */
642 goto bad_area_nosemaphore; 1021 bad_area_nosemaphore(regs, error_code, address);
643 }
644 1022
645 /* kprobes don't want to hook the spurious faults. */
646 if (notify_page_fault(regs))
647 return; 1023 return;
1024 }
648 1025
1026 /* kprobes don't want to hook the spurious faults: */
1027 if (unlikely(notify_page_fault(regs)))
1028 return;
649 /* 1029 /*
650 * It's safe to allow irq's after cr2 has been saved and the 1030 * It's safe to allow irq's after cr2 has been saved and the
651 * vmalloc fault has been handled. 1031 * vmalloc fault has been handled.
652 * 1032 *
653 * User-mode registers count as a user access even for any 1033 * User-mode registers count as a user access even for any
654 * potential system fault or CPU buglet. 1034 * potential system fault or CPU buglet:
655 */ 1035 */
656 if (user_mode_vm(regs)) { 1036 if (user_mode_vm(regs)) {
657 local_irq_enable(); 1037 local_irq_enable();
658 error_code |= PF_USER; 1038 error_code |= PF_USER;
659 } else if (regs->flags & X86_EFLAGS_IF) 1039 } else {
660 local_irq_enable(); 1040 if (regs->flags & X86_EFLAGS_IF)
1041 local_irq_enable();
1042 }
661 1043
662#ifdef CONFIG_X86_64
663 if (unlikely(error_code & PF_RSVD)) 1044 if (unlikely(error_code & PF_RSVD))
664 pgtable_bad(address, regs, error_code); 1045 pgtable_bad(regs, error_code, address);
665#endif
666 1046
667 /* 1047 /*
668 * If we're in an interrupt, have no user context or are running in an 1048 * If we're in an interrupt, have no user context or are running
669 * atomic region then we must not take the fault. 1049 * in an atomic region then we must not take the fault:
670 */ 1050 */
671 if (unlikely(in_atomic() || !mm)) 1051 if (unlikely(in_atomic() || !mm)) {
672 goto bad_area_nosemaphore; 1052 bad_area_nosemaphore(regs, error_code, address);
1053 return;
1054 }
673 1055
674 /* 1056 /*
675 * When running in the kernel we expect faults to occur only to 1057 * When running in the kernel we expect faults to occur only to
676 * addresses in user space. All other faults represent errors in the 1058 * addresses in user space. All other faults represent errors in
677 * kernel and should generate an OOPS. Unfortunately, in the case of an 1059 * the kernel and should generate an OOPS. Unfortunately, in the
678 * erroneous fault occurring in a code path which already holds mmap_sem 1060 * case of an erroneous fault occurring in a code path which already
679 * we will deadlock attempting to validate the fault against the 1061 * holds mmap_sem we will deadlock attempting to validate the fault
680 * address space. Luckily the kernel only validly references user 1062 * against the address space. Luckily the kernel only validly
681 * space from well defined areas of code, which are listed in the 1063 * references user space from well defined areas of code, which are
682 * exceptions table. 1064 * listed in the exceptions table.
683 * 1065 *
684 * As the vast majority of faults will be valid we will only perform 1066 * As the vast majority of faults will be valid we will only perform
685 * the source reference check when there is a possibility of a deadlock. 1067 * the source reference check when there is a possibility of a
686 * Attempt to lock the address space, if we cannot we then validate the 1068 * deadlock. Attempt to lock the address space, if we cannot we then
687 * source. If this is invalid we can skip the address space check, 1069 * validate the source. If this is invalid we can skip the address
688 * thus avoiding the deadlock. 1070 * space check, thus avoiding the deadlock:
689 */ 1071 */
690 if (!down_read_trylock(&mm->mmap_sem)) { 1072 if (unlikely(!down_read_trylock(&mm->mmap_sem))) {
691 if ((error_code & PF_USER) == 0 && 1073 if ((error_code & PF_USER) == 0 &&
692 !search_exception_tables(regs->ip)) 1074 !search_exception_tables(regs->ip)) {
693 goto bad_area_nosemaphore; 1075 bad_area_nosemaphore(regs, error_code, address);
1076 return;
1077 }
694 down_read(&mm->mmap_sem); 1078 down_read(&mm->mmap_sem);
1079 } else {
1080 /*
1081 * The above down_read_trylock() might have succeeded in
1082 * which case we'll have missed the might_sleep() from
1083 * down_read():
1084 */
1085 might_sleep();
695 } 1086 }
696 1087
697 vma = find_vma(mm, address); 1088 vma = find_vma(mm, address);
698 if (!vma) 1089 if (unlikely(!vma)) {
699 goto bad_area; 1090 bad_area(regs, error_code, address);
700 if (vma->vm_start <= address) 1091 return;
1092 }
1093 if (likely(vma->vm_start <= address))
701 goto good_area; 1094 goto good_area;
702 if (!(vma->vm_flags & VM_GROWSDOWN)) 1095 if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) {
703 goto bad_area; 1096 bad_area(regs, error_code, address);
1097 return;
1098 }
704 if (error_code & PF_USER) { 1099 if (error_code & PF_USER) {
705 /* 1100 /*
706 * Accessing the stack below %sp is always a bug. 1101 * Accessing the stack below %sp is always a bug.
707 * The large cushion allows instructions like enter 1102 * The large cushion allows instructions like enter
708 * and pusha to work. ("enter $65535,$31" pushes 1103 * and pusha to work. ("enter $65535, $31" pushes
709 * 32 pointers and then decrements %sp by 65535.) 1104 * 32 pointers and then decrements %sp by 65535.)
710 */ 1105 */
711 if (address + 65536 + 32 * sizeof(unsigned long) < regs->sp) 1106 if (unlikely(address + 65536 + 32 * sizeof(unsigned long) < regs->sp)) {
712 goto bad_area; 1107 bad_area(regs, error_code, address);
1108 return;
1109 }
713 } 1110 }
714 if (expand_stack(vma, address)) 1111 if (unlikely(expand_stack(vma, address))) {
715 goto bad_area; 1112 bad_area(regs, error_code, address);
716/* 1113 return;
717 * Ok, we have a good vm_area for this memory access, so 1114 }
718 * we can handle it.. 1115
719 */ 1116 /*
1117 * Ok, we have a good vm_area for this memory access, so
1118 * we can handle it..
1119 */
720good_area: 1120good_area:
721 si_code = SEGV_ACCERR; 1121 write = error_code & PF_WRITE;
722 write = 0; 1122
723 switch (error_code & (PF_PROT|PF_WRITE)) { 1123 if (unlikely(access_error(error_code, write, vma))) {
724 default: /* 3: write, present */ 1124 bad_area_access_error(regs, error_code, address);
725 /* fall through */ 1125 return;
726 case PF_WRITE: /* write, not present */
727 if (!(vma->vm_flags & VM_WRITE))
728 goto bad_area;
729 write++;
730 break;
731 case PF_PROT: /* read, present */
732 goto bad_area;
733 case 0: /* read, not present */
734 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
735 goto bad_area;
736 } 1126 }
737 1127
738 /* 1128 /*
739 * If for any reason at all we couldn't handle the fault, 1129 * If for any reason at all we couldn't handle the fault,
740 * make sure we exit gracefully rather than endlessly redo 1130 * make sure we exit gracefully rather than endlessly redo
741 * the fault. 1131 * the fault:
742 */ 1132 */
743 fault = handle_mm_fault(mm, vma, address, write); 1133 fault = handle_mm_fault(mm, vma, address, write);
1134
744 if (unlikely(fault & VM_FAULT_ERROR)) { 1135 if (unlikely(fault & VM_FAULT_ERROR)) {
745 if (fault & VM_FAULT_OOM) 1136 mm_fault_error(regs, error_code, address, fault);
746 goto out_of_memory; 1137 return;
747 else if (fault & VM_FAULT_SIGBUS)
748 goto do_sigbus;
749 BUG();
750 } 1138 }
1139
751 if (fault & VM_FAULT_MAJOR) 1140 if (fault & VM_FAULT_MAJOR)
752 tsk->maj_flt++; 1141 tsk->maj_flt++;
753 else 1142 else
754 tsk->min_flt++; 1143 tsk->min_flt++;
755 1144
756#ifdef CONFIG_X86_32 1145 check_v8086_mode(regs, address, tsk);
757 /*
758 * Did it hit the DOS screen memory VA from vm86 mode?
759 */
760 if (v8086_mode(regs)) {
761 unsigned long bit = (address - 0xA0000) >> PAGE_SHIFT;
762 if (bit < 32)
763 tsk->thread.screen_bitmap |= 1 << bit;
764 }
765#endif
766 up_read(&mm->mmap_sem);
767 return;
768 1146
769/*
770 * Something tried to access memory that isn't in our memory map..
771 * Fix it, but check if it's kernel or user first..
772 */
773bad_area:
774 up_read(&mm->mmap_sem); 1147 up_read(&mm->mmap_sem);
775
776bad_area_nosemaphore:
777 /* User mode accesses just cause a SIGSEGV */
778 if (error_code & PF_USER) {
779 /*
780 * It's possible to have interrupts off here.
781 */
782 local_irq_enable();
783
784 /*
785 * Valid to do another page fault here because this one came
786 * from user space.
787 */
788 if (is_prefetch(regs, address, error_code))
789 return;
790
791 if (is_errata100(regs, address))
792 return;
793
794 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
795 printk_ratelimit()) {
796 printk(
797 "%s%s[%d]: segfault at %lx ip %p sp %p error %lx",
798 task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
799 tsk->comm, task_pid_nr(tsk), address,
800 (void *) regs->ip, (void *) regs->sp, error_code);
801 print_vma_addr(" in ", regs->ip);
802 printk("\n");
803 }
804
805 tsk->thread.cr2 = address;
806 /* Kernel addresses are always protection faults */
807 tsk->thread.error_code = error_code | (address >= TASK_SIZE);
808 tsk->thread.trap_no = 14;
809 force_sig_info_fault(SIGSEGV, si_code, address, tsk);
810 return;
811 }
812
813 if (is_f00f_bug(regs, address))
814 return;
815
816no_context:
817 /* Are we prepared to handle this kernel fault? */
818 if (fixup_exception(regs))
819 return;
820
821 /*
822 * X86_32
823 * Valid to do another page fault here, because if this fault
824 * had been triggered by is_prefetch fixup_exception would have
825 * handled it.
826 *
827 * X86_64
828 * Hall of shame of CPU/BIOS bugs.
829 */
830 if (is_prefetch(regs, address, error_code))
831 return;
832
833 if (is_errata93(regs, address))
834 return;
835
836/*
837 * Oops. The kernel tried to access some bad page. We'll have to
838 * terminate things with extreme prejudice.
839 */
840#ifdef CONFIG_X86_32
841 bust_spinlocks(1);
842#else
843 flags = oops_begin();
844#endif
845
846 show_fault_oops(regs, error_code, address);
847
848 tsk->thread.cr2 = address;
849 tsk->thread.trap_no = 14;
850 tsk->thread.error_code = error_code;
851
852#ifdef CONFIG_X86_32
853 die("Oops", regs, error_code);
854 bust_spinlocks(0);
855 do_exit(SIGKILL);
856#else
857 sig = SIGKILL;
858 if (__die("Oops", regs, error_code))
859 sig = 0;
860 /* Executive summary in case the body of the oops scrolled away */
861 printk(KERN_EMERG "CR2: %016lx\n", address);
862 oops_end(flags, regs, sig);
863#endif
864
865out_of_memory:
866 /*
867 * We ran out of memory, call the OOM killer, and return the userspace
868 * (which will retry the fault, or kill us if we got oom-killed).
869 */
870 up_read(&mm->mmap_sem);
871 pagefault_out_of_memory();
872 return;
873
874do_sigbus:
875 up_read(&mm->mmap_sem);
876
877 /* Kernel mode? Handle exceptions or die */
878 if (!(error_code & PF_USER))
879 goto no_context;
880#ifdef CONFIG_X86_32
881 /* User space => ok to do another page fault */
882 if (is_prefetch(regs, address, error_code))
883 return;
884#endif
885 tsk->thread.cr2 = address;
886 tsk->thread.error_code = error_code;
887 tsk->thread.trap_no = 14;
888 force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
889}
890
891DEFINE_SPINLOCK(pgd_lock);
892LIST_HEAD(pgd_list);
893
894void vmalloc_sync_all(void)
895{
896 unsigned long address;
897
898#ifdef CONFIG_X86_32
899 if (SHARED_KERNEL_PMD)
900 return;
901
902 for (address = VMALLOC_START & PMD_MASK;
903 address >= TASK_SIZE && address < FIXADDR_TOP;
904 address += PMD_SIZE) {
905 unsigned long flags;
906 struct page *page;
907
908 spin_lock_irqsave(&pgd_lock, flags);
909 list_for_each_entry(page, &pgd_list, lru) {
910 if (!vmalloc_sync_one(page_address(page),
911 address))
912 break;
913 }
914 spin_unlock_irqrestore(&pgd_lock, flags);
915 }
916#else /* CONFIG_X86_64 */
917 for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END;
918 address += PGDIR_SIZE) {
919 const pgd_t *pgd_ref = pgd_offset_k(address);
920 unsigned long flags;
921 struct page *page;
922
923 if (pgd_none(*pgd_ref))
924 continue;
925 spin_lock_irqsave(&pgd_lock, flags);
926 list_for_each_entry(page, &pgd_list, lru) {
927 pgd_t *pgd;
928 pgd = (pgd_t *)page_address(page) + pgd_index(address);
929 if (pgd_none(*pgd))
930 set_pgd(pgd, *pgd_ref);
931 else
932 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
933 }
934 spin_unlock_irqrestore(&pgd_lock, flags);
935 }
936#endif
937} 1148}
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index bcc079c282dd..00f127c80b0e 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -1,5 +1,6 @@
1#include <linux/highmem.h> 1#include <linux/highmem.h>
2#include <linux/module.h> 2#include <linux/module.h>
3#include <linux/swap.h> /* for totalram_pages */
3 4
4void *kmap(struct page *page) 5void *kmap(struct page *page)
5{ 6{
@@ -156,3 +157,36 @@ EXPORT_SYMBOL(kmap);
156EXPORT_SYMBOL(kunmap); 157EXPORT_SYMBOL(kunmap);
157EXPORT_SYMBOL(kmap_atomic); 158EXPORT_SYMBOL(kmap_atomic);
158EXPORT_SYMBOL(kunmap_atomic); 159EXPORT_SYMBOL(kunmap_atomic);
160
161#ifdef CONFIG_NUMA
162void __init set_highmem_pages_init(void)
163{
164 struct zone *zone;
165 int nid;
166
167 for_each_zone(zone) {
168 unsigned long zone_start_pfn, zone_end_pfn;
169
170 if (!is_highmem(zone))
171 continue;
172
173 zone_start_pfn = zone->zone_start_pfn;
174 zone_end_pfn = zone_start_pfn + zone->spanned_pages;
175
176 nid = zone_to_nid(zone);
177 printk(KERN_INFO "Initializing %s for node %d (%08lx:%08lx)\n",
178 zone->name, nid, zone_start_pfn, zone_end_pfn);
179
180 add_highpages_with_active_regions(nid, zone_start_pfn,
181 zone_end_pfn);
182 }
183 totalram_pages += totalhigh_pages;
184}
185#else
186void __init set_highmem_pages_init(void)
187{
188 add_highpages_with_active_regions(0, highstart_pfn, highend_pfn);
189
190 totalram_pages += totalhigh_pages;
191}
192#endif /* CONFIG_NUMA */
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
new file mode 100644
index 000000000000..ce6a722587d8
--- /dev/null
+++ b/arch/x86/mm/init.c
@@ -0,0 +1,49 @@
1#include <linux/swap.h>
2#include <asm/cacheflush.h>
3#include <asm/page.h>
4#include <asm/sections.h>
5#include <asm/system.h>
6
7void free_init_pages(char *what, unsigned long begin, unsigned long end)
8{
9 unsigned long addr = begin;
10
11 if (addr >= end)
12 return;
13
14 /*
15 * If debugging page accesses then do not free this memory but
16 * mark them not present - any buggy init-section access will
17 * create a kernel page fault:
18 */
19#ifdef CONFIG_DEBUG_PAGEALLOC
20 printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n",
21 begin, PAGE_ALIGN(end));
22 set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
23#else
24 /*
25 * We just marked the kernel text read only above, now that
26 * we are going to free part of that, we need to make that
27 * writeable first.
28 */
29 set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
30
31 printk(KERN_INFO "Freeing %s: %luk freed\n", what, (end - begin) >> 10);
32
33 for (; addr < end; addr += PAGE_SIZE) {
34 ClearPageReserved(virt_to_page(addr));
35 init_page_count(virt_to_page(addr));
36 memset((void *)(addr & ~(PAGE_SIZE-1)),
37 POISON_FREE_INITMEM, PAGE_SIZE);
38 free_page(addr);
39 totalram_pages++;
40 }
41#endif
42}
43
44void free_initmem(void)
45{
46 free_init_pages("unused kernel memory",
47 (unsigned long)(&__init_begin),
48 (unsigned long)(&__init_end));
49}
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 2cef05074413..47df0e1bbeb9 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -49,9 +49,6 @@
49#include <asm/paravirt.h> 49#include <asm/paravirt.h>
50#include <asm/setup.h> 50#include <asm/setup.h>
51#include <asm/cacheflush.h> 51#include <asm/cacheflush.h>
52#include <asm/smp.h>
53
54unsigned int __VMALLOC_RESERVE = 128 << 20;
55 52
56unsigned long max_low_pfn_mapped; 53unsigned long max_low_pfn_mapped;
57unsigned long max_pfn_mapped; 54unsigned long max_pfn_mapped;
@@ -138,6 +135,23 @@ static pte_t * __init one_page_table_init(pmd_t *pmd)
138 return pte_offset_kernel(pmd, 0); 135 return pte_offset_kernel(pmd, 0);
139} 136}
140 137
138pmd_t * __init populate_extra_pmd(unsigned long vaddr)
139{
140 int pgd_idx = pgd_index(vaddr);
141 int pmd_idx = pmd_index(vaddr);
142
143 return one_md_table_init(swapper_pg_dir + pgd_idx) + pmd_idx;
144}
145
146pte_t * __init populate_extra_pte(unsigned long vaddr)
147{
148 int pte_idx = pte_index(vaddr);
149 pmd_t *pmd;
150
151 pmd = populate_extra_pmd(vaddr);
152 return one_page_table_init(pmd) + pte_idx;
153}
154
141static pte_t *__init page_table_kmap_check(pte_t *pte, pmd_t *pmd, 155static pte_t *__init page_table_kmap_check(pte_t *pte, pmd_t *pmd,
142 unsigned long vaddr, pte_t *lastpte) 156 unsigned long vaddr, pte_t *lastpte)
143{ 157{
@@ -470,22 +484,10 @@ void __init add_highpages_with_active_regions(int nid, unsigned long start_pfn,
470 work_with_active_regions(nid, add_highpages_work_fn, &data); 484 work_with_active_regions(nid, add_highpages_work_fn, &data);
471} 485}
472 486
473#ifndef CONFIG_NUMA
474static void __init set_highmem_pages_init(void)
475{
476 add_highpages_with_active_regions(0, highstart_pfn, highend_pfn);
477
478 totalram_pages += totalhigh_pages;
479}
480#endif /* !CONFIG_NUMA */
481
482#else 487#else
483static inline void permanent_kmaps_init(pgd_t *pgd_base) 488static inline void permanent_kmaps_init(pgd_t *pgd_base)
484{ 489{
485} 490}
486static inline void set_highmem_pages_init(void)
487{
488}
489#endif /* CONFIG_HIGHMEM */ 491#endif /* CONFIG_HIGHMEM */
490 492
491void __init native_pagetable_setup_start(pgd_t *base) 493void __init native_pagetable_setup_start(pgd_t *base)
@@ -675,75 +677,97 @@ static int __init parse_highmem(char *arg)
675} 677}
676early_param("highmem", parse_highmem); 678early_param("highmem", parse_highmem);
677 679
680#define MSG_HIGHMEM_TOO_BIG \
681 "highmem size (%luMB) is bigger than pages available (%luMB)!\n"
682
683#define MSG_LOWMEM_TOO_SMALL \
684 "highmem size (%luMB) results in <64MB lowmem, ignoring it!\n"
678/* 685/*
679 * Determine low and high memory ranges: 686 * All of RAM fits into lowmem - but if user wants highmem
687 * artificially via the highmem=x boot parameter then create
688 * it:
680 */ 689 */
681void __init find_low_pfn_range(void) 690void __init lowmem_pfn_init(void)
682{ 691{
683 /* it could update max_pfn */
684
685 /* max_low_pfn is 0, we already have early_res support */ 692 /* max_low_pfn is 0, we already have early_res support */
686
687 max_low_pfn = max_pfn; 693 max_low_pfn = max_pfn;
688 if (max_low_pfn > MAXMEM_PFN) { 694
689 if (highmem_pages == -1) 695 if (highmem_pages == -1)
690 highmem_pages = max_pfn - MAXMEM_PFN; 696 highmem_pages = 0;
691 if (highmem_pages + MAXMEM_PFN < max_pfn) 697#ifdef CONFIG_HIGHMEM
692 max_pfn = MAXMEM_PFN + highmem_pages; 698 if (highmem_pages >= max_pfn) {
693 if (highmem_pages + MAXMEM_PFN > max_pfn) { 699 printk(KERN_ERR MSG_HIGHMEM_TOO_BIG,
694 printk(KERN_WARNING "only %luMB highmem pages " 700 pages_to_mb(highmem_pages), pages_to_mb(max_pfn));
695 "available, ignoring highmem size of %uMB.\n", 701 highmem_pages = 0;
696 pages_to_mb(max_pfn - MAXMEM_PFN), 702 }
703 if (highmem_pages) {
704 if (max_low_pfn - highmem_pages < 64*1024*1024/PAGE_SIZE) {
705 printk(KERN_ERR MSG_LOWMEM_TOO_SMALL,
697 pages_to_mb(highmem_pages)); 706 pages_to_mb(highmem_pages));
698 highmem_pages = 0; 707 highmem_pages = 0;
699 } 708 }
700 max_low_pfn = MAXMEM_PFN; 709 max_low_pfn -= highmem_pages;
710 }
711#else
712 if (highmem_pages)
713 printk(KERN_ERR "ignoring highmem size on non-highmem kernel!\n");
714#endif
715}
716
717#define MSG_HIGHMEM_TOO_SMALL \
718 "only %luMB highmem pages available, ignoring highmem size of %luMB!\n"
719
720#define MSG_HIGHMEM_TRIMMED \
721 "Warning: only 4GB will be used. Use a HIGHMEM64G enabled kernel!\n"
722/*
723 * We have more RAM than fits into lowmem - we try to put it into
724 * highmem, also taking the highmem=x boot parameter into account:
725 */
726void __init highmem_pfn_init(void)
727{
728 max_low_pfn = MAXMEM_PFN;
729
730 if (highmem_pages == -1)
731 highmem_pages = max_pfn - MAXMEM_PFN;
732
733 if (highmem_pages + MAXMEM_PFN < max_pfn)
734 max_pfn = MAXMEM_PFN + highmem_pages;
735
736 if (highmem_pages + MAXMEM_PFN > max_pfn) {
737 printk(KERN_WARNING MSG_HIGHMEM_TOO_SMALL,
738 pages_to_mb(max_pfn - MAXMEM_PFN),
739 pages_to_mb(highmem_pages));
740 highmem_pages = 0;
741 }
701#ifndef CONFIG_HIGHMEM 742#ifndef CONFIG_HIGHMEM
702 /* Maximum memory usable is what is directly addressable */ 743 /* Maximum memory usable is what is directly addressable */
703 printk(KERN_WARNING "Warning only %ldMB will be used.\n", 744 printk(KERN_WARNING "Warning only %ldMB will be used.\n", MAXMEM>>20);
704 MAXMEM>>20); 745 if (max_pfn > MAX_NONPAE_PFN)
705 if (max_pfn > MAX_NONPAE_PFN) 746 printk(KERN_WARNING "Use a HIGHMEM64G enabled kernel.\n");
706 printk(KERN_WARNING 747 else
707 "Use a HIGHMEM64G enabled kernel.\n"); 748 printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
708 else 749 max_pfn = MAXMEM_PFN;
709 printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
710 max_pfn = MAXMEM_PFN;
711#else /* !CONFIG_HIGHMEM */ 750#else /* !CONFIG_HIGHMEM */
712#ifndef CONFIG_HIGHMEM64G 751#ifndef CONFIG_HIGHMEM64G
713 if (max_pfn > MAX_NONPAE_PFN) { 752 if (max_pfn > MAX_NONPAE_PFN) {
714 max_pfn = MAX_NONPAE_PFN; 753 max_pfn = MAX_NONPAE_PFN;
715 printk(KERN_WARNING "Warning only 4GB will be used." 754 printk(KERN_WARNING MSG_HIGHMEM_TRIMMED);
716 "Use a HIGHMEM64G enabled kernel.\n"); 755 }
717 }
718#endif /* !CONFIG_HIGHMEM64G */ 756#endif /* !CONFIG_HIGHMEM64G */
719#endif /* !CONFIG_HIGHMEM */ 757#endif /* !CONFIG_HIGHMEM */
720 } else { 758}
721 if (highmem_pages == -1) 759
722 highmem_pages = 0; 760/*
723#ifdef CONFIG_HIGHMEM 761 * Determine low and high memory ranges:
724 if (highmem_pages >= max_pfn) { 762 */
725 printk(KERN_ERR "highmem size specified (%uMB) is " 763void __init find_low_pfn_range(void)
726 "bigger than pages available (%luMB)!.\n", 764{
727 pages_to_mb(highmem_pages), 765 /* it could update max_pfn */
728 pages_to_mb(max_pfn)); 766
729 highmem_pages = 0; 767 if (max_pfn <= MAXMEM_PFN)
730 } 768 lowmem_pfn_init();
731 if (highmem_pages) { 769 else
732 if (max_low_pfn - highmem_pages < 770 highmem_pfn_init();
733 64*1024*1024/PAGE_SIZE){
734 printk(KERN_ERR "highmem size %uMB results in "
735 "smaller than 64MB lowmem, ignoring it.\n"
736 , pages_to_mb(highmem_pages));
737 highmem_pages = 0;
738 }
739 max_low_pfn -= highmem_pages;
740 }
741#else
742 if (highmem_pages)
743 printk(KERN_ERR "ignoring highmem size on non-highmem"
744 " kernel!\n");
745#endif
746 }
747} 771}
748 772
749#ifndef CONFIG_NEED_MULTIPLE_NODES 773#ifndef CONFIG_NEED_MULTIPLE_NODES
@@ -826,10 +850,10 @@ static void __init find_early_table_space(unsigned long end, int use_pse)
826 unsigned long puds, pmds, ptes, tables, start; 850 unsigned long puds, pmds, ptes, tables, start;
827 851
828 puds = (end + PUD_SIZE - 1) >> PUD_SHIFT; 852 puds = (end + PUD_SIZE - 1) >> PUD_SHIFT;
829 tables = PAGE_ALIGN(puds * sizeof(pud_t)); 853 tables = roundup(puds * sizeof(pud_t), PAGE_SIZE);
830 854
831 pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT; 855 pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT;
832 tables += PAGE_ALIGN(pmds * sizeof(pmd_t)); 856 tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE);
833 857
834 if (use_pse) { 858 if (use_pse) {
835 unsigned long extra; 859 unsigned long extra;
@@ -840,10 +864,10 @@ static void __init find_early_table_space(unsigned long end, int use_pse)
840 } else 864 } else
841 ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT; 865 ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
842 866
843 tables += PAGE_ALIGN(ptes * sizeof(pte_t)); 867 tables += roundup(ptes * sizeof(pte_t), PAGE_SIZE);
844 868
845 /* for fixmap */ 869 /* for fixmap */
846 tables += PAGE_ALIGN(__end_of_fixed_addresses * sizeof(pte_t)); 870 tables += roundup(__end_of_fixed_addresses * sizeof(pte_t), PAGE_SIZE);
847 871
848 /* 872 /*
849 * RED-PEN putting page tables only on node 0 could 873 * RED-PEN putting page tables only on node 0 could
@@ -1193,45 +1217,6 @@ void mark_rodata_ro(void)
1193} 1217}
1194#endif 1218#endif
1195 1219
1196void free_init_pages(char *what, unsigned long begin, unsigned long end)
1197{
1198#ifdef CONFIG_DEBUG_PAGEALLOC
1199 /*
1200 * If debugging page accesses then do not free this memory but
1201 * mark them not present - any buggy init-section access will
1202 * create a kernel page fault:
1203 */
1204 printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n",
1205 begin, PAGE_ALIGN(end));
1206 set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
1207#else
1208 unsigned long addr;
1209
1210 /*
1211 * We just marked the kernel text read only above, now that
1212 * we are going to free part of that, we need to make that
1213 * writeable first.
1214 */
1215 set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
1216
1217 for (addr = begin; addr < end; addr += PAGE_SIZE) {
1218 ClearPageReserved(virt_to_page(addr));
1219 init_page_count(virt_to_page(addr));
1220 memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE);
1221 free_page(addr);
1222 totalram_pages++;
1223 }
1224 printk(KERN_INFO "Freeing %s: %luk freed\n", what, (end - begin) >> 10);
1225#endif
1226}
1227
1228void free_initmem(void)
1229{
1230 free_init_pages("unused kernel memory",
1231 (unsigned long)(&__init_begin),
1232 (unsigned long)(&__init_end));
1233}
1234
1235#ifdef CONFIG_BLK_DEV_INITRD 1220#ifdef CONFIG_BLK_DEV_INITRD
1236void free_initrd_mem(unsigned long start, unsigned long end) 1221void free_initrd_mem(unsigned long start, unsigned long end)
1237{ 1222{
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index b1352250096e..07f44d491df1 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -168,34 +168,51 @@ static __ref void *spp_getpage(void)
168 return ptr; 168 return ptr;
169} 169}
170 170
171void 171static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
172set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
173{ 172{
174 pud_t *pud; 173 if (pgd_none(*pgd)) {
175 pmd_t *pmd; 174 pud_t *pud = (pud_t *)spp_getpage();
176 pte_t *pte; 175 pgd_populate(&init_mm, pgd, pud);
176 if (pud != pud_offset(pgd, 0))
177 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
178 pud, pud_offset(pgd, 0));
179 }
180 return pud_offset(pgd, vaddr);
181}
177 182
178 pud = pud_page + pud_index(vaddr); 183static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
184{
179 if (pud_none(*pud)) { 185 if (pud_none(*pud)) {
180 pmd = (pmd_t *) spp_getpage(); 186 pmd_t *pmd = (pmd_t *) spp_getpage();
181 pud_populate(&init_mm, pud, pmd); 187 pud_populate(&init_mm, pud, pmd);
182 if (pmd != pmd_offset(pud, 0)) { 188 if (pmd != pmd_offset(pud, 0))
183 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", 189 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
184 pmd, pmd_offset(pud, 0)); 190 pmd, pmd_offset(pud, 0));
185 return;
186 }
187 } 191 }
188 pmd = pmd_offset(pud, vaddr); 192 return pmd_offset(pud, vaddr);
193}
194
195static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
196{
189 if (pmd_none(*pmd)) { 197 if (pmd_none(*pmd)) {
190 pte = (pte_t *) spp_getpage(); 198 pte_t *pte = (pte_t *) spp_getpage();
191 pmd_populate_kernel(&init_mm, pmd, pte); 199 pmd_populate_kernel(&init_mm, pmd, pte);
192 if (pte != pte_offset_kernel(pmd, 0)) { 200 if (pte != pte_offset_kernel(pmd, 0))
193 printk(KERN_ERR "PAGETABLE BUG #02!\n"); 201 printk(KERN_ERR "PAGETABLE BUG #02!\n");
194 return;
195 }
196 } 202 }
203 return pte_offset_kernel(pmd, vaddr);
204}
205
206void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
207{
208 pud_t *pud;
209 pmd_t *pmd;
210 pte_t *pte;
211
212 pud = pud_page + pud_index(vaddr);
213 pmd = fill_pmd(pud, vaddr);
214 pte = fill_pte(pmd, vaddr);
197 215
198 pte = pte_offset_kernel(pmd, vaddr);
199 set_pte(pte, new_pte); 216 set_pte(pte, new_pte);
200 217
201 /* 218 /*
@@ -205,8 +222,7 @@ set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
205 __flush_tlb_one(vaddr); 222 __flush_tlb_one(vaddr);
206} 223}
207 224
208void 225void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
209set_pte_vaddr(unsigned long vaddr, pte_t pteval)
210{ 226{
211 pgd_t *pgd; 227 pgd_t *pgd;
212 pud_t *pud_page; 228 pud_t *pud_page;
@@ -223,6 +239,24 @@ set_pte_vaddr(unsigned long vaddr, pte_t pteval)
223 set_pte_vaddr_pud(pud_page, vaddr, pteval); 239 set_pte_vaddr_pud(pud_page, vaddr, pteval);
224} 240}
225 241
242pmd_t * __init populate_extra_pmd(unsigned long vaddr)
243{
244 pgd_t *pgd;
245 pud_t *pud;
246
247 pgd = pgd_offset_k(vaddr);
248 pud = fill_pud(pgd, vaddr);
249 return fill_pmd(pud, vaddr);
250}
251
252pte_t * __init populate_extra_pte(unsigned long vaddr)
253{
254 pmd_t *pmd;
255
256 pmd = populate_extra_pmd(vaddr);
257 return fill_pte(pmd, vaddr);
258}
259
226/* 260/*
227 * Create large page table mappings for a range of physical addresses. 261 * Create large page table mappings for a range of physical addresses.
228 */ 262 */
@@ -947,43 +981,6 @@ void __init mem_init(void)
947 initsize >> 10); 981 initsize >> 10);
948} 982}
949 983
950void free_init_pages(char *what, unsigned long begin, unsigned long end)
951{
952 unsigned long addr = begin;
953
954 if (addr >= end)
955 return;
956
957 /*
958 * If debugging page accesses then do not free this memory but
959 * mark them not present - any buggy init-section access will
960 * create a kernel page fault:
961 */
962#ifdef CONFIG_DEBUG_PAGEALLOC
963 printk(KERN_INFO "debug: unmapping init memory %08lx..%08lx\n",
964 begin, PAGE_ALIGN(end));
965 set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
966#else
967 printk(KERN_INFO "Freeing %s: %luk freed\n", what, (end - begin) >> 10);
968
969 for (; addr < end; addr += PAGE_SIZE) {
970 ClearPageReserved(virt_to_page(addr));
971 init_page_count(virt_to_page(addr));
972 memset((void *)(addr & ~(PAGE_SIZE-1)),
973 POISON_FREE_INITMEM, PAGE_SIZE);
974 free_page(addr);
975 totalram_pages++;
976 }
977#endif
978}
979
980void free_initmem(void)
981{
982 free_init_pages("unused kernel memory",
983 (unsigned long)(&__init_begin),
984 (unsigned long)(&__init_end));
985}
986
987#ifdef CONFIG_DEBUG_RODATA 984#ifdef CONFIG_DEBUG_RODATA
988const int rodata_test_data = 0xC3; 985const int rodata_test_data = 0xC3;
989EXPORT_SYMBOL_GPL(rodata_test_data); 986EXPORT_SYMBOL_GPL(rodata_test_data);
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index f45d5e29a72e..433f7bd4648a 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -348,7 +348,7 @@ EXPORT_SYMBOL(ioremap_nocache);
348 * 348 *
349 * Must be freed with iounmap. 349 * Must be freed with iounmap.
350 */ 350 */
351void __iomem *ioremap_wc(unsigned long phys_addr, unsigned long size) 351void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size)
352{ 352{
353 if (pat_enabled) 353 if (pat_enabled)
354 return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC, 354 return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC,
diff --git a/arch/x86/mm/memtest.c b/arch/x86/mm/memtest.c
index 9cab18b0b857..0bcd7883d036 100644
--- a/arch/x86/mm/memtest.c
+++ b/arch/x86/mm/memtest.c
@@ -9,44 +9,44 @@
9 9
10#include <asm/e820.h> 10#include <asm/e820.h>
11 11
12static void __init memtest(unsigned long start_phys, unsigned long size, 12static u64 patterns[] __initdata = {
13 unsigned pattern) 13 0,
14 0xffffffffffffffffULL,
15 0x5555555555555555ULL,
16 0xaaaaaaaaaaaaaaaaULL,
17 0x1111111111111111ULL,
18 0x2222222222222222ULL,
19 0x4444444444444444ULL,
20 0x8888888888888888ULL,
21 0x3333333333333333ULL,
22 0x6666666666666666ULL,
23 0x9999999999999999ULL,
24 0xccccccccccccccccULL,
25 0x7777777777777777ULL,
26 0xbbbbbbbbbbbbbbbbULL,
27 0xddddddddddddddddULL,
28 0xeeeeeeeeeeeeeeeeULL,
29 0x7a6c7258554e494cULL, /* yeah ;-) */
30};
31
32static void __init reserve_bad_mem(u64 pattern, u64 start_bad, u64 end_bad)
14{ 33{
15 unsigned long i; 34 printk(KERN_INFO " %016llx bad mem addr %010llx - %010llx reserved\n",
16 unsigned long *start; 35 (unsigned long long) pattern,
17 unsigned long start_bad; 36 (unsigned long long) start_bad,
18 unsigned long last_bad; 37 (unsigned long long) end_bad);
19 unsigned long val; 38 reserve_early(start_bad, end_bad, "BAD RAM");
20 unsigned long start_phys_aligned; 39}
21 unsigned long count;
22 unsigned long incr;
23
24 switch (pattern) {
25 case 0:
26 val = 0UL;
27 break;
28 case 1:
29 val = -1UL;
30 break;
31 case 2:
32#ifdef CONFIG_X86_64
33 val = 0x5555555555555555UL;
34#else
35 val = 0x55555555UL;
36#endif
37 break;
38 case 3:
39#ifdef CONFIG_X86_64
40 val = 0xaaaaaaaaaaaaaaaaUL;
41#else
42 val = 0xaaaaaaaaUL;
43#endif
44 break;
45 default:
46 return;
47 }
48 40
49 incr = sizeof(unsigned long); 41static void __init memtest(u64 pattern, u64 start_phys, u64 size)
42{
43 u64 i, count;
44 u64 *start;
45 u64 start_bad, last_bad;
46 u64 start_phys_aligned;
47 size_t incr;
48
49 incr = sizeof(pattern);
50 start_phys_aligned = ALIGN(start_phys, incr); 50 start_phys_aligned = ALIGN(start_phys, incr);
51 count = (size - (start_phys_aligned - start_phys))/incr; 51 count = (size - (start_phys_aligned - start_phys))/incr;
52 start = __va(start_phys_aligned); 52 start = __va(start_phys_aligned);
@@ -54,25 +54,42 @@ static void __init memtest(unsigned long start_phys, unsigned long size,
54 last_bad = 0; 54 last_bad = 0;
55 55
56 for (i = 0; i < count; i++) 56 for (i = 0; i < count; i++)
57 start[i] = val; 57 start[i] = pattern;
58 for (i = 0; i < count; i++, start++, start_phys_aligned += incr) { 58 for (i = 0; i < count; i++, start++, start_phys_aligned += incr) {
59 if (*start != val) { 59 if (*start == pattern)
60 if (start_phys_aligned == last_bad + incr) { 60 continue;
61 last_bad += incr; 61 if (start_phys_aligned == last_bad + incr) {
62 } else { 62 last_bad += incr;
63 if (start_bad) { 63 continue;
64 printk(KERN_CONT "\n %016lx bad mem addr %010lx - %010lx reserved",
65 val, start_bad, last_bad + incr);
66 reserve_early(start_bad, last_bad + incr, "BAD RAM");
67 }
68 start_bad = last_bad = start_phys_aligned;
69 }
70 } 64 }
65 if (start_bad)
66 reserve_bad_mem(pattern, start_bad, last_bad + incr);
67 start_bad = last_bad = start_phys_aligned;
71 } 68 }
72 if (start_bad) { 69 if (start_bad)
73 printk(KERN_CONT "\n %016lx bad mem addr %010lx - %010lx reserved", 70 reserve_bad_mem(pattern, start_bad, last_bad + incr);
74 val, start_bad, last_bad + incr); 71}
75 reserve_early(start_bad, last_bad + incr, "BAD RAM"); 72
73static void __init do_one_pass(u64 pattern, u64 start, u64 end)
74{
75 u64 size = 0;
76
77 while (start < end) {
78 start = find_e820_area_size(start, &size, 1);
79
80 /* done ? */
81 if (start >= end)
82 break;
83 if (start + size > end)
84 size = end - start;
85
86 printk(KERN_INFO " %010llx - %010llx pattern %016llx\n",
87 (unsigned long long) start,
88 (unsigned long long) start + size,
89 (unsigned long long) cpu_to_be64(pattern));
90 memtest(pattern, start, size);
91
92 start += size;
76 } 93 }
77} 94}
78 95
@@ -90,33 +107,22 @@ early_param("memtest", parse_memtest);
90 107
91void __init early_memtest(unsigned long start, unsigned long end) 108void __init early_memtest(unsigned long start, unsigned long end)
92{ 109{
93 u64 t_start, t_size; 110 unsigned int i;
94 unsigned pattern; 111 unsigned int idx = 0;
95 112
96 if (!memtest_pattern) 113 if (!memtest_pattern)
97 return; 114 return;
98 115
99 printk(KERN_INFO "early_memtest: pattern num %d", memtest_pattern); 116 printk(KERN_INFO "early_memtest: # of tests: %d\n", memtest_pattern);
100 for (pattern = 0; pattern < memtest_pattern; pattern++) { 117 for (i = 0; i < memtest_pattern; i++) {
101 t_start = start; 118 idx = i % ARRAY_SIZE(patterns);
102 t_size = 0; 119 do_one_pass(patterns[idx], start, end);
103 while (t_start < end) { 120 }
104 t_start = find_e820_area_size(t_start, &t_size, 1);
105
106 /* done ? */
107 if (t_start >= end)
108 break;
109 if (t_start + t_size > end)
110 t_size = end - t_start;
111
112 printk(KERN_CONT "\n %010llx - %010llx pattern %d",
113 (unsigned long long)t_start,
114 (unsigned long long)t_start + t_size, pattern);
115
116 memtest(t_start, t_size, pattern);
117 121
118 t_start += t_size; 122 if (idx > 0) {
119 } 123 printk(KERN_INFO "early_memtest: wipe out "
124 "test pattern from memory\n");
125 /* additional test with pattern 0 will do this */
126 do_one_pass(0, start, end);
120 } 127 }
121 printk(KERN_CONT "\n");
122} 128}
diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
index 56fe7124fbec..165829600566 100644
--- a/arch/x86/mm/mmap.c
+++ b/arch/x86/mm/mmap.c
@@ -4,7 +4,7 @@
4 * Based on code by Ingo Molnar and Andi Kleen, copyrighted 4 * Based on code by Ingo Molnar and Andi Kleen, copyrighted
5 * as follows: 5 * as follows:
6 * 6 *
7 * Copyright 2003-2004 Red Hat Inc., Durham, North Carolina. 7 * Copyright 2003-2009 Red Hat Inc.
8 * All Rights Reserved. 8 * All Rights Reserved.
9 * Copyright 2005 Andi Kleen, SUSE Labs. 9 * Copyright 2005 Andi Kleen, SUSE Labs.
10 * Copyright 2007 Jiri Kosina, SUSE Labs. 10 * Copyright 2007 Jiri Kosina, SUSE Labs.
diff --git a/arch/x86/mm/numa_32.c b/arch/x86/mm/numa_32.c
index d1f7439d173c..451fe95a0352 100644
--- a/arch/x86/mm/numa_32.c
+++ b/arch/x86/mm/numa_32.c
@@ -194,7 +194,7 @@ void *alloc_remap(int nid, unsigned long size)
194 size = ALIGN(size, L1_CACHE_BYTES); 194 size = ALIGN(size, L1_CACHE_BYTES);
195 195
196 if (!allocation || (allocation + size) >= node_remap_end_vaddr[nid]) 196 if (!allocation || (allocation + size) >= node_remap_end_vaddr[nid])
197 return 0; 197 return NULL;
198 198
199 node_remap_alloc_vaddr[nid] += size; 199 node_remap_alloc_vaddr[nid] += size;
200 memset(allocation, 0, size); 200 memset(allocation, 0, size);
@@ -423,32 +423,6 @@ void __init initmem_init(unsigned long start_pfn,
423 setup_bootmem_allocator(); 423 setup_bootmem_allocator();
424} 424}
425 425
426void __init set_highmem_pages_init(void)
427{
428#ifdef CONFIG_HIGHMEM
429 struct zone *zone;
430 int nid;
431
432 for_each_zone(zone) {
433 unsigned long zone_start_pfn, zone_end_pfn;
434
435 if (!is_highmem(zone))
436 continue;
437
438 zone_start_pfn = zone->zone_start_pfn;
439 zone_end_pfn = zone_start_pfn + zone->spanned_pages;
440
441 nid = zone_to_nid(zone);
442 printk(KERN_INFO "Initializing %s for node %d (%08lx:%08lx)\n",
443 zone->name, nid, zone_start_pfn, zone_end_pfn);
444
445 add_highpages_with_active_regions(nid, zone_start_pfn,
446 zone_end_pfn);
447 }
448 totalram_pages += totalhigh_pages;
449#endif
450}
451
452#ifdef CONFIG_MEMORY_HOTPLUG 426#ifdef CONFIG_MEMORY_HOTPLUG
453static int paddr_to_nid(u64 addr) 427static int paddr_to_nid(u64 addr)
454{ 428{
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index f3516da035d1..64c9cf043cdd 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -20,6 +20,12 @@
20#include <asm/acpi.h> 20#include <asm/acpi.h>
21#include <asm/k8.h> 21#include <asm/k8.h>
22 22
23#ifdef CONFIG_DEBUG_PER_CPU_MAPS
24# define DBG(x...) printk(KERN_DEBUG x)
25#else
26# define DBG(x...)
27#endif
28
23struct pglist_data *node_data[MAX_NUMNODES] __read_mostly; 29struct pglist_data *node_data[MAX_NUMNODES] __read_mostly;
24EXPORT_SYMBOL(node_data); 30EXPORT_SYMBOL(node_data);
25 31
@@ -33,6 +39,21 @@ int numa_off __initdata;
33static unsigned long __initdata nodemap_addr; 39static unsigned long __initdata nodemap_addr;
34static unsigned long __initdata nodemap_size; 40static unsigned long __initdata nodemap_size;
35 41
42DEFINE_PER_CPU(int, node_number) = 0;
43EXPORT_PER_CPU_SYMBOL(node_number);
44
45/*
46 * Map cpu index to node index
47 */
48DEFINE_EARLY_PER_CPU(int, x86_cpu_to_node_map, NUMA_NO_NODE);
49EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_node_map);
50
51/*
52 * Which logical CPUs are on which nodes
53 */
54cpumask_t *node_to_cpumask_map;
55EXPORT_SYMBOL(node_to_cpumask_map);
56
36/* 57/*
37 * Given a shift value, try to populate memnodemap[] 58 * Given a shift value, try to populate memnodemap[]
38 * Returns : 59 * Returns :
@@ -640,3 +661,199 @@ void __init init_cpu_to_node(void)
640#endif 661#endif
641 662
642 663
664/*
665 * Allocate node_to_cpumask_map based on number of available nodes
666 * Requires node_possible_map to be valid.
667 *
668 * Note: node_to_cpumask() is not valid until after this is done.
669 * (Use CONFIG_DEBUG_PER_CPU_MAPS to check this.)
670 */
671void __init setup_node_to_cpumask_map(void)
672{
673 unsigned int node, num = 0;
674 cpumask_t *map;
675
676 /* setup nr_node_ids if not done yet */
677 if (nr_node_ids == MAX_NUMNODES) {
678 for_each_node_mask(node, node_possible_map)
679 num = node;
680 nr_node_ids = num + 1;
681 }
682
683 /* allocate the map */
684 map = alloc_bootmem_low(nr_node_ids * sizeof(cpumask_t));
685 DBG("node_to_cpumask_map at %p for %d nodes\n", map, nr_node_ids);
686
687 pr_debug("Node to cpumask map at %p for %d nodes\n",
688 map, nr_node_ids);
689
690 /* node_to_cpumask() will now work */
691 node_to_cpumask_map = map;
692}
693
694void __cpuinit numa_set_node(int cpu, int node)
695{
696 int *cpu_to_node_map = early_per_cpu_ptr(x86_cpu_to_node_map);
697
698 /* early setting, no percpu area yet */
699 if (cpu_to_node_map) {
700 cpu_to_node_map[cpu] = node;
701 return;
702 }
703
704#ifdef CONFIG_DEBUG_PER_CPU_MAPS
705 if (cpu >= nr_cpu_ids || !cpu_possible(cpu)) {
706 printk(KERN_ERR "numa_set_node: invalid cpu# (%d)\n", cpu);
707 dump_stack();
708 return;
709 }
710#endif
711 per_cpu(x86_cpu_to_node_map, cpu) = node;
712
713 if (node != NUMA_NO_NODE)
714 per_cpu(node_number, cpu) = node;
715}
716
717void __cpuinit numa_clear_node(int cpu)
718{
719 numa_set_node(cpu, NUMA_NO_NODE);
720}
721
722#ifndef CONFIG_DEBUG_PER_CPU_MAPS
723
724void __cpuinit numa_add_cpu(int cpu)
725{
726 cpu_set(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]);
727}
728
729void __cpuinit numa_remove_cpu(int cpu)
730{
731 cpu_clear(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]);
732}
733
734#else /* CONFIG_DEBUG_PER_CPU_MAPS */
735
736/*
737 * --------- debug versions of the numa functions ---------
738 */
739static void __cpuinit numa_set_cpumask(int cpu, int enable)
740{
741 int node = early_cpu_to_node(cpu);
742 cpumask_t *mask;
743 char buf[64];
744
745 if (node_to_cpumask_map == NULL) {
746 printk(KERN_ERR "node_to_cpumask_map NULL\n");
747 dump_stack();
748 return;
749 }
750
751 mask = &node_to_cpumask_map[node];
752 if (enable)
753 cpu_set(cpu, *mask);
754 else
755 cpu_clear(cpu, *mask);
756
757 cpulist_scnprintf(buf, sizeof(buf), mask);
758 printk(KERN_DEBUG "%s cpu %d node %d: mask now %s\n",
759 enable ? "numa_add_cpu" : "numa_remove_cpu", cpu, node, buf);
760}
761
762void __cpuinit numa_add_cpu(int cpu)
763{
764 numa_set_cpumask(cpu, 1);
765}
766
767void __cpuinit numa_remove_cpu(int cpu)
768{
769 numa_set_cpumask(cpu, 0);
770}
771
772int cpu_to_node(int cpu)
773{
774 if (early_per_cpu_ptr(x86_cpu_to_node_map)) {
775 printk(KERN_WARNING
776 "cpu_to_node(%d): usage too early!\n", cpu);
777 dump_stack();
778 return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
779 }
780 return per_cpu(x86_cpu_to_node_map, cpu);
781}
782EXPORT_SYMBOL(cpu_to_node);
783
784/*
785 * Same function as cpu_to_node() but used if called before the
786 * per_cpu areas are setup.
787 */
788int early_cpu_to_node(int cpu)
789{
790 if (early_per_cpu_ptr(x86_cpu_to_node_map))
791 return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
792
793 if (!cpu_possible(cpu)) {
794 printk(KERN_WARNING
795 "early_cpu_to_node(%d): no per_cpu area!\n", cpu);
796 dump_stack();
797 return NUMA_NO_NODE;
798 }
799 return per_cpu(x86_cpu_to_node_map, cpu);
800}
801
802
803/* empty cpumask */
804static const cpumask_t cpu_mask_none;
805
806/*
807 * Returns a pointer to the bitmask of CPUs on Node 'node'.
808 */
809const cpumask_t *cpumask_of_node(int node)
810{
811 if (node_to_cpumask_map == NULL) {
812 printk(KERN_WARNING
813 "cpumask_of_node(%d): no node_to_cpumask_map!\n",
814 node);
815 dump_stack();
816 return (const cpumask_t *)&cpu_online_map;
817 }
818 if (node >= nr_node_ids) {
819 printk(KERN_WARNING
820 "cpumask_of_node(%d): node > nr_node_ids(%d)\n",
821 node, nr_node_ids);
822 dump_stack();
823 return &cpu_mask_none;
824 }
825 return &node_to_cpumask_map[node];
826}
827EXPORT_SYMBOL(cpumask_of_node);
828
829/*
830 * Returns a bitmask of CPUs on Node 'node'.
831 *
832 * Side note: this function creates the returned cpumask on the stack
833 * so with a high NR_CPUS count, excessive stack space is used. The
834 * node_to_cpumask_ptr function should be used whenever possible.
835 */
836cpumask_t node_to_cpumask(int node)
837{
838 if (node_to_cpumask_map == NULL) {
839 printk(KERN_WARNING
840 "node_to_cpumask(%d): no node_to_cpumask_map!\n", node);
841 dump_stack();
842 return cpu_online_map;
843 }
844 if (node >= nr_node_ids) {
845 printk(KERN_WARNING
846 "node_to_cpumask(%d): node > nr_node_ids(%d)\n",
847 node, nr_node_ids);
848 dump_stack();
849 return cpu_mask_none;
850 }
851 return node_to_cpumask_map[node];
852}
853EXPORT_SYMBOL(node_to_cpumask);
854
855/*
856 * --------- end of debug versions of the numa functions ---------
857 */
858
859#endif /* CONFIG_DEBUG_PER_CPU_MAPS */
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 7233bd7e357b..9c4294986af7 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -482,6 +482,13 @@ static int split_large_page(pte_t *kpte, unsigned long address)
482 pbase = (pte_t *)page_address(base); 482 pbase = (pte_t *)page_address(base);
483 paravirt_alloc_pte(&init_mm, page_to_pfn(base)); 483 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
484 ref_prot = pte_pgprot(pte_clrhuge(*kpte)); 484 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
485 /*
486 * If we ever want to utilize the PAT bit, we need to
487 * update this function to make sure it's converted from
488 * bit 12 to bit 7 when we cross from the 2MB level to
489 * the 4K level:
490 */
491 WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
485 492
486#ifdef CONFIG_X86_64 493#ifdef CONFIG_X86_64
487 if (level == PG_LEVEL_1G) { 494 if (level == PG_LEVEL_1G) {
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index e0ab173b6974..2ed37158012d 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -31,7 +31,7 @@
31#ifdef CONFIG_X86_PAT 31#ifdef CONFIG_X86_PAT
32int __read_mostly pat_enabled = 1; 32int __read_mostly pat_enabled = 1;
33 33
34void __cpuinit pat_disable(char *reason) 34void __cpuinit pat_disable(const char *reason)
35{ 35{
36 pat_enabled = 0; 36 pat_enabled = 0;
37 printk(KERN_INFO "%s\n", reason); 37 printk(KERN_INFO "%s\n", reason);
@@ -43,6 +43,11 @@ static int __init nopat(char *str)
43 return 0; 43 return 0;
44} 44}
45early_param("nopat", nopat); 45early_param("nopat", nopat);
46#else
47static inline void pat_disable(const char *reason)
48{
49 (void)reason;
50}
46#endif 51#endif
47 52
48 53
@@ -79,16 +84,20 @@ void pat_init(void)
79 if (!pat_enabled) 84 if (!pat_enabled)
80 return; 85 return;
81 86
82 /* Paranoia check. */ 87 if (!cpu_has_pat) {
83 if (!cpu_has_pat && boot_pat_state) { 88 if (!boot_pat_state) {
84 /* 89 pat_disable("PAT not supported by CPU.");
85 * If this happens we are on a secondary CPU, but 90 return;
86 * switched to PAT on the boot CPU. We have no way to 91 } else {
87 * undo PAT. 92 /*
88 */ 93 * If this happens we are on a secondary CPU, but
89 printk(KERN_ERR "PAT enabled, " 94 * switched to PAT on the boot CPU. We have no way to
90 "but not supported by secondary CPU\n"); 95 * undo PAT.
91 BUG(); 96 */
97 printk(KERN_ERR "PAT enabled, "
98 "but not supported by secondary CPU\n");
99 BUG();
100 }
92 } 101 }
93 102
94 /* Set PWT to Write-Combining. All other bits stay the same */ 103 /* Set PWT to Write-Combining. All other bits stay the same */
@@ -626,6 +635,33 @@ void unmap_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
626} 635}
627 636
628/* 637/*
638 * Change the memory type for the physial address range in kernel identity
639 * mapping space if that range is a part of identity map.
640 */
641int kernel_map_sync_memtype(u64 base, unsigned long size, unsigned long flags)
642{
643 unsigned long id_sz;
644
645 if (!pat_enabled || base >= __pa(high_memory))
646 return 0;
647
648 id_sz = (__pa(high_memory) < base + size) ?
649 __pa(high_memory) - base :
650 size;
651
652 if (ioremap_change_attr((unsigned long)__va(base), id_sz, flags) < 0) {
653 printk(KERN_INFO
654 "%s:%d ioremap_change_attr failed %s "
655 "for %Lx-%Lx\n",
656 current->comm, current->pid,
657 cattr_name(flags),
658 base, (unsigned long long)(base + size));
659 return -EINVAL;
660 }
661 return 0;
662}
663
664/*
629 * Internal interface to reserve a range of physical memory with prot. 665 * Internal interface to reserve a range of physical memory with prot.
630 * Reserved non RAM regions only and after successful reserve_memtype, 666 * Reserved non RAM regions only and after successful reserve_memtype,
631 * this func also keeps identity mapping (if any) in sync with this new prot. 667 * this func also keeps identity mapping (if any) in sync with this new prot.
@@ -634,7 +670,7 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,
634 int strict_prot) 670 int strict_prot)
635{ 671{
636 int is_ram = 0; 672 int is_ram = 0;
637 int id_sz, ret; 673 int ret;
638 unsigned long flags; 674 unsigned long flags;
639 unsigned long want_flags = (pgprot_val(*vma_prot) & _PAGE_CACHE_MASK); 675 unsigned long want_flags = (pgprot_val(*vma_prot) & _PAGE_CACHE_MASK);
640 676
@@ -671,23 +707,8 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,
671 flags); 707 flags);
672 } 708 }
673 709
674 /* Need to keep identity mapping in sync */ 710 if (kernel_map_sync_memtype(paddr, size, flags) < 0) {
675 if (paddr >= __pa(high_memory))
676 return 0;
677
678 id_sz = (__pa(high_memory) < paddr + size) ?
679 __pa(high_memory) - paddr :
680 size;
681
682 if (ioremap_change_attr((unsigned long)__va(paddr), id_sz, flags) < 0) {
683 free_memtype(paddr, paddr + size); 711 free_memtype(paddr, paddr + size);
684 printk(KERN_ERR
685 "%s:%d reserve_pfn_range ioremap_change_attr failed %s "
686 "for %Lx-%Lx\n",
687 current->comm, current->pid,
688 cattr_name(flags),
689 (unsigned long long)paddr,
690 (unsigned long long)(paddr + size));
691 return -EINVAL; 712 return -EINVAL;
692 } 713 }
693 return 0; 714 return 0;
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 86f2ffc43c3d..5b7c7c8464fe 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -313,6 +313,24 @@ int ptep_clear_flush_young(struct vm_area_struct *vma,
313 return young; 313 return young;
314} 314}
315 315
316/**
317 * reserve_top_address - reserves a hole in the top of kernel address space
318 * @reserve - size of hole to reserve
319 *
320 * Can be used to relocate the fixmap area and poke a hole in the top
321 * of kernel address space to make room for a hypervisor.
322 */
323void __init reserve_top_address(unsigned long reserve)
324{
325#ifdef CONFIG_X86_32
326 BUG_ON(fixmaps_set > 0);
327 printk(KERN_INFO "Reserving virtual address space above 0x%08x\n",
328 (int)-reserve);
329 __FIXADDR_TOP = -reserve - PAGE_SIZE;
330 __VMALLOC_RESERVE += reserve;
331#endif
332}
333
316int fixmaps_set; 334int fixmaps_set;
317 335
318void __native_set_fixmap(enum fixed_addresses idx, pte_t pte) 336void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c
index 0951db9ee519..f2e477c91c1b 100644
--- a/arch/x86/mm/pgtable_32.c
+++ b/arch/x86/mm/pgtable_32.c
@@ -20,6 +20,8 @@
20#include <asm/tlb.h> 20#include <asm/tlb.h>
21#include <asm/tlbflush.h> 21#include <asm/tlbflush.h>
22 22
23unsigned int __VMALLOC_RESERVE = 128 << 20;
24
23/* 25/*
24 * Associate a virtual page frame with a given physical page frame 26 * Associate a virtual page frame with a given physical page frame
25 * and protection flags for that frame. 27 * and protection flags for that frame.
@@ -97,22 +99,6 @@ void set_pmd_pfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags)
97unsigned long __FIXADDR_TOP = 0xfffff000; 99unsigned long __FIXADDR_TOP = 0xfffff000;
98EXPORT_SYMBOL(__FIXADDR_TOP); 100EXPORT_SYMBOL(__FIXADDR_TOP);
99 101
100/**
101 * reserve_top_address - reserves a hole in the top of kernel address space
102 * @reserve - size of hole to reserve
103 *
104 * Can be used to relocate the fixmap area and poke a hole in the top
105 * of kernel address space to make room for a hypervisor.
106 */
107void __init reserve_top_address(unsigned long reserve)
108{
109 BUG_ON(fixmaps_set > 0);
110 printk(KERN_INFO "Reserving virtual address space above 0x%08x\n",
111 (int)-reserve);
112 __FIXADDR_TOP = -reserve - PAGE_SIZE;
113 __VMALLOC_RESERVE += reserve;
114}
115
116/* 102/*
117 * vmalloc=size forces the vmalloc area to be exactly 'size' 103 * vmalloc=size forces the vmalloc area to be exactly 'size'
118 * bytes. This can be used to increase (or decrease) the 104 * bytes. This can be used to increase (or decrease) the
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c
index 09737c8af074..574c8bc95ef0 100644
--- a/arch/x86/mm/srat_64.c
+++ b/arch/x86/mm/srat_64.c
@@ -20,7 +20,8 @@
20#include <asm/proto.h> 20#include <asm/proto.h>
21#include <asm/numa.h> 21#include <asm/numa.h>
22#include <asm/e820.h> 22#include <asm/e820.h>
23#include <asm/genapic.h> 23#include <asm/apic.h>
24#include <asm/uv/uv.h>
24 25
25int acpi_numa __initdata; 26int acpi_numa __initdata;
26 27
diff --git a/arch/x86/kernel/tlb_64.c b/arch/x86/mm/tlb.c
index f8be6f1d2e48..a654d59e4483 100644
--- a/arch/x86/kernel/tlb_64.c
+++ b/arch/x86/mm/tlb.c
@@ -1,24 +1,19 @@
1#include <linux/init.h> 1#include <linux/init.h>
2 2
3#include <linux/mm.h> 3#include <linux/mm.h>
4#include <linux/delay.h>
5#include <linux/spinlock.h> 4#include <linux/spinlock.h>
6#include <linux/smp.h> 5#include <linux/smp.h>
7#include <linux/kernel_stat.h>
8#include <linux/mc146818rtc.h>
9#include <linux/interrupt.h> 6#include <linux/interrupt.h>
7#include <linux/module.h>
10 8
11#include <asm/mtrr.h>
12#include <asm/pgalloc.h>
13#include <asm/tlbflush.h> 9#include <asm/tlbflush.h>
14#include <asm/mmu_context.h> 10#include <asm/mmu_context.h>
15#include <asm/proto.h> 11#include <asm/apic.h>
16#include <asm/apicdef.h> 12#include <asm/uv/uv.h>
17#include <asm/idle.h> 13
18#include <asm/uv/uv_hub.h> 14DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate)
19#include <asm/uv/uv_bau.h> 15 = { &init_mm, 0, };
20 16
21#include <mach_ipi.h>
22/* 17/*
23 * Smarter SMP flushing macros. 18 * Smarter SMP flushing macros.
24 * c/o Linus Torvalds. 19 * c/o Linus Torvalds.
@@ -33,7 +28,7 @@
33 * To avoid global state use 8 different call vectors. 28 * To avoid global state use 8 different call vectors.
34 * Each CPU uses a specific vector to trigger flushes on other 29 * Each CPU uses a specific vector to trigger flushes on other
35 * CPUs. Depending on the received vector the target CPUs look into 30 * CPUs. Depending on the received vector the target CPUs look into
36 * the right per cpu variable for the flush data. 31 * the right array slot for the flush data.
37 * 32 *
38 * With more than 8 CPUs they are hashed to the 8 available 33 * With more than 8 CPUs they are hashed to the 8 available
39 * vectors. The limited global vector space forces us to this right now. 34 * vectors. The limited global vector space forces us to this right now.
@@ -43,18 +38,18 @@
43 38
44union smp_flush_state { 39union smp_flush_state {
45 struct { 40 struct {
46 cpumask_t flush_cpumask;
47 struct mm_struct *flush_mm; 41 struct mm_struct *flush_mm;
48 unsigned long flush_va; 42 unsigned long flush_va;
49 spinlock_t tlbstate_lock; 43 spinlock_t tlbstate_lock;
44 DECLARE_BITMAP(flush_cpumask, NR_CPUS);
50 }; 45 };
51 char pad[SMP_CACHE_BYTES]; 46 char pad[CONFIG_X86_INTERNODE_CACHE_BYTES];
52} ____cacheline_aligned; 47} ____cacheline_internodealigned_in_smp;
53 48
54/* State is put into the per CPU data section, but padded 49/* State is put into the per CPU data section, but padded
55 to a full cache line because other CPUs can access it and we don't 50 to a full cache line because other CPUs can access it and we don't
56 want false sharing in the per cpu data segment. */ 51 want false sharing in the per cpu data segment. */
57static DEFINE_PER_CPU(union smp_flush_state, flush_state); 52static union smp_flush_state flush_state[NUM_INVALIDATE_TLB_VECTORS];
58 53
59/* 54/*
60 * We cannot call mmdrop() because we are in interrupt context, 55 * We cannot call mmdrop() because we are in interrupt context,
@@ -62,9 +57,9 @@ static DEFINE_PER_CPU(union smp_flush_state, flush_state);
62 */ 57 */
63void leave_mm(int cpu) 58void leave_mm(int cpu)
64{ 59{
65 if (read_pda(mmu_state) == TLBSTATE_OK) 60 if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
66 BUG(); 61 BUG();
67 cpu_clear(cpu, read_pda(active_mm)->cpu_vm_mask); 62 cpu_clear(cpu, percpu_read(cpu_tlbstate.active_mm)->cpu_vm_mask);
68 load_cr3(swapper_pg_dir); 63 load_cr3(swapper_pg_dir);
69} 64}
70EXPORT_SYMBOL_GPL(leave_mm); 65EXPORT_SYMBOL_GPL(leave_mm);
@@ -117,10 +112,20 @@ EXPORT_SYMBOL_GPL(leave_mm);
117 * Interrupts are disabled. 112 * Interrupts are disabled.
118 */ 113 */
119 114
120asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs) 115/*
116 * FIXME: use of asmlinkage is not consistent. On x86_64 it's noop
117 * but still used for documentation purpose but the usage is slightly
118 * inconsistent. On x86_32, asmlinkage is regparm(0) but interrupt
119 * entry calls in with the first parameter in %eax. Maybe define
120 * intrlinkage?
121 */
122#ifdef CONFIG_X86_64
123asmlinkage
124#endif
125void smp_invalidate_interrupt(struct pt_regs *regs)
121{ 126{
122 int cpu; 127 unsigned int cpu;
123 int sender; 128 unsigned int sender;
124 union smp_flush_state *f; 129 union smp_flush_state *f;
125 130
126 cpu = smp_processor_id(); 131 cpu = smp_processor_id();
@@ -129,9 +134,9 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs)
129 * Use that to determine where the sender put the data. 134 * Use that to determine where the sender put the data.
130 */ 135 */
131 sender = ~regs->orig_ax - INVALIDATE_TLB_VECTOR_START; 136 sender = ~regs->orig_ax - INVALIDATE_TLB_VECTOR_START;
132 f = &per_cpu(flush_state, sender); 137 f = &flush_state[sender];
133 138
134 if (!cpu_isset(cpu, f->flush_cpumask)) 139 if (!cpumask_test_cpu(cpu, to_cpumask(f->flush_cpumask)))
135 goto out; 140 goto out;
136 /* 141 /*
137 * This was a BUG() but until someone can quote me the 142 * This was a BUG() but until someone can quote me the
@@ -142,8 +147,8 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs)
142 * BUG(); 147 * BUG();
143 */ 148 */
144 149
145 if (f->flush_mm == read_pda(active_mm)) { 150 if (f->flush_mm == percpu_read(cpu_tlbstate.active_mm)) {
146 if (read_pda(mmu_state) == TLBSTATE_OK) { 151 if (percpu_read(cpu_tlbstate.state) == TLBSTATE_OK) {
147 if (f->flush_va == TLB_FLUSH_ALL) 152 if (f->flush_va == TLB_FLUSH_ALL)
148 local_flush_tlb(); 153 local_flush_tlb();
149 else 154 else
@@ -153,23 +158,21 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs)
153 } 158 }
154out: 159out:
155 ack_APIC_irq(); 160 ack_APIC_irq();
156 cpu_clear(cpu, f->flush_cpumask); 161 smp_mb__before_clear_bit();
162 cpumask_clear_cpu(cpu, to_cpumask(f->flush_cpumask));
163 smp_mb__after_clear_bit();
157 inc_irq_stat(irq_tlb_count); 164 inc_irq_stat(irq_tlb_count);
158} 165}
159 166
160void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm, 167static void flush_tlb_others_ipi(const struct cpumask *cpumask,
161 unsigned long va) 168 struct mm_struct *mm, unsigned long va)
162{ 169{
163 int sender; 170 unsigned int sender;
164 union smp_flush_state *f; 171 union smp_flush_state *f;
165 cpumask_t cpumask = *cpumaskp;
166
167 if (is_uv_system() && uv_flush_tlb_others(&cpumask, mm, va))
168 return;
169 172
170 /* Caller has disabled preemption */ 173 /* Caller has disabled preemption */
171 sender = smp_processor_id() % NUM_INVALIDATE_TLB_VECTORS; 174 sender = smp_processor_id() % NUM_INVALIDATE_TLB_VECTORS;
172 f = &per_cpu(flush_state, sender); 175 f = &flush_state[sender];
173 176
174 /* 177 /*
175 * Could avoid this lock when 178 * Could avoid this lock when
@@ -180,7 +183,8 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
180 183
181 f->flush_mm = mm; 184 f->flush_mm = mm;
182 f->flush_va = va; 185 f->flush_va = va;
183 cpus_or(f->flush_cpumask, cpumask, f->flush_cpumask); 186 cpumask_andnot(to_cpumask(f->flush_cpumask),
187 cpumask, cpumask_of(smp_processor_id()));
184 188
185 /* 189 /*
186 * Make the above memory operations globally visible before 190 * Make the above memory operations globally visible before
@@ -191,9 +195,10 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
191 * We have to send the IPI only to 195 * We have to send the IPI only to
192 * CPUs affected. 196 * CPUs affected.
193 */ 197 */
194 send_IPI_mask(&cpumask, INVALIDATE_TLB_VECTOR_START + sender); 198 apic->send_IPI_mask(to_cpumask(f->flush_cpumask),
199 INVALIDATE_TLB_VECTOR_START + sender);
195 200
196 while (!cpus_empty(f->flush_cpumask)) 201 while (!cpumask_empty(to_cpumask(f->flush_cpumask)))
197 cpu_relax(); 202 cpu_relax();
198 203
199 f->flush_mm = NULL; 204 f->flush_mm = NULL;
@@ -201,12 +206,28 @@ void native_flush_tlb_others(const cpumask_t *cpumaskp, struct mm_struct *mm,
201 spin_unlock(&f->tlbstate_lock); 206 spin_unlock(&f->tlbstate_lock);
202} 207}
203 208
209void native_flush_tlb_others(const struct cpumask *cpumask,
210 struct mm_struct *mm, unsigned long va)
211{
212 if (is_uv_system()) {
213 unsigned int cpu;
214
215 cpu = get_cpu();
216 cpumask = uv_flush_tlb_others(cpumask, mm, va, cpu);
217 if (cpumask)
218 flush_tlb_others_ipi(cpumask, mm, va);
219 put_cpu();
220 return;
221 }
222 flush_tlb_others_ipi(cpumask, mm, va);
223}
224
204static int __cpuinit init_smp_flush(void) 225static int __cpuinit init_smp_flush(void)
205{ 226{
206 int i; 227 int i;
207 228
208 for_each_possible_cpu(i) 229 for (i = 0; i < ARRAY_SIZE(flush_state); i++)
209 spin_lock_init(&per_cpu(flush_state, i).tlbstate_lock); 230 spin_lock_init(&flush_state[i].tlbstate_lock);
210 231
211 return 0; 232 return 0;
212} 233}
@@ -215,25 +236,18 @@ core_initcall(init_smp_flush);
215void flush_tlb_current_task(void) 236void flush_tlb_current_task(void)
216{ 237{
217 struct mm_struct *mm = current->mm; 238 struct mm_struct *mm = current->mm;
218 cpumask_t cpu_mask;
219 239
220 preempt_disable(); 240 preempt_disable();
221 cpu_mask = mm->cpu_vm_mask;
222 cpu_clear(smp_processor_id(), cpu_mask);
223 241
224 local_flush_tlb(); 242 local_flush_tlb();
225 if (!cpus_empty(cpu_mask)) 243 if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
226 flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); 244 flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL);
227 preempt_enable(); 245 preempt_enable();
228} 246}
229 247
230void flush_tlb_mm(struct mm_struct *mm) 248void flush_tlb_mm(struct mm_struct *mm)
231{ 249{
232 cpumask_t cpu_mask;
233
234 preempt_disable(); 250 preempt_disable();
235 cpu_mask = mm->cpu_vm_mask;
236 cpu_clear(smp_processor_id(), cpu_mask);
237 251
238 if (current->active_mm == mm) { 252 if (current->active_mm == mm) {
239 if (current->mm) 253 if (current->mm)
@@ -241,8 +255,8 @@ void flush_tlb_mm(struct mm_struct *mm)
241 else 255 else
242 leave_mm(smp_processor_id()); 256 leave_mm(smp_processor_id());
243 } 257 }
244 if (!cpus_empty(cpu_mask)) 258 if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
245 flush_tlb_others(cpu_mask, mm, TLB_FLUSH_ALL); 259 flush_tlb_others(&mm->cpu_vm_mask, mm, TLB_FLUSH_ALL);
246 260
247 preempt_enable(); 261 preempt_enable();
248} 262}
@@ -250,11 +264,8 @@ void flush_tlb_mm(struct mm_struct *mm)
250void flush_tlb_page(struct vm_area_struct *vma, unsigned long va) 264void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
251{ 265{
252 struct mm_struct *mm = vma->vm_mm; 266 struct mm_struct *mm = vma->vm_mm;
253 cpumask_t cpu_mask;
254 267
255 preempt_disable(); 268 preempt_disable();
256 cpu_mask = mm->cpu_vm_mask;
257 cpu_clear(smp_processor_id(), cpu_mask);
258 269
259 if (current->active_mm == mm) { 270 if (current->active_mm == mm) {
260 if (current->mm) 271 if (current->mm)
@@ -263,8 +274,8 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
263 leave_mm(smp_processor_id()); 274 leave_mm(smp_processor_id());
264 } 275 }
265 276
266 if (!cpus_empty(cpu_mask)) 277 if (cpumask_any_but(&mm->cpu_vm_mask, smp_processor_id()) < nr_cpu_ids)
267 flush_tlb_others(cpu_mask, mm, va); 278 flush_tlb_others(&mm->cpu_vm_mask, mm, va);
268 279
269 preempt_enable(); 280 preempt_enable();
270} 281}
@@ -274,7 +285,7 @@ static void do_flush_tlb_all(void *info)
274 unsigned long cpu = smp_processor_id(); 285 unsigned long cpu = smp_processor_id();
275 286
276 __flush_tlb_all(); 287 __flush_tlb_all();
277 if (read_pda(mmu_state) == TLBSTATE_LAZY) 288 if (percpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY)
278 leave_mm(cpu); 289 leave_mm(cpu);
279} 290}
280 291
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 2089354968a2..8eb295e116f6 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -5,7 +5,7 @@
5#include <linux/pci.h> 5#include <linux/pci.h>
6#include <linux/init.h> 6#include <linux/init.h>
7#include <linux/nodemask.h> 7#include <linux/nodemask.h>
8#include <mach_apic.h> 8#include <asm/apic.h>
9#include <asm/mpspec.h> 9#include <asm/mpspec.h>
10#include <asm/pci_x86.h> 10#include <asm/pci_x86.h>
11 11
@@ -18,10 +18,6 @@
18 18
19#define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local]) 19#define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local])
20 20
21/* Where the IO area was mapped on multiquad, always 0 otherwise */
22void *xquad_portio;
23EXPORT_SYMBOL(xquad_portio);
24
25#define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port) 21#define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
26 22
27#define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \ 23#define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \
diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c
index b82cae970dfd..1c975cc9839e 100644
--- a/arch/x86/pci/pcbios.c
+++ b/arch/x86/pci/pcbios.c
@@ -7,7 +7,7 @@
7#include <linux/module.h> 7#include <linux/module.h>
8#include <linux/uaccess.h> 8#include <linux/uaccess.h>
9#include <asm/pci_x86.h> 9#include <asm/pci_x86.h>
10#include <asm/mach-default/pci-functions.h> 10#include <asm/pci-functions.h>
11 11
12/* BIOS32 signature: "_32_" */ 12/* BIOS32 signature: "_32_" */
13#define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24)) 13#define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
diff --git a/arch/x86/power/hibernate_asm_32.S b/arch/x86/power/hibernate_asm_32.S
index d1e9b53f9d33..b641388d8286 100644
--- a/arch/x86/power/hibernate_asm_32.S
+++ b/arch/x86/power/hibernate_asm_32.S
@@ -8,7 +8,7 @@
8 8
9#include <linux/linkage.h> 9#include <linux/linkage.h>
10#include <asm/segment.h> 10#include <asm/segment.h>
11#include <asm/page.h> 11#include <asm/page_types.h>
12#include <asm/asm-offsets.h> 12#include <asm/asm-offsets.h>
13#include <asm/processor-flags.h> 13#include <asm/processor-flags.h>
14 14
diff --git a/arch/x86/power/hibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S
index 000415947d93..9356547d8c01 100644
--- a/arch/x86/power/hibernate_asm_64.S
+++ b/arch/x86/power/hibernate_asm_64.S
@@ -18,7 +18,7 @@
18 .text 18 .text
19#include <linux/linkage.h> 19#include <linux/linkage.h>
20#include <asm/segment.h> 20#include <asm/segment.h>
21#include <asm/page.h> 21#include <asm/page_types.h>
22#include <asm/asm-offsets.h> 22#include <asm/asm-offsets.h>
23#include <asm/processor-flags.h> 23#include <asm/processor-flags.h>
24 24
diff --git a/arch/x86/vdso/Makefile b/arch/x86/vdso/Makefile
index 4d6ef0a336d6..16a9020c8f11 100644
--- a/arch/x86/vdso/Makefile
+++ b/arch/x86/vdso/Makefile
@@ -38,7 +38,7 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE
38 $(call if_changed,objcopy) 38 $(call if_changed,objcopy)
39 39
40CFL := $(PROFILING) -mcmodel=small -fPIC -O2 -fasynchronous-unwind-tables -m64 \ 40CFL := $(PROFILING) -mcmodel=small -fPIC -O2 -fasynchronous-unwind-tables -m64 \
41 $(filter -g%,$(KBUILD_CFLAGS)) 41 $(filter -g%,$(KBUILD_CFLAGS)) $(call cc-option, -fno-stack-protector)
42 42
43$(vobjs): KBUILD_CFLAGS += $(CFL) 43$(vobjs): KBUILD_CFLAGS += $(CFL)
44 44
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c
index 9c98cc6ba978..7133cdf9098b 100644
--- a/arch/x86/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
@@ -85,8 +85,8 @@ static unsigned long vdso_addr(unsigned long start, unsigned len)
85 unsigned long addr, end; 85 unsigned long addr, end;
86 unsigned offset; 86 unsigned offset;
87 end = (start + PMD_SIZE - 1) & PMD_MASK; 87 end = (start + PMD_SIZE - 1) & PMD_MASK;
88 if (end >= TASK_SIZE64) 88 if (end >= TASK_SIZE_MAX)
89 end = TASK_SIZE64; 89 end = TASK_SIZE_MAX;
90 end -= len; 90 end -= len;
91 /* This loses some more bits than a modulo, but is cheaper */ 91 /* This loses some more bits than a modulo, but is cheaper */
92 offset = get_random_int() & (PTRS_PER_PTE - 1); 92 offset = get_random_int() & (PTRS_PER_PTE - 1);
diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig
index 87b9ab166423..b83e119fbeb0 100644
--- a/arch/x86/xen/Kconfig
+++ b/arch/x86/xen/Kconfig
@@ -6,7 +6,7 @@ config XEN
6 bool "Xen guest support" 6 bool "Xen guest support"
7 select PARAVIRT 7 select PARAVIRT
8 select PARAVIRT_CLOCK 8 select PARAVIRT_CLOCK
9 depends on X86_64 || (X86_32 && X86_PAE && !(X86_VISWS || X86_VOYAGER)) 9 depends on X86_64 || (X86_32 && X86_PAE && !X86_VISWS)
10 depends on X86_CMPXCHG && X86_TSC 10 depends on X86_CMPXCHG && X86_TSC
11 help 11 help
12 This is the Linux Xen port. Enabling this will allow the 12 This is the Linux Xen port. Enabling this will allow the
diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile
index 6dcefba7836f..3b767d03fd6a 100644
--- a/arch/x86/xen/Makefile
+++ b/arch/x86/xen/Makefile
@@ -6,7 +6,8 @@ CFLAGS_REMOVE_irq.o = -pg
6endif 6endif
7 7
8obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \ 8obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \
9 time.o xen-asm_$(BITS).o grant-table.o suspend.o 9 time.o xen-asm.o xen-asm_$(BITS).o \
10 grant-table.o suspend.o
10 11
11obj-$(CONFIG_SMP) += smp.o spinlock.o 12obj-$(CONFIG_SMP) += smp.o spinlock.o
12obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o \ No newline at end of file 13obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o \ No newline at end of file
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index b58e96338149..82cd39a6cbd3 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -61,40 +61,13 @@ DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
61enum xen_domain_type xen_domain_type = XEN_NATIVE; 61enum xen_domain_type xen_domain_type = XEN_NATIVE;
62EXPORT_SYMBOL_GPL(xen_domain_type); 62EXPORT_SYMBOL_GPL(xen_domain_type);
63 63
64/*
65 * Identity map, in addition to plain kernel map. This needs to be
66 * large enough to allocate page table pages to allocate the rest.
67 * Each page can map 2MB.
68 */
69static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
70
71#ifdef CONFIG_X86_64
72/* l3 pud for userspace vsyscall mapping */
73static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
74#endif /* CONFIG_X86_64 */
75
76/*
77 * Note about cr3 (pagetable base) values:
78 *
79 * xen_cr3 contains the current logical cr3 value; it contains the
80 * last set cr3. This may not be the current effective cr3, because
81 * its update may be being lazily deferred. However, a vcpu looking
82 * at its own cr3 can use this value knowing that it everything will
83 * be self-consistent.
84 *
85 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
86 * hypercall to set the vcpu cr3 is complete (so it may be a little
87 * out of date, but it will never be set early). If one vcpu is
88 * looking at another vcpu's cr3 value, it should use this variable.
89 */
90DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
91DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
92
93struct start_info *xen_start_info; 64struct start_info *xen_start_info;
94EXPORT_SYMBOL_GPL(xen_start_info); 65EXPORT_SYMBOL_GPL(xen_start_info);
95 66
96struct shared_info xen_dummy_shared_info; 67struct shared_info xen_dummy_shared_info;
97 68
69void *xen_initial_gdt;
70
98/* 71/*
99 * Point at some empty memory to start with. We map the real shared_info 72 * Point at some empty memory to start with. We map the real shared_info
100 * page as soon as fixmap is up and running. 73 * page as soon as fixmap is up and running.
@@ -114,14 +87,7 @@ struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
114 * 87 *
115 * 0: not available, 1: available 88 * 0: not available, 1: available
116 */ 89 */
117static int have_vcpu_info_placement = 90static int have_vcpu_info_placement = 1;
118#ifdef CONFIG_X86_32
119 1
120#else
121 0
122#endif
123 ;
124
125 91
126static void xen_vcpu_setup(int cpu) 92static void xen_vcpu_setup(int cpu)
127{ 93{
@@ -137,7 +103,7 @@ static void xen_vcpu_setup(int cpu)
137 103
138 vcpup = &per_cpu(xen_vcpu_info, cpu); 104 vcpup = &per_cpu(xen_vcpu_info, cpu);
139 105
140 info.mfn = virt_to_mfn(vcpup); 106 info.mfn = arbitrary_virt_to_mfn(vcpup);
141 info.offset = offset_in_page(vcpup); 107 info.offset = offset_in_page(vcpup);
142 108
143 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n", 109 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
@@ -237,7 +203,7 @@ static unsigned long xen_get_debugreg(int reg)
237 return HYPERVISOR_get_debugreg(reg); 203 return HYPERVISOR_get_debugreg(reg);
238} 204}
239 205
240static void xen_leave_lazy(void) 206void xen_leave_lazy(void)
241{ 207{
242 paravirt_leave_lazy(paravirt_get_lazy_mode()); 208 paravirt_leave_lazy(paravirt_get_lazy_mode());
243 xen_mc_flush(); 209 xen_mc_flush();
@@ -335,8 +301,10 @@ static void xen_load_gdt(const struct desc_ptr *dtr)
335 frames = mcs.args; 301 frames = mcs.args;
336 302
337 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 303 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
338 frames[f] = virt_to_mfn(va); 304 frames[f] = arbitrary_virt_to_mfn((void *)va);
305
339 make_lowmem_page_readonly((void *)va); 306 make_lowmem_page_readonly((void *)va);
307 make_lowmem_page_readonly(mfn_to_virt(frames[f]));
340 } 308 }
341 309
342 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct)); 310 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
@@ -348,7 +316,7 @@ static void load_TLS_descriptor(struct thread_struct *t,
348 unsigned int cpu, unsigned int i) 316 unsigned int cpu, unsigned int i)
349{ 317{
350 struct desc_struct *gdt = get_cpu_gdt_table(cpu); 318 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
351 xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 319 xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
352 struct multicall_space mc = __xen_mc_entry(0); 320 struct multicall_space mc = __xen_mc_entry(0);
353 321
354 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 322 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
@@ -357,13 +325,14 @@ static void load_TLS_descriptor(struct thread_struct *t,
357static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 325static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
358{ 326{
359 /* 327 /*
360 * XXX sleazy hack: If we're being called in a lazy-cpu zone, 328 * XXX sleazy hack: If we're being called in a lazy-cpu zone
361 * it means we're in a context switch, and %gs has just been 329 * and lazy gs handling is enabled, it means we're in a
362 * saved. This means we can zero it out to prevent faults on 330 * context switch, and %gs has just been saved. This means we
363 * exit from the hypervisor if the next process has no %gs. 331 * can zero it out to prevent faults on exit from the
364 * Either way, it has been saved, and the new value will get 332 * hypervisor if the next process has no %gs. Either way, it
365 * loaded properly. This will go away as soon as Xen has been 333 * has been saved, and the new value will get loaded properly.
366 * modified to not save/restore %gs for normal hypercalls. 334 * This will go away as soon as Xen has been modified to not
335 * save/restore %gs for normal hypercalls.
367 * 336 *
368 * On x86_64, this hack is not used for %gs, because gs points 337 * On x86_64, this hack is not used for %gs, because gs points
369 * to KERNEL_GS_BASE (and uses it for PDA references), so we 338 * to KERNEL_GS_BASE (and uses it for PDA references), so we
@@ -375,7 +344,7 @@ static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
375 */ 344 */
376 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { 345 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
377#ifdef CONFIG_X86_32 346#ifdef CONFIG_X86_32
378 loadsegment(gs, 0); 347 lazy_load_gs(0);
379#else 348#else
380 loadsegment(fs, 0); 349 loadsegment(fs, 0);
381#endif 350#endif
@@ -521,7 +490,7 @@ static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
521 break; 490 break;
522 491
523 default: { 492 default: {
524 xmaddr_t maddr = virt_to_machine(&dt[entry]); 493 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
525 494
526 xen_mc_flush(); 495 xen_mc_flush();
527 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 496 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
@@ -587,94 +556,18 @@ static u32 xen_safe_apic_wait_icr_idle(void)
587 return 0; 556 return 0;
588} 557}
589 558
590static struct apic_ops xen_basic_apic_ops = { 559static void set_xen_basic_apic_ops(void)
591 .read = xen_apic_read,
592 .write = xen_apic_write,
593 .icr_read = xen_apic_icr_read,
594 .icr_write = xen_apic_icr_write,
595 .wait_icr_idle = xen_apic_wait_icr_idle,
596 .safe_wait_icr_idle = xen_safe_apic_wait_icr_idle,
597};
598
599#endif
600
601static void xen_flush_tlb(void)
602{
603 struct mmuext_op *op;
604 struct multicall_space mcs;
605
606 preempt_disable();
607
608 mcs = xen_mc_entry(sizeof(*op));
609
610 op = mcs.args;
611 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
612 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
613
614 xen_mc_issue(PARAVIRT_LAZY_MMU);
615
616 preempt_enable();
617}
618
619static void xen_flush_tlb_single(unsigned long addr)
620{ 560{
621 struct mmuext_op *op; 561 apic->read = xen_apic_read;
622 struct multicall_space mcs; 562 apic->write = xen_apic_write;
623 563 apic->icr_read = xen_apic_icr_read;
624 preempt_disable(); 564 apic->icr_write = xen_apic_icr_write;
625 565 apic->wait_icr_idle = xen_apic_wait_icr_idle;
626 mcs = xen_mc_entry(sizeof(*op)); 566 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
627 op = mcs.args;
628 op->cmd = MMUEXT_INVLPG_LOCAL;
629 op->arg1.linear_addr = addr & PAGE_MASK;
630 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
631
632 xen_mc_issue(PARAVIRT_LAZY_MMU);
633
634 preempt_enable();
635} 567}
636 568
637static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm, 569#endif
638 unsigned long va)
639{
640 struct {
641 struct mmuext_op op;
642 cpumask_t mask;
643 } *args;
644 cpumask_t cpumask = *cpus;
645 struct multicall_space mcs;
646
647 /*
648 * A couple of (to be removed) sanity checks:
649 *
650 * - current CPU must not be in mask
651 * - mask must exist :)
652 */
653 BUG_ON(cpus_empty(cpumask));
654 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
655 BUG_ON(!mm);
656
657 /* If a CPU which we ran on has gone down, OK. */
658 cpus_and(cpumask, cpumask, cpu_online_map);
659 if (cpus_empty(cpumask))
660 return;
661
662 mcs = xen_mc_entry(sizeof(*args));
663 args = mcs.args;
664 args->mask = cpumask;
665 args->op.arg2.vcpumask = &args->mask;
666
667 if (va == TLB_FLUSH_ALL) {
668 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
669 } else {
670 args->op.cmd = MMUEXT_INVLPG_MULTI;
671 args->op.arg1.linear_addr = va;
672 }
673
674 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
675 570
676 xen_mc_issue(PARAVIRT_LAZY_MMU);
677}
678 571
679static void xen_clts(void) 572static void xen_clts(void)
680{ 573{
@@ -700,21 +593,6 @@ static void xen_write_cr0(unsigned long cr0)
700 xen_mc_issue(PARAVIRT_LAZY_CPU); 593 xen_mc_issue(PARAVIRT_LAZY_CPU);
701} 594}
702 595
703static void xen_write_cr2(unsigned long cr2)
704{
705 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
706}
707
708static unsigned long xen_read_cr2(void)
709{
710 return x86_read_percpu(xen_vcpu)->arch.cr2;
711}
712
713static unsigned long xen_read_cr2_direct(void)
714{
715 return x86_read_percpu(xen_vcpu_info.arch.cr2);
716}
717
718static void xen_write_cr4(unsigned long cr4) 596static void xen_write_cr4(unsigned long cr4)
719{ 597{
720 cr4 &= ~X86_CR4_PGE; 598 cr4 &= ~X86_CR4_PGE;
@@ -723,71 +601,6 @@ static void xen_write_cr4(unsigned long cr4)
723 native_write_cr4(cr4); 601 native_write_cr4(cr4);
724} 602}
725 603
726static unsigned long xen_read_cr3(void)
727{
728 return x86_read_percpu(xen_cr3);
729}
730
731static void set_current_cr3(void *v)
732{
733 x86_write_percpu(xen_current_cr3, (unsigned long)v);
734}
735
736static void __xen_write_cr3(bool kernel, unsigned long cr3)
737{
738 struct mmuext_op *op;
739 struct multicall_space mcs;
740 unsigned long mfn;
741
742 if (cr3)
743 mfn = pfn_to_mfn(PFN_DOWN(cr3));
744 else
745 mfn = 0;
746
747 WARN_ON(mfn == 0 && kernel);
748
749 mcs = __xen_mc_entry(sizeof(*op));
750
751 op = mcs.args;
752 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
753 op->arg1.mfn = mfn;
754
755 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
756
757 if (kernel) {
758 x86_write_percpu(xen_cr3, cr3);
759
760 /* Update xen_current_cr3 once the batch has actually
761 been submitted. */
762 xen_mc_callback(set_current_cr3, (void *)cr3);
763 }
764}
765
766static void xen_write_cr3(unsigned long cr3)
767{
768 BUG_ON(preemptible());
769
770 xen_mc_batch(); /* disables interrupts */
771
772 /* Update while interrupts are disabled, so its atomic with
773 respect to ipis */
774 x86_write_percpu(xen_cr3, cr3);
775
776 __xen_write_cr3(true, cr3);
777
778#ifdef CONFIG_X86_64
779 {
780 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
781 if (user_pgd)
782 __xen_write_cr3(false, __pa(user_pgd));
783 else
784 __xen_write_cr3(false, 0);
785 }
786#endif
787
788 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
789}
790
791static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 604static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
792{ 605{
793 int ret; 606 int ret;
@@ -829,185 +642,6 @@ static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
829 return ret; 642 return ret;
830} 643}
831 644
832/* Early in boot, while setting up the initial pagetable, assume
833 everything is pinned. */
834static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
835{
836#ifdef CONFIG_FLATMEM
837 BUG_ON(mem_map); /* should only be used early */
838#endif
839 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
840}
841
842/* Early release_pte assumes that all pts are pinned, since there's
843 only init_mm and anything attached to that is pinned. */
844static void xen_release_pte_init(unsigned long pfn)
845{
846 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
847}
848
849static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
850{
851 struct mmuext_op op;
852 op.cmd = cmd;
853 op.arg1.mfn = pfn_to_mfn(pfn);
854 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
855 BUG();
856}
857
858/* This needs to make sure the new pte page is pinned iff its being
859 attached to a pinned pagetable. */
860static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
861{
862 struct page *page = pfn_to_page(pfn);
863
864 if (PagePinned(virt_to_page(mm->pgd))) {
865 SetPagePinned(page);
866
867 vm_unmap_aliases();
868 if (!PageHighMem(page)) {
869 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
870 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
871 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
872 } else {
873 /* make sure there are no stray mappings of
874 this page */
875 kmap_flush_unused();
876 }
877 }
878}
879
880static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
881{
882 xen_alloc_ptpage(mm, pfn, PT_PTE);
883}
884
885static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
886{
887 xen_alloc_ptpage(mm, pfn, PT_PMD);
888}
889
890static int xen_pgd_alloc(struct mm_struct *mm)
891{
892 pgd_t *pgd = mm->pgd;
893 int ret = 0;
894
895 BUG_ON(PagePinned(virt_to_page(pgd)));
896
897#ifdef CONFIG_X86_64
898 {
899 struct page *page = virt_to_page(pgd);
900 pgd_t *user_pgd;
901
902 BUG_ON(page->private != 0);
903
904 ret = -ENOMEM;
905
906 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
907 page->private = (unsigned long)user_pgd;
908
909 if (user_pgd != NULL) {
910 user_pgd[pgd_index(VSYSCALL_START)] =
911 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
912 ret = 0;
913 }
914
915 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
916 }
917#endif
918
919 return ret;
920}
921
922static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
923{
924#ifdef CONFIG_X86_64
925 pgd_t *user_pgd = xen_get_user_pgd(pgd);
926
927 if (user_pgd)
928 free_page((unsigned long)user_pgd);
929#endif
930}
931
932/* This should never happen until we're OK to use struct page */
933static void xen_release_ptpage(unsigned long pfn, unsigned level)
934{
935 struct page *page = pfn_to_page(pfn);
936
937 if (PagePinned(page)) {
938 if (!PageHighMem(page)) {
939 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
940 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
941 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
942 }
943 ClearPagePinned(page);
944 }
945}
946
947static void xen_release_pte(unsigned long pfn)
948{
949 xen_release_ptpage(pfn, PT_PTE);
950}
951
952static void xen_release_pmd(unsigned long pfn)
953{
954 xen_release_ptpage(pfn, PT_PMD);
955}
956
957#if PAGETABLE_LEVELS == 4
958static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
959{
960 xen_alloc_ptpage(mm, pfn, PT_PUD);
961}
962
963static void xen_release_pud(unsigned long pfn)
964{
965 xen_release_ptpage(pfn, PT_PUD);
966}
967#endif
968
969#ifdef CONFIG_HIGHPTE
970static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
971{
972 pgprot_t prot = PAGE_KERNEL;
973
974 if (PagePinned(page))
975 prot = PAGE_KERNEL_RO;
976
977 if (0 && PageHighMem(page))
978 printk("mapping highpte %lx type %d prot %s\n",
979 page_to_pfn(page), type,
980 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
981
982 return kmap_atomic_prot(page, type, prot);
983}
984#endif
985
986#ifdef CONFIG_X86_32
987static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
988{
989 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
990 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
991 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
992 pte_val_ma(pte));
993
994 return pte;
995}
996
997/* Init-time set_pte while constructing initial pagetables, which
998 doesn't allow RO pagetable pages to be remapped RW */
999static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1000{
1001 pte = mask_rw_pte(ptep, pte);
1002
1003 xen_set_pte(ptep, pte);
1004}
1005#endif
1006
1007static __init void xen_pagetable_setup_start(pgd_t *base)
1008{
1009}
1010
1011void xen_setup_shared_info(void) 645void xen_setup_shared_info(void)
1012{ 646{
1013 if (!xen_feature(XENFEAT_auto_translated_physmap)) { 647 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
@@ -1028,37 +662,6 @@ void xen_setup_shared_info(void)
1028 xen_setup_mfn_list_list(); 662 xen_setup_mfn_list_list();
1029} 663}
1030 664
1031static __init void xen_pagetable_setup_done(pgd_t *base)
1032{
1033 xen_setup_shared_info();
1034}
1035
1036static __init void xen_post_allocator_init(void)
1037{
1038 pv_mmu_ops.set_pte = xen_set_pte;
1039 pv_mmu_ops.set_pmd = xen_set_pmd;
1040 pv_mmu_ops.set_pud = xen_set_pud;
1041#if PAGETABLE_LEVELS == 4
1042 pv_mmu_ops.set_pgd = xen_set_pgd;
1043#endif
1044
1045 /* This will work as long as patching hasn't happened yet
1046 (which it hasn't) */
1047 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1048 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1049 pv_mmu_ops.release_pte = xen_release_pte;
1050 pv_mmu_ops.release_pmd = xen_release_pmd;
1051#if PAGETABLE_LEVELS == 4
1052 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1053 pv_mmu_ops.release_pud = xen_release_pud;
1054#endif
1055
1056#ifdef CONFIG_X86_64
1057 SetPagePinned(virt_to_page(level3_user_vsyscall));
1058#endif
1059 xen_mark_init_mm_pinned();
1060}
1061
1062/* This is called once we have the cpu_possible_map */ 665/* This is called once we have the cpu_possible_map */
1063void xen_setup_vcpu_info_placement(void) 666void xen_setup_vcpu_info_placement(void)
1064{ 667{
@@ -1072,10 +675,10 @@ void xen_setup_vcpu_info_placement(void)
1072 if (have_vcpu_info_placement) { 675 if (have_vcpu_info_placement) {
1073 printk(KERN_INFO "Xen: using vcpu_info placement\n"); 676 printk(KERN_INFO "Xen: using vcpu_info placement\n");
1074 677
1075 pv_irq_ops.save_fl = xen_save_fl_direct; 678 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1076 pv_irq_ops.restore_fl = xen_restore_fl_direct; 679 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1077 pv_irq_ops.irq_disable = xen_irq_disable_direct; 680 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1078 pv_irq_ops.irq_enable = xen_irq_enable_direct; 681 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1079 pv_mmu_ops.read_cr2 = xen_read_cr2_direct; 682 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
1080 } 683 }
1081} 684}
@@ -1133,49 +736,6 @@ static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1133 return ret; 736 return ret;
1134} 737}
1135 738
1136static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1137{
1138 pte_t pte;
1139
1140 phys >>= PAGE_SHIFT;
1141
1142 switch (idx) {
1143 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1144#ifdef CONFIG_X86_F00F_BUG
1145 case FIX_F00F_IDT:
1146#endif
1147#ifdef CONFIG_X86_32
1148 case FIX_WP_TEST:
1149 case FIX_VDSO:
1150# ifdef CONFIG_HIGHMEM
1151 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1152# endif
1153#else
1154 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1155#endif
1156#ifdef CONFIG_X86_LOCAL_APIC
1157 case FIX_APIC_BASE: /* maps dummy local APIC */
1158#endif
1159 pte = pfn_pte(phys, prot);
1160 break;
1161
1162 default:
1163 pte = mfn_pte(phys, prot);
1164 break;
1165 }
1166
1167 __native_set_fixmap(idx, pte);
1168
1169#ifdef CONFIG_X86_64
1170 /* Replicate changes to map the vsyscall page into the user
1171 pagetable vsyscall mapping. */
1172 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1173 unsigned long vaddr = __fix_to_virt(idx);
1174 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1175 }
1176#endif
1177}
1178
1179static const struct pv_info xen_info __initdata = { 739static const struct pv_info xen_info __initdata = {
1180 .paravirt_enabled = 1, 740 .paravirt_enabled = 1,
1181 .shared_kernel_pmd = 0, 741 .shared_kernel_pmd = 0,
@@ -1271,87 +831,6 @@ static const struct pv_apic_ops xen_apic_ops __initdata = {
1271#endif 831#endif
1272}; 832};
1273 833
1274static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1275 .pagetable_setup_start = xen_pagetable_setup_start,
1276 .pagetable_setup_done = xen_pagetable_setup_done,
1277
1278 .read_cr2 = xen_read_cr2,
1279 .write_cr2 = xen_write_cr2,
1280
1281 .read_cr3 = xen_read_cr3,
1282 .write_cr3 = xen_write_cr3,
1283
1284 .flush_tlb_user = xen_flush_tlb,
1285 .flush_tlb_kernel = xen_flush_tlb,
1286 .flush_tlb_single = xen_flush_tlb_single,
1287 .flush_tlb_others = xen_flush_tlb_others,
1288
1289 .pte_update = paravirt_nop,
1290 .pte_update_defer = paravirt_nop,
1291
1292 .pgd_alloc = xen_pgd_alloc,
1293 .pgd_free = xen_pgd_free,
1294
1295 .alloc_pte = xen_alloc_pte_init,
1296 .release_pte = xen_release_pte_init,
1297 .alloc_pmd = xen_alloc_pte_init,
1298 .alloc_pmd_clone = paravirt_nop,
1299 .release_pmd = xen_release_pte_init,
1300
1301#ifdef CONFIG_HIGHPTE
1302 .kmap_atomic_pte = xen_kmap_atomic_pte,
1303#endif
1304
1305#ifdef CONFIG_X86_64
1306 .set_pte = xen_set_pte,
1307#else
1308 .set_pte = xen_set_pte_init,
1309#endif
1310 .set_pte_at = xen_set_pte_at,
1311 .set_pmd = xen_set_pmd_hyper,
1312
1313 .ptep_modify_prot_start = __ptep_modify_prot_start,
1314 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1315
1316 .pte_val = xen_pte_val,
1317 .pte_flags = native_pte_flags,
1318 .pgd_val = xen_pgd_val,
1319
1320 .make_pte = xen_make_pte,
1321 .make_pgd = xen_make_pgd,
1322
1323#ifdef CONFIG_X86_PAE
1324 .set_pte_atomic = xen_set_pte_atomic,
1325 .set_pte_present = xen_set_pte_at,
1326 .pte_clear = xen_pte_clear,
1327 .pmd_clear = xen_pmd_clear,
1328#endif /* CONFIG_X86_PAE */
1329 .set_pud = xen_set_pud_hyper,
1330
1331 .make_pmd = xen_make_pmd,
1332 .pmd_val = xen_pmd_val,
1333
1334#if PAGETABLE_LEVELS == 4
1335 .pud_val = xen_pud_val,
1336 .make_pud = xen_make_pud,
1337 .set_pgd = xen_set_pgd_hyper,
1338
1339 .alloc_pud = xen_alloc_pte_init,
1340 .release_pud = xen_release_pte_init,
1341#endif /* PAGETABLE_LEVELS == 4 */
1342
1343 .activate_mm = xen_activate_mm,
1344 .dup_mmap = xen_dup_mmap,
1345 .exit_mmap = xen_exit_mmap,
1346
1347 .lazy_mode = {
1348 .enter = paravirt_enter_lazy_mmu,
1349 .leave = xen_leave_lazy,
1350 },
1351
1352 .set_fixmap = xen_set_fixmap,
1353};
1354
1355static void xen_reboot(int reason) 834static void xen_reboot(int reason)
1356{ 835{
1357 struct sched_shutdown r = { .reason = reason }; 836 struct sched_shutdown r = { .reason = reason };
@@ -1394,223 +873,6 @@ static const struct machine_ops __initdata xen_machine_ops = {
1394}; 873};
1395 874
1396 875
1397static void __init xen_reserve_top(void)
1398{
1399#ifdef CONFIG_X86_32
1400 unsigned long top = HYPERVISOR_VIRT_START;
1401 struct xen_platform_parameters pp;
1402
1403 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1404 top = pp.virt_start;
1405
1406 reserve_top_address(-top);
1407#endif /* CONFIG_X86_32 */
1408}
1409
1410/*
1411 * Like __va(), but returns address in the kernel mapping (which is
1412 * all we have until the physical memory mapping has been set up.
1413 */
1414static void *__ka(phys_addr_t paddr)
1415{
1416#ifdef CONFIG_X86_64
1417 return (void *)(paddr + __START_KERNEL_map);
1418#else
1419 return __va(paddr);
1420#endif
1421}
1422
1423/* Convert a machine address to physical address */
1424static unsigned long m2p(phys_addr_t maddr)
1425{
1426 phys_addr_t paddr;
1427
1428 maddr &= PTE_PFN_MASK;
1429 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1430
1431 return paddr;
1432}
1433
1434/* Convert a machine address to kernel virtual */
1435static void *m2v(phys_addr_t maddr)
1436{
1437 return __ka(m2p(maddr));
1438}
1439
1440static void set_page_prot(void *addr, pgprot_t prot)
1441{
1442 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1443 pte_t pte = pfn_pte(pfn, prot);
1444
1445 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1446 BUG();
1447}
1448
1449static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1450{
1451 unsigned pmdidx, pteidx;
1452 unsigned ident_pte;
1453 unsigned long pfn;
1454
1455 ident_pte = 0;
1456 pfn = 0;
1457 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1458 pte_t *pte_page;
1459
1460 /* Reuse or allocate a page of ptes */
1461 if (pmd_present(pmd[pmdidx]))
1462 pte_page = m2v(pmd[pmdidx].pmd);
1463 else {
1464 /* Check for free pte pages */
1465 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1466 break;
1467
1468 pte_page = &level1_ident_pgt[ident_pte];
1469 ident_pte += PTRS_PER_PTE;
1470
1471 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1472 }
1473
1474 /* Install mappings */
1475 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1476 pte_t pte;
1477
1478 if (pfn > max_pfn_mapped)
1479 max_pfn_mapped = pfn;
1480
1481 if (!pte_none(pte_page[pteidx]))
1482 continue;
1483
1484 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1485 pte_page[pteidx] = pte;
1486 }
1487 }
1488
1489 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1490 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1491
1492 set_page_prot(pmd, PAGE_KERNEL_RO);
1493}
1494
1495#ifdef CONFIG_X86_64
1496static void convert_pfn_mfn(void *v)
1497{
1498 pte_t *pte = v;
1499 int i;
1500
1501 /* All levels are converted the same way, so just treat them
1502 as ptes. */
1503 for (i = 0; i < PTRS_PER_PTE; i++)
1504 pte[i] = xen_make_pte(pte[i].pte);
1505}
1506
1507/*
1508 * Set up the inital kernel pagetable.
1509 *
1510 * We can construct this by grafting the Xen provided pagetable into
1511 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1512 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1513 * means that only the kernel has a physical mapping to start with -
1514 * but that's enough to get __va working. We need to fill in the rest
1515 * of the physical mapping once some sort of allocator has been set
1516 * up.
1517 */
1518static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1519 unsigned long max_pfn)
1520{
1521 pud_t *l3;
1522 pmd_t *l2;
1523
1524 /* Zap identity mapping */
1525 init_level4_pgt[0] = __pgd(0);
1526
1527 /* Pre-constructed entries are in pfn, so convert to mfn */
1528 convert_pfn_mfn(init_level4_pgt);
1529 convert_pfn_mfn(level3_ident_pgt);
1530 convert_pfn_mfn(level3_kernel_pgt);
1531
1532 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1533 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1534
1535 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1536 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1537
1538 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1539 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1540 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1541
1542 /* Set up identity map */
1543 xen_map_identity_early(level2_ident_pgt, max_pfn);
1544
1545 /* Make pagetable pieces RO */
1546 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1547 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1548 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1549 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1550 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1551 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1552
1553 /* Pin down new L4 */
1554 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1555 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1556
1557 /* Unpin Xen-provided one */
1558 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1559
1560 /* Switch over */
1561 pgd = init_level4_pgt;
1562
1563 /*
1564 * At this stage there can be no user pgd, and no page
1565 * structure to attach it to, so make sure we just set kernel
1566 * pgd.
1567 */
1568 xen_mc_batch();
1569 __xen_write_cr3(true, __pa(pgd));
1570 xen_mc_issue(PARAVIRT_LAZY_CPU);
1571
1572 reserve_early(__pa(xen_start_info->pt_base),
1573 __pa(xen_start_info->pt_base +
1574 xen_start_info->nr_pt_frames * PAGE_SIZE),
1575 "XEN PAGETABLES");
1576
1577 return pgd;
1578}
1579#else /* !CONFIG_X86_64 */
1580static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1581
1582static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1583 unsigned long max_pfn)
1584{
1585 pmd_t *kernel_pmd;
1586
1587 init_pg_tables_start = __pa(pgd);
1588 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1589 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1590
1591 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1592 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1593
1594 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1595
1596 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1597 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1598 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1599
1600 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1601 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1602 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1603
1604 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1605
1606 xen_write_cr3(__pa(swapper_pg_dir));
1607
1608 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1609
1610 return swapper_pg_dir;
1611}
1612#endif /* CONFIG_X86_64 */
1613
1614/* First C function to be called on Xen boot */ 876/* First C function to be called on Xen boot */
1615asmlinkage void __init xen_start_kernel(void) 877asmlinkage void __init xen_start_kernel(void)
1616{ 878{
@@ -1639,7 +901,7 @@ asmlinkage void __init xen_start_kernel(void)
1639 /* 901 /*
1640 * set up the basic apic ops. 902 * set up the basic apic ops.
1641 */ 903 */
1642 apic_ops = &xen_basic_apic_ops; 904 set_xen_basic_apic_ops();
1643#endif 905#endif
1644 906
1645 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 907 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
@@ -1650,10 +912,18 @@ asmlinkage void __init xen_start_kernel(void)
1650 machine_ops = xen_machine_ops; 912 machine_ops = xen_machine_ops;
1651 913
1652#ifdef CONFIG_X86_64 914#ifdef CONFIG_X86_64
1653 /* Disable until direct per-cpu data access. */ 915 /*
1654 have_vcpu_info_placement = 0; 916 * Setup percpu state. We only need to do this for 64-bit
1655 x86_64_init_pda(); 917 * because 32-bit already has %fs set properly.
918 */
919 load_percpu_segment(0);
1656#endif 920#endif
921 /*
922 * The only reliable way to retain the initial address of the
923 * percpu gdt_page is to remember it here, so we can go and
924 * mark it RW later, when the initial percpu area is freed.
925 */
926 xen_initial_gdt = &per_cpu(gdt_page, 0);
1657 927
1658 xen_smp_init(); 928 xen_smp_init();
1659 929
diff --git a/arch/x86/xen/irq.c b/arch/x86/xen/irq.c
index bb042608c602..cfd17799bd6d 100644
--- a/arch/x86/xen/irq.c
+++ b/arch/x86/xen/irq.c
@@ -19,27 +19,12 @@ void xen_force_evtchn_callback(void)
19 (void)HYPERVISOR_xen_version(0, NULL); 19 (void)HYPERVISOR_xen_version(0, NULL);
20} 20}
21 21
22static void __init __xen_init_IRQ(void)
23{
24 int i;
25
26 /* Create identity vector->irq map */
27 for(i = 0; i < NR_VECTORS; i++) {
28 int cpu;
29
30 for_each_possible_cpu(cpu)
31 per_cpu(vector_irq, cpu)[i] = i;
32 }
33
34 xen_init_IRQ();
35}
36
37static unsigned long xen_save_fl(void) 22static unsigned long xen_save_fl(void)
38{ 23{
39 struct vcpu_info *vcpu; 24 struct vcpu_info *vcpu;
40 unsigned long flags; 25 unsigned long flags;
41 26
42 vcpu = x86_read_percpu(xen_vcpu); 27 vcpu = percpu_read(xen_vcpu);
43 28
44 /* flag has opposite sense of mask */ 29 /* flag has opposite sense of mask */
45 flags = !vcpu->evtchn_upcall_mask; 30 flags = !vcpu->evtchn_upcall_mask;
@@ -50,6 +35,7 @@ static unsigned long xen_save_fl(void)
50 */ 35 */
51 return (-flags) & X86_EFLAGS_IF; 36 return (-flags) & X86_EFLAGS_IF;
52} 37}
38PV_CALLEE_SAVE_REGS_THUNK(xen_save_fl);
53 39
54static void xen_restore_fl(unsigned long flags) 40static void xen_restore_fl(unsigned long flags)
55{ 41{
@@ -62,7 +48,7 @@ static void xen_restore_fl(unsigned long flags)
62 make sure we're don't switch CPUs between getting the vcpu 48 make sure we're don't switch CPUs between getting the vcpu
63 pointer and updating the mask. */ 49 pointer and updating the mask. */
64 preempt_disable(); 50 preempt_disable();
65 vcpu = x86_read_percpu(xen_vcpu); 51 vcpu = percpu_read(xen_vcpu);
66 vcpu->evtchn_upcall_mask = flags; 52 vcpu->evtchn_upcall_mask = flags;
67 preempt_enable_no_resched(); 53 preempt_enable_no_resched();
68 54
@@ -76,6 +62,7 @@ static void xen_restore_fl(unsigned long flags)
76 xen_force_evtchn_callback(); 62 xen_force_evtchn_callback();
77 } 63 }
78} 64}
65PV_CALLEE_SAVE_REGS_THUNK(xen_restore_fl);
79 66
80static void xen_irq_disable(void) 67static void xen_irq_disable(void)
81{ 68{
@@ -83,9 +70,10 @@ static void xen_irq_disable(void)
83 make sure we're don't switch CPUs between getting the vcpu 70 make sure we're don't switch CPUs between getting the vcpu
84 pointer and updating the mask. */ 71 pointer and updating the mask. */
85 preempt_disable(); 72 preempt_disable();
86 x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1; 73 percpu_read(xen_vcpu)->evtchn_upcall_mask = 1;
87 preempt_enable_no_resched(); 74 preempt_enable_no_resched();
88} 75}
76PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable);
89 77
90static void xen_irq_enable(void) 78static void xen_irq_enable(void)
91{ 79{
@@ -96,7 +84,7 @@ static void xen_irq_enable(void)
96 the caller is confused and is trying to re-enable interrupts 84 the caller is confused and is trying to re-enable interrupts
97 on an indeterminate processor. */ 85 on an indeterminate processor. */
98 86
99 vcpu = x86_read_percpu(xen_vcpu); 87 vcpu = percpu_read(xen_vcpu);
100 vcpu->evtchn_upcall_mask = 0; 88 vcpu->evtchn_upcall_mask = 0;
101 89
102 /* Doesn't matter if we get preempted here, because any 90 /* Doesn't matter if we get preempted here, because any
@@ -106,6 +94,7 @@ static void xen_irq_enable(void)
106 if (unlikely(vcpu->evtchn_upcall_pending)) 94 if (unlikely(vcpu->evtchn_upcall_pending))
107 xen_force_evtchn_callback(); 95 xen_force_evtchn_callback();
108} 96}
97PV_CALLEE_SAVE_REGS_THUNK(xen_irq_enable);
109 98
110static void xen_safe_halt(void) 99static void xen_safe_halt(void)
111{ 100{
@@ -123,11 +112,13 @@ static void xen_halt(void)
123} 112}
124 113
125static const struct pv_irq_ops xen_irq_ops __initdata = { 114static const struct pv_irq_ops xen_irq_ops __initdata = {
126 .init_IRQ = __xen_init_IRQ, 115 .init_IRQ = xen_init_IRQ,
127 .save_fl = xen_save_fl, 116
128 .restore_fl = xen_restore_fl, 117 .save_fl = PV_CALLEE_SAVE(xen_save_fl),
129 .irq_disable = xen_irq_disable, 118 .restore_fl = PV_CALLEE_SAVE(xen_restore_fl),
130 .irq_enable = xen_irq_enable, 119 .irq_disable = PV_CALLEE_SAVE(xen_irq_disable),
120 .irq_enable = PV_CALLEE_SAVE(xen_irq_enable),
121
131 .safe_halt = xen_safe_halt, 122 .safe_halt = xen_safe_halt,
132 .halt = xen_halt, 123 .halt = xen_halt,
133#ifdef CONFIG_X86_64 124#ifdef CONFIG_X86_64
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 503c240e26c7..cb6afa4ec95c 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -47,6 +47,7 @@
47#include <asm/tlbflush.h> 47#include <asm/tlbflush.h>
48#include <asm/fixmap.h> 48#include <asm/fixmap.h>
49#include <asm/mmu_context.h> 49#include <asm/mmu_context.h>
50#include <asm/setup.h>
50#include <asm/paravirt.h> 51#include <asm/paravirt.h>
51#include <asm/linkage.h> 52#include <asm/linkage.h>
52 53
@@ -55,6 +56,8 @@
55 56
56#include <xen/page.h> 57#include <xen/page.h>
57#include <xen/interface/xen.h> 58#include <xen/interface/xen.h>
59#include <xen/interface/version.h>
60#include <xen/hvc-console.h>
58 61
59#include "multicalls.h" 62#include "multicalls.h"
60#include "mmu.h" 63#include "mmu.h"
@@ -114,6 +117,37 @@ static inline void check_zero(void)
114 117
115#endif /* CONFIG_XEN_DEBUG_FS */ 118#endif /* CONFIG_XEN_DEBUG_FS */
116 119
120
121/*
122 * Identity map, in addition to plain kernel map. This needs to be
123 * large enough to allocate page table pages to allocate the rest.
124 * Each page can map 2MB.
125 */
126static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
127
128#ifdef CONFIG_X86_64
129/* l3 pud for userspace vsyscall mapping */
130static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
131#endif /* CONFIG_X86_64 */
132
133/*
134 * Note about cr3 (pagetable base) values:
135 *
136 * xen_cr3 contains the current logical cr3 value; it contains the
137 * last set cr3. This may not be the current effective cr3, because
138 * its update may be being lazily deferred. However, a vcpu looking
139 * at its own cr3 can use this value knowing that it everything will
140 * be self-consistent.
141 *
142 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
143 * hypercall to set the vcpu cr3 is complete (so it may be a little
144 * out of date, but it will never be set early). If one vcpu is
145 * looking at another vcpu's cr3 value, it should use this variable.
146 */
147DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
148DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
149
150
117/* 151/*
118 * Just beyond the highest usermode address. STACK_TOP_MAX has a 152 * Just beyond the highest usermode address. STACK_TOP_MAX has a
119 * redzone above it, so round it up to a PGD boundary. 153 * redzone above it, so round it up to a PGD boundary.
@@ -242,6 +276,13 @@ void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
242 p2m_top[topidx][idx] = mfn; 276 p2m_top[topidx][idx] = mfn;
243} 277}
244 278
279unsigned long arbitrary_virt_to_mfn(void *vaddr)
280{
281 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
282
283 return PFN_DOWN(maddr.maddr);
284}
285
245xmaddr_t arbitrary_virt_to_machine(void *vaddr) 286xmaddr_t arbitrary_virt_to_machine(void *vaddr)
246{ 287{
247 unsigned long address = (unsigned long)vaddr; 288 unsigned long address = (unsigned long)vaddr;
@@ -458,28 +499,33 @@ pteval_t xen_pte_val(pte_t pte)
458{ 499{
459 return pte_mfn_to_pfn(pte.pte); 500 return pte_mfn_to_pfn(pte.pte);
460} 501}
502PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
461 503
462pgdval_t xen_pgd_val(pgd_t pgd) 504pgdval_t xen_pgd_val(pgd_t pgd)
463{ 505{
464 return pte_mfn_to_pfn(pgd.pgd); 506 return pte_mfn_to_pfn(pgd.pgd);
465} 507}
508PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
466 509
467pte_t xen_make_pte(pteval_t pte) 510pte_t xen_make_pte(pteval_t pte)
468{ 511{
469 pte = pte_pfn_to_mfn(pte); 512 pte = pte_pfn_to_mfn(pte);
470 return native_make_pte(pte); 513 return native_make_pte(pte);
471} 514}
515PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
472 516
473pgd_t xen_make_pgd(pgdval_t pgd) 517pgd_t xen_make_pgd(pgdval_t pgd)
474{ 518{
475 pgd = pte_pfn_to_mfn(pgd); 519 pgd = pte_pfn_to_mfn(pgd);
476 return native_make_pgd(pgd); 520 return native_make_pgd(pgd);
477} 521}
522PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
478 523
479pmdval_t xen_pmd_val(pmd_t pmd) 524pmdval_t xen_pmd_val(pmd_t pmd)
480{ 525{
481 return pte_mfn_to_pfn(pmd.pmd); 526 return pte_mfn_to_pfn(pmd.pmd);
482} 527}
528PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
483 529
484void xen_set_pud_hyper(pud_t *ptr, pud_t val) 530void xen_set_pud_hyper(pud_t *ptr, pud_t val)
485{ 531{
@@ -556,12 +602,14 @@ pmd_t xen_make_pmd(pmdval_t pmd)
556 pmd = pte_pfn_to_mfn(pmd); 602 pmd = pte_pfn_to_mfn(pmd);
557 return native_make_pmd(pmd); 603 return native_make_pmd(pmd);
558} 604}
605PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
559 606
560#if PAGETABLE_LEVELS == 4 607#if PAGETABLE_LEVELS == 4
561pudval_t xen_pud_val(pud_t pud) 608pudval_t xen_pud_val(pud_t pud)
562{ 609{
563 return pte_mfn_to_pfn(pud.pud); 610 return pte_mfn_to_pfn(pud.pud);
564} 611}
612PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
565 613
566pud_t xen_make_pud(pudval_t pud) 614pud_t xen_make_pud(pudval_t pud)
567{ 615{
@@ -569,6 +617,7 @@ pud_t xen_make_pud(pudval_t pud)
569 617
570 return native_make_pud(pud); 618 return native_make_pud(pud);
571} 619}
620PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
572 621
573pgd_t *xen_get_user_pgd(pgd_t *pgd) 622pgd_t *xen_get_user_pgd(pgd_t *pgd)
574{ 623{
@@ -1063,18 +1112,14 @@ static void drop_other_mm_ref(void *info)
1063 struct mm_struct *mm = info; 1112 struct mm_struct *mm = info;
1064 struct mm_struct *active_mm; 1113 struct mm_struct *active_mm;
1065 1114
1066#ifdef CONFIG_X86_64 1115 active_mm = percpu_read(cpu_tlbstate.active_mm);
1067 active_mm = read_pda(active_mm);
1068#else
1069 active_mm = __get_cpu_var(cpu_tlbstate).active_mm;
1070#endif
1071 1116
1072 if (active_mm == mm) 1117 if (active_mm == mm)
1073 leave_mm(smp_processor_id()); 1118 leave_mm(smp_processor_id());
1074 1119
1075 /* If this cpu still has a stale cr3 reference, then make sure 1120 /* If this cpu still has a stale cr3 reference, then make sure
1076 it has been flushed. */ 1121 it has been flushed. */
1077 if (x86_read_percpu(xen_current_cr3) == __pa(mm->pgd)) { 1122 if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) {
1078 load_cr3(swapper_pg_dir); 1123 load_cr3(swapper_pg_dir);
1079 arch_flush_lazy_cpu_mode(); 1124 arch_flush_lazy_cpu_mode();
1080 } 1125 }
@@ -1156,6 +1201,706 @@ void xen_exit_mmap(struct mm_struct *mm)
1156 spin_unlock(&mm->page_table_lock); 1201 spin_unlock(&mm->page_table_lock);
1157} 1202}
1158 1203
1204static __init void xen_pagetable_setup_start(pgd_t *base)
1205{
1206}
1207
1208static __init void xen_pagetable_setup_done(pgd_t *base)
1209{
1210 xen_setup_shared_info();
1211}
1212
1213static void xen_write_cr2(unsigned long cr2)
1214{
1215 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1216}
1217
1218static unsigned long xen_read_cr2(void)
1219{
1220 return percpu_read(xen_vcpu)->arch.cr2;
1221}
1222
1223unsigned long xen_read_cr2_direct(void)
1224{
1225 return percpu_read(xen_vcpu_info.arch.cr2);
1226}
1227
1228static void xen_flush_tlb(void)
1229{
1230 struct mmuext_op *op;
1231 struct multicall_space mcs;
1232
1233 preempt_disable();
1234
1235 mcs = xen_mc_entry(sizeof(*op));
1236
1237 op = mcs.args;
1238 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1239 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1240
1241 xen_mc_issue(PARAVIRT_LAZY_MMU);
1242
1243 preempt_enable();
1244}
1245
1246static void xen_flush_tlb_single(unsigned long addr)
1247{
1248 struct mmuext_op *op;
1249 struct multicall_space mcs;
1250
1251 preempt_disable();
1252
1253 mcs = xen_mc_entry(sizeof(*op));
1254 op = mcs.args;
1255 op->cmd = MMUEXT_INVLPG_LOCAL;
1256 op->arg1.linear_addr = addr & PAGE_MASK;
1257 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1258
1259 xen_mc_issue(PARAVIRT_LAZY_MMU);
1260
1261 preempt_enable();
1262}
1263
1264static void xen_flush_tlb_others(const struct cpumask *cpus,
1265 struct mm_struct *mm, unsigned long va)
1266{
1267 struct {
1268 struct mmuext_op op;
1269 DECLARE_BITMAP(mask, NR_CPUS);
1270 } *args;
1271 struct multicall_space mcs;
1272
1273 BUG_ON(cpumask_empty(cpus));
1274 BUG_ON(!mm);
1275
1276 mcs = xen_mc_entry(sizeof(*args));
1277 args = mcs.args;
1278 args->op.arg2.vcpumask = to_cpumask(args->mask);
1279
1280 /* Remove us, and any offline CPUS. */
1281 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1282 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1283
1284 if (va == TLB_FLUSH_ALL) {
1285 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1286 } else {
1287 args->op.cmd = MMUEXT_INVLPG_MULTI;
1288 args->op.arg1.linear_addr = va;
1289 }
1290
1291 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1292
1293 xen_mc_issue(PARAVIRT_LAZY_MMU);
1294}
1295
1296static unsigned long xen_read_cr3(void)
1297{
1298 return percpu_read(xen_cr3);
1299}
1300
1301static void set_current_cr3(void *v)
1302{
1303 percpu_write(xen_current_cr3, (unsigned long)v);
1304}
1305
1306static void __xen_write_cr3(bool kernel, unsigned long cr3)
1307{
1308 struct mmuext_op *op;
1309 struct multicall_space mcs;
1310 unsigned long mfn;
1311
1312 if (cr3)
1313 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1314 else
1315 mfn = 0;
1316
1317 WARN_ON(mfn == 0 && kernel);
1318
1319 mcs = __xen_mc_entry(sizeof(*op));
1320
1321 op = mcs.args;
1322 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1323 op->arg1.mfn = mfn;
1324
1325 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1326
1327 if (kernel) {
1328 percpu_write(xen_cr3, cr3);
1329
1330 /* Update xen_current_cr3 once the batch has actually
1331 been submitted. */
1332 xen_mc_callback(set_current_cr3, (void *)cr3);
1333 }
1334}
1335
1336static void xen_write_cr3(unsigned long cr3)
1337{
1338 BUG_ON(preemptible());
1339
1340 xen_mc_batch(); /* disables interrupts */
1341
1342 /* Update while interrupts are disabled, so its atomic with
1343 respect to ipis */
1344 percpu_write(xen_cr3, cr3);
1345
1346 __xen_write_cr3(true, cr3);
1347
1348#ifdef CONFIG_X86_64
1349 {
1350 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1351 if (user_pgd)
1352 __xen_write_cr3(false, __pa(user_pgd));
1353 else
1354 __xen_write_cr3(false, 0);
1355 }
1356#endif
1357
1358 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1359}
1360
1361static int xen_pgd_alloc(struct mm_struct *mm)
1362{
1363 pgd_t *pgd = mm->pgd;
1364 int ret = 0;
1365
1366 BUG_ON(PagePinned(virt_to_page(pgd)));
1367
1368#ifdef CONFIG_X86_64
1369 {
1370 struct page *page = virt_to_page(pgd);
1371 pgd_t *user_pgd;
1372
1373 BUG_ON(page->private != 0);
1374
1375 ret = -ENOMEM;
1376
1377 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1378 page->private = (unsigned long)user_pgd;
1379
1380 if (user_pgd != NULL) {
1381 user_pgd[pgd_index(VSYSCALL_START)] =
1382 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1383 ret = 0;
1384 }
1385
1386 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1387 }
1388#endif
1389
1390 return ret;
1391}
1392
1393static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1394{
1395#ifdef CONFIG_X86_64
1396 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1397
1398 if (user_pgd)
1399 free_page((unsigned long)user_pgd);
1400#endif
1401}
1402
1403#ifdef CONFIG_HIGHPTE
1404static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
1405{
1406 pgprot_t prot = PAGE_KERNEL;
1407
1408 if (PagePinned(page))
1409 prot = PAGE_KERNEL_RO;
1410
1411 if (0 && PageHighMem(page))
1412 printk("mapping highpte %lx type %d prot %s\n",
1413 page_to_pfn(page), type,
1414 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
1415
1416 return kmap_atomic_prot(page, type, prot);
1417}
1418#endif
1419
1420#ifdef CONFIG_X86_32
1421static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
1422{
1423 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1424 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1425 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1426 pte_val_ma(pte));
1427
1428 return pte;
1429}
1430
1431/* Init-time set_pte while constructing initial pagetables, which
1432 doesn't allow RO pagetable pages to be remapped RW */
1433static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1434{
1435 pte = mask_rw_pte(ptep, pte);
1436
1437 xen_set_pte(ptep, pte);
1438}
1439#endif
1440
1441/* Early in boot, while setting up the initial pagetable, assume
1442 everything is pinned. */
1443static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1444{
1445#ifdef CONFIG_FLATMEM
1446 BUG_ON(mem_map); /* should only be used early */
1447#endif
1448 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1449}
1450
1451/* Early release_pte assumes that all pts are pinned, since there's
1452 only init_mm and anything attached to that is pinned. */
1453static void xen_release_pte_init(unsigned long pfn)
1454{
1455 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1456}
1457
1458static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1459{
1460 struct mmuext_op op;
1461 op.cmd = cmd;
1462 op.arg1.mfn = pfn_to_mfn(pfn);
1463 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1464 BUG();
1465}
1466
1467/* This needs to make sure the new pte page is pinned iff its being
1468 attached to a pinned pagetable. */
1469static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1470{
1471 struct page *page = pfn_to_page(pfn);
1472
1473 if (PagePinned(virt_to_page(mm->pgd))) {
1474 SetPagePinned(page);
1475
1476 vm_unmap_aliases();
1477 if (!PageHighMem(page)) {
1478 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1479 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1480 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1481 } else {
1482 /* make sure there are no stray mappings of
1483 this page */
1484 kmap_flush_unused();
1485 }
1486 }
1487}
1488
1489static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1490{
1491 xen_alloc_ptpage(mm, pfn, PT_PTE);
1492}
1493
1494static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1495{
1496 xen_alloc_ptpage(mm, pfn, PT_PMD);
1497}
1498
1499/* This should never happen until we're OK to use struct page */
1500static void xen_release_ptpage(unsigned long pfn, unsigned level)
1501{
1502 struct page *page = pfn_to_page(pfn);
1503
1504 if (PagePinned(page)) {
1505 if (!PageHighMem(page)) {
1506 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1507 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1508 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1509 }
1510 ClearPagePinned(page);
1511 }
1512}
1513
1514static void xen_release_pte(unsigned long pfn)
1515{
1516 xen_release_ptpage(pfn, PT_PTE);
1517}
1518
1519static void xen_release_pmd(unsigned long pfn)
1520{
1521 xen_release_ptpage(pfn, PT_PMD);
1522}
1523
1524#if PAGETABLE_LEVELS == 4
1525static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1526{
1527 xen_alloc_ptpage(mm, pfn, PT_PUD);
1528}
1529
1530static void xen_release_pud(unsigned long pfn)
1531{
1532 xen_release_ptpage(pfn, PT_PUD);
1533}
1534#endif
1535
1536void __init xen_reserve_top(void)
1537{
1538#ifdef CONFIG_X86_32
1539 unsigned long top = HYPERVISOR_VIRT_START;
1540 struct xen_platform_parameters pp;
1541
1542 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1543 top = pp.virt_start;
1544
1545 reserve_top_address(-top);
1546#endif /* CONFIG_X86_32 */
1547}
1548
1549/*
1550 * Like __va(), but returns address in the kernel mapping (which is
1551 * all we have until the physical memory mapping has been set up.
1552 */
1553static void *__ka(phys_addr_t paddr)
1554{
1555#ifdef CONFIG_X86_64
1556 return (void *)(paddr + __START_KERNEL_map);
1557#else
1558 return __va(paddr);
1559#endif
1560}
1561
1562/* Convert a machine address to physical address */
1563static unsigned long m2p(phys_addr_t maddr)
1564{
1565 phys_addr_t paddr;
1566
1567 maddr &= PTE_PFN_MASK;
1568 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1569
1570 return paddr;
1571}
1572
1573/* Convert a machine address to kernel virtual */
1574static void *m2v(phys_addr_t maddr)
1575{
1576 return __ka(m2p(maddr));
1577}
1578
1579static void set_page_prot(void *addr, pgprot_t prot)
1580{
1581 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1582 pte_t pte = pfn_pte(pfn, prot);
1583
1584 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1585 BUG();
1586}
1587
1588static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1589{
1590 unsigned pmdidx, pteidx;
1591 unsigned ident_pte;
1592 unsigned long pfn;
1593
1594 ident_pte = 0;
1595 pfn = 0;
1596 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1597 pte_t *pte_page;
1598
1599 /* Reuse or allocate a page of ptes */
1600 if (pmd_present(pmd[pmdidx]))
1601 pte_page = m2v(pmd[pmdidx].pmd);
1602 else {
1603 /* Check for free pte pages */
1604 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1605 break;
1606
1607 pte_page = &level1_ident_pgt[ident_pte];
1608 ident_pte += PTRS_PER_PTE;
1609
1610 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1611 }
1612
1613 /* Install mappings */
1614 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1615 pte_t pte;
1616
1617 if (pfn > max_pfn_mapped)
1618 max_pfn_mapped = pfn;
1619
1620 if (!pte_none(pte_page[pteidx]))
1621 continue;
1622
1623 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1624 pte_page[pteidx] = pte;
1625 }
1626 }
1627
1628 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1629 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1630
1631 set_page_prot(pmd, PAGE_KERNEL_RO);
1632}
1633
1634#ifdef CONFIG_X86_64
1635static void convert_pfn_mfn(void *v)
1636{
1637 pte_t *pte = v;
1638 int i;
1639
1640 /* All levels are converted the same way, so just treat them
1641 as ptes. */
1642 for (i = 0; i < PTRS_PER_PTE; i++)
1643 pte[i] = xen_make_pte(pte[i].pte);
1644}
1645
1646/*
1647 * Set up the inital kernel pagetable.
1648 *
1649 * We can construct this by grafting the Xen provided pagetable into
1650 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1651 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1652 * means that only the kernel has a physical mapping to start with -
1653 * but that's enough to get __va working. We need to fill in the rest
1654 * of the physical mapping once some sort of allocator has been set
1655 * up.
1656 */
1657__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1658 unsigned long max_pfn)
1659{
1660 pud_t *l3;
1661 pmd_t *l2;
1662
1663 /* Zap identity mapping */
1664 init_level4_pgt[0] = __pgd(0);
1665
1666 /* Pre-constructed entries are in pfn, so convert to mfn */
1667 convert_pfn_mfn(init_level4_pgt);
1668 convert_pfn_mfn(level3_ident_pgt);
1669 convert_pfn_mfn(level3_kernel_pgt);
1670
1671 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1672 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1673
1674 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1675 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1676
1677 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1678 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1679 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1680
1681 /* Set up identity map */
1682 xen_map_identity_early(level2_ident_pgt, max_pfn);
1683
1684 /* Make pagetable pieces RO */
1685 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1686 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1687 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1688 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1689 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1690 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1691
1692 /* Pin down new L4 */
1693 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1694 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1695
1696 /* Unpin Xen-provided one */
1697 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1698
1699 /* Switch over */
1700 pgd = init_level4_pgt;
1701
1702 /*
1703 * At this stage there can be no user pgd, and no page
1704 * structure to attach it to, so make sure we just set kernel
1705 * pgd.
1706 */
1707 xen_mc_batch();
1708 __xen_write_cr3(true, __pa(pgd));
1709 xen_mc_issue(PARAVIRT_LAZY_CPU);
1710
1711 reserve_early(__pa(xen_start_info->pt_base),
1712 __pa(xen_start_info->pt_base +
1713 xen_start_info->nr_pt_frames * PAGE_SIZE),
1714 "XEN PAGETABLES");
1715
1716 return pgd;
1717}
1718#else /* !CONFIG_X86_64 */
1719static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1720
1721__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1722 unsigned long max_pfn)
1723{
1724 pmd_t *kernel_pmd;
1725
1726 init_pg_tables_start = __pa(pgd);
1727 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1728 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1729
1730 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1731 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1732
1733 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1734
1735 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1736 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1737 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1738
1739 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1740 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1741 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1742
1743 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1744
1745 xen_write_cr3(__pa(swapper_pg_dir));
1746
1747 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1748
1749 return swapper_pg_dir;
1750}
1751#endif /* CONFIG_X86_64 */
1752
1753static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1754{
1755 pte_t pte;
1756
1757 phys >>= PAGE_SHIFT;
1758
1759 switch (idx) {
1760 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1761#ifdef CONFIG_X86_F00F_BUG
1762 case FIX_F00F_IDT:
1763#endif
1764#ifdef CONFIG_X86_32
1765 case FIX_WP_TEST:
1766 case FIX_VDSO:
1767# ifdef CONFIG_HIGHMEM
1768 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1769# endif
1770#else
1771 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1772#endif
1773#ifdef CONFIG_X86_LOCAL_APIC
1774 case FIX_APIC_BASE: /* maps dummy local APIC */
1775#endif
1776 pte = pfn_pte(phys, prot);
1777 break;
1778
1779 default:
1780 pte = mfn_pte(phys, prot);
1781 break;
1782 }
1783
1784 __native_set_fixmap(idx, pte);
1785
1786#ifdef CONFIG_X86_64
1787 /* Replicate changes to map the vsyscall page into the user
1788 pagetable vsyscall mapping. */
1789 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1790 unsigned long vaddr = __fix_to_virt(idx);
1791 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1792 }
1793#endif
1794}
1795
1796__init void xen_post_allocator_init(void)
1797{
1798 pv_mmu_ops.set_pte = xen_set_pte;
1799 pv_mmu_ops.set_pmd = xen_set_pmd;
1800 pv_mmu_ops.set_pud = xen_set_pud;
1801#if PAGETABLE_LEVELS == 4
1802 pv_mmu_ops.set_pgd = xen_set_pgd;
1803#endif
1804
1805 /* This will work as long as patching hasn't happened yet
1806 (which it hasn't) */
1807 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1808 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1809 pv_mmu_ops.release_pte = xen_release_pte;
1810 pv_mmu_ops.release_pmd = xen_release_pmd;
1811#if PAGETABLE_LEVELS == 4
1812 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1813 pv_mmu_ops.release_pud = xen_release_pud;
1814#endif
1815
1816#ifdef CONFIG_X86_64
1817 SetPagePinned(virt_to_page(level3_user_vsyscall));
1818#endif
1819 xen_mark_init_mm_pinned();
1820}
1821
1822
1823const struct pv_mmu_ops xen_mmu_ops __initdata = {
1824 .pagetable_setup_start = xen_pagetable_setup_start,
1825 .pagetable_setup_done = xen_pagetable_setup_done,
1826
1827 .read_cr2 = xen_read_cr2,
1828 .write_cr2 = xen_write_cr2,
1829
1830 .read_cr3 = xen_read_cr3,
1831 .write_cr3 = xen_write_cr3,
1832
1833 .flush_tlb_user = xen_flush_tlb,
1834 .flush_tlb_kernel = xen_flush_tlb,
1835 .flush_tlb_single = xen_flush_tlb_single,
1836 .flush_tlb_others = xen_flush_tlb_others,
1837
1838 .pte_update = paravirt_nop,
1839 .pte_update_defer = paravirt_nop,
1840
1841 .pgd_alloc = xen_pgd_alloc,
1842 .pgd_free = xen_pgd_free,
1843
1844 .alloc_pte = xen_alloc_pte_init,
1845 .release_pte = xen_release_pte_init,
1846 .alloc_pmd = xen_alloc_pte_init,
1847 .alloc_pmd_clone = paravirt_nop,
1848 .release_pmd = xen_release_pte_init,
1849
1850#ifdef CONFIG_HIGHPTE
1851 .kmap_atomic_pte = xen_kmap_atomic_pte,
1852#endif
1853
1854#ifdef CONFIG_X86_64
1855 .set_pte = xen_set_pte,
1856#else
1857 .set_pte = xen_set_pte_init,
1858#endif
1859 .set_pte_at = xen_set_pte_at,
1860 .set_pmd = xen_set_pmd_hyper,
1861
1862 .ptep_modify_prot_start = __ptep_modify_prot_start,
1863 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1864
1865 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
1866 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
1867
1868 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
1869 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
1870
1871#ifdef CONFIG_X86_PAE
1872 .set_pte_atomic = xen_set_pte_atomic,
1873 .set_pte_present = xen_set_pte_at,
1874 .pte_clear = xen_pte_clear,
1875 .pmd_clear = xen_pmd_clear,
1876#endif /* CONFIG_X86_PAE */
1877 .set_pud = xen_set_pud_hyper,
1878
1879 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
1880 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
1881
1882#if PAGETABLE_LEVELS == 4
1883 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
1884 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
1885 .set_pgd = xen_set_pgd_hyper,
1886
1887 .alloc_pud = xen_alloc_pte_init,
1888 .release_pud = xen_release_pte_init,
1889#endif /* PAGETABLE_LEVELS == 4 */
1890
1891 .activate_mm = xen_activate_mm,
1892 .dup_mmap = xen_dup_mmap,
1893 .exit_mmap = xen_exit_mmap,
1894
1895 .lazy_mode = {
1896 .enter = paravirt_enter_lazy_mmu,
1897 .leave = xen_leave_lazy,
1898 },
1899
1900 .set_fixmap = xen_set_fixmap,
1901};
1902
1903
1159#ifdef CONFIG_XEN_DEBUG_FS 1904#ifdef CONFIG_XEN_DEBUG_FS
1160 1905
1161static struct dentry *d_mmu_debug; 1906static struct dentry *d_mmu_debug;
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h
index 98d71659da5a..24d1b44a337d 100644
--- a/arch/x86/xen/mmu.h
+++ b/arch/x86/xen/mmu.h
@@ -54,4 +54,7 @@ pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t
54void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, 54void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
55 pte_t *ptep, pte_t pte); 55 pte_t *ptep, pte_t pte);
56 56
57unsigned long xen_read_cr2_direct(void);
58
59extern const struct pv_mmu_ops xen_mmu_ops;
57#endif /* _XEN_MMU_H */ 60#endif /* _XEN_MMU_H */
diff --git a/arch/x86/xen/multicalls.c b/arch/x86/xen/multicalls.c
index c738644b5435..8bff7e7c290b 100644
--- a/arch/x86/xen/multicalls.c
+++ b/arch/x86/xen/multicalls.c
@@ -39,6 +39,7 @@ struct mc_buffer {
39 struct multicall_entry entries[MC_BATCH]; 39 struct multicall_entry entries[MC_BATCH];
40#if MC_DEBUG 40#if MC_DEBUG
41 struct multicall_entry debug[MC_BATCH]; 41 struct multicall_entry debug[MC_BATCH];
42 void *caller[MC_BATCH];
42#endif 43#endif
43 unsigned char args[MC_ARGS]; 44 unsigned char args[MC_ARGS];
44 struct callback { 45 struct callback {
@@ -154,11 +155,12 @@ void xen_mc_flush(void)
154 ret, smp_processor_id()); 155 ret, smp_processor_id());
155 dump_stack(); 156 dump_stack();
156 for (i = 0; i < b->mcidx; i++) { 157 for (i = 0; i < b->mcidx; i++) {
157 printk(KERN_DEBUG " call %2d/%d: op=%lu arg=[%lx] result=%ld\n", 158 printk(KERN_DEBUG " call %2d/%d: op=%lu arg=[%lx] result=%ld\t%pF\n",
158 i+1, b->mcidx, 159 i+1, b->mcidx,
159 b->debug[i].op, 160 b->debug[i].op,
160 b->debug[i].args[0], 161 b->debug[i].args[0],
161 b->entries[i].result); 162 b->entries[i].result,
163 b->caller[i]);
162 } 164 }
163 } 165 }
164#endif 166#endif
@@ -168,8 +170,6 @@ void xen_mc_flush(void)
168 } else 170 } else
169 BUG_ON(b->argidx != 0); 171 BUG_ON(b->argidx != 0);
170 172
171 local_irq_restore(flags);
172
173 for (i = 0; i < b->cbidx; i++) { 173 for (i = 0; i < b->cbidx; i++) {
174 struct callback *cb = &b->callbacks[i]; 174 struct callback *cb = &b->callbacks[i];
175 175
@@ -177,7 +177,9 @@ void xen_mc_flush(void)
177 } 177 }
178 b->cbidx = 0; 178 b->cbidx = 0;
179 179
180 BUG_ON(ret); 180 local_irq_restore(flags);
181
182 WARN_ON(ret);
181} 183}
182 184
183struct multicall_space __xen_mc_entry(size_t args) 185struct multicall_space __xen_mc_entry(size_t args)
@@ -197,6 +199,9 @@ struct multicall_space __xen_mc_entry(size_t args)
197 } 199 }
198 200
199 ret.mc = &b->entries[b->mcidx]; 201 ret.mc = &b->entries[b->mcidx];
202#ifdef MC_DEBUG
203 b->caller[b->mcidx] = __builtin_return_address(0);
204#endif
200 b->mcidx++; 205 b->mcidx++;
201 ret.args = &b->args[argidx]; 206 ret.args = &b->args[argidx];
202 b->argidx = argidx + args; 207 b->argidx = argidx + args;
diff --git a/arch/x86/xen/multicalls.h b/arch/x86/xen/multicalls.h
index fa3e10725d98..9e565da5d1f7 100644
--- a/arch/x86/xen/multicalls.h
+++ b/arch/x86/xen/multicalls.h
@@ -41,7 +41,7 @@ static inline void xen_mc_issue(unsigned mode)
41 xen_mc_flush(); 41 xen_mc_flush();
42 42
43 /* restore flags saved in xen_mc_batch */ 43 /* restore flags saved in xen_mc_batch */
44 local_irq_restore(x86_read_percpu(xen_mc_irq_flags)); 44 local_irq_restore(percpu_read(xen_mc_irq_flags));
45} 45}
46 46
47/* Set up a callback to be called when the current batch is flushed */ 47/* Set up a callback to be called when the current batch is flushed */
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index c44e2069c7c7..8d470562ffc9 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -50,11 +50,7 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id);
50 */ 50 */
51static irqreturn_t xen_reschedule_interrupt(int irq, void *dev_id) 51static irqreturn_t xen_reschedule_interrupt(int irq, void *dev_id)
52{ 52{
53#ifdef CONFIG_X86_32 53 inc_irq_stat(irq_resched_count);
54 __get_cpu_var(irq_stat).irq_resched_count++;
55#else
56 add_pda(irq_resched_count, 1);
57#endif
58 54
59 return IRQ_HANDLED; 55 return IRQ_HANDLED;
60} 56}
@@ -78,7 +74,7 @@ static __cpuinit void cpu_bringup(void)
78 xen_setup_cpu_clockevents(); 74 xen_setup_cpu_clockevents();
79 75
80 cpu_set(cpu, cpu_online_map); 76 cpu_set(cpu, cpu_online_map);
81 x86_write_percpu(cpu_state, CPU_ONLINE); 77 percpu_write(cpu_state, CPU_ONLINE);
82 wmb(); 78 wmb();
83 79
84 /* We can take interrupts now: we're officially "up". */ 80 /* We can take interrupts now: we're officially "up". */
@@ -174,7 +170,7 @@ static void __init xen_smp_prepare_boot_cpu(void)
174 170
175 /* We've switched to the "real" per-cpu gdt, so make sure the 171 /* We've switched to the "real" per-cpu gdt, so make sure the
176 old memory can be recycled */ 172 old memory can be recycled */
177 make_lowmem_page_readwrite(&per_cpu_var(gdt_page)); 173 make_lowmem_page_readwrite(xen_initial_gdt);
178 174
179 xen_setup_vcpu_info_placement(); 175 xen_setup_vcpu_info_placement();
180} 176}
@@ -223,6 +219,7 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle)
223{ 219{
224 struct vcpu_guest_context *ctxt; 220 struct vcpu_guest_context *ctxt;
225 struct desc_struct *gdt; 221 struct desc_struct *gdt;
222 unsigned long gdt_mfn;
226 223
227 if (cpumask_test_and_set_cpu(cpu, xen_cpu_initialized_map)) 224 if (cpumask_test_and_set_cpu(cpu, xen_cpu_initialized_map))
228 return 0; 225 return 0;
@@ -239,6 +236,8 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle)
239 ctxt->user_regs.ss = __KERNEL_DS; 236 ctxt->user_regs.ss = __KERNEL_DS;
240#ifdef CONFIG_X86_32 237#ifdef CONFIG_X86_32
241 ctxt->user_regs.fs = __KERNEL_PERCPU; 238 ctxt->user_regs.fs = __KERNEL_PERCPU;
239#else
240 ctxt->gs_base_kernel = per_cpu_offset(cpu);
242#endif 241#endif
243 ctxt->user_regs.eip = (unsigned long)cpu_bringup_and_idle; 242 ctxt->user_regs.eip = (unsigned long)cpu_bringup_and_idle;
244 ctxt->user_regs.eflags = 0x1000; /* IOPL_RING1 */ 243 ctxt->user_regs.eflags = 0x1000; /* IOPL_RING1 */
@@ -250,9 +249,12 @@ cpu_initialize_context(unsigned int cpu, struct task_struct *idle)
250 ctxt->ldt_ents = 0; 249 ctxt->ldt_ents = 0;
251 250
252 BUG_ON((unsigned long)gdt & ~PAGE_MASK); 251 BUG_ON((unsigned long)gdt & ~PAGE_MASK);
252
253 gdt_mfn = arbitrary_virt_to_mfn(gdt);
253 make_lowmem_page_readonly(gdt); 254 make_lowmem_page_readonly(gdt);
255 make_lowmem_page_readonly(mfn_to_virt(gdt_mfn));
254 256
255 ctxt->gdt_frames[0] = virt_to_mfn(gdt); 257 ctxt->gdt_frames[0] = gdt_mfn;
256 ctxt->gdt_ents = GDT_ENTRIES; 258 ctxt->gdt_ents = GDT_ENTRIES;
257 259
258 ctxt->user_regs.cs = __KERNEL_CS; 260 ctxt->user_regs.cs = __KERNEL_CS;
@@ -283,23 +285,14 @@ static int __cpuinit xen_cpu_up(unsigned int cpu)
283 struct task_struct *idle = idle_task(cpu); 285 struct task_struct *idle = idle_task(cpu);
284 int rc; 286 int rc;
285 287
286#ifdef CONFIG_X86_64
287 /* Allocate node local memory for AP pdas */
288 WARN_ON(cpu == 0);
289 if (cpu > 0) {
290 rc = get_local_pda(cpu);
291 if (rc)
292 return rc;
293 }
294#endif
295
296#ifdef CONFIG_X86_32
297 init_gdt(cpu);
298 per_cpu(current_task, cpu) = idle; 288 per_cpu(current_task, cpu) = idle;
289#ifdef CONFIG_X86_32
299 irq_ctx_init(cpu); 290 irq_ctx_init(cpu);
300#else 291#else
301 cpu_pda(cpu)->pcurrent = idle;
302 clear_tsk_thread_flag(idle, TIF_FORK); 292 clear_tsk_thread_flag(idle, TIF_FORK);
293 per_cpu(kernel_stack, cpu) =
294 (unsigned long)task_stack_page(idle) -
295 KERNEL_STACK_OFFSET + THREAD_SIZE;
303#endif 296#endif
304 xen_setup_timer(cpu); 297 xen_setup_timer(cpu);
305 xen_init_lock_cpu(cpu); 298 xen_init_lock_cpu(cpu);
@@ -445,11 +438,7 @@ static irqreturn_t xen_call_function_interrupt(int irq, void *dev_id)
445{ 438{
446 irq_enter(); 439 irq_enter();
447 generic_smp_call_function_interrupt(); 440 generic_smp_call_function_interrupt();
448#ifdef CONFIG_X86_32 441 inc_irq_stat(irq_call_count);
449 __get_cpu_var(irq_stat).irq_call_count++;
450#else
451 add_pda(irq_call_count, 1);
452#endif
453 irq_exit(); 442 irq_exit();
454 443
455 return IRQ_HANDLED; 444 return IRQ_HANDLED;
@@ -459,11 +448,7 @@ static irqreturn_t xen_call_function_single_interrupt(int irq, void *dev_id)
459{ 448{
460 irq_enter(); 449 irq_enter();
461 generic_smp_call_function_single_interrupt(); 450 generic_smp_call_function_single_interrupt();
462#ifdef CONFIG_X86_32 451 inc_irq_stat(irq_call_count);
463 __get_cpu_var(irq_stat).irq_call_count++;
464#else
465 add_pda(irq_call_count, 1);
466#endif
467 irq_exit(); 452 irq_exit();
468 453
469 return IRQ_HANDLED; 454 return IRQ_HANDLED;
diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c
index 212ffe012b76..95be7b434724 100644
--- a/arch/x86/xen/suspend.c
+++ b/arch/x86/xen/suspend.c
@@ -6,6 +6,7 @@
6 6
7#include <asm/xen/hypercall.h> 7#include <asm/xen/hypercall.h>
8#include <asm/xen/page.h> 8#include <asm/xen/page.h>
9#include <asm/fixmap.h>
9 10
10#include "xen-ops.h" 11#include "xen-ops.h"
11#include "mmu.h" 12#include "mmu.h"
diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S
new file mode 100644
index 000000000000..79d7362ad6d1
--- /dev/null
+++ b/arch/x86/xen/xen-asm.S
@@ -0,0 +1,142 @@
1/*
2 * Asm versions of Xen pv-ops, suitable for either direct use or
3 * inlining. The inline versions are the same as the direct-use
4 * versions, with the pre- and post-amble chopped off.
5 *
6 * This code is encoded for size rather than absolute efficiency, with
7 * a view to being able to inline as much as possible.
8 *
9 * We only bother with direct forms (ie, vcpu in percpu data) of the
10 * operations here; the indirect forms are better handled in C, since
11 * they're generally too large to inline anyway.
12 */
13
14#include <asm/asm-offsets.h>
15#include <asm/percpu.h>
16#include <asm/processor-flags.h>
17
18#include "xen-asm.h"
19
20/*
21 * Enable events. This clears the event mask and tests the pending
22 * event status with one and operation. If there are pending events,
23 * then enter the hypervisor to get them handled.
24 */
25ENTRY(xen_irq_enable_direct)
26 /* Unmask events */
27 movb $0, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
28
29 /*
30 * Preempt here doesn't matter because that will deal with any
31 * pending interrupts. The pending check may end up being run
32 * on the wrong CPU, but that doesn't hurt.
33 */
34
35 /* Test for pending */
36 testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
37 jz 1f
38
392: call check_events
401:
41ENDPATCH(xen_irq_enable_direct)
42 ret
43 ENDPROC(xen_irq_enable_direct)
44 RELOC(xen_irq_enable_direct, 2b+1)
45
46
47/*
48 * Disabling events is simply a matter of making the event mask
49 * non-zero.
50 */
51ENTRY(xen_irq_disable_direct)
52 movb $1, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
53ENDPATCH(xen_irq_disable_direct)
54 ret
55 ENDPROC(xen_irq_disable_direct)
56 RELOC(xen_irq_disable_direct, 0)
57
58/*
59 * (xen_)save_fl is used to get the current interrupt enable status.
60 * Callers expect the status to be in X86_EFLAGS_IF, and other bits
61 * may be set in the return value. We take advantage of this by
62 * making sure that X86_EFLAGS_IF has the right value (and other bits
63 * in that byte are 0), but other bits in the return value are
64 * undefined. We need to toggle the state of the bit, because Xen and
65 * x86 use opposite senses (mask vs enable).
66 */
67ENTRY(xen_save_fl_direct)
68 testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
69 setz %ah
70 addb %ah, %ah
71ENDPATCH(xen_save_fl_direct)
72 ret
73 ENDPROC(xen_save_fl_direct)
74 RELOC(xen_save_fl_direct, 0)
75
76
77/*
78 * In principle the caller should be passing us a value return from
79 * xen_save_fl_direct, but for robustness sake we test only the
80 * X86_EFLAGS_IF flag rather than the whole byte. After setting the
81 * interrupt mask state, it checks for unmasked pending events and
82 * enters the hypervisor to get them delivered if so.
83 */
84ENTRY(xen_restore_fl_direct)
85#ifdef CONFIG_X86_64
86 testw $X86_EFLAGS_IF, %di
87#else
88 testb $X86_EFLAGS_IF>>8, %ah
89#endif
90 setz PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask
91 /*
92 * Preempt here doesn't matter because that will deal with any
93 * pending interrupts. The pending check may end up being run
94 * on the wrong CPU, but that doesn't hurt.
95 */
96
97 /* check for unmasked and pending */
98 cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending
99 jz 1f
1002: call check_events
1011:
102ENDPATCH(xen_restore_fl_direct)
103 ret
104 ENDPROC(xen_restore_fl_direct)
105 RELOC(xen_restore_fl_direct, 2b+1)
106
107
108/*
109 * Force an event check by making a hypercall, but preserve regs
110 * before making the call.
111 */
112check_events:
113#ifdef CONFIG_X86_32
114 push %eax
115 push %ecx
116 push %edx
117 call xen_force_evtchn_callback
118 pop %edx
119 pop %ecx
120 pop %eax
121#else
122 push %rax
123 push %rcx
124 push %rdx
125 push %rsi
126 push %rdi
127 push %r8
128 push %r9
129 push %r10
130 push %r11
131 call xen_force_evtchn_callback
132 pop %r11
133 pop %r10
134 pop %r9
135 pop %r8
136 pop %rdi
137 pop %rsi
138 pop %rdx
139 pop %rcx
140 pop %rax
141#endif
142 ret
diff --git a/arch/x86/xen/xen-asm.h b/arch/x86/xen/xen-asm.h
new file mode 100644
index 000000000000..465276467a47
--- /dev/null
+++ b/arch/x86/xen/xen-asm.h
@@ -0,0 +1,12 @@
1#ifndef _XEN_XEN_ASM_H
2#define _XEN_XEN_ASM_H
3
4#include <linux/linkage.h>
5
6#define RELOC(x, v) .globl x##_reloc; x##_reloc=v
7#define ENDPATCH(x) .globl x##_end; x##_end=.
8
9/* Pseudo-flag used for virtual NMI, which we don't implement yet */
10#define XEN_EFLAGS_NMI 0x80000000
11
12#endif
diff --git a/arch/x86/xen/xen-asm_32.S b/arch/x86/xen/xen-asm_32.S
index 42786f59d9c0..88e15deb8b82 100644
--- a/arch/x86/xen/xen-asm_32.S
+++ b/arch/x86/xen/xen-asm_32.S
@@ -1,117 +1,43 @@
1/* 1/*
2 Asm versions of Xen pv-ops, suitable for either direct use or inlining. 2 * Asm versions of Xen pv-ops, suitable for either direct use or
3 The inline versions are the same as the direct-use versions, with the 3 * inlining. The inline versions are the same as the direct-use
4 pre- and post-amble chopped off. 4 * versions, with the pre- and post-amble chopped off.
5 5 *
6 This code is encoded for size rather than absolute efficiency, 6 * This code is encoded for size rather than absolute efficiency, with
7 with a view to being able to inline as much as possible. 7 * a view to being able to inline as much as possible.
8 8 *
9 We only bother with direct forms (ie, vcpu in pda) of the operations 9 * We only bother with direct forms (ie, vcpu in pda) of the
10 here; the indirect forms are better handled in C, since they're 10 * operations here; the indirect forms are better handled in C, since
11 generally too large to inline anyway. 11 * they're generally too large to inline anyway.
12 */ 12 */
13 13
14#include <linux/linkage.h>
15
16#include <asm/asm-offsets.h>
17#include <asm/thread_info.h> 14#include <asm/thread_info.h>
18#include <asm/percpu.h>
19#include <asm/processor-flags.h> 15#include <asm/processor-flags.h>
20#include <asm/segment.h> 16#include <asm/segment.h>
21 17
22#include <xen/interface/xen.h> 18#include <xen/interface/xen.h>
23 19
24#define RELOC(x, v) .globl x##_reloc; x##_reloc=v 20#include "xen-asm.h"
25#define ENDPATCH(x) .globl x##_end; x##_end=.
26
27/* Pseudo-flag used for virtual NMI, which we don't implement yet */
28#define XEN_EFLAGS_NMI 0x80000000
29
30/*
31 Enable events. This clears the event mask and tests the pending
32 event status with one and operation. If there are pending
33 events, then enter the hypervisor to get them handled.
34 */
35ENTRY(xen_irq_enable_direct)
36 /* Unmask events */
37 movb $0, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask
38
39 /* Preempt here doesn't matter because that will deal with
40 any pending interrupts. The pending check may end up being
41 run on the wrong CPU, but that doesn't hurt. */
42
43 /* Test for pending */
44 testb $0xff, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_pending
45 jz 1f
46
472: call check_events
481:
49ENDPATCH(xen_irq_enable_direct)
50 ret
51 ENDPROC(xen_irq_enable_direct)
52 RELOC(xen_irq_enable_direct, 2b+1)
53
54
55/*
56 Disabling events is simply a matter of making the event mask
57 non-zero.
58 */
59ENTRY(xen_irq_disable_direct)
60 movb $1, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask
61ENDPATCH(xen_irq_disable_direct)
62 ret
63 ENDPROC(xen_irq_disable_direct)
64 RELOC(xen_irq_disable_direct, 0)
65 21
66/* 22/*
67 (xen_)save_fl is used to get the current interrupt enable status. 23 * Force an event check by making a hypercall, but preserve regs
68 Callers expect the status to be in X86_EFLAGS_IF, and other bits 24 * before making the call.
69 may be set in the return value. We take advantage of this by
70 making sure that X86_EFLAGS_IF has the right value (and other bits
71 in that byte are 0), but other bits in the return value are
72 undefined. We need to toggle the state of the bit, because
73 Xen and x86 use opposite senses (mask vs enable).
74 */ 25 */
75ENTRY(xen_save_fl_direct) 26check_events:
76 testb $0xff, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask 27 push %eax
77 setz %ah 28 push %ecx
78 addb %ah,%ah 29 push %edx
79ENDPATCH(xen_save_fl_direct) 30 call xen_force_evtchn_callback
80 ret 31 pop %edx
81 ENDPROC(xen_save_fl_direct) 32 pop %ecx
82 RELOC(xen_save_fl_direct, 0) 33 pop %eax
83
84
85/*
86 In principle the caller should be passing us a value return
87 from xen_save_fl_direct, but for robustness sake we test only
88 the X86_EFLAGS_IF flag rather than the whole byte. After
89 setting the interrupt mask state, it checks for unmasked
90 pending events and enters the hypervisor to get them delivered
91 if so.
92 */
93ENTRY(xen_restore_fl_direct)
94 testb $X86_EFLAGS_IF>>8, %ah
95 setz PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_mask
96 /* Preempt here doesn't matter because that will deal with
97 any pending interrupts. The pending check may end up being
98 run on the wrong CPU, but that doesn't hurt. */
99
100 /* check for unmasked and pending */
101 cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info)+XEN_vcpu_info_pending
102 jz 1f
1032: call check_events
1041:
105ENDPATCH(xen_restore_fl_direct)
106 ret 34 ret
107 ENDPROC(xen_restore_fl_direct)
108 RELOC(xen_restore_fl_direct, 2b+1)
109 35
110/* 36/*
111 We can't use sysexit directly, because we're not running in ring0. 37 * We can't use sysexit directly, because we're not running in ring0.
112 But we can easily fake it up using iret. Assuming xen_sysexit 38 * But we can easily fake it up using iret. Assuming xen_sysexit is
113 is jumped to with a standard stack frame, we can just strip it 39 * jumped to with a standard stack frame, we can just strip it back to
114 back to a standard iret frame and use iret. 40 * a standard iret frame and use iret.
115 */ 41 */
116ENTRY(xen_sysexit) 42ENTRY(xen_sysexit)
117 movl PT_EAX(%esp), %eax /* Shouldn't be necessary? */ 43 movl PT_EAX(%esp), %eax /* Shouldn't be necessary? */
@@ -122,33 +48,31 @@ ENTRY(xen_sysexit)
122ENDPROC(xen_sysexit) 48ENDPROC(xen_sysexit)
123 49
124/* 50/*
125 This is run where a normal iret would be run, with the same stack setup: 51 * This is run where a normal iret would be run, with the same stack setup:
126 8: eflags 52 * 8: eflags
127 4: cs 53 * 4: cs
128 esp-> 0: eip 54 * esp-> 0: eip
129 55 *
130 This attempts to make sure that any pending events are dealt 56 * This attempts to make sure that any pending events are dealt with
131 with on return to usermode, but there is a small window in 57 * on return to usermode, but there is a small window in which an
132 which an event can happen just before entering usermode. If 58 * event can happen just before entering usermode. If the nested
133 the nested interrupt ends up setting one of the TIF_WORK_MASK 59 * interrupt ends up setting one of the TIF_WORK_MASK pending work
134 pending work flags, they will not be tested again before 60 * flags, they will not be tested again before returning to
135 returning to usermode. This means that a process can end up 61 * usermode. This means that a process can end up with pending work,
136 with pending work, which will be unprocessed until the process 62 * which will be unprocessed until the process enters and leaves the
137 enters and leaves the kernel again, which could be an 63 * kernel again, which could be an unbounded amount of time. This
138 unbounded amount of time. This means that a pending signal or 64 * means that a pending signal or reschedule event could be
139 reschedule event could be indefinitely delayed. 65 * indefinitely delayed.
140 66 *
141 The fix is to notice a nested interrupt in the critical 67 * The fix is to notice a nested interrupt in the critical window, and
142 window, and if one occurs, then fold the nested interrupt into 68 * if one occurs, then fold the nested interrupt into the current
143 the current interrupt stack frame, and re-process it 69 * interrupt stack frame, and re-process it iteratively rather than
144 iteratively rather than recursively. This means that it will 70 * recursively. This means that it will exit via the normal path, and
145 exit via the normal path, and all pending work will be dealt 71 * all pending work will be dealt with appropriately.
146 with appropriately. 72 *
147 73 * Because the nested interrupt handler needs to deal with the current
148 Because the nested interrupt handler needs to deal with the 74 * stack state in whatever form its in, we keep things simple by only
149 current stack state in whatever form its in, we keep things 75 * using a single register which is pushed/popped on the stack.
150 simple by only using a single register which is pushed/popped
151 on the stack.
152 */ 76 */
153ENTRY(xen_iret) 77ENTRY(xen_iret)
154 /* test eflags for special cases */ 78 /* test eflags for special cases */
@@ -158,13 +82,15 @@ ENTRY(xen_iret)
158 push %eax 82 push %eax
159 ESP_OFFSET=4 # bytes pushed onto stack 83 ESP_OFFSET=4 # bytes pushed onto stack
160 84
161 /* Store vcpu_info pointer for easy access. Do it this 85 /*
162 way to avoid having to reload %fs */ 86 * Store vcpu_info pointer for easy access. Do it this way to
87 * avoid having to reload %fs
88 */
163#ifdef CONFIG_SMP 89#ifdef CONFIG_SMP
164 GET_THREAD_INFO(%eax) 90 GET_THREAD_INFO(%eax)
165 movl TI_cpu(%eax),%eax 91 movl TI_cpu(%eax), %eax
166 movl __per_cpu_offset(,%eax,4),%eax 92 movl __per_cpu_offset(,%eax,4), %eax
167 mov per_cpu__xen_vcpu(%eax),%eax 93 mov per_cpu__xen_vcpu(%eax), %eax
168#else 94#else
169 movl per_cpu__xen_vcpu, %eax 95 movl per_cpu__xen_vcpu, %eax
170#endif 96#endif
@@ -172,37 +98,46 @@ ENTRY(xen_iret)
172 /* check IF state we're restoring */ 98 /* check IF state we're restoring */
173 testb $X86_EFLAGS_IF>>8, 8+1+ESP_OFFSET(%esp) 99 testb $X86_EFLAGS_IF>>8, 8+1+ESP_OFFSET(%esp)
174 100
175 /* Maybe enable events. Once this happens we could get a 101 /*
176 recursive event, so the critical region starts immediately 102 * Maybe enable events. Once this happens we could get a
177 afterwards. However, if that happens we don't end up 103 * recursive event, so the critical region starts immediately
178 resuming the code, so we don't have to be worried about 104 * afterwards. However, if that happens we don't end up
179 being preempted to another CPU. */ 105 * resuming the code, so we don't have to be worried about
106 * being preempted to another CPU.
107 */
180 setz XEN_vcpu_info_mask(%eax) 108 setz XEN_vcpu_info_mask(%eax)
181xen_iret_start_crit: 109xen_iret_start_crit:
182 110
183 /* check for unmasked and pending */ 111 /* check for unmasked and pending */
184 cmpw $0x0001, XEN_vcpu_info_pending(%eax) 112 cmpw $0x0001, XEN_vcpu_info_pending(%eax)
185 113
186 /* If there's something pending, mask events again so we 114 /*
187 can jump back into xen_hypervisor_callback */ 115 * If there's something pending, mask events again so we can
116 * jump back into xen_hypervisor_callback
117 */
188 sete XEN_vcpu_info_mask(%eax) 118 sete XEN_vcpu_info_mask(%eax)
189 119
190 popl %eax 120 popl %eax
191 121
192 /* From this point on the registers are restored and the stack 122 /*
193 updated, so we don't need to worry about it if we're preempted */ 123 * From this point on the registers are restored and the stack
124 * updated, so we don't need to worry about it if we're
125 * preempted
126 */
194iret_restore_end: 127iret_restore_end:
195 128
196 /* Jump to hypervisor_callback after fixing up the stack. 129 /*
197 Events are masked, so jumping out of the critical 130 * Jump to hypervisor_callback after fixing up the stack.
198 region is OK. */ 131 * Events are masked, so jumping out of the critical region is
132 * OK.
133 */
199 je xen_hypervisor_callback 134 je xen_hypervisor_callback
200 135
2011: iret 1361: iret
202xen_iret_end_crit: 137xen_iret_end_crit:
203.section __ex_table,"a" 138.section __ex_table, "a"
204 .align 4 139 .align 4
205 .long 1b,iret_exc 140 .long 1b, iret_exc
206.previous 141.previous
207 142
208hyper_iret: 143hyper_iret:
@@ -212,55 +147,55 @@ hyper_iret:
212 .globl xen_iret_start_crit, xen_iret_end_crit 147 .globl xen_iret_start_crit, xen_iret_end_crit
213 148
214/* 149/*
215 This is called by xen_hypervisor_callback in entry.S when it sees 150 * This is called by xen_hypervisor_callback in entry.S when it sees
216 that the EIP at the time of interrupt was between xen_iret_start_crit 151 * that the EIP at the time of interrupt was between
217 and xen_iret_end_crit. We're passed the EIP in %eax so we can do 152 * xen_iret_start_crit and xen_iret_end_crit. We're passed the EIP in
218 a more refined determination of what to do. 153 * %eax so we can do a more refined determination of what to do.
219 154 *
220 The stack format at this point is: 155 * The stack format at this point is:
221 ---------------- 156 * ----------------
222 ss : (ss/esp may be present if we came from usermode) 157 * ss : (ss/esp may be present if we came from usermode)
223 esp : 158 * esp :
224 eflags } outer exception info 159 * eflags } outer exception info
225 cs } 160 * cs }
226 eip } 161 * eip }
227 ---------------- <- edi (copy dest) 162 * ---------------- <- edi (copy dest)
228 eax : outer eax if it hasn't been restored 163 * eax : outer eax if it hasn't been restored
229 ---------------- 164 * ----------------
230 eflags } nested exception info 165 * eflags } nested exception info
231 cs } (no ss/esp because we're nested 166 * cs } (no ss/esp because we're nested
232 eip } from the same ring) 167 * eip } from the same ring)
233 orig_eax }<- esi (copy src) 168 * orig_eax }<- esi (copy src)
234 - - - - - - - - 169 * - - - - - - - -
235 fs } 170 * fs }
236 es } 171 * es }
237 ds } SAVE_ALL state 172 * ds } SAVE_ALL state
238 eax } 173 * eax }
239 : : 174 * : :
240 ebx }<- esp 175 * ebx }<- esp
241 ---------------- 176 * ----------------
242 177 *
243 In order to deliver the nested exception properly, we need to shift 178 * In order to deliver the nested exception properly, we need to shift
244 everything from the return addr up to the error code so it 179 * everything from the return addr up to the error code so it sits
245 sits just under the outer exception info. This means that when we 180 * just under the outer exception info. This means that when we
246 handle the exception, we do it in the context of the outer exception 181 * handle the exception, we do it in the context of the outer
247 rather than starting a new one. 182 * exception rather than starting a new one.
248 183 *
249 The only caveat is that if the outer eax hasn't been 184 * The only caveat is that if the outer eax hasn't been restored yet
250 restored yet (ie, it's still on stack), we need to insert 185 * (ie, it's still on stack), we need to insert its value into the
251 its value into the SAVE_ALL state before going on, since 186 * SAVE_ALL state before going on, since it's usermode state which we
252 it's usermode state which we eventually need to restore. 187 * eventually need to restore.
253 */ 188 */
254ENTRY(xen_iret_crit_fixup) 189ENTRY(xen_iret_crit_fixup)
255 /* 190 /*
256 Paranoia: Make sure we're really coming from kernel space. 191 * Paranoia: Make sure we're really coming from kernel space.
257 One could imagine a case where userspace jumps into the 192 * One could imagine a case where userspace jumps into the
258 critical range address, but just before the CPU delivers a GP, 193 * critical range address, but just before the CPU delivers a
259 it decides to deliver an interrupt instead. Unlikely? 194 * GP, it decides to deliver an interrupt instead. Unlikely?
260 Definitely. Easy to avoid? Yes. The Intel documents 195 * Definitely. Easy to avoid? Yes. The Intel documents
261 explicitly say that the reported EIP for a bad jump is the 196 * explicitly say that the reported EIP for a bad jump is the
262 jump instruction itself, not the destination, but some virtual 197 * jump instruction itself, not the destination, but some
263 environments get this wrong. 198 * virtual environments get this wrong.
264 */ 199 */
265 movl PT_CS(%esp), %ecx 200 movl PT_CS(%esp), %ecx
266 andl $SEGMENT_RPL_MASK, %ecx 201 andl $SEGMENT_RPL_MASK, %ecx
@@ -270,15 +205,17 @@ ENTRY(xen_iret_crit_fixup)
270 lea PT_ORIG_EAX(%esp), %esi 205 lea PT_ORIG_EAX(%esp), %esi
271 lea PT_EFLAGS(%esp), %edi 206 lea PT_EFLAGS(%esp), %edi
272 207
273 /* If eip is before iret_restore_end then stack 208 /*
274 hasn't been restored yet. */ 209 * If eip is before iret_restore_end then stack
210 * hasn't been restored yet.
211 */
275 cmp $iret_restore_end, %eax 212 cmp $iret_restore_end, %eax
276 jae 1f 213 jae 1f
277 214
278 movl 0+4(%edi),%eax /* copy EAX (just above top of frame) */ 215 movl 0+4(%edi), %eax /* copy EAX (just above top of frame) */
279 movl %eax, PT_EAX(%esp) 216 movl %eax, PT_EAX(%esp)
280 217
281 lea ESP_OFFSET(%edi),%edi /* move dest up over saved regs */ 218 lea ESP_OFFSET(%edi), %edi /* move dest up over saved regs */
282 219
283 /* set up the copy */ 220 /* set up the copy */
2841: std 2211: std
@@ -286,20 +223,6 @@ ENTRY(xen_iret_crit_fixup)
286 rep movsl 223 rep movsl
287 cld 224 cld
288 225
289 lea 4(%edi),%esp /* point esp to new frame */ 226 lea 4(%edi), %esp /* point esp to new frame */
2902: jmp xen_do_upcall 2272: jmp xen_do_upcall
291 228
292
293/*
294 Force an event check by making a hypercall,
295 but preserve regs before making the call.
296 */
297check_events:
298 push %eax
299 push %ecx
300 push %edx
301 call xen_force_evtchn_callback
302 pop %edx
303 pop %ecx
304 pop %eax
305 ret
diff --git a/arch/x86/xen/xen-asm_64.S b/arch/x86/xen/xen-asm_64.S
index 05794c566e87..02f496a8dbaa 100644
--- a/arch/x86/xen/xen-asm_64.S
+++ b/arch/x86/xen/xen-asm_64.S
@@ -1,174 +1,45 @@
1/* 1/*
2 Asm versions of Xen pv-ops, suitable for either direct use or inlining. 2 * Asm versions of Xen pv-ops, suitable for either direct use or
3 The inline versions are the same as the direct-use versions, with the 3 * inlining. The inline versions are the same as the direct-use
4 pre- and post-amble chopped off. 4 * versions, with the pre- and post-amble chopped off.
5 5 *
6 This code is encoded for size rather than absolute efficiency, 6 * This code is encoded for size rather than absolute efficiency, with
7 with a view to being able to inline as much as possible. 7 * a view to being able to inline as much as possible.
8 8 *
9 We only bother with direct forms (ie, vcpu in pda) of the operations 9 * We only bother with direct forms (ie, vcpu in pda) of the
10 here; the indirect forms are better handled in C, since they're 10 * operations here; the indirect forms are better handled in C, since
11 generally too large to inline anyway. 11 * they're generally too large to inline anyway.
12 */ 12 */
13 13
14#include <linux/linkage.h>
15
16#include <asm/asm-offsets.h>
17#include <asm/processor-flags.h>
18#include <asm/errno.h> 14#include <asm/errno.h>
15#include <asm/percpu.h>
16#include <asm/processor-flags.h>
19#include <asm/segment.h> 17#include <asm/segment.h>
20 18
21#include <xen/interface/xen.h> 19#include <xen/interface/xen.h>
22 20
23#define RELOC(x, v) .globl x##_reloc; x##_reloc=v 21#include "xen-asm.h"
24#define ENDPATCH(x) .globl x##_end; x##_end=.
25
26/* Pseudo-flag used for virtual NMI, which we don't implement yet */
27#define XEN_EFLAGS_NMI 0x80000000
28
29#if 1
30/*
31 x86-64 does not yet support direct access to percpu variables
32 via a segment override, so we just need to make sure this code
33 never gets used
34 */
35#define BUG ud2a
36#define PER_CPU_VAR(var, off) 0xdeadbeef
37#endif
38
39/*
40 Enable events. This clears the event mask and tests the pending
41 event status with one and operation. If there are pending
42 events, then enter the hypervisor to get them handled.
43 */
44ENTRY(xen_irq_enable_direct)
45 BUG
46
47 /* Unmask events */
48 movb $0, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
49
50 /* Preempt here doesn't matter because that will deal with
51 any pending interrupts. The pending check may end up being
52 run on the wrong CPU, but that doesn't hurt. */
53
54 /* Test for pending */
55 testb $0xff, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_pending)
56 jz 1f
57
582: call check_events
591:
60ENDPATCH(xen_irq_enable_direct)
61 ret
62 ENDPROC(xen_irq_enable_direct)
63 RELOC(xen_irq_enable_direct, 2b+1)
64
65/*
66 Disabling events is simply a matter of making the event mask
67 non-zero.
68 */
69ENTRY(xen_irq_disable_direct)
70 BUG
71
72 movb $1, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
73ENDPATCH(xen_irq_disable_direct)
74 ret
75 ENDPROC(xen_irq_disable_direct)
76 RELOC(xen_irq_disable_direct, 0)
77
78/*
79 (xen_)save_fl is used to get the current interrupt enable status.
80 Callers expect the status to be in X86_EFLAGS_IF, and other bits
81 may be set in the return value. We take advantage of this by
82 making sure that X86_EFLAGS_IF has the right value (and other bits
83 in that byte are 0), but other bits in the return value are
84 undefined. We need to toggle the state of the bit, because
85 Xen and x86 use opposite senses (mask vs enable).
86 */
87ENTRY(xen_save_fl_direct)
88 BUG
89
90 testb $0xff, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
91 setz %ah
92 addb %ah,%ah
93ENDPATCH(xen_save_fl_direct)
94 ret
95 ENDPROC(xen_save_fl_direct)
96 RELOC(xen_save_fl_direct, 0)
97
98/*
99 In principle the caller should be passing us a value return
100 from xen_save_fl_direct, but for robustness sake we test only
101 the X86_EFLAGS_IF flag rather than the whole byte. After
102 setting the interrupt mask state, it checks for unmasked
103 pending events and enters the hypervisor to get them delivered
104 if so.
105 */
106ENTRY(xen_restore_fl_direct)
107 BUG
108
109 testb $X86_EFLAGS_IF>>8, %ah
110 setz PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
111 /* Preempt here doesn't matter because that will deal with
112 any pending interrupts. The pending check may end up being
113 run on the wrong CPU, but that doesn't hurt. */
114
115 /* check for unmasked and pending */
116 cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_pending)
117 jz 1f
1182: call check_events
1191:
120ENDPATCH(xen_restore_fl_direct)
121 ret
122 ENDPROC(xen_restore_fl_direct)
123 RELOC(xen_restore_fl_direct, 2b+1)
124
125
126/*
127 Force an event check by making a hypercall,
128 but preserve regs before making the call.
129 */
130check_events:
131 push %rax
132 push %rcx
133 push %rdx
134 push %rsi
135 push %rdi
136 push %r8
137 push %r9
138 push %r10
139 push %r11
140 call xen_force_evtchn_callback
141 pop %r11
142 pop %r10
143 pop %r9
144 pop %r8
145 pop %rdi
146 pop %rsi
147 pop %rdx
148 pop %rcx
149 pop %rax
150 ret
151 22
152ENTRY(xen_adjust_exception_frame) 23ENTRY(xen_adjust_exception_frame)
153 mov 8+0(%rsp),%rcx 24 mov 8+0(%rsp), %rcx
154 mov 8+8(%rsp),%r11 25 mov 8+8(%rsp), %r11
155 ret $16 26 ret $16
156 27
157hypercall_iret = hypercall_page + __HYPERVISOR_iret * 32 28hypercall_iret = hypercall_page + __HYPERVISOR_iret * 32
158/* 29/*
159 Xen64 iret frame: 30 * Xen64 iret frame:
160 31 *
161 ss 32 * ss
162 rsp 33 * rsp
163 rflags 34 * rflags
164 cs 35 * cs
165 rip <-- standard iret frame 36 * rip <-- standard iret frame
166 37 *
167 flags 38 * flags
168 39 *
169 rcx } 40 * rcx }
170 r11 }<-- pushed by hypercall page 41 * r11 }<-- pushed by hypercall page
171rsp -> rax } 42 * rsp->rax }
172 */ 43 */
173ENTRY(xen_iret) 44ENTRY(xen_iret)
174 pushq $0 45 pushq $0
@@ -177,8 +48,8 @@ ENDPATCH(xen_iret)
177RELOC(xen_iret, 1b+1) 48RELOC(xen_iret, 1b+1)
178 49
179/* 50/*
180 sysexit is not used for 64-bit processes, so it's 51 * sysexit is not used for 64-bit processes, so it's only ever used to
181 only ever used to return to 32-bit compat userspace. 52 * return to 32-bit compat userspace.
182 */ 53 */
183ENTRY(xen_sysexit) 54ENTRY(xen_sysexit)
184 pushq $__USER32_DS 55 pushq $__USER32_DS
@@ -193,13 +64,15 @@ ENDPATCH(xen_sysexit)
193RELOC(xen_sysexit, 1b+1) 64RELOC(xen_sysexit, 1b+1)
194 65
195ENTRY(xen_sysret64) 66ENTRY(xen_sysret64)
196 /* We're already on the usermode stack at this point, but still 67 /*
197 with the kernel gs, so we can easily switch back */ 68 * We're already on the usermode stack at this point, but
198 movq %rsp, %gs:pda_oldrsp 69 * still with the kernel gs, so we can easily switch back
199 movq %gs:pda_kernelstack,%rsp 70 */
71 movq %rsp, PER_CPU_VAR(old_rsp)
72 movq PER_CPU_VAR(kernel_stack), %rsp
200 73
201 pushq $__USER_DS 74 pushq $__USER_DS
202 pushq %gs:pda_oldrsp 75 pushq PER_CPU_VAR(old_rsp)
203 pushq %r11 76 pushq %r11
204 pushq $__USER_CS 77 pushq $__USER_CS
205 pushq %rcx 78 pushq %rcx
@@ -210,13 +83,15 @@ ENDPATCH(xen_sysret64)
210RELOC(xen_sysret64, 1b+1) 83RELOC(xen_sysret64, 1b+1)
211 84
212ENTRY(xen_sysret32) 85ENTRY(xen_sysret32)
213 /* We're already on the usermode stack at this point, but still 86 /*
214 with the kernel gs, so we can easily switch back */ 87 * We're already on the usermode stack at this point, but
215 movq %rsp, %gs:pda_oldrsp 88 * still with the kernel gs, so we can easily switch back
216 movq %gs:pda_kernelstack, %rsp 89 */
90 movq %rsp, PER_CPU_VAR(old_rsp)
91 movq PER_CPU_VAR(kernel_stack), %rsp
217 92
218 pushq $__USER32_DS 93 pushq $__USER32_DS
219 pushq %gs:pda_oldrsp 94 pushq PER_CPU_VAR(old_rsp)
220 pushq %r11 95 pushq %r11
221 pushq $__USER32_CS 96 pushq $__USER32_CS
222 pushq %rcx 97 pushq %rcx
@@ -227,28 +102,27 @@ ENDPATCH(xen_sysret32)
227RELOC(xen_sysret32, 1b+1) 102RELOC(xen_sysret32, 1b+1)
228 103
229/* 104/*
230 Xen handles syscall callbacks much like ordinary exceptions, 105 * Xen handles syscall callbacks much like ordinary exceptions, which
231 which means we have: 106 * means we have:
232 - kernel gs 107 * - kernel gs
233 - kernel rsp 108 * - kernel rsp
234 - an iret-like stack frame on the stack (including rcx and r11): 109 * - an iret-like stack frame on the stack (including rcx and r11):
235 ss 110 * ss
236 rsp 111 * rsp
237 rflags 112 * rflags
238 cs 113 * cs
239 rip 114 * rip
240 r11 115 * r11
241 rsp-> rcx 116 * rsp->rcx
242 117 *
243 In all the entrypoints, we undo all that to make it look 118 * In all the entrypoints, we undo all that to make it look like a
244 like a CPU-generated syscall/sysenter and jump to the normal 119 * CPU-generated syscall/sysenter and jump to the normal entrypoint.
245 entrypoint.
246 */ 120 */
247 121
248.macro undo_xen_syscall 122.macro undo_xen_syscall
249 mov 0*8(%rsp),%rcx 123 mov 0*8(%rsp), %rcx
250 mov 1*8(%rsp),%r11 124 mov 1*8(%rsp), %r11
251 mov 5*8(%rsp),%rsp 125 mov 5*8(%rsp), %rsp
252.endm 126.endm
253 127
254/* Normal 64-bit system call target */ 128/* Normal 64-bit system call target */
@@ -275,7 +149,7 @@ ENDPROC(xen_sysenter_target)
275 149
276ENTRY(xen_syscall32_target) 150ENTRY(xen_syscall32_target)
277ENTRY(xen_sysenter_target) 151ENTRY(xen_sysenter_target)
278 lea 16(%rsp), %rsp /* strip %rcx,%r11 */ 152 lea 16(%rsp), %rsp /* strip %rcx, %r11 */
279 mov $-ENOSYS, %rax 153 mov $-ENOSYS, %rax
280 pushq $VGCF_in_syscall 154 pushq $VGCF_in_syscall
281 jmp hypercall_iret 155 jmp hypercall_iret
diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S
index 63d49a523ed3..1a5ff24e29c0 100644
--- a/arch/x86/xen/xen-head.S
+++ b/arch/x86/xen/xen-head.S
@@ -8,7 +8,7 @@
8 8
9#include <asm/boot.h> 9#include <asm/boot.h>
10#include <asm/asm.h> 10#include <asm/asm.h>
11#include <asm/page.h> 11#include <asm/page_types.h>
12 12
13#include <xen/interface/elfnote.h> 13#include <xen/interface/elfnote.h>
14#include <asm/xen/interface.h> 14#include <asm/xen/interface.h>
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index c1f8faf0a2c5..2f5ef2632ea2 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -10,9 +10,12 @@
10extern const char xen_hypervisor_callback[]; 10extern const char xen_hypervisor_callback[];
11extern const char xen_failsafe_callback[]; 11extern const char xen_failsafe_callback[];
12 12
13extern void *xen_initial_gdt;
14
13struct trap_info; 15struct trap_info;
14void xen_copy_trap_info(struct trap_info *traps); 16void xen_copy_trap_info(struct trap_info *traps);
15 17
18DECLARE_PER_CPU(struct vcpu_info, xen_vcpu_info);
16DECLARE_PER_CPU(unsigned long, xen_cr3); 19DECLARE_PER_CPU(unsigned long, xen_cr3);
17DECLARE_PER_CPU(unsigned long, xen_current_cr3); 20DECLARE_PER_CPU(unsigned long, xen_current_cr3);
18 21
@@ -22,6 +25,13 @@ extern struct shared_info *HYPERVISOR_shared_info;
22 25
23void xen_setup_mfn_list_list(void); 26void xen_setup_mfn_list_list(void);
24void xen_setup_shared_info(void); 27void xen_setup_shared_info(void);
28void xen_setup_machphys_mapping(void);
29pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn);
30void xen_ident_map_ISA(void);
31void xen_reserve_top(void);
32
33void xen_leave_lazy(void);
34void xen_post_allocator_init(void);
25 35
26char * __init xen_memory_setup(void); 36char * __init xen_memory_setup(void);
27void __init xen_arch_setup(void); 37void __init xen_arch_setup(void);
diff --git a/block/blktrace.c b/block/blktrace.c
index 7cf9d1ff45a0..028120a0965a 100644
--- a/block/blktrace.c
+++ b/block/blktrace.c
@@ -363,7 +363,7 @@ int do_blk_trace_setup(struct request_queue *q, char *name, dev_t dev,
363 if (!bt->sequence) 363 if (!bt->sequence)
364 goto err; 364 goto err;
365 365
366 bt->msg_data = __alloc_percpu(BLK_TN_MAX_MSG); 366 bt->msg_data = __alloc_percpu(BLK_TN_MAX_MSG, __alignof__(char));
367 if (!bt->msg_data) 367 if (!bt->msg_data)
368 goto err; 368 goto err;
369 369
diff --git a/block/cmd-filter.c b/block/cmd-filter.c
index 504b275e1b90..572bbc2f900d 100644
--- a/block/cmd-filter.c
+++ b/block/cmd-filter.c
@@ -22,6 +22,7 @@
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <linux/capability.h> 23#include <linux/capability.h>
24#include <linux/bitops.h> 24#include <linux/bitops.h>
25#include <linux/blkdev.h>
25 26
26#include <scsi/scsi.h> 27#include <scsi/scsi.h>
27#include <linux/cdrom.h> 28#include <linux/cdrom.h>
diff --git a/drivers/Makefile b/drivers/Makefile
index c1bf41737936..2618a6169a13 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -36,13 +36,14 @@ obj-$(CONFIG_FB_INTEL) += video/intelfb/
36 36
37obj-y += serial/ 37obj-y += serial/
38obj-$(CONFIG_PARPORT) += parport/ 38obj-$(CONFIG_PARPORT) += parport/
39obj-y += base/ block/ misc/ mfd/ net/ media/ 39obj-y += base/ block/ misc/ mfd/ media/
40obj-$(CONFIG_NUBUS) += nubus/ 40obj-$(CONFIG_NUBUS) += nubus/
41obj-$(CONFIG_ATM) += atm/
42obj-y += macintosh/ 41obj-y += macintosh/
43obj-$(CONFIG_IDE) += ide/ 42obj-$(CONFIG_IDE) += ide/
44obj-$(CONFIG_SCSI) += scsi/ 43obj-$(CONFIG_SCSI) += scsi/
45obj-$(CONFIG_ATA) += ata/ 44obj-$(CONFIG_ATA) += ata/
45obj-y += net/
46obj-$(CONFIG_ATM) += atm/
46obj-$(CONFIG_FUSION) += message/ 47obj-$(CONFIG_FUSION) += message/
47obj-$(CONFIG_FIREWIRE) += firewire/ 48obj-$(CONFIG_FIREWIRE) += firewire/
48obj-y += ieee1394/ 49obj-y += ieee1394/
diff --git a/drivers/acpi/acpica/tbxface.c b/drivers/acpi/acpica/tbxface.c
index c3e841f3cde9..ab0aff3c7d6a 100644
--- a/drivers/acpi/acpica/tbxface.c
+++ b/drivers/acpi/acpica/tbxface.c
@@ -365,7 +365,7 @@ ACPI_EXPORT_SYMBOL(acpi_unload_table_id)
365 365
366/******************************************************************************* 366/*******************************************************************************
367 * 367 *
368 * FUNCTION: acpi_get_table 368 * FUNCTION: acpi_get_table_with_size
369 * 369 *
370 * PARAMETERS: Signature - ACPI signature of needed table 370 * PARAMETERS: Signature - ACPI signature of needed table
371 * Instance - Which instance (for SSDTs) 371 * Instance - Which instance (for SSDTs)
@@ -377,8 +377,9 @@ ACPI_EXPORT_SYMBOL(acpi_unload_table_id)
377 * 377 *
378 *****************************************************************************/ 378 *****************************************************************************/
379acpi_status 379acpi_status
380acpi_get_table(char *signature, 380acpi_get_table_with_size(char *signature,
381 u32 instance, struct acpi_table_header **out_table) 381 u32 instance, struct acpi_table_header **out_table,
382 acpi_size *tbl_size)
382{ 383{
383 u32 i; 384 u32 i;
384 u32 j; 385 u32 j;
@@ -408,6 +409,7 @@ acpi_get_table(char *signature,
408 acpi_tb_verify_table(&acpi_gbl_root_table_list.tables[i]); 409 acpi_tb_verify_table(&acpi_gbl_root_table_list.tables[i]);
409 if (ACPI_SUCCESS(status)) { 410 if (ACPI_SUCCESS(status)) {
410 *out_table = acpi_gbl_root_table_list.tables[i].pointer; 411 *out_table = acpi_gbl_root_table_list.tables[i].pointer;
412 *tbl_size = acpi_gbl_root_table_list.tables[i].length;
411 } 413 }
412 414
413 if (!acpi_gbl_permanent_mmap) { 415 if (!acpi_gbl_permanent_mmap) {
@@ -420,6 +422,15 @@ acpi_get_table(char *signature,
420 return (AE_NOT_FOUND); 422 return (AE_NOT_FOUND);
421} 423}
422 424
425acpi_status
426acpi_get_table(char *signature,
427 u32 instance, struct acpi_table_header **out_table)
428{
429 acpi_size tbl_size;
430
431 return acpi_get_table_with_size(signature,
432 instance, out_table, &tbl_size);
433}
423ACPI_EXPORT_SYMBOL(acpi_get_table) 434ACPI_EXPORT_SYMBOL(acpi_get_table)
424 435
425/******************************************************************************* 436/*******************************************************************************
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index 1e35f342957c..eb8980d67368 100644
--- a/drivers/acpi/osl.c
+++ b/drivers/acpi/osl.c
@@ -272,14 +272,21 @@ acpi_os_map_memory(acpi_physical_address phys, acpi_size size)
272} 272}
273EXPORT_SYMBOL_GPL(acpi_os_map_memory); 273EXPORT_SYMBOL_GPL(acpi_os_map_memory);
274 274
275void acpi_os_unmap_memory(void __iomem * virt, acpi_size size) 275void __ref acpi_os_unmap_memory(void __iomem *virt, acpi_size size)
276{ 276{
277 if (acpi_gbl_permanent_mmap) { 277 if (acpi_gbl_permanent_mmap)
278 iounmap(virt); 278 iounmap(virt);
279 } 279 else
280 __acpi_unmap_table(virt, size);
280} 281}
281EXPORT_SYMBOL_GPL(acpi_os_unmap_memory); 282EXPORT_SYMBOL_GPL(acpi_os_unmap_memory);
282 283
284void __init early_acpi_os_unmap_memory(void __iomem *virt, acpi_size size)
285{
286 if (!acpi_gbl_permanent_mmap)
287 __acpi_unmap_table(virt, size);
288}
289
283#ifdef ACPI_FUTURE_USAGE 290#ifdef ACPI_FUTURE_USAGE
284acpi_status 291acpi_status
285acpi_os_get_physical_address(void *virt, acpi_physical_address * phys) 292acpi_os_get_physical_address(void *virt, acpi_physical_address * phys)
diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index 9cc769b587ff..68fd3d292799 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c
@@ -516,12 +516,12 @@ int acpi_processor_preregister_performance(
516 continue; 516 continue;
517 } 517 }
518 518
519 if (!performance || !percpu_ptr(performance, i)) { 519 if (!performance || !per_cpu_ptr(performance, i)) {
520 retval = -EINVAL; 520 retval = -EINVAL;
521 continue; 521 continue;
522 } 522 }
523 523
524 pr->performance = percpu_ptr(performance, i); 524 pr->performance = per_cpu_ptr(performance, i);
525 cpumask_set_cpu(i, pr->performance->shared_cpu_map); 525 cpumask_set_cpu(i, pr->performance->shared_cpu_map);
526 if (acpi_processor_get_psd(pr)) { 526 if (acpi_processor_get_psd(pr)) {
527 retval = -EINVAL; 527 retval = -EINVAL;
diff --git a/drivers/acpi/tables.c b/drivers/acpi/tables.c
index a8852952fac4..fec1ae36d431 100644
--- a/drivers/acpi/tables.c
+++ b/drivers/acpi/tables.c
@@ -181,14 +181,15 @@ acpi_table_parse_entries(char *id,
181 struct acpi_subtable_header *entry; 181 struct acpi_subtable_header *entry;
182 unsigned int count = 0; 182 unsigned int count = 0;
183 unsigned long table_end; 183 unsigned long table_end;
184 acpi_size tbl_size;
184 185
185 if (!handler) 186 if (!handler)
186 return -EINVAL; 187 return -EINVAL;
187 188
188 if (strncmp(id, ACPI_SIG_MADT, 4) == 0) 189 if (strncmp(id, ACPI_SIG_MADT, 4) == 0)
189 acpi_get_table(id, acpi_apic_instance, &table_header); 190 acpi_get_table_with_size(id, acpi_apic_instance, &table_header, &tbl_size);
190 else 191 else
191 acpi_get_table(id, 0, &table_header); 192 acpi_get_table_with_size(id, 0, &table_header, &tbl_size);
192 193
193 if (!table_header) { 194 if (!table_header) {
194 printk(KERN_WARNING PREFIX "%4.4s not present\n", id); 195 printk(KERN_WARNING PREFIX "%4.4s not present\n", id);
@@ -206,8 +207,10 @@ acpi_table_parse_entries(char *id,
206 table_end) { 207 table_end) {
207 if (entry->type == entry_id 208 if (entry->type == entry_id
208 && (!max_entries || count++ < max_entries)) 209 && (!max_entries || count++ < max_entries))
209 if (handler(entry, table_end)) 210 if (handler(entry, table_end)) {
211 early_acpi_os_unmap_memory((char *)table_header, tbl_size);
210 return -EINVAL; 212 return -EINVAL;
213 }
211 214
212 entry = (struct acpi_subtable_header *) 215 entry = (struct acpi_subtable_header *)
213 ((unsigned long)entry + entry->length); 216 ((unsigned long)entry + entry->length);
@@ -217,6 +220,7 @@ acpi_table_parse_entries(char *id,
217 "%i found\n", id, entry_id, count - max_entries, count); 220 "%i found\n", id, entry_id, count - max_entries, count);
218 } 221 }
219 222
223 early_acpi_os_unmap_memory((char *)table_header, tbl_size);
220 return count; 224 return count;
221} 225}
222 226
@@ -241,17 +245,19 @@ acpi_table_parse_madt(enum acpi_madt_type id,
241int __init acpi_table_parse(char *id, acpi_table_handler handler) 245int __init acpi_table_parse(char *id, acpi_table_handler handler)
242{ 246{
243 struct acpi_table_header *table = NULL; 247 struct acpi_table_header *table = NULL;
248 acpi_size tbl_size;
244 249
245 if (!handler) 250 if (!handler)
246 return -EINVAL; 251 return -EINVAL;
247 252
248 if (strncmp(id, ACPI_SIG_MADT, 4) == 0) 253 if (strncmp(id, ACPI_SIG_MADT, 4) == 0)
249 acpi_get_table(id, acpi_apic_instance, &table); 254 acpi_get_table_with_size(id, acpi_apic_instance, &table, &tbl_size);
250 else 255 else
251 acpi_get_table(id, 0, &table); 256 acpi_get_table_with_size(id, 0, &table, &tbl_size);
252 257
253 if (table) { 258 if (table) {
254 handler(table); 259 handler(table);
260 early_acpi_os_unmap_memory(table, tbl_size);
255 return 0; 261 return 0;
256 } else 262 } else
257 return 1; 263 return 1;
@@ -265,8 +271,9 @@ int __init acpi_table_parse(char *id, acpi_table_handler handler)
265static void __init check_multiple_madt(void) 271static void __init check_multiple_madt(void)
266{ 272{
267 struct acpi_table_header *table = NULL; 273 struct acpi_table_header *table = NULL;
274 acpi_size tbl_size;
268 275
269 acpi_get_table(ACPI_SIG_MADT, 2, &table); 276 acpi_get_table_with_size(ACPI_SIG_MADT, 2, &table, &tbl_size);
270 if (table) { 277 if (table) {
271 printk(KERN_WARNING PREFIX 278 printk(KERN_WARNING PREFIX
272 "BIOS bug: multiple APIC/MADT found," 279 "BIOS bug: multiple APIC/MADT found,"
@@ -275,6 +282,7 @@ static void __init check_multiple_madt(void)
275 "If \"acpi_apic_instance=%d\" works better, " 282 "If \"acpi_apic_instance=%d\" works better, "
276 "notify linux-acpi@vger.kernel.org\n", 283 "notify linux-acpi@vger.kernel.org\n",
277 acpi_apic_instance ? 0 : 2); 284 acpi_apic_instance ? 0 : 2);
285 early_acpi_os_unmap_memory(table, tbl_size);
278 286
279 } else 287 } else
280 acpi_apic_instance = 0; 288 acpi_apic_instance = 0;
diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c
index 719ee5c1c8d9..5b257a57bc57 100644
--- a/drivers/base/cpu.c
+++ b/drivers/base/cpu.c
@@ -107,7 +107,7 @@ static SYSDEV_ATTR(crash_notes, 0400, show_crash_notes, NULL);
107/* 107/*
108 * Print cpu online, possible, present, and system maps 108 * Print cpu online, possible, present, and system maps
109 */ 109 */
110static ssize_t print_cpus_map(char *buf, cpumask_t *map) 110static ssize_t print_cpus_map(char *buf, const struct cpumask *map)
111{ 111{
112 int n = cpulist_scnprintf(buf, PAGE_SIZE-2, map); 112 int n = cpulist_scnprintf(buf, PAGE_SIZE-2, map);
113 113
diff --git a/drivers/base/topology.c b/drivers/base/topology.c
index a778fb52b11f..bf6b13206d00 100644
--- a/drivers/base/topology.c
+++ b/drivers/base/topology.c
@@ -31,7 +31,10 @@
31#include <linux/hardirq.h> 31#include <linux/hardirq.h>
32#include <linux/topology.h> 32#include <linux/topology.h>
33 33
34#define define_one_ro(_name) \ 34#define define_one_ro_named(_name, _func) \
35static SYSDEV_ATTR(_name, 0444, _func, NULL)
36
37#define define_one_ro(_name) \
35static SYSDEV_ATTR(_name, 0444, show_##_name, NULL) 38static SYSDEV_ATTR(_name, 0444, show_##_name, NULL)
36 39
37#define define_id_show_func(name) \ 40#define define_id_show_func(name) \
@@ -42,8 +45,8 @@ static ssize_t show_##name(struct sys_device *dev, \
42 return sprintf(buf, "%d\n", topology_##name(cpu)); \ 45 return sprintf(buf, "%d\n", topology_##name(cpu)); \
43} 46}
44 47
45#if defined(topology_thread_siblings) || defined(topology_core_siblings) 48#if defined(topology_thread_cpumask) || defined(topology_core_cpumask)
46static ssize_t show_cpumap(int type, cpumask_t *mask, char *buf) 49static ssize_t show_cpumap(int type, const struct cpumask *mask, char *buf)
47{ 50{
48 ptrdiff_t len = PTR_ALIGN(buf + PAGE_SIZE - 1, PAGE_SIZE) - buf; 51 ptrdiff_t len = PTR_ALIGN(buf + PAGE_SIZE - 1, PAGE_SIZE) - buf;
49 int n = 0; 52 int n = 0;
@@ -65,7 +68,7 @@ static ssize_t show_##name(struct sys_device *dev, \
65 struct sysdev_attribute *attr, char *buf) \ 68 struct sysdev_attribute *attr, char *buf) \
66{ \ 69{ \
67 unsigned int cpu = dev->id; \ 70 unsigned int cpu = dev->id; \
68 return show_cpumap(0, &(topology_##name(cpu)), buf); \ 71 return show_cpumap(0, topology_##name(cpu), buf); \
69} 72}
70 73
71#define define_siblings_show_list(name) \ 74#define define_siblings_show_list(name) \
@@ -74,7 +77,7 @@ static ssize_t show_##name##_list(struct sys_device *dev, \
74 char *buf) \ 77 char *buf) \
75{ \ 78{ \
76 unsigned int cpu = dev->id; \ 79 unsigned int cpu = dev->id; \
77 return show_cpumap(1, &(topology_##name(cpu)), buf); \ 80 return show_cpumap(1, topology_##name(cpu), buf); \
78} 81}
79 82
80#else 83#else
@@ -82,9 +85,7 @@ static ssize_t show_##name##_list(struct sys_device *dev, \
82static ssize_t show_##name(struct sys_device *dev, \ 85static ssize_t show_##name(struct sys_device *dev, \
83 struct sysdev_attribute *attr, char *buf) \ 86 struct sysdev_attribute *attr, char *buf) \
84{ \ 87{ \
85 unsigned int cpu = dev->id; \ 88 return show_cpumap(0, topology_##name(dev->id), buf); \
86 cpumask_t mask = topology_##name(cpu); \
87 return show_cpumap(0, &mask, buf); \
88} 89}
89 90
90#define define_siblings_show_list(name) \ 91#define define_siblings_show_list(name) \
@@ -92,9 +93,7 @@ static ssize_t show_##name##_list(struct sys_device *dev, \
92 struct sysdev_attribute *attr, \ 93 struct sysdev_attribute *attr, \
93 char *buf) \ 94 char *buf) \
94{ \ 95{ \
95 unsigned int cpu = dev->id; \ 96 return show_cpumap(1, topology_##name(dev->id), buf); \
96 cpumask_t mask = topology_##name(cpu); \
97 return show_cpumap(1, &mask, buf); \
98} 97}
99#endif 98#endif
100 99
@@ -107,13 +106,13 @@ define_one_ro(physical_package_id);
107define_id_show_func(core_id); 106define_id_show_func(core_id);
108define_one_ro(core_id); 107define_one_ro(core_id);
109 108
110define_siblings_show_func(thread_siblings); 109define_siblings_show_func(thread_cpumask);
111define_one_ro(thread_siblings); 110define_one_ro_named(thread_siblings, show_thread_cpumask);
112define_one_ro(thread_siblings_list); 111define_one_ro_named(thread_siblings_list, show_thread_cpumask_list);
113 112
114define_siblings_show_func(core_siblings); 113define_siblings_show_func(core_cpumask);
115define_one_ro(core_siblings); 114define_one_ro_named(core_siblings, show_core_cpumask);
116define_one_ro(core_siblings_list); 115define_one_ro_named(core_siblings_list, show_core_cpumask_list);
117 116
118static struct attribute *default_attrs[] = { 117static struct attribute *default_attrs[] = {
119 &attr_physical_package_id.attr, 118 &attr_physical_package_id.attr,
diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c
index e1129fad96dd..ee19b6e8fcb4 100644
--- a/drivers/clocksource/acpi_pm.c
+++ b/drivers/clocksource/acpi_pm.c
@@ -143,7 +143,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE,
143#endif 143#endif
144 144
145#ifndef CONFIG_X86_64 145#ifndef CONFIG_X86_64
146#include "mach_timer.h" 146#include <asm/mach_timer.h>
147#define PMTMR_EXPECTED_RATE \ 147#define PMTMR_EXPECTED_RATE \
148 ((CALIBRATE_LATCH * (PMTMR_TICKS_PER_SEC >> 10)) / (CLOCK_TICK_RATE>>10)) 148 ((CALIBRATE_LATCH * (PMTMR_TICKS_PER_SEC >> 10)) / (CLOCK_TICK_RATE>>10))
149/* 149/*
diff --git a/drivers/clocksource/cyclone.c b/drivers/clocksource/cyclone.c
index 1bde303b970b..8615059a8729 100644
--- a/drivers/clocksource/cyclone.c
+++ b/drivers/clocksource/cyclone.c
@@ -7,7 +7,7 @@
7#include <asm/pgtable.h> 7#include <asm/pgtable.h>
8#include <asm/io.h> 8#include <asm/io.h>
9 9
10#include "mach_timer.h" 10#include <asm/mach_timer.h>
11 11
12#define CYCLONE_CBAR_ADDR 0xFEB00CD0 /* base address ptr */ 12#define CYCLONE_CBAR_ADDR 0xFEB00CD0 /* base address ptr */
13#define CYCLONE_PMCC_OFFSET 0x51A0 /* offset to control register */ 13#define CYCLONE_PMCC_OFFSET 0x51A0 /* offset to control register */
diff --git a/drivers/eisa/Kconfig b/drivers/eisa/Kconfig
index c0646576cf47..2705284f6223 100644
--- a/drivers/eisa/Kconfig
+++ b/drivers/eisa/Kconfig
@@ -3,7 +3,7 @@
3# 3#
4config EISA_VLB_PRIMING 4config EISA_VLB_PRIMING
5 bool "Vesa Local Bus priming" 5 bool "Vesa Local Bus priming"
6 depends on X86_PC && EISA 6 depends on X86 && EISA
7 default n 7 default n
8 ---help--- 8 ---help---
9 Activate this option if your system contains a Vesa Local 9 Activate this option if your system contains a Vesa Local
@@ -24,11 +24,11 @@ config EISA_PCI_EISA
24 When in doubt, say Y. 24 When in doubt, say Y.
25 25
26# Using EISA_VIRTUAL_ROOT on something other than an Alpha or 26# Using EISA_VIRTUAL_ROOT on something other than an Alpha or
27# an X86_PC may lead to crashes... 27# an X86 may lead to crashes...
28 28
29config EISA_VIRTUAL_ROOT 29config EISA_VIRTUAL_ROOT
30 bool "EISA virtual root device" 30 bool "EISA virtual root device"
31 depends on EISA && (ALPHA || X86_PC) 31 depends on EISA && (ALPHA || X86)
32 default y 32 default y
33 ---help--- 33 ---help---
34 Activate this option if your system only have EISA bus 34 Activate this option if your system only have EISA bus
diff --git a/drivers/firmware/dcdbas.c b/drivers/firmware/dcdbas.c
index 777fba48d2d3..3009e0171e54 100644
--- a/drivers/firmware/dcdbas.c
+++ b/drivers/firmware/dcdbas.c
@@ -244,7 +244,7 @@ static ssize_t host_control_on_shutdown_store(struct device *dev,
244 */ 244 */
245int dcdbas_smi_request(struct smi_cmd *smi_cmd) 245int dcdbas_smi_request(struct smi_cmd *smi_cmd)
246{ 246{
247 cpumask_t old_mask; 247 cpumask_var_t old_mask;
248 int ret = 0; 248 int ret = 0;
249 249
250 if (smi_cmd->magic != SMI_CMD_MAGIC) { 250 if (smi_cmd->magic != SMI_CMD_MAGIC) {
@@ -254,8 +254,11 @@ int dcdbas_smi_request(struct smi_cmd *smi_cmd)
254 } 254 }
255 255
256 /* SMI requires CPU 0 */ 256 /* SMI requires CPU 0 */
257 old_mask = current->cpus_allowed; 257 if (!alloc_cpumask_var(&old_mask, GFP_KERNEL))
258 set_cpus_allowed_ptr(current, &cpumask_of_cpu(0)); 258 return -ENOMEM;
259
260 cpumask_copy(old_mask, &current->cpus_allowed);
261 set_cpus_allowed_ptr(current, cpumask_of(0));
259 if (smp_processor_id() != 0) { 262 if (smp_processor_id() != 0) {
260 dev_dbg(&dcdbas_pdev->dev, "%s: failed to get CPU 0\n", 263 dev_dbg(&dcdbas_pdev->dev, "%s: failed to get CPU 0\n",
261 __func__); 264 __func__);
@@ -275,7 +278,8 @@ int dcdbas_smi_request(struct smi_cmd *smi_cmd)
275 ); 278 );
276 279
277out: 280out:
278 set_cpus_allowed_ptr(current, &old_mask); 281 set_cpus_allowed_ptr(current, old_mask);
282 free_cpumask_var(old_mask);
279 return ret; 283 return ret;
280} 284}
281 285
diff --git a/drivers/firmware/iscsi_ibft.c b/drivers/firmware/iscsi_ibft.c
index 3ab3e4a41d67..7b7ddc2d51c9 100644
--- a/drivers/firmware/iscsi_ibft.c
+++ b/drivers/firmware/iscsi_ibft.c
@@ -938,8 +938,8 @@ static int __init ibft_init(void)
938 return -ENOMEM; 938 return -ENOMEM;
939 939
940 if (ibft_addr) { 940 if (ibft_addr) {
941 printk(KERN_INFO "iBFT detected at 0x%lx.\n", 941 printk(KERN_INFO "iBFT detected at 0x%llx.\n",
942 virt_to_phys((void *)ibft_addr)); 942 (u64)virt_to_phys((void *)ibft_addr));
943 943
944 rc = ibft_check_device(); 944 rc = ibft_check_device();
945 if (rc) 945 if (rc)
diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
index fc98952b9033..1b699768ccfb 100644
--- a/drivers/gpu/drm/drm_info.c
+++ b/drivers/gpu/drm/drm_info.c
@@ -286,9 +286,9 @@ int drm_vma_info(struct seq_file *m, void *data)
286#endif 286#endif
287 287
288 mutex_lock(&dev->struct_mutex); 288 mutex_lock(&dev->struct_mutex);
289 seq_printf(m, "vma use count: %d, high_memory = %p, 0x%08lx\n", 289 seq_printf(m, "vma use count: %d, high_memory = %p, 0x%08llx\n",
290 atomic_read(&dev->vma_count), 290 atomic_read(&dev->vma_count),
291 high_memory, virt_to_phys(high_memory)); 291 high_memory, (u64)virt_to_phys(high_memory));
292 292
293 list_for_each_entry(pt, &dev->vmalist, head) { 293 list_for_each_entry(pt, &dev->vmalist, head) {
294 vma = pt->vma; 294 vma = pt->vma;
diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.c b/drivers/infiniband/ulp/iser/iscsi_iser.c
index 12876392516e..13d7674b293d 100644
--- a/drivers/infiniband/ulp/iser/iscsi_iser.c
+++ b/drivers/infiniband/ulp/iser/iscsi_iser.c
@@ -168,7 +168,7 @@ iscsi_iser_mtask_xmit(struct iscsi_conn *conn, struct iscsi_task *task)
168{ 168{
169 int error = 0; 169 int error = 0;
170 170
171 debug_scsi("task deq [cid %d itt 0x%x]\n", conn->id, task->itt); 171 iser_dbg("task deq [cid %d itt 0x%x]\n", conn->id, task->itt);
172 172
173 error = iser_send_control(conn, task); 173 error = iser_send_control(conn, task);
174 174
@@ -195,7 +195,7 @@ iscsi_iser_task_xmit_unsol_data(struct iscsi_conn *conn,
195 /* Send data-out PDUs while there's still unsolicited data to send */ 195 /* Send data-out PDUs while there's still unsolicited data to send */
196 while (iscsi_task_has_unsol_data(task)) { 196 while (iscsi_task_has_unsol_data(task)) {
197 iscsi_prep_data_out_pdu(task, r2t, &hdr); 197 iscsi_prep_data_out_pdu(task, r2t, &hdr);
198 debug_scsi("Sending data-out: itt 0x%x, data count %d\n", 198 iser_dbg("Sending data-out: itt 0x%x, data count %d\n",
199 hdr.itt, r2t->data_count); 199 hdr.itt, r2t->data_count);
200 200
201 /* the buffer description has been passed with the command */ 201 /* the buffer description has been passed with the command */
@@ -206,7 +206,7 @@ iscsi_iser_task_xmit_unsol_data(struct iscsi_conn *conn,
206 goto iscsi_iser_task_xmit_unsol_data_exit; 206 goto iscsi_iser_task_xmit_unsol_data_exit;
207 } 207 }
208 r2t->sent += r2t->data_count; 208 r2t->sent += r2t->data_count;
209 debug_scsi("Need to send %d more as data-out PDUs\n", 209 iser_dbg("Need to send %d more as data-out PDUs\n",
210 r2t->data_length - r2t->sent); 210 r2t->data_length - r2t->sent);
211 } 211 }
212 212
@@ -227,12 +227,12 @@ iscsi_iser_task_xmit(struct iscsi_task *task)
227 if (task->sc->sc_data_direction == DMA_TO_DEVICE) { 227 if (task->sc->sc_data_direction == DMA_TO_DEVICE) {
228 BUG_ON(scsi_bufflen(task->sc) == 0); 228 BUG_ON(scsi_bufflen(task->sc) == 0);
229 229
230 debug_scsi("cmd [itt %x total %d imm %d unsol_data %d\n", 230 iser_dbg("cmd [itt %x total %d imm %d unsol_data %d\n",
231 task->itt, scsi_bufflen(task->sc), 231 task->itt, scsi_bufflen(task->sc),
232 task->imm_count, task->unsol_r2t.data_length); 232 task->imm_count, task->unsol_r2t.data_length);
233 } 233 }
234 234
235 debug_scsi("task deq [cid %d itt 0x%x]\n", 235 iser_dbg("task deq [cid %d itt 0x%x]\n",
236 conn->id, task->itt); 236 conn->id, task->itt);
237 237
238 /* Send the cmd PDU */ 238 /* Send the cmd PDU */
@@ -397,14 +397,14 @@ static void iscsi_iser_session_destroy(struct iscsi_cls_session *cls_session)
397static struct iscsi_cls_session * 397static struct iscsi_cls_session *
398iscsi_iser_session_create(struct iscsi_endpoint *ep, 398iscsi_iser_session_create(struct iscsi_endpoint *ep,
399 uint16_t cmds_max, uint16_t qdepth, 399 uint16_t cmds_max, uint16_t qdepth,
400 uint32_t initial_cmdsn, uint32_t *hostno) 400 uint32_t initial_cmdsn)
401{ 401{
402 struct iscsi_cls_session *cls_session; 402 struct iscsi_cls_session *cls_session;
403 struct iscsi_session *session; 403 struct iscsi_session *session;
404 struct Scsi_Host *shost; 404 struct Scsi_Host *shost;
405 struct iser_conn *ib_conn; 405 struct iser_conn *ib_conn;
406 406
407 shost = iscsi_host_alloc(&iscsi_iser_sht, 0, ISCSI_MAX_CMD_PER_LUN); 407 shost = iscsi_host_alloc(&iscsi_iser_sht, 0, 1);
408 if (!shost) 408 if (!shost)
409 return NULL; 409 return NULL;
410 shost->transportt = iscsi_iser_scsi_transport; 410 shost->transportt = iscsi_iser_scsi_transport;
@@ -423,7 +423,6 @@ iscsi_iser_session_create(struct iscsi_endpoint *ep,
423 if (iscsi_host_add(shost, 423 if (iscsi_host_add(shost,
424 ep ? ib_conn->device->ib_device->dma_device : NULL)) 424 ep ? ib_conn->device->ib_device->dma_device : NULL))
425 goto free_host; 425 goto free_host;
426 *hostno = shost->host_no;
427 426
428 /* 427 /*
429 * we do not support setting can_queue cmd_per_lun from userspace yet 428 * we do not support setting can_queue cmd_per_lun from userspace yet
@@ -596,7 +595,7 @@ static struct scsi_host_template iscsi_iser_sht = {
596 .change_queue_depth = iscsi_change_queue_depth, 595 .change_queue_depth = iscsi_change_queue_depth,
597 .sg_tablesize = ISCSI_ISER_SG_TABLESIZE, 596 .sg_tablesize = ISCSI_ISER_SG_TABLESIZE,
598 .max_sectors = 1024, 597 .max_sectors = 1024,
599 .cmd_per_lun = ISCSI_MAX_CMD_PER_LUN, 598 .cmd_per_lun = ISER_DEF_CMD_PER_LUN,
600 .eh_abort_handler = iscsi_eh_abort, 599 .eh_abort_handler = iscsi_eh_abort,
601 .eh_device_reset_handler= iscsi_eh_device_reset, 600 .eh_device_reset_handler= iscsi_eh_device_reset,
602 .eh_target_reset_handler= iscsi_eh_target_reset, 601 .eh_target_reset_handler= iscsi_eh_target_reset,
diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.h b/drivers/infiniband/ulp/iser/iscsi_iser.h
index 861119593f2b..9d529cae1f0d 100644
--- a/drivers/infiniband/ulp/iser/iscsi_iser.h
+++ b/drivers/infiniband/ulp/iser/iscsi_iser.h
@@ -93,7 +93,7 @@
93 93
94 /* support upto 512KB in one RDMA */ 94 /* support upto 512KB in one RDMA */
95#define ISCSI_ISER_SG_TABLESIZE (0x80000 >> SHIFT_4K) 95#define ISCSI_ISER_SG_TABLESIZE (0x80000 >> SHIFT_4K)
96#define ISCSI_ISER_MAX_LUN 256 96#define ISER_DEF_CMD_PER_LUN 128
97 97
98/* QP settings */ 98/* QP settings */
99/* Maximal bounds on received asynchronous PDUs */ 99/* Maximal bounds on received asynchronous PDUs */
diff --git a/drivers/infiniband/ulp/iser/iser_initiator.c b/drivers/infiniband/ulp/iser/iser_initiator.c
index e209cb8dd948..9de640200ad3 100644
--- a/drivers/infiniband/ulp/iser/iser_initiator.c
+++ b/drivers/infiniband/ulp/iser/iser_initiator.c
@@ -661,7 +661,7 @@ void iser_snd_completion(struct iser_desc *tx_desc)
661 661
662 if (resume_tx) { 662 if (resume_tx) {
663 iser_dbg("%ld resuming tx\n",jiffies); 663 iser_dbg("%ld resuming tx\n",jiffies);
664 scsi_queue_work(conn->session->host, &conn->xmitwork); 664 iscsi_conn_queue_work(conn);
665 } 665 }
666 666
667 if (tx_desc->type == ISCSI_TX_CONTROL) { 667 if (tx_desc->type == ISCSI_TX_CONTROL) {
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 35561689ff38..ea2638b41982 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -13,11 +13,11 @@ menuconfig INPUT_KEYBOARD
13if INPUT_KEYBOARD 13if INPUT_KEYBOARD
14 14
15config KEYBOARD_ATKBD 15config KEYBOARD_ATKBD
16 tristate "AT keyboard" if EMBEDDED || !X86_PC 16 tristate "AT keyboard" if EMBEDDED || !X86
17 default y 17 default y
18 select SERIO 18 select SERIO
19 select SERIO_LIBPS2 19 select SERIO_LIBPS2
20 select SERIO_I8042 if X86_PC 20 select SERIO_I8042 if X86
21 select SERIO_GSCPS2 if GSC 21 select SERIO_GSCPS2 if GSC
22 help 22 help
23 Say Y here if you want to use a standard AT or PS/2 keyboard. Usually 23 Say Y here if you want to use a standard AT or PS/2 keyboard. Usually
diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig
index 9705f3a00a3d..4f38e6f7dfdd 100644
--- a/drivers/input/mouse/Kconfig
+++ b/drivers/input/mouse/Kconfig
@@ -17,7 +17,7 @@ config MOUSE_PS2
17 default y 17 default y
18 select SERIO 18 select SERIO
19 select SERIO_LIBPS2 19 select SERIO_LIBPS2
20 select SERIO_I8042 if X86_PC 20 select SERIO_I8042 if X86
21 select SERIO_GSCPS2 if GSC 21 select SERIO_GSCPS2 if GSC
22 help 22 help
23 Say Y here if you have a PS/2 mouse connected to your system. This 23 Say Y here if you have a PS/2 mouse connected to your system. This
diff --git a/drivers/lguest/Kconfig b/drivers/lguest/Kconfig
index 76f2b36881c3..a3d3cbab359a 100644
--- a/drivers/lguest/Kconfig
+++ b/drivers/lguest/Kconfig
@@ -1,6 +1,6 @@
1config LGUEST 1config LGUEST
2 tristate "Linux hypervisor example code" 2 tristate "Linux hypervisor example code"
3 depends on X86_32 && EXPERIMENTAL && !X86_PAE && FUTEX && !X86_VOYAGER 3 depends on X86_32 && EXPERIMENTAL && !X86_PAE && FUTEX
4 select HVC_DRIVER 4 select HVC_DRIVER
5 ---help--- 5 ---help---
6 This is a very simple module which allows you to run 6 This is a very simple module which allows you to run
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index c64e6798878a..1c484084ed4f 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -162,7 +162,7 @@ config ENCLOSURE_SERVICES
162config SGI_XP 162config SGI_XP
163 tristate "Support communication between SGI SSIs" 163 tristate "Support communication between SGI SSIs"
164 depends on NET 164 depends on NET
165 depends on (IA64_GENERIC || IA64_SGI_SN2 || IA64_SGI_UV || X86_64) && SMP 165 depends on (IA64_GENERIC || IA64_SGI_SN2 || IA64_SGI_UV || X86_UV) && SMP
166 select IA64_UNCACHED_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2 166 select IA64_UNCACHED_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2
167 select GENERIC_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2 167 select GENERIC_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2
168 select SGI_GRU if (IA64_GENERIC || IA64_SGI_UV || X86_64) && SMP 168 select SGI_GRU if (IA64_GENERIC || IA64_SGI_UV || X86_64) && SMP
@@ -189,7 +189,7 @@ config HP_ILO
189 189
190config SGI_GRU 190config SGI_GRU
191 tristate "SGI GRU driver" 191 tristate "SGI GRU driver"
192 depends on (X86_64 || IA64_SGI_UV || IA64_GENERIC) && SMP 192 depends on (X86_UV || IA64_SGI_UV || IA64_GENERIC) && SMP
193 default n 193 default n
194 select MMU_NOTIFIER 194 select MMU_NOTIFIER
195 ---help--- 195 ---help---
diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c
index 650983806392..c67e4e8bd62c 100644
--- a/drivers/misc/sgi-gru/grufile.c
+++ b/drivers/misc/sgi-gru/grufile.c
@@ -36,23 +36,11 @@
36#include <linux/interrupt.h> 36#include <linux/interrupt.h>
37#include <linux/proc_fs.h> 37#include <linux/proc_fs.h>
38#include <linux/uaccess.h> 38#include <linux/uaccess.h>
39#include <asm/uv/uv.h>
39#include "gru.h" 40#include "gru.h"
40#include "grulib.h" 41#include "grulib.h"
41#include "grutables.h" 42#include "grutables.h"
42 43
43#if defined CONFIG_X86_64
44#include <asm/genapic.h>
45#include <asm/irq.h>
46#define IS_UV() is_uv_system()
47#elif defined CONFIG_IA64
48#include <asm/system.h>
49#include <asm/sn/simulator.h>
50/* temp support for running on hardware simulator */
51#define IS_UV() IS_MEDUSA() || ia64_platform_is("uv")
52#else
53#define IS_UV() 0
54#endif
55
56#include <asm/uv/uv_hub.h> 44#include <asm/uv/uv_hub.h>
57#include <asm/uv/uv_mmrs.h> 45#include <asm/uv/uv_mmrs.h>
58 46
@@ -381,7 +369,7 @@ static int __init gru_init(void)
381 char id[10]; 369 char id[10];
382 void *gru_start_vaddr; 370 void *gru_start_vaddr;
383 371
384 if (!IS_UV()) 372 if (!is_uv_system())
385 return 0; 373 return 0;
386 374
387#if defined CONFIG_IA64 375#if defined CONFIG_IA64
@@ -451,7 +439,7 @@ static void __exit gru_exit(void)
451 int order = get_order(sizeof(struct gru_state) * 439 int order = get_order(sizeof(struct gru_state) *
452 GRU_CHIPLETS_PER_BLADE); 440 GRU_CHIPLETS_PER_BLADE);
453 441
454 if (!IS_UV()) 442 if (!is_uv_system())
455 return; 443 return;
456 444
457 for (i = 0; i < GRU_CHIPLETS_PER_BLADE; i++) 445 for (i = 0; i < GRU_CHIPLETS_PER_BLADE; i++)
diff --git a/drivers/misc/sgi-xp/xp.h b/drivers/misc/sgi-xp/xp.h
index 7b4cbd5e03e9..2275126cb334 100644
--- a/drivers/misc/sgi-xp/xp.h
+++ b/drivers/misc/sgi-xp/xp.h
@@ -15,19 +15,19 @@
15 15
16#include <linux/mutex.h> 16#include <linux/mutex.h>
17 17
18#ifdef CONFIG_IA64 18#if defined CONFIG_X86_UV || defined CONFIG_IA64_SGI_UV
19#include <asm/uv/uv.h>
20#define is_uv() is_uv_system()
21#endif
22
23#ifndef is_uv
24#define is_uv() 0
25#endif
26
27#if defined CONFIG_IA64
19#include <asm/system.h> 28#include <asm/system.h>
20#include <asm/sn/arch.h> /* defines is_shub1() and is_shub2() */ 29#include <asm/sn/arch.h> /* defines is_shub1() and is_shub2() */
21#define is_shub() ia64_platform_is("sn2") 30#define is_shub() ia64_platform_is("sn2")
22#ifdef CONFIG_IA64_SGI_UV
23#define is_uv() ia64_platform_is("uv")
24#else
25#define is_uv() 0
26#endif
27#endif
28#ifdef CONFIG_X86_64
29#include <asm/genapic.h>
30#define is_uv() is_uv_system()
31#endif 31#endif
32 32
33#ifndef is_shub1 33#ifndef is_shub1
@@ -42,10 +42,6 @@
42#define is_shub() 0 42#define is_shub() 0
43#endif 43#endif
44 44
45#ifndef is_uv
46#define is_uv() 0
47#endif
48
49#ifdef USE_DBUG_ON 45#ifdef USE_DBUG_ON
50#define DBUG_ON(condition) BUG_ON(condition) 46#define DBUG_ON(condition) BUG_ON(condition)
51#else 47#else
diff --git a/drivers/misc/sgi-xp/xpc_main.c b/drivers/misc/sgi-xp/xpc_main.c
index 89218f7cfaa7..6576170de962 100644
--- a/drivers/misc/sgi-xp/xpc_main.c
+++ b/drivers/misc/sgi-xp/xpc_main.c
@@ -318,7 +318,7 @@ xpc_hb_checker(void *ignore)
318 318
319 /* this thread was marked active by xpc_hb_init() */ 319 /* this thread was marked active by xpc_hb_init() */
320 320
321 set_cpus_allowed_ptr(current, &cpumask_of_cpu(XPC_HB_CHECK_CPU)); 321 set_cpus_allowed_ptr(current, cpumask_of(XPC_HB_CHECK_CPU));
322 322
323 /* set our heartbeating to other partitions into motion */ 323 /* set our heartbeating to other partitions into motion */
324 xpc_hb_check_timeout = jiffies + (xpc_hb_check_interval * HZ); 324 xpc_hb_check_timeout = jiffies + (xpc_hb_check_interval * HZ);
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 8b12e6e109d3..2ff88791cebc 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -273,7 +273,7 @@ config MTD_NAND_CAFE
273 273
274config MTD_NAND_CS553X 274config MTD_NAND_CS553X
275 tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)" 275 tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)"
276 depends on X86_32 && (X86_PC || X86_GENERICARCH) 276 depends on X86_32
277 help 277 help
278 The CS553x companion chips for the AMD Geode processor 278 The CS553x companion chips for the AMD Geode processor
279 include NAND flash controllers with built-in hardware ECC 279 include NAND flash controllers with built-in hardware ECC
diff --git a/drivers/net/ne3210.c b/drivers/net/ne3210.c
index fac43fd6fc87..6a843f7350ab 100644
--- a/drivers/net/ne3210.c
+++ b/drivers/net/ne3210.c
@@ -150,7 +150,8 @@ static int __init ne3210_eisa_probe (struct device *device)
150 if (phys_mem < virt_to_phys(high_memory)) { 150 if (phys_mem < virt_to_phys(high_memory)) {
151 printk(KERN_CRIT "ne3210.c: Card RAM overlaps with normal memory!!!\n"); 151 printk(KERN_CRIT "ne3210.c: Card RAM overlaps with normal memory!!!\n");
152 printk(KERN_CRIT "ne3210.c: Use EISA SCU to set card memory below 1MB,\n"); 152 printk(KERN_CRIT "ne3210.c: Use EISA SCU to set card memory below 1MB,\n");
153 printk(KERN_CRIT "ne3210.c: or to an address above 0x%lx.\n", virt_to_phys(high_memory)); 153 printk(KERN_CRIT "ne3210.c: or to an address above 0x%llx.\n",
154 (u64)virt_to_phys(high_memory));
154 printk(KERN_CRIT "ne3210.c: Driver NOT installed.\n"); 155 printk(KERN_CRIT "ne3210.c: Driver NOT installed.\n");
155 retval = -EINVAL; 156 retval = -EINVAL;
156 goto out3; 157 goto out3;
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c
index 6eff9ca6c6c8..00c23b1babca 100644
--- a/drivers/net/sfc/efx.c
+++ b/drivers/net/sfc/efx.c
@@ -894,20 +894,27 @@ static void efx_fini_io(struct efx_nic *efx)
894 * interrupts across them. */ 894 * interrupts across them. */
895static int efx_wanted_rx_queues(void) 895static int efx_wanted_rx_queues(void)
896{ 896{
897 cpumask_t core_mask; 897 cpumask_var_t core_mask;
898 int count; 898 int count;
899 int cpu; 899 int cpu;
900 900
901 cpus_clear(core_mask); 901 if (!alloc_cpumask_var(&core_mask, GFP_KERNEL)) {
902 printk(KERN_WARNING
903 "efx.c: allocation failure, irq balancing hobbled\n");
904 return 1;
905 }
906
907 cpumask_clear(core_mask);
902 count = 0; 908 count = 0;
903 for_each_online_cpu(cpu) { 909 for_each_online_cpu(cpu) {
904 if (!cpu_isset(cpu, core_mask)) { 910 if (!cpumask_test_cpu(cpu, core_mask)) {
905 ++count; 911 ++count;
906 cpus_or(core_mask, core_mask, 912 cpumask_or(core_mask, core_mask,
907 topology_core_siblings(cpu)); 913 topology_core_cpumask(cpu));
908 } 914 }
909 } 915 }
910 916
917 free_cpumask_var(core_mask);
911 return count; 918 return count;
912} 919}
913 920
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c
index 23a1b148d5b2..d4629ab2c614 100644
--- a/drivers/net/sfc/falcon.c
+++ b/drivers/net/sfc/falcon.c
@@ -340,10 +340,10 @@ static int falcon_alloc_special_buffer(struct efx_nic *efx,
340 nic_data->next_buffer_table += buffer->entries; 340 nic_data->next_buffer_table += buffer->entries;
341 341
342 EFX_LOG(efx, "allocating special buffers %d-%d at %llx+%x " 342 EFX_LOG(efx, "allocating special buffers %d-%d at %llx+%x "
343 "(virt %p phys %lx)\n", buffer->index, 343 "(virt %p phys %llx)\n", buffer->index,
344 buffer->index + buffer->entries - 1, 344 buffer->index + buffer->entries - 1,
345 (unsigned long long)buffer->dma_addr, len, 345 (u64)buffer->dma_addr, len,
346 buffer->addr, virt_to_phys(buffer->addr)); 346 buffer->addr, (u64)virt_to_phys(buffer->addr));
347 347
348 return 0; 348 return 0;
349} 349}
@@ -355,10 +355,10 @@ static void falcon_free_special_buffer(struct efx_nic *efx,
355 return; 355 return;
356 356
357 EFX_LOG(efx, "deallocating special buffers %d-%d at %llx+%x " 357 EFX_LOG(efx, "deallocating special buffers %d-%d at %llx+%x "
358 "(virt %p phys %lx)\n", buffer->index, 358 "(virt %p phys %llx)\n", buffer->index,
359 buffer->index + buffer->entries - 1, 359 buffer->index + buffer->entries - 1,
360 (unsigned long long)buffer->dma_addr, buffer->len, 360 (u64)buffer->dma_addr, buffer->len,
361 buffer->addr, virt_to_phys(buffer->addr)); 361 buffer->addr, (u64)virt_to_phys(buffer->addr));
362 362
363 pci_free_consistent(efx->pci_dev, buffer->len, buffer->addr, 363 pci_free_consistent(efx->pci_dev, buffer->len, buffer->addr,
364 buffer->dma_addr); 364 buffer->dma_addr);
@@ -2357,10 +2357,10 @@ int falcon_probe_port(struct efx_nic *efx)
2357 FALCON_MAC_STATS_SIZE); 2357 FALCON_MAC_STATS_SIZE);
2358 if (rc) 2358 if (rc)
2359 return rc; 2359 return rc;
2360 EFX_LOG(efx, "stats buffer at %llx (virt %p phys %lx)\n", 2360 EFX_LOG(efx, "stats buffer at %llx (virt %p phys %llx)\n",
2361 (unsigned long long)efx->stats_buffer.dma_addr, 2361 (u64)efx->stats_buffer.dma_addr,
2362 efx->stats_buffer.addr, 2362 efx->stats_buffer.addr,
2363 virt_to_phys(efx->stats_buffer.addr)); 2363 (u64)virt_to_phys(efx->stats_buffer.addr));
2364 2364
2365 return 0; 2365 return 0;
2366} 2366}
@@ -2935,9 +2935,9 @@ int falcon_probe_nic(struct efx_nic *efx)
2935 goto fail4; 2935 goto fail4;
2936 BUG_ON(efx->irq_status.dma_addr & 0x0f); 2936 BUG_ON(efx->irq_status.dma_addr & 0x0f);
2937 2937
2938 EFX_LOG(efx, "INT_KER at %llx (virt %p phys %lx)\n", 2938 EFX_LOG(efx, "INT_KER at %llx (virt %p phys %llx)\n",
2939 (unsigned long long)efx->irq_status.dma_addr, 2939 (u64)efx->irq_status.dma_addr,
2940 efx->irq_status.addr, virt_to_phys(efx->irq_status.addr)); 2940 efx->irq_status.addr, (u64)virt_to_phys(efx->irq_status.addr));
2941 2941
2942 falcon_probe_spi_devices(efx); 2942 falcon_probe_spi_devices(efx);
2943 2943
diff --git a/drivers/net/wireless/arlan-main.c b/drivers/net/wireless/arlan-main.c
index 5b9f1e06ebf6..a54a67c425c8 100644
--- a/drivers/net/wireless/arlan-main.c
+++ b/drivers/net/wireless/arlan-main.c
@@ -1085,8 +1085,8 @@ static int __init arlan_probe_here(struct net_device *dev,
1085 if (arlan_check_fingerprint(memaddr)) 1085 if (arlan_check_fingerprint(memaddr))
1086 return -ENODEV; 1086 return -ENODEV;
1087 1087
1088 printk(KERN_NOTICE "%s: Arlan found at %x, \n ", dev->name, 1088 printk(KERN_NOTICE "%s: Arlan found at %llx, \n ", dev->name,
1089 (int) virt_to_phys((void*)memaddr)); 1089 (u64) virt_to_phys((void*)memaddr));
1090 1090
1091 ap->card = (void *) memaddr; 1091 ap->card = (void *) memaddr;
1092 dev->mem_start = memaddr; 1092 dev->mem_start = memaddr;
diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index 9f102a6535c4..f67325387902 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -1511,7 +1511,7 @@ static int xennet_set_tso(struct net_device *dev, u32 data)
1511static void xennet_set_features(struct net_device *dev) 1511static void xennet_set_features(struct net_device *dev)
1512{ 1512{
1513 /* Turn off all GSO bits except ROBUST. */ 1513 /* Turn off all GSO bits except ROBUST. */
1514 dev->features &= (1 << NETIF_F_GSO_SHIFT) - 1; 1514 dev->features &= ~NETIF_F_GSO_MASK;
1515 dev->features |= NETIF_F_GSO_ROBUST; 1515 dev->features |= NETIF_F_GSO_ROBUST;
1516 xennet_set_sg(dev, 0); 1516 xennet_set_sg(dev, 0);
1517 1517
diff --git a/drivers/oprofile/buffer_sync.c b/drivers/oprofile/buffer_sync.c
index 9da5a4b81133..c3ea5fa7d05a 100644
--- a/drivers/oprofile/buffer_sync.c
+++ b/drivers/oprofile/buffer_sync.c
@@ -38,7 +38,7 @@
38 38
39static LIST_HEAD(dying_tasks); 39static LIST_HEAD(dying_tasks);
40static LIST_HEAD(dead_tasks); 40static LIST_HEAD(dead_tasks);
41static cpumask_t marked_cpus = CPU_MASK_NONE; 41static cpumask_var_t marked_cpus;
42static DEFINE_SPINLOCK(task_mortuary); 42static DEFINE_SPINLOCK(task_mortuary);
43static void process_task_mortuary(void); 43static void process_task_mortuary(void);
44 44
@@ -456,10 +456,10 @@ static void mark_done(int cpu)
456{ 456{
457 int i; 457 int i;
458 458
459 cpu_set(cpu, marked_cpus); 459 cpumask_set_cpu(cpu, marked_cpus);
460 460
461 for_each_online_cpu(i) { 461 for_each_online_cpu(i) {
462 if (!cpu_isset(i, marked_cpus)) 462 if (!cpumask_test_cpu(i, marked_cpus))
463 return; 463 return;
464 } 464 }
465 465
@@ -468,7 +468,7 @@ static void mark_done(int cpu)
468 */ 468 */
469 process_task_mortuary(); 469 process_task_mortuary();
470 470
471 cpus_clear(marked_cpus); 471 cpumask_clear(marked_cpus);
472} 472}
473 473
474 474
@@ -565,6 +565,20 @@ void sync_buffer(int cpu)
565 mutex_unlock(&buffer_mutex); 565 mutex_unlock(&buffer_mutex);
566} 566}
567 567
568int __init buffer_sync_init(void)
569{
570 if (!alloc_cpumask_var(&marked_cpus, GFP_KERNEL))
571 return -ENOMEM;
572
573 cpumask_clear(marked_cpus);
574 return 0;
575}
576
577void __exit buffer_sync_cleanup(void)
578{
579 free_cpumask_var(marked_cpus);
580}
581
568/* The function can be used to add a buffer worth of data directly to 582/* The function can be used to add a buffer worth of data directly to
569 * the kernel buffer. The buffer is assumed to be a circular buffer. 583 * the kernel buffer. The buffer is assumed to be a circular buffer.
570 * Take the entries from index start and end at index end, wrapping 584 * Take the entries from index start and end at index end, wrapping
diff --git a/drivers/oprofile/buffer_sync.h b/drivers/oprofile/buffer_sync.h
index 3110732c1835..0ebf5db62679 100644
--- a/drivers/oprofile/buffer_sync.h
+++ b/drivers/oprofile/buffer_sync.h
@@ -19,4 +19,8 @@ void sync_stop(void);
19/* sync the given CPU's buffer */ 19/* sync the given CPU's buffer */
20void sync_buffer(int cpu); 20void sync_buffer(int cpu);
21 21
22/* initialize/destroy the buffer system. */
23int buffer_sync_init(void);
24void buffer_sync_cleanup(void);
25
22#endif /* OPROFILE_BUFFER_SYNC_H */ 26#endif /* OPROFILE_BUFFER_SYNC_H */
diff --git a/drivers/oprofile/oprof.c b/drivers/oprofile/oprof.c
index 3cffce90f82a..ced39f602292 100644
--- a/drivers/oprofile/oprof.c
+++ b/drivers/oprofile/oprof.c
@@ -183,6 +183,10 @@ static int __init oprofile_init(void)
183{ 183{
184 int err; 184 int err;
185 185
186 err = buffer_sync_init();
187 if (err)
188 return err;
189
186 err = oprofile_arch_init(&oprofile_ops); 190 err = oprofile_arch_init(&oprofile_ops);
187 191
188 if (err < 0 || timer) { 192 if (err < 0 || timer) {
@@ -191,8 +195,10 @@ static int __init oprofile_init(void)
191 } 195 }
192 196
193 err = oprofilefs_register(); 197 err = oprofilefs_register();
194 if (err) 198 if (err) {
195 oprofile_arch_exit(); 199 oprofile_arch_exit();
200 buffer_sync_cleanup();
201 }
196 202
197 return err; 203 return err;
198} 204}
@@ -202,6 +208,7 @@ static void __exit oprofile_exit(void)
202{ 208{
203 oprofilefs_unregister(); 209 oprofilefs_unregister();
204 oprofile_arch_exit(); 210 oprofile_arch_exit();
211 buffer_sync_cleanup();
205} 212}
206 213
207 214
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index 26c536b51c5a..5f333403c2ea 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -42,6 +42,7 @@
42LIST_HEAD(dmar_drhd_units); 42LIST_HEAD(dmar_drhd_units);
43 43
44static struct acpi_table_header * __initdata dmar_tbl; 44static struct acpi_table_header * __initdata dmar_tbl;
45static acpi_size dmar_tbl_size;
45 46
46static void __init dmar_register_drhd_unit(struct dmar_drhd_unit *drhd) 47static void __init dmar_register_drhd_unit(struct dmar_drhd_unit *drhd)
47{ 48{
@@ -288,8 +289,9 @@ static int __init dmar_table_detect(void)
288 acpi_status status = AE_OK; 289 acpi_status status = AE_OK;
289 290
290 /* if we could find DMAR table, then there are DMAR devices */ 291 /* if we could find DMAR table, then there are DMAR devices */
291 status = acpi_get_table(ACPI_SIG_DMAR, 0, 292 status = acpi_get_table_with_size(ACPI_SIG_DMAR, 0,
292 (struct acpi_table_header **)&dmar_tbl); 293 (struct acpi_table_header **)&dmar_tbl,
294 &dmar_tbl_size);
293 295
294 if (ACPI_SUCCESS(status) && !dmar_tbl) { 296 if (ACPI_SUCCESS(status) && !dmar_tbl) {
295 printk (KERN_WARNING PREFIX "Unable to map DMAR\n"); 297 printk (KERN_WARNING PREFIX "Unable to map DMAR\n");
@@ -489,6 +491,7 @@ void __init detect_intel_iommu(void)
489 iommu_detected = 1; 491 iommu_detected = 1;
490#endif 492#endif
491 } 493 }
494 early_acpi_os_unmap_memory(dmar_tbl, dmar_tbl_size);
492 dmar_tbl = NULL; 495 dmar_tbl = NULL;
493} 496}
494 497
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index b721c2fbe8f5..9d07a05d26f1 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -6,6 +6,7 @@
6#include <linux/irq.h> 6#include <linux/irq.h>
7#include <asm/io_apic.h> 7#include <asm/io_apic.h>
8#include <asm/smp.h> 8#include <asm/smp.h>
9#include <asm/cpu.h>
9#include <linux/intel-iommu.h> 10#include <linux/intel-iommu.h>
10#include "intr_remapping.h" 11#include "intr_remapping.h"
11 12
diff --git a/drivers/s390/scsi/zfcp_aux.c b/drivers/s390/scsi/zfcp_aux.c
index 8af7dfbe022c..616c60ffcf2c 100644
--- a/drivers/s390/scsi/zfcp_aux.c
+++ b/drivers/s390/scsi/zfcp_aux.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Module interface and handling of zfcp data structures. 4 * Module interface and handling of zfcp data structures.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2008 6 * Copyright IBM Corporation 2002, 2009
7 */ 7 */
8 8
9/* 9/*
@@ -249,8 +249,8 @@ struct zfcp_port *zfcp_get_port_by_wwpn(struct zfcp_adapter *adapter,
249 struct zfcp_port *port; 249 struct zfcp_port *port;
250 250
251 list_for_each_entry(port, &adapter->port_list_head, list) 251 list_for_each_entry(port, &adapter->port_list_head, list)
252 if ((port->wwpn == wwpn) && !(atomic_read(&port->status) & 252 if ((port->wwpn == wwpn) &&
253 (ZFCP_STATUS_PORT_NO_WWPN | ZFCP_STATUS_COMMON_REMOVE))) 253 !(atomic_read(&port->status) & ZFCP_STATUS_COMMON_REMOVE))
254 return port; 254 return port;
255 return NULL; 255 return NULL;
256} 256}
@@ -421,7 +421,8 @@ int zfcp_status_read_refill(struct zfcp_adapter *adapter)
421 while (atomic_read(&adapter->stat_miss) > 0) 421 while (atomic_read(&adapter->stat_miss) > 0)
422 if (zfcp_fsf_status_read(adapter)) { 422 if (zfcp_fsf_status_read(adapter)) {
423 if (atomic_read(&adapter->stat_miss) >= 16) { 423 if (atomic_read(&adapter->stat_miss) >= 16) {
424 zfcp_erp_adapter_reopen(adapter, 0, 103, NULL); 424 zfcp_erp_adapter_reopen(adapter, 0, "axsref1",
425 NULL);
425 return 1; 426 return 1;
426 } 427 }
427 break; 428 break;
@@ -501,6 +502,7 @@ int zfcp_adapter_enqueue(struct ccw_device *ccw_device)
501 spin_lock_init(&adapter->scsi_dbf_lock); 502 spin_lock_init(&adapter->scsi_dbf_lock);
502 spin_lock_init(&adapter->rec_dbf_lock); 503 spin_lock_init(&adapter->rec_dbf_lock);
503 spin_lock_init(&adapter->req_q_lock); 504 spin_lock_init(&adapter->req_q_lock);
505 spin_lock_init(&adapter->qdio_stat_lock);
504 506
505 rwlock_init(&adapter->erp_lock); 507 rwlock_init(&adapter->erp_lock);
506 rwlock_init(&adapter->abort_lock); 508 rwlock_init(&adapter->abort_lock);
@@ -522,7 +524,6 @@ int zfcp_adapter_enqueue(struct ccw_device *ccw_device)
522 goto sysfs_failed; 524 goto sysfs_failed;
523 525
524 atomic_clear_mask(ZFCP_STATUS_COMMON_REMOVE, &adapter->status); 526 atomic_clear_mask(ZFCP_STATUS_COMMON_REMOVE, &adapter->status);
525 zfcp_fc_nameserver_init(adapter);
526 527
527 if (!zfcp_adapter_scsi_register(adapter)) 528 if (!zfcp_adapter_scsi_register(adapter))
528 return 0; 529 return 0;
@@ -552,6 +553,7 @@ void zfcp_adapter_dequeue(struct zfcp_adapter *adapter)
552 553
553 cancel_work_sync(&adapter->scan_work); 554 cancel_work_sync(&adapter->scan_work);
554 cancel_work_sync(&adapter->stat_work); 555 cancel_work_sync(&adapter->stat_work);
556 cancel_delayed_work_sync(&adapter->nsp.work);
555 zfcp_adapter_scsi_unregister(adapter); 557 zfcp_adapter_scsi_unregister(adapter);
556 sysfs_remove_group(&adapter->ccw_device->dev.kobj, 558 sysfs_remove_group(&adapter->ccw_device->dev.kobj,
557 &zfcp_sysfs_adapter_attrs); 559 &zfcp_sysfs_adapter_attrs);
@@ -603,10 +605,13 @@ struct zfcp_port *zfcp_port_enqueue(struct zfcp_adapter *adapter, u64 wwpn,
603 init_waitqueue_head(&port->remove_wq); 605 init_waitqueue_head(&port->remove_wq);
604 INIT_LIST_HEAD(&port->unit_list_head); 606 INIT_LIST_HEAD(&port->unit_list_head);
605 INIT_WORK(&port->gid_pn_work, zfcp_erp_port_strategy_open_lookup); 607 INIT_WORK(&port->gid_pn_work, zfcp_erp_port_strategy_open_lookup);
608 INIT_WORK(&port->test_link_work, zfcp_fc_link_test_work);
609 INIT_WORK(&port->rport_work, zfcp_scsi_rport_work);
606 610
607 port->adapter = adapter; 611 port->adapter = adapter;
608 port->d_id = d_id; 612 port->d_id = d_id;
609 port->wwpn = wwpn; 613 port->wwpn = wwpn;
614 port->rport_task = RPORT_NONE;
610 615
611 /* mark port unusable as long as sysfs registration is not complete */ 616 /* mark port unusable as long as sysfs registration is not complete */
612 atomic_set_mask(status | ZFCP_STATUS_COMMON_REMOVE, &port->status); 617 atomic_set_mask(status | ZFCP_STATUS_COMMON_REMOVE, &port->status);
@@ -620,11 +625,10 @@ struct zfcp_port *zfcp_port_enqueue(struct zfcp_adapter *adapter, u64 wwpn,
620 dev_set_drvdata(&port->sysfs_device, port); 625 dev_set_drvdata(&port->sysfs_device, port);
621 626
622 read_lock_irq(&zfcp_data.config_lock); 627 read_lock_irq(&zfcp_data.config_lock);
623 if (!(status & ZFCP_STATUS_PORT_NO_WWPN)) 628 if (zfcp_get_port_by_wwpn(adapter, wwpn)) {
624 if (zfcp_get_port_by_wwpn(adapter, wwpn)) { 629 read_unlock_irq(&zfcp_data.config_lock);
625 read_unlock_irq(&zfcp_data.config_lock); 630 goto err_out_free;
626 goto err_out_free; 631 }
627 }
628 read_unlock_irq(&zfcp_data.config_lock); 632 read_unlock_irq(&zfcp_data.config_lock);
629 633
630 if (device_register(&port->sysfs_device)) 634 if (device_register(&port->sysfs_device))
diff --git a/drivers/s390/scsi/zfcp_ccw.c b/drivers/s390/scsi/zfcp_ccw.c
index 285881f07648..1fe1e2eda512 100644
--- a/drivers/s390/scsi/zfcp_ccw.c
+++ b/drivers/s390/scsi/zfcp_ccw.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Registration and callback for the s390 common I/O layer. 4 * Registration and callback for the s390 common I/O layer.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2008 6 * Copyright IBM Corporation 2002, 2009
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
@@ -72,8 +72,7 @@ static void zfcp_ccw_remove(struct ccw_device *ccw_device)
72 72
73 list_for_each_entry_safe(port, p, &port_remove_lh, list) { 73 list_for_each_entry_safe(port, p, &port_remove_lh, list) {
74 list_for_each_entry_safe(unit, u, &unit_remove_lh, list) { 74 list_for_each_entry_safe(unit, u, &unit_remove_lh, list) {
75 if (atomic_read(&unit->status) & 75 if (unit->device)
76 ZFCP_STATUS_UNIT_REGISTERED)
77 scsi_remove_device(unit->device); 76 scsi_remove_device(unit->device);
78 zfcp_unit_dequeue(unit); 77 zfcp_unit_dequeue(unit);
79 } 78 }
@@ -109,11 +108,12 @@ static int zfcp_ccw_set_online(struct ccw_device *ccw_device)
109 /* initialize request counter */ 108 /* initialize request counter */
110 BUG_ON(!zfcp_reqlist_isempty(adapter)); 109 BUG_ON(!zfcp_reqlist_isempty(adapter));
111 adapter->req_no = 0; 110 adapter->req_no = 0;
111 zfcp_fc_nameserver_init(adapter);
112 112
113 zfcp_erp_modify_adapter_status(adapter, 10, NULL, 113 zfcp_erp_modify_adapter_status(adapter, "ccsonl1", NULL,
114 ZFCP_STATUS_COMMON_RUNNING, ZFCP_SET); 114 ZFCP_STATUS_COMMON_RUNNING, ZFCP_SET);
115 zfcp_erp_adapter_reopen(adapter, ZFCP_STATUS_COMMON_ERP_FAILED, 85, 115 zfcp_erp_adapter_reopen(adapter, ZFCP_STATUS_COMMON_ERP_FAILED,
116 NULL); 116 "ccsonl2", NULL);
117 zfcp_erp_wait(adapter); 117 zfcp_erp_wait(adapter);
118 up(&zfcp_data.config_sema); 118 up(&zfcp_data.config_sema);
119 flush_work(&adapter->scan_work); 119 flush_work(&adapter->scan_work);
@@ -137,7 +137,7 @@ static int zfcp_ccw_set_offline(struct ccw_device *ccw_device)
137 137
138 down(&zfcp_data.config_sema); 138 down(&zfcp_data.config_sema);
139 adapter = dev_get_drvdata(&ccw_device->dev); 139 adapter = dev_get_drvdata(&ccw_device->dev);
140 zfcp_erp_adapter_shutdown(adapter, 0, 86, NULL); 140 zfcp_erp_adapter_shutdown(adapter, 0, "ccsoff1", NULL);
141 zfcp_erp_wait(adapter); 141 zfcp_erp_wait(adapter);
142 zfcp_erp_thread_kill(adapter); 142 zfcp_erp_thread_kill(adapter);
143 up(&zfcp_data.config_sema); 143 up(&zfcp_data.config_sema);
@@ -160,21 +160,21 @@ static int zfcp_ccw_notify(struct ccw_device *ccw_device, int event)
160 case CIO_GONE: 160 case CIO_GONE:
161 dev_warn(&adapter->ccw_device->dev, 161 dev_warn(&adapter->ccw_device->dev,
162 "The FCP device has been detached\n"); 162 "The FCP device has been detached\n");
163 zfcp_erp_adapter_shutdown(adapter, 0, 87, NULL); 163 zfcp_erp_adapter_shutdown(adapter, 0, "ccnoti1", NULL);
164 break; 164 break;
165 case CIO_NO_PATH: 165 case CIO_NO_PATH:
166 dev_warn(&adapter->ccw_device->dev, 166 dev_warn(&adapter->ccw_device->dev,
167 "The CHPID for the FCP device is offline\n"); 167 "The CHPID for the FCP device is offline\n");
168 zfcp_erp_adapter_shutdown(adapter, 0, 88, NULL); 168 zfcp_erp_adapter_shutdown(adapter, 0, "ccnoti2", NULL);
169 break; 169 break;
170 case CIO_OPER: 170 case CIO_OPER:
171 dev_info(&adapter->ccw_device->dev, 171 dev_info(&adapter->ccw_device->dev,
172 "The FCP device is operational again\n"); 172 "The FCP device is operational again\n");
173 zfcp_erp_modify_adapter_status(adapter, 11, NULL, 173 zfcp_erp_modify_adapter_status(adapter, "ccnoti3", NULL,
174 ZFCP_STATUS_COMMON_RUNNING, 174 ZFCP_STATUS_COMMON_RUNNING,
175 ZFCP_SET); 175 ZFCP_SET);
176 zfcp_erp_adapter_reopen(adapter, ZFCP_STATUS_COMMON_ERP_FAILED, 176 zfcp_erp_adapter_reopen(adapter, ZFCP_STATUS_COMMON_ERP_FAILED,
177 89, NULL); 177 "ccnoti4", NULL);
178 break; 178 break;
179 } 179 }
180 return 1; 180 return 1;
@@ -190,7 +190,7 @@ static void zfcp_ccw_shutdown(struct ccw_device *cdev)
190 190
191 down(&zfcp_data.config_sema); 191 down(&zfcp_data.config_sema);
192 adapter = dev_get_drvdata(&cdev->dev); 192 adapter = dev_get_drvdata(&cdev->dev);
193 zfcp_erp_adapter_shutdown(adapter, 0, 90, NULL); 193 zfcp_erp_adapter_shutdown(adapter, 0, "ccshut1", NULL);
194 zfcp_erp_wait(adapter); 194 zfcp_erp_wait(adapter);
195 up(&zfcp_data.config_sema); 195 up(&zfcp_data.config_sema);
196} 196}
diff --git a/drivers/s390/scsi/zfcp_dbf.c b/drivers/s390/scsi/zfcp_dbf.c
index cb6df609953e..0a1a5dd8d018 100644
--- a/drivers/s390/scsi/zfcp_dbf.c
+++ b/drivers/s390/scsi/zfcp_dbf.c
@@ -490,172 +490,17 @@ static const char *zfcp_rec_dbf_tags[] = {
490 [ZFCP_REC_DBF_ID_ACTION] = "action", 490 [ZFCP_REC_DBF_ID_ACTION] = "action",
491}; 491};
492 492
493static const char *zfcp_rec_dbf_ids[] = {
494 [1] = "new",
495 [2] = "ready",
496 [3] = "kill",
497 [4] = "down sleep",
498 [5] = "down wakeup",
499 [6] = "down sleep ecd",
500 [7] = "down wakeup ecd",
501 [8] = "down sleep epd",
502 [9] = "down wakeup epd",
503 [10] = "online",
504 [11] = "operational",
505 [12] = "scsi slave destroy",
506 [13] = "propagate failed adapter",
507 [14] = "propagate failed port",
508 [15] = "block adapter",
509 [16] = "unblock adapter",
510 [17] = "block port",
511 [18] = "unblock port",
512 [19] = "block unit",
513 [20] = "unblock unit",
514 [21] = "unit recovery failed",
515 [22] = "port recovery failed",
516 [23] = "adapter recovery failed",
517 [24] = "qdio queues down",
518 [25] = "p2p failed",
519 [26] = "nameserver lookup failed",
520 [27] = "nameserver port failed",
521 [28] = "link up",
522 [29] = "link down",
523 [30] = "link up status read",
524 [31] = "open port failed",
525 [32] = "",
526 [33] = "close port",
527 [34] = "open unit failed",
528 [35] = "exclusive open unit failed",
529 [36] = "shared open unit failed",
530 [37] = "link down",
531 [38] = "link down status read no link",
532 [39] = "link down status read fdisc login",
533 [40] = "link down status read firmware update",
534 [41] = "link down status read unknown reason",
535 [42] = "link down ecd incomplete",
536 [43] = "link down epd incomplete",
537 [44] = "sysfs adapter recovery",
538 [45] = "sysfs port recovery",
539 [46] = "sysfs unit recovery",
540 [47] = "port boxed abort",
541 [48] = "unit boxed abort",
542 [49] = "port boxed ct",
543 [50] = "port boxed close physical",
544 [51] = "port boxed open unit",
545 [52] = "port boxed close unit",
546 [53] = "port boxed fcp",
547 [54] = "unit boxed fcp",
548 [55] = "port access denied",
549 [56] = "",
550 [57] = "",
551 [58] = "",
552 [59] = "unit access denied",
553 [60] = "shared unit access denied open unit",
554 [61] = "",
555 [62] = "request timeout",
556 [63] = "adisc link test reject or timeout",
557 [64] = "adisc link test d_id changed",
558 [65] = "adisc link test failed",
559 [66] = "recovery out of memory",
560 [67] = "adapter recovery repeated after state change",
561 [68] = "port recovery repeated after state change",
562 [69] = "unit recovery repeated after state change",
563 [70] = "port recovery follow-up after successful adapter recovery",
564 [71] = "adapter recovery escalation after failed adapter recovery",
565 [72] = "port recovery follow-up after successful physical port "
566 "recovery",
567 [73] = "adapter recovery escalation after failed physical port "
568 "recovery",
569 [74] = "unit recovery follow-up after successful port recovery",
570 [75] = "physical port recovery escalation after failed port "
571 "recovery",
572 [76] = "port recovery escalation after failed unit recovery",
573 [77] = "",
574 [78] = "duplicate request id",
575 [79] = "link down",
576 [80] = "exclusive read-only unit access unsupported",
577 [81] = "shared read-write unit access unsupported",
578 [82] = "incoming rscn",
579 [83] = "incoming wwpn",
580 [84] = "wka port handle not valid close port",
581 [85] = "online",
582 [86] = "offline",
583 [87] = "ccw device gone",
584 [88] = "ccw device no path",
585 [89] = "ccw device operational",
586 [90] = "ccw device shutdown",
587 [91] = "sysfs port addition",
588 [92] = "sysfs port removal",
589 [93] = "sysfs adapter recovery",
590 [94] = "sysfs unit addition",
591 [95] = "sysfs unit removal",
592 [96] = "sysfs port recovery",
593 [97] = "sysfs unit recovery",
594 [98] = "sequence number mismatch",
595 [99] = "link up",
596 [100] = "error state",
597 [101] = "status read physical port closed",
598 [102] = "link up status read",
599 [103] = "too many failed status read buffers",
600 [104] = "port handle not valid abort",
601 [105] = "lun handle not valid abort",
602 [106] = "port handle not valid ct",
603 [107] = "port handle not valid close port",
604 [108] = "port handle not valid close physical port",
605 [109] = "port handle not valid open unit",
606 [110] = "port handle not valid close unit",
607 [111] = "lun handle not valid close unit",
608 [112] = "port handle not valid fcp",
609 [113] = "lun handle not valid fcp",
610 [114] = "handle mismatch fcp",
611 [115] = "lun not valid fcp",
612 [116] = "qdio send failed",
613 [117] = "version mismatch",
614 [118] = "incompatible qtcb type",
615 [119] = "unknown protocol status",
616 [120] = "unknown fsf command",
617 [121] = "no recommendation for status qualifier",
618 [122] = "status read physical port closed in error",
619 [123] = "fc service class not supported",
620 [124] = "",
621 [125] = "need newer zfcp",
622 [126] = "need newer microcode",
623 [127] = "arbitrated loop not supported",
624 [128] = "",
625 [129] = "qtcb size mismatch",
626 [130] = "unknown fsf status ecd",
627 [131] = "fcp request too big",
628 [132] = "",
629 [133] = "data direction not valid fcp",
630 [134] = "command length not valid fcp",
631 [135] = "status read act update",
632 [136] = "status read cfdc update",
633 [137] = "hbaapi port open",
634 [138] = "hbaapi unit open",
635 [139] = "hbaapi unit shutdown",
636 [140] = "qdio error outbound",
637 [141] = "scsi host reset",
638 [142] = "dismissing fsf request for recovery action",
639 [143] = "recovery action timed out",
640 [144] = "recovery action gone",
641 [145] = "recovery action being processed",
642 [146] = "recovery action ready for next step",
643 [147] = "qdio error inbound",
644 [148] = "nameserver needed for port scan",
645 [149] = "port scan",
646 [150] = "ptp attach",
647 [151] = "port validation failed",
648};
649
650static int zfcp_rec_dbf_view_format(debug_info_t *id, struct debug_view *view, 493static int zfcp_rec_dbf_view_format(debug_info_t *id, struct debug_view *view,
651 char *buf, const char *_rec) 494 char *buf, const char *_rec)
652{ 495{
653 struct zfcp_rec_dbf_record *r = (struct zfcp_rec_dbf_record *)_rec; 496 struct zfcp_rec_dbf_record *r = (struct zfcp_rec_dbf_record *)_rec;
654 char *p = buf; 497 char *p = buf;
498 char hint[ZFCP_DBF_ID_SIZE + 1];
655 499
500 memcpy(hint, r->id2, ZFCP_DBF_ID_SIZE);
501 hint[ZFCP_DBF_ID_SIZE] = 0;
656 zfcp_dbf_outs(&p, "tag", zfcp_rec_dbf_tags[r->id]); 502 zfcp_dbf_outs(&p, "tag", zfcp_rec_dbf_tags[r->id]);
657 zfcp_dbf_outs(&p, "hint", zfcp_rec_dbf_ids[r->id2]); 503 zfcp_dbf_outs(&p, "hint", hint);
658 zfcp_dbf_out(&p, "id", "%d", r->id2);
659 switch (r->id) { 504 switch (r->id) {
660 case ZFCP_REC_DBF_ID_THREAD: 505 case ZFCP_REC_DBF_ID_THREAD:
661 zfcp_dbf_out(&p, "total", "%d", r->u.thread.total); 506 zfcp_dbf_out(&p, "total", "%d", r->u.thread.total);
@@ -707,7 +552,7 @@ static struct debug_view zfcp_rec_dbf_view = {
707 * @adapter: adapter 552 * @adapter: adapter
708 * This function assumes that the caller is holding erp_lock. 553 * This function assumes that the caller is holding erp_lock.
709 */ 554 */
710void zfcp_rec_dbf_event_thread(u8 id2, struct zfcp_adapter *adapter) 555void zfcp_rec_dbf_event_thread(char *id2, struct zfcp_adapter *adapter)
711{ 556{
712 struct zfcp_rec_dbf_record *r = &adapter->rec_dbf_buf; 557 struct zfcp_rec_dbf_record *r = &adapter->rec_dbf_buf;
713 unsigned long flags = 0; 558 unsigned long flags = 0;
@@ -723,7 +568,7 @@ void zfcp_rec_dbf_event_thread(u8 id2, struct zfcp_adapter *adapter)
723 spin_lock_irqsave(&adapter->rec_dbf_lock, flags); 568 spin_lock_irqsave(&adapter->rec_dbf_lock, flags);
724 memset(r, 0, sizeof(*r)); 569 memset(r, 0, sizeof(*r));
725 r->id = ZFCP_REC_DBF_ID_THREAD; 570 r->id = ZFCP_REC_DBF_ID_THREAD;
726 r->id2 = id2; 571 memcpy(r->id2, id2, ZFCP_DBF_ID_SIZE);
727 r->u.thread.total = total; 572 r->u.thread.total = total;
728 r->u.thread.ready = ready; 573 r->u.thread.ready = ready;
729 r->u.thread.running = running; 574 r->u.thread.running = running;
@@ -737,7 +582,7 @@ void zfcp_rec_dbf_event_thread(u8 id2, struct zfcp_adapter *adapter)
737 * @adapter: adapter 582 * @adapter: adapter
738 * This function assumes that the caller does not hold erp_lock. 583 * This function assumes that the caller does not hold erp_lock.
739 */ 584 */
740void zfcp_rec_dbf_event_thread_lock(u8 id2, struct zfcp_adapter *adapter) 585void zfcp_rec_dbf_event_thread_lock(char *id2, struct zfcp_adapter *adapter)
741{ 586{
742 unsigned long flags; 587 unsigned long flags;
743 588
@@ -746,7 +591,7 @@ void zfcp_rec_dbf_event_thread_lock(u8 id2, struct zfcp_adapter *adapter)
746 read_unlock_irqrestore(&adapter->erp_lock, flags); 591 read_unlock_irqrestore(&adapter->erp_lock, flags);
747} 592}
748 593
749static void zfcp_rec_dbf_event_target(u8 id2, void *ref, 594static void zfcp_rec_dbf_event_target(char *id2, void *ref,
750 struct zfcp_adapter *adapter, 595 struct zfcp_adapter *adapter,
751 atomic_t *status, atomic_t *erp_count, 596 atomic_t *status, atomic_t *erp_count,
752 u64 wwpn, u32 d_id, u64 fcp_lun) 597 u64 wwpn, u32 d_id, u64 fcp_lun)
@@ -757,7 +602,7 @@ static void zfcp_rec_dbf_event_target(u8 id2, void *ref,
757 spin_lock_irqsave(&adapter->rec_dbf_lock, flags); 602 spin_lock_irqsave(&adapter->rec_dbf_lock, flags);
758 memset(r, 0, sizeof(*r)); 603 memset(r, 0, sizeof(*r));
759 r->id = ZFCP_REC_DBF_ID_TARGET; 604 r->id = ZFCP_REC_DBF_ID_TARGET;
760 r->id2 = id2; 605 memcpy(r->id2, id2, ZFCP_DBF_ID_SIZE);
761 r->u.target.ref = (unsigned long)ref; 606 r->u.target.ref = (unsigned long)ref;
762 r->u.target.status = atomic_read(status); 607 r->u.target.status = atomic_read(status);
763 r->u.target.wwpn = wwpn; 608 r->u.target.wwpn = wwpn;
@@ -774,7 +619,8 @@ static void zfcp_rec_dbf_event_target(u8 id2, void *ref,
774 * @ref: additional reference (e.g. request) 619 * @ref: additional reference (e.g. request)
775 * @adapter: adapter 620 * @adapter: adapter
776 */ 621 */
777void zfcp_rec_dbf_event_adapter(u8 id, void *ref, struct zfcp_adapter *adapter) 622void zfcp_rec_dbf_event_adapter(char *id, void *ref,
623 struct zfcp_adapter *adapter)
778{ 624{
779 zfcp_rec_dbf_event_target(id, ref, adapter, &adapter->status, 625 zfcp_rec_dbf_event_target(id, ref, adapter, &adapter->status,
780 &adapter->erp_counter, 0, 0, 0); 626 &adapter->erp_counter, 0, 0, 0);
@@ -786,7 +632,7 @@ void zfcp_rec_dbf_event_adapter(u8 id, void *ref, struct zfcp_adapter *adapter)
786 * @ref: additional reference (e.g. request) 632 * @ref: additional reference (e.g. request)
787 * @port: port 633 * @port: port
788 */ 634 */
789void zfcp_rec_dbf_event_port(u8 id, void *ref, struct zfcp_port *port) 635void zfcp_rec_dbf_event_port(char *id, void *ref, struct zfcp_port *port)
790{ 636{
791 struct zfcp_adapter *adapter = port->adapter; 637 struct zfcp_adapter *adapter = port->adapter;
792 638
@@ -801,7 +647,7 @@ void zfcp_rec_dbf_event_port(u8 id, void *ref, struct zfcp_port *port)
801 * @ref: additional reference (e.g. request) 647 * @ref: additional reference (e.g. request)
802 * @unit: unit 648 * @unit: unit
803 */ 649 */
804void zfcp_rec_dbf_event_unit(u8 id, void *ref, struct zfcp_unit *unit) 650void zfcp_rec_dbf_event_unit(char *id, void *ref, struct zfcp_unit *unit)
805{ 651{
806 struct zfcp_port *port = unit->port; 652 struct zfcp_port *port = unit->port;
807 struct zfcp_adapter *adapter = port->adapter; 653 struct zfcp_adapter *adapter = port->adapter;
@@ -822,7 +668,7 @@ void zfcp_rec_dbf_event_unit(u8 id, void *ref, struct zfcp_unit *unit)
822 * @port: port 668 * @port: port
823 * @unit: unit 669 * @unit: unit
824 */ 670 */
825void zfcp_rec_dbf_event_trigger(u8 id2, void *ref, u8 want, u8 need, 671void zfcp_rec_dbf_event_trigger(char *id2, void *ref, u8 want, u8 need,
826 void *action, struct zfcp_adapter *adapter, 672 void *action, struct zfcp_adapter *adapter,
827 struct zfcp_port *port, struct zfcp_unit *unit) 673 struct zfcp_port *port, struct zfcp_unit *unit)
828{ 674{
@@ -832,7 +678,7 @@ void zfcp_rec_dbf_event_trigger(u8 id2, void *ref, u8 want, u8 need,
832 spin_lock_irqsave(&adapter->rec_dbf_lock, flags); 678 spin_lock_irqsave(&adapter->rec_dbf_lock, flags);
833 memset(r, 0, sizeof(*r)); 679 memset(r, 0, sizeof(*r));
834 r->id = ZFCP_REC_DBF_ID_TRIGGER; 680 r->id = ZFCP_REC_DBF_ID_TRIGGER;
835 r->id2 = id2; 681 memcpy(r->id2, id2, ZFCP_DBF_ID_SIZE);
836 r->u.trigger.ref = (unsigned long)ref; 682 r->u.trigger.ref = (unsigned long)ref;
837 r->u.trigger.want = want; 683 r->u.trigger.want = want;
838 r->u.trigger.need = need; 684 r->u.trigger.need = need;
@@ -855,7 +701,7 @@ void zfcp_rec_dbf_event_trigger(u8 id2, void *ref, u8 want, u8 need,
855 * @id2: identifier 701 * @id2: identifier
856 * @erp_action: error recovery action struct pointer 702 * @erp_action: error recovery action struct pointer
857 */ 703 */
858void zfcp_rec_dbf_event_action(u8 id2, struct zfcp_erp_action *erp_action) 704void zfcp_rec_dbf_event_action(char *id2, struct zfcp_erp_action *erp_action)
859{ 705{
860 struct zfcp_adapter *adapter = erp_action->adapter; 706 struct zfcp_adapter *adapter = erp_action->adapter;
861 struct zfcp_rec_dbf_record *r = &adapter->rec_dbf_buf; 707 struct zfcp_rec_dbf_record *r = &adapter->rec_dbf_buf;
@@ -864,7 +710,7 @@ void zfcp_rec_dbf_event_action(u8 id2, struct zfcp_erp_action *erp_action)
864 spin_lock_irqsave(&adapter->rec_dbf_lock, flags); 710 spin_lock_irqsave(&adapter->rec_dbf_lock, flags);
865 memset(r, 0, sizeof(*r)); 711 memset(r, 0, sizeof(*r));
866 r->id = ZFCP_REC_DBF_ID_ACTION; 712 r->id = ZFCP_REC_DBF_ID_ACTION;
867 r->id2 = id2; 713 memcpy(r->id2, id2, ZFCP_DBF_ID_SIZE);
868 r->u.action.action = (unsigned long)erp_action; 714 r->u.action.action = (unsigned long)erp_action;
869 r->u.action.status = erp_action->status; 715 r->u.action.status = erp_action->status;
870 r->u.action.step = erp_action->step; 716 r->u.action.step = erp_action->step;
diff --git a/drivers/s390/scsi/zfcp_dbf.h b/drivers/s390/scsi/zfcp_dbf.h
index 74998ff88e57..a573f7344dd6 100644
--- a/drivers/s390/scsi/zfcp_dbf.h
+++ b/drivers/s390/scsi/zfcp_dbf.h
@@ -25,6 +25,7 @@
25#include "zfcp_fsf.h" 25#include "zfcp_fsf.h"
26 26
27#define ZFCP_DBF_TAG_SIZE 4 27#define ZFCP_DBF_TAG_SIZE 4
28#define ZFCP_DBF_ID_SIZE 7
28 29
29struct zfcp_dbf_dump { 30struct zfcp_dbf_dump {
30 u8 tag[ZFCP_DBF_TAG_SIZE]; 31 u8 tag[ZFCP_DBF_TAG_SIZE];
@@ -70,7 +71,7 @@ struct zfcp_rec_dbf_record_action {
70 71
71struct zfcp_rec_dbf_record { 72struct zfcp_rec_dbf_record {
72 u8 id; 73 u8 id;
73 u8 id2; 74 char id2[7];
74 union { 75 union {
75 struct zfcp_rec_dbf_record_action action; 76 struct zfcp_rec_dbf_record_action action;
76 struct zfcp_rec_dbf_record_thread thread; 77 struct zfcp_rec_dbf_record_thread thread;
diff --git a/drivers/s390/scsi/zfcp_def.h b/drivers/s390/scsi/zfcp_def.h
index 510662783a6f..a0318630f047 100644
--- a/drivers/s390/scsi/zfcp_def.h
+++ b/drivers/s390/scsi/zfcp_def.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Global definitions for the zfcp device driver. 4 * Global definitions for the zfcp device driver.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2008 6 * Copyright IBM Corporation 2002, 2009
7 */ 7 */
8 8
9#ifndef ZFCP_DEF_H 9#ifndef ZFCP_DEF_H
@@ -243,9 +243,6 @@ struct zfcp_ls_adisc {
243 243
244/* remote port status */ 244/* remote port status */
245#define ZFCP_STATUS_PORT_PHYS_OPEN 0x00000001 245#define ZFCP_STATUS_PORT_PHYS_OPEN 0x00000001
246#define ZFCP_STATUS_PORT_PHYS_CLOSING 0x00000004
247#define ZFCP_STATUS_PORT_NO_WWPN 0x00000008
248#define ZFCP_STATUS_PORT_INVALID_WWPN 0x00000020
249 246
250/* well known address (WKA) port status*/ 247/* well known address (WKA) port status*/
251enum zfcp_wka_status { 248enum zfcp_wka_status {
@@ -258,7 +255,6 @@ enum zfcp_wka_status {
258/* logical unit status */ 255/* logical unit status */
259#define ZFCP_STATUS_UNIT_SHARED 0x00000004 256#define ZFCP_STATUS_UNIT_SHARED 0x00000004
260#define ZFCP_STATUS_UNIT_READONLY 0x00000008 257#define ZFCP_STATUS_UNIT_READONLY 0x00000008
261#define ZFCP_STATUS_UNIT_REGISTERED 0x00000010
262#define ZFCP_STATUS_UNIT_SCSI_WORK_PENDING 0x00000020 258#define ZFCP_STATUS_UNIT_SCSI_WORK_PENDING 0x00000020
263 259
264/* FSF request status (this does not have a common part) */ 260/* FSF request status (this does not have a common part) */
@@ -447,8 +443,9 @@ struct zfcp_adapter {
447 spinlock_t req_list_lock; /* request list lock */ 443 spinlock_t req_list_lock; /* request list lock */
448 struct zfcp_qdio_queue req_q; /* request queue */ 444 struct zfcp_qdio_queue req_q; /* request queue */
449 spinlock_t req_q_lock; /* for operations on queue */ 445 spinlock_t req_q_lock; /* for operations on queue */
450 int req_q_pci_batch; /* SBALs since PCI indication 446 ktime_t req_q_time; /* time of last fill level change */
451 was last set */ 447 u64 req_q_util; /* for accounting */
448 spinlock_t qdio_stat_lock;
452 u32 fsf_req_seq_no; /* FSF cmnd seq number */ 449 u32 fsf_req_seq_no; /* FSF cmnd seq number */
453 wait_queue_head_t request_wq; /* can be used to wait for 450 wait_queue_head_t request_wq; /* can be used to wait for
454 more avaliable SBALs */ 451 more avaliable SBALs */
@@ -514,6 +511,9 @@ struct zfcp_port {
514 u32 maxframe_size; 511 u32 maxframe_size;
515 u32 supported_classes; 512 u32 supported_classes;
516 struct work_struct gid_pn_work; 513 struct work_struct gid_pn_work;
514 struct work_struct test_link_work;
515 struct work_struct rport_work;
516 enum { RPORT_NONE, RPORT_ADD, RPORT_DEL } rport_task;
517}; 517};
518 518
519struct zfcp_unit { 519struct zfcp_unit {
@@ -587,9 +587,6 @@ struct zfcp_fsf_req_qtcb {
587 587
588/********************** ZFCP SPECIFIC DEFINES ********************************/ 588/********************** ZFCP SPECIFIC DEFINES ********************************/
589 589
590#define ZFCP_REQ_AUTO_CLEANUP 0x00000002
591#define ZFCP_REQ_NO_QTCB 0x00000008
592
593#define ZFCP_SET 0x00000100 590#define ZFCP_SET 0x00000100
594#define ZFCP_CLEAR 0x00000200 591#define ZFCP_CLEAR 0x00000200
595 592
diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index 387a3af528ac..631bdb1dfd6c 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Error Recovery Procedures (ERP). 4 * Error Recovery Procedures (ERP).
5 * 5 *
6 * Copyright IBM Corporation 2002, 2008 6 * Copyright IBM Corporation 2002, 2009
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
@@ -55,7 +55,7 @@ enum zfcp_erp_act_result {
55 55
56static void zfcp_erp_adapter_block(struct zfcp_adapter *adapter, int mask) 56static void zfcp_erp_adapter_block(struct zfcp_adapter *adapter, int mask)
57{ 57{
58 zfcp_erp_modify_adapter_status(adapter, 15, NULL, 58 zfcp_erp_modify_adapter_status(adapter, "erablk1", NULL,
59 ZFCP_STATUS_COMMON_UNBLOCKED | mask, 59 ZFCP_STATUS_COMMON_UNBLOCKED | mask,
60 ZFCP_CLEAR); 60 ZFCP_CLEAR);
61} 61}
@@ -75,9 +75,9 @@ static void zfcp_erp_action_ready(struct zfcp_erp_action *act)
75 struct zfcp_adapter *adapter = act->adapter; 75 struct zfcp_adapter *adapter = act->adapter;
76 76
77 list_move(&act->list, &act->adapter->erp_ready_head); 77 list_move(&act->list, &act->adapter->erp_ready_head);
78 zfcp_rec_dbf_event_action(146, act); 78 zfcp_rec_dbf_event_action("erardy1", act);
79 up(&adapter->erp_ready_sem); 79 up(&adapter->erp_ready_sem);
80 zfcp_rec_dbf_event_thread(2, adapter); 80 zfcp_rec_dbf_event_thread("erardy2", adapter);
81} 81}
82 82
83static void zfcp_erp_action_dismiss(struct zfcp_erp_action *act) 83static void zfcp_erp_action_dismiss(struct zfcp_erp_action *act)
@@ -208,7 +208,7 @@ static struct zfcp_erp_action *zfcp_erp_setup_act(int need,
208 208
209static int zfcp_erp_action_enqueue(int want, struct zfcp_adapter *adapter, 209static int zfcp_erp_action_enqueue(int want, struct zfcp_adapter *adapter,
210 struct zfcp_port *port, 210 struct zfcp_port *port,
211 struct zfcp_unit *unit, u8 id, void *ref) 211 struct zfcp_unit *unit, char *id, void *ref)
212{ 212{
213 int retval = 1, need; 213 int retval = 1, need;
214 struct zfcp_erp_action *act = NULL; 214 struct zfcp_erp_action *act = NULL;
@@ -228,7 +228,7 @@ static int zfcp_erp_action_enqueue(int want, struct zfcp_adapter *adapter,
228 ++adapter->erp_total_count; 228 ++adapter->erp_total_count;
229 list_add_tail(&act->list, &adapter->erp_ready_head); 229 list_add_tail(&act->list, &adapter->erp_ready_head);
230 up(&adapter->erp_ready_sem); 230 up(&adapter->erp_ready_sem);
231 zfcp_rec_dbf_event_thread(1, adapter); 231 zfcp_rec_dbf_event_thread("eracte1", adapter);
232 retval = 0; 232 retval = 0;
233 out: 233 out:
234 zfcp_rec_dbf_event_trigger(id, ref, want, need, act, 234 zfcp_rec_dbf_event_trigger(id, ref, want, need, act,
@@ -237,13 +237,14 @@ static int zfcp_erp_action_enqueue(int want, struct zfcp_adapter *adapter,
237} 237}
238 238
239static int _zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter, 239static int _zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter,
240 int clear_mask, u8 id, void *ref) 240 int clear_mask, char *id, void *ref)
241{ 241{
242 zfcp_erp_adapter_block(adapter, clear_mask); 242 zfcp_erp_adapter_block(adapter, clear_mask);
243 zfcp_scsi_schedule_rports_block(adapter);
243 244
244 /* ensure propagation of failed status to new devices */ 245 /* ensure propagation of failed status to new devices */
245 if (atomic_read(&adapter->status) & ZFCP_STATUS_COMMON_ERP_FAILED) { 246 if (atomic_read(&adapter->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
246 zfcp_erp_adapter_failed(adapter, 13, NULL); 247 zfcp_erp_adapter_failed(adapter, "erareo1", NULL);
247 return -EIO; 248 return -EIO;
248 } 249 }
249 return zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_ADAPTER, 250 return zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_ADAPTER,
@@ -258,7 +259,7 @@ static int _zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter,
258 * @ref: Reference for debug trace event. 259 * @ref: Reference for debug trace event.
259 */ 260 */
260void zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter, int clear, 261void zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter, int clear,
261 u8 id, void *ref) 262 char *id, void *ref)
262{ 263{
263 unsigned long flags; 264 unsigned long flags;
264 265
@@ -277,7 +278,7 @@ void zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter, int clear,
277 * @ref: Reference for debug trace event. 278 * @ref: Reference for debug trace event.
278 */ 279 */
279void zfcp_erp_adapter_shutdown(struct zfcp_adapter *adapter, int clear, 280void zfcp_erp_adapter_shutdown(struct zfcp_adapter *adapter, int clear,
280 u8 id, void *ref) 281 char *id, void *ref)
281{ 282{
282 int flags = ZFCP_STATUS_COMMON_RUNNING | ZFCP_STATUS_COMMON_ERP_FAILED; 283 int flags = ZFCP_STATUS_COMMON_RUNNING | ZFCP_STATUS_COMMON_ERP_FAILED;
283 zfcp_erp_adapter_reopen(adapter, clear | flags, id, ref); 284 zfcp_erp_adapter_reopen(adapter, clear | flags, id, ref);
@@ -290,7 +291,8 @@ void zfcp_erp_adapter_shutdown(struct zfcp_adapter *adapter, int clear,
290 * @id: Id for debug trace event. 291 * @id: Id for debug trace event.
291 * @ref: Reference for debug trace event. 292 * @ref: Reference for debug trace event.
292 */ 293 */
293void zfcp_erp_port_shutdown(struct zfcp_port *port, int clear, u8 id, void *ref) 294void zfcp_erp_port_shutdown(struct zfcp_port *port, int clear, char *id,
295 void *ref)
294{ 296{
295 int flags = ZFCP_STATUS_COMMON_RUNNING | ZFCP_STATUS_COMMON_ERP_FAILED; 297 int flags = ZFCP_STATUS_COMMON_RUNNING | ZFCP_STATUS_COMMON_ERP_FAILED;
296 zfcp_erp_port_reopen(port, clear | flags, id, ref); 298 zfcp_erp_port_reopen(port, clear | flags, id, ref);
@@ -303,7 +305,8 @@ void zfcp_erp_port_shutdown(struct zfcp_port *port, int clear, u8 id, void *ref)
303 * @id: Id for debug trace event. 305 * @id: Id for debug trace event.
304 * @ref: Reference for debug trace event. 306 * @ref: Reference for debug trace event.
305 */ 307 */
306void zfcp_erp_unit_shutdown(struct zfcp_unit *unit, int clear, u8 id, void *ref) 308void zfcp_erp_unit_shutdown(struct zfcp_unit *unit, int clear, char *id,
309 void *ref)
307{ 310{
308 int flags = ZFCP_STATUS_COMMON_RUNNING | ZFCP_STATUS_COMMON_ERP_FAILED; 311 int flags = ZFCP_STATUS_COMMON_RUNNING | ZFCP_STATUS_COMMON_ERP_FAILED;
309 zfcp_erp_unit_reopen(unit, clear | flags, id, ref); 312 zfcp_erp_unit_reopen(unit, clear | flags, id, ref);
@@ -311,15 +314,16 @@ void zfcp_erp_unit_shutdown(struct zfcp_unit *unit, int clear, u8 id, void *ref)
311 314
312static void zfcp_erp_port_block(struct zfcp_port *port, int clear) 315static void zfcp_erp_port_block(struct zfcp_port *port, int clear)
313{ 316{
314 zfcp_erp_modify_port_status(port, 17, NULL, 317 zfcp_erp_modify_port_status(port, "erpblk1", NULL,
315 ZFCP_STATUS_COMMON_UNBLOCKED | clear, 318 ZFCP_STATUS_COMMON_UNBLOCKED | clear,
316 ZFCP_CLEAR); 319 ZFCP_CLEAR);
317} 320}
318 321
319static void _zfcp_erp_port_forced_reopen(struct zfcp_port *port, 322static void _zfcp_erp_port_forced_reopen(struct zfcp_port *port,
320 int clear, u8 id, void *ref) 323 int clear, char *id, void *ref)
321{ 324{
322 zfcp_erp_port_block(port, clear); 325 zfcp_erp_port_block(port, clear);
326 zfcp_scsi_schedule_rport_block(port);
323 327
324 if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED) 328 if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED)
325 return; 329 return;
@@ -334,7 +338,7 @@ static void _zfcp_erp_port_forced_reopen(struct zfcp_port *port,
334 * @id: Id for debug trace event. 338 * @id: Id for debug trace event.
335 * @ref: Reference for debug trace event. 339 * @ref: Reference for debug trace event.
336 */ 340 */
337void zfcp_erp_port_forced_reopen(struct zfcp_port *port, int clear, u8 id, 341void zfcp_erp_port_forced_reopen(struct zfcp_port *port, int clear, char *id,
338 void *ref) 342 void *ref)
339{ 343{
340 unsigned long flags; 344 unsigned long flags;
@@ -347,14 +351,15 @@ void zfcp_erp_port_forced_reopen(struct zfcp_port *port, int clear, u8 id,
347 read_unlock_irqrestore(&zfcp_data.config_lock, flags); 351 read_unlock_irqrestore(&zfcp_data.config_lock, flags);
348} 352}
349 353
350static int _zfcp_erp_port_reopen(struct zfcp_port *port, int clear, u8 id, 354static int _zfcp_erp_port_reopen(struct zfcp_port *port, int clear, char *id,
351 void *ref) 355 void *ref)
352{ 356{
353 zfcp_erp_port_block(port, clear); 357 zfcp_erp_port_block(port, clear);
358 zfcp_scsi_schedule_rport_block(port);
354 359
355 if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED) { 360 if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
356 /* ensure propagation of failed status to new devices */ 361 /* ensure propagation of failed status to new devices */
357 zfcp_erp_port_failed(port, 14, NULL); 362 zfcp_erp_port_failed(port, "erpreo1", NULL);
358 return -EIO; 363 return -EIO;
359 } 364 }
360 365
@@ -369,7 +374,7 @@ static int _zfcp_erp_port_reopen(struct zfcp_port *port, int clear, u8 id,
369 * 374 *
370 * Returns 0 if recovery has been triggered, < 0 if not. 375 * Returns 0 if recovery has been triggered, < 0 if not.
371 */ 376 */
372int zfcp_erp_port_reopen(struct zfcp_port *port, int clear, u8 id, void *ref) 377int zfcp_erp_port_reopen(struct zfcp_port *port, int clear, char *id, void *ref)
373{ 378{
374 unsigned long flags; 379 unsigned long flags;
375 int retval; 380 int retval;
@@ -386,12 +391,12 @@ int zfcp_erp_port_reopen(struct zfcp_port *port, int clear, u8 id, void *ref)
386 391
387static void zfcp_erp_unit_block(struct zfcp_unit *unit, int clear_mask) 392static void zfcp_erp_unit_block(struct zfcp_unit *unit, int clear_mask)
388{ 393{
389 zfcp_erp_modify_unit_status(unit, 19, NULL, 394 zfcp_erp_modify_unit_status(unit, "erublk1", NULL,
390 ZFCP_STATUS_COMMON_UNBLOCKED | clear_mask, 395 ZFCP_STATUS_COMMON_UNBLOCKED | clear_mask,
391 ZFCP_CLEAR); 396 ZFCP_CLEAR);
392} 397}
393 398
394static void _zfcp_erp_unit_reopen(struct zfcp_unit *unit, int clear, u8 id, 399static void _zfcp_erp_unit_reopen(struct zfcp_unit *unit, int clear, char *id,
395 void *ref) 400 void *ref)
396{ 401{
397 struct zfcp_adapter *adapter = unit->port->adapter; 402 struct zfcp_adapter *adapter = unit->port->adapter;
@@ -411,7 +416,8 @@ static void _zfcp_erp_unit_reopen(struct zfcp_unit *unit, int clear, u8 id,
411 * @clear_mask: specifies flags in unit status to be cleared 416 * @clear_mask: specifies flags in unit status to be cleared
412 * Return: 0 on success, < 0 on error 417 * Return: 0 on success, < 0 on error
413 */ 418 */
414void zfcp_erp_unit_reopen(struct zfcp_unit *unit, int clear, u8 id, void *ref) 419void zfcp_erp_unit_reopen(struct zfcp_unit *unit, int clear, char *id,
420 void *ref)
415{ 421{
416 unsigned long flags; 422 unsigned long flags;
417 struct zfcp_port *port = unit->port; 423 struct zfcp_port *port = unit->port;
@@ -437,28 +443,28 @@ static int status_change_clear(unsigned long mask, atomic_t *status)
437static void zfcp_erp_adapter_unblock(struct zfcp_adapter *adapter) 443static void zfcp_erp_adapter_unblock(struct zfcp_adapter *adapter)
438{ 444{
439 if (status_change_set(ZFCP_STATUS_COMMON_UNBLOCKED, &adapter->status)) 445 if (status_change_set(ZFCP_STATUS_COMMON_UNBLOCKED, &adapter->status))
440 zfcp_rec_dbf_event_adapter(16, NULL, adapter); 446 zfcp_rec_dbf_event_adapter("eraubl1", NULL, adapter);
441 atomic_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED, &adapter->status); 447 atomic_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED, &adapter->status);
442} 448}
443 449
444static void zfcp_erp_port_unblock(struct zfcp_port *port) 450static void zfcp_erp_port_unblock(struct zfcp_port *port)
445{ 451{
446 if (status_change_set(ZFCP_STATUS_COMMON_UNBLOCKED, &port->status)) 452 if (status_change_set(ZFCP_STATUS_COMMON_UNBLOCKED, &port->status))
447 zfcp_rec_dbf_event_port(18, NULL, port); 453 zfcp_rec_dbf_event_port("erpubl1", NULL, port);
448 atomic_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED, &port->status); 454 atomic_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED, &port->status);
449} 455}
450 456
451static void zfcp_erp_unit_unblock(struct zfcp_unit *unit) 457static void zfcp_erp_unit_unblock(struct zfcp_unit *unit)
452{ 458{
453 if (status_change_set(ZFCP_STATUS_COMMON_UNBLOCKED, &unit->status)) 459 if (status_change_set(ZFCP_STATUS_COMMON_UNBLOCKED, &unit->status))
454 zfcp_rec_dbf_event_unit(20, NULL, unit); 460 zfcp_rec_dbf_event_unit("eruubl1", NULL, unit);
455 atomic_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED, &unit->status); 461 atomic_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED, &unit->status);
456} 462}
457 463
458static void zfcp_erp_action_to_running(struct zfcp_erp_action *erp_action) 464static void zfcp_erp_action_to_running(struct zfcp_erp_action *erp_action)
459{ 465{
460 list_move(&erp_action->list, &erp_action->adapter->erp_running_head); 466 list_move(&erp_action->list, &erp_action->adapter->erp_running_head);
461 zfcp_rec_dbf_event_action(145, erp_action); 467 zfcp_rec_dbf_event_action("erator1", erp_action);
462} 468}
463 469
464static void zfcp_erp_strategy_check_fsfreq(struct zfcp_erp_action *act) 470static void zfcp_erp_strategy_check_fsfreq(struct zfcp_erp_action *act)
@@ -474,11 +480,11 @@ static void zfcp_erp_strategy_check_fsfreq(struct zfcp_erp_action *act)
474 if (act->status & (ZFCP_STATUS_ERP_DISMISSED | 480 if (act->status & (ZFCP_STATUS_ERP_DISMISSED |
475 ZFCP_STATUS_ERP_TIMEDOUT)) { 481 ZFCP_STATUS_ERP_TIMEDOUT)) {
476 act->fsf_req->status |= ZFCP_STATUS_FSFREQ_DISMISSED; 482 act->fsf_req->status |= ZFCP_STATUS_FSFREQ_DISMISSED;
477 zfcp_rec_dbf_event_action(142, act); 483 zfcp_rec_dbf_event_action("erscf_1", act);
478 act->fsf_req->erp_action = NULL; 484 act->fsf_req->erp_action = NULL;
479 } 485 }
480 if (act->status & ZFCP_STATUS_ERP_TIMEDOUT) 486 if (act->status & ZFCP_STATUS_ERP_TIMEDOUT)
481 zfcp_rec_dbf_event_action(143, act); 487 zfcp_rec_dbf_event_action("erscf_2", act);
482 if (act->fsf_req->status & (ZFCP_STATUS_FSFREQ_COMPLETED | 488 if (act->fsf_req->status & (ZFCP_STATUS_FSFREQ_COMPLETED |
483 ZFCP_STATUS_FSFREQ_DISMISSED)) 489 ZFCP_STATUS_FSFREQ_DISMISSED))
484 act->fsf_req = NULL; 490 act->fsf_req = NULL;
@@ -530,7 +536,7 @@ static void zfcp_erp_strategy_memwait(struct zfcp_erp_action *erp_action)
530} 536}
531 537
532static void _zfcp_erp_port_reopen_all(struct zfcp_adapter *adapter, 538static void _zfcp_erp_port_reopen_all(struct zfcp_adapter *adapter,
533 int clear, u8 id, void *ref) 539 int clear, char *id, void *ref)
534{ 540{
535 struct zfcp_port *port; 541 struct zfcp_port *port;
536 542
@@ -538,8 +544,8 @@ static void _zfcp_erp_port_reopen_all(struct zfcp_adapter *adapter,
538 _zfcp_erp_port_reopen(port, clear, id, ref); 544 _zfcp_erp_port_reopen(port, clear, id, ref);
539} 545}
540 546
541static void _zfcp_erp_unit_reopen_all(struct zfcp_port *port, int clear, u8 id, 547static void _zfcp_erp_unit_reopen_all(struct zfcp_port *port, int clear,
542 void *ref) 548 char *id, void *ref)
543{ 549{
544 struct zfcp_unit *unit; 550 struct zfcp_unit *unit;
545 551
@@ -559,28 +565,28 @@ static void zfcp_erp_strategy_followup_actions(struct zfcp_erp_action *act)
559 565
560 case ZFCP_ERP_ACTION_REOPEN_ADAPTER: 566 case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
561 if (status == ZFCP_ERP_SUCCEEDED) 567 if (status == ZFCP_ERP_SUCCEEDED)
562 _zfcp_erp_port_reopen_all(adapter, 0, 70, NULL); 568 _zfcp_erp_port_reopen_all(adapter, 0, "ersfa_1", NULL);
563 else 569 else
564 _zfcp_erp_adapter_reopen(adapter, 0, 71, NULL); 570 _zfcp_erp_adapter_reopen(adapter, 0, "ersfa_2", NULL);
565 break; 571 break;
566 572
567 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED: 573 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
568 if (status == ZFCP_ERP_SUCCEEDED) 574 if (status == ZFCP_ERP_SUCCEEDED)
569 _zfcp_erp_port_reopen(port, 0, 72, NULL); 575 _zfcp_erp_port_reopen(port, 0, "ersfa_3", NULL);
570 else 576 else
571 _zfcp_erp_adapter_reopen(adapter, 0, 73, NULL); 577 _zfcp_erp_adapter_reopen(adapter, 0, "ersfa_4", NULL);
572 break; 578 break;
573 579
574 case ZFCP_ERP_ACTION_REOPEN_PORT: 580 case ZFCP_ERP_ACTION_REOPEN_PORT:
575 if (status == ZFCP_ERP_SUCCEEDED) 581 if (status == ZFCP_ERP_SUCCEEDED)
576 _zfcp_erp_unit_reopen_all(port, 0, 74, NULL); 582 _zfcp_erp_unit_reopen_all(port, 0, "ersfa_5", NULL);
577 else 583 else
578 _zfcp_erp_port_forced_reopen(port, 0, 75, NULL); 584 _zfcp_erp_port_forced_reopen(port, 0, "ersfa_6", NULL);
579 break; 585 break;
580 586
581 case ZFCP_ERP_ACTION_REOPEN_UNIT: 587 case ZFCP_ERP_ACTION_REOPEN_UNIT:
582 if (status != ZFCP_ERP_SUCCEEDED) 588 if (status != ZFCP_ERP_SUCCEEDED)
583 _zfcp_erp_port_reopen(unit->port, 0, 76, NULL); 589 _zfcp_erp_port_reopen(unit->port, 0, "ersfa_7", NULL);
584 break; 590 break;
585 } 591 }
586} 592}
@@ -617,7 +623,7 @@ static void zfcp_erp_enqueue_ptp_port(struct zfcp_adapter *adapter)
617 adapter->peer_d_id); 623 adapter->peer_d_id);
618 if (IS_ERR(port)) /* error or port already attached */ 624 if (IS_ERR(port)) /* error or port already attached */
619 return; 625 return;
620 _zfcp_erp_port_reopen(port, 0, 150, NULL); 626 _zfcp_erp_port_reopen(port, 0, "ereptp1", NULL);
621} 627}
622 628
623static int zfcp_erp_adapter_strat_fsf_xconf(struct zfcp_erp_action *erp_action) 629static int zfcp_erp_adapter_strat_fsf_xconf(struct zfcp_erp_action *erp_action)
@@ -640,9 +646,9 @@ static int zfcp_erp_adapter_strat_fsf_xconf(struct zfcp_erp_action *erp_action)
640 return ZFCP_ERP_FAILED; 646 return ZFCP_ERP_FAILED;
641 } 647 }
642 648
643 zfcp_rec_dbf_event_thread_lock(6, adapter); 649 zfcp_rec_dbf_event_thread_lock("erasfx1", adapter);
644 down(&adapter->erp_ready_sem); 650 down(&adapter->erp_ready_sem);
645 zfcp_rec_dbf_event_thread_lock(7, adapter); 651 zfcp_rec_dbf_event_thread_lock("erasfx2", adapter);
646 if (erp_action->status & ZFCP_STATUS_ERP_TIMEDOUT) 652 if (erp_action->status & ZFCP_STATUS_ERP_TIMEDOUT)
647 break; 653 break;
648 654
@@ -681,9 +687,9 @@ static int zfcp_erp_adapter_strategy_open_fsf_xport(struct zfcp_erp_action *act)
681 if (ret) 687 if (ret)
682 return ZFCP_ERP_FAILED; 688 return ZFCP_ERP_FAILED;
683 689
684 zfcp_rec_dbf_event_thread_lock(8, adapter); 690 zfcp_rec_dbf_event_thread_lock("erasox1", adapter);
685 down(&adapter->erp_ready_sem); 691 down(&adapter->erp_ready_sem);
686 zfcp_rec_dbf_event_thread_lock(9, adapter); 692 zfcp_rec_dbf_event_thread_lock("erasox2", adapter);
687 if (act->status & ZFCP_STATUS_ERP_TIMEDOUT) 693 if (act->status & ZFCP_STATUS_ERP_TIMEDOUT)
688 return ZFCP_ERP_FAILED; 694 return ZFCP_ERP_FAILED;
689 695
@@ -705,60 +711,59 @@ static int zfcp_erp_adapter_strategy_open_fsf(struct zfcp_erp_action *act)
705 return ZFCP_ERP_SUCCEEDED; 711 return ZFCP_ERP_SUCCEEDED;
706} 712}
707 713
708static int zfcp_erp_adapter_strategy_generic(struct zfcp_erp_action *act, 714static void zfcp_erp_adapter_strategy_close(struct zfcp_erp_action *act)
709 int close)
710{ 715{
711 int retval = ZFCP_ERP_SUCCEEDED;
712 struct zfcp_adapter *adapter = act->adapter; 716 struct zfcp_adapter *adapter = act->adapter;
713 717
714 if (close)
715 goto close_only;
716
717 retval = zfcp_erp_adapter_strategy_open_qdio(act);
718 if (retval != ZFCP_ERP_SUCCEEDED)
719 goto failed_qdio;
720
721 retval = zfcp_erp_adapter_strategy_open_fsf(act);
722 if (retval != ZFCP_ERP_SUCCEEDED)
723 goto failed_openfcp;
724
725 atomic_set_mask(ZFCP_STATUS_COMMON_OPEN, &act->adapter->status);
726
727 return ZFCP_ERP_SUCCEEDED;
728
729 close_only:
730 atomic_clear_mask(ZFCP_STATUS_COMMON_OPEN,
731 &act->adapter->status);
732
733 failed_openfcp:
734 /* close queues to ensure that buffers are not accessed by adapter */ 718 /* close queues to ensure that buffers are not accessed by adapter */
735 zfcp_qdio_close(adapter); 719 zfcp_qdio_close(adapter);
736 zfcp_fsf_req_dismiss_all(adapter); 720 zfcp_fsf_req_dismiss_all(adapter);
737 adapter->fsf_req_seq_no = 0; 721 adapter->fsf_req_seq_no = 0;
738 /* all ports and units are closed */ 722 /* all ports and units are closed */
739 zfcp_erp_modify_adapter_status(adapter, 24, NULL, 723 zfcp_erp_modify_adapter_status(adapter, "erascl1", NULL,
740 ZFCP_STATUS_COMMON_OPEN, ZFCP_CLEAR); 724 ZFCP_STATUS_COMMON_OPEN, ZFCP_CLEAR);
741 failed_qdio: 725
742 atomic_clear_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK | 726 atomic_clear_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK |
743 ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED, 727 ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED, &adapter->status);
744 &act->adapter->status);
745 return retval;
746} 728}
747 729
748static int zfcp_erp_adapter_strategy(struct zfcp_erp_action *act) 730static int zfcp_erp_adapter_strategy_open(struct zfcp_erp_action *act)
749{ 731{
750 int retval; 732 struct zfcp_adapter *adapter = act->adapter;
751 733
752 zfcp_erp_adapter_strategy_generic(act, 1); /* close */ 734 if (zfcp_erp_adapter_strategy_open_qdio(act)) {
753 if (act->status & ZFCP_STATUS_ERP_CLOSE_ONLY) 735 atomic_clear_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK |
754 return ZFCP_ERP_EXIT; 736 ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED,
737 &adapter->status);
738 return ZFCP_ERP_FAILED;
739 }
740
741 if (zfcp_erp_adapter_strategy_open_fsf(act)) {
742 zfcp_erp_adapter_strategy_close(act);
743 return ZFCP_ERP_FAILED;
744 }
745
746 atomic_set_mask(ZFCP_STATUS_COMMON_OPEN, &adapter->status);
747
748 return ZFCP_ERP_SUCCEEDED;
749}
755 750
756 retval = zfcp_erp_adapter_strategy_generic(act, 0); /* open */ 751static int zfcp_erp_adapter_strategy(struct zfcp_erp_action *act)
752{
753 struct zfcp_adapter *adapter = act->adapter;
757 754
758 if (retval == ZFCP_ERP_FAILED) 755 if (atomic_read(&adapter->status) & ZFCP_STATUS_COMMON_OPEN) {
756 zfcp_erp_adapter_strategy_close(act);
757 if (act->status & ZFCP_STATUS_ERP_CLOSE_ONLY)
758 return ZFCP_ERP_EXIT;
759 }
760
761 if (zfcp_erp_adapter_strategy_open(act)) {
759 ssleep(8); 762 ssleep(8);
763 return ZFCP_ERP_FAILED;
764 }
760 765
761 return retval; 766 return ZFCP_ERP_SUCCEEDED;
762} 767}
763 768
764static int zfcp_erp_port_forced_strategy_close(struct zfcp_erp_action *act) 769static int zfcp_erp_port_forced_strategy_close(struct zfcp_erp_action *act)
@@ -777,10 +782,7 @@ static int zfcp_erp_port_forced_strategy_close(struct zfcp_erp_action *act)
777 782
778static void zfcp_erp_port_strategy_clearstati(struct zfcp_port *port) 783static void zfcp_erp_port_strategy_clearstati(struct zfcp_port *port)
779{ 784{
780 atomic_clear_mask(ZFCP_STATUS_COMMON_ACCESS_DENIED | 785 atomic_clear_mask(ZFCP_STATUS_COMMON_ACCESS_DENIED, &port->status);
781 ZFCP_STATUS_PORT_PHYS_CLOSING |
782 ZFCP_STATUS_PORT_INVALID_WWPN,
783 &port->status);
784} 786}
785 787
786static int zfcp_erp_port_forced_strategy(struct zfcp_erp_action *erp_action) 788static int zfcp_erp_port_forced_strategy(struct zfcp_erp_action *erp_action)
@@ -836,7 +838,7 @@ static int zfcp_erp_open_ptp_port(struct zfcp_erp_action *act)
836 struct zfcp_port *port = act->port; 838 struct zfcp_port *port = act->port;
837 839
838 if (port->wwpn != adapter->peer_wwpn) { 840 if (port->wwpn != adapter->peer_wwpn) {
839 zfcp_erp_port_failed(port, 25, NULL); 841 zfcp_erp_port_failed(port, "eroptp1", NULL);
840 return ZFCP_ERP_FAILED; 842 return ZFCP_ERP_FAILED;
841 } 843 }
842 port->d_id = adapter->peer_d_id; 844 port->d_id = adapter->peer_d_id;
@@ -855,7 +857,7 @@ void zfcp_erp_port_strategy_open_lookup(struct work_struct *work)
855 port->erp_action.step = ZFCP_ERP_STEP_NAMESERVER_LOOKUP; 857 port->erp_action.step = ZFCP_ERP_STEP_NAMESERVER_LOOKUP;
856 if (retval) 858 if (retval)
857 zfcp_erp_notify(&port->erp_action, ZFCP_ERP_FAILED); 859 zfcp_erp_notify(&port->erp_action, ZFCP_ERP_FAILED);
858 860 zfcp_port_put(port);
859} 861}
860 862
861static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *act) 863static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *act)
@@ -871,17 +873,15 @@ static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *act)
871 if (fc_host_port_type(adapter->scsi_host) == FC_PORTTYPE_PTP) 873 if (fc_host_port_type(adapter->scsi_host) == FC_PORTTYPE_PTP)
872 return zfcp_erp_open_ptp_port(act); 874 return zfcp_erp_open_ptp_port(act);
873 if (!port->d_id) { 875 if (!port->d_id) {
874 queue_work(zfcp_data.work_queue, &port->gid_pn_work); 876 zfcp_port_get(port);
877 if (!queue_work(zfcp_data.work_queue,
878 &port->gid_pn_work))
879 zfcp_port_put(port);
875 return ZFCP_ERP_CONTINUES; 880 return ZFCP_ERP_CONTINUES;
876 } 881 }
877 case ZFCP_ERP_STEP_NAMESERVER_LOOKUP: 882 case ZFCP_ERP_STEP_NAMESERVER_LOOKUP:
878 if (!port->d_id) { 883 if (!port->d_id)
879 if (p_status & (ZFCP_STATUS_PORT_INVALID_WWPN)) {
880 zfcp_erp_port_failed(port, 26, NULL);
881 return ZFCP_ERP_EXIT;
882 }
883 return ZFCP_ERP_FAILED; 884 return ZFCP_ERP_FAILED;
884 }
885 return zfcp_erp_port_strategy_open_port(act); 885 return zfcp_erp_port_strategy_open_port(act);
886 886
887 case ZFCP_ERP_STEP_PORT_OPENING: 887 case ZFCP_ERP_STEP_PORT_OPENING:
@@ -995,7 +995,7 @@ static int zfcp_erp_strategy_check_unit(struct zfcp_unit *unit, int result)
995 "port 0x%016Lx\n", 995 "port 0x%016Lx\n",
996 (unsigned long long)unit->fcp_lun, 996 (unsigned long long)unit->fcp_lun,
997 (unsigned long long)unit->port->wwpn); 997 (unsigned long long)unit->port->wwpn);
998 zfcp_erp_unit_failed(unit, 21, NULL); 998 zfcp_erp_unit_failed(unit, "erusck1", NULL);
999 } 999 }
1000 break; 1000 break;
1001 } 1001 }
@@ -1025,7 +1025,7 @@ static int zfcp_erp_strategy_check_port(struct zfcp_port *port, int result)
1025 dev_err(&port->adapter->ccw_device->dev, 1025 dev_err(&port->adapter->ccw_device->dev,
1026 "ERP failed for remote port 0x%016Lx\n", 1026 "ERP failed for remote port 0x%016Lx\n",
1027 (unsigned long long)port->wwpn); 1027 (unsigned long long)port->wwpn);
1028 zfcp_erp_port_failed(port, 22, NULL); 1028 zfcp_erp_port_failed(port, "erpsck1", NULL);
1029 } 1029 }
1030 break; 1030 break;
1031 } 1031 }
@@ -1052,7 +1052,7 @@ static int zfcp_erp_strategy_check_adapter(struct zfcp_adapter *adapter,
1052 dev_err(&adapter->ccw_device->dev, 1052 dev_err(&adapter->ccw_device->dev,
1053 "ERP cannot recover an error " 1053 "ERP cannot recover an error "
1054 "on the FCP device\n"); 1054 "on the FCP device\n");
1055 zfcp_erp_adapter_failed(adapter, 23, NULL); 1055 zfcp_erp_adapter_failed(adapter, "erasck1", NULL);
1056 } 1056 }
1057 break; 1057 break;
1058 } 1058 }
@@ -1117,7 +1117,7 @@ static int zfcp_erp_strategy_statechange(struct zfcp_erp_action *act, int ret)
1117 if (zfcp_erp_strat_change_det(&adapter->status, erp_status)) { 1117 if (zfcp_erp_strat_change_det(&adapter->status, erp_status)) {
1118 _zfcp_erp_adapter_reopen(adapter, 1118 _zfcp_erp_adapter_reopen(adapter,
1119 ZFCP_STATUS_COMMON_ERP_FAILED, 1119 ZFCP_STATUS_COMMON_ERP_FAILED,
1120 67, NULL); 1120 "ersscg1", NULL);
1121 return ZFCP_ERP_EXIT; 1121 return ZFCP_ERP_EXIT;
1122 } 1122 }
1123 break; 1123 break;
@@ -1127,7 +1127,7 @@ static int zfcp_erp_strategy_statechange(struct zfcp_erp_action *act, int ret)
1127 if (zfcp_erp_strat_change_det(&port->status, erp_status)) { 1127 if (zfcp_erp_strat_change_det(&port->status, erp_status)) {
1128 _zfcp_erp_port_reopen(port, 1128 _zfcp_erp_port_reopen(port,
1129 ZFCP_STATUS_COMMON_ERP_FAILED, 1129 ZFCP_STATUS_COMMON_ERP_FAILED,
1130 68, NULL); 1130 "ersscg2", NULL);
1131 return ZFCP_ERP_EXIT; 1131 return ZFCP_ERP_EXIT;
1132 } 1132 }
1133 break; 1133 break;
@@ -1136,7 +1136,7 @@ static int zfcp_erp_strategy_statechange(struct zfcp_erp_action *act, int ret)
1136 if (zfcp_erp_strat_change_det(&unit->status, erp_status)) { 1136 if (zfcp_erp_strat_change_det(&unit->status, erp_status)) {
1137 _zfcp_erp_unit_reopen(unit, 1137 _zfcp_erp_unit_reopen(unit,
1138 ZFCP_STATUS_COMMON_ERP_FAILED, 1138 ZFCP_STATUS_COMMON_ERP_FAILED,
1139 69, NULL); 1139 "ersscg3", NULL);
1140 return ZFCP_ERP_EXIT; 1140 return ZFCP_ERP_EXIT;
1141 } 1141 }
1142 break; 1142 break;
@@ -1155,7 +1155,7 @@ static void zfcp_erp_action_dequeue(struct zfcp_erp_action *erp_action)
1155 } 1155 }
1156 1156
1157 list_del(&erp_action->list); 1157 list_del(&erp_action->list);
1158 zfcp_rec_dbf_event_action(144, erp_action); 1158 zfcp_rec_dbf_event_action("eractd1", erp_action);
1159 1159
1160 switch (erp_action->action) { 1160 switch (erp_action->action) {
1161 case ZFCP_ERP_ACTION_REOPEN_UNIT: 1161 case ZFCP_ERP_ACTION_REOPEN_UNIT:
@@ -1214,38 +1214,8 @@ static void zfcp_erp_schedule_work(struct zfcp_unit *unit)
1214 atomic_set_mask(ZFCP_STATUS_UNIT_SCSI_WORK_PENDING, &unit->status); 1214 atomic_set_mask(ZFCP_STATUS_UNIT_SCSI_WORK_PENDING, &unit->status);
1215 INIT_WORK(&p->work, zfcp_erp_scsi_scan); 1215 INIT_WORK(&p->work, zfcp_erp_scsi_scan);
1216 p->unit = unit; 1216 p->unit = unit;
1217 queue_work(zfcp_data.work_queue, &p->work); 1217 if (!queue_work(zfcp_data.work_queue, &p->work))
1218} 1218 zfcp_unit_put(unit);
1219
1220static void zfcp_erp_rport_register(struct zfcp_port *port)
1221{
1222 struct fc_rport_identifiers ids;
1223 ids.node_name = port->wwnn;
1224 ids.port_name = port->wwpn;
1225 ids.port_id = port->d_id;
1226 ids.roles = FC_RPORT_ROLE_FCP_TARGET;
1227 port->rport = fc_remote_port_add(port->adapter->scsi_host, 0, &ids);
1228 if (!port->rport) {
1229 dev_err(&port->adapter->ccw_device->dev,
1230 "Registering port 0x%016Lx failed\n",
1231 (unsigned long long)port->wwpn);
1232 return;
1233 }
1234
1235 scsi_target_unblock(&port->rport->dev);
1236 port->rport->maxframe_size = port->maxframe_size;
1237 port->rport->supported_classes = port->supported_classes;
1238}
1239
1240static void zfcp_erp_rports_del(struct zfcp_adapter *adapter)
1241{
1242 struct zfcp_port *port;
1243 list_for_each_entry(port, &adapter->port_list_head, list) {
1244 if (!port->rport)
1245 continue;
1246 fc_remote_port_delete(port->rport);
1247 port->rport = NULL;
1248 }
1249} 1219}
1250 1220
1251static void zfcp_erp_action_cleanup(struct zfcp_erp_action *act, int result) 1221static void zfcp_erp_action_cleanup(struct zfcp_erp_action *act, int result)
@@ -1256,10 +1226,8 @@ static void zfcp_erp_action_cleanup(struct zfcp_erp_action *act, int result)
1256 1226
1257 switch (act->action) { 1227 switch (act->action) {
1258 case ZFCP_ERP_ACTION_REOPEN_UNIT: 1228 case ZFCP_ERP_ACTION_REOPEN_UNIT:
1259 if ((result == ZFCP_ERP_SUCCEEDED) && 1229 flush_work(&port->rport_work);
1260 !unit->device && port->rport) { 1230 if ((result == ZFCP_ERP_SUCCEEDED) && !unit->device) {
1261 atomic_set_mask(ZFCP_STATUS_UNIT_REGISTERED,
1262 &unit->status);
1263 if (!(atomic_read(&unit->status) & 1231 if (!(atomic_read(&unit->status) &
1264 ZFCP_STATUS_UNIT_SCSI_WORK_PENDING)) 1232 ZFCP_STATUS_UNIT_SCSI_WORK_PENDING))
1265 zfcp_erp_schedule_work(unit); 1233 zfcp_erp_schedule_work(unit);
@@ -1269,27 +1237,17 @@ static void zfcp_erp_action_cleanup(struct zfcp_erp_action *act, int result)
1269 1237
1270 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED: 1238 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
1271 case ZFCP_ERP_ACTION_REOPEN_PORT: 1239 case ZFCP_ERP_ACTION_REOPEN_PORT:
1272 if (atomic_read(&port->status) & ZFCP_STATUS_PORT_NO_WWPN) { 1240 if (result == ZFCP_ERP_SUCCEEDED)
1273 zfcp_port_put(port); 1241 zfcp_scsi_schedule_rport_register(port);
1274 return;
1275 }
1276 if ((result == ZFCP_ERP_SUCCEEDED) && !port->rport)
1277 zfcp_erp_rport_register(port);
1278 if ((result != ZFCP_ERP_SUCCEEDED) && port->rport) {
1279 fc_remote_port_delete(port->rport);
1280 port->rport = NULL;
1281 }
1282 zfcp_port_put(port); 1242 zfcp_port_put(port);
1283 break; 1243 break;
1284 1244
1285 case ZFCP_ERP_ACTION_REOPEN_ADAPTER: 1245 case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
1286 if (result != ZFCP_ERP_SUCCEEDED) { 1246 if (result == ZFCP_ERP_SUCCEEDED) {
1287 unregister_service_level(&adapter->service_level);
1288 zfcp_erp_rports_del(adapter);
1289 } else {
1290 register_service_level(&adapter->service_level); 1247 register_service_level(&adapter->service_level);
1291 schedule_work(&adapter->scan_work); 1248 schedule_work(&adapter->scan_work);
1292 } 1249 } else
1250 unregister_service_level(&adapter->service_level);
1293 zfcp_adapter_put(adapter); 1251 zfcp_adapter_put(adapter);
1294 break; 1252 break;
1295 } 1253 }
@@ -1346,7 +1304,7 @@ static int zfcp_erp_strategy(struct zfcp_erp_action *erp_action)
1346 erp_action->status |= ZFCP_STATUS_ERP_LOWMEM; 1304 erp_action->status |= ZFCP_STATUS_ERP_LOWMEM;
1347 } 1305 }
1348 if (adapter->erp_total_count == adapter->erp_low_mem_count) 1306 if (adapter->erp_total_count == adapter->erp_low_mem_count)
1349 _zfcp_erp_adapter_reopen(adapter, 0, 66, NULL); 1307 _zfcp_erp_adapter_reopen(adapter, 0, "erstgy1", NULL);
1350 else { 1308 else {
1351 zfcp_erp_strategy_memwait(erp_action); 1309 zfcp_erp_strategy_memwait(erp_action);
1352 retval = ZFCP_ERP_CONTINUES; 1310 retval = ZFCP_ERP_CONTINUES;
@@ -1406,9 +1364,9 @@ static int zfcp_erp_thread(void *data)
1406 zfcp_erp_wakeup(adapter); 1364 zfcp_erp_wakeup(adapter);
1407 } 1365 }
1408 1366
1409 zfcp_rec_dbf_event_thread_lock(4, adapter); 1367 zfcp_rec_dbf_event_thread_lock("erthrd1", adapter);
1410 ignore = down_interruptible(&adapter->erp_ready_sem); 1368 ignore = down_interruptible(&adapter->erp_ready_sem);
1411 zfcp_rec_dbf_event_thread_lock(5, adapter); 1369 zfcp_rec_dbf_event_thread_lock("erthrd2", adapter);
1412 } 1370 }
1413 1371
1414 atomic_clear_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP, &adapter->status); 1372 atomic_clear_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP, &adapter->status);
@@ -1453,7 +1411,7 @@ void zfcp_erp_thread_kill(struct zfcp_adapter *adapter)
1453{ 1411{
1454 atomic_set_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_KILL, &adapter->status); 1412 atomic_set_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_KILL, &adapter->status);
1455 up(&adapter->erp_ready_sem); 1413 up(&adapter->erp_ready_sem);
1456 zfcp_rec_dbf_event_thread_lock(3, adapter); 1414 zfcp_rec_dbf_event_thread_lock("erthrk1", adapter);
1457 1415
1458 wait_event(adapter->erp_thread_wqh, 1416 wait_event(adapter->erp_thread_wqh,
1459 !(atomic_read(&adapter->status) & 1417 !(atomic_read(&adapter->status) &
@@ -1469,7 +1427,7 @@ void zfcp_erp_thread_kill(struct zfcp_adapter *adapter)
1469 * @id: Event id for debug trace. 1427 * @id: Event id for debug trace.
1470 * @ref: Reference for debug trace. 1428 * @ref: Reference for debug trace.
1471 */ 1429 */
1472void zfcp_erp_adapter_failed(struct zfcp_adapter *adapter, u8 id, void *ref) 1430void zfcp_erp_adapter_failed(struct zfcp_adapter *adapter, char *id, void *ref)
1473{ 1431{
1474 zfcp_erp_modify_adapter_status(adapter, id, ref, 1432 zfcp_erp_modify_adapter_status(adapter, id, ref,
1475 ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET); 1433 ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET);
@@ -1481,7 +1439,7 @@ void zfcp_erp_adapter_failed(struct zfcp_adapter *adapter, u8 id, void *ref)
1481 * @id: Event id for debug trace. 1439 * @id: Event id for debug trace.
1482 * @ref: Reference for debug trace. 1440 * @ref: Reference for debug trace.
1483 */ 1441 */
1484void zfcp_erp_port_failed(struct zfcp_port *port, u8 id, void *ref) 1442void zfcp_erp_port_failed(struct zfcp_port *port, char *id, void *ref)
1485{ 1443{
1486 zfcp_erp_modify_port_status(port, id, ref, 1444 zfcp_erp_modify_port_status(port, id, ref,
1487 ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET); 1445 ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET);
@@ -1493,7 +1451,7 @@ void zfcp_erp_port_failed(struct zfcp_port *port, u8 id, void *ref)
1493 * @id: Event id for debug trace. 1451 * @id: Event id for debug trace.
1494 * @ref: Reference for debug trace. 1452 * @ref: Reference for debug trace.
1495 */ 1453 */
1496void zfcp_erp_unit_failed(struct zfcp_unit *unit, u8 id, void *ref) 1454void zfcp_erp_unit_failed(struct zfcp_unit *unit, char *id, void *ref)
1497{ 1455{
1498 zfcp_erp_modify_unit_status(unit, id, ref, 1456 zfcp_erp_modify_unit_status(unit, id, ref,
1499 ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET); 1457 ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET);
@@ -1520,7 +1478,7 @@ void zfcp_erp_wait(struct zfcp_adapter *adapter)
1520 * 1478 *
1521 * Changes in common status bits are propagated to attached ports and units. 1479 * Changes in common status bits are propagated to attached ports and units.
1522 */ 1480 */
1523void zfcp_erp_modify_adapter_status(struct zfcp_adapter *adapter, u8 id, 1481void zfcp_erp_modify_adapter_status(struct zfcp_adapter *adapter, char *id,
1524 void *ref, u32 mask, int set_or_clear) 1482 void *ref, u32 mask, int set_or_clear)
1525{ 1483{
1526 struct zfcp_port *port; 1484 struct zfcp_port *port;
@@ -1554,7 +1512,7 @@ void zfcp_erp_modify_adapter_status(struct zfcp_adapter *adapter, u8 id,
1554 * 1512 *
1555 * Changes in common status bits are propagated to attached units. 1513 * Changes in common status bits are propagated to attached units.
1556 */ 1514 */
1557void zfcp_erp_modify_port_status(struct zfcp_port *port, u8 id, void *ref, 1515void zfcp_erp_modify_port_status(struct zfcp_port *port, char *id, void *ref,
1558 u32 mask, int set_or_clear) 1516 u32 mask, int set_or_clear)
1559{ 1517{
1560 struct zfcp_unit *unit; 1518 struct zfcp_unit *unit;
@@ -1586,7 +1544,7 @@ void zfcp_erp_modify_port_status(struct zfcp_port *port, u8 id, void *ref,
1586 * @mask: status bits to change 1544 * @mask: status bits to change
1587 * @set_or_clear: ZFCP_SET or ZFCP_CLEAR 1545 * @set_or_clear: ZFCP_SET or ZFCP_CLEAR
1588 */ 1546 */
1589void zfcp_erp_modify_unit_status(struct zfcp_unit *unit, u8 id, void *ref, 1547void zfcp_erp_modify_unit_status(struct zfcp_unit *unit, char *id, void *ref,
1590 u32 mask, int set_or_clear) 1548 u32 mask, int set_or_clear)
1591{ 1549{
1592 if (set_or_clear == ZFCP_SET) { 1550 if (set_or_clear == ZFCP_SET) {
@@ -1609,7 +1567,7 @@ void zfcp_erp_modify_unit_status(struct zfcp_unit *unit, u8 id, void *ref,
1609 * @id: The debug trace id. 1567 * @id: The debug trace id.
1610 * @id: Reference for the debug trace. 1568 * @id: Reference for the debug trace.
1611 */ 1569 */
1612void zfcp_erp_port_boxed(struct zfcp_port *port, u8 id, void *ref) 1570void zfcp_erp_port_boxed(struct zfcp_port *port, char *id, void *ref)
1613{ 1571{
1614 unsigned long flags; 1572 unsigned long flags;
1615 1573
@@ -1626,7 +1584,7 @@ void zfcp_erp_port_boxed(struct zfcp_port *port, u8 id, void *ref)
1626 * @id: The debug trace id. 1584 * @id: The debug trace id.
1627 * @id: Reference for the debug trace. 1585 * @id: Reference for the debug trace.
1628 */ 1586 */
1629void zfcp_erp_unit_boxed(struct zfcp_unit *unit, u8 id, void *ref) 1587void zfcp_erp_unit_boxed(struct zfcp_unit *unit, char *id, void *ref)
1630{ 1588{
1631 zfcp_erp_modify_unit_status(unit, id, ref, 1589 zfcp_erp_modify_unit_status(unit, id, ref,
1632 ZFCP_STATUS_COMMON_ACCESS_BOXED, ZFCP_SET); 1590 ZFCP_STATUS_COMMON_ACCESS_BOXED, ZFCP_SET);
@@ -1642,7 +1600,7 @@ void zfcp_erp_unit_boxed(struct zfcp_unit *unit, u8 id, void *ref)
1642 * Since the adapter has denied access, stop using the port and the 1600 * Since the adapter has denied access, stop using the port and the
1643 * attached units. 1601 * attached units.
1644 */ 1602 */
1645void zfcp_erp_port_access_denied(struct zfcp_port *port, u8 id, void *ref) 1603void zfcp_erp_port_access_denied(struct zfcp_port *port, char *id, void *ref)
1646{ 1604{
1647 unsigned long flags; 1605 unsigned long flags;
1648 1606
@@ -1661,14 +1619,14 @@ void zfcp_erp_port_access_denied(struct zfcp_port *port, u8 id, void *ref)
1661 * 1619 *
1662 * Since the adapter has denied access, stop using the unit. 1620 * Since the adapter has denied access, stop using the unit.
1663 */ 1621 */
1664void zfcp_erp_unit_access_denied(struct zfcp_unit *unit, u8 id, void *ref) 1622void zfcp_erp_unit_access_denied(struct zfcp_unit *unit, char *id, void *ref)
1665{ 1623{
1666 zfcp_erp_modify_unit_status(unit, id, ref, 1624 zfcp_erp_modify_unit_status(unit, id, ref,
1667 ZFCP_STATUS_COMMON_ERP_FAILED | 1625 ZFCP_STATUS_COMMON_ERP_FAILED |
1668 ZFCP_STATUS_COMMON_ACCESS_DENIED, ZFCP_SET); 1626 ZFCP_STATUS_COMMON_ACCESS_DENIED, ZFCP_SET);
1669} 1627}
1670 1628
1671static void zfcp_erp_unit_access_changed(struct zfcp_unit *unit, u8 id, 1629static void zfcp_erp_unit_access_changed(struct zfcp_unit *unit, char *id,
1672 void *ref) 1630 void *ref)
1673{ 1631{
1674 int status = atomic_read(&unit->status); 1632 int status = atomic_read(&unit->status);
@@ -1679,7 +1637,7 @@ static void zfcp_erp_unit_access_changed(struct zfcp_unit *unit, u8 id,
1679 zfcp_erp_unit_reopen(unit, ZFCP_STATUS_COMMON_ERP_FAILED, id, ref); 1637 zfcp_erp_unit_reopen(unit, ZFCP_STATUS_COMMON_ERP_FAILED, id, ref);
1680} 1638}
1681 1639
1682static void zfcp_erp_port_access_changed(struct zfcp_port *port, u8 id, 1640static void zfcp_erp_port_access_changed(struct zfcp_port *port, char *id,
1683 void *ref) 1641 void *ref)
1684{ 1642{
1685 struct zfcp_unit *unit; 1643 struct zfcp_unit *unit;
@@ -1701,7 +1659,7 @@ static void zfcp_erp_port_access_changed(struct zfcp_port *port, u8 id,
1701 * @id: Id for debug trace 1659 * @id: Id for debug trace
1702 * @ref: Reference for debug trace 1660 * @ref: Reference for debug trace
1703 */ 1661 */
1704void zfcp_erp_adapter_access_changed(struct zfcp_adapter *adapter, u8 id, 1662void zfcp_erp_adapter_access_changed(struct zfcp_adapter *adapter, char *id,
1705 void *ref) 1663 void *ref)
1706{ 1664{
1707 struct zfcp_port *port; 1665 struct zfcp_port *port;
diff --git a/drivers/s390/scsi/zfcp_ext.h b/drivers/s390/scsi/zfcp_ext.h
index b5adeda93e1d..f6399ca97bcb 100644
--- a/drivers/s390/scsi/zfcp_ext.h
+++ b/drivers/s390/scsi/zfcp_ext.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * External function declarations. 4 * External function declarations.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2008 6 * Copyright IBM Corporation 2002, 2009
7 */ 7 */
8 8
9#ifndef ZFCP_EXT_H 9#ifndef ZFCP_EXT_H
@@ -35,15 +35,15 @@ extern struct miscdevice zfcp_cfdc_misc;
35/* zfcp_dbf.c */ 35/* zfcp_dbf.c */
36extern int zfcp_adapter_debug_register(struct zfcp_adapter *); 36extern int zfcp_adapter_debug_register(struct zfcp_adapter *);
37extern void zfcp_adapter_debug_unregister(struct zfcp_adapter *); 37extern void zfcp_adapter_debug_unregister(struct zfcp_adapter *);
38extern void zfcp_rec_dbf_event_thread(u8, struct zfcp_adapter *); 38extern void zfcp_rec_dbf_event_thread(char *, struct zfcp_adapter *);
39extern void zfcp_rec_dbf_event_thread_lock(u8, struct zfcp_adapter *); 39extern void zfcp_rec_dbf_event_thread_lock(char *, struct zfcp_adapter *);
40extern void zfcp_rec_dbf_event_adapter(u8, void *, struct zfcp_adapter *); 40extern void zfcp_rec_dbf_event_adapter(char *, void *, struct zfcp_adapter *);
41extern void zfcp_rec_dbf_event_port(u8, void *, struct zfcp_port *); 41extern void zfcp_rec_dbf_event_port(char *, void *, struct zfcp_port *);
42extern void zfcp_rec_dbf_event_unit(u8, void *, struct zfcp_unit *); 42extern void zfcp_rec_dbf_event_unit(char *, void *, struct zfcp_unit *);
43extern void zfcp_rec_dbf_event_trigger(u8, void *, u8, u8, void *, 43extern void zfcp_rec_dbf_event_trigger(char *, void *, u8, u8, void *,
44 struct zfcp_adapter *, 44 struct zfcp_adapter *,
45 struct zfcp_port *, struct zfcp_unit *); 45 struct zfcp_port *, struct zfcp_unit *);
46extern void zfcp_rec_dbf_event_action(u8, struct zfcp_erp_action *); 46extern void zfcp_rec_dbf_event_action(char *, struct zfcp_erp_action *);
47extern void zfcp_hba_dbf_event_fsf_response(struct zfcp_fsf_req *); 47extern void zfcp_hba_dbf_event_fsf_response(struct zfcp_fsf_req *);
48extern void zfcp_hba_dbf_event_fsf_unsol(const char *, struct zfcp_adapter *, 48extern void zfcp_hba_dbf_event_fsf_unsol(const char *, struct zfcp_adapter *,
49 struct fsf_status_read_buffer *); 49 struct fsf_status_read_buffer *);
@@ -66,31 +66,34 @@ extern void zfcp_scsi_dbf_event_devreset(const char *, u8, struct zfcp_unit *,
66 struct scsi_cmnd *); 66 struct scsi_cmnd *);
67 67
68/* zfcp_erp.c */ 68/* zfcp_erp.c */
69extern void zfcp_erp_modify_adapter_status(struct zfcp_adapter *, u8, void *, 69extern void zfcp_erp_modify_adapter_status(struct zfcp_adapter *, char *,
70 u32, int); 70 void *, u32, int);
71extern void zfcp_erp_adapter_reopen(struct zfcp_adapter *, int, u8, void *); 71extern void zfcp_erp_adapter_reopen(struct zfcp_adapter *, int, char *, void *);
72extern void zfcp_erp_adapter_shutdown(struct zfcp_adapter *, int, u8, void *); 72extern void zfcp_erp_adapter_shutdown(struct zfcp_adapter *, int, char *,
73extern void zfcp_erp_adapter_failed(struct zfcp_adapter *, u8, void *); 73 void *);
74extern void zfcp_erp_modify_port_status(struct zfcp_port *, u8, void *, u32, 74extern void zfcp_erp_adapter_failed(struct zfcp_adapter *, char *, void *);
75extern void zfcp_erp_modify_port_status(struct zfcp_port *, char *, void *, u32,
75 int); 76 int);
76extern int zfcp_erp_port_reopen(struct zfcp_port *, int, u8, void *); 77extern int zfcp_erp_port_reopen(struct zfcp_port *, int, char *, void *);
77extern void zfcp_erp_port_shutdown(struct zfcp_port *, int, u8, void *); 78extern void zfcp_erp_port_shutdown(struct zfcp_port *, int, char *, void *);
78extern void zfcp_erp_port_forced_reopen(struct zfcp_port *, int, u8, void *); 79extern void zfcp_erp_port_forced_reopen(struct zfcp_port *, int, char *,
79extern void zfcp_erp_port_failed(struct zfcp_port *, u8, void *); 80 void *);
80extern void zfcp_erp_modify_unit_status(struct zfcp_unit *, u8, void *, u32, 81extern void zfcp_erp_port_failed(struct zfcp_port *, char *, void *);
82extern void zfcp_erp_modify_unit_status(struct zfcp_unit *, char *, void *, u32,
81 int); 83 int);
82extern void zfcp_erp_unit_reopen(struct zfcp_unit *, int, u8, void *); 84extern void zfcp_erp_unit_reopen(struct zfcp_unit *, int, char *, void *);
83extern void zfcp_erp_unit_shutdown(struct zfcp_unit *, int, u8, void *); 85extern void zfcp_erp_unit_shutdown(struct zfcp_unit *, int, char *, void *);
84extern void zfcp_erp_unit_failed(struct zfcp_unit *, u8, void *); 86extern void zfcp_erp_unit_failed(struct zfcp_unit *, char *, void *);
85extern int zfcp_erp_thread_setup(struct zfcp_adapter *); 87extern int zfcp_erp_thread_setup(struct zfcp_adapter *);
86extern void zfcp_erp_thread_kill(struct zfcp_adapter *); 88extern void zfcp_erp_thread_kill(struct zfcp_adapter *);
87extern void zfcp_erp_wait(struct zfcp_adapter *); 89extern void zfcp_erp_wait(struct zfcp_adapter *);
88extern void zfcp_erp_notify(struct zfcp_erp_action *, unsigned long); 90extern void zfcp_erp_notify(struct zfcp_erp_action *, unsigned long);
89extern void zfcp_erp_port_boxed(struct zfcp_port *, u8, void *); 91extern void zfcp_erp_port_boxed(struct zfcp_port *, char *, void *);
90extern void zfcp_erp_unit_boxed(struct zfcp_unit *, u8, void *); 92extern void zfcp_erp_unit_boxed(struct zfcp_unit *, char *, void *);
91extern void zfcp_erp_port_access_denied(struct zfcp_port *, u8, void *); 93extern void zfcp_erp_port_access_denied(struct zfcp_port *, char *, void *);
92extern void zfcp_erp_unit_access_denied(struct zfcp_unit *, u8, void *); 94extern void zfcp_erp_unit_access_denied(struct zfcp_unit *, char *, void *);
93extern void zfcp_erp_adapter_access_changed(struct zfcp_adapter *, u8, void *); 95extern void zfcp_erp_adapter_access_changed(struct zfcp_adapter *, char *,
96 void *);
94extern void zfcp_erp_timeout_handler(unsigned long); 97extern void zfcp_erp_timeout_handler(unsigned long);
95extern void zfcp_erp_port_strategy_open_lookup(struct work_struct *); 98extern void zfcp_erp_port_strategy_open_lookup(struct work_struct *);
96 99
@@ -101,6 +104,7 @@ extern void zfcp_fc_incoming_els(struct zfcp_fsf_req *);
101extern int zfcp_fc_ns_gid_pn(struct zfcp_erp_action *); 104extern int zfcp_fc_ns_gid_pn(struct zfcp_erp_action *);
102extern void zfcp_fc_plogi_evaluate(struct zfcp_port *, struct fsf_plogi *); 105extern void zfcp_fc_plogi_evaluate(struct zfcp_port *, struct fsf_plogi *);
103extern void zfcp_test_link(struct zfcp_port *); 106extern void zfcp_test_link(struct zfcp_port *);
107extern void zfcp_fc_link_test_work(struct work_struct *);
104extern void zfcp_fc_nameserver_init(struct zfcp_adapter *); 108extern void zfcp_fc_nameserver_init(struct zfcp_adapter *);
105 109
106/* zfcp_fsf.c */ 110/* zfcp_fsf.c */
@@ -125,16 +129,13 @@ extern int zfcp_status_read_refill(struct zfcp_adapter *adapter);
125extern int zfcp_fsf_send_ct(struct zfcp_send_ct *, mempool_t *, 129extern int zfcp_fsf_send_ct(struct zfcp_send_ct *, mempool_t *,
126 struct zfcp_erp_action *); 130 struct zfcp_erp_action *);
127extern int zfcp_fsf_send_els(struct zfcp_send_els *); 131extern int zfcp_fsf_send_els(struct zfcp_send_els *);
128extern int zfcp_fsf_send_fcp_command_task(struct zfcp_adapter *, 132extern int zfcp_fsf_send_fcp_command_task(struct zfcp_unit *,
129 struct zfcp_unit *, 133 struct scsi_cmnd *);
130 struct scsi_cmnd *, int, int);
131extern void zfcp_fsf_req_complete(struct zfcp_fsf_req *); 134extern void zfcp_fsf_req_complete(struct zfcp_fsf_req *);
132extern void zfcp_fsf_req_free(struct zfcp_fsf_req *); 135extern void zfcp_fsf_req_free(struct zfcp_fsf_req *);
133extern struct zfcp_fsf_req *zfcp_fsf_send_fcp_ctm(struct zfcp_adapter *, 136extern struct zfcp_fsf_req *zfcp_fsf_send_fcp_ctm(struct zfcp_unit *, u8);
134 struct zfcp_unit *, u8, int);
135extern struct zfcp_fsf_req *zfcp_fsf_abort_fcp_command(unsigned long, 137extern struct zfcp_fsf_req *zfcp_fsf_abort_fcp_command(unsigned long,
136 struct zfcp_adapter *, 138 struct zfcp_unit *);
137 struct zfcp_unit *, int);
138 139
139/* zfcp_qdio.c */ 140/* zfcp_qdio.c */
140extern int zfcp_qdio_allocate(struct zfcp_adapter *); 141extern int zfcp_qdio_allocate(struct zfcp_adapter *);
@@ -153,6 +154,10 @@ extern int zfcp_adapter_scsi_register(struct zfcp_adapter *);
153extern void zfcp_adapter_scsi_unregister(struct zfcp_adapter *); 154extern void zfcp_adapter_scsi_unregister(struct zfcp_adapter *);
154extern char *zfcp_get_fcp_sns_info_ptr(struct fcp_rsp_iu *); 155extern char *zfcp_get_fcp_sns_info_ptr(struct fcp_rsp_iu *);
155extern struct fc_function_template zfcp_transport_functions; 156extern struct fc_function_template zfcp_transport_functions;
157extern void zfcp_scsi_rport_work(struct work_struct *);
158extern void zfcp_scsi_schedule_rport_register(struct zfcp_port *);
159extern void zfcp_scsi_schedule_rport_block(struct zfcp_port *);
160extern void zfcp_scsi_schedule_rports_block(struct zfcp_adapter *);
156 161
157/* zfcp_sysfs.c */ 162/* zfcp_sysfs.c */
158extern struct attribute_group zfcp_sysfs_unit_attrs; 163extern struct attribute_group zfcp_sysfs_unit_attrs;
diff --git a/drivers/s390/scsi/zfcp_fc.c b/drivers/s390/scsi/zfcp_fc.c
index eabdfe24456e..aab8123c5966 100644
--- a/drivers/s390/scsi/zfcp_fc.c
+++ b/drivers/s390/scsi/zfcp_fc.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Fibre Channel related functions for the zfcp device driver. 4 * Fibre Channel related functions for the zfcp device driver.
5 * 5 *
6 * Copyright IBM Corporation 2008 6 * Copyright IBM Corporation 2008, 2009
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
@@ -98,8 +98,12 @@ static void zfcp_wka_port_offline(struct work_struct *work)
98 struct zfcp_wka_port *wka_port = 98 struct zfcp_wka_port *wka_port =
99 container_of(dw, struct zfcp_wka_port, work); 99 container_of(dw, struct zfcp_wka_port, work);
100 100
101 wait_event(wka_port->completion_wq, 101 /* Don't wait forvever. If the wka_port is too busy take it offline
102 atomic_read(&wka_port->refcount) == 0); 102 through a new call later */
103 if (!wait_event_timeout(wka_port->completion_wq,
104 atomic_read(&wka_port->refcount) == 0,
105 HZ >> 1))
106 return;
103 107
104 mutex_lock(&wka_port->mutex); 108 mutex_lock(&wka_port->mutex);
105 if ((atomic_read(&wka_port->refcount) != 0) || 109 if ((atomic_read(&wka_port->refcount) != 0) ||
@@ -145,16 +149,10 @@ static void _zfcp_fc_incoming_rscn(struct zfcp_fsf_req *fsf_req, u32 range,
145 struct zfcp_port *port; 149 struct zfcp_port *port;
146 150
147 read_lock_irqsave(&zfcp_data.config_lock, flags); 151 read_lock_irqsave(&zfcp_data.config_lock, flags);
148 list_for_each_entry(port, &fsf_req->adapter->port_list_head, list) { 152 list_for_each_entry(port, &fsf_req->adapter->port_list_head, list)
149 if (!(atomic_read(&port->status) & ZFCP_STATUS_PORT_PHYS_OPEN)) 153 if ((port->d_id & range) == (elem->nport_did & range))
150 /* Try to connect to unused ports anyway. */
151 zfcp_erp_port_reopen(port,
152 ZFCP_STATUS_COMMON_ERP_FAILED,
153 82, fsf_req);
154 else if ((port->d_id & range) == (elem->nport_did & range))
155 /* Check connection status for connected ports */
156 zfcp_test_link(port); 154 zfcp_test_link(port);
157 } 155
158 read_unlock_irqrestore(&zfcp_data.config_lock, flags); 156 read_unlock_irqrestore(&zfcp_data.config_lock, flags);
159} 157}
160 158
@@ -196,7 +194,7 @@ static void zfcp_fc_incoming_wwpn(struct zfcp_fsf_req *req, u64 wwpn)
196 read_unlock_irqrestore(&zfcp_data.config_lock, flags); 194 read_unlock_irqrestore(&zfcp_data.config_lock, flags);
197 195
198 if (port && (port->wwpn == wwpn)) 196 if (port && (port->wwpn == wwpn))
199 zfcp_erp_port_forced_reopen(port, 0, 83, req); 197 zfcp_erp_port_forced_reopen(port, 0, "fciwwp1", req);
200} 198}
201 199
202static void zfcp_fc_incoming_plogi(struct zfcp_fsf_req *req) 200static void zfcp_fc_incoming_plogi(struct zfcp_fsf_req *req)
@@ -259,10 +257,9 @@ static void zfcp_fc_ns_gid_pn_eval(unsigned long data)
259 257
260 if (ct->status) 258 if (ct->status)
261 return; 259 return;
262 if (ct_iu_resp->header.cmd_rsp_code != ZFCP_CT_ACCEPT) { 260 if (ct_iu_resp->header.cmd_rsp_code != ZFCP_CT_ACCEPT)
263 atomic_set_mask(ZFCP_STATUS_PORT_INVALID_WWPN, &port->status);
264 return; 261 return;
265 } 262
266 /* paranoia */ 263 /* paranoia */
267 if (ct_iu_req->wwpn != port->wwpn) 264 if (ct_iu_req->wwpn != port->wwpn)
268 return; 265 return;
@@ -375,16 +372,22 @@ static void zfcp_fc_adisc_handler(unsigned long data)
375 372
376 if (adisc->els.status) { 373 if (adisc->els.status) {
377 /* request rejected or timed out */ 374 /* request rejected or timed out */
378 zfcp_erp_port_forced_reopen(port, 0, 63, NULL); 375 zfcp_erp_port_forced_reopen(port, 0, "fcadh_1", NULL);
379 goto out; 376 goto out;
380 } 377 }
381 378
382 if (!port->wwnn) 379 if (!port->wwnn)
383 port->wwnn = ls_adisc->wwnn; 380 port->wwnn = ls_adisc->wwnn;
384 381
385 if (port->wwpn != ls_adisc->wwpn) 382 if ((port->wwpn != ls_adisc->wwpn) ||
386 zfcp_erp_port_reopen(port, 0, 64, NULL); 383 !(atomic_read(&port->status) & ZFCP_STATUS_COMMON_OPEN)) {
384 zfcp_erp_port_reopen(port, ZFCP_STATUS_COMMON_ERP_FAILED,
385 "fcadh_2", NULL);
386 goto out;
387 }
387 388
389 /* port is good, unblock rport without going through erp */
390 zfcp_scsi_schedule_rport_register(port);
388 out: 391 out:
389 zfcp_port_put(port); 392 zfcp_port_put(port);
390 kfree(adisc); 393 kfree(adisc);
@@ -422,6 +425,31 @@ static int zfcp_fc_adisc(struct zfcp_port *port)
422 return zfcp_fsf_send_els(&adisc->els); 425 return zfcp_fsf_send_els(&adisc->els);
423} 426}
424 427
428void zfcp_fc_link_test_work(struct work_struct *work)
429{
430 struct zfcp_port *port =
431 container_of(work, struct zfcp_port, test_link_work);
432 int retval;
433
434 if (!(atomic_read(&port->status) & ZFCP_STATUS_COMMON_UNBLOCKED)) {
435 zfcp_port_put(port);
436 return; /* port erp is running and will update rport status */
437 }
438
439 zfcp_port_get(port);
440 port->rport_task = RPORT_DEL;
441 zfcp_scsi_rport_work(&port->rport_work);
442
443 retval = zfcp_fc_adisc(port);
444 if (retval == 0)
445 return;
446
447 /* send of ADISC was not possible */
448 zfcp_erp_port_forced_reopen(port, 0, "fcltwk1", NULL);
449
450 zfcp_port_put(port);
451}
452
425/** 453/**
426 * zfcp_test_link - lightweight link test procedure 454 * zfcp_test_link - lightweight link test procedure
427 * @port: port to be tested 455 * @port: port to be tested
@@ -432,17 +460,9 @@ static int zfcp_fc_adisc(struct zfcp_port *port)
432 */ 460 */
433void zfcp_test_link(struct zfcp_port *port) 461void zfcp_test_link(struct zfcp_port *port)
434{ 462{
435 int retval;
436
437 zfcp_port_get(port); 463 zfcp_port_get(port);
438 retval = zfcp_fc_adisc(port); 464 if (!queue_work(zfcp_data.work_queue, &port->test_link_work))
439 if (retval == 0) 465 zfcp_port_put(port);
440 return;
441
442 /* send of ADISC was not possible */
443 zfcp_port_put(port);
444 if (retval != -EBUSY)
445 zfcp_erp_port_forced_reopen(port, 0, 65, NULL);
446} 466}
447 467
448static void zfcp_free_sg_env(struct zfcp_gpn_ft *gpn_ft, int buf_num) 468static void zfcp_free_sg_env(struct zfcp_gpn_ft *gpn_ft, int buf_num)
@@ -529,7 +549,7 @@ static void zfcp_validate_port(struct zfcp_port *port)
529 zfcp_port_put(port); 549 zfcp_port_put(port);
530 return; 550 return;
531 } 551 }
532 zfcp_erp_port_shutdown(port, 0, 151, NULL); 552 zfcp_erp_port_shutdown(port, 0, "fcpval1", NULL);
533 zfcp_erp_wait(adapter); 553 zfcp_erp_wait(adapter);
534 zfcp_port_put(port); 554 zfcp_port_put(port);
535 zfcp_port_dequeue(port); 555 zfcp_port_dequeue(port);
@@ -592,7 +612,7 @@ static int zfcp_scan_eval_gpn_ft(struct zfcp_gpn_ft *gpn_ft, int max_entries)
592 if (IS_ERR(port)) 612 if (IS_ERR(port))
593 ret = PTR_ERR(port); 613 ret = PTR_ERR(port);
594 else 614 else
595 zfcp_erp_port_reopen(port, 0, 149, NULL); 615 zfcp_erp_port_reopen(port, 0, "fcegpf1", NULL);
596 } 616 }
597 617
598 zfcp_erp_wait(adapter); 618 zfcp_erp_wait(adapter);
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c
index e6416f8541b0..b29f3121b666 100644
--- a/drivers/s390/scsi/zfcp_fsf.c
+++ b/drivers/s390/scsi/zfcp_fsf.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Implementation of FSF commands. 4 * Implementation of FSF commands.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2008 6 * Copyright IBM Corporation 2002, 2009
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
@@ -12,11 +12,14 @@
12#include <linux/blktrace_api.h> 12#include <linux/blktrace_api.h>
13#include "zfcp_ext.h" 13#include "zfcp_ext.h"
14 14
15#define ZFCP_REQ_AUTO_CLEANUP 0x00000002
16#define ZFCP_REQ_NO_QTCB 0x00000008
17
15static void zfcp_fsf_request_timeout_handler(unsigned long data) 18static void zfcp_fsf_request_timeout_handler(unsigned long data)
16{ 19{
17 struct zfcp_adapter *adapter = (struct zfcp_adapter *) data; 20 struct zfcp_adapter *adapter = (struct zfcp_adapter *) data;
18 zfcp_erp_adapter_reopen(adapter, ZFCP_STATUS_COMMON_ERP_FAILED, 62, 21 zfcp_erp_adapter_reopen(adapter, ZFCP_STATUS_COMMON_ERP_FAILED,
19 NULL); 22 "fsrth_1", NULL);
20} 23}
21 24
22static void zfcp_fsf_start_timer(struct zfcp_fsf_req *fsf_req, 25static void zfcp_fsf_start_timer(struct zfcp_fsf_req *fsf_req,
@@ -75,7 +78,7 @@ static void zfcp_fsf_access_denied_port(struct zfcp_fsf_req *req,
75 (unsigned long long)port->wwpn); 78 (unsigned long long)port->wwpn);
76 zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[0]); 79 zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[0]);
77 zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[1]); 80 zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[1]);
78 zfcp_erp_port_access_denied(port, 55, req); 81 zfcp_erp_port_access_denied(port, "fspad_1", req);
79 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 82 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
80} 83}
81 84
@@ -89,7 +92,7 @@ static void zfcp_fsf_access_denied_unit(struct zfcp_fsf_req *req,
89 (unsigned long long)unit->port->wwpn); 92 (unsigned long long)unit->port->wwpn);
90 zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[0]); 93 zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[0]);
91 zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[1]); 94 zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[1]);
92 zfcp_erp_unit_access_denied(unit, 59, req); 95 zfcp_erp_unit_access_denied(unit, "fsuad_1", req);
93 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 96 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
94} 97}
95 98
@@ -97,7 +100,7 @@ static void zfcp_fsf_class_not_supp(struct zfcp_fsf_req *req)
97{ 100{
98 dev_err(&req->adapter->ccw_device->dev, "FCP device not " 101 dev_err(&req->adapter->ccw_device->dev, "FCP device not "
99 "operational because of an unsupported FC class\n"); 102 "operational because of an unsupported FC class\n");
100 zfcp_erp_adapter_shutdown(req->adapter, 0, 123, req); 103 zfcp_erp_adapter_shutdown(req->adapter, 0, "fscns_1", req);
101 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 104 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
102} 105}
103 106
@@ -159,20 +162,13 @@ static void zfcp_fsf_status_read_port_closed(struct zfcp_fsf_req *req)
159 list_for_each_entry(port, &adapter->port_list_head, list) 162 list_for_each_entry(port, &adapter->port_list_head, list)
160 if (port->d_id == d_id) { 163 if (port->d_id == d_id) {
161 read_unlock_irqrestore(&zfcp_data.config_lock, flags); 164 read_unlock_irqrestore(&zfcp_data.config_lock, flags);
162 switch (sr_buf->status_subtype) { 165 zfcp_erp_port_reopen(port, 0, "fssrpc1", req);
163 case FSF_STATUS_READ_SUB_CLOSE_PHYS_PORT:
164 zfcp_erp_port_reopen(port, 0, 101, req);
165 break;
166 case FSF_STATUS_READ_SUB_ERROR_PORT:
167 zfcp_erp_port_shutdown(port, 0, 122, req);
168 break;
169 }
170 return; 166 return;
171 } 167 }
172 read_unlock_irqrestore(&zfcp_data.config_lock, flags); 168 read_unlock_irqrestore(&zfcp_data.config_lock, flags);
173} 169}
174 170
175static void zfcp_fsf_link_down_info_eval(struct zfcp_fsf_req *req, u8 id, 171static void zfcp_fsf_link_down_info_eval(struct zfcp_fsf_req *req, char *id,
176 struct fsf_link_down_info *link_down) 172 struct fsf_link_down_info *link_down)
177{ 173{
178 struct zfcp_adapter *adapter = req->adapter; 174 struct zfcp_adapter *adapter = req->adapter;
@@ -181,6 +177,7 @@ static void zfcp_fsf_link_down_info_eval(struct zfcp_fsf_req *req, u8 id,
181 return; 177 return;
182 178
183 atomic_set_mask(ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED, &adapter->status); 179 atomic_set_mask(ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED, &adapter->status);
180 zfcp_scsi_schedule_rports_block(adapter);
184 181
185 if (!link_down) 182 if (!link_down)
186 goto out; 183 goto out;
@@ -261,13 +258,13 @@ static void zfcp_fsf_status_read_link_down(struct zfcp_fsf_req *req)
261 258
262 switch (sr_buf->status_subtype) { 259 switch (sr_buf->status_subtype) {
263 case FSF_STATUS_READ_SUB_NO_PHYSICAL_LINK: 260 case FSF_STATUS_READ_SUB_NO_PHYSICAL_LINK:
264 zfcp_fsf_link_down_info_eval(req, 38, ldi); 261 zfcp_fsf_link_down_info_eval(req, "fssrld1", ldi);
265 break; 262 break;
266 case FSF_STATUS_READ_SUB_FDISC_FAILED: 263 case FSF_STATUS_READ_SUB_FDISC_FAILED:
267 zfcp_fsf_link_down_info_eval(req, 39, ldi); 264 zfcp_fsf_link_down_info_eval(req, "fssrld2", ldi);
268 break; 265 break;
269 case FSF_STATUS_READ_SUB_FIRMWARE_UPDATE: 266 case FSF_STATUS_READ_SUB_FIRMWARE_UPDATE:
270 zfcp_fsf_link_down_info_eval(req, 40, NULL); 267 zfcp_fsf_link_down_info_eval(req, "fssrld3", NULL);
271 }; 268 };
272} 269}
273 270
@@ -307,22 +304,23 @@ static void zfcp_fsf_status_read_handler(struct zfcp_fsf_req *req)
307 dev_info(&adapter->ccw_device->dev, 304 dev_info(&adapter->ccw_device->dev,
308 "The local link has been restored\n"); 305 "The local link has been restored\n");
309 /* All ports should be marked as ready to run again */ 306 /* All ports should be marked as ready to run again */
310 zfcp_erp_modify_adapter_status(adapter, 30, NULL, 307 zfcp_erp_modify_adapter_status(adapter, "fssrh_1", NULL,
311 ZFCP_STATUS_COMMON_RUNNING, 308 ZFCP_STATUS_COMMON_RUNNING,
312 ZFCP_SET); 309 ZFCP_SET);
313 zfcp_erp_adapter_reopen(adapter, 310 zfcp_erp_adapter_reopen(adapter,
314 ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED | 311 ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED |
315 ZFCP_STATUS_COMMON_ERP_FAILED, 312 ZFCP_STATUS_COMMON_ERP_FAILED,
316 102, req); 313 "fssrh_2", req);
317 break; 314 break;
318 case FSF_STATUS_READ_NOTIFICATION_LOST: 315 case FSF_STATUS_READ_NOTIFICATION_LOST:
319 if (sr_buf->status_subtype & FSF_STATUS_READ_SUB_ACT_UPDATED) 316 if (sr_buf->status_subtype & FSF_STATUS_READ_SUB_ACT_UPDATED)
320 zfcp_erp_adapter_access_changed(adapter, 135, req); 317 zfcp_erp_adapter_access_changed(adapter, "fssrh_3",
318 req);
321 if (sr_buf->status_subtype & FSF_STATUS_READ_SUB_INCOMING_ELS) 319 if (sr_buf->status_subtype & FSF_STATUS_READ_SUB_INCOMING_ELS)
322 schedule_work(&adapter->scan_work); 320 schedule_work(&adapter->scan_work);
323 break; 321 break;
324 case FSF_STATUS_READ_CFDC_UPDATED: 322 case FSF_STATUS_READ_CFDC_UPDATED:
325 zfcp_erp_adapter_access_changed(adapter, 136, req); 323 zfcp_erp_adapter_access_changed(adapter, "fssrh_4", req);
326 break; 324 break;
327 case FSF_STATUS_READ_FEATURE_UPDATE_ALERT: 325 case FSF_STATUS_READ_FEATURE_UPDATE_ALERT:
328 adapter->adapter_features = sr_buf->payload.word[0]; 326 adapter->adapter_features = sr_buf->payload.word[0];
@@ -351,7 +349,7 @@ static void zfcp_fsf_fsfstatus_qual_eval(struct zfcp_fsf_req *req)
351 dev_err(&req->adapter->ccw_device->dev, 349 dev_err(&req->adapter->ccw_device->dev,
352 "The FCP adapter reported a problem " 350 "The FCP adapter reported a problem "
353 "that cannot be recovered\n"); 351 "that cannot be recovered\n");
354 zfcp_erp_adapter_shutdown(req->adapter, 0, 121, req); 352 zfcp_erp_adapter_shutdown(req->adapter, 0, "fsfsqe1", req);
355 break; 353 break;
356 } 354 }
357 /* all non-return stats set FSFREQ_ERROR*/ 355 /* all non-return stats set FSFREQ_ERROR*/
@@ -368,7 +366,7 @@ static void zfcp_fsf_fsfstatus_eval(struct zfcp_fsf_req *req)
368 dev_err(&req->adapter->ccw_device->dev, 366 dev_err(&req->adapter->ccw_device->dev,
369 "The FCP adapter does not recognize the command 0x%x\n", 367 "The FCP adapter does not recognize the command 0x%x\n",
370 req->qtcb->header.fsf_command); 368 req->qtcb->header.fsf_command);
371 zfcp_erp_adapter_shutdown(req->adapter, 0, 120, req); 369 zfcp_erp_adapter_shutdown(req->adapter, 0, "fsfse_1", req);
372 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 370 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
373 break; 371 break;
374 case FSF_ADAPTER_STATUS_AVAILABLE: 372 case FSF_ADAPTER_STATUS_AVAILABLE:
@@ -400,17 +398,17 @@ static void zfcp_fsf_protstatus_eval(struct zfcp_fsf_req *req)
400 "QTCB version 0x%x not supported by FCP adapter " 398 "QTCB version 0x%x not supported by FCP adapter "
401 "(0x%x to 0x%x)\n", FSF_QTCB_CURRENT_VERSION, 399 "(0x%x to 0x%x)\n", FSF_QTCB_CURRENT_VERSION,
402 psq->word[0], psq->word[1]); 400 psq->word[0], psq->word[1]);
403 zfcp_erp_adapter_shutdown(adapter, 0, 117, req); 401 zfcp_erp_adapter_shutdown(adapter, 0, "fspse_1", req);
404 break; 402 break;
405 case FSF_PROT_ERROR_STATE: 403 case FSF_PROT_ERROR_STATE:
406 case FSF_PROT_SEQ_NUMB_ERROR: 404 case FSF_PROT_SEQ_NUMB_ERROR:
407 zfcp_erp_adapter_reopen(adapter, 0, 98, req); 405 zfcp_erp_adapter_reopen(adapter, 0, "fspse_2", req);
408 req->status |= ZFCP_STATUS_FSFREQ_RETRY; 406 req->status |= ZFCP_STATUS_FSFREQ_RETRY;
409 break; 407 break;
410 case FSF_PROT_UNSUPP_QTCB_TYPE: 408 case FSF_PROT_UNSUPP_QTCB_TYPE:
411 dev_err(&adapter->ccw_device->dev, 409 dev_err(&adapter->ccw_device->dev,
412 "The QTCB type is not supported by the FCP adapter\n"); 410 "The QTCB type is not supported by the FCP adapter\n");
413 zfcp_erp_adapter_shutdown(adapter, 0, 118, req); 411 zfcp_erp_adapter_shutdown(adapter, 0, "fspse_3", req);
414 break; 412 break;
415 case FSF_PROT_HOST_CONNECTION_INITIALIZING: 413 case FSF_PROT_HOST_CONNECTION_INITIALIZING:
416 atomic_set_mask(ZFCP_STATUS_ADAPTER_HOST_CON_INIT, 414 atomic_set_mask(ZFCP_STATUS_ADAPTER_HOST_CON_INIT,
@@ -420,27 +418,29 @@ static void zfcp_fsf_protstatus_eval(struct zfcp_fsf_req *req)
420 dev_err(&adapter->ccw_device->dev, 418 dev_err(&adapter->ccw_device->dev,
421 "0x%Lx is an ambiguous request identifier\n", 419 "0x%Lx is an ambiguous request identifier\n",
422 (unsigned long long)qtcb->bottom.support.req_handle); 420 (unsigned long long)qtcb->bottom.support.req_handle);
423 zfcp_erp_adapter_shutdown(adapter, 0, 78, req); 421 zfcp_erp_adapter_shutdown(adapter, 0, "fspse_4", req);
424 break; 422 break;
425 case FSF_PROT_LINK_DOWN: 423 case FSF_PROT_LINK_DOWN:
426 zfcp_fsf_link_down_info_eval(req, 37, &psq->link_down_info); 424 zfcp_fsf_link_down_info_eval(req, "fspse_5",
425 &psq->link_down_info);
427 /* FIXME: reopening adapter now? better wait for link up */ 426 /* FIXME: reopening adapter now? better wait for link up */
428 zfcp_erp_adapter_reopen(adapter, 0, 79, req); 427 zfcp_erp_adapter_reopen(adapter, 0, "fspse_6", req);
429 break; 428 break;
430 case FSF_PROT_REEST_QUEUE: 429 case FSF_PROT_REEST_QUEUE:
431 /* All ports should be marked as ready to run again */ 430 /* All ports should be marked as ready to run again */
432 zfcp_erp_modify_adapter_status(adapter, 28, NULL, 431 zfcp_erp_modify_adapter_status(adapter, "fspse_7", NULL,
433 ZFCP_STATUS_COMMON_RUNNING, 432 ZFCP_STATUS_COMMON_RUNNING,
434 ZFCP_SET); 433 ZFCP_SET);
435 zfcp_erp_adapter_reopen(adapter, 434 zfcp_erp_adapter_reopen(adapter,
436 ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED | 435 ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED |
437 ZFCP_STATUS_COMMON_ERP_FAILED, 99, req); 436 ZFCP_STATUS_COMMON_ERP_FAILED,
437 "fspse_8", req);
438 break; 438 break;
439 default: 439 default:
440 dev_err(&adapter->ccw_device->dev, 440 dev_err(&adapter->ccw_device->dev,
441 "0x%x is not a valid transfer protocol status\n", 441 "0x%x is not a valid transfer protocol status\n",
442 qtcb->prefix.prot_status); 442 qtcb->prefix.prot_status);
443 zfcp_erp_adapter_shutdown(adapter, 0, 119, req); 443 zfcp_erp_adapter_shutdown(adapter, 0, "fspse_9", req);
444 } 444 }
445 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 445 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
446} 446}
@@ -526,7 +526,7 @@ static int zfcp_fsf_exchange_config_evaluate(struct zfcp_fsf_req *req)
526 dev_err(&adapter->ccw_device->dev, 526 dev_err(&adapter->ccw_device->dev,
527 "Unknown or unsupported arbitrated loop " 527 "Unknown or unsupported arbitrated loop "
528 "fibre channel topology detected\n"); 528 "fibre channel topology detected\n");
529 zfcp_erp_adapter_shutdown(adapter, 0, 127, req); 529 zfcp_erp_adapter_shutdown(adapter, 0, "fsece_1", req);
530 return -EIO; 530 return -EIO;
531 } 531 }
532 532
@@ -560,7 +560,7 @@ static void zfcp_fsf_exchange_config_data_handler(struct zfcp_fsf_req *req)
560 "FCP adapter maximum QTCB size (%d bytes) " 560 "FCP adapter maximum QTCB size (%d bytes) "
561 "is too small\n", 561 "is too small\n",
562 bottom->max_qtcb_size); 562 bottom->max_qtcb_size);
563 zfcp_erp_adapter_shutdown(adapter, 0, 129, req); 563 zfcp_erp_adapter_shutdown(adapter, 0, "fsecdh1", req);
564 return; 564 return;
565 } 565 }
566 atomic_set_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK, 566 atomic_set_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK,
@@ -577,11 +577,11 @@ static void zfcp_fsf_exchange_config_data_handler(struct zfcp_fsf_req *req)
577 atomic_set_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK, 577 atomic_set_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK,
578 &adapter->status); 578 &adapter->status);
579 579
580 zfcp_fsf_link_down_info_eval(req, 42, 580 zfcp_fsf_link_down_info_eval(req, "fsecdh2",
581 &qtcb->header.fsf_status_qual.link_down_info); 581 &qtcb->header.fsf_status_qual.link_down_info);
582 break; 582 break;
583 default: 583 default:
584 zfcp_erp_adapter_shutdown(adapter, 0, 130, req); 584 zfcp_erp_adapter_shutdown(adapter, 0, "fsecdh3", req);
585 return; 585 return;
586 } 586 }
587 587
@@ -597,14 +597,14 @@ static void zfcp_fsf_exchange_config_data_handler(struct zfcp_fsf_req *req)
597 dev_err(&adapter->ccw_device->dev, 597 dev_err(&adapter->ccw_device->dev,
598 "The FCP adapter only supports newer " 598 "The FCP adapter only supports newer "
599 "control block versions\n"); 599 "control block versions\n");
600 zfcp_erp_adapter_shutdown(adapter, 0, 125, req); 600 zfcp_erp_adapter_shutdown(adapter, 0, "fsecdh4", req);
601 return; 601 return;
602 } 602 }
603 if (FSF_QTCB_CURRENT_VERSION > bottom->high_qtcb_version) { 603 if (FSF_QTCB_CURRENT_VERSION > bottom->high_qtcb_version) {
604 dev_err(&adapter->ccw_device->dev, 604 dev_err(&adapter->ccw_device->dev,
605 "The FCP adapter only supports older " 605 "The FCP adapter only supports older "
606 "control block versions\n"); 606 "control block versions\n");
607 zfcp_erp_adapter_shutdown(adapter, 0, 126, req); 607 zfcp_erp_adapter_shutdown(adapter, 0, "fsecdh5", req);
608 } 608 }
609} 609}
610 610
@@ -617,9 +617,10 @@ static void zfcp_fsf_exchange_port_evaluate(struct zfcp_fsf_req *req)
617 if (req->data) 617 if (req->data)
618 memcpy(req->data, bottom, sizeof(*bottom)); 618 memcpy(req->data, bottom, sizeof(*bottom));
619 619
620 if (adapter->connection_features & FSF_FEATURE_NPIV_MODE) 620 if (adapter->connection_features & FSF_FEATURE_NPIV_MODE) {
621 fc_host_permanent_port_name(shost) = bottom->wwpn; 621 fc_host_permanent_port_name(shost) = bottom->wwpn;
622 else 622 fc_host_port_type(shost) = FC_PORTTYPE_NPIV;
623 } else
623 fc_host_permanent_port_name(shost) = fc_host_port_name(shost); 624 fc_host_permanent_port_name(shost) = fc_host_port_name(shost);
624 fc_host_maxframe_size(shost) = bottom->maximum_frame_size; 625 fc_host_maxframe_size(shost) = bottom->maximum_frame_size;
625 fc_host_supported_speeds(shost) = bottom->supported_speed; 626 fc_host_supported_speeds(shost) = bottom->supported_speed;
@@ -638,20 +639,12 @@ static void zfcp_fsf_exchange_port_data_handler(struct zfcp_fsf_req *req)
638 break; 639 break;
639 case FSF_EXCHANGE_CONFIG_DATA_INCOMPLETE: 640 case FSF_EXCHANGE_CONFIG_DATA_INCOMPLETE:
640 zfcp_fsf_exchange_port_evaluate(req); 641 zfcp_fsf_exchange_port_evaluate(req);
641 zfcp_fsf_link_down_info_eval(req, 43, 642 zfcp_fsf_link_down_info_eval(req, "fsepdh1",
642 &qtcb->header.fsf_status_qual.link_down_info); 643 &qtcb->header.fsf_status_qual.link_down_info);
643 break; 644 break;
644 } 645 }
645} 646}
646 647
647static int zfcp_fsf_sbal_available(struct zfcp_adapter *adapter)
648{
649 if (atomic_read(&adapter->req_q.count) > 0)
650 return 1;
651 atomic_inc(&adapter->qdio_outb_full);
652 return 0;
653}
654
655static int zfcp_fsf_req_sbal_get(struct zfcp_adapter *adapter) 648static int zfcp_fsf_req_sbal_get(struct zfcp_adapter *adapter)
656 __releases(&adapter->req_q_lock) 649 __releases(&adapter->req_q_lock)
657 __acquires(&adapter->req_q_lock) 650 __acquires(&adapter->req_q_lock)
@@ -735,7 +728,7 @@ static struct zfcp_fsf_req *zfcp_fsf_req_create(struct zfcp_adapter *adapter,
735 728
736 req->adapter = adapter; 729 req->adapter = adapter;
737 req->fsf_command = fsf_cmd; 730 req->fsf_command = fsf_cmd;
738 req->req_id = adapter->req_no++; 731 req->req_id = adapter->req_no;
739 req->sbal_number = 1; 732 req->sbal_number = 1;
740 req->sbal_first = req_q->first; 733 req->sbal_first = req_q->first;
741 req->sbal_last = req_q->first; 734 req->sbal_last = req_q->first;
@@ -791,13 +784,14 @@ static int zfcp_fsf_req_send(struct zfcp_fsf_req *req)
791 if (zfcp_reqlist_find_safe(adapter, req)) 784 if (zfcp_reqlist_find_safe(adapter, req))
792 zfcp_reqlist_remove(adapter, req); 785 zfcp_reqlist_remove(adapter, req);
793 spin_unlock_irqrestore(&adapter->req_list_lock, flags); 786 spin_unlock_irqrestore(&adapter->req_list_lock, flags);
794 zfcp_erp_adapter_reopen(adapter, 0, 116, req); 787 zfcp_erp_adapter_reopen(adapter, 0, "fsrs__1", req);
795 return -EIO; 788 return -EIO;
796 } 789 }
797 790
798 /* Don't increase for unsolicited status */ 791 /* Don't increase for unsolicited status */
799 if (req->qtcb) 792 if (req->qtcb)
800 adapter->fsf_req_seq_no++; 793 adapter->fsf_req_seq_no++;
794 adapter->req_no++;
801 795
802 return 0; 796 return 0;
803} 797}
@@ -870,14 +864,14 @@ static void zfcp_fsf_abort_fcp_command_handler(struct zfcp_fsf_req *req)
870 switch (req->qtcb->header.fsf_status) { 864 switch (req->qtcb->header.fsf_status) {
871 case FSF_PORT_HANDLE_NOT_VALID: 865 case FSF_PORT_HANDLE_NOT_VALID:
872 if (fsq->word[0] == fsq->word[1]) { 866 if (fsq->word[0] == fsq->word[1]) {
873 zfcp_erp_adapter_reopen(unit->port->adapter, 0, 104, 867 zfcp_erp_adapter_reopen(unit->port->adapter, 0,
874 req); 868 "fsafch1", req);
875 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 869 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
876 } 870 }
877 break; 871 break;
878 case FSF_LUN_HANDLE_NOT_VALID: 872 case FSF_LUN_HANDLE_NOT_VALID:
879 if (fsq->word[0] == fsq->word[1]) { 873 if (fsq->word[0] == fsq->word[1]) {
880 zfcp_erp_port_reopen(unit->port, 0, 105, req); 874 zfcp_erp_port_reopen(unit->port, 0, "fsafch2", req);
881 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 875 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
882 } 876 }
883 break; 877 break;
@@ -885,12 +879,12 @@ static void zfcp_fsf_abort_fcp_command_handler(struct zfcp_fsf_req *req)
885 req->status |= ZFCP_STATUS_FSFREQ_ABORTNOTNEEDED; 879 req->status |= ZFCP_STATUS_FSFREQ_ABORTNOTNEEDED;
886 break; 880 break;
887 case FSF_PORT_BOXED: 881 case FSF_PORT_BOXED:
888 zfcp_erp_port_boxed(unit->port, 47, req); 882 zfcp_erp_port_boxed(unit->port, "fsafch3", req);
889 req->status |= ZFCP_STATUS_FSFREQ_ERROR | 883 req->status |= ZFCP_STATUS_FSFREQ_ERROR |
890 ZFCP_STATUS_FSFREQ_RETRY; 884 ZFCP_STATUS_FSFREQ_RETRY;
891 break; 885 break;
892 case FSF_LUN_BOXED: 886 case FSF_LUN_BOXED:
893 zfcp_erp_unit_boxed(unit, 48, req); 887 zfcp_erp_unit_boxed(unit, "fsafch4", req);
894 req->status |= ZFCP_STATUS_FSFREQ_ERROR | 888 req->status |= ZFCP_STATUS_FSFREQ_ERROR |
895 ZFCP_STATUS_FSFREQ_RETRY; 889 ZFCP_STATUS_FSFREQ_RETRY;
896 break; 890 break;
@@ -912,27 +906,22 @@ static void zfcp_fsf_abort_fcp_command_handler(struct zfcp_fsf_req *req)
912/** 906/**
913 * zfcp_fsf_abort_fcp_command - abort running SCSI command 907 * zfcp_fsf_abort_fcp_command - abort running SCSI command
914 * @old_req_id: unsigned long 908 * @old_req_id: unsigned long
915 * @adapter: pointer to struct zfcp_adapter
916 * @unit: pointer to struct zfcp_unit 909 * @unit: pointer to struct zfcp_unit
917 * @req_flags: integer specifying the request flags
918 * Returns: pointer to struct zfcp_fsf_req 910 * Returns: pointer to struct zfcp_fsf_req
919 *
920 * FIXME(design): should be watched by a timeout !!!
921 */ 911 */
922 912
923struct zfcp_fsf_req *zfcp_fsf_abort_fcp_command(unsigned long old_req_id, 913struct zfcp_fsf_req *zfcp_fsf_abort_fcp_command(unsigned long old_req_id,
924 struct zfcp_adapter *adapter, 914 struct zfcp_unit *unit)
925 struct zfcp_unit *unit,
926 int req_flags)
927{ 915{
928 struct qdio_buffer_element *sbale; 916 struct qdio_buffer_element *sbale;
929 struct zfcp_fsf_req *req = NULL; 917 struct zfcp_fsf_req *req = NULL;
918 struct zfcp_adapter *adapter = unit->port->adapter;
930 919
931 spin_lock(&adapter->req_q_lock); 920 spin_lock_bh(&adapter->req_q_lock);
932 if (!zfcp_fsf_sbal_available(adapter)) 921 if (zfcp_fsf_req_sbal_get(adapter))
933 goto out; 922 goto out;
934 req = zfcp_fsf_req_create(adapter, FSF_QTCB_ABORT_FCP_CMND, 923 req = zfcp_fsf_req_create(adapter, FSF_QTCB_ABORT_FCP_CMND,
935 req_flags, adapter->pool.fsf_req_abort); 924 0, adapter->pool.fsf_req_abort);
936 if (IS_ERR(req)) { 925 if (IS_ERR(req)) {
937 req = NULL; 926 req = NULL;
938 goto out; 927 goto out;
@@ -960,7 +949,7 @@ out_error_free:
960 zfcp_fsf_req_free(req); 949 zfcp_fsf_req_free(req);
961 req = NULL; 950 req = NULL;
962out: 951out:
963 spin_unlock(&adapter->req_q_lock); 952 spin_unlock_bh(&adapter->req_q_lock);
964 return req; 953 return req;
965} 954}
966 955
@@ -998,7 +987,7 @@ static void zfcp_fsf_send_ct_handler(struct zfcp_fsf_req *req)
998 ZFCP_STATUS_FSFREQ_RETRY; 987 ZFCP_STATUS_FSFREQ_RETRY;
999 break; 988 break;
1000 case FSF_PORT_HANDLE_NOT_VALID: 989 case FSF_PORT_HANDLE_NOT_VALID:
1001 zfcp_erp_adapter_reopen(adapter, 0, 106, req); 990 zfcp_erp_adapter_reopen(adapter, 0, "fsscth1", req);
1002 case FSF_GENERIC_COMMAND_REJECTED: 991 case FSF_GENERIC_COMMAND_REJECTED:
1003 case FSF_PAYLOAD_SIZE_MISMATCH: 992 case FSF_PAYLOAD_SIZE_MISMATCH:
1004 case FSF_REQUEST_SIZE_TOO_LARGE: 993 case FSF_REQUEST_SIZE_TOO_LARGE:
@@ -1174,12 +1163,8 @@ int zfcp_fsf_send_els(struct zfcp_send_els *els)
1174 struct fsf_qtcb_bottom_support *bottom; 1163 struct fsf_qtcb_bottom_support *bottom;
1175 int ret = -EIO; 1164 int ret = -EIO;
1176 1165
1177 if (unlikely(!(atomic_read(&els->port->status) & 1166 spin_lock_bh(&adapter->req_q_lock);
1178 ZFCP_STATUS_COMMON_UNBLOCKED))) 1167 if (zfcp_fsf_req_sbal_get(adapter))
1179 return -EBUSY;
1180
1181 spin_lock(&adapter->req_q_lock);
1182 if (!zfcp_fsf_sbal_available(adapter))
1183 goto out; 1168 goto out;
1184 req = zfcp_fsf_req_create(adapter, FSF_QTCB_SEND_ELS, 1169 req = zfcp_fsf_req_create(adapter, FSF_QTCB_SEND_ELS,
1185 ZFCP_REQ_AUTO_CLEANUP, NULL); 1170 ZFCP_REQ_AUTO_CLEANUP, NULL);
@@ -1212,7 +1197,7 @@ int zfcp_fsf_send_els(struct zfcp_send_els *els)
1212failed_send: 1197failed_send:
1213 zfcp_fsf_req_free(req); 1198 zfcp_fsf_req_free(req);
1214out: 1199out:
1215 spin_unlock(&adapter->req_q_lock); 1200 spin_unlock_bh(&adapter->req_q_lock);
1216 return ret; 1201 return ret;
1217} 1202}
1218 1203
@@ -1224,7 +1209,7 @@ int zfcp_fsf_exchange_config_data(struct zfcp_erp_action *erp_action)
1224 int retval = -EIO; 1209 int retval = -EIO;
1225 1210
1226 spin_lock_bh(&adapter->req_q_lock); 1211 spin_lock_bh(&adapter->req_q_lock);
1227 if (!zfcp_fsf_sbal_available(adapter)) 1212 if (zfcp_fsf_req_sbal_get(adapter))
1228 goto out; 1213 goto out;
1229 req = zfcp_fsf_req_create(adapter, 1214 req = zfcp_fsf_req_create(adapter,
1230 FSF_QTCB_EXCHANGE_CONFIG_DATA, 1215 FSF_QTCB_EXCHANGE_CONFIG_DATA,
@@ -1320,7 +1305,7 @@ int zfcp_fsf_exchange_port_data(struct zfcp_erp_action *erp_action)
1320 return -EOPNOTSUPP; 1305 return -EOPNOTSUPP;
1321 1306
1322 spin_lock_bh(&adapter->req_q_lock); 1307 spin_lock_bh(&adapter->req_q_lock);
1323 if (!zfcp_fsf_sbal_available(adapter)) 1308 if (zfcp_fsf_req_sbal_get(adapter))
1324 goto out; 1309 goto out;
1325 req = zfcp_fsf_req_create(adapter, FSF_QTCB_EXCHANGE_PORT_DATA, 1310 req = zfcp_fsf_req_create(adapter, FSF_QTCB_EXCHANGE_PORT_DATA,
1326 ZFCP_REQ_AUTO_CLEANUP, 1311 ZFCP_REQ_AUTO_CLEANUP,
@@ -1366,7 +1351,7 @@ int zfcp_fsf_exchange_port_data_sync(struct zfcp_adapter *adapter,
1366 return -EOPNOTSUPP; 1351 return -EOPNOTSUPP;
1367 1352
1368 spin_lock_bh(&adapter->req_q_lock); 1353 spin_lock_bh(&adapter->req_q_lock);
1369 if (!zfcp_fsf_sbal_available(adapter)) 1354 if (zfcp_fsf_req_sbal_get(adapter))
1370 goto out; 1355 goto out;
1371 1356
1372 req = zfcp_fsf_req_create(adapter, FSF_QTCB_EXCHANGE_PORT_DATA, 0, 1357 req = zfcp_fsf_req_create(adapter, FSF_QTCB_EXCHANGE_PORT_DATA, 0,
@@ -1416,7 +1401,7 @@ static void zfcp_fsf_open_port_handler(struct zfcp_fsf_req *req)
1416 "Not enough FCP adapter resources to open " 1401 "Not enough FCP adapter resources to open "
1417 "remote port 0x%016Lx\n", 1402 "remote port 0x%016Lx\n",
1418 (unsigned long long)port->wwpn); 1403 (unsigned long long)port->wwpn);
1419 zfcp_erp_port_failed(port, 31, req); 1404 zfcp_erp_port_failed(port, "fsoph_1", req);
1420 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 1405 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
1421 break; 1406 break;
1422 case FSF_ADAPTER_STATUS_AVAILABLE: 1407 case FSF_ADAPTER_STATUS_AVAILABLE:
@@ -1522,13 +1507,13 @@ static void zfcp_fsf_close_port_handler(struct zfcp_fsf_req *req)
1522 1507
1523 switch (req->qtcb->header.fsf_status) { 1508 switch (req->qtcb->header.fsf_status) {
1524 case FSF_PORT_HANDLE_NOT_VALID: 1509 case FSF_PORT_HANDLE_NOT_VALID:
1525 zfcp_erp_adapter_reopen(port->adapter, 0, 107, req); 1510 zfcp_erp_adapter_reopen(port->adapter, 0, "fscph_1", req);
1526 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 1511 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
1527 break; 1512 break;
1528 case FSF_ADAPTER_STATUS_AVAILABLE: 1513 case FSF_ADAPTER_STATUS_AVAILABLE:
1529 break; 1514 break;
1530 case FSF_GOOD: 1515 case FSF_GOOD:
1531 zfcp_erp_modify_port_status(port, 33, req, 1516 zfcp_erp_modify_port_status(port, "fscph_2", req,
1532 ZFCP_STATUS_COMMON_OPEN, 1517 ZFCP_STATUS_COMMON_OPEN,
1533 ZFCP_CLEAR); 1518 ZFCP_CLEAR);
1534 break; 1519 break;
@@ -1657,7 +1642,7 @@ static void zfcp_fsf_close_wka_port_handler(struct zfcp_fsf_req *req)
1657 1642
1658 if (req->qtcb->header.fsf_status == FSF_PORT_HANDLE_NOT_VALID) { 1643 if (req->qtcb->header.fsf_status == FSF_PORT_HANDLE_NOT_VALID) {
1659 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 1644 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
1660 zfcp_erp_adapter_reopen(wka_port->adapter, 0, 84, req); 1645 zfcp_erp_adapter_reopen(wka_port->adapter, 0, "fscwph1", req);
1661 } 1646 }
1662 1647
1663 wka_port->status = ZFCP_WKA_PORT_OFFLINE; 1648 wka_port->status = ZFCP_WKA_PORT_OFFLINE;
@@ -1712,18 +1697,18 @@ static void zfcp_fsf_close_physical_port_handler(struct zfcp_fsf_req *req)
1712 struct zfcp_unit *unit; 1697 struct zfcp_unit *unit;
1713 1698
1714 if (req->status & ZFCP_STATUS_FSFREQ_ERROR) 1699 if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
1715 goto skip_fsfstatus; 1700 return;
1716 1701
1717 switch (header->fsf_status) { 1702 switch (header->fsf_status) {
1718 case FSF_PORT_HANDLE_NOT_VALID: 1703 case FSF_PORT_HANDLE_NOT_VALID:
1719 zfcp_erp_adapter_reopen(port->adapter, 0, 108, req); 1704 zfcp_erp_adapter_reopen(port->adapter, 0, "fscpph1", req);
1720 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 1705 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
1721 break; 1706 break;
1722 case FSF_ACCESS_DENIED: 1707 case FSF_ACCESS_DENIED:
1723 zfcp_fsf_access_denied_port(req, port); 1708 zfcp_fsf_access_denied_port(req, port);
1724 break; 1709 break;
1725 case FSF_PORT_BOXED: 1710 case FSF_PORT_BOXED:
1726 zfcp_erp_port_boxed(port, 50, req); 1711 zfcp_erp_port_boxed(port, "fscpph2", req);
1727 req->status |= ZFCP_STATUS_FSFREQ_ERROR | 1712 req->status |= ZFCP_STATUS_FSFREQ_ERROR |
1728 ZFCP_STATUS_FSFREQ_RETRY; 1713 ZFCP_STATUS_FSFREQ_RETRY;
1729 /* can't use generic zfcp_erp_modify_port_status because 1714 /* can't use generic zfcp_erp_modify_port_status because
@@ -1752,8 +1737,6 @@ static void zfcp_fsf_close_physical_port_handler(struct zfcp_fsf_req *req)
1752 &unit->status); 1737 &unit->status);
1753 break; 1738 break;
1754 } 1739 }
1755skip_fsfstatus:
1756 atomic_clear_mask(ZFCP_STATUS_PORT_PHYS_CLOSING, &port->status);
1757} 1740}
1758 1741
1759/** 1742/**
@@ -1789,8 +1772,6 @@ int zfcp_fsf_close_physical_port(struct zfcp_erp_action *erp_action)
1789 req->erp_action = erp_action; 1772 req->erp_action = erp_action;
1790 req->handler = zfcp_fsf_close_physical_port_handler; 1773 req->handler = zfcp_fsf_close_physical_port_handler;
1791 erp_action->fsf_req = req; 1774 erp_action->fsf_req = req;
1792 atomic_set_mask(ZFCP_STATUS_PORT_PHYS_CLOSING,
1793 &erp_action->port->status);
1794 1775
1795 zfcp_fsf_start_erp_timer(req); 1776 zfcp_fsf_start_erp_timer(req);
1796 retval = zfcp_fsf_req_send(req); 1777 retval = zfcp_fsf_req_send(req);
@@ -1825,7 +1806,7 @@ static void zfcp_fsf_open_unit_handler(struct zfcp_fsf_req *req)
1825 switch (header->fsf_status) { 1806 switch (header->fsf_status) {
1826 1807
1827 case FSF_PORT_HANDLE_NOT_VALID: 1808 case FSF_PORT_HANDLE_NOT_VALID:
1828 zfcp_erp_adapter_reopen(unit->port->adapter, 0, 109, req); 1809 zfcp_erp_adapter_reopen(unit->port->adapter, 0, "fsouh_1", req);
1829 /* fall through */ 1810 /* fall through */
1830 case FSF_LUN_ALREADY_OPEN: 1811 case FSF_LUN_ALREADY_OPEN:
1831 break; 1812 break;
@@ -1835,7 +1816,7 @@ static void zfcp_fsf_open_unit_handler(struct zfcp_fsf_req *req)
1835 atomic_clear_mask(ZFCP_STATUS_UNIT_READONLY, &unit->status); 1816 atomic_clear_mask(ZFCP_STATUS_UNIT_READONLY, &unit->status);
1836 break; 1817 break;
1837 case FSF_PORT_BOXED: 1818 case FSF_PORT_BOXED:
1838 zfcp_erp_port_boxed(unit->port, 51, req); 1819 zfcp_erp_port_boxed(unit->port, "fsouh_2", req);
1839 req->status |= ZFCP_STATUS_FSFREQ_ERROR | 1820 req->status |= ZFCP_STATUS_FSFREQ_ERROR |
1840 ZFCP_STATUS_FSFREQ_RETRY; 1821 ZFCP_STATUS_FSFREQ_RETRY;
1841 break; 1822 break;
@@ -1851,7 +1832,7 @@ static void zfcp_fsf_open_unit_handler(struct zfcp_fsf_req *req)
1851 else 1832 else
1852 zfcp_act_eval_err(adapter, 1833 zfcp_act_eval_err(adapter,
1853 header->fsf_status_qual.word[2]); 1834 header->fsf_status_qual.word[2]);
1854 zfcp_erp_unit_access_denied(unit, 60, req); 1835 zfcp_erp_unit_access_denied(unit, "fsouh_3", req);
1855 atomic_clear_mask(ZFCP_STATUS_UNIT_SHARED, &unit->status); 1836 atomic_clear_mask(ZFCP_STATUS_UNIT_SHARED, &unit->status);
1856 atomic_clear_mask(ZFCP_STATUS_UNIT_READONLY, &unit->status); 1837 atomic_clear_mask(ZFCP_STATUS_UNIT_READONLY, &unit->status);
1857 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 1838 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
@@ -1862,7 +1843,7 @@ static void zfcp_fsf_open_unit_handler(struct zfcp_fsf_req *req)
1862 "0x%016Lx on port 0x%016Lx\n", 1843 "0x%016Lx on port 0x%016Lx\n",
1863 (unsigned long long)unit->fcp_lun, 1844 (unsigned long long)unit->fcp_lun,
1864 (unsigned long long)unit->port->wwpn); 1845 (unsigned long long)unit->port->wwpn);
1865 zfcp_erp_unit_failed(unit, 34, req); 1846 zfcp_erp_unit_failed(unit, "fsouh_4", req);
1866 /* fall through */ 1847 /* fall through */
1867 case FSF_INVALID_COMMAND_OPTION: 1848 case FSF_INVALID_COMMAND_OPTION:
1868 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 1849 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
@@ -1911,9 +1892,9 @@ static void zfcp_fsf_open_unit_handler(struct zfcp_fsf_req *req)
1911 "port 0x%016Lx)\n", 1892 "port 0x%016Lx)\n",
1912 (unsigned long long)unit->fcp_lun, 1893 (unsigned long long)unit->fcp_lun,
1913 (unsigned long long)unit->port->wwpn); 1894 (unsigned long long)unit->port->wwpn);
1914 zfcp_erp_unit_failed(unit, 35, req); 1895 zfcp_erp_unit_failed(unit, "fsouh_5", req);
1915 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 1896 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
1916 zfcp_erp_unit_shutdown(unit, 0, 80, req); 1897 zfcp_erp_unit_shutdown(unit, 0, "fsouh_6", req);
1917 } else if (!exclusive && readwrite) { 1898 } else if (!exclusive && readwrite) {
1918 dev_err(&adapter->ccw_device->dev, 1899 dev_err(&adapter->ccw_device->dev,
1919 "Shared read-write access not " 1900 "Shared read-write access not "
@@ -1921,9 +1902,9 @@ static void zfcp_fsf_open_unit_handler(struct zfcp_fsf_req *req)
1921 "0x%016Lx)\n", 1902 "0x%016Lx)\n",
1922 (unsigned long long)unit->fcp_lun, 1903 (unsigned long long)unit->fcp_lun,
1923 (unsigned long long)unit->port->wwpn); 1904 (unsigned long long)unit->port->wwpn);
1924 zfcp_erp_unit_failed(unit, 36, req); 1905 zfcp_erp_unit_failed(unit, "fsouh_7", req);
1925 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 1906 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
1926 zfcp_erp_unit_shutdown(unit, 0, 81, req); 1907 zfcp_erp_unit_shutdown(unit, 0, "fsouh_8", req);
1927 } 1908 }
1928 } 1909 }
1929 break; 1910 break;
@@ -1988,15 +1969,15 @@ static void zfcp_fsf_close_unit_handler(struct zfcp_fsf_req *req)
1988 1969
1989 switch (req->qtcb->header.fsf_status) { 1970 switch (req->qtcb->header.fsf_status) {
1990 case FSF_PORT_HANDLE_NOT_VALID: 1971 case FSF_PORT_HANDLE_NOT_VALID:
1991 zfcp_erp_adapter_reopen(unit->port->adapter, 0, 110, req); 1972 zfcp_erp_adapter_reopen(unit->port->adapter, 0, "fscuh_1", req);
1992 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 1973 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
1993 break; 1974 break;
1994 case FSF_LUN_HANDLE_NOT_VALID: 1975 case FSF_LUN_HANDLE_NOT_VALID:
1995 zfcp_erp_port_reopen(unit->port, 0, 111, req); 1976 zfcp_erp_port_reopen(unit->port, 0, "fscuh_2", req);
1996 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 1977 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
1997 break; 1978 break;
1998 case FSF_PORT_BOXED: 1979 case FSF_PORT_BOXED:
1999 zfcp_erp_port_boxed(unit->port, 52, req); 1980 zfcp_erp_port_boxed(unit->port, "fscuh_3", req);
2000 req->status |= ZFCP_STATUS_FSFREQ_ERROR | 1981 req->status |= ZFCP_STATUS_FSFREQ_ERROR |
2001 ZFCP_STATUS_FSFREQ_RETRY; 1982 ZFCP_STATUS_FSFREQ_RETRY;
2002 break; 1983 break;
@@ -2073,7 +2054,6 @@ static void zfcp_fsf_req_latency(struct zfcp_fsf_req *req)
2073 struct fsf_qual_latency_info *lat_inf; 2054 struct fsf_qual_latency_info *lat_inf;
2074 struct latency_cont *lat; 2055 struct latency_cont *lat;
2075 struct zfcp_unit *unit = req->unit; 2056 struct zfcp_unit *unit = req->unit;
2076 unsigned long flags;
2077 2057
2078 lat_inf = &req->qtcb->prefix.prot_status_qual.latency_info; 2058 lat_inf = &req->qtcb->prefix.prot_status_qual.latency_info;
2079 2059
@@ -2091,11 +2071,11 @@ static void zfcp_fsf_req_latency(struct zfcp_fsf_req *req)
2091 return; 2071 return;
2092 } 2072 }
2093 2073
2094 spin_lock_irqsave(&unit->latencies.lock, flags); 2074 spin_lock(&unit->latencies.lock);
2095 zfcp_fsf_update_lat(&lat->channel, lat_inf->channel_lat); 2075 zfcp_fsf_update_lat(&lat->channel, lat_inf->channel_lat);
2096 zfcp_fsf_update_lat(&lat->fabric, lat_inf->fabric_lat); 2076 zfcp_fsf_update_lat(&lat->fabric, lat_inf->fabric_lat);
2097 lat->counter++; 2077 lat->counter++;
2098 spin_unlock_irqrestore(&unit->latencies.lock, flags); 2078 spin_unlock(&unit->latencies.lock);
2099} 2079}
2100 2080
2101#ifdef CONFIG_BLK_DEV_IO_TRACE 2081#ifdef CONFIG_BLK_DEV_IO_TRACE
@@ -2147,7 +2127,6 @@ static void zfcp_fsf_send_fcp_command_task_handler(struct zfcp_fsf_req *req)
2147 2127
2148 if (unlikely(req->status & ZFCP_STATUS_FSFREQ_ABORTED)) { 2128 if (unlikely(req->status & ZFCP_STATUS_FSFREQ_ABORTED)) {
2149 set_host_byte(scpnt, DID_SOFT_ERROR); 2129 set_host_byte(scpnt, DID_SOFT_ERROR);
2150 set_driver_byte(scpnt, SUGGEST_RETRY);
2151 goto skip_fsfstatus; 2130 goto skip_fsfstatus;
2152 } 2131 }
2153 2132
@@ -2237,12 +2216,12 @@ static void zfcp_fsf_send_fcp_command_handler(struct zfcp_fsf_req *req)
2237 switch (header->fsf_status) { 2216 switch (header->fsf_status) {
2238 case FSF_HANDLE_MISMATCH: 2217 case FSF_HANDLE_MISMATCH:
2239 case FSF_PORT_HANDLE_NOT_VALID: 2218 case FSF_PORT_HANDLE_NOT_VALID:
2240 zfcp_erp_adapter_reopen(unit->port->adapter, 0, 112, req); 2219 zfcp_erp_adapter_reopen(unit->port->adapter, 0, "fssfch1", req);
2241 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 2220 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
2242 break; 2221 break;
2243 case FSF_FCPLUN_NOT_VALID: 2222 case FSF_FCPLUN_NOT_VALID:
2244 case FSF_LUN_HANDLE_NOT_VALID: 2223 case FSF_LUN_HANDLE_NOT_VALID:
2245 zfcp_erp_port_reopen(unit->port, 0, 113, req); 2224 zfcp_erp_port_reopen(unit->port, 0, "fssfch2", req);
2246 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 2225 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
2247 break; 2226 break;
2248 case FSF_SERVICE_CLASS_NOT_SUPPORTED: 2227 case FSF_SERVICE_CLASS_NOT_SUPPORTED:
@@ -2258,7 +2237,8 @@ static void zfcp_fsf_send_fcp_command_handler(struct zfcp_fsf_req *req)
2258 req->qtcb->bottom.io.data_direction, 2237 req->qtcb->bottom.io.data_direction,
2259 (unsigned long long)unit->fcp_lun, 2238 (unsigned long long)unit->fcp_lun,
2260 (unsigned long long)unit->port->wwpn); 2239 (unsigned long long)unit->port->wwpn);
2261 zfcp_erp_adapter_shutdown(unit->port->adapter, 0, 133, req); 2240 zfcp_erp_adapter_shutdown(unit->port->adapter, 0, "fssfch3",
2241 req);
2262 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 2242 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
2263 break; 2243 break;
2264 case FSF_CMND_LENGTH_NOT_VALID: 2244 case FSF_CMND_LENGTH_NOT_VALID:
@@ -2268,16 +2248,17 @@ static void zfcp_fsf_send_fcp_command_handler(struct zfcp_fsf_req *req)
2268 req->qtcb->bottom.io.fcp_cmnd_length, 2248 req->qtcb->bottom.io.fcp_cmnd_length,
2269 (unsigned long long)unit->fcp_lun, 2249 (unsigned long long)unit->fcp_lun,
2270 (unsigned long long)unit->port->wwpn); 2250 (unsigned long long)unit->port->wwpn);
2271 zfcp_erp_adapter_shutdown(unit->port->adapter, 0, 134, req); 2251 zfcp_erp_adapter_shutdown(unit->port->adapter, 0, "fssfch4",
2252 req);
2272 req->status |= ZFCP_STATUS_FSFREQ_ERROR; 2253 req->status |= ZFCP_STATUS_FSFREQ_ERROR;
2273 break; 2254 break;
2274 case FSF_PORT_BOXED: 2255 case FSF_PORT_BOXED:
2275 zfcp_erp_port_boxed(unit->port, 53, req); 2256 zfcp_erp_port_boxed(unit->port, "fssfch5", req);
2276 req->status |= ZFCP_STATUS_FSFREQ_ERROR | 2257 req->status |= ZFCP_STATUS_FSFREQ_ERROR |
2277 ZFCP_STATUS_FSFREQ_RETRY; 2258 ZFCP_STATUS_FSFREQ_RETRY;
2278 break; 2259 break;
2279 case FSF_LUN_BOXED: 2260 case FSF_LUN_BOXED:
2280 zfcp_erp_unit_boxed(unit, 54, req); 2261 zfcp_erp_unit_boxed(unit, "fssfch6", req);
2281 req->status |= ZFCP_STATUS_FSFREQ_ERROR | 2262 req->status |= ZFCP_STATUS_FSFREQ_ERROR |
2282 ZFCP_STATUS_FSFREQ_RETRY; 2263 ZFCP_STATUS_FSFREQ_RETRY;
2283 break; 2264 break;
@@ -2314,30 +2295,29 @@ static void zfcp_set_fcp_dl(struct fcp_cmnd_iu *fcp_cmd, u32 fcp_dl)
2314 2295
2315/** 2296/**
2316 * zfcp_fsf_send_fcp_command_task - initiate an FCP command (for a SCSI command) 2297 * zfcp_fsf_send_fcp_command_task - initiate an FCP command (for a SCSI command)
2317 * @adapter: adapter where scsi command is issued
2318 * @unit: unit where command is sent to 2298 * @unit: unit where command is sent to
2319 * @scsi_cmnd: scsi command to be sent 2299 * @scsi_cmnd: scsi command to be sent
2320 * @timer: timer to be started when request is initiated
2321 * @req_flags: flags for fsf_request
2322 */ 2300 */
2323int zfcp_fsf_send_fcp_command_task(struct zfcp_adapter *adapter, 2301int zfcp_fsf_send_fcp_command_task(struct zfcp_unit *unit,
2324 struct zfcp_unit *unit, 2302 struct scsi_cmnd *scsi_cmnd)
2325 struct scsi_cmnd *scsi_cmnd,
2326 int use_timer, int req_flags)
2327{ 2303{
2328 struct zfcp_fsf_req *req; 2304 struct zfcp_fsf_req *req;
2329 struct fcp_cmnd_iu *fcp_cmnd_iu; 2305 struct fcp_cmnd_iu *fcp_cmnd_iu;
2330 unsigned int sbtype; 2306 unsigned int sbtype;
2331 int real_bytes, retval = -EIO; 2307 int real_bytes, retval = -EIO;
2308 struct zfcp_adapter *adapter = unit->port->adapter;
2332 2309
2333 if (unlikely(!(atomic_read(&unit->status) & 2310 if (unlikely(!(atomic_read(&unit->status) &
2334 ZFCP_STATUS_COMMON_UNBLOCKED))) 2311 ZFCP_STATUS_COMMON_UNBLOCKED)))
2335 return -EBUSY; 2312 return -EBUSY;
2336 2313
2337 spin_lock(&adapter->req_q_lock); 2314 spin_lock(&adapter->req_q_lock);
2338 if (!zfcp_fsf_sbal_available(adapter)) 2315 if (atomic_read(&adapter->req_q.count) <= 0) {
2316 atomic_inc(&adapter->qdio_outb_full);
2339 goto out; 2317 goto out;
2340 req = zfcp_fsf_req_create(adapter, FSF_QTCB_FCP_CMND, req_flags, 2318 }
2319 req = zfcp_fsf_req_create(adapter, FSF_QTCB_FCP_CMND,
2320 ZFCP_REQ_AUTO_CLEANUP,
2341 adapter->pool.fsf_req_scsi); 2321 adapter->pool.fsf_req_scsi);
2342 if (IS_ERR(req)) { 2322 if (IS_ERR(req)) {
2343 retval = PTR_ERR(req); 2323 retval = PTR_ERR(req);
@@ -2411,7 +2391,7 @@ int zfcp_fsf_send_fcp_command_task(struct zfcp_adapter *adapter,
2411 "on port 0x%016Lx closed\n", 2391 "on port 0x%016Lx closed\n",
2412 (unsigned long long)unit->fcp_lun, 2392 (unsigned long long)unit->fcp_lun,
2413 (unsigned long long)unit->port->wwpn); 2393 (unsigned long long)unit->port->wwpn);
2414 zfcp_erp_unit_shutdown(unit, 0, 131, req); 2394 zfcp_erp_unit_shutdown(unit, 0, "fssfct1", req);
2415 retval = -EINVAL; 2395 retval = -EINVAL;
2416 } 2396 }
2417 goto failed_scsi_cmnd; 2397 goto failed_scsi_cmnd;
@@ -2419,9 +2399,6 @@ int zfcp_fsf_send_fcp_command_task(struct zfcp_adapter *adapter,
2419 2399
2420 zfcp_set_fcp_dl(fcp_cmnd_iu, real_bytes); 2400 zfcp_set_fcp_dl(fcp_cmnd_iu, real_bytes);
2421 2401
2422 if (use_timer)
2423 zfcp_fsf_start_timer(req, ZFCP_FSF_REQUEST_TIMEOUT);
2424
2425 retval = zfcp_fsf_req_send(req); 2402 retval = zfcp_fsf_req_send(req);
2426 if (unlikely(retval)) 2403 if (unlikely(retval))
2427 goto failed_scsi_cmnd; 2404 goto failed_scsi_cmnd;
@@ -2439,28 +2416,25 @@ out:
2439 2416
2440/** 2417/**
2441 * zfcp_fsf_send_fcp_ctm - send SCSI task management command 2418 * zfcp_fsf_send_fcp_ctm - send SCSI task management command
2442 * @adapter: pointer to struct zfcp-adapter
2443 * @unit: pointer to struct zfcp_unit 2419 * @unit: pointer to struct zfcp_unit
2444 * @tm_flags: unsigned byte for task management flags 2420 * @tm_flags: unsigned byte for task management flags
2445 * @req_flags: int request flags
2446 * Returns: on success pointer to struct fsf_req, NULL otherwise 2421 * Returns: on success pointer to struct fsf_req, NULL otherwise
2447 */ 2422 */
2448struct zfcp_fsf_req *zfcp_fsf_send_fcp_ctm(struct zfcp_adapter *adapter, 2423struct zfcp_fsf_req *zfcp_fsf_send_fcp_ctm(struct zfcp_unit *unit, u8 tm_flags)
2449 struct zfcp_unit *unit,
2450 u8 tm_flags, int req_flags)
2451{ 2424{
2452 struct qdio_buffer_element *sbale; 2425 struct qdio_buffer_element *sbale;
2453 struct zfcp_fsf_req *req = NULL; 2426 struct zfcp_fsf_req *req = NULL;
2454 struct fcp_cmnd_iu *fcp_cmnd_iu; 2427 struct fcp_cmnd_iu *fcp_cmnd_iu;
2428 struct zfcp_adapter *adapter = unit->port->adapter;
2455 2429
2456 if (unlikely(!(atomic_read(&unit->status) & 2430 if (unlikely(!(atomic_read(&unit->status) &
2457 ZFCP_STATUS_COMMON_UNBLOCKED))) 2431 ZFCP_STATUS_COMMON_UNBLOCKED)))
2458 return NULL; 2432 return NULL;
2459 2433
2460 spin_lock(&adapter->req_q_lock); 2434 spin_lock_bh(&adapter->req_q_lock);
2461 if (!zfcp_fsf_sbal_available(adapter)) 2435 if (zfcp_fsf_req_sbal_get(adapter))
2462 goto out; 2436 goto out;
2463 req = zfcp_fsf_req_create(adapter, FSF_QTCB_FCP_CMND, req_flags, 2437 req = zfcp_fsf_req_create(adapter, FSF_QTCB_FCP_CMND, 0,
2464 adapter->pool.fsf_req_scsi); 2438 adapter->pool.fsf_req_scsi);
2465 if (IS_ERR(req)) { 2439 if (IS_ERR(req)) {
2466 req = NULL; 2440 req = NULL;
@@ -2492,7 +2466,7 @@ struct zfcp_fsf_req *zfcp_fsf_send_fcp_ctm(struct zfcp_adapter *adapter,
2492 zfcp_fsf_req_free(req); 2466 zfcp_fsf_req_free(req);
2493 req = NULL; 2467 req = NULL;
2494out: 2468out:
2495 spin_unlock(&adapter->req_q_lock); 2469 spin_unlock_bh(&adapter->req_q_lock);
2496 return req; 2470 return req;
2497} 2471}
2498 2472
diff --git a/drivers/s390/scsi/zfcp_fsf.h b/drivers/s390/scsi/zfcp_fsf.h
index 8bb200252347..df7f232faba8 100644
--- a/drivers/s390/scsi/zfcp_fsf.h
+++ b/drivers/s390/scsi/zfcp_fsf.h
@@ -127,10 +127,6 @@
127#define FSF_STATUS_READ_CFDC_UPDATED 0x0000000A 127#define FSF_STATUS_READ_CFDC_UPDATED 0x0000000A
128#define FSF_STATUS_READ_FEATURE_UPDATE_ALERT 0x0000000C 128#define FSF_STATUS_READ_FEATURE_UPDATE_ALERT 0x0000000C
129 129
130/* status subtypes in status read buffer */
131#define FSF_STATUS_READ_SUB_CLOSE_PHYS_PORT 0x00000001
132#define FSF_STATUS_READ_SUB_ERROR_PORT 0x00000002
133
134/* status subtypes for link down */ 130/* status subtypes for link down */
135#define FSF_STATUS_READ_SUB_NO_PHYSICAL_LINK 0x00000000 131#define FSF_STATUS_READ_SUB_NO_PHYSICAL_LINK 0x00000000
136#define FSF_STATUS_READ_SUB_FDISC_FAILED 0x00000001 132#define FSF_STATUS_READ_SUB_FDISC_FAILED 0x00000001
diff --git a/drivers/s390/scsi/zfcp_qdio.c b/drivers/s390/scsi/zfcp_qdio.c
index 33e0a206a0a4..e0a215309df0 100644
--- a/drivers/s390/scsi/zfcp_qdio.c
+++ b/drivers/s390/scsi/zfcp_qdio.c
@@ -11,9 +11,6 @@
11 11
12#include "zfcp_ext.h" 12#include "zfcp_ext.h"
13 13
14/* FIXME(tune): free space should be one max. SBAL chain plus what? */
15#define ZFCP_QDIO_PCI_INTERVAL (QDIO_MAX_BUFFERS_PER_Q \
16 - (FSF_MAX_SBALS_PER_REQ + 4))
17#define QBUFF_PER_PAGE (PAGE_SIZE / sizeof(struct qdio_buffer)) 14#define QBUFF_PER_PAGE (PAGE_SIZE / sizeof(struct qdio_buffer))
18 15
19static int zfcp_qdio_buffers_enqueue(struct qdio_buffer **sbal) 16static int zfcp_qdio_buffers_enqueue(struct qdio_buffer **sbal)
@@ -58,7 +55,7 @@ void zfcp_qdio_free(struct zfcp_adapter *adapter)
58 } 55 }
59} 56}
60 57
61static void zfcp_qdio_handler_error(struct zfcp_adapter *adapter, u8 id) 58static void zfcp_qdio_handler_error(struct zfcp_adapter *adapter, char *id)
62{ 59{
63 dev_warn(&adapter->ccw_device->dev, "A QDIO problem occurred\n"); 60 dev_warn(&adapter->ccw_device->dev, "A QDIO problem occurred\n");
64 61
@@ -77,6 +74,23 @@ static void zfcp_qdio_zero_sbals(struct qdio_buffer *sbal[], int first, int cnt)
77 } 74 }
78} 75}
79 76
77/* this needs to be called prior to updating the queue fill level */
78static void zfcp_qdio_account(struct zfcp_adapter *adapter)
79{
80 ktime_t now;
81 s64 span;
82 int free, used;
83
84 spin_lock(&adapter->qdio_stat_lock);
85 now = ktime_get();
86 span = ktime_us_delta(now, adapter->req_q_time);
87 free = max(0, atomic_read(&adapter->req_q.count));
88 used = QDIO_MAX_BUFFERS_PER_Q - free;
89 adapter->req_q_util += used * span;
90 adapter->req_q_time = now;
91 spin_unlock(&adapter->qdio_stat_lock);
92}
93
80static void zfcp_qdio_int_req(struct ccw_device *cdev, unsigned int qdio_err, 94static void zfcp_qdio_int_req(struct ccw_device *cdev, unsigned int qdio_err,
81 int queue_no, int first, int count, 95 int queue_no, int first, int count,
82 unsigned long parm) 96 unsigned long parm)
@@ -86,13 +100,14 @@ static void zfcp_qdio_int_req(struct ccw_device *cdev, unsigned int qdio_err,
86 100
87 if (unlikely(qdio_err)) { 101 if (unlikely(qdio_err)) {
88 zfcp_hba_dbf_event_qdio(adapter, qdio_err, first, count); 102 zfcp_hba_dbf_event_qdio(adapter, qdio_err, first, count);
89 zfcp_qdio_handler_error(adapter, 140); 103 zfcp_qdio_handler_error(adapter, "qdireq1");
90 return; 104 return;
91 } 105 }
92 106
93 /* cleanup all SBALs being program-owned now */ 107 /* cleanup all SBALs being program-owned now */
94 zfcp_qdio_zero_sbals(queue->sbal, first, count); 108 zfcp_qdio_zero_sbals(queue->sbal, first, count);
95 109
110 zfcp_qdio_account(adapter);
96 atomic_add(count, &queue->count); 111 atomic_add(count, &queue->count);
97 wake_up(&adapter->request_wq); 112 wake_up(&adapter->request_wq);
98} 113}
@@ -154,7 +169,7 @@ static void zfcp_qdio_int_resp(struct ccw_device *cdev, unsigned int qdio_err,
154 169
155 if (unlikely(qdio_err)) { 170 if (unlikely(qdio_err)) {
156 zfcp_hba_dbf_event_qdio(adapter, qdio_err, first, count); 171 zfcp_hba_dbf_event_qdio(adapter, qdio_err, first, count);
157 zfcp_qdio_handler_error(adapter, 147); 172 zfcp_qdio_handler_error(adapter, "qdires1");
158 return; 173 return;
159 } 174 }
160 175
@@ -346,21 +361,12 @@ int zfcp_qdio_send(struct zfcp_fsf_req *fsf_req)
346 struct zfcp_qdio_queue *req_q = &adapter->req_q; 361 struct zfcp_qdio_queue *req_q = &adapter->req_q;
347 int first = fsf_req->sbal_first; 362 int first = fsf_req->sbal_first;
348 int count = fsf_req->sbal_number; 363 int count = fsf_req->sbal_number;
349 int retval, pci, pci_batch; 364 int retval;
350 struct qdio_buffer_element *sbale; 365 unsigned int qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
351 366
352 /* acknowledgements for transferred buffers */ 367 zfcp_qdio_account(adapter);
353 pci_batch = adapter->req_q_pci_batch + count;
354 if (unlikely(pci_batch >= ZFCP_QDIO_PCI_INTERVAL)) {
355 pci_batch %= ZFCP_QDIO_PCI_INTERVAL;
356 pci = first + count - (pci_batch + 1);
357 pci %= QDIO_MAX_BUFFERS_PER_Q;
358 sbale = zfcp_qdio_sbale(req_q, pci, 0);
359 sbale->flags |= SBAL_FLAGS0_PCI;
360 }
361 368
362 retval = do_QDIO(adapter->ccw_device, QDIO_FLAG_SYNC_OUTPUT, 0, first, 369 retval = do_QDIO(adapter->ccw_device, qdio_flags, 0, first, count);
363 count);
364 if (unlikely(retval)) { 370 if (unlikely(retval)) {
365 zfcp_qdio_zero_sbals(req_q->sbal, first, count); 371 zfcp_qdio_zero_sbals(req_q->sbal, first, count);
366 return retval; 372 return retval;
@@ -370,7 +376,6 @@ int zfcp_qdio_send(struct zfcp_fsf_req *fsf_req)
370 atomic_sub(count, &req_q->count); 376 atomic_sub(count, &req_q->count);
371 req_q->first += count; 377 req_q->first += count;
372 req_q->first %= QDIO_MAX_BUFFERS_PER_Q; 378 req_q->first %= QDIO_MAX_BUFFERS_PER_Q;
373 adapter->req_q_pci_batch = pci_batch;
374 return 0; 379 return 0;
375} 380}
376 381
@@ -441,7 +446,6 @@ void zfcp_qdio_close(struct zfcp_adapter *adapter)
441 } 446 }
442 req_q->first = 0; 447 req_q->first = 0;
443 atomic_set(&req_q->count, 0); 448 atomic_set(&req_q->count, 0);
444 adapter->req_q_pci_batch = 0;
445 adapter->resp_q.first = 0; 449 adapter->resp_q.first = 0;
446 atomic_set(&adapter->resp_q.count, 0); 450 atomic_set(&adapter->resp_q.count, 0);
447} 451}
@@ -479,7 +483,6 @@ int zfcp_qdio_open(struct zfcp_adapter *adapter)
479 /* set index of first avalable SBALS / number of available SBALS */ 483 /* set index of first avalable SBALS / number of available SBALS */
480 adapter->req_q.first = 0; 484 adapter->req_q.first = 0;
481 atomic_set(&adapter->req_q.count, QDIO_MAX_BUFFERS_PER_Q); 485 atomic_set(&adapter->req_q.count, QDIO_MAX_BUFFERS_PER_Q);
482 adapter->req_q_pci_batch = 0;
483 486
484 return 0; 487 return 0;
485 488
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index 9dc42a68fbdd..58201e1ae478 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Interface to Linux SCSI midlayer. 4 * Interface to Linux SCSI midlayer.
5 * 5 *
6 * Copyright IBM Corporation 2002, 2008 6 * Copyright IBM Corporation 2002, 2009
7 */ 7 */
8 8
9#define KMSG_COMPONENT "zfcp" 9#define KMSG_COMPONENT "zfcp"
@@ -27,9 +27,7 @@ char *zfcp_get_fcp_sns_info_ptr(struct fcp_rsp_iu *fcp_rsp_iu)
27static void zfcp_scsi_slave_destroy(struct scsi_device *sdpnt) 27static void zfcp_scsi_slave_destroy(struct scsi_device *sdpnt)
28{ 28{
29 struct zfcp_unit *unit = (struct zfcp_unit *) sdpnt->hostdata; 29 struct zfcp_unit *unit = (struct zfcp_unit *) sdpnt->hostdata;
30 atomic_clear_mask(ZFCP_STATUS_UNIT_REGISTERED, &unit->status);
31 unit->device = NULL; 30 unit->device = NULL;
32 zfcp_erp_unit_failed(unit, 12, NULL);
33 zfcp_unit_put(unit); 31 zfcp_unit_put(unit);
34} 32}
35 33
@@ -58,8 +56,8 @@ static int zfcp_scsi_queuecommand(struct scsi_cmnd *scpnt,
58{ 56{
59 struct zfcp_unit *unit; 57 struct zfcp_unit *unit;
60 struct zfcp_adapter *adapter; 58 struct zfcp_adapter *adapter;
61 int status; 59 int status, scsi_result, ret;
62 int ret; 60 struct fc_rport *rport = starget_to_rport(scsi_target(scpnt->device));
63 61
64 /* reset the status for this request */ 62 /* reset the status for this request */
65 scpnt->result = 0; 63 scpnt->result = 0;
@@ -81,6 +79,14 @@ static int zfcp_scsi_queuecommand(struct scsi_cmnd *scpnt,
81 return 0; 79 return 0;
82 } 80 }
83 81
82 scsi_result = fc_remote_port_chkready(rport);
83 if (unlikely(scsi_result)) {
84 scpnt->result = scsi_result;
85 zfcp_scsi_dbf_event_result("fail", 4, adapter, scpnt, NULL);
86 scpnt->scsi_done(scpnt);
87 return 0;
88 }
89
84 status = atomic_read(&unit->status); 90 status = atomic_read(&unit->status);
85 if (unlikely((status & ZFCP_STATUS_COMMON_ERP_FAILED) || 91 if (unlikely((status & ZFCP_STATUS_COMMON_ERP_FAILED) ||
86 !(status & ZFCP_STATUS_COMMON_RUNNING))) { 92 !(status & ZFCP_STATUS_COMMON_RUNNING))) {
@@ -88,8 +94,7 @@ static int zfcp_scsi_queuecommand(struct scsi_cmnd *scpnt,
88 return 0;; 94 return 0;;
89 } 95 }
90 96
91 ret = zfcp_fsf_send_fcp_command_task(adapter, unit, scpnt, 0, 97 ret = zfcp_fsf_send_fcp_command_task(unit, scpnt);
92 ZFCP_REQ_AUTO_CLEANUP);
93 if (unlikely(ret == -EBUSY)) 98 if (unlikely(ret == -EBUSY))
94 return SCSI_MLQUEUE_DEVICE_BUSY; 99 return SCSI_MLQUEUE_DEVICE_BUSY;
95 else if (unlikely(ret < 0)) 100 else if (unlikely(ret < 0))
@@ -133,8 +138,7 @@ static int zfcp_scsi_slave_alloc(struct scsi_device *sdp)
133 138
134 read_lock_irqsave(&zfcp_data.config_lock, flags); 139 read_lock_irqsave(&zfcp_data.config_lock, flags);
135 unit = zfcp_unit_lookup(adapter, sdp->channel, sdp->id, sdp->lun); 140 unit = zfcp_unit_lookup(adapter, sdp->channel, sdp->id, sdp->lun);
136 if (unit && 141 if (unit) {
137 (atomic_read(&unit->status) & ZFCP_STATUS_UNIT_REGISTERED)) {
138 sdp->hostdata = unit; 142 sdp->hostdata = unit;
139 unit->device = sdp; 143 unit->device = sdp;
140 zfcp_unit_get(unit); 144 zfcp_unit_get(unit);
@@ -147,79 +151,91 @@ out:
147 151
148static int zfcp_scsi_eh_abort_handler(struct scsi_cmnd *scpnt) 152static int zfcp_scsi_eh_abort_handler(struct scsi_cmnd *scpnt)
149{ 153{
150 struct Scsi_Host *scsi_host; 154 struct Scsi_Host *scsi_host = scpnt->device->host;
151 struct zfcp_adapter *adapter; 155 struct zfcp_adapter *adapter =
152 struct zfcp_unit *unit; 156 (struct zfcp_adapter *) scsi_host->hostdata[0];
153 struct zfcp_fsf_req *fsf_req; 157 struct zfcp_unit *unit = scpnt->device->hostdata;
158 struct zfcp_fsf_req *old_req, *abrt_req;
154 unsigned long flags; 159 unsigned long flags;
155 unsigned long old_req_id = (unsigned long) scpnt->host_scribble; 160 unsigned long old_req_id = (unsigned long) scpnt->host_scribble;
156 int retval = SUCCESS; 161 int retval = SUCCESS;
157 162 int retry = 3;
158 scsi_host = scpnt->device->host;
159 adapter = (struct zfcp_adapter *) scsi_host->hostdata[0];
160 unit = scpnt->device->hostdata;
161 163
162 /* avoid race condition between late normal completion and abort */ 164 /* avoid race condition between late normal completion and abort */
163 write_lock_irqsave(&adapter->abort_lock, flags); 165 write_lock_irqsave(&adapter->abort_lock, flags);
164 166
165 /* Check whether corresponding fsf_req is still pending */
166 spin_lock(&adapter->req_list_lock); 167 spin_lock(&adapter->req_list_lock);
167 fsf_req = zfcp_reqlist_find(adapter, old_req_id); 168 old_req = zfcp_reqlist_find(adapter, old_req_id);
168 spin_unlock(&adapter->req_list_lock); 169 spin_unlock(&adapter->req_list_lock);
169 if (!fsf_req) { 170 if (!old_req) {
170 write_unlock_irqrestore(&adapter->abort_lock, flags); 171 write_unlock_irqrestore(&adapter->abort_lock, flags);
171 zfcp_scsi_dbf_event_abort("lte1", adapter, scpnt, NULL, 0); 172 zfcp_scsi_dbf_event_abort("lte1", adapter, scpnt, NULL,
172 return retval; 173 old_req_id);
174 return SUCCESS;
173 } 175 }
174 fsf_req->data = NULL; 176 old_req->data = NULL;
175 177
176 /* don't access old fsf_req after releasing the abort_lock */ 178 /* don't access old fsf_req after releasing the abort_lock */
177 write_unlock_irqrestore(&adapter->abort_lock, flags); 179 write_unlock_irqrestore(&adapter->abort_lock, flags);
178 180
179 fsf_req = zfcp_fsf_abort_fcp_command(old_req_id, adapter, unit, 0); 181 while (retry--) {
180 if (!fsf_req) { 182 abrt_req = zfcp_fsf_abort_fcp_command(old_req_id, unit);
181 zfcp_scsi_dbf_event_abort("nres", adapter, scpnt, NULL, 183 if (abrt_req)
182 old_req_id); 184 break;
183 retval = FAILED; 185
184 return retval; 186 zfcp_erp_wait(adapter);
187 if (!(atomic_read(&adapter->status) &
188 ZFCP_STATUS_COMMON_RUNNING)) {
189 zfcp_scsi_dbf_event_abort("nres", adapter, scpnt, NULL,
190 old_req_id);
191 return SUCCESS;
192 }
185 } 193 }
194 if (!abrt_req)
195 return FAILED;
186 196
187 __wait_event(fsf_req->completion_wq, 197 wait_event(abrt_req->completion_wq,
188 fsf_req->status & ZFCP_STATUS_FSFREQ_COMPLETED); 198 abrt_req->status & ZFCP_STATUS_FSFREQ_COMPLETED);
189 199
190 if (fsf_req->status & ZFCP_STATUS_FSFREQ_ABORTSUCCEEDED) { 200 if (abrt_req->status & ZFCP_STATUS_FSFREQ_ABORTSUCCEEDED)
191 zfcp_scsi_dbf_event_abort("okay", adapter, scpnt, fsf_req, 0); 201 zfcp_scsi_dbf_event_abort("okay", adapter, scpnt, abrt_req, 0);
192 } else if (fsf_req->status & ZFCP_STATUS_FSFREQ_ABORTNOTNEEDED) { 202 else if (abrt_req->status & ZFCP_STATUS_FSFREQ_ABORTNOTNEEDED)
193 zfcp_scsi_dbf_event_abort("lte2", adapter, scpnt, fsf_req, 0); 203 zfcp_scsi_dbf_event_abort("lte2", adapter, scpnt, abrt_req, 0);
194 } else { 204 else {
195 zfcp_scsi_dbf_event_abort("fail", adapter, scpnt, fsf_req, 0); 205 zfcp_scsi_dbf_event_abort("fail", adapter, scpnt, abrt_req, 0);
196 retval = FAILED; 206 retval = FAILED;
197 } 207 }
198 zfcp_fsf_req_free(fsf_req); 208 zfcp_fsf_req_free(abrt_req);
199
200 return retval; 209 return retval;
201} 210}
202 211
203static int zfcp_task_mgmt_function(struct zfcp_unit *unit, u8 tm_flags, 212static int zfcp_task_mgmt_function(struct scsi_cmnd *scpnt, u8 tm_flags)
204 struct scsi_cmnd *scpnt)
205{ 213{
214 struct zfcp_unit *unit = scpnt->device->hostdata;
206 struct zfcp_adapter *adapter = unit->port->adapter; 215 struct zfcp_adapter *adapter = unit->port->adapter;
207 struct zfcp_fsf_req *fsf_req; 216 struct zfcp_fsf_req *fsf_req;
208 int retval = SUCCESS; 217 int retval = SUCCESS;
209 218 int retry = 3;
210 /* issue task management function */ 219
211 fsf_req = zfcp_fsf_send_fcp_ctm(adapter, unit, tm_flags, 0); 220 while (retry--) {
212 if (!fsf_req) { 221 fsf_req = zfcp_fsf_send_fcp_ctm(unit, tm_flags);
213 zfcp_scsi_dbf_event_devreset("nres", tm_flags, unit, scpnt); 222 if (fsf_req)
214 return FAILED; 223 break;
224
225 zfcp_erp_wait(adapter);
226 if (!(atomic_read(&adapter->status) &
227 ZFCP_STATUS_COMMON_RUNNING)) {
228 zfcp_scsi_dbf_event_devreset("nres", tm_flags, unit,
229 scpnt);
230 return SUCCESS;
231 }
215 } 232 }
233 if (!fsf_req)
234 return FAILED;
216 235
217 __wait_event(fsf_req->completion_wq, 236 wait_event(fsf_req->completion_wq,
218 fsf_req->status & ZFCP_STATUS_FSFREQ_COMPLETED); 237 fsf_req->status & ZFCP_STATUS_FSFREQ_COMPLETED);
219 238
220 /*
221 * check completion status of task management function
222 */
223 if (fsf_req->status & ZFCP_STATUS_FSFREQ_TMFUNCFAILED) { 239 if (fsf_req->status & ZFCP_STATUS_FSFREQ_TMFUNCFAILED) {
224 zfcp_scsi_dbf_event_devreset("fail", tm_flags, unit, scpnt); 240 zfcp_scsi_dbf_event_devreset("fail", tm_flags, unit, scpnt);
225 retval = FAILED; 241 retval = FAILED;
@@ -230,40 +246,25 @@ static int zfcp_task_mgmt_function(struct zfcp_unit *unit, u8 tm_flags,
230 zfcp_scsi_dbf_event_devreset("okay", tm_flags, unit, scpnt); 246 zfcp_scsi_dbf_event_devreset("okay", tm_flags, unit, scpnt);
231 247
232 zfcp_fsf_req_free(fsf_req); 248 zfcp_fsf_req_free(fsf_req);
233
234 return retval; 249 return retval;
235} 250}
236 251
237static int zfcp_scsi_eh_device_reset_handler(struct scsi_cmnd *scpnt) 252static int zfcp_scsi_eh_device_reset_handler(struct scsi_cmnd *scpnt)
238{ 253{
239 struct zfcp_unit *unit = scpnt->device->hostdata; 254 return zfcp_task_mgmt_function(scpnt, FCP_LOGICAL_UNIT_RESET);
240
241 if (!unit) {
242 WARN_ON(1);
243 return SUCCESS;
244 }
245 return zfcp_task_mgmt_function(unit, FCP_LOGICAL_UNIT_RESET, scpnt);
246} 255}
247 256
248static int zfcp_scsi_eh_target_reset_handler(struct scsi_cmnd *scpnt) 257static int zfcp_scsi_eh_target_reset_handler(struct scsi_cmnd *scpnt)
249{ 258{
250 struct zfcp_unit *unit = scpnt->device->hostdata; 259 return zfcp_task_mgmt_function(scpnt, FCP_TARGET_RESET);
251
252 if (!unit) {
253 WARN_ON(1);
254 return SUCCESS;
255 }
256 return zfcp_task_mgmt_function(unit, FCP_TARGET_RESET, scpnt);
257} 260}
258 261
259static int zfcp_scsi_eh_host_reset_handler(struct scsi_cmnd *scpnt) 262static int zfcp_scsi_eh_host_reset_handler(struct scsi_cmnd *scpnt)
260{ 263{
261 struct zfcp_unit *unit; 264 struct zfcp_unit *unit = scpnt->device->hostdata;
262 struct zfcp_adapter *adapter; 265 struct zfcp_adapter *adapter = unit->port->adapter;
263 266
264 unit = scpnt->device->hostdata; 267 zfcp_erp_adapter_reopen(adapter, 0, "schrh_1", scpnt);
265 adapter = unit->port->adapter;
266 zfcp_erp_adapter_reopen(adapter, 0, 141, scpnt);
267 zfcp_erp_wait(adapter); 268 zfcp_erp_wait(adapter);
268 269
269 return SUCCESS; 270 return SUCCESS;
@@ -479,6 +480,109 @@ static void zfcp_set_rport_dev_loss_tmo(struct fc_rport *rport, u32 timeout)
479 rport->dev_loss_tmo = timeout; 480 rport->dev_loss_tmo = timeout;
480} 481}
481 482
483/**
484 * zfcp_scsi_dev_loss_tmo_callbk - Free any reference to rport
485 * @rport: The rport that is about to be deleted.
486 */
487static void zfcp_scsi_dev_loss_tmo_callbk(struct fc_rport *rport)
488{
489 struct zfcp_port *port = rport->dd_data;
490
491 write_lock_irq(&zfcp_data.config_lock);
492 port->rport = NULL;
493 write_unlock_irq(&zfcp_data.config_lock);
494}
495
496/**
497 * zfcp_scsi_terminate_rport_io - Terminate all I/O on a rport
498 * @rport: The FC rport where to teminate I/O
499 *
500 * Abort all pending SCSI commands for a port by closing the
501 * port. Using a reopen for avoids a conflict with a shutdown
502 * overwriting a reopen.
503 */
504static void zfcp_scsi_terminate_rport_io(struct fc_rport *rport)
505{
506 struct zfcp_port *port = rport->dd_data;
507
508 zfcp_erp_port_reopen(port, 0, "sctrpi1", NULL);
509}
510
511static void zfcp_scsi_rport_register(struct zfcp_port *port)
512{
513 struct fc_rport_identifiers ids;
514 struct fc_rport *rport;
515
516 ids.node_name = port->wwnn;
517 ids.port_name = port->wwpn;
518 ids.port_id = port->d_id;
519 ids.roles = FC_RPORT_ROLE_FCP_TARGET;
520
521 rport = fc_remote_port_add(port->adapter->scsi_host, 0, &ids);
522 if (!rport) {
523 dev_err(&port->adapter->ccw_device->dev,
524 "Registering port 0x%016Lx failed\n",
525 (unsigned long long)port->wwpn);
526 return;
527 }
528
529 rport->dd_data = port;
530 rport->maxframe_size = port->maxframe_size;
531 rport->supported_classes = port->supported_classes;
532 port->rport = rport;
533}
534
535static void zfcp_scsi_rport_block(struct zfcp_port *port)
536{
537 if (port->rport)
538 fc_remote_port_delete(port->rport);
539}
540
541void zfcp_scsi_schedule_rport_register(struct zfcp_port *port)
542{
543 zfcp_port_get(port);
544 port->rport_task = RPORT_ADD;
545
546 if (!queue_work(zfcp_data.work_queue, &port->rport_work))
547 zfcp_port_put(port);
548}
549
550void zfcp_scsi_schedule_rport_block(struct zfcp_port *port)
551{
552 zfcp_port_get(port);
553 port->rport_task = RPORT_DEL;
554
555 if (!queue_work(zfcp_data.work_queue, &port->rport_work))
556 zfcp_port_put(port);
557}
558
559void zfcp_scsi_schedule_rports_block(struct zfcp_adapter *adapter)
560{
561 struct zfcp_port *port;
562
563 list_for_each_entry(port, &adapter->port_list_head, list)
564 zfcp_scsi_schedule_rport_block(port);
565}
566
567void zfcp_scsi_rport_work(struct work_struct *work)
568{
569 struct zfcp_port *port = container_of(work, struct zfcp_port,
570 rport_work);
571
572 while (port->rport_task) {
573 if (port->rport_task == RPORT_ADD) {
574 port->rport_task = RPORT_NONE;
575 zfcp_scsi_rport_register(port);
576 } else {
577 port->rport_task = RPORT_NONE;
578 zfcp_scsi_rport_block(port);
579 }
580 }
581
582 zfcp_port_put(port);
583}
584
585
482struct fc_function_template zfcp_transport_functions = { 586struct fc_function_template zfcp_transport_functions = {
483 .show_starget_port_id = 1, 587 .show_starget_port_id = 1,
484 .show_starget_port_name = 1, 588 .show_starget_port_name = 1,
@@ -497,6 +601,8 @@ struct fc_function_template zfcp_transport_functions = {
497 .reset_fc_host_stats = zfcp_reset_fc_host_stats, 601 .reset_fc_host_stats = zfcp_reset_fc_host_stats,
498 .set_rport_dev_loss_tmo = zfcp_set_rport_dev_loss_tmo, 602 .set_rport_dev_loss_tmo = zfcp_set_rport_dev_loss_tmo,
499 .get_host_port_state = zfcp_get_host_port_state, 603 .get_host_port_state = zfcp_get_host_port_state,
604 .dev_loss_tmo_callbk = zfcp_scsi_dev_loss_tmo_callbk,
605 .terminate_rport_io = zfcp_scsi_terminate_rport_io,
500 .show_host_port_state = 1, 606 .show_host_port_state = 1,
501 /* no functions registered for following dynamic attributes but 607 /* no functions registered for following dynamic attributes but
502 directly set by LLDD */ 608 directly set by LLDD */
diff --git a/drivers/s390/scsi/zfcp_sysfs.c b/drivers/s390/scsi/zfcp_sysfs.c
index 899af2b45b1e..9a3b8e261c0a 100644
--- a/drivers/s390/scsi/zfcp_sysfs.c
+++ b/drivers/s390/scsi/zfcp_sysfs.c
@@ -112,9 +112,9 @@ static ZFCP_DEV_ATTR(_feat, failed, S_IWUSR | S_IRUGO, \
112 zfcp_sysfs_##_feat##_failed_show, \ 112 zfcp_sysfs_##_feat##_failed_show, \
113 zfcp_sysfs_##_feat##_failed_store); 113 zfcp_sysfs_##_feat##_failed_store);
114 114
115ZFCP_SYSFS_FAILED(zfcp_adapter, adapter, adapter, 44, 93); 115ZFCP_SYSFS_FAILED(zfcp_adapter, adapter, adapter, "syafai1", "syafai2");
116ZFCP_SYSFS_FAILED(zfcp_port, port, port->adapter, 45, 96); 116ZFCP_SYSFS_FAILED(zfcp_port, port, port->adapter, "sypfai1", "sypfai2");
117ZFCP_SYSFS_FAILED(zfcp_unit, unit, unit->port->adapter, 46, 97); 117ZFCP_SYSFS_FAILED(zfcp_unit, unit, unit->port->adapter, "syufai1", "syufai2");
118 118
119static ssize_t zfcp_sysfs_port_rescan_store(struct device *dev, 119static ssize_t zfcp_sysfs_port_rescan_store(struct device *dev,
120 struct device_attribute *attr, 120 struct device_attribute *attr,
@@ -168,7 +168,7 @@ static ssize_t zfcp_sysfs_port_remove_store(struct device *dev,
168 goto out; 168 goto out;
169 } 169 }
170 170
171 zfcp_erp_port_shutdown(port, 0, 92, NULL); 171 zfcp_erp_port_shutdown(port, 0, "syprs_1", NULL);
172 zfcp_erp_wait(adapter); 172 zfcp_erp_wait(adapter);
173 zfcp_port_put(port); 173 zfcp_port_put(port);
174 zfcp_port_dequeue(port); 174 zfcp_port_dequeue(port);
@@ -222,7 +222,7 @@ static ssize_t zfcp_sysfs_unit_add_store(struct device *dev,
222 222
223 retval = 0; 223 retval = 0;
224 224
225 zfcp_erp_unit_reopen(unit, 0, 94, NULL); 225 zfcp_erp_unit_reopen(unit, 0, "syuas_1", NULL);
226 zfcp_erp_wait(unit->port->adapter); 226 zfcp_erp_wait(unit->port->adapter);
227 zfcp_unit_put(unit); 227 zfcp_unit_put(unit);
228out: 228out:
@@ -268,7 +268,7 @@ static ssize_t zfcp_sysfs_unit_remove_store(struct device *dev,
268 goto out; 268 goto out;
269 } 269 }
270 270
271 zfcp_erp_unit_shutdown(unit, 0, 95, NULL); 271 zfcp_erp_unit_shutdown(unit, 0, "syurs_1", NULL);
272 zfcp_erp_wait(unit->port->adapter); 272 zfcp_erp_wait(unit->port->adapter);
273 zfcp_unit_put(unit); 273 zfcp_unit_put(unit);
274 zfcp_unit_dequeue(unit); 274 zfcp_unit_dequeue(unit);
@@ -318,10 +318,9 @@ zfcp_sysfs_unit_##_name##_latency_show(struct device *dev, \
318 struct zfcp_unit *unit = sdev->hostdata; \ 318 struct zfcp_unit *unit = sdev->hostdata; \
319 struct zfcp_latencies *lat = &unit->latencies; \ 319 struct zfcp_latencies *lat = &unit->latencies; \
320 struct zfcp_adapter *adapter = unit->port->adapter; \ 320 struct zfcp_adapter *adapter = unit->port->adapter; \
321 unsigned long flags; \
322 unsigned long long fsum, fmin, fmax, csum, cmin, cmax, cc; \ 321 unsigned long long fsum, fmin, fmax, csum, cmin, cmax, cc; \
323 \ 322 \
324 spin_lock_irqsave(&lat->lock, flags); \ 323 spin_lock_bh(&lat->lock); \
325 fsum = lat->_name.fabric.sum * adapter->timer_ticks; \ 324 fsum = lat->_name.fabric.sum * adapter->timer_ticks; \
326 fmin = lat->_name.fabric.min * adapter->timer_ticks; \ 325 fmin = lat->_name.fabric.min * adapter->timer_ticks; \
327 fmax = lat->_name.fabric.max * adapter->timer_ticks; \ 326 fmax = lat->_name.fabric.max * adapter->timer_ticks; \
@@ -329,7 +328,7 @@ zfcp_sysfs_unit_##_name##_latency_show(struct device *dev, \
329 cmin = lat->_name.channel.min * adapter->timer_ticks; \ 328 cmin = lat->_name.channel.min * adapter->timer_ticks; \
330 cmax = lat->_name.channel.max * adapter->timer_ticks; \ 329 cmax = lat->_name.channel.max * adapter->timer_ticks; \
331 cc = lat->_name.counter; \ 330 cc = lat->_name.counter; \
332 spin_unlock_irqrestore(&lat->lock, flags); \ 331 spin_unlock_bh(&lat->lock); \
333 \ 332 \
334 do_div(fsum, 1000); \ 333 do_div(fsum, 1000); \
335 do_div(fmin, 1000); \ 334 do_div(fmin, 1000); \
@@ -487,7 +486,8 @@ static ssize_t zfcp_sysfs_adapter_q_full_show(struct device *dev,
487 struct zfcp_adapter *adapter = 486 struct zfcp_adapter *adapter =
488 (struct zfcp_adapter *) scsi_host->hostdata[0]; 487 (struct zfcp_adapter *) scsi_host->hostdata[0];
489 488
490 return sprintf(buf, "%d\n", atomic_read(&adapter->qdio_outb_full)); 489 return sprintf(buf, "%d %llu\n", atomic_read(&adapter->qdio_outb_full),
490 (unsigned long long)adapter->req_q_util);
491} 491}
492static DEVICE_ATTR(queue_full, S_IRUGO, zfcp_sysfs_adapter_q_full_show, NULL); 492static DEVICE_ATTR(queue_full, S_IRUGO, zfcp_sysfs_adapter_q_full_show, NULL);
493 493
diff --git a/drivers/scsi/3w-9xxx.c b/drivers/scsi/3w-9xxx.c
index 5311317c2e4c..a12783ebb42d 100644
--- a/drivers/scsi/3w-9xxx.c
+++ b/drivers/scsi/3w-9xxx.c
@@ -4,7 +4,7 @@
4 Written By: Adam Radford <linuxraid@amcc.com> 4 Written By: Adam Radford <linuxraid@amcc.com>
5 Modifications By: Tom Couch <linuxraid@amcc.com> 5 Modifications By: Tom Couch <linuxraid@amcc.com>
6 6
7 Copyright (C) 2004-2008 Applied Micro Circuits Corporation. 7 Copyright (C) 2004-2009 Applied Micro Circuits Corporation.
8 8
9 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by 10 it under the terms of the GNU General Public License as published by
@@ -75,6 +75,7 @@
75 Add MSI support and "use_msi" module parameter. 75 Add MSI support and "use_msi" module parameter.
76 Fix bug in twa_get_param() on 4GB+. 76 Fix bug in twa_get_param() on 4GB+.
77 Use pci_resource_len() for ioremap(). 77 Use pci_resource_len() for ioremap().
78 2.26.02.012 - Add power management support.
78*/ 79*/
79 80
80#include <linux/module.h> 81#include <linux/module.h>
@@ -99,7 +100,7 @@
99#include "3w-9xxx.h" 100#include "3w-9xxx.h"
100 101
101/* Globals */ 102/* Globals */
102#define TW_DRIVER_VERSION "2.26.02.011" 103#define TW_DRIVER_VERSION "2.26.02.012"
103static TW_Device_Extension *twa_device_extension_list[TW_MAX_SLOT]; 104static TW_Device_Extension *twa_device_extension_list[TW_MAX_SLOT];
104static unsigned int twa_device_extension_count; 105static unsigned int twa_device_extension_count;
105static int twa_major = -1; 106static int twa_major = -1;
@@ -2182,6 +2183,98 @@ static void twa_remove(struct pci_dev *pdev)
2182 twa_device_extension_count--; 2183 twa_device_extension_count--;
2183} /* End twa_remove() */ 2184} /* End twa_remove() */
2184 2185
2186#ifdef CONFIG_PM
2187/* This function is called on PCI suspend */
2188static int twa_suspend(struct pci_dev *pdev, pm_message_t state)
2189{
2190 struct Scsi_Host *host = pci_get_drvdata(pdev);
2191 TW_Device_Extension *tw_dev = (TW_Device_Extension *)host->hostdata;
2192
2193 printk(KERN_WARNING "3w-9xxx: Suspending host %d.\n", tw_dev->host->host_no);
2194
2195 TW_DISABLE_INTERRUPTS(tw_dev);
2196 free_irq(tw_dev->tw_pci_dev->irq, tw_dev);
2197
2198 if (test_bit(TW_USING_MSI, &tw_dev->flags))
2199 pci_disable_msi(pdev);
2200
2201 /* Tell the card we are shutting down */
2202 if (twa_initconnection(tw_dev, 1, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL)) {
2203 TW_PRINTK(tw_dev->host, TW_DRIVER, 0x38, "Connection shutdown failed during suspend");
2204 } else {
2205 printk(KERN_WARNING "3w-9xxx: Suspend complete.\n");
2206 }
2207 TW_CLEAR_ALL_INTERRUPTS(tw_dev);
2208
2209 pci_save_state(pdev);
2210 pci_disable_device(pdev);
2211 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2212
2213 return 0;
2214} /* End twa_suspend() */
2215
2216/* This function is called on PCI resume */
2217static int twa_resume(struct pci_dev *pdev)
2218{
2219 int retval = 0;
2220 struct Scsi_Host *host = pci_get_drvdata(pdev);
2221 TW_Device_Extension *tw_dev = (TW_Device_Extension *)host->hostdata;
2222
2223 printk(KERN_WARNING "3w-9xxx: Resuming host %d.\n", tw_dev->host->host_no);
2224 pci_set_power_state(pdev, PCI_D0);
2225 pci_enable_wake(pdev, PCI_D0, 0);
2226 pci_restore_state(pdev);
2227
2228 retval = pci_enable_device(pdev);
2229 if (retval) {
2230 TW_PRINTK(tw_dev->host, TW_DRIVER, 0x39, "Enable device failed during resume");
2231 return retval;
2232 }
2233
2234 pci_set_master(pdev);
2235 pci_try_set_mwi(pdev);
2236
2237 if (pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2238 || pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2239 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)
2240 || pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
2241 TW_PRINTK(host, TW_DRIVER, 0x40, "Failed to set dma mask during resume");
2242 retval = -ENODEV;
2243 goto out_disable_device;
2244 }
2245
2246 /* Initialize the card */
2247 if (twa_reset_sequence(tw_dev, 0)) {
2248 retval = -ENODEV;
2249 goto out_disable_device;
2250 }
2251
2252 /* Now setup the interrupt handler */
2253 retval = request_irq(pdev->irq, twa_interrupt, IRQF_SHARED, "3w-9xxx", tw_dev);
2254 if (retval) {
2255 TW_PRINTK(tw_dev->host, TW_DRIVER, 0x42, "Error requesting IRQ during resume");
2256 retval = -ENODEV;
2257 goto out_disable_device;
2258 }
2259
2260 /* Now enable MSI if enabled */
2261 if (test_bit(TW_USING_MSI, &tw_dev->flags))
2262 pci_enable_msi(pdev);
2263
2264 /* Re-enable interrupts on the card */
2265 TW_ENABLE_AND_CLEAR_INTERRUPTS(tw_dev);
2266
2267 printk(KERN_WARNING "3w-9xxx: Resume complete.\n");
2268 return 0;
2269
2270out_disable_device:
2271 scsi_remove_host(host);
2272 pci_disable_device(pdev);
2273
2274 return retval;
2275} /* End twa_resume() */
2276#endif
2277
2185/* PCI Devices supported by this driver */ 2278/* PCI Devices supported by this driver */
2186static struct pci_device_id twa_pci_tbl[] __devinitdata = { 2279static struct pci_device_id twa_pci_tbl[] __devinitdata = {
2187 { PCI_VENDOR_ID_3WARE, PCI_DEVICE_ID_3WARE_9000, 2280 { PCI_VENDOR_ID_3WARE, PCI_DEVICE_ID_3WARE_9000,
@@ -2202,6 +2295,10 @@ static struct pci_driver twa_driver = {
2202 .id_table = twa_pci_tbl, 2295 .id_table = twa_pci_tbl,
2203 .probe = twa_probe, 2296 .probe = twa_probe,
2204 .remove = twa_remove, 2297 .remove = twa_remove,
2298#ifdef CONFIG_PM
2299 .suspend = twa_suspend,
2300 .resume = twa_resume,
2301#endif
2205 .shutdown = twa_shutdown 2302 .shutdown = twa_shutdown
2206}; 2303};
2207 2304
diff --git a/drivers/scsi/3w-9xxx.h b/drivers/scsi/3w-9xxx.h
index 1729a8785fea..2893eec78ed2 100644
--- a/drivers/scsi/3w-9xxx.h
+++ b/drivers/scsi/3w-9xxx.h
@@ -4,7 +4,7 @@
4 Written By: Adam Radford <linuxraid@amcc.com> 4 Written By: Adam Radford <linuxraid@amcc.com>
5 Modifications By: Tom Couch <linuxraid@amcc.com> 5 Modifications By: Tom Couch <linuxraid@amcc.com>
6 6
7 Copyright (C) 2004-2008 Applied Micro Circuits Corporation. 7 Copyright (C) 2004-2009 Applied Micro Circuits Corporation.
8 8
9 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by 10 it under the terms of the GNU General Public License as published by
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 256c7bec7bd7..e2f44e6c0bcb 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -224,14 +224,15 @@ config SCSI_LOGGING
224 can enable logging by saying Y to "/proc file system support" and 224 can enable logging by saying Y to "/proc file system support" and
225 "Sysctl support" below and executing the command 225 "Sysctl support" below and executing the command
226 226
227 echo "scsi log token [level]" > /proc/scsi/scsi 227 echo <bitmask> > /proc/sys/dev/scsi/logging_level
228 228
229 at boot time after the /proc file system has been mounted. 229 where <bitmask> is a four byte value representing the logging type
230 and logging level for each type of logging selected.
230 231
231 There are a number of things that can be used for 'token' (you can 232 There are a number of logging types and you can find them in the
232 find them in the source: <file:drivers/scsi/scsi.c>), and this 233 source at <file:drivers/scsi/scsi_logging.h>. The logging levels
233 allows you to select the types of information you want, and the 234 are also described in that file and they determine the verbosity of
234 level allows you to select the level of verbosity. 235 the logging for each logging type.
235 236
236 If you say N here, it may be harder to track down some types of SCSI 237 If you say N here, it may be harder to track down some types of SCSI
237 problems. If you say Y here your kernel will be somewhat larger, but 238 problems. If you say Y here your kernel will be somewhat larger, but
@@ -570,6 +571,7 @@ config SCSI_ARCMSR_AER
570 To enable this function, choose Y here. 571 To enable this function, choose Y here.
571 572
572source "drivers/scsi/megaraid/Kconfig.megaraid" 573source "drivers/scsi/megaraid/Kconfig.megaraid"
574source "drivers/scsi/mpt2sas/Kconfig"
573 575
574config SCSI_HPTIOP 576config SCSI_HPTIOP
575 tristate "HighPoint RocketRAID 3xxx/4xxx Controller support" 577 tristate "HighPoint RocketRAID 3xxx/4xxx Controller support"
@@ -608,6 +610,7 @@ config SCSI_FLASHPOINT
608config LIBFC 610config LIBFC
609 tristate "LibFC module" 611 tristate "LibFC module"
610 select SCSI_FC_ATTRS 612 select SCSI_FC_ATTRS
613 select CRC32
611 ---help--- 614 ---help---
612 Fibre Channel library module 615 Fibre Channel library module
613 616
@@ -1535,6 +1538,7 @@ config SCSI_NSP32
1535config SCSI_DEBUG 1538config SCSI_DEBUG
1536 tristate "SCSI debugging host simulator" 1539 tristate "SCSI debugging host simulator"
1537 depends on SCSI 1540 depends on SCSI
1541 select CRC_T10DIF
1538 help 1542 help
1539 This is a host adapter simulator that can simulate multiple hosts 1543 This is a host adapter simulator that can simulate multiple hosts
1540 each with multiple dummy SCSI devices (disks). It defaults to one 1544 each with multiple dummy SCSI devices (disks). It defaults to one
@@ -1803,4 +1807,6 @@ source "drivers/scsi/pcmcia/Kconfig"
1803 1807
1804source "drivers/scsi/device_handler/Kconfig" 1808source "drivers/scsi/device_handler/Kconfig"
1805 1809
1810source "drivers/scsi/osd/Kconfig"
1811
1806endmenu 1812endmenu
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index 7461eb09a031..cf7929634668 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -99,6 +99,7 @@ obj-$(CONFIG_SCSI_DC390T) += tmscsim.o
99obj-$(CONFIG_MEGARAID_LEGACY) += megaraid.o 99obj-$(CONFIG_MEGARAID_LEGACY) += megaraid.o
100obj-$(CONFIG_MEGARAID_NEWGEN) += megaraid/ 100obj-$(CONFIG_MEGARAID_NEWGEN) += megaraid/
101obj-$(CONFIG_MEGARAID_SAS) += megaraid/ 101obj-$(CONFIG_MEGARAID_SAS) += megaraid/
102obj-$(CONFIG_SCSI_MPT2SAS) += mpt2sas/
102obj-$(CONFIG_SCSI_ACARD) += atp870u.o 103obj-$(CONFIG_SCSI_ACARD) += atp870u.o
103obj-$(CONFIG_SCSI_SUNESP) += esp_scsi.o sun_esp.o 104obj-$(CONFIG_SCSI_SUNESP) += esp_scsi.o sun_esp.o
104obj-$(CONFIG_SCSI_GDTH) += gdth.o 105obj-$(CONFIG_SCSI_GDTH) += gdth.o
@@ -137,6 +138,8 @@ obj-$(CONFIG_CHR_DEV_SG) += sg.o
137obj-$(CONFIG_CHR_DEV_SCH) += ch.o 138obj-$(CONFIG_CHR_DEV_SCH) += ch.o
138obj-$(CONFIG_SCSI_ENCLOSURE) += ses.o 139obj-$(CONFIG_SCSI_ENCLOSURE) += ses.o
139 140
141obj-$(CONFIG_SCSI_OSD_INITIATOR) += osd/
142
140# This goes last, so that "real" scsi devices probe earlier 143# This goes last, so that "real" scsi devices probe earlier
141obj-$(CONFIG_SCSI_DEBUG) += scsi_debug.o 144obj-$(CONFIG_SCSI_DEBUG) += scsi_debug.o
142 145
diff --git a/drivers/scsi/ch.c b/drivers/scsi/ch.c
index af9725409f43..7b1633a8c15a 100644
--- a/drivers/scsi/ch.c
+++ b/drivers/scsi/ch.c
@@ -41,6 +41,7 @@ MODULE_DESCRIPTION("device driver for scsi media changer devices");
41MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org>"); 41MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org>");
42MODULE_LICENSE("GPL"); 42MODULE_LICENSE("GPL");
43MODULE_ALIAS_CHARDEV_MAJOR(SCSI_CHANGER_MAJOR); 43MODULE_ALIAS_CHARDEV_MAJOR(SCSI_CHANGER_MAJOR);
44MODULE_ALIAS_SCSI_DEVICE(TYPE_MEDIUM_CHANGER);
44 45
45static int init = 1; 46static int init = 1;
46module_param(init, int, 0444); 47module_param(init, int, 0444);
diff --git a/drivers/scsi/constants.c b/drivers/scsi/constants.c
index 4003deefb7d8..e79e18101f87 100644
--- a/drivers/scsi/constants.c
+++ b/drivers/scsi/constants.c
@@ -1373,21 +1373,14 @@ static const char * const driverbyte_table[]={
1373"DRIVER_INVALID", "DRIVER_TIMEOUT", "DRIVER_HARD", "DRIVER_SENSE"}; 1373"DRIVER_INVALID", "DRIVER_TIMEOUT", "DRIVER_HARD", "DRIVER_SENSE"};
1374#define NUM_DRIVERBYTE_STRS ARRAY_SIZE(driverbyte_table) 1374#define NUM_DRIVERBYTE_STRS ARRAY_SIZE(driverbyte_table)
1375 1375
1376static const char * const driversuggest_table[]={"SUGGEST_OK",
1377"SUGGEST_RETRY", "SUGGEST_ABORT", "SUGGEST_REMAP", "SUGGEST_DIE",
1378"SUGGEST_5", "SUGGEST_6", "SUGGEST_7", "SUGGEST_SENSE"};
1379#define NUM_SUGGEST_STRS ARRAY_SIZE(driversuggest_table)
1380
1381void scsi_show_result(int result) 1376void scsi_show_result(int result)
1382{ 1377{
1383 int hb = host_byte(result); 1378 int hb = host_byte(result);
1384 int db = (driver_byte(result) & DRIVER_MASK); 1379 int db = driver_byte(result);
1385 int su = ((driver_byte(result) & SUGGEST_MASK) >> 4);
1386 1380
1387 printk("Result: hostbyte=%s driverbyte=%s,%s\n", 1381 printk("Result: hostbyte=%s driverbyte=%s\n",
1388 (hb < NUM_HOSTBYTE_STRS ? hostbyte_table[hb] : "invalid"), 1382 (hb < NUM_HOSTBYTE_STRS ? hostbyte_table[hb] : "invalid"),
1389 (db < NUM_DRIVERBYTE_STRS ? driverbyte_table[db] : "invalid"), 1383 (db < NUM_DRIVERBYTE_STRS ? driverbyte_table[db] : "invalid"));
1390 (su < NUM_SUGGEST_STRS ? driversuggest_table[su] : "invalid"));
1391} 1384}
1392 1385
1393#else 1386#else
diff --git a/drivers/scsi/cxgb3i/cxgb3i_ddp.c b/drivers/scsi/cxgb3i/cxgb3i_ddp.c
index a83d36e4926f..4eb6f5593b3e 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_ddp.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_ddp.c
@@ -196,7 +196,7 @@ static inline int ddp_alloc_gl_skb(struct cxgb3i_ddp_info *ddp, int idx,
196} 196}
197 197
198/** 198/**
199 * cxgb3i_ddp_find_page_index - return ddp page index for a given page size. 199 * cxgb3i_ddp_find_page_index - return ddp page index for a given page size
200 * @pgsz: page size 200 * @pgsz: page size
201 * return the ddp page index, if no match is found return DDP_PGIDX_MAX. 201 * return the ddp page index, if no match is found return DDP_PGIDX_MAX.
202 */ 202 */
@@ -355,8 +355,7 @@ EXPORT_SYMBOL_GPL(cxgb3i_ddp_release_gl);
355 * @tdev: t3cdev adapter 355 * @tdev: t3cdev adapter
356 * @tid: connection id 356 * @tid: connection id
357 * @tformat: tag format 357 * @tformat: tag format
358 * @tagp: the s/w tag, if ddp setup is successful, it will be updated with 358 * @tagp: contains s/w tag initially, will be updated with ddp/hw tag
359 * ddp/hw tag
360 * @gl: the page momory list 359 * @gl: the page momory list
361 * @gfp: allocation mode 360 * @gfp: allocation mode
362 * 361 *
diff --git a/drivers/scsi/cxgb3i/cxgb3i_ddp.h b/drivers/scsi/cxgb3i/cxgb3i_ddp.h
index 3faae7831c83..75a63a81e873 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_ddp.h
+++ b/drivers/scsi/cxgb3i/cxgb3i_ddp.h
@@ -185,12 +185,11 @@ static inline int cxgb3i_is_ddp_tag(struct cxgb3i_tag_format *tformat, u32 tag)
185} 185}
186 186
187/** 187/**
188 * cxgb3i_sw_tag_usable - check if a given s/w tag has enough bits left for 188 * cxgb3i_sw_tag_usable - check if s/w tag has enough bits left for hw bits
189 * the reserved/hw bits
190 * @tformat: tag format information 189 * @tformat: tag format information
191 * @sw_tag: s/w tag to be checked 190 * @sw_tag: s/w tag to be checked
192 * 191 *
193 * return true if the tag is a ddp tag, false otherwise. 192 * return true if the tag can be used for hw ddp tag, false otherwise.
194 */ 193 */
195static inline int cxgb3i_sw_tag_usable(struct cxgb3i_tag_format *tformat, 194static inline int cxgb3i_sw_tag_usable(struct cxgb3i_tag_format *tformat,
196 u32 sw_tag) 195 u32 sw_tag)
@@ -222,8 +221,7 @@ static inline u32 cxgb3i_set_non_ddp_tag(struct cxgb3i_tag_format *tformat,
222} 221}
223 222
224/** 223/**
225 * cxgb3i_ddp_tag_base - shift the s/w tag bits so that reserved bits are not 224 * cxgb3i_ddp_tag_base - shift s/w tag bits so that reserved bits are not used
226 * used.
227 * @tformat: tag format information 225 * @tformat: tag format information
228 * @sw_tag: s/w tag to be checked 226 * @sw_tag: s/w tag to be checked
229 */ 227 */
diff --git a/drivers/scsi/cxgb3i/cxgb3i_iscsi.c b/drivers/scsi/cxgb3i/cxgb3i_iscsi.c
index fa2a44f37b36..e185dedc4c1f 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_iscsi.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_iscsi.c
@@ -101,8 +101,7 @@ free_snic:
101} 101}
102 102
103/** 103/**
104 * cxgb3i_adapter_remove - release all the resources held and cleanup any 104 * cxgb3i_adapter_remove - release the resources held and cleanup h/w settings
105 * h/w settings
106 * @t3dev: t3cdev adapter 105 * @t3dev: t3cdev adapter
107 */ 106 */
108void cxgb3i_adapter_remove(struct t3cdev *t3dev) 107void cxgb3i_adapter_remove(struct t3cdev *t3dev)
@@ -135,8 +134,7 @@ void cxgb3i_adapter_remove(struct t3cdev *t3dev)
135} 134}
136 135
137/** 136/**
138 * cxgb3i_hba_find_by_netdev - find the cxgb3i_hba structure with a given 137 * cxgb3i_hba_find_by_netdev - find the cxgb3i_hba structure via net_device
139 * net_device
140 * @t3dev: t3cdev adapter 138 * @t3dev: t3cdev adapter
141 */ 139 */
142struct cxgb3i_hba *cxgb3i_hba_find_by_netdev(struct net_device *ndev) 140struct cxgb3i_hba *cxgb3i_hba_find_by_netdev(struct net_device *ndev)
@@ -170,8 +168,7 @@ struct cxgb3i_hba *cxgb3i_hba_host_add(struct cxgb3i_adapter *snic,
170 int err; 168 int err;
171 169
172 shost = iscsi_host_alloc(&cxgb3i_host_template, 170 shost = iscsi_host_alloc(&cxgb3i_host_template,
173 sizeof(struct cxgb3i_hba), 171 sizeof(struct cxgb3i_hba), 1);
174 CXGB3I_SCSI_QDEPTH_DFLT);
175 if (!shost) { 172 if (!shost) {
176 cxgb3i_log_info("iscsi_host_alloc failed.\n"); 173 cxgb3i_log_info("iscsi_host_alloc failed.\n");
177 return NULL; 174 return NULL;
@@ -335,13 +332,12 @@ static void cxgb3i_ep_disconnect(struct iscsi_endpoint *ep)
335 * @cmds_max: max # of commands 332 * @cmds_max: max # of commands
336 * @qdepth: scsi queue depth 333 * @qdepth: scsi queue depth
337 * @initial_cmdsn: initial iscsi CMDSN for this session 334 * @initial_cmdsn: initial iscsi CMDSN for this session
338 * @host_no: pointer to return host no
339 * 335 *
340 * Creates a new iSCSI session 336 * Creates a new iSCSI session
341 */ 337 */
342static struct iscsi_cls_session * 338static struct iscsi_cls_session *
343cxgb3i_session_create(struct iscsi_endpoint *ep, u16 cmds_max, u16 qdepth, 339cxgb3i_session_create(struct iscsi_endpoint *ep, u16 cmds_max, u16 qdepth,
344 u32 initial_cmdsn, u32 *host_no) 340 u32 initial_cmdsn)
345{ 341{
346 struct cxgb3i_endpoint *cep; 342 struct cxgb3i_endpoint *cep;
347 struct cxgb3i_hba *hba; 343 struct cxgb3i_hba *hba;
@@ -360,8 +356,6 @@ cxgb3i_session_create(struct iscsi_endpoint *ep, u16 cmds_max, u16 qdepth,
360 cxgb3i_api_debug("ep 0x%p, cep 0x%p, hba 0x%p.\n", ep, cep, hba); 356 cxgb3i_api_debug("ep 0x%p, cep 0x%p, hba 0x%p.\n", ep, cep, hba);
361 BUG_ON(hba != iscsi_host_priv(shost)); 357 BUG_ON(hba != iscsi_host_priv(shost));
362 358
363 *host_no = shost->host_no;
364
365 cls_session = iscsi_session_setup(&cxgb3i_iscsi_transport, shost, 359 cls_session = iscsi_session_setup(&cxgb3i_iscsi_transport, shost,
366 cmds_max, 360 cmds_max,
367 sizeof(struct iscsi_tcp_task) + 361 sizeof(struct iscsi_tcp_task) +
@@ -394,9 +388,9 @@ static void cxgb3i_session_destroy(struct iscsi_cls_session *cls_session)
394} 388}
395 389
396/** 390/**
397 * cxgb3i_conn_max_xmit_dlength -- check the max. xmit pdu segment size, 391 * cxgb3i_conn_max_xmit_dlength -- calc the max. xmit pdu segment size
398 * reduce it to be within the hardware limit if needed
399 * @conn: iscsi connection 392 * @conn: iscsi connection
393 * check the max. xmit pdu payload, reduce it if needed
400 */ 394 */
401static inline int cxgb3i_conn_max_xmit_dlength(struct iscsi_conn *conn) 395static inline int cxgb3i_conn_max_xmit_dlength(struct iscsi_conn *conn)
402 396
@@ -417,8 +411,7 @@ static inline int cxgb3i_conn_max_xmit_dlength(struct iscsi_conn *conn)
417} 411}
418 412
419/** 413/**
420 * cxgb3i_conn_max_recv_dlength -- check the max. recv pdu segment size against 414 * cxgb3i_conn_max_recv_dlength -- check the max. recv pdu segment size
421 * the hardware limit
422 * @conn: iscsi connection 415 * @conn: iscsi connection
423 * return 0 if the value is valid, < 0 otherwise. 416 * return 0 if the value is valid, < 0 otherwise.
424 */ 417 */
@@ -759,9 +752,9 @@ static void cxgb3i_parse_itt(struct iscsi_conn *conn, itt_t itt,
759 752
760/** 753/**
761 * cxgb3i_reserve_itt - generate tag for a give task 754 * cxgb3i_reserve_itt - generate tag for a give task
762 * Try to set up ddp for a scsi read task.
763 * @task: iscsi task 755 * @task: iscsi task
764 * @hdr_itt: tag, filled in by this function 756 * @hdr_itt: tag, filled in by this function
757 * Set up ddp for scsi read tasks if possible.
765 */ 758 */
766int cxgb3i_reserve_itt(struct iscsi_task *task, itt_t *hdr_itt) 759int cxgb3i_reserve_itt(struct iscsi_task *task, itt_t *hdr_itt)
767{ 760{
@@ -809,9 +802,9 @@ int cxgb3i_reserve_itt(struct iscsi_task *task, itt_t *hdr_itt)
809 802
810/** 803/**
811 * cxgb3i_release_itt - release the tag for a given task 804 * cxgb3i_release_itt - release the tag for a given task
812 * if the tag is a ddp tag, release the ddp setup
813 * @task: iscsi task 805 * @task: iscsi task
814 * @hdr_itt: tag 806 * @hdr_itt: tag
807 * If the tag is a ddp tag, release the ddp setup
815 */ 808 */
816void cxgb3i_release_itt(struct iscsi_task *task, itt_t hdr_itt) 809void cxgb3i_release_itt(struct iscsi_task *task, itt_t hdr_itt)
817{ 810{
@@ -843,7 +836,7 @@ static struct scsi_host_template cxgb3i_host_template = {
843 .can_queue = CXGB3I_SCSI_QDEPTH_DFLT - 1, 836 .can_queue = CXGB3I_SCSI_QDEPTH_DFLT - 1,
844 .sg_tablesize = SG_ALL, 837 .sg_tablesize = SG_ALL,
845 .max_sectors = 0xFFFF, 838 .max_sectors = 0xFFFF,
846 .cmd_per_lun = ISCSI_DEF_CMD_PER_LUN, 839 .cmd_per_lun = CXGB3I_SCSI_QDEPTH_DFLT,
847 .eh_abort_handler = iscsi_eh_abort, 840 .eh_abort_handler = iscsi_eh_abort,
848 .eh_device_reset_handler = iscsi_eh_device_reset, 841 .eh_device_reset_handler = iscsi_eh_device_reset,
849 .eh_target_reset_handler = iscsi_eh_target_reset, 842 .eh_target_reset_handler = iscsi_eh_target_reset,
diff --git a/drivers/scsi/cxgb3i/cxgb3i_offload.c b/drivers/scsi/cxgb3i/cxgb3i_offload.c
index de3b3b614cca..c2e434e54e28 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_offload.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_offload.c
@@ -1417,8 +1417,7 @@ static void c3cn_active_close(struct s3_conn *c3cn)
1417} 1417}
1418 1418
1419/** 1419/**
1420 * cxgb3i_c3cn_release - close and release an iscsi tcp connection and any 1420 * cxgb3i_c3cn_release - close and release an iscsi tcp connection
1421 * resource held
1422 * @c3cn: the iscsi tcp connection 1421 * @c3cn: the iscsi tcp connection
1423 */ 1422 */
1424void cxgb3i_c3cn_release(struct s3_conn *c3cn) 1423void cxgb3i_c3cn_release(struct s3_conn *c3cn)
diff --git a/drivers/scsi/cxgb3i/cxgb3i_offload.h b/drivers/scsi/cxgb3i/cxgb3i_offload.h
index 6344b9eb2589..275f23f16eb7 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_offload.h
+++ b/drivers/scsi/cxgb3i/cxgb3i_offload.h
@@ -139,6 +139,7 @@ enum c3cn_flags {
139 139
140/** 140/**
141 * cxgb3i_sdev_data - Per adapter data. 141 * cxgb3i_sdev_data - Per adapter data.
142 *
142 * Linked off of each Ethernet device port on the adapter. 143 * Linked off of each Ethernet device port on the adapter.
143 * Also available via the t3cdev structure since we have pointers to our port 144 * Also available via the t3cdev structure since we have pointers to our port
144 * net_device's there ... 145 * net_device's there ...
diff --git a/drivers/scsi/cxgb3i/cxgb3i_pdu.c b/drivers/scsi/cxgb3i/cxgb3i_pdu.c
index 17115c230d65..7eebc9a7cb35 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_pdu.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_pdu.c
@@ -479,7 +479,7 @@ void cxgb3i_conn_tx_open(struct s3_conn *c3cn)
479 cxgb3i_tx_debug("cn 0x%p.\n", c3cn); 479 cxgb3i_tx_debug("cn 0x%p.\n", c3cn);
480 if (conn) { 480 if (conn) {
481 cxgb3i_tx_debug("cn 0x%p, cid %d.\n", c3cn, conn->id); 481 cxgb3i_tx_debug("cn 0x%p, cid %d.\n", c3cn, conn->id);
482 scsi_queue_work(conn->session->host, &conn->xmitwork); 482 iscsi_conn_queue_work(conn);
483 } 483 }
484} 484}
485 485
diff --git a/drivers/scsi/device_handler/scsi_dh_alua.c b/drivers/scsi/device_handler/scsi_dh_alua.c
index e356b43753ff..dba154c8ff64 100644
--- a/drivers/scsi/device_handler/scsi_dh_alua.c
+++ b/drivers/scsi/device_handler/scsi_dh_alua.c
@@ -247,8 +247,8 @@ static unsigned submit_stpg(struct scsi_device *sdev, struct alua_dh_data *h)
247 /* Prepare the data buffer */ 247 /* Prepare the data buffer */
248 memset(h->buff, 0, stpg_len); 248 memset(h->buff, 0, stpg_len);
249 h->buff[4] = TPGS_STATE_OPTIMIZED & 0x0f; 249 h->buff[4] = TPGS_STATE_OPTIMIZED & 0x0f;
250 h->buff[6] = (h->group_id >> 8) & 0x0f; 250 h->buff[6] = (h->group_id >> 8) & 0xff;
251 h->buff[7] = h->group_id & 0x0f; 251 h->buff[7] = h->group_id & 0xff;
252 252
253 rq = get_alua_req(sdev, h->buff, stpg_len, WRITE); 253 rq = get_alua_req(sdev, h->buff, stpg_len, WRITE);
254 if (!rq) 254 if (!rq)
@@ -461,6 +461,15 @@ static int alua_check_sense(struct scsi_device *sdev,
461 */ 461 */
462 return ADD_TO_MLQUEUE; 462 return ADD_TO_MLQUEUE;
463 } 463 }
464 if (sense_hdr->asc == 0x3f && sense_hdr->ascq == 0x0e) {
465 /*
466 * REPORTED_LUNS_DATA_HAS_CHANGED is reported
467 * when switching controllers on targets like
468 * Intel Multi-Flex. We can just retry.
469 */
470 return ADD_TO_MLQUEUE;
471 }
472
464 break; 473 break;
465 } 474 }
466 475
@@ -691,6 +700,7 @@ static const struct scsi_dh_devlist alua_dev_list[] = {
691 {"IBM", "2107900" }, 700 {"IBM", "2107900" },
692 {"IBM", "2145" }, 701 {"IBM", "2145" },
693 {"Pillar", "Axiom" }, 702 {"Pillar", "Axiom" },
703 {"Intel", "Multi-Flex"},
694 {NULL, NULL} 704 {NULL, NULL}
695}; 705};
696 706
diff --git a/drivers/scsi/device_handler/scsi_dh_rdac.c b/drivers/scsi/device_handler/scsi_dh_rdac.c
index 53664765570a..43b8c51e98d0 100644
--- a/drivers/scsi/device_handler/scsi_dh_rdac.c
+++ b/drivers/scsi/device_handler/scsi_dh_rdac.c
@@ -449,28 +449,40 @@ static int mode_select_handle_sense(struct scsi_device *sdev,
449 unsigned char *sensebuf) 449 unsigned char *sensebuf)
450{ 450{
451 struct scsi_sense_hdr sense_hdr; 451 struct scsi_sense_hdr sense_hdr;
452 int sense, err = SCSI_DH_IO, ret; 452 int err = SCSI_DH_IO, ret;
453 453
454 ret = scsi_normalize_sense(sensebuf, SCSI_SENSE_BUFFERSIZE, &sense_hdr); 454 ret = scsi_normalize_sense(sensebuf, SCSI_SENSE_BUFFERSIZE, &sense_hdr);
455 if (!ret) 455 if (!ret)
456 goto done; 456 goto done;
457 457
458 err = SCSI_DH_OK; 458 err = SCSI_DH_OK;
459 sense = (sense_hdr.sense_key << 16) | (sense_hdr.asc << 8) | 459
460 sense_hdr.ascq; 460 switch (sense_hdr.sense_key) {
461 /* If it is retryable failure, submit the c9 inquiry again */ 461 case NO_SENSE:
462 if (sense == 0x59136 || sense == 0x68b02 || sense == 0xb8b02 || 462 case ABORTED_COMMAND:
463 sense == 0x62900) { 463 case UNIT_ATTENTION:
464 /* 0x59136 - Command lock contention
465 * 0x[6b]8b02 - Quiesense in progress or achieved
466 * 0x62900 - Power On, Reset, or Bus Device Reset
467 */
468 err = SCSI_DH_RETRY; 464 err = SCSI_DH_RETRY;
465 break;
466 case NOT_READY:
467 if (sense_hdr.asc == 0x04 && sense_hdr.ascq == 0x01)
468 /* LUN Not Ready and is in the Process of Becoming
469 * Ready
470 */
471 err = SCSI_DH_RETRY;
472 break;
473 case ILLEGAL_REQUEST:
474 if (sense_hdr.asc == 0x91 && sense_hdr.ascq == 0x36)
475 /*
476 * Command Lock contention
477 */
478 err = SCSI_DH_RETRY;
479 break;
480 default:
481 sdev_printk(KERN_INFO, sdev,
482 "MODE_SELECT failed with sense %02x/%02x/%02x.\n",
483 sense_hdr.sense_key, sense_hdr.asc, sense_hdr.ascq);
469 } 484 }
470 485
471 if (sense)
472 sdev_printk(KERN_INFO, sdev,
473 "MODE_SELECT failed with sense 0x%x.\n", sense);
474done: 486done:
475 return err; 487 return err;
476} 488}
@@ -562,6 +574,12 @@ static int rdac_check_sense(struct scsi_device *sdev,
562 * Just retry and wait. 574 * Just retry and wait.
563 */ 575 */
564 return ADD_TO_MLQUEUE; 576 return ADD_TO_MLQUEUE;
577 if (sense_hdr->asc == 0xA1 && sense_hdr->ascq == 0x02)
578 /* LUN Not Ready - Quiescense in progress
579 * or has been achieved
580 * Just retry.
581 */
582 return ADD_TO_MLQUEUE;
565 break; 583 break;
566 case ILLEGAL_REQUEST: 584 case ILLEGAL_REQUEST:
567 if (sense_hdr->asc == 0x94 && sense_hdr->ascq == 0x01) { 585 if (sense_hdr->asc == 0x94 && sense_hdr->ascq == 0x01) {
@@ -579,6 +597,11 @@ static int rdac_check_sense(struct scsi_device *sdev,
579 * Power On, Reset, or Bus Device Reset, just retry. 597 * Power On, Reset, or Bus Device Reset, just retry.
580 */ 598 */
581 return ADD_TO_MLQUEUE; 599 return ADD_TO_MLQUEUE;
600 if (sense_hdr->asc == 0x8b && sense_hdr->ascq == 0x02)
601 /*
602 * Quiescence in progress , just retry.
603 */
604 return ADD_TO_MLQUEUE;
582 break; 605 break;
583 } 606 }
584 /* success just means we do not care what scsi-ml does */ 607 /* success just means we do not care what scsi-ml does */
diff --git a/drivers/scsi/fcoe/fcoe_sw.c b/drivers/scsi/fcoe/fcoe_sw.c
index da210eba1941..2bbbe3c0cc7b 100644
--- a/drivers/scsi/fcoe/fcoe_sw.c
+++ b/drivers/scsi/fcoe/fcoe_sw.c
@@ -133,6 +133,13 @@ static int fcoe_sw_lport_config(struct fc_lport *lp)
133 /* lport fc_lport related configuration */ 133 /* lport fc_lport related configuration */
134 fc_lport_config(lp); 134 fc_lport_config(lp);
135 135
136 /* offload related configuration */
137 lp->crc_offload = 0;
138 lp->seq_offload = 0;
139 lp->lro_enabled = 0;
140 lp->lro_xid = 0;
141 lp->lso_max = 0;
142
136 return 0; 143 return 0;
137} 144}
138 145
@@ -186,7 +193,27 @@ static int fcoe_sw_netdev_config(struct fc_lport *lp, struct net_device *netdev)
186 if (fc->real_dev->features & NETIF_F_SG) 193 if (fc->real_dev->features & NETIF_F_SG)
187 lp->sg_supp = 1; 194 lp->sg_supp = 1;
188 195
189 196#ifdef NETIF_F_FCOE_CRC
197 if (netdev->features & NETIF_F_FCOE_CRC) {
198 lp->crc_offload = 1;
199 printk(KERN_DEBUG "fcoe:%s supports FCCRC offload\n",
200 netdev->name);
201 }
202#endif
203#ifdef NETIF_F_FSO
204 if (netdev->features & NETIF_F_FSO) {
205 lp->seq_offload = 1;
206 lp->lso_max = netdev->gso_max_size;
207 printk(KERN_DEBUG "fcoe:%s supports LSO for max len 0x%x\n",
208 netdev->name, lp->lso_max);
209 }
210#endif
211 if (netdev->fcoe_ddp_xid) {
212 lp->lro_enabled = 1;
213 lp->lro_xid = netdev->fcoe_ddp_xid;
214 printk(KERN_DEBUG "fcoe:%s supports LRO for max xid 0x%x\n",
215 netdev->name, lp->lro_xid);
216 }
190 skb_queue_head_init(&fc->fcoe_pending_queue); 217 skb_queue_head_init(&fc->fcoe_pending_queue);
191 fc->fcoe_pending_queue_active = 0; 218 fc->fcoe_pending_queue_active = 0;
192 219
@@ -346,8 +373,46 @@ static int fcoe_sw_destroy(struct net_device *netdev)
346 return 0; 373 return 0;
347} 374}
348 375
376/*
377 * fcoe_sw_ddp_setup - calls LLD's ddp_setup through net_device
378 * @lp: the corresponding fc_lport
379 * @xid: the exchange id for this ddp transfer
380 * @sgl: the scatterlist describing this transfer
381 * @sgc: number of sg items
382 *
383 * Returns : 0 no ddp
384 */
385static int fcoe_sw_ddp_setup(struct fc_lport *lp, u16 xid,
386 struct scatterlist *sgl, unsigned int sgc)
387{
388 struct net_device *n = fcoe_netdev(lp);
389
390 if (n->netdev_ops && n->netdev_ops->ndo_fcoe_ddp_setup)
391 return n->netdev_ops->ndo_fcoe_ddp_setup(n, xid, sgl, sgc);
392
393 return 0;
394}
395
396/*
397 * fcoe_sw_ddp_done - calls LLD's ddp_done through net_device
398 * @lp: the corresponding fc_lport
399 * @xid: the exchange id for this ddp transfer
400 *
401 * Returns : the length of data that have been completed by ddp
402 */
403static int fcoe_sw_ddp_done(struct fc_lport *lp, u16 xid)
404{
405 struct net_device *n = fcoe_netdev(lp);
406
407 if (n->netdev_ops && n->netdev_ops->ndo_fcoe_ddp_done)
408 return n->netdev_ops->ndo_fcoe_ddp_done(n, xid);
409 return 0;
410}
411
349static struct libfc_function_template fcoe_sw_libfc_fcn_templ = { 412static struct libfc_function_template fcoe_sw_libfc_fcn_templ = {
350 .frame_send = fcoe_xmit, 413 .frame_send = fcoe_xmit,
414 .ddp_setup = fcoe_sw_ddp_setup,
415 .ddp_done = fcoe_sw_ddp_done,
351}; 416};
352 417
353/** 418/**
diff --git a/drivers/scsi/fcoe/libfcoe.c b/drivers/scsi/fcoe/libfcoe.c
index 5548bf3bb58b..0d6f5beb7f9e 100644
--- a/drivers/scsi/fcoe/libfcoe.c
+++ b/drivers/scsi/fcoe/libfcoe.c
@@ -423,7 +423,7 @@ int fcoe_xmit(struct fc_lport *lp, struct fc_frame *fp)
423 423
424 /* crc offload */ 424 /* crc offload */
425 if (likely(lp->crc_offload)) { 425 if (likely(lp->crc_offload)) {
426 skb->ip_summed = CHECKSUM_COMPLETE; 426 skb->ip_summed = CHECKSUM_PARTIAL;
427 skb->csum_start = skb_headroom(skb); 427 skb->csum_start = skb_headroom(skb);
428 skb->csum_offset = skb->len; 428 skb->csum_offset = skb->len;
429 crc = 0; 429 crc = 0;
@@ -460,7 +460,7 @@ int fcoe_xmit(struct fc_lport *lp, struct fc_frame *fp)
460 skb_reset_mac_header(skb); 460 skb_reset_mac_header(skb);
461 skb_reset_network_header(skb); 461 skb_reset_network_header(skb);
462 skb->mac_len = elen; 462 skb->mac_len = elen;
463 skb->protocol = htons(ETH_P_802_3); 463 skb->protocol = htons(ETH_P_FCOE);
464 skb->dev = fc->real_dev; 464 skb->dev = fc->real_dev;
465 465
466 /* fill up mac and fcoe headers */ 466 /* fill up mac and fcoe headers */
@@ -483,6 +483,16 @@ int fcoe_xmit(struct fc_lport *lp, struct fc_frame *fp)
483 FC_FCOE_ENCAPS_VER(hp, FC_FCOE_VER); 483 FC_FCOE_ENCAPS_VER(hp, FC_FCOE_VER);
484 hp->fcoe_sof = sof; 484 hp->fcoe_sof = sof;
485 485
486#ifdef NETIF_F_FSO
487 /* fcoe lso, mss is in max_payload which is non-zero for FCP data */
488 if (lp->seq_offload && fr_max_payload(fp)) {
489 skb_shinfo(skb)->gso_type = SKB_GSO_FCOE;
490 skb_shinfo(skb)->gso_size = fr_max_payload(fp);
491 } else {
492 skb_shinfo(skb)->gso_type = 0;
493 skb_shinfo(skb)->gso_size = 0;
494 }
495#endif
486 /* update tx stats: regardless if LLD fails */ 496 /* update tx stats: regardless if LLD fails */
487 stats = lp->dev_stats[smp_processor_id()]; 497 stats = lp->dev_stats[smp_processor_id()];
488 if (stats) { 498 if (stats) {
@@ -623,7 +633,7 @@ int fcoe_percpu_receive_thread(void *arg)
623 * it's solicited data, in which case, the FCP layer would 633 * it's solicited data, in which case, the FCP layer would
624 * check it during the copy. 634 * check it during the copy.
625 */ 635 */
626 if (lp->crc_offload) 636 if (lp->crc_offload && skb->ip_summed == CHECKSUM_UNNECESSARY)
627 fr_flags(fp) &= ~FCPHF_CRC_UNCHECKED; 637 fr_flags(fp) &= ~FCPHF_CRC_UNCHECKED;
628 else 638 else
629 fr_flags(fp) |= FCPHF_CRC_UNCHECKED; 639 fr_flags(fp) |= FCPHF_CRC_UNCHECKED;
diff --git a/drivers/scsi/hosts.c b/drivers/scsi/hosts.c
index aa670a1d1513..89d41a424b33 100644
--- a/drivers/scsi/hosts.c
+++ b/drivers/scsi/hosts.c
@@ -176,7 +176,6 @@ void scsi_remove_host(struct Scsi_Host *shost)
176 transport_unregister_device(&shost->shost_gendev); 176 transport_unregister_device(&shost->shost_gendev);
177 device_unregister(&shost->shost_dev); 177 device_unregister(&shost->shost_dev);
178 device_del(&shost->shost_gendev); 178 device_del(&shost->shost_gendev);
179 scsi_proc_hostdir_rm(shost->hostt);
180} 179}
181EXPORT_SYMBOL(scsi_remove_host); 180EXPORT_SYMBOL(scsi_remove_host);
182 181
@@ -270,6 +269,8 @@ static void scsi_host_dev_release(struct device *dev)
270 struct Scsi_Host *shost = dev_to_shost(dev); 269 struct Scsi_Host *shost = dev_to_shost(dev);
271 struct device *parent = dev->parent; 270 struct device *parent = dev->parent;
272 271
272 scsi_proc_hostdir_rm(shost->hostt);
273
273 if (shost->ehandler) 274 if (shost->ehandler)
274 kthread_stop(shost->ehandler); 275 kthread_stop(shost->ehandler);
275 if (shost->work_q) 276 if (shost->work_q)
diff --git a/drivers/scsi/hptiop.c b/drivers/scsi/hptiop.c
index 34be88d7afa5..af1f0af0c5ac 100644
--- a/drivers/scsi/hptiop.c
+++ b/drivers/scsi/hptiop.c
@@ -580,8 +580,7 @@ static void hptiop_finish_scsi_req(struct hptiop_hba *hba, u32 tag,
580 break; 580 break;
581 581
582 default: 582 default:
583 scp->result = ((DRIVER_INVALID|SUGGEST_ABORT)<<24) | 583 scp->result = DRIVER_INVALID << 24 | DID_ABORT << 16;
584 (DID_ABORT<<16);
585 break; 584 break;
586 } 585 }
587 586
diff --git a/drivers/scsi/ibmvscsi/ibmvfc.c b/drivers/scsi/ibmvscsi/ibmvfc.c
index ed1e728763a2..93d1fbe4ee5d 100644
--- a/drivers/scsi/ibmvscsi/ibmvfc.c
+++ b/drivers/scsi/ibmvscsi/ibmvfc.c
@@ -2767,6 +2767,40 @@ static void ibmvfc_retry_tgt_init(struct ibmvfc_target *tgt,
2767 ibmvfc_init_tgt(tgt, job_step); 2767 ibmvfc_init_tgt(tgt, job_step);
2768} 2768}
2769 2769
2770/* Defined in FC-LS */
2771static const struct {
2772 int code;
2773 int retry;
2774 int logged_in;
2775} prli_rsp [] = {
2776 { 0, 1, 0 },
2777 { 1, 0, 1 },
2778 { 2, 1, 0 },
2779 { 3, 1, 0 },
2780 { 4, 0, 0 },
2781 { 5, 0, 0 },
2782 { 6, 0, 1 },
2783 { 7, 0, 0 },
2784 { 8, 1, 0 },
2785};
2786
2787/**
2788 * ibmvfc_get_prli_rsp - Find PRLI response index
2789 * @flags: PRLI response flags
2790 *
2791 **/
2792static int ibmvfc_get_prli_rsp(u16 flags)
2793{
2794 int i;
2795 int code = (flags & 0x0f00) >> 8;
2796
2797 for (i = 0; i < ARRAY_SIZE(prli_rsp); i++)
2798 if (prli_rsp[i].code == code)
2799 return i;
2800
2801 return 0;
2802}
2803
2770/** 2804/**
2771 * ibmvfc_tgt_prli_done - Completion handler for Process Login 2805 * ibmvfc_tgt_prli_done - Completion handler for Process Login
2772 * @evt: ibmvfc event struct 2806 * @evt: ibmvfc event struct
@@ -2777,15 +2811,36 @@ static void ibmvfc_tgt_prli_done(struct ibmvfc_event *evt)
2777 struct ibmvfc_target *tgt = evt->tgt; 2811 struct ibmvfc_target *tgt = evt->tgt;
2778 struct ibmvfc_host *vhost = evt->vhost; 2812 struct ibmvfc_host *vhost = evt->vhost;
2779 struct ibmvfc_process_login *rsp = &evt->xfer_iu->prli; 2813 struct ibmvfc_process_login *rsp = &evt->xfer_iu->prli;
2814 struct ibmvfc_prli_svc_parms *parms = &rsp->parms;
2780 u32 status = rsp->common.status; 2815 u32 status = rsp->common.status;
2816 int index;
2781 2817
2782 vhost->discovery_threads--; 2818 vhost->discovery_threads--;
2783 ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE); 2819 ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE);
2784 switch (status) { 2820 switch (status) {
2785 case IBMVFC_MAD_SUCCESS: 2821 case IBMVFC_MAD_SUCCESS:
2786 tgt_dbg(tgt, "Process Login succeeded\n"); 2822 tgt_dbg(tgt, "Process Login succeeded: %X %02X %04X\n",
2787 tgt->need_login = 0; 2823 parms->type, parms->flags, parms->service_parms);
2788 ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_ADD_RPORT); 2824
2825 if (parms->type == IBMVFC_SCSI_FCP_TYPE) {
2826 index = ibmvfc_get_prli_rsp(parms->flags);
2827 if (prli_rsp[index].logged_in) {
2828 if (parms->flags & IBMVFC_PRLI_EST_IMG_PAIR) {
2829 tgt->need_login = 0;
2830 tgt->ids.roles = 0;
2831 if (parms->service_parms & IBMVFC_PRLI_TARGET_FUNC)
2832 tgt->ids.roles |= FC_PORT_ROLE_FCP_TARGET;
2833 if (parms->service_parms & IBMVFC_PRLI_INITIATOR_FUNC)
2834 tgt->ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
2835 ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_ADD_RPORT);
2836 } else
2837 ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT);
2838 } else if (prli_rsp[index].retry)
2839 ibmvfc_retry_tgt_init(tgt, ibmvfc_tgt_send_prli);
2840 else
2841 ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT);
2842 } else
2843 ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT);
2789 break; 2844 break;
2790 case IBMVFC_MAD_DRIVER_FAILED: 2845 case IBMVFC_MAD_DRIVER_FAILED:
2791 break; 2846 break;
@@ -2874,7 +2929,6 @@ static void ibmvfc_tgt_plogi_done(struct ibmvfc_event *evt)
2874 tgt->ids.node_name = wwn_to_u64(rsp->service_parms.node_name); 2929 tgt->ids.node_name = wwn_to_u64(rsp->service_parms.node_name);
2875 tgt->ids.port_name = wwn_to_u64(rsp->service_parms.port_name); 2930 tgt->ids.port_name = wwn_to_u64(rsp->service_parms.port_name);
2876 tgt->ids.port_id = tgt->scsi_id; 2931 tgt->ids.port_id = tgt->scsi_id;
2877 tgt->ids.roles = FC_PORT_ROLE_FCP_TARGET;
2878 memcpy(&tgt->service_parms, &rsp->service_parms, 2932 memcpy(&tgt->service_parms, &rsp->service_parms,
2879 sizeof(tgt->service_parms)); 2933 sizeof(tgt->service_parms));
2880 memcpy(&tgt->service_parms_change, &rsp->service_parms_change, 2934 memcpy(&tgt->service_parms_change, &rsp->service_parms_change,
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 07829009a8be..def473f0a98f 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -152,13 +152,13 @@ module_param_named(log_level, ipr_log_level, uint, 0);
152MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver"); 152MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
153module_param_named(testmode, ipr_testmode, int, 0); 153module_param_named(testmode, ipr_testmode, int, 0);
154MODULE_PARM_DESC(testmode, "DANGEROUS!!! Allows unsupported configurations"); 154MODULE_PARM_DESC(testmode, "DANGEROUS!!! Allows unsupported configurations");
155module_param_named(fastfail, ipr_fastfail, int, 0); 155module_param_named(fastfail, ipr_fastfail, int, S_IRUGO | S_IWUSR);
156MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries"); 156MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries");
157module_param_named(transop_timeout, ipr_transop_timeout, int, 0); 157module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
158MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)"); 158MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)");
159module_param_named(enable_cache, ipr_enable_cache, int, 0); 159module_param_named(enable_cache, ipr_enable_cache, int, 0);
160MODULE_PARM_DESC(enable_cache, "Enable adapter's non-volatile write cache (default: 1)"); 160MODULE_PARM_DESC(enable_cache, "Enable adapter's non-volatile write cache (default: 1)");
161module_param_named(debug, ipr_debug, int, 0); 161module_param_named(debug, ipr_debug, int, S_IRUGO | S_IWUSR);
162MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)"); 162MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
163module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0); 163module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
164MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)"); 164MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)");
@@ -354,6 +354,8 @@ struct ipr_error_table_t ipr_error_table[] = {
354 "9076: Configuration error, missing remote IOA"}, 354 "9076: Configuration error, missing remote IOA"},
355 {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL, 355 {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
356 "4050: Enclosure does not support a required multipath function"}, 356 "4050: Enclosure does not support a required multipath function"},
357 {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
358 "4070: Logically bad block written on device"},
357 {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL, 359 {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
358 "9041: Array protection temporarily suspended"}, 360 "9041: Array protection temporarily suspended"},
359 {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL, 361 {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
@@ -7147,6 +7149,7 @@ static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
7147 7149
7148 ENTER; 7150 ENTER;
7149 free_irq(pdev->irq, ioa_cfg); 7151 free_irq(pdev->irq, ioa_cfg);
7152 pci_disable_msi(pdev);
7150 iounmap(ioa_cfg->hdw_dma_regs); 7153 iounmap(ioa_cfg->hdw_dma_regs);
7151 pci_release_regions(pdev); 7154 pci_release_regions(pdev);
7152 ipr_free_mem(ioa_cfg); 7155 ipr_free_mem(ioa_cfg);
@@ -7432,6 +7435,11 @@ static int __devinit ipr_probe_ioa(struct pci_dev *pdev,
7432 goto out; 7435 goto out;
7433 } 7436 }
7434 7437
7438 if (!(rc = pci_enable_msi(pdev)))
7439 dev_info(&pdev->dev, "MSI enabled\n");
7440 else if (ipr_debug)
7441 dev_info(&pdev->dev, "Cannot enable MSI\n");
7442
7435 dev_info(&pdev->dev, "Found IOA with IRQ: %d\n", pdev->irq); 7443 dev_info(&pdev->dev, "Found IOA with IRQ: %d\n", pdev->irq);
7436 7444
7437 host = scsi_host_alloc(&driver_template, sizeof(*ioa_cfg)); 7445 host = scsi_host_alloc(&driver_template, sizeof(*ioa_cfg));
@@ -7574,6 +7582,7 @@ out_release_regions:
7574out_scsi_host_put: 7582out_scsi_host_put:
7575 scsi_host_put(host); 7583 scsi_host_put(host);
7576out_disable: 7584out_disable:
7585 pci_disable_msi(pdev);
7577 pci_disable_device(pdev); 7586 pci_disable_device(pdev);
7578 goto out; 7587 goto out;
7579} 7588}
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h
index 8f872f816fe4..79a3ae4fb2c7 100644
--- a/drivers/scsi/ipr.h
+++ b/drivers/scsi/ipr.h
@@ -37,8 +37,8 @@
37/* 37/*
38 * Literals 38 * Literals
39 */ 39 */
40#define IPR_DRIVER_VERSION "2.4.1" 40#define IPR_DRIVER_VERSION "2.4.2"
41#define IPR_DRIVER_DATE "(April 24, 2007)" 41#define IPR_DRIVER_DATE "(January 21, 2009)"
42 42
43/* 43/*
44 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding 44 * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
diff --git a/drivers/scsi/ips.c b/drivers/scsi/ips.c
index ef683f0d2b5a..457d76a4cfe5 100644
--- a/drivers/scsi/ips.c
+++ b/drivers/scsi/ips.c
@@ -1004,8 +1004,7 @@ static int __ips_eh_reset(struct scsi_cmnd *SC)
1004 DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num); 1004 DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num);
1005 1005
1006 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) { 1006 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
1007 scb->scsi_cmd->result = 1007 scb->scsi_cmd->result = DID_RESET << 16;
1008 (DID_RESET << 16) | (SUGGEST_RETRY << 24);
1009 scb->scsi_cmd->scsi_done(scb->scsi_cmd); 1008 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
1010 ips_freescb(ha, scb); 1009 ips_freescb(ha, scb);
1011 } 1010 }
diff --git a/drivers/scsi/iscsi_tcp.c b/drivers/scsi/iscsi_tcp.c
index 23808dfe22ba..b3e5e08e44ab 100644
--- a/drivers/scsi/iscsi_tcp.c
+++ b/drivers/scsi/iscsi_tcp.c
@@ -48,13 +48,6 @@ MODULE_AUTHOR("Mike Christie <michaelc@cs.wisc.edu>, "
48 "Alex Aizman <itn780@yahoo.com>"); 48 "Alex Aizman <itn780@yahoo.com>");
49MODULE_DESCRIPTION("iSCSI/TCP data-path"); 49MODULE_DESCRIPTION("iSCSI/TCP data-path");
50MODULE_LICENSE("GPL"); 50MODULE_LICENSE("GPL");
51#undef DEBUG_TCP
52
53#ifdef DEBUG_TCP
54#define debug_tcp(fmt...) printk(KERN_INFO "tcp: " fmt)
55#else
56#define debug_tcp(fmt...)
57#endif
58 51
59static struct scsi_transport_template *iscsi_sw_tcp_scsi_transport; 52static struct scsi_transport_template *iscsi_sw_tcp_scsi_transport;
60static struct scsi_host_template iscsi_sw_tcp_sht; 53static struct scsi_host_template iscsi_sw_tcp_sht;
@@ -63,6 +56,21 @@ static struct iscsi_transport iscsi_sw_tcp_transport;
63static unsigned int iscsi_max_lun = 512; 56static unsigned int iscsi_max_lun = 512;
64module_param_named(max_lun, iscsi_max_lun, uint, S_IRUGO); 57module_param_named(max_lun, iscsi_max_lun, uint, S_IRUGO);
65 58
59static int iscsi_sw_tcp_dbg;
60module_param_named(debug_iscsi_tcp, iscsi_sw_tcp_dbg, int,
61 S_IRUGO | S_IWUSR);
62MODULE_PARM_DESC(debug_iscsi_tcp, "Turn on debugging for iscsi_tcp module "
63 "Set to 1 to turn on, and zero to turn off. Default is off.");
64
65#define ISCSI_SW_TCP_DBG(_conn, dbg_fmt, arg...) \
66 do { \
67 if (iscsi_sw_tcp_dbg) \
68 iscsi_conn_printk(KERN_INFO, _conn, \
69 "%s " dbg_fmt, \
70 __func__, ##arg); \
71 } while (0);
72
73
66/** 74/**
67 * iscsi_sw_tcp_recv - TCP receive in sendfile fashion 75 * iscsi_sw_tcp_recv - TCP receive in sendfile fashion
68 * @rd_desc: read descriptor 76 * @rd_desc: read descriptor
@@ -77,7 +85,7 @@ static int iscsi_sw_tcp_recv(read_descriptor_t *rd_desc, struct sk_buff *skb,
77 unsigned int consumed, total_consumed = 0; 85 unsigned int consumed, total_consumed = 0;
78 int status; 86 int status;
79 87
80 debug_tcp("in %d bytes\n", skb->len - offset); 88 ISCSI_SW_TCP_DBG(conn, "in %d bytes\n", skb->len - offset);
81 89
82 do { 90 do {
83 status = 0; 91 status = 0;
@@ -86,7 +94,8 @@ static int iscsi_sw_tcp_recv(read_descriptor_t *rd_desc, struct sk_buff *skb,
86 total_consumed += consumed; 94 total_consumed += consumed;
87 } while (consumed != 0 && status != ISCSI_TCP_SKB_DONE); 95 } while (consumed != 0 && status != ISCSI_TCP_SKB_DONE);
88 96
89 debug_tcp("read %d bytes status %d\n", skb->len - offset, status); 97 ISCSI_SW_TCP_DBG(conn, "read %d bytes status %d\n",
98 skb->len - offset, status);
90 return total_consumed; 99 return total_consumed;
91} 100}
92 101
@@ -131,7 +140,8 @@ static void iscsi_sw_tcp_state_change(struct sock *sk)
131 if ((sk->sk_state == TCP_CLOSE_WAIT || 140 if ((sk->sk_state == TCP_CLOSE_WAIT ||
132 sk->sk_state == TCP_CLOSE) && 141 sk->sk_state == TCP_CLOSE) &&
133 !atomic_read(&sk->sk_rmem_alloc)) { 142 !atomic_read(&sk->sk_rmem_alloc)) {
134 debug_tcp("iscsi_tcp_state_change: TCP_CLOSE|TCP_CLOSE_WAIT\n"); 143 ISCSI_SW_TCP_DBG(conn, "iscsi_tcp_state_change: "
144 "TCP_CLOSE|TCP_CLOSE_WAIT\n");
135 iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED); 145 iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED);
136 } 146 }
137 147
@@ -155,8 +165,8 @@ static void iscsi_sw_tcp_write_space(struct sock *sk)
155 struct iscsi_sw_tcp_conn *tcp_sw_conn = tcp_conn->dd_data; 165 struct iscsi_sw_tcp_conn *tcp_sw_conn = tcp_conn->dd_data;
156 166
157 tcp_sw_conn->old_write_space(sk); 167 tcp_sw_conn->old_write_space(sk);
158 debug_tcp("iscsi_write_space: cid %d\n", conn->id); 168 ISCSI_SW_TCP_DBG(conn, "iscsi_write_space\n");
159 scsi_queue_work(conn->session->host, &conn->xmitwork); 169 iscsi_conn_queue_work(conn);
160} 170}
161 171
162static void iscsi_sw_tcp_conn_set_callbacks(struct iscsi_conn *conn) 172static void iscsi_sw_tcp_conn_set_callbacks(struct iscsi_conn *conn)
@@ -283,7 +293,7 @@ static int iscsi_sw_tcp_xmit(struct iscsi_conn *conn)
283 } 293 }
284 } 294 }
285 295
286 debug_tcp("xmit %d bytes\n", consumed); 296 ISCSI_SW_TCP_DBG(conn, "xmit %d bytes\n", consumed);
287 297
288 conn->txdata_octets += consumed; 298 conn->txdata_octets += consumed;
289 return consumed; 299 return consumed;
@@ -291,7 +301,7 @@ static int iscsi_sw_tcp_xmit(struct iscsi_conn *conn)
291error: 301error:
292 /* Transmit error. We could initiate error recovery 302 /* Transmit error. We could initiate error recovery
293 * here. */ 303 * here. */
294 debug_tcp("Error sending PDU, errno=%d\n", rc); 304 ISCSI_SW_TCP_DBG(conn, "Error sending PDU, errno=%d\n", rc);
295 iscsi_conn_failure(conn, rc); 305 iscsi_conn_failure(conn, rc);
296 return -EIO; 306 return -EIO;
297} 307}
@@ -334,9 +344,10 @@ static int iscsi_sw_tcp_send_hdr_done(struct iscsi_tcp_conn *tcp_conn,
334 struct iscsi_sw_tcp_conn *tcp_sw_conn = tcp_conn->dd_data; 344 struct iscsi_sw_tcp_conn *tcp_sw_conn = tcp_conn->dd_data;
335 345
336 tcp_sw_conn->out.segment = tcp_sw_conn->out.data_segment; 346 tcp_sw_conn->out.segment = tcp_sw_conn->out.data_segment;
337 debug_tcp("Header done. Next segment size %u total_size %u\n", 347 ISCSI_SW_TCP_DBG(tcp_conn->iscsi_conn,
338 tcp_sw_conn->out.segment.size, 348 "Header done. Next segment size %u total_size %u\n",
339 tcp_sw_conn->out.segment.total_size); 349 tcp_sw_conn->out.segment.size,
350 tcp_sw_conn->out.segment.total_size);
340 return 0; 351 return 0;
341} 352}
342 353
@@ -346,8 +357,8 @@ static void iscsi_sw_tcp_send_hdr_prep(struct iscsi_conn *conn, void *hdr,
346 struct iscsi_tcp_conn *tcp_conn = conn->dd_data; 357 struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
347 struct iscsi_sw_tcp_conn *tcp_sw_conn = tcp_conn->dd_data; 358 struct iscsi_sw_tcp_conn *tcp_sw_conn = tcp_conn->dd_data;
348 359
349 debug_tcp("%s(%p%s)\n", __func__, tcp_conn, 360 ISCSI_SW_TCP_DBG(conn, "%s\n", conn->hdrdgst_en ?
350 conn->hdrdgst_en? ", digest enabled" : ""); 361 "digest enabled" : "digest disabled");
351 362
352 /* Clear the data segment - needs to be filled in by the 363 /* Clear the data segment - needs to be filled in by the
353 * caller using iscsi_tcp_send_data_prep() */ 364 * caller using iscsi_tcp_send_data_prep() */
@@ -389,9 +400,9 @@ iscsi_sw_tcp_send_data_prep(struct iscsi_conn *conn, struct scatterlist *sg,
389 struct hash_desc *tx_hash = NULL; 400 struct hash_desc *tx_hash = NULL;
390 unsigned int hdr_spec_len; 401 unsigned int hdr_spec_len;
391 402
392 debug_tcp("%s(%p, offset=%d, datalen=%d%s)\n", __func__, 403 ISCSI_SW_TCP_DBG(conn, "offset=%d, datalen=%d %s\n", offset, len,
393 tcp_conn, offset, len, 404 conn->datadgst_en ?
394 conn->datadgst_en? ", digest enabled" : ""); 405 "digest enabled" : "digest disabled");
395 406
396 /* Make sure the datalen matches what the caller 407 /* Make sure the datalen matches what the caller
397 said he would send. */ 408 said he would send. */
@@ -415,8 +426,8 @@ iscsi_sw_tcp_send_linear_data_prep(struct iscsi_conn *conn, void *data,
415 struct hash_desc *tx_hash = NULL; 426 struct hash_desc *tx_hash = NULL;
416 unsigned int hdr_spec_len; 427 unsigned int hdr_spec_len;
417 428
418 debug_tcp("%s(%p, datalen=%d%s)\n", __func__, tcp_conn, len, 429 ISCSI_SW_TCP_DBG(conn, "datalen=%zd %s\n", len, conn->datadgst_en ?
419 conn->datadgst_en? ", digest enabled" : ""); 430 "digest enabled" : "digest disabled");
420 431
421 /* Make sure the datalen matches what the caller 432 /* Make sure the datalen matches what the caller
422 said he would send. */ 433 said he would send. */
@@ -754,8 +765,7 @@ iscsi_sw_tcp_conn_get_stats(struct iscsi_cls_conn *cls_conn,
754 765
755static struct iscsi_cls_session * 766static struct iscsi_cls_session *
756iscsi_sw_tcp_session_create(struct iscsi_endpoint *ep, uint16_t cmds_max, 767iscsi_sw_tcp_session_create(struct iscsi_endpoint *ep, uint16_t cmds_max,
757 uint16_t qdepth, uint32_t initial_cmdsn, 768 uint16_t qdepth, uint32_t initial_cmdsn)
758 uint32_t *hostno)
759{ 769{
760 struct iscsi_cls_session *cls_session; 770 struct iscsi_cls_session *cls_session;
761 struct iscsi_session *session; 771 struct iscsi_session *session;
@@ -766,10 +776,11 @@ iscsi_sw_tcp_session_create(struct iscsi_endpoint *ep, uint16_t cmds_max,
766 return NULL; 776 return NULL;
767 } 777 }
768 778
769 shost = iscsi_host_alloc(&iscsi_sw_tcp_sht, 0, qdepth); 779 shost = iscsi_host_alloc(&iscsi_sw_tcp_sht, 0, 1);
770 if (!shost) 780 if (!shost)
771 return NULL; 781 return NULL;
772 shost->transportt = iscsi_sw_tcp_scsi_transport; 782 shost->transportt = iscsi_sw_tcp_scsi_transport;
783 shost->cmd_per_lun = qdepth;
773 shost->max_lun = iscsi_max_lun; 784 shost->max_lun = iscsi_max_lun;
774 shost->max_id = 0; 785 shost->max_id = 0;
775 shost->max_channel = 0; 786 shost->max_channel = 0;
@@ -777,7 +788,6 @@ iscsi_sw_tcp_session_create(struct iscsi_endpoint *ep, uint16_t cmds_max,
777 788
778 if (iscsi_host_add(shost, NULL)) 789 if (iscsi_host_add(shost, NULL))
779 goto free_host; 790 goto free_host;
780 *hostno = shost->host_no;
781 791
782 cls_session = iscsi_session_setup(&iscsi_sw_tcp_transport, shost, 792 cls_session = iscsi_session_setup(&iscsi_sw_tcp_transport, shost,
783 cmds_max, 793 cmds_max,
@@ -813,6 +823,12 @@ static void iscsi_sw_tcp_session_destroy(struct iscsi_cls_session *cls_session)
813 iscsi_host_free(shost); 823 iscsi_host_free(shost);
814} 824}
815 825
826static int iscsi_sw_tcp_slave_alloc(struct scsi_device *sdev)
827{
828 set_bit(QUEUE_FLAG_BIDI, &sdev->request_queue->queue_flags);
829 return 0;
830}
831
816static int iscsi_sw_tcp_slave_configure(struct scsi_device *sdev) 832static int iscsi_sw_tcp_slave_configure(struct scsi_device *sdev)
817{ 833{
818 blk_queue_bounce_limit(sdev->request_queue, BLK_BOUNCE_ANY); 834 blk_queue_bounce_limit(sdev->request_queue, BLK_BOUNCE_ANY);
@@ -833,6 +849,7 @@ static struct scsi_host_template iscsi_sw_tcp_sht = {
833 .eh_device_reset_handler= iscsi_eh_device_reset, 849 .eh_device_reset_handler= iscsi_eh_device_reset,
834 .eh_target_reset_handler= iscsi_eh_target_reset, 850 .eh_target_reset_handler= iscsi_eh_target_reset,
835 .use_clustering = DISABLE_CLUSTERING, 851 .use_clustering = DISABLE_CLUSTERING,
852 .slave_alloc = iscsi_sw_tcp_slave_alloc,
836 .slave_configure = iscsi_sw_tcp_slave_configure, 853 .slave_configure = iscsi_sw_tcp_slave_configure,
837 .proc_name = "iscsi_tcp", 854 .proc_name = "iscsi_tcp",
838 .this_id = -1, 855 .this_id = -1,
diff --git a/drivers/scsi/libfc/fc_exch.c b/drivers/scsi/libfc/fc_exch.c
index 505825b6124d..992af05aacf1 100644
--- a/drivers/scsi/libfc/fc_exch.c
+++ b/drivers/scsi/libfc/fc_exch.c
@@ -281,7 +281,7 @@ static void fc_exch_release(struct fc_exch *ep)
281 ep->destructor(&ep->seq, ep->arg); 281 ep->destructor(&ep->seq, ep->arg);
282 if (ep->lp->tt.exch_put) 282 if (ep->lp->tt.exch_put)
283 ep->lp->tt.exch_put(ep->lp, mp, ep->xid); 283 ep->lp->tt.exch_put(ep->lp, mp, ep->xid);
284 WARN_ON(!ep->esb_stat & ESB_ST_COMPLETE); 284 WARN_ON(!(ep->esb_stat & ESB_ST_COMPLETE));
285 mempool_free(ep, mp->ep_pool); 285 mempool_free(ep, mp->ep_pool);
286 } 286 }
287} 287}
@@ -489,7 +489,7 @@ static u16 fc_em_alloc_xid(struct fc_exch_mgr *mp, const struct fc_frame *fp)
489 struct fc_exch *ep = NULL; 489 struct fc_exch *ep = NULL;
490 490
491 if (mp->max_read) { 491 if (mp->max_read) {
492 if (fc_frame_is_read(fp)) { 492 if (fc_fcp_is_read(fr_fsp(fp))) {
493 min = mp->min_xid; 493 min = mp->min_xid;
494 max = mp->max_read; 494 max = mp->max_read;
495 plast = &mp->last_read; 495 plast = &mp->last_read;
@@ -1841,6 +1841,8 @@ struct fc_seq *fc_exch_seq_send(struct fc_lport *lp,
1841 fc_exch_setup_hdr(ep, fp, ep->f_ctl); 1841 fc_exch_setup_hdr(ep, fp, ep->f_ctl);
1842 sp->cnt++; 1842 sp->cnt++;
1843 1843
1844 fc_fcp_ddp_setup(fr_fsp(fp), ep->xid);
1845
1844 if (unlikely(lp->tt.frame_send(lp, fp))) 1846 if (unlikely(lp->tt.frame_send(lp, fp)))
1845 goto err; 1847 goto err;
1846 1848
diff --git a/drivers/scsi/libfc/fc_fcp.c b/drivers/scsi/libfc/fc_fcp.c
index 2a631d7dbcec..a5725f3b7ce1 100644
--- a/drivers/scsi/libfc/fc_fcp.c
+++ b/drivers/scsi/libfc/fc_fcp.c
@@ -259,12 +259,62 @@ static void fc_fcp_retry_cmd(struct fc_fcp_pkt *fsp)
259 } 259 }
260 260
261 fsp->state &= ~FC_SRB_ABORT_PENDING; 261 fsp->state &= ~FC_SRB_ABORT_PENDING;
262 fsp->io_status = SUGGEST_RETRY << 24; 262 fsp->io_status = 0;
263 fsp->status_code = FC_ERROR; 263 fsp->status_code = FC_ERROR;
264 fc_fcp_complete_locked(fsp); 264 fc_fcp_complete_locked(fsp);
265} 265}
266 266
267/* 267/*
268 * fc_fcp_ddp_setup - calls to LLD's ddp_setup to set up DDP
269 * transfer for a read I/O indicated by the fc_fcp_pkt.
270 * @fsp: ptr to the fc_fcp_pkt
271 *
272 * This is called in exch_seq_send() when we have a newly allocated
273 * exchange with a valid exchange id to setup ddp.
274 *
275 * returns: none
276 */
277void fc_fcp_ddp_setup(struct fc_fcp_pkt *fsp, u16 xid)
278{
279 struct fc_lport *lp;
280
281 if (!fsp)
282 return;
283
284 lp = fsp->lp;
285 if ((fsp->req_flags & FC_SRB_READ) &&
286 (lp->lro_enabled) && (lp->tt.ddp_setup)) {
287 if (lp->tt.ddp_setup(lp, xid, scsi_sglist(fsp->cmd),
288 scsi_sg_count(fsp->cmd)))
289 fsp->xfer_ddp = xid;
290 }
291}
292EXPORT_SYMBOL(fc_fcp_ddp_setup);
293
294/*
295 * fc_fcp_ddp_done - calls to LLD's ddp_done to release any
296 * DDP related resources for this I/O if it is initialized
297 * as a ddp transfer
298 * @fsp: ptr to the fc_fcp_pkt
299 *
300 * returns: none
301 */
302static void fc_fcp_ddp_done(struct fc_fcp_pkt *fsp)
303{
304 struct fc_lport *lp;
305
306 if (!fsp)
307 return;
308
309 lp = fsp->lp;
310 if (fsp->xfer_ddp && lp->tt.ddp_done) {
311 fsp->xfer_len = lp->tt.ddp_done(lp, fsp->xfer_ddp);
312 fsp->xfer_ddp = 0;
313 }
314}
315
316
317/*
268 * Receive SCSI data from target. 318 * Receive SCSI data from target.
269 * Called after receiving solicited data. 319 * Called after receiving solicited data.
270 */ 320 */
@@ -289,6 +339,9 @@ static void fc_fcp_recv_data(struct fc_fcp_pkt *fsp, struct fc_frame *fp)
289 len = fr_len(fp) - sizeof(*fh); 339 len = fr_len(fp) - sizeof(*fh);
290 buf = fc_frame_payload_get(fp, 0); 340 buf = fc_frame_payload_get(fp, 0);
291 341
342 /* if this I/O is ddped, update xfer len */
343 fc_fcp_ddp_done(fsp);
344
292 if (offset + len > fsp->data_len) { 345 if (offset + len > fsp->data_len) {
293 /* this should never happen */ 346 /* this should never happen */
294 if ((fr_flags(fp) & FCPHF_CRC_UNCHECKED) && 347 if ((fr_flags(fp) & FCPHF_CRC_UNCHECKED) &&
@@ -435,7 +488,13 @@ static int fc_fcp_send_data(struct fc_fcp_pkt *fsp, struct fc_seq *seq,
435 * burst length (t_blen) to seq_blen, otherwise set t_blen 488 * burst length (t_blen) to seq_blen, otherwise set t_blen
436 * to max FC frame payload previously set in fsp->max_payload. 489 * to max FC frame payload previously set in fsp->max_payload.
437 */ 490 */
438 t_blen = lp->seq_offload ? seq_blen : fsp->max_payload; 491 t_blen = fsp->max_payload;
492 if (lp->seq_offload) {
493 t_blen = min(seq_blen, (size_t)lp->lso_max);
494 FC_DEBUG_FCP("fsp=%p:lso:blen=%zx lso_max=0x%x t_blen=%zx\n",
495 fsp, seq_blen, lp->lso_max, t_blen);
496 }
497
439 WARN_ON(t_blen < FC_MIN_MAX_PAYLOAD); 498 WARN_ON(t_blen < FC_MIN_MAX_PAYLOAD);
440 if (t_blen > 512) 499 if (t_blen > 512)
441 t_blen &= ~(512 - 1); /* round down to block size */ 500 t_blen &= ~(512 - 1); /* round down to block size */
@@ -744,6 +803,9 @@ static void fc_fcp_resp(struct fc_fcp_pkt *fsp, struct fc_frame *fp)
744 fsp->scsi_comp_flags = flags; 803 fsp->scsi_comp_flags = flags;
745 expected_len = fsp->data_len; 804 expected_len = fsp->data_len;
746 805
806 /* if ddp, update xfer len */
807 fc_fcp_ddp_done(fsp);
808
747 if (unlikely((flags & ~FCP_CONF_REQ) || fc_rp->fr_status)) { 809 if (unlikely((flags & ~FCP_CONF_REQ) || fc_rp->fr_status)) {
748 rp_ex = (void *)(fc_rp + 1); 810 rp_ex = (void *)(fc_rp + 1);
749 if (flags & (FCP_RSP_LEN_VAL | FCP_SNS_LEN_VAL)) { 811 if (flags & (FCP_RSP_LEN_VAL | FCP_SNS_LEN_VAL)) {
@@ -859,7 +921,7 @@ static void fc_fcp_complete_locked(struct fc_fcp_pkt *fsp)
859 (!(fsp->scsi_comp_flags & FCP_RESID_UNDER) || 921 (!(fsp->scsi_comp_flags & FCP_RESID_UNDER) ||
860 fsp->xfer_len < fsp->data_len - fsp->scsi_resid)) { 922 fsp->xfer_len < fsp->data_len - fsp->scsi_resid)) {
861 fsp->status_code = FC_DATA_UNDRUN; 923 fsp->status_code = FC_DATA_UNDRUN;
862 fsp->io_status = SUGGEST_RETRY << 24; 924 fsp->io_status = 0;
863 } 925 }
864 } 926 }
865 927
@@ -1006,7 +1068,7 @@ static int fc_fcp_cmd_send(struct fc_lport *lp, struct fc_fcp_pkt *fsp,
1006 } 1068 }
1007 1069
1008 memcpy(fc_frame_payload_get(fp, len), &fsp->cdb_cmd, len); 1070 memcpy(fc_frame_payload_get(fp, len), &fsp->cdb_cmd, len);
1009 fr_cmd(fp) = fsp->cmd; 1071 fr_fsp(fp) = fsp;
1010 rport = fsp->rport; 1072 rport = fsp->rport;
1011 fsp->max_payload = rport->maxframe_size; 1073 fsp->max_payload = rport->maxframe_size;
1012 rp = rport->dd_data; 1074 rp = rport->dd_data;
@@ -1267,7 +1329,7 @@ static void fc_fcp_rec(struct fc_fcp_pkt *fsp)
1267 rp = rport->dd_data; 1329 rp = rport->dd_data;
1268 if (!fsp->seq_ptr || rp->rp_state != RPORT_ST_READY) { 1330 if (!fsp->seq_ptr || rp->rp_state != RPORT_ST_READY) {
1269 fsp->status_code = FC_HRD_ERROR; 1331 fsp->status_code = FC_HRD_ERROR;
1270 fsp->io_status = SUGGEST_RETRY << 24; 1332 fsp->io_status = 0;
1271 fc_fcp_complete_locked(fsp); 1333 fc_fcp_complete_locked(fsp);
1272 return; 1334 return;
1273 } 1335 }
@@ -1740,6 +1802,9 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp)
1740 struct fc_lport *lp; 1802 struct fc_lport *lp;
1741 unsigned long flags; 1803 unsigned long flags;
1742 1804
1805 /* release outstanding ddp context */
1806 fc_fcp_ddp_done(fsp);
1807
1743 fsp->state |= FC_SRB_COMPL; 1808 fsp->state |= FC_SRB_COMPL;
1744 if (!(fsp->state & FC_SRB_FCP_PROCESSING_TMO)) { 1809 if (!(fsp->state & FC_SRB_FCP_PROCESSING_TMO)) {
1745 spin_unlock_bh(&fsp->scsi_pkt_lock); 1810 spin_unlock_bh(&fsp->scsi_pkt_lock);
diff --git a/drivers/scsi/libfc/fc_lport.c b/drivers/scsi/libfc/fc_lport.c
index 2ae50a1188e6..7ef44501ecc6 100644
--- a/drivers/scsi/libfc/fc_lport.c
+++ b/drivers/scsi/libfc/fc_lport.c
@@ -762,10 +762,11 @@ static void fc_lport_recv_flogi_req(struct fc_seq *sp_in,
762 remote_wwpn = get_unaligned_be64(&flp->fl_wwpn); 762 remote_wwpn = get_unaligned_be64(&flp->fl_wwpn);
763 if (remote_wwpn == lport->wwpn) { 763 if (remote_wwpn == lport->wwpn) {
764 FC_DBG("FLOGI from port with same WWPN %llx " 764 FC_DBG("FLOGI from port with same WWPN %llx "
765 "possible configuration error\n", remote_wwpn); 765 "possible configuration error\n",
766 (unsigned long long)remote_wwpn);
766 goto out; 767 goto out;
767 } 768 }
768 FC_DBG("FLOGI from port WWPN %llx\n", remote_wwpn); 769 FC_DBG("FLOGI from port WWPN %llx\n", (unsigned long long)remote_wwpn);
769 770
770 /* 771 /*
771 * XXX what is the right thing to do for FIDs? 772 * XXX what is the right thing to do for FIDs?
diff --git a/drivers/scsi/libfc/fc_rport.c b/drivers/scsi/libfc/fc_rport.c
index dae65133a833..0472bb73221e 100644
--- a/drivers/scsi/libfc/fc_rport.c
+++ b/drivers/scsi/libfc/fc_rport.c
@@ -988,7 +988,7 @@ static void fc_rport_recv_plogi_req(struct fc_rport *rport,
988 switch (rdata->rp_state) { 988 switch (rdata->rp_state) {
989 case RPORT_ST_INIT: 989 case RPORT_ST_INIT:
990 FC_DEBUG_RPORT("incoming PLOGI from %6x wwpn %llx state INIT " 990 FC_DEBUG_RPORT("incoming PLOGI from %6x wwpn %llx state INIT "
991 "- reject\n", sid, wwpn); 991 "- reject\n", sid, (unsigned long long)wwpn);
992 reject = ELS_RJT_UNSUP; 992 reject = ELS_RJT_UNSUP;
993 break; 993 break;
994 case RPORT_ST_PLOGI: 994 case RPORT_ST_PLOGI:
diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c
index 809d32d95c76..dfaa8adf099e 100644
--- a/drivers/scsi/libiscsi.c
+++ b/drivers/scsi/libiscsi.c
@@ -38,6 +38,28 @@
38#include <scsi/scsi_transport_iscsi.h> 38#include <scsi/scsi_transport_iscsi.h>
39#include <scsi/libiscsi.h> 39#include <scsi/libiscsi.h>
40 40
41static int iscsi_dbg_lib;
42module_param_named(debug_libiscsi, iscsi_dbg_lib, int, S_IRUGO | S_IWUSR);
43MODULE_PARM_DESC(debug_libiscsi, "Turn on debugging for libiscsi module. "
44 "Set to 1 to turn on, and zero to turn off. Default "
45 "is off.");
46
47#define ISCSI_DBG_CONN(_conn, dbg_fmt, arg...) \
48 do { \
49 if (iscsi_dbg_lib) \
50 iscsi_conn_printk(KERN_INFO, _conn, \
51 "%s " dbg_fmt, \
52 __func__, ##arg); \
53 } while (0);
54
55#define ISCSI_DBG_SESSION(_session, dbg_fmt, arg...) \
56 do { \
57 if (iscsi_dbg_lib) \
58 iscsi_session_printk(KERN_INFO, _session, \
59 "%s " dbg_fmt, \
60 __func__, ##arg); \
61 } while (0);
62
41/* Serial Number Arithmetic, 32 bits, less than, RFC1982 */ 63/* Serial Number Arithmetic, 32 bits, less than, RFC1982 */
42#define SNA32_CHECK 2147483648UL 64#define SNA32_CHECK 2147483648UL
43 65
@@ -54,6 +76,15 @@ static int iscsi_sna_lte(u32 n1, u32 n2)
54 (n1 > n2 && (n2 - n1 < SNA32_CHECK))); 76 (n1 > n2 && (n2 - n1 < SNA32_CHECK)));
55} 77}
56 78
79inline void iscsi_conn_queue_work(struct iscsi_conn *conn)
80{
81 struct Scsi_Host *shost = conn->session->host;
82 struct iscsi_host *ihost = shost_priv(shost);
83
84 queue_work(ihost->workq, &conn->xmitwork);
85}
86EXPORT_SYMBOL_GPL(iscsi_conn_queue_work);
87
57void 88void
58iscsi_update_cmdsn(struct iscsi_session *session, struct iscsi_nopin *hdr) 89iscsi_update_cmdsn(struct iscsi_session *session, struct iscsi_nopin *hdr)
59{ 90{
@@ -81,8 +112,7 @@ iscsi_update_cmdsn(struct iscsi_session *session, struct iscsi_nopin *hdr)
81 if (!list_empty(&session->leadconn->xmitqueue) || 112 if (!list_empty(&session->leadconn->xmitqueue) ||
82 !list_empty(&session->leadconn->mgmtqueue)) { 113 !list_empty(&session->leadconn->mgmtqueue)) {
83 if (!(session->tt->caps & CAP_DATA_PATH_OFFLOAD)) 114 if (!(session->tt->caps & CAP_DATA_PATH_OFFLOAD))
84 scsi_queue_work(session->host, 115 iscsi_conn_queue_work(session->leadconn);
85 &session->leadconn->xmitwork);
86 } 116 }
87 } 117 }
88} 118}
@@ -176,10 +206,11 @@ static int iscsi_prep_ecdb_ahs(struct iscsi_task *task)
176 ecdb_ahdr->reserved = 0; 206 ecdb_ahdr->reserved = 0;
177 memcpy(ecdb_ahdr->ecdb, cmd->cmnd + ISCSI_CDB_SIZE, rlen); 207 memcpy(ecdb_ahdr->ecdb, cmd->cmnd + ISCSI_CDB_SIZE, rlen);
178 208
179 debug_scsi("iscsi_prep_ecdb_ahs: varlen_cdb_len %d " 209 ISCSI_DBG_SESSION(task->conn->session,
180 "rlen %d pad_len %d ahs_length %d iscsi_headers_size %u\n", 210 "iscsi_prep_ecdb_ahs: varlen_cdb_len %d "
181 cmd->cmd_len, rlen, pad_len, ahslength, task->hdr_len); 211 "rlen %d pad_len %d ahs_length %d iscsi_headers_size "
182 212 "%u\n", cmd->cmd_len, rlen, pad_len, ahslength,
213 task->hdr_len);
183 return 0; 214 return 0;
184} 215}
185 216
@@ -201,10 +232,11 @@ static int iscsi_prep_bidi_ahs(struct iscsi_task *task)
201 rlen_ahdr->reserved = 0; 232 rlen_ahdr->reserved = 0;
202 rlen_ahdr->read_length = cpu_to_be32(scsi_in(sc)->length); 233 rlen_ahdr->read_length = cpu_to_be32(scsi_in(sc)->length);
203 234
204 debug_scsi("bidi-in rlen_ahdr->read_length(%d) " 235 ISCSI_DBG_SESSION(task->conn->session,
205 "rlen_ahdr->ahslength(%d)\n", 236 "bidi-in rlen_ahdr->read_length(%d) "
206 be32_to_cpu(rlen_ahdr->read_length), 237 "rlen_ahdr->ahslength(%d)\n",
207 be16_to_cpu(rlen_ahdr->ahslength)); 238 be32_to_cpu(rlen_ahdr->read_length),
239 be16_to_cpu(rlen_ahdr->ahslength));
208 return 0; 240 return 0;
209} 241}
210 242
@@ -335,13 +367,15 @@ static int iscsi_prep_scsi_cmd_pdu(struct iscsi_task *task)
335 list_move_tail(&task->running, &conn->run_list); 367 list_move_tail(&task->running, &conn->run_list);
336 368
337 conn->scsicmd_pdus_cnt++; 369 conn->scsicmd_pdus_cnt++;
338 debug_scsi("iscsi prep [%s cid %d sc %p cdb 0x%x itt 0x%x len %d " 370 ISCSI_DBG_SESSION(session, "iscsi prep [%s cid %d sc %p cdb 0x%x "
339 "bidi_len %d cmdsn %d win %d]\n", scsi_bidi_cmnd(sc) ? 371 "itt 0x%x len %d bidi_len %d cmdsn %d win %d]\n",
340 "bidirectional" : sc->sc_data_direction == DMA_TO_DEVICE ? 372 scsi_bidi_cmnd(sc) ? "bidirectional" :
341 "write" : "read", conn->id, sc, sc->cmnd[0], task->itt, 373 sc->sc_data_direction == DMA_TO_DEVICE ?
342 scsi_bufflen(sc), 374 "write" : "read", conn->id, sc, sc->cmnd[0],
343 scsi_bidi_cmnd(sc) ? scsi_in(sc)->length : 0, 375 task->itt, scsi_bufflen(sc),
344 session->cmdsn, session->max_cmdsn - session->exp_cmdsn + 1); 376 scsi_bidi_cmnd(sc) ? scsi_in(sc)->length : 0,
377 session->cmdsn,
378 session->max_cmdsn - session->exp_cmdsn + 1);
345 return 0; 379 return 0;
346} 380}
347 381
@@ -483,9 +517,9 @@ static int iscsi_prep_mgmt_task(struct iscsi_conn *conn,
483 517
484 task->state = ISCSI_TASK_RUNNING; 518 task->state = ISCSI_TASK_RUNNING;
485 list_move_tail(&task->running, &conn->mgmt_run_list); 519 list_move_tail(&task->running, &conn->mgmt_run_list);
486 debug_scsi("mgmtpdu [op 0x%x hdr->itt 0x%x datalen %d]\n", 520 ISCSI_DBG_SESSION(session, "mgmtpdu [op 0x%x hdr->itt 0x%x "
487 hdr->opcode & ISCSI_OPCODE_MASK, hdr->itt, 521 "datalen %d]\n", hdr->opcode & ISCSI_OPCODE_MASK,
488 task->data_count); 522 hdr->itt, task->data_count);
489 return 0; 523 return 0;
490} 524}
491 525
@@ -560,7 +594,7 @@ __iscsi_conn_send_pdu(struct iscsi_conn *conn, struct iscsi_hdr *hdr,
560 goto free_task; 594 goto free_task;
561 595
562 } else 596 } else
563 scsi_queue_work(conn->session->host, &conn->xmitwork); 597 iscsi_conn_queue_work(conn);
564 598
565 return task; 599 return task;
566 600
@@ -637,8 +671,9 @@ invalid_datalen:
637 671
638 memcpy(sc->sense_buffer, data + 2, 672 memcpy(sc->sense_buffer, data + 2,
639 min_t(uint16_t, senselen, SCSI_SENSE_BUFFERSIZE)); 673 min_t(uint16_t, senselen, SCSI_SENSE_BUFFERSIZE));
640 debug_scsi("copied %d bytes of sense\n", 674 ISCSI_DBG_SESSION(session, "copied %d bytes of sense\n",
641 min_t(uint16_t, senselen, SCSI_SENSE_BUFFERSIZE)); 675 min_t(uint16_t, senselen,
676 SCSI_SENSE_BUFFERSIZE));
642 } 677 }
643 678
644 if (rhdr->flags & (ISCSI_FLAG_CMD_BIDI_UNDERFLOW | 679 if (rhdr->flags & (ISCSI_FLAG_CMD_BIDI_UNDERFLOW |
@@ -666,8 +701,8 @@ invalid_datalen:
666 sc->result = (DID_BAD_TARGET << 16) | rhdr->cmd_status; 701 sc->result = (DID_BAD_TARGET << 16) | rhdr->cmd_status;
667 } 702 }
668out: 703out:
669 debug_scsi("done [sc %lx res %d itt 0x%x]\n", 704 ISCSI_DBG_SESSION(session, "done [sc %p res %d itt 0x%x]\n",
670 (long)sc, sc->result, task->itt); 705 sc, sc->result, task->itt);
671 conn->scsirsp_pdus_cnt++; 706 conn->scsirsp_pdus_cnt++;
672 707
673 __iscsi_put_task(task); 708 __iscsi_put_task(task);
@@ -835,8 +870,8 @@ int __iscsi_complete_pdu(struct iscsi_conn *conn, struct iscsi_hdr *hdr,
835 else 870 else
836 itt = ~0U; 871 itt = ~0U;
837 872
838 debug_scsi("[op 0x%x cid %d itt 0x%x len %d]\n", 873 ISCSI_DBG_SESSION(session, "[op 0x%x cid %d itt 0x%x len %d]\n",
839 opcode, conn->id, itt, datalen); 874 opcode, conn->id, itt, datalen);
840 875
841 if (itt == ~0U) { 876 if (itt == ~0U) {
842 iscsi_update_cmdsn(session, (struct iscsi_nopin*)hdr); 877 iscsi_update_cmdsn(session, (struct iscsi_nopin*)hdr);
@@ -1034,10 +1069,9 @@ struct iscsi_task *iscsi_itt_to_ctask(struct iscsi_conn *conn, itt_t itt)
1034} 1069}
1035EXPORT_SYMBOL_GPL(iscsi_itt_to_ctask); 1070EXPORT_SYMBOL_GPL(iscsi_itt_to_ctask);
1036 1071
1037void iscsi_session_failure(struct iscsi_cls_session *cls_session, 1072void iscsi_session_failure(struct iscsi_session *session,
1038 enum iscsi_err err) 1073 enum iscsi_err err)
1039{ 1074{
1040 struct iscsi_session *session = cls_session->dd_data;
1041 struct iscsi_conn *conn; 1075 struct iscsi_conn *conn;
1042 struct device *dev; 1076 struct device *dev;
1043 unsigned long flags; 1077 unsigned long flags;
@@ -1095,10 +1129,10 @@ static int iscsi_check_cmdsn_window_closed(struct iscsi_conn *conn)
1095 * Check for iSCSI window and take care of CmdSN wrap-around 1129 * Check for iSCSI window and take care of CmdSN wrap-around
1096 */ 1130 */
1097 if (!iscsi_sna_lte(session->queued_cmdsn, session->max_cmdsn)) { 1131 if (!iscsi_sna_lte(session->queued_cmdsn, session->max_cmdsn)) {
1098 debug_scsi("iSCSI CmdSN closed. ExpCmdSn %u MaxCmdSN %u " 1132 ISCSI_DBG_SESSION(session, "iSCSI CmdSN closed. ExpCmdSn "
1099 "CmdSN %u/%u\n", session->exp_cmdsn, 1133 "%u MaxCmdSN %u CmdSN %u/%u\n",
1100 session->max_cmdsn, session->cmdsn, 1134 session->exp_cmdsn, session->max_cmdsn,
1101 session->queued_cmdsn); 1135 session->cmdsn, session->queued_cmdsn);
1102 return -ENOSPC; 1136 return -ENOSPC;
1103 } 1137 }
1104 return 0; 1138 return 0;
@@ -1133,7 +1167,7 @@ void iscsi_requeue_task(struct iscsi_task *task)
1133 struct iscsi_conn *conn = task->conn; 1167 struct iscsi_conn *conn = task->conn;
1134 1168
1135 list_move_tail(&task->running, &conn->requeue); 1169 list_move_tail(&task->running, &conn->requeue);
1136 scsi_queue_work(conn->session->host, &conn->xmitwork); 1170 iscsi_conn_queue_work(conn);
1137} 1171}
1138EXPORT_SYMBOL_GPL(iscsi_requeue_task); 1172EXPORT_SYMBOL_GPL(iscsi_requeue_task);
1139 1173
@@ -1152,7 +1186,7 @@ static int iscsi_data_xmit(struct iscsi_conn *conn)
1152 1186
1153 spin_lock_bh(&conn->session->lock); 1187 spin_lock_bh(&conn->session->lock);
1154 if (unlikely(conn->suspend_tx)) { 1188 if (unlikely(conn->suspend_tx)) {
1155 debug_scsi("conn %d Tx suspended!\n", conn->id); 1189 ISCSI_DBG_SESSION(conn->session, "Tx suspended!\n");
1156 spin_unlock_bh(&conn->session->lock); 1190 spin_unlock_bh(&conn->session->lock);
1157 return -ENODATA; 1191 return -ENODATA;
1158 } 1192 }
@@ -1386,7 +1420,7 @@ int iscsi_queuecommand(struct scsi_cmnd *sc, void (*done)(struct scsi_cmnd *))
1386 goto prepd_reject; 1420 goto prepd_reject;
1387 } 1421 }
1388 } else 1422 } else
1389 scsi_queue_work(session->host, &conn->xmitwork); 1423 iscsi_conn_queue_work(conn);
1390 1424
1391 session->queued_cmdsn++; 1425 session->queued_cmdsn++;
1392 spin_unlock(&session->lock); 1426 spin_unlock(&session->lock);
@@ -1398,7 +1432,8 @@ prepd_reject:
1398 iscsi_complete_command(task); 1432 iscsi_complete_command(task);
1399reject: 1433reject:
1400 spin_unlock(&session->lock); 1434 spin_unlock(&session->lock);
1401 debug_scsi("cmd 0x%x rejected (%d)\n", sc->cmnd[0], reason); 1435 ISCSI_DBG_SESSION(session, "cmd 0x%x rejected (%d)\n",
1436 sc->cmnd[0], reason);
1402 spin_lock(host->host_lock); 1437 spin_lock(host->host_lock);
1403 return SCSI_MLQUEUE_TARGET_BUSY; 1438 return SCSI_MLQUEUE_TARGET_BUSY;
1404 1439
@@ -1407,7 +1442,8 @@ prepd_fault:
1407 iscsi_complete_command(task); 1442 iscsi_complete_command(task);
1408fault: 1443fault:
1409 spin_unlock(&session->lock); 1444 spin_unlock(&session->lock);
1410 debug_scsi("iscsi: cmd 0x%x is not queued (%d)\n", sc->cmnd[0], reason); 1445 ISCSI_DBG_SESSION(session, "iscsi: cmd 0x%x is not queued (%d)\n",
1446 sc->cmnd[0], reason);
1411 if (!scsi_bidi_cmnd(sc)) 1447 if (!scsi_bidi_cmnd(sc))
1412 scsi_set_resid(sc, scsi_bufflen(sc)); 1448 scsi_set_resid(sc, scsi_bufflen(sc));
1413 else { 1449 else {
@@ -1422,8 +1458,6 @@ EXPORT_SYMBOL_GPL(iscsi_queuecommand);
1422 1458
1423int iscsi_change_queue_depth(struct scsi_device *sdev, int depth) 1459int iscsi_change_queue_depth(struct scsi_device *sdev, int depth)
1424{ 1460{
1425 if (depth > ISCSI_MAX_CMD_PER_LUN)
1426 depth = ISCSI_MAX_CMD_PER_LUN;
1427 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), depth); 1461 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), depth);
1428 return sdev->queue_depth; 1462 return sdev->queue_depth;
1429} 1463}
@@ -1457,8 +1491,10 @@ int iscsi_eh_target_reset(struct scsi_cmnd *sc)
1457 spin_lock_bh(&session->lock); 1491 spin_lock_bh(&session->lock);
1458 if (session->state == ISCSI_STATE_TERMINATE) { 1492 if (session->state == ISCSI_STATE_TERMINATE) {
1459failed: 1493failed:
1460 debug_scsi("failing target reset: session terminated " 1494 iscsi_session_printk(KERN_INFO, session,
1461 "[CID %d age %d]\n", conn->id, session->age); 1495 "failing target reset: Could not log "
1496 "back into target [age %d]\n",
1497 session->age);
1462 spin_unlock_bh(&session->lock); 1498 spin_unlock_bh(&session->lock);
1463 mutex_unlock(&session->eh_mutex); 1499 mutex_unlock(&session->eh_mutex);
1464 return FAILED; 1500 return FAILED;
@@ -1472,7 +1508,7 @@ failed:
1472 */ 1508 */
1473 iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED); 1509 iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED);
1474 1510
1475 debug_scsi("iscsi_eh_target_reset wait for relogin\n"); 1511 ISCSI_DBG_SESSION(session, "wait for relogin\n");
1476 wait_event_interruptible(conn->ehwait, 1512 wait_event_interruptible(conn->ehwait,
1477 session->state == ISCSI_STATE_TERMINATE || 1513 session->state == ISCSI_STATE_TERMINATE ||
1478 session->state == ISCSI_STATE_LOGGED_IN || 1514 session->state == ISCSI_STATE_LOGGED_IN ||
@@ -1501,7 +1537,7 @@ static void iscsi_tmf_timedout(unsigned long data)
1501 spin_lock(&session->lock); 1537 spin_lock(&session->lock);
1502 if (conn->tmf_state == TMF_QUEUED) { 1538 if (conn->tmf_state == TMF_QUEUED) {
1503 conn->tmf_state = TMF_TIMEDOUT; 1539 conn->tmf_state = TMF_TIMEDOUT;
1504 debug_scsi("tmf timedout\n"); 1540 ISCSI_DBG_SESSION(session, "tmf timedout\n");
1505 /* unblock eh_abort() */ 1541 /* unblock eh_abort() */
1506 wake_up(&conn->ehwait); 1542 wake_up(&conn->ehwait);
1507 } 1543 }
@@ -1521,7 +1557,7 @@ static int iscsi_exec_task_mgmt_fn(struct iscsi_conn *conn,
1521 spin_unlock_bh(&session->lock); 1557 spin_unlock_bh(&session->lock);
1522 iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED); 1558 iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED);
1523 spin_lock_bh(&session->lock); 1559 spin_lock_bh(&session->lock);
1524 debug_scsi("tmf exec failure\n"); 1560 ISCSI_DBG_SESSION(session, "tmf exec failure\n");
1525 return -EPERM; 1561 return -EPERM;
1526 } 1562 }
1527 conn->tmfcmd_pdus_cnt++; 1563 conn->tmfcmd_pdus_cnt++;
@@ -1529,7 +1565,7 @@ static int iscsi_exec_task_mgmt_fn(struct iscsi_conn *conn,
1529 conn->tmf_timer.function = iscsi_tmf_timedout; 1565 conn->tmf_timer.function = iscsi_tmf_timedout;
1530 conn->tmf_timer.data = (unsigned long)conn; 1566 conn->tmf_timer.data = (unsigned long)conn;
1531 add_timer(&conn->tmf_timer); 1567 add_timer(&conn->tmf_timer);
1532 debug_scsi("tmf set timeout\n"); 1568 ISCSI_DBG_SESSION(session, "tmf set timeout\n");
1533 1569
1534 spin_unlock_bh(&session->lock); 1570 spin_unlock_bh(&session->lock);
1535 mutex_unlock(&session->eh_mutex); 1571 mutex_unlock(&session->eh_mutex);
@@ -1567,22 +1603,27 @@ static void fail_all_commands(struct iscsi_conn *conn, unsigned lun,
1567{ 1603{
1568 struct iscsi_task *task, *tmp; 1604 struct iscsi_task *task, *tmp;
1569 1605
1570 if (conn->task && (conn->task->sc->device->lun == lun || lun == -1)) 1606 if (conn->task) {
1571 conn->task = NULL; 1607 if (lun == -1 ||
1608 (conn->task->sc && conn->task->sc->device->lun == lun))
1609 conn->task = NULL;
1610 }
1572 1611
1573 /* flush pending */ 1612 /* flush pending */
1574 list_for_each_entry_safe(task, tmp, &conn->xmitqueue, running) { 1613 list_for_each_entry_safe(task, tmp, &conn->xmitqueue, running) {
1575 if (lun == task->sc->device->lun || lun == -1) { 1614 if (lun == task->sc->device->lun || lun == -1) {
1576 debug_scsi("failing pending sc %p itt 0x%x\n", 1615 ISCSI_DBG_SESSION(conn->session,
1577 task->sc, task->itt); 1616 "failing pending sc %p itt 0x%x\n",
1617 task->sc, task->itt);
1578 fail_command(conn, task, error << 16); 1618 fail_command(conn, task, error << 16);
1579 } 1619 }
1580 } 1620 }
1581 1621
1582 list_for_each_entry_safe(task, tmp, &conn->requeue, running) { 1622 list_for_each_entry_safe(task, tmp, &conn->requeue, running) {
1583 if (lun == task->sc->device->lun || lun == -1) { 1623 if (lun == task->sc->device->lun || lun == -1) {
1584 debug_scsi("failing requeued sc %p itt 0x%x\n", 1624 ISCSI_DBG_SESSION(conn->session,
1585 task->sc, task->itt); 1625 "failing requeued sc %p itt 0x%x\n",
1626 task->sc, task->itt);
1586 fail_command(conn, task, error << 16); 1627 fail_command(conn, task, error << 16);
1587 } 1628 }
1588 } 1629 }
@@ -1590,8 +1631,9 @@ static void fail_all_commands(struct iscsi_conn *conn, unsigned lun,
1590 /* fail all other running */ 1631 /* fail all other running */
1591 list_for_each_entry_safe(task, tmp, &conn->run_list, running) { 1632 list_for_each_entry_safe(task, tmp, &conn->run_list, running) {
1592 if (lun == task->sc->device->lun || lun == -1) { 1633 if (lun == task->sc->device->lun || lun == -1) {
1593 debug_scsi("failing in progress sc %p itt 0x%x\n", 1634 ISCSI_DBG_SESSION(conn->session,
1594 task->sc, task->itt); 1635 "failing in progress sc %p itt 0x%x\n",
1636 task->sc, task->itt);
1595 fail_command(conn, task, error << 16); 1637 fail_command(conn, task, error << 16);
1596 } 1638 }
1597 } 1639 }
@@ -1599,9 +1641,12 @@ static void fail_all_commands(struct iscsi_conn *conn, unsigned lun,
1599 1641
1600void iscsi_suspend_tx(struct iscsi_conn *conn) 1642void iscsi_suspend_tx(struct iscsi_conn *conn)
1601{ 1643{
1644 struct Scsi_Host *shost = conn->session->host;
1645 struct iscsi_host *ihost = shost_priv(shost);
1646
1602 set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx); 1647 set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx);
1603 if (!(conn->session->tt->caps & CAP_DATA_PATH_OFFLOAD)) 1648 if (!(conn->session->tt->caps & CAP_DATA_PATH_OFFLOAD))
1604 scsi_flush_work(conn->session->host); 1649 flush_workqueue(ihost->workq);
1605} 1650}
1606EXPORT_SYMBOL_GPL(iscsi_suspend_tx); 1651EXPORT_SYMBOL_GPL(iscsi_suspend_tx);
1607 1652
@@ -1609,7 +1654,7 @@ static void iscsi_start_tx(struct iscsi_conn *conn)
1609{ 1654{
1610 clear_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx); 1655 clear_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx);
1611 if (!(conn->session->tt->caps & CAP_DATA_PATH_OFFLOAD)) 1656 if (!(conn->session->tt->caps & CAP_DATA_PATH_OFFLOAD))
1612 scsi_queue_work(conn->session->host, &conn->xmitwork); 1657 iscsi_conn_queue_work(conn);
1613} 1658}
1614 1659
1615static enum blk_eh_timer_return iscsi_eh_cmd_timed_out(struct scsi_cmnd *scmd) 1660static enum blk_eh_timer_return iscsi_eh_cmd_timed_out(struct scsi_cmnd *scmd)
@@ -1622,7 +1667,7 @@ static enum blk_eh_timer_return iscsi_eh_cmd_timed_out(struct scsi_cmnd *scmd)
1622 cls_session = starget_to_session(scsi_target(scmd->device)); 1667 cls_session = starget_to_session(scsi_target(scmd->device));
1623 session = cls_session->dd_data; 1668 session = cls_session->dd_data;
1624 1669
1625 debug_scsi("scsi cmd %p timedout\n", scmd); 1670 ISCSI_DBG_SESSION(session, "scsi cmd %p timedout\n", scmd);
1626 1671
1627 spin_lock(&session->lock); 1672 spin_lock(&session->lock);
1628 if (session->state != ISCSI_STATE_LOGGED_IN) { 1673 if (session->state != ISCSI_STATE_LOGGED_IN) {
@@ -1662,8 +1707,8 @@ static enum blk_eh_timer_return iscsi_eh_cmd_timed_out(struct scsi_cmnd *scmd)
1662 rc = BLK_EH_RESET_TIMER; 1707 rc = BLK_EH_RESET_TIMER;
1663done: 1708done:
1664 spin_unlock(&session->lock); 1709 spin_unlock(&session->lock);
1665 debug_scsi("return %s\n", rc == BLK_EH_RESET_TIMER ? 1710 ISCSI_DBG_SESSION(session, "return %s\n", rc == BLK_EH_RESET_TIMER ?
1666 "timer reset" : "nh"); 1711 "timer reset" : "nh");
1667 return rc; 1712 return rc;
1668} 1713}
1669 1714
@@ -1697,13 +1742,13 @@ static void iscsi_check_transport_timeouts(unsigned long data)
1697 1742
1698 if (time_before_eq(last_recv + recv_timeout, jiffies)) { 1743 if (time_before_eq(last_recv + recv_timeout, jiffies)) {
1699 /* send a ping to try to provoke some traffic */ 1744 /* send a ping to try to provoke some traffic */
1700 debug_scsi("Sending nopout as ping on conn %p\n", conn); 1745 ISCSI_DBG_CONN(conn, "Sending nopout as ping\n");
1701 iscsi_send_nopout(conn, NULL); 1746 iscsi_send_nopout(conn, NULL);
1702 next_timeout = conn->last_ping + (conn->ping_timeout * HZ); 1747 next_timeout = conn->last_ping + (conn->ping_timeout * HZ);
1703 } else 1748 } else
1704 next_timeout = last_recv + recv_timeout; 1749 next_timeout = last_recv + recv_timeout;
1705 1750
1706 debug_scsi("Setting next tmo %lu\n", next_timeout); 1751 ISCSI_DBG_CONN(conn, "Setting next tmo %lu\n", next_timeout);
1707 mod_timer(&conn->transport_timer, next_timeout); 1752 mod_timer(&conn->transport_timer, next_timeout);
1708done: 1753done:
1709 spin_unlock(&session->lock); 1754 spin_unlock(&session->lock);
@@ -1740,7 +1785,8 @@ int iscsi_eh_abort(struct scsi_cmnd *sc)
1740 * got the command. 1785 * got the command.
1741 */ 1786 */
1742 if (!sc->SCp.ptr) { 1787 if (!sc->SCp.ptr) {
1743 debug_scsi("sc never reached iscsi layer or it completed.\n"); 1788 ISCSI_DBG_SESSION(session, "sc never reached iscsi layer or "
1789 "it completed.\n");
1744 spin_unlock_bh(&session->lock); 1790 spin_unlock_bh(&session->lock);
1745 mutex_unlock(&session->eh_mutex); 1791 mutex_unlock(&session->eh_mutex);
1746 return SUCCESS; 1792 return SUCCESS;
@@ -1762,11 +1808,13 @@ int iscsi_eh_abort(struct scsi_cmnd *sc)
1762 age = session->age; 1808 age = session->age;
1763 1809
1764 task = (struct iscsi_task *)sc->SCp.ptr; 1810 task = (struct iscsi_task *)sc->SCp.ptr;
1765 debug_scsi("aborting [sc %p itt 0x%x]\n", sc, task->itt); 1811 ISCSI_DBG_SESSION(session, "aborting [sc %p itt 0x%x]\n",
1812 sc, task->itt);
1766 1813
1767 /* task completed before time out */ 1814 /* task completed before time out */
1768 if (!task->sc) { 1815 if (!task->sc) {
1769 debug_scsi("sc completed while abort in progress\n"); 1816 ISCSI_DBG_SESSION(session, "sc completed while abort in "
1817 "progress\n");
1770 goto success; 1818 goto success;
1771 } 1819 }
1772 1820
@@ -1815,7 +1863,8 @@ int iscsi_eh_abort(struct scsi_cmnd *sc)
1815 if (!sc->SCp.ptr) { 1863 if (!sc->SCp.ptr) {
1816 conn->tmf_state = TMF_INITIAL; 1864 conn->tmf_state = TMF_INITIAL;
1817 /* task completed before tmf abort response */ 1865 /* task completed before tmf abort response */
1818 debug_scsi("sc completed while abort in progress\n"); 1866 ISCSI_DBG_SESSION(session, "sc completed while abort "
1867 "in progress\n");
1819 goto success; 1868 goto success;
1820 } 1869 }
1821 /* fall through */ 1870 /* fall through */
@@ -1827,15 +1876,16 @@ int iscsi_eh_abort(struct scsi_cmnd *sc)
1827success: 1876success:
1828 spin_unlock_bh(&session->lock); 1877 spin_unlock_bh(&session->lock);
1829success_unlocked: 1878success_unlocked:
1830 debug_scsi("abort success [sc %lx itt 0x%x]\n", (long)sc, task->itt); 1879 ISCSI_DBG_SESSION(session, "abort success [sc %p itt 0x%x]\n",
1880 sc, task->itt);
1831 mutex_unlock(&session->eh_mutex); 1881 mutex_unlock(&session->eh_mutex);
1832 return SUCCESS; 1882 return SUCCESS;
1833 1883
1834failed: 1884failed:
1835 spin_unlock_bh(&session->lock); 1885 spin_unlock_bh(&session->lock);
1836failed_unlocked: 1886failed_unlocked:
1837 debug_scsi("abort failed [sc %p itt 0x%x]\n", sc, 1887 ISCSI_DBG_SESSION(session, "abort failed [sc %p itt 0x%x]\n", sc,
1838 task ? task->itt : 0); 1888 task ? task->itt : 0);
1839 mutex_unlock(&session->eh_mutex); 1889 mutex_unlock(&session->eh_mutex);
1840 return FAILED; 1890 return FAILED;
1841} 1891}
@@ -1862,7 +1912,8 @@ int iscsi_eh_device_reset(struct scsi_cmnd *sc)
1862 cls_session = starget_to_session(scsi_target(sc->device)); 1912 cls_session = starget_to_session(scsi_target(sc->device));
1863 session = cls_session->dd_data; 1913 session = cls_session->dd_data;
1864 1914
1865 debug_scsi("LU Reset [sc %p lun %u]\n", sc, sc->device->lun); 1915 ISCSI_DBG_SESSION(session, "LU Reset [sc %p lun %u]\n",
1916 sc, sc->device->lun);
1866 1917
1867 mutex_lock(&session->eh_mutex); 1918 mutex_lock(&session->eh_mutex);
1868 spin_lock_bh(&session->lock); 1919 spin_lock_bh(&session->lock);
@@ -1916,8 +1967,8 @@ int iscsi_eh_device_reset(struct scsi_cmnd *sc)
1916unlock: 1967unlock:
1917 spin_unlock_bh(&session->lock); 1968 spin_unlock_bh(&session->lock);
1918done: 1969done:
1919 debug_scsi("iscsi_eh_device_reset %s\n", 1970 ISCSI_DBG_SESSION(session, "dev reset result = %s\n",
1920 rc == SUCCESS ? "SUCCESS" : "FAILED"); 1971 rc == SUCCESS ? "SUCCESS" : "FAILED");
1921 mutex_unlock(&session->eh_mutex); 1972 mutex_unlock(&session->eh_mutex);
1922 return rc; 1973 return rc;
1923} 1974}
@@ -1944,7 +1995,7 @@ iscsi_pool_init(struct iscsi_pool *q, int max, void ***items, int item_size)
1944 num_arrays++; 1995 num_arrays++;
1945 q->pool = kzalloc(num_arrays * max * sizeof(void*), GFP_KERNEL); 1996 q->pool = kzalloc(num_arrays * max * sizeof(void*), GFP_KERNEL);
1946 if (q->pool == NULL) 1997 if (q->pool == NULL)
1947 goto enomem; 1998 return -ENOMEM;
1948 1999
1949 q->queue = kfifo_init((void*)q->pool, max * sizeof(void*), 2000 q->queue = kfifo_init((void*)q->pool, max * sizeof(void*),
1950 GFP_KERNEL, NULL); 2001 GFP_KERNEL, NULL);
@@ -1979,8 +2030,7 @@ void iscsi_pool_free(struct iscsi_pool *q)
1979 2030
1980 for (i = 0; i < q->max; i++) 2031 for (i = 0; i < q->max; i++)
1981 kfree(q->pool[i]); 2032 kfree(q->pool[i]);
1982 if (q->pool) 2033 kfree(q->pool);
1983 kfree(q->pool);
1984 kfree(q->queue); 2034 kfree(q->queue);
1985} 2035}
1986EXPORT_SYMBOL_GPL(iscsi_pool_free); 2036EXPORT_SYMBOL_GPL(iscsi_pool_free);
@@ -1998,6 +2048,9 @@ int iscsi_host_add(struct Scsi_Host *shost, struct device *pdev)
1998 if (!shost->can_queue) 2048 if (!shost->can_queue)
1999 shost->can_queue = ISCSI_DEF_XMIT_CMDS_MAX; 2049 shost->can_queue = ISCSI_DEF_XMIT_CMDS_MAX;
2000 2050
2051 if (!shost->cmd_per_lun)
2052 shost->cmd_per_lun = ISCSI_DEF_CMD_PER_LUN;
2053
2001 if (!shost->transportt->eh_timed_out) 2054 if (!shost->transportt->eh_timed_out)
2002 shost->transportt->eh_timed_out = iscsi_eh_cmd_timed_out; 2055 shost->transportt->eh_timed_out = iscsi_eh_cmd_timed_out;
2003 return scsi_add_host(shost, pdev); 2056 return scsi_add_host(shost, pdev);
@@ -2008,13 +2061,13 @@ EXPORT_SYMBOL_GPL(iscsi_host_add);
2008 * iscsi_host_alloc - allocate a host and driver data 2061 * iscsi_host_alloc - allocate a host and driver data
2009 * @sht: scsi host template 2062 * @sht: scsi host template
2010 * @dd_data_size: driver host data size 2063 * @dd_data_size: driver host data size
2011 * @qdepth: default device queue depth 2064 * @xmit_can_sleep: bool indicating if LLD will queue IO from a work queue
2012 * 2065 *
2013 * This should be called by partial offload and software iscsi drivers. 2066 * This should be called by partial offload and software iscsi drivers.
2014 * To access the driver specific memory use the iscsi_host_priv() macro. 2067 * To access the driver specific memory use the iscsi_host_priv() macro.
2015 */ 2068 */
2016struct Scsi_Host *iscsi_host_alloc(struct scsi_host_template *sht, 2069struct Scsi_Host *iscsi_host_alloc(struct scsi_host_template *sht,
2017 int dd_data_size, uint16_t qdepth) 2070 int dd_data_size, bool xmit_can_sleep)
2018{ 2071{
2019 struct Scsi_Host *shost; 2072 struct Scsi_Host *shost;
2020 struct iscsi_host *ihost; 2073 struct iscsi_host *ihost;
@@ -2022,28 +2075,31 @@ struct Scsi_Host *iscsi_host_alloc(struct scsi_host_template *sht,
2022 shost = scsi_host_alloc(sht, sizeof(struct iscsi_host) + dd_data_size); 2075 shost = scsi_host_alloc(sht, sizeof(struct iscsi_host) + dd_data_size);
2023 if (!shost) 2076 if (!shost)
2024 return NULL; 2077 return NULL;
2078 ihost = shost_priv(shost);
2025 2079
2026 if (qdepth > ISCSI_MAX_CMD_PER_LUN || qdepth < 1) { 2080 if (xmit_can_sleep) {
2027 if (qdepth != 0) 2081 snprintf(ihost->workq_name, sizeof(ihost->workq_name),
2028 printk(KERN_ERR "iscsi: invalid queue depth of %d. " 2082 "iscsi_q_%d", shost->host_no);
2029 "Queue depth must be between 1 and %d.\n", 2083 ihost->workq = create_singlethread_workqueue(ihost->workq_name);
2030 qdepth, ISCSI_MAX_CMD_PER_LUN); 2084 if (!ihost->workq)
2031 qdepth = ISCSI_DEF_CMD_PER_LUN; 2085 goto free_host;
2032 } 2086 }
2033 shost->cmd_per_lun = qdepth;
2034 2087
2035 ihost = shost_priv(shost);
2036 spin_lock_init(&ihost->lock); 2088 spin_lock_init(&ihost->lock);
2037 ihost->state = ISCSI_HOST_SETUP; 2089 ihost->state = ISCSI_HOST_SETUP;
2038 ihost->num_sessions = 0; 2090 ihost->num_sessions = 0;
2039 init_waitqueue_head(&ihost->session_removal_wq); 2091 init_waitqueue_head(&ihost->session_removal_wq);
2040 return shost; 2092 return shost;
2093
2094free_host:
2095 scsi_host_put(shost);
2096 return NULL;
2041} 2097}
2042EXPORT_SYMBOL_GPL(iscsi_host_alloc); 2098EXPORT_SYMBOL_GPL(iscsi_host_alloc);
2043 2099
2044static void iscsi_notify_host_removed(struct iscsi_cls_session *cls_session) 2100static void iscsi_notify_host_removed(struct iscsi_cls_session *cls_session)
2045{ 2101{
2046 iscsi_session_failure(cls_session, ISCSI_ERR_INVALID_HOST); 2102 iscsi_session_failure(cls_session->dd_data, ISCSI_ERR_INVALID_HOST);
2047} 2103}
2048 2104
2049/** 2105/**
@@ -2069,6 +2125,8 @@ void iscsi_host_remove(struct Scsi_Host *shost)
2069 flush_signals(current); 2125 flush_signals(current);
2070 2126
2071 scsi_remove_host(shost); 2127 scsi_remove_host(shost);
2128 if (ihost->workq)
2129 destroy_workqueue(ihost->workq);
2072} 2130}
2073EXPORT_SYMBOL_GPL(iscsi_host_remove); 2131EXPORT_SYMBOL_GPL(iscsi_host_remove);
2074 2132
@@ -2467,14 +2525,16 @@ flush_control_queues(struct iscsi_session *session, struct iscsi_conn *conn)
2467 2525
2468 /* handle pending */ 2526 /* handle pending */
2469 list_for_each_entry_safe(task, tmp, &conn->mgmtqueue, running) { 2527 list_for_each_entry_safe(task, tmp, &conn->mgmtqueue, running) {
2470 debug_scsi("flushing pending mgmt task itt 0x%x\n", task->itt); 2528 ISCSI_DBG_SESSION(session, "flushing pending mgmt task "
2529 "itt 0x%x\n", task->itt);
2471 /* release ref from prep task */ 2530 /* release ref from prep task */
2472 __iscsi_put_task(task); 2531 __iscsi_put_task(task);
2473 } 2532 }
2474 2533
2475 /* handle running */ 2534 /* handle running */
2476 list_for_each_entry_safe(task, tmp, &conn->mgmt_run_list, running) { 2535 list_for_each_entry_safe(task, tmp, &conn->mgmt_run_list, running) {
2477 debug_scsi("flushing running mgmt task itt 0x%x\n", task->itt); 2536 ISCSI_DBG_SESSION(session, "flushing running mgmt task "
2537 "itt 0x%x\n", task->itt);
2478 /* release ref from prep task */ 2538 /* release ref from prep task */
2479 __iscsi_put_task(task); 2539 __iscsi_put_task(task);
2480 } 2540 }
@@ -2524,7 +2584,7 @@ static void iscsi_start_session_recovery(struct iscsi_session *session,
2524 conn->datadgst_en = 0; 2584 conn->datadgst_en = 0;
2525 if (session->state == ISCSI_STATE_IN_RECOVERY && 2585 if (session->state == ISCSI_STATE_IN_RECOVERY &&
2526 old_stop_stage != STOP_CONN_RECOVER) { 2586 old_stop_stage != STOP_CONN_RECOVER) {
2527 debug_scsi("blocking session\n"); 2587 ISCSI_DBG_SESSION(session, "blocking session\n");
2528 iscsi_block_session(session->cls_session); 2588 iscsi_block_session(session->cls_session);
2529 } 2589 }
2530 } 2590 }
diff --git a/drivers/scsi/libiscsi_tcp.c b/drivers/scsi/libiscsi_tcp.c
index e7705d3532c9..91f8ce4d8d08 100644
--- a/drivers/scsi/libiscsi_tcp.c
+++ b/drivers/scsi/libiscsi_tcp.c
@@ -49,13 +49,21 @@ MODULE_AUTHOR("Mike Christie <michaelc@cs.wisc.edu>, "
49 "Alex Aizman <itn780@yahoo.com>"); 49 "Alex Aizman <itn780@yahoo.com>");
50MODULE_DESCRIPTION("iSCSI/TCP data-path"); 50MODULE_DESCRIPTION("iSCSI/TCP data-path");
51MODULE_LICENSE("GPL"); 51MODULE_LICENSE("GPL");
52#undef DEBUG_TCP
53 52
54#ifdef DEBUG_TCP 53static int iscsi_dbg_libtcp;
55#define debug_tcp(fmt...) printk(KERN_INFO "tcp: " fmt) 54module_param_named(debug_libiscsi_tcp, iscsi_dbg_libtcp, int,
56#else 55 S_IRUGO | S_IWUSR);
57#define debug_tcp(fmt...) 56MODULE_PARM_DESC(debug_libiscsi_tcp, "Turn on debugging for libiscsi_tcp "
58#endif 57 "module. Set to 1 to turn on, and zero to turn off. Default "
58 "is off.");
59
60#define ISCSI_DBG_TCP(_conn, dbg_fmt, arg...) \
61 do { \
62 if (iscsi_dbg_libtcp) \
63 iscsi_conn_printk(KERN_INFO, _conn, \
64 "%s " dbg_fmt, \
65 __func__, ##arg); \
66 } while (0);
59 67
60static int iscsi_tcp_hdr_recv_done(struct iscsi_tcp_conn *tcp_conn, 68static int iscsi_tcp_hdr_recv_done(struct iscsi_tcp_conn *tcp_conn,
61 struct iscsi_segment *segment); 69 struct iscsi_segment *segment);
@@ -123,18 +131,13 @@ static void iscsi_tcp_segment_map(struct iscsi_segment *segment, int recv)
123 if (page_count(sg_page(sg)) >= 1 && !recv) 131 if (page_count(sg_page(sg)) >= 1 && !recv)
124 return; 132 return;
125 133
126 debug_tcp("iscsi_tcp_segment_map %s %p\n", recv ? "recv" : "xmit",
127 segment);
128 segment->sg_mapped = kmap_atomic(sg_page(sg), KM_SOFTIRQ0); 134 segment->sg_mapped = kmap_atomic(sg_page(sg), KM_SOFTIRQ0);
129 segment->data = segment->sg_mapped + sg->offset + segment->sg_offset; 135 segment->data = segment->sg_mapped + sg->offset + segment->sg_offset;
130} 136}
131 137
132void iscsi_tcp_segment_unmap(struct iscsi_segment *segment) 138void iscsi_tcp_segment_unmap(struct iscsi_segment *segment)
133{ 139{
134 debug_tcp("iscsi_tcp_segment_unmap %p\n", segment);
135
136 if (segment->sg_mapped) { 140 if (segment->sg_mapped) {
137 debug_tcp("iscsi_tcp_segment_unmap valid\n");
138 kunmap_atomic(segment->sg_mapped, KM_SOFTIRQ0); 141 kunmap_atomic(segment->sg_mapped, KM_SOFTIRQ0);
139 segment->sg_mapped = NULL; 142 segment->sg_mapped = NULL;
140 segment->data = NULL; 143 segment->data = NULL;
@@ -180,8 +183,9 @@ int iscsi_tcp_segment_done(struct iscsi_tcp_conn *tcp_conn,
180 struct scatterlist sg; 183 struct scatterlist sg;
181 unsigned int pad; 184 unsigned int pad;
182 185
183 debug_tcp("copied %u %u size %u %s\n", segment->copied, copied, 186 ISCSI_DBG_TCP(tcp_conn->iscsi_conn, "copied %u %u size %u %s\n",
184 segment->size, recv ? "recv" : "xmit"); 187 segment->copied, copied, segment->size,
188 recv ? "recv" : "xmit");
185 if (segment->hash && copied) { 189 if (segment->hash && copied) {
186 /* 190 /*
187 * If a segment is kmapd we must unmap it before sending 191 * If a segment is kmapd we must unmap it before sending
@@ -214,8 +218,8 @@ int iscsi_tcp_segment_done(struct iscsi_tcp_conn *tcp_conn,
214 iscsi_tcp_segment_unmap(segment); 218 iscsi_tcp_segment_unmap(segment);
215 219
216 /* Do we have more scatterlist entries? */ 220 /* Do we have more scatterlist entries? */
217 debug_tcp("total copied %u total size %u\n", segment->total_copied, 221 ISCSI_DBG_TCP(tcp_conn->iscsi_conn, "total copied %u total size %u\n",
218 segment->total_size); 222 segment->total_copied, segment->total_size);
219 if (segment->total_copied < segment->total_size) { 223 if (segment->total_copied < segment->total_size) {
220 /* Proceed to the next entry in the scatterlist. */ 224 /* Proceed to the next entry in the scatterlist. */
221 iscsi_tcp_segment_init_sg(segment, sg_next(segment->sg), 225 iscsi_tcp_segment_init_sg(segment, sg_next(segment->sg),
@@ -229,7 +233,8 @@ int iscsi_tcp_segment_done(struct iscsi_tcp_conn *tcp_conn,
229 if (!(tcp_conn->iscsi_conn->session->tt->caps & CAP_PADDING_OFFLOAD)) { 233 if (!(tcp_conn->iscsi_conn->session->tt->caps & CAP_PADDING_OFFLOAD)) {
230 pad = iscsi_padding(segment->total_copied); 234 pad = iscsi_padding(segment->total_copied);
231 if (pad != 0) { 235 if (pad != 0) {
232 debug_tcp("consume %d pad bytes\n", pad); 236 ISCSI_DBG_TCP(tcp_conn->iscsi_conn,
237 "consume %d pad bytes\n", pad);
233 segment->total_size += pad; 238 segment->total_size += pad;
234 segment->size = pad; 239 segment->size = pad;
235 segment->data = segment->padbuf; 240 segment->data = segment->padbuf;
@@ -278,13 +283,13 @@ iscsi_tcp_segment_recv(struct iscsi_tcp_conn *tcp_conn,
278 283
279 while (!iscsi_tcp_segment_done(tcp_conn, segment, 1, copy)) { 284 while (!iscsi_tcp_segment_done(tcp_conn, segment, 1, copy)) {
280 if (copied == len) { 285 if (copied == len) {
281 debug_tcp("iscsi_tcp_segment_recv copied %d bytes\n", 286 ISCSI_DBG_TCP(tcp_conn->iscsi_conn,
282 len); 287 "copied %d bytes\n", len);
283 break; 288 break;
284 } 289 }
285 290
286 copy = min(len - copied, segment->size - segment->copied); 291 copy = min(len - copied, segment->size - segment->copied);
287 debug_tcp("iscsi_tcp_segment_recv copying %d\n", copy); 292 ISCSI_DBG_TCP(tcp_conn->iscsi_conn, "copying %d\n", copy);
288 memcpy(segment->data + segment->copied, ptr + copied, copy); 293 memcpy(segment->data + segment->copied, ptr + copied, copy);
289 copied += copy; 294 copied += copy;
290 } 295 }
@@ -311,7 +316,7 @@ iscsi_tcp_dgst_verify(struct iscsi_tcp_conn *tcp_conn,
311 316
312 if (memcmp(segment->recv_digest, segment->digest, 317 if (memcmp(segment->recv_digest, segment->digest,
313 segment->digest_len)) { 318 segment->digest_len)) {
314 debug_scsi("digest mismatch\n"); 319 ISCSI_DBG_TCP(tcp_conn->iscsi_conn, "digest mismatch\n");
315 return 0; 320 return 0;
316 } 321 }
317 322
@@ -355,12 +360,8 @@ iscsi_segment_seek_sg(struct iscsi_segment *segment,
355 struct scatterlist *sg; 360 struct scatterlist *sg;
356 unsigned int i; 361 unsigned int i;
357 362
358 debug_scsi("iscsi_segment_seek_sg offset %u size %llu\n",
359 offset, size);
360 __iscsi_segment_init(segment, size, done, hash); 363 __iscsi_segment_init(segment, size, done, hash);
361 for_each_sg(sg_list, sg, sg_count, i) { 364 for_each_sg(sg_list, sg, sg_count, i) {
362 debug_scsi("sg %d, len %u offset %u\n", i, sg->length,
363 sg->offset);
364 if (offset < sg->length) { 365 if (offset < sg->length) {
365 iscsi_tcp_segment_init_sg(segment, sg, offset); 366 iscsi_tcp_segment_init_sg(segment, sg, offset);
366 return 0; 367 return 0;
@@ -382,8 +383,9 @@ EXPORT_SYMBOL_GPL(iscsi_segment_seek_sg);
382 */ 383 */
383void iscsi_tcp_hdr_recv_prep(struct iscsi_tcp_conn *tcp_conn) 384void iscsi_tcp_hdr_recv_prep(struct iscsi_tcp_conn *tcp_conn)
384{ 385{
385 debug_tcp("iscsi_tcp_hdr_recv_prep(%p%s)\n", tcp_conn, 386 ISCSI_DBG_TCP(tcp_conn->iscsi_conn,
386 tcp_conn->iscsi_conn->hdrdgst_en ? ", digest enabled" : ""); 387 "(%s)\n", tcp_conn->iscsi_conn->hdrdgst_en ?
388 "digest enabled" : "digest disabled");
387 iscsi_segment_init_linear(&tcp_conn->in.segment, 389 iscsi_segment_init_linear(&tcp_conn->in.segment,
388 tcp_conn->in.hdr_buf, sizeof(struct iscsi_hdr), 390 tcp_conn->in.hdr_buf, sizeof(struct iscsi_hdr),
389 iscsi_tcp_hdr_recv_done, NULL); 391 iscsi_tcp_hdr_recv_done, NULL);
@@ -446,7 +448,7 @@ void iscsi_tcp_cleanup_task(struct iscsi_task *task)
446 while (__kfifo_get(tcp_task->r2tqueue, (void*)&r2t, sizeof(void*))) { 448 while (__kfifo_get(tcp_task->r2tqueue, (void*)&r2t, sizeof(void*))) {
447 __kfifo_put(tcp_task->r2tpool.queue, (void*)&r2t, 449 __kfifo_put(tcp_task->r2tpool.queue, (void*)&r2t,
448 sizeof(void*)); 450 sizeof(void*));
449 debug_scsi("iscsi_tcp_cleanup_task pending r2t dropped\n"); 451 ISCSI_DBG_TCP(task->conn, "pending r2t dropped\n");
450 } 452 }
451 453
452 r2t = tcp_task->r2t; 454 r2t = tcp_task->r2t;
@@ -476,8 +478,8 @@ static int iscsi_tcp_data_in(struct iscsi_conn *conn, struct iscsi_task *task)
476 return 0; 478 return 0;
477 479
478 if (tcp_task->exp_datasn != datasn) { 480 if (tcp_task->exp_datasn != datasn) {
479 debug_tcp("%s: task->exp_datasn(%d) != rhdr->datasn(%d)\n", 481 ISCSI_DBG_TCP(conn, "task->exp_datasn(%d) != rhdr->datasn(%d)"
480 __func__, tcp_task->exp_datasn, datasn); 482 "\n", tcp_task->exp_datasn, datasn);
481 return ISCSI_ERR_DATASN; 483 return ISCSI_ERR_DATASN;
482 } 484 }
483 485
@@ -485,9 +487,9 @@ static int iscsi_tcp_data_in(struct iscsi_conn *conn, struct iscsi_task *task)
485 487
486 tcp_task->data_offset = be32_to_cpu(rhdr->offset); 488 tcp_task->data_offset = be32_to_cpu(rhdr->offset);
487 if (tcp_task->data_offset + tcp_conn->in.datalen > total_in_length) { 489 if (tcp_task->data_offset + tcp_conn->in.datalen > total_in_length) {
488 debug_tcp("%s: data_offset(%d) + data_len(%d) > total_length_in(%d)\n", 490 ISCSI_DBG_TCP(conn, "data_offset(%d) + data_len(%d) > "
489 __func__, tcp_task->data_offset, 491 "total_length_in(%d)\n", tcp_task->data_offset,
490 tcp_conn->in.datalen, total_in_length); 492 tcp_conn->in.datalen, total_in_length);
491 return ISCSI_ERR_DATA_OFFSET; 493 return ISCSI_ERR_DATA_OFFSET;
492 } 494 }
493 495
@@ -518,8 +520,8 @@ static int iscsi_tcp_r2t_rsp(struct iscsi_conn *conn, struct iscsi_task *task)
518 } 520 }
519 521
520 if (tcp_task->exp_datasn != r2tsn){ 522 if (tcp_task->exp_datasn != r2tsn){
521 debug_tcp("%s: task->exp_datasn(%d) != rhdr->r2tsn(%d)\n", 523 ISCSI_DBG_TCP(conn, "task->exp_datasn(%d) != rhdr->r2tsn(%d)\n",
522 __func__, tcp_task->exp_datasn, r2tsn); 524 tcp_task->exp_datasn, r2tsn);
523 return ISCSI_ERR_R2TSN; 525 return ISCSI_ERR_R2TSN;
524 } 526 }
525 527
@@ -552,9 +554,9 @@ static int iscsi_tcp_r2t_rsp(struct iscsi_conn *conn, struct iscsi_task *task)
552 } 554 }
553 555
554 if (r2t->data_length > session->max_burst) 556 if (r2t->data_length > session->max_burst)
555 debug_scsi("invalid R2T with data len %u and max burst %u." 557 ISCSI_DBG_TCP(conn, "invalid R2T with data len %u and max "
556 "Attempting to execute request.\n", 558 "burst %u. Attempting to execute request.\n",
557 r2t->data_length, session->max_burst); 559 r2t->data_length, session->max_burst);
558 560
559 r2t->data_offset = be32_to_cpu(rhdr->data_offset); 561 r2t->data_offset = be32_to_cpu(rhdr->data_offset);
560 if (r2t->data_offset + r2t->data_length > scsi_out(task->sc)->length) { 562 if (r2t->data_offset + r2t->data_length > scsi_out(task->sc)->length) {
@@ -641,8 +643,8 @@ iscsi_tcp_hdr_dissect(struct iscsi_conn *conn, struct iscsi_hdr *hdr)
641 if (rc) 643 if (rc)
642 return rc; 644 return rc;
643 645
644 debug_tcp("opcode 0x%x ahslen %d datalen %d\n", 646 ISCSI_DBG_TCP(conn, "opcode 0x%x ahslen %d datalen %d\n",
645 opcode, ahslen, tcp_conn->in.datalen); 647 opcode, ahslen, tcp_conn->in.datalen);
646 648
647 switch(opcode) { 649 switch(opcode) {
648 case ISCSI_OP_SCSI_DATA_IN: 650 case ISCSI_OP_SCSI_DATA_IN:
@@ -674,10 +676,10 @@ iscsi_tcp_hdr_dissect(struct iscsi_conn *conn, struct iscsi_hdr *hdr)
674 !(conn->session->tt->caps & CAP_DIGEST_OFFLOAD)) 676 !(conn->session->tt->caps & CAP_DIGEST_OFFLOAD))
675 rx_hash = tcp_conn->rx_hash; 677 rx_hash = tcp_conn->rx_hash;
676 678
677 debug_tcp("iscsi_tcp_begin_data_in(%p, offset=%d, " 679 ISCSI_DBG_TCP(conn, "iscsi_tcp_begin_data_in( "
678 "datalen=%d)\n", tcp_conn, 680 "offset=%d, datalen=%d)\n",
679 tcp_task->data_offset, 681 tcp_task->data_offset,
680 tcp_conn->in.datalen); 682 tcp_conn->in.datalen);
681 rc = iscsi_segment_seek_sg(&tcp_conn->in.segment, 683 rc = iscsi_segment_seek_sg(&tcp_conn->in.segment,
682 sdb->table.sgl, 684 sdb->table.sgl,
683 sdb->table.nents, 685 sdb->table.nents,
@@ -854,10 +856,10 @@ int iscsi_tcp_recv_skb(struct iscsi_conn *conn, struct sk_buff *skb,
854 unsigned int consumed = 0; 856 unsigned int consumed = 0;
855 int rc = 0; 857 int rc = 0;
856 858
857 debug_tcp("in %d bytes\n", skb->len - offset); 859 ISCSI_DBG_TCP(conn, "in %d bytes\n", skb->len - offset);
858 860
859 if (unlikely(conn->suspend_rx)) { 861 if (unlikely(conn->suspend_rx)) {
860 debug_tcp("conn %d Rx suspended!\n", conn->id); 862 ISCSI_DBG_TCP(conn, "Rx suspended!\n");
861 *status = ISCSI_TCP_SUSPENDED; 863 *status = ISCSI_TCP_SUSPENDED;
862 return 0; 864 return 0;
863 } 865 }
@@ -874,15 +876,16 @@ int iscsi_tcp_recv_skb(struct iscsi_conn *conn, struct sk_buff *skb,
874 876
875 avail = skb_seq_read(consumed, &ptr, &seq); 877 avail = skb_seq_read(consumed, &ptr, &seq);
876 if (avail == 0) { 878 if (avail == 0) {
877 debug_tcp("no more data avail. Consumed %d\n", 879 ISCSI_DBG_TCP(conn, "no more data avail. Consumed %d\n",
878 consumed); 880 consumed);
879 *status = ISCSI_TCP_SKB_DONE; 881 *status = ISCSI_TCP_SKB_DONE;
880 skb_abort_seq_read(&seq); 882 skb_abort_seq_read(&seq);
881 goto skb_done; 883 goto skb_done;
882 } 884 }
883 BUG_ON(segment->copied >= segment->size); 885 BUG_ON(segment->copied >= segment->size);
884 886
885 debug_tcp("skb %p ptr=%p avail=%u\n", skb, ptr, avail); 887 ISCSI_DBG_TCP(conn, "skb %p ptr=%p avail=%u\n", skb, ptr,
888 avail);
886 rc = iscsi_tcp_segment_recv(tcp_conn, segment, ptr, avail); 889 rc = iscsi_tcp_segment_recv(tcp_conn, segment, ptr, avail);
887 BUG_ON(rc == 0); 890 BUG_ON(rc == 0);
888 consumed += rc; 891 consumed += rc;
@@ -895,11 +898,11 @@ int iscsi_tcp_recv_skb(struct iscsi_conn *conn, struct sk_buff *skb,
895 898
896segment_done: 899segment_done:
897 *status = ISCSI_TCP_SEGMENT_DONE; 900 *status = ISCSI_TCP_SEGMENT_DONE;
898 debug_tcp("segment done\n"); 901 ISCSI_DBG_TCP(conn, "segment done\n");
899 rc = segment->done(tcp_conn, segment); 902 rc = segment->done(tcp_conn, segment);
900 if (rc != 0) { 903 if (rc != 0) {
901 *status = ISCSI_TCP_CONN_ERR; 904 *status = ISCSI_TCP_CONN_ERR;
902 debug_tcp("Error receiving PDU, errno=%d\n", rc); 905 ISCSI_DBG_TCP(conn, "Error receiving PDU, errno=%d\n", rc);
903 iscsi_conn_failure(conn, rc); 906 iscsi_conn_failure(conn, rc);
904 return 0; 907 return 0;
905 } 908 }
@@ -929,8 +932,7 @@ int iscsi_tcp_task_init(struct iscsi_task *task)
929 * mgmt tasks do not have a scatterlist since they come 932 * mgmt tasks do not have a scatterlist since they come
930 * in from the iscsi interface. 933 * in from the iscsi interface.
931 */ 934 */
932 debug_scsi("mtask deq [cid %d itt 0x%x]\n", conn->id, 935 ISCSI_DBG_TCP(conn, "mtask deq [itt 0x%x]\n", task->itt);
933 task->itt);
934 936
935 return conn->session->tt->init_pdu(task, 0, task->data_count); 937 return conn->session->tt->init_pdu(task, 0, task->data_count);
936 } 938 }
@@ -939,9 +941,8 @@ int iscsi_tcp_task_init(struct iscsi_task *task)
939 tcp_task->exp_datasn = 0; 941 tcp_task->exp_datasn = 0;
940 942
941 /* Prepare PDU, optionally w/ immediate data */ 943 /* Prepare PDU, optionally w/ immediate data */
942 debug_scsi("task deq [cid %d itt 0x%x imm %d unsol %d]\n", 944 ISCSI_DBG_TCP(conn, "task deq [itt 0x%x imm %d unsol %d]\n",
943 conn->id, task->itt, task->imm_count, 945 task->itt, task->imm_count, task->unsol_r2t.data_length);
944 task->unsol_r2t.data_length);
945 946
946 err = conn->session->tt->init_pdu(task, 0, task->imm_count); 947 err = conn->session->tt->init_pdu(task, 0, task->imm_count);
947 if (err) 948 if (err)
@@ -965,7 +966,8 @@ static struct iscsi_r2t_info *iscsi_tcp_get_curr_r2t(struct iscsi_task *task)
965 r2t = tcp_task->r2t; 966 r2t = tcp_task->r2t;
966 /* Continue with this R2T? */ 967 /* Continue with this R2T? */
967 if (r2t->data_length <= r2t->sent) { 968 if (r2t->data_length <= r2t->sent) {
968 debug_scsi(" done with r2t %p\n", r2t); 969 ISCSI_DBG_TCP(task->conn,
970 " done with r2t %p\n", r2t);
969 __kfifo_put(tcp_task->r2tpool.queue, 971 __kfifo_put(tcp_task->r2tpool.queue,
970 (void *)&tcp_task->r2t, 972 (void *)&tcp_task->r2t,
971 sizeof(void *)); 973 sizeof(void *));
@@ -1019,7 +1021,7 @@ flush:
1019 r2t = iscsi_tcp_get_curr_r2t(task); 1021 r2t = iscsi_tcp_get_curr_r2t(task);
1020 if (r2t == NULL) { 1022 if (r2t == NULL) {
1021 /* Waiting for more R2Ts to arrive. */ 1023 /* Waiting for more R2Ts to arrive. */
1022 debug_tcp("no R2Ts yet\n"); 1024 ISCSI_DBG_TCP(conn, "no R2Ts yet\n");
1023 return 0; 1025 return 0;
1024 } 1026 }
1025 1027
@@ -1028,9 +1030,9 @@ flush:
1028 return rc; 1030 return rc;
1029 iscsi_prep_data_out_pdu(task, r2t, (struct iscsi_data *) task->hdr); 1031 iscsi_prep_data_out_pdu(task, r2t, (struct iscsi_data *) task->hdr);
1030 1032
1031 debug_scsi("sol dout %p [dsn %d itt 0x%x doff %d dlen %d]\n", 1033 ISCSI_DBG_TCP(conn, "sol dout %p [dsn %d itt 0x%x doff %d dlen %d]\n",
1032 r2t, r2t->datasn - 1, task->hdr->itt, 1034 r2t, r2t->datasn - 1, task->hdr->itt,
1033 r2t->data_offset + r2t->sent, r2t->data_count); 1035 r2t->data_offset + r2t->sent, r2t->data_count);
1034 1036
1035 rc = conn->session->tt->init_pdu(task, r2t->data_offset + r2t->sent, 1037 rc = conn->session->tt->init_pdu(task, r2t->data_offset + r2t->sent,
1036 r2t->data_count); 1038 r2t->data_count);
diff --git a/drivers/scsi/lpfc/lpfc_debugfs.c b/drivers/scsi/lpfc/lpfc_debugfs.c
index b615eda361d5..81cdcf46c471 100644
--- a/drivers/scsi/lpfc/lpfc_debugfs.c
+++ b/drivers/scsi/lpfc/lpfc_debugfs.c
@@ -1132,7 +1132,7 @@ lpfc_debugfs_dumpDataDif_release(struct inode *inode, struct file *file)
1132} 1132}
1133 1133
1134#undef lpfc_debugfs_op_disc_trc 1134#undef lpfc_debugfs_op_disc_trc
1135static struct file_operations lpfc_debugfs_op_disc_trc = { 1135static const struct file_operations lpfc_debugfs_op_disc_trc = {
1136 .owner = THIS_MODULE, 1136 .owner = THIS_MODULE,
1137 .open = lpfc_debugfs_disc_trc_open, 1137 .open = lpfc_debugfs_disc_trc_open,
1138 .llseek = lpfc_debugfs_lseek, 1138 .llseek = lpfc_debugfs_lseek,
@@ -1141,7 +1141,7 @@ static struct file_operations lpfc_debugfs_op_disc_trc = {
1141}; 1141};
1142 1142
1143#undef lpfc_debugfs_op_nodelist 1143#undef lpfc_debugfs_op_nodelist
1144static struct file_operations lpfc_debugfs_op_nodelist = { 1144static const struct file_operations lpfc_debugfs_op_nodelist = {
1145 .owner = THIS_MODULE, 1145 .owner = THIS_MODULE,
1146 .open = lpfc_debugfs_nodelist_open, 1146 .open = lpfc_debugfs_nodelist_open,
1147 .llseek = lpfc_debugfs_lseek, 1147 .llseek = lpfc_debugfs_lseek,
@@ -1150,7 +1150,7 @@ static struct file_operations lpfc_debugfs_op_nodelist = {
1150}; 1150};
1151 1151
1152#undef lpfc_debugfs_op_hbqinfo 1152#undef lpfc_debugfs_op_hbqinfo
1153static struct file_operations lpfc_debugfs_op_hbqinfo = { 1153static const struct file_operations lpfc_debugfs_op_hbqinfo = {
1154 .owner = THIS_MODULE, 1154 .owner = THIS_MODULE,
1155 .open = lpfc_debugfs_hbqinfo_open, 1155 .open = lpfc_debugfs_hbqinfo_open,
1156 .llseek = lpfc_debugfs_lseek, 1156 .llseek = lpfc_debugfs_lseek,
@@ -1159,7 +1159,7 @@ static struct file_operations lpfc_debugfs_op_hbqinfo = {
1159}; 1159};
1160 1160
1161#undef lpfc_debugfs_op_dumpHBASlim 1161#undef lpfc_debugfs_op_dumpHBASlim
1162static struct file_operations lpfc_debugfs_op_dumpHBASlim = { 1162static const struct file_operations lpfc_debugfs_op_dumpHBASlim = {
1163 .owner = THIS_MODULE, 1163 .owner = THIS_MODULE,
1164 .open = lpfc_debugfs_dumpHBASlim_open, 1164 .open = lpfc_debugfs_dumpHBASlim_open,
1165 .llseek = lpfc_debugfs_lseek, 1165 .llseek = lpfc_debugfs_lseek,
@@ -1168,7 +1168,7 @@ static struct file_operations lpfc_debugfs_op_dumpHBASlim = {
1168}; 1168};
1169 1169
1170#undef lpfc_debugfs_op_dumpHostSlim 1170#undef lpfc_debugfs_op_dumpHostSlim
1171static struct file_operations lpfc_debugfs_op_dumpHostSlim = { 1171static const struct file_operations lpfc_debugfs_op_dumpHostSlim = {
1172 .owner = THIS_MODULE, 1172 .owner = THIS_MODULE,
1173 .open = lpfc_debugfs_dumpHostSlim_open, 1173 .open = lpfc_debugfs_dumpHostSlim_open,
1174 .llseek = lpfc_debugfs_lseek, 1174 .llseek = lpfc_debugfs_lseek,
@@ -1177,7 +1177,7 @@ static struct file_operations lpfc_debugfs_op_dumpHostSlim = {
1177}; 1177};
1178 1178
1179#undef lpfc_debugfs_op_dumpData 1179#undef lpfc_debugfs_op_dumpData
1180static struct file_operations lpfc_debugfs_op_dumpData = { 1180static const struct file_operations lpfc_debugfs_op_dumpData = {
1181 .owner = THIS_MODULE, 1181 .owner = THIS_MODULE,
1182 .open = lpfc_debugfs_dumpData_open, 1182 .open = lpfc_debugfs_dumpData_open,
1183 .llseek = lpfc_debugfs_lseek, 1183 .llseek = lpfc_debugfs_lseek,
@@ -1187,7 +1187,7 @@ static struct file_operations lpfc_debugfs_op_dumpData = {
1187}; 1187};
1188 1188
1189#undef lpfc_debugfs_op_dumpDif 1189#undef lpfc_debugfs_op_dumpDif
1190static struct file_operations lpfc_debugfs_op_dumpDif = { 1190static const struct file_operations lpfc_debugfs_op_dumpDif = {
1191 .owner = THIS_MODULE, 1191 .owner = THIS_MODULE,
1192 .open = lpfc_debugfs_dumpDif_open, 1192 .open = lpfc_debugfs_dumpDif_open,
1193 .llseek = lpfc_debugfs_lseek, 1193 .llseek = lpfc_debugfs_lseek,
@@ -1197,7 +1197,7 @@ static struct file_operations lpfc_debugfs_op_dumpDif = {
1197}; 1197};
1198 1198
1199#undef lpfc_debugfs_op_slow_ring_trc 1199#undef lpfc_debugfs_op_slow_ring_trc
1200static struct file_operations lpfc_debugfs_op_slow_ring_trc = { 1200static const struct file_operations lpfc_debugfs_op_slow_ring_trc = {
1201 .owner = THIS_MODULE, 1201 .owner = THIS_MODULE,
1202 .open = lpfc_debugfs_slow_ring_trc_open, 1202 .open = lpfc_debugfs_slow_ring_trc_open,
1203 .llseek = lpfc_debugfs_lseek, 1203 .llseek = lpfc_debugfs_lseek,
diff --git a/drivers/scsi/lpfc/lpfc_scsi.c b/drivers/scsi/lpfc/lpfc_scsi.c
index b103b6ed4970..b1bd3fc7bae8 100644
--- a/drivers/scsi/lpfc/lpfc_scsi.c
+++ b/drivers/scsi/lpfc/lpfc_scsi.c
@@ -1357,7 +1357,7 @@ lpfc_parse_bg_err(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd,
1357 1357
1358 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, 1358 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
1359 0x10, 0x1); 1359 0x10, 0x1);
1360 cmd->result = (DRIVER_SENSE|SUGGEST_DIE) << 24 1360 cmd->result = DRIVER_SENSE << 24
1361 | ScsiResult(DID_ABORT, SAM_STAT_CHECK_CONDITION); 1361 | ScsiResult(DID_ABORT, SAM_STAT_CHECK_CONDITION);
1362 phba->bg_guard_err_cnt++; 1362 phba->bg_guard_err_cnt++;
1363 printk(KERN_ERR "BLKGRD: guard_tag error\n"); 1363 printk(KERN_ERR "BLKGRD: guard_tag error\n");
@@ -1368,7 +1368,7 @@ lpfc_parse_bg_err(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd,
1368 1368
1369 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, 1369 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
1370 0x10, 0x3); 1370 0x10, 0x3);
1371 cmd->result = (DRIVER_SENSE|SUGGEST_DIE) << 24 1371 cmd->result = DRIVER_SENSE << 24
1372 | ScsiResult(DID_ABORT, SAM_STAT_CHECK_CONDITION); 1372 | ScsiResult(DID_ABORT, SAM_STAT_CHECK_CONDITION);
1373 1373
1374 phba->bg_reftag_err_cnt++; 1374 phba->bg_reftag_err_cnt++;
@@ -1380,7 +1380,7 @@ lpfc_parse_bg_err(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd,
1380 1380
1381 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, 1381 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
1382 0x10, 0x2); 1382 0x10, 0x2);
1383 cmd->result = (DRIVER_SENSE|SUGGEST_DIE) << 24 1383 cmd->result = DRIVER_SENSE << 24
1384 | ScsiResult(DID_ABORT, SAM_STAT_CHECK_CONDITION); 1384 | ScsiResult(DID_ABORT, SAM_STAT_CHECK_CONDITION);
1385 1385
1386 phba->bg_apptag_err_cnt++; 1386 phba->bg_apptag_err_cnt++;
diff --git a/drivers/scsi/mpt2sas/Kconfig b/drivers/scsi/mpt2sas/Kconfig
new file mode 100644
index 000000000000..4a86855c23b3
--- /dev/null
+++ b/drivers/scsi/mpt2sas/Kconfig
@@ -0,0 +1,66 @@
1#
2# Kernel configuration file for the MPT2SAS
3#
4# This code is based on drivers/scsi/mpt2sas/Kconfig
5# Copyright (C) 2007-2008 LSI Corporation
6# (mailto:DL-MPTFusionLinux@lsi.com)
7
8# This program is free software; you can redistribute it and/or
9# modify it under the terms of the GNU General Public License
10# as published by the Free Software Foundation; either version 2
11# of the License, or (at your option) any later version.
12
13# This program is distributed in the hope that it will be useful,
14# but WITHOUT ANY WARRANTY; without even the implied warranty of
15# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16# GNU General Public License for more details.
17
18# NO WARRANTY
19# THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
20# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
21# LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
22# MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
23# solely responsible for determining the appropriateness of using and
24# distributing the Program and assumes all risks associated with its
25# exercise of rights under this Agreement, including but not limited to
26# the risks and costs of program errors, damage to or loss of data,
27# programs or equipment, and unavailability or interruption of operations.
28
29# DISCLAIMER OF LIABILITY
30# NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
31# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32# DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
33# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
34# TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
35# USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
36# HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
37
38# You should have received a copy of the GNU General Public License
39# along with this program; if not, write to the Free Software
40# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
41# USA.
42
43config SCSI_MPT2SAS
44 tristate "LSI MPT Fusion SAS 2.0 Device Driver"
45 depends on PCI && SCSI
46 select SCSI_SAS_ATTRS
47 ---help---
48 This driver supports PCI-Express SAS 6Gb/s Host Adapters.
49
50config SCSI_MPT2SAS_MAX_SGE
51 int "LSI MPT Fusion Max number of SG Entries (16 - 128)"
52 depends on PCI && SCSI && SCSI_MPT2SAS
53 default "128"
54 range 16 128
55 ---help---
56 This option allows you to specify the maximum number of scatter-
57 gather entries per I/O. The driver default is 128, which matches
58 SAFE_PHYS_SEGMENTS. However, it may decreased down to 16.
59 Decreasing this parameter will reduce memory requirements
60 on a per controller instance.
61
62config SCSI_MPT2SAS_LOGGING
63 bool "LSI MPT Fusion logging facility"
64 depends on PCI && SCSI && SCSI_MPT2SAS
65 ---help---
66 This turns on a logging facility.
diff --git a/drivers/scsi/mpt2sas/Makefile b/drivers/scsi/mpt2sas/Makefile
new file mode 100644
index 000000000000..728f0475711d
--- /dev/null
+++ b/drivers/scsi/mpt2sas/Makefile
@@ -0,0 +1,7 @@
1# mpt2sas makefile
2obj-$(CONFIG_SCSI_MPT2SAS) += mpt2sas.o
3mpt2sas-y += mpt2sas_base.o \
4 mpt2sas_config.o \
5 mpt2sas_scsih.o \
6 mpt2sas_transport.o \
7 mpt2sas_ctl.o
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2.h b/drivers/scsi/mpt2sas/mpi/mpi2.h
new file mode 100644
index 000000000000..7bb2ece8b2e4
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpi/mpi2.h
@@ -0,0 +1,1067 @@
1/*
2 * Copyright (c) 2000-2009 LSI Corporation.
3 *
4 *
5 * Name: mpi2.h
6 * Title: MPI Message independent structures and definitions
7 * including System Interface Register Set and
8 * scatter/gather formats.
9 * Creation Date: June 21, 2006
10 *
11 * mpi2.h Version: 02.00.11
12 *
13 * Version History
14 * ---------------
15 *
16 * Date Version Description
17 * -------- -------- ------------------------------------------------------
18 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
19 * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
20 * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
21 * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
22 * Moved ReplyPostHostIndex register to offset 0x6C of the
23 * MPI2_SYSTEM_INTERFACE_REGS and modified the define for
24 * MPI2_REPLY_POST_HOST_INDEX_OFFSET.
25 * Added union of request descriptors.
26 * Added union of reply descriptors.
27 * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
28 * Added define for MPI2_VERSION_02_00.
29 * Fixed the size of the FunctionDependent5 field in the
30 * MPI2_DEFAULT_REPLY structure.
31 * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
32 * Removed the MPI-defined Fault Codes and extended the
33 * product specific codes up to 0xEFFF.
34 * Added a sixth key value for the WriteSequence register
35 * and changed the flush value to 0x0.
36 * Added message function codes for Diagnostic Buffer Post
37 * and Diagnsotic Release.
38 * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
39 * Moved MPI2_VERSION_UNION from mpi2_ioc.h.
40 * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
41 * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
42 * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
43 * Added #defines for marking a reply descriptor as unused.
44 * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
45 * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
46 * Moved LUN field defines from mpi2_init.h.
47 * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
48 * --------------------------------------------------------------------------
49 */
50
51#ifndef MPI2_H
52#define MPI2_H
53
54
55/*****************************************************************************
56*
57* MPI Version Definitions
58*
59*****************************************************************************/
60
61#define MPI2_VERSION_MAJOR (0x02)
62#define MPI2_VERSION_MINOR (0x00)
63#define MPI2_VERSION_MAJOR_MASK (0xFF00)
64#define MPI2_VERSION_MAJOR_SHIFT (8)
65#define MPI2_VERSION_MINOR_MASK (0x00FF)
66#define MPI2_VERSION_MINOR_SHIFT (0)
67#define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
68 MPI2_VERSION_MINOR)
69
70#define MPI2_VERSION_02_00 (0x0200)
71
72/* versioning for this MPI header set */
73#define MPI2_HEADER_VERSION_UNIT (0x0B)
74#define MPI2_HEADER_VERSION_DEV (0x00)
75#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
76#define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
77#define MPI2_HEADER_VERSION_DEV_MASK (0x00FF)
78#define MPI2_HEADER_VERSION_DEV_SHIFT (0)
79#define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV)
80
81
82/*****************************************************************************
83*
84* IOC State Definitions
85*
86*****************************************************************************/
87
88#define MPI2_IOC_STATE_RESET (0x00000000)
89#define MPI2_IOC_STATE_READY (0x10000000)
90#define MPI2_IOC_STATE_OPERATIONAL (0x20000000)
91#define MPI2_IOC_STATE_FAULT (0x40000000)
92
93#define MPI2_IOC_STATE_MASK (0xF0000000)
94#define MPI2_IOC_STATE_SHIFT (28)
95
96/* Fault state range for prodcut specific codes */
97#define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000)
98#define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF)
99
100
101/*****************************************************************************
102*
103* System Interface Register Definitions
104*
105*****************************************************************************/
106
107typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
108{
109 U32 Doorbell; /* 0x00 */
110 U32 WriteSequence; /* 0x04 */
111 U32 HostDiagnostic; /* 0x08 */
112 U32 Reserved1; /* 0x0C */
113 U32 DiagRWData; /* 0x10 */
114 U32 DiagRWAddressLow; /* 0x14 */
115 U32 DiagRWAddressHigh; /* 0x18 */
116 U32 Reserved2[5]; /* 0x1C */
117 U32 HostInterruptStatus; /* 0x30 */
118 U32 HostInterruptMask; /* 0x34 */
119 U32 DCRData; /* 0x38 */
120 U32 DCRAddress; /* 0x3C */
121 U32 Reserved3[2]; /* 0x40 */
122 U32 ReplyFreeHostIndex; /* 0x48 */
123 U32 Reserved4[8]; /* 0x4C */
124 U32 ReplyPostHostIndex; /* 0x6C */
125 U32 Reserved5; /* 0x70 */
126 U32 HCBSize; /* 0x74 */
127 U32 HCBAddressLow; /* 0x78 */
128 U32 HCBAddressHigh; /* 0x7C */
129 U32 Reserved6[16]; /* 0x80 */
130 U32 RequestDescriptorPostLow; /* 0xC0 */
131 U32 RequestDescriptorPostHigh; /* 0xC4 */
132 U32 Reserved7[14]; /* 0xC8 */
133} MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS,
134 Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t;
135
136/*
137 * Defines for working with the Doorbell register.
138 */
139#define MPI2_DOORBELL_OFFSET (0x00000000)
140
141/* IOC --> System values */
142#define MPI2_DOORBELL_USED (0x08000000)
143#define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000)
144#define MPI2_DOORBELL_WHO_INIT_SHIFT (24)
145#define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF)
146#define MPI2_DOORBELL_DATA_MASK (0x0000FFFF)
147
148/* System --> IOC values */
149#define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000)
150#define MPI2_DOORBELL_FUNCTION_SHIFT (24)
151#define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
152#define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16)
153
154
155/*
156 * Defines for the WriteSequence register
157 */
158#define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004)
159#define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F)
160#define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0)
161#define MPI2_WRSEQ_1ST_KEY_VALUE (0xF)
162#define MPI2_WRSEQ_2ND_KEY_VALUE (0x4)
163#define MPI2_WRSEQ_3RD_KEY_VALUE (0xB)
164#define MPI2_WRSEQ_4TH_KEY_VALUE (0x2)
165#define MPI2_WRSEQ_5TH_KEY_VALUE (0x7)
166#define MPI2_WRSEQ_6TH_KEY_VALUE (0xD)
167
168/*
169 * Defines for the HostDiagnostic register
170 */
171#define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008)
172
173#define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800)
174#define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000)
175#define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800)
176
177#define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
178#define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200)
179#define MPI2_DIAG_HCB_MODE (0x00000100)
180#define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080)
181#define MPI2_DIAG_FLASH_BAD_SIG (0x00000040)
182#define MPI2_DIAG_RESET_HISTORY (0x00000020)
183#define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010)
184#define MPI2_DIAG_RESET_ADAPTER (0x00000004)
185#define MPI2_DIAG_HOLD_IOC_RESET (0x00000002)
186
187/*
188 * Offsets for DiagRWData and address
189 */
190#define MPI2_DIAG_RW_DATA_OFFSET (0x00000010)
191#define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014)
192#define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018)
193
194/*
195 * Defines for the HostInterruptStatus register
196 */
197#define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
198#define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000)
199#define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS
200#define MPI2_HIS_RESET_IRQ_STATUS (0x40000000)
201#define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008)
202#define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001)
203#define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS
204
205/*
206 * Defines for the HostInterruptMask register
207 */
208#define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
209#define MPI2_HIM_RESET_IRQ_MASK (0x40000000)
210#define MPI2_HIM_REPLY_INT_MASK (0x00000008)
211#define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK
212#define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001)
213#define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK
214
215/*
216 * Offsets for DCRData and address
217 */
218#define MPI2_DCR_DATA_OFFSET (0x00000038)
219#define MPI2_DCR_ADDRESS_OFFSET (0x0000003C)
220
221/*
222 * Offset for the Reply Free Queue
223 */
224#define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048)
225
226/*
227 * Offset for the Reply Descriptor Post Queue
228 */
229#define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C)
230
231/*
232 * Defines for the HCBSize and address
233 */
234#define MPI2_HCB_SIZE_OFFSET (0x00000074)
235#define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000)
236#define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001)
237
238#define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078)
239#define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C)
240
241/*
242 * Offsets for the Request Queue
243 */
244#define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0)
245#define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4)
246
247
248/*****************************************************************************
249*
250* Message Descriptors
251*
252*****************************************************************************/
253
254/* Request Descriptors */
255
256/* Default Request Descriptor */
257typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
258{
259 U8 RequestFlags; /* 0x00 */
260 U8 VF_ID; /* 0x01 */
261 U16 SMID; /* 0x02 */
262 U16 LMID; /* 0x04 */
263 U16 DescriptorTypeDependent; /* 0x06 */
264} MPI2_DEFAULT_REQUEST_DESCRIPTOR,
265 MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR,
266 Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t;
267
268/* defines for the RequestFlags field */
269#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
270#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
271#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02)
272#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
273#define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08)
274
275#define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
276
277
278/* High Priority Request Descriptor */
279typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
280{
281 U8 RequestFlags; /* 0x00 */
282 U8 VF_ID; /* 0x01 */
283 U16 SMID; /* 0x02 */
284 U16 LMID; /* 0x04 */
285 U16 Reserved1; /* 0x06 */
286} MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
287 MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
288 Mpi2HighPriorityRequestDescriptor_t,
289 MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t;
290
291
292/* SCSI IO Request Descriptor */
293typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR
294{
295 U8 RequestFlags; /* 0x00 */
296 U8 VF_ID; /* 0x01 */
297 U16 SMID; /* 0x02 */
298 U16 LMID; /* 0x04 */
299 U16 DevHandle; /* 0x06 */
300} MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
301 MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
302 Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t;
303
304
305/* SCSI Target Request Descriptor */
306typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR
307{
308 U8 RequestFlags; /* 0x00 */
309 U8 VF_ID; /* 0x01 */
310 U16 SMID; /* 0x02 */
311 U16 LMID; /* 0x04 */
312 U16 IoIndex; /* 0x06 */
313} MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
314 MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
315 Mpi2SCSITargetRequestDescriptor_t,
316 MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t;
317
318/* union of Request Descriptors */
319typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
320{
321 MPI2_DEFAULT_REQUEST_DESCRIPTOR Default;
322 MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority;
323 MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO;
324 MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget;
325 U64 Words;
326} MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION,
327 Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
328
329
330/* Reply Descriptors */
331
332/* Default Reply Descriptor */
333typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR
334{
335 U8 ReplyFlags; /* 0x00 */
336 U8 VF_ID; /* 0x01 */
337 U16 DescriptorTypeDependent1; /* 0x02 */
338 U32 DescriptorTypeDependent2; /* 0x04 */
339} MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR,
340 Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t;
341
342/* defines for the ReplyFlags field */
343#define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F)
344#define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00)
345#define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01)
346#define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02)
347#define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03)
348#define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F)
349
350/* values for marking a reply descriptor as unused */
351#define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF)
352#define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF)
353
354/* Address Reply Descriptor */
355typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR
356{
357 U8 ReplyFlags; /* 0x00 */
358 U8 VF_ID; /* 0x01 */
359 U16 SMID; /* 0x02 */
360 U32 ReplyFrameAddress; /* 0x04 */
361} MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR,
362 Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t;
363
364#define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00)
365
366
367/* SCSI IO Success Reply Descriptor */
368typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
369{
370 U8 ReplyFlags; /* 0x00 */
371 U8 VF_ID; /* 0x01 */
372 U16 SMID; /* 0x02 */
373 U16 TaskTag; /* 0x04 */
374 U16 DevHandle; /* 0x06 */
375} MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
376 MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
377 Mpi2SCSIIOSuccessReplyDescriptor_t,
378 MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t;
379
380
381/* TargetAssist Success Reply Descriptor */
382typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR
383{
384 U8 ReplyFlags; /* 0x00 */
385 U8 VF_ID; /* 0x01 */
386 U16 SMID; /* 0x02 */
387 U8 SequenceNumber; /* 0x04 */
388 U8 Reserved1; /* 0x05 */
389 U16 IoIndex; /* 0x06 */
390} MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
391 MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
392 Mpi2TargetAssistSuccessReplyDescriptor_t,
393 MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t;
394
395
396/* Target Command Buffer Reply Descriptor */
397typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR
398{
399 U8 ReplyFlags; /* 0x00 */
400 U8 VF_ID; /* 0x01 */
401 U8 VP_ID; /* 0x02 */
402 U8 Flags; /* 0x03 */
403 U16 InitiatorDevHandle; /* 0x04 */
404 U16 IoIndex; /* 0x06 */
405} MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
406 MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
407 Mpi2TargetCommandBufferReplyDescriptor_t,
408 MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t;
409
410/* defines for Flags field */
411#define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F)
412
413
414/* union of Reply Descriptors */
415typedef union _MPI2_REPLY_DESCRIPTORS_UNION
416{
417 MPI2_DEFAULT_REPLY_DESCRIPTOR Default;
418 MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply;
419 MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess;
420 MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess;
421 MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer;
422 U64 Words;
423} MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION,
424 Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;
425
426
427
428/*****************************************************************************
429*
430* Message Functions
431* 0x80 -> 0x8F reserved for private message use per product
432*
433*
434*****************************************************************************/
435
436#define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */
437#define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */
438#define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */
439#define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */
440#define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */
441#define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */
442#define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */
443#define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */
444#define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */
445#define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */
446#define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */
447#define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */
448#define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */
449#define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */
450#define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */
451#define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */
452#define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */
453#define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */
454#define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */
455#define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */
456#define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */
457#define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */
458#define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */
459#define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */
460#define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */
461
462
463
464/* Doorbell functions */
465#define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
466/* #define MPI2_FUNCTION_IO_UNIT_RESET (0x41) */
467#define MPI2_FUNCTION_HANDSHAKE (0x42)
468
469
470/*****************************************************************************
471*
472* IOC Status Values
473*
474*****************************************************************************/
475
476/* mask for IOCStatus status value */
477#define MPI2_IOCSTATUS_MASK (0x7FFF)
478
479/****************************************************************************
480* Common IOCStatus values for all replies
481****************************************************************************/
482
483#define MPI2_IOCSTATUS_SUCCESS (0x0000)
484#define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001)
485#define MPI2_IOCSTATUS_BUSY (0x0002)
486#define MPI2_IOCSTATUS_INVALID_SGL (0x0003)
487#define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004)
488#define MPI2_IOCSTATUS_INVALID_VPID (0x0005)
489#define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
490#define MPI2_IOCSTATUS_INVALID_FIELD (0x0007)
491#define MPI2_IOCSTATUS_INVALID_STATE (0x0008)
492#define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
493
494/****************************************************************************
495* Config IOCStatus values
496****************************************************************************/
497
498#define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
499#define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
500#define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
501#define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
502#define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
503#define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
504
505/****************************************************************************
506* SCSI IO Reply
507****************************************************************************/
508
509#define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
510#define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042)
511#define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
512#define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
513#define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
514#define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
515#define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
516#define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
517#define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
518#define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
519#define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
520#define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
521
522/****************************************************************************
523* For use by SCSI Initiator and SCSI Target end-to-end data protection
524****************************************************************************/
525
526#define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
527#define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
528#define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
529
530/****************************************************************************
531* SCSI Target values
532****************************************************************************/
533
534#define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
535#define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063)
536#define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
537#define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
538#define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
539#define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
540#define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
541#define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
542#define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070)
543#define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071)
544
545/****************************************************************************
546* Serial Attached SCSI values
547****************************************************************************/
548
549#define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
550#define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
551
552/****************************************************************************
553* Diagnostic Buffer Post / Diagnostic Release values
554****************************************************************************/
555
556#define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
557
558
559/****************************************************************************
560* IOCStatus flag to indicate that log info is available
561****************************************************************************/
562
563#define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
564
565/****************************************************************************
566* IOCLogInfo Types
567****************************************************************************/
568
569#define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000)
570#define MPI2_IOCLOGINFO_TYPE_SHIFT (28)
571#define MPI2_IOCLOGINFO_TYPE_NONE (0x0)
572#define MPI2_IOCLOGINFO_TYPE_SCSI (0x1)
573#define MPI2_IOCLOGINFO_TYPE_FC (0x2)
574#define MPI2_IOCLOGINFO_TYPE_SAS (0x3)
575#define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4)
576#define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
577
578
579/*****************************************************************************
580*
581* Standard Message Structures
582*
583*****************************************************************************/
584
585/****************************************************************************
586* Request Message Header for all request messages
587****************************************************************************/
588
589typedef struct _MPI2_REQUEST_HEADER
590{
591 U16 FunctionDependent1; /* 0x00 */
592 U8 ChainOffset; /* 0x02 */
593 U8 Function; /* 0x03 */
594 U16 FunctionDependent2; /* 0x04 */
595 U8 FunctionDependent3; /* 0x06 */
596 U8 MsgFlags; /* 0x07 */
597 U8 VP_ID; /* 0x08 */
598 U8 VF_ID; /* 0x09 */
599 U16 Reserved1; /* 0x0A */
600} MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER,
601 MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t;
602
603
604/****************************************************************************
605* Default Reply
606****************************************************************************/
607
608typedef struct _MPI2_DEFAULT_REPLY
609{
610 U16 FunctionDependent1; /* 0x00 */
611 U8 MsgLength; /* 0x02 */
612 U8 Function; /* 0x03 */
613 U16 FunctionDependent2; /* 0x04 */
614 U8 FunctionDependent3; /* 0x06 */
615 U8 MsgFlags; /* 0x07 */
616 U8 VP_ID; /* 0x08 */
617 U8 VF_ID; /* 0x09 */
618 U16 Reserved1; /* 0x0A */
619 U16 FunctionDependent5; /* 0x0C */
620 U16 IOCStatus; /* 0x0E */
621 U32 IOCLogInfo; /* 0x10 */
622} MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY,
623 MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t;
624
625
626/* common version structure/union used in messages and configuration pages */
627
628typedef struct _MPI2_VERSION_STRUCT
629{
630 U8 Dev; /* 0x00 */
631 U8 Unit; /* 0x01 */
632 U8 Minor; /* 0x02 */
633 U8 Major; /* 0x03 */
634} MPI2_VERSION_STRUCT;
635
636typedef union _MPI2_VERSION_UNION
637{
638 MPI2_VERSION_STRUCT Struct;
639 U32 Word;
640} MPI2_VERSION_UNION;
641
642
643/* LUN field defines, common to many structures */
644#define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
645#define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
646#define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
647#define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
648#define MPI2_LUN_LEVEL_1_WORD (0xFF00)
649#define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00)
650
651
652/*****************************************************************************
653*
654* Fusion-MPT MPI Scatter Gather Elements
655*
656*****************************************************************************/
657
658/****************************************************************************
659* MPI Simple Element structures
660****************************************************************************/
661
662typedef struct _MPI2_SGE_SIMPLE32
663{
664 U32 FlagsLength;
665 U32 Address;
666} MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32,
667 Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t;
668
669typedef struct _MPI2_SGE_SIMPLE64
670{
671 U32 FlagsLength;
672 U64 Address;
673} MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64,
674 Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t;
675
676typedef struct _MPI2_SGE_SIMPLE_UNION
677{
678 U32 FlagsLength;
679 union
680 {
681 U32 Address32;
682 U64 Address64;
683 } u;
684} MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION,
685 Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t;
686
687
688/****************************************************************************
689* MPI Chain Element structures
690****************************************************************************/
691
692typedef struct _MPI2_SGE_CHAIN32
693{
694 U16 Length;
695 U8 NextChainOffset;
696 U8 Flags;
697 U32 Address;
698} MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32,
699 Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t;
700
701typedef struct _MPI2_SGE_CHAIN64
702{
703 U16 Length;
704 U8 NextChainOffset;
705 U8 Flags;
706 U64 Address;
707} MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64,
708 Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t;
709
710typedef struct _MPI2_SGE_CHAIN_UNION
711{
712 U16 Length;
713 U8 NextChainOffset;
714 U8 Flags;
715 union
716 {
717 U32 Address32;
718 U64 Address64;
719 } u;
720} MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION,
721 Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t;
722
723
724/****************************************************************************
725* MPI Transaction Context Element structures
726****************************************************************************/
727
728typedef struct _MPI2_SGE_TRANSACTION32
729{
730 U8 Reserved;
731 U8 ContextSize;
732 U8 DetailsLength;
733 U8 Flags;
734 U32 TransactionContext[1];
735 U32 TransactionDetails[1];
736} MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32,
737 Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t;
738
739typedef struct _MPI2_SGE_TRANSACTION64
740{
741 U8 Reserved;
742 U8 ContextSize;
743 U8 DetailsLength;
744 U8 Flags;
745 U32 TransactionContext[2];
746 U32 TransactionDetails[1];
747} MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64,
748 Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t;
749
750typedef struct _MPI2_SGE_TRANSACTION96
751{
752 U8 Reserved;
753 U8 ContextSize;
754 U8 DetailsLength;
755 U8 Flags;
756 U32 TransactionContext[3];
757 U32 TransactionDetails[1];
758} MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96,
759 Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t;
760
761typedef struct _MPI2_SGE_TRANSACTION128
762{
763 U8 Reserved;
764 U8 ContextSize;
765 U8 DetailsLength;
766 U8 Flags;
767 U32 TransactionContext[4];
768 U32 TransactionDetails[1];
769} MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128,
770 Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128;
771
772typedef struct _MPI2_SGE_TRANSACTION_UNION
773{
774 U8 Reserved;
775 U8 ContextSize;
776 U8 DetailsLength;
777 U8 Flags;
778 union
779 {
780 U32 TransactionContext32[1];
781 U32 TransactionContext64[2];
782 U32 TransactionContext96[3];
783 U32 TransactionContext128[4];
784 } u;
785 U32 TransactionDetails[1];
786} MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION,
787 Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t;
788
789
790/****************************************************************************
791* MPI SGE union for IO SGL's
792****************************************************************************/
793
794typedef struct _MPI2_MPI_SGE_IO_UNION
795{
796 union
797 {
798 MPI2_SGE_SIMPLE_UNION Simple;
799 MPI2_SGE_CHAIN_UNION Chain;
800 } u;
801} MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION,
802 Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t;
803
804
805/****************************************************************************
806* MPI SGE union for SGL's with Simple and Transaction elements
807****************************************************************************/
808
809typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION
810{
811 union
812 {
813 MPI2_SGE_SIMPLE_UNION Simple;
814 MPI2_SGE_TRANSACTION_UNION Transaction;
815 } u;
816} MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION,
817 Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t;
818
819
820/****************************************************************************
821* All MPI SGE types union
822****************************************************************************/
823
824typedef struct _MPI2_MPI_SGE_UNION
825{
826 union
827 {
828 MPI2_SGE_SIMPLE_UNION Simple;
829 MPI2_SGE_CHAIN_UNION Chain;
830 MPI2_SGE_TRANSACTION_UNION Transaction;
831 } u;
832} MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION,
833 Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t;
834
835
836/****************************************************************************
837* MPI SGE field definition and masks
838****************************************************************************/
839
840/* Flags field bit definitions */
841
842#define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80)
843#define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40)
844#define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
845#define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08)
846#define MPI2_SGE_FLAGS_DIRECTION (0x04)
847#define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02)
848#define MPI2_SGE_FLAGS_END_OF_LIST (0x01)
849
850#define MPI2_SGE_FLAGS_SHIFT (24)
851
852#define MPI2_SGE_LENGTH_MASK (0x00FFFFFF)
853#define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
854
855/* Element Type */
856
857#define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
858#define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
859#define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30)
860#define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30)
861
862/* Address location */
863
864#define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
865
866/* Direction */
867
868#define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00)
869#define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04)
870
871/* Address Size */
872
873#define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
874#define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
875
876/* Context Size */
877
878#define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00)
879#define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02)
880#define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04)
881#define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06)
882
883#define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
884#define MPI2_SGE_CHAIN_OFFSET_SHIFT (16)
885
886/****************************************************************************
887* MPI SGE operation Macros
888****************************************************************************/
889
890/* SIMPLE FlagsLength manipulations... */
891#define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
892#define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT)
893#define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK)
894#define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK)
895
896#define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l))
897
898#define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength)
899#define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength)
900#define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l)
901
902/* CAUTION - The following are READ-MODIFY-WRITE! */
903#define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f)
904#define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l)
905
906#define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT)
907
908
909/*****************************************************************************
910*
911* Fusion-MPT IEEE Scatter Gather Elements
912*
913*****************************************************************************/
914
915/****************************************************************************
916* IEEE Simple Element structures
917****************************************************************************/
918
919typedef struct _MPI2_IEEE_SGE_SIMPLE32
920{
921 U32 Address;
922 U32 FlagsLength;
923} MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32,
924 Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t;
925
926typedef struct _MPI2_IEEE_SGE_SIMPLE64
927{
928 U64 Address;
929 U32 Length;
930 U16 Reserved1;
931 U8 Reserved2;
932 U8 Flags;
933} MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64,
934 Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t;
935
936typedef union _MPI2_IEEE_SGE_SIMPLE_UNION
937{
938 MPI2_IEEE_SGE_SIMPLE32 Simple32;
939 MPI2_IEEE_SGE_SIMPLE64 Simple64;
940} MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION,
941 Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t;
942
943
944/****************************************************************************
945* IEEE Chain Element structures
946****************************************************************************/
947
948typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32;
949
950typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64;
951
952typedef union _MPI2_IEEE_SGE_CHAIN_UNION
953{
954 MPI2_IEEE_SGE_CHAIN32 Chain32;
955 MPI2_IEEE_SGE_CHAIN64 Chain64;
956} MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION,
957 Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t;
958
959
960/****************************************************************************
961* All IEEE SGE types union
962****************************************************************************/
963
964typedef struct _MPI2_IEEE_SGE_UNION
965{
966 union
967 {
968 MPI2_IEEE_SGE_SIMPLE_UNION Simple;
969 MPI2_IEEE_SGE_CHAIN_UNION Chain;
970 } u;
971} MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION,
972 Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t;
973
974
975/****************************************************************************
976* IEEE SGE field definitions and masks
977****************************************************************************/
978
979/* Flags field bit definitions */
980
981#define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80)
982
983#define MPI2_IEEE32_SGE_FLAGS_SHIFT (24)
984
985#define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF)
986
987/* Element Type */
988
989#define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00)
990#define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
991
992/* Data Location Address Space */
993
994#define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03)
995#define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
996#define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
997#define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
998#define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
999
1000
1001/****************************************************************************
1002* IEEE SGE operation Macros
1003****************************************************************************/
1004
1005/* SIMPLE FlagsLength manipulations... */
1006#define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
1007#define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT)
1008#define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
1009
1010#define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l))
1011
1012#define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
1013#define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
1014#define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l)
1015
1016/* CAUTION - The following are READ-MODIFY-WRITE! */
1017#define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f)
1018#define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l)
1019
1020
1021
1022
1023/*****************************************************************************
1024*
1025* Fusion-MPT MPI/IEEE Scatter Gather Unions
1026*
1027*****************************************************************************/
1028
1029typedef union _MPI2_SIMPLE_SGE_UNION
1030{
1031 MPI2_SGE_SIMPLE_UNION MpiSimple;
1032 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
1033} MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION,
1034 Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t;
1035
1036
1037typedef union _MPI2_SGE_IO_UNION
1038{
1039 MPI2_SGE_SIMPLE_UNION MpiSimple;
1040 MPI2_SGE_CHAIN_UNION MpiChain;
1041 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
1042 MPI2_IEEE_SGE_CHAIN_UNION IeeeChain;
1043} MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION,
1044 Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t;
1045
1046
1047/****************************************************************************
1048*
1049* Values for SGLFlags field, used in many request messages with an SGL
1050*
1051****************************************************************************/
1052
1053/* values for MPI SGL Data Location Address Space subfield */
1054#define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C)
1055#define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00)
1056#define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04)
1057#define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
1058#define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C)
1059/* values for SGL Type subfield */
1060#define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03)
1061#define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00)
1062#define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01)
1063#define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02)
1064
1065
1066#endif
1067
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h b/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h
new file mode 100644
index 000000000000..2f27cf6d6c65
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h
@@ -0,0 +1,2151 @@
1/*
2 * Copyright (c) 2000-2009 LSI Corporation.
3 *
4 *
5 * Name: mpi2_cnfg.h
6 * Title: MPI Configuration messages and pages
7 * Creation Date: November 10, 2006
8 *
9 * mpi2_cnfg.h Version: 02.00.10
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
17 * 06-04-07 02.00.01 Added defines for SAS IO Unit Page 2 PhyFlags.
18 * Added Manufacturing Page 11.
19 * Added MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE
20 * define.
21 * 06-26-07 02.00.02 Adding generic structure for product-specific
22 * Manufacturing pages: MPI2_CONFIG_PAGE_MANUFACTURING_PS.
23 * Rework of BIOS Page 2 configuration page.
24 * Fixed MPI2_BIOSPAGE2_BOOT_DEVICE to be a union of the
25 * forms.
26 * Added configuration pages IOC Page 8 and Driver
27 * Persistent Mapping Page 0.
28 * 08-31-07 02.00.03 Modified configuration pages dealing with Integrated
29 * RAID (Manufacturing Page 4, RAID Volume Pages 0 and 1,
30 * RAID Physical Disk Pages 0 and 1, RAID Configuration
31 * Page 0).
32 * Added new value for AccessStatus field of SAS Device
33 * Page 0 (_SATA_NEEDS_INITIALIZATION).
34 * 10-31-07 02.00.04 Added missing SEPDevHandle field to
35 * MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0.
36 * 12-18-07 02.00.05 Modified IO Unit Page 0 to use 32-bit version fields for
37 * NVDATA.
38 * Modified IOC Page 7 to use masks and added field for
39 * SASBroadcastPrimitiveMasks.
40 * Added MPI2_CONFIG_PAGE_BIOS_4.
41 * Added MPI2_CONFIG_PAGE_LOG_0.
42 * 02-29-08 02.00.06 Modified various names to make them 32-character unique.
43 * Added SAS Device IDs.
44 * Updated Integrated RAID configuration pages including
45 * Manufacturing Page 4, IOC Page 6, and RAID Configuration
46 * Page 0.
47 * 05-21-08 02.00.07 Added define MPI2_MANPAGE4_MIX_SSD_SAS_SATA.
48 * Added define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION.
49 * Fixed define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING.
50 * Added missing MaxNumRoutedSasAddresses field to
51 * MPI2_CONFIG_PAGE_EXPANDER_0.
52 * Added SAS Port Page 0.
53 * Modified structure layout for
54 * MPI2_CONFIG_PAGE_DRIVER_MAPPING_0.
55 * 06-27-08 02.00.08 Changed MPI2_CONFIG_PAGE_RD_PDISK_1 to use
56 * MPI2_RAID_PHYS_DISK1_PATH_MAX to size the array.
57 * 10-02-08 02.00.09 Changed MPI2_RAID_PGAD_CONFIGNUM_MASK from 0x0000FFFF
58 * to 0x000000FF.
59 * Added two new values for the Physical Disk Coercion Size
60 * bits in the Flags field of Manufacturing Page 4.
61 * Added product-specific Manufacturing pages 16 to 31.
62 * Modified Flags bits for controlling write cache on SATA
63 * drives in IO Unit Page 1.
64 * Added new bit to AdditionalControlFlags of SAS IO Unit
65 * Page 1 to control Invalid Topology Correction.
66 * Added additional defines for RAID Volume Page 0
67 * VolumeStatusFlags field.
68 * Modified meaning of RAID Volume Page 0 VolumeSettings
69 * define for auto-configure of hot-swap drives.
70 * Added SupportedPhysDisks field to RAID Volume Page 1 and
71 * added related defines.
72 * Added PhysDiskAttributes field (and related defines) to
73 * RAID Physical Disk Page 0.
74 * Added MPI2_SAS_PHYINFO_PHY_VACANT define.
75 * Added three new DiscoveryStatus bits for SAS IO Unit
76 * Page 0 and SAS Expander Page 0.
77 * Removed multiplexing information from SAS IO Unit pages.
78 * Added BootDeviceWaitTime field to SAS IO Unit Page 4.
79 * Removed Zone Address Resolved bit from PhyInfo and from
80 * Expander Page 0 Flags field.
81 * Added two new AccessStatus values to SAS Device Page 0
82 * for indicating routing problems. Added 3 reserved words
83 * to this page.
84 * 01-19-09 02.00.10 Fixed defines for GPIOVal field of IO Unit Page 3.
85 * Inserted missing reserved field into structure for IOC
86 * Page 6.
87 * Added more pending task bits to RAID Volume Page 0
88 * VolumeStatusFlags defines.
89 * Added MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED define.
90 * Added a new DiscoveryStatus bit for SAS IO Unit Page 0
91 * and SAS Expander Page 0 to flag a downstream initiator
92 * when in simplified routing mode.
93 * Removed SATA Init Failure defines for DiscoveryStatus
94 * fields of SAS IO Unit Page 0 and SAS Expander Page 0.
95 * Added MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED define.
96 * Added PortGroups, DmaGroup, and ControlGroup fields to
97 * SAS Device Page 0.
98 * --------------------------------------------------------------------------
99 */
100
101#ifndef MPI2_CNFG_H
102#define MPI2_CNFG_H
103
104/*****************************************************************************
105* Configuration Page Header and defines
106*****************************************************************************/
107
108/* Config Page Header */
109typedef struct _MPI2_CONFIG_PAGE_HEADER
110{
111 U8 PageVersion; /* 0x00 */
112 U8 PageLength; /* 0x01 */
113 U8 PageNumber; /* 0x02 */
114 U8 PageType; /* 0x03 */
115} MPI2_CONFIG_PAGE_HEADER, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_HEADER,
116 Mpi2ConfigPageHeader_t, MPI2_POINTER pMpi2ConfigPageHeader_t;
117
118typedef union _MPI2_CONFIG_PAGE_HEADER_UNION
119{
120 MPI2_CONFIG_PAGE_HEADER Struct;
121 U8 Bytes[4];
122 U16 Word16[2];
123 U32 Word32;
124} MPI2_CONFIG_PAGE_HEADER_UNION, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_HEADER_UNION,
125 Mpi2ConfigPageHeaderUnion, MPI2_POINTER pMpi2ConfigPageHeaderUnion;
126
127/* Extended Config Page Header */
128typedef struct _MPI2_CONFIG_EXTENDED_PAGE_HEADER
129{
130 U8 PageVersion; /* 0x00 */
131 U8 Reserved1; /* 0x01 */
132 U8 PageNumber; /* 0x02 */
133 U8 PageType; /* 0x03 */
134 U16 ExtPageLength; /* 0x04 */
135 U8 ExtPageType; /* 0x06 */
136 U8 Reserved2; /* 0x07 */
137} MPI2_CONFIG_EXTENDED_PAGE_HEADER,
138 MPI2_POINTER PTR_MPI2_CONFIG_EXTENDED_PAGE_HEADER,
139 Mpi2ConfigExtendedPageHeader_t, MPI2_POINTER pMpi2ConfigExtendedPageHeader_t;
140
141typedef union _MPI2_CONFIG_EXT_PAGE_HEADER_UNION
142{
143 MPI2_CONFIG_PAGE_HEADER Struct;
144 MPI2_CONFIG_EXTENDED_PAGE_HEADER Ext;
145 U8 Bytes[8];
146 U16 Word16[4];
147 U32 Word32[2];
148} MPI2_CONFIG_EXT_PAGE_HEADER_UNION, MPI2_POINTER PTR_MPI2_CONFIG_EXT_PAGE_HEADER_UNION,
149 Mpi2ConfigPageExtendedHeaderUnion, MPI2_POINTER pMpi2ConfigPageExtendedHeaderUnion;
150
151
152/* PageType field values */
153#define MPI2_CONFIG_PAGEATTR_READ_ONLY (0x00)
154#define MPI2_CONFIG_PAGEATTR_CHANGEABLE (0x10)
155#define MPI2_CONFIG_PAGEATTR_PERSISTENT (0x20)
156#define MPI2_CONFIG_PAGEATTR_MASK (0xF0)
157
158#define MPI2_CONFIG_PAGETYPE_IO_UNIT (0x00)
159#define MPI2_CONFIG_PAGETYPE_IOC (0x01)
160#define MPI2_CONFIG_PAGETYPE_BIOS (0x02)
161#define MPI2_CONFIG_PAGETYPE_RAID_VOLUME (0x08)
162#define MPI2_CONFIG_PAGETYPE_MANUFACTURING (0x09)
163#define MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A)
164#define MPI2_CONFIG_PAGETYPE_EXTENDED (0x0F)
165#define MPI2_CONFIG_PAGETYPE_MASK (0x0F)
166
167#define MPI2_CONFIG_TYPENUM_MASK (0x0FFF)
168
169
170/* ExtPageType field values */
171#define MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT (0x10)
172#define MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11)
173#define MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12)
174#define MPI2_CONFIG_EXTPAGETYPE_SAS_PHY (0x13)
175#define MPI2_CONFIG_EXTPAGETYPE_LOG (0x14)
176#define MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15)
177#define MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG (0x16)
178#define MPI2_CONFIG_EXTPAGETYPE_DRIVER_MAPPING (0x17)
179#define MPI2_CONFIG_EXTPAGETYPE_SAS_PORT (0x18)
180
181
182/*****************************************************************************
183* PageAddress defines
184*****************************************************************************/
185
186/* RAID Volume PageAddress format */
187#define MPI2_RAID_VOLUME_PGAD_FORM_MASK (0xF0000000)
188#define MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
189#define MPI2_RAID_VOLUME_PGAD_FORM_HANDLE (0x10000000)
190
191#define MPI2_RAID_VOLUME_PGAD_HANDLE_MASK (0x0000FFFF)
192
193
194/* RAID Physical Disk PageAddress format */
195#define MPI2_PHYSDISK_PGAD_FORM_MASK (0xF0000000)
196#define MPI2_PHYSDISK_PGAD_FORM_GET_NEXT_PHYSDISKNUM (0x00000000)
197#define MPI2_PHYSDISK_PGAD_FORM_PHYSDISKNUM (0x10000000)
198#define MPI2_PHYSDISK_PGAD_FORM_DEVHANDLE (0x20000000)
199
200#define MPI2_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF)
201#define MPI2_PHYSDISK_PGAD_DEVHANDLE_MASK (0x0000FFFF)
202
203
204/* SAS Expander PageAddress format */
205#define MPI2_SAS_EXPAND_PGAD_FORM_MASK (0xF0000000)
206#define MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL (0x00000000)
207#define MPI2_SAS_EXPAND_PGAD_FORM_HNDL_PHY_NUM (0x10000000)
208#define MPI2_SAS_EXPAND_PGAD_FORM_HNDL (0x20000000)
209
210#define MPI2_SAS_EXPAND_PGAD_HANDLE_MASK (0x0000FFFF)
211#define MPI2_SAS_EXPAND_PGAD_PHYNUM_MASK (0x00FF0000)
212#define MPI2_SAS_EXPAND_PGAD_PHYNUM_SHIFT (16)
213
214
215/* SAS Device PageAddress format */
216#define MPI2_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000)
217#define MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
218#define MPI2_SAS_DEVICE_PGAD_FORM_HANDLE (0x20000000)
219
220#define MPI2_SAS_DEVICE_PGAD_HANDLE_MASK (0x0000FFFF)
221
222
223/* SAS PHY PageAddress format */
224#define MPI2_SAS_PHY_PGAD_FORM_MASK (0xF0000000)
225#define MPI2_SAS_PHY_PGAD_FORM_PHY_NUMBER (0x00000000)
226#define MPI2_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX (0x10000000)
227
228#define MPI2_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x000000FF)
229#define MPI2_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK (0x0000FFFF)
230
231
232/* SAS Port PageAddress format */
233#define MPI2_SASPORT_PGAD_FORM_MASK (0xF0000000)
234#define MPI2_SASPORT_PGAD_FORM_GET_NEXT_PORT (0x00000000)
235#define MPI2_SASPORT_PGAD_FORM_PORT_NUM (0x10000000)
236
237#define MPI2_SASPORT_PGAD_PORTNUMBER_MASK (0x00000FFF)
238
239
240/* SAS Enclosure PageAddress format */
241#define MPI2_SAS_ENCLOS_PGAD_FORM_MASK (0xF0000000)
242#define MPI2_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
243#define MPI2_SAS_ENCLOS_PGAD_FORM_HANDLE (0x10000000)
244
245#define MPI2_SAS_ENCLOS_PGAD_HANDLE_MASK (0x0000FFFF)
246
247
248/* RAID Configuration PageAddress format */
249#define MPI2_RAID_PGAD_FORM_MASK (0xF0000000)
250#define MPI2_RAID_PGAD_FORM_GET_NEXT_CONFIGNUM (0x00000000)
251#define MPI2_RAID_PGAD_FORM_CONFIGNUM (0x10000000)
252#define MPI2_RAID_PGAD_FORM_ACTIVE_CONFIG (0x20000000)
253
254#define MPI2_RAID_PGAD_CONFIGNUM_MASK (0x000000FF)
255
256
257/* Driver Persistent Mapping PageAddress format */
258#define MPI2_DPM_PGAD_FORM_MASK (0xF0000000)
259#define MPI2_DPM_PGAD_FORM_ENTRY_RANGE (0x00000000)
260
261#define MPI2_DPM_PGAD_ENTRY_COUNT_MASK (0x0FFF0000)
262#define MPI2_DPM_PGAD_ENTRY_COUNT_SHIFT (16)
263#define MPI2_DPM_PGAD_START_ENTRY_MASK (0x0000FFFF)
264
265
266/****************************************************************************
267* Configuration messages
268****************************************************************************/
269
270/* Configuration Request Message */
271typedef struct _MPI2_CONFIG_REQUEST
272{
273 U8 Action; /* 0x00 */
274 U8 SGLFlags; /* 0x01 */
275 U8 ChainOffset; /* 0x02 */
276 U8 Function; /* 0x03 */
277 U16 ExtPageLength; /* 0x04 */
278 U8 ExtPageType; /* 0x06 */
279 U8 MsgFlags; /* 0x07 */
280 U8 VP_ID; /* 0x08 */
281 U8 VF_ID; /* 0x09 */
282 U16 Reserved1; /* 0x0A */
283 U32 Reserved2; /* 0x0C */
284 U32 Reserved3; /* 0x10 */
285 MPI2_CONFIG_PAGE_HEADER Header; /* 0x14 */
286 U32 PageAddress; /* 0x18 */
287 MPI2_SGE_IO_UNION PageBufferSGE; /* 0x1C */
288} MPI2_CONFIG_REQUEST, MPI2_POINTER PTR_MPI2_CONFIG_REQUEST,
289 Mpi2ConfigRequest_t, MPI2_POINTER pMpi2ConfigRequest_t;
290
291/* values for the Action field */
292#define MPI2_CONFIG_ACTION_PAGE_HEADER (0x00)
293#define MPI2_CONFIG_ACTION_PAGE_READ_CURRENT (0x01)
294#define MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02)
295#define MPI2_CONFIG_ACTION_PAGE_DEFAULT (0x03)
296#define MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04)
297#define MPI2_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05)
298#define MPI2_CONFIG_ACTION_PAGE_READ_NVRAM (0x06)
299#define MPI2_CONFIG_ACTION_PAGE_GET_CHANGEABLE (0x07)
300
301/* values for SGLFlags field are in the SGL section of mpi2.h */
302
303
304/* Config Reply Message */
305typedef struct _MPI2_CONFIG_REPLY
306{
307 U8 Action; /* 0x00 */
308 U8 SGLFlags; /* 0x01 */
309 U8 MsgLength; /* 0x02 */
310 U8 Function; /* 0x03 */
311 U16 ExtPageLength; /* 0x04 */
312 U8 ExtPageType; /* 0x06 */
313 U8 MsgFlags; /* 0x07 */
314 U8 VP_ID; /* 0x08 */
315 U8 VF_ID; /* 0x09 */
316 U16 Reserved1; /* 0x0A */
317 U16 Reserved2; /* 0x0C */
318 U16 IOCStatus; /* 0x0E */
319 U32 IOCLogInfo; /* 0x10 */
320 MPI2_CONFIG_PAGE_HEADER Header; /* 0x14 */
321} MPI2_CONFIG_REPLY, MPI2_POINTER PTR_MPI2_CONFIG_REPLY,
322 Mpi2ConfigReply_t, MPI2_POINTER pMpi2ConfigReply_t;
323
324
325
326/*****************************************************************************
327*
328* C o n f i g u r a t i o n P a g e s
329*
330*****************************************************************************/
331
332/****************************************************************************
333* Manufacturing Config pages
334****************************************************************************/
335
336#define MPI2_MFGPAGE_VENDORID_LSI (0x1000)
337
338/* SAS */
339#define MPI2_MFGPAGE_DEVID_SAS2004 (0x0070)
340#define MPI2_MFGPAGE_DEVID_SAS2008 (0x0072)
341#define MPI2_MFGPAGE_DEVID_SAS2108_1 (0x0074)
342#define MPI2_MFGPAGE_DEVID_SAS2108_2 (0x0076)
343#define MPI2_MFGPAGE_DEVID_SAS2108_3 (0x0077)
344#define MPI2_MFGPAGE_DEVID_SAS2116_1 (0x0064)
345#define MPI2_MFGPAGE_DEVID_SAS2116_2 (0x0065)
346
347
348/* Manufacturing Page 0 */
349
350typedef struct _MPI2_CONFIG_PAGE_MAN_0
351{
352 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
353 U8 ChipName[16]; /* 0x04 */
354 U8 ChipRevision[8]; /* 0x14 */
355 U8 BoardName[16]; /* 0x1C */
356 U8 BoardAssembly[16]; /* 0x2C */
357 U8 BoardTracerNumber[16]; /* 0x3C */
358} MPI2_CONFIG_PAGE_MAN_0,
359 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_0,
360 Mpi2ManufacturingPage0_t, MPI2_POINTER pMpi2ManufacturingPage0_t;
361
362#define MPI2_MANUFACTURING0_PAGEVERSION (0x00)
363
364
365/* Manufacturing Page 1 */
366
367typedef struct _MPI2_CONFIG_PAGE_MAN_1
368{
369 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
370 U8 VPD[256]; /* 0x04 */
371} MPI2_CONFIG_PAGE_MAN_1,
372 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_1,
373 Mpi2ManufacturingPage1_t, MPI2_POINTER pMpi2ManufacturingPage1_t;
374
375#define MPI2_MANUFACTURING1_PAGEVERSION (0x00)
376
377
378typedef struct _MPI2_CHIP_REVISION_ID
379{
380 U16 DeviceID; /* 0x00 */
381 U8 PCIRevisionID; /* 0x02 */
382 U8 Reserved; /* 0x03 */
383} MPI2_CHIP_REVISION_ID, MPI2_POINTER PTR_MPI2_CHIP_REVISION_ID,
384 Mpi2ChipRevisionId_t, MPI2_POINTER pMpi2ChipRevisionId_t;
385
386
387/* Manufacturing Page 2 */
388
389/*
390 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
391 * one and check Header.PageLength at runtime.
392 */
393#ifndef MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS
394#define MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS (1)
395#endif
396
397typedef struct _MPI2_CONFIG_PAGE_MAN_2
398{
399 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
400 MPI2_CHIP_REVISION_ID ChipId; /* 0x04 */
401 U32 HwSettings[MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 0x08 */
402} MPI2_CONFIG_PAGE_MAN_2,
403 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_2,
404 Mpi2ManufacturingPage2_t, MPI2_POINTER pMpi2ManufacturingPage2_t;
405
406#define MPI2_MANUFACTURING2_PAGEVERSION (0x00)
407
408
409/* Manufacturing Page 3 */
410
411/*
412 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
413 * one and check Header.PageLength at runtime.
414 */
415#ifndef MPI2_MAN_PAGE_3_INFO_WORDS
416#define MPI2_MAN_PAGE_3_INFO_WORDS (1)
417#endif
418
419typedef struct _MPI2_CONFIG_PAGE_MAN_3
420{
421 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
422 MPI2_CHIP_REVISION_ID ChipId; /* 0x04 */
423 U32 Info[MPI2_MAN_PAGE_3_INFO_WORDS];/* 0x08 */
424} MPI2_CONFIG_PAGE_MAN_3,
425 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_3,
426 Mpi2ManufacturingPage3_t, MPI2_POINTER pMpi2ManufacturingPage3_t;
427
428#define MPI2_MANUFACTURING3_PAGEVERSION (0x00)
429
430
431/* Manufacturing Page 4 */
432
433typedef struct _MPI2_MANPAGE4_PWR_SAVE_SETTINGS
434{
435 U8 PowerSaveFlags; /* 0x00 */
436 U8 InternalOperationsSleepTime; /* 0x01 */
437 U8 InternalOperationsRunTime; /* 0x02 */
438 U8 HostIdleTime; /* 0x03 */
439} MPI2_MANPAGE4_PWR_SAVE_SETTINGS,
440 MPI2_POINTER PTR_MPI2_MANPAGE4_PWR_SAVE_SETTINGS,
441 Mpi2ManPage4PwrSaveSettings_t, MPI2_POINTER pMpi2ManPage4PwrSaveSettings_t;
442
443/* defines for the PowerSaveFlags field */
444#define MPI2_MANPAGE4_MASK_POWERSAVE_MODE (0x03)
445#define MPI2_MANPAGE4_POWERSAVE_MODE_DISABLED (0x00)
446#define MPI2_MANPAGE4_CUSTOM_POWERSAVE_MODE (0x01)
447#define MPI2_MANPAGE4_FULL_POWERSAVE_MODE (0x02)
448
449typedef struct _MPI2_CONFIG_PAGE_MAN_4
450{
451 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
452 U32 Reserved1; /* 0x04 */
453 U32 Flags; /* 0x08 */
454 U8 InquirySize; /* 0x0C */
455 U8 Reserved2; /* 0x0D */
456 U16 Reserved3; /* 0x0E */
457 U8 InquiryData[56]; /* 0x10 */
458 U32 RAID0VolumeSettings; /* 0x48 */
459 U32 RAID1EVolumeSettings; /* 0x4C */
460 U32 RAID1VolumeSettings; /* 0x50 */
461 U32 RAID10VolumeSettings; /* 0x54 */
462 U32 Reserved4; /* 0x58 */
463 U32 Reserved5; /* 0x5C */
464 MPI2_MANPAGE4_PWR_SAVE_SETTINGS PowerSaveSettings; /* 0x60 */
465 U8 MaxOCEDisks; /* 0x64 */
466 U8 ResyncRate; /* 0x65 */
467 U16 DataScrubDuration; /* 0x66 */
468 U8 MaxHotSpares; /* 0x68 */
469 U8 MaxPhysDisksPerVol; /* 0x69 */
470 U8 MaxPhysDisks; /* 0x6A */
471 U8 MaxVolumes; /* 0x6B */
472} MPI2_CONFIG_PAGE_MAN_4,
473 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_4,
474 Mpi2ManufacturingPage4_t, MPI2_POINTER pMpi2ManufacturingPage4_t;
475
476#define MPI2_MANUFACTURING4_PAGEVERSION (0x0A)
477
478/* Manufacturing Page 4 Flags field */
479#define MPI2_MANPAGE4_METADATA_SIZE_MASK (0x00030000)
480#define MPI2_MANPAGE4_METADATA_512MB (0x00000000)
481
482#define MPI2_MANPAGE4_MIX_SSD_SAS_SATA (0x00008000)
483#define MPI2_MANPAGE4_MIX_SSD_AND_NON_SSD (0x00004000)
484#define MPI2_MANPAGE4_HIDE_PHYSDISK_NON_IR (0x00002000)
485
486#define MPI2_MANPAGE4_MASK_PHYSDISK_COERCION (0x00001C00)
487#define MPI2_MANPAGE4_PHYSDISK_COERCION_1GB (0x00000000)
488#define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION (0x00000400)
489#define MPI2_MANPAGE4_PHYSDISK_ADAPTIVE_COERCION (0x00000800)
490#define MPI2_MANPAGE4_PHYSDISK_ZERO_COERCION (0x00000C00)
491
492#define MPI2_MANPAGE4_MASK_BAD_BLOCK_MARKING (0x00000300)
493#define MPI2_MANPAGE4_DEFAULT_BAD_BLOCK_MARKING (0x00000000)
494#define MPI2_MANPAGE4_TABLE_BAD_BLOCK_MARKING (0x00000100)
495#define MPI2_MANPAGE4_WRITE_LONG_BAD_BLOCK_MARKING (0x00000200)
496
497#define MPI2_MANPAGE4_FORCE_OFFLINE_FAILOVER (0x00000080)
498#define MPI2_MANPAGE4_RAID10_DISABLE (0x00000040)
499#define MPI2_MANPAGE4_RAID1E_DISABLE (0x00000020)
500#define MPI2_MANPAGE4_RAID1_DISABLE (0x00000010)
501#define MPI2_MANPAGE4_RAID0_DISABLE (0x00000008)
502#define MPI2_MANPAGE4_IR_MODEPAGE8_DISABLE (0x00000004)
503#define MPI2_MANPAGE4_IM_RESYNC_CACHE_ENABLE (0x00000002)
504#define MPI2_MANPAGE4_IR_NO_MIX_SAS_SATA (0x00000001)
505
506
507/* Manufacturing Page 5 */
508
509/*
510 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
511 * one and check Header.PageLength or NumPhys at runtime.
512 */
513#ifndef MPI2_MAN_PAGE_5_PHY_ENTRIES
514#define MPI2_MAN_PAGE_5_PHY_ENTRIES (1)
515#endif
516
517typedef struct _MPI2_MANUFACTURING5_ENTRY
518{
519 U64 WWID; /* 0x00 */
520 U64 DeviceName; /* 0x08 */
521} MPI2_MANUFACTURING5_ENTRY, MPI2_POINTER PTR_MPI2_MANUFACTURING5_ENTRY,
522 Mpi2Manufacturing5Entry_t, MPI2_POINTER pMpi2Manufacturing5Entry_t;
523
524typedef struct _MPI2_CONFIG_PAGE_MAN_5
525{
526 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
527 U8 NumPhys; /* 0x04 */
528 U8 Reserved1; /* 0x05 */
529 U16 Reserved2; /* 0x06 */
530 U32 Reserved3; /* 0x08 */
531 U32 Reserved4; /* 0x0C */
532 MPI2_MANUFACTURING5_ENTRY Phy[MPI2_MAN_PAGE_5_PHY_ENTRIES];/* 0x08 */
533} MPI2_CONFIG_PAGE_MAN_5,
534 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_5,
535 Mpi2ManufacturingPage5_t, MPI2_POINTER pMpi2ManufacturingPage5_t;
536
537#define MPI2_MANUFACTURING5_PAGEVERSION (0x03)
538
539
540/* Manufacturing Page 6 */
541
542typedef struct _MPI2_CONFIG_PAGE_MAN_6
543{
544 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
545 U32 ProductSpecificInfo;/* 0x04 */
546} MPI2_CONFIG_PAGE_MAN_6,
547 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_6,
548 Mpi2ManufacturingPage6_t, MPI2_POINTER pMpi2ManufacturingPage6_t;
549
550#define MPI2_MANUFACTURING6_PAGEVERSION (0x00)
551
552
553/* Manufacturing Page 7 */
554
555typedef struct _MPI2_MANPAGE7_CONNECTOR_INFO
556{
557 U32 Pinout; /* 0x00 */
558 U8 Connector[16]; /* 0x04 */
559 U8 Location; /* 0x14 */
560 U8 Reserved1; /* 0x15 */
561 U16 Slot; /* 0x16 */
562 U32 Reserved2; /* 0x18 */
563} MPI2_MANPAGE7_CONNECTOR_INFO, MPI2_POINTER PTR_MPI2_MANPAGE7_CONNECTOR_INFO,
564 Mpi2ManPage7ConnectorInfo_t, MPI2_POINTER pMpi2ManPage7ConnectorInfo_t;
565
566/* defines for the Pinout field */
567#define MPI2_MANPAGE7_PINOUT_SFF_8484_L4 (0x00080000)
568#define MPI2_MANPAGE7_PINOUT_SFF_8484_L3 (0x00040000)
569#define MPI2_MANPAGE7_PINOUT_SFF_8484_L2 (0x00020000)
570#define MPI2_MANPAGE7_PINOUT_SFF_8484_L1 (0x00010000)
571#define MPI2_MANPAGE7_PINOUT_SFF_8470_L4 (0x00000800)
572#define MPI2_MANPAGE7_PINOUT_SFF_8470_L3 (0x00000400)
573#define MPI2_MANPAGE7_PINOUT_SFF_8470_L2 (0x00000200)
574#define MPI2_MANPAGE7_PINOUT_SFF_8470_L1 (0x00000100)
575#define MPI2_MANPAGE7_PINOUT_SFF_8482 (0x00000002)
576#define MPI2_MANPAGE7_PINOUT_CONNECTION_UNKNOWN (0x00000001)
577
578/* defines for the Location field */
579#define MPI2_MANPAGE7_LOCATION_UNKNOWN (0x01)
580#define MPI2_MANPAGE7_LOCATION_INTERNAL (0x02)
581#define MPI2_MANPAGE7_LOCATION_EXTERNAL (0x04)
582#define MPI2_MANPAGE7_LOCATION_SWITCHABLE (0x08)
583#define MPI2_MANPAGE7_LOCATION_AUTO (0x10)
584#define MPI2_MANPAGE7_LOCATION_NOT_PRESENT (0x20)
585#define MPI2_MANPAGE7_LOCATION_NOT_CONNECTED (0x80)
586
587/*
588 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
589 * one and check NumPhys at runtime.
590 */
591#ifndef MPI2_MANPAGE7_CONNECTOR_INFO_MAX
592#define MPI2_MANPAGE7_CONNECTOR_INFO_MAX (1)
593#endif
594
595typedef struct _MPI2_CONFIG_PAGE_MAN_7
596{
597 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
598 U32 Reserved1; /* 0x04 */
599 U32 Reserved2; /* 0x08 */
600 U32 Flags; /* 0x0C */
601 U8 EnclosureName[16]; /* 0x10 */
602 U8 NumPhys; /* 0x20 */
603 U8 Reserved3; /* 0x21 */
604 U16 Reserved4; /* 0x22 */
605 MPI2_MANPAGE7_CONNECTOR_INFO ConnectorInfo[MPI2_MANPAGE7_CONNECTOR_INFO_MAX]; /* 0x24 */
606} MPI2_CONFIG_PAGE_MAN_7,
607 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_7,
608 Mpi2ManufacturingPage7_t, MPI2_POINTER pMpi2ManufacturingPage7_t;
609
610#define MPI2_MANUFACTURING7_PAGEVERSION (0x00)
611
612/* defines for the Flags field */
613#define MPI2_MANPAGE7_FLAG_USE_SLOT_INFO (0x00000001)
614
615
616/*
617 * Generic structure to use for product-specific manufacturing pages
618 * (currently Manufacturing Page 8 through Manufacturing Page 31).
619 */
620
621typedef struct _MPI2_CONFIG_PAGE_MAN_PS
622{
623 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
624 U32 ProductSpecificInfo;/* 0x04 */
625} MPI2_CONFIG_PAGE_MAN_PS,
626 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_PS,
627 Mpi2ManufacturingPagePS_t, MPI2_POINTER pMpi2ManufacturingPagePS_t;
628
629#define MPI2_MANUFACTURING8_PAGEVERSION (0x00)
630#define MPI2_MANUFACTURING9_PAGEVERSION (0x00)
631#define MPI2_MANUFACTURING10_PAGEVERSION (0x00)
632#define MPI2_MANUFACTURING11_PAGEVERSION (0x00)
633#define MPI2_MANUFACTURING12_PAGEVERSION (0x00)
634#define MPI2_MANUFACTURING13_PAGEVERSION (0x00)
635#define MPI2_MANUFACTURING14_PAGEVERSION (0x00)
636#define MPI2_MANUFACTURING15_PAGEVERSION (0x00)
637#define MPI2_MANUFACTURING16_PAGEVERSION (0x00)
638#define MPI2_MANUFACTURING17_PAGEVERSION (0x00)
639#define MPI2_MANUFACTURING18_PAGEVERSION (0x00)
640#define MPI2_MANUFACTURING19_PAGEVERSION (0x00)
641#define MPI2_MANUFACTURING20_PAGEVERSION (0x00)
642#define MPI2_MANUFACTURING21_PAGEVERSION (0x00)
643#define MPI2_MANUFACTURING22_PAGEVERSION (0x00)
644#define MPI2_MANUFACTURING23_PAGEVERSION (0x00)
645#define MPI2_MANUFACTURING24_PAGEVERSION (0x00)
646#define MPI2_MANUFACTURING25_PAGEVERSION (0x00)
647#define MPI2_MANUFACTURING26_PAGEVERSION (0x00)
648#define MPI2_MANUFACTURING27_PAGEVERSION (0x00)
649#define MPI2_MANUFACTURING28_PAGEVERSION (0x00)
650#define MPI2_MANUFACTURING29_PAGEVERSION (0x00)
651#define MPI2_MANUFACTURING30_PAGEVERSION (0x00)
652#define MPI2_MANUFACTURING31_PAGEVERSION (0x00)
653
654
655/****************************************************************************
656* IO Unit Config Pages
657****************************************************************************/
658
659/* IO Unit Page 0 */
660
661typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_0
662{
663 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
664 U64 UniqueValue; /* 0x04 */
665 MPI2_VERSION_UNION NvdataVersionDefault; /* 0x08 */
666 MPI2_VERSION_UNION NvdataVersionPersistent; /* 0x0A */
667} MPI2_CONFIG_PAGE_IO_UNIT_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_0,
668 Mpi2IOUnitPage0_t, MPI2_POINTER pMpi2IOUnitPage0_t;
669
670#define MPI2_IOUNITPAGE0_PAGEVERSION (0x02)
671
672
673/* IO Unit Page 1 */
674
675typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_1
676{
677 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
678 U32 Flags; /* 0x04 */
679} MPI2_CONFIG_PAGE_IO_UNIT_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_1,
680 Mpi2IOUnitPage1_t, MPI2_POINTER pMpi2IOUnitPage1_t;
681
682#define MPI2_IOUNITPAGE1_PAGEVERSION (0x04)
683
684/* IO Unit Page 1 Flags defines */
685#define MPI2_IOUNITPAGE1_MASK_SATA_WRITE_CACHE (0x00000600)
686#define MPI2_IOUNITPAGE1_ENABLE_SATA_WRITE_CACHE (0x00000000)
687#define MPI2_IOUNITPAGE1_DISABLE_SATA_WRITE_CACHE (0x00000200)
688#define MPI2_IOUNITPAGE1_UNCHANGED_SATA_WRITE_CACHE (0x00000400)
689#define MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100)
690#define MPI2_IOUNITPAGE1_DISABLE_IR (0x00000040)
691#define MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING (0x00000020)
692#define MPI2_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004)
693#define MPI2_IOUNITPAGE1_MULTI_PATHING (0x00000002)
694#define MPI2_IOUNITPAGE1_SINGLE_PATHING (0x00000000)
695
696
697/* IO Unit Page 3 */
698
699/*
700 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
701 * one and check Header.PageLength at runtime.
702 */
703#ifndef MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX
704#define MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1)
705#endif
706
707typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_3
708{
709 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
710 U8 GPIOCount; /* 0x04 */
711 U8 Reserved1; /* 0x05 */
712 U16 Reserved2; /* 0x06 */
713 U16 GPIOVal[MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX];/* 0x08 */
714} MPI2_CONFIG_PAGE_IO_UNIT_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_3,
715 Mpi2IOUnitPage3_t, MPI2_POINTER pMpi2IOUnitPage3_t;
716
717#define MPI2_IOUNITPAGE3_PAGEVERSION (0x01)
718
719/* defines for IO Unit Page 3 GPIOVal field */
720#define MPI2_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFFFC)
721#define MPI2_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2)
722#define MPI2_IOUNITPAGE3_GPIO_SETTING_OFF (0x0000)
723#define MPI2_IOUNITPAGE3_GPIO_SETTING_ON (0x0001)
724
725
726/****************************************************************************
727* IOC Config Pages
728****************************************************************************/
729
730/* IOC Page 0 */
731
732typedef struct _MPI2_CONFIG_PAGE_IOC_0
733{
734 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
735 U32 Reserved1; /* 0x04 */
736 U32 Reserved2; /* 0x08 */
737 U16 VendorID; /* 0x0C */
738 U16 DeviceID; /* 0x0E */
739 U8 RevisionID; /* 0x10 */
740 U8 Reserved3; /* 0x11 */
741 U16 Reserved4; /* 0x12 */
742 U32 ClassCode; /* 0x14 */
743 U16 SubsystemVendorID; /* 0x18 */
744 U16 SubsystemID; /* 0x1A */
745} MPI2_CONFIG_PAGE_IOC_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_0,
746 Mpi2IOCPage0_t, MPI2_POINTER pMpi2IOCPage0_t;
747
748#define MPI2_IOCPAGE0_PAGEVERSION (0x02)
749
750
751/* IOC Page 1 */
752
753typedef struct _MPI2_CONFIG_PAGE_IOC_1
754{
755 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
756 U32 Flags; /* 0x04 */
757 U32 CoalescingTimeout; /* 0x08 */
758 U8 CoalescingDepth; /* 0x0C */
759 U8 PCISlotNum; /* 0x0D */
760 U8 PCIBusNum; /* 0x0E */
761 U8 PCIDomainSegment; /* 0x0F */
762 U32 Reserved1; /* 0x10 */
763 U32 Reserved2; /* 0x14 */
764} MPI2_CONFIG_PAGE_IOC_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_1,
765 Mpi2IOCPage1_t, MPI2_POINTER pMpi2IOCPage1_t;
766
767#define MPI2_IOCPAGE1_PAGEVERSION (0x05)
768
769/* defines for IOC Page 1 Flags field */
770#define MPI2_IOCPAGE1_REPLY_COALESCING (0x00000001)
771
772#define MPI2_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF)
773#define MPI2_IOCPAGE1_PCIBUSNUM_UNKNOWN (0xFF)
774#define MPI2_IOCPAGE1_PCIDOMAIN_UNKNOWN (0xFF)
775
776/* IOC Page 6 */
777
778typedef struct _MPI2_CONFIG_PAGE_IOC_6
779{
780 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
781 U32 CapabilitiesFlags; /* 0x04 */
782 U8 MaxDrivesRAID0; /* 0x08 */
783 U8 MaxDrivesRAID1; /* 0x09 */
784 U8 MaxDrivesRAID1E; /* 0x0A */
785 U8 MaxDrivesRAID10; /* 0x0B */
786 U8 MinDrivesRAID0; /* 0x0C */
787 U8 MinDrivesRAID1; /* 0x0D */
788 U8 MinDrivesRAID1E; /* 0x0E */
789 U8 MinDrivesRAID10; /* 0x0F */
790 U32 Reserved1; /* 0x10 */
791 U8 MaxGlobalHotSpares; /* 0x14 */
792 U8 MaxPhysDisks; /* 0x15 */
793 U8 MaxVolumes; /* 0x16 */
794 U8 MaxConfigs; /* 0x17 */
795 U8 MaxOCEDisks; /* 0x18 */
796 U8 Reserved2; /* 0x19 */
797 U16 Reserved3; /* 0x1A */
798 U32 SupportedStripeSizeMapRAID0; /* 0x1C */
799 U32 SupportedStripeSizeMapRAID1E; /* 0x20 */
800 U32 SupportedStripeSizeMapRAID10; /* 0x24 */
801 U32 Reserved4; /* 0x28 */
802 U32 Reserved5; /* 0x2C */
803 U16 DefaultMetadataSize; /* 0x30 */
804 U16 Reserved6; /* 0x32 */
805 U16 MaxBadBlockTableEntries; /* 0x34 */
806 U16 Reserved7; /* 0x36 */
807 U32 IRNvsramVersion; /* 0x38 */
808} MPI2_CONFIG_PAGE_IOC_6, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_6,
809 Mpi2IOCPage6_t, MPI2_POINTER pMpi2IOCPage6_t;
810
811#define MPI2_IOCPAGE6_PAGEVERSION (0x04)
812
813/* defines for IOC Page 6 CapabilitiesFlags */
814#define MPI2_IOCPAGE6_CAP_FLAGS_RAID10_SUPPORT (0x00000010)
815#define MPI2_IOCPAGE6_CAP_FLAGS_RAID1_SUPPORT (0x00000008)
816#define MPI2_IOCPAGE6_CAP_FLAGS_RAID1E_SUPPORT (0x00000004)
817#define MPI2_IOCPAGE6_CAP_FLAGS_RAID0_SUPPORT (0x00000002)
818#define MPI2_IOCPAGE6_CAP_FLAGS_GLOBAL_HOT_SPARE (0x00000001)
819
820
821/* IOC Page 7 */
822
823#define MPI2_IOCPAGE7_EVENTMASK_WORDS (4)
824
825typedef struct _MPI2_CONFIG_PAGE_IOC_7
826{
827 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
828 U32 Reserved1; /* 0x04 */
829 U32 EventMasks[MPI2_IOCPAGE7_EVENTMASK_WORDS];/* 0x08 */
830 U16 SASBroadcastPrimitiveMasks; /* 0x18 */
831 U16 Reserved2; /* 0x1A */
832 U32 Reserved3; /* 0x1C */
833} MPI2_CONFIG_PAGE_IOC_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_7,
834 Mpi2IOCPage7_t, MPI2_POINTER pMpi2IOCPage7_t;
835
836#define MPI2_IOCPAGE7_PAGEVERSION (0x01)
837
838
839/* IOC Page 8 */
840
841typedef struct _MPI2_CONFIG_PAGE_IOC_8
842{
843 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
844 U8 NumDevsPerEnclosure; /* 0x04 */
845 U8 Reserved1; /* 0x05 */
846 U16 Reserved2; /* 0x06 */
847 U16 MaxPersistentEntries; /* 0x08 */
848 U16 MaxNumPhysicalMappedIDs; /* 0x0A */
849 U16 Flags; /* 0x0C */
850 U16 Reserved3; /* 0x0E */
851 U16 IRVolumeMappingFlags; /* 0x10 */
852 U16 Reserved4; /* 0x12 */
853 U32 Reserved5; /* 0x14 */
854} MPI2_CONFIG_PAGE_IOC_8, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_8,
855 Mpi2IOCPage8_t, MPI2_POINTER pMpi2IOCPage8_t;
856
857#define MPI2_IOCPAGE8_PAGEVERSION (0x00)
858
859/* defines for IOC Page 8 Flags field */
860#define MPI2_IOCPAGE8_FLAGS_DA_START_SLOT_1 (0x00000020)
861#define MPI2_IOCPAGE8_FLAGS_RESERVED_TARGETID_0 (0x00000010)
862
863#define MPI2_IOCPAGE8_FLAGS_MASK_MAPPING_MODE (0x0000000E)
864#define MPI2_IOCPAGE8_FLAGS_DEVICE_PERSISTENCE_MAPPING (0x00000000)
865#define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING (0x00000002)
866
867#define MPI2_IOCPAGE8_FLAGS_DISABLE_PERSISTENT_MAPPING (0x00000001)
868#define MPI2_IOCPAGE8_FLAGS_ENABLE_PERSISTENT_MAPPING (0x00000000)
869
870/* defines for IOC Page 8 IRVolumeMappingFlags */
871#define MPI2_IOCPAGE8_IRFLAGS_MASK_VOLUME_MAPPING_MODE (0x00000003)
872#define MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING (0x00000000)
873#define MPI2_IOCPAGE8_IRFLAGS_HIGH_VOLUME_MAPPING (0x00000001)
874
875
876/****************************************************************************
877* BIOS Config Pages
878****************************************************************************/
879
880/* BIOS Page 1 */
881
882typedef struct _MPI2_CONFIG_PAGE_BIOS_1
883{
884 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
885 U32 BiosOptions; /* 0x04 */
886 U32 IOCSettings; /* 0x08 */
887 U32 Reserved1; /* 0x0C */
888 U32 DeviceSettings; /* 0x10 */
889 U16 NumberOfDevices; /* 0x14 */
890 U16 Reserved2; /* 0x16 */
891 U16 IOTimeoutBlockDevicesNonRM; /* 0x18 */
892 U16 IOTimeoutSequential; /* 0x1A */
893 U16 IOTimeoutOther; /* 0x1C */
894 U16 IOTimeoutBlockDevicesRM; /* 0x1E */
895} MPI2_CONFIG_PAGE_BIOS_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_1,
896 Mpi2BiosPage1_t, MPI2_POINTER pMpi2BiosPage1_t;
897
898#define MPI2_BIOSPAGE1_PAGEVERSION (0x04)
899
900/* values for BIOS Page 1 BiosOptions field */
901#define MPI2_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)
902
903/* values for BIOS Page 1 IOCSettings field */
904#define MPI2_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000)
905#define MPI2_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000)
906#define MPI2_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000)
907
908#define MPI2_BIOSPAGE1_IOCSET_MASK_RM_SETTING (0x000000C0)
909#define MPI2_BIOSPAGE1_IOCSET_NONE_RM_SETTING (0x00000000)
910#define MPI2_BIOSPAGE1_IOCSET_BOOT_RM_SETTING (0x00000040)
911#define MPI2_BIOSPAGE1_IOCSET_MEDIA_RM_SETTING (0x00000080)
912
913#define MPI2_BIOSPAGE1_IOCSET_MASK_ADAPTER_SUPPORT (0x00000030)
914#define MPI2_BIOSPAGE1_IOCSET_NO_SUPPORT (0x00000000)
915#define MPI2_BIOSPAGE1_IOCSET_BIOS_SUPPORT (0x00000010)
916#define MPI2_BIOSPAGE1_IOCSET_OS_SUPPORT (0x00000020)
917#define MPI2_BIOSPAGE1_IOCSET_ALL_SUPPORT (0x00000030)
918
919#define MPI2_BIOSPAGE1_IOCSET_ALTERNATE_CHS (0x00000008)
920
921/* values for BIOS Page 1 DeviceSettings field */
922#define MPI2_BIOSPAGE1_DEVSET_DISABLE_SMART_POLLING (0x00000010)
923#define MPI2_BIOSPAGE1_DEVSET_DISABLE_SEQ_LUN (0x00000008)
924#define MPI2_BIOSPAGE1_DEVSET_DISABLE_RM_LUN (0x00000004)
925#define MPI2_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002)
926#define MPI2_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001)
927
928
929/* BIOS Page 2 */
930
931typedef struct _MPI2_BOOT_DEVICE_ADAPTER_ORDER
932{
933 U32 Reserved1; /* 0x00 */
934 U32 Reserved2; /* 0x04 */
935 U32 Reserved3; /* 0x08 */
936 U32 Reserved4; /* 0x0C */
937 U32 Reserved5; /* 0x10 */
938 U32 Reserved6; /* 0x14 */
939} MPI2_BOOT_DEVICE_ADAPTER_ORDER,
940 MPI2_POINTER PTR_MPI2_BOOT_DEVICE_ADAPTER_ORDER,
941 Mpi2BootDeviceAdapterOrder_t, MPI2_POINTER pMpi2BootDeviceAdapterOrder_t;
942
943typedef struct _MPI2_BOOT_DEVICE_SAS_WWID
944{
945 U64 SASAddress; /* 0x00 */
946 U8 LUN[8]; /* 0x08 */
947 U32 Reserved1; /* 0x10 */
948 U32 Reserved2; /* 0x14 */
949} MPI2_BOOT_DEVICE_SAS_WWID, MPI2_POINTER PTR_MPI2_BOOT_DEVICE_SAS_WWID,
950 Mpi2BootDeviceSasWwid_t, MPI2_POINTER pMpi2BootDeviceSasWwid_t;
951
952typedef struct _MPI2_BOOT_DEVICE_ENCLOSURE_SLOT
953{
954 U64 EnclosureLogicalID; /* 0x00 */
955 U32 Reserved1; /* 0x08 */
956 U32 Reserved2; /* 0x0C */
957 U16 SlotNumber; /* 0x10 */
958 U16 Reserved3; /* 0x12 */
959 U32 Reserved4; /* 0x14 */
960} MPI2_BOOT_DEVICE_ENCLOSURE_SLOT,
961 MPI2_POINTER PTR_MPI2_BOOT_DEVICE_ENCLOSURE_SLOT,
962 Mpi2BootDeviceEnclosureSlot_t, MPI2_POINTER pMpi2BootDeviceEnclosureSlot_t;
963
964typedef struct _MPI2_BOOT_DEVICE_DEVICE_NAME
965{
966 U64 DeviceName; /* 0x00 */
967 U8 LUN[8]; /* 0x08 */
968 U32 Reserved1; /* 0x10 */
969 U32 Reserved2; /* 0x14 */
970} MPI2_BOOT_DEVICE_DEVICE_NAME, MPI2_POINTER PTR_MPI2_BOOT_DEVICE_DEVICE_NAME,
971 Mpi2BootDeviceDeviceName_t, MPI2_POINTER pMpi2BootDeviceDeviceName_t;
972
973typedef union _MPI2_MPI2_BIOSPAGE2_BOOT_DEVICE
974{
975 MPI2_BOOT_DEVICE_ADAPTER_ORDER AdapterOrder;
976 MPI2_BOOT_DEVICE_SAS_WWID SasWwid;
977 MPI2_BOOT_DEVICE_ENCLOSURE_SLOT EnclosureSlot;
978 MPI2_BOOT_DEVICE_DEVICE_NAME DeviceName;
979} MPI2_BIOSPAGE2_BOOT_DEVICE, MPI2_POINTER PTR_MPI2_BIOSPAGE2_BOOT_DEVICE,
980 Mpi2BiosPage2BootDevice_t, MPI2_POINTER pMpi2BiosPage2BootDevice_t;
981
982typedef struct _MPI2_CONFIG_PAGE_BIOS_2
983{
984 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
985 U32 Reserved1; /* 0x04 */
986 U32 Reserved2; /* 0x08 */
987 U32 Reserved3; /* 0x0C */
988 U32 Reserved4; /* 0x10 */
989 U32 Reserved5; /* 0x14 */
990 U32 Reserved6; /* 0x18 */
991 U8 ReqBootDeviceForm; /* 0x1C */
992 U8 Reserved7; /* 0x1D */
993 U16 Reserved8; /* 0x1E */
994 MPI2_BIOSPAGE2_BOOT_DEVICE RequestedBootDevice; /* 0x20 */
995 U8 ReqAltBootDeviceForm; /* 0x38 */
996 U8 Reserved9; /* 0x39 */
997 U16 Reserved10; /* 0x3A */
998 MPI2_BIOSPAGE2_BOOT_DEVICE RequestedAltBootDevice; /* 0x3C */
999 U8 CurrentBootDeviceForm; /* 0x58 */
1000 U8 Reserved11; /* 0x59 */
1001 U16 Reserved12; /* 0x5A */
1002 MPI2_BIOSPAGE2_BOOT_DEVICE CurrentBootDevice; /* 0x58 */
1003} MPI2_CONFIG_PAGE_BIOS_2, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_2,
1004 Mpi2BiosPage2_t, MPI2_POINTER pMpi2BiosPage2_t;
1005
1006#define MPI2_BIOSPAGE2_PAGEVERSION (0x04)
1007
1008/* values for BIOS Page 2 BootDeviceForm fields */
1009#define MPI2_BIOSPAGE2_FORM_MASK (0x0F)
1010#define MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED (0x00)
1011#define MPI2_BIOSPAGE2_FORM_SAS_WWID (0x05)
1012#define MPI2_BIOSPAGE2_FORM_ENCLOSURE_SLOT (0x06)
1013#define MPI2_BIOSPAGE2_FORM_DEVICE_NAME (0x07)
1014
1015
1016/* BIOS Page 3 */
1017
1018typedef struct _MPI2_ADAPTER_INFO
1019{
1020 U8 PciBusNumber; /* 0x00 */
1021 U8 PciDeviceAndFunctionNumber; /* 0x01 */
1022 U16 AdapterFlags; /* 0x02 */
1023} MPI2_ADAPTER_INFO, MPI2_POINTER PTR_MPI2_ADAPTER_INFO,
1024 Mpi2AdapterInfo_t, MPI2_POINTER pMpi2AdapterInfo_t;
1025
1026#define MPI2_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001)
1027#define MPI2_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002)
1028
1029typedef struct _MPI2_CONFIG_PAGE_BIOS_3
1030{
1031 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
1032 U32 GlobalFlags; /* 0x04 */
1033 U32 BiosVersion; /* 0x08 */
1034 MPI2_ADAPTER_INFO AdapterOrder[4]; /* 0x0C */
1035 U32 Reserved1; /* 0x1C */
1036} MPI2_CONFIG_PAGE_BIOS_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_3,
1037 Mpi2BiosPage3_t, MPI2_POINTER pMpi2BiosPage3_t;
1038
1039#define MPI2_BIOSPAGE3_PAGEVERSION (0x00)
1040
1041/* values for BIOS Page 3 GlobalFlags */
1042#define MPI2_BIOSPAGE3_FLAGS_PAUSE_ON_ERROR (0x00000002)
1043#define MPI2_BIOSPAGE3_FLAGS_VERBOSE_ENABLE (0x00000004)
1044#define MPI2_BIOSPAGE3_FLAGS_HOOK_INT_40_DISABLE (0x00000010)
1045
1046#define MPI2_BIOSPAGE3_FLAGS_DEV_LIST_DISPLAY_MASK (0x000000E0)
1047#define MPI2_BIOSPAGE3_FLAGS_INSTALLED_DEV_DISPLAY (0x00000000)
1048#define MPI2_BIOSPAGE3_FLAGS_ADAPTER_DISPLAY (0x00000020)
1049#define MPI2_BIOSPAGE3_FLAGS_ADAPTER_DEV_DISPLAY (0x00000040)
1050
1051
1052/* BIOS Page 4 */
1053
1054/*
1055 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1056 * one and check Header.PageLength or NumPhys at runtime.
1057 */
1058#ifndef MPI2_BIOS_PAGE_4_PHY_ENTRIES
1059#define MPI2_BIOS_PAGE_4_PHY_ENTRIES (1)
1060#endif
1061
1062typedef struct _MPI2_BIOS4_ENTRY
1063{
1064 U64 ReassignmentWWID; /* 0x00 */
1065 U64 ReassignmentDeviceName; /* 0x08 */
1066} MPI2_BIOS4_ENTRY, MPI2_POINTER PTR_MPI2_BIOS4_ENTRY,
1067 Mpi2MBios4Entry_t, MPI2_POINTER pMpi2Bios4Entry_t;
1068
1069typedef struct _MPI2_CONFIG_PAGE_BIOS_4
1070{
1071 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
1072 U8 NumPhys; /* 0x04 */
1073 U8 Reserved1; /* 0x05 */
1074 U16 Reserved2; /* 0x06 */
1075 MPI2_BIOS4_ENTRY Phy[MPI2_BIOS_PAGE_4_PHY_ENTRIES]; /* 0x08 */
1076} MPI2_CONFIG_PAGE_BIOS_4, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_4,
1077 Mpi2BiosPage4_t, MPI2_POINTER pMpi2BiosPage4_t;
1078
1079#define MPI2_BIOSPAGE4_PAGEVERSION (0x01)
1080
1081
1082/****************************************************************************
1083* RAID Volume Config Pages
1084****************************************************************************/
1085
1086/* RAID Volume Page 0 */
1087
1088typedef struct _MPI2_RAIDVOL0_PHYS_DISK
1089{
1090 U8 RAIDSetNum; /* 0x00 */
1091 U8 PhysDiskMap; /* 0x01 */
1092 U8 PhysDiskNum; /* 0x02 */
1093 U8 Reserved; /* 0x03 */
1094} MPI2_RAIDVOL0_PHYS_DISK, MPI2_POINTER PTR_MPI2_RAIDVOL0_PHYS_DISK,
1095 Mpi2RaidVol0PhysDisk_t, MPI2_POINTER pMpi2RaidVol0PhysDisk_t;
1096
1097/* defines for the PhysDiskMap field */
1098#define MPI2_RAIDVOL0_PHYSDISK_PRIMARY (0x01)
1099#define MPI2_RAIDVOL0_PHYSDISK_SECONDARY (0x02)
1100
1101typedef struct _MPI2_RAIDVOL0_SETTINGS
1102{
1103 U16 Settings; /* 0x00 */
1104 U8 HotSparePool; /* 0x01 */
1105 U8 Reserved; /* 0x02 */
1106} MPI2_RAIDVOL0_SETTINGS, MPI2_POINTER PTR_MPI2_RAIDVOL0_SETTINGS,
1107 Mpi2RaidVol0Settings_t, MPI2_POINTER pMpi2RaidVol0Settings_t;
1108
1109/* RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk */
1110#define MPI2_RAID_HOT_SPARE_POOL_0 (0x01)
1111#define MPI2_RAID_HOT_SPARE_POOL_1 (0x02)
1112#define MPI2_RAID_HOT_SPARE_POOL_2 (0x04)
1113#define MPI2_RAID_HOT_SPARE_POOL_3 (0x08)
1114#define MPI2_RAID_HOT_SPARE_POOL_4 (0x10)
1115#define MPI2_RAID_HOT_SPARE_POOL_5 (0x20)
1116#define MPI2_RAID_HOT_SPARE_POOL_6 (0x40)
1117#define MPI2_RAID_HOT_SPARE_POOL_7 (0x80)
1118
1119/* RAID Volume Page 0 VolumeSettings defines */
1120#define MPI2_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0008)
1121#define MPI2_RAIDVOL0_SETTING_AUTO_CONFIG_HSWAP_DISABLE (0x0004)
1122
1123#define MPI2_RAIDVOL0_SETTING_MASK_WRITE_CACHING (0x0003)
1124#define MPI2_RAIDVOL0_SETTING_UNCHANGED (0x0000)
1125#define MPI2_RAIDVOL0_SETTING_DISABLE_WRITE_CACHING (0x0001)
1126#define MPI2_RAIDVOL0_SETTING_ENABLE_WRITE_CACHING (0x0002)
1127
1128/*
1129 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1130 * one and check Header.PageLength at runtime.
1131 */
1132#ifndef MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX
1133#define MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX (1)
1134#endif
1135
1136typedef struct _MPI2_CONFIG_PAGE_RAID_VOL_0
1137{
1138 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
1139 U16 DevHandle; /* 0x04 */
1140 U8 VolumeState; /* 0x06 */
1141 U8 VolumeType; /* 0x07 */
1142 U32 VolumeStatusFlags; /* 0x08 */
1143 MPI2_RAIDVOL0_SETTINGS VolumeSettings; /* 0x0C */
1144 U64 MaxLBA; /* 0x10 */
1145 U32 StripeSize; /* 0x18 */
1146 U16 BlockSize; /* 0x1C */
1147 U16 Reserved1; /* 0x1E */
1148 U8 SupportedPhysDisks; /* 0x20 */
1149 U8 ResyncRate; /* 0x21 */
1150 U16 DataScrubDuration; /* 0x22 */
1151 U8 NumPhysDisks; /* 0x24 */
1152 U8 Reserved2; /* 0x25 */
1153 U8 Reserved3; /* 0x26 */
1154 U8 InactiveStatus; /* 0x27 */
1155 MPI2_RAIDVOL0_PHYS_DISK PhysDisk[MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX]; /* 0x28 */
1156} MPI2_CONFIG_PAGE_RAID_VOL_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_VOL_0,
1157 Mpi2RaidVolPage0_t, MPI2_POINTER pMpi2RaidVolPage0_t;
1158
1159#define MPI2_RAIDVOLPAGE0_PAGEVERSION (0x0A)
1160
1161/* values for RAID VolumeState */
1162#define MPI2_RAID_VOL_STATE_MISSING (0x00)
1163#define MPI2_RAID_VOL_STATE_FAILED (0x01)
1164#define MPI2_RAID_VOL_STATE_INITIALIZING (0x02)
1165#define MPI2_RAID_VOL_STATE_ONLINE (0x03)
1166#define MPI2_RAID_VOL_STATE_DEGRADED (0x04)
1167#define MPI2_RAID_VOL_STATE_OPTIMAL (0x05)
1168
1169/* values for RAID VolumeType */
1170#define MPI2_RAID_VOL_TYPE_RAID0 (0x00)
1171#define MPI2_RAID_VOL_TYPE_RAID1E (0x01)
1172#define MPI2_RAID_VOL_TYPE_RAID1 (0x02)
1173#define MPI2_RAID_VOL_TYPE_RAID10 (0x05)
1174#define MPI2_RAID_VOL_TYPE_UNKNOWN (0xFF)
1175
1176/* values for RAID Volume Page 0 VolumeStatusFlags field */
1177#define MPI2_RAIDVOL0_STATUS_FLAG_PENDING_RESYNC (0x02000000)
1178#define MPI2_RAIDVOL0_STATUS_FLAG_BACKG_INIT_PENDING (0x01000000)
1179#define MPI2_RAIDVOL0_STATUS_FLAG_MDC_PENDING (0x00800000)
1180#define MPI2_RAIDVOL0_STATUS_FLAG_USER_CONSIST_PENDING (0x00400000)
1181#define MPI2_RAIDVOL0_STATUS_FLAG_MAKE_DATA_CONSISTENT (0x00200000)
1182#define MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB (0x00100000)
1183#define MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK (0x00080000)
1184#define MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION (0x00040000)
1185#define MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT (0x00020000)
1186#define MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x00010000)
1187#define MPI2_RAIDVOL0_STATUS_FLAG_OCE_ALLOWED (0x00000040)
1188#define MPI2_RAIDVOL0_STATUS_FLAG_BGI_COMPLETE (0x00000020)
1189#define MPI2_RAIDVOL0_STATUS_FLAG_1E_OFFSET_MIRROR (0x00000000)
1190#define MPI2_RAIDVOL0_STATUS_FLAG_1E_ADJACENT_MIRROR (0x00000010)
1191#define MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL (0x00000008)
1192#define MPI2_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE (0x00000004)
1193#define MPI2_RAIDVOL0_STATUS_FLAG_QUIESCED (0x00000002)
1194#define MPI2_RAIDVOL0_STATUS_FLAG_ENABLED (0x00000001)
1195
1196/* values for RAID Volume Page 0 SupportedPhysDisks field */
1197#define MPI2_RAIDVOL0_SUPPORT_SOLID_STATE_DISKS (0x08)
1198#define MPI2_RAIDVOL0_SUPPORT_HARD_DISKS (0x04)
1199#define MPI2_RAIDVOL0_SUPPORT_SAS_PROTOCOL (0x02)
1200#define MPI2_RAIDVOL0_SUPPORT_SATA_PROTOCOL (0x01)
1201
1202/* values for RAID Volume Page 0 InactiveStatus field */
1203#define MPI2_RAIDVOLPAGE0_UNKNOWN_INACTIVE (0x00)
1204#define MPI2_RAIDVOLPAGE0_STALE_METADATA_INACTIVE (0x01)
1205#define MPI2_RAIDVOLPAGE0_FOREIGN_VOLUME_INACTIVE (0x02)
1206#define MPI2_RAIDVOLPAGE0_INSUFFICIENT_RESOURCE_INACTIVE (0x03)
1207#define MPI2_RAIDVOLPAGE0_CLONE_VOLUME_INACTIVE (0x04)
1208#define MPI2_RAIDVOLPAGE0_INSUFFICIENT_METADATA_INACTIVE (0x05)
1209#define MPI2_RAIDVOLPAGE0_PREVIOUSLY_DELETED (0x06)
1210
1211
1212/* RAID Volume Page 1 */
1213
1214typedef struct _MPI2_CONFIG_PAGE_RAID_VOL_1
1215{
1216 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
1217 U16 DevHandle; /* 0x04 */
1218 U16 Reserved0; /* 0x06 */
1219 U8 GUID[24]; /* 0x08 */
1220 U8 Name[16]; /* 0x20 */
1221 U64 WWID; /* 0x30 */
1222 U32 Reserved1; /* 0x38 */
1223 U32 Reserved2; /* 0x3C */
1224} MPI2_CONFIG_PAGE_RAID_VOL_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_VOL_1,
1225 Mpi2RaidVolPage1_t, MPI2_POINTER pMpi2RaidVolPage1_t;
1226
1227#define MPI2_RAIDVOLPAGE1_PAGEVERSION (0x03)
1228
1229
1230/****************************************************************************
1231* RAID Physical Disk Config Pages
1232****************************************************************************/
1233
1234/* RAID Physical Disk Page 0 */
1235
1236typedef struct _MPI2_RAIDPHYSDISK0_SETTINGS
1237{
1238 U16 Reserved1; /* 0x00 */
1239 U8 HotSparePool; /* 0x02 */
1240 U8 Reserved2; /* 0x03 */
1241} MPI2_RAIDPHYSDISK0_SETTINGS, MPI2_POINTER PTR_MPI2_RAIDPHYSDISK0_SETTINGS,
1242 Mpi2RaidPhysDisk0Settings_t, MPI2_POINTER pMpi2RaidPhysDisk0Settings_t;
1243
1244/* use MPI2_RAID_HOT_SPARE_POOL_ defines for the HotSparePool field */
1245
1246typedef struct _MPI2_RAIDPHYSDISK0_INQUIRY_DATA
1247{
1248 U8 VendorID[8]; /* 0x00 */
1249 U8 ProductID[16]; /* 0x08 */
1250 U8 ProductRevLevel[4]; /* 0x18 */
1251 U8 SerialNum[32]; /* 0x1C */
1252} MPI2_RAIDPHYSDISK0_INQUIRY_DATA,
1253 MPI2_POINTER PTR_MPI2_RAIDPHYSDISK0_INQUIRY_DATA,
1254 Mpi2RaidPhysDisk0InquiryData_t, MPI2_POINTER pMpi2RaidPhysDisk0InquiryData_t;
1255
1256typedef struct _MPI2_CONFIG_PAGE_RD_PDISK_0
1257{
1258 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
1259 U16 DevHandle; /* 0x04 */
1260 U8 Reserved1; /* 0x06 */
1261 U8 PhysDiskNum; /* 0x07 */
1262 MPI2_RAIDPHYSDISK0_SETTINGS PhysDiskSettings; /* 0x08 */
1263 U32 Reserved2; /* 0x0C */
1264 MPI2_RAIDPHYSDISK0_INQUIRY_DATA InquiryData; /* 0x10 */
1265 U32 Reserved3; /* 0x4C */
1266 U8 PhysDiskState; /* 0x50 */
1267 U8 OfflineReason; /* 0x51 */
1268 U8 IncompatibleReason; /* 0x52 */
1269 U8 PhysDiskAttributes; /* 0x53 */
1270 U32 PhysDiskStatusFlags; /* 0x54 */
1271 U64 DeviceMaxLBA; /* 0x58 */
1272 U64 HostMaxLBA; /* 0x60 */
1273 U64 CoercedMaxLBA; /* 0x68 */
1274 U16 BlockSize; /* 0x70 */
1275 U16 Reserved5; /* 0x72 */
1276 U32 Reserved6; /* 0x74 */
1277} MPI2_CONFIG_PAGE_RD_PDISK_0,
1278 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RD_PDISK_0,
1279 Mpi2RaidPhysDiskPage0_t, MPI2_POINTER pMpi2RaidPhysDiskPage0_t;
1280
1281#define MPI2_RAIDPHYSDISKPAGE0_PAGEVERSION (0x05)
1282
1283/* PhysDiskState defines */
1284#define MPI2_RAID_PD_STATE_NOT_CONFIGURED (0x00)
1285#define MPI2_RAID_PD_STATE_NOT_COMPATIBLE (0x01)
1286#define MPI2_RAID_PD_STATE_OFFLINE (0x02)
1287#define MPI2_RAID_PD_STATE_ONLINE (0x03)
1288#define MPI2_RAID_PD_STATE_HOT_SPARE (0x04)
1289#define MPI2_RAID_PD_STATE_DEGRADED (0x05)
1290#define MPI2_RAID_PD_STATE_REBUILDING (0x06)
1291#define MPI2_RAID_PD_STATE_OPTIMAL (0x07)
1292
1293/* OfflineReason defines */
1294#define MPI2_PHYSDISK0_ONLINE (0x00)
1295#define MPI2_PHYSDISK0_OFFLINE_MISSING (0x01)
1296#define MPI2_PHYSDISK0_OFFLINE_FAILED (0x03)
1297#define MPI2_PHYSDISK0_OFFLINE_INITIALIZING (0x04)
1298#define MPI2_PHYSDISK0_OFFLINE_REQUESTED (0x05)
1299#define MPI2_PHYSDISK0_OFFLINE_FAILED_REQUESTED (0x06)
1300#define MPI2_PHYSDISK0_OFFLINE_OTHER (0xFF)
1301
1302/* IncompatibleReason defines */
1303#define MPI2_PHYSDISK0_COMPATIBLE (0x00)
1304#define MPI2_PHYSDISK0_INCOMPATIBLE_PROTOCOL (0x01)
1305#define MPI2_PHYSDISK0_INCOMPATIBLE_BLOCKSIZE (0x02)
1306#define MPI2_PHYSDISK0_INCOMPATIBLE_MAX_LBA (0x03)
1307#define MPI2_PHYSDISK0_INCOMPATIBLE_SATA_EXTENDED_CMD (0x04)
1308#define MPI2_PHYSDISK0_INCOMPATIBLE_REMOVEABLE_MEDIA (0x05)
1309#define MPI2_PHYSDISK0_INCOMPATIBLE_UNKNOWN (0xFF)
1310
1311/* PhysDiskAttributes defines */
1312#define MPI2_PHYSDISK0_ATTRIB_SOLID_STATE_DRIVE (0x08)
1313#define MPI2_PHYSDISK0_ATTRIB_HARD_DISK_DRIVE (0x04)
1314#define MPI2_PHYSDISK0_ATTRIB_SAS_PROTOCOL (0x02)
1315#define MPI2_PHYSDISK0_ATTRIB_SATA_PROTOCOL (0x01)
1316
1317/* PhysDiskStatusFlags defines */
1318#define MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED (0x00000040)
1319#define MPI2_PHYSDISK0_STATUS_FLAG_OCE_TARGET (0x00000020)
1320#define MPI2_PHYSDISK0_STATUS_FLAG_WRITE_CACHE_ENABLED (0x00000010)
1321#define MPI2_PHYSDISK0_STATUS_FLAG_OPTIMAL_PREVIOUS (0x00000000)
1322#define MPI2_PHYSDISK0_STATUS_FLAG_NOT_OPTIMAL_PREVIOUS (0x00000008)
1323#define MPI2_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME (0x00000004)
1324#define MPI2_PHYSDISK0_STATUS_FLAG_QUIESCED (0x00000002)
1325#define MPI2_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x00000001)
1326
1327
1328/* RAID Physical Disk Page 1 */
1329
1330/*
1331 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1332 * one and check Header.PageLength or NumPhysDiskPaths at runtime.
1333 */
1334#ifndef MPI2_RAID_PHYS_DISK1_PATH_MAX
1335#define MPI2_RAID_PHYS_DISK1_PATH_MAX (1)
1336#endif
1337
1338typedef struct _MPI2_RAIDPHYSDISK1_PATH
1339{
1340 U16 DevHandle; /* 0x00 */
1341 U16 Reserved1; /* 0x02 */
1342 U64 WWID; /* 0x04 */
1343 U64 OwnerWWID; /* 0x0C */
1344 U8 OwnerIdentifier; /* 0x14 */
1345 U8 Reserved2; /* 0x15 */
1346 U16 Flags; /* 0x16 */
1347} MPI2_RAIDPHYSDISK1_PATH, MPI2_POINTER PTR_MPI2_RAIDPHYSDISK1_PATH,
1348 Mpi2RaidPhysDisk1Path_t, MPI2_POINTER pMpi2RaidPhysDisk1Path_t;
1349
1350/* RAID Physical Disk Page 1 Physical Disk Path Flags field defines */
1351#define MPI2_RAID_PHYSDISK1_FLAG_PRIMARY (0x0004)
1352#define MPI2_RAID_PHYSDISK1_FLAG_BROKEN (0x0002)
1353#define MPI2_RAID_PHYSDISK1_FLAG_INVALID (0x0001)
1354
1355typedef struct _MPI2_CONFIG_PAGE_RD_PDISK_1
1356{
1357 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
1358 U8 NumPhysDiskPaths; /* 0x04 */
1359 U8 PhysDiskNum; /* 0x05 */
1360 U16 Reserved1; /* 0x06 */
1361 U32 Reserved2; /* 0x08 */
1362 MPI2_RAIDPHYSDISK1_PATH PhysicalDiskPath[MPI2_RAID_PHYS_DISK1_PATH_MAX];/* 0x0C */
1363} MPI2_CONFIG_PAGE_RD_PDISK_1,
1364 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RD_PDISK_1,
1365 Mpi2RaidPhysDiskPage1_t, MPI2_POINTER pMpi2RaidPhysDiskPage1_t;
1366
1367#define MPI2_RAIDPHYSDISKPAGE1_PAGEVERSION (0x02)
1368
1369
1370/****************************************************************************
1371* values for fields used by several types of SAS Config Pages
1372****************************************************************************/
1373
1374/* values for NegotiatedLinkRates fields */
1375#define MPI2_SAS_NEG_LINK_RATE_MASK_LOGICAL (0xF0)
1376#define MPI2_SAS_NEG_LINK_RATE_SHIFT_LOGICAL (4)
1377#define MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL (0x0F)
1378/* link rates used for Negotiated Physical and Logical Link Rate */
1379#define MPI2_SAS_NEG_LINK_RATE_UNKNOWN_LINK_RATE (0x00)
1380#define MPI2_SAS_NEG_LINK_RATE_PHY_DISABLED (0x01)
1381#define MPI2_SAS_NEG_LINK_RATE_NEGOTIATION_FAILED (0x02)
1382#define MPI2_SAS_NEG_LINK_RATE_SATA_OOB_COMPLETE (0x03)
1383#define MPI2_SAS_NEG_LINK_RATE_PORT_SELECTOR (0x04)
1384#define MPI2_SAS_NEG_LINK_RATE_SMP_RESET_IN_PROGRESS (0x05)
1385#define MPI2_SAS_NEG_LINK_RATE_1_5 (0x08)
1386#define MPI2_SAS_NEG_LINK_RATE_3_0 (0x09)
1387#define MPI2_SAS_NEG_LINK_RATE_6_0 (0x0A)
1388
1389
1390/* values for AttachedPhyInfo fields */
1391#define MPI2_SAS_APHYINFO_INSIDE_ZPSDS_PERSISTENT (0x00000040)
1392#define MPI2_SAS_APHYINFO_REQUESTED_INSIDE_ZPSDS (0x00000020)
1393#define MPI2_SAS_APHYINFO_BREAK_REPLY_CAPABLE (0x00000010)
1394
1395#define MPI2_SAS_APHYINFO_REASON_MASK (0x0000000F)
1396#define MPI2_SAS_APHYINFO_REASON_UNKNOWN (0x00000000)
1397#define MPI2_SAS_APHYINFO_REASON_POWER_ON (0x00000001)
1398#define MPI2_SAS_APHYINFO_REASON_HARD_RESET (0x00000002)
1399#define MPI2_SAS_APHYINFO_REASON_SMP_PHY_CONTROL (0x00000003)
1400#define MPI2_SAS_APHYINFO_REASON_LOSS_OF_SYNC (0x00000004)
1401#define MPI2_SAS_APHYINFO_REASON_MULTIPLEXING_SEQ (0x00000005)
1402#define MPI2_SAS_APHYINFO_REASON_IT_NEXUS_LOSS_TIMER (0x00000006)
1403#define MPI2_SAS_APHYINFO_REASON_BREAK_TIMEOUT (0x00000007)
1404#define MPI2_SAS_APHYINFO_REASON_PHY_TEST_STOPPED (0x00000008)
1405
1406
1407/* values for PhyInfo fields */
1408#define MPI2_SAS_PHYINFO_PHY_VACANT (0x80000000)
1409#define MPI2_SAS_PHYINFO_CHANGED_REQ_INSIDE_ZPSDS (0x04000000)
1410#define MPI2_SAS_PHYINFO_INSIDE_ZPSDS_PERSISTENT (0x02000000)
1411#define MPI2_SAS_PHYINFO_REQ_INSIDE_ZPSDS (0x01000000)
1412#define MPI2_SAS_PHYINFO_ZONE_GROUP_PERSISTENT (0x00400000)
1413#define MPI2_SAS_PHYINFO_INSIDE_ZPSDS (0x00200000)
1414#define MPI2_SAS_PHYINFO_ZONING_ENABLED (0x00100000)
1415
1416#define MPI2_SAS_PHYINFO_REASON_MASK (0x000F0000)
1417#define MPI2_SAS_PHYINFO_REASON_UNKNOWN (0x00000000)
1418#define MPI2_SAS_PHYINFO_REASON_POWER_ON (0x00010000)
1419#define MPI2_SAS_PHYINFO_REASON_HARD_RESET (0x00020000)
1420#define MPI2_SAS_PHYINFO_REASON_SMP_PHY_CONTROL (0x00030000)
1421#define MPI2_SAS_PHYINFO_REASON_LOSS_OF_SYNC (0x00040000)
1422#define MPI2_SAS_PHYINFO_REASON_MULTIPLEXING_SEQ (0x00050000)
1423#define MPI2_SAS_PHYINFO_REASON_IT_NEXUS_LOSS_TIMER (0x00060000)
1424#define MPI2_SAS_PHYINFO_REASON_BREAK_TIMEOUT (0x00070000)
1425#define MPI2_SAS_PHYINFO_REASON_PHY_TEST_STOPPED (0x00080000)
1426
1427#define MPI2_SAS_PHYINFO_MULTIPLEXING_SUPPORTED (0x00008000)
1428#define MPI2_SAS_PHYINFO_SATA_PORT_ACTIVE (0x00004000)
1429#define MPI2_SAS_PHYINFO_SATA_PORT_SELECTOR_PRESENT (0x00002000)
1430#define MPI2_SAS_PHYINFO_VIRTUAL_PHY (0x00001000)
1431
1432#define MPI2_SAS_PHYINFO_MASK_PARTIAL_PATHWAY_TIME (0x00000F00)
1433#define MPI2_SAS_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME (8)
1434
1435#define MPI2_SAS_PHYINFO_MASK_ROUTING_ATTRIBUTE (0x000000F0)
1436#define MPI2_SAS_PHYINFO_DIRECT_ROUTING (0x00000000)
1437#define MPI2_SAS_PHYINFO_SUBTRACTIVE_ROUTING (0x00000010)
1438#define MPI2_SAS_PHYINFO_TABLE_ROUTING (0x00000020)
1439
1440
1441/* values for SAS ProgrammedLinkRate fields */
1442#define MPI2_SAS_PRATE_MAX_RATE_MASK (0xF0)
1443#define MPI2_SAS_PRATE_MAX_RATE_NOT_PROGRAMMABLE (0x00)
1444#define MPI2_SAS_PRATE_MAX_RATE_1_5 (0x80)
1445#define MPI2_SAS_PRATE_MAX_RATE_3_0 (0x90)
1446#define MPI2_SAS_PRATE_MAX_RATE_6_0 (0xA0)
1447#define MPI2_SAS_PRATE_MIN_RATE_MASK (0x0F)
1448#define MPI2_SAS_PRATE_MIN_RATE_NOT_PROGRAMMABLE (0x00)
1449#define MPI2_SAS_PRATE_MIN_RATE_1_5 (0x08)
1450#define MPI2_SAS_PRATE_MIN_RATE_3_0 (0x09)
1451#define MPI2_SAS_PRATE_MIN_RATE_6_0 (0x0A)
1452
1453
1454/* values for SAS HwLinkRate fields */
1455#define MPI2_SAS_HWRATE_MAX_RATE_MASK (0xF0)
1456#define MPI2_SAS_HWRATE_MAX_RATE_1_5 (0x80)
1457#define MPI2_SAS_HWRATE_MAX_RATE_3_0 (0x90)
1458#define MPI2_SAS_HWRATE_MAX_RATE_6_0 (0xA0)
1459#define MPI2_SAS_HWRATE_MIN_RATE_MASK (0x0F)
1460#define MPI2_SAS_HWRATE_MIN_RATE_1_5 (0x08)
1461#define MPI2_SAS_HWRATE_MIN_RATE_3_0 (0x09)
1462#define MPI2_SAS_HWRATE_MIN_RATE_6_0 (0x0A)
1463
1464
1465
1466/****************************************************************************
1467* SAS IO Unit Config Pages
1468****************************************************************************/
1469
1470/* SAS IO Unit Page 0 */
1471
1472typedef struct _MPI2_SAS_IO_UNIT0_PHY_DATA
1473{
1474 U8 Port; /* 0x00 */
1475 U8 PortFlags; /* 0x01 */
1476 U8 PhyFlags; /* 0x02 */
1477 U8 NegotiatedLinkRate; /* 0x03 */
1478 U32 ControllerPhyDeviceInfo;/* 0x04 */
1479 U16 AttachedDevHandle; /* 0x08 */
1480 U16 ControllerDevHandle; /* 0x0A */
1481 U32 DiscoveryStatus; /* 0x0C */
1482 U32 Reserved; /* 0x10 */
1483} MPI2_SAS_IO_UNIT0_PHY_DATA, MPI2_POINTER PTR_MPI2_SAS_IO_UNIT0_PHY_DATA,
1484 Mpi2SasIOUnit0PhyData_t, MPI2_POINTER pMpi2SasIOUnit0PhyData_t;
1485
1486/*
1487 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1488 * one and check Header.ExtPageLength or NumPhys at runtime.
1489 */
1490#ifndef MPI2_SAS_IOUNIT0_PHY_MAX
1491#define MPI2_SAS_IOUNIT0_PHY_MAX (1)
1492#endif
1493
1494typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_0
1495{
1496 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1497 U32 Reserved1; /* 0x08 */
1498 U8 NumPhys; /* 0x0C */
1499 U8 Reserved2; /* 0x0D */
1500 U16 Reserved3; /* 0x0E */
1501 MPI2_SAS_IO_UNIT0_PHY_DATA PhyData[MPI2_SAS_IOUNIT0_PHY_MAX]; /* 0x10 */
1502} MPI2_CONFIG_PAGE_SASIOUNIT_0,
1503 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_0,
1504 Mpi2SasIOUnitPage0_t, MPI2_POINTER pMpi2SasIOUnitPage0_t;
1505
1506#define MPI2_SASIOUNITPAGE0_PAGEVERSION (0x05)
1507
1508/* values for SAS IO Unit Page 0 PortFlags */
1509#define MPI2_SASIOUNIT0_PORTFLAGS_DISCOVERY_IN_PROGRESS (0x08)
1510#define MPI2_SASIOUNIT0_PORTFLAGS_AUTO_PORT_CONFIG (0x01)
1511
1512/* values for SAS IO Unit Page 0 PhyFlags */
1513#define MPI2_SASIOUNIT0_PHYFLAGS_ZONING_ENABLED (0x10)
1514#define MPI2_SASIOUNIT0_PHYFLAGS_PHY_DISABLED (0x08)
1515
1516/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */
1517
1518/* see mpi2_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */
1519
1520/* values for SAS IO Unit Page 0 DiscoveryStatus */
1521#define MPI2_SASIOUNIT0_DS_MAX_ENCLOSURES_EXCEED (0x80000000)
1522#define MPI2_SASIOUNIT0_DS_MAX_EXPANDERS_EXCEED (0x40000000)
1523#define MPI2_SASIOUNIT0_DS_MAX_DEVICES_EXCEED (0x20000000)
1524#define MPI2_SASIOUNIT0_DS_MAX_TOPO_PHYS_EXCEED (0x10000000)
1525#define MPI2_SASIOUNIT0_DS_DOWNSTREAM_INITIATOR (0x08000000)
1526#define MPI2_SASIOUNIT0_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000)
1527#define MPI2_SASIOUNIT0_DS_EXP_MULTI_SUBTRACTIVE (0x00004000)
1528#define MPI2_SASIOUNIT0_DS_MULTI_PORT_DOMAIN (0x00002000)
1529#define MPI2_SASIOUNIT0_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000)
1530#define MPI2_SASIOUNIT0_DS_UNSUPPORTED_DEVICE (0x00000800)
1531#define MPI2_SASIOUNIT0_DS_TABLE_LINK (0x00000400)
1532#define MPI2_SASIOUNIT0_DS_SUBTRACTIVE_LINK (0x00000200)
1533#define MPI2_SASIOUNIT0_DS_SMP_CRC_ERROR (0x00000100)
1534#define MPI2_SASIOUNIT0_DS_SMP_FUNCTION_FAILED (0x00000080)
1535#define MPI2_SASIOUNIT0_DS_INDEX_NOT_EXIST (0x00000040)
1536#define MPI2_SASIOUNIT0_DS_OUT_ROUTE_ENTRIES (0x00000020)
1537#define MPI2_SASIOUNIT0_DS_SMP_TIMEOUT (0x00000010)
1538#define MPI2_SASIOUNIT0_DS_MULTIPLE_PORTS (0x00000004)
1539#define MPI2_SASIOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002)
1540#define MPI2_SASIOUNIT0_DS_LOOP_DETECTED (0x00000001)
1541
1542
1543/* SAS IO Unit Page 1 */
1544
1545typedef struct _MPI2_SAS_IO_UNIT1_PHY_DATA
1546{
1547 U8 Port; /* 0x00 */
1548 U8 PortFlags; /* 0x01 */
1549 U8 PhyFlags; /* 0x02 */
1550 U8 MaxMinLinkRate; /* 0x03 */
1551 U32 ControllerPhyDeviceInfo; /* 0x04 */
1552 U16 MaxTargetPortConnectTime; /* 0x08 */
1553 U16 Reserved1; /* 0x0A */
1554} MPI2_SAS_IO_UNIT1_PHY_DATA, MPI2_POINTER PTR_MPI2_SAS_IO_UNIT1_PHY_DATA,
1555 Mpi2SasIOUnit1PhyData_t, MPI2_POINTER pMpi2SasIOUnit1PhyData_t;
1556
1557/*
1558 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1559 * one and check Header.ExtPageLength or NumPhys at runtime.
1560 */
1561#ifndef MPI2_SAS_IOUNIT1_PHY_MAX
1562#define MPI2_SAS_IOUNIT1_PHY_MAX (1)
1563#endif
1564
1565typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1
1566{
1567 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1568 U16 ControlFlags; /* 0x08 */
1569 U16 SASNarrowMaxQueueDepth; /* 0x0A */
1570 U16 AdditionalControlFlags; /* 0x0C */
1571 U16 SASWideMaxQueueDepth; /* 0x0E */
1572 U8 NumPhys; /* 0x10 */
1573 U8 SATAMaxQDepth; /* 0x11 */
1574 U8 ReportDeviceMissingDelay; /* 0x12 */
1575 U8 IODeviceMissingDelay; /* 0x13 */
1576 MPI2_SAS_IO_UNIT1_PHY_DATA PhyData[MPI2_SAS_IOUNIT1_PHY_MAX]; /* 0x14 */
1577} MPI2_CONFIG_PAGE_SASIOUNIT_1,
1578 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_1,
1579 Mpi2SasIOUnitPage1_t, MPI2_POINTER pMpi2SasIOUnitPage1_t;
1580
1581#define MPI2_SASIOUNITPAGE1_PAGEVERSION (0x09)
1582
1583/* values for SAS IO Unit Page 1 ControlFlags */
1584#define MPI2_SASIOUNIT1_CONTROL_DEVICE_SELF_TEST (0x8000)
1585#define MPI2_SASIOUNIT1_CONTROL_SATA_3_0_MAX (0x4000)
1586#define MPI2_SASIOUNIT1_CONTROL_SATA_1_5_MAX (0x2000)
1587#define MPI2_SASIOUNIT1_CONTROL_SATA_SW_PRESERVE (0x1000)
1588
1589#define MPI2_SASIOUNIT1_CONTROL_MASK_DEV_SUPPORT (0x0600)
1590#define MPI2_SASIOUNIT1_CONTROL_SHIFT_DEV_SUPPORT (9)
1591#define MPI2_SASIOUNIT1_CONTROL_DEV_SUPPORT_BOTH (0x0)
1592#define MPI2_SASIOUNIT1_CONTROL_DEV_SAS_SUPPORT (0x1)
1593#define MPI2_SASIOUNIT1_CONTROL_DEV_SATA_SUPPORT (0x2)
1594
1595#define MPI2_SASIOUNIT1_CONTROL_SATA_48BIT_LBA_REQUIRED (0x0080)
1596#define MPI2_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED (0x0040)
1597#define MPI2_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED (0x0020)
1598#define MPI2_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED (0x0010)
1599#define MPI2_SASIOUNIT1_CONTROL_TABLE_SUBTRACTIVE_ILLEGAL (0x0008)
1600#define MPI2_SASIOUNIT1_CONTROL_SUBTRACTIVE_ILLEGAL (0x0004)
1601#define MPI2_SASIOUNIT1_CONTROL_FIRST_LVL_DISC_ONLY (0x0002)
1602#define MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001)
1603
1604/* values for SAS IO Unit Page 1 AdditionalControlFlags */
1605#define MPI2_SASIOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL (0x0080)
1606#define MPI2_SASIOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION (0x0040)
1607#define MPI2_SASIOUNIT1_ACONTROL_INVALID_TOPOLOGY_CORRECTION (0x0020)
1608#define MPI2_SASIOUNIT1_ACONTROL_PORT_ENABLE_ONLY_SATA_LINK_RESET (0x0010)
1609#define MPI2_SASIOUNIT1_ACONTROL_OTHER_AFFILIATION_SATA_LINK_RESET (0x0008)
1610#define MPI2_SASIOUNIT1_ACONTROL_SELF_AFFILIATION_SATA_LINK_RESET (0x0004)
1611#define MPI2_SASIOUNIT1_ACONTROL_NO_AFFILIATION_SATA_LINK_RESET (0x0002)
1612#define MPI2_SASIOUNIT1_ACONTROL_ALLOW_TABLE_TO_TABLE (0x0001)
1613
1614/* defines for SAS IO Unit Page 1 ReportDeviceMissingDelay */
1615#define MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK (0x7F)
1616#define MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16 (0x80)
1617
1618/* values for SAS IO Unit Page 1 PortFlags */
1619#define MPI2_SASIOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
1620
1621/* values for SAS IO Unit Page 2 PhyFlags */
1622#define MPI2_SASIOUNIT1_PHYFLAGS_ZONING_ENABLE (0x10)
1623#define MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE (0x08)
1624
1625/* values for SAS IO Unit Page 0 MaxMinLinkRate */
1626#define MPI2_SASIOUNIT1_MAX_RATE_MASK (0xF0)
1627#define MPI2_SASIOUNIT1_MAX_RATE_1_5 (0x80)
1628#define MPI2_SASIOUNIT1_MAX_RATE_3_0 (0x90)
1629#define MPI2_SASIOUNIT1_MAX_RATE_6_0 (0xA0)
1630#define MPI2_SASIOUNIT1_MIN_RATE_MASK (0x0F)
1631#define MPI2_SASIOUNIT1_MIN_RATE_1_5 (0x08)
1632#define MPI2_SASIOUNIT1_MIN_RATE_3_0 (0x09)
1633#define MPI2_SASIOUNIT1_MIN_RATE_6_0 (0x0A)
1634
1635/* see mpi2_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */
1636
1637
1638/* SAS IO Unit Page 4 */
1639
1640typedef struct _MPI2_SAS_IOUNIT4_SPINUP_GROUP
1641{
1642 U8 MaxTargetSpinup; /* 0x00 */
1643 U8 SpinupDelay; /* 0x01 */
1644 U16 Reserved1; /* 0x02 */
1645} MPI2_SAS_IOUNIT4_SPINUP_GROUP, MPI2_POINTER PTR_MPI2_SAS_IOUNIT4_SPINUP_GROUP,
1646 Mpi2SasIOUnit4SpinupGroup_t, MPI2_POINTER pMpi2SasIOUnit4SpinupGroup_t;
1647
1648/*
1649 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1650 * four and check Header.ExtPageLength or NumPhys at runtime.
1651 */
1652#ifndef MPI2_SAS_IOUNIT4_PHY_MAX
1653#define MPI2_SAS_IOUNIT4_PHY_MAX (4)
1654#endif
1655
1656typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_4
1657{
1658 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1659 MPI2_SAS_IOUNIT4_SPINUP_GROUP SpinupGroupParameters[4]; /* 0x08 */
1660 U32 Reserved1; /* 0x18 */
1661 U32 Reserved2; /* 0x1C */
1662 U32 Reserved3; /* 0x20 */
1663 U8 BootDeviceWaitTime; /* 0x24 */
1664 U8 Reserved4; /* 0x25 */
1665 U16 Reserved5; /* 0x26 */
1666 U8 NumPhys; /* 0x28 */
1667 U8 PEInitialSpinupDelay; /* 0x29 */
1668 U8 PEReplyDelay; /* 0x2A */
1669 U8 Flags; /* 0x2B */
1670 U8 PHY[MPI2_SAS_IOUNIT4_PHY_MAX]; /* 0x2C */
1671} MPI2_CONFIG_PAGE_SASIOUNIT_4,
1672 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_4,
1673 Mpi2SasIOUnitPage4_t, MPI2_POINTER pMpi2SasIOUnitPage4_t;
1674
1675#define MPI2_SASIOUNITPAGE4_PAGEVERSION (0x02)
1676
1677/* defines for Flags field */
1678#define MPI2_SASIOUNIT4_FLAGS_AUTO_PORTENABLE (0x01)
1679
1680/* defines for PHY field */
1681#define MPI2_SASIOUNIT4_PHY_SPINUP_GROUP_MASK (0x03)
1682
1683
1684/****************************************************************************
1685* SAS Expander Config Pages
1686****************************************************************************/
1687
1688/* SAS Expander Page 0 */
1689
1690typedef struct _MPI2_CONFIG_PAGE_EXPANDER_0
1691{
1692 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1693 U8 PhysicalPort; /* 0x08 */
1694 U8 ReportGenLength; /* 0x09 */
1695 U16 EnclosureHandle; /* 0x0A */
1696 U64 SASAddress; /* 0x0C */
1697 U32 DiscoveryStatus; /* 0x14 */
1698 U16 DevHandle; /* 0x18 */
1699 U16 ParentDevHandle; /* 0x1A */
1700 U16 ExpanderChangeCount; /* 0x1C */
1701 U16 ExpanderRouteIndexes; /* 0x1E */
1702 U8 NumPhys; /* 0x20 */
1703 U8 SASLevel; /* 0x21 */
1704 U16 Flags; /* 0x22 */
1705 U16 STPBusInactivityTimeLimit; /* 0x24 */
1706 U16 STPMaxConnectTimeLimit; /* 0x26 */
1707 U16 STP_SMP_NexusLossTime; /* 0x28 */
1708 U16 MaxNumRoutedSasAddresses; /* 0x2A */
1709 U64 ActiveZoneManagerSASAddress;/* 0x2C */
1710 U16 ZoneLockInactivityLimit; /* 0x34 */
1711 U16 Reserved1; /* 0x36 */
1712} MPI2_CONFIG_PAGE_EXPANDER_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXPANDER_0,
1713 Mpi2ExpanderPage0_t, MPI2_POINTER pMpi2ExpanderPage0_t;
1714
1715#define MPI2_SASEXPANDER0_PAGEVERSION (0x05)
1716
1717/* values for SAS Expander Page 0 DiscoveryStatus field */
1718#define MPI2_SAS_EXPANDER0_DS_MAX_ENCLOSURES_EXCEED (0x80000000)
1719#define MPI2_SAS_EXPANDER0_DS_MAX_EXPANDERS_EXCEED (0x40000000)
1720#define MPI2_SAS_EXPANDER0_DS_MAX_DEVICES_EXCEED (0x20000000)
1721#define MPI2_SAS_EXPANDER0_DS_MAX_TOPO_PHYS_EXCEED (0x10000000)
1722#define MPI2_SAS_EXPANDER0_DS_DOWNSTREAM_INITIATOR (0x08000000)
1723#define MPI2_SAS_EXPANDER0_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000)
1724#define MPI2_SAS_EXPANDER0_DS_EXP_MULTI_SUBTRACTIVE (0x00004000)
1725#define MPI2_SAS_EXPANDER0_DS_MULTI_PORT_DOMAIN (0x00002000)
1726#define MPI2_SAS_EXPANDER0_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000)
1727#define MPI2_SAS_EXPANDER0_DS_UNSUPPORTED_DEVICE (0x00000800)
1728#define MPI2_SAS_EXPANDER0_DS_TABLE_LINK (0x00000400)
1729#define MPI2_SAS_EXPANDER0_DS_SUBTRACTIVE_LINK (0x00000200)
1730#define MPI2_SAS_EXPANDER0_DS_SMP_CRC_ERROR (0x00000100)
1731#define MPI2_SAS_EXPANDER0_DS_SMP_FUNCTION_FAILED (0x00000080)
1732#define MPI2_SAS_EXPANDER0_DS_INDEX_NOT_EXIST (0x00000040)
1733#define MPI2_SAS_EXPANDER0_DS_OUT_ROUTE_ENTRIES (0x00000020)
1734#define MPI2_SAS_EXPANDER0_DS_SMP_TIMEOUT (0x00000010)
1735#define MPI2_SAS_EXPANDER0_DS_MULTIPLE_PORTS (0x00000004)
1736#define MPI2_SAS_EXPANDER0_DS_UNADDRESSABLE_DEVICE (0x00000002)
1737#define MPI2_SAS_EXPANDER0_DS_LOOP_DETECTED (0x00000001)
1738
1739/* values for SAS Expander Page 0 Flags field */
1740#define MPI2_SAS_EXPANDER0_FLAGS_ZONE_LOCKED (0x1000)
1741#define MPI2_SAS_EXPANDER0_FLAGS_SUPPORTED_PHYSICAL_PRES (0x0800)
1742#define MPI2_SAS_EXPANDER0_FLAGS_ASSERTED_PHYSICAL_PRES (0x0400)
1743#define MPI2_SAS_EXPANDER0_FLAGS_ZONING_SUPPORT (0x0200)
1744#define MPI2_SAS_EXPANDER0_FLAGS_ENABLED_ZONING (0x0100)
1745#define MPI2_SAS_EXPANDER0_FLAGS_TABLE_TO_TABLE_SUPPORT (0x0080)
1746#define MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE (0x0010)
1747#define MPI2_SAS_EXPANDER0_FLAGS_OTHERS_CONFIG (0x0004)
1748#define MPI2_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x0002)
1749#define MPI2_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x0001)
1750
1751
1752/* SAS Expander Page 1 */
1753
1754typedef struct _MPI2_CONFIG_PAGE_EXPANDER_1
1755{
1756 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1757 U8 PhysicalPort; /* 0x08 */
1758 U8 Reserved1; /* 0x09 */
1759 U16 Reserved2; /* 0x0A */
1760 U8 NumPhys; /* 0x0C */
1761 U8 Phy; /* 0x0D */
1762 U16 NumTableEntriesProgrammed; /* 0x0E */
1763 U8 ProgrammedLinkRate; /* 0x10 */
1764 U8 HwLinkRate; /* 0x11 */
1765 U16 AttachedDevHandle; /* 0x12 */
1766 U32 PhyInfo; /* 0x14 */
1767 U32 AttachedDeviceInfo; /* 0x18 */
1768 U16 ExpanderDevHandle; /* 0x1C */
1769 U8 ChangeCount; /* 0x1E */
1770 U8 NegotiatedLinkRate; /* 0x1F */
1771 U8 PhyIdentifier; /* 0x20 */
1772 U8 AttachedPhyIdentifier; /* 0x21 */
1773 U8 Reserved3; /* 0x22 */
1774 U8 DiscoveryInfo; /* 0x23 */
1775 U32 AttachedPhyInfo; /* 0x24 */
1776 U8 ZoneGroup; /* 0x28 */
1777 U8 SelfConfigStatus; /* 0x29 */
1778 U16 Reserved4; /* 0x2A */
1779} MPI2_CONFIG_PAGE_EXPANDER_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXPANDER_1,
1780 Mpi2ExpanderPage1_t, MPI2_POINTER pMpi2ExpanderPage1_t;
1781
1782#define MPI2_SASEXPANDER1_PAGEVERSION (0x02)
1783
1784/* use MPI2_SAS_PRATE_ defines for the ProgrammedLinkRate field */
1785
1786/* use MPI2_SAS_HWRATE_ defines for the HwLinkRate field */
1787
1788/* use MPI2_SAS_PHYINFO_ for the PhyInfo field */
1789
1790/* see mpi2_sas.h for the MPI2_SAS_DEVICE_INFO_ defines used for the AttachedDeviceInfo field */
1791
1792/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */
1793
1794/* use MPI2_SAS_APHYINFO_ defines for AttachedPhyInfo field */
1795
1796/* values for SAS Expander Page 1 DiscoveryInfo field */
1797#define MPI2_SAS_EXPANDER1_DISCINFO_BAD_PHY_DISABLED (0x04)
1798#define MPI2_SAS_EXPANDER1_DISCINFO_LINK_STATUS_CHANGE (0x02)
1799#define MPI2_SAS_EXPANDER1_DISCINFO_NO_ROUTING_ENTRIES (0x01)
1800
1801
1802/****************************************************************************
1803* SAS Device Config Pages
1804****************************************************************************/
1805
1806/* SAS Device Page 0 */
1807
1808typedef struct _MPI2_CONFIG_PAGE_SAS_DEV_0
1809{
1810 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1811 U16 Slot; /* 0x08 */
1812 U16 EnclosureHandle; /* 0x0A */
1813 U64 SASAddress; /* 0x0C */
1814 U16 ParentDevHandle; /* 0x14 */
1815 U8 PhyNum; /* 0x16 */
1816 U8 AccessStatus; /* 0x17 */
1817 U16 DevHandle; /* 0x18 */
1818 U8 AttachedPhyIdentifier; /* 0x1A */
1819 U8 ZoneGroup; /* 0x1B */
1820 U32 DeviceInfo; /* 0x1C */
1821 U16 Flags; /* 0x20 */
1822 U8 PhysicalPort; /* 0x22 */
1823 U8 MaxPortConnections; /* 0x23 */
1824 U64 DeviceName; /* 0x24 */
1825 U8 PortGroups; /* 0x2C */
1826 U8 DmaGroup; /* 0x2D */
1827 U8 ControlGroup; /* 0x2E */
1828 U8 Reserved1; /* 0x2F */
1829 U32 Reserved2; /* 0x30 */
1830 U32 Reserved3; /* 0x34 */
1831} MPI2_CONFIG_PAGE_SAS_DEV_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_DEV_0,
1832 Mpi2SasDevicePage0_t, MPI2_POINTER pMpi2SasDevicePage0_t;
1833
1834#define MPI2_SASDEVICE0_PAGEVERSION (0x08)
1835
1836/* values for SAS Device Page 0 AccessStatus field */
1837#define MPI2_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00)
1838#define MPI2_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01)
1839#define MPI2_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02)
1840#define MPI2_SAS_DEVICE0_ASTATUS_SATA_AFFILIATION_CONFLICT (0x03)
1841#define MPI2_SAS_DEVICE0_ASTATUS_SATA_NEEDS_INITIALIZATION (0x04)
1842#define MPI2_SAS_DEVICE0_ASTATUS_ROUTE_NOT_ADDRESSABLE (0x05)
1843#define MPI2_SAS_DEVICE0_ASTATUS_SMP_ERROR_NOT_ADDRESSABLE (0x06)
1844#define MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED (0x07)
1845/* specific values for SATA Init failures */
1846#define MPI2_SAS_DEVICE0_ASTATUS_SIF_UNKNOWN (0x10)
1847#define MPI2_SAS_DEVICE0_ASTATUS_SIF_AFFILIATION_CONFLICT (0x11)
1848#define MPI2_SAS_DEVICE0_ASTATUS_SIF_DIAG (0x12)
1849#define MPI2_SAS_DEVICE0_ASTATUS_SIF_IDENTIFICATION (0x13)
1850#define MPI2_SAS_DEVICE0_ASTATUS_SIF_CHECK_POWER (0x14)
1851#define MPI2_SAS_DEVICE0_ASTATUS_SIF_PIO_SN (0x15)
1852#define MPI2_SAS_DEVICE0_ASTATUS_SIF_MDMA_SN (0x16)
1853#define MPI2_SAS_DEVICE0_ASTATUS_SIF_UDMA_SN (0x17)
1854#define MPI2_SAS_DEVICE0_ASTATUS_SIF_ZONING_VIOLATION (0x18)
1855#define MPI2_SAS_DEVICE0_ASTATUS_SIF_NOT_ADDRESSABLE (0x19)
1856#define MPI2_SAS_DEVICE0_ASTATUS_SIF_MAX (0x1F)
1857
1858/* see mpi2_sas.h for values for SAS Device Page 0 DeviceInfo values */
1859
1860/* values for SAS Device Page 0 Flags field */
1861#define MPI2_SAS_DEVICE0_FLAGS_SATA_ASYNCHRONOUS_NOTIFY (0x0400)
1862#define MPI2_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE (0x0200)
1863#define MPI2_SAS_DEVICE0_FLAGS_UNSUPPORTED_DEVICE (0x0100)
1864#define MPI2_SAS_DEVICE0_FLAGS_SATA_48BIT_LBA_SUPPORTED (0x0080)
1865#define MPI2_SAS_DEVICE0_FLAGS_SATA_SMART_SUPPORTED (0x0040)
1866#define MPI2_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020)
1867#define MPI2_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010)
1868#define MPI2_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008)
1869#define MPI2_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001)
1870
1871
1872/* SAS Device Page 1 */
1873
1874typedef struct _MPI2_CONFIG_PAGE_SAS_DEV_1
1875{
1876 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1877 U32 Reserved1; /* 0x08 */
1878 U64 SASAddress; /* 0x0C */
1879 U32 Reserved2; /* 0x14 */
1880 U16 DevHandle; /* 0x18 */
1881 U16 Reserved3; /* 0x1A */
1882 U8 InitialRegDeviceFIS[20];/* 0x1C */
1883} MPI2_CONFIG_PAGE_SAS_DEV_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_DEV_1,
1884 Mpi2SasDevicePage1_t, MPI2_POINTER pMpi2SasDevicePage1_t;
1885
1886#define MPI2_SASDEVICE1_PAGEVERSION (0x01)
1887
1888
1889/****************************************************************************
1890* SAS PHY Config Pages
1891****************************************************************************/
1892
1893/* SAS PHY Page 0 */
1894
1895typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_0
1896{
1897 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1898 U16 OwnerDevHandle; /* 0x08 */
1899 U16 Reserved1; /* 0x0A */
1900 U16 AttachedDevHandle; /* 0x0C */
1901 U8 AttachedPhyIdentifier; /* 0x0E */
1902 U8 Reserved2; /* 0x0F */
1903 U32 AttachedPhyInfo; /* 0x10 */
1904 U8 ProgrammedLinkRate; /* 0x14 */
1905 U8 HwLinkRate; /* 0x15 */
1906 U8 ChangeCount; /* 0x16 */
1907 U8 Flags; /* 0x17 */
1908 U32 PhyInfo; /* 0x18 */
1909 U8 NegotiatedLinkRate; /* 0x1C */
1910 U8 Reserved3; /* 0x1D */
1911 U16 Reserved4; /* 0x1E */
1912} MPI2_CONFIG_PAGE_SAS_PHY_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_0,
1913 Mpi2SasPhyPage0_t, MPI2_POINTER pMpi2SasPhyPage0_t;
1914
1915#define MPI2_SASPHY0_PAGEVERSION (0x03)
1916
1917/* use MPI2_SAS_PRATE_ defines for the ProgrammedLinkRate field */
1918
1919/* use MPI2_SAS_HWRATE_ defines for the HwLinkRate field */
1920
1921/* values for SAS PHY Page 0 Flags field */
1922#define MPI2_SAS_PHY0_FLAGS_SGPIO_DIRECT_ATTACH_ENC (0x01)
1923
1924/* use MPI2_SAS_APHYINFO_ defines for AttachedPhyInfo field */
1925
1926/* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */
1927
1928/* use MPI2_SAS_PHYINFO_ for the PhyInfo field */
1929
1930
1931/* SAS PHY Page 1 */
1932
1933typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_1
1934{
1935 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1936 U32 Reserved1; /* 0x08 */
1937 U32 InvalidDwordCount; /* 0x0C */
1938 U32 RunningDisparityErrorCount; /* 0x10 */
1939 U32 LossDwordSynchCount; /* 0x14 */
1940 U32 PhyResetProblemCount; /* 0x18 */
1941} MPI2_CONFIG_PAGE_SAS_PHY_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_1,
1942 Mpi2SasPhyPage1_t, MPI2_POINTER pMpi2SasPhyPage1_t;
1943
1944#define MPI2_SASPHY1_PAGEVERSION (0x01)
1945
1946
1947/****************************************************************************
1948* SAS Port Config Pages
1949****************************************************************************/
1950
1951/* SAS Port Page 0 */
1952
1953typedef struct _MPI2_CONFIG_PAGE_SAS_PORT_0
1954{
1955 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1956 U8 PortNumber; /* 0x08 */
1957 U8 PhysicalPort; /* 0x09 */
1958 U8 PortWidth; /* 0x0A */
1959 U8 PhysicalPortWidth; /* 0x0B */
1960 U8 ZoneGroup; /* 0x0C */
1961 U8 Reserved1; /* 0x0D */
1962 U16 Reserved2; /* 0x0E */
1963 U64 SASAddress; /* 0x10 */
1964 U32 DeviceInfo; /* 0x18 */
1965 U32 Reserved3; /* 0x1C */
1966 U32 Reserved4; /* 0x20 */
1967} MPI2_CONFIG_PAGE_SAS_PORT_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PORT_0,
1968 Mpi2SasPortPage0_t, MPI2_POINTER pMpi2SasPortPage0_t;
1969
1970#define MPI2_SASPORT0_PAGEVERSION (0x00)
1971
1972/* see mpi2_sas.h for values for SAS Port Page 0 DeviceInfo values */
1973
1974
1975/****************************************************************************
1976* SAS Enclosure Config Pages
1977****************************************************************************/
1978
1979/* SAS Enclosure Page 0 */
1980
1981typedef struct _MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0
1982{
1983 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
1984 U32 Reserved1; /* 0x08 */
1985 U64 EnclosureLogicalID; /* 0x0C */
1986 U16 Flags; /* 0x14 */
1987 U16 EnclosureHandle; /* 0x16 */
1988 U16 NumSlots; /* 0x18 */
1989 U16 StartSlot; /* 0x1A */
1990 U16 Reserved2; /* 0x1C */
1991 U16 SEPDevHandle; /* 0x1E */
1992 U32 Reserved3; /* 0x20 */
1993 U32 Reserved4; /* 0x24 */
1994} MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0,
1995 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0,
1996 Mpi2SasEnclosurePage0_t, MPI2_POINTER pMpi2SasEnclosurePage0_t;
1997
1998#define MPI2_SASENCLOSURE0_PAGEVERSION (0x03)
1999
2000/* values for SAS Enclosure Page 0 Flags field */
2001#define MPI2_SAS_ENCLS0_FLAGS_MNG_MASK (0x000F)
2002#define MPI2_SAS_ENCLS0_FLAGS_MNG_UNKNOWN (0x0000)
2003#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_SES (0x0001)
2004#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_SGPIO (0x0002)
2005#define MPI2_SAS_ENCLS0_FLAGS_MNG_EXP_SGPIO (0x0003)
2006#define MPI2_SAS_ENCLS0_FLAGS_MNG_SES_ENCLOSURE (0x0004)
2007#define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_GPIO (0x0005)
2008
2009
2010/****************************************************************************
2011* Log Config Page
2012****************************************************************************/
2013
2014/* Log Page 0 */
2015
2016/*
2017 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
2018 * one and check Header.ExtPageLength or NumPhys at runtime.
2019 */
2020#ifndef MPI2_LOG_0_NUM_LOG_ENTRIES
2021#define MPI2_LOG_0_NUM_LOG_ENTRIES (1)
2022#endif
2023
2024#define MPI2_LOG_0_LOG_DATA_LENGTH (0x1C)
2025
2026typedef struct _MPI2_LOG_0_ENTRY
2027{
2028 U64 TimeStamp; /* 0x00 */
2029 U32 Reserved1; /* 0x08 */
2030 U16 LogSequence; /* 0x0C */
2031 U16 LogEntryQualifier; /* 0x0E */
2032 U8 VP_ID; /* 0x10 */
2033 U8 VF_ID; /* 0x11 */
2034 U16 Reserved2; /* 0x12 */
2035 U8 LogData[MPI2_LOG_0_LOG_DATA_LENGTH];/* 0x14 */
2036} MPI2_LOG_0_ENTRY, MPI2_POINTER PTR_MPI2_LOG_0_ENTRY,
2037 Mpi2Log0Entry_t, MPI2_POINTER pMpi2Log0Entry_t;
2038
2039/* values for Log Page 0 LogEntry LogEntryQualifier field */
2040#define MPI2_LOG_0_ENTRY_QUAL_ENTRY_UNUSED (0x0000)
2041#define MPI2_LOG_0_ENTRY_QUAL_POWER_ON_RESET (0x0001)
2042#define MPI2_LOG_0_ENTRY_QUAL_TIMESTAMP_UPDATE (0x0002)
2043#define MPI2_LOG_0_ENTRY_QUAL_MIN_IMPLEMENT_SPEC (0x8000)
2044#define MPI2_LOG_0_ENTRY_QUAL_MAX_IMPLEMENT_SPEC (0xFFFF)
2045
2046typedef struct _MPI2_CONFIG_PAGE_LOG_0
2047{
2048 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
2049 U32 Reserved1; /* 0x08 */
2050 U32 Reserved2; /* 0x0C */
2051 U16 NumLogEntries; /* 0x10 */
2052 U16 Reserved3; /* 0x12 */
2053 MPI2_LOG_0_ENTRY LogEntry[MPI2_LOG_0_NUM_LOG_ENTRIES]; /* 0x14 */
2054} MPI2_CONFIG_PAGE_LOG_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_LOG_0,
2055 Mpi2LogPage0_t, MPI2_POINTER pMpi2LogPage0_t;
2056
2057#define MPI2_LOG_0_PAGEVERSION (0x02)
2058
2059
2060/****************************************************************************
2061* RAID Config Page
2062****************************************************************************/
2063
2064/* RAID Page 0 */
2065
2066/*
2067 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
2068 * one and check Header.ExtPageLength or NumPhys at runtime.
2069 */
2070#ifndef MPI2_RAIDCONFIG0_MAX_ELEMENTS
2071#define MPI2_RAIDCONFIG0_MAX_ELEMENTS (1)
2072#endif
2073
2074typedef struct _MPI2_RAIDCONFIG0_CONFIG_ELEMENT
2075{
2076 U16 ElementFlags; /* 0x00 */
2077 U16 VolDevHandle; /* 0x02 */
2078 U8 HotSparePool; /* 0x04 */
2079 U8 PhysDiskNum; /* 0x05 */
2080 U16 PhysDiskDevHandle; /* 0x06 */
2081} MPI2_RAIDCONFIG0_CONFIG_ELEMENT,
2082 MPI2_POINTER PTR_MPI2_RAIDCONFIG0_CONFIG_ELEMENT,
2083 Mpi2RaidConfig0ConfigElement_t, MPI2_POINTER pMpi2RaidConfig0ConfigElement_t;
2084
2085/* values for the ElementFlags field */
2086#define MPI2_RAIDCONFIG0_EFLAGS_MASK_ELEMENT_TYPE (0x000F)
2087#define MPI2_RAIDCONFIG0_EFLAGS_VOLUME_ELEMENT (0x0000)
2088#define MPI2_RAIDCONFIG0_EFLAGS_VOL_PHYS_DISK_ELEMENT (0x0001)
2089#define MPI2_RAIDCONFIG0_EFLAGS_HOT_SPARE_ELEMENT (0x0002)
2090#define MPI2_RAIDCONFIG0_EFLAGS_OCE_ELEMENT (0x0003)
2091
2092
2093typedef struct _MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0
2094{
2095 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
2096 U8 NumHotSpares; /* 0x08 */
2097 U8 NumPhysDisks; /* 0x09 */
2098 U8 NumVolumes; /* 0x0A */
2099 U8 ConfigNum; /* 0x0B */
2100 U32 Flags; /* 0x0C */
2101 U8 ConfigGUID[24]; /* 0x10 */
2102 U32 Reserved1; /* 0x28 */
2103 U8 NumElements; /* 0x2C */
2104 U8 Reserved2; /* 0x2D */
2105 U16 Reserved3; /* 0x2E */
2106 MPI2_RAIDCONFIG0_CONFIG_ELEMENT ConfigElement[MPI2_RAIDCONFIG0_MAX_ELEMENTS]; /* 0x30 */
2107} MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0,
2108 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0,
2109 Mpi2RaidConfigurationPage0_t, MPI2_POINTER pMpi2RaidConfigurationPage0_t;
2110
2111#define MPI2_RAIDCONFIG0_PAGEVERSION (0x00)
2112
2113/* values for RAID Configuration Page 0 Flags field */
2114#define MPI2_RAIDCONFIG0_FLAG_FOREIGN_CONFIG (0x00000001)
2115
2116
2117/****************************************************************************
2118* Driver Persistent Mapping Config Pages
2119****************************************************************************/
2120
2121/* Driver Persistent Mapping Page 0 */
2122
2123typedef struct _MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY
2124{
2125 U64 PhysicalIdentifier; /* 0x00 */
2126 U16 MappingInformation; /* 0x08 */
2127 U16 DeviceIndex; /* 0x0A */
2128 U32 PhysicalBitsMapping; /* 0x0C */
2129 U32 Reserved1; /* 0x10 */
2130} MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY,
2131 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY,
2132 Mpi2DriverMap0Entry_t, MPI2_POINTER pMpi2DriverMap0Entry_t;
2133
2134typedef struct _MPI2_CONFIG_PAGE_DRIVER_MAPPING_0
2135{
2136 MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */
2137 MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY Entry; /* 0x08 */
2138} MPI2_CONFIG_PAGE_DRIVER_MAPPING_0,
2139 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_DRIVER_MAPPING_0,
2140 Mpi2DriverMappingPage0_t, MPI2_POINTER pMpi2DriverMappingPage0_t;
2141
2142#define MPI2_DRIVERMAPPING0_PAGEVERSION (0x00)
2143
2144/* values for Driver Persistent Mapping Page 0 MappingInformation field */
2145#define MPI2_DRVMAP0_MAPINFO_SLOT_MASK (0x07F0)
2146#define MPI2_DRVMAP0_MAPINFO_SLOT_SHIFT (4)
2147#define MPI2_DRVMAP0_MAPINFO_MISSING_MASK (0x000F)
2148
2149
2150#endif
2151
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_init.h b/drivers/scsi/mpt2sas/mpi/mpi2_init.h
new file mode 100644
index 000000000000..f1115f0f0eb2
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_init.h
@@ -0,0 +1,420 @@
1/*
2 * Copyright (c) 2000-2008 LSI Corporation.
3 *
4 *
5 * Name: mpi2_init.h
6 * Title: MPI SCSI initiator mode messages and structures
7 * Creation Date: June 23, 2006
8 *
9 * mpi2_init.h Version: 02.00.06
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
17 * 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
18 * 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
19 * 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
20 * 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
21 * 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
22 * 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
23 * Control field Task Attribute flags.
24 * Moved LUN field defines to mpi2.h becasue they are
25 * common to many structures.
26 * --------------------------------------------------------------------------
27 */
28
29#ifndef MPI2_INIT_H
30#define MPI2_INIT_H
31
32/*****************************************************************************
33*
34* SCSI Initiator Messages
35*
36*****************************************************************************/
37
38/****************************************************************************
39* SCSI IO messages and associated structures
40****************************************************************************/
41
42typedef struct
43{
44 U8 CDB[20]; /* 0x00 */
45 U32 PrimaryReferenceTag; /* 0x14 */
46 U16 PrimaryApplicationTag; /* 0x18 */
47 U16 PrimaryApplicationTagMask; /* 0x1A */
48 U32 TransferLength; /* 0x1C */
49} MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32,
50 Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t;
51
52/* TBD: I don't think this is needed for MPI2/Gen2 */
53#if 0
54typedef struct
55{
56 U8 CDB[16]; /* 0x00 */
57 U32 DataLength; /* 0x10 */
58 U32 PrimaryReferenceTag; /* 0x14 */
59 U16 PrimaryApplicationTag; /* 0x18 */
60 U16 PrimaryApplicationTagMask; /* 0x1A */
61 U32 TransferLength; /* 0x1C */
62} MPI2_SCSI_IO32_CDB_EEDP16, MPI2_POINTER PTR_MPI2_SCSI_IO32_CDB_EEDP16,
63 Mpi2ScsiIo32CdbEedp16_t, MPI2_POINTER pMpi2ScsiIo32CdbEedp16_t;
64#endif
65
66typedef union
67{
68 U8 CDB32[32];
69 MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
70 MPI2_SGE_SIMPLE_UNION SGE;
71} MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION,
72 Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t;
73
74/* SCSI IO Request Message */
75typedef struct _MPI2_SCSI_IO_REQUEST
76{
77 U16 DevHandle; /* 0x00 */
78 U8 ChainOffset; /* 0x02 */
79 U8 Function; /* 0x03 */
80 U16 Reserved1; /* 0x04 */
81 U8 Reserved2; /* 0x06 */
82 U8 MsgFlags; /* 0x07 */
83 U8 VP_ID; /* 0x08 */
84 U8 VF_ID; /* 0x09 */
85 U16 Reserved3; /* 0x0A */
86 U32 SenseBufferLowAddress; /* 0x0C */
87 U16 SGLFlags; /* 0x10 */
88 U8 SenseBufferLength; /* 0x12 */
89 U8 Reserved4; /* 0x13 */
90 U8 SGLOffset0; /* 0x14 */
91 U8 SGLOffset1; /* 0x15 */
92 U8 SGLOffset2; /* 0x16 */
93 U8 SGLOffset3; /* 0x17 */
94 U32 SkipCount; /* 0x18 */
95 U32 DataLength; /* 0x1C */
96 U32 BidirectionalDataLength; /* 0x20 */
97 U16 IoFlags; /* 0x24 */
98 U16 EEDPFlags; /* 0x26 */
99 U32 EEDPBlockSize; /* 0x28 */
100 U32 SecondaryReferenceTag; /* 0x2C */
101 U16 SecondaryApplicationTag; /* 0x30 */
102 U16 ApplicationTagTranslationMask; /* 0x32 */
103 U8 LUN[8]; /* 0x34 */
104 U32 Control; /* 0x3C */
105 MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */
106 MPI2_SGE_IO_UNION SGL; /* 0x60 */
107} MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST,
108 Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t;
109
110/* SCSI IO MsgFlags bits */
111
112/* MsgFlags for SenseBufferAddressSpace */
113#define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
114#define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
115#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
116#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
117#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
118
119/* SCSI IO SGLFlags bits */
120
121/* base values for Data Location Address Space */
122#define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C)
123#define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00)
124#define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04)
125#define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08)
126#define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
127
128/* base values for Type */
129#define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03)
130#define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00)
131#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01)
132#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02)
133
134/* shift values for each sub-field */
135#define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12)
136#define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8)
137#define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4)
138#define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0)
139
140/* SCSI IO IoFlags bits */
141
142/* Large CDB Address Space */
143#define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000)
144#define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000)
145#define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000)
146#define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000)
147#define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000)
148
149#define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
150#define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
151#define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400)
152#define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
153#define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
154
155/* SCSI IO EEDPFlags bits */
156
157#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
158#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
159#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
160#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
161
162#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
163#define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
164#define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
165
166#define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
167
168#define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007)
169#define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000)
170#define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001)
171#define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002)
172#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
173#define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
174#define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006)
175#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
176
177/* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */
178
179/* SCSI IO Control bits */
180#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000)
181#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
182
183#define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
184#define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
185#define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
186#define MPI2_SCSIIO_CONTROL_READ (0x02000000)
187#define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000)
188
189#define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800)
190#define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11)
191
192#define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
193#define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
194#define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100)
195#define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
196#define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400)
197
198#define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0)
199#define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000)
200#define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040)
201#define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080)
202
203
204/* SCSI IO Error Reply Message */
205typedef struct _MPI2_SCSI_IO_REPLY
206{
207 U16 DevHandle; /* 0x00 */
208 U8 MsgLength; /* 0x02 */
209 U8 Function; /* 0x03 */
210 U16 Reserved1; /* 0x04 */
211 U8 Reserved2; /* 0x06 */
212 U8 MsgFlags; /* 0x07 */
213 U8 VP_ID; /* 0x08 */
214 U8 VF_ID; /* 0x09 */
215 U16 Reserved3; /* 0x0A */
216 U8 SCSIStatus; /* 0x0C */
217 U8 SCSIState; /* 0x0D */
218 U16 IOCStatus; /* 0x0E */
219 U32 IOCLogInfo; /* 0x10 */
220 U32 TransferCount; /* 0x14 */
221 U32 SenseCount; /* 0x18 */
222 U32 ResponseInfo; /* 0x1C */
223 U16 TaskTag; /* 0x20 */
224 U16 Reserved4; /* 0x22 */
225 U32 BidirectionalTransferCount; /* 0x24 */
226 U32 Reserved5; /* 0x28 */
227 U32 Reserved6; /* 0x2C */
228} MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY,
229 Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t;
230
231/* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */
232
233#define MPI2_SCSI_STATUS_GOOD (0x00)
234#define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02)
235#define MPI2_SCSI_STATUS_CONDITION_MET (0x04)
236#define MPI2_SCSI_STATUS_BUSY (0x08)
237#define MPI2_SCSI_STATUS_INTERMEDIATE (0x10)
238#define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
239#define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
240#define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */
241#define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28)
242#define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30)
243#define MPI2_SCSI_STATUS_TASK_ABORTED (0x40)
244
245/* SCSI IO Reply SCSIState flags */
246
247#define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
248#define MPI2_SCSI_STATE_TERMINATED (0x08)
249#define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04)
250#define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
251#define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
252
253#define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
254
255
256/****************************************************************************
257* SCSI Task Management messages
258****************************************************************************/
259
260/* SCSI Task Management Request Message */
261typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST
262{
263 U16 DevHandle; /* 0x00 */
264 U8 ChainOffset; /* 0x02 */
265 U8 Function; /* 0x03 */
266 U8 Reserved1; /* 0x04 */
267 U8 TaskType; /* 0x05 */
268 U8 Reserved2; /* 0x06 */
269 U8 MsgFlags; /* 0x07 */
270 U8 VP_ID; /* 0x08 */
271 U8 VF_ID; /* 0x09 */
272 U16 Reserved3; /* 0x0A */
273 U8 LUN[8]; /* 0x0C */
274 U32 Reserved4[7]; /* 0x14 */
275 U16 TaskMID; /* 0x30 */
276 U16 Reserved5; /* 0x32 */
277} MPI2_SCSI_TASK_MANAGE_REQUEST,
278 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
279 Mpi2SCSITaskManagementRequest_t,
280 MPI2_POINTER pMpi2SCSITaskManagementRequest_t;
281
282/* TaskType values */
283
284#define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
285#define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
286#define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
287#define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
288#define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
289#define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
290#define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
291#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09)
292#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION (0x0A)
293
294/* MsgFlags bits */
295
296#define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
297#define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
298#define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
299#define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
300
301#define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
302
303
304
305/* SCSI Task Management Reply Message */
306typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY
307{
308 U16 DevHandle; /* 0x00 */
309 U8 MsgLength; /* 0x02 */
310 U8 Function; /* 0x03 */
311 U8 ResponseCode; /* 0x04 */
312 U8 TaskType; /* 0x05 */
313 U8 Reserved1; /* 0x06 */
314 U8 MsgFlags; /* 0x07 */
315 U8 VP_ID; /* 0x08 */
316 U8 VF_ID; /* 0x09 */
317 U16 Reserved2; /* 0x0A */
318 U16 Reserved3; /* 0x0C */
319 U16 IOCStatus; /* 0x0E */
320 U32 IOCLogInfo; /* 0x10 */
321 U32 TerminationCount; /* 0x14 */
322} MPI2_SCSI_TASK_MANAGE_REPLY,
323 MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
324 Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t;
325
326/* ResponseCode values */
327
328#define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
329#define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
330#define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
331#define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
332#define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
333#define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
334#define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
335
336
337/****************************************************************************
338* SCSI Enclosure Processor messages
339****************************************************************************/
340
341/* SCSI Enclosure Processor Request Message */
342typedef struct _MPI2_SEP_REQUEST
343{
344 U16 DevHandle; /* 0x00 */
345 U8 ChainOffset; /* 0x02 */
346 U8 Function; /* 0x03 */
347 U8 Action; /* 0x04 */
348 U8 Flags; /* 0x05 */
349 U8 Reserved1; /* 0x06 */
350 U8 MsgFlags; /* 0x07 */
351 U8 VP_ID; /* 0x08 */
352 U8 VF_ID; /* 0x09 */
353 U16 Reserved2; /* 0x0A */
354 U32 SlotStatus; /* 0x0C */
355 U32 Reserved3; /* 0x10 */
356 U32 Reserved4; /* 0x14 */
357 U32 Reserved5; /* 0x18 */
358 U16 Slot; /* 0x1C */
359 U16 EnclosureHandle; /* 0x1E */
360} MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST,
361 Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t;
362
363/* Action defines */
364#define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00)
365#define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01)
366
367/* Flags defines */
368#define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00)
369#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
370
371/* SlotStatus defines */
372#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
373#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
374#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
375#define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
376#define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
377#define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
378#define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
379#define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
380#define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
381
382
383/* SCSI Enclosure Processor Reply Message */
384typedef struct _MPI2_SEP_REPLY
385{
386 U16 DevHandle; /* 0x00 */
387 U8 MsgLength; /* 0x02 */
388 U8 Function; /* 0x03 */
389 U8 Action; /* 0x04 */
390 U8 Flags; /* 0x05 */
391 U8 Reserved1; /* 0x06 */
392 U8 MsgFlags; /* 0x07 */
393 U8 VP_ID; /* 0x08 */
394 U8 VF_ID; /* 0x09 */
395 U16 Reserved2; /* 0x0A */
396 U16 Reserved3; /* 0x0C */
397 U16 IOCStatus; /* 0x0E */
398 U32 IOCLogInfo; /* 0x10 */
399 U32 SlotStatus; /* 0x14 */
400 U32 Reserved4; /* 0x18 */
401 U16 Slot; /* 0x1C */
402 U16 EnclosureHandle; /* 0x1E */
403} MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY,
404 Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t;
405
406/* SlotStatus defines */
407#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
408#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
409#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
410#define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
411#define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
412#define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
413#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
414#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
415#define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
416
417
418#endif
419
420
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h b/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h
new file mode 100644
index 000000000000..8c5d81870c03
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h
@@ -0,0 +1,1295 @@
1/*
2 * Copyright (c) 2000-2009 LSI Corporation.
3 *
4 *
5 * Name: mpi2_ioc.h
6 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
7 * Creation Date: October 11, 2006
8 *
9 * mpi2_ioc.h Version: 02.00.10
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
17 * 06-04-07 02.00.01 In IOCFacts Reply structure, renamed MaxDevices to
18 * MaxTargets.
19 * Added TotalImageSize field to FWDownload Request.
20 * Added reserved words to FWUpload Request.
21 * 06-26-07 02.00.02 Added IR Configuration Change List Event.
22 * 08-31-07 02.00.03 Removed SystemReplyQueueDepth field from the IOCInit
23 * request and replaced it with
24 * ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
25 * Replaced the MinReplyQueueDepth field of the IOCFacts
26 * reply with MaxReplyDescriptorPostQueueDepth.
27 * Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
28 * depth for the Reply Descriptor Post Queue.
29 * Added SASAddress field to Initiator Device Table
30 * Overflow Event data.
31 * 10-31-07 02.00.04 Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
32 * for SAS Initiator Device Status Change Event data.
33 * Modified Reason Code defines for SAS Topology Change
34 * List Event data, including adding a bit for PHY Vacant
35 * status, and adding a mask for the Reason Code.
36 * Added define for
37 * MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
38 * Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
39 * 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of
40 * the IOCFacts Reply.
41 * Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
42 * Moved MPI2_VERSION_UNION to mpi2.h.
43 * Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
44 * instead of enables, and added SASBroadcastPrimitiveMasks
45 * field.
46 * Added Log Entry Added Event and related structure.
47 * 02-29-08 02.00.06 Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
48 * Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
49 * Added MaxVolumes and MaxPersistentEntries fields to
50 * IOCFacts reply.
51 * Added ProtocalFlags and IOCCapabilities fields to
52 * MPI2_FW_IMAGE_HEADER.
53 * Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
54 * 03-03-08 02.00.07 Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
55 * a U16 (from a U32).
56 * Removed extra 's' from EventMasks name.
57 * 06-27-08 02.00.08 Fixed an offset in a comment.
58 * 10-02-08 02.00.09 Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
59 * Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
60 * renamed MinReplyFrameSize to ReplyFrameSize.
61 * Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
62 * Added two new RAIDOperation values for Integrated RAID
63 * Operations Status Event data.
64 * Added four new IR Configuration Change List Event data
65 * ReasonCode values.
66 * Added two new ReasonCode defines for SAS Device Status
67 * Change Event data.
68 * Added three new DiscoveryStatus bits for the SAS
69 * Discovery event data.
70 * Added Multiplexing Status Change bit to the PhyStatus
71 * field of the SAS Topology Change List event data.
72 * Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
73 * BootFlags are now product-specific.
74 * Added defines for the indivdual signature bytes
75 * for MPI2_INIT_IMAGE_FOOTER.
76 * 01-19-09 02.00.10 Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
77 * Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
78 * define.
79 * Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
80 * define.
81 * Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
82 * --------------------------------------------------------------------------
83 */
84
85#ifndef MPI2_IOC_H
86#define MPI2_IOC_H
87
88/*****************************************************************************
89*
90* IOC Messages
91*
92*****************************************************************************/
93
94/****************************************************************************
95* IOCInit message
96****************************************************************************/
97
98/* IOCInit Request message */
99typedef struct _MPI2_IOC_INIT_REQUEST
100{
101 U8 WhoInit; /* 0x00 */
102 U8 Reserved1; /* 0x01 */
103 U8 ChainOffset; /* 0x02 */
104 U8 Function; /* 0x03 */
105 U16 Reserved2; /* 0x04 */
106 U8 Reserved3; /* 0x06 */
107 U8 MsgFlags; /* 0x07 */
108 U8 VP_ID; /* 0x08 */
109 U8 VF_ID; /* 0x09 */
110 U16 Reserved4; /* 0x0A */
111 U16 MsgVersion; /* 0x0C */
112 U16 HeaderVersion; /* 0x0E */
113 U32 Reserved5; /* 0x10 */
114 U32 Reserved6; /* 0x14 */
115 U16 Reserved7; /* 0x18 */
116 U16 SystemRequestFrameSize; /* 0x1A */
117 U16 ReplyDescriptorPostQueueDepth; /* 0x1C */
118 U16 ReplyFreeQueueDepth; /* 0x1E */
119 U32 SenseBufferAddressHigh; /* 0x20 */
120 U32 SystemReplyAddressHigh; /* 0x24 */
121 U64 SystemRequestFrameBaseAddress; /* 0x28 */
122 U64 ReplyDescriptorPostQueueAddress;/* 0x30 */
123 U64 ReplyFreeQueueAddress; /* 0x38 */
124 U64 TimeStamp; /* 0x40 */
125} MPI2_IOC_INIT_REQUEST, MPI2_POINTER PTR_MPI2_IOC_INIT_REQUEST,
126 Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t;
127
128/* WhoInit values */
129#define MPI2_WHOINIT_NOT_INITIALIZED (0x00)
130#define MPI2_WHOINIT_SYSTEM_BIOS (0x01)
131#define MPI2_WHOINIT_ROM_BIOS (0x02)
132#define MPI2_WHOINIT_PCI_PEER (0x03)
133#define MPI2_WHOINIT_HOST_DRIVER (0x04)
134#define MPI2_WHOINIT_MANUFACTURER (0x05)
135
136/* MsgVersion */
137#define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
138#define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
139#define MPI2_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
140#define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
141
142/* HeaderVersion */
143#define MPI2_IOCINIT_HDRVERSION_UNIT_MASK (0xFF00)
144#define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT (8)
145#define MPI2_IOCINIT_HDRVERSION_DEV_MASK (0x00FF)
146#define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT (0)
147
148/* minimum depth for the Reply Descriptor Post Queue */
149#define MPI2_RDPQ_DEPTH_MIN (16)
150
151
152/* IOCInit Reply message */
153typedef struct _MPI2_IOC_INIT_REPLY
154{
155 U8 WhoInit; /* 0x00 */
156 U8 Reserved1; /* 0x01 */
157 U8 MsgLength; /* 0x02 */
158 U8 Function; /* 0x03 */
159 U16 Reserved2; /* 0x04 */
160 U8 Reserved3; /* 0x06 */
161 U8 MsgFlags; /* 0x07 */
162 U8 VP_ID; /* 0x08 */
163 U8 VF_ID; /* 0x09 */
164 U16 Reserved4; /* 0x0A */
165 U16 Reserved5; /* 0x0C */
166 U16 IOCStatus; /* 0x0E */
167 U32 IOCLogInfo; /* 0x10 */
168} MPI2_IOC_INIT_REPLY, MPI2_POINTER PTR_MPI2_IOC_INIT_REPLY,
169 Mpi2IOCInitReply_t, MPI2_POINTER pMpi2IOCInitReply_t;
170
171
172/****************************************************************************
173* IOCFacts message
174****************************************************************************/
175
176/* IOCFacts Request message */
177typedef struct _MPI2_IOC_FACTS_REQUEST
178{
179 U16 Reserved1; /* 0x00 */
180 U8 ChainOffset; /* 0x02 */
181 U8 Function; /* 0x03 */
182 U16 Reserved2; /* 0x04 */
183 U8 Reserved3; /* 0x06 */
184 U8 MsgFlags; /* 0x07 */
185 U8 VP_ID; /* 0x08 */
186 U8 VF_ID; /* 0x09 */
187 U16 Reserved4; /* 0x0A */
188} MPI2_IOC_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_IOC_FACTS_REQUEST,
189 Mpi2IOCFactsRequest_t, MPI2_POINTER pMpi2IOCFactsRequest_t;
190
191
192/* IOCFacts Reply message */
193typedef struct _MPI2_IOC_FACTS_REPLY
194{
195 U16 MsgVersion; /* 0x00 */
196 U8 MsgLength; /* 0x02 */
197 U8 Function; /* 0x03 */
198 U16 HeaderVersion; /* 0x04 */
199 U8 IOCNumber; /* 0x06 */
200 U8 MsgFlags; /* 0x07 */
201 U8 VP_ID; /* 0x08 */
202 U8 VF_ID; /* 0x09 */
203 U16 Reserved1; /* 0x0A */
204 U16 IOCExceptions; /* 0x0C */
205 U16 IOCStatus; /* 0x0E */
206 U32 IOCLogInfo; /* 0x10 */
207 U8 MaxChainDepth; /* 0x14 */
208 U8 WhoInit; /* 0x15 */
209 U8 NumberOfPorts; /* 0x16 */
210 U8 Reserved2; /* 0x17 */
211 U16 RequestCredit; /* 0x18 */
212 U16 ProductID; /* 0x1A */
213 U32 IOCCapabilities; /* 0x1C */
214 MPI2_VERSION_UNION FWVersion; /* 0x20 */
215 U16 IOCRequestFrameSize; /* 0x24 */
216 U16 Reserved3; /* 0x26 */
217 U16 MaxInitiators; /* 0x28 */
218 U16 MaxTargets; /* 0x2A */
219 U16 MaxSasExpanders; /* 0x2C */
220 U16 MaxEnclosures; /* 0x2E */
221 U16 ProtocolFlags; /* 0x30 */
222 U16 HighPriorityCredit; /* 0x32 */
223 U16 MaxReplyDescriptorPostQueueDepth; /* 0x34 */
224 U8 ReplyFrameSize; /* 0x36 */
225 U8 MaxVolumes; /* 0x37 */
226 U16 MaxDevHandle; /* 0x38 */
227 U16 MaxPersistentEntries; /* 0x3A */
228 U32 Reserved4; /* 0x3C */
229} MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
230 Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
231
232/* MsgVersion */
233#define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
234#define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
235#define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
236#define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
237
238/* HeaderVersion */
239#define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
240#define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
241#define MPI2_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
242#define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
243
244/* IOCExceptions */
245#define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX (0x0100)
246
247#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK (0x00E0)
248#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD (0x0000)
249#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP (0x0020)
250#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED (0x0040)
251#define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP (0x0060)
252
253#define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010)
254#define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL (0x0008)
255#define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
256#define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
257#define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
258
259/* defines for WhoInit field are after the IOCInit Request */
260
261/* ProductID field uses MPI2_FW_HEADER_PID_ */
262
263/* IOCCapabilities */
264#define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY (0x00002000)
265#define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID (0x00001000)
266#define MPI2_IOCFACTS_CAPABILITY_TLR (0x00000800)
267#define MPI2_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
268#define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET (0x00000080)
269#define MPI2_IOCFACTS_CAPABILITY_EEDP (0x00000040)
270#define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
271#define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
272#define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004)
273
274/* ProtocolFlags */
275#define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001)
276#define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002)
277
278
279/****************************************************************************
280* PortFacts message
281****************************************************************************/
282
283/* PortFacts Request message */
284typedef struct _MPI2_PORT_FACTS_REQUEST
285{
286 U16 Reserved1; /* 0x00 */
287 U8 ChainOffset; /* 0x02 */
288 U8 Function; /* 0x03 */
289 U16 Reserved2; /* 0x04 */
290 U8 PortNumber; /* 0x06 */
291 U8 MsgFlags; /* 0x07 */
292 U8 VP_ID; /* 0x08 */
293 U8 VF_ID; /* 0x09 */
294 U16 Reserved3; /* 0x0A */
295} MPI2_PORT_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_PORT_FACTS_REQUEST,
296 Mpi2PortFactsRequest_t, MPI2_POINTER pMpi2PortFactsRequest_t;
297
298/* PortFacts Reply message */
299typedef struct _MPI2_PORT_FACTS_REPLY
300{
301 U16 Reserved1; /* 0x00 */
302 U8 MsgLength; /* 0x02 */
303 U8 Function; /* 0x03 */
304 U16 Reserved2; /* 0x04 */
305 U8 PortNumber; /* 0x06 */
306 U8 MsgFlags; /* 0x07 */
307 U8 VP_ID; /* 0x08 */
308 U8 VF_ID; /* 0x09 */
309 U16 Reserved3; /* 0x0A */
310 U16 Reserved4; /* 0x0C */
311 U16 IOCStatus; /* 0x0E */
312 U32 IOCLogInfo; /* 0x10 */
313 U8 Reserved5; /* 0x14 */
314 U8 PortType; /* 0x15 */
315 U16 Reserved6; /* 0x16 */
316 U16 MaxPostedCmdBuffers; /* 0x18 */
317 U16 Reserved7; /* 0x1A */
318} MPI2_PORT_FACTS_REPLY, MPI2_POINTER PTR_MPI2_PORT_FACTS_REPLY,
319 Mpi2PortFactsReply_t, MPI2_POINTER pMpi2PortFactsReply_t;
320
321/* PortType values */
322#define MPI2_PORTFACTS_PORTTYPE_INACTIVE (0x00)
323#define MPI2_PORTFACTS_PORTTYPE_FC (0x10)
324#define MPI2_PORTFACTS_PORTTYPE_ISCSI (0x20)
325#define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL (0x30)
326#define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL (0x31)
327
328
329/****************************************************************************
330* PortEnable message
331****************************************************************************/
332
333/* PortEnable Request message */
334typedef struct _MPI2_PORT_ENABLE_REQUEST
335{
336 U16 Reserved1; /* 0x00 */
337 U8 ChainOffset; /* 0x02 */
338 U8 Function; /* 0x03 */
339 U8 Reserved2; /* 0x04 */
340 U8 PortFlags; /* 0x05 */
341 U8 Reserved3; /* 0x06 */
342 U8 MsgFlags; /* 0x07 */
343 U8 VP_ID; /* 0x08 */
344 U8 VF_ID; /* 0x09 */
345 U16 Reserved4; /* 0x0A */
346} MPI2_PORT_ENABLE_REQUEST, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REQUEST,
347 Mpi2PortEnableRequest_t, MPI2_POINTER pMpi2PortEnableRequest_t;
348
349
350/* PortEnable Reply message */
351typedef struct _MPI2_PORT_ENABLE_REPLY
352{
353 U16 Reserved1; /* 0x00 */
354 U8 MsgLength; /* 0x02 */
355 U8 Function; /* 0x03 */
356 U8 Reserved2; /* 0x04 */
357 U8 PortFlags; /* 0x05 */
358 U8 Reserved3; /* 0x06 */
359 U8 MsgFlags; /* 0x07 */
360 U8 VP_ID; /* 0x08 */
361 U8 VF_ID; /* 0x09 */
362 U16 Reserved4; /* 0x0A */
363 U16 Reserved5; /* 0x0C */
364 U16 IOCStatus; /* 0x0E */
365 U32 IOCLogInfo; /* 0x10 */
366} MPI2_PORT_ENABLE_REPLY, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REPLY,
367 Mpi2PortEnableReply_t, MPI2_POINTER pMpi2PortEnableReply_t;
368
369
370/****************************************************************************
371* EventNotification message
372****************************************************************************/
373
374/* EventNotification Request message */
375#define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS (4)
376
377typedef struct _MPI2_EVENT_NOTIFICATION_REQUEST
378{
379 U16 Reserved1; /* 0x00 */
380 U8 ChainOffset; /* 0x02 */
381 U8 Function; /* 0x03 */
382 U16 Reserved2; /* 0x04 */
383 U8 Reserved3; /* 0x06 */
384 U8 MsgFlags; /* 0x07 */
385 U8 VP_ID; /* 0x08 */
386 U8 VF_ID; /* 0x09 */
387 U16 Reserved4; /* 0x0A */
388 U32 Reserved5; /* 0x0C */
389 U32 Reserved6; /* 0x10 */
390 U32 EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];/* 0x14 */
391 U16 SASBroadcastPrimitiveMasks; /* 0x24 */
392 U16 Reserved7; /* 0x26 */
393 U32 Reserved8; /* 0x28 */
394} MPI2_EVENT_NOTIFICATION_REQUEST,
395 MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REQUEST,
396 Mpi2EventNotificationRequest_t, MPI2_POINTER pMpi2EventNotificationRequest_t;
397
398
399/* EventNotification Reply message */
400typedef struct _MPI2_EVENT_NOTIFICATION_REPLY
401{
402 U16 EventDataLength; /* 0x00 */
403 U8 MsgLength; /* 0x02 */
404 U8 Function; /* 0x03 */
405 U16 Reserved1; /* 0x04 */
406 U8 AckRequired; /* 0x06 */
407 U8 MsgFlags; /* 0x07 */
408 U8 VP_ID; /* 0x08 */
409 U8 VF_ID; /* 0x09 */
410 U16 Reserved2; /* 0x0A */
411 U16 Reserved3; /* 0x0C */
412 U16 IOCStatus; /* 0x0E */
413 U32 IOCLogInfo; /* 0x10 */
414 U16 Event; /* 0x14 */
415 U16 Reserved4; /* 0x16 */
416 U32 EventContext; /* 0x18 */
417 U32 EventData[1]; /* 0x1C */
418} MPI2_EVENT_NOTIFICATION_REPLY, MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REPLY,
419 Mpi2EventNotificationReply_t, MPI2_POINTER pMpi2EventNotificationReply_t;
420
421/* AckRequired */
422#define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
423#define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
424
425/* Event */
426#define MPI2_EVENT_LOG_DATA (0x0001)
427#define MPI2_EVENT_STATE_CHANGE (0x0002)
428#define MPI2_EVENT_HARD_RESET_RECEIVED (0x0005)
429#define MPI2_EVENT_EVENT_CHANGE (0x000A)
430#define MPI2_EVENT_TASK_SET_FULL (0x000E)
431#define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE (0x000F)
432#define MPI2_EVENT_IR_OPERATION_STATUS (0x0014)
433#define MPI2_EVENT_SAS_DISCOVERY (0x0016)
434#define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE (0x0017)
435#define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x0018)
436#define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW (0x0019)
437#define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST (0x001C)
438#define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE (0x001D)
439#define MPI2_EVENT_IR_VOLUME (0x001E)
440#define MPI2_EVENT_IR_PHYSICAL_DISK (0x001F)
441#define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST (0x0020)
442#define MPI2_EVENT_LOG_ENTRY_ADDED (0x0021)
443
444
445/* Log Entry Added Event data */
446
447/* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */
448#define MPI2_EVENT_DATA_LOG_DATA_LENGTH (0x1C)
449
450typedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED
451{
452 U64 TimeStamp; /* 0x00 */
453 U32 Reserved1; /* 0x08 */
454 U16 LogSequence; /* 0x0C */
455 U16 LogEntryQualifier; /* 0x0E */
456 U8 VP_ID; /* 0x10 */
457 U8 VF_ID; /* 0x11 */
458 U16 Reserved2; /* 0x12 */
459 U8 LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH];/* 0x14 */
460} MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
461 MPI2_POINTER PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
462 Mpi2EventDataLogEntryAdded_t, MPI2_POINTER pMpi2EventDataLogEntryAdded_t;
463
464/* Hard Reset Received Event data */
465
466typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED
467{
468 U8 Reserved1; /* 0x00 */
469 U8 Port; /* 0x01 */
470 U16 Reserved2; /* 0x02 */
471} MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
472 MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
473 Mpi2EventDataHardResetReceived_t,
474 MPI2_POINTER pMpi2EventDataHardResetReceived_t;
475
476/* Task Set Full Event data */
477
478typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL
479{
480 U16 DevHandle; /* 0x00 */
481 U16 CurrentDepth; /* 0x02 */
482} MPI2_EVENT_DATA_TASK_SET_FULL, MPI2_POINTER PTR_MPI2_EVENT_DATA_TASK_SET_FULL,
483 Mpi2EventDataTaskSetFull_t, MPI2_POINTER pMpi2EventDataTaskSetFull_t;
484
485
486/* SAS Device Status Change Event data */
487
488typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
489{
490 U16 TaskTag; /* 0x00 */
491 U8 ReasonCode; /* 0x02 */
492 U8 Reserved1; /* 0x03 */
493 U8 ASC; /* 0x04 */
494 U8 ASCQ; /* 0x05 */
495 U16 DevHandle; /* 0x06 */
496 U32 Reserved2; /* 0x08 */
497 U64 SASAddress; /* 0x0C */
498 U8 LUN[8]; /* 0x14 */
499} MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
500 MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
501 Mpi2EventDataSasDeviceStatusChange_t,
502 MPI2_POINTER pMpi2EventDataSasDeviceStatusChange_t;
503
504/* SAS Device Status Change Event data ReasonCode values */
505#define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
506#define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
507#define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
508#define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
509#define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
510#define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
511#define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
512#define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D)
513#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET (0x0E)
514#define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL (0x0F)
515#define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE (0x10)
516
517
518/* Integrated RAID Operation Status Event data */
519
520typedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS
521{
522 U16 VolDevHandle; /* 0x00 */
523 U16 Reserved1; /* 0x02 */
524 U8 RAIDOperation; /* 0x04 */
525 U8 PercentComplete; /* 0x05 */
526 U16 Reserved2; /* 0x06 */
527 U32 Resereved3; /* 0x08 */
528} MPI2_EVENT_DATA_IR_OPERATION_STATUS,
529 MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS,
530 Mpi2EventDataIrOperationStatus_t,
531 MPI2_POINTER pMpi2EventDataIrOperationStatus_t;
532
533/* Integrated RAID Operation Status Event data RAIDOperation values */
534#define MPI2_EVENT_IR_RAIDOP_RESYNC (0x00)
535#define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION (0x01)
536#define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK (0x02)
537#define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT (0x03)
538#define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT (0x04)
539
540
541/* Integrated RAID Volume Event data */
542
543typedef struct _MPI2_EVENT_DATA_IR_VOLUME
544{
545 U16 VolDevHandle; /* 0x00 */
546 U8 ReasonCode; /* 0x02 */
547 U8 Reserved1; /* 0x03 */
548 U32 NewValue; /* 0x04 */
549 U32 PreviousValue; /* 0x08 */
550} MPI2_EVENT_DATA_IR_VOLUME, MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_VOLUME,
551 Mpi2EventDataIrVolume_t, MPI2_POINTER pMpi2EventDataIrVolume_t;
552
553/* Integrated RAID Volume Event data ReasonCode values */
554#define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED (0x01)
555#define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED (0x02)
556#define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED (0x03)
557
558
559/* Integrated RAID Physical Disk Event data */
560
561typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK
562{
563 U16 Reserved1; /* 0x00 */
564 U8 ReasonCode; /* 0x02 */
565 U8 PhysDiskNum; /* 0x03 */
566 U16 PhysDiskDevHandle; /* 0x04 */
567 U16 Reserved2; /* 0x06 */
568 U16 Slot; /* 0x08 */
569 U16 EnclosureHandle; /* 0x0A */
570 U32 NewValue; /* 0x0C */
571 U32 PreviousValue; /* 0x10 */
572} MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
573 MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
574 Mpi2EventDataIrPhysicalDisk_t, MPI2_POINTER pMpi2EventDataIrPhysicalDisk_t;
575
576/* Integrated RAID Physical Disk Event data ReasonCode values */
577#define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED (0x01)
578#define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED (0x02)
579#define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED (0x03)
580
581
582/* Integrated RAID Configuration Change List Event data */
583
584/*
585 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
586 * one and check NumElements at runtime.
587 */
588#ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT
589#define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT (1)
590#endif
591
592typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT
593{
594 U16 ElementFlags; /* 0x00 */
595 U16 VolDevHandle; /* 0x02 */
596 U8 ReasonCode; /* 0x04 */
597 U8 PhysDiskNum; /* 0x05 */
598 U16 PhysDiskDevHandle; /* 0x06 */
599} MPI2_EVENT_IR_CONFIG_ELEMENT, MPI2_POINTER PTR_MPI2_EVENT_IR_CONFIG_ELEMENT,
600 Mpi2EventIrConfigElement_t, MPI2_POINTER pMpi2EventIrConfigElement_t;
601
602/* IR Configuration Change List Event data ElementFlags values */
603#define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK (0x000F)
604#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT (0x0000)
605#define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001)
606#define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT (0x0002)
607
608/* IR Configuration Change List Event data ReasonCode values */
609#define MPI2_EVENT_IR_CHANGE_RC_ADDED (0x01)
610#define MPI2_EVENT_IR_CHANGE_RC_REMOVED (0x02)
611#define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE (0x03)
612#define MPI2_EVENT_IR_CHANGE_RC_HIDE (0x04)
613#define MPI2_EVENT_IR_CHANGE_RC_UNHIDE (0x05)
614#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED (0x06)
615#define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED (0x07)
616#define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED (0x08)
617#define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED (0x09)
618
619typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST
620{
621 U8 NumElements; /* 0x00 */
622 U8 Reserved1; /* 0x01 */
623 U8 Reserved2; /* 0x02 */
624 U8 ConfigNum; /* 0x03 */
625 U32 Flags; /* 0x04 */
626 MPI2_EVENT_IR_CONFIG_ELEMENT ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT]; /* 0x08 */
627} MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
628 MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
629 Mpi2EventDataIrConfigChangeList_t,
630 MPI2_POINTER pMpi2EventDataIrConfigChangeList_t;
631
632/* IR Configuration Change List Event data Flags values */
633#define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG (0x00000001)
634
635
636/* SAS Discovery Event data */
637
638typedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY
639{
640 U8 Flags; /* 0x00 */
641 U8 ReasonCode; /* 0x01 */
642 U8 PhysicalPort; /* 0x02 */
643 U8 Reserved1; /* 0x03 */
644 U32 DiscoveryStatus; /* 0x04 */
645} MPI2_EVENT_DATA_SAS_DISCOVERY,
646 MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DISCOVERY,
647 Mpi2EventDataSasDiscovery_t, MPI2_POINTER pMpi2EventDataSasDiscovery_t;
648
649/* SAS Discovery Event data Flags values */
650#define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE (0x02)
651#define MPI2_EVENT_SAS_DISC_IN_PROGRESS (0x01)
652
653/* SAS Discovery Event data ReasonCode values */
654#define MPI2_EVENT_SAS_DISC_RC_STARTED (0x01)
655#define MPI2_EVENT_SAS_DISC_RC_COMPLETED (0x02)
656
657/* SAS Discovery Event data DiscoveryStatus values */
658#define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED (0x80000000)
659#define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED (0x40000000)
660#define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED (0x20000000)
661#define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED (0x10000000)
662#define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR (0x08000000)
663#define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000)
664#define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE (0x00004000)
665#define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN (0x00002000)
666#define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000)
667#define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE (0x00000800)
668#define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK (0x00000400)
669#define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK (0x00000200)
670#define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR (0x00000100)
671#define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED (0x00000080)
672#define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST (0x00000040)
673#define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES (0x00000020)
674#define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT (0x00000010)
675#define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS (0x00000004)
676#define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE (0x00000002)
677#define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED (0x00000001)
678
679
680/* SAS Broadcast Primitive Event data */
681
682typedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE
683{
684 U8 PhyNum; /* 0x00 */
685 U8 Port; /* 0x01 */
686 U8 PortWidth; /* 0x02 */
687 U8 Primitive; /* 0x03 */
688} MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
689 MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
690 Mpi2EventDataSasBroadcastPrimitive_t,
691 MPI2_POINTER pMpi2EventDataSasBroadcastPrimitive_t;
692
693/* defines for the Primitive field */
694#define MPI2_EVENT_PRIMITIVE_CHANGE (0x01)
695#define MPI2_EVENT_PRIMITIVE_SES (0x02)
696#define MPI2_EVENT_PRIMITIVE_EXPANDER (0x03)
697#define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04)
698#define MPI2_EVENT_PRIMITIVE_RESERVED3 (0x05)
699#define MPI2_EVENT_PRIMITIVE_RESERVED4 (0x06)
700#define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
701#define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
702
703
704/* SAS Initiator Device Status Change Event data */
705
706typedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
707{
708 U8 ReasonCode; /* 0x00 */
709 U8 PhysicalPort; /* 0x01 */
710 U16 DevHandle; /* 0x02 */
711 U64 SASAddress; /* 0x04 */
712} MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
713 MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
714 Mpi2EventDataSasInitDevStatusChange_t,
715 MPI2_POINTER pMpi2EventDataSasInitDevStatusChange_t;
716
717/* SAS Initiator Device Status Change event ReasonCode values */
718#define MPI2_EVENT_SAS_INIT_RC_ADDED (0x01)
719#define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING (0x02)
720
721
722/* SAS Initiator Device Table Overflow Event data */
723
724typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
725{
726 U16 MaxInit; /* 0x00 */
727 U16 CurrentInit; /* 0x02 */
728 U64 SASAddress; /* 0x04 */
729} MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
730 MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
731 Mpi2EventDataSasInitTableOverflow_t,
732 MPI2_POINTER pMpi2EventDataSasInitTableOverflow_t;
733
734
735/* SAS Topology Change List Event data */
736
737/*
738 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
739 * one and check NumEntries at runtime.
740 */
741#ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT
742#define MPI2_EVENT_SAS_TOPO_PHY_COUNT (1)
743#endif
744
745typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY
746{
747 U16 AttachedDevHandle; /* 0x00 */
748 U8 LinkRate; /* 0x02 */
749 U8 PhyStatus; /* 0x03 */
750} MPI2_EVENT_SAS_TOPO_PHY_ENTRY, MPI2_POINTER PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY,
751 Mpi2EventSasTopoPhyEntry_t, MPI2_POINTER pMpi2EventSasTopoPhyEntry_t;
752
753typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST
754{
755 U16 EnclosureHandle; /* 0x00 */
756 U16 ExpanderDevHandle; /* 0x02 */
757 U8 NumPhys; /* 0x04 */
758 U8 Reserved1; /* 0x05 */
759 U16 Reserved2; /* 0x06 */
760 U8 NumEntries; /* 0x08 */
761 U8 StartPhyNum; /* 0x09 */
762 U8 ExpStatus; /* 0x0A */
763 U8 PhysicalPort; /* 0x0B */
764 MPI2_EVENT_SAS_TOPO_PHY_ENTRY PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C*/
765} MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
766 MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
767 Mpi2EventDataSasTopologyChangeList_t,
768 MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t;
769
770/* values for the ExpStatus field */
771#define MPI2_EVENT_SAS_TOPO_ES_ADDED (0x01)
772#define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02)
773#define MPI2_EVENT_SAS_TOPO_ES_RESPONDING (0x03)
774#define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04)
775
776/* defines for the LinkRate field */
777#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK (0xF0)
778#define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT (4)
779#define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK (0x0F)
780#define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT (0)
781
782#define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE (0x00)
783#define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01)
784#define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02)
785#define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03)
786#define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04)
787#define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05)
788#define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5 (0x08)
789#define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0 (0x09)
790#define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A)
791
792/* values for the PhyStatus field */
793#define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT (0x80)
794#define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE (0x10)
795/* values for the PhyStatus ReasonCode sub-field */
796#define MPI2_EVENT_SAS_TOPO_RC_MASK (0x0F)
797#define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED (0x01)
798#define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING (0x02)
799#define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED (0x03)
800#define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE (0x04)
801#define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING (0x05)
802
803
804/* SAS Enclosure Device Status Change Event data */
805
806typedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE
807{
808 U16 EnclosureHandle; /* 0x00 */
809 U8 ReasonCode; /* 0x02 */
810 U8 PhysicalPort; /* 0x03 */
811 U64 EnclosureLogicalID; /* 0x04 */
812 U16 NumSlots; /* 0x0C */
813 U16 StartSlot; /* 0x0E */
814 U32 PhyBits; /* 0x10 */
815} MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
816 MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
817 Mpi2EventDataSasEnclDevStatusChange_t,
818 MPI2_POINTER pMpi2EventDataSasEnclDevStatusChange_t;
819
820/* SAS Enclosure Device Status Change event ReasonCode values */
821#define MPI2_EVENT_SAS_ENCL_RC_ADDED (0x01)
822#define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING (0x02)
823
824
825/****************************************************************************
826* EventAck message
827****************************************************************************/
828
829/* EventAck Request message */
830typedef struct _MPI2_EVENT_ACK_REQUEST
831{
832 U16 Reserved1; /* 0x00 */
833 U8 ChainOffset; /* 0x02 */
834 U8 Function; /* 0x03 */
835 U16 Reserved2; /* 0x04 */
836 U8 Reserved3; /* 0x06 */
837 U8 MsgFlags; /* 0x07 */
838 U8 VP_ID; /* 0x08 */
839 U8 VF_ID; /* 0x09 */
840 U16 Reserved4; /* 0x0A */
841 U16 Event; /* 0x0C */
842 U16 Reserved5; /* 0x0E */
843 U32 EventContext; /* 0x10 */
844} MPI2_EVENT_ACK_REQUEST, MPI2_POINTER PTR_MPI2_EVENT_ACK_REQUEST,
845 Mpi2EventAckRequest_t, MPI2_POINTER pMpi2EventAckRequest_t;
846
847
848/* EventAck Reply message */
849typedef struct _MPI2_EVENT_ACK_REPLY
850{
851 U16 Reserved1; /* 0x00 */
852 U8 MsgLength; /* 0x02 */
853 U8 Function; /* 0x03 */
854 U16 Reserved2; /* 0x04 */
855 U8 Reserved3; /* 0x06 */
856 U8 MsgFlags; /* 0x07 */
857 U8 VP_ID; /* 0x08 */
858 U8 VF_ID; /* 0x09 */
859 U16 Reserved4; /* 0x0A */
860 U16 Reserved5; /* 0x0C */
861 U16 IOCStatus; /* 0x0E */
862 U32 IOCLogInfo; /* 0x10 */
863} MPI2_EVENT_ACK_REPLY, MPI2_POINTER PTR_MPI2_EVENT_ACK_REPLY,
864 Mpi2EventAckReply_t, MPI2_POINTER pMpi2EventAckReply_t;
865
866
867/****************************************************************************
868* FWDownload message
869****************************************************************************/
870
871/* FWDownload Request message */
872typedef struct _MPI2_FW_DOWNLOAD_REQUEST
873{
874 U8 ImageType; /* 0x00 */
875 U8 Reserved1; /* 0x01 */
876 U8 ChainOffset; /* 0x02 */
877 U8 Function; /* 0x03 */
878 U16 Reserved2; /* 0x04 */
879 U8 Reserved3; /* 0x06 */
880 U8 MsgFlags; /* 0x07 */
881 U8 VP_ID; /* 0x08 */
882 U8 VF_ID; /* 0x09 */
883 U16 Reserved4; /* 0x0A */
884 U32 TotalImageSize; /* 0x0C */
885 U32 Reserved5; /* 0x10 */
886 MPI2_MPI_SGE_UNION SGL; /* 0x14 */
887} MPI2_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REQUEST,
888 Mpi2FWDownloadRequest, MPI2_POINTER pMpi2FWDownloadRequest;
889
890#define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
891
892#define MPI2_FW_DOWNLOAD_ITYPE_FW (0x01)
893#define MPI2_FW_DOWNLOAD_ITYPE_BIOS (0x02)
894#define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
895#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
896#define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
897#define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
898#define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
899
900/* FWDownload TransactionContext Element */
901typedef struct _MPI2_FW_DOWNLOAD_TCSGE
902{
903 U8 Reserved1; /* 0x00 */
904 U8 ContextSize; /* 0x01 */
905 U8 DetailsLength; /* 0x02 */
906 U8 Flags; /* 0x03 */
907 U32 Reserved2; /* 0x04 */
908 U32 ImageOffset; /* 0x08 */
909 U32 ImageSize; /* 0x0C */
910} MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE,
911 Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t;
912
913/* FWDownload Reply message */
914typedef struct _MPI2_FW_DOWNLOAD_REPLY
915{
916 U8 ImageType; /* 0x00 */
917 U8 Reserved1; /* 0x01 */
918 U8 MsgLength; /* 0x02 */
919 U8 Function; /* 0x03 */
920 U16 Reserved2; /* 0x04 */
921 U8 Reserved3; /* 0x06 */
922 U8 MsgFlags; /* 0x07 */
923 U8 VP_ID; /* 0x08 */
924 U8 VF_ID; /* 0x09 */
925 U16 Reserved4; /* 0x0A */
926 U16 Reserved5; /* 0x0C */
927 U16 IOCStatus; /* 0x0E */
928 U32 IOCLogInfo; /* 0x10 */
929} MPI2_FW_DOWNLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REPLY,
930 Mpi2FWDownloadReply_t, MPI2_POINTER pMpi2FWDownloadReply_t;
931
932
933/****************************************************************************
934* FWUpload message
935****************************************************************************/
936
937/* FWUpload Request message */
938typedef struct _MPI2_FW_UPLOAD_REQUEST
939{
940 U8 ImageType; /* 0x00 */
941 U8 Reserved1; /* 0x01 */
942 U8 ChainOffset; /* 0x02 */
943 U8 Function; /* 0x03 */
944 U16 Reserved2; /* 0x04 */
945 U8 Reserved3; /* 0x06 */
946 U8 MsgFlags; /* 0x07 */
947 U8 VP_ID; /* 0x08 */
948 U8 VF_ID; /* 0x09 */
949 U16 Reserved4; /* 0x0A */
950 U32 Reserved5; /* 0x0C */
951 U32 Reserved6; /* 0x10 */
952 MPI2_MPI_SGE_UNION SGL; /* 0x14 */
953} MPI2_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REQUEST,
954 Mpi2FWUploadRequest_t, MPI2_POINTER pMpi2FWUploadRequest_t;
955
956#define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT (0x00)
957#define MPI2_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
958#define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
959#define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
960#define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING (0x06)
961#define MPI2_FW_UPLOAD_ITYPE_CONFIG_1 (0x07)
962#define MPI2_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
963#define MPI2_FW_UPLOAD_ITYPE_MEGARAID (0x09)
964#define MPI2_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
965#define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
966
967typedef struct _MPI2_FW_UPLOAD_TCSGE
968{
969 U8 Reserved1; /* 0x00 */
970 U8 ContextSize; /* 0x01 */
971 U8 DetailsLength; /* 0x02 */
972 U8 Flags; /* 0x03 */
973 U32 Reserved2; /* 0x04 */
974 U32 ImageOffset; /* 0x08 */
975 U32 ImageSize; /* 0x0C */
976} MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE,
977 Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t;
978
979/* FWUpload Reply message */
980typedef struct _MPI2_FW_UPLOAD_REPLY
981{
982 U8 ImageType; /* 0x00 */
983 U8 Reserved1; /* 0x01 */
984 U8 MsgLength; /* 0x02 */
985 U8 Function; /* 0x03 */
986 U16 Reserved2; /* 0x04 */
987 U8 Reserved3; /* 0x06 */
988 U8 MsgFlags; /* 0x07 */
989 U8 VP_ID; /* 0x08 */
990 U8 VF_ID; /* 0x09 */
991 U16 Reserved4; /* 0x0A */
992 U16 Reserved5; /* 0x0C */
993 U16 IOCStatus; /* 0x0E */
994 U32 IOCLogInfo; /* 0x10 */
995 U32 ActualImageSize; /* 0x14 */
996} MPI2_FW_UPLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REPLY,
997 Mpi2FWUploadReply_t, MPI2_POINTER pMPi2FWUploadReply_t;
998
999
1000/* FW Image Header */
1001typedef struct _MPI2_FW_IMAGE_HEADER
1002{
1003 U32 Signature; /* 0x00 */
1004 U32 Signature0; /* 0x04 */
1005 U32 Signature1; /* 0x08 */
1006 U32 Signature2; /* 0x0C */
1007 MPI2_VERSION_UNION MPIVersion; /* 0x10 */
1008 MPI2_VERSION_UNION FWVersion; /* 0x14 */
1009 MPI2_VERSION_UNION NVDATAVersion; /* 0x18 */
1010 MPI2_VERSION_UNION PackageVersion; /* 0x1C */
1011 U16 VendorID; /* 0x20 */
1012 U16 ProductID; /* 0x22 */
1013 U16 ProtocolFlags; /* 0x24 */
1014 U16 Reserved26; /* 0x26 */
1015 U32 IOCCapabilities; /* 0x28 */
1016 U32 ImageSize; /* 0x2C */
1017 U32 NextImageHeaderOffset; /* 0x30 */
1018 U32 Checksum; /* 0x34 */
1019 U32 Reserved38; /* 0x38 */
1020 U32 Reserved3C; /* 0x3C */
1021 U32 Reserved40; /* 0x40 */
1022 U32 Reserved44; /* 0x44 */
1023 U32 Reserved48; /* 0x48 */
1024 U32 Reserved4C; /* 0x4C */
1025 U32 Reserved50; /* 0x50 */
1026 U32 Reserved54; /* 0x54 */
1027 U32 Reserved58; /* 0x58 */
1028 U32 Reserved5C; /* 0x5C */
1029 U32 Reserved60; /* 0x60 */
1030 U32 FirmwareVersionNameWhat; /* 0x64 */
1031 U8 FirmwareVersionName[32]; /* 0x68 */
1032 U32 VendorNameWhat; /* 0x88 */
1033 U8 VendorName[32]; /* 0x8C */
1034 U32 PackageNameWhat; /* 0x88 */
1035 U8 PackageName[32]; /* 0x8C */
1036 U32 ReservedD0; /* 0xD0 */
1037 U32 ReservedD4; /* 0xD4 */
1038 U32 ReservedD8; /* 0xD8 */
1039 U32 ReservedDC; /* 0xDC */
1040 U32 ReservedE0; /* 0xE0 */
1041 U32 ReservedE4; /* 0xE4 */
1042 U32 ReservedE8; /* 0xE8 */
1043 U32 ReservedEC; /* 0xEC */
1044 U32 ReservedF0; /* 0xF0 */
1045 U32 ReservedF4; /* 0xF4 */
1046 U32 ReservedF8; /* 0xF8 */
1047 U32 ReservedFC; /* 0xFC */
1048} MPI2_FW_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_FW_IMAGE_HEADER,
1049 Mpi2FWImageHeader_t, MPI2_POINTER pMpi2FWImageHeader_t;
1050
1051/* Signature field */
1052#define MPI2_FW_HEADER_SIGNATURE_OFFSET (0x00)
1053#define MPI2_FW_HEADER_SIGNATURE_MASK (0xFF000000)
1054#define MPI2_FW_HEADER_SIGNATURE (0xEA000000)
1055
1056/* Signature0 field */
1057#define MPI2_FW_HEADER_SIGNATURE0_OFFSET (0x04)
1058#define MPI2_FW_HEADER_SIGNATURE0 (0x5AFAA55A)
1059
1060/* Signature1 field */
1061#define MPI2_FW_HEADER_SIGNATURE1_OFFSET (0x08)
1062#define MPI2_FW_HEADER_SIGNATURE1 (0xA55AFAA5)
1063
1064/* Signature2 field */
1065#define MPI2_FW_HEADER_SIGNATURE2_OFFSET (0x0C)
1066#define MPI2_FW_HEADER_SIGNATURE2 (0x5AA55AFA)
1067
1068
1069/* defines for using the ProductID field */
1070#define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000)
1071#define MPI2_FW_HEADER_PID_TYPE_SAS (0x2000)
1072
1073#define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00)
1074#define MPI2_FW_HEADER_PID_PROD_A (0x0000)
1075
1076#define MPI2_FW_HEADER_PID_FAMILY_MASK (0x00FF)
1077/* SAS */
1078#define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0010)
1079
1080/* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
1081
1082/* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
1083
1084
1085#define MPI2_FW_HEADER_IMAGESIZE_OFFSET (0x2C)
1086#define MPI2_FW_HEADER_NEXTIMAGE_OFFSET (0x30)
1087#define MPI2_FW_HEADER_VERNMHWAT_OFFSET (0x64)
1088
1089#define MPI2_FW_HEADER_WHAT_SIGNATURE (0x29232840)
1090
1091#define MPI2_FW_HEADER_SIZE (0x100)
1092
1093
1094/* Extended Image Header */
1095typedef struct _MPI2_EXT_IMAGE_HEADER
1096
1097{
1098 U8 ImageType; /* 0x00 */
1099 U8 Reserved1; /* 0x01 */
1100 U16 Reserved2; /* 0x02 */
1101 U32 Checksum; /* 0x04 */
1102 U32 ImageSize; /* 0x08 */
1103 U32 NextImageHeaderOffset; /* 0x0C */
1104 U32 PackageVersion; /* 0x10 */
1105 U32 Reserved3; /* 0x14 */
1106 U32 Reserved4; /* 0x18 */
1107 U32 Reserved5; /* 0x1C */
1108 U8 IdentifyString[32]; /* 0x20 */
1109} MPI2_EXT_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_EXT_IMAGE_HEADER,
1110 Mpi2ExtImageHeader_t, MPI2_POINTER pMpi2ExtImageHeader_t;
1111
1112/* useful offsets */
1113#define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET (0x00)
1114#define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET (0x08)
1115#define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET (0x0C)
1116
1117#define MPI2_EXT_IMAGE_HEADER_SIZE (0x40)
1118
1119/* defines for the ImageType field */
1120#define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
1121#define MPI2_EXT_IMAGE_TYPE_FW (0x01)
1122#define MPI2_EXT_IMAGE_TYPE_NVDATA (0x03)
1123#define MPI2_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
1124#define MPI2_EXT_IMAGE_TYPE_INITIALIZATION (0x05)
1125#define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT (0x06)
1126#define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES (0x07)
1127#define MPI2_EXT_IMAGE_TYPE_MEGARAID (0x08)
1128
1129#define MPI2_EXT_IMAGE_TYPE_MAX (MPI2_EXT_IMAGE_TYPE_MEGARAID)
1130
1131
1132
1133/* FLASH Layout Extended Image Data */
1134
1135/*
1136 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1137 * one and check RegionsPerLayout at runtime.
1138 */
1139#ifndef MPI2_FLASH_NUMBER_OF_REGIONS
1140#define MPI2_FLASH_NUMBER_OF_REGIONS (1)
1141#endif
1142
1143/*
1144 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1145 * one and check NumberOfLayouts at runtime.
1146 */
1147#ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
1148#define MPI2_FLASH_NUMBER_OF_LAYOUTS (1)
1149#endif
1150
1151typedef struct _MPI2_FLASH_REGION
1152{
1153 U8 RegionType; /* 0x00 */
1154 U8 Reserved1; /* 0x01 */
1155 U16 Reserved2; /* 0x02 */
1156 U32 RegionOffset; /* 0x04 */
1157 U32 RegionSize; /* 0x08 */
1158 U32 Reserved3; /* 0x0C */
1159} MPI2_FLASH_REGION, MPI2_POINTER PTR_MPI2_FLASH_REGION,
1160 Mpi2FlashRegion_t, MPI2_POINTER pMpi2FlashRegion_t;
1161
1162typedef struct _MPI2_FLASH_LAYOUT
1163{
1164 U32 FlashSize; /* 0x00 */
1165 U32 Reserved1; /* 0x04 */
1166 U32 Reserved2; /* 0x08 */
1167 U32 Reserved3; /* 0x0C */
1168 MPI2_FLASH_REGION Region[MPI2_FLASH_NUMBER_OF_REGIONS];/* 0x10 */
1169} MPI2_FLASH_LAYOUT, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT,
1170 Mpi2FlashLayout_t, MPI2_POINTER pMpi2FlashLayout_t;
1171
1172typedef struct _MPI2_FLASH_LAYOUT_DATA
1173{
1174 U8 ImageRevision; /* 0x00 */
1175 U8 Reserved1; /* 0x01 */
1176 U8 SizeOfRegion; /* 0x02 */
1177 U8 Reserved2; /* 0x03 */
1178 U16 NumberOfLayouts; /* 0x04 */
1179 U16 RegionsPerLayout; /* 0x06 */
1180 U16 MinimumSectorAlignment; /* 0x08 */
1181 U16 Reserved3; /* 0x0A */
1182 U32 Reserved4; /* 0x0C */
1183 MPI2_FLASH_LAYOUT Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];/* 0x10 */
1184} MPI2_FLASH_LAYOUT_DATA, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT_DATA,
1185 Mpi2FlashLayoutData_t, MPI2_POINTER pMpi2FlashLayoutData_t;
1186
1187/* defines for the RegionType field */
1188#define MPI2_FLASH_REGION_UNUSED (0x00)
1189#define MPI2_FLASH_REGION_FIRMWARE (0x01)
1190#define MPI2_FLASH_REGION_BIOS (0x02)
1191#define MPI2_FLASH_REGION_NVDATA (0x03)
1192#define MPI2_FLASH_REGION_FIRMWARE_BACKUP (0x05)
1193#define MPI2_FLASH_REGION_MFG_INFORMATION (0x06)
1194#define MPI2_FLASH_REGION_CONFIG_1 (0x07)
1195#define MPI2_FLASH_REGION_CONFIG_2 (0x08)
1196#define MPI2_FLASH_REGION_MEGARAID (0x09)
1197#define MPI2_FLASH_REGION_INIT (0x0A)
1198
1199/* ImageRevision */
1200#define MPI2_FLASH_LAYOUT_IMAGE_REVISION (0x00)
1201
1202
1203
1204/* Supported Devices Extended Image Data */
1205
1206/*
1207 * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1208 * one and check NumberOfDevices at runtime.
1209 */
1210#ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
1211#define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES (1)
1212#endif
1213
1214typedef struct _MPI2_SUPPORTED_DEVICE
1215{
1216 U16 DeviceID; /* 0x00 */
1217 U16 VendorID; /* 0x02 */
1218 U16 DeviceIDMask; /* 0x04 */
1219 U16 Reserved1; /* 0x06 */
1220 U8 LowPCIRev; /* 0x08 */
1221 U8 HighPCIRev; /* 0x09 */
1222 U16 Reserved2; /* 0x0A */
1223 U32 Reserved3; /* 0x0C */
1224} MPI2_SUPPORTED_DEVICE, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICE,
1225 Mpi2SupportedDevice_t, MPI2_POINTER pMpi2SupportedDevice_t;
1226
1227typedef struct _MPI2_SUPPORTED_DEVICES_DATA
1228{
1229 U8 ImageRevision; /* 0x00 */
1230 U8 Reserved1; /* 0x01 */
1231 U8 NumberOfDevices; /* 0x02 */
1232 U8 Reserved2; /* 0x03 */
1233 U32 Reserved3; /* 0x04 */
1234 MPI2_SUPPORTED_DEVICE SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES]; /* 0x08 */
1235} MPI2_SUPPORTED_DEVICES_DATA, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICES_DATA,
1236 Mpi2SupportedDevicesData_t, MPI2_POINTER pMpi2SupportedDevicesData_t;
1237
1238/* ImageRevision */
1239#define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION (0x00)
1240
1241
1242/* Init Extended Image Data */
1243
1244typedef struct _MPI2_INIT_IMAGE_FOOTER
1245
1246{
1247 U32 BootFlags; /* 0x00 */
1248 U32 ImageSize; /* 0x04 */
1249 U32 Signature0; /* 0x08 */
1250 U32 Signature1; /* 0x0C */
1251 U32 Signature2; /* 0x10 */
1252 U32 ResetVector; /* 0x14 */
1253} MPI2_INIT_IMAGE_FOOTER, MPI2_POINTER PTR_MPI2_INIT_IMAGE_FOOTER,
1254 Mpi2InitImageFooter_t, MPI2_POINTER pMpi2InitImageFooter_t;
1255
1256/* defines for the BootFlags field */
1257#define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET (0x00)
1258
1259/* defines for the ImageSize field */
1260#define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET (0x04)
1261
1262/* defines for the Signature0 field */
1263#define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET (0x08)
1264#define MPI2_INIT_IMAGE_SIGNATURE0 (0x5AA55AEA)
1265
1266/* defines for the Signature1 field */
1267#define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET (0x0C)
1268#define MPI2_INIT_IMAGE_SIGNATURE1 (0xA55AEAA5)
1269
1270/* defines for the Signature2 field */
1271#define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET (0x10)
1272#define MPI2_INIT_IMAGE_SIGNATURE2 (0x5AEAA55A)
1273
1274/* Signature fields as individual bytes */
1275#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0 (0xEA)
1276#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1 (0x5A)
1277#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2 (0xA5)
1278#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3 (0x5A)
1279
1280#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4 (0xA5)
1281#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5 (0xEA)
1282#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6 (0x5A)
1283#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7 (0xA5)
1284
1285#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8 (0x5A)
1286#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9 (0xA5)
1287#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A (0xEA)
1288#define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B (0x5A)
1289
1290/* defines for the ResetVector field */
1291#define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET (0x14)
1292
1293
1294#endif
1295
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_raid.h b/drivers/scsi/mpt2sas/mpi/mpi2_raid.h
new file mode 100644
index 000000000000..7134816d9046
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_raid.h
@@ -0,0 +1,295 @@
1/*
2 * Copyright (c) 2000-2008 LSI Corporation.
3 *
4 *
5 * Name: mpi2_raid.h
6 * Title: MPI Integrated RAID messages and structures
7 * Creation Date: April 26, 2007
8 *
9 * mpi2_raid.h Version: 02.00.03
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
17 * 08-31-07 02.00.01 Modifications to RAID Action request and reply,
18 * including the Actions and ActionData.
19 * 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD.
20 * 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that
21 * the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT
22 * can be sized by the build environment.
23 * --------------------------------------------------------------------------
24 */
25
26#ifndef MPI2_RAID_H
27#define MPI2_RAID_H
28
29/*****************************************************************************
30*
31* Integrated RAID Messages
32*
33*****************************************************************************/
34
35/****************************************************************************
36* RAID Action messages
37****************************************************************************/
38
39/* ActionDataWord defines for use with MPI2_RAID_ACTION_DELETE_VOLUME action */
40#define MPI2_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000)
41#define MPI2_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000001)
42
43/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
44
45/* ActionDataWord defines for use with MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES action */
46#define MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD (0x00000001)
47
48/* ActionDataWord for MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE Action */
49typedef struct _MPI2_RAID_ACTION_RATE_DATA
50{
51 U8 RateToChange; /* 0x00 */
52 U8 RateOrMode; /* 0x01 */
53 U16 DataScrubDuration; /* 0x02 */
54} MPI2_RAID_ACTION_RATE_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_RATE_DATA,
55 Mpi2RaidActionRateData_t, MPI2_POINTER pMpi2RaidActionRateData_t;
56
57#define MPI2_RAID_ACTION_SET_RATE_RESYNC (0x00)
58#define MPI2_RAID_ACTION_SET_RATE_DATA_SCRUB (0x01)
59#define MPI2_RAID_ACTION_SET_RATE_POWERSAVE_MODE (0x02)
60
61/* ActionDataWord for MPI2_RAID_ACTION_START_RAID_FUNCTION Action */
62typedef struct _MPI2_RAID_ACTION_START_RAID_FUNCTION
63{
64 U8 RAIDFunction; /* 0x00 */
65 U8 Flags; /* 0x01 */
66 U16 Reserved1; /* 0x02 */
67} MPI2_RAID_ACTION_START_RAID_FUNCTION,
68 MPI2_POINTER PTR_MPI2_RAID_ACTION_START_RAID_FUNCTION,
69 Mpi2RaidActionStartRaidFunction_t,
70 MPI2_POINTER pMpi2RaidActionStartRaidFunction_t;
71
72/* defines for the RAIDFunction field */
73#define MPI2_RAID_ACTION_START_BACKGROUND_INIT (0x00)
74#define MPI2_RAID_ACTION_START_ONLINE_CAP_EXPANSION (0x01)
75#define MPI2_RAID_ACTION_START_CONSISTENCY_CHECK (0x02)
76
77/* defines for the Flags field */
78#define MPI2_RAID_ACTION_START_NEW (0x00)
79#define MPI2_RAID_ACTION_START_RESUME (0x01)
80
81/* ActionDataWord for MPI2_RAID_ACTION_STOP_RAID_FUNCTION Action */
82typedef struct _MPI2_RAID_ACTION_STOP_RAID_FUNCTION
83{
84 U8 RAIDFunction; /* 0x00 */
85 U8 Flags; /* 0x01 */
86 U16 Reserved1; /* 0x02 */
87} MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
88 MPI2_POINTER PTR_MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
89 Mpi2RaidActionStopRaidFunction_t,
90 MPI2_POINTER pMpi2RaidActionStopRaidFunction_t;
91
92/* defines for the RAIDFunction field */
93#define MPI2_RAID_ACTION_STOP_BACKGROUND_INIT (0x00)
94#define MPI2_RAID_ACTION_STOP_ONLINE_CAP_EXPANSION (0x01)
95#define MPI2_RAID_ACTION_STOP_CONSISTENCY_CHECK (0x02)
96
97/* defines for the Flags field */
98#define MPI2_RAID_ACTION_STOP_ABORT (0x00)
99#define MPI2_RAID_ACTION_STOP_PAUSE (0x01)
100
101/* ActionDataWord for MPI2_RAID_ACTION_CREATE_HOT_SPARE Action */
102typedef struct _MPI2_RAID_ACTION_HOT_SPARE
103{
104 U8 HotSparePool; /* 0x00 */
105 U8 Reserved1; /* 0x01 */
106 U16 DevHandle; /* 0x02 */
107} MPI2_RAID_ACTION_HOT_SPARE, MPI2_POINTER PTR_MPI2_RAID_ACTION_HOT_SPARE,
108 Mpi2RaidActionHotSpare_t, MPI2_POINTER pMpi2RaidActionHotSpare_t;
109
110/* ActionDataWord for MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE Action */
111typedef struct _MPI2_RAID_ACTION_FW_UPDATE_MODE
112{
113 U8 Flags; /* 0x00 */
114 U8 DeviceFirmwareUpdateModeTimeout; /* 0x01 */
115 U16 Reserved1; /* 0x02 */
116} MPI2_RAID_ACTION_FW_UPDATE_MODE,
117 MPI2_POINTER PTR_MPI2_RAID_ACTION_FW_UPDATE_MODE,
118 Mpi2RaidActionFwUpdateMode_t, MPI2_POINTER pMpi2RaidActionFwUpdateMode_t;
119
120/* ActionDataWord defines for use with MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */
121#define MPI2_RAID_ACTION_ADATA_DISABLE_FW_UPDATE (0x00)
122#define MPI2_RAID_ACTION_ADATA_ENABLE_FW_UPDATE (0x01)
123
124typedef union _MPI2_RAID_ACTION_DATA
125{
126 U32 Word;
127 MPI2_RAID_ACTION_RATE_DATA Rates;
128 MPI2_RAID_ACTION_START_RAID_FUNCTION StartRaidFunction;
129 MPI2_RAID_ACTION_STOP_RAID_FUNCTION StopRaidFunction;
130 MPI2_RAID_ACTION_HOT_SPARE HotSpare;
131 MPI2_RAID_ACTION_FW_UPDATE_MODE FwUpdateMode;
132} MPI2_RAID_ACTION_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_DATA,
133 Mpi2RaidActionData_t, MPI2_POINTER pMpi2RaidActionData_t;
134
135
136/* RAID Action Request Message */
137typedef struct _MPI2_RAID_ACTION_REQUEST
138{
139 U8 Action; /* 0x00 */
140 U8 Reserved1; /* 0x01 */
141 U8 ChainOffset; /* 0x02 */
142 U8 Function; /* 0x03 */
143 U16 VolDevHandle; /* 0x04 */
144 U8 PhysDiskNum; /* 0x06 */
145 U8 MsgFlags; /* 0x07 */
146 U8 VP_ID; /* 0x08 */
147 U8 VF_ID; /* 0x09 */
148 U16 Reserved2; /* 0x0A */
149 U32 Reserved3; /* 0x0C */
150 MPI2_RAID_ACTION_DATA ActionDataWord; /* 0x10 */
151 MPI2_SGE_SIMPLE_UNION ActionDataSGE; /* 0x14 */
152} MPI2_RAID_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACTION_REQUEST,
153 Mpi2RaidActionRequest_t, MPI2_POINTER pMpi2RaidActionRequest_t;
154
155/* RAID Action request Action values */
156
157#define MPI2_RAID_ACTION_INDICATOR_STRUCT (0x01)
158#define MPI2_RAID_ACTION_CREATE_VOLUME (0x02)
159#define MPI2_RAID_ACTION_DELETE_VOLUME (0x03)
160#define MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES (0x04)
161#define MPI2_RAID_ACTION_ENABLE_ALL_VOLUMES (0x05)
162#define MPI2_RAID_ACTION_PHYSDISK_OFFLINE (0x0A)
163#define MPI2_RAID_ACTION_PHYSDISK_ONLINE (0x0B)
164#define MPI2_RAID_ACTION_FAIL_PHYSDISK (0x0F)
165#define MPI2_RAID_ACTION_ACTIVATE_VOLUME (0x11)
166#define MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE (0x15)
167#define MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE (0x17)
168#define MPI2_RAID_ACTION_SET_VOLUME_NAME (0x18)
169#define MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE (0x19)
170#define MPI2_RAID_ACTION_ENABLE_FAILED_VOLUME (0x1C)
171#define MPI2_RAID_ACTION_CREATE_HOT_SPARE (0x1D)
172#define MPI2_RAID_ACTION_DELETE_HOT_SPARE (0x1E)
173#define MPI2_RAID_ACTION_SYSTEM_SHUTDOWN_INITIATED (0x20)
174#define MPI2_RAID_ACTION_START_RAID_FUNCTION (0x21)
175#define MPI2_RAID_ACTION_STOP_RAID_FUNCTION (0x22)
176
177
178/* RAID Volume Creation Structure */
179
180/*
181 * The following define can be customized for the targeted product.
182 */
183#ifndef MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS
184#define MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS (1)
185#endif
186
187typedef struct _MPI2_RAID_VOLUME_PHYSDISK
188{
189 U8 RAIDSetNum; /* 0x00 */
190 U8 PhysDiskMap; /* 0x01 */
191 U16 PhysDiskDevHandle; /* 0x02 */
192} MPI2_RAID_VOLUME_PHYSDISK, MPI2_POINTER PTR_MPI2_RAID_VOLUME_PHYSDISK,
193 Mpi2RaidVolumePhysDisk_t, MPI2_POINTER pMpi2RaidVolumePhysDisk_t;
194
195/* defines for the PhysDiskMap field */
196#define MPI2_RAIDACTION_PHYSDISK_PRIMARY (0x01)
197#define MPI2_RAIDACTION_PHYSDISK_SECONDARY (0x02)
198
199typedef struct _MPI2_RAID_VOLUME_CREATION_STRUCT
200{
201 U8 NumPhysDisks; /* 0x00 */
202 U8 VolumeType; /* 0x01 */
203 U16 Reserved1; /* 0x02 */
204 U32 VolumeCreationFlags; /* 0x04 */
205 U32 VolumeSettings; /* 0x08 */
206 U8 Reserved2; /* 0x0C */
207 U8 ResyncRate; /* 0x0D */
208 U16 DataScrubDuration; /* 0x0E */
209 U64 VolumeMaxLBA; /* 0x10 */
210 U32 StripeSize; /* 0x18 */
211 U8 Name[16]; /* 0x1C */
212 MPI2_RAID_VOLUME_PHYSDISK PhysDisk[MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS];/* 0x2C */
213} MPI2_RAID_VOLUME_CREATION_STRUCT,
214 MPI2_POINTER PTR_MPI2_RAID_VOLUME_CREATION_STRUCT,
215 Mpi2RaidVolumeCreationStruct_t, MPI2_POINTER pMpi2RaidVolumeCreationStruct_t;
216
217/* use MPI2_RAID_VOL_TYPE_ defines from mpi2_cnfg.h for VolumeType */
218
219/* defines for the VolumeCreationFlags field */
220#define MPI2_RAID_VOL_CREATION_USE_DEFAULT_SETTINGS (0x80)
221#define MPI2_RAID_VOL_CREATION_BACKGROUND_INIT (0x04)
222#define MPI2_RAID_VOL_CREATION_LOW_LEVEL_INIT (0x02)
223#define MPI2_RAID_VOL_CREATION_MIGRATE_DATA (0x01)
224
225
226/* RAID Online Capacity Expansion Structure */
227
228typedef struct _MPI2_RAID_ONLINE_CAPACITY_EXPANSION
229{
230 U32 Flags; /* 0x00 */
231 U16 DevHandle0; /* 0x04 */
232 U16 Reserved1; /* 0x06 */
233 U16 DevHandle1; /* 0x08 */
234 U16 Reserved2; /* 0x0A */
235} MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
236 MPI2_POINTER PTR_MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
237 Mpi2RaidOnlineCapacityExpansion_t,
238 MPI2_POINTER pMpi2RaidOnlineCapacityExpansion_t;
239
240
241/* RAID Volume Indicator Structure */
242
243typedef struct _MPI2_RAID_VOL_INDICATOR
244{
245 U64 TotalBlocks; /* 0x00 */
246 U64 BlocksRemaining; /* 0x08 */
247 U32 Flags; /* 0x10 */
248} MPI2_RAID_VOL_INDICATOR, MPI2_POINTER PTR_MPI2_RAID_VOL_INDICATOR,
249 Mpi2RaidVolIndicator_t, MPI2_POINTER pMpi2RaidVolIndicator_t;
250
251/* defines for RAID Volume Indicator Flags field */
252#define MPI2_RAID_VOL_FLAGS_OP_MASK (0x0000000F)
253#define MPI2_RAID_VOL_FLAGS_OP_BACKGROUND_INIT (0x00000000)
254#define MPI2_RAID_VOL_FLAGS_OP_ONLINE_CAP_EXPANSION (0x00000001)
255#define MPI2_RAID_VOL_FLAGS_OP_CONSISTENCY_CHECK (0x00000002)
256#define MPI2_RAID_VOL_FLAGS_OP_RESYNC (0x00000003)
257
258
259/* RAID Action Reply ActionData union */
260typedef union _MPI2_RAID_ACTION_REPLY_DATA
261{
262 U32 Word[5];
263 MPI2_RAID_VOL_INDICATOR RaidVolumeIndicator;
264 U16 VolDevHandle;
265 U8 VolumeState;
266 U8 PhysDiskNum;
267} MPI2_RAID_ACTION_REPLY_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY_DATA,
268 Mpi2RaidActionReplyData_t, MPI2_POINTER pMpi2RaidActionReplyData_t;
269
270/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
271
272
273/* RAID Action Reply Message */
274typedef struct _MPI2_RAID_ACTION_REPLY
275{
276 U8 Action; /* 0x00 */
277 U8 Reserved1; /* 0x01 */
278 U8 MsgLength; /* 0x02 */
279 U8 Function; /* 0x03 */
280 U16 VolDevHandle; /* 0x04 */
281 U8 PhysDiskNum; /* 0x06 */
282 U8 MsgFlags; /* 0x07 */
283 U8 VP_ID; /* 0x08 */
284 U8 VF_ID; /* 0x09 */
285 U16 Reserved2; /* 0x0A */
286 U16 Reserved3; /* 0x0C */
287 U16 IOCStatus; /* 0x0E */
288 U32 IOCLogInfo; /* 0x10 */
289 MPI2_RAID_ACTION_REPLY_DATA ActionData; /* 0x14 */
290} MPI2_RAID_ACTION_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY,
291 Mpi2RaidActionReply_t, MPI2_POINTER pMpi2RaidActionReply_t;
292
293
294#endif
295
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_sas.h b/drivers/scsi/mpt2sas/mpi/mpi2_sas.h
new file mode 100644
index 000000000000..8a42b136cf53
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_sas.h
@@ -0,0 +1,282 @@
1/*
2 * Copyright (c) 2000-2007 LSI Corporation.
3 *
4 *
5 * Name: mpi2_sas.h
6 * Title: MPI Serial Attached SCSI structures and definitions
7 * Creation Date: February 9, 2007
8 *
9 * mpi2.h Version: 02.00.02
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
17 * 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit
18 * Control Request.
19 * 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
20 * Request.
21 * --------------------------------------------------------------------------
22 */
23
24#ifndef MPI2_SAS_H
25#define MPI2_SAS_H
26
27/*
28 * Values for SASStatus.
29 */
30#define MPI2_SASSTATUS_SUCCESS (0x00)
31#define MPI2_SASSTATUS_UNKNOWN_ERROR (0x01)
32#define MPI2_SASSTATUS_INVALID_FRAME (0x02)
33#define MPI2_SASSTATUS_UTC_BAD_DEST (0x03)
34#define MPI2_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
35#define MPI2_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
36#define MPI2_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
37#define MPI2_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
38#define MPI2_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
39#define MPI2_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
40#define MPI2_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
41#define MPI2_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
42#define MPI2_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
43#define MPI2_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
44#define MPI2_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
45#define MPI2_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
46#define MPI2_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
47#define MPI2_SASSTATUS_DATA_OFFSET_ERROR (0x11)
48#define MPI2_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
49#define MPI2_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
50#define MPI2_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
51
52
53/*
54 * Values for the SAS DeviceInfo field used in SAS Device Status Change Event
55 * data and SAS Configuration pages.
56 */
57#define MPI2_SAS_DEVICE_INFO_SEP (0x00004000)
58#define MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
59#define MPI2_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
60#define MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
61#define MPI2_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
62#define MPI2_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
63#define MPI2_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
64#define MPI2_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
65#define MPI2_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
66#define MPI2_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
67#define MPI2_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
68#define MPI2_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
69
70#define MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
71#define MPI2_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
72#define MPI2_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
73#define MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
74#define MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
75
76
77/*****************************************************************************
78*
79* SAS Messages
80*
81*****************************************************************************/
82
83/****************************************************************************
84* SMP Passthrough messages
85****************************************************************************/
86
87/* SMP Passthrough Request Message */
88typedef struct _MPI2_SMP_PASSTHROUGH_REQUEST
89{
90 U8 PassthroughFlags; /* 0x00 */
91 U8 PhysicalPort; /* 0x01 */
92 U8 ChainOffset; /* 0x02 */
93 U8 Function; /* 0x03 */
94 U16 RequestDataLength; /* 0x04 */
95 U8 SGLFlags; /* 0x06 */
96 U8 MsgFlags; /* 0x07 */
97 U8 VP_ID; /* 0x08 */
98 U8 VF_ID; /* 0x09 */
99 U16 Reserved1; /* 0x0A */
100 U32 Reserved2; /* 0x0C */
101 U64 SASAddress; /* 0x10 */
102 U32 Reserved3; /* 0x18 */
103 U32 Reserved4; /* 0x1C */
104 MPI2_SIMPLE_SGE_UNION SGL; /* 0x20 */
105} MPI2_SMP_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REQUEST,
106 Mpi2SmpPassthroughRequest_t, MPI2_POINTER pMpi2SmpPassthroughRequest_t;
107
108/* values for PassthroughFlags field */
109#define MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
110
111/* values for SGLFlags field are in the SGL section of mpi2.h */
112
113
114/* SMP Passthrough Reply Message */
115typedef struct _MPI2_SMP_PASSTHROUGH_REPLY
116{
117 U8 PassthroughFlags; /* 0x00 */
118 U8 PhysicalPort; /* 0x01 */
119 U8 MsgLength; /* 0x02 */
120 U8 Function; /* 0x03 */
121 U16 ResponseDataLength; /* 0x04 */
122 U8 SGLFlags; /* 0x06 */
123 U8 MsgFlags; /* 0x07 */
124 U8 VP_ID; /* 0x08 */
125 U8 VF_ID; /* 0x09 */
126 U16 Reserved1; /* 0x0A */
127 U8 Reserved2; /* 0x0C */
128 U8 SASStatus; /* 0x0D */
129 U16 IOCStatus; /* 0x0E */
130 U32 IOCLogInfo; /* 0x10 */
131 U32 Reserved3; /* 0x14 */
132 U8 ResponseData[4]; /* 0x18 */
133} MPI2_SMP_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REPLY,
134 Mpi2SmpPassthroughReply_t, MPI2_POINTER pMpi2SmpPassthroughReply_t;
135
136/* values for PassthroughFlags field */
137#define MPI2_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
138
139/* values for SASStatus field are at the top of this file */
140
141
142/****************************************************************************
143* SATA Passthrough messages
144****************************************************************************/
145
146/* SATA Passthrough Request Message */
147typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST
148{
149 U16 DevHandle; /* 0x00 */
150 U8 ChainOffset; /* 0x02 */
151 U8 Function; /* 0x03 */
152 U16 PassthroughFlags; /* 0x04 */
153 U8 SGLFlags; /* 0x06 */
154 U8 MsgFlags; /* 0x07 */
155 U8 VP_ID; /* 0x08 */
156 U8 VF_ID; /* 0x09 */
157 U16 Reserved1; /* 0x0A */
158 U32 Reserved2; /* 0x0C */
159 U32 Reserved3; /* 0x10 */
160 U32 Reserved4; /* 0x14 */
161 U32 DataLength; /* 0x18 */
162 U8 CommandFIS[20]; /* 0x1C */
163 MPI2_SIMPLE_SGE_UNION SGL; /* 0x20 */
164} MPI2_SATA_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REQUEST,
165 Mpi2SataPassthroughRequest_t, MPI2_POINTER pMpi2SataPassthroughRequest_t;
166
167/* values for PassthroughFlags field */
168#define MPI2_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
169#define MPI2_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
170#define MPI2_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
171#define MPI2_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
172#define MPI2_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002)
173#define MPI2_SATA_PT_REQ_PT_FLAGS_READ (0x0001)
174
175/* values for SGLFlags field are in the SGL section of mpi2.h */
176
177
178/* SATA Passthrough Reply Message */
179typedef struct _MPI2_SATA_PASSTHROUGH_REPLY
180{
181 U16 DevHandle; /* 0x00 */
182 U8 MsgLength; /* 0x02 */
183 U8 Function; /* 0x03 */
184 U16 PassthroughFlags; /* 0x04 */
185 U8 SGLFlags; /* 0x06 */
186 U8 MsgFlags; /* 0x07 */
187 U8 VP_ID; /* 0x08 */
188 U8 VF_ID; /* 0x09 */
189 U16 Reserved1; /* 0x0A */
190 U8 Reserved2; /* 0x0C */
191 U8 SASStatus; /* 0x0D */
192 U16 IOCStatus; /* 0x0E */
193 U32 IOCLogInfo; /* 0x10 */
194 U8 StatusFIS[20]; /* 0x14 */
195 U32 StatusControlRegisters; /* 0x28 */
196 U32 TransferCount; /* 0x2C */
197} MPI2_SATA_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REPLY,
198 Mpi2SataPassthroughReply_t, MPI2_POINTER pMpi2SataPassthroughReply_t;
199
200/* values for SASStatus field are at the top of this file */
201
202
203/****************************************************************************
204* SAS IO Unit Control messages
205****************************************************************************/
206
207/* SAS IO Unit Control Request Message */
208typedef struct _MPI2_SAS_IOUNIT_CONTROL_REQUEST
209{
210 U8 Operation; /* 0x00 */
211 U8 Reserved1; /* 0x01 */
212 U8 ChainOffset; /* 0x02 */
213 U8 Function; /* 0x03 */
214 U16 DevHandle; /* 0x04 */
215 U8 IOCParameter; /* 0x06 */
216 U8 MsgFlags; /* 0x07 */
217 U8 VP_ID; /* 0x08 */
218 U8 VF_ID; /* 0x09 */
219 U16 Reserved3; /* 0x0A */
220 U16 Reserved4; /* 0x0C */
221 U8 PhyNum; /* 0x0E */
222 U8 PrimFlags; /* 0x0F */
223 U32 Primitive; /* 0x10 */
224 U8 LookupMethod; /* 0x14 */
225 U8 Reserved5; /* 0x15 */
226 U16 SlotNumber; /* 0x16 */
227 U64 LookupAddress; /* 0x18 */
228 U32 IOCParameterValue; /* 0x20 */
229 U32 Reserved7; /* 0x24 */
230 U32 Reserved8; /* 0x28 */
231} MPI2_SAS_IOUNIT_CONTROL_REQUEST,
232 MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REQUEST,
233 Mpi2SasIoUnitControlRequest_t, MPI2_POINTER pMpi2SasIoUnitControlRequest_t;
234
235/* values for the Operation field */
236#define MPI2_SAS_OP_CLEAR_ALL_PERSISTENT (0x02)
237#define MPI2_SAS_OP_PHY_LINK_RESET (0x06)
238#define MPI2_SAS_OP_PHY_HARD_RESET (0x07)
239#define MPI2_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
240#define MPI2_SAS_OP_SEND_PRIMITIVE (0x0A)
241#define MPI2_SAS_OP_FORCE_FULL_DISCOVERY (0x0B)
242#define MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL (0x0C)
243#define MPI2_SAS_OP_REMOVE_DEVICE (0x0D)
244#define MPI2_SAS_OP_LOOKUP_MAPPING (0x0E)
245#define MPI2_SAS_OP_SET_IOC_PARAMETER (0x0F)
246#define MPI2_SAS_OP_PRODUCT_SPECIFIC_MIN (0x80)
247
248/* values for the PrimFlags field */
249#define MPI2_SAS_PRIMFLAGS_SINGLE (0x08)
250#define MPI2_SAS_PRIMFLAGS_TRIPLE (0x02)
251#define MPI2_SAS_PRIMFLAGS_REDUNDANT (0x01)
252
253/* values for the LookupMethod field */
254#define MPI2_SAS_LOOKUP_METHOD_SAS_ADDRESS (0x01)
255#define MPI2_SAS_LOOKUP_METHOD_SAS_ENCLOSURE_SLOT (0x02)
256#define MPI2_SAS_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03)
257
258
259/* SAS IO Unit Control Reply Message */
260typedef struct _MPI2_SAS_IOUNIT_CONTROL_REPLY
261{
262 U8 Operation; /* 0x00 */
263 U8 Reserved1; /* 0x01 */
264 U8 MsgLength; /* 0x02 */
265 U8 Function; /* 0x03 */
266 U16 DevHandle; /* 0x04 */
267 U8 IOCParameter; /* 0x06 */
268 U8 MsgFlags; /* 0x07 */
269 U8 VP_ID; /* 0x08 */
270 U8 VF_ID; /* 0x09 */
271 U16 Reserved3; /* 0x0A */
272 U16 Reserved4; /* 0x0C */
273 U16 IOCStatus; /* 0x0E */
274 U32 IOCLogInfo; /* 0x10 */
275} MPI2_SAS_IOUNIT_CONTROL_REPLY,
276 MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REPLY,
277 Mpi2SasIoUnitControlReply_t, MPI2_POINTER pMpi2SasIoUnitControlReply_t;
278
279
280#endif
281
282
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_tool.h b/drivers/scsi/mpt2sas/mpi/mpi2_tool.h
new file mode 100644
index 000000000000..2ff4e936bd39
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_tool.h
@@ -0,0 +1,249 @@
1/*
2 * Copyright (c) 2000-2008 LSI Corporation.
3 *
4 *
5 * Name: mpi2_tool.h
6 * Title: MPI diagnostic tool structures and definitions
7 * Creation Date: March 26, 2007
8 *
9 * mpi2_tool.h Version: 02.00.02
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
17 * 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release
18 * structures and defines.
19 * 02-29-08 02.00.02 Modified various names to make them 32-character unique.
20 * --------------------------------------------------------------------------
21 */
22
23#ifndef MPI2_TOOL_H
24#define MPI2_TOOL_H
25
26/*****************************************************************************
27*
28* Toolbox Messages
29*
30*****************************************************************************/
31
32/* defines for the Tools */
33#define MPI2_TOOLBOX_CLEAN_TOOL (0x00)
34#define MPI2_TOOLBOX_MEMORY_MOVE_TOOL (0x01)
35#define MPI2_TOOLBOX_BEACON_TOOL (0x05)
36
37/****************************************************************************
38* Toolbox reply
39****************************************************************************/
40
41typedef struct _MPI2_TOOLBOX_REPLY
42{
43 U8 Tool; /* 0x00 */
44 U8 Reserved1; /* 0x01 */
45 U8 MsgLength; /* 0x02 */
46 U8 Function; /* 0x03 */
47 U16 Reserved2; /* 0x04 */
48 U8 Reserved3; /* 0x06 */
49 U8 MsgFlags; /* 0x07 */
50 U8 VP_ID; /* 0x08 */
51 U8 VF_ID; /* 0x09 */
52 U16 Reserved4; /* 0x0A */
53 U16 Reserved5; /* 0x0C */
54 U16 IOCStatus; /* 0x0E */
55 U32 IOCLogInfo; /* 0x10 */
56} MPI2_TOOLBOX_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_REPLY,
57 Mpi2ToolboxReply_t, MPI2_POINTER pMpi2ToolboxReply_t;
58
59
60/****************************************************************************
61* Toolbox Clean Tool request
62****************************************************************************/
63
64typedef struct _MPI2_TOOLBOX_CLEAN_REQUEST
65{
66 U8 Tool; /* 0x00 */
67 U8 Reserved1; /* 0x01 */
68 U8 ChainOffset; /* 0x02 */
69 U8 Function; /* 0x03 */
70 U16 Reserved2; /* 0x04 */
71 U8 Reserved3; /* 0x06 */
72 U8 MsgFlags; /* 0x07 */
73 U8 VP_ID; /* 0x08 */
74 U8 VF_ID; /* 0x09 */
75 U16 Reserved4; /* 0x0A */
76 U32 Flags; /* 0x0C */
77 } MPI2_TOOLBOX_CLEAN_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_CLEAN_REQUEST,
78 Mpi2ToolboxCleanRequest_t, MPI2_POINTER pMpi2ToolboxCleanRequest_t;
79
80/* values for the Flags field */
81#define MPI2_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000)
82#define MPI2_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000)
83#define MPI2_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
84#define MPI2_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
85#define MPI2_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
86#define MPI2_TOOLBOX_CLEAN_MEGARAID (0x02000000)
87#define MPI2_TOOLBOX_CLEAN_INITIALIZATION (0x01000000)
88#define MPI2_TOOLBOX_CLEAN_FLASH (0x00000004)
89#define MPI2_TOOLBOX_CLEAN_SEEPROM (0x00000002)
90#define MPI2_TOOLBOX_CLEAN_NVSRAM (0x00000001)
91
92
93/****************************************************************************
94* Toolbox Memory Move request
95****************************************************************************/
96
97typedef struct _MPI2_TOOLBOX_MEM_MOVE_REQUEST
98{
99 U8 Tool; /* 0x00 */
100 U8 Reserved1; /* 0x01 */
101 U8 ChainOffset; /* 0x02 */
102 U8 Function; /* 0x03 */
103 U16 Reserved2; /* 0x04 */
104 U8 Reserved3; /* 0x06 */
105 U8 MsgFlags; /* 0x07 */
106 U8 VP_ID; /* 0x08 */
107 U8 VF_ID; /* 0x09 */
108 U16 Reserved4; /* 0x0A */
109 MPI2_SGE_SIMPLE_UNION SGL; /* 0x0C */
110} MPI2_TOOLBOX_MEM_MOVE_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_MEM_MOVE_REQUEST,
111 Mpi2ToolboxMemMoveRequest_t, MPI2_POINTER pMpi2ToolboxMemMoveRequest_t;
112
113
114/****************************************************************************
115* Toolbox Beacon Tool request
116****************************************************************************/
117
118typedef struct _MPI2_TOOLBOX_BEACON_REQUEST
119{
120 U8 Tool; /* 0x00 */
121 U8 Reserved1; /* 0x01 */
122 U8 ChainOffset; /* 0x02 */
123 U8 Function; /* 0x03 */
124 U16 Reserved2; /* 0x04 */
125 U8 Reserved3; /* 0x06 */
126 U8 MsgFlags; /* 0x07 */
127 U8 VP_ID; /* 0x08 */
128 U8 VF_ID; /* 0x09 */
129 U16 Reserved4; /* 0x0A */
130 U8 Reserved5; /* 0x0C */
131 U8 PhysicalPort; /* 0x0D */
132 U8 Reserved6; /* 0x0E */
133 U8 Flags; /* 0x0F */
134} MPI2_TOOLBOX_BEACON_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_BEACON_REQUEST,
135 Mpi2ToolboxBeaconRequest_t, MPI2_POINTER pMpi2ToolboxBeaconRequest_t;
136
137/* values for the Flags field */
138#define MPI2_TOOLBOX_FLAGS_BEACONMODE_OFF (0x00)
139#define MPI2_TOOLBOX_FLAGS_BEACONMODE_ON (0x01)
140
141
142/*****************************************************************************
143*
144* Diagnostic Buffer Messages
145*
146*****************************************************************************/
147
148
149/****************************************************************************
150* Diagnostic Buffer Post request
151****************************************************************************/
152
153typedef struct _MPI2_DIAG_BUFFER_POST_REQUEST
154{
155 U8 Reserved1; /* 0x00 */
156 U8 BufferType; /* 0x01 */
157 U8 ChainOffset; /* 0x02 */
158 U8 Function; /* 0x03 */
159 U16 Reserved2; /* 0x04 */
160 U8 Reserved3; /* 0x06 */
161 U8 MsgFlags; /* 0x07 */
162 U8 VP_ID; /* 0x08 */
163 U8 VF_ID; /* 0x09 */
164 U16 Reserved4; /* 0x0A */
165 U64 BufferAddress; /* 0x0C */
166 U32 BufferLength; /* 0x14 */
167 U32 Reserved5; /* 0x18 */
168 U32 Reserved6; /* 0x1C */
169 U32 Flags; /* 0x20 */
170 U32 ProductSpecific[23]; /* 0x24 */
171} MPI2_DIAG_BUFFER_POST_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REQUEST,
172 Mpi2DiagBufferPostRequest_t, MPI2_POINTER pMpi2DiagBufferPostRequest_t;
173
174/* values for the BufferType field */
175#define MPI2_DIAG_BUF_TYPE_TRACE (0x00)
176#define MPI2_DIAG_BUF_TYPE_SNAPSHOT (0x01)
177/* count of the number of buffer types */
178#define MPI2_DIAG_BUF_TYPE_COUNT (0x02)
179
180
181/****************************************************************************
182* Diagnostic Buffer Post reply
183****************************************************************************/
184
185typedef struct _MPI2_DIAG_BUFFER_POST_REPLY
186{
187 U8 Reserved1; /* 0x00 */
188 U8 BufferType; /* 0x01 */
189 U8 MsgLength; /* 0x02 */
190 U8 Function; /* 0x03 */
191 U16 Reserved2; /* 0x04 */
192 U8 Reserved3; /* 0x06 */
193 U8 MsgFlags; /* 0x07 */
194 U8 VP_ID; /* 0x08 */
195 U8 VF_ID; /* 0x09 */
196 U16 Reserved4; /* 0x0A */
197 U16 Reserved5; /* 0x0C */
198 U16 IOCStatus; /* 0x0E */
199 U32 IOCLogInfo; /* 0x10 */
200 U32 TransferLength; /* 0x14 */
201} MPI2_DIAG_BUFFER_POST_REPLY, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REPLY,
202 Mpi2DiagBufferPostReply_t, MPI2_POINTER pMpi2DiagBufferPostReply_t;
203
204
205/****************************************************************************
206* Diagnostic Release request
207****************************************************************************/
208
209typedef struct _MPI2_DIAG_RELEASE_REQUEST
210{
211 U8 Reserved1; /* 0x00 */
212 U8 BufferType; /* 0x01 */
213 U8 ChainOffset; /* 0x02 */
214 U8 Function; /* 0x03 */
215 U16 Reserved2; /* 0x04 */
216 U8 Reserved3; /* 0x06 */
217 U8 MsgFlags; /* 0x07 */
218 U8 VP_ID; /* 0x08 */
219 U8 VF_ID; /* 0x09 */
220 U16 Reserved4; /* 0x0A */
221} MPI2_DIAG_RELEASE_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REQUEST,
222 Mpi2DiagReleaseRequest_t, MPI2_POINTER pMpi2DiagReleaseRequest_t;
223
224
225/****************************************************************************
226* Diagnostic Buffer Post reply
227****************************************************************************/
228
229typedef struct _MPI2_DIAG_RELEASE_REPLY
230{
231 U8 Reserved1; /* 0x00 */
232 U8 BufferType; /* 0x01 */
233 U8 MsgLength; /* 0x02 */
234 U8 Function; /* 0x03 */
235 U16 Reserved2; /* 0x04 */
236 U8 Reserved3; /* 0x06 */
237 U8 MsgFlags; /* 0x07 */
238 U8 VP_ID; /* 0x08 */
239 U8 VF_ID; /* 0x09 */
240 U16 Reserved4; /* 0x0A */
241 U16 Reserved5; /* 0x0C */
242 U16 IOCStatus; /* 0x0E */
243 U32 IOCLogInfo; /* 0x10 */
244} MPI2_DIAG_RELEASE_REPLY, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REPLY,
245 Mpi2DiagReleaseReply_t, MPI2_POINTER pMpi2DiagReleaseReply_t;
246
247
248#endif
249
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_type.h b/drivers/scsi/mpt2sas/mpi/mpi2_type.h
new file mode 100644
index 000000000000..cfde017bf16e
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpi/mpi2_type.h
@@ -0,0 +1,61 @@
1/*
2 * Copyright (c) 2000-2007 LSI Corporation.
3 *
4 *
5 * Name: mpi2_type.h
6 * Title: MPI basic type definitions
7 * Creation Date: August 16, 2006
8 *
9 * mpi2_type.h Version: 02.00.00
10 *
11 * Version History
12 * ---------------
13 *
14 * Date Version Description
15 * -------- -------- ------------------------------------------------------
16 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
17 * --------------------------------------------------------------------------
18 */
19
20#ifndef MPI2_TYPE_H
21#define MPI2_TYPE_H
22
23
24/*******************************************************************************
25 * Define MPI2_POINTER if it hasn't already been defined. By default
26 * MPI2_POINTER is defined to be a near pointer. MPI2_POINTER can be defined as
27 * a far pointer by defining MPI2_POINTER as "far *" before this header file is
28 * included.
29 */
30#ifndef MPI2_POINTER
31#define MPI2_POINTER *
32#endif
33
34/* the basic types may have already been included by mpi_type.h */
35#ifndef MPI_TYPE_H
36/*****************************************************************************
37*
38* Basic Types
39*
40*****************************************************************************/
41
42typedef u8 U8;
43typedef __le16 U16;
44typedef __le32 U32;
45typedef __le64 U64 __attribute__((aligned(4)));
46
47/*****************************************************************************
48*
49* Pointer Types
50*
51*****************************************************************************/
52
53typedef U8 *PU8;
54typedef U16 *PU16;
55typedef U32 *PU32;
56typedef U64 *PU64;
57
58#endif
59
60#endif
61
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c
new file mode 100644
index 000000000000..52427a8324f5
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpt2sas_base.c
@@ -0,0 +1,3435 @@
1/*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2008 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45#include <linux/version.h>
46#include <linux/kernel.h>
47#include <linux/module.h>
48#include <linux/errno.h>
49#include <linux/init.h>
50#include <linux/slab.h>
51#include <linux/types.h>
52#include <linux/pci.h>
53#include <linux/kdev_t.h>
54#include <linux/blkdev.h>
55#include <linux/delay.h>
56#include <linux/interrupt.h>
57#include <linux/dma-mapping.h>
58#include <linux/sort.h>
59#include <linux/io.h>
60
61#include "mpt2sas_base.h"
62
63static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
64
65#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
66#define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */
67
68static int max_queue_depth = -1;
69module_param(max_queue_depth, int, 0);
70MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
71
72static int max_sgl_entries = -1;
73module_param(max_sgl_entries, int, 0);
74MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
75
76static int msix_disable = -1;
77module_param(msix_disable, int, 0);
78MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
79
80/**
81 * _base_fault_reset_work - workq handling ioc fault conditions
82 * @work: input argument, used to derive ioc
83 * Context: sleep.
84 *
85 * Return nothing.
86 */
87static void
88_base_fault_reset_work(struct work_struct *work)
89{
90 struct MPT2SAS_ADAPTER *ioc =
91 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
92 unsigned long flags;
93 u32 doorbell;
94 int rc;
95
96 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
97 if (ioc->ioc_reset_in_progress)
98 goto rearm_timer;
99 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
100
101 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
102 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
103 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
104 FORCE_BIG_HAMMER);
105 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
106 __func__, (rc == 0) ? "success" : "failed");
107 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
108 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
109 mpt2sas_base_fault_info(ioc, doorbell &
110 MPI2_DOORBELL_DATA_MASK);
111 }
112
113 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
114 rearm_timer:
115 if (ioc->fault_reset_work_q)
116 queue_delayed_work(ioc->fault_reset_work_q,
117 &ioc->fault_reset_work,
118 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
119 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
120}
121
122#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
123/**
124 * _base_sas_ioc_info - verbose translation of the ioc status
125 * @ioc: pointer to scsi command object
126 * @mpi_reply: reply mf payload returned from firmware
127 * @request_hdr: request mf
128 *
129 * Return nothing.
130 */
131static void
132_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
133 MPI2RequestHeader_t *request_hdr)
134{
135 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
136 MPI2_IOCSTATUS_MASK;
137 char *desc = NULL;
138 u16 frame_sz;
139 char *func_str = NULL;
140
141 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
142 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
143 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
144 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
145 return;
146
147 switch (ioc_status) {
148
149/****************************************************************************
150* Common IOCStatus values for all replies
151****************************************************************************/
152
153 case MPI2_IOCSTATUS_INVALID_FUNCTION:
154 desc = "invalid function";
155 break;
156 case MPI2_IOCSTATUS_BUSY:
157 desc = "busy";
158 break;
159 case MPI2_IOCSTATUS_INVALID_SGL:
160 desc = "invalid sgl";
161 break;
162 case MPI2_IOCSTATUS_INTERNAL_ERROR:
163 desc = "internal error";
164 break;
165 case MPI2_IOCSTATUS_INVALID_VPID:
166 desc = "invalid vpid";
167 break;
168 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
169 desc = "insufficient resources";
170 break;
171 case MPI2_IOCSTATUS_INVALID_FIELD:
172 desc = "invalid field";
173 break;
174 case MPI2_IOCSTATUS_INVALID_STATE:
175 desc = "invalid state";
176 break;
177 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
178 desc = "op state not supported";
179 break;
180
181/****************************************************************************
182* Config IOCStatus values
183****************************************************************************/
184
185 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
186 desc = "config invalid action";
187 break;
188 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
189 desc = "config invalid type";
190 break;
191 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
192 desc = "config invalid page";
193 break;
194 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
195 desc = "config invalid data";
196 break;
197 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
198 desc = "config no defaults";
199 break;
200 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
201 desc = "config cant commit";
202 break;
203
204/****************************************************************************
205* SCSI IO Reply
206****************************************************************************/
207
208 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
209 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
210 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
211 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
212 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
213 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
214 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
215 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
216 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
217 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
218 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
219 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
220 break;
221
222/****************************************************************************
223* For use by SCSI Initiator and SCSI Target end-to-end data protection
224****************************************************************************/
225
226 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
227 desc = "eedp guard error";
228 break;
229 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
230 desc = "eedp ref tag error";
231 break;
232 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
233 desc = "eedp app tag error";
234 break;
235
236/****************************************************************************
237* SCSI Target values
238****************************************************************************/
239
240 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
241 desc = "target invalid io index";
242 break;
243 case MPI2_IOCSTATUS_TARGET_ABORTED:
244 desc = "target aborted";
245 break;
246 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
247 desc = "target no conn retryable";
248 break;
249 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
250 desc = "target no connection";
251 break;
252 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
253 desc = "target xfer count mismatch";
254 break;
255 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
256 desc = "target data offset error";
257 break;
258 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
259 desc = "target too much write data";
260 break;
261 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
262 desc = "target iu too short";
263 break;
264 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
265 desc = "target ack nak timeout";
266 break;
267 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
268 desc = "target nak received";
269 break;
270
271/****************************************************************************
272* Serial Attached SCSI values
273****************************************************************************/
274
275 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
276 desc = "smp request failed";
277 break;
278 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
279 desc = "smp data overrun";
280 break;
281
282/****************************************************************************
283* Diagnostic Buffer Post / Diagnostic Release values
284****************************************************************************/
285
286 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
287 desc = "diagnostic released";
288 break;
289 default:
290 break;
291 }
292
293 if (!desc)
294 return;
295
296 switch (request_hdr->Function) {
297 case MPI2_FUNCTION_CONFIG:
298 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
299 func_str = "config_page";
300 break;
301 case MPI2_FUNCTION_SCSI_TASK_MGMT:
302 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
303 func_str = "task_mgmt";
304 break;
305 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
306 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
307 func_str = "sas_iounit_ctl";
308 break;
309 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
310 frame_sz = sizeof(Mpi2SepRequest_t);
311 func_str = "enclosure";
312 break;
313 case MPI2_FUNCTION_IOC_INIT:
314 frame_sz = sizeof(Mpi2IOCInitRequest_t);
315 func_str = "ioc_init";
316 break;
317 case MPI2_FUNCTION_PORT_ENABLE:
318 frame_sz = sizeof(Mpi2PortEnableRequest_t);
319 func_str = "port_enable";
320 break;
321 case MPI2_FUNCTION_SMP_PASSTHROUGH:
322 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
323 func_str = "smp_passthru";
324 break;
325 default:
326 frame_sz = 32;
327 func_str = "unknown";
328 break;
329 }
330
331 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
332 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
333
334 _debug_dump_mf(request_hdr, frame_sz/4);
335}
336
337/**
338 * _base_display_event_data - verbose translation of firmware asyn events
339 * @ioc: pointer to scsi command object
340 * @mpi_reply: reply mf payload returned from firmware
341 *
342 * Return nothing.
343 */
344static void
345_base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
346 Mpi2EventNotificationReply_t *mpi_reply)
347{
348 char *desc = NULL;
349 u16 event;
350
351 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
352 return;
353
354 event = le16_to_cpu(mpi_reply->Event);
355
356 switch (event) {
357 case MPI2_EVENT_LOG_DATA:
358 desc = "Log Data";
359 break;
360 case MPI2_EVENT_STATE_CHANGE:
361 desc = "Status Change";
362 break;
363 case MPI2_EVENT_HARD_RESET_RECEIVED:
364 desc = "Hard Reset Received";
365 break;
366 case MPI2_EVENT_EVENT_CHANGE:
367 desc = "Event Change";
368 break;
369 case MPI2_EVENT_TASK_SET_FULL:
370 desc = "Task Set Full";
371 break;
372 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
373 desc = "Device Status Change";
374 break;
375 case MPI2_EVENT_IR_OPERATION_STATUS:
376 desc = "IR Operation Status";
377 break;
378 case MPI2_EVENT_SAS_DISCOVERY:
379 desc = "Discovery";
380 break;
381 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
382 desc = "SAS Broadcast Primitive";
383 break;
384 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
385 desc = "SAS Init Device Status Change";
386 break;
387 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
388 desc = "SAS Init Table Overflow";
389 break;
390 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
391 desc = "SAS Topology Change List";
392 break;
393 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
394 desc = "SAS Enclosure Device Status Change";
395 break;
396 case MPI2_EVENT_IR_VOLUME:
397 desc = "IR Volume";
398 break;
399 case MPI2_EVENT_IR_PHYSICAL_DISK:
400 desc = "IR Physical Disk";
401 break;
402 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
403 desc = "IR Configuration Change List";
404 break;
405 case MPI2_EVENT_LOG_ENTRY_ADDED:
406 desc = "Log Entry Added";
407 break;
408 }
409
410 if (!desc)
411 return;
412
413 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
414}
415#endif
416
417/**
418 * _base_sas_log_info - verbose translation of firmware log info
419 * @ioc: pointer to scsi command object
420 * @log_info: log info
421 *
422 * Return nothing.
423 */
424static void
425_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
426{
427 union loginfo_type {
428 u32 loginfo;
429 struct {
430 u32 subcode:16;
431 u32 code:8;
432 u32 originator:4;
433 u32 bus_type:4;
434 } dw;
435 };
436 union loginfo_type sas_loginfo;
437 char *originator_str = NULL;
438
439 sas_loginfo.loginfo = log_info;
440 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
441 return;
442
443 /* eat the loginfos associated with task aborts */
444 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
445 0x31140000 || log_info == 0x31130000))
446 return;
447
448 switch (sas_loginfo.dw.originator) {
449 case 0:
450 originator_str = "IOP";
451 break;
452 case 1:
453 originator_str = "PL";
454 break;
455 case 2:
456 originator_str = "IR";
457 break;
458 }
459
460 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
461 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
462 originator_str, sas_loginfo.dw.code,
463 sas_loginfo.dw.subcode);
464}
465
466/**
467 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
468 * @ioc: pointer to scsi command object
469 * @fault_code: fault code
470 *
471 * Return nothing.
472 */
473void
474mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
475{
476 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
477 ioc->name, fault_code);
478}
479
480/**
481 * _base_display_reply_info -
482 * @ioc: pointer to scsi command object
483 * @smid: system request message index
484 * @VF_ID: virtual function id
485 * @reply: reply message frame(lower 32bit addr)
486 *
487 * Return nothing.
488 */
489static void
490_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID,
491 u32 reply)
492{
493 MPI2DefaultReply_t *mpi_reply;
494 u16 ioc_status;
495
496 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
497 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
498#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
499 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
500 (ioc->logging_level & MPT_DEBUG_REPLY)) {
501 _base_sas_ioc_info(ioc , mpi_reply,
502 mpt2sas_base_get_msg_frame(ioc, smid));
503 }
504#endif
505 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
506 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
507}
508
509/**
510 * mpt2sas_base_done - base internal command completion routine
511 * @ioc: pointer to scsi command object
512 * @smid: system request message index
513 * @VF_ID: virtual function id
514 * @reply: reply message frame(lower 32bit addr)
515 *
516 * Return nothing.
517 */
518void
519mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
520{
521 MPI2DefaultReply_t *mpi_reply;
522
523 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
524 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
525 return;
526
527 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
528 return;
529
530 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
531 if (mpi_reply) {
532 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
533 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
534 }
535 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
536 complete(&ioc->base_cmds.done);
537}
538
539/**
540 * _base_async_event - main callback handler for firmware asyn events
541 * @ioc: pointer to scsi command object
542 * @VF_ID: virtual function id
543 * @reply: reply message frame(lower 32bit addr)
544 *
545 * Return nothing.
546 */
547static void
548_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply)
549{
550 Mpi2EventNotificationReply_t *mpi_reply;
551 Mpi2EventAckRequest_t *ack_request;
552 u16 smid;
553
554 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
555 if (!mpi_reply)
556 return;
557 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
558 return;
559#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
560 _base_display_event_data(ioc, mpi_reply);
561#endif
562 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
563 goto out;
564 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
565 if (!smid) {
566 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
567 ioc->name, __func__);
568 goto out;
569 }
570
571 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
572 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
573 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
574 ack_request->Event = mpi_reply->Event;
575 ack_request->EventContext = mpi_reply->EventContext;
576 ack_request->VF_ID = VF_ID;
577 mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
578
579 out:
580
581 /* scsih callback handler */
582 mpt2sas_scsih_event_callback(ioc, VF_ID, reply);
583
584 /* ctl callback handler */
585 mpt2sas_ctl_event_callback(ioc, VF_ID, reply);
586}
587
588/**
589 * _base_mask_interrupts - disable interrupts
590 * @ioc: pointer to scsi command object
591 *
592 * Disabling ResetIRQ, Reply and Doorbell Interrupts
593 *
594 * Return nothing.
595 */
596static void
597_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
598{
599 u32 him_register;
600
601 ioc->mask_interrupts = 1;
602 him_register = readl(&ioc->chip->HostInterruptMask);
603 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
604 writel(him_register, &ioc->chip->HostInterruptMask);
605 readl(&ioc->chip->HostInterruptMask);
606}
607
608/**
609 * _base_unmask_interrupts - enable interrupts
610 * @ioc: pointer to scsi command object
611 *
612 * Enabling only Reply Interrupts
613 *
614 * Return nothing.
615 */
616static void
617_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
618{
619 u32 him_register;
620
621 writel(0, &ioc->chip->HostInterruptStatus);
622 him_register = readl(&ioc->chip->HostInterruptMask);
623 him_register &= ~MPI2_HIM_RIM;
624 writel(him_register, &ioc->chip->HostInterruptMask);
625 ioc->mask_interrupts = 0;
626}
627
628/**
629 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
630 * @irq: irq number (not used)
631 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
632 * @r: pt_regs pointer (not used)
633 *
634 * Return IRQ_HANDLE if processed, else IRQ_NONE.
635 */
636static irqreturn_t
637_base_interrupt(int irq, void *bus_id)
638{
639 u32 post_index, post_index_next, completed_cmds;
640 u8 request_desript_type;
641 u16 smid;
642 u8 cb_idx;
643 u32 reply;
644 u8 VF_ID;
645 int i;
646 struct MPT2SAS_ADAPTER *ioc = bus_id;
647
648 if (ioc->mask_interrupts)
649 return IRQ_NONE;
650
651 post_index = ioc->reply_post_host_index;
652 request_desript_type = ioc->reply_post_free[post_index].
653 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
654 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
655 return IRQ_NONE;
656
657 completed_cmds = 0;
658 do {
659 if (ioc->reply_post_free[post_index].Words == ~0ULL)
660 goto out;
661 reply = 0;
662 cb_idx = 0xFF;
663 smid = le16_to_cpu(ioc->reply_post_free[post_index].
664 Default.DescriptorTypeDependent1);
665 VF_ID = ioc->reply_post_free[post_index].
666 Default.VF_ID;
667 if (request_desript_type ==
668 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
669 reply = le32_to_cpu(ioc->reply_post_free[post_index].
670 AddressReply.ReplyFrameAddress);
671 } else if (request_desript_type ==
672 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
673 goto next;
674 else if (request_desript_type ==
675 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
676 goto next;
677 if (smid)
678 cb_idx = ioc->scsi_lookup[smid - 1].cb_idx;
679 if (smid && cb_idx != 0xFF) {
680 mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply);
681 if (reply)
682 _base_display_reply_info(ioc, smid, VF_ID,
683 reply);
684 mpt2sas_base_free_smid(ioc, smid);
685 }
686 if (!smid)
687 _base_async_event(ioc, VF_ID, reply);
688
689 /* reply free queue handling */
690 if (reply) {
691 ioc->reply_free_host_index =
692 (ioc->reply_free_host_index ==
693 (ioc->reply_free_queue_depth - 1)) ?
694 0 : ioc->reply_free_host_index + 1;
695 ioc->reply_free[ioc->reply_free_host_index] =
696 cpu_to_le32(reply);
697 writel(ioc->reply_free_host_index,
698 &ioc->chip->ReplyFreeHostIndex);
699 wmb();
700 }
701
702 next:
703 post_index_next = (post_index == (ioc->reply_post_queue_depth -
704 1)) ? 0 : post_index + 1;
705 request_desript_type =
706 ioc->reply_post_free[post_index_next].Default.ReplyFlags
707 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
708 completed_cmds++;
709 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
710 goto out;
711 post_index = post_index_next;
712 } while (1);
713
714 out:
715
716 if (!completed_cmds)
717 return IRQ_NONE;
718
719 /* reply post descriptor handling */
720 post_index_next = ioc->reply_post_host_index;
721 for (i = 0 ; i < completed_cmds; i++) {
722 post_index = post_index_next;
723 /* poison the reply post descriptor */
724 ioc->reply_post_free[post_index_next].Words = ~0ULL;
725 post_index_next = (post_index ==
726 (ioc->reply_post_queue_depth - 1))
727 ? 0 : post_index + 1;
728 }
729 ioc->reply_post_host_index = post_index_next;
730 writel(post_index_next, &ioc->chip->ReplyPostHostIndex);
731 wmb();
732 return IRQ_HANDLED;
733}
734
735/**
736 * mpt2sas_base_release_callback_handler - clear interupt callback handler
737 * @cb_idx: callback index
738 *
739 * Return nothing.
740 */
741void
742mpt2sas_base_release_callback_handler(u8 cb_idx)
743{
744 mpt_callbacks[cb_idx] = NULL;
745}
746
747/**
748 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
749 * @cb_func: callback function
750 *
751 * Returns cb_func.
752 */
753u8
754mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
755{
756 u8 cb_idx;
757
758 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
759 if (mpt_callbacks[cb_idx] == NULL)
760 break;
761
762 mpt_callbacks[cb_idx] = cb_func;
763 return cb_idx;
764}
765
766/**
767 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
768 *
769 * Return nothing.
770 */
771void
772mpt2sas_base_initialize_callback_handler(void)
773{
774 u8 cb_idx;
775
776 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
777 mpt2sas_base_release_callback_handler(cb_idx);
778}
779
780/**
781 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
782 * @ioc: per adapter object
783 * @paddr: virtual address for SGE
784 *
785 * Create a zero length scatter gather entry to insure the IOCs hardware has
786 * something to use if the target device goes brain dead and tries
787 * to send data even when none is asked for.
788 *
789 * Return nothing.
790 */
791void
792mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
793{
794 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
795 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
796 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
797 MPI2_SGE_FLAGS_SHIFT);
798 ioc->base_add_sg_single(paddr, flags_length, -1);
799}
800
801/**
802 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
803 * @paddr: virtual address for SGE
804 * @flags_length: SGE flags and data transfer length
805 * @dma_addr: Physical address
806 *
807 * Return nothing.
808 */
809static void
810_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
811{
812 Mpi2SGESimple32_t *sgel = paddr;
813
814 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
815 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
816 sgel->FlagsLength = cpu_to_le32(flags_length);
817 sgel->Address = cpu_to_le32(dma_addr);
818}
819
820
821/**
822 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
823 * @paddr: virtual address for SGE
824 * @flags_length: SGE flags and data transfer length
825 * @dma_addr: Physical address
826 *
827 * Return nothing.
828 */
829static void
830_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
831{
832 Mpi2SGESimple64_t *sgel = paddr;
833
834 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
835 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
836 sgel->FlagsLength = cpu_to_le32(flags_length);
837 sgel->Address = cpu_to_le64(dma_addr);
838}
839
840#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
841
842/**
843 * _base_config_dma_addressing - set dma addressing
844 * @ioc: per adapter object
845 * @pdev: PCI device struct
846 *
847 * Returns 0 for success, non-zero for failure.
848 */
849static int
850_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
851{
852 struct sysinfo s;
853 char *desc = NULL;
854
855 if (sizeof(dma_addr_t) > 4) {
856 const uint64_t required_mask =
857 dma_get_required_mask(&pdev->dev);
858 if ((required_mask > DMA_32BIT_MASK) && !pci_set_dma_mask(pdev,
859 DMA_64BIT_MASK) && !pci_set_consistent_dma_mask(pdev,
860 DMA_64BIT_MASK)) {
861 ioc->base_add_sg_single = &_base_add_sg_single_64;
862 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
863 desc = "64";
864 goto out;
865 }
866 }
867
868 if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)
869 && !pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
870 ioc->base_add_sg_single = &_base_add_sg_single_32;
871 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
872 desc = "32";
873 } else
874 return -ENODEV;
875
876 out:
877 si_meminfo(&s);
878 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
879 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
880
881 return 0;
882}
883
884/**
885 * _base_save_msix_table - backup msix vector table
886 * @ioc: per adapter object
887 *
888 * This address an errata where diag reset clears out the table
889 */
890static void
891_base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
892{
893 int i;
894
895 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
896 return;
897
898 for (i = 0; i < ioc->msix_vector_count; i++)
899 ioc->msix_table_backup[i] = ioc->msix_table[i];
900}
901
902/**
903 * _base_restore_msix_table - this restores the msix vector table
904 * @ioc: per adapter object
905 *
906 */
907static void
908_base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
909{
910 int i;
911
912 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
913 return;
914
915 for (i = 0; i < ioc->msix_vector_count; i++)
916 ioc->msix_table[i] = ioc->msix_table_backup[i];
917}
918
919/**
920 * _base_check_enable_msix - checks MSIX capabable.
921 * @ioc: per adapter object
922 *
923 * Check to see if card is capable of MSIX, and set number
924 * of avaliable msix vectors
925 */
926static int
927_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
928{
929 int base;
930 u16 message_control;
931 u32 msix_table_offset;
932
933 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
934 if (!base) {
935 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
936 "supported\n", ioc->name));
937 return -EINVAL;
938 }
939
940 /* get msix vector count */
941 pci_read_config_word(ioc->pdev, base + 2, &message_control);
942 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
943
944 /* get msix table */
945 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
946 msix_table_offset &= 0xFFFFFFF8;
947 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
948
949 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
950 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
951 ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
952 return 0;
953}
954
955/**
956 * _base_disable_msix - disables msix
957 * @ioc: per adapter object
958 *
959 */
960static void
961_base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
962{
963 if (ioc->msix_enable) {
964 pci_disable_msix(ioc->pdev);
965 kfree(ioc->msix_table_backup);
966 ioc->msix_table_backup = NULL;
967 ioc->msix_enable = 0;
968 }
969}
970
971/**
972 * _base_enable_msix - enables msix, failback to io_apic
973 * @ioc: per adapter object
974 *
975 */
976static int
977_base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
978{
979 struct msix_entry entries;
980 int r;
981 u8 try_msix = 0;
982
983 if (msix_disable == -1 || msix_disable == 0)
984 try_msix = 1;
985
986 if (!try_msix)
987 goto try_ioapic;
988
989 if (_base_check_enable_msix(ioc) != 0)
990 goto try_ioapic;
991
992 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
993 sizeof(u32), GFP_KERNEL);
994 if (!ioc->msix_table_backup) {
995 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
996 "msix_table_backup failed!!!\n", ioc->name));
997 goto try_ioapic;
998 }
999
1000 memset(&entries, 0, sizeof(struct msix_entry));
1001 r = pci_enable_msix(ioc->pdev, &entries, 1);
1002 if (r) {
1003 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1004 "failed (r=%d) !!!\n", ioc->name, r));
1005 goto try_ioapic;
1006 }
1007
1008 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
1009 ioc->name, ioc);
1010 if (r) {
1011 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
1012 "interrupt %d !!!\n", ioc->name, entries.vector));
1013 pci_disable_msix(ioc->pdev);
1014 goto try_ioapic;
1015 }
1016
1017 ioc->pci_irq = entries.vector;
1018 ioc->msix_enable = 1;
1019 return 0;
1020
1021/* failback to io_apic interrupt routing */
1022 try_ioapic:
1023
1024 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
1025 ioc->name, ioc);
1026 if (r) {
1027 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1028 ioc->name, ioc->pdev->irq);
1029 r = -EBUSY;
1030 goto out_fail;
1031 }
1032
1033 ioc->pci_irq = ioc->pdev->irq;
1034 return 0;
1035
1036 out_fail:
1037 return r;
1038}
1039
1040/**
1041 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1042 * @ioc: per adapter object
1043 *
1044 * Returns 0 for success, non-zero for failure.
1045 */
1046int
1047mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1048{
1049 struct pci_dev *pdev = ioc->pdev;
1050 u32 memap_sz;
1051 u32 pio_sz;
1052 int i, r = 0;
1053
1054 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
1055 ioc->name, __func__));
1056
1057 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1058 if (pci_enable_device_mem(pdev)) {
1059 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1060 "failed\n", ioc->name);
1061 return -ENODEV;
1062 }
1063
1064
1065 if (pci_request_selected_regions(pdev, ioc->bars,
1066 MPT2SAS_DRIVER_NAME)) {
1067 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1068 "failed\n", ioc->name);
1069 r = -ENODEV;
1070 goto out_fail;
1071 }
1072
1073 pci_set_master(pdev);
1074
1075 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1076 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1077 ioc->name, pci_name(pdev));
1078 r = -ENODEV;
1079 goto out_fail;
1080 }
1081
1082 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1083 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
1084 if (pio_sz)
1085 continue;
1086 ioc->pio_chip = pci_resource_start(pdev, i);
1087 pio_sz = pci_resource_len(pdev, i);
1088 } else {
1089 if (memap_sz)
1090 continue;
1091 ioc->chip_phys = pci_resource_start(pdev, i);
1092 memap_sz = pci_resource_len(pdev, i);
1093 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1094 if (ioc->chip == NULL) {
1095 printk(MPT2SAS_ERR_FMT "unable to map adapter "
1096 "memory!\n", ioc->name);
1097 r = -EINVAL;
1098 goto out_fail;
1099 }
1100 }
1101 }
1102
1103 pci_set_drvdata(pdev, ioc->shost);
1104 _base_mask_interrupts(ioc);
1105 r = _base_enable_msix(ioc);
1106 if (r)
1107 goto out_fail;
1108
1109 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1110 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1111 "IO-APIC enabled"), ioc->pci_irq);
1112 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
1113 ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
1114 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
1115 ioc->name, ioc->pio_chip, pio_sz);
1116
1117 return 0;
1118
1119 out_fail:
1120 if (ioc->chip_phys)
1121 iounmap(ioc->chip);
1122 ioc->chip_phys = 0;
1123 ioc->pci_irq = -1;
1124 pci_release_selected_regions(ioc->pdev, ioc->bars);
1125 pci_disable_device(pdev);
1126 pci_set_drvdata(pdev, NULL);
1127 return r;
1128}
1129
1130/**
1131 * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr
1132 * @ioc: per adapter object
1133 * @smid: system request message index(smid zero is invalid)
1134 *
1135 * Returns phys pointer to message frame.
1136 */
1137dma_addr_t
1138mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1139{
1140 return ioc->request_dma + (smid * ioc->request_sz);
1141}
1142
1143/**
1144 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1145 * @ioc: per adapter object
1146 * @smid: system request message index(smid zero is invalid)
1147 *
1148 * Returns virt pointer to message frame.
1149 */
1150void *
1151mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1152{
1153 return (void *)(ioc->request + (smid * ioc->request_sz));
1154}
1155
1156/**
1157 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1158 * @ioc: per adapter object
1159 * @smid: system request message index
1160 *
1161 * Returns virt pointer to sense buffer.
1162 */
1163void *
1164mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1165{
1166 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1167}
1168
1169/**
1170 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1171 * @ioc: per adapter object
1172 * @smid: system request message index
1173 *
1174 * Returns phys pointer to sense buffer.
1175 */
1176dma_addr_t
1177mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1178{
1179 return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE);
1180}
1181
1182/**
1183 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1184 * @ioc: per adapter object
1185 * @phys_addr: lower 32 physical addr of the reply
1186 *
1187 * Converts 32bit lower physical addr into a virt address.
1188 */
1189void *
1190mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1191{
1192 if (!phys_addr)
1193 return NULL;
1194 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1195}
1196
1197/**
1198 * mpt2sas_base_get_smid - obtain a free smid
1199 * @ioc: per adapter object
1200 * @cb_idx: callback index
1201 *
1202 * Returns smid (zero is invalid)
1203 */
1204u16
1205mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1206{
1207 unsigned long flags;
1208 struct request_tracker *request;
1209 u16 smid;
1210
1211 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1212 if (list_empty(&ioc->free_list)) {
1213 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1214 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1215 ioc->name, __func__);
1216 return 0;
1217 }
1218
1219 request = list_entry(ioc->free_list.next,
1220 struct request_tracker, tracker_list);
1221 request->cb_idx = cb_idx;
1222 smid = request->smid;
1223 list_del(&request->tracker_list);
1224 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1225 return smid;
1226}
1227
1228
1229/**
1230 * mpt2sas_base_free_smid - put smid back on free_list
1231 * @ioc: per adapter object
1232 * @smid: system request message index
1233 *
1234 * Return nothing.
1235 */
1236void
1237mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1238{
1239 unsigned long flags;
1240
1241 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1242 ioc->scsi_lookup[smid - 1].cb_idx = 0xFF;
1243 list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list,
1244 &ioc->free_list);
1245 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1246
1247 /*
1248 * See _wait_for_commands_to_complete() call with regards to this code.
1249 */
1250 if (ioc->shost_recovery && ioc->pending_io_count) {
1251 if (ioc->pending_io_count == 1)
1252 wake_up(&ioc->reset_wq);
1253 ioc->pending_io_count--;
1254 }
1255}
1256
1257/**
1258 * _base_writeq - 64 bit write to MMIO
1259 * @ioc: per adapter object
1260 * @b: data payload
1261 * @addr: address in MMIO space
1262 * @writeq_lock: spin lock
1263 *
1264 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1265 * care of 32 bit environment where its not quarenteed to send the entire word
1266 * in one transfer.
1267 */
1268#ifndef writeq
1269static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1270 spinlock_t *writeq_lock)
1271{
1272 unsigned long flags;
1273 __u64 data_out = cpu_to_le64(b);
1274
1275 spin_lock_irqsave(writeq_lock, flags);
1276 writel((u32)(data_out), addr);
1277 writel((u32)(data_out >> 32), (addr + 4));
1278 spin_unlock_irqrestore(writeq_lock, flags);
1279}
1280#else
1281static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1282 spinlock_t *writeq_lock)
1283{
1284 writeq(cpu_to_le64(b), addr);
1285}
1286#endif
1287
1288/**
1289 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1290 * @ioc: per adapter object
1291 * @smid: system request message index
1292 * @vf_id: virtual function id
1293 * @handle: device handle
1294 *
1295 * Return nothing.
1296 */
1297void
1298mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id,
1299 u16 handle)
1300{
1301 Mpi2RequestDescriptorUnion_t descriptor;
1302 u64 *request = (u64 *)&descriptor;
1303
1304
1305 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1306 descriptor.SCSIIO.VF_ID = vf_id;
1307 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1308 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1309 descriptor.SCSIIO.LMID = 0;
1310 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1311 &ioc->scsi_lookup_lock);
1312}
1313
1314
1315/**
1316 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
1317 * @ioc: per adapter object
1318 * @smid: system request message index
1319 * @vf_id: virtual function id
1320 *
1321 * Return nothing.
1322 */
1323void
1324mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1325 u8 vf_id)
1326{
1327 Mpi2RequestDescriptorUnion_t descriptor;
1328 u64 *request = (u64 *)&descriptor;
1329
1330 descriptor.HighPriority.RequestFlags =
1331 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1332 descriptor.HighPriority.VF_ID = vf_id;
1333 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1334 descriptor.HighPriority.LMID = 0;
1335 descriptor.HighPriority.Reserved1 = 0;
1336 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1337 &ioc->scsi_lookup_lock);
1338}
1339
1340/**
1341 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1342 * @ioc: per adapter object
1343 * @smid: system request message index
1344 * @vf_id: virtual function id
1345 *
1346 * Return nothing.
1347 */
1348void
1349mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id)
1350{
1351 Mpi2RequestDescriptorUnion_t descriptor;
1352 u64 *request = (u64 *)&descriptor;
1353
1354 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1355 descriptor.Default.VF_ID = vf_id;
1356 descriptor.Default.SMID = cpu_to_le16(smid);
1357 descriptor.Default.LMID = 0;
1358 descriptor.Default.DescriptorTypeDependent = 0;
1359 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1360 &ioc->scsi_lookup_lock);
1361}
1362
1363/**
1364 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1365 * @ioc: per adapter object
1366 * @smid: system request message index
1367 * @vf_id: virtual function id
1368 * @io_index: value used to track the IO
1369 *
1370 * Return nothing.
1371 */
1372void
1373mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1374 u8 vf_id, u16 io_index)
1375{
1376 Mpi2RequestDescriptorUnion_t descriptor;
1377 u64 *request = (u64 *)&descriptor;
1378
1379 descriptor.SCSITarget.RequestFlags =
1380 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1381 descriptor.SCSITarget.VF_ID = vf_id;
1382 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1383 descriptor.SCSITarget.LMID = 0;
1384 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1385 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1386 &ioc->scsi_lookup_lock);
1387}
1388
1389/**
1390 * _base_display_ioc_capabilities - Disply IOC's capabilities.
1391 * @ioc: per adapter object
1392 *
1393 * Return nothing.
1394 */
1395static void
1396_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1397{
1398 int i = 0;
1399 char desc[16];
1400 u8 revision;
1401 u32 iounit_pg1_flags;
1402
1403 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1404 strncpy(desc, ioc->manu_pg0.ChipName, 16);
1405 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
1406 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
1407 ioc->name, desc,
1408 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
1409 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
1410 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
1411 ioc->facts.FWVersion.Word & 0x000000FF,
1412 revision,
1413 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
1414 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
1415 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
1416 ioc->bios_pg3.BiosVersion & 0x000000FF);
1417
1418 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
1419
1420 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
1421 printk("Initiator");
1422 i++;
1423 }
1424
1425 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
1426 printk("%sTarget", i ? "," : "");
1427 i++;
1428 }
1429
1430 i = 0;
1431 printk("), ");
1432 printk("Capabilities=(");
1433
1434 if (ioc->facts.IOCCapabilities &
1435 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
1436 printk("Raid");
1437 i++;
1438 }
1439
1440 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
1441 printk("%sTLR", i ? "," : "");
1442 i++;
1443 }
1444
1445 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
1446 printk("%sMulticast", i ? "," : "");
1447 i++;
1448 }
1449
1450 if (ioc->facts.IOCCapabilities &
1451 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
1452 printk("%sBIDI Target", i ? "," : "");
1453 i++;
1454 }
1455
1456 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
1457 printk("%sEEDP", i ? "," : "");
1458 i++;
1459 }
1460
1461 if (ioc->facts.IOCCapabilities &
1462 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
1463 printk("%sSnapshot Buffer", i ? "," : "");
1464 i++;
1465 }
1466
1467 if (ioc->facts.IOCCapabilities &
1468 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
1469 printk("%sDiag Trace Buffer", i ? "," : "");
1470 i++;
1471 }
1472
1473 if (ioc->facts.IOCCapabilities &
1474 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
1475 printk("%sTask Set Full", i ? "," : "");
1476 i++;
1477 }
1478
1479 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1480 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
1481 printk("%sNCQ", i ? "," : "");
1482 i++;
1483 }
1484
1485 printk(")\n");
1486}
1487
1488/**
1489 * _base_static_config_pages - static start of day config pages
1490 * @ioc: per adapter object
1491 *
1492 * Return nothing.
1493 */
1494static void
1495_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
1496{
1497 Mpi2ConfigReply_t mpi_reply;
1498 u32 iounit_pg1_flags;
1499
1500 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
1501 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
1502 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
1503 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
1504 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
1505 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1506 _base_display_ioc_capabilities(ioc);
1507
1508 /*
1509 * Enable task_set_full handling in iounit_pg1 when the
1510 * facts capabilities indicate that its supported.
1511 */
1512 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1513 if ((ioc->facts.IOCCapabilities &
1514 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
1515 iounit_pg1_flags &=
1516 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1517 else
1518 iounit_pg1_flags |=
1519 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1520 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
1521 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1);
1522}
1523
1524/**
1525 * _base_release_memory_pools - release memory
1526 * @ioc: per adapter object
1527 *
1528 * Free memory allocated from _base_allocate_memory_pools.
1529 *
1530 * Return nothing.
1531 */
1532static void
1533_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
1534{
1535 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1536 __func__));
1537
1538 if (ioc->request) {
1539 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
1540 ioc->request, ioc->request_dma);
1541 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
1542 ": free\n", ioc->name, ioc->request));
1543 ioc->request = NULL;
1544 }
1545
1546 if (ioc->sense) {
1547 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
1548 if (ioc->sense_dma_pool)
1549 pci_pool_destroy(ioc->sense_dma_pool);
1550 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
1551 ": free\n", ioc->name, ioc->sense));
1552 ioc->sense = NULL;
1553 }
1554
1555 if (ioc->reply) {
1556 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
1557 if (ioc->reply_dma_pool)
1558 pci_pool_destroy(ioc->reply_dma_pool);
1559 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
1560 ": free\n", ioc->name, ioc->reply));
1561 ioc->reply = NULL;
1562 }
1563
1564 if (ioc->reply_free) {
1565 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
1566 ioc->reply_free_dma);
1567 if (ioc->reply_free_dma_pool)
1568 pci_pool_destroy(ioc->reply_free_dma_pool);
1569 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
1570 "(0x%p): free\n", ioc->name, ioc->reply_free));
1571 ioc->reply_free = NULL;
1572 }
1573
1574 if (ioc->reply_post_free) {
1575 pci_pool_free(ioc->reply_post_free_dma_pool,
1576 ioc->reply_post_free, ioc->reply_post_free_dma);
1577 if (ioc->reply_post_free_dma_pool)
1578 pci_pool_destroy(ioc->reply_post_free_dma_pool);
1579 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1580 "reply_post_free_pool(0x%p): free\n", ioc->name,
1581 ioc->reply_post_free));
1582 ioc->reply_post_free = NULL;
1583 }
1584
1585 if (ioc->config_page) {
1586 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1587 "config_page(0x%p): free\n", ioc->name,
1588 ioc->config_page));
1589 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
1590 ioc->config_page, ioc->config_page_dma);
1591 }
1592
1593 kfree(ioc->scsi_lookup);
1594}
1595
1596
1597/**
1598 * _base_allocate_memory_pools - allocate start of day memory pools
1599 * @ioc: per adapter object
1600 * @sleep_flag: CAN_SLEEP or NO_SLEEP
1601 *
1602 * Returns 0 success, anything else error
1603 */
1604static int
1605_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
1606{
1607 Mpi2IOCFactsReply_t *facts;
1608 u32 queue_size, queue_diff;
1609 u16 max_sge_elements;
1610 u16 num_of_reply_frames;
1611 u16 chains_needed_per_io;
1612 u32 sz, total_sz;
1613 u16 i;
1614 u32 retry_sz;
1615 u16 max_request_credit;
1616
1617 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1618 __func__));
1619
1620 retry_sz = 0;
1621 facts = &ioc->facts;
1622
1623 /* command line tunables for max sgl entries */
1624 if (max_sgl_entries != -1) {
1625 ioc->shost->sg_tablesize = (max_sgl_entries <
1626 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
1627 MPT2SAS_SG_DEPTH;
1628 } else {
1629 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
1630 }
1631
1632 /* command line tunables for max controller queue depth */
1633 if (max_queue_depth != -1) {
1634 max_request_credit = (max_queue_depth < facts->RequestCredit)
1635 ? max_queue_depth : facts->RequestCredit;
1636 } else {
1637 max_request_credit = (facts->RequestCredit >
1638 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
1639 facts->RequestCredit;
1640 }
1641 ioc->request_depth = max_request_credit;
1642
1643 /* request frame size */
1644 ioc->request_sz = facts->IOCRequestFrameSize * 4;
1645
1646 /* reply frame size */
1647 ioc->reply_sz = facts->ReplyFrameSize * 4;
1648
1649 retry_allocation:
1650 total_sz = 0;
1651 /* calculate number of sg elements left over in the 1st frame */
1652 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
1653 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
1654 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
1655
1656 /* now do the same for a chain buffer */
1657 max_sge_elements = ioc->request_sz - ioc->sge_size;
1658 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
1659
1660 ioc->chain_offset_value_for_main_message =
1661 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
1662 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
1663
1664 /*
1665 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
1666 */
1667 chains_needed_per_io = ((ioc->shost->sg_tablesize -
1668 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
1669 + 1;
1670 if (chains_needed_per_io > facts->MaxChainDepth) {
1671 chains_needed_per_io = facts->MaxChainDepth;
1672 ioc->shost->sg_tablesize = min_t(u16,
1673 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
1674 * chains_needed_per_io), ioc->shost->sg_tablesize);
1675 }
1676 ioc->chains_needed_per_io = chains_needed_per_io;
1677
1678 /* reply free queue sizing - taking into account for events */
1679 num_of_reply_frames = ioc->request_depth + 32;
1680
1681 /* number of replies frames can't be a multiple of 16 */
1682 /* decrease number of reply frames by 1 */
1683 if (!(num_of_reply_frames % 16))
1684 num_of_reply_frames--;
1685
1686 /* calculate number of reply free queue entries
1687 * (must be multiple of 16)
1688 */
1689
1690 /* (we know reply_free_queue_depth is not a multiple of 16) */
1691 queue_size = num_of_reply_frames;
1692 queue_size += 16 - (queue_size % 16);
1693 ioc->reply_free_queue_depth = queue_size;
1694
1695 /* reply descriptor post queue sizing */
1696 /* this size should be the number of request frames + number of reply
1697 * frames
1698 */
1699
1700 queue_size = ioc->request_depth + num_of_reply_frames + 1;
1701 /* round up to 16 byte boundary */
1702 if (queue_size % 16)
1703 queue_size += 16 - (queue_size % 16);
1704
1705 /* check against IOC maximum reply post queue depth */
1706 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
1707 queue_diff = queue_size -
1708 facts->MaxReplyDescriptorPostQueueDepth;
1709
1710 /* round queue_diff up to multiple of 16 */
1711 if (queue_diff % 16)
1712 queue_diff += 16 - (queue_diff % 16);
1713
1714 /* adjust request_depth, reply_free_queue_depth,
1715 * and queue_size
1716 */
1717 ioc->request_depth -= queue_diff;
1718 ioc->reply_free_queue_depth -= queue_diff;
1719 queue_size -= queue_diff;
1720 }
1721 ioc->reply_post_queue_depth = queue_size;
1722
1723 /* max scsi host queue depth */
1724 ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT;
1725 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth"
1726 "(%d)\n", ioc->name, ioc->shost->can_queue));
1727
1728 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
1729 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
1730 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
1731 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
1732 ioc->chains_needed_per_io));
1733
1734 /* contiguous pool for request and chains, 16 byte align, one extra "
1735 * "frame for smid=0
1736 */
1737 ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth;
1738 sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz);
1739
1740 ioc->request_dma_sz = sz;
1741 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
1742 if (!ioc->request) {
1743 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
1744 "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
1745 "total(%d kB)\n", ioc->name, ioc->request_depth,
1746 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
1747 if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH)
1748 goto out;
1749 retry_sz += 64;
1750 ioc->request_depth = max_request_credit - retry_sz;
1751 goto retry_allocation;
1752 }
1753
1754 if (retry_sz)
1755 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
1756 "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
1757 "total(%d kb)\n", ioc->name, ioc->request_depth,
1758 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
1759
1760 ioc->chain = ioc->request + ((ioc->request_depth + 1) *
1761 ioc->request_sz);
1762 ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) *
1763 ioc->request_sz);
1764 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
1765 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
1766 ioc->request, ioc->request_depth, ioc->request_sz,
1767 ((ioc->request_depth + 1) * ioc->request_sz)/1024));
1768 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
1769 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
1770 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
1771 ioc->request_sz))/1024));
1772 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
1773 ioc->name, (unsigned long long) ioc->request_dma));
1774 total_sz += sz;
1775
1776 ioc->scsi_lookup = kcalloc(ioc->request_depth,
1777 sizeof(struct request_tracker), GFP_KERNEL);
1778 if (!ioc->scsi_lookup) {
1779 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
1780 ioc->name);
1781 goto out;
1782 }
1783
1784 /* initialize some bits */
1785 for (i = 0; i < ioc->request_depth; i++)
1786 ioc->scsi_lookup[i].smid = i + 1;
1787
1788 /* sense buffers, 4 byte align */
1789 sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE;
1790 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
1791 0);
1792 if (!ioc->sense_dma_pool) {
1793 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
1794 ioc->name);
1795 goto out;
1796 }
1797 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
1798 &ioc->sense_dma);
1799 if (!ioc->sense) {
1800 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
1801 ioc->name);
1802 goto out;
1803 }
1804 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
1805 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
1806 "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth,
1807 SCSI_SENSE_BUFFERSIZE, sz/1024));
1808 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
1809 ioc->name, (unsigned long long)ioc->sense_dma));
1810 total_sz += sz;
1811
1812 /* reply pool, 4 byte align */
1813 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
1814 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
1815 0);
1816 if (!ioc->reply_dma_pool) {
1817 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
1818 ioc->name);
1819 goto out;
1820 }
1821 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
1822 &ioc->reply_dma);
1823 if (!ioc->reply) {
1824 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
1825 ioc->name);
1826 goto out;
1827 }
1828 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
1829 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
1830 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
1831 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
1832 ioc->name, (unsigned long long)ioc->reply_dma));
1833 total_sz += sz;
1834
1835 /* reply free queue, 16 byte align */
1836 sz = ioc->reply_free_queue_depth * 4;
1837 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
1838 ioc->pdev, sz, 16, 0);
1839 if (!ioc->reply_free_dma_pool) {
1840 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
1841 "failed\n", ioc->name);
1842 goto out;
1843 }
1844 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
1845 &ioc->reply_free_dma);
1846 if (!ioc->reply_free) {
1847 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
1848 "failed\n", ioc->name);
1849 goto out;
1850 }
1851 memset(ioc->reply_free, 0, sz);
1852 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
1853 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
1854 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
1855 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
1856 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
1857 total_sz += sz;
1858
1859 /* reply post queue, 16 byte align */
1860 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
1861 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
1862 ioc->pdev, sz, 16, 0);
1863 if (!ioc->reply_post_free_dma_pool) {
1864 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
1865 "failed\n", ioc->name);
1866 goto out;
1867 }
1868 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
1869 GFP_KERNEL, &ioc->reply_post_free_dma);
1870 if (!ioc->reply_post_free) {
1871 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
1872 "failed\n", ioc->name);
1873 goto out;
1874 }
1875 memset(ioc->reply_post_free, 0, sz);
1876 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
1877 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
1878 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
1879 sz/1024));
1880 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
1881 "(0x%llx)\n", ioc->name, (unsigned long long)
1882 ioc->reply_post_free_dma));
1883 total_sz += sz;
1884
1885 ioc->config_page_sz = 512;
1886 ioc->config_page = pci_alloc_consistent(ioc->pdev,
1887 ioc->config_page_sz, &ioc->config_page_dma);
1888 if (!ioc->config_page) {
1889 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
1890 "failed\n", ioc->name);
1891 goto out;
1892 }
1893 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
1894 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
1895 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
1896 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
1897 total_sz += ioc->config_page_sz;
1898
1899 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
1900 ioc->name, total_sz/1024);
1901 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
1902 "Max Controller Queue Depth(%d)\n",
1903 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
1904 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
1905 ioc->name, ioc->shost->sg_tablesize);
1906 return 0;
1907
1908 out:
1909 _base_release_memory_pools(ioc);
1910 return -ENOMEM;
1911}
1912
1913
1914/**
1915 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
1916 * @ioc: Pointer to MPT_ADAPTER structure
1917 * @cooked: Request raw or cooked IOC state
1918 *
1919 * Returns all IOC Doorbell register bits if cooked==0, else just the
1920 * Doorbell bits in MPI_IOC_STATE_MASK.
1921 */
1922u32
1923mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
1924{
1925 u32 s, sc;
1926
1927 s = readl(&ioc->chip->Doorbell);
1928 sc = s & MPI2_IOC_STATE_MASK;
1929 return cooked ? sc : s;
1930}
1931
1932/**
1933 * _base_wait_on_iocstate - waiting on a particular ioc state
1934 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
1935 * @timeout: timeout in second
1936 * @sleep_flag: CAN_SLEEP or NO_SLEEP
1937 *
1938 * Returns 0 for success, non-zero for failure.
1939 */
1940static int
1941_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
1942 int sleep_flag)
1943{
1944 u32 count, cntdn;
1945 u32 current_state;
1946
1947 count = 0;
1948 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
1949 do {
1950 current_state = mpt2sas_base_get_iocstate(ioc, 1);
1951 if (current_state == ioc_state)
1952 return 0;
1953 if (count && current_state == MPI2_IOC_STATE_FAULT)
1954 break;
1955 if (sleep_flag == CAN_SLEEP)
1956 msleep(1);
1957 else
1958 udelay(500);
1959 count++;
1960 } while (--cntdn);
1961
1962 return current_state;
1963}
1964
1965/**
1966 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
1967 * a write to the doorbell)
1968 * @ioc: per adapter object
1969 * @timeout: timeout in second
1970 * @sleep_flag: CAN_SLEEP or NO_SLEEP
1971 *
1972 * Returns 0 for success, non-zero for failure.
1973 *
1974 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
1975 */
1976static int
1977_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
1978 int sleep_flag)
1979{
1980 u32 cntdn, count;
1981 u32 int_status;
1982
1983 count = 0;
1984 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
1985 do {
1986 int_status = readl(&ioc->chip->HostInterruptStatus);
1987 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
1988 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
1989 "successfull count(%d), timeout(%d)\n", ioc->name,
1990 __func__, count, timeout));
1991 return 0;
1992 }
1993 if (sleep_flag == CAN_SLEEP)
1994 msleep(1);
1995 else
1996 udelay(500);
1997 count++;
1998 } while (--cntdn);
1999
2000 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2001 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2002 return -EFAULT;
2003}
2004
2005/**
2006 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2007 * @ioc: per adapter object
2008 * @timeout: timeout in second
2009 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2010 *
2011 * Returns 0 for success, non-zero for failure.
2012 *
2013 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2014 * doorbell.
2015 */
2016static int
2017_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2018 int sleep_flag)
2019{
2020 u32 cntdn, count;
2021 u32 int_status;
2022 u32 doorbell;
2023
2024 count = 0;
2025 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2026 do {
2027 int_status = readl(&ioc->chip->HostInterruptStatus);
2028 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2029 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2030 "successfull count(%d), timeout(%d)\n", ioc->name,
2031 __func__, count, timeout));
2032 return 0;
2033 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2034 doorbell = readl(&ioc->chip->Doorbell);
2035 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2036 MPI2_IOC_STATE_FAULT) {
2037 mpt2sas_base_fault_info(ioc , doorbell);
2038 return -EFAULT;
2039 }
2040 } else if (int_status == 0xFFFFFFFF)
2041 goto out;
2042
2043 if (sleep_flag == CAN_SLEEP)
2044 msleep(1);
2045 else
2046 udelay(500);
2047 count++;
2048 } while (--cntdn);
2049
2050 out:
2051 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2052 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2053 return -EFAULT;
2054}
2055
2056/**
2057 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2058 * @ioc: per adapter object
2059 * @timeout: timeout in second
2060 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2061 *
2062 * Returns 0 for success, non-zero for failure.
2063 *
2064 */
2065static int
2066_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2067 int sleep_flag)
2068{
2069 u32 cntdn, count;
2070 u32 doorbell_reg;
2071
2072 count = 0;
2073 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2074 do {
2075 doorbell_reg = readl(&ioc->chip->Doorbell);
2076 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2077 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2078 "successfull count(%d), timeout(%d)\n", ioc->name,
2079 __func__, count, timeout));
2080 return 0;
2081 }
2082 if (sleep_flag == CAN_SLEEP)
2083 msleep(1);
2084 else
2085 udelay(500);
2086 count++;
2087 } while (--cntdn);
2088
2089 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2090 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2091 return -EFAULT;
2092}
2093
2094/**
2095 * _base_send_ioc_reset - send doorbell reset
2096 * @ioc: per adapter object
2097 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2098 * @timeout: timeout in second
2099 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2100 *
2101 * Returns 0 for success, non-zero for failure.
2102 */
2103static int
2104_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2105 int sleep_flag)
2106{
2107 u32 ioc_state;
2108 int r = 0;
2109
2110 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2111 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2112 ioc->name, __func__);
2113 return -EFAULT;
2114 }
2115
2116 if (!(ioc->facts.IOCCapabilities &
2117 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2118 return -EFAULT;
2119
2120 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2121
2122 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2123 &ioc->chip->Doorbell);
2124 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2125 r = -EFAULT;
2126 goto out;
2127 }
2128 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2129 timeout, sleep_flag);
2130 if (ioc_state) {
2131 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2132 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2133 r = -EFAULT;
2134 goto out;
2135 }
2136 out:
2137 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2138 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2139 return r;
2140}
2141
2142/**
2143 * _base_handshake_req_reply_wait - send request thru doorbell interface
2144 * @ioc: per adapter object
2145 * @request_bytes: request length
2146 * @request: pointer having request payload
2147 * @reply_bytes: reply length
2148 * @reply: pointer to reply payload
2149 * @timeout: timeout in second
2150 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2151 *
2152 * Returns 0 for success, non-zero for failure.
2153 */
2154static int
2155_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2156 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
2157{
2158 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
2159 int i;
2160 u8 failed;
2161 u16 dummy;
2162 u32 *mfp;
2163
2164 /* make sure doorbell is not in use */
2165 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
2166 printk(MPT2SAS_ERR_FMT "doorbell is in use "
2167 " (line=%d)\n", ioc->name, __LINE__);
2168 return -EFAULT;
2169 }
2170
2171 /* clear pending doorbell interrupts from previous state changes */
2172 if (readl(&ioc->chip->HostInterruptStatus) &
2173 MPI2_HIS_IOC2SYS_DB_STATUS)
2174 writel(0, &ioc->chip->HostInterruptStatus);
2175
2176 /* send message to ioc */
2177 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
2178 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
2179 &ioc->chip->Doorbell);
2180
2181 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2182 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2183 "int failed (line=%d)\n", ioc->name, __LINE__);
2184 return -EFAULT;
2185 }
2186 writel(0, &ioc->chip->HostInterruptStatus);
2187
2188 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
2189 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2190 "ack failed (line=%d)\n", ioc->name, __LINE__);
2191 return -EFAULT;
2192 }
2193
2194 /* send message 32-bits at a time */
2195 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
2196 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
2197 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
2198 failed = 1;
2199 }
2200
2201 if (failed) {
2202 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2203 "sending request failed (line=%d)\n", ioc->name, __LINE__);
2204 return -EFAULT;
2205 }
2206
2207 /* now wait for the reply */
2208 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
2209 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2210 "int failed (line=%d)\n", ioc->name, __LINE__);
2211 return -EFAULT;
2212 }
2213
2214 /* read the first two 16-bits, it gives the total length of the reply */
2215 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2216 & MPI2_DOORBELL_DATA_MASK);
2217 writel(0, &ioc->chip->HostInterruptStatus);
2218 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2219 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2220 "int failed (line=%d)\n", ioc->name, __LINE__);
2221 return -EFAULT;
2222 }
2223 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2224 & MPI2_DOORBELL_DATA_MASK);
2225 writel(0, &ioc->chip->HostInterruptStatus);
2226
2227 for (i = 2; i < default_reply->MsgLength * 2; i++) {
2228 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2229 printk(MPT2SAS_ERR_FMT "doorbell "
2230 "handshake int failed (line=%d)\n", ioc->name,
2231 __LINE__);
2232 return -EFAULT;
2233 }
2234 if (i >= reply_bytes/2) /* overflow case */
2235 dummy = readl(&ioc->chip->Doorbell);
2236 else
2237 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2238 & MPI2_DOORBELL_DATA_MASK);
2239 writel(0, &ioc->chip->HostInterruptStatus);
2240 }
2241
2242 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
2243 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
2244 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
2245 " (line=%d)\n", ioc->name, __LINE__));
2246 }
2247 writel(0, &ioc->chip->HostInterruptStatus);
2248
2249 if (ioc->logging_level & MPT_DEBUG_INIT) {
2250 mfp = (u32 *)reply;
2251 printk(KERN_DEBUG "\toffset:data\n");
2252 for (i = 0; i < reply_bytes/4; i++)
2253 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
2254 le32_to_cpu(mfp[i]));
2255 }
2256 return 0;
2257}
2258
2259/**
2260 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
2261 * @ioc: per adapter object
2262 * @mpi_reply: the reply payload from FW
2263 * @mpi_request: the request payload sent to FW
2264 *
2265 * The SAS IO Unit Control Request message allows the host to perform low-level
2266 * operations, such as resets on the PHYs of the IO Unit, also allows the host
2267 * to obtain the IOC assigned device handles for a device if it has other
2268 * identifying information about the device, in addition allows the host to
2269 * remove IOC resources associated with the device.
2270 *
2271 * Returns 0 for success, non-zero for failure.
2272 */
2273int
2274mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
2275 Mpi2SasIoUnitControlReply_t *mpi_reply,
2276 Mpi2SasIoUnitControlRequest_t *mpi_request)
2277{
2278 u16 smid;
2279 u32 ioc_state;
2280 unsigned long timeleft;
2281 u8 issue_reset;
2282 int rc;
2283 void *request;
2284 u16 wait_state_count;
2285
2286 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2287 __func__));
2288
2289 mutex_lock(&ioc->base_cmds.mutex);
2290
2291 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2292 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2293 ioc->name, __func__);
2294 rc = -EAGAIN;
2295 goto out;
2296 }
2297
2298 wait_state_count = 0;
2299 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2300 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2301 if (wait_state_count++ == 10) {
2302 printk(MPT2SAS_ERR_FMT
2303 "%s: failed due to ioc not operational\n",
2304 ioc->name, __func__);
2305 rc = -EFAULT;
2306 goto out;
2307 }
2308 ssleep(1);
2309 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2310 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2311 "operational state(count=%d)\n", ioc->name,
2312 __func__, wait_state_count);
2313 }
2314
2315 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2316 if (!smid) {
2317 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2318 ioc->name, __func__);
2319 rc = -EAGAIN;
2320 goto out;
2321 }
2322
2323 rc = 0;
2324 ioc->base_cmds.status = MPT2_CMD_PENDING;
2325 request = mpt2sas_base_get_msg_frame(ioc, smid);
2326 ioc->base_cmds.smid = smid;
2327 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
2328 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2329 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
2330 ioc->ioc_link_reset_in_progress = 1;
2331 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
2332 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2333 msecs_to_jiffies(10000));
2334 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2335 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
2336 ioc->ioc_link_reset_in_progress)
2337 ioc->ioc_link_reset_in_progress = 0;
2338 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2339 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2340 ioc->name, __func__);
2341 _debug_dump_mf(mpi_request,
2342 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
2343 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2344 issue_reset = 1;
2345 goto issue_host_reset;
2346 }
2347 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2348 memcpy(mpi_reply, ioc->base_cmds.reply,
2349 sizeof(Mpi2SasIoUnitControlReply_t));
2350 else
2351 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
2352 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2353 goto out;
2354
2355 issue_host_reset:
2356 if (issue_reset)
2357 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2358 FORCE_BIG_HAMMER);
2359 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2360 rc = -EFAULT;
2361 out:
2362 mutex_unlock(&ioc->base_cmds.mutex);
2363 return rc;
2364}
2365
2366
2367/**
2368 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
2369 * @ioc: per adapter object
2370 * @mpi_reply: the reply payload from FW
2371 * @mpi_request: the request payload sent to FW
2372 *
2373 * The SCSI Enclosure Processor request message causes the IOC to
2374 * communicate with SES devices to control LED status signals.
2375 *
2376 * Returns 0 for success, non-zero for failure.
2377 */
2378int
2379mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
2380 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
2381{
2382 u16 smid;
2383 u32 ioc_state;
2384 unsigned long timeleft;
2385 u8 issue_reset;
2386 int rc;
2387 void *request;
2388 u16 wait_state_count;
2389
2390 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2391 __func__));
2392
2393 mutex_lock(&ioc->base_cmds.mutex);
2394
2395 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2396 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2397 ioc->name, __func__);
2398 rc = -EAGAIN;
2399 goto out;
2400 }
2401
2402 wait_state_count = 0;
2403 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2404 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2405 if (wait_state_count++ == 10) {
2406 printk(MPT2SAS_ERR_FMT
2407 "%s: failed due to ioc not operational\n",
2408 ioc->name, __func__);
2409 rc = -EFAULT;
2410 goto out;
2411 }
2412 ssleep(1);
2413 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2414 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2415 "operational state(count=%d)\n", ioc->name,
2416 __func__, wait_state_count);
2417 }
2418
2419 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2420 if (!smid) {
2421 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2422 ioc->name, __func__);
2423 rc = -EAGAIN;
2424 goto out;
2425 }
2426
2427 rc = 0;
2428 ioc->base_cmds.status = MPT2_CMD_PENDING;
2429 request = mpt2sas_base_get_msg_frame(ioc, smid);
2430 ioc->base_cmds.smid = smid;
2431 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
2432 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
2433 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2434 msecs_to_jiffies(10000));
2435 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2436 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2437 ioc->name, __func__);
2438 _debug_dump_mf(mpi_request,
2439 sizeof(Mpi2SepRequest_t)/4);
2440 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2441 issue_reset = 1;
2442 goto issue_host_reset;
2443 }
2444 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2445 memcpy(mpi_reply, ioc->base_cmds.reply,
2446 sizeof(Mpi2SepReply_t));
2447 else
2448 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
2449 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2450 goto out;
2451
2452 issue_host_reset:
2453 if (issue_reset)
2454 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2455 FORCE_BIG_HAMMER);
2456 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2457 rc = -EFAULT;
2458 out:
2459 mutex_unlock(&ioc->base_cmds.mutex);
2460 return rc;
2461}
2462
2463/**
2464 * _base_get_port_facts - obtain port facts reply and save in ioc
2465 * @ioc: per adapter object
2466 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2467 *
2468 * Returns 0 for success, non-zero for failure.
2469 */
2470static int
2471_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
2472{
2473 Mpi2PortFactsRequest_t mpi_request;
2474 Mpi2PortFactsReply_t mpi_reply, *pfacts;
2475 int mpi_reply_sz, mpi_request_sz, r;
2476
2477 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2478 __func__));
2479
2480 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
2481 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
2482 memset(&mpi_request, 0, mpi_request_sz);
2483 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
2484 mpi_request.PortNumber = port;
2485 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2486 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2487
2488 if (r != 0) {
2489 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2490 ioc->name, __func__, r);
2491 return r;
2492 }
2493
2494 pfacts = &ioc->pfacts[port];
2495 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
2496 pfacts->PortNumber = mpi_reply.PortNumber;
2497 pfacts->VP_ID = mpi_reply.VP_ID;
2498 pfacts->VF_ID = mpi_reply.VF_ID;
2499 pfacts->MaxPostedCmdBuffers =
2500 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
2501
2502 return 0;
2503}
2504
2505/**
2506 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
2507 * @ioc: per adapter object
2508 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2509 *
2510 * Returns 0 for success, non-zero for failure.
2511 */
2512static int
2513_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2514{
2515 Mpi2IOCFactsRequest_t mpi_request;
2516 Mpi2IOCFactsReply_t mpi_reply, *facts;
2517 int mpi_reply_sz, mpi_request_sz, r;
2518
2519 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2520 __func__));
2521
2522 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
2523 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
2524 memset(&mpi_request, 0, mpi_request_sz);
2525 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
2526 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2527 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2528
2529 if (r != 0) {
2530 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2531 ioc->name, __func__, r);
2532 return r;
2533 }
2534
2535 facts = &ioc->facts;
2536 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
2537 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
2538 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
2539 facts->VP_ID = mpi_reply.VP_ID;
2540 facts->VF_ID = mpi_reply.VF_ID;
2541 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
2542 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
2543 facts->WhoInit = mpi_reply.WhoInit;
2544 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
2545 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
2546 facts->MaxReplyDescriptorPostQueueDepth =
2547 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
2548 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
2549 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
2550 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
2551 ioc->ir_firmware = 1;
2552 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
2553 facts->IOCRequestFrameSize =
2554 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
2555 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
2556 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
2557 ioc->shost->max_id = -1;
2558 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
2559 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
2560 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
2561 facts->HighPriorityCredit =
2562 le16_to_cpu(mpi_reply.HighPriorityCredit);
2563 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
2564 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
2565
2566 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
2567 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
2568 facts->MaxChainDepth));
2569 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
2570 "reply frame size(%d)\n", ioc->name,
2571 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
2572 return 0;
2573}
2574
2575/**
2576 * _base_send_ioc_init - send ioc_init to firmware
2577 * @ioc: per adapter object
2578 * @VF_ID: virtual function id
2579 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2580 *
2581 * Returns 0 for success, non-zero for failure.
2582 */
2583static int
2584_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
2585{
2586 Mpi2IOCInitRequest_t mpi_request;
2587 Mpi2IOCInitReply_t mpi_reply;
2588 int r;
2589
2590 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2591 __func__));
2592
2593 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
2594 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
2595 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
2596 mpi_request.VF_ID = VF_ID;
2597 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
2598 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
2599
2600 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
2601 * removed and made reserved. For those with older firmware will need
2602 * this fix. It was decided that the Reply and Request frame sizes are
2603 * the same.
2604 */
2605 if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
2606 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
2607/* mpi_request.SystemReplyFrameSize =
2608 * cpu_to_le16(ioc->reply_sz);
2609 */
2610 }
2611
2612 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
2613 mpi_request.ReplyDescriptorPostQueueDepth =
2614 cpu_to_le16(ioc->reply_post_queue_depth);
2615 mpi_request.ReplyFreeQueueDepth =
2616 cpu_to_le16(ioc->reply_free_queue_depth);
2617
2618#if BITS_PER_LONG > 32
2619 mpi_request.SenseBufferAddressHigh =
2620 cpu_to_le32(ioc->sense_dma >> 32);
2621 mpi_request.SystemReplyAddressHigh =
2622 cpu_to_le32(ioc->reply_dma >> 32);
2623 mpi_request.SystemRequestFrameBaseAddress =
2624 cpu_to_le64(ioc->request_dma);
2625 mpi_request.ReplyFreeQueueAddress =
2626 cpu_to_le64(ioc->reply_free_dma);
2627 mpi_request.ReplyDescriptorPostQueueAddress =
2628 cpu_to_le64(ioc->reply_post_free_dma);
2629#else
2630 mpi_request.SystemRequestFrameBaseAddress =
2631 cpu_to_le32(ioc->request_dma);
2632 mpi_request.ReplyFreeQueueAddress =
2633 cpu_to_le32(ioc->reply_free_dma);
2634 mpi_request.ReplyDescriptorPostQueueAddress =
2635 cpu_to_le32(ioc->reply_post_free_dma);
2636#endif
2637
2638 if (ioc->logging_level & MPT_DEBUG_INIT) {
2639 u32 *mfp;
2640 int i;
2641
2642 mfp = (u32 *)&mpi_request;
2643 printk(KERN_DEBUG "\toffset:data\n");
2644 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
2645 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
2646 le32_to_cpu(mfp[i]));
2647 }
2648
2649 r = _base_handshake_req_reply_wait(ioc,
2650 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
2651 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
2652 sleep_flag);
2653
2654 if (r != 0) {
2655 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2656 ioc->name, __func__, r);
2657 return r;
2658 }
2659
2660 if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS ||
2661 mpi_reply.IOCLogInfo) {
2662 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
2663 r = -EIO;
2664 }
2665
2666 return 0;
2667}
2668
2669/**
2670 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
2671 * @ioc: per adapter object
2672 * @VF_ID: virtual function id
2673 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2674 *
2675 * Returns 0 for success, non-zero for failure.
2676 */
2677static int
2678_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
2679{
2680 Mpi2PortEnableRequest_t *mpi_request;
2681 u32 ioc_state;
2682 unsigned long timeleft;
2683 int r = 0;
2684 u16 smid;
2685
2686 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
2687
2688 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
2689 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
2690 ioc->name, __func__);
2691 return -EAGAIN;
2692 }
2693
2694 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2695 if (!smid) {
2696 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2697 ioc->name, __func__);
2698 return -EAGAIN;
2699 }
2700
2701 ioc->base_cmds.status = MPT2_CMD_PENDING;
2702 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
2703 ioc->base_cmds.smid = smid;
2704 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
2705 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
2706 mpi_request->VF_ID = VF_ID;
2707
2708 mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
2709 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2710 300*HZ);
2711 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2712 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2713 ioc->name, __func__);
2714 _debug_dump_mf(mpi_request,
2715 sizeof(Mpi2PortEnableRequest_t)/4);
2716 if (ioc->base_cmds.status & MPT2_CMD_RESET)
2717 r = -EFAULT;
2718 else
2719 r = -ETIME;
2720 goto out;
2721 } else
2722 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
2723 ioc->name, __func__));
2724
2725 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
2726 60, sleep_flag);
2727 if (ioc_state) {
2728 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
2729 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2730 r = -EFAULT;
2731 }
2732 out:
2733 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2734 printk(MPT2SAS_INFO_FMT "port enable: %s\n",
2735 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2736 return r;
2737}
2738
2739/**
2740 * _base_unmask_events - turn on notification for this event
2741 * @ioc: per adapter object
2742 * @event: firmware event
2743 *
2744 * The mask is stored in ioc->event_masks.
2745 */
2746static void
2747_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
2748{
2749 u32 desired_event;
2750
2751 if (event >= 128)
2752 return;
2753
2754 desired_event = (1 << (event % 32));
2755
2756 if (event < 32)
2757 ioc->event_masks[0] &= ~desired_event;
2758 else if (event < 64)
2759 ioc->event_masks[1] &= ~desired_event;
2760 else if (event < 96)
2761 ioc->event_masks[2] &= ~desired_event;
2762 else if (event < 128)
2763 ioc->event_masks[3] &= ~desired_event;
2764}
2765
2766/**
2767 * _base_event_notification - send event notification
2768 * @ioc: per adapter object
2769 * @VF_ID: virtual function id
2770 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2771 *
2772 * Returns 0 for success, non-zero for failure.
2773 */
2774static int
2775_base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
2776{
2777 Mpi2EventNotificationRequest_t *mpi_request;
2778 unsigned long timeleft;
2779 u16 smid;
2780 int r = 0;
2781 int i;
2782
2783 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2784 __func__));
2785
2786 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
2787 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
2788 ioc->name, __func__);
2789 return -EAGAIN;
2790 }
2791
2792 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2793 if (!smid) {
2794 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2795 ioc->name, __func__);
2796 return -EAGAIN;
2797 }
2798 ioc->base_cmds.status = MPT2_CMD_PENDING;
2799 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
2800 ioc->base_cmds.smid = smid;
2801 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
2802 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2803 mpi_request->VF_ID = VF_ID;
2804 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
2805 mpi_request->EventMasks[i] =
2806 le32_to_cpu(ioc->event_masks[i]);
2807 mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
2808 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
2809 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2810 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2811 ioc->name, __func__);
2812 _debug_dump_mf(mpi_request,
2813 sizeof(Mpi2EventNotificationRequest_t)/4);
2814 if (ioc->base_cmds.status & MPT2_CMD_RESET)
2815 r = -EFAULT;
2816 else
2817 r = -ETIME;
2818 } else
2819 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
2820 ioc->name, __func__));
2821 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2822 return r;
2823}
2824
2825/**
2826 * mpt2sas_base_validate_event_type - validating event types
2827 * @ioc: per adapter object
2828 * @event: firmware event
2829 *
2830 * This will turn on firmware event notification when application
2831 * ask for that event. We don't mask events that are already enabled.
2832 */
2833void
2834mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
2835{
2836 int i, j;
2837 u32 event_mask, desired_event;
2838 u8 send_update_to_fw;
2839
2840 for (i = 0, send_update_to_fw = 0; i <
2841 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
2842 event_mask = ~event_type[i];
2843 desired_event = 1;
2844 for (j = 0; j < 32; j++) {
2845 if (!(event_mask & desired_event) &&
2846 (ioc->event_masks[i] & desired_event)) {
2847 ioc->event_masks[i] &= ~desired_event;
2848 send_update_to_fw = 1;
2849 }
2850 desired_event = (desired_event << 1);
2851 }
2852 }
2853
2854 if (!send_update_to_fw)
2855 return;
2856
2857 mutex_lock(&ioc->base_cmds.mutex);
2858 _base_event_notification(ioc, 0, CAN_SLEEP);
2859 mutex_unlock(&ioc->base_cmds.mutex);
2860}
2861
2862/**
2863 * _base_diag_reset - the "big hammer" start of day reset
2864 * @ioc: per adapter object
2865 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2866 *
2867 * Returns 0 for success, non-zero for failure.
2868 */
2869static int
2870_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2871{
2872 u32 host_diagnostic;
2873 u32 ioc_state;
2874 u32 count;
2875 u32 hcb_size;
2876
2877 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
2878
2879 _base_save_msix_table(ioc);
2880
2881 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
2882 ioc->name));
2883 writel(0, &ioc->chip->HostInterruptStatus);
2884
2885 count = 0;
2886 do {
2887 /* Write magic sequence to WriteSequence register
2888 * Loop until in diagnostic mode
2889 */
2890 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
2891 "sequence\n", ioc->name));
2892 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
2893 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
2894 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
2895 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
2896 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
2897 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
2898 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
2899
2900 /* wait 100 msec */
2901 if (sleep_flag == CAN_SLEEP)
2902 msleep(100);
2903 else
2904 mdelay(100);
2905
2906 if (count++ > 20)
2907 goto out;
2908
2909 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
2910 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
2911 "sequence: count(%d), host_diagnostic(0x%08x)\n",
2912 ioc->name, count, host_diagnostic));
2913
2914 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
2915
2916 hcb_size = readl(&ioc->chip->HCBSize);
2917
2918 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
2919 ioc->name));
2920 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
2921 &ioc->chip->HostDiagnostic);
2922
2923 /* don't access any registers for 50 milliseconds */
2924 msleep(50);
2925
2926 /* 300 second max wait */
2927 for (count = 0; count < 3000000 ; count++) {
2928
2929 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
2930
2931 if (host_diagnostic == 0xFFFFFFFF)
2932 goto out;
2933 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
2934 break;
2935
2936 /* wait 100 msec */
2937 if (sleep_flag == CAN_SLEEP)
2938 msleep(1);
2939 else
2940 mdelay(1);
2941 }
2942
2943 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
2944
2945 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
2946 "assuming the HCB Address points to good F/W\n",
2947 ioc->name));
2948 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
2949 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
2950 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
2951
2952 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
2953 "re-enable the HCDW\n", ioc->name));
2954 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
2955 &ioc->chip->HCBSize);
2956 }
2957
2958 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
2959 ioc->name));
2960 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
2961 &ioc->chip->HostDiagnostic);
2962
2963 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
2964 "diagnostic register\n", ioc->name));
2965 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
2966
2967 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
2968 "READY state\n", ioc->name));
2969 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
2970 sleep_flag);
2971 if (ioc_state) {
2972 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2973 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2974 goto out;
2975 }
2976
2977 _base_restore_msix_table(ioc);
2978 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
2979 return 0;
2980
2981 out:
2982 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
2983 return -EFAULT;
2984}
2985
2986/**
2987 * _base_make_ioc_ready - put controller in READY state
2988 * @ioc: per adapter object
2989 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2990 * @type: FORCE_BIG_HAMMER or SOFT_RESET
2991 *
2992 * Returns 0 for success, non-zero for failure.
2993 */
2994static int
2995_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
2996 enum reset_type type)
2997{
2998 u32 ioc_state;
2999
3000 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3001 __func__));
3002
3003 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3004 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
3005 ioc->name, __func__, ioc_state));
3006
3007 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3008 return 0;
3009
3010 if (ioc_state & MPI2_DOORBELL_USED) {
3011 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
3012 "active!\n", ioc->name));
3013 goto issue_diag_reset;
3014 }
3015
3016 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3017 mpt2sas_base_fault_info(ioc, ioc_state &
3018 MPI2_DOORBELL_DATA_MASK);
3019 goto issue_diag_reset;
3020 }
3021
3022 if (type == FORCE_BIG_HAMMER)
3023 goto issue_diag_reset;
3024
3025 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
3026 if (!(_base_send_ioc_reset(ioc,
3027 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
3028 return 0;
3029
3030 issue_diag_reset:
3031 return _base_diag_reset(ioc, CAN_SLEEP);
3032}
3033
3034/**
3035 * _base_make_ioc_operational - put controller in OPERATIONAL state
3036 * @ioc: per adapter object
3037 * @VF_ID: virtual function id
3038 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3039 *
3040 * Returns 0 for success, non-zero for failure.
3041 */
3042static int
3043_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
3044 int sleep_flag)
3045{
3046 int r, i;
3047 unsigned long flags;
3048 u32 reply_address;
3049
3050 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3051 __func__));
3052
3053 /* initialize the scsi lookup free list */
3054 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3055 INIT_LIST_HEAD(&ioc->free_list);
3056 for (i = 0; i < ioc->request_depth; i++) {
3057 ioc->scsi_lookup[i].cb_idx = 0xFF;
3058 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
3059 &ioc->free_list);
3060 }
3061 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3062
3063 /* initialize Reply Free Queue */
3064 for (i = 0, reply_address = (u32)ioc->reply_dma ;
3065 i < ioc->reply_free_queue_depth ; i++, reply_address +=
3066 ioc->reply_sz)
3067 ioc->reply_free[i] = cpu_to_le32(reply_address);
3068
3069 /* initialize Reply Post Free Queue */
3070 for (i = 0; i < ioc->reply_post_queue_depth; i++)
3071 ioc->reply_post_free[i].Words = ~0ULL;
3072
3073 r = _base_send_ioc_init(ioc, VF_ID, sleep_flag);
3074 if (r)
3075 return r;
3076
3077 /* initialize the index's */
3078 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
3079 ioc->reply_post_host_index = 0;
3080 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
3081 writel(0, &ioc->chip->ReplyPostHostIndex);
3082
3083 _base_unmask_interrupts(ioc);
3084 r = _base_event_notification(ioc, VF_ID, sleep_flag);
3085 if (r)
3086 return r;
3087
3088 if (sleep_flag == CAN_SLEEP)
3089 _base_static_config_pages(ioc);
3090
3091 r = _base_send_port_enable(ioc, VF_ID, sleep_flag);
3092 if (r)
3093 return r;
3094
3095 return r;
3096}
3097
3098/**
3099 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
3100 * @ioc: per adapter object
3101 *
3102 * Return nothing.
3103 */
3104void
3105mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
3106{
3107 struct pci_dev *pdev = ioc->pdev;
3108
3109 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3110 __func__));
3111
3112 _base_mask_interrupts(ioc);
3113 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3114 if (ioc->pci_irq) {
3115 synchronize_irq(pdev->irq);
3116 free_irq(ioc->pci_irq, ioc);
3117 }
3118 _base_disable_msix(ioc);
3119 if (ioc->chip_phys)
3120 iounmap(ioc->chip);
3121 ioc->pci_irq = -1;
3122 ioc->chip_phys = 0;
3123 pci_release_selected_regions(ioc->pdev, ioc->bars);
3124 pci_disable_device(pdev);
3125 pci_set_drvdata(pdev, NULL);
3126 return;
3127}
3128
3129/**
3130 * mpt2sas_base_attach - attach controller instance
3131 * @ioc: per adapter object
3132 *
3133 * Returns 0 for success, non-zero for failure.
3134 */
3135int
3136mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3137{
3138 int r, i;
3139 unsigned long flags;
3140
3141 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3142 __func__));
3143
3144 r = mpt2sas_base_map_resources(ioc);
3145 if (r)
3146 return r;
3147
3148 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3149 if (r)
3150 goto out_free_resources;
3151
3152 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
3153 if (r)
3154 goto out_free_resources;
3155
3156 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
3157 if (r)
3158 goto out_free_resources;
3159
3160 init_waitqueue_head(&ioc->reset_wq);
3161
3162 /* base internal command bits */
3163 mutex_init(&ioc->base_cmds.mutex);
3164 init_completion(&ioc->base_cmds.done);
3165 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3166 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3167
3168 /* transport internal command bits */
3169 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3170 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
3171 mutex_init(&ioc->transport_cmds.mutex);
3172 init_completion(&ioc->transport_cmds.done);
3173
3174 /* task management internal command bits */
3175 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3176 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3177 mutex_init(&ioc->tm_cmds.mutex);
3178 init_completion(&ioc->tm_cmds.done);
3179
3180 /* config page internal command bits */
3181 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3182 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
3183 mutex_init(&ioc->config_cmds.mutex);
3184 init_completion(&ioc->config_cmds.done);
3185
3186 /* ctl module internal command bits */
3187 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3188 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
3189 mutex_init(&ioc->ctl_cmds.mutex);
3190 init_completion(&ioc->ctl_cmds.done);
3191
3192 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3193 ioc->event_masks[i] = -1;
3194
3195 /* here we enable the events we care about */
3196 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
3197 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
3198 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
3199 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
3200 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
3201 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
3202 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
3203 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
3204 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
3205 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
3206 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
3207
3208 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
3209 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
3210 if (!ioc->pfacts)
3211 goto out_free_resources;
3212
3213 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
3214 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
3215 if (r)
3216 goto out_free_resources;
3217 }
3218 r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP);
3219 if (r)
3220 goto out_free_resources;
3221
3222 /* initialize fault polling */
3223 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
3224 snprintf(ioc->fault_reset_work_q_name,
3225 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
3226 ioc->fault_reset_work_q =
3227 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
3228 if (!ioc->fault_reset_work_q) {
3229 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
3230 ioc->name, __func__, __LINE__);
3231 goto out_free_resources;
3232 }
3233 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3234 if (ioc->fault_reset_work_q)
3235 queue_delayed_work(ioc->fault_reset_work_q,
3236 &ioc->fault_reset_work,
3237 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
3238 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3239 return 0;
3240
3241 out_free_resources:
3242
3243 ioc->remove_host = 1;
3244 mpt2sas_base_free_resources(ioc);
3245 _base_release_memory_pools(ioc);
3246 kfree(ioc->tm_cmds.reply);
3247 kfree(ioc->transport_cmds.reply);
3248 kfree(ioc->config_cmds.reply);
3249 kfree(ioc->base_cmds.reply);
3250 kfree(ioc->ctl_cmds.reply);
3251 kfree(ioc->pfacts);
3252 ioc->ctl_cmds.reply = NULL;
3253 ioc->base_cmds.reply = NULL;
3254 ioc->tm_cmds.reply = NULL;
3255 ioc->transport_cmds.reply = NULL;
3256 ioc->config_cmds.reply = NULL;
3257 ioc->pfacts = NULL;
3258 return r;
3259}
3260
3261
3262/**
3263 * mpt2sas_base_detach - remove controller instance
3264 * @ioc: per adapter object
3265 *
3266 * Return nothing.
3267 */
3268void
3269mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
3270{
3271 unsigned long flags;
3272 struct workqueue_struct *wq;
3273
3274 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3275 __func__));
3276
3277 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3278 wq = ioc->fault_reset_work_q;
3279 ioc->fault_reset_work_q = NULL;
3280 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3281 if (!cancel_delayed_work(&ioc->fault_reset_work))
3282 flush_workqueue(wq);
3283 destroy_workqueue(wq);
3284
3285 mpt2sas_base_free_resources(ioc);
3286 _base_release_memory_pools(ioc);
3287 kfree(ioc->pfacts);
3288 kfree(ioc->ctl_cmds.reply);
3289 kfree(ioc->base_cmds.reply);
3290 kfree(ioc->tm_cmds.reply);
3291 kfree(ioc->transport_cmds.reply);
3292 kfree(ioc->config_cmds.reply);
3293}
3294
3295/**
3296 * _base_reset_handler - reset callback handler (for base)
3297 * @ioc: per adapter object
3298 * @reset_phase: phase
3299 *
3300 * The handler for doing any required cleanup or initialization.
3301 *
3302 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
3303 * MPT2_IOC_DONE_RESET
3304 *
3305 * Return nothing.
3306 */
3307static void
3308_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
3309{
3310 switch (reset_phase) {
3311 case MPT2_IOC_PRE_RESET:
3312 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3313 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
3314 break;
3315 case MPT2_IOC_AFTER_RESET:
3316 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3317 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
3318 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
3319 ioc->transport_cmds.status |= MPT2_CMD_RESET;
3320 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
3321 complete(&ioc->transport_cmds.done);
3322 }
3323 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3324 ioc->base_cmds.status |= MPT2_CMD_RESET;
3325 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
3326 complete(&ioc->base_cmds.done);
3327 }
3328 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
3329 ioc->config_cmds.status |= MPT2_CMD_RESET;
3330 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
3331 complete(&ioc->config_cmds.done);
3332 }
3333 break;
3334 case MPT2_IOC_DONE_RESET:
3335 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3336 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
3337 break;
3338 }
3339 mpt2sas_scsih_reset_handler(ioc, reset_phase);
3340 mpt2sas_ctl_reset_handler(ioc, reset_phase);
3341}
3342
3343/**
3344 * _wait_for_commands_to_complete - reset controller
3345 * @ioc: Pointer to MPT_ADAPTER structure
3346 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3347 *
3348 * This function waiting(3s) for all pending commands to complete
3349 * prior to putting controller in reset.
3350 */
3351static void
3352_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3353{
3354 u32 ioc_state;
3355 unsigned long flags;
3356 u16 i;
3357
3358 ioc->pending_io_count = 0;
3359 if (sleep_flag != CAN_SLEEP)
3360 return;
3361
3362 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3363 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
3364 return;
3365
3366 /* pending command count */
3367 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3368 for (i = 0; i < ioc->request_depth; i++)
3369 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
3370 ioc->pending_io_count++;
3371 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3372
3373 if (!ioc->pending_io_count)
3374 return;
3375
3376 /* wait for pending commands to complete */
3377 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
3378}
3379
3380/**
3381 * mpt2sas_base_hard_reset_handler - reset controller
3382 * @ioc: Pointer to MPT_ADAPTER structure
3383 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3384 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3385 *
3386 * Returns 0 for success, non-zero for failure.
3387 */
3388int
3389mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3390 enum reset_type type)
3391{
3392 int r, i;
3393 unsigned long flags;
3394
3395 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
3396 __func__));
3397
3398 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3399 if (ioc->ioc_reset_in_progress) {
3400 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3401 printk(MPT2SAS_ERR_FMT "%s: busy\n",
3402 ioc->name, __func__);
3403 return -EBUSY;
3404 }
3405 ioc->ioc_reset_in_progress = 1;
3406 ioc->shost_recovery = 1;
3407 if (ioc->shost->shost_state == SHOST_RUNNING) {
3408 /* set back to SHOST_RUNNING in mpt2sas_scsih.c */
3409 scsi_host_set_state(ioc->shost, SHOST_RECOVERY);
3410 printk(MPT2SAS_INFO_FMT "putting controller into "
3411 "SHOST_RECOVERY\n", ioc->name);
3412 }
3413 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3414
3415 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
3416 _wait_for_commands_to_complete(ioc, sleep_flag);
3417 _base_mask_interrupts(ioc);
3418 r = _base_make_ioc_ready(ioc, sleep_flag, type);
3419 if (r)
3420 goto out;
3421 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
3422 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++)
3423 r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID,
3424 sleep_flag);
3425 if (!r)
3426 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
3427 out:
3428 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
3429 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
3430
3431 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3432 ioc->ioc_reset_in_progress = 0;
3433 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3434 return r;
3435}
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.h b/drivers/scsi/mpt2sas/mpt2sas_base.h
new file mode 100644
index 000000000000..6945ff4d382e
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpt2sas_base.h
@@ -0,0 +1,779 @@
1/*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.h
6 * Copyright (C) 2007-2008 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45#ifndef MPT2SAS_BASE_H_INCLUDED
46#define MPT2SAS_BASE_H_INCLUDED
47
48#include "mpi/mpi2_type.h"
49#include "mpi/mpi2.h"
50#include "mpi/mpi2_ioc.h"
51#include "mpi/mpi2_cnfg.h"
52#include "mpi/mpi2_init.h"
53#include "mpi/mpi2_raid.h"
54#include "mpi/mpi2_tool.h"
55#include "mpi/mpi2_sas.h"
56
57#include <scsi/scsi.h>
58#include <scsi/scsi_cmnd.h>
59#include <scsi/scsi_device.h>
60#include <scsi/scsi_host.h>
61#include <scsi/scsi_tcq.h>
62#include <scsi/scsi_transport_sas.h>
63#include <scsi/scsi_dbg.h>
64
65#include "mpt2sas_debug.h"
66
67/* driver versioning info */
68#define MPT2SAS_DRIVER_NAME "mpt2sas"
69#define MPT2SAS_AUTHOR "LSI Corporation <DL-MPTFusionLinux@lsi.com>"
70#define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
71#define MPT2SAS_DRIVER_VERSION "00.100.11.16"
72#define MPT2SAS_MAJOR_VERSION 00
73#define MPT2SAS_MINOR_VERSION 100
74#define MPT2SAS_BUILD_VERSION 11
75#define MPT2SAS_RELEASE_VERSION 16
76
77/*
78 * Set MPT2SAS_SG_DEPTH value based on user input.
79 */
80#ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
81#if CONFIG_SCSI_MPT2SAS_MAX_SGE < 16
82#define MPT2SAS_SG_DEPTH 16
83#elif CONFIG_SCSI_MPT2SAS_MAX_SGE > 128
84#define MPT2SAS_SG_DEPTH 128
85#else
86#define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
87#endif
88#else
89#define MPT2SAS_SG_DEPTH 128 /* MAX_HW_SEGMENTS */
90#endif
91
92
93/*
94 * Generic Defines
95 */
96#define MPT2SAS_SATA_QUEUE_DEPTH 32
97#define MPT2SAS_SAS_QUEUE_DEPTH 254
98#define MPT2SAS_RAID_QUEUE_DEPTH 128
99
100#define MPT_NAME_LENGTH 32 /* generic length of strings */
101#define MPT_STRING_LENGTH 64
102
103#define MPT_MAX_CALLBACKS 16
104
105#define CAN_SLEEP 1
106#define NO_SLEEP 0
107
108#define INTERNAL_CMDS_COUNT 10 /* reserved cmds */
109
110#define MPI2_HIM_MASK 0xFFFFFFFF /* mask every bit*/
111
112#define MPT2SAS_INVALID_DEVICE_HANDLE 0xFFFF
113
114
115/*
116 * reset phases
117 */
118#define MPT2_IOC_PRE_RESET 1 /* prior to host reset */
119#define MPT2_IOC_AFTER_RESET 2 /* just after host reset */
120#define MPT2_IOC_DONE_RESET 3 /* links re-initialized */
121
122/*
123 * logging format
124 */
125#define MPT2SAS_FMT "%s: "
126#define MPT2SAS_DEBUG_FMT KERN_DEBUG MPT2SAS_FMT
127#define MPT2SAS_INFO_FMT KERN_INFO MPT2SAS_FMT
128#define MPT2SAS_NOTE_FMT KERN_NOTICE MPT2SAS_FMT
129#define MPT2SAS_WARN_FMT KERN_WARNING MPT2SAS_FMT
130#define MPT2SAS_ERR_FMT KERN_ERR MPT2SAS_FMT
131
132/*
133 * per target private data
134 */
135#define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
136#define MPT_TARGET_FLAGS_VOLUME 0x02
137#define MPT_TARGET_FLAGS_DELETED 0x04
138
139/**
140 * struct MPT2SAS_TARGET - starget private hostdata
141 * @starget: starget object
142 * @sas_address: target sas address
143 * @handle: device handle
144 * @num_luns: number luns
145 * @flags: MPT_TARGET_FLAGS_XXX flags
146 * @deleted: target flaged for deletion
147 * @tm_busy: target is busy with TM request.
148 */
149struct MPT2SAS_TARGET {
150 struct scsi_target *starget;
151 u64 sas_address;
152 u16 handle;
153 int num_luns;
154 u32 flags;
155 u8 deleted;
156 u8 tm_busy;
157};
158
159/*
160 * per device private data
161 */
162#define MPT_DEVICE_FLAGS_INIT 0x01
163#define MPT_DEVICE_TLR_ON 0x02
164
165/**
166 * struct MPT2SAS_DEVICE - sdev private hostdata
167 * @sas_target: starget private hostdata
168 * @lun: lun number
169 * @flags: MPT_DEVICE_XXX flags
170 * @configured_lun: lun is configured
171 * @block: device is in SDEV_BLOCK state
172 * @tlr_snoop_check: flag used in determining whether to disable TLR
173 */
174struct MPT2SAS_DEVICE {
175 struct MPT2SAS_TARGET *sas_target;
176 unsigned int lun;
177 u32 flags;
178 u8 configured_lun;
179 u8 block;
180 u8 tlr_snoop_check;
181};
182
183#define MPT2_CMD_NOT_USED 0x8000 /* free */
184#define MPT2_CMD_COMPLETE 0x0001 /* completed */
185#define MPT2_CMD_PENDING 0x0002 /* pending */
186#define MPT2_CMD_REPLY_VALID 0x0004 /* reply is valid */
187#define MPT2_CMD_RESET 0x0008 /* host reset dropped the command */
188
189/**
190 * struct _internal_cmd - internal commands struct
191 * @mutex: mutex
192 * @done: completion
193 * @reply: reply message pointer
194 * @status: MPT2_CMD_XXX status
195 * @smid: system message id
196 */
197struct _internal_cmd {
198 struct mutex mutex;
199 struct completion done;
200 void *reply;
201 u16 status;
202 u16 smid;
203};
204
205/*
206 * SAS Topology Structures
207 */
208
209/**
210 * struct _sas_device - attached device information
211 * @list: sas device list
212 * @starget: starget object
213 * @sas_address: device sas address
214 * @device_name: retrieved from the SAS IDENTIFY frame.
215 * @handle: device handle
216 * @parent_handle: handle to parent device
217 * @enclosure_handle: enclosure handle
218 * @enclosure_logical_id: enclosure logical identifier
219 * @volume_handle: volume handle (valid when hidden raid member)
220 * @volume_wwid: volume unique identifier
221 * @device_info: bitfield provides detailed info about the device
222 * @id: target id
223 * @channel: target channel
224 * @slot: number number
225 * @hidden_raid_component: set to 1 when this is a raid member
226 * @responding: used in _scsih_sas_device_mark_responding
227 */
228struct _sas_device {
229 struct list_head list;
230 struct scsi_target *starget;
231 u64 sas_address;
232 u64 device_name;
233 u16 handle;
234 u16 parent_handle;
235 u16 enclosure_handle;
236 u64 enclosure_logical_id;
237 u16 volume_handle;
238 u64 volume_wwid;
239 u32 device_info;
240 int id;
241 int channel;
242 u16 slot;
243 u8 hidden_raid_component;
244 u8 responding;
245};
246
247/**
248 * struct _raid_device - raid volume link list
249 * @list: sas device list
250 * @starget: starget object
251 * @sdev: scsi device struct (volumes are single lun)
252 * @wwid: unique identifier for the volume
253 * @handle: device handle
254 * @id: target id
255 * @channel: target channel
256 * @volume_type: the raid level
257 * @device_info: bitfield provides detailed info about the hidden components
258 * @num_pds: number of hidden raid components
259 * @responding: used in _scsih_raid_device_mark_responding
260 */
261struct _raid_device {
262 struct list_head list;
263 struct scsi_target *starget;
264 struct scsi_device *sdev;
265 u64 wwid;
266 u16 handle;
267 int id;
268 int channel;
269 u8 volume_type;
270 u32 device_info;
271 u8 num_pds;
272 u8 responding;
273};
274
275/**
276 * struct _boot_device - boot device info
277 * @is_raid: flag to indicate whether this is volume
278 * @device: holds pointer for either struct _sas_device or
279 * struct _raid_device
280 */
281struct _boot_device {
282 u8 is_raid;
283 void *device;
284};
285
286/**
287 * struct _sas_port - wide/narrow sas port information
288 * @port_list: list of ports belonging to expander
289 * @handle: device handle for this port
290 * @sas_address: sas address of this port
291 * @num_phys: number of phys belonging to this port
292 * @remote_identify: attached device identification
293 * @rphy: sas transport rphy object
294 * @port: sas transport wide/narrow port object
295 * @phy_list: _sas_phy list objects belonging to this port
296 */
297struct _sas_port {
298 struct list_head port_list;
299 u16 handle;
300 u64 sas_address;
301 u8 num_phys;
302 struct sas_identify remote_identify;
303 struct sas_rphy *rphy;
304 struct sas_port *port;
305 struct list_head phy_list;
306};
307
308/**
309 * struct _sas_phy - phy information
310 * @port_siblings: list of phys belonging to a port
311 * @identify: phy identification
312 * @remote_identify: attached device identification
313 * @phy: sas transport phy object
314 * @phy_id: unique phy id
315 * @handle: device handle for this phy
316 * @attached_handle: device handle for attached device
317 */
318struct _sas_phy {
319 struct list_head port_siblings;
320 struct sas_identify identify;
321 struct sas_identify remote_identify;
322 struct sas_phy *phy;
323 u8 phy_id;
324 u16 handle;
325 u16 attached_handle;
326};
327
328/**
329 * struct _sas_node - sas_host/expander information
330 * @list: list of expanders
331 * @parent_dev: parent device class
332 * @num_phys: number phys belonging to this sas_host/expander
333 * @sas_address: sas address of this sas_host/expander
334 * @handle: handle for this sas_host/expander
335 * @parent_handle: parent handle
336 * @enclosure_handle: handle for this a member of an enclosure
337 * @device_info: bitwise defining capabilities of this sas_host/expander
338 * @responding: used in _scsih_expander_device_mark_responding
339 * @phy: a list of phys that make up this sas_host/expander
340 * @sas_port_list: list of ports attached to this sas_host/expander
341 */
342struct _sas_node {
343 struct list_head list;
344 struct device *parent_dev;
345 u8 num_phys;
346 u64 sas_address;
347 u16 handle;
348 u16 parent_handle;
349 u16 enclosure_handle;
350 u64 enclosure_logical_id;
351 u8 responding;
352 struct _sas_phy *phy;
353 struct list_head sas_port_list;
354};
355
356/**
357 * enum reset_type - reset state
358 * @FORCE_BIG_HAMMER: issue diagnostic reset
359 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
360 */
361enum reset_type {
362 FORCE_BIG_HAMMER,
363 SOFT_RESET,
364};
365
366/**
367 * struct request_tracker - firmware request tracker
368 * @smid: system message id
369 * @scmd: scsi request pointer
370 * @cb_idx: callback index
371 * @chain_list: list of chains associated to this IO
372 * @tracker_list: list of free request (ioc->free_list)
373 */
374struct request_tracker {
375 u16 smid;
376 struct scsi_cmnd *scmd;
377 u8 cb_idx;
378 struct list_head tracker_list;
379};
380
381typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
382
383/**
384 * struct MPT2SAS_ADAPTER - per adapter struct
385 * @list: ioc_list
386 * @shost: shost object
387 * @id: unique adapter id
388 * @pci_irq: irq number
389 * @name: generic ioc string
390 * @tmp_string: tmp string used for logging
391 * @pdev: pci pdev object
392 * @chip: memory mapped register space
393 * @chip_phys: physical addrss prior to mapping
394 * @pio_chip: I/O mapped register space
395 * @logging_level: see mpt2sas_debug.h
396 * @ir_firmware: IR firmware present
397 * @bars: bitmask of BAR's that must be configured
398 * @mask_interrupts: ignore interrupt
399 * @fault_reset_work_q_name: fw fault work queue
400 * @fault_reset_work_q: ""
401 * @fault_reset_work: ""
402 * @firmware_event_name: fw event work queue
403 * @firmware_event_thread: ""
404 * @fw_events_off: flag to turn off fw event handling
405 * @fw_event_lock:
406 * @fw_event_list: list of fw events
407 * @aen_event_read_flag: event log was read
408 * @broadcast_aen_busy: broadcast aen waiting to be serviced
409 * @ioc_reset_in_progress: host reset in progress
410 * @ioc_reset_in_progress_lock:
411 * @ioc_link_reset_in_progress: phy/hard reset in progress
412 * @ignore_loginfos: ignore loginfos during task managment
413 * @remove_host: flag for when driver unloads, to avoid sending dev resets
414 * @wait_for_port_enable_to_complete:
415 * @msix_enable: flag indicating msix is enabled
416 * @msix_vector_count: number msix vectors
417 * @msix_table: virt address to the msix table
418 * @msix_table_backup: backup msix table
419 * @scsi_io_cb_idx: shost generated commands
420 * @tm_cb_idx: task management commands
421 * @transport_cb_idx: transport internal commands
422 * @ctl_cb_idx: clt internal commands
423 * @base_cb_idx: base internal commands
424 * @config_cb_idx: base internal commands
425 * @base_cmds:
426 * @transport_cmds:
427 * @tm_cmds:
428 * @ctl_cmds:
429 * @config_cmds:
430 * @base_add_sg_single: handler for either 32/64 bit sgl's
431 * @event_type: bits indicating which events to log
432 * @event_context: unique id for each logged event
433 * @event_log: event log pointer
434 * @event_masks: events that are masked
435 * @facts: static facts data
436 * @pfacts: static port facts data
437 * @manu_pg0: static manufacturing page 0
438 * @bios_pg2: static bios page 2
439 * @bios_pg3: static bios page 3
440 * @ioc_pg8: static ioc page 8
441 * @iounit_pg0: static iounit page 0
442 * @iounit_pg1: static iounit page 1
443 * @sas_hba: sas host object
444 * @sas_expander_list: expander object list
445 * @sas_node_lock:
446 * @sas_device_list: sas device object list
447 * @sas_device_init_list: sas device object list (used only at init time)
448 * @sas_device_lock:
449 * @io_missing_delay: time for IO completed by fw when PDR enabled
450 * @device_missing_delay: time for device missing by fw when PDR enabled
451 * @config_page_sz: config page size
452 * @config_page: reserve memory for config page payload
453 * @config_page_dma:
454 * @sge_size: sg element size for either 32/64 bit
455 * @request_depth: hba request queue depth
456 * @request_sz: per request frame size
457 * @request: pool of request frames
458 * @request_dma:
459 * @request_dma_sz:
460 * @scsi_lookup: firmware request tracker list
461 * @scsi_lookup_lock:
462 * @free_list: free list of request
463 * @chain: pool of chains
464 * @pending_io_count:
465 * @reset_wq:
466 * @chain_dma:
467 * @max_sges_in_main_message: number sg elements in main message
468 * @max_sges_in_chain_message: number sg elements per chain
469 * @chains_needed_per_io: max chains per io
470 * @chain_offset_value_for_main_message: location 1st sg in main
471 * @chain_depth: total chains allocated
472 * @sense: pool of sense
473 * @sense_dma:
474 * @sense_dma_pool:
475 * @reply_depth: hba reply queue depth:
476 * @reply_sz: per reply frame size:
477 * @reply: pool of replys:
478 * @reply_dma:
479 * @reply_dma_pool:
480 * @reply_free_queue_depth: reply free depth
481 * @reply_free: pool for reply free queue (32 bit addr)
482 * @reply_free_dma:
483 * @reply_free_dma_pool:
484 * @reply_free_host_index: tail index in pool to insert free replys
485 * @reply_post_queue_depth: reply post queue depth
486 * @reply_post_free: pool for reply post (64bit descriptor)
487 * @reply_post_free_dma:
488 * @reply_post_free_dma_pool:
489 * @reply_post_host_index: head index in the pool where FW completes IO
490 */
491struct MPT2SAS_ADAPTER {
492 struct list_head list;
493 struct Scsi_Host *shost;
494 u8 id;
495 u32 pci_irq;
496 char name[MPT_NAME_LENGTH];
497 char tmp_string[MPT_STRING_LENGTH];
498 struct pci_dev *pdev;
499 Mpi2SystemInterfaceRegs_t __iomem *chip;
500 unsigned long chip_phys;
501 unsigned long pio_chip;
502 int logging_level;
503 u8 ir_firmware;
504 int bars;
505 u8 mask_interrupts;
506
507 /* fw fault handler */
508 char fault_reset_work_q_name[20];
509 struct workqueue_struct *fault_reset_work_q;
510 struct delayed_work fault_reset_work;
511
512 /* fw event handler */
513 char firmware_event_name[20];
514 struct workqueue_struct *firmware_event_thread;
515 u8 fw_events_off;
516 spinlock_t fw_event_lock;
517 struct list_head fw_event_list;
518
519 /* misc flags */
520 int aen_event_read_flag;
521 u8 broadcast_aen_busy;
522 u8 ioc_reset_in_progress;
523 u8 shost_recovery;
524 spinlock_t ioc_reset_in_progress_lock;
525 u8 ioc_link_reset_in_progress;
526 u8 ignore_loginfos;
527 u8 remove_host;
528 u8 wait_for_port_enable_to_complete;
529
530 u8 msix_enable;
531 u16 msix_vector_count;
532 u32 *msix_table;
533 u32 *msix_table_backup;
534
535 /* internal commands, callback index */
536 u8 scsi_io_cb_idx;
537 u8 tm_cb_idx;
538 u8 transport_cb_idx;
539 u8 ctl_cb_idx;
540 u8 base_cb_idx;
541 u8 config_cb_idx;
542 struct _internal_cmd base_cmds;
543 struct _internal_cmd transport_cmds;
544 struct _internal_cmd tm_cmds;
545 struct _internal_cmd ctl_cmds;
546 struct _internal_cmd config_cmds;
547
548 MPT_ADD_SGE base_add_sg_single;
549
550 /* event log */
551 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
552 u32 event_context;
553 void *event_log;
554 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
555
556 /* static config pages */
557 Mpi2IOCFactsReply_t facts;
558 Mpi2PortFactsReply_t *pfacts;
559 Mpi2ManufacturingPage0_t manu_pg0;
560 Mpi2BiosPage2_t bios_pg2;
561 Mpi2BiosPage3_t bios_pg3;
562 Mpi2IOCPage8_t ioc_pg8;
563 Mpi2IOUnitPage0_t iounit_pg0;
564 Mpi2IOUnitPage1_t iounit_pg1;
565
566 struct _boot_device req_boot_device;
567 struct _boot_device req_alt_boot_device;
568 struct _boot_device current_boot_device;
569
570 /* sas hba, expander, and device list */
571 struct _sas_node sas_hba;
572 struct list_head sas_expander_list;
573 spinlock_t sas_node_lock;
574 struct list_head sas_device_list;
575 struct list_head sas_device_init_list;
576 spinlock_t sas_device_lock;
577 struct list_head raid_device_list;
578 spinlock_t raid_device_lock;
579 u8 io_missing_delay;
580 u16 device_missing_delay;
581 int sas_id;
582
583 /* config page */
584 u16 config_page_sz;
585 void *config_page;
586 dma_addr_t config_page_dma;
587
588 /* request */
589 u16 sge_size;
590 u16 request_depth;
591 u16 request_sz;
592 u8 *request;
593 dma_addr_t request_dma;
594 u32 request_dma_sz;
595 struct request_tracker *scsi_lookup;
596 spinlock_t scsi_lookup_lock;
597 struct list_head free_list;
598 int pending_io_count;
599 wait_queue_head_t reset_wq;
600
601 /* chain */
602 u8 *chain;
603 dma_addr_t chain_dma;
604 u16 max_sges_in_main_message;
605 u16 max_sges_in_chain_message;
606 u16 chains_needed_per_io;
607 u16 chain_offset_value_for_main_message;
608 u16 chain_depth;
609
610 /* sense */
611 u8 *sense;
612 dma_addr_t sense_dma;
613 struct dma_pool *sense_dma_pool;
614
615 /* reply */
616 u16 reply_sz;
617 u8 *reply;
618 dma_addr_t reply_dma;
619 struct dma_pool *reply_dma_pool;
620
621 /* reply free queue */
622 u16 reply_free_queue_depth;
623 u32 *reply_free;
624 dma_addr_t reply_free_dma;
625 struct dma_pool *reply_free_dma_pool;
626 u32 reply_free_host_index;
627
628 /* reply post queue */
629 u16 reply_post_queue_depth;
630 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
631 dma_addr_t reply_post_free_dma;
632 struct dma_pool *reply_post_free_dma_pool;
633 u32 reply_post_host_index;
634
635 /* diag buffer support */
636 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
637 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
638 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
639 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
640 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
641 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
642 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
643};
644
645typedef void (*MPT_CALLBACK)(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID,
646 u32 reply);
647
648
649/* base shared API */
650extern struct list_head mpt2sas_ioc_list;
651
652int mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc);
653void mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc);
654int mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc);
655void mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc);
656int mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
657 enum reset_type type);
658
659void *mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid);
660void *mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid);
661void mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr);
662dma_addr_t mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid);
663dma_addr_t mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid);
664
665u16 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx);
666void mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid);
667void mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id,
668 u16 handle);
669void mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id);
670void mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
671 u8 vf_id, u16 io_index);
672void mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id);
673void mpt2sas_base_initialize_callback_handler(void);
674u8 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func);
675void mpt2sas_base_release_callback_handler(u8 cb_idx);
676
677void mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply);
678void *mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr);
679
680u32 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked);
681
682void mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code);
683int mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
684 Mpi2SasIoUnitControlReply_t *mpi_reply, Mpi2SasIoUnitControlRequest_t
685 *mpi_request);
686int mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
687 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
688void mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type);
689
690/* scsih shared API */
691void mpt2sas_scsih_issue_tm(struct MPT2SAS_ADAPTER *ioc, u16 handle, uint lun,
692 u8 type, u16 smid_task, ulong timeout);
693void mpt2sas_scsih_set_tm_flag(struct MPT2SAS_ADAPTER *ioc, u16 handle);
694void mpt2sas_scsih_clear_tm_flag(struct MPT2SAS_ADAPTER *ioc, u16 handle);
695struct _sas_node *mpt2sas_scsih_expander_find_by_handle(struct MPT2SAS_ADAPTER *ioc,
696 u16 handle);
697struct _sas_node *mpt2sas_scsih_expander_find_by_sas_address(struct MPT2SAS_ADAPTER
698 *ioc, u64 sas_address);
699struct _sas_device *mpt2sas_scsih_sas_device_find_by_sas_address(
700 struct MPT2SAS_ADAPTER *ioc, u64 sas_address);
701
702void mpt2sas_scsih_event_callback(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply);
703void mpt2sas_scsih_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase);
704
705/* config shared API */
706void mpt2sas_config_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply);
707int mpt2sas_config_get_number_hba_phys(struct MPT2SAS_ADAPTER *ioc, u8 *num_phys);
708int mpt2sas_config_get_manufacturing_pg0(struct MPT2SAS_ADAPTER *ioc,
709 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
710int mpt2sas_config_get_bios_pg2(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
711 *mpi_reply, Mpi2BiosPage2_t *config_page);
712int mpt2sas_config_get_bios_pg3(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
713 *mpi_reply, Mpi2BiosPage3_t *config_page);
714int mpt2sas_config_get_iounit_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
715 *mpi_reply, Mpi2IOUnitPage0_t *config_page);
716int mpt2sas_config_get_sas_device_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
717 *mpi_reply, Mpi2SasDevicePage0_t *config_page, u32 form, u32 handle);
718int mpt2sas_config_get_sas_device_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
719 *mpi_reply, Mpi2SasDevicePage1_t *config_page, u32 form, u32 handle);
720int mpt2sas_config_get_sas_iounit_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
721 *mpi_reply, Mpi2SasIOUnitPage0_t *config_page, u16 sz);
722int mpt2sas_config_get_iounit_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
723 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
724int mpt2sas_config_set_iounit_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
725 *mpi_reply, Mpi2IOUnitPage1_t config_page);
726int mpt2sas_config_get_sas_iounit_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
727 *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, u16 sz);
728int mpt2sas_config_get_ioc_pg8(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
729 *mpi_reply, Mpi2IOCPage8_t *config_page);
730int mpt2sas_config_get_expander_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
731 *mpi_reply, Mpi2ExpanderPage0_t *config_page, u32 form, u32 handle);
732int mpt2sas_config_get_expander_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
733 *mpi_reply, Mpi2ExpanderPage1_t *config_page, u32 phy_number, u16 handle);
734int mpt2sas_config_get_enclosure_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
735 *mpi_reply, Mpi2SasEnclosurePage0_t *config_page, u32 form, u32 handle);
736int mpt2sas_config_get_phy_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
737 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
738int mpt2sas_config_get_phy_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
739 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
740int mpt2sas_config_get_raid_volume_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
741 *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, u32 handle);
742int mpt2sas_config_get_number_pds(struct MPT2SAS_ADAPTER *ioc, u16 handle, u8 *num_pds);
743int mpt2sas_config_get_raid_volume_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
744 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form, u32 handle, u16 sz);
745int mpt2sas_config_get_phys_disk_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
746 *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, u32 form,
747 u32 form_specific);
748int mpt2sas_config_get_volume_handle(struct MPT2SAS_ADAPTER *ioc, u16 pd_handle,
749 u16 *volume_handle);
750int mpt2sas_config_get_volume_wwid(struct MPT2SAS_ADAPTER *ioc, u16 volume_handle,
751 u64 *wwid);
752
753/* ctl shared API */
754extern struct device_attribute *mpt2sas_host_attrs[];
755extern struct device_attribute *mpt2sas_dev_attrs[];
756void mpt2sas_ctl_init(void);
757void mpt2sas_ctl_exit(void);
758void mpt2sas_ctl_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply);
759void mpt2sas_ctl_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase);
760void mpt2sas_ctl_event_callback(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply);
761void mpt2sas_ctl_add_to_event_log(struct MPT2SAS_ADAPTER *ioc,
762 Mpi2EventNotificationReply_t *mpi_reply);
763
764/* transport shared API */
765void mpt2sas_transport_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply);
766struct _sas_port *mpt2sas_transport_port_add(struct MPT2SAS_ADAPTER *ioc,
767 u16 handle, u16 parent_handle);
768void mpt2sas_transport_port_remove(struct MPT2SAS_ADAPTER *ioc, u64 sas_address,
769 u16 parent_handle);
770int mpt2sas_transport_add_host_phy(struct MPT2SAS_ADAPTER *ioc, struct _sas_phy
771 *mpt2sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
772int mpt2sas_transport_add_expander_phy(struct MPT2SAS_ADAPTER *ioc, struct _sas_phy
773 *mpt2sas_phy, Mpi2ExpanderPage1_t expander_pg1, struct device *parent_dev);
774void mpt2sas_transport_update_phy_link_change(struct MPT2SAS_ADAPTER *ioc, u16 handle,
775 u16 attached_handle, u8 phy_number, u8 link_rate);
776extern struct sas_function_template mpt2sas_transport_functions;
777extern struct scsi_transport_template *mpt2sas_transport_template;
778
779#endif /* MPT2SAS_BASE_H_INCLUDED */
diff --git a/drivers/scsi/mpt2sas/mpt2sas_config.c b/drivers/scsi/mpt2sas/mpt2sas_config.c
new file mode 100644
index 000000000000..58cfb97846f7
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpt2sas_config.c
@@ -0,0 +1,1873 @@
1/*
2 * This module provides common API for accessing firmware configuration pages
3 *
4 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
5 * Copyright (C) 2007-2008 LSI Corporation
6 * (mailto:DL-MPTFusionLinux@lsi.com)
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * NO WARRANTY
19 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
20 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
23 * solely responsible for determining the appropriateness of using and
24 * distributing the Program and assumes all risks associated with its
25 * exercise of rights under this Agreement, including but not limited to
26 * the risks and costs of program errors, damage to or loss of data,
27 * programs or equipment, and unavailability or interruption of operations.
28
29 * DISCLAIMER OF LIABILITY
30 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
31 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
33 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
35 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
36 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
37
38 * You should have received a copy of the GNU General Public License
39 * along with this program; if not, write to the Free Software
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
41 * USA.
42 */
43
44#include <linux/version.h>
45#include <linux/module.h>
46#include <linux/kernel.h>
47#include <linux/init.h>
48#include <linux/errno.h>
49#include <linux/blkdev.h>
50#include <linux/sched.h>
51#include <linux/workqueue.h>
52#include <linux/delay.h>
53#include <linux/pci.h>
54
55#include "mpt2sas_base.h"
56
57/* local definitions */
58
59/* Timeout for config page request (in seconds) */
60#define MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT 15
61
62/* Common sgl flags for READING a config page. */
63#define MPT2_CONFIG_COMMON_SGLFLAGS ((MPI2_SGE_FLAGS_SIMPLE_ELEMENT | \
64 MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER \
65 | MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT)
66
67/* Common sgl flags for WRITING a config page. */
68#define MPT2_CONFIG_COMMON_WRITE_SGLFLAGS ((MPI2_SGE_FLAGS_SIMPLE_ELEMENT | \
69 MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER \
70 | MPI2_SGE_FLAGS_END_OF_LIST | MPI2_SGE_FLAGS_HOST_TO_IOC) \
71 << MPI2_SGE_FLAGS_SHIFT)
72
73/**
74 * struct config_request - obtain dma memory via routine
75 * @config_page_sz: size
76 * @config_page: virt pointer
77 * @config_page_dma: phys pointer
78 *
79 */
80struct config_request{
81 u16 config_page_sz;
82 void *config_page;
83 dma_addr_t config_page_dma;
84};
85
86#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
87/**
88 * _config_display_some_debug - debug routine
89 * @ioc: per adapter object
90 * @smid: system request message index
91 * @calling_function_name: string pass from calling function
92 * @mpi_reply: reply message frame
93 * Context: none.
94 *
95 * Function for displaying debug info helpfull when debugging issues
96 * in this module.
97 */
98static void
99_config_display_some_debug(struct MPT2SAS_ADAPTER *ioc, u16 smid,
100 char *calling_function_name, MPI2DefaultReply_t *mpi_reply)
101{
102 Mpi2ConfigRequest_t *mpi_request;
103 char *desc = NULL;
104
105 if (!(ioc->logging_level & MPT_DEBUG_CONFIG))
106 return;
107
108 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
109 switch (mpi_request->Header.PageType & MPI2_CONFIG_PAGETYPE_MASK) {
110 case MPI2_CONFIG_PAGETYPE_IO_UNIT:
111 desc = "io_unit";
112 break;
113 case MPI2_CONFIG_PAGETYPE_IOC:
114 desc = "ioc";
115 break;
116 case MPI2_CONFIG_PAGETYPE_BIOS:
117 desc = "bios";
118 break;
119 case MPI2_CONFIG_PAGETYPE_RAID_VOLUME:
120 desc = "raid_volume";
121 break;
122 case MPI2_CONFIG_PAGETYPE_MANUFACTURING:
123 desc = "manufaucturing";
124 break;
125 case MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK:
126 desc = "physdisk";
127 break;
128 case MPI2_CONFIG_PAGETYPE_EXTENDED:
129 switch (mpi_request->ExtPageType) {
130 case MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT:
131 desc = "sas_io_unit";
132 break;
133 case MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER:
134 desc = "sas_expander";
135 break;
136 case MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE:
137 desc = "sas_device";
138 break;
139 case MPI2_CONFIG_EXTPAGETYPE_SAS_PHY:
140 desc = "sas_phy";
141 break;
142 case MPI2_CONFIG_EXTPAGETYPE_LOG:
143 desc = "log";
144 break;
145 case MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE:
146 desc = "enclosure";
147 break;
148 case MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG:
149 desc = "raid_config";
150 break;
151 case MPI2_CONFIG_EXTPAGETYPE_DRIVER_MAPPING:
152 desc = "driver_mappping";
153 break;
154 }
155 break;
156 }
157
158 if (!desc)
159 return;
160
161 printk(MPT2SAS_DEBUG_FMT "%s: %s(%d), action(%d), form(0x%08x), "
162 "smid(%d)\n", ioc->name, calling_function_name, desc,
163 mpi_request->Header.PageNumber, mpi_request->Action,
164 le32_to_cpu(mpi_request->PageAddress), smid);
165
166 if (!mpi_reply)
167 return;
168
169 if (mpi_reply->IOCStatus || mpi_reply->IOCLogInfo)
170 printk(MPT2SAS_DEBUG_FMT
171 "\tiocstatus(0x%04x), loginfo(0x%08x)\n",
172 ioc->name, le16_to_cpu(mpi_reply->IOCStatus),
173 le32_to_cpu(mpi_reply->IOCLogInfo));
174}
175#endif
176
177/**
178 * mpt2sas_config_done - config page completion routine
179 * @ioc: per adapter object
180 * @smid: system request message index
181 * @VF_ID: virtual function id
182 * @reply: reply message frame(lower 32bit addr)
183 * Context: none.
184 *
185 * The callback handler when using _config_request.
186 *
187 * Return nothing.
188 */
189void
190mpt2sas_config_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
191{
192 MPI2DefaultReply_t *mpi_reply;
193
194 if (ioc->config_cmds.status == MPT2_CMD_NOT_USED)
195 return;
196 if (ioc->config_cmds.smid != smid)
197 return;
198 ioc->config_cmds.status |= MPT2_CMD_COMPLETE;
199 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
200 if (mpi_reply) {
201 ioc->config_cmds.status |= MPT2_CMD_REPLY_VALID;
202 memcpy(ioc->config_cmds.reply, mpi_reply,
203 mpi_reply->MsgLength*4);
204 }
205 ioc->config_cmds.status &= ~MPT2_CMD_PENDING;
206#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
207 _config_display_some_debug(ioc, smid, "config_done", mpi_reply);
208#endif
209 complete(&ioc->config_cmds.done);
210}
211
212/**
213 * _config_request - main routine for sending config page requests
214 * @ioc: per adapter object
215 * @mpi_request: request message frame
216 * @mpi_reply: reply mf payload returned from firmware
217 * @timeout: timeout in seconds
218 * Context: sleep, the calling function needs to acquire the config_cmds.mutex
219 *
220 * A generic API for config page requests to firmware.
221 *
222 * The ioc->config_cmds.status flag should be MPT2_CMD_NOT_USED before calling
223 * this API.
224 *
225 * The callback index is set inside `ioc->config_cb_idx.
226 *
227 * Returns 0 for success, non-zero for failure.
228 */
229static int
230_config_request(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigRequest_t
231 *mpi_request, Mpi2ConfigReply_t *mpi_reply, int timeout)
232{
233 u16 smid;
234 u32 ioc_state;
235 unsigned long timeleft;
236 Mpi2ConfigRequest_t *config_request;
237 int r;
238 u8 retry_count;
239 u8 issue_reset;
240 u16 wait_state_count;
241
242 if (ioc->config_cmds.status != MPT2_CMD_NOT_USED) {
243 printk(MPT2SAS_ERR_FMT "%s: config_cmd in use\n",
244 ioc->name, __func__);
245 return -EAGAIN;
246 }
247 retry_count = 0;
248
249 retry_config:
250 wait_state_count = 0;
251 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
252 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
253 if (wait_state_count++ == MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT) {
254 printk(MPT2SAS_ERR_FMT
255 "%s: failed due to ioc not operational\n",
256 ioc->name, __func__);
257 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
258 return -EFAULT;
259 }
260 ssleep(1);
261 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
262 printk(MPT2SAS_INFO_FMT "%s: waiting for "
263 "operational state(count=%d)\n", ioc->name,
264 __func__, wait_state_count);
265 }
266 if (wait_state_count)
267 printk(MPT2SAS_INFO_FMT "%s: ioc is operational\n",
268 ioc->name, __func__);
269
270 smid = mpt2sas_base_get_smid(ioc, ioc->config_cb_idx);
271 if (!smid) {
272 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
273 ioc->name, __func__);
274 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
275 return -EAGAIN;
276 }
277
278 r = 0;
279 memset(mpi_reply, 0, sizeof(Mpi2ConfigReply_t));
280 ioc->config_cmds.status = MPT2_CMD_PENDING;
281 config_request = mpt2sas_base_get_msg_frame(ioc, smid);
282 ioc->config_cmds.smid = smid;
283 memcpy(config_request, mpi_request, sizeof(Mpi2ConfigRequest_t));
284#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
285 _config_display_some_debug(ioc, smid, "config_request", NULL);
286#endif
287 mpt2sas_base_put_smid_default(ioc, smid, config_request->VF_ID);
288 timeleft = wait_for_completion_timeout(&ioc->config_cmds.done,
289 timeout*HZ);
290 if (!(ioc->config_cmds.status & MPT2_CMD_COMPLETE)) {
291 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
292 ioc->name, __func__);
293 _debug_dump_mf(mpi_request,
294 sizeof(Mpi2ConfigRequest_t)/4);
295 if (!(ioc->config_cmds.status & MPT2_CMD_RESET))
296 issue_reset = 1;
297 goto issue_host_reset;
298 }
299 if (ioc->config_cmds.status & MPT2_CMD_REPLY_VALID)
300 memcpy(mpi_reply, ioc->config_cmds.reply,
301 sizeof(Mpi2ConfigReply_t));
302 if (retry_count)
303 printk(MPT2SAS_INFO_FMT "%s: retry completed!!\n",
304 ioc->name, __func__);
305 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
306 return r;
307
308 issue_host_reset:
309 if (issue_reset)
310 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
311 FORCE_BIG_HAMMER);
312 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
313 if (!retry_count) {
314 printk(MPT2SAS_INFO_FMT "%s: attempting retry\n",
315 ioc->name, __func__);
316 retry_count++;
317 goto retry_config;
318 }
319 return -EFAULT;
320}
321
322/**
323 * _config_alloc_config_dma_memory - obtain physical memory
324 * @ioc: per adapter object
325 * @mem: struct config_request
326 *
327 * A wrapper for obtaining dma-able memory for config page request.
328 *
329 * Returns 0 for success, non-zero for failure.
330 */
331static int
332_config_alloc_config_dma_memory(struct MPT2SAS_ADAPTER *ioc,
333 struct config_request *mem)
334{
335 int r = 0;
336
337 mem->config_page = pci_alloc_consistent(ioc->pdev, mem->config_page_sz,
338 &mem->config_page_dma);
339 if (!mem->config_page)
340 r = -ENOMEM;
341 return r;
342}
343
344/**
345 * _config_free_config_dma_memory - wrapper to free the memory
346 * @ioc: per adapter object
347 * @mem: struct config_request
348 *
349 * A wrapper to free dma-able memory when using _config_alloc_config_dma_memory.
350 *
351 * Returns 0 for success, non-zero for failure.
352 */
353static void
354_config_free_config_dma_memory(struct MPT2SAS_ADAPTER *ioc,
355 struct config_request *mem)
356{
357 pci_free_consistent(ioc->pdev, mem->config_page_sz, mem->config_page,
358 mem->config_page_dma);
359}
360
361/**
362 * mpt2sas_config_get_manufacturing_pg0 - obtain manufacturing page 0
363 * @ioc: per adapter object
364 * @mpi_reply: reply mf payload returned from firmware
365 * @config_page: contents of the config page
366 * Context: sleep.
367 *
368 * Returns 0 for success, non-zero for failure.
369 */
370int
371mpt2sas_config_get_manufacturing_pg0(struct MPT2SAS_ADAPTER *ioc,
372 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page)
373{
374 Mpi2ConfigRequest_t mpi_request;
375 int r;
376 struct config_request mem;
377
378 mutex_lock(&ioc->config_cmds.mutex);
379 memset(config_page, 0, sizeof(Mpi2ManufacturingPage0_t));
380 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
381 mpi_request.Function = MPI2_FUNCTION_CONFIG;
382 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
383 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_MANUFACTURING;
384 mpi_request.Header.PageNumber = 0;
385 mpi_request.Header.PageVersion = MPI2_MANUFACTURING0_PAGEVERSION;
386 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
387 r = _config_request(ioc, &mpi_request, mpi_reply,
388 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
389 if (r)
390 goto out;
391
392 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
393 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
394 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
395 mpi_request.Header.PageType = mpi_reply->Header.PageType;
396 mpi_request.Header.PageLength = mpi_reply->Header.PageLength;
397 mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4;
398 if (mem.config_page_sz > ioc->config_page_sz) {
399 r = _config_alloc_config_dma_memory(ioc, &mem);
400 if (r)
401 goto out;
402 } else {
403 mem.config_page_dma = ioc->config_page_dma;
404 mem.config_page = ioc->config_page;
405 }
406 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
407 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
408 mem.config_page_dma);
409 r = _config_request(ioc, &mpi_request, mpi_reply,
410 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
411 if (!r)
412 memcpy(config_page, mem.config_page,
413 min_t(u16, mem.config_page_sz,
414 sizeof(Mpi2ManufacturingPage0_t)));
415
416 if (mem.config_page_sz > ioc->config_page_sz)
417 _config_free_config_dma_memory(ioc, &mem);
418
419 out:
420 mutex_unlock(&ioc->config_cmds.mutex);
421 return r;
422}
423
424/**
425 * mpt2sas_config_get_bios_pg2 - obtain bios page 2
426 * @ioc: per adapter object
427 * @mpi_reply: reply mf payload returned from firmware
428 * @config_page: contents of the config page
429 * Context: sleep.
430 *
431 * Returns 0 for success, non-zero for failure.
432 */
433int
434mpt2sas_config_get_bios_pg2(struct MPT2SAS_ADAPTER *ioc,
435 Mpi2ConfigReply_t *mpi_reply, Mpi2BiosPage2_t *config_page)
436{
437 Mpi2ConfigRequest_t mpi_request;
438 int r;
439 struct config_request mem;
440
441 mutex_lock(&ioc->config_cmds.mutex);
442 memset(config_page, 0, sizeof(Mpi2BiosPage2_t));
443 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
444 mpi_request.Function = MPI2_FUNCTION_CONFIG;
445 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
446 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_BIOS;
447 mpi_request.Header.PageNumber = 2;
448 mpi_request.Header.PageVersion = MPI2_BIOSPAGE2_PAGEVERSION;
449 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
450 r = _config_request(ioc, &mpi_request, mpi_reply,
451 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
452 if (r)
453 goto out;
454
455 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
456 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
457 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
458 mpi_request.Header.PageType = mpi_reply->Header.PageType;
459 mpi_request.Header.PageLength = mpi_reply->Header.PageLength;
460 mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4;
461 if (mem.config_page_sz > ioc->config_page_sz) {
462 r = _config_alloc_config_dma_memory(ioc, &mem);
463 if (r)
464 goto out;
465 } else {
466 mem.config_page_dma = ioc->config_page_dma;
467 mem.config_page = ioc->config_page;
468 }
469 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
470 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
471 mem.config_page_dma);
472 r = _config_request(ioc, &mpi_request, mpi_reply,
473 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
474 if (!r)
475 memcpy(config_page, mem.config_page,
476 min_t(u16, mem.config_page_sz,
477 sizeof(Mpi2BiosPage2_t)));
478
479 if (mem.config_page_sz > ioc->config_page_sz)
480 _config_free_config_dma_memory(ioc, &mem);
481
482 out:
483 mutex_unlock(&ioc->config_cmds.mutex);
484 return r;
485}
486
487/**
488 * mpt2sas_config_get_bios_pg3 - obtain bios page 3
489 * @ioc: per adapter object
490 * @mpi_reply: reply mf payload returned from firmware
491 * @config_page: contents of the config page
492 * Context: sleep.
493 *
494 * Returns 0 for success, non-zero for failure.
495 */
496int
497mpt2sas_config_get_bios_pg3(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
498 *mpi_reply, Mpi2BiosPage3_t *config_page)
499{
500 Mpi2ConfigRequest_t mpi_request;
501 int r;
502 struct config_request mem;
503
504 mutex_lock(&ioc->config_cmds.mutex);
505 memset(config_page, 0, sizeof(Mpi2BiosPage3_t));
506 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
507 mpi_request.Function = MPI2_FUNCTION_CONFIG;
508 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
509 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_BIOS;
510 mpi_request.Header.PageNumber = 3;
511 mpi_request.Header.PageVersion = MPI2_BIOSPAGE3_PAGEVERSION;
512 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
513 r = _config_request(ioc, &mpi_request, mpi_reply,
514 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
515 if (r)
516 goto out;
517
518 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
519 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
520 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
521 mpi_request.Header.PageType = mpi_reply->Header.PageType;
522 mpi_request.Header.PageLength = mpi_reply->Header.PageLength;
523 mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4;
524 if (mem.config_page_sz > ioc->config_page_sz) {
525 r = _config_alloc_config_dma_memory(ioc, &mem);
526 if (r)
527 goto out;
528 } else {
529 mem.config_page_dma = ioc->config_page_dma;
530 mem.config_page = ioc->config_page;
531 }
532 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
533 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
534 mem.config_page_dma);
535 r = _config_request(ioc, &mpi_request, mpi_reply,
536 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
537 if (!r)
538 memcpy(config_page, mem.config_page,
539 min_t(u16, mem.config_page_sz,
540 sizeof(Mpi2BiosPage3_t)));
541
542 if (mem.config_page_sz > ioc->config_page_sz)
543 _config_free_config_dma_memory(ioc, &mem);
544
545 out:
546 mutex_unlock(&ioc->config_cmds.mutex);
547 return r;
548}
549
550/**
551 * mpt2sas_config_get_iounit_pg0 - obtain iounit page 0
552 * @ioc: per adapter object
553 * @mpi_reply: reply mf payload returned from firmware
554 * @config_page: contents of the config page
555 * Context: sleep.
556 *
557 * Returns 0 for success, non-zero for failure.
558 */
559int
560mpt2sas_config_get_iounit_pg0(struct MPT2SAS_ADAPTER *ioc,
561 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage0_t *config_page)
562{
563 Mpi2ConfigRequest_t mpi_request;
564 int r;
565 struct config_request mem;
566
567 mutex_lock(&ioc->config_cmds.mutex);
568 memset(config_page, 0, sizeof(Mpi2IOUnitPage0_t));
569 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
570 mpi_request.Function = MPI2_FUNCTION_CONFIG;
571 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
572 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_IO_UNIT;
573 mpi_request.Header.PageNumber = 0;
574 mpi_request.Header.PageVersion = MPI2_IOUNITPAGE0_PAGEVERSION;
575 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
576 r = _config_request(ioc, &mpi_request, mpi_reply,
577 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
578 if (r)
579 goto out;
580
581 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
582 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
583 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
584 mpi_request.Header.PageType = mpi_reply->Header.PageType;
585 mpi_request.Header.PageLength = mpi_reply->Header.PageLength;
586 mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4;
587 if (mem.config_page_sz > ioc->config_page_sz) {
588 r = _config_alloc_config_dma_memory(ioc, &mem);
589 if (r)
590 goto out;
591 } else {
592 mem.config_page_dma = ioc->config_page_dma;
593 mem.config_page = ioc->config_page;
594 }
595 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
596 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
597 mem.config_page_dma);
598 r = _config_request(ioc, &mpi_request, mpi_reply,
599 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
600 if (!r)
601 memcpy(config_page, mem.config_page,
602 min_t(u16, mem.config_page_sz,
603 sizeof(Mpi2IOUnitPage0_t)));
604
605 if (mem.config_page_sz > ioc->config_page_sz)
606 _config_free_config_dma_memory(ioc, &mem);
607
608 out:
609 mutex_unlock(&ioc->config_cmds.mutex);
610 return r;
611}
612
613/**
614 * mpt2sas_config_get_iounit_pg1 - obtain iounit page 1
615 * @ioc: per adapter object
616 * @mpi_reply: reply mf payload returned from firmware
617 * @config_page: contents of the config page
618 * Context: sleep.
619 *
620 * Returns 0 for success, non-zero for failure.
621 */
622int
623mpt2sas_config_get_iounit_pg1(struct MPT2SAS_ADAPTER *ioc,
624 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage1_t *config_page)
625{
626 Mpi2ConfigRequest_t mpi_request;
627 int r;
628 struct config_request mem;
629
630 mutex_lock(&ioc->config_cmds.mutex);
631 memset(config_page, 0, sizeof(Mpi2IOUnitPage1_t));
632 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
633 mpi_request.Function = MPI2_FUNCTION_CONFIG;
634 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
635 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_IO_UNIT;
636 mpi_request.Header.PageNumber = 1;
637 mpi_request.Header.PageVersion = MPI2_IOUNITPAGE1_PAGEVERSION;
638 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
639 r = _config_request(ioc, &mpi_request, mpi_reply,
640 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
641 if (r)
642 goto out;
643
644 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
645 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
646 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
647 mpi_request.Header.PageType = mpi_reply->Header.PageType;
648 mpi_request.Header.PageLength = mpi_reply->Header.PageLength;
649 mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4;
650 if (mem.config_page_sz > ioc->config_page_sz) {
651 r = _config_alloc_config_dma_memory(ioc, &mem);
652 if (r)
653 goto out;
654 } else {
655 mem.config_page_dma = ioc->config_page_dma;
656 mem.config_page = ioc->config_page;
657 }
658 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
659 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
660 mem.config_page_dma);
661 r = _config_request(ioc, &mpi_request, mpi_reply,
662 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
663 if (!r)
664 memcpy(config_page, mem.config_page,
665 min_t(u16, mem.config_page_sz,
666 sizeof(Mpi2IOUnitPage1_t)));
667
668 if (mem.config_page_sz > ioc->config_page_sz)
669 _config_free_config_dma_memory(ioc, &mem);
670
671 out:
672 mutex_unlock(&ioc->config_cmds.mutex);
673 return r;
674}
675
676/**
677 * mpt2sas_config_set_iounit_pg1 - set iounit page 1
678 * @ioc: per adapter object
679 * @mpi_reply: reply mf payload returned from firmware
680 * @config_page: contents of the config page
681 * Context: sleep.
682 *
683 * Returns 0 for success, non-zero for failure.
684 */
685int
686mpt2sas_config_set_iounit_pg1(struct MPT2SAS_ADAPTER *ioc,
687 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage1_t config_page)
688{
689 Mpi2ConfigRequest_t mpi_request;
690 int r;
691 struct config_request mem;
692
693 mutex_lock(&ioc->config_cmds.mutex);
694 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
695 mpi_request.Function = MPI2_FUNCTION_CONFIG;
696 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
697 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_IO_UNIT;
698 mpi_request.Header.PageNumber = 1;
699 mpi_request.Header.PageVersion = MPI2_IOUNITPAGE1_PAGEVERSION;
700 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
701 r = _config_request(ioc, &mpi_request, mpi_reply,
702 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
703 if (r)
704 goto out;
705
706 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT;
707 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
708 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
709 mpi_request.Header.PageType = mpi_reply->Header.PageType;
710 mpi_request.Header.PageLength = mpi_reply->Header.PageLength;
711 mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4;
712 if (mem.config_page_sz > ioc->config_page_sz) {
713 r = _config_alloc_config_dma_memory(ioc, &mem);
714 if (r)
715 goto out;
716 } else {
717 mem.config_page_dma = ioc->config_page_dma;
718 mem.config_page = ioc->config_page;
719 }
720
721 memset(mem.config_page, 0, mem.config_page_sz);
722 memcpy(mem.config_page, &config_page,
723 sizeof(Mpi2IOUnitPage1_t));
724
725 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
726 MPT2_CONFIG_COMMON_WRITE_SGLFLAGS | mem.config_page_sz,
727 mem.config_page_dma);
728 r = _config_request(ioc, &mpi_request, mpi_reply,
729 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
730
731 if (mem.config_page_sz > ioc->config_page_sz)
732 _config_free_config_dma_memory(ioc, &mem);
733
734 out:
735 mutex_unlock(&ioc->config_cmds.mutex);
736 return r;
737}
738
739/**
740 * mpt2sas_config_get_ioc_pg8 - obtain ioc page 8
741 * @ioc: per adapter object
742 * @mpi_reply: reply mf payload returned from firmware
743 * @config_page: contents of the config page
744 * Context: sleep.
745 *
746 * Returns 0 for success, non-zero for failure.
747 */
748int
749mpt2sas_config_get_ioc_pg8(struct MPT2SAS_ADAPTER *ioc,
750 Mpi2ConfigReply_t *mpi_reply, Mpi2IOCPage8_t *config_page)
751{
752 Mpi2ConfigRequest_t mpi_request;
753 int r;
754 struct config_request mem;
755
756 mutex_lock(&ioc->config_cmds.mutex);
757 memset(config_page, 0, sizeof(Mpi2IOCPage8_t));
758 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
759 mpi_request.Function = MPI2_FUNCTION_CONFIG;
760 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
761 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_IOC;
762 mpi_request.Header.PageNumber = 8;
763 mpi_request.Header.PageVersion = MPI2_IOCPAGE8_PAGEVERSION;
764 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
765 r = _config_request(ioc, &mpi_request, mpi_reply,
766 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
767 if (r)
768 goto out;
769
770 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
771 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
772 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
773 mpi_request.Header.PageType = mpi_reply->Header.PageType;
774 mpi_request.Header.PageLength = mpi_reply->Header.PageLength;
775 mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4;
776 if (mem.config_page_sz > ioc->config_page_sz) {
777 r = _config_alloc_config_dma_memory(ioc, &mem);
778 if (r)
779 goto out;
780 } else {
781 mem.config_page_dma = ioc->config_page_dma;
782 mem.config_page = ioc->config_page;
783 }
784 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
785 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
786 mem.config_page_dma);
787 r = _config_request(ioc, &mpi_request, mpi_reply,
788 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
789 if (!r)
790 memcpy(config_page, mem.config_page,
791 min_t(u16, mem.config_page_sz,
792 sizeof(Mpi2IOCPage8_t)));
793
794 if (mem.config_page_sz > ioc->config_page_sz)
795 _config_free_config_dma_memory(ioc, &mem);
796
797 out:
798 mutex_unlock(&ioc->config_cmds.mutex);
799 return r;
800}
801
802/**
803 * mpt2sas_config_get_sas_device_pg0 - obtain sas device page 0
804 * @ioc: per adapter object
805 * @mpi_reply: reply mf payload returned from firmware
806 * @config_page: contents of the config page
807 * @form: GET_NEXT_HANDLE or HANDLE
808 * @handle: device handle
809 * Context: sleep.
810 *
811 * Returns 0 for success, non-zero for failure.
812 */
813int
814mpt2sas_config_get_sas_device_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
815 *mpi_reply, Mpi2SasDevicePage0_t *config_page, u32 form, u32 handle)
816{
817 Mpi2ConfigRequest_t mpi_request;
818 int r;
819 struct config_request mem;
820
821 mutex_lock(&ioc->config_cmds.mutex);
822 memset(config_page, 0, sizeof(Mpi2SasDevicePage0_t));
823 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
824 mpi_request.Function = MPI2_FUNCTION_CONFIG;
825 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
826 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
827 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE;
828 mpi_request.Header.PageVersion = MPI2_SASDEVICE0_PAGEVERSION;
829 mpi_request.Header.PageNumber = 0;
830 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
831 r = _config_request(ioc, &mpi_request, mpi_reply,
832 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
833 if (r)
834 goto out;
835
836 mpi_request.PageAddress = cpu_to_le32(form | handle);
837 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
838 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
839 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
840 mpi_request.Header.PageType = mpi_reply->Header.PageType;
841 mpi_request.ExtPageLength = mpi_reply->ExtPageLength;
842 mpi_request.ExtPageType = mpi_reply->ExtPageType;
843 mem.config_page_sz = le16_to_cpu(mpi_reply->ExtPageLength) * 4;
844 if (mem.config_page_sz > ioc->config_page_sz) {
845 r = _config_alloc_config_dma_memory(ioc, &mem);
846 if (r)
847 goto out;
848 } else {
849 mem.config_page_dma = ioc->config_page_dma;
850 mem.config_page = ioc->config_page;
851 }
852 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
853 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
854 mem.config_page_dma);
855 r = _config_request(ioc, &mpi_request, mpi_reply,
856 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
857 if (!r)
858 memcpy(config_page, mem.config_page,
859 min_t(u16, mem.config_page_sz,
860 sizeof(Mpi2SasDevicePage0_t)));
861
862 if (mem.config_page_sz > ioc->config_page_sz)
863 _config_free_config_dma_memory(ioc, &mem);
864
865 out:
866 mutex_unlock(&ioc->config_cmds.mutex);
867 return r;
868}
869
870/**
871 * mpt2sas_config_get_sas_device_pg1 - obtain sas device page 1
872 * @ioc: per adapter object
873 * @mpi_reply: reply mf payload returned from firmware
874 * @config_page: contents of the config page
875 * @form: GET_NEXT_HANDLE or HANDLE
876 * @handle: device handle
877 * Context: sleep.
878 *
879 * Returns 0 for success, non-zero for failure.
880 */
881int
882mpt2sas_config_get_sas_device_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
883 *mpi_reply, Mpi2SasDevicePage1_t *config_page, u32 form, u32 handle)
884{
885 Mpi2ConfigRequest_t mpi_request;
886 int r;
887 struct config_request mem;
888
889 mutex_lock(&ioc->config_cmds.mutex);
890 memset(config_page, 0, sizeof(Mpi2SasDevicePage1_t));
891 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
892 mpi_request.Function = MPI2_FUNCTION_CONFIG;
893 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
894 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
895 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE;
896 mpi_request.Header.PageVersion = MPI2_SASDEVICE1_PAGEVERSION;
897 mpi_request.Header.PageNumber = 1;
898 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
899 r = _config_request(ioc, &mpi_request, mpi_reply,
900 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
901 if (r)
902 goto out;
903
904 mpi_request.PageAddress = cpu_to_le32(form | handle);
905 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
906 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
907 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
908 mpi_request.Header.PageType = mpi_reply->Header.PageType;
909 mpi_request.ExtPageLength = mpi_reply->ExtPageLength;
910 mpi_request.ExtPageType = mpi_reply->ExtPageType;
911 mem.config_page_sz = le16_to_cpu(mpi_reply->ExtPageLength) * 4;
912 if (mem.config_page_sz > ioc->config_page_sz) {
913 r = _config_alloc_config_dma_memory(ioc, &mem);
914 if (r)
915 goto out;
916 } else {
917 mem.config_page_dma = ioc->config_page_dma;
918 mem.config_page = ioc->config_page;
919 }
920 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
921 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
922 mem.config_page_dma);
923 r = _config_request(ioc, &mpi_request, mpi_reply,
924 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
925 if (!r)
926 memcpy(config_page, mem.config_page,
927 min_t(u16, mem.config_page_sz,
928 sizeof(Mpi2SasDevicePage1_t)));
929
930 if (mem.config_page_sz > ioc->config_page_sz)
931 _config_free_config_dma_memory(ioc, &mem);
932
933 out:
934 mutex_unlock(&ioc->config_cmds.mutex);
935 return r;
936}
937
938/**
939 * mpt2sas_config_get_number_hba_phys - obtain number of phys on the host
940 * @ioc: per adapter object
941 * @num_phys: pointer returned with the number of phys
942 * Context: sleep.
943 *
944 * Returns 0 for success, non-zero for failure.
945 */
946int
947mpt2sas_config_get_number_hba_phys(struct MPT2SAS_ADAPTER *ioc, u8 *num_phys)
948{
949 Mpi2ConfigRequest_t mpi_request;
950 int r;
951 struct config_request mem;
952 u16 ioc_status;
953 Mpi2ConfigReply_t mpi_reply;
954 Mpi2SasIOUnitPage0_t config_page;
955
956 mutex_lock(&ioc->config_cmds.mutex);
957 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
958 mpi_request.Function = MPI2_FUNCTION_CONFIG;
959 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
960 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
961 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
962 mpi_request.Header.PageNumber = 0;
963 mpi_request.Header.PageVersion = MPI2_SASIOUNITPAGE0_PAGEVERSION;
964 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
965 r = _config_request(ioc, &mpi_request, &mpi_reply,
966 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
967 if (r)
968 goto out;
969
970 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
971 mpi_request.Header.PageVersion = mpi_reply.Header.PageVersion;
972 mpi_request.Header.PageNumber = mpi_reply.Header.PageNumber;
973 mpi_request.Header.PageType = mpi_reply.Header.PageType;
974 mpi_request.ExtPageLength = mpi_reply.ExtPageLength;
975 mpi_request.ExtPageType = mpi_reply.ExtPageType;
976 mem.config_page_sz = le16_to_cpu(mpi_reply.ExtPageLength) * 4;
977 if (mem.config_page_sz > ioc->config_page_sz) {
978 r = _config_alloc_config_dma_memory(ioc, &mem);
979 if (r)
980 goto out;
981 } else {
982 mem.config_page_dma = ioc->config_page_dma;
983 mem.config_page = ioc->config_page;
984 }
985 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
986 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
987 mem.config_page_dma);
988 r = _config_request(ioc, &mpi_request, &mpi_reply,
989 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
990 if (!r) {
991 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
992 MPI2_IOCSTATUS_MASK;
993 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
994 memcpy(&config_page, mem.config_page,
995 min_t(u16, mem.config_page_sz,
996 sizeof(Mpi2SasIOUnitPage0_t)));
997 *num_phys = config_page.NumPhys;
998 }
999 }
1000
1001 if (mem.config_page_sz > ioc->config_page_sz)
1002 _config_free_config_dma_memory(ioc, &mem);
1003
1004 out:
1005 mutex_unlock(&ioc->config_cmds.mutex);
1006 return r;
1007}
1008
1009/**
1010 * mpt2sas_config_get_sas_iounit_pg0 - obtain sas iounit page 0
1011 * @ioc: per adapter object
1012 * @mpi_reply: reply mf payload returned from firmware
1013 * @config_page: contents of the config page
1014 * @sz: size of buffer passed in config_page
1015 * Context: sleep.
1016 *
1017 * Calling function should call config_get_number_hba_phys prior to
1018 * this function, so enough memory is allocated for config_page.
1019 *
1020 * Returns 0 for success, non-zero for failure.
1021 */
1022int
1023mpt2sas_config_get_sas_iounit_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1024 *mpi_reply, Mpi2SasIOUnitPage0_t *config_page, u16 sz)
1025{
1026 Mpi2ConfigRequest_t mpi_request;
1027 int r;
1028 struct config_request mem;
1029
1030 mutex_lock(&ioc->config_cmds.mutex);
1031 memset(config_page, 0, sz);
1032 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1033 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1034 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1035 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
1036 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
1037 mpi_request.Header.PageNumber = 0;
1038 mpi_request.Header.PageVersion = MPI2_SASIOUNITPAGE0_PAGEVERSION;
1039 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1040 r = _config_request(ioc, &mpi_request, mpi_reply,
1041 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1042 if (r)
1043 goto out;
1044
1045 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1046 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
1047 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
1048 mpi_request.Header.PageType = mpi_reply->Header.PageType;
1049 mpi_request.ExtPageLength = mpi_reply->ExtPageLength;
1050 mpi_request.ExtPageType = mpi_reply->ExtPageType;
1051 mem.config_page_sz = le16_to_cpu(mpi_reply->ExtPageLength) * 4;
1052 if (mem.config_page_sz > ioc->config_page_sz) {
1053 r = _config_alloc_config_dma_memory(ioc, &mem);
1054 if (r)
1055 goto out;
1056 } else {
1057 mem.config_page_dma = ioc->config_page_dma;
1058 mem.config_page = ioc->config_page;
1059 }
1060 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1061 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1062 mem.config_page_dma);
1063 r = _config_request(ioc, &mpi_request, mpi_reply,
1064 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1065 if (!r)
1066 memcpy(config_page, mem.config_page,
1067 min_t(u16, sz, mem.config_page_sz));
1068
1069 if (mem.config_page_sz > ioc->config_page_sz)
1070 _config_free_config_dma_memory(ioc, &mem);
1071
1072 out:
1073 mutex_unlock(&ioc->config_cmds.mutex);
1074 return r;
1075}
1076
1077/**
1078 * mpt2sas_config_get_sas_iounit_pg1 - obtain sas iounit page 0
1079 * @ioc: per adapter object
1080 * @mpi_reply: reply mf payload returned from firmware
1081 * @config_page: contents of the config page
1082 * @sz: size of buffer passed in config_page
1083 * Context: sleep.
1084 *
1085 * Calling function should call config_get_number_hba_phys prior to
1086 * this function, so enough memory is allocated for config_page.
1087 *
1088 * Returns 0 for success, non-zero for failure.
1089 */
1090int
1091mpt2sas_config_get_sas_iounit_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1092 *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, u16 sz)
1093{
1094 Mpi2ConfigRequest_t mpi_request;
1095 int r;
1096 struct config_request mem;
1097
1098 mutex_lock(&ioc->config_cmds.mutex);
1099 memset(config_page, 0, sz);
1100 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1101 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1102 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1103 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
1104 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT;
1105 mpi_request.Header.PageNumber = 1;
1106 mpi_request.Header.PageVersion = MPI2_SASIOUNITPAGE0_PAGEVERSION;
1107 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1108 r = _config_request(ioc, &mpi_request, mpi_reply,
1109 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1110 if (r)
1111 goto out;
1112
1113 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1114 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
1115 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
1116 mpi_request.Header.PageType = mpi_reply->Header.PageType;
1117 mpi_request.ExtPageLength = mpi_reply->ExtPageLength;
1118 mpi_request.ExtPageType = mpi_reply->ExtPageType;
1119 mem.config_page_sz = le16_to_cpu(mpi_reply->ExtPageLength) * 4;
1120 if (mem.config_page_sz > ioc->config_page_sz) {
1121 r = _config_alloc_config_dma_memory(ioc, &mem);
1122 if (r)
1123 goto out;
1124 } else {
1125 mem.config_page_dma = ioc->config_page_dma;
1126 mem.config_page = ioc->config_page;
1127 }
1128 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1129 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1130 mem.config_page_dma);
1131 r = _config_request(ioc, &mpi_request, mpi_reply,
1132 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1133 if (!r)
1134 memcpy(config_page, mem.config_page,
1135 min_t(u16, sz, mem.config_page_sz));
1136
1137 if (mem.config_page_sz > ioc->config_page_sz)
1138 _config_free_config_dma_memory(ioc, &mem);
1139
1140 out:
1141 mutex_unlock(&ioc->config_cmds.mutex);
1142 return r;
1143}
1144
1145/**
1146 * mpt2sas_config_get_expander_pg0 - obtain expander page 0
1147 * @ioc: per adapter object
1148 * @mpi_reply: reply mf payload returned from firmware
1149 * @config_page: contents of the config page
1150 * @form: GET_NEXT_HANDLE or HANDLE
1151 * @handle: expander handle
1152 * Context: sleep.
1153 *
1154 * Returns 0 for success, non-zero for failure.
1155 */
1156int
1157mpt2sas_config_get_expander_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1158 *mpi_reply, Mpi2ExpanderPage0_t *config_page, u32 form, u32 handle)
1159{
1160 Mpi2ConfigRequest_t mpi_request;
1161 int r;
1162 struct config_request mem;
1163
1164 mutex_lock(&ioc->config_cmds.mutex);
1165 memset(config_page, 0, sizeof(Mpi2ExpanderPage0_t));
1166 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1167 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1168 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1169 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
1170 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER;
1171 mpi_request.Header.PageNumber = 0;
1172 mpi_request.Header.PageVersion = MPI2_SASEXPANDER0_PAGEVERSION;
1173 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1174 r = _config_request(ioc, &mpi_request, mpi_reply,
1175 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1176 if (r)
1177 goto out;
1178
1179 mpi_request.PageAddress = cpu_to_le32(form | handle);
1180 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1181 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
1182 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
1183 mpi_request.Header.PageType = mpi_reply->Header.PageType;
1184 mpi_request.ExtPageLength = mpi_reply->ExtPageLength;
1185 mpi_request.ExtPageType = mpi_reply->ExtPageType;
1186 mem.config_page_sz = le16_to_cpu(mpi_reply->ExtPageLength) * 4;
1187 if (mem.config_page_sz > ioc->config_page_sz) {
1188 r = _config_alloc_config_dma_memory(ioc, &mem);
1189 if (r)
1190 goto out;
1191 } else {
1192 mem.config_page_dma = ioc->config_page_dma;
1193 mem.config_page = ioc->config_page;
1194 }
1195 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1196 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1197 mem.config_page_dma);
1198 r = _config_request(ioc, &mpi_request, mpi_reply,
1199 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1200 if (!r)
1201 memcpy(config_page, mem.config_page,
1202 min_t(u16, mem.config_page_sz,
1203 sizeof(Mpi2ExpanderPage0_t)));
1204
1205 if (mem.config_page_sz > ioc->config_page_sz)
1206 _config_free_config_dma_memory(ioc, &mem);
1207
1208 out:
1209 mutex_unlock(&ioc->config_cmds.mutex);
1210 return r;
1211}
1212
1213/**
1214 * mpt2sas_config_get_expander_pg1 - obtain expander page 1
1215 * @ioc: per adapter object
1216 * @mpi_reply: reply mf payload returned from firmware
1217 * @config_page: contents of the config page
1218 * @phy_number: phy number
1219 * @handle: expander handle
1220 * Context: sleep.
1221 *
1222 * Returns 0 for success, non-zero for failure.
1223 */
1224int
1225mpt2sas_config_get_expander_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1226 *mpi_reply, Mpi2ExpanderPage1_t *config_page, u32 phy_number,
1227 u16 handle)
1228{
1229 Mpi2ConfigRequest_t mpi_request;
1230 int r;
1231 struct config_request mem;
1232
1233 mutex_lock(&ioc->config_cmds.mutex);
1234 memset(config_page, 0, sizeof(Mpi2ExpanderPage1_t));
1235 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1236 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1237 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1238 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
1239 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER;
1240 mpi_request.Header.PageNumber = 1;
1241 mpi_request.Header.PageVersion = MPI2_SASEXPANDER1_PAGEVERSION;
1242 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1243 r = _config_request(ioc, &mpi_request, mpi_reply,
1244 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1245 if (r)
1246 goto out;
1247
1248 mpi_request.PageAddress =
1249 cpu_to_le32(MPI2_SAS_EXPAND_PGAD_FORM_HNDL_PHY_NUM |
1250 (phy_number << MPI2_SAS_EXPAND_PGAD_PHYNUM_SHIFT) | handle);
1251 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1252 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
1253 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
1254 mpi_request.Header.PageType = mpi_reply->Header.PageType;
1255 mpi_request.ExtPageLength = mpi_reply->ExtPageLength;
1256 mpi_request.ExtPageType = mpi_reply->ExtPageType;
1257 mem.config_page_sz = le16_to_cpu(mpi_reply->ExtPageLength) * 4;
1258 if (mem.config_page_sz > ioc->config_page_sz) {
1259 r = _config_alloc_config_dma_memory(ioc, &mem);
1260 if (r)
1261 goto out;
1262 } else {
1263 mem.config_page_dma = ioc->config_page_dma;
1264 mem.config_page = ioc->config_page;
1265 }
1266 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1267 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1268 mem.config_page_dma);
1269 r = _config_request(ioc, &mpi_request, mpi_reply,
1270 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1271 if (!r)
1272 memcpy(config_page, mem.config_page,
1273 min_t(u16, mem.config_page_sz,
1274 sizeof(Mpi2ExpanderPage1_t)));
1275
1276 if (mem.config_page_sz > ioc->config_page_sz)
1277 _config_free_config_dma_memory(ioc, &mem);
1278
1279 out:
1280 mutex_unlock(&ioc->config_cmds.mutex);
1281 return r;
1282}
1283
1284/**
1285 * mpt2sas_config_get_enclosure_pg0 - obtain enclosure page 0
1286 * @ioc: per adapter object
1287 * @mpi_reply: reply mf payload returned from firmware
1288 * @config_page: contents of the config page
1289 * @form: GET_NEXT_HANDLE or HANDLE
1290 * @handle: expander handle
1291 * Context: sleep.
1292 *
1293 * Returns 0 for success, non-zero for failure.
1294 */
1295int
1296mpt2sas_config_get_enclosure_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1297 *mpi_reply, Mpi2SasEnclosurePage0_t *config_page, u32 form, u32 handle)
1298{
1299 Mpi2ConfigRequest_t mpi_request;
1300 int r;
1301 struct config_request mem;
1302
1303 mutex_lock(&ioc->config_cmds.mutex);
1304 memset(config_page, 0, sizeof(Mpi2SasEnclosurePage0_t));
1305 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1306 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1307 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1308 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
1309 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE;
1310 mpi_request.Header.PageNumber = 0;
1311 mpi_request.Header.PageVersion = MPI2_SASENCLOSURE0_PAGEVERSION;
1312 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1313 r = _config_request(ioc, &mpi_request, mpi_reply,
1314 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1315 if (r)
1316 goto out;
1317
1318 mpi_request.PageAddress = cpu_to_le32(form | handle);
1319 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1320 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
1321 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
1322 mpi_request.Header.PageType = mpi_reply->Header.PageType;
1323 mpi_request.ExtPageLength = mpi_reply->ExtPageLength;
1324 mpi_request.ExtPageType = mpi_reply->ExtPageType;
1325 mem.config_page_sz = le16_to_cpu(mpi_reply->ExtPageLength) * 4;
1326 if (mem.config_page_sz > ioc->config_page_sz) {
1327 r = _config_alloc_config_dma_memory(ioc, &mem);
1328 if (r)
1329 goto out;
1330 } else {
1331 mem.config_page_dma = ioc->config_page_dma;
1332 mem.config_page = ioc->config_page;
1333 }
1334 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1335 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1336 mem.config_page_dma);
1337 r = _config_request(ioc, &mpi_request, mpi_reply,
1338 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1339 if (!r)
1340 memcpy(config_page, mem.config_page,
1341 min_t(u16, mem.config_page_sz,
1342 sizeof(Mpi2SasEnclosurePage0_t)));
1343
1344 if (mem.config_page_sz > ioc->config_page_sz)
1345 _config_free_config_dma_memory(ioc, &mem);
1346
1347 out:
1348 mutex_unlock(&ioc->config_cmds.mutex);
1349 return r;
1350}
1351
1352/**
1353 * mpt2sas_config_get_phy_pg0 - obtain phy page 0
1354 * @ioc: per adapter object
1355 * @mpi_reply: reply mf payload returned from firmware
1356 * @config_page: contents of the config page
1357 * @phy_number: phy number
1358 * Context: sleep.
1359 *
1360 * Returns 0 for success, non-zero for failure.
1361 */
1362int
1363mpt2sas_config_get_phy_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1364 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number)
1365{
1366 Mpi2ConfigRequest_t mpi_request;
1367 int r;
1368 struct config_request mem;
1369
1370 mutex_lock(&ioc->config_cmds.mutex);
1371 memset(config_page, 0, sizeof(Mpi2SasPhyPage0_t));
1372 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1373 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1374 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1375 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
1376 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_PHY;
1377 mpi_request.Header.PageNumber = 0;
1378 mpi_request.Header.PageVersion = MPI2_SASPHY0_PAGEVERSION;
1379 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1380 r = _config_request(ioc, &mpi_request, mpi_reply,
1381 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1382 if (r)
1383 goto out;
1384
1385 mpi_request.PageAddress =
1386 cpu_to_le32(MPI2_SAS_PHY_PGAD_FORM_PHY_NUMBER | phy_number);
1387 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1388 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
1389 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
1390 mpi_request.Header.PageType = mpi_reply->Header.PageType;
1391 mpi_request.ExtPageLength = mpi_reply->ExtPageLength;
1392 mpi_request.ExtPageType = mpi_reply->ExtPageType;
1393 mem.config_page_sz = le16_to_cpu(mpi_reply->ExtPageLength) * 4;
1394 if (mem.config_page_sz > ioc->config_page_sz) {
1395 r = _config_alloc_config_dma_memory(ioc, &mem);
1396 if (r)
1397 goto out;
1398 } else {
1399 mem.config_page_dma = ioc->config_page_dma;
1400 mem.config_page = ioc->config_page;
1401 }
1402 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1403 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1404 mem.config_page_dma);
1405 r = _config_request(ioc, &mpi_request, mpi_reply,
1406 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1407 if (!r)
1408 memcpy(config_page, mem.config_page,
1409 min_t(u16, mem.config_page_sz,
1410 sizeof(Mpi2SasPhyPage0_t)));
1411
1412 if (mem.config_page_sz > ioc->config_page_sz)
1413 _config_free_config_dma_memory(ioc, &mem);
1414
1415 out:
1416 mutex_unlock(&ioc->config_cmds.mutex);
1417 return r;
1418}
1419
1420/**
1421 * mpt2sas_config_get_phy_pg1 - obtain phy page 1
1422 * @ioc: per adapter object
1423 * @mpi_reply: reply mf payload returned from firmware
1424 * @config_page: contents of the config page
1425 * @phy_number: phy number
1426 * Context: sleep.
1427 *
1428 * Returns 0 for success, non-zero for failure.
1429 */
1430int
1431mpt2sas_config_get_phy_pg1(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1432 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number)
1433{
1434 Mpi2ConfigRequest_t mpi_request;
1435 int r;
1436 struct config_request mem;
1437
1438 mutex_lock(&ioc->config_cmds.mutex);
1439 memset(config_page, 0, sizeof(Mpi2SasPhyPage1_t));
1440 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1441 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1442 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1443 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
1444 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_SAS_PHY;
1445 mpi_request.Header.PageNumber = 1;
1446 mpi_request.Header.PageVersion = MPI2_SASPHY1_PAGEVERSION;
1447 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1448 r = _config_request(ioc, &mpi_request, mpi_reply,
1449 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1450 if (r)
1451 goto out;
1452
1453 mpi_request.PageAddress =
1454 cpu_to_le32(MPI2_SAS_PHY_PGAD_FORM_PHY_NUMBER | phy_number);
1455 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1456 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
1457 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
1458 mpi_request.Header.PageType = mpi_reply->Header.PageType;
1459 mpi_request.ExtPageLength = mpi_reply->ExtPageLength;
1460 mpi_request.ExtPageType = mpi_reply->ExtPageType;
1461 mem.config_page_sz = le16_to_cpu(mpi_reply->ExtPageLength) * 4;
1462 if (mem.config_page_sz > ioc->config_page_sz) {
1463 r = _config_alloc_config_dma_memory(ioc, &mem);
1464 if (r)
1465 goto out;
1466 } else {
1467 mem.config_page_dma = ioc->config_page_dma;
1468 mem.config_page = ioc->config_page;
1469 }
1470 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1471 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1472 mem.config_page_dma);
1473 r = _config_request(ioc, &mpi_request, mpi_reply,
1474 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1475 if (!r)
1476 memcpy(config_page, mem.config_page,
1477 min_t(u16, mem.config_page_sz,
1478 sizeof(Mpi2SasPhyPage1_t)));
1479
1480 if (mem.config_page_sz > ioc->config_page_sz)
1481 _config_free_config_dma_memory(ioc, &mem);
1482
1483 out:
1484 mutex_unlock(&ioc->config_cmds.mutex);
1485 return r;
1486}
1487
1488/**
1489 * mpt2sas_config_get_raid_volume_pg1 - obtain raid volume page 1
1490 * @ioc: per adapter object
1491 * @mpi_reply: reply mf payload returned from firmware
1492 * @config_page: contents of the config page
1493 * @form: GET_NEXT_HANDLE or HANDLE
1494 * @handle: volume handle
1495 * Context: sleep.
1496 *
1497 * Returns 0 for success, non-zero for failure.
1498 */
1499int
1500mpt2sas_config_get_raid_volume_pg1(struct MPT2SAS_ADAPTER *ioc,
1501 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1502 u32 handle)
1503{
1504 Mpi2ConfigRequest_t mpi_request;
1505 int r;
1506 struct config_request mem;
1507
1508 mutex_lock(&ioc->config_cmds.mutex);
1509 memset(config_page, 0, sizeof(Mpi2RaidVolPage1_t));
1510 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1511 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1512 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1513 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_RAID_VOLUME;
1514 mpi_request.Header.PageNumber = 1;
1515 mpi_request.Header.PageVersion = MPI2_RAIDVOLPAGE1_PAGEVERSION;
1516 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1517 r = _config_request(ioc, &mpi_request, mpi_reply,
1518 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1519 if (r)
1520 goto out;
1521
1522 mpi_request.PageAddress = cpu_to_le32(form | handle);
1523 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1524 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
1525 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
1526 mpi_request.Header.PageType = mpi_reply->Header.PageType;
1527 mpi_request.Header.PageLength = mpi_reply->Header.PageLength;
1528 mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4;
1529 if (mem.config_page_sz > ioc->config_page_sz) {
1530 r = _config_alloc_config_dma_memory(ioc, &mem);
1531 if (r)
1532 goto out;
1533 } else {
1534 mem.config_page_dma = ioc->config_page_dma;
1535 mem.config_page = ioc->config_page;
1536 }
1537 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1538 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1539 mem.config_page_dma);
1540 r = _config_request(ioc, &mpi_request, mpi_reply,
1541 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1542 if (!r)
1543 memcpy(config_page, mem.config_page,
1544 min_t(u16, mem.config_page_sz,
1545 sizeof(Mpi2RaidVolPage1_t)));
1546
1547 if (mem.config_page_sz > ioc->config_page_sz)
1548 _config_free_config_dma_memory(ioc, &mem);
1549
1550 out:
1551 mutex_unlock(&ioc->config_cmds.mutex);
1552 return r;
1553}
1554
1555/**
1556 * mpt2sas_config_get_number_pds - obtain number of phys disk assigned to volume
1557 * @ioc: per adapter object
1558 * @handle: volume handle
1559 * @num_pds: returns pds count
1560 * Context: sleep.
1561 *
1562 * Returns 0 for success, non-zero for failure.
1563 */
1564int
1565mpt2sas_config_get_number_pds(struct MPT2SAS_ADAPTER *ioc, u16 handle,
1566 u8 *num_pds)
1567{
1568 Mpi2ConfigRequest_t mpi_request;
1569 Mpi2RaidVolPage0_t *config_page;
1570 Mpi2ConfigReply_t mpi_reply;
1571 int r;
1572 struct config_request mem;
1573 u16 ioc_status;
1574
1575 mutex_lock(&ioc->config_cmds.mutex);
1576 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1577 *num_pds = 0;
1578 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1579 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1580 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_RAID_VOLUME;
1581 mpi_request.Header.PageNumber = 0;
1582 mpi_request.Header.PageVersion = MPI2_RAIDVOLPAGE0_PAGEVERSION;
1583 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1584 r = _config_request(ioc, &mpi_request, &mpi_reply,
1585 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1586 if (r)
1587 goto out;
1588
1589 mpi_request.PageAddress =
1590 cpu_to_le32(MPI2_RAID_VOLUME_PGAD_FORM_HANDLE | handle);
1591 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1592 mpi_request.Header.PageVersion = mpi_reply.Header.PageVersion;
1593 mpi_request.Header.PageNumber = mpi_reply.Header.PageNumber;
1594 mpi_request.Header.PageType = mpi_reply.Header.PageType;
1595 mpi_request.Header.PageLength = mpi_reply.Header.PageLength;
1596 mem.config_page_sz = le16_to_cpu(mpi_reply.Header.PageLength) * 4;
1597 if (mem.config_page_sz > ioc->config_page_sz) {
1598 r = _config_alloc_config_dma_memory(ioc, &mem);
1599 if (r)
1600 goto out;
1601 } else {
1602 mem.config_page_dma = ioc->config_page_dma;
1603 mem.config_page = ioc->config_page;
1604 }
1605 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1606 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1607 mem.config_page_dma);
1608 r = _config_request(ioc, &mpi_request, &mpi_reply,
1609 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1610 if (!r) {
1611 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
1612 MPI2_IOCSTATUS_MASK;
1613 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
1614 config_page = mem.config_page;
1615 *num_pds = config_page->NumPhysDisks;
1616 }
1617 }
1618
1619 if (mem.config_page_sz > ioc->config_page_sz)
1620 _config_free_config_dma_memory(ioc, &mem);
1621
1622 out:
1623 mutex_unlock(&ioc->config_cmds.mutex);
1624 return r;
1625}
1626
1627/**
1628 * mpt2sas_config_get_raid_volume_pg0 - obtain raid volume page 0
1629 * @ioc: per adapter object
1630 * @mpi_reply: reply mf payload returned from firmware
1631 * @config_page: contents of the config page
1632 * @form: GET_NEXT_HANDLE or HANDLE
1633 * @handle: volume handle
1634 * @sz: size of buffer passed in config_page
1635 * Context: sleep.
1636 *
1637 * Returns 0 for success, non-zero for failure.
1638 */
1639int
1640mpt2sas_config_get_raid_volume_pg0(struct MPT2SAS_ADAPTER *ioc,
1641 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1642 u32 handle, u16 sz)
1643{
1644 Mpi2ConfigRequest_t mpi_request;
1645 int r;
1646 struct config_request mem;
1647
1648 mutex_lock(&ioc->config_cmds.mutex);
1649 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1650 memset(config_page, 0, sz);
1651 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1652 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1653 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_RAID_VOLUME;
1654 mpi_request.Header.PageNumber = 0;
1655 mpi_request.Header.PageVersion = MPI2_RAIDVOLPAGE0_PAGEVERSION;
1656 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1657 r = _config_request(ioc, &mpi_request, mpi_reply,
1658 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1659 if (r)
1660 goto out;
1661
1662 mpi_request.PageAddress = cpu_to_le32(form | handle);
1663 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1664 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
1665 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
1666 mpi_request.Header.PageType = mpi_reply->Header.PageType;
1667 mpi_request.Header.PageLength = mpi_reply->Header.PageLength;
1668 mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4;
1669 if (mem.config_page_sz > ioc->config_page_sz) {
1670 r = _config_alloc_config_dma_memory(ioc, &mem);
1671 if (r)
1672 goto out;
1673 } else {
1674 mem.config_page_dma = ioc->config_page_dma;
1675 mem.config_page = ioc->config_page;
1676 }
1677 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1678 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1679 mem.config_page_dma);
1680 r = _config_request(ioc, &mpi_request, mpi_reply,
1681 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1682 if (!r)
1683 memcpy(config_page, mem.config_page,
1684 min_t(u16, sz, mem.config_page_sz));
1685
1686 if (mem.config_page_sz > ioc->config_page_sz)
1687 _config_free_config_dma_memory(ioc, &mem);
1688
1689 out:
1690 mutex_unlock(&ioc->config_cmds.mutex);
1691 return r;
1692}
1693
1694/**
1695 * mpt2sas_config_get_phys_disk_pg0 - obtain phys disk page 0
1696 * @ioc: per adapter object
1697 * @mpi_reply: reply mf payload returned from firmware
1698 * @config_page: contents of the config page
1699 * @form: GET_NEXT_PHYSDISKNUM, PHYSDISKNUM, DEVHANDLE
1700 * @form_specific: specific to the form
1701 * Context: sleep.
1702 *
1703 * Returns 0 for success, non-zero for failure.
1704 */
1705int
1706mpt2sas_config_get_phys_disk_pg0(struct MPT2SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1707 *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, u32 form,
1708 u32 form_specific)
1709{
1710 Mpi2ConfigRequest_t mpi_request;
1711 int r;
1712 struct config_request mem;
1713
1714 mutex_lock(&ioc->config_cmds.mutex);
1715 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1716 memset(config_page, 0, sizeof(Mpi2RaidPhysDiskPage0_t));
1717 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1718 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1719 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK;
1720 mpi_request.Header.PageNumber = 0;
1721 mpi_request.Header.PageVersion = MPI2_RAIDPHYSDISKPAGE0_PAGEVERSION;
1722 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1723 r = _config_request(ioc, &mpi_request, mpi_reply,
1724 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1725 if (r)
1726 goto out;
1727
1728 mpi_request.PageAddress = cpu_to_le32(form | form_specific);
1729 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1730 mpi_request.Header.PageVersion = mpi_reply->Header.PageVersion;
1731 mpi_request.Header.PageNumber = mpi_reply->Header.PageNumber;
1732 mpi_request.Header.PageType = mpi_reply->Header.PageType;
1733 mpi_request.Header.PageLength = mpi_reply->Header.PageLength;
1734 mem.config_page_sz = le16_to_cpu(mpi_reply->Header.PageLength) * 4;
1735 if (mem.config_page_sz > ioc->config_page_sz) {
1736 r = _config_alloc_config_dma_memory(ioc, &mem);
1737 if (r)
1738 goto out;
1739 } else {
1740 mem.config_page_dma = ioc->config_page_dma;
1741 mem.config_page = ioc->config_page;
1742 }
1743 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1744 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1745 mem.config_page_dma);
1746 r = _config_request(ioc, &mpi_request, mpi_reply,
1747 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1748 if (!r)
1749 memcpy(config_page, mem.config_page,
1750 min_t(u16, mem.config_page_sz,
1751 sizeof(Mpi2RaidPhysDiskPage0_t)));
1752
1753 if (mem.config_page_sz > ioc->config_page_sz)
1754 _config_free_config_dma_memory(ioc, &mem);
1755
1756 out:
1757 mutex_unlock(&ioc->config_cmds.mutex);
1758 return r;
1759}
1760
1761/**
1762 * mpt2sas_config_get_volume_handle - returns volume handle for give hidden raid components
1763 * @ioc: per adapter object
1764 * @pd_handle: phys disk handle
1765 * @volume_handle: volume handle
1766 * Context: sleep.
1767 *
1768 * Returns 0 for success, non-zero for failure.
1769 */
1770int
1771mpt2sas_config_get_volume_handle(struct MPT2SAS_ADAPTER *ioc, u16 pd_handle,
1772 u16 *volume_handle)
1773{
1774 Mpi2RaidConfigurationPage0_t *config_page;
1775 Mpi2ConfigRequest_t mpi_request;
1776 Mpi2ConfigReply_t mpi_reply;
1777 int r, i;
1778 struct config_request mem;
1779 u16 ioc_status;
1780
1781 mutex_lock(&ioc->config_cmds.mutex);
1782 *volume_handle = 0;
1783 memset(&mpi_request, 0, sizeof(Mpi2ConfigRequest_t));
1784 mpi_request.Function = MPI2_FUNCTION_CONFIG;
1785 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_HEADER;
1786 mpi_request.Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
1787 mpi_request.ExtPageType = MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG;
1788 mpi_request.Header.PageVersion = MPI2_RAIDCONFIG0_PAGEVERSION;
1789 mpi_request.Header.PageNumber = 0;
1790 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request.PageBufferSGE);
1791 r = _config_request(ioc, &mpi_request, &mpi_reply,
1792 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1793 if (r)
1794 goto out;
1795
1796 mpi_request.PageAddress =
1797 cpu_to_le32(MPI2_RAID_PGAD_FORM_ACTIVE_CONFIG);
1798 mpi_request.Action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT;
1799 mpi_request.Header.PageVersion = mpi_reply.Header.PageVersion;
1800 mpi_request.Header.PageNumber = mpi_reply.Header.PageNumber;
1801 mpi_request.Header.PageType = mpi_reply.Header.PageType;
1802 mpi_request.ExtPageLength = mpi_reply.ExtPageLength;
1803 mpi_request.ExtPageType = mpi_reply.ExtPageType;
1804 mem.config_page_sz = le16_to_cpu(mpi_reply.ExtPageLength) * 4;
1805 if (mem.config_page_sz > ioc->config_page_sz) {
1806 r = _config_alloc_config_dma_memory(ioc, &mem);
1807 if (r)
1808 goto out;
1809 } else {
1810 mem.config_page_dma = ioc->config_page_dma;
1811 mem.config_page = ioc->config_page;
1812 }
1813 ioc->base_add_sg_single(&mpi_request.PageBufferSGE,
1814 MPT2_CONFIG_COMMON_SGLFLAGS | mem.config_page_sz,
1815 mem.config_page_dma);
1816 r = _config_request(ioc, &mpi_request, &mpi_reply,
1817 MPT2_CONFIG_PAGE_DEFAULT_TIMEOUT);
1818 if (r)
1819 goto out;
1820
1821 r = -1;
1822 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
1823 if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
1824 goto done;
1825 config_page = mem.config_page;
1826 for (i = 0; i < config_page->NumElements; i++) {
1827 if ((config_page->ConfigElement[i].ElementFlags &
1828 MPI2_RAIDCONFIG0_EFLAGS_MASK_ELEMENT_TYPE) !=
1829 MPI2_RAIDCONFIG0_EFLAGS_VOL_PHYS_DISK_ELEMENT)
1830 continue;
1831 if (config_page->ConfigElement[i].PhysDiskDevHandle ==
1832 pd_handle) {
1833 *volume_handle = le16_to_cpu(config_page->
1834 ConfigElement[i].VolDevHandle);
1835 r = 0;
1836 goto done;
1837 }
1838 }
1839
1840 done:
1841 if (mem.config_page_sz > ioc->config_page_sz)
1842 _config_free_config_dma_memory(ioc, &mem);
1843
1844 out:
1845 mutex_unlock(&ioc->config_cmds.mutex);
1846 return r;
1847}
1848
1849/**
1850 * mpt2sas_config_get_volume_wwid - returns wwid given the volume handle
1851 * @ioc: per adapter object
1852 * @volume_handle: volume handle
1853 * @wwid: volume wwid
1854 * Context: sleep.
1855 *
1856 * Returns 0 for success, non-zero for failure.
1857 */
1858int
1859mpt2sas_config_get_volume_wwid(struct MPT2SAS_ADAPTER *ioc, u16 volume_handle,
1860 u64 *wwid)
1861{
1862 Mpi2ConfigReply_t mpi_reply;
1863 Mpi2RaidVolPage1_t raid_vol_pg1;
1864
1865 *wwid = 0;
1866 if (!(mpt2sas_config_get_raid_volume_pg1(ioc, &mpi_reply,
1867 &raid_vol_pg1, MPI2_RAID_VOLUME_PGAD_FORM_HANDLE,
1868 volume_handle))) {
1869 *wwid = le64_to_cpu(raid_vol_pg1.WWID);
1870 return 0;
1871 } else
1872 return -1;
1873}
diff --git a/drivers/scsi/mpt2sas/mpt2sas_ctl.c b/drivers/scsi/mpt2sas/mpt2sas_ctl.c
new file mode 100644
index 000000000000..2d4f85c9d7a1
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpt2sas_ctl.c
@@ -0,0 +1,2516 @@
1/*
2 * Management Module Support for MPT (Message Passing Technology) based
3 * controllers
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_ctl.c
6 * Copyright (C) 2007-2008 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45#include <linux/version.h>
46#include <linux/kernel.h>
47#include <linux/module.h>
48#include <linux/errno.h>
49#include <linux/init.h>
50#include <linux/slab.h>
51#include <linux/types.h>
52#include <linux/pci.h>
53#include <linux/delay.h>
54#include <linux/smp_lock.h>
55#include <linux/compat.h>
56#include <linux/poll.h>
57
58#include <linux/io.h>
59#include <linux/uaccess.h>
60
61#include "mpt2sas_base.h"
62#include "mpt2sas_ctl.h"
63
64static struct fasync_struct *async_queue;
65static DECLARE_WAIT_QUEUE_HEAD(ctl_poll_wait);
66
67/**
68 * enum block_state - blocking state
69 * @NON_BLOCKING: non blocking
70 * @BLOCKING: blocking
71 *
72 * These states are for ioctls that need to wait for a response
73 * from firmware, so they probably require sleep.
74 */
75enum block_state {
76 NON_BLOCKING,
77 BLOCKING,
78};
79
80#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
81/**
82 * _ctl_display_some_debug - debug routine
83 * @ioc: per adapter object
84 * @smid: system request message index
85 * @calling_function_name: string pass from calling function
86 * @mpi_reply: reply message frame
87 * Context: none.
88 *
89 * Function for displaying debug info helpfull when debugging issues
90 * in this module.
91 */
92static void
93_ctl_display_some_debug(struct MPT2SAS_ADAPTER *ioc, u16 smid,
94 char *calling_function_name, MPI2DefaultReply_t *mpi_reply)
95{
96 Mpi2ConfigRequest_t *mpi_request;
97 char *desc = NULL;
98
99 if (!(ioc->logging_level & MPT_DEBUG_IOCTL))
100 return;
101
102 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
103 switch (mpi_request->Function) {
104 case MPI2_FUNCTION_SCSI_IO_REQUEST:
105 {
106 Mpi2SCSIIORequest_t *scsi_request =
107 (Mpi2SCSIIORequest_t *)mpi_request;
108
109 snprintf(ioc->tmp_string, MPT_STRING_LENGTH,
110 "scsi_io, cmd(0x%02x), cdb_len(%d)",
111 scsi_request->CDB.CDB32[0],
112 le16_to_cpu(scsi_request->IoFlags) & 0xF);
113 desc = ioc->tmp_string;
114 break;
115 }
116 case MPI2_FUNCTION_SCSI_TASK_MGMT:
117 desc = "task_mgmt";
118 break;
119 case MPI2_FUNCTION_IOC_INIT:
120 desc = "ioc_init";
121 break;
122 case MPI2_FUNCTION_IOC_FACTS:
123 desc = "ioc_facts";
124 break;
125 case MPI2_FUNCTION_CONFIG:
126 {
127 Mpi2ConfigRequest_t *config_request =
128 (Mpi2ConfigRequest_t *)mpi_request;
129
130 snprintf(ioc->tmp_string, MPT_STRING_LENGTH,
131 "config, type(0x%02x), ext_type(0x%02x), number(%d)",
132 (config_request->Header.PageType &
133 MPI2_CONFIG_PAGETYPE_MASK), config_request->ExtPageType,
134 config_request->Header.PageNumber);
135 desc = ioc->tmp_string;
136 break;
137 }
138 case MPI2_FUNCTION_PORT_FACTS:
139 desc = "port_facts";
140 break;
141 case MPI2_FUNCTION_PORT_ENABLE:
142 desc = "port_enable";
143 break;
144 case MPI2_FUNCTION_EVENT_NOTIFICATION:
145 desc = "event_notification";
146 break;
147 case MPI2_FUNCTION_FW_DOWNLOAD:
148 desc = "fw_download";
149 break;
150 case MPI2_FUNCTION_FW_UPLOAD:
151 desc = "fw_upload";
152 break;
153 case MPI2_FUNCTION_RAID_ACTION:
154 desc = "raid_action";
155 break;
156 case MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH:
157 {
158 Mpi2SCSIIORequest_t *scsi_request =
159 (Mpi2SCSIIORequest_t *)mpi_request;
160
161 snprintf(ioc->tmp_string, MPT_STRING_LENGTH,
162 "raid_pass, cmd(0x%02x), cdb_len(%d)",
163 scsi_request->CDB.CDB32[0],
164 le16_to_cpu(scsi_request->IoFlags) & 0xF);
165 desc = ioc->tmp_string;
166 break;
167 }
168 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
169 desc = "sas_iounit_cntl";
170 break;
171 case MPI2_FUNCTION_SATA_PASSTHROUGH:
172 desc = "sata_pass";
173 break;
174 case MPI2_FUNCTION_DIAG_BUFFER_POST:
175 desc = "diag_buffer_post";
176 break;
177 case MPI2_FUNCTION_DIAG_RELEASE:
178 desc = "diag_release";
179 break;
180 case MPI2_FUNCTION_SMP_PASSTHROUGH:
181 desc = "smp_passthrough";
182 break;
183 }
184
185 if (!desc)
186 return;
187
188 printk(MPT2SAS_DEBUG_FMT "%s: %s, smid(%d)\n",
189 ioc->name, calling_function_name, desc, smid);
190
191 if (!mpi_reply)
192 return;
193
194 if (mpi_reply->IOCStatus || mpi_reply->IOCLogInfo)
195 printk(MPT2SAS_DEBUG_FMT
196 "\tiocstatus(0x%04x), loginfo(0x%08x)\n",
197 ioc->name, le16_to_cpu(mpi_reply->IOCStatus),
198 le32_to_cpu(mpi_reply->IOCLogInfo));
199
200 if (mpi_request->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
201 mpi_request->Function ==
202 MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH) {
203 Mpi2SCSIIOReply_t *scsi_reply =
204 (Mpi2SCSIIOReply_t *)mpi_reply;
205 if (scsi_reply->SCSIState || scsi_reply->SCSIStatus)
206 printk(MPT2SAS_DEBUG_FMT
207 "\tscsi_state(0x%02x), scsi_status"
208 "(0x%02x)\n", ioc->name,
209 scsi_reply->SCSIState,
210 scsi_reply->SCSIStatus);
211 }
212}
213#endif
214
215/**
216 * mpt2sas_ctl_done - ctl module completion routine
217 * @ioc: per adapter object
218 * @smid: system request message index
219 * @VF_ID: virtual function id
220 * @reply: reply message frame(lower 32bit addr)
221 * Context: none.
222 *
223 * The callback handler when using ioc->ctl_cb_idx.
224 *
225 * Return nothing.
226 */
227void
228mpt2sas_ctl_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
229{
230 MPI2DefaultReply_t *mpi_reply;
231
232 if (ioc->ctl_cmds.status == MPT2_CMD_NOT_USED)
233 return;
234 if (ioc->ctl_cmds.smid != smid)
235 return;
236 ioc->ctl_cmds.status |= MPT2_CMD_COMPLETE;
237 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
238 if (mpi_reply) {
239 memcpy(ioc->ctl_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
240 ioc->ctl_cmds.status |= MPT2_CMD_REPLY_VALID;
241 }
242#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
243 _ctl_display_some_debug(ioc, smid, "ctl_done", mpi_reply);
244#endif
245 ioc->ctl_cmds.status &= ~MPT2_CMD_PENDING;
246 complete(&ioc->ctl_cmds.done);
247}
248
249/**
250 * _ctl_check_event_type - determines when an event needs logging
251 * @ioc: per adapter object
252 * @event: firmware event
253 *
254 * The bitmask in ioc->event_type[] indicates which events should be
255 * be saved in the driver event_log. This bitmask is set by application.
256 *
257 * Returns 1 when event should be captured, or zero means no match.
258 */
259static int
260_ctl_check_event_type(struct MPT2SAS_ADAPTER *ioc, u16 event)
261{
262 u16 i;
263 u32 desired_event;
264
265 if (event >= 128 || !event || !ioc->event_log)
266 return 0;
267
268 desired_event = (1 << (event % 32));
269 if (!desired_event)
270 desired_event = 1;
271 i = event / 32;
272 return desired_event & ioc->event_type[i];
273}
274
275/**
276 * mpt2sas_ctl_add_to_event_log - add event
277 * @ioc: per adapter object
278 * @mpi_reply: reply message frame
279 *
280 * Return nothing.
281 */
282void
283mpt2sas_ctl_add_to_event_log(struct MPT2SAS_ADAPTER *ioc,
284 Mpi2EventNotificationReply_t *mpi_reply)
285{
286 struct MPT2_IOCTL_EVENTS *event_log;
287 u16 event;
288 int i;
289 u32 sz, event_data_sz;
290 u8 send_aen = 0;
291
292 if (!ioc->event_log)
293 return;
294
295 event = le16_to_cpu(mpi_reply->Event);
296
297 if (_ctl_check_event_type(ioc, event)) {
298
299 /* insert entry into circular event_log */
300 i = ioc->event_context % MPT2SAS_CTL_EVENT_LOG_SIZE;
301 event_log = ioc->event_log;
302 event_log[i].event = event;
303 event_log[i].context = ioc->event_context++;
304
305 event_data_sz = le16_to_cpu(mpi_reply->EventDataLength)*4;
306 sz = min_t(u32, event_data_sz, MPT2_EVENT_DATA_SIZE);
307 memset(event_log[i].data, 0, MPT2_EVENT_DATA_SIZE);
308 memcpy(event_log[i].data, mpi_reply->EventData, sz);
309 send_aen = 1;
310 }
311
312 /* This aen_event_read_flag flag is set until the
313 * application has read the event log.
314 * For MPI2_EVENT_LOG_ENTRY_ADDED, we always notify.
315 */
316 if (event == MPI2_EVENT_LOG_ENTRY_ADDED ||
317 (send_aen && !ioc->aen_event_read_flag)) {
318 ioc->aen_event_read_flag = 1;
319 wake_up_interruptible(&ctl_poll_wait);
320 if (async_queue)
321 kill_fasync(&async_queue, SIGIO, POLL_IN);
322 }
323}
324
325/**
326 * mpt2sas_ctl_event_callback - firmware event handler (called at ISR time)
327 * @ioc: per adapter object
328 * @VF_ID: virtual function id
329 * @reply: reply message frame(lower 32bit addr)
330 * Context: interrupt.
331 *
332 * This function merely adds a new work task into ioc->firmware_event_thread.
333 * The tasks are worked from _firmware_event_work in user context.
334 *
335 * Return nothing.
336 */
337void
338mpt2sas_ctl_event_callback(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply)
339{
340 Mpi2EventNotificationReply_t *mpi_reply;
341
342 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
343 mpt2sas_ctl_add_to_event_log(ioc, mpi_reply);
344}
345
346/**
347 * _ctl_verify_adapter - validates ioc_number passed from application
348 * @ioc: per adapter object
349 * @iocpp: The ioc pointer is returned in this.
350 *
351 * Return (-1) means error, else ioc_number.
352 */
353static int
354_ctl_verify_adapter(int ioc_number, struct MPT2SAS_ADAPTER **iocpp)
355{
356 struct MPT2SAS_ADAPTER *ioc;
357
358 list_for_each_entry(ioc, &mpt2sas_ioc_list, list) {
359 if (ioc->id != ioc_number)
360 continue;
361 *iocpp = ioc;
362 return ioc_number;
363 }
364 *iocpp = NULL;
365 return -1;
366}
367
368/**
369 * mpt2sas_ctl_reset_handler - reset callback handler (for ctl)
370 * @ioc: per adapter object
371 * @reset_phase: phase
372 *
373 * The handler for doing any required cleanup or initialization.
374 *
375 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
376 * MPT2_IOC_DONE_RESET
377 */
378void
379mpt2sas_ctl_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
380{
381 switch (reset_phase) {
382 case MPT2_IOC_PRE_RESET:
383 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
384 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
385 break;
386 case MPT2_IOC_AFTER_RESET:
387 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
388 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
389 if (ioc->ctl_cmds.status & MPT2_CMD_PENDING) {
390 ioc->ctl_cmds.status |= MPT2_CMD_RESET;
391 mpt2sas_base_free_smid(ioc, ioc->ctl_cmds.smid);
392 complete(&ioc->ctl_cmds.done);
393 }
394 break;
395 case MPT2_IOC_DONE_RESET:
396 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
397 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
398 break;
399 }
400}
401
402/**
403 * _ctl_fasync -
404 * @fd -
405 * @filep -
406 * @mode -
407 *
408 * Called when application request fasyn callback handler.
409 */
410static int
411_ctl_fasync(int fd, struct file *filep, int mode)
412{
413 return fasync_helper(fd, filep, mode, &async_queue);
414}
415
416/**
417 * _ctl_release -
418 * @inode -
419 * @filep -
420 *
421 * Called when application releases the fasyn callback handler.
422 */
423static int
424_ctl_release(struct inode *inode, struct file *filep)
425{
426 return fasync_helper(-1, filep, 0, &async_queue);
427}
428
429/**
430 * _ctl_poll -
431 * @file -
432 * @wait -
433 *
434 */
435static unsigned int
436_ctl_poll(struct file *filep, poll_table *wait)
437{
438 struct MPT2SAS_ADAPTER *ioc;
439
440 poll_wait(filep, &ctl_poll_wait, wait);
441
442 list_for_each_entry(ioc, &mpt2sas_ioc_list, list) {
443 if (ioc->aen_event_read_flag)
444 return POLLIN | POLLRDNORM;
445 }
446 return 0;
447}
448
449/**
450 * _ctl_do_task_abort - assign an active smid to the abort_task
451 * @ioc: per adapter object
452 * @karg - (struct mpt2_ioctl_command)
453 * @tm_request - pointer to mf from user space
454 *
455 * Returns 0 when an smid if found, else fail.
456 * during failure, the reply frame is filled.
457 */
458static int
459_ctl_do_task_abort(struct MPT2SAS_ADAPTER *ioc, struct mpt2_ioctl_command *karg,
460 Mpi2SCSITaskManagementRequest_t *tm_request)
461{
462 u8 found = 0;
463 u16 i;
464 u16 handle;
465 struct scsi_cmnd *scmd;
466 struct MPT2SAS_DEVICE *priv_data;
467 unsigned long flags;
468 Mpi2SCSITaskManagementReply_t *tm_reply;
469 u32 sz;
470 u32 lun;
471
472 lun = scsilun_to_int((struct scsi_lun *)tm_request->LUN);
473
474 handle = le16_to_cpu(tm_request->DevHandle);
475 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
476 for (i = ioc->request_depth; i && !found; i--) {
477 scmd = ioc->scsi_lookup[i - 1].scmd;
478 if (scmd == NULL || scmd->device == NULL ||
479 scmd->device->hostdata == NULL)
480 continue;
481 if (lun != scmd->device->lun)
482 continue;
483 priv_data = scmd->device->hostdata;
484 if (priv_data->sas_target == NULL)
485 continue;
486 if (priv_data->sas_target->handle != handle)
487 continue;
488 tm_request->TaskMID = cpu_to_le16(ioc->scsi_lookup[i - 1].smid);
489 found = 1;
490 }
491 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
492
493 if (!found) {
494 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "ABORT_TASK: "
495 "DevHandle(0x%04x), lun(%d), no active mid!!\n", ioc->name,
496 tm_request->DevHandle, lun));
497 tm_reply = ioc->ctl_cmds.reply;
498 tm_reply->DevHandle = tm_request->DevHandle;
499 tm_reply->Function = MPI2_FUNCTION_SCSI_TASK_MGMT;
500 tm_reply->TaskType = MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK;
501 tm_reply->MsgLength = sizeof(Mpi2SCSITaskManagementReply_t)/4;
502 tm_reply->VP_ID = tm_request->VP_ID;
503 tm_reply->VF_ID = tm_request->VF_ID;
504 sz = min_t(u32, karg->max_reply_bytes, ioc->reply_sz);
505 if (copy_to_user(karg->reply_frame_buf_ptr, ioc->ctl_cmds.reply,
506 sz))
507 printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__,
508 __LINE__, __func__);
509 return 1;
510 }
511
512 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "ABORT_TASK: "
513 "DevHandle(0x%04x), lun(%d), smid(%d)\n", ioc->name,
514 tm_request->DevHandle, lun, tm_request->TaskMID));
515 return 0;
516}
517
518/**
519 * _ctl_do_mpt_command - main handler for MPT2COMMAND opcode
520 * @ioc: per adapter object
521 * @karg - (struct mpt2_ioctl_command)
522 * @mf - pointer to mf in user space
523 * @state - NON_BLOCKING or BLOCKING
524 */
525static long
526_ctl_do_mpt_command(struct MPT2SAS_ADAPTER *ioc,
527 struct mpt2_ioctl_command karg, void __user *mf, enum block_state state)
528{
529 MPI2RequestHeader_t *mpi_request;
530 MPI2DefaultReply_t *mpi_reply;
531 u32 ioc_state;
532 u16 ioc_status;
533 u16 smid;
534 unsigned long timeout, timeleft;
535 u8 issue_reset;
536 u32 sz;
537 void *psge;
538 void *priv_sense = NULL;
539 void *data_out = NULL;
540 dma_addr_t data_out_dma;
541 size_t data_out_sz = 0;
542 void *data_in = NULL;
543 dma_addr_t data_in_dma;
544 size_t data_in_sz = 0;
545 u32 sgl_flags;
546 long ret;
547 u16 wait_state_count;
548
549 issue_reset = 0;
550
551 if (state == NON_BLOCKING && !mutex_trylock(&ioc->ctl_cmds.mutex))
552 return -EAGAIN;
553 else if (mutex_lock_interruptible(&ioc->ctl_cmds.mutex))
554 return -ERESTARTSYS;
555
556 if (ioc->ctl_cmds.status != MPT2_CMD_NOT_USED) {
557 printk(MPT2SAS_ERR_FMT "%s: ctl_cmd in use\n",
558 ioc->name, __func__);
559 ret = -EAGAIN;
560 goto out;
561 }
562
563 wait_state_count = 0;
564 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
565 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
566 if (wait_state_count++ == 10) {
567 printk(MPT2SAS_ERR_FMT
568 "%s: failed due to ioc not operational\n",
569 ioc->name, __func__);
570 ret = -EFAULT;
571 goto out;
572 }
573 ssleep(1);
574 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
575 printk(MPT2SAS_INFO_FMT "%s: waiting for "
576 "operational state(count=%d)\n", ioc->name,
577 __func__, wait_state_count);
578 }
579 if (wait_state_count)
580 printk(MPT2SAS_INFO_FMT "%s: ioc is operational\n",
581 ioc->name, __func__);
582
583 smid = mpt2sas_base_get_smid(ioc, ioc->ctl_cb_idx);
584 if (!smid) {
585 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
586 ioc->name, __func__);
587 ret = -EAGAIN;
588 goto out;
589 }
590
591 ret = 0;
592 ioc->ctl_cmds.status = MPT2_CMD_PENDING;
593 memset(ioc->ctl_cmds.reply, 0, ioc->reply_sz);
594 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
595 ioc->ctl_cmds.smid = smid;
596 data_out_sz = karg.data_out_size;
597 data_in_sz = karg.data_in_size;
598
599 /* copy in request message frame from user */
600 if (copy_from_user(mpi_request, mf, karg.data_sge_offset*4)) {
601 printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__, __LINE__,
602 __func__);
603 ret = -EFAULT;
604 mpt2sas_base_free_smid(ioc, smid);
605 goto out;
606 }
607
608 if (mpi_request->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
609 mpi_request->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH) {
610 if (!mpi_request->FunctionDependent1 ||
611 mpi_request->FunctionDependent1 >
612 cpu_to_le16(ioc->facts.MaxDevHandle)) {
613 ret = -EINVAL;
614 mpt2sas_base_free_smid(ioc, smid);
615 goto out;
616 }
617 }
618
619 /* obtain dma-able memory for data transfer */
620 if (data_out_sz) /* WRITE */ {
621 data_out = pci_alloc_consistent(ioc->pdev, data_out_sz,
622 &data_out_dma);
623 if (!data_out) {
624 printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__,
625 __LINE__, __func__);
626 ret = -ENOMEM;
627 mpt2sas_base_free_smid(ioc, smid);
628 goto out;
629 }
630 if (copy_from_user(data_out, karg.data_out_buf_ptr,
631 data_out_sz)) {
632 printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__,
633 __LINE__, __func__);
634 ret = -EFAULT;
635 mpt2sas_base_free_smid(ioc, smid);
636 goto out;
637 }
638 }
639
640 if (data_in_sz) /* READ */ {
641 data_in = pci_alloc_consistent(ioc->pdev, data_in_sz,
642 &data_in_dma);
643 if (!data_in) {
644 printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__,
645 __LINE__, __func__);
646 ret = -ENOMEM;
647 mpt2sas_base_free_smid(ioc, smid);
648 goto out;
649 }
650 }
651
652 /* add scatter gather elements */
653 psge = (void *)mpi_request + (karg.data_sge_offset*4);
654
655 if (!data_out_sz && !data_in_sz) {
656 mpt2sas_base_build_zero_len_sge(ioc, psge);
657 } else if (data_out_sz && data_in_sz) {
658 /* WRITE sgel first */
659 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
660 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC);
661 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
662 ioc->base_add_sg_single(psge, sgl_flags |
663 data_out_sz, data_out_dma);
664
665 /* incr sgel */
666 psge += ioc->sge_size;
667
668 /* READ sgel last */
669 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
670 MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
671 MPI2_SGE_FLAGS_END_OF_LIST);
672 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
673 ioc->base_add_sg_single(psge, sgl_flags |
674 data_in_sz, data_in_dma);
675 } else if (data_out_sz) /* WRITE */ {
676 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
677 MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
678 MPI2_SGE_FLAGS_END_OF_LIST | MPI2_SGE_FLAGS_HOST_TO_IOC);
679 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
680 ioc->base_add_sg_single(psge, sgl_flags |
681 data_out_sz, data_out_dma);
682 } else if (data_in_sz) /* READ */ {
683 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
684 MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
685 MPI2_SGE_FLAGS_END_OF_LIST);
686 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
687 ioc->base_add_sg_single(psge, sgl_flags |
688 data_in_sz, data_in_dma);
689 }
690
691 /* send command to firmware */
692#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
693 _ctl_display_some_debug(ioc, smid, "ctl_request", NULL);
694#endif
695
696 switch (mpi_request->Function) {
697 case MPI2_FUNCTION_SCSI_IO_REQUEST:
698 case MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH:
699 {
700 Mpi2SCSIIORequest_t *scsiio_request =
701 (Mpi2SCSIIORequest_t *)mpi_request;
702 scsiio_request->SenseBufferLowAddress =
703 (u32)mpt2sas_base_get_sense_buffer_dma(ioc, smid);
704 priv_sense = mpt2sas_base_get_sense_buffer(ioc, smid);
705 memset(priv_sense, 0, SCSI_SENSE_BUFFERSIZE);
706 mpt2sas_base_put_smid_scsi_io(ioc, smid, 0,
707 le16_to_cpu(mpi_request->FunctionDependent1));
708 break;
709 }
710 case MPI2_FUNCTION_SCSI_TASK_MGMT:
711 {
712 Mpi2SCSITaskManagementRequest_t *tm_request =
713 (Mpi2SCSITaskManagementRequest_t *)mpi_request;
714
715 if (tm_request->TaskType ==
716 MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK) {
717 if (_ctl_do_task_abort(ioc, &karg, tm_request))
718 goto out;
719 }
720
721 mutex_lock(&ioc->tm_cmds.mutex);
722 mpt2sas_scsih_set_tm_flag(ioc, le16_to_cpu(
723 tm_request->DevHandle));
724 mpt2sas_base_put_smid_hi_priority(ioc, smid,
725 mpi_request->VF_ID);
726 break;
727 }
728 case MPI2_FUNCTION_SMP_PASSTHROUGH:
729 {
730 Mpi2SmpPassthroughRequest_t *smp_request =
731 (Mpi2SmpPassthroughRequest_t *)mpi_request;
732 u8 *data;
733
734 /* ioc determines which port to use */
735 smp_request->PhysicalPort = 0xFF;
736 if (smp_request->PassthroughFlags &
737 MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE)
738 data = (u8 *)&smp_request->SGL;
739 else
740 data = data_out;
741
742 if (data[1] == 0x91 && (data[10] == 1 || data[10] == 2)) {
743 ioc->ioc_link_reset_in_progress = 1;
744 ioc->ignore_loginfos = 1;
745 }
746 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
747 break;
748 }
749 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
750 {
751 Mpi2SasIoUnitControlRequest_t *sasiounit_request =
752 (Mpi2SasIoUnitControlRequest_t *)mpi_request;
753
754 if (sasiounit_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET
755 || sasiounit_request->Operation ==
756 MPI2_SAS_OP_PHY_LINK_RESET) {
757 ioc->ioc_link_reset_in_progress = 1;
758 ioc->ignore_loginfos = 1;
759 }
760 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
761 break;
762 }
763 default:
764 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
765 break;
766 }
767
768 if (karg.timeout < MPT2_IOCTL_DEFAULT_TIMEOUT)
769 timeout = MPT2_IOCTL_DEFAULT_TIMEOUT;
770 else
771 timeout = karg.timeout;
772 timeleft = wait_for_completion_timeout(&ioc->ctl_cmds.done,
773 timeout*HZ);
774 if (mpi_request->Function == MPI2_FUNCTION_SCSI_TASK_MGMT) {
775 Mpi2SCSITaskManagementRequest_t *tm_request =
776 (Mpi2SCSITaskManagementRequest_t *)mpi_request;
777 mutex_unlock(&ioc->tm_cmds.mutex);
778 mpt2sas_scsih_clear_tm_flag(ioc, le16_to_cpu(
779 tm_request->DevHandle));
780 } else if ((mpi_request->Function == MPI2_FUNCTION_SMP_PASSTHROUGH ||
781 mpi_request->Function == MPI2_FUNCTION_SAS_IO_UNIT_CONTROL) &&
782 ioc->ioc_link_reset_in_progress) {
783 ioc->ioc_link_reset_in_progress = 0;
784 ioc->ignore_loginfos = 0;
785 }
786 if (!(ioc->ctl_cmds.status & MPT2_CMD_COMPLETE)) {
787 printk(MPT2SAS_ERR_FMT "%s: timeout\n", ioc->name,
788 __func__);
789 _debug_dump_mf(mpi_request, karg.data_sge_offset);
790 if (!(ioc->ctl_cmds.status & MPT2_CMD_RESET))
791 issue_reset = 1;
792 goto issue_host_reset;
793 }
794
795 mpi_reply = ioc->ctl_cmds.reply;
796 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
797
798#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
799 if (mpi_reply->Function == MPI2_FUNCTION_SCSI_TASK_MGMT &&
800 (ioc->logging_level & MPT_DEBUG_TM)) {
801 Mpi2SCSITaskManagementReply_t *tm_reply =
802 (Mpi2SCSITaskManagementReply_t *)mpi_reply;
803
804 printk(MPT2SAS_DEBUG_FMT "TASK_MGMT: "
805 "IOCStatus(0x%04x), IOCLogInfo(0x%08x), "
806 "TerminationCount(0x%08x)\n", ioc->name,
807 tm_reply->IOCStatus, tm_reply->IOCLogInfo,
808 tm_reply->TerminationCount);
809 }
810#endif
811 /* copy out xdata to user */
812 if (data_in_sz) {
813 if (copy_to_user(karg.data_in_buf_ptr, data_in,
814 data_in_sz)) {
815 printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__,
816 __LINE__, __func__);
817 ret = -ENODATA;
818 goto out;
819 }
820 }
821
822 /* copy out reply message frame to user */
823 if (karg.max_reply_bytes) {
824 sz = min_t(u32, karg.max_reply_bytes, ioc->reply_sz);
825 if (copy_to_user(karg.reply_frame_buf_ptr, ioc->ctl_cmds.reply,
826 sz)) {
827 printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__,
828 __LINE__, __func__);
829 ret = -ENODATA;
830 goto out;
831 }
832 }
833
834 /* copy out sense to user */
835 if (karg.max_sense_bytes && (mpi_request->Function ==
836 MPI2_FUNCTION_SCSI_IO_REQUEST || mpi_request->Function ==
837 MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH)) {
838 sz = min_t(u32, karg.max_sense_bytes, SCSI_SENSE_BUFFERSIZE);
839 if (copy_to_user(karg.sense_data_ptr, priv_sense, sz)) {
840 printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__,
841 __LINE__, __func__);
842 ret = -ENODATA;
843 goto out;
844 }
845 }
846
847 issue_host_reset:
848 if (issue_reset) {
849 if ((mpi_request->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
850 mpi_request->Function ==
851 MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH)) {
852 printk(MPT2SAS_INFO_FMT "issue target reset: handle "
853 "= (0x%04x)\n", ioc->name,
854 mpi_request->FunctionDependent1);
855 mutex_lock(&ioc->tm_cmds.mutex);
856 mpt2sas_scsih_issue_tm(ioc,
857 mpi_request->FunctionDependent1, 0,
858 MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET, 0, 10);
859 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
860 mutex_unlock(&ioc->tm_cmds.mutex);
861 } else
862 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
863 FORCE_BIG_HAMMER);
864 }
865
866 out:
867
868 /* free memory associated with sg buffers */
869 if (data_in)
870 pci_free_consistent(ioc->pdev, data_in_sz, data_in,
871 data_in_dma);
872
873 if (data_out)
874 pci_free_consistent(ioc->pdev, data_out_sz, data_out,
875 data_out_dma);
876
877 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
878 mutex_unlock(&ioc->ctl_cmds.mutex);
879 return ret;
880}
881
882/**
883 * _ctl_getiocinfo - main handler for MPT2IOCINFO opcode
884 * @arg - user space buffer containing ioctl content
885 */
886static long
887_ctl_getiocinfo(void __user *arg)
888{
889 struct mpt2_ioctl_iocinfo karg;
890 struct MPT2SAS_ADAPTER *ioc;
891 u8 revision;
892
893 if (copy_from_user(&karg, arg, sizeof(karg))) {
894 printk(KERN_ERR "failure at %s:%d/%s()!\n",
895 __FILE__, __LINE__, __func__);
896 return -EFAULT;
897 }
898 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
899 return -ENODEV;
900
901 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
902 __func__));
903
904 memset(&karg, 0 , sizeof(karg));
905 karg.adapter_type = MPT2_IOCTL_INTERFACE_SAS2;
906 if (ioc->pfacts)
907 karg.port_number = ioc->pfacts[0].PortNumber;
908 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
909 karg.hw_rev = revision;
910 karg.pci_id = ioc->pdev->device;
911 karg.subsystem_device = ioc->pdev->subsystem_device;
912 karg.subsystem_vendor = ioc->pdev->subsystem_vendor;
913 karg.pci_information.u.bits.bus = ioc->pdev->bus->number;
914 karg.pci_information.u.bits.device = PCI_SLOT(ioc->pdev->devfn);
915 karg.pci_information.u.bits.function = PCI_FUNC(ioc->pdev->devfn);
916 karg.pci_information.segment_id = pci_domain_nr(ioc->pdev->bus);
917 karg.firmware_version = ioc->facts.FWVersion.Word;
918 strncpy(karg.driver_version, MPT2SAS_DRIVER_VERSION,
919 MPT2_IOCTL_VERSION_LENGTH);
920 karg.driver_version[MPT2_IOCTL_VERSION_LENGTH - 1] = '\0';
921 karg.bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
922
923 if (copy_to_user(arg, &karg, sizeof(karg))) {
924 printk(KERN_ERR "failure at %s:%d/%s()!\n",
925 __FILE__, __LINE__, __func__);
926 return -EFAULT;
927 }
928 return 0;
929}
930
931/**
932 * _ctl_eventquery - main handler for MPT2EVENTQUERY opcode
933 * @arg - user space buffer containing ioctl content
934 */
935static long
936_ctl_eventquery(void __user *arg)
937{
938 struct mpt2_ioctl_eventquery karg;
939 struct MPT2SAS_ADAPTER *ioc;
940
941 if (copy_from_user(&karg, arg, sizeof(karg))) {
942 printk(KERN_ERR "failure at %s:%d/%s()!\n",
943 __FILE__, __LINE__, __func__);
944 return -EFAULT;
945 }
946 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
947 return -ENODEV;
948
949 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
950 __func__));
951
952 karg.event_entries = MPT2SAS_CTL_EVENT_LOG_SIZE;
953 memcpy(karg.event_types, ioc->event_type,
954 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS * sizeof(u32));
955
956 if (copy_to_user(arg, &karg, sizeof(karg))) {
957 printk(KERN_ERR "failure at %s:%d/%s()!\n",
958 __FILE__, __LINE__, __func__);
959 return -EFAULT;
960 }
961 return 0;
962}
963
964/**
965 * _ctl_eventenable - main handler for MPT2EVENTENABLE opcode
966 * @arg - user space buffer containing ioctl content
967 */
968static long
969_ctl_eventenable(void __user *arg)
970{
971 struct mpt2_ioctl_eventenable karg;
972 struct MPT2SAS_ADAPTER *ioc;
973
974 if (copy_from_user(&karg, arg, sizeof(karg))) {
975 printk(KERN_ERR "failure at %s:%d/%s()!\n",
976 __FILE__, __LINE__, __func__);
977 return -EFAULT;
978 }
979 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
980 return -ENODEV;
981
982 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
983 __func__));
984
985 if (ioc->event_log)
986 return 0;
987 memcpy(ioc->event_type, karg.event_types,
988 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS * sizeof(u32));
989 mpt2sas_base_validate_event_type(ioc, ioc->event_type);
990
991 /* initialize event_log */
992 ioc->event_context = 0;
993 ioc->aen_event_read_flag = 0;
994 ioc->event_log = kcalloc(MPT2SAS_CTL_EVENT_LOG_SIZE,
995 sizeof(struct MPT2_IOCTL_EVENTS), GFP_KERNEL);
996 if (!ioc->event_log) {
997 printk(KERN_ERR "failure at %s:%d/%s()!\n",
998 __FILE__, __LINE__, __func__);
999 return -ENOMEM;
1000 }
1001 return 0;
1002}
1003
1004/**
1005 * _ctl_eventreport - main handler for MPT2EVENTREPORT opcode
1006 * @arg - user space buffer containing ioctl content
1007 */
1008static long
1009_ctl_eventreport(void __user *arg)
1010{
1011 struct mpt2_ioctl_eventreport karg;
1012 struct MPT2SAS_ADAPTER *ioc;
1013 u32 number_bytes, max_events, max;
1014 struct mpt2_ioctl_eventreport __user *uarg = arg;
1015
1016 if (copy_from_user(&karg, arg, sizeof(karg))) {
1017 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1018 __FILE__, __LINE__, __func__);
1019 return -EFAULT;
1020 }
1021 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
1022 return -ENODEV;
1023
1024 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
1025 __func__));
1026
1027 number_bytes = karg.hdr.max_data_size -
1028 sizeof(struct mpt2_ioctl_header);
1029 max_events = number_bytes/sizeof(struct MPT2_IOCTL_EVENTS);
1030 max = min_t(u32, MPT2SAS_CTL_EVENT_LOG_SIZE, max_events);
1031
1032 /* If fewer than 1 event is requested, there must have
1033 * been some type of error.
1034 */
1035 if (!max || !ioc->event_log)
1036 return -ENODATA;
1037
1038 number_bytes = max * sizeof(struct MPT2_IOCTL_EVENTS);
1039 if (copy_to_user(uarg->event_data, ioc->event_log, number_bytes)) {
1040 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1041 __FILE__, __LINE__, __func__);
1042 return -EFAULT;
1043 }
1044
1045 /* reset flag so SIGIO can restart */
1046 ioc->aen_event_read_flag = 0;
1047 return 0;
1048}
1049
1050/**
1051 * _ctl_do_reset - main handler for MPT2HARDRESET opcode
1052 * @arg - user space buffer containing ioctl content
1053 */
1054static long
1055_ctl_do_reset(void __user *arg)
1056{
1057 struct mpt2_ioctl_diag_reset karg;
1058 struct MPT2SAS_ADAPTER *ioc;
1059 int retval;
1060
1061 if (copy_from_user(&karg, arg, sizeof(karg))) {
1062 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1063 __FILE__, __LINE__, __func__);
1064 return -EFAULT;
1065 }
1066 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
1067 return -ENODEV;
1068
1069 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
1070 __func__));
1071
1072 retval = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
1073 FORCE_BIG_HAMMER);
1074 printk(MPT2SAS_INFO_FMT "host reset: %s\n",
1075 ioc->name, ((!retval) ? "SUCCESS" : "FAILED"));
1076 return 0;
1077}
1078
1079/**
1080 * _ctl_btdh_search_sas_device - searching for sas device
1081 * @ioc: per adapter object
1082 * @btdh: btdh ioctl payload
1083 */
1084static int
1085_ctl_btdh_search_sas_device(struct MPT2SAS_ADAPTER *ioc,
1086 struct mpt2_ioctl_btdh_mapping *btdh)
1087{
1088 struct _sas_device *sas_device;
1089 unsigned long flags;
1090 int rc = 0;
1091
1092 if (list_empty(&ioc->sas_device_list))
1093 return rc;
1094
1095 spin_lock_irqsave(&ioc->sas_device_lock, flags);
1096 list_for_each_entry(sas_device, &ioc->sas_device_list, list) {
1097 if (btdh->bus == 0xFFFFFFFF && btdh->id == 0xFFFFFFFF &&
1098 btdh->handle == sas_device->handle) {
1099 btdh->bus = sas_device->channel;
1100 btdh->id = sas_device->id;
1101 rc = 1;
1102 goto out;
1103 } else if (btdh->bus == sas_device->channel && btdh->id ==
1104 sas_device->id && btdh->handle == 0xFFFF) {
1105 btdh->handle = sas_device->handle;
1106 rc = 1;
1107 goto out;
1108 }
1109 }
1110 out:
1111 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
1112 return rc;
1113}
1114
1115/**
1116 * _ctl_btdh_search_raid_device - searching for raid device
1117 * @ioc: per adapter object
1118 * @btdh: btdh ioctl payload
1119 */
1120static int
1121_ctl_btdh_search_raid_device(struct MPT2SAS_ADAPTER *ioc,
1122 struct mpt2_ioctl_btdh_mapping *btdh)
1123{
1124 struct _raid_device *raid_device;
1125 unsigned long flags;
1126 int rc = 0;
1127
1128 if (list_empty(&ioc->raid_device_list))
1129 return rc;
1130
1131 spin_lock_irqsave(&ioc->raid_device_lock, flags);
1132 list_for_each_entry(raid_device, &ioc->raid_device_list, list) {
1133 if (btdh->bus == 0xFFFFFFFF && btdh->id == 0xFFFFFFFF &&
1134 btdh->handle == raid_device->handle) {
1135 btdh->bus = raid_device->channel;
1136 btdh->id = raid_device->id;
1137 rc = 1;
1138 goto out;
1139 } else if (btdh->bus == raid_device->channel && btdh->id ==
1140 raid_device->id && btdh->handle == 0xFFFF) {
1141 btdh->handle = raid_device->handle;
1142 rc = 1;
1143 goto out;
1144 }
1145 }
1146 out:
1147 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
1148 return rc;
1149}
1150
1151/**
1152 * _ctl_btdh_mapping - main handler for MPT2BTDHMAPPING opcode
1153 * @arg - user space buffer containing ioctl content
1154 */
1155static long
1156_ctl_btdh_mapping(void __user *arg)
1157{
1158 struct mpt2_ioctl_btdh_mapping karg;
1159 struct MPT2SAS_ADAPTER *ioc;
1160 int rc;
1161
1162 if (copy_from_user(&karg, arg, sizeof(karg))) {
1163 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1164 __FILE__, __LINE__, __func__);
1165 return -EFAULT;
1166 }
1167 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
1168 return -ENODEV;
1169
1170 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1171 __func__));
1172
1173 rc = _ctl_btdh_search_sas_device(ioc, &karg);
1174 if (!rc)
1175 _ctl_btdh_search_raid_device(ioc, &karg);
1176
1177 if (copy_to_user(arg, &karg, sizeof(karg))) {
1178 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1179 __FILE__, __LINE__, __func__);
1180 return -EFAULT;
1181 }
1182 return 0;
1183}
1184
1185/**
1186 * _ctl_diag_capability - return diag buffer capability
1187 * @ioc: per adapter object
1188 * @buffer_type: specifies either TRACE or SNAPSHOT
1189 *
1190 * returns 1 when diag buffer support is enabled in firmware
1191 */
1192static u8
1193_ctl_diag_capability(struct MPT2SAS_ADAPTER *ioc, u8 buffer_type)
1194{
1195 u8 rc = 0;
1196
1197 switch (buffer_type) {
1198 case MPI2_DIAG_BUF_TYPE_TRACE:
1199 if (ioc->facts.IOCCapabilities &
1200 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
1201 rc = 1;
1202 break;
1203 case MPI2_DIAG_BUF_TYPE_SNAPSHOT:
1204 if (ioc->facts.IOCCapabilities &
1205 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
1206 rc = 1;
1207 break;
1208 }
1209
1210 return rc;
1211}
1212
1213/**
1214 * _ctl_diag_register - application register with driver
1215 * @arg - user space buffer containing ioctl content
1216 * @state - NON_BLOCKING or BLOCKING
1217 *
1218 * This will allow the driver to setup any required buffers that will be
1219 * needed by firmware to communicate with the driver.
1220 */
1221static long
1222_ctl_diag_register(void __user *arg, enum block_state state)
1223{
1224 struct mpt2_diag_register karg;
1225 struct MPT2SAS_ADAPTER *ioc;
1226 int rc, i;
1227 void *request_data = NULL;
1228 dma_addr_t request_data_dma;
1229 u32 request_data_sz = 0;
1230 Mpi2DiagBufferPostRequest_t *mpi_request;
1231 Mpi2DiagBufferPostReply_t *mpi_reply;
1232 u8 buffer_type;
1233 unsigned long timeleft;
1234 u16 smid;
1235 u16 ioc_status;
1236 u8 issue_reset = 0;
1237
1238 if (copy_from_user(&karg, arg, sizeof(karg))) {
1239 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1240 __FILE__, __LINE__, __func__);
1241 return -EFAULT;
1242 }
1243 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
1244 return -ENODEV;
1245
1246 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1247 __func__));
1248
1249 buffer_type = karg.buffer_type;
1250 if (!_ctl_diag_capability(ioc, buffer_type)) {
1251 printk(MPT2SAS_ERR_FMT "%s: doesn't have capability for "
1252 "buffer_type(0x%02x)\n", ioc->name, __func__, buffer_type);
1253 return -EPERM;
1254 }
1255
1256 if (ioc->diag_buffer_status[buffer_type] &
1257 MPT2_DIAG_BUFFER_IS_REGISTERED) {
1258 printk(MPT2SAS_ERR_FMT "%s: already has a registered "
1259 "buffer for buffer_type(0x%02x)\n", ioc->name, __func__,
1260 buffer_type);
1261 return -EINVAL;
1262 }
1263
1264 if (karg.requested_buffer_size % 4) {
1265 printk(MPT2SAS_ERR_FMT "%s: the requested_buffer_size "
1266 "is not 4 byte aligned\n", ioc->name, __func__);
1267 return -EINVAL;
1268 }
1269
1270 if (state == NON_BLOCKING && !mutex_trylock(&ioc->ctl_cmds.mutex))
1271 return -EAGAIN;
1272 else if (mutex_lock_interruptible(&ioc->ctl_cmds.mutex))
1273 return -ERESTARTSYS;
1274
1275 if (ioc->ctl_cmds.status != MPT2_CMD_NOT_USED) {
1276 printk(MPT2SAS_ERR_FMT "%s: ctl_cmd in use\n",
1277 ioc->name, __func__);
1278 rc = -EAGAIN;
1279 goto out;
1280 }
1281
1282 smid = mpt2sas_base_get_smid(ioc, ioc->ctl_cb_idx);
1283 if (!smid) {
1284 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
1285 ioc->name, __func__);
1286 rc = -EAGAIN;
1287 goto out;
1288 }
1289
1290 rc = 0;
1291 ioc->ctl_cmds.status = MPT2_CMD_PENDING;
1292 memset(ioc->ctl_cmds.reply, 0, ioc->reply_sz);
1293 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
1294 ioc->ctl_cmds.smid = smid;
1295
1296 request_data = ioc->diag_buffer[buffer_type];
1297 request_data_sz = karg.requested_buffer_size;
1298 ioc->unique_id[buffer_type] = karg.unique_id;
1299 ioc->diag_buffer_status[buffer_type] = 0;
1300 memcpy(ioc->product_specific[buffer_type], karg.product_specific,
1301 MPT2_PRODUCT_SPECIFIC_DWORDS);
1302 ioc->diagnostic_flags[buffer_type] = karg.diagnostic_flags;
1303
1304 if (request_data) {
1305 request_data_dma = ioc->diag_buffer_dma[buffer_type];
1306 if (request_data_sz != ioc->diag_buffer_sz[buffer_type]) {
1307 pci_free_consistent(ioc->pdev,
1308 ioc->diag_buffer_sz[buffer_type],
1309 request_data, request_data_dma);
1310 request_data = NULL;
1311 }
1312 }
1313
1314 if (request_data == NULL) {
1315 ioc->diag_buffer_sz[buffer_type] = 0;
1316 ioc->diag_buffer_dma[buffer_type] = 0;
1317 request_data = pci_alloc_consistent(
1318 ioc->pdev, request_data_sz, &request_data_dma);
1319 if (request_data == NULL) {
1320 printk(MPT2SAS_ERR_FMT "%s: failed allocating memory"
1321 " for diag buffers, requested size(%d)\n",
1322 ioc->name, __func__, request_data_sz);
1323 mpt2sas_base_free_smid(ioc, smid);
1324 return -ENOMEM;
1325 }
1326 ioc->diag_buffer[buffer_type] = request_data;
1327 ioc->diag_buffer_sz[buffer_type] = request_data_sz;
1328 ioc->diag_buffer_dma[buffer_type] = request_data_dma;
1329 }
1330
1331 mpi_request->Function = MPI2_FUNCTION_DIAG_BUFFER_POST;
1332 mpi_request->BufferType = karg.buffer_type;
1333 mpi_request->Flags = cpu_to_le32(karg.diagnostic_flags);
1334 mpi_request->BufferAddress = cpu_to_le64(request_data_dma);
1335 mpi_request->BufferLength = cpu_to_le32(request_data_sz);
1336
1337 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: diag_buffer(0x%p), "
1338 "dma(0x%llx), sz(%d)\n", ioc->name, __func__, request_data,
1339 (unsigned long long)request_data_dma, mpi_request->BufferLength));
1340
1341 for (i = 0; i < MPT2_PRODUCT_SPECIFIC_DWORDS; i++)
1342 mpi_request->ProductSpecific[i] =
1343 cpu_to_le32(ioc->product_specific[buffer_type][i]);
1344
1345 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
1346 timeleft = wait_for_completion_timeout(&ioc->ctl_cmds.done,
1347 MPT2_IOCTL_DEFAULT_TIMEOUT*HZ);
1348
1349 if (!(ioc->ctl_cmds.status & MPT2_CMD_COMPLETE)) {
1350 printk(MPT2SAS_ERR_FMT "%s: timeout\n", ioc->name,
1351 __func__);
1352 _debug_dump_mf(mpi_request,
1353 sizeof(Mpi2DiagBufferPostRequest_t)/4);
1354 if (!(ioc->ctl_cmds.status & MPT2_CMD_RESET))
1355 issue_reset = 1;
1356 goto issue_host_reset;
1357 }
1358
1359 /* process the completed Reply Message Frame */
1360 if ((ioc->ctl_cmds.status & MPT2_CMD_REPLY_VALID) == 0) {
1361 printk(MPT2SAS_ERR_FMT "%s: no reply message\n",
1362 ioc->name, __func__);
1363 rc = -EFAULT;
1364 goto out;
1365 }
1366
1367 mpi_reply = ioc->ctl_cmds.reply;
1368 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
1369
1370 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
1371 ioc->diag_buffer_status[buffer_type] |=
1372 MPT2_DIAG_BUFFER_IS_REGISTERED;
1373 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: success\n",
1374 ioc->name, __func__));
1375 } else {
1376 printk(MPT2SAS_DEBUG_FMT "%s: ioc_status(0x%04x) "
1377 "log_info(0x%08x)\n", ioc->name, __func__,
1378 ioc_status, mpi_reply->IOCLogInfo);
1379 rc = -EFAULT;
1380 }
1381
1382 issue_host_reset:
1383 if (issue_reset)
1384 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
1385 FORCE_BIG_HAMMER);
1386
1387 out:
1388
1389 if (rc && request_data)
1390 pci_free_consistent(ioc->pdev, request_data_sz,
1391 request_data, request_data_dma);
1392
1393 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
1394 mutex_unlock(&ioc->ctl_cmds.mutex);
1395 return rc;
1396}
1397
1398/**
1399 * _ctl_diag_unregister - application unregister with driver
1400 * @arg - user space buffer containing ioctl content
1401 *
1402 * This will allow the driver to cleanup any memory allocated for diag
1403 * messages and to free up any resources.
1404 */
1405static long
1406_ctl_diag_unregister(void __user *arg)
1407{
1408 struct mpt2_diag_unregister karg;
1409 struct MPT2SAS_ADAPTER *ioc;
1410 void *request_data;
1411 dma_addr_t request_data_dma;
1412 u32 request_data_sz;
1413 u8 buffer_type;
1414
1415 if (copy_from_user(&karg, arg, sizeof(karg))) {
1416 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1417 __FILE__, __LINE__, __func__);
1418 return -EFAULT;
1419 }
1420 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
1421 return -ENODEV;
1422
1423 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1424 __func__));
1425
1426 buffer_type = karg.unique_id & 0x000000ff;
1427 if (!_ctl_diag_capability(ioc, buffer_type)) {
1428 printk(MPT2SAS_ERR_FMT "%s: doesn't have capability for "
1429 "buffer_type(0x%02x)\n", ioc->name, __func__, buffer_type);
1430 return -EPERM;
1431 }
1432
1433 if ((ioc->diag_buffer_status[buffer_type] &
1434 MPT2_DIAG_BUFFER_IS_REGISTERED) == 0) {
1435 printk(MPT2SAS_ERR_FMT "%s: buffer_type(0x%02x) is not "
1436 "registered\n", ioc->name, __func__, buffer_type);
1437 return -EINVAL;
1438 }
1439 if ((ioc->diag_buffer_status[buffer_type] &
1440 MPT2_DIAG_BUFFER_IS_RELEASED) == 0) {
1441 printk(MPT2SAS_ERR_FMT "%s: buffer_type(0x%02x) has not been "
1442 "released\n", ioc->name, __func__, buffer_type);
1443 return -EINVAL;
1444 }
1445
1446 if (karg.unique_id != ioc->unique_id[buffer_type]) {
1447 printk(MPT2SAS_ERR_FMT "%s: unique_id(0x%08x) is not "
1448 "registered\n", ioc->name, __func__, karg.unique_id);
1449 return -EINVAL;
1450 }
1451
1452 request_data = ioc->diag_buffer[buffer_type];
1453 if (!request_data) {
1454 printk(MPT2SAS_ERR_FMT "%s: doesn't have memory allocated for "
1455 "buffer_type(0x%02x)\n", ioc->name, __func__, buffer_type);
1456 return -ENOMEM;
1457 }
1458
1459 request_data_sz = ioc->diag_buffer_sz[buffer_type];
1460 request_data_dma = ioc->diag_buffer_dma[buffer_type];
1461 pci_free_consistent(ioc->pdev, request_data_sz,
1462 request_data, request_data_dma);
1463 ioc->diag_buffer[buffer_type] = NULL;
1464 ioc->diag_buffer_status[buffer_type] = 0;
1465 return 0;
1466}
1467
1468/**
1469 * _ctl_diag_query - query relevant info associated with diag buffers
1470 * @arg - user space buffer containing ioctl content
1471 *
1472 * The application will send only buffer_type and unique_id. Driver will
1473 * inspect unique_id first, if valid, fill in all the info. If unique_id is
1474 * 0x00, the driver will return info specified by Buffer Type.
1475 */
1476static long
1477_ctl_diag_query(void __user *arg)
1478{
1479 struct mpt2_diag_query karg;
1480 struct MPT2SAS_ADAPTER *ioc;
1481 void *request_data;
1482 int i;
1483 u8 buffer_type;
1484
1485 if (copy_from_user(&karg, arg, sizeof(karg))) {
1486 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1487 __FILE__, __LINE__, __func__);
1488 return -EFAULT;
1489 }
1490 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
1491 return -ENODEV;
1492
1493 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1494 __func__));
1495
1496 karg.application_flags = 0;
1497 buffer_type = karg.buffer_type;
1498
1499 if (!_ctl_diag_capability(ioc, buffer_type)) {
1500 printk(MPT2SAS_ERR_FMT "%s: doesn't have capability for "
1501 "buffer_type(0x%02x)\n", ioc->name, __func__, buffer_type);
1502 return -EPERM;
1503 }
1504
1505 if ((ioc->diag_buffer_status[buffer_type] &
1506 MPT2_DIAG_BUFFER_IS_REGISTERED) == 0) {
1507 printk(MPT2SAS_ERR_FMT "%s: buffer_type(0x%02x) is not "
1508 "registered\n", ioc->name, __func__, buffer_type);
1509 return -EINVAL;
1510 }
1511
1512 if (karg.unique_id & 0xffffff00) {
1513 if (karg.unique_id != ioc->unique_id[buffer_type]) {
1514 printk(MPT2SAS_ERR_FMT "%s: unique_id(0x%08x) is not "
1515 "registered\n", ioc->name, __func__,
1516 karg.unique_id);
1517 return -EINVAL;
1518 }
1519 }
1520
1521 request_data = ioc->diag_buffer[buffer_type];
1522 if (!request_data) {
1523 printk(MPT2SAS_ERR_FMT "%s: doesn't have buffer for "
1524 "buffer_type(0x%02x)\n", ioc->name, __func__, buffer_type);
1525 return -ENOMEM;
1526 }
1527
1528 if (ioc->diag_buffer_status[buffer_type] & MPT2_DIAG_BUFFER_IS_RELEASED)
1529 karg.application_flags = (MPT2_APP_FLAGS_APP_OWNED |
1530 MPT2_APP_FLAGS_BUFFER_VALID);
1531 else
1532 karg.application_flags = (MPT2_APP_FLAGS_APP_OWNED |
1533 MPT2_APP_FLAGS_BUFFER_VALID |
1534 MPT2_APP_FLAGS_FW_BUFFER_ACCESS);
1535
1536 for (i = 0; i < MPT2_PRODUCT_SPECIFIC_DWORDS; i++)
1537 karg.product_specific[i] =
1538 ioc->product_specific[buffer_type][i];
1539
1540 karg.total_buffer_size = ioc->diag_buffer_sz[buffer_type];
1541 karg.driver_added_buffer_size = 0;
1542 karg.unique_id = ioc->unique_id[buffer_type];
1543 karg.diagnostic_flags = ioc->diagnostic_flags[buffer_type];
1544
1545 if (copy_to_user(arg, &karg, sizeof(struct mpt2_diag_query))) {
1546 printk(MPT2SAS_ERR_FMT "%s: unable to write mpt2_diag_query "
1547 "data @ %p\n", ioc->name, __func__, arg);
1548 return -EFAULT;
1549 }
1550 return 0;
1551}
1552
1553/**
1554 * _ctl_diag_release - request to send Diag Release Message to firmware
1555 * @arg - user space buffer containing ioctl content
1556 * @state - NON_BLOCKING or BLOCKING
1557 *
1558 * This allows ownership of the specified buffer to returned to the driver,
1559 * allowing an application to read the buffer without fear that firmware is
1560 * overwritting information in the buffer.
1561 */
1562static long
1563_ctl_diag_release(void __user *arg, enum block_state state)
1564{
1565 struct mpt2_diag_release karg;
1566 struct MPT2SAS_ADAPTER *ioc;
1567 void *request_data;
1568 int rc;
1569 Mpi2DiagReleaseRequest_t *mpi_request;
1570 Mpi2DiagReleaseReply_t *mpi_reply;
1571 u8 buffer_type;
1572 unsigned long timeleft;
1573 u16 smid;
1574 u16 ioc_status;
1575 u8 issue_reset = 0;
1576
1577 if (copy_from_user(&karg, arg, sizeof(karg))) {
1578 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1579 __FILE__, __LINE__, __func__);
1580 return -EFAULT;
1581 }
1582 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
1583 return -ENODEV;
1584
1585 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1586 __func__));
1587
1588 buffer_type = karg.unique_id & 0x000000ff;
1589 if (!_ctl_diag_capability(ioc, buffer_type)) {
1590 printk(MPT2SAS_ERR_FMT "%s: doesn't have capability for "
1591 "buffer_type(0x%02x)\n", ioc->name, __func__, buffer_type);
1592 return -EPERM;
1593 }
1594
1595 if ((ioc->diag_buffer_status[buffer_type] &
1596 MPT2_DIAG_BUFFER_IS_REGISTERED) == 0) {
1597 printk(MPT2SAS_ERR_FMT "%s: buffer_type(0x%02x) is not "
1598 "registered\n", ioc->name, __func__, buffer_type);
1599 return -EINVAL;
1600 }
1601
1602 if (karg.unique_id != ioc->unique_id[buffer_type]) {
1603 printk(MPT2SAS_ERR_FMT "%s: unique_id(0x%08x) is not "
1604 "registered\n", ioc->name, __func__, karg.unique_id);
1605 return -EINVAL;
1606 }
1607
1608 if (ioc->diag_buffer_status[buffer_type] &
1609 MPT2_DIAG_BUFFER_IS_RELEASED) {
1610 printk(MPT2SAS_ERR_FMT "%s: buffer_type(0x%02x) "
1611 "is already released\n", ioc->name, __func__,
1612 buffer_type);
1613 return 0;
1614 }
1615
1616 request_data = ioc->diag_buffer[buffer_type];
1617
1618 if (!request_data) {
1619 printk(MPT2SAS_ERR_FMT "%s: doesn't have memory allocated for "
1620 "buffer_type(0x%02x)\n", ioc->name, __func__, buffer_type);
1621 return -ENOMEM;
1622 }
1623
1624 if (state == NON_BLOCKING && !mutex_trylock(&ioc->ctl_cmds.mutex))
1625 return -EAGAIN;
1626 else if (mutex_lock_interruptible(&ioc->ctl_cmds.mutex))
1627 return -ERESTARTSYS;
1628
1629 if (ioc->ctl_cmds.status != MPT2_CMD_NOT_USED) {
1630 printk(MPT2SAS_ERR_FMT "%s: ctl_cmd in use\n",
1631 ioc->name, __func__);
1632 rc = -EAGAIN;
1633 goto out;
1634 }
1635
1636 smid = mpt2sas_base_get_smid(ioc, ioc->ctl_cb_idx);
1637 if (!smid) {
1638 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
1639 ioc->name, __func__);
1640 rc = -EAGAIN;
1641 goto out;
1642 }
1643
1644 rc = 0;
1645 ioc->ctl_cmds.status = MPT2_CMD_PENDING;
1646 memset(ioc->ctl_cmds.reply, 0, ioc->reply_sz);
1647 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
1648 ioc->ctl_cmds.smid = smid;
1649
1650 mpi_request->Function = MPI2_FUNCTION_DIAG_RELEASE;
1651 mpi_request->BufferType = buffer_type;
1652
1653 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
1654 timeleft = wait_for_completion_timeout(&ioc->ctl_cmds.done,
1655 MPT2_IOCTL_DEFAULT_TIMEOUT*HZ);
1656
1657 if (!(ioc->ctl_cmds.status & MPT2_CMD_COMPLETE)) {
1658 printk(MPT2SAS_ERR_FMT "%s: timeout\n", ioc->name,
1659 __func__);
1660 _debug_dump_mf(mpi_request,
1661 sizeof(Mpi2DiagReleaseRequest_t)/4);
1662 if (!(ioc->ctl_cmds.status & MPT2_CMD_RESET))
1663 issue_reset = 1;
1664 goto issue_host_reset;
1665 }
1666
1667 /* process the completed Reply Message Frame */
1668 if ((ioc->ctl_cmds.status & MPT2_CMD_REPLY_VALID) == 0) {
1669 printk(MPT2SAS_ERR_FMT "%s: no reply message\n",
1670 ioc->name, __func__);
1671 rc = -EFAULT;
1672 goto out;
1673 }
1674
1675 mpi_reply = ioc->ctl_cmds.reply;
1676 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
1677
1678 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
1679 ioc->diag_buffer_status[buffer_type] |=
1680 MPT2_DIAG_BUFFER_IS_RELEASED;
1681 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: success\n",
1682 ioc->name, __func__));
1683 } else {
1684 printk(MPT2SAS_DEBUG_FMT "%s: ioc_status(0x%04x) "
1685 "log_info(0x%08x)\n", ioc->name, __func__,
1686 ioc_status, mpi_reply->IOCLogInfo);
1687 rc = -EFAULT;
1688 }
1689
1690 issue_host_reset:
1691 if (issue_reset)
1692 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
1693 FORCE_BIG_HAMMER);
1694
1695 out:
1696
1697 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
1698 mutex_unlock(&ioc->ctl_cmds.mutex);
1699 return rc;
1700}
1701
1702/**
1703 * _ctl_diag_read_buffer - request for copy of the diag buffer
1704 * @arg - user space buffer containing ioctl content
1705 * @state - NON_BLOCKING or BLOCKING
1706 */
1707static long
1708_ctl_diag_read_buffer(void __user *arg, enum block_state state)
1709{
1710 struct mpt2_diag_read_buffer karg;
1711 struct mpt2_diag_read_buffer __user *uarg = arg;
1712 struct MPT2SAS_ADAPTER *ioc;
1713 void *request_data, *diag_data;
1714 Mpi2DiagBufferPostRequest_t *mpi_request;
1715 Mpi2DiagBufferPostReply_t *mpi_reply;
1716 int rc, i;
1717 u8 buffer_type;
1718 unsigned long timeleft;
1719 u16 smid;
1720 u16 ioc_status;
1721 u8 issue_reset = 0;
1722
1723 if (copy_from_user(&karg, arg, sizeof(karg))) {
1724 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1725 __FILE__, __LINE__, __func__);
1726 return -EFAULT;
1727 }
1728 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 || !ioc)
1729 return -ENODEV;
1730
1731 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1732 __func__));
1733
1734 buffer_type = karg.unique_id & 0x000000ff;
1735 if (!_ctl_diag_capability(ioc, buffer_type)) {
1736 printk(MPT2SAS_ERR_FMT "%s: doesn't have capability for "
1737 "buffer_type(0x%02x)\n", ioc->name, __func__, buffer_type);
1738 return -EPERM;
1739 }
1740
1741 if (karg.unique_id != ioc->unique_id[buffer_type]) {
1742 printk(MPT2SAS_ERR_FMT "%s: unique_id(0x%08x) is not "
1743 "registered\n", ioc->name, __func__, karg.unique_id);
1744 return -EINVAL;
1745 }
1746
1747 request_data = ioc->diag_buffer[buffer_type];
1748 if (!request_data) {
1749 printk(MPT2SAS_ERR_FMT "%s: doesn't have buffer for "
1750 "buffer_type(0x%02x)\n", ioc->name, __func__, buffer_type);
1751 return -ENOMEM;
1752 }
1753
1754 if ((karg.starting_offset % 4) || (karg.bytes_to_read % 4)) {
1755 printk(MPT2SAS_ERR_FMT "%s: either the starting_offset "
1756 "or bytes_to_read are not 4 byte aligned\n", ioc->name,
1757 __func__);
1758 return -EINVAL;
1759 }
1760
1761 diag_data = (void *)(request_data + karg.starting_offset);
1762 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: diag_buffer(%p), "
1763 "offset(%d), sz(%d)\n", ioc->name, __func__,
1764 diag_data, karg.starting_offset, karg.bytes_to_read));
1765
1766 if (copy_to_user((void __user *)uarg->diagnostic_data,
1767 diag_data, karg.bytes_to_read)) {
1768 printk(MPT2SAS_ERR_FMT "%s: Unable to write "
1769 "mpt_diag_read_buffer_t data @ %p\n", ioc->name,
1770 __func__, diag_data);
1771 return -EFAULT;
1772 }
1773
1774 if ((karg.flags & MPT2_FLAGS_REREGISTER) == 0)
1775 return 0;
1776
1777 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: Reregister "
1778 "buffer_type(0x%02x)\n", ioc->name, __func__, buffer_type));
1779 if ((ioc->diag_buffer_status[buffer_type] &
1780 MPT2_DIAG_BUFFER_IS_RELEASED) == 0) {
1781 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
1782 "buffer_type(0x%02x) is still registered\n", ioc->name,
1783 __func__, buffer_type));
1784 return 0;
1785 }
1786 /* Get a free request frame and save the message context.
1787 */
1788 if (state == NON_BLOCKING && !mutex_trylock(&ioc->ctl_cmds.mutex))
1789 return -EAGAIN;
1790 else if (mutex_lock_interruptible(&ioc->ctl_cmds.mutex))
1791 return -ERESTARTSYS;
1792
1793 if (ioc->ctl_cmds.status != MPT2_CMD_NOT_USED) {
1794 printk(MPT2SAS_ERR_FMT "%s: ctl_cmd in use\n",
1795 ioc->name, __func__);
1796 rc = -EAGAIN;
1797 goto out;
1798 }
1799
1800 smid = mpt2sas_base_get_smid(ioc, ioc->ctl_cb_idx);
1801 if (!smid) {
1802 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
1803 ioc->name, __func__);
1804 rc = -EAGAIN;
1805 goto out;
1806 }
1807
1808 rc = 0;
1809 ioc->ctl_cmds.status = MPT2_CMD_PENDING;
1810 memset(ioc->ctl_cmds.reply, 0, ioc->reply_sz);
1811 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
1812 ioc->ctl_cmds.smid = smid;
1813
1814 mpi_request->Function = MPI2_FUNCTION_DIAG_BUFFER_POST;
1815 mpi_request->BufferType = buffer_type;
1816 mpi_request->BufferLength =
1817 cpu_to_le32(ioc->diag_buffer_sz[buffer_type]);
1818 mpi_request->BufferAddress =
1819 cpu_to_le64(ioc->diag_buffer_dma[buffer_type]);
1820 for (i = 0; i < MPT2_PRODUCT_SPECIFIC_DWORDS; i++)
1821 mpi_request->ProductSpecific[i] =
1822 cpu_to_le32(ioc->product_specific[buffer_type][i]);
1823
1824 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
1825 timeleft = wait_for_completion_timeout(&ioc->ctl_cmds.done,
1826 MPT2_IOCTL_DEFAULT_TIMEOUT*HZ);
1827
1828 if (!(ioc->ctl_cmds.status & MPT2_CMD_COMPLETE)) {
1829 printk(MPT2SAS_ERR_FMT "%s: timeout\n", ioc->name,
1830 __func__);
1831 _debug_dump_mf(mpi_request,
1832 sizeof(Mpi2DiagBufferPostRequest_t)/4);
1833 if (!(ioc->ctl_cmds.status & MPT2_CMD_RESET))
1834 issue_reset = 1;
1835 goto issue_host_reset;
1836 }
1837
1838 /* process the completed Reply Message Frame */
1839 if ((ioc->ctl_cmds.status & MPT2_CMD_REPLY_VALID) == 0) {
1840 printk(MPT2SAS_ERR_FMT "%s: no reply message\n",
1841 ioc->name, __func__);
1842 rc = -EFAULT;
1843 goto out;
1844 }
1845
1846 mpi_reply = ioc->ctl_cmds.reply;
1847 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
1848
1849 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
1850 ioc->diag_buffer_status[buffer_type] |=
1851 MPT2_DIAG_BUFFER_IS_REGISTERED;
1852 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: success\n",
1853 ioc->name, __func__));
1854 } else {
1855 printk(MPT2SAS_DEBUG_FMT "%s: ioc_status(0x%04x) "
1856 "log_info(0x%08x)\n", ioc->name, __func__,
1857 ioc_status, mpi_reply->IOCLogInfo);
1858 rc = -EFAULT;
1859 }
1860
1861 issue_host_reset:
1862 if (issue_reset)
1863 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
1864 FORCE_BIG_HAMMER);
1865
1866 out:
1867
1868 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
1869 mutex_unlock(&ioc->ctl_cmds.mutex);
1870 return rc;
1871}
1872
1873/**
1874 * _ctl_ioctl_main - main ioctl entry point
1875 * @file - (struct file)
1876 * @cmd - ioctl opcode
1877 * @arg -
1878 */
1879static long
1880_ctl_ioctl_main(struct file *file, unsigned int cmd, void __user *arg)
1881{
1882 enum block_state state;
1883 long ret = -EINVAL;
1884 unsigned long flags;
1885
1886 state = (file->f_flags & O_NONBLOCK) ? NON_BLOCKING :
1887 BLOCKING;
1888
1889 switch (cmd) {
1890 case MPT2IOCINFO:
1891 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_iocinfo))
1892 ret = _ctl_getiocinfo(arg);
1893 break;
1894 case MPT2COMMAND:
1895 {
1896 struct mpt2_ioctl_command karg;
1897 struct mpt2_ioctl_command __user *uarg;
1898 struct MPT2SAS_ADAPTER *ioc;
1899
1900 if (copy_from_user(&karg, arg, sizeof(karg))) {
1901 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1902 __FILE__, __LINE__, __func__);
1903 return -EFAULT;
1904 }
1905
1906 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 ||
1907 !ioc)
1908 return -ENODEV;
1909
1910 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
1911 if (ioc->shost_recovery) {
1912 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock,
1913 flags);
1914 return -EAGAIN;
1915 }
1916 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
1917
1918 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_command)) {
1919 uarg = arg;
1920 ret = _ctl_do_mpt_command(ioc, karg, &uarg->mf, state);
1921 }
1922 break;
1923 }
1924 case MPT2EVENTQUERY:
1925 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_eventquery))
1926 ret = _ctl_eventquery(arg);
1927 break;
1928 case MPT2EVENTENABLE:
1929 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_eventenable))
1930 ret = _ctl_eventenable(arg);
1931 break;
1932 case MPT2EVENTREPORT:
1933 ret = _ctl_eventreport(arg);
1934 break;
1935 case MPT2HARDRESET:
1936 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_diag_reset))
1937 ret = _ctl_do_reset(arg);
1938 break;
1939 case MPT2BTDHMAPPING:
1940 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_ioctl_btdh_mapping))
1941 ret = _ctl_btdh_mapping(arg);
1942 break;
1943 case MPT2DIAGREGISTER:
1944 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_diag_register))
1945 ret = _ctl_diag_register(arg, state);
1946 break;
1947 case MPT2DIAGUNREGISTER:
1948 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_diag_unregister))
1949 ret = _ctl_diag_unregister(arg);
1950 break;
1951 case MPT2DIAGQUERY:
1952 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_diag_query))
1953 ret = _ctl_diag_query(arg);
1954 break;
1955 case MPT2DIAGRELEASE:
1956 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_diag_release))
1957 ret = _ctl_diag_release(arg, state);
1958 break;
1959 case MPT2DIAGREADBUFFER:
1960 if (_IOC_SIZE(cmd) == sizeof(struct mpt2_diag_read_buffer))
1961 ret = _ctl_diag_read_buffer(arg, state);
1962 break;
1963 default:
1964 {
1965 struct mpt2_ioctl_command karg;
1966 struct MPT2SAS_ADAPTER *ioc;
1967
1968 if (copy_from_user(&karg, arg, sizeof(karg))) {
1969 printk(KERN_ERR "failure at %s:%d/%s()!\n",
1970 __FILE__, __LINE__, __func__);
1971 return -EFAULT;
1972 }
1973
1974 if (_ctl_verify_adapter(karg.hdr.ioc_number, &ioc) == -1 ||
1975 !ioc)
1976 return -ENODEV;
1977
1978 dctlprintk(ioc, printk(MPT2SAS_DEBUG_FMT
1979 "unsupported ioctl opcode(0x%08x)\n", ioc->name, cmd));
1980 break;
1981 }
1982 }
1983 return ret;
1984}
1985
1986/**
1987 * _ctl_ioctl - main ioctl entry point (unlocked)
1988 * @file - (struct file)
1989 * @cmd - ioctl opcode
1990 * @arg -
1991 */
1992static long
1993_ctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1994{
1995 long ret;
1996 lock_kernel();
1997 ret = _ctl_ioctl_main(file, cmd, (void __user *)arg);
1998 unlock_kernel();
1999 return ret;
2000}
2001
2002#ifdef CONFIG_COMPAT
2003/**
2004 * _ctl_compat_mpt_command - convert 32bit pointers to 64bit.
2005 * @file - (struct file)
2006 * @cmd - ioctl opcode
2007 * @arg - (struct mpt2_ioctl_command32)
2008 *
2009 * MPT2COMMAND32 - Handle 32bit applications running on 64bit os.
2010 */
2011static long
2012_ctl_compat_mpt_command(struct file *file, unsigned cmd, unsigned long arg)
2013{
2014 struct mpt2_ioctl_command32 karg32;
2015 struct mpt2_ioctl_command32 __user *uarg;
2016 struct mpt2_ioctl_command karg;
2017 struct MPT2SAS_ADAPTER *ioc;
2018 enum block_state state;
2019 unsigned long flags;
2020
2021 if (_IOC_SIZE(cmd) != sizeof(struct mpt2_ioctl_command32))
2022 return -EINVAL;
2023
2024 uarg = (struct mpt2_ioctl_command32 __user *) arg;
2025
2026 if (copy_from_user(&karg32, (char __user *)arg, sizeof(karg32))) {
2027 printk(KERN_ERR "failure at %s:%d/%s()!\n",
2028 __FILE__, __LINE__, __func__);
2029 return -EFAULT;
2030 }
2031 if (_ctl_verify_adapter(karg32.hdr.ioc_number, &ioc) == -1 || !ioc)
2032 return -ENODEV;
2033
2034 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
2035 if (ioc->shost_recovery) {
2036 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock,
2037 flags);
2038 return -EAGAIN;
2039 }
2040 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
2041
2042 memset(&karg, 0, sizeof(struct mpt2_ioctl_command));
2043 karg.hdr.ioc_number = karg32.hdr.ioc_number;
2044 karg.hdr.port_number = karg32.hdr.port_number;
2045 karg.hdr.max_data_size = karg32.hdr.max_data_size;
2046 karg.timeout = karg32.timeout;
2047 karg.max_reply_bytes = karg32.max_reply_bytes;
2048 karg.data_in_size = karg32.data_in_size;
2049 karg.data_out_size = karg32.data_out_size;
2050 karg.max_sense_bytes = karg32.max_sense_bytes;
2051 karg.data_sge_offset = karg32.data_sge_offset;
2052 memcpy(&karg.reply_frame_buf_ptr, &karg32.reply_frame_buf_ptr,
2053 sizeof(uint32_t));
2054 memcpy(&karg.data_in_buf_ptr, &karg32.data_in_buf_ptr,
2055 sizeof(uint32_t));
2056 memcpy(&karg.data_out_buf_ptr, &karg32.data_out_buf_ptr,
2057 sizeof(uint32_t));
2058 memcpy(&karg.sense_data_ptr, &karg32.sense_data_ptr,
2059 sizeof(uint32_t));
2060 state = (file->f_flags & O_NONBLOCK) ? NON_BLOCKING : BLOCKING;
2061 return _ctl_do_mpt_command(ioc, karg, &uarg->mf, state);
2062}
2063
2064/**
2065 * _ctl_ioctl_compat - main ioctl entry point (compat)
2066 * @file -
2067 * @cmd -
2068 * @arg -
2069 *
2070 * This routine handles 32 bit applications in 64bit os.
2071 */
2072static long
2073_ctl_ioctl_compat(struct file *file, unsigned cmd, unsigned long arg)
2074{
2075 long ret;
2076 lock_kernel();
2077 if (cmd == MPT2COMMAND32)
2078 ret = _ctl_compat_mpt_command(file, cmd, arg);
2079 else
2080 ret = _ctl_ioctl_main(file, cmd, (void __user *)arg);
2081 unlock_kernel();
2082 return ret;
2083}
2084#endif
2085
2086/* scsi host attributes */
2087
2088/**
2089 * _ctl_version_fw_show - firmware version
2090 * @cdev - pointer to embedded class device
2091 * @buf - the buffer returned
2092 *
2093 * A sysfs 'read-only' shost attribute.
2094 */
2095static ssize_t
2096_ctl_version_fw_show(struct device *cdev, struct device_attribute *attr,
2097 char *buf)
2098{
2099 struct Scsi_Host *shost = class_to_shost(cdev);
2100 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2101
2102 return snprintf(buf, PAGE_SIZE, "%02d.%02d.%02d.%02d\n",
2103 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2104 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2105 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2106 ioc->facts.FWVersion.Word & 0x000000FF);
2107}
2108static DEVICE_ATTR(version_fw, S_IRUGO, _ctl_version_fw_show, NULL);
2109
2110/**
2111 * _ctl_version_bios_show - bios version
2112 * @cdev - pointer to embedded class device
2113 * @buf - the buffer returned
2114 *
2115 * A sysfs 'read-only' shost attribute.
2116 */
2117static ssize_t
2118_ctl_version_bios_show(struct device *cdev, struct device_attribute *attr,
2119 char *buf)
2120{
2121 struct Scsi_Host *shost = class_to_shost(cdev);
2122 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2123
2124 u32 version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2125
2126 return snprintf(buf, PAGE_SIZE, "%02d.%02d.%02d.%02d\n",
2127 (version & 0xFF000000) >> 24,
2128 (version & 0x00FF0000) >> 16,
2129 (version & 0x0000FF00) >> 8,
2130 version & 0x000000FF);
2131}
2132static DEVICE_ATTR(version_bios, S_IRUGO, _ctl_version_bios_show, NULL);
2133
2134/**
2135 * _ctl_version_mpi_show - MPI (message passing interface) version
2136 * @cdev - pointer to embedded class device
2137 * @buf - the buffer returned
2138 *
2139 * A sysfs 'read-only' shost attribute.
2140 */
2141static ssize_t
2142_ctl_version_mpi_show(struct device *cdev, struct device_attribute *attr,
2143 char *buf)
2144{
2145 struct Scsi_Host *shost = class_to_shost(cdev);
2146 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2147
2148 return snprintf(buf, PAGE_SIZE, "%03x.%02x\n",
2149 ioc->facts.MsgVersion, ioc->facts.HeaderVersion >> 8);
2150}
2151static DEVICE_ATTR(version_mpi, S_IRUGO, _ctl_version_mpi_show, NULL);
2152
2153/**
2154 * _ctl_version_product_show - product name
2155 * @cdev - pointer to embedded class device
2156 * @buf - the buffer returned
2157 *
2158 * A sysfs 'read-only' shost attribute.
2159 */
2160static ssize_t
2161_ctl_version_product_show(struct device *cdev, struct device_attribute *attr,
2162 char *buf)
2163{
2164 struct Scsi_Host *shost = class_to_shost(cdev);
2165 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2166
2167 return snprintf(buf, 16, "%s\n", ioc->manu_pg0.ChipName);
2168}
2169static DEVICE_ATTR(version_product, S_IRUGO,
2170 _ctl_version_product_show, NULL);
2171
2172/**
2173 * _ctl_version_nvdata_persistent_show - ndvata persistent version
2174 * @cdev - pointer to embedded class device
2175 * @buf - the buffer returned
2176 *
2177 * A sysfs 'read-only' shost attribute.
2178 */
2179static ssize_t
2180_ctl_version_nvdata_persistent_show(struct device *cdev,
2181 struct device_attribute *attr, char *buf)
2182{
2183 struct Scsi_Host *shost = class_to_shost(cdev);
2184 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2185
2186 return snprintf(buf, PAGE_SIZE, "%02xh\n",
2187 le16_to_cpu(ioc->iounit_pg0.NvdataVersionPersistent.Word));
2188}
2189static DEVICE_ATTR(version_nvdata_persistent, S_IRUGO,
2190 _ctl_version_nvdata_persistent_show, NULL);
2191
2192/**
2193 * _ctl_version_nvdata_default_show - nvdata default version
2194 * @cdev - pointer to embedded class device
2195 * @buf - the buffer returned
2196 *
2197 * A sysfs 'read-only' shost attribute.
2198 */
2199static ssize_t
2200_ctl_version_nvdata_default_show(struct device *cdev,
2201 struct device_attribute *attr, char *buf)
2202{
2203 struct Scsi_Host *shost = class_to_shost(cdev);
2204 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2205
2206 return snprintf(buf, PAGE_SIZE, "%02xh\n",
2207 le16_to_cpu(ioc->iounit_pg0.NvdataVersionDefault.Word));
2208}
2209static DEVICE_ATTR(version_nvdata_default, S_IRUGO,
2210 _ctl_version_nvdata_default_show, NULL);
2211
2212/**
2213 * _ctl_board_name_show - board name
2214 * @cdev - pointer to embedded class device
2215 * @buf - the buffer returned
2216 *
2217 * A sysfs 'read-only' shost attribute.
2218 */
2219static ssize_t
2220_ctl_board_name_show(struct device *cdev, struct device_attribute *attr,
2221 char *buf)
2222{
2223 struct Scsi_Host *shost = class_to_shost(cdev);
2224 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2225
2226 return snprintf(buf, 16, "%s\n", ioc->manu_pg0.BoardName);
2227}
2228static DEVICE_ATTR(board_name, S_IRUGO, _ctl_board_name_show, NULL);
2229
2230/**
2231 * _ctl_board_assembly_show - board assembly name
2232 * @cdev - pointer to embedded class device
2233 * @buf - the buffer returned
2234 *
2235 * A sysfs 'read-only' shost attribute.
2236 */
2237static ssize_t
2238_ctl_board_assembly_show(struct device *cdev, struct device_attribute *attr,
2239 char *buf)
2240{
2241 struct Scsi_Host *shost = class_to_shost(cdev);
2242 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2243
2244 return snprintf(buf, 16, "%s\n", ioc->manu_pg0.BoardAssembly);
2245}
2246static DEVICE_ATTR(board_assembly, S_IRUGO,
2247 _ctl_board_assembly_show, NULL);
2248
2249/**
2250 * _ctl_board_tracer_show - board tracer number
2251 * @cdev - pointer to embedded class device
2252 * @buf - the buffer returned
2253 *
2254 * A sysfs 'read-only' shost attribute.
2255 */
2256static ssize_t
2257_ctl_board_tracer_show(struct device *cdev, struct device_attribute *attr,
2258 char *buf)
2259{
2260 struct Scsi_Host *shost = class_to_shost(cdev);
2261 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2262
2263 return snprintf(buf, 16, "%s\n", ioc->manu_pg0.BoardTracerNumber);
2264}
2265static DEVICE_ATTR(board_tracer, S_IRUGO,
2266 _ctl_board_tracer_show, NULL);
2267
2268/**
2269 * _ctl_io_delay_show - io missing delay
2270 * @cdev - pointer to embedded class device
2271 * @buf - the buffer returned
2272 *
2273 * This is for firmware implemention for deboucing device
2274 * removal events.
2275 *
2276 * A sysfs 'read-only' shost attribute.
2277 */
2278static ssize_t
2279_ctl_io_delay_show(struct device *cdev, struct device_attribute *attr,
2280 char *buf)
2281{
2282 struct Scsi_Host *shost = class_to_shost(cdev);
2283 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2284
2285 return snprintf(buf, PAGE_SIZE, "%02d\n", ioc->io_missing_delay);
2286}
2287static DEVICE_ATTR(io_delay, S_IRUGO,
2288 _ctl_io_delay_show, NULL);
2289
2290/**
2291 * _ctl_device_delay_show - device missing delay
2292 * @cdev - pointer to embedded class device
2293 * @buf - the buffer returned
2294 *
2295 * This is for firmware implemention for deboucing device
2296 * removal events.
2297 *
2298 * A sysfs 'read-only' shost attribute.
2299 */
2300static ssize_t
2301_ctl_device_delay_show(struct device *cdev, struct device_attribute *attr,
2302 char *buf)
2303{
2304 struct Scsi_Host *shost = class_to_shost(cdev);
2305 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2306
2307 return snprintf(buf, PAGE_SIZE, "%02d\n", ioc->device_missing_delay);
2308}
2309static DEVICE_ATTR(device_delay, S_IRUGO,
2310 _ctl_device_delay_show, NULL);
2311
2312/**
2313 * _ctl_fw_queue_depth_show - global credits
2314 * @cdev - pointer to embedded class device
2315 * @buf - the buffer returned
2316 *
2317 * This is firmware queue depth limit
2318 *
2319 * A sysfs 'read-only' shost attribute.
2320 */
2321static ssize_t
2322_ctl_fw_queue_depth_show(struct device *cdev, struct device_attribute *attr,
2323 char *buf)
2324{
2325 struct Scsi_Host *shost = class_to_shost(cdev);
2326 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2327
2328 return snprintf(buf, PAGE_SIZE, "%02d\n", ioc->facts.RequestCredit);
2329}
2330static DEVICE_ATTR(fw_queue_depth, S_IRUGO,
2331 _ctl_fw_queue_depth_show, NULL);
2332
2333/**
2334 * _ctl_sas_address_show - sas address
2335 * @cdev - pointer to embedded class device
2336 * @buf - the buffer returned
2337 *
2338 * This is the controller sas address
2339 *
2340 * A sysfs 'read-only' shost attribute.
2341 */
2342static ssize_t
2343_ctl_host_sas_address_show(struct device *cdev, struct device_attribute *attr,
2344 char *buf)
2345{
2346 struct Scsi_Host *shost = class_to_shost(cdev);
2347 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2348
2349 return snprintf(buf, PAGE_SIZE, "0x%016llx\n",
2350 (unsigned long long)ioc->sas_hba.sas_address);
2351}
2352static DEVICE_ATTR(host_sas_address, S_IRUGO,
2353 _ctl_host_sas_address_show, NULL);
2354
2355/**
2356 * _ctl_logging_level_show - logging level
2357 * @cdev - pointer to embedded class device
2358 * @buf - the buffer returned
2359 *
2360 * A sysfs 'read/write' shost attribute.
2361 */
2362static ssize_t
2363_ctl_logging_level_show(struct device *cdev, struct device_attribute *attr,
2364 char *buf)
2365{
2366 struct Scsi_Host *shost = class_to_shost(cdev);
2367 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2368
2369 return snprintf(buf, PAGE_SIZE, "%08xh\n", ioc->logging_level);
2370}
2371static ssize_t
2372_ctl_logging_level_store(struct device *cdev, struct device_attribute *attr,
2373 const char *buf, size_t count)
2374{
2375 struct Scsi_Host *shost = class_to_shost(cdev);
2376 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
2377 int val = 0;
2378
2379 if (sscanf(buf, "%x", &val) != 1)
2380 return -EINVAL;
2381
2382 ioc->logging_level = val;
2383 printk(MPT2SAS_INFO_FMT "logging_level=%08xh\n", ioc->name,
2384 ioc->logging_level);
2385 return strlen(buf);
2386}
2387static DEVICE_ATTR(logging_level, S_IRUGO | S_IWUSR,
2388 _ctl_logging_level_show, _ctl_logging_level_store);
2389
2390struct device_attribute *mpt2sas_host_attrs[] = {
2391 &dev_attr_version_fw,
2392 &dev_attr_version_bios,
2393 &dev_attr_version_mpi,
2394 &dev_attr_version_product,
2395 &dev_attr_version_nvdata_persistent,
2396 &dev_attr_version_nvdata_default,
2397 &dev_attr_board_name,
2398 &dev_attr_board_assembly,
2399 &dev_attr_board_tracer,
2400 &dev_attr_io_delay,
2401 &dev_attr_device_delay,
2402 &dev_attr_logging_level,
2403 &dev_attr_fw_queue_depth,
2404 &dev_attr_host_sas_address,
2405 NULL,
2406};
2407
2408/* device attributes */
2409
2410/**
2411 * _ctl_device_sas_address_show - sas address
2412 * @cdev - pointer to embedded class device
2413 * @buf - the buffer returned
2414 *
2415 * This is the sas address for the target
2416 *
2417 * A sysfs 'read-only' shost attribute.
2418 */
2419static ssize_t
2420_ctl_device_sas_address_show(struct device *dev, struct device_attribute *attr,
2421 char *buf)
2422{
2423 struct scsi_device *sdev = to_scsi_device(dev);
2424 struct MPT2SAS_DEVICE *sas_device_priv_data = sdev->hostdata;
2425
2426 return snprintf(buf, PAGE_SIZE, "0x%016llx\n",
2427 (unsigned long long)sas_device_priv_data->sas_target->sas_address);
2428}
2429static DEVICE_ATTR(sas_address, S_IRUGO, _ctl_device_sas_address_show, NULL);
2430
2431/**
2432 * _ctl_device_handle_show - device handle
2433 * @cdev - pointer to embedded class device
2434 * @buf - the buffer returned
2435 *
2436 * This is the firmware assigned device handle
2437 *
2438 * A sysfs 'read-only' shost attribute.
2439 */
2440static ssize_t
2441_ctl_device_handle_show(struct device *dev, struct device_attribute *attr,
2442 char *buf)
2443{
2444 struct scsi_device *sdev = to_scsi_device(dev);
2445 struct MPT2SAS_DEVICE *sas_device_priv_data = sdev->hostdata;
2446
2447 return snprintf(buf, PAGE_SIZE, "0x%04x\n",
2448 sas_device_priv_data->sas_target->handle);
2449}
2450static DEVICE_ATTR(sas_device_handle, S_IRUGO, _ctl_device_handle_show, NULL);
2451
2452struct device_attribute *mpt2sas_dev_attrs[] = {
2453 &dev_attr_sas_address,
2454 &dev_attr_sas_device_handle,
2455 NULL,
2456};
2457
2458static const struct file_operations ctl_fops = {
2459 .owner = THIS_MODULE,
2460 .unlocked_ioctl = _ctl_ioctl,
2461 .release = _ctl_release,
2462 .poll = _ctl_poll,
2463 .fasync = _ctl_fasync,
2464#ifdef CONFIG_COMPAT
2465 .compat_ioctl = _ctl_ioctl_compat,
2466#endif
2467};
2468
2469static struct miscdevice ctl_dev = {
2470 .minor = MPT2SAS_MINOR,
2471 .name = MPT2SAS_DEV_NAME,
2472 .fops = &ctl_fops,
2473};
2474
2475/**
2476 * mpt2sas_ctl_init - main entry point for ctl.
2477 *
2478 */
2479void
2480mpt2sas_ctl_init(void)
2481{
2482 async_queue = NULL;
2483 if (misc_register(&ctl_dev) < 0)
2484 printk(KERN_ERR "%s can't register misc device [minor=%d]\n",
2485 MPT2SAS_DRIVER_NAME, MPT2SAS_MINOR);
2486
2487 init_waitqueue_head(&ctl_poll_wait);
2488}
2489
2490/**
2491 * mpt2sas_ctl_exit - exit point for ctl
2492 *
2493 */
2494void
2495mpt2sas_ctl_exit(void)
2496{
2497 struct MPT2SAS_ADAPTER *ioc;
2498 int i;
2499
2500 list_for_each_entry(ioc, &mpt2sas_ioc_list, list) {
2501
2502 /* free memory associated to diag buffers */
2503 for (i = 0; i < MPI2_DIAG_BUF_TYPE_COUNT; i++) {
2504 if (!ioc->diag_buffer[i])
2505 continue;
2506 pci_free_consistent(ioc->pdev, ioc->diag_buffer_sz[i],
2507 ioc->diag_buffer[i], ioc->diag_buffer_dma[i]);
2508 ioc->diag_buffer[i] = NULL;
2509 ioc->diag_buffer_status[i] = 0;
2510 }
2511
2512 kfree(ioc->event_log);
2513 }
2514 misc_deregister(&ctl_dev);
2515}
2516
diff --git a/drivers/scsi/mpt2sas/mpt2sas_ctl.h b/drivers/scsi/mpt2sas/mpt2sas_ctl.h
new file mode 100644
index 000000000000..dbb6c0cf8889
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpt2sas_ctl.h
@@ -0,0 +1,416 @@
1/*
2 * Management Module Support for MPT (Message Passing Technology) based
3 * controllers
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_ctl.h
6 * Copyright (C) 2007-2008 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45#ifndef MPT2SAS_CTL_H_INCLUDED
46#define MPT2SAS_CTL_H_INCLUDED
47
48#ifdef __KERNEL__
49#include <linux/miscdevice.h>
50#endif
51
52#define MPT2SAS_DEV_NAME "mpt2ctl"
53#define MPT2_MAGIC_NUMBER 'm'
54#define MPT2_IOCTL_DEFAULT_TIMEOUT (10) /* in seconds */
55
56/**
57 * IOCTL opcodes
58 */
59#define MPT2IOCINFO _IOWR(MPT2_MAGIC_NUMBER, 17, \
60 struct mpt2_ioctl_iocinfo)
61#define MPT2COMMAND _IOWR(MPT2_MAGIC_NUMBER, 20, \
62 struct mpt2_ioctl_command)
63#ifdef CONFIG_COMPAT
64#define MPT2COMMAND32 _IOWR(MPT2_MAGIC_NUMBER, 20, \
65 struct mpt2_ioctl_command32)
66#endif
67#define MPT2EVENTQUERY _IOWR(MPT2_MAGIC_NUMBER, 21, \
68 struct mpt2_ioctl_eventquery)
69#define MPT2EVENTENABLE _IOWR(MPT2_MAGIC_NUMBER, 22, \
70 struct mpt2_ioctl_eventenable)
71#define MPT2EVENTREPORT _IOWR(MPT2_MAGIC_NUMBER, 23, \
72 struct mpt2_ioctl_eventreport)
73#define MPT2HARDRESET _IOWR(MPT2_MAGIC_NUMBER, 24, \
74 struct mpt2_ioctl_diag_reset)
75#define MPT2BTDHMAPPING _IOWR(MPT2_MAGIC_NUMBER, 31, \
76 struct mpt2_ioctl_btdh_mapping)
77
78/* diag buffer support */
79#define MPT2DIAGREGISTER _IOWR(MPT2_MAGIC_NUMBER, 26, \
80 struct mpt2_diag_register)
81#define MPT2DIAGRELEASE _IOWR(MPT2_MAGIC_NUMBER, 27, \
82 struct mpt2_diag_release)
83#define MPT2DIAGUNREGISTER _IOWR(MPT2_MAGIC_NUMBER, 28, \
84 struct mpt2_diag_unregister)
85#define MPT2DIAGQUERY _IOWR(MPT2_MAGIC_NUMBER, 29, \
86 struct mpt2_diag_query)
87#define MPT2DIAGREADBUFFER _IOWR(MPT2_MAGIC_NUMBER, 30, \
88 struct mpt2_diag_read_buffer)
89
90/**
91 * struct mpt2_ioctl_header - main header structure
92 * @ioc_number - IOC unit number
93 * @port_number - IOC port number
94 * @max_data_size - maximum number bytes to transfer on read
95 */
96struct mpt2_ioctl_header {
97 uint32_t ioc_number;
98 uint32_t port_number;
99 uint32_t max_data_size;
100};
101
102/**
103 * struct mpt2_ioctl_diag_reset - diagnostic reset
104 * @hdr - generic header
105 */
106struct mpt2_ioctl_diag_reset {
107 struct mpt2_ioctl_header hdr;
108};
109
110
111/**
112 * struct mpt2_ioctl_pci_info - pci device info
113 * @device - pci device id
114 * @function - pci function id
115 * @bus - pci bus id
116 * @segment_id - pci segment id
117 */
118struct mpt2_ioctl_pci_info {
119 union {
120 struct {
121 uint32_t device:5;
122 uint32_t function:3;
123 uint32_t bus:24;
124 } bits;
125 uint32_t word;
126 } u;
127 uint32_t segment_id;
128};
129
130
131#define MPT2_IOCTL_INTERFACE_SCSI (0x00)
132#define MPT2_IOCTL_INTERFACE_FC (0x01)
133#define MPT2_IOCTL_INTERFACE_FC_IP (0x02)
134#define MPT2_IOCTL_INTERFACE_SAS (0x03)
135#define MPT2_IOCTL_INTERFACE_SAS2 (0x04)
136#define MPT2_IOCTL_VERSION_LENGTH (32)
137
138/**
139 * struct mpt2_ioctl_iocinfo - generic controller info
140 * @hdr - generic header
141 * @adapter_type - type of adapter (spi, fc, sas)
142 * @port_number - port number
143 * @pci_id - PCI Id
144 * @hw_rev - hardware revision
145 * @sub_system_device - PCI subsystem Device ID
146 * @sub_system_vendor - PCI subsystem Vendor ID
147 * @rsvd0 - reserved
148 * @firmware_version - firmware version
149 * @bios_version - BIOS version
150 * @driver_version - driver version - 32 ASCII characters
151 * @rsvd1 - reserved
152 * @scsi_id - scsi id of adapter 0
153 * @rsvd2 - reserved
154 * @pci_information - pci info (2nd revision)
155 */
156struct mpt2_ioctl_iocinfo {
157 struct mpt2_ioctl_header hdr;
158 uint32_t adapter_type;
159 uint32_t port_number;
160 uint32_t pci_id;
161 uint32_t hw_rev;
162 uint32_t subsystem_device;
163 uint32_t subsystem_vendor;
164 uint32_t rsvd0;
165 uint32_t firmware_version;
166 uint32_t bios_version;
167 uint8_t driver_version[MPT2_IOCTL_VERSION_LENGTH];
168 uint8_t rsvd1;
169 uint8_t scsi_id;
170 uint16_t rsvd2;
171 struct mpt2_ioctl_pci_info pci_information;
172};
173
174
175/* number of event log entries */
176#define MPT2SAS_CTL_EVENT_LOG_SIZE (50)
177
178/**
179 * struct mpt2_ioctl_eventquery - query event count and type
180 * @hdr - generic header
181 * @event_entries - number of events returned by get_event_report
182 * @rsvd - reserved
183 * @event_types - type of events currently being captured
184 */
185struct mpt2_ioctl_eventquery {
186 struct mpt2_ioctl_header hdr;
187 uint16_t event_entries;
188 uint16_t rsvd;
189 uint32_t event_types[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
190};
191
192/**
193 * struct mpt2_ioctl_eventenable - enable/disable event capturing
194 * @hdr - generic header
195 * @event_types - toggle off/on type of events to be captured
196 */
197struct mpt2_ioctl_eventenable {
198 struct mpt2_ioctl_header hdr;
199 uint32_t event_types[4];
200};
201
202#define MPT2_EVENT_DATA_SIZE (192)
203/**
204 * struct MPT2_IOCTL_EVENTS -
205 * @event - the event that was reported
206 * @context - unique value for each event assigned by driver
207 * @data - event data returned in fw reply message
208 */
209struct MPT2_IOCTL_EVENTS {
210 uint32_t event;
211 uint32_t context;
212 uint8_t data[MPT2_EVENT_DATA_SIZE];
213};
214
215/**
216 * struct mpt2_ioctl_eventreport - returing event log
217 * @hdr - generic header
218 * @event_data - (see struct MPT2_IOCTL_EVENTS)
219 */
220struct mpt2_ioctl_eventreport {
221 struct mpt2_ioctl_header hdr;
222 struct MPT2_IOCTL_EVENTS event_data[1];
223};
224
225/**
226 * struct mpt2_ioctl_command - generic mpt firmware passthru ioclt
227 * @hdr - generic header
228 * @timeout - command timeout in seconds. (if zero then use driver default
229 * value).
230 * @reply_frame_buf_ptr - reply location
231 * @data_in_buf_ptr - destination for read
232 * @data_out_buf_ptr - data source for write
233 * @sense_data_ptr - sense data location
234 * @max_reply_bytes - maximum number of reply bytes to be sent to app.
235 * @data_in_size - number bytes for data transfer in (read)
236 * @data_out_size - number bytes for data transfer out (write)
237 * @max_sense_bytes - maximum number of bytes for auto sense buffers
238 * @data_sge_offset - offset in words from the start of the request message to
239 * the first SGL
240 * @mf[1];
241 */
242struct mpt2_ioctl_command {
243 struct mpt2_ioctl_header hdr;
244 uint32_t timeout;
245 void __user *reply_frame_buf_ptr;
246 void __user *data_in_buf_ptr;
247 void __user *data_out_buf_ptr;
248 void __user *sense_data_ptr;
249 uint32_t max_reply_bytes;
250 uint32_t data_in_size;
251 uint32_t data_out_size;
252 uint32_t max_sense_bytes;
253 uint32_t data_sge_offset;
254 uint8_t mf[1];
255};
256
257#ifdef CONFIG_COMPAT
258struct mpt2_ioctl_command32 {
259 struct mpt2_ioctl_header hdr;
260 uint32_t timeout;
261 uint32_t reply_frame_buf_ptr;
262 uint32_t data_in_buf_ptr;
263 uint32_t data_out_buf_ptr;
264 uint32_t sense_data_ptr;
265 uint32_t max_reply_bytes;
266 uint32_t data_in_size;
267 uint32_t data_out_size;
268 uint32_t max_sense_bytes;
269 uint32_t data_sge_offset;
270 uint8_t mf[1];
271};
272#endif
273
274/**
275 * struct mpt2_ioctl_btdh_mapping - mapping info
276 * @hdr - generic header
277 * @id - target device identification number
278 * @bus - SCSI bus number that the target device exists on
279 * @handle - device handle for the target device
280 * @rsvd - reserved
281 *
282 * To obtain a bus/id the application sets
283 * handle to valid handle, and bus/id to 0xFFFF.
284 *
285 * To obtain the device handle the application sets
286 * bus/id valid value, and the handle to 0xFFFF.
287 */
288struct mpt2_ioctl_btdh_mapping {
289 struct mpt2_ioctl_header hdr;
290 uint32_t id;
291 uint32_t bus;
292 uint16_t handle;
293 uint16_t rsvd;
294};
295
296
297/* status bits for ioc->diag_buffer_status */
298#define MPT2_DIAG_BUFFER_IS_REGISTERED (0x01)
299#define MPT2_DIAG_BUFFER_IS_RELEASED (0x02)
300
301/* application flags for mpt2_diag_register, mpt2_diag_query */
302#define MPT2_APP_FLAGS_APP_OWNED (0x0001)
303#define MPT2_APP_FLAGS_BUFFER_VALID (0x0002)
304#define MPT2_APP_FLAGS_FW_BUFFER_ACCESS (0x0004)
305
306/* flags for mpt2_diag_read_buffer */
307#define MPT2_FLAGS_REREGISTER (0x0001)
308
309#define MPT2_PRODUCT_SPECIFIC_DWORDS 23
310
311/**
312 * struct mpt2_diag_register - application register with driver
313 * @hdr - generic header
314 * @reserved -
315 * @buffer_type - specifies either TRACE or SNAPSHOT
316 * @application_flags - misc flags
317 * @diagnostic_flags - specifies flags affecting command processing
318 * @product_specific - product specific information
319 * @requested_buffer_size - buffers size in bytes
320 * @unique_id - tag specified by application that is used to signal ownership
321 * of the buffer.
322 *
323 * This will allow the driver to setup any required buffers that will be
324 * needed by firmware to communicate with the driver.
325 */
326struct mpt2_diag_register {
327 struct mpt2_ioctl_header hdr;
328 uint8_t reserved;
329 uint8_t buffer_type;
330 uint16_t application_flags;
331 uint32_t diagnostic_flags;
332 uint32_t product_specific[MPT2_PRODUCT_SPECIFIC_DWORDS];
333 uint32_t requested_buffer_size;
334 uint32_t unique_id;
335};
336
337/**
338 * struct mpt2_diag_unregister - application unregister with driver
339 * @hdr - generic header
340 * @unique_id - tag uniquely identifies the buffer to be unregistered
341 *
342 * This will allow the driver to cleanup any memory allocated for diag
343 * messages and to free up any resources.
344 */
345struct mpt2_diag_unregister {
346 struct mpt2_ioctl_header hdr;
347 uint32_t unique_id;
348};
349
350/**
351 * struct mpt2_diag_query - query relevant info associated with diag buffers
352 * @hdr - generic header
353 * @reserved -
354 * @buffer_type - specifies either TRACE or SNAPSHOT
355 * @application_flags - misc flags
356 * @diagnostic_flags - specifies flags affecting command processing
357 * @product_specific - product specific information
358 * @total_buffer_size - diag buffer size in bytes
359 * @driver_added_buffer_size - size of extra space appended to end of buffer
360 * @unique_id - unique id associated with this buffer.
361 *
362 * The application will send only buffer_type and unique_id. Driver will
363 * inspect unique_id first, if valid, fill in all the info. If unique_id is
364 * 0x00, the driver will return info specified by Buffer Type.
365 */
366struct mpt2_diag_query {
367 struct mpt2_ioctl_header hdr;
368 uint8_t reserved;
369 uint8_t buffer_type;
370 uint16_t application_flags;
371 uint32_t diagnostic_flags;
372 uint32_t product_specific[MPT2_PRODUCT_SPECIFIC_DWORDS];
373 uint32_t total_buffer_size;
374 uint32_t driver_added_buffer_size;
375 uint32_t unique_id;
376};
377
378/**
379 * struct mpt2_diag_release - request to send Diag Release Message to firmware
380 * @hdr - generic header
381 * @unique_id - tag uniquely identifies the buffer to be released
382 *
383 * This allows ownership of the specified buffer to returned to the driver,
384 * allowing an application to read the buffer without fear that firmware is
385 * overwritting information in the buffer.
386 */
387struct mpt2_diag_release {
388 struct mpt2_ioctl_header hdr;
389 uint32_t unique_id;
390};
391
392/**
393 * struct mpt2_diag_read_buffer - request for copy of the diag buffer
394 * @hdr - generic header
395 * @status -
396 * @reserved -
397 * @flags - misc flags
398 * @starting_offset - starting offset within drivers buffer where to start
399 * reading data at into the specified application buffer
400 * @bytes_to_read - number of bytes to copy from the drivers buffer into the
401 * application buffer starting at starting_offset.
402 * @unique_id - unique id associated with this buffer.
403 * @diagnostic_data - data payload
404 */
405struct mpt2_diag_read_buffer {
406 struct mpt2_ioctl_header hdr;
407 uint8_t status;
408 uint8_t reserved;
409 uint16_t flags;
410 uint32_t starting_offset;
411 uint32_t bytes_to_read;
412 uint32_t unique_id;
413 uint32_t diagnostic_data[1];
414};
415
416#endif /* MPT2SAS_CTL_H_INCLUDED */
diff --git a/drivers/scsi/mpt2sas/mpt2sas_debug.h b/drivers/scsi/mpt2sas/mpt2sas_debug.h
new file mode 100644
index 000000000000..ad325096e842
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpt2sas_debug.h
@@ -0,0 +1,181 @@
1/*
2 * Logging Support for MPT (Message Passing Technology) based controllers
3 *
4 * This code is based on drivers/scsi/mpt2sas/mpt2_debug.c
5 * Copyright (C) 2007-2008 LSI Corporation
6 * (mailto:DL-MPTFusionLinux@lsi.com)
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * NO WARRANTY
19 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
20 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
23 * solely responsible for determining the appropriateness of using and
24 * distributing the Program and assumes all risks associated with its
25 * exercise of rights under this Agreement, including but not limited to
26 * the risks and costs of program errors, damage to or loss of data,
27 * programs or equipment, and unavailability or interruption of operations.
28
29 * DISCLAIMER OF LIABILITY
30 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
31 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
33 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
35 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
36 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
37
38 * You should have received a copy of the GNU General Public License
39 * along with this program; if not, write to the Free Software
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
41 * USA.
42 */
43
44#ifndef MPT2SAS_DEBUG_H_INCLUDED
45#define MPT2SAS_DEBUG_H_INCLUDED
46
47#define MPT_DEBUG 0x00000001
48#define MPT_DEBUG_MSG_FRAME 0x00000002
49#define MPT_DEBUG_SG 0x00000004
50#define MPT_DEBUG_EVENTS 0x00000008
51#define MPT_DEBUG_EVENT_WORK_TASK 0x00000010
52#define MPT_DEBUG_INIT 0x00000020
53#define MPT_DEBUG_EXIT 0x00000040
54#define MPT_DEBUG_FAIL 0x00000080
55#define MPT_DEBUG_TM 0x00000100
56#define MPT_DEBUG_REPLY 0x00000200
57#define MPT_DEBUG_HANDSHAKE 0x00000400
58#define MPT_DEBUG_CONFIG 0x00000800
59#define MPT_DEBUG_DL 0x00001000
60#define MPT_DEBUG_RESET 0x00002000
61#define MPT_DEBUG_SCSI 0x00004000
62#define MPT_DEBUG_IOCTL 0x00008000
63#define MPT_DEBUG_CSMISAS 0x00010000
64#define MPT_DEBUG_SAS 0x00020000
65#define MPT_DEBUG_TRANSPORT 0x00040000
66#define MPT_DEBUG_TASK_SET_FULL 0x00080000
67
68#define MPT_DEBUG_TARGET_MODE 0x00100000
69
70
71/*
72 * CONFIG_SCSI_MPT2SAS_LOGGING - enabled in Kconfig
73 */
74
75#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
76#define MPT_CHECK_LOGGING(IOC, CMD, BITS) \
77{ \
78 if (IOC->logging_level & BITS) \
79 CMD; \
80}
81#else
82#define MPT_CHECK_LOGGING(IOC, CMD, BITS)
83#endif /* CONFIG_SCSI_MPT2SAS_LOGGING */
84
85
86/*
87 * debug macros
88 */
89
90#define dprintk(IOC, CMD) \
91 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG)
92
93#define dsgprintk(IOC, CMD) \
94 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SG)
95
96#define devtprintk(IOC, CMD) \
97 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EVENTS)
98
99#define dewtprintk(IOC, CMD) \
100 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EVENT_WORK_TASK)
101
102#define dinitprintk(IOC, CMD) \
103 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_INIT)
104
105#define dexitprintk(IOC, CMD) \
106 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EXIT)
107
108#define dfailprintk(IOC, CMD) \
109 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_FAIL)
110
111#define dtmprintk(IOC, CMD) \
112 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_TM)
113
114#define dreplyprintk(IOC, CMD) \
115 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_REPLY)
116
117#define dhsprintk(IOC, CMD) \
118 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_HANDSHAKE)
119
120#define dcprintk(IOC, CMD) \
121 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_CONFIG)
122
123#define ddlprintk(IOC, CMD) \
124 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_DL)
125
126#define drsprintk(IOC, CMD) \
127 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_RESET)
128
129#define dsprintk(IOC, CMD) \
130 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SCSI)
131
132#define dctlprintk(IOC, CMD) \
133 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_IOCTL)
134
135#define dcsmisasprintk(IOC, CMD) \
136 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_CSMISAS)
137
138#define dsasprintk(IOC, CMD) \
139 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SAS)
140
141#define dsastransport(IOC, CMD) \
142 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SAS_WIDE)
143
144#define dmfprintk(IOC, CMD) \
145 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_MSG_FRAME)
146
147#define dtsfprintk(IOC, CMD) \
148 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_TASK_SET_FULL)
149
150#define dtransportprintk(IOC, CMD) \
151 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_TRANSPORT)
152
153#define dTMprintk(IOC, CMD) \
154 MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_TARGET_MODE)
155
156/* inline functions for dumping debug data*/
157#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
158/**
159 * _debug_dump_mf - print message frame contents
160 * @mpi_request: pointer to message frame
161 * @sz: number of dwords
162 */
163static inline void
164_debug_dump_mf(void *mpi_request, int sz)
165{
166 int i;
167 u32 *mfp = (u32 *)mpi_request;
168
169 printk(KERN_INFO "mf:\n\t");
170 for (i = 0; i < sz; i++) {
171 if (i && ((i % 8) == 0))
172 printk("\n\t");
173 printk("%08x ", le32_to_cpu(mfp[i]));
174 }
175 printk("\n");
176}
177#else
178#define _debug_dump_mf(mpi_request, sz)
179#endif /* CONFIG_SCSI_MPT2SAS_LOGGING */
180
181#endif /* MPT2SAS_DEBUG_H_INCLUDED */
diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
new file mode 100644
index 000000000000..0c463c483c02
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c
@@ -0,0 +1,5687 @@
1/*
2 * Scsi Host Layer for MPT (Message Passing Technology) based controllers
3 *
4 * This code is based on drivers/scsi/mpt2sas/mpt2_scsih.c
5 * Copyright (C) 2007-2008 LSI Corporation
6 * (mailto:DL-MPTFusionLinux@lsi.com)
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * NO WARRANTY
19 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
20 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
23 * solely responsible for determining the appropriateness of using and
24 * distributing the Program and assumes all risks associated with its
25 * exercise of rights under this Agreement, including but not limited to
26 * the risks and costs of program errors, damage to or loss of data,
27 * programs or equipment, and unavailability or interruption of operations.
28
29 * DISCLAIMER OF LIABILITY
30 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
31 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
33 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
35 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
36 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
37
38 * You should have received a copy of the GNU General Public License
39 * along with this program; if not, write to the Free Software
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
41 * USA.
42 */
43
44#include <linux/version.h>
45#include <linux/module.h>
46#include <linux/kernel.h>
47#include <linux/init.h>
48#include <linux/errno.h>
49#include <linux/blkdev.h>
50#include <linux/sched.h>
51#include <linux/workqueue.h>
52#include <linux/delay.h>
53#include <linux/pci.h>
54#include <linux/interrupt.h>
55
56#include "mpt2sas_base.h"
57
58MODULE_AUTHOR(MPT2SAS_AUTHOR);
59MODULE_DESCRIPTION(MPT2SAS_DESCRIPTION);
60MODULE_LICENSE("GPL");
61MODULE_VERSION(MPT2SAS_DRIVER_VERSION);
62
63#define RAID_CHANNEL 1
64
65/* forward proto's */
66static void _scsih_expander_node_remove(struct MPT2SAS_ADAPTER *ioc,
67 struct _sas_node *sas_expander);
68static void _firmware_event_work(struct work_struct *work);
69
70/* global parameters */
71LIST_HEAD(mpt2sas_ioc_list);
72
73/* local parameters */
74static u8 scsi_io_cb_idx = -1;
75static u8 tm_cb_idx = -1;
76static u8 ctl_cb_idx = -1;
77static u8 base_cb_idx = -1;
78static u8 transport_cb_idx = -1;
79static u8 config_cb_idx = -1;
80static int mpt_ids;
81
82/* command line options */
83static u32 logging_level;
84MODULE_PARM_DESC(logging_level, " bits for enabling additional logging info "
85 "(default=0)");
86
87/* scsi-mid layer global parmeter is max_report_luns, which is 511 */
88#define MPT2SAS_MAX_LUN (16895)
89static int max_lun = MPT2SAS_MAX_LUN;
90module_param(max_lun, int, 0);
91MODULE_PARM_DESC(max_lun, " max lun, default=16895 ");
92
93/**
94 * struct sense_info - common structure for obtaining sense keys
95 * @skey: sense key
96 * @asc: additional sense code
97 * @ascq: additional sense code qualifier
98 */
99struct sense_info {
100 u8 skey;
101 u8 asc;
102 u8 ascq;
103};
104
105
106#define MPT2SAS_RESCAN_AFTER_HOST_RESET (0xFFFF)
107/**
108 * struct fw_event_work - firmware event struct
109 * @list: link list framework
110 * @work: work object (ioc->fault_reset_work_q)
111 * @ioc: per adapter object
112 * @VF_ID: virtual function id
113 * @host_reset_handling: handling events during host reset
114 * @ignore: flag meaning this event has been marked to ignore
115 * @event: firmware event MPI2_EVENT_XXX defined in mpt2_ioc.h
116 * @event_data: reply event data payload follows
117 *
118 * This object stored on ioc->fw_event_list.
119 */
120struct fw_event_work {
121 struct list_head list;
122 struct delayed_work work;
123 struct MPT2SAS_ADAPTER *ioc;
124 u8 VF_ID;
125 u8 host_reset_handling;
126 u8 ignore;
127 u16 event;
128 void *event_data;
129};
130
131/**
132 * struct _scsi_io_transfer - scsi io transfer
133 * @handle: sas device handle (assigned by firmware)
134 * @is_raid: flag set for hidden raid components
135 * @dir: DMA_TO_DEVICE, DMA_FROM_DEVICE,
136 * @data_length: data transfer length
137 * @data_dma: dma pointer to data
138 * @sense: sense data
139 * @lun: lun number
140 * @cdb_length: cdb length
141 * @cdb: cdb contents
142 * @valid_reply: flag set for reply message
143 * @timeout: timeout for this command
144 * @sense_length: sense length
145 * @ioc_status: ioc status
146 * @scsi_state: scsi state
147 * @scsi_status: scsi staus
148 * @log_info: log information
149 * @transfer_length: data length transfer when there is a reply message
150 *
151 * Used for sending internal scsi commands to devices within this module.
152 * Refer to _scsi_send_scsi_io().
153 */
154struct _scsi_io_transfer {
155 u16 handle;
156 u8 is_raid;
157 enum dma_data_direction dir;
158 u32 data_length;
159 dma_addr_t data_dma;
160 u8 sense[SCSI_SENSE_BUFFERSIZE];
161 u32 lun;
162 u8 cdb_length;
163 u8 cdb[32];
164 u8 timeout;
165 u8 valid_reply;
166 /* the following bits are only valid when 'valid_reply = 1' */
167 u32 sense_length;
168 u16 ioc_status;
169 u8 scsi_state;
170 u8 scsi_status;
171 u32 log_info;
172 u32 transfer_length;
173};
174
175/*
176 * The pci device ids are defined in mpi/mpi2_cnfg.h.
177 */
178static struct pci_device_id scsih_pci_table[] = {
179 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004,
180 PCI_ANY_ID, PCI_ANY_ID },
181 /* Falcon ~ 2008*/
182 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008,
183 PCI_ANY_ID, PCI_ANY_ID },
184 /* Liberator ~ 2108 */
185 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1,
186 PCI_ANY_ID, PCI_ANY_ID },
187 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2,
188 PCI_ANY_ID, PCI_ANY_ID },
189 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3,
190 PCI_ANY_ID, PCI_ANY_ID },
191 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1,
192 PCI_ANY_ID, PCI_ANY_ID },
193 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2,
194 PCI_ANY_ID, PCI_ANY_ID },
195 {0} /* Terminating entry */
196};
197MODULE_DEVICE_TABLE(pci, scsih_pci_table);
198
199/**
200 * scsih_set_debug_level - global setting of ioc->logging_level.
201 *
202 * Note: The logging levels are defined in mpt2sas_debug.h.
203 */
204static int
205scsih_set_debug_level(const char *val, struct kernel_param *kp)
206{
207 int ret = param_set_int(val, kp);
208 struct MPT2SAS_ADAPTER *ioc;
209
210 if (ret)
211 return ret;
212
213 printk(KERN_INFO "setting logging_level(0x%08x)\n", logging_level);
214 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
215 ioc->logging_level = logging_level;
216 return 0;
217}
218module_param_call(logging_level, scsih_set_debug_level, param_get_int,
219 &logging_level, 0644);
220
221/**
222 * _scsih_srch_boot_sas_address - search based on sas_address
223 * @sas_address: sas address
224 * @boot_device: boot device object from bios page 2
225 *
226 * Returns 1 when there's a match, 0 means no match.
227 */
228static inline int
229_scsih_srch_boot_sas_address(u64 sas_address,
230 Mpi2BootDeviceSasWwid_t *boot_device)
231{
232 return (sas_address == le64_to_cpu(boot_device->SASAddress)) ? 1 : 0;
233}
234
235/**
236 * _scsih_srch_boot_device_name - search based on device name
237 * @device_name: device name specified in INDENTIFY fram
238 * @boot_device: boot device object from bios page 2
239 *
240 * Returns 1 when there's a match, 0 means no match.
241 */
242static inline int
243_scsih_srch_boot_device_name(u64 device_name,
244 Mpi2BootDeviceDeviceName_t *boot_device)
245{
246 return (device_name == le64_to_cpu(boot_device->DeviceName)) ? 1 : 0;
247}
248
249/**
250 * _scsih_srch_boot_encl_slot - search based on enclosure_logical_id/slot
251 * @enclosure_logical_id: enclosure logical id
252 * @slot_number: slot number
253 * @boot_device: boot device object from bios page 2
254 *
255 * Returns 1 when there's a match, 0 means no match.
256 */
257static inline int
258_scsih_srch_boot_encl_slot(u64 enclosure_logical_id, u16 slot_number,
259 Mpi2BootDeviceEnclosureSlot_t *boot_device)
260{
261 return (enclosure_logical_id == le64_to_cpu(boot_device->
262 EnclosureLogicalID) && slot_number == le16_to_cpu(boot_device->
263 SlotNumber)) ? 1 : 0;
264}
265
266/**
267 * _scsih_is_boot_device - search for matching boot device.
268 * @sas_address: sas address
269 * @device_name: device name specified in INDENTIFY fram
270 * @enclosure_logical_id: enclosure logical id
271 * @slot_number: slot number
272 * @form: specifies boot device form
273 * @boot_device: boot device object from bios page 2
274 *
275 * Returns 1 when there's a match, 0 means no match.
276 */
277static int
278_scsih_is_boot_device(u64 sas_address, u64 device_name,
279 u64 enclosure_logical_id, u16 slot, u8 form,
280 Mpi2BiosPage2BootDevice_t *boot_device)
281{
282 int rc = 0;
283
284 switch (form) {
285 case MPI2_BIOSPAGE2_FORM_SAS_WWID:
286 if (!sas_address)
287 break;
288 rc = _scsih_srch_boot_sas_address(
289 sas_address, &boot_device->SasWwid);
290 break;
291 case MPI2_BIOSPAGE2_FORM_ENCLOSURE_SLOT:
292 if (!enclosure_logical_id)
293 break;
294 rc = _scsih_srch_boot_encl_slot(
295 enclosure_logical_id,
296 slot, &boot_device->EnclosureSlot);
297 break;
298 case MPI2_BIOSPAGE2_FORM_DEVICE_NAME:
299 if (!device_name)
300 break;
301 rc = _scsih_srch_boot_device_name(
302 device_name, &boot_device->DeviceName);
303 break;
304 case MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED:
305 break;
306 }
307
308 return rc;
309}
310
311/**
312 * _scsih_determine_boot_device - determine boot device.
313 * @ioc: per adapter object
314 * @device: either sas_device or raid_device object
315 * @is_raid: [flag] 1 = raid object, 0 = sas object
316 *
317 * Determines whether this device should be first reported device to
318 * to scsi-ml or sas transport, this purpose is for persistant boot device.
319 * There are primary, alternate, and current entries in bios page 2. The order
320 * priority is primary, alternate, then current. This routine saves
321 * the corresponding device object and is_raid flag in the ioc object.
322 * The saved data to be used later in _scsih_probe_boot_devices().
323 */
324static void
325_scsih_determine_boot_device(struct MPT2SAS_ADAPTER *ioc,
326 void *device, u8 is_raid)
327{
328 struct _sas_device *sas_device;
329 struct _raid_device *raid_device;
330 u64 sas_address;
331 u64 device_name;
332 u64 enclosure_logical_id;
333 u16 slot;
334
335 /* only process this function when driver loads */
336 if (!ioc->wait_for_port_enable_to_complete)
337 return;
338
339 if (!is_raid) {
340 sas_device = device;
341 sas_address = sas_device->sas_address;
342 device_name = sas_device->device_name;
343 enclosure_logical_id = sas_device->enclosure_logical_id;
344 slot = sas_device->slot;
345 } else {
346 raid_device = device;
347 sas_address = raid_device->wwid;
348 device_name = 0;
349 enclosure_logical_id = 0;
350 slot = 0;
351 }
352
353 if (!ioc->req_boot_device.device) {
354 if (_scsih_is_boot_device(sas_address, device_name,
355 enclosure_logical_id, slot,
356 (ioc->bios_pg2.ReqBootDeviceForm &
357 MPI2_BIOSPAGE2_FORM_MASK),
358 &ioc->bios_pg2.RequestedBootDevice)) {
359 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT
360 "%s: req_boot_device(0x%016llx)\n",
361 ioc->name, __func__,
362 (unsigned long long)sas_address));
363 ioc->req_boot_device.device = device;
364 ioc->req_boot_device.is_raid = is_raid;
365 }
366 }
367
368 if (!ioc->req_alt_boot_device.device) {
369 if (_scsih_is_boot_device(sas_address, device_name,
370 enclosure_logical_id, slot,
371 (ioc->bios_pg2.ReqAltBootDeviceForm &
372 MPI2_BIOSPAGE2_FORM_MASK),
373 &ioc->bios_pg2.RequestedAltBootDevice)) {
374 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT
375 "%s: req_alt_boot_device(0x%016llx)\n",
376 ioc->name, __func__,
377 (unsigned long long)sas_address));
378 ioc->req_alt_boot_device.device = device;
379 ioc->req_alt_boot_device.is_raid = is_raid;
380 }
381 }
382
383 if (!ioc->current_boot_device.device) {
384 if (_scsih_is_boot_device(sas_address, device_name,
385 enclosure_logical_id, slot,
386 (ioc->bios_pg2.CurrentBootDeviceForm &
387 MPI2_BIOSPAGE2_FORM_MASK),
388 &ioc->bios_pg2.CurrentBootDevice)) {
389 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT
390 "%s: current_boot_device(0x%016llx)\n",
391 ioc->name, __func__,
392 (unsigned long long)sas_address));
393 ioc->current_boot_device.device = device;
394 ioc->current_boot_device.is_raid = is_raid;
395 }
396 }
397}
398
399/**
400 * mpt2sas_scsih_sas_device_find_by_sas_address - sas device search
401 * @ioc: per adapter object
402 * @sas_address: sas address
403 * Context: Calling function should acquire ioc->sas_device_lock
404 *
405 * This searches for sas_device based on sas_address, then return sas_device
406 * object.
407 */
408struct _sas_device *
409mpt2sas_scsih_sas_device_find_by_sas_address(struct MPT2SAS_ADAPTER *ioc,
410 u64 sas_address)
411{
412 struct _sas_device *sas_device, *r;
413
414 r = NULL;
415 /* check the sas_device_init_list */
416 list_for_each_entry(sas_device, &ioc->sas_device_init_list,
417 list) {
418 if (sas_device->sas_address != sas_address)
419 continue;
420 r = sas_device;
421 goto out;
422 }
423
424 /* then check the sas_device_list */
425 list_for_each_entry(sas_device, &ioc->sas_device_list, list) {
426 if (sas_device->sas_address != sas_address)
427 continue;
428 r = sas_device;
429 goto out;
430 }
431 out:
432 return r;
433}
434
435/**
436 * _scsih_sas_device_find_by_handle - sas device search
437 * @ioc: per adapter object
438 * @handle: sas device handle (assigned by firmware)
439 * Context: Calling function should acquire ioc->sas_device_lock
440 *
441 * This searches for sas_device based on sas_address, then return sas_device
442 * object.
443 */
444static struct _sas_device *
445_scsih_sas_device_find_by_handle(struct MPT2SAS_ADAPTER *ioc, u16 handle)
446{
447 struct _sas_device *sas_device, *r;
448
449 r = NULL;
450 if (ioc->wait_for_port_enable_to_complete) {
451 list_for_each_entry(sas_device, &ioc->sas_device_init_list,
452 list) {
453 if (sas_device->handle != handle)
454 continue;
455 r = sas_device;
456 goto out;
457 }
458 } else {
459 list_for_each_entry(sas_device, &ioc->sas_device_list, list) {
460 if (sas_device->handle != handle)
461 continue;
462 r = sas_device;
463 goto out;
464 }
465 }
466
467 out:
468 return r;
469}
470
471/**
472 * _scsih_sas_device_remove - remove sas_device from list.
473 * @ioc: per adapter object
474 * @sas_device: the sas_device object
475 * Context: This function will acquire ioc->sas_device_lock.
476 *
477 * Removing object and freeing associated memory from the ioc->sas_device_list.
478 */
479static void
480_scsih_sas_device_remove(struct MPT2SAS_ADAPTER *ioc,
481 struct _sas_device *sas_device)
482{
483 unsigned long flags;
484
485 spin_lock_irqsave(&ioc->sas_device_lock, flags);
486 list_del(&sas_device->list);
487 memset(sas_device, 0, sizeof(struct _sas_device));
488 kfree(sas_device);
489 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
490}
491
492/**
493 * _scsih_sas_device_add - insert sas_device to the list.
494 * @ioc: per adapter object
495 * @sas_device: the sas_device object
496 * Context: This function will acquire ioc->sas_device_lock.
497 *
498 * Adding new object to the ioc->sas_device_list.
499 */
500static void
501_scsih_sas_device_add(struct MPT2SAS_ADAPTER *ioc,
502 struct _sas_device *sas_device)
503{
504 unsigned long flags;
505 u16 handle, parent_handle;
506 u64 sas_address;
507
508 dewtprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: handle"
509 "(0x%04x), sas_addr(0x%016llx)\n", ioc->name, __func__,
510 sas_device->handle, (unsigned long long)sas_device->sas_address));
511
512 spin_lock_irqsave(&ioc->sas_device_lock, flags);
513 list_add_tail(&sas_device->list, &ioc->sas_device_list);
514 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
515
516 handle = sas_device->handle;
517 parent_handle = sas_device->parent_handle;
518 sas_address = sas_device->sas_address;
519 if (!mpt2sas_transport_port_add(ioc, handle, parent_handle)) {
520 _scsih_sas_device_remove(ioc, sas_device);
521 } else if (!sas_device->starget) {
522 mpt2sas_transport_port_remove(ioc, sas_address, parent_handle);
523 _scsih_sas_device_remove(ioc, sas_device);
524 }
525}
526
527/**
528 * _scsih_sas_device_init_add - insert sas_device to the list.
529 * @ioc: per adapter object
530 * @sas_device: the sas_device object
531 * Context: This function will acquire ioc->sas_device_lock.
532 *
533 * Adding new object at driver load time to the ioc->sas_device_init_list.
534 */
535static void
536_scsih_sas_device_init_add(struct MPT2SAS_ADAPTER *ioc,
537 struct _sas_device *sas_device)
538{
539 unsigned long flags;
540
541 dewtprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: handle"
542 "(0x%04x), sas_addr(0x%016llx)\n", ioc->name, __func__,
543 sas_device->handle, (unsigned long long)sas_device->sas_address));
544
545 spin_lock_irqsave(&ioc->sas_device_lock, flags);
546 list_add_tail(&sas_device->list, &ioc->sas_device_init_list);
547 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
548 _scsih_determine_boot_device(ioc, sas_device, 0);
549}
550
551/**
552 * mpt2sas_scsih_expander_find_by_handle - expander device search
553 * @ioc: per adapter object
554 * @handle: expander handle (assigned by firmware)
555 * Context: Calling function should acquire ioc->sas_device_lock
556 *
557 * This searches for expander device based on handle, then returns the
558 * sas_node object.
559 */
560struct _sas_node *
561mpt2sas_scsih_expander_find_by_handle(struct MPT2SAS_ADAPTER *ioc, u16 handle)
562{
563 struct _sas_node *sas_expander, *r;
564
565 r = NULL;
566 list_for_each_entry(sas_expander, &ioc->sas_expander_list, list) {
567 if (sas_expander->handle != handle)
568 continue;
569 r = sas_expander;
570 goto out;
571 }
572 out:
573 return r;
574}
575
576/**
577 * _scsih_raid_device_find_by_id - raid device search
578 * @ioc: per adapter object
579 * @id: sas device target id
580 * @channel: sas device channel
581 * Context: Calling function should acquire ioc->raid_device_lock
582 *
583 * This searches for raid_device based on target id, then return raid_device
584 * object.
585 */
586static struct _raid_device *
587_scsih_raid_device_find_by_id(struct MPT2SAS_ADAPTER *ioc, int id, int channel)
588{
589 struct _raid_device *raid_device, *r;
590
591 r = NULL;
592 list_for_each_entry(raid_device, &ioc->raid_device_list, list) {
593 if (raid_device->id == id && raid_device->channel == channel) {
594 r = raid_device;
595 goto out;
596 }
597 }
598
599 out:
600 return r;
601}
602
603/**
604 * _scsih_raid_device_find_by_handle - raid device search
605 * @ioc: per adapter object
606 * @handle: sas device handle (assigned by firmware)
607 * Context: Calling function should acquire ioc->raid_device_lock
608 *
609 * This searches for raid_device based on handle, then return raid_device
610 * object.
611 */
612static struct _raid_device *
613_scsih_raid_device_find_by_handle(struct MPT2SAS_ADAPTER *ioc, u16 handle)
614{
615 struct _raid_device *raid_device, *r;
616
617 r = NULL;
618 list_for_each_entry(raid_device, &ioc->raid_device_list, list) {
619 if (raid_device->handle != handle)
620 continue;
621 r = raid_device;
622 goto out;
623 }
624
625 out:
626 return r;
627}
628
629/**
630 * _scsih_raid_device_find_by_wwid - raid device search
631 * @ioc: per adapter object
632 * @handle: sas device handle (assigned by firmware)
633 * Context: Calling function should acquire ioc->raid_device_lock
634 *
635 * This searches for raid_device based on wwid, then return raid_device
636 * object.
637 */
638static struct _raid_device *
639_scsih_raid_device_find_by_wwid(struct MPT2SAS_ADAPTER *ioc, u64 wwid)
640{
641 struct _raid_device *raid_device, *r;
642
643 r = NULL;
644 list_for_each_entry(raid_device, &ioc->raid_device_list, list) {
645 if (raid_device->wwid != wwid)
646 continue;
647 r = raid_device;
648 goto out;
649 }
650
651 out:
652 return r;
653}
654
655/**
656 * _scsih_raid_device_add - add raid_device object
657 * @ioc: per adapter object
658 * @raid_device: raid_device object
659 *
660 * This is added to the raid_device_list link list.
661 */
662static void
663_scsih_raid_device_add(struct MPT2SAS_ADAPTER *ioc,
664 struct _raid_device *raid_device)
665{
666 unsigned long flags;
667
668 dewtprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: handle"
669 "(0x%04x), wwid(0x%016llx)\n", ioc->name, __func__,
670 raid_device->handle, (unsigned long long)raid_device->wwid));
671
672 spin_lock_irqsave(&ioc->raid_device_lock, flags);
673 list_add_tail(&raid_device->list, &ioc->raid_device_list);
674 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
675}
676
677/**
678 * _scsih_raid_device_remove - delete raid_device object
679 * @ioc: per adapter object
680 * @raid_device: raid_device object
681 *
682 * This is removed from the raid_device_list link list.
683 */
684static void
685_scsih_raid_device_remove(struct MPT2SAS_ADAPTER *ioc,
686 struct _raid_device *raid_device)
687{
688 unsigned long flags;
689
690 spin_lock_irqsave(&ioc->raid_device_lock, flags);
691 list_del(&raid_device->list);
692 memset(raid_device, 0, sizeof(struct _raid_device));
693 kfree(raid_device);
694 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
695}
696
697/**
698 * mpt2sas_scsih_expander_find_by_sas_address - expander device search
699 * @ioc: per adapter object
700 * @sas_address: sas address
701 * Context: Calling function should acquire ioc->sas_node_lock.
702 *
703 * This searches for expander device based on sas_address, then returns the
704 * sas_node object.
705 */
706struct _sas_node *
707mpt2sas_scsih_expander_find_by_sas_address(struct MPT2SAS_ADAPTER *ioc,
708 u64 sas_address)
709{
710 struct _sas_node *sas_expander, *r;
711
712 r = NULL;
713 list_for_each_entry(sas_expander, &ioc->sas_expander_list, list) {
714 if (sas_expander->sas_address != sas_address)
715 continue;
716 r = sas_expander;
717 goto out;
718 }
719 out:
720 return r;
721}
722
723/**
724 * _scsih_expander_node_add - insert expander device to the list.
725 * @ioc: per adapter object
726 * @sas_expander: the sas_device object
727 * Context: This function will acquire ioc->sas_node_lock.
728 *
729 * Adding new object to the ioc->sas_expander_list.
730 *
731 * Return nothing.
732 */
733static void
734_scsih_expander_node_add(struct MPT2SAS_ADAPTER *ioc,
735 struct _sas_node *sas_expander)
736{
737 unsigned long flags;
738
739 spin_lock_irqsave(&ioc->sas_node_lock, flags);
740 list_add_tail(&sas_expander->list, &ioc->sas_expander_list);
741 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
742}
743
744/**
745 * _scsih_is_end_device - determines if device is an end device
746 * @device_info: bitfield providing information about the device.
747 * Context: none
748 *
749 * Returns 1 if end device.
750 */
751static int
752_scsih_is_end_device(u32 device_info)
753{
754 if (device_info & MPI2_SAS_DEVICE_INFO_END_DEVICE &&
755 ((device_info & MPI2_SAS_DEVICE_INFO_SSP_TARGET) |
756 (device_info & MPI2_SAS_DEVICE_INFO_STP_TARGET) |
757 (device_info & MPI2_SAS_DEVICE_INFO_SATA_DEVICE)))
758 return 1;
759 else
760 return 0;
761}
762
763/**
764 * _scsih_scsi_lookup_get - returns scmd entry
765 * @ioc: per adapter object
766 * @smid: system request message index
767 * Context: This function will acquire ioc->scsi_lookup_lock.
768 *
769 * Returns the smid stored scmd pointer.
770 */
771static struct scsi_cmnd *
772_scsih_scsi_lookup_get(struct MPT2SAS_ADAPTER *ioc, u16 smid)
773{
774 unsigned long flags;
775 struct scsi_cmnd *scmd;
776
777 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
778 scmd = ioc->scsi_lookup[smid - 1].scmd;
779 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
780 return scmd;
781}
782
783/**
784 * mptscsih_getclear_scsi_lookup - returns scmd entry
785 * @ioc: per adapter object
786 * @smid: system request message index
787 * Context: This function will acquire ioc->scsi_lookup_lock.
788 *
789 * Returns the smid stored scmd pointer, as well as clearing the scmd pointer.
790 */
791static struct scsi_cmnd *
792_scsih_scsi_lookup_getclear(struct MPT2SAS_ADAPTER *ioc, u16 smid)
793{
794 unsigned long flags;
795 struct scsi_cmnd *scmd;
796
797 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
798 scmd = ioc->scsi_lookup[smid - 1].scmd;
799 ioc->scsi_lookup[smid - 1].scmd = NULL;
800 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
801 return scmd;
802}
803
804/**
805 * _scsih_scsi_lookup_set - updates scmd entry in lookup
806 * @ioc: per adapter object
807 * @smid: system request message index
808 * @scmd: pointer to scsi command object
809 * Context: This function will acquire ioc->scsi_lookup_lock.
810 *
811 * This will save scmd pointer in the scsi_lookup array.
812 *
813 * Return nothing.
814 */
815static void
816_scsih_scsi_lookup_set(struct MPT2SAS_ADAPTER *ioc, u16 smid,
817 struct scsi_cmnd *scmd)
818{
819 unsigned long flags;
820
821 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
822 ioc->scsi_lookup[smid - 1].scmd = scmd;
823 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
824}
825
826/**
827 * _scsih_scsi_lookup_find_by_scmd - scmd lookup
828 * @ioc: per adapter object
829 * @smid: system request message index
830 * @scmd: pointer to scsi command object
831 * Context: This function will acquire ioc->scsi_lookup_lock.
832 *
833 * This will search for a scmd pointer in the scsi_lookup array,
834 * returning the revelent smid. A returned value of zero means invalid.
835 */
836static u16
837_scsih_scsi_lookup_find_by_scmd(struct MPT2SAS_ADAPTER *ioc, struct scsi_cmnd
838 *scmd)
839{
840 u16 smid;
841 unsigned long flags;
842 int i;
843
844 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
845 smid = 0;
846 for (i = 0; i < ioc->request_depth; i++) {
847 if (ioc->scsi_lookup[i].scmd == scmd) {
848 smid = i + 1;
849 goto out;
850 }
851 }
852 out:
853 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
854 return smid;
855}
856
857/**
858 * _scsih_scsi_lookup_find_by_target - search for matching channel:id
859 * @ioc: per adapter object
860 * @id: target id
861 * @channel: channel
862 * Context: This function will acquire ioc->scsi_lookup_lock.
863 *
864 * This will search for a matching channel:id in the scsi_lookup array,
865 * returning 1 if found.
866 */
867static u8
868_scsih_scsi_lookup_find_by_target(struct MPT2SAS_ADAPTER *ioc, int id,
869 int channel)
870{
871 u8 found;
872 unsigned long flags;
873 int i;
874
875 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
876 found = 0;
877 for (i = 0 ; i < ioc->request_depth; i++) {
878 if (ioc->scsi_lookup[i].scmd &&
879 (ioc->scsi_lookup[i].scmd->device->id == id &&
880 ioc->scsi_lookup[i].scmd->device->channel == channel)) {
881 found = 1;
882 goto out;
883 }
884 }
885 out:
886 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
887 return found;
888}
889
890/**
891 * _scsih_get_chain_buffer_dma - obtain block of chains (dma address)
892 * @ioc: per adapter object
893 * @smid: system request message index
894 *
895 * Returns phys pointer to chain buffer.
896 */
897static dma_addr_t
898_scsih_get_chain_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
899{
900 return ioc->chain_dma + ((smid - 1) * (ioc->request_sz *
901 ioc->chains_needed_per_io));
902}
903
904/**
905 * _scsih_get_chain_buffer - obtain block of chains assigned to a mf request
906 * @ioc: per adapter object
907 * @smid: system request message index
908 *
909 * Returns virt pointer to chain buffer.
910 */
911static void *
912_scsih_get_chain_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
913{
914 return (void *)(ioc->chain + ((smid - 1) * (ioc->request_sz *
915 ioc->chains_needed_per_io)));
916}
917
918/**
919 * _scsih_build_scatter_gather - main sg creation routine
920 * @ioc: per adapter object
921 * @scmd: scsi command
922 * @smid: system request message index
923 * Context: none.
924 *
925 * The main routine that builds scatter gather table from a given
926 * scsi request sent via the .queuecommand main handler.
927 *
928 * Returns 0 success, anything else error
929 */
930static int
931_scsih_build_scatter_gather(struct MPT2SAS_ADAPTER *ioc,
932 struct scsi_cmnd *scmd, u16 smid)
933{
934 Mpi2SCSIIORequest_t *mpi_request;
935 dma_addr_t chain_dma;
936 struct scatterlist *sg_scmd;
937 void *sg_local, *chain;
938 u32 chain_offset;
939 u32 chain_length;
940 u32 chain_flags;
941 u32 sges_left;
942 u32 sges_in_segment;
943 u32 sgl_flags;
944 u32 sgl_flags_last_element;
945 u32 sgl_flags_end_buffer;
946
947 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
948
949 /* init scatter gather flags */
950 sgl_flags = MPI2_SGE_FLAGS_SIMPLE_ELEMENT;
951 if (scmd->sc_data_direction == DMA_TO_DEVICE)
952 sgl_flags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
953 sgl_flags_last_element = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT)
954 << MPI2_SGE_FLAGS_SHIFT;
955 sgl_flags_end_buffer = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT |
956 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST)
957 << MPI2_SGE_FLAGS_SHIFT;
958 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
959
960 sg_scmd = scsi_sglist(scmd);
961 sges_left = scsi_dma_map(scmd);
962 if (!sges_left) {
963 sdev_printk(KERN_ERR, scmd->device, "pci_map_sg"
964 " failed: request for %d bytes!\n", scsi_bufflen(scmd));
965 return -ENOMEM;
966 }
967
968 sg_local = &mpi_request->SGL;
969 sges_in_segment = ioc->max_sges_in_main_message;
970 if (sges_left <= sges_in_segment)
971 goto fill_in_last_segment;
972
973 mpi_request->ChainOffset = (offsetof(Mpi2SCSIIORequest_t, SGL) +
974 (sges_in_segment * ioc->sge_size))/4;
975
976 /* fill in main message segment when there is a chain following */
977 while (sges_in_segment) {
978 if (sges_in_segment == 1)
979 ioc->base_add_sg_single(sg_local,
980 sgl_flags_last_element | sg_dma_len(sg_scmd),
981 sg_dma_address(sg_scmd));
982 else
983 ioc->base_add_sg_single(sg_local, sgl_flags |
984 sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
985 sg_scmd = sg_next(sg_scmd);
986 sg_local += ioc->sge_size;
987 sges_left--;
988 sges_in_segment--;
989 }
990
991 /* initializing the chain flags and pointers */
992 chain_flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT << MPI2_SGE_FLAGS_SHIFT;
993 chain = _scsih_get_chain_buffer(ioc, smid);
994 chain_dma = _scsih_get_chain_buffer_dma(ioc, smid);
995 do {
996 sges_in_segment = (sges_left <=
997 ioc->max_sges_in_chain_message) ? sges_left :
998 ioc->max_sges_in_chain_message;
999 chain_offset = (sges_left == sges_in_segment) ?
1000 0 : (sges_in_segment * ioc->sge_size)/4;
1001 chain_length = sges_in_segment * ioc->sge_size;
1002 if (chain_offset) {
1003 chain_offset = chain_offset <<
1004 MPI2_SGE_CHAIN_OFFSET_SHIFT;
1005 chain_length += ioc->sge_size;
1006 }
1007 ioc->base_add_sg_single(sg_local, chain_flags | chain_offset |
1008 chain_length, chain_dma);
1009 sg_local = chain;
1010 if (!chain_offset)
1011 goto fill_in_last_segment;
1012
1013 /* fill in chain segments */
1014 while (sges_in_segment) {
1015 if (sges_in_segment == 1)
1016 ioc->base_add_sg_single(sg_local,
1017 sgl_flags_last_element |
1018 sg_dma_len(sg_scmd),
1019 sg_dma_address(sg_scmd));
1020 else
1021 ioc->base_add_sg_single(sg_local, sgl_flags |
1022 sg_dma_len(sg_scmd),
1023 sg_dma_address(sg_scmd));
1024 sg_scmd = sg_next(sg_scmd);
1025 sg_local += ioc->sge_size;
1026 sges_left--;
1027 sges_in_segment--;
1028 }
1029
1030 chain_dma += ioc->request_sz;
1031 chain += ioc->request_sz;
1032 } while (1);
1033
1034
1035 fill_in_last_segment:
1036
1037 /* fill the last segment */
1038 while (sges_left) {
1039 if (sges_left == 1)
1040 ioc->base_add_sg_single(sg_local, sgl_flags_end_buffer |
1041 sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1042 else
1043 ioc->base_add_sg_single(sg_local, sgl_flags |
1044 sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1045 sg_scmd = sg_next(sg_scmd);
1046 sg_local += ioc->sge_size;
1047 sges_left--;
1048 }
1049
1050 return 0;
1051}
1052
1053/**
1054 * scsih_change_queue_depth - setting device queue depth
1055 * @sdev: scsi device struct
1056 * @qdepth: requested queue depth
1057 *
1058 * Returns queue depth.
1059 */
1060static int
1061scsih_change_queue_depth(struct scsi_device *sdev, int qdepth)
1062{
1063 struct Scsi_Host *shost = sdev->host;
1064 int max_depth;
1065 int tag_type;
1066
1067 max_depth = shost->can_queue;
1068 if (!sdev->tagged_supported)
1069 max_depth = 1;
1070 if (qdepth > max_depth)
1071 qdepth = max_depth;
1072 tag_type = (qdepth == 1) ? 0 : MSG_SIMPLE_TAG;
1073 scsi_adjust_queue_depth(sdev, tag_type, qdepth);
1074
1075 if (sdev->inquiry_len > 7)
1076 sdev_printk(KERN_INFO, sdev, "qdepth(%d), tagged(%d), "
1077 "simple(%d), ordered(%d), scsi_level(%d), cmd_que(%d)\n",
1078 sdev->queue_depth, sdev->tagged_supported, sdev->simple_tags,
1079 sdev->ordered_tags, sdev->scsi_level,
1080 (sdev->inquiry[7] & 2) >> 1);
1081
1082 return sdev->queue_depth;
1083}
1084
1085/**
1086 * scsih_change_queue_depth - changing device queue tag type
1087 * @sdev: scsi device struct
1088 * @tag_type: requested tag type
1089 *
1090 * Returns queue tag type.
1091 */
1092static int
1093scsih_change_queue_type(struct scsi_device *sdev, int tag_type)
1094{
1095 if (sdev->tagged_supported) {
1096 scsi_set_tag_type(sdev, tag_type);
1097 if (tag_type)
1098 scsi_activate_tcq(sdev, sdev->queue_depth);
1099 else
1100 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1101 } else
1102 tag_type = 0;
1103
1104 return tag_type;
1105}
1106
1107/**
1108 * scsih_target_alloc - target add routine
1109 * @starget: scsi target struct
1110 *
1111 * Returns 0 if ok. Any other return is assumed to be an error and
1112 * the device is ignored.
1113 */
1114static int
1115scsih_target_alloc(struct scsi_target *starget)
1116{
1117 struct Scsi_Host *shost = dev_to_shost(&starget->dev);
1118 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
1119 struct MPT2SAS_TARGET *sas_target_priv_data;
1120 struct _sas_device *sas_device;
1121 struct _raid_device *raid_device;
1122 unsigned long flags;
1123 struct sas_rphy *rphy;
1124
1125 sas_target_priv_data = kzalloc(sizeof(struct scsi_target), GFP_KERNEL);
1126 if (!sas_target_priv_data)
1127 return -ENOMEM;
1128
1129 starget->hostdata = sas_target_priv_data;
1130 sas_target_priv_data->starget = starget;
1131 sas_target_priv_data->handle = MPT2SAS_INVALID_DEVICE_HANDLE;
1132
1133 /* RAID volumes */
1134 if (starget->channel == RAID_CHANNEL) {
1135 spin_lock_irqsave(&ioc->raid_device_lock, flags);
1136 raid_device = _scsih_raid_device_find_by_id(ioc, starget->id,
1137 starget->channel);
1138 if (raid_device) {
1139 sas_target_priv_data->handle = raid_device->handle;
1140 sas_target_priv_data->sas_address = raid_device->wwid;
1141 sas_target_priv_data->flags |= MPT_TARGET_FLAGS_VOLUME;
1142 raid_device->starget = starget;
1143 }
1144 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
1145 return 0;
1146 }
1147
1148 /* sas/sata devices */
1149 spin_lock_irqsave(&ioc->sas_device_lock, flags);
1150 rphy = dev_to_rphy(starget->dev.parent);
1151 sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,
1152 rphy->identify.sas_address);
1153
1154 if (sas_device) {
1155 sas_target_priv_data->handle = sas_device->handle;
1156 sas_target_priv_data->sas_address = sas_device->sas_address;
1157 sas_device->starget = starget;
1158 sas_device->id = starget->id;
1159 sas_device->channel = starget->channel;
1160 if (sas_device->hidden_raid_component)
1161 sas_target_priv_data->flags |=
1162 MPT_TARGET_FLAGS_RAID_COMPONENT;
1163 }
1164 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
1165
1166 return 0;
1167}
1168
1169/**
1170 * scsih_target_destroy - target destroy routine
1171 * @starget: scsi target struct
1172 *
1173 * Returns nothing.
1174 */
1175static void
1176scsih_target_destroy(struct scsi_target *starget)
1177{
1178 struct Scsi_Host *shost = dev_to_shost(&starget->dev);
1179 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
1180 struct MPT2SAS_TARGET *sas_target_priv_data;
1181 struct _sas_device *sas_device;
1182 struct _raid_device *raid_device;
1183 unsigned long flags;
1184 struct sas_rphy *rphy;
1185
1186 sas_target_priv_data = starget->hostdata;
1187 if (!sas_target_priv_data)
1188 return;
1189
1190 if (starget->channel == RAID_CHANNEL) {
1191 spin_lock_irqsave(&ioc->raid_device_lock, flags);
1192 raid_device = _scsih_raid_device_find_by_id(ioc, starget->id,
1193 starget->channel);
1194 if (raid_device) {
1195 raid_device->starget = NULL;
1196 raid_device->sdev = NULL;
1197 }
1198 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
1199 goto out;
1200 }
1201
1202 spin_lock_irqsave(&ioc->sas_device_lock, flags);
1203 rphy = dev_to_rphy(starget->dev.parent);
1204 sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,
1205 rphy->identify.sas_address);
1206 if (sas_device)
1207 sas_device->starget = NULL;
1208
1209 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
1210
1211 out:
1212 kfree(sas_target_priv_data);
1213 starget->hostdata = NULL;
1214}
1215
1216/**
1217 * scsih_slave_alloc - device add routine
1218 * @sdev: scsi device struct
1219 *
1220 * Returns 0 if ok. Any other return is assumed to be an error and
1221 * the device is ignored.
1222 */
1223static int
1224scsih_slave_alloc(struct scsi_device *sdev)
1225{
1226 struct Scsi_Host *shost;
1227 struct MPT2SAS_ADAPTER *ioc;
1228 struct MPT2SAS_TARGET *sas_target_priv_data;
1229 struct MPT2SAS_DEVICE *sas_device_priv_data;
1230 struct scsi_target *starget;
1231 struct _raid_device *raid_device;
1232 struct _sas_device *sas_device;
1233 unsigned long flags;
1234
1235 sas_device_priv_data = kzalloc(sizeof(struct scsi_device), GFP_KERNEL);
1236 if (!sas_device_priv_data)
1237 return -ENOMEM;
1238
1239 sas_device_priv_data->lun = sdev->lun;
1240 sas_device_priv_data->flags = MPT_DEVICE_FLAGS_INIT;
1241
1242 starget = scsi_target(sdev);
1243 sas_target_priv_data = starget->hostdata;
1244 sas_target_priv_data->num_luns++;
1245 sas_device_priv_data->sas_target = sas_target_priv_data;
1246 sdev->hostdata = sas_device_priv_data;
1247 if ((sas_target_priv_data->flags & MPT_TARGET_FLAGS_RAID_COMPONENT))
1248 sdev->no_uld_attach = 1;
1249
1250 shost = dev_to_shost(&starget->dev);
1251 ioc = shost_priv(shost);
1252 if (starget->channel == RAID_CHANNEL) {
1253 spin_lock_irqsave(&ioc->raid_device_lock, flags);
1254 raid_device = _scsih_raid_device_find_by_id(ioc,
1255 starget->id, starget->channel);
1256 if (raid_device)
1257 raid_device->sdev = sdev; /* raid is single lun */
1258 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
1259 } else {
1260 /* set TLR bit for SSP devices */
1261 if (!(ioc->facts.IOCCapabilities &
1262 MPI2_IOCFACTS_CAPABILITY_TLR))
1263 goto out;
1264 spin_lock_irqsave(&ioc->sas_device_lock, flags);
1265 sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,
1266 sas_device_priv_data->sas_target->sas_address);
1267 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
1268 if (sas_device && sas_device->device_info &
1269 MPI2_SAS_DEVICE_INFO_SSP_TARGET)
1270 sas_device_priv_data->flags |= MPT_DEVICE_TLR_ON;
1271 }
1272
1273 out:
1274 return 0;
1275}
1276
1277/**
1278 * scsih_slave_destroy - device destroy routine
1279 * @sdev: scsi device struct
1280 *
1281 * Returns nothing.
1282 */
1283static void
1284scsih_slave_destroy(struct scsi_device *sdev)
1285{
1286 struct MPT2SAS_TARGET *sas_target_priv_data;
1287 struct scsi_target *starget;
1288
1289 if (!sdev->hostdata)
1290 return;
1291
1292 starget = scsi_target(sdev);
1293 sas_target_priv_data = starget->hostdata;
1294 sas_target_priv_data->num_luns--;
1295 kfree(sdev->hostdata);
1296 sdev->hostdata = NULL;
1297}
1298
1299/**
1300 * scsih_display_sata_capabilities - sata capabilities
1301 * @ioc: per adapter object
1302 * @sas_device: the sas_device object
1303 * @sdev: scsi device struct
1304 */
1305static void
1306scsih_display_sata_capabilities(struct MPT2SAS_ADAPTER *ioc,
1307 struct _sas_device *sas_device, struct scsi_device *sdev)
1308{
1309 Mpi2ConfigReply_t mpi_reply;
1310 Mpi2SasDevicePage0_t sas_device_pg0;
1311 u32 ioc_status;
1312 u16 flags;
1313 u32 device_info;
1314
1315 if ((mpt2sas_config_get_sas_device_pg0(ioc, &mpi_reply, &sas_device_pg0,
1316 MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, sas_device->handle))) {
1317 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1318 ioc->name, __FILE__, __LINE__, __func__);
1319 return;
1320 }
1321
1322 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
1323 MPI2_IOCSTATUS_MASK;
1324 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
1325 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1326 ioc->name, __FILE__, __LINE__, __func__);
1327 return;
1328 }
1329
1330 flags = le16_to_cpu(sas_device_pg0.Flags);
1331 device_info = le16_to_cpu(sas_device_pg0.DeviceInfo);
1332
1333 sdev_printk(KERN_INFO, sdev,
1334 "atapi(%s), ncq(%s), asyn_notify(%s), smart(%s), fua(%s), "
1335 "sw_preserve(%s)\n",
1336 (device_info & MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE) ? "y" : "n",
1337 (flags & MPI2_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED) ? "y" : "n",
1338 (flags & MPI2_SAS_DEVICE0_FLAGS_SATA_ASYNCHRONOUS_NOTIFY) ? "y" :
1339 "n",
1340 (flags & MPI2_SAS_DEVICE0_FLAGS_SATA_SMART_SUPPORTED) ? "y" : "n",
1341 (flags & MPI2_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED) ? "y" : "n",
1342 (flags & MPI2_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE) ? "y" : "n");
1343}
1344
1345/**
1346 * _scsih_get_volume_capabilities - volume capabilities
1347 * @ioc: per adapter object
1348 * @sas_device: the raid_device object
1349 */
1350static void
1351_scsih_get_volume_capabilities(struct MPT2SAS_ADAPTER *ioc,
1352 struct _raid_device *raid_device)
1353{
1354 Mpi2RaidVolPage0_t *vol_pg0;
1355 Mpi2RaidPhysDiskPage0_t pd_pg0;
1356 Mpi2SasDevicePage0_t sas_device_pg0;
1357 Mpi2ConfigReply_t mpi_reply;
1358 u16 sz;
1359 u8 num_pds;
1360
1361 if ((mpt2sas_config_get_number_pds(ioc, raid_device->handle,
1362 &num_pds)) || !num_pds) {
1363 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1364 ioc->name, __FILE__, __LINE__, __func__);
1365 return;
1366 }
1367
1368 raid_device->num_pds = num_pds;
1369 sz = offsetof(Mpi2RaidVolPage0_t, PhysDisk) + (num_pds *
1370 sizeof(Mpi2RaidVol0PhysDisk_t));
1371 vol_pg0 = kzalloc(sz, GFP_KERNEL);
1372 if (!vol_pg0) {
1373 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1374 ioc->name, __FILE__, __LINE__, __func__);
1375 return;
1376 }
1377
1378 if ((mpt2sas_config_get_raid_volume_pg0(ioc, &mpi_reply, vol_pg0,
1379 MPI2_RAID_VOLUME_PGAD_FORM_HANDLE, raid_device->handle, sz))) {
1380 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1381 ioc->name, __FILE__, __LINE__, __func__);
1382 kfree(vol_pg0);
1383 return;
1384 }
1385
1386 raid_device->volume_type = vol_pg0->VolumeType;
1387
1388 /* figure out what the underlying devices are by
1389 * obtaining the device_info bits for the 1st device
1390 */
1391 if (!(mpt2sas_config_get_phys_disk_pg0(ioc, &mpi_reply,
1392 &pd_pg0, MPI2_PHYSDISK_PGAD_FORM_PHYSDISKNUM,
1393 vol_pg0->PhysDisk[0].PhysDiskNum))) {
1394 if (!(mpt2sas_config_get_sas_device_pg0(ioc, &mpi_reply,
1395 &sas_device_pg0, MPI2_SAS_DEVICE_PGAD_FORM_HANDLE,
1396 le16_to_cpu(pd_pg0.DevHandle)))) {
1397 raid_device->device_info =
1398 le32_to_cpu(sas_device_pg0.DeviceInfo);
1399 }
1400 }
1401
1402 kfree(vol_pg0);
1403}
1404
1405/**
1406 * scsih_slave_configure - device configure routine.
1407 * @sdev: scsi device struct
1408 *
1409 * Returns 0 if ok. Any other return is assumed to be an error and
1410 * the device is ignored.
1411 */
1412static int
1413scsih_slave_configure(struct scsi_device *sdev)
1414{
1415 struct Scsi_Host *shost = sdev->host;
1416 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
1417 struct MPT2SAS_DEVICE *sas_device_priv_data;
1418 struct MPT2SAS_TARGET *sas_target_priv_data;
1419 struct _sas_device *sas_device;
1420 struct _raid_device *raid_device;
1421 unsigned long flags;
1422 int qdepth;
1423 u8 ssp_target = 0;
1424 char *ds = "";
1425 char *r_level = "";
1426
1427 qdepth = 1;
1428 sas_device_priv_data = sdev->hostdata;
1429 sas_device_priv_data->configured_lun = 1;
1430 sas_device_priv_data->flags &= ~MPT_DEVICE_FLAGS_INIT;
1431 sas_target_priv_data = sas_device_priv_data->sas_target;
1432
1433 /* raid volume handling */
1434 if (sas_target_priv_data->flags & MPT_TARGET_FLAGS_VOLUME) {
1435
1436 spin_lock_irqsave(&ioc->raid_device_lock, flags);
1437 raid_device = _scsih_raid_device_find_by_handle(ioc,
1438 sas_target_priv_data->handle);
1439 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
1440 if (!raid_device) {
1441 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1442 ioc->name, __FILE__, __LINE__, __func__);
1443 return 0;
1444 }
1445
1446 _scsih_get_volume_capabilities(ioc, raid_device);
1447
1448 /* RAID Queue Depth Support
1449 * IS volume = underlying qdepth of drive type, either
1450 * MPT2SAS_SAS_QUEUE_DEPTH or MPT2SAS_SATA_QUEUE_DEPTH
1451 * IM/IME/R10 = 128 (MPT2SAS_RAID_QUEUE_DEPTH)
1452 */
1453 if (raid_device->device_info &
1454 MPI2_SAS_DEVICE_INFO_SSP_TARGET) {
1455 qdepth = MPT2SAS_SAS_QUEUE_DEPTH;
1456 ds = "SSP";
1457 } else {
1458 qdepth = MPT2SAS_SATA_QUEUE_DEPTH;
1459 if (raid_device->device_info &
1460 MPI2_SAS_DEVICE_INFO_SATA_DEVICE)
1461 ds = "SATA";
1462 else
1463 ds = "STP";
1464 }
1465
1466 switch (raid_device->volume_type) {
1467 case MPI2_RAID_VOL_TYPE_RAID0:
1468 r_level = "RAID0";
1469 break;
1470 case MPI2_RAID_VOL_TYPE_RAID1E:
1471 qdepth = MPT2SAS_RAID_QUEUE_DEPTH;
1472 r_level = "RAID1E";
1473 break;
1474 case MPI2_RAID_VOL_TYPE_RAID1:
1475 qdepth = MPT2SAS_RAID_QUEUE_DEPTH;
1476 r_level = "RAID1";
1477 break;
1478 case MPI2_RAID_VOL_TYPE_RAID10:
1479 qdepth = MPT2SAS_RAID_QUEUE_DEPTH;
1480 r_level = "RAID10";
1481 break;
1482 case MPI2_RAID_VOL_TYPE_UNKNOWN:
1483 default:
1484 qdepth = MPT2SAS_RAID_QUEUE_DEPTH;
1485 r_level = "RAIDX";
1486 break;
1487 }
1488
1489 sdev_printk(KERN_INFO, sdev, "%s: "
1490 "handle(0x%04x), wwid(0x%016llx), pd_count(%d), type(%s)\n",
1491 r_level, raid_device->handle,
1492 (unsigned long long)raid_device->wwid,
1493 raid_device->num_pds, ds);
1494 scsih_change_queue_depth(sdev, qdepth);
1495 return 0;
1496 }
1497
1498 /* non-raid handling */
1499 spin_lock_irqsave(&ioc->sas_device_lock, flags);
1500 sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,
1501 sas_device_priv_data->sas_target->sas_address);
1502 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
1503 if (sas_device) {
1504 if (sas_target_priv_data->flags &
1505 MPT_TARGET_FLAGS_RAID_COMPONENT) {
1506 mpt2sas_config_get_volume_handle(ioc,
1507 sas_device->handle, &sas_device->volume_handle);
1508 mpt2sas_config_get_volume_wwid(ioc,
1509 sas_device->volume_handle,
1510 &sas_device->volume_wwid);
1511 }
1512 if (sas_device->device_info & MPI2_SAS_DEVICE_INFO_SSP_TARGET) {
1513 qdepth = MPT2SAS_SAS_QUEUE_DEPTH;
1514 ssp_target = 1;
1515 ds = "SSP";
1516 } else {
1517 qdepth = MPT2SAS_SATA_QUEUE_DEPTH;
1518 if (sas_device->device_info &
1519 MPI2_SAS_DEVICE_INFO_STP_TARGET)
1520 ds = "STP";
1521 else if (sas_device->device_info &
1522 MPI2_SAS_DEVICE_INFO_SATA_DEVICE)
1523 ds = "SATA";
1524 }
1525
1526 sdev_printk(KERN_INFO, sdev, "%s: handle(0x%04x), "
1527 "sas_addr(0x%016llx), device_name(0x%016llx)\n",
1528 ds, sas_device->handle,
1529 (unsigned long long)sas_device->sas_address,
1530 (unsigned long long)sas_device->device_name);
1531 sdev_printk(KERN_INFO, sdev, "%s: "
1532 "enclosure_logical_id(0x%016llx), slot(%d)\n", ds,
1533 (unsigned long long) sas_device->enclosure_logical_id,
1534 sas_device->slot);
1535
1536 if (!ssp_target)
1537 scsih_display_sata_capabilities(ioc, sas_device, sdev);
1538 }
1539
1540 scsih_change_queue_depth(sdev, qdepth);
1541
1542 if (ssp_target)
1543 sas_read_port_mode_page(sdev);
1544 return 0;
1545}
1546
1547/**
1548 * scsih_bios_param - fetch head, sector, cylinder info for a disk
1549 * @sdev: scsi device struct
1550 * @bdev: pointer to block device context
1551 * @capacity: device size (in 512 byte sectors)
1552 * @params: three element array to place output:
1553 * params[0] number of heads (max 255)
1554 * params[1] number of sectors (max 63)
1555 * params[2] number of cylinders
1556 *
1557 * Return nothing.
1558 */
1559static int
1560scsih_bios_param(struct scsi_device *sdev, struct block_device *bdev,
1561 sector_t capacity, int params[])
1562{
1563 int heads;
1564 int sectors;
1565 sector_t cylinders;
1566 ulong dummy;
1567
1568 heads = 64;
1569 sectors = 32;
1570
1571 dummy = heads * sectors;
1572 cylinders = capacity;
1573 sector_div(cylinders, dummy);
1574
1575 /*
1576 * Handle extended translation size for logical drives
1577 * > 1Gb
1578 */
1579 if ((ulong)capacity >= 0x200000) {
1580 heads = 255;
1581 sectors = 63;
1582 dummy = heads * sectors;
1583 cylinders = capacity;
1584 sector_div(cylinders, dummy);
1585 }
1586
1587 /* return result */
1588 params[0] = heads;
1589 params[1] = sectors;
1590 params[2] = cylinders;
1591
1592 return 0;
1593}
1594
1595/**
1596 * _scsih_response_code - translation of device response code
1597 * @ioc: per adapter object
1598 * @response_code: response code returned by the device
1599 *
1600 * Return nothing.
1601 */
1602static void
1603_scsih_response_code(struct MPT2SAS_ADAPTER *ioc, u8 response_code)
1604{
1605 char *desc;
1606
1607 switch (response_code) {
1608 case MPI2_SCSITASKMGMT_RSP_TM_COMPLETE:
1609 desc = "task management request completed";
1610 break;
1611 case MPI2_SCSITASKMGMT_RSP_INVALID_FRAME:
1612 desc = "invalid frame";
1613 break;
1614 case MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED:
1615 desc = "task management request not supported";
1616 break;
1617 case MPI2_SCSITASKMGMT_RSP_TM_FAILED:
1618 desc = "task management request failed";
1619 break;
1620 case MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED:
1621 desc = "task management request succeeded";
1622 break;
1623 case MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN:
1624 desc = "invalid lun";
1625 break;
1626 case 0xA:
1627 desc = "overlapped tag attempted";
1628 break;
1629 case MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC:
1630 desc = "task queued, however not sent to target";
1631 break;
1632 default:
1633 desc = "unknown";
1634 break;
1635 }
1636 printk(MPT2SAS_WARN_FMT "response_code(0x%01x): %s\n",
1637 ioc->name, response_code, desc);
1638}
1639
1640/**
1641 * scsih_tm_done - tm completion routine
1642 * @ioc: per adapter object
1643 * @smid: system request message index
1644 * @VF_ID: virtual function id
1645 * @reply: reply message frame(lower 32bit addr)
1646 * Context: none.
1647 *
1648 * The callback handler when using scsih_issue_tm.
1649 *
1650 * Return nothing.
1651 */
1652static void
1653scsih_tm_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
1654{
1655 MPI2DefaultReply_t *mpi_reply;
1656
1657 if (ioc->tm_cmds.status == MPT2_CMD_NOT_USED)
1658 return;
1659 if (ioc->tm_cmds.smid != smid)
1660 return;
1661 ioc->tm_cmds.status |= MPT2_CMD_COMPLETE;
1662 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
1663 if (mpi_reply) {
1664 memcpy(ioc->tm_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
1665 ioc->tm_cmds.status |= MPT2_CMD_REPLY_VALID;
1666 }
1667 ioc->tm_cmds.status &= ~MPT2_CMD_PENDING;
1668 complete(&ioc->tm_cmds.done);
1669}
1670
1671/**
1672 * mpt2sas_scsih_set_tm_flag - set per target tm_busy
1673 * @ioc: per adapter object
1674 * @handle: device handle
1675 *
1676 * During taskmangement request, we need to freeze the device queue.
1677 */
1678void
1679mpt2sas_scsih_set_tm_flag(struct MPT2SAS_ADAPTER *ioc, u16 handle)
1680{
1681 struct MPT2SAS_DEVICE *sas_device_priv_data;
1682 struct scsi_device *sdev;
1683 u8 skip = 0;
1684
1685 shost_for_each_device(sdev, ioc->shost) {
1686 if (skip)
1687 continue;
1688 sas_device_priv_data = sdev->hostdata;
1689 if (!sas_device_priv_data)
1690 continue;
1691 if (sas_device_priv_data->sas_target->handle == handle) {
1692 sas_device_priv_data->sas_target->tm_busy = 1;
1693 skip = 1;
1694 ioc->ignore_loginfos = 1;
1695 }
1696 }
1697}
1698
1699/**
1700 * mpt2sas_scsih_clear_tm_flag - clear per target tm_busy
1701 * @ioc: per adapter object
1702 * @handle: device handle
1703 *
1704 * During taskmangement request, we need to freeze the device queue.
1705 */
1706void
1707mpt2sas_scsih_clear_tm_flag(struct MPT2SAS_ADAPTER *ioc, u16 handle)
1708{
1709 struct MPT2SAS_DEVICE *sas_device_priv_data;
1710 struct scsi_device *sdev;
1711 u8 skip = 0;
1712
1713 shost_for_each_device(sdev, ioc->shost) {
1714 if (skip)
1715 continue;
1716 sas_device_priv_data = sdev->hostdata;
1717 if (!sas_device_priv_data)
1718 continue;
1719 if (sas_device_priv_data->sas_target->handle == handle) {
1720 sas_device_priv_data->sas_target->tm_busy = 0;
1721 skip = 1;
1722 ioc->ignore_loginfos = 0;
1723 }
1724 }
1725}
1726
1727/**
1728 * mpt2sas_scsih_issue_tm - main routine for sending tm requests
1729 * @ioc: per adapter struct
1730 * @device_handle: device handle
1731 * @lun: lun number
1732 * @type: MPI2_SCSITASKMGMT_TASKTYPE__XXX (defined in mpi2_init.h)
1733 * @smid_task: smid assigned to the task
1734 * @timeout: timeout in seconds
1735 * Context: The calling function needs to acquire the tm_cmds.mutex
1736 *
1737 * A generic API for sending task management requests to firmware.
1738 *
1739 * The ioc->tm_cmds.status flag should be MPT2_CMD_NOT_USED before calling
1740 * this API.
1741 *
1742 * The callback index is set inside `ioc->tm_cb_idx`.
1743 *
1744 * Return nothing.
1745 */
1746void
1747mpt2sas_scsih_issue_tm(struct MPT2SAS_ADAPTER *ioc, u16 handle, uint lun,
1748 u8 type, u16 smid_task, ulong timeout)
1749{
1750 Mpi2SCSITaskManagementRequest_t *mpi_request;
1751 Mpi2SCSITaskManagementReply_t *mpi_reply;
1752 u16 smid = 0;
1753 u32 ioc_state;
1754 unsigned long timeleft;
1755 u8 VF_ID = 0;
1756 unsigned long flags;
1757
1758 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
1759 if (ioc->tm_cmds.status != MPT2_CMD_NOT_USED ||
1760 ioc->shost_recovery) {
1761 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
1762 printk(MPT2SAS_INFO_FMT "%s: host reset in progress!\n",
1763 __func__, ioc->name);
1764 return;
1765 }
1766 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
1767
1768 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
1769 if (ioc_state & MPI2_DOORBELL_USED) {
1770 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
1771 "active!\n", ioc->name));
1772 goto issue_host_reset;
1773 }
1774
1775 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
1776 mpt2sas_base_fault_info(ioc, ioc_state &
1777 MPI2_DOORBELL_DATA_MASK);
1778 goto issue_host_reset;
1779 }
1780
1781 smid = mpt2sas_base_get_smid(ioc, ioc->tm_cb_idx);
1782 if (!smid) {
1783 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
1784 ioc->name, __func__);
1785 return;
1786 }
1787
1788 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "sending tm: handle(0x%04x),"
1789 " task_type(0x%02x), smid(%d)\n", ioc->name, handle, type, smid));
1790 ioc->tm_cmds.status = MPT2_CMD_PENDING;
1791 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
1792 ioc->tm_cmds.smid = smid;
1793 memset(mpi_request, 0, sizeof(Mpi2SCSITaskManagementRequest_t));
1794 mpi_request->Function = MPI2_FUNCTION_SCSI_TASK_MGMT;
1795 mpi_request->DevHandle = cpu_to_le16(handle);
1796 mpi_request->TaskType = type;
1797 mpi_request->TaskMID = cpu_to_le16(smid_task);
1798 int_to_scsilun(lun, (struct scsi_lun *)mpi_request->LUN);
1799 mpt2sas_scsih_set_tm_flag(ioc, handle);
1800 mpt2sas_base_put_smid_hi_priority(ioc, smid, VF_ID);
1801 timeleft = wait_for_completion_timeout(&ioc->tm_cmds.done, timeout*HZ);
1802 mpt2sas_scsih_clear_tm_flag(ioc, handle);
1803 if (!(ioc->tm_cmds.status & MPT2_CMD_COMPLETE)) {
1804 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
1805 ioc->name, __func__);
1806 _debug_dump_mf(mpi_request,
1807 sizeof(Mpi2SCSITaskManagementRequest_t)/4);
1808 if (!(ioc->tm_cmds.status & MPT2_CMD_RESET))
1809 goto issue_host_reset;
1810 }
1811
1812 if (ioc->tm_cmds.status & MPT2_CMD_REPLY_VALID) {
1813 mpi_reply = ioc->tm_cmds.reply;
1814 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "complete tm: "
1815 "ioc_status(0x%04x), loginfo(0x%08x), term_count(0x%08x)\n",
1816 ioc->name, le16_to_cpu(mpi_reply->IOCStatus),
1817 le32_to_cpu(mpi_reply->IOCLogInfo),
1818 le32_to_cpu(mpi_reply->TerminationCount)));
1819 if (ioc->logging_level & MPT_DEBUG_TM)
1820 _scsih_response_code(ioc, mpi_reply->ResponseCode);
1821 }
1822 return;
1823 issue_host_reset:
1824 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, FORCE_BIG_HAMMER);
1825}
1826
1827/**
1828 * scsih_abort - eh threads main abort routine
1829 * @sdev: scsi device struct
1830 *
1831 * Returns SUCCESS if command aborted else FAILED
1832 */
1833static int
1834scsih_abort(struct scsi_cmnd *scmd)
1835{
1836 struct MPT2SAS_ADAPTER *ioc = shost_priv(scmd->device->host);
1837 struct MPT2SAS_DEVICE *sas_device_priv_data;
1838 u16 smid;
1839 u16 handle;
1840 int r;
1841 struct scsi_cmnd *scmd_lookup;
1842
1843 printk(MPT2SAS_INFO_FMT "attempting task abort! scmd(%p)\n",
1844 ioc->name, scmd);
1845 scsi_print_command(scmd);
1846
1847 sas_device_priv_data = scmd->device->hostdata;
1848 if (!sas_device_priv_data || !sas_device_priv_data->sas_target) {
1849 printk(MPT2SAS_INFO_FMT "device been deleted! scmd(%p)\n",
1850 ioc->name, scmd);
1851 scmd->result = DID_NO_CONNECT << 16;
1852 scmd->scsi_done(scmd);
1853 r = SUCCESS;
1854 goto out;
1855 }
1856
1857 /* search for the command */
1858 smid = _scsih_scsi_lookup_find_by_scmd(ioc, scmd);
1859 if (!smid) {
1860 scmd->result = DID_RESET << 16;
1861 r = SUCCESS;
1862 goto out;
1863 }
1864
1865 /* for hidden raid components and volumes this is not supported */
1866 if (sas_device_priv_data->sas_target->flags &
1867 MPT_TARGET_FLAGS_RAID_COMPONENT ||
1868 sas_device_priv_data->sas_target->flags & MPT_TARGET_FLAGS_VOLUME) {
1869 scmd->result = DID_RESET << 16;
1870 r = FAILED;
1871 goto out;
1872 }
1873
1874 mutex_lock(&ioc->tm_cmds.mutex);
1875 handle = sas_device_priv_data->sas_target->handle;
1876 mpt2sas_scsih_issue_tm(ioc, handle, sas_device_priv_data->lun,
1877 MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK, smid, 30);
1878
1879 /* sanity check - see whether command actually completed */
1880 scmd_lookup = _scsih_scsi_lookup_get(ioc, smid);
1881 if (scmd_lookup && (scmd_lookup->serial_number == scmd->serial_number))
1882 r = FAILED;
1883 else
1884 r = SUCCESS;
1885 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
1886 mutex_unlock(&ioc->tm_cmds.mutex);
1887
1888 out:
1889 printk(MPT2SAS_INFO_FMT "task abort: %s scmd(%p)\n",
1890 ioc->name, ((r == SUCCESS) ? "SUCCESS" : "FAILED"), scmd);
1891 return r;
1892}
1893
1894
1895/**
1896 * scsih_dev_reset - eh threads main device reset routine
1897 * @sdev: scsi device struct
1898 *
1899 * Returns SUCCESS if command aborted else FAILED
1900 */
1901static int
1902scsih_dev_reset(struct scsi_cmnd *scmd)
1903{
1904 struct MPT2SAS_ADAPTER *ioc = shost_priv(scmd->device->host);
1905 struct MPT2SAS_DEVICE *sas_device_priv_data;
1906 struct _sas_device *sas_device;
1907 unsigned long flags;
1908 u16 handle;
1909 int r;
1910
1911 printk(MPT2SAS_INFO_FMT "attempting target reset! scmd(%p)\n",
1912 ioc->name, scmd);
1913 scsi_print_command(scmd);
1914
1915 sas_device_priv_data = scmd->device->hostdata;
1916 if (!sas_device_priv_data || !sas_device_priv_data->sas_target) {
1917 printk(MPT2SAS_INFO_FMT "device been deleted! scmd(%p)\n",
1918 ioc->name, scmd);
1919 scmd->result = DID_NO_CONNECT << 16;
1920 scmd->scsi_done(scmd);
1921 r = SUCCESS;
1922 goto out;
1923 }
1924
1925 /* for hidden raid components obtain the volume_handle */
1926 handle = 0;
1927 if (sas_device_priv_data->sas_target->flags &
1928 MPT_TARGET_FLAGS_RAID_COMPONENT) {
1929 spin_lock_irqsave(&ioc->sas_device_lock, flags);
1930 sas_device = _scsih_sas_device_find_by_handle(ioc,
1931 sas_device_priv_data->sas_target->handle);
1932 if (sas_device)
1933 handle = sas_device->volume_handle;
1934 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
1935 } else
1936 handle = sas_device_priv_data->sas_target->handle;
1937
1938 if (!handle) {
1939 scmd->result = DID_RESET << 16;
1940 r = FAILED;
1941 goto out;
1942 }
1943
1944 mutex_lock(&ioc->tm_cmds.mutex);
1945 mpt2sas_scsih_issue_tm(ioc, handle, 0,
1946 MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET, 0, 30);
1947
1948 /*
1949 * sanity check see whether all commands to this target been
1950 * completed
1951 */
1952 if (_scsih_scsi_lookup_find_by_target(ioc, scmd->device->id,
1953 scmd->device->channel))
1954 r = FAILED;
1955 else
1956 r = SUCCESS;
1957 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
1958 mutex_unlock(&ioc->tm_cmds.mutex);
1959
1960 out:
1961 printk(MPT2SAS_INFO_FMT "target reset: %s scmd(%p)\n",
1962 ioc->name, ((r == SUCCESS) ? "SUCCESS" : "FAILED"), scmd);
1963 return r;
1964}
1965
1966/**
1967 * scsih_abort - eh threads main host reset routine
1968 * @sdev: scsi device struct
1969 *
1970 * Returns SUCCESS if command aborted else FAILED
1971 */
1972static int
1973scsih_host_reset(struct scsi_cmnd *scmd)
1974{
1975 struct MPT2SAS_ADAPTER *ioc = shost_priv(scmd->device->host);
1976 int r, retval;
1977
1978 printk(MPT2SAS_INFO_FMT "attempting host reset! scmd(%p)\n",
1979 ioc->name, scmd);
1980 scsi_print_command(scmd);
1981
1982 retval = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
1983 FORCE_BIG_HAMMER);
1984 r = (retval < 0) ? FAILED : SUCCESS;
1985 printk(MPT2SAS_INFO_FMT "host reset: %s scmd(%p)\n",
1986 ioc->name, ((r == SUCCESS) ? "SUCCESS" : "FAILED"), scmd);
1987
1988 return r;
1989}
1990
1991/**
1992 * _scsih_fw_event_add - insert and queue up fw_event
1993 * @ioc: per adapter object
1994 * @fw_event: object describing the event
1995 * Context: This function will acquire ioc->fw_event_lock.
1996 *
1997 * This adds the firmware event object into link list, then queues it up to
1998 * be processed from user context.
1999 *
2000 * Return nothing.
2001 */
2002static void
2003_scsih_fw_event_add(struct MPT2SAS_ADAPTER *ioc, struct fw_event_work *fw_event)
2004{
2005 unsigned long flags;
2006
2007 if (ioc->firmware_event_thread == NULL)
2008 return;
2009
2010 spin_lock_irqsave(&ioc->fw_event_lock, flags);
2011 list_add_tail(&fw_event->list, &ioc->fw_event_list);
2012 INIT_DELAYED_WORK(&fw_event->work, _firmware_event_work);
2013 queue_delayed_work(ioc->firmware_event_thread, &fw_event->work, 1);
2014 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2015}
2016
2017/**
2018 * _scsih_fw_event_free - delete fw_event
2019 * @ioc: per adapter object
2020 * @fw_event: object describing the event
2021 * Context: This function will acquire ioc->fw_event_lock.
2022 *
2023 * This removes firmware event object from link list, frees associated memory.
2024 *
2025 * Return nothing.
2026 */
2027static void
2028_scsih_fw_event_free(struct MPT2SAS_ADAPTER *ioc, struct fw_event_work
2029 *fw_event)
2030{
2031 unsigned long flags;
2032
2033 spin_lock_irqsave(&ioc->fw_event_lock, flags);
2034 list_del(&fw_event->list);
2035 kfree(fw_event->event_data);
2036 kfree(fw_event);
2037 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2038}
2039
2040/**
2041 * _scsih_fw_event_add - requeue an event
2042 * @ioc: per adapter object
2043 * @fw_event: object describing the event
2044 * Context: This function will acquire ioc->fw_event_lock.
2045 *
2046 * Return nothing.
2047 */
2048static void
2049_scsih_fw_event_requeue(struct MPT2SAS_ADAPTER *ioc, struct fw_event_work
2050 *fw_event, unsigned long delay)
2051{
2052 unsigned long flags;
2053 if (ioc->firmware_event_thread == NULL)
2054 return;
2055
2056 spin_lock_irqsave(&ioc->fw_event_lock, flags);
2057 queue_delayed_work(ioc->firmware_event_thread, &fw_event->work, delay);
2058 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2059}
2060
2061/**
2062 * _scsih_fw_event_off - turn flag off preventing event handling
2063 * @ioc: per adapter object
2064 *
2065 * Used to prevent handling of firmware events during adapter reset
2066 * driver unload.
2067 *
2068 * Return nothing.
2069 */
2070static void
2071_scsih_fw_event_off(struct MPT2SAS_ADAPTER *ioc)
2072{
2073 unsigned long flags;
2074
2075 spin_lock_irqsave(&ioc->fw_event_lock, flags);
2076 ioc->fw_events_off = 1;
2077 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2078
2079}
2080
2081/**
2082 * _scsih_fw_event_on - turn flag on allowing firmware event handling
2083 * @ioc: per adapter object
2084 *
2085 * Returns nothing.
2086 */
2087static void
2088_scsih_fw_event_on(struct MPT2SAS_ADAPTER *ioc)
2089{
2090 unsigned long flags;
2091
2092 spin_lock_irqsave(&ioc->fw_event_lock, flags);
2093 ioc->fw_events_off = 0;
2094 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2095}
2096
2097/**
2098 * _scsih_ublock_io_device - set the device state to SDEV_RUNNING
2099 * @ioc: per adapter object
2100 * @handle: device handle
2101 *
2102 * During device pull we need to appropiately set the sdev state.
2103 */
2104static void
2105_scsih_ublock_io_device(struct MPT2SAS_ADAPTER *ioc, u16 handle)
2106{
2107 struct MPT2SAS_DEVICE *sas_device_priv_data;
2108 struct scsi_device *sdev;
2109
2110 shost_for_each_device(sdev, ioc->shost) {
2111 sas_device_priv_data = sdev->hostdata;
2112 if (!sas_device_priv_data)
2113 continue;
2114 if (!sas_device_priv_data->block)
2115 continue;
2116 if (sas_device_priv_data->sas_target->handle == handle) {
2117 dewtprintk(ioc, sdev_printk(KERN_INFO, sdev,
2118 MPT2SAS_INFO_FMT "SDEV_RUNNING: "
2119 "handle(0x%04x)\n", ioc->name, handle));
2120 sas_device_priv_data->block = 0;
2121 scsi_device_set_state(sdev, SDEV_RUNNING);
2122 }
2123 }
2124}
2125
2126/**
2127 * _scsih_block_io_device - set the device state to SDEV_BLOCK
2128 * @ioc: per adapter object
2129 * @handle: device handle
2130 *
2131 * During device pull we need to appropiately set the sdev state.
2132 */
2133static void
2134_scsih_block_io_device(struct MPT2SAS_ADAPTER *ioc, u16 handle)
2135{
2136 struct MPT2SAS_DEVICE *sas_device_priv_data;
2137 struct scsi_device *sdev;
2138
2139 shost_for_each_device(sdev, ioc->shost) {
2140 sas_device_priv_data = sdev->hostdata;
2141 if (!sas_device_priv_data)
2142 continue;
2143 if (sas_device_priv_data->block)
2144 continue;
2145 if (sas_device_priv_data->sas_target->handle == handle) {
2146 dewtprintk(ioc, sdev_printk(KERN_INFO, sdev,
2147 MPT2SAS_INFO_FMT "SDEV_BLOCK: "
2148 "handle(0x%04x)\n", ioc->name, handle));
2149 sas_device_priv_data->block = 1;
2150 scsi_device_set_state(sdev, SDEV_BLOCK);
2151 }
2152 }
2153}
2154
2155/**
2156 * _scsih_block_io_to_children_attached_to_ex
2157 * @ioc: per adapter object
2158 * @sas_expander: the sas_device object
2159 *
2160 * This routine set sdev state to SDEV_BLOCK for all devices
2161 * attached to this expander. This function called when expander is
2162 * pulled.
2163 */
2164static void
2165_scsih_block_io_to_children_attached_to_ex(struct MPT2SAS_ADAPTER *ioc,
2166 struct _sas_node *sas_expander)
2167{
2168 struct _sas_port *mpt2sas_port;
2169 struct _sas_device *sas_device;
2170 struct _sas_node *expander_sibling;
2171 unsigned long flags;
2172
2173 if (!sas_expander)
2174 return;
2175
2176 list_for_each_entry(mpt2sas_port,
2177 &sas_expander->sas_port_list, port_list) {
2178 if (mpt2sas_port->remote_identify.device_type ==
2179 SAS_END_DEVICE) {
2180 spin_lock_irqsave(&ioc->sas_device_lock, flags);
2181 sas_device =
2182 mpt2sas_scsih_sas_device_find_by_sas_address(ioc,
2183 mpt2sas_port->remote_identify.sas_address);
2184 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
2185 if (!sas_device)
2186 continue;
2187 _scsih_block_io_device(ioc, sas_device->handle);
2188 }
2189 }
2190
2191 list_for_each_entry(mpt2sas_port,
2192 &sas_expander->sas_port_list, port_list) {
2193
2194 if (mpt2sas_port->remote_identify.device_type ==
2195 MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER ||
2196 mpt2sas_port->remote_identify.device_type ==
2197 MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER) {
2198
2199 spin_lock_irqsave(&ioc->sas_node_lock, flags);
2200 expander_sibling =
2201 mpt2sas_scsih_expander_find_by_sas_address(
2202 ioc, mpt2sas_port->remote_identify.sas_address);
2203 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
2204 _scsih_block_io_to_children_attached_to_ex(ioc,
2205 expander_sibling);
2206 }
2207 }
2208}
2209
2210/**
2211 * _scsih_block_io_to_children_attached_directly
2212 * @ioc: per adapter object
2213 * @event_data: topology change event data
2214 *
2215 * This routine set sdev state to SDEV_BLOCK for all devices
2216 * direct attached during device pull.
2217 */
2218static void
2219_scsih_block_io_to_children_attached_directly(struct MPT2SAS_ADAPTER *ioc,
2220 Mpi2EventDataSasTopologyChangeList_t *event_data)
2221{
2222 int i;
2223 u16 handle;
2224 u16 reason_code;
2225 u8 phy_number;
2226
2227 for (i = 0; i < event_data->NumEntries; i++) {
2228 handle = le16_to_cpu(event_data->PHY[i].AttachedDevHandle);
2229 if (!handle)
2230 continue;
2231 phy_number = event_data->StartPhyNum + i;
2232 reason_code = event_data->PHY[i].PhyStatus &
2233 MPI2_EVENT_SAS_TOPO_RC_MASK;
2234 if (reason_code == MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING)
2235 _scsih_block_io_device(ioc, handle);
2236 }
2237}
2238
2239/**
2240 * _scsih_check_topo_delete_events - sanity check on topo events
2241 * @ioc: per adapter object
2242 * @event_data: the event data payload
2243 *
2244 * This routine added to better handle cable breaker.
2245 *
2246 * This handles the case where driver recieves multiple expander
2247 * add and delete events in a single shot. When there is a delete event
2248 * the routine will void any pending add events waiting in the event queue.
2249 *
2250 * Return nothing.
2251 */
2252static void
2253_scsih_check_topo_delete_events(struct MPT2SAS_ADAPTER *ioc,
2254 Mpi2EventDataSasTopologyChangeList_t *event_data)
2255{
2256 struct fw_event_work *fw_event;
2257 Mpi2EventDataSasTopologyChangeList_t *local_event_data;
2258 u16 expander_handle;
2259 struct _sas_node *sas_expander;
2260 unsigned long flags;
2261
2262 expander_handle = le16_to_cpu(event_data->ExpanderDevHandle);
2263 if (expander_handle < ioc->sas_hba.num_phys) {
2264 _scsih_block_io_to_children_attached_directly(ioc, event_data);
2265 return;
2266 }
2267
2268 if (event_data->ExpStatus == MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING
2269 || event_data->ExpStatus == MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING) {
2270 spin_lock_irqsave(&ioc->sas_node_lock, flags);
2271 sas_expander = mpt2sas_scsih_expander_find_by_handle(ioc,
2272 expander_handle);
2273 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
2274 _scsih_block_io_to_children_attached_to_ex(ioc, sas_expander);
2275 } else if (event_data->ExpStatus == MPI2_EVENT_SAS_TOPO_ES_RESPONDING)
2276 _scsih_block_io_to_children_attached_directly(ioc, event_data);
2277
2278 if (event_data->ExpStatus != MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING)
2279 return;
2280
2281 /* mark ignore flag for pending events */
2282 spin_lock_irqsave(&ioc->fw_event_lock, flags);
2283 list_for_each_entry(fw_event, &ioc->fw_event_list, list) {
2284 if (fw_event->event != MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST ||
2285 fw_event->ignore)
2286 continue;
2287 local_event_data = fw_event->event_data;
2288 if (local_event_data->ExpStatus ==
2289 MPI2_EVENT_SAS_TOPO_ES_ADDED ||
2290 local_event_data->ExpStatus ==
2291 MPI2_EVENT_SAS_TOPO_ES_RESPONDING) {
2292 if (le16_to_cpu(local_event_data->ExpanderDevHandle) ==
2293 expander_handle) {
2294 dewtprintk(ioc, printk(MPT2SAS_DEBUG_FMT
2295 "setting ignoring flag\n", ioc->name));
2296 fw_event->ignore = 1;
2297 }
2298 }
2299 }
2300 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
2301}
2302
2303/**
2304 * _scsih_queue_rescan - queue a topology rescan from user context
2305 * @ioc: per adapter object
2306 *
2307 * Return nothing.
2308 */
2309static void
2310_scsih_queue_rescan(struct MPT2SAS_ADAPTER *ioc)
2311{
2312 struct fw_event_work *fw_event;
2313
2314 if (ioc->wait_for_port_enable_to_complete)
2315 return;
2316 fw_event = kzalloc(sizeof(struct fw_event_work), GFP_ATOMIC);
2317 if (!fw_event)
2318 return;
2319 fw_event->event = MPT2SAS_RESCAN_AFTER_HOST_RESET;
2320 fw_event->ioc = ioc;
2321 _scsih_fw_event_add(ioc, fw_event);
2322}
2323
2324/**
2325 * _scsih_flush_running_cmds - completing outstanding commands.
2326 * @ioc: per adapter object
2327 *
2328 * The flushing out of all pending scmd commands following host reset,
2329 * where all IO is dropped to the floor.
2330 *
2331 * Return nothing.
2332 */
2333static void
2334_scsih_flush_running_cmds(struct MPT2SAS_ADAPTER *ioc)
2335{
2336 struct scsi_cmnd *scmd;
2337 u16 smid;
2338 u16 count = 0;
2339
2340 for (smid = 1; smid <= ioc->request_depth; smid++) {
2341 scmd = _scsih_scsi_lookup_getclear(ioc, smid);
2342 if (!scmd)
2343 continue;
2344 count++;
2345 mpt2sas_base_free_smid(ioc, smid);
2346 scsi_dma_unmap(scmd);
2347 scmd->result = DID_RESET << 16;
2348 scmd->scsi_done(scmd);
2349 }
2350 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "completing %d cmds\n",
2351 ioc->name, count));
2352}
2353
2354/**
2355 * mpt2sas_scsih_reset_handler - reset callback handler (for scsih)
2356 * @ioc: per adapter object
2357 * @reset_phase: phase
2358 *
2359 * The handler for doing any required cleanup or initialization.
2360 *
2361 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
2362 * MPT2_IOC_DONE_RESET
2363 *
2364 * Return nothing.
2365 */
2366void
2367mpt2sas_scsih_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
2368{
2369 switch (reset_phase) {
2370 case MPT2_IOC_PRE_RESET:
2371 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2372 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
2373 _scsih_fw_event_off(ioc);
2374 break;
2375 case MPT2_IOC_AFTER_RESET:
2376 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2377 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
2378 if (ioc->tm_cmds.status & MPT2_CMD_PENDING) {
2379 ioc->tm_cmds.status |= MPT2_CMD_RESET;
2380 mpt2sas_base_free_smid(ioc, ioc->tm_cmds.smid);
2381 complete(&ioc->tm_cmds.done);
2382 }
2383 _scsih_fw_event_on(ioc);
2384 _scsih_flush_running_cmds(ioc);
2385 break;
2386 case MPT2_IOC_DONE_RESET:
2387 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2388 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
2389 _scsih_queue_rescan(ioc);
2390 break;
2391 }
2392}
2393
2394/**
2395 * scsih_qcmd - main scsi request entry point
2396 * @scmd: pointer to scsi command object
2397 * @done: function pointer to be invoked on completion
2398 *
2399 * The callback index is set inside `ioc->scsi_io_cb_idx`.
2400 *
2401 * Returns 0 on success. If there's a failure, return either:
2402 * SCSI_MLQUEUE_DEVICE_BUSY if the device queue is full, or
2403 * SCSI_MLQUEUE_HOST_BUSY if the entire host queue is full
2404 */
2405static int
2406scsih_qcmd(struct scsi_cmnd *scmd, void (*done)(struct scsi_cmnd *))
2407{
2408 struct MPT2SAS_ADAPTER *ioc = shost_priv(scmd->device->host);
2409 struct MPT2SAS_DEVICE *sas_device_priv_data;
2410 struct MPT2SAS_TARGET *sas_target_priv_data;
2411 Mpi2SCSIIORequest_t *mpi_request;
2412 u32 mpi_control;
2413 u16 smid;
2414 unsigned long flags;
2415
2416 scmd->scsi_done = done;
2417 sas_device_priv_data = scmd->device->hostdata;
2418 if (!sas_device_priv_data) {
2419 scmd->result = DID_NO_CONNECT << 16;
2420 scmd->scsi_done(scmd);
2421 return 0;
2422 }
2423
2424 sas_target_priv_data = sas_device_priv_data->sas_target;
2425 if (!sas_target_priv_data || sas_target_priv_data->handle ==
2426 MPT2SAS_INVALID_DEVICE_HANDLE || sas_target_priv_data->deleted) {
2427 scmd->result = DID_NO_CONNECT << 16;
2428 scmd->scsi_done(scmd);
2429 return 0;
2430 }
2431
2432 /* see if we are busy with task managment stuff */
2433 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
2434 if (sas_target_priv_data->tm_busy ||
2435 ioc->shost_recovery || ioc->ioc_link_reset_in_progress) {
2436 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
2437 return SCSI_MLQUEUE_HOST_BUSY;
2438 }
2439 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
2440
2441 if (scmd->sc_data_direction == DMA_FROM_DEVICE)
2442 mpi_control = MPI2_SCSIIO_CONTROL_READ;
2443 else if (scmd->sc_data_direction == DMA_TO_DEVICE)
2444 mpi_control = MPI2_SCSIIO_CONTROL_WRITE;
2445 else
2446 mpi_control = MPI2_SCSIIO_CONTROL_NODATATRANSFER;
2447
2448 /* set tags */
2449 if (!(sas_device_priv_data->flags & MPT_DEVICE_FLAGS_INIT)) {
2450 if (scmd->device->tagged_supported) {
2451 if (scmd->device->ordered_tags)
2452 mpi_control |= MPI2_SCSIIO_CONTROL_ORDEREDQ;
2453 else
2454 mpi_control |= MPI2_SCSIIO_CONTROL_SIMPLEQ;
2455 } else
2456/* MPI Revision I (UNIT = 0xA) - removed MPI2_SCSIIO_CONTROL_UNTAGGED */
2457/* mpi_control |= MPI2_SCSIIO_CONTROL_UNTAGGED;
2458 */
2459 mpi_control |= (0x500);
2460
2461 } else
2462 mpi_control |= MPI2_SCSIIO_CONTROL_SIMPLEQ;
2463
2464 if ((sas_device_priv_data->flags & MPT_DEVICE_TLR_ON))
2465 mpi_control |= MPI2_SCSIIO_CONTROL_TLR_ON;
2466
2467 smid = mpt2sas_base_get_smid(ioc, ioc->scsi_io_cb_idx);
2468 if (!smid) {
2469 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2470 ioc->name, __func__);
2471 goto out;
2472 }
2473 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
2474 memset(mpi_request, 0, sizeof(Mpi2SCSIIORequest_t));
2475 mpi_request->Function = MPI2_FUNCTION_SCSI_IO_REQUEST;
2476 if (sas_device_priv_data->sas_target->flags &
2477 MPT_TARGET_FLAGS_RAID_COMPONENT)
2478 mpi_request->Function = MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH;
2479 else
2480 mpi_request->Function = MPI2_FUNCTION_SCSI_IO_REQUEST;
2481 mpi_request->DevHandle =
2482 cpu_to_le16(sas_device_priv_data->sas_target->handle);
2483 mpi_request->DataLength = cpu_to_le32(scsi_bufflen(scmd));
2484 mpi_request->Control = cpu_to_le32(mpi_control);
2485 mpi_request->IoFlags = cpu_to_le16(scmd->cmd_len);
2486 mpi_request->MsgFlags = MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR;
2487 mpi_request->SenseBufferLength = SCSI_SENSE_BUFFERSIZE;
2488 mpi_request->SenseBufferLowAddress =
2489 (u32)mpt2sas_base_get_sense_buffer_dma(ioc, smid);
2490 mpi_request->SGLOffset0 = offsetof(Mpi2SCSIIORequest_t, SGL) / 4;
2491 mpi_request->SGLFlags = cpu_to_le16(MPI2_SCSIIO_SGLFLAGS_TYPE_MPI +
2492 MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR);
2493
2494 int_to_scsilun(sas_device_priv_data->lun, (struct scsi_lun *)
2495 mpi_request->LUN);
2496 memcpy(mpi_request->CDB.CDB32, scmd->cmnd, scmd->cmd_len);
2497
2498 if (!mpi_request->DataLength) {
2499 mpt2sas_base_build_zero_len_sge(ioc, &mpi_request->SGL);
2500 } else {
2501 if (_scsih_build_scatter_gather(ioc, scmd, smid)) {
2502 mpt2sas_base_free_smid(ioc, smid);
2503 goto out;
2504 }
2505 }
2506
2507 _scsih_scsi_lookup_set(ioc, smid, scmd);
2508 mpt2sas_base_put_smid_scsi_io(ioc, smid, 0,
2509 sas_device_priv_data->sas_target->handle);
2510 return 0;
2511
2512 out:
2513 return SCSI_MLQUEUE_HOST_BUSY;
2514}
2515
2516/**
2517 * _scsih_normalize_sense - normalize descriptor and fixed format sense data
2518 * @sense_buffer: sense data returned by target
2519 * @data: normalized skey/asc/ascq
2520 *
2521 * Return nothing.
2522 */
2523static void
2524_scsih_normalize_sense(char *sense_buffer, struct sense_info *data)
2525{
2526 if ((sense_buffer[0] & 0x7F) >= 0x72) {
2527 /* descriptor format */
2528 data->skey = sense_buffer[1] & 0x0F;
2529 data->asc = sense_buffer[2];
2530 data->ascq = sense_buffer[3];
2531 } else {
2532 /* fixed format */
2533 data->skey = sense_buffer[2] & 0x0F;
2534 data->asc = sense_buffer[12];
2535 data->ascq = sense_buffer[13];
2536 }
2537}
2538
2539#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
2540/**
2541 * _scsih_scsi_ioc_info - translated non-succesfull SCSI_IO request
2542 * @ioc: per adapter object
2543 * @scmd: pointer to scsi command object
2544 * @mpi_reply: reply mf payload returned from firmware
2545 *
2546 * scsi_status - SCSI Status code returned from target device
2547 * scsi_state - state info associated with SCSI_IO determined by ioc
2548 * ioc_status - ioc supplied status info
2549 *
2550 * Return nothing.
2551 */
2552static void
2553_scsih_scsi_ioc_info(struct MPT2SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
2554 Mpi2SCSIIOReply_t *mpi_reply, u16 smid)
2555{
2556 u32 response_info;
2557 u8 *response_bytes;
2558 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
2559 MPI2_IOCSTATUS_MASK;
2560 u8 scsi_state = mpi_reply->SCSIState;
2561 u8 scsi_status = mpi_reply->SCSIStatus;
2562 char *desc_ioc_state = NULL;
2563 char *desc_scsi_status = NULL;
2564 char *desc_scsi_state = ioc->tmp_string;
2565
2566 switch (ioc_status) {
2567 case MPI2_IOCSTATUS_SUCCESS:
2568 desc_ioc_state = "success";
2569 break;
2570 case MPI2_IOCSTATUS_INVALID_FUNCTION:
2571 desc_ioc_state = "invalid function";
2572 break;
2573 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
2574 desc_ioc_state = "scsi recovered error";
2575 break;
2576 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
2577 desc_ioc_state = "scsi invalid dev handle";
2578 break;
2579 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
2580 desc_ioc_state = "scsi device not there";
2581 break;
2582 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
2583 desc_ioc_state = "scsi data overrun";
2584 break;
2585 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
2586 desc_ioc_state = "scsi data underrun";
2587 break;
2588 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
2589 desc_ioc_state = "scsi io data error";
2590 break;
2591 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
2592 desc_ioc_state = "scsi protocol error";
2593 break;
2594 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
2595 desc_ioc_state = "scsi task terminated";
2596 break;
2597 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
2598 desc_ioc_state = "scsi residual mismatch";
2599 break;
2600 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
2601 desc_ioc_state = "scsi task mgmt failed";
2602 break;
2603 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
2604 desc_ioc_state = "scsi ioc terminated";
2605 break;
2606 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
2607 desc_ioc_state = "scsi ext terminated";
2608 break;
2609 default:
2610 desc_ioc_state = "unknown";
2611 break;
2612 }
2613
2614 switch (scsi_status) {
2615 case MPI2_SCSI_STATUS_GOOD:
2616 desc_scsi_status = "good";
2617 break;
2618 case MPI2_SCSI_STATUS_CHECK_CONDITION:
2619 desc_scsi_status = "check condition";
2620 break;
2621 case MPI2_SCSI_STATUS_CONDITION_MET:
2622 desc_scsi_status = "condition met";
2623 break;
2624 case MPI2_SCSI_STATUS_BUSY:
2625 desc_scsi_status = "busy";
2626 break;
2627 case MPI2_SCSI_STATUS_INTERMEDIATE:
2628 desc_scsi_status = "intermediate";
2629 break;
2630 case MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET:
2631 desc_scsi_status = "intermediate condmet";
2632 break;
2633 case MPI2_SCSI_STATUS_RESERVATION_CONFLICT:
2634 desc_scsi_status = "reservation conflict";
2635 break;
2636 case MPI2_SCSI_STATUS_COMMAND_TERMINATED:
2637 desc_scsi_status = "command terminated";
2638 break;
2639 case MPI2_SCSI_STATUS_TASK_SET_FULL:
2640 desc_scsi_status = "task set full";
2641 break;
2642 case MPI2_SCSI_STATUS_ACA_ACTIVE:
2643 desc_scsi_status = "aca active";
2644 break;
2645 case MPI2_SCSI_STATUS_TASK_ABORTED:
2646 desc_scsi_status = "task aborted";
2647 break;
2648 default:
2649 desc_scsi_status = "unknown";
2650 break;
2651 }
2652
2653 desc_scsi_state[0] = '\0';
2654 if (!scsi_state)
2655 desc_scsi_state = " ";
2656 if (scsi_state & MPI2_SCSI_STATE_RESPONSE_INFO_VALID)
2657 strcat(desc_scsi_state, "response info ");
2658 if (scsi_state & MPI2_SCSI_STATE_TERMINATED)
2659 strcat(desc_scsi_state, "state terminated ");
2660 if (scsi_state & MPI2_SCSI_STATE_NO_SCSI_STATUS)
2661 strcat(desc_scsi_state, "no status ");
2662 if (scsi_state & MPI2_SCSI_STATE_AUTOSENSE_FAILED)
2663 strcat(desc_scsi_state, "autosense failed ");
2664 if (scsi_state & MPI2_SCSI_STATE_AUTOSENSE_VALID)
2665 strcat(desc_scsi_state, "autosense valid ");
2666
2667 scsi_print_command(scmd);
2668 printk(MPT2SAS_WARN_FMT "\tdev handle(0x%04x), "
2669 "ioc_status(%s)(0x%04x), smid(%d)\n", ioc->name,
2670 le16_to_cpu(mpi_reply->DevHandle), desc_ioc_state,
2671 ioc_status, smid);
2672 printk(MPT2SAS_WARN_FMT "\trequest_len(%d), underflow(%d), "
2673 "resid(%d)\n", ioc->name, scsi_bufflen(scmd), scmd->underflow,
2674 scsi_get_resid(scmd));
2675 printk(MPT2SAS_WARN_FMT "\ttag(%d), transfer_count(%d), "
2676 "sc->result(0x%08x)\n", ioc->name, le16_to_cpu(mpi_reply->TaskTag),
2677 le32_to_cpu(mpi_reply->TransferCount), scmd->result);
2678 printk(MPT2SAS_WARN_FMT "\tscsi_status(%s)(0x%02x), "
2679 "scsi_state(%s)(0x%02x)\n", ioc->name, desc_scsi_status,
2680 scsi_status, desc_scsi_state, scsi_state);
2681
2682 if (scsi_state & MPI2_SCSI_STATE_AUTOSENSE_VALID) {
2683 struct sense_info data;
2684 _scsih_normalize_sense(scmd->sense_buffer, &data);
2685 printk(MPT2SAS_WARN_FMT "\t[sense_key,asc,ascq]: "
2686 "[0x%02x,0x%02x,0x%02x]\n", ioc->name, data.skey,
2687 data.asc, data.ascq);
2688 }
2689
2690 if (scsi_state & MPI2_SCSI_STATE_RESPONSE_INFO_VALID) {
2691 response_info = le32_to_cpu(mpi_reply->ResponseInfo);
2692 response_bytes = (u8 *)&response_info;
2693 _scsih_response_code(ioc, response_bytes[3]);
2694 }
2695}
2696#endif
2697
2698/**
2699 * _scsih_smart_predicted_fault - illuminate Fault LED
2700 * @ioc: per adapter object
2701 * @handle: device handle
2702 *
2703 * Return nothing.
2704 */
2705static void
2706_scsih_smart_predicted_fault(struct MPT2SAS_ADAPTER *ioc, u16 handle)
2707{
2708 Mpi2SepReply_t mpi_reply;
2709 Mpi2SepRequest_t mpi_request;
2710 struct scsi_target *starget;
2711 struct MPT2SAS_TARGET *sas_target_priv_data;
2712 Mpi2EventNotificationReply_t *event_reply;
2713 Mpi2EventDataSasDeviceStatusChange_t *event_data;
2714 struct _sas_device *sas_device;
2715 ssize_t sz;
2716 unsigned long flags;
2717
2718 /* only handle non-raid devices */
2719 spin_lock_irqsave(&ioc->sas_device_lock, flags);
2720 sas_device = _scsih_sas_device_find_by_handle(ioc, handle);
2721 if (!sas_device) {
2722 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
2723 return;
2724 }
2725 starget = sas_device->starget;
2726 sas_target_priv_data = starget->hostdata;
2727
2728 if ((sas_target_priv_data->flags & MPT_TARGET_FLAGS_RAID_COMPONENT) ||
2729 ((sas_target_priv_data->flags & MPT_TARGET_FLAGS_VOLUME))) {
2730 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
2731 return;
2732 }
2733 starget_printk(KERN_WARNING, starget, "predicted fault\n");
2734 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
2735
2736 if (ioc->pdev->subsystem_vendor == PCI_VENDOR_ID_IBM) {
2737 memset(&mpi_request, 0, sizeof(Mpi2SepRequest_t));
2738 mpi_request.Function = MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR;
2739 mpi_request.Action = MPI2_SEP_REQ_ACTION_WRITE_STATUS;
2740 mpi_request.SlotStatus =
2741 MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT;
2742 mpi_request.DevHandle = cpu_to_le16(handle);
2743 mpi_request.Flags = MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS;
2744 if ((mpt2sas_base_scsi_enclosure_processor(ioc, &mpi_reply,
2745 &mpi_request)) != 0) {
2746 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2747 ioc->name, __FILE__, __LINE__, __func__);
2748 return;
2749 }
2750
2751 if (mpi_reply.IOCStatus || mpi_reply.IOCLogInfo) {
2752 dewtprintk(ioc, printk(MPT2SAS_INFO_FMT
2753 "enclosure_processor: ioc_status (0x%04x), "
2754 "loginfo(0x%08x)\n", ioc->name,
2755 le16_to_cpu(mpi_reply.IOCStatus),
2756 le32_to_cpu(mpi_reply.IOCLogInfo)));
2757 return;
2758 }
2759 }
2760
2761 /* insert into event log */
2762 sz = offsetof(Mpi2EventNotificationReply_t, EventData) +
2763 sizeof(Mpi2EventDataSasDeviceStatusChange_t);
2764 event_reply = kzalloc(sz, GFP_KERNEL);
2765 if (!event_reply) {
2766 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2767 ioc->name, __FILE__, __LINE__, __func__);
2768 return;
2769 }
2770
2771 event_reply->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2772 event_reply->Event =
2773 cpu_to_le16(MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
2774 event_reply->MsgLength = sz/4;
2775 event_reply->EventDataLength =
2776 cpu_to_le16(sizeof(Mpi2EventDataSasDeviceStatusChange_t)/4);
2777 event_data = (Mpi2EventDataSasDeviceStatusChange_t *)
2778 event_reply->EventData;
2779 event_data->ReasonCode = MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA;
2780 event_data->ASC = 0x5D;
2781 event_data->DevHandle = cpu_to_le16(handle);
2782 event_data->SASAddress = cpu_to_le64(sas_target_priv_data->sas_address);
2783 mpt2sas_ctl_add_to_event_log(ioc, event_reply);
2784 kfree(event_reply);
2785}
2786
2787/**
2788 * scsih_io_done - scsi request callback
2789 * @ioc: per adapter object
2790 * @smid: system request message index
2791 * @VF_ID: virtual function id
2792 * @reply: reply message frame(lower 32bit addr)
2793 *
2794 * Callback handler when using scsih_qcmd.
2795 *
2796 * Return nothing.
2797 */
2798static void
2799scsih_io_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
2800{
2801 Mpi2SCSIIORequest_t *mpi_request;
2802 Mpi2SCSIIOReply_t *mpi_reply;
2803 struct scsi_cmnd *scmd;
2804 u16 ioc_status;
2805 u32 xfer_cnt;
2806 u8 scsi_state;
2807 u8 scsi_status;
2808 u32 log_info;
2809 struct MPT2SAS_DEVICE *sas_device_priv_data;
2810 u32 response_code;
2811
2812 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
2813 scmd = _scsih_scsi_lookup_getclear(ioc, smid);
2814 if (scmd == NULL)
2815 return;
2816
2817 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
2818
2819 if (mpi_reply == NULL) {
2820 scmd->result = DID_OK << 16;
2821 goto out;
2822 }
2823
2824 sas_device_priv_data = scmd->device->hostdata;
2825 if (!sas_device_priv_data || !sas_device_priv_data->sas_target ||
2826 sas_device_priv_data->sas_target->deleted) {
2827 scmd->result = DID_NO_CONNECT << 16;
2828 goto out;
2829 }
2830
2831 /* turning off TLR */
2832 if (!sas_device_priv_data->tlr_snoop_check) {
2833 sas_device_priv_data->tlr_snoop_check++;
2834 if (sas_device_priv_data->flags & MPT_DEVICE_TLR_ON) {
2835 response_code = (le32_to_cpu(mpi_reply->ResponseInfo)
2836 >> 24);
2837 if (response_code ==
2838 MPI2_SCSITASKMGMT_RSP_INVALID_FRAME)
2839 sas_device_priv_data->flags &=
2840 ~MPT_DEVICE_TLR_ON;
2841 }
2842 }
2843
2844 xfer_cnt = le32_to_cpu(mpi_reply->TransferCount);
2845 scsi_set_resid(scmd, scsi_bufflen(scmd) - xfer_cnt);
2846 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
2847 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
2848 log_info = le32_to_cpu(mpi_reply->IOCLogInfo);
2849 else
2850 log_info = 0;
2851 ioc_status &= MPI2_IOCSTATUS_MASK;
2852 scsi_state = mpi_reply->SCSIState;
2853 scsi_status = mpi_reply->SCSIStatus;
2854
2855 if (ioc_status == MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN && xfer_cnt == 0 &&
2856 (scsi_status == MPI2_SCSI_STATUS_BUSY ||
2857 scsi_status == MPI2_SCSI_STATUS_RESERVATION_CONFLICT ||
2858 scsi_status == MPI2_SCSI_STATUS_TASK_SET_FULL)) {
2859 ioc_status = MPI2_IOCSTATUS_SUCCESS;
2860 }
2861
2862 if (scsi_state & MPI2_SCSI_STATE_AUTOSENSE_VALID) {
2863 struct sense_info data;
2864 const void *sense_data = mpt2sas_base_get_sense_buffer(ioc,
2865 smid);
2866 memcpy(scmd->sense_buffer, sense_data,
2867 le32_to_cpu(mpi_reply->SenseCount));
2868 _scsih_normalize_sense(scmd->sense_buffer, &data);
2869 /* failure prediction threshold exceeded */
2870 if (data.asc == 0x5D)
2871 _scsih_smart_predicted_fault(ioc,
2872 le16_to_cpu(mpi_reply->DevHandle));
2873 }
2874
2875 switch (ioc_status) {
2876 case MPI2_IOCSTATUS_BUSY:
2877 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
2878 scmd->result = SAM_STAT_BUSY;
2879 break;
2880
2881 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
2882 scmd->result = DID_NO_CONNECT << 16;
2883 break;
2884
2885 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
2886 if (sas_device_priv_data->block) {
2887 scmd->result = (DID_BUS_BUSY << 16);
2888 break;
2889 }
2890
2891 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
2892 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
2893 scmd->result = DID_RESET << 16;
2894 break;
2895
2896 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
2897 if ((xfer_cnt == 0) || (scmd->underflow > xfer_cnt))
2898 scmd->result = DID_SOFT_ERROR << 16;
2899 else
2900 scmd->result = (DID_OK << 16) | scsi_status;
2901 break;
2902
2903 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
2904 scmd->result = (DID_OK << 16) | scsi_status;
2905
2906 if ((scsi_state & MPI2_SCSI_STATE_AUTOSENSE_VALID))
2907 break;
2908
2909 if (xfer_cnt < scmd->underflow) {
2910 if (scsi_status == SAM_STAT_BUSY)
2911 scmd->result = SAM_STAT_BUSY;
2912 else
2913 scmd->result = DID_SOFT_ERROR << 16;
2914 } else if (scsi_state & (MPI2_SCSI_STATE_AUTOSENSE_FAILED |
2915 MPI2_SCSI_STATE_NO_SCSI_STATUS))
2916 scmd->result = DID_SOFT_ERROR << 16;
2917 else if (scsi_state & MPI2_SCSI_STATE_TERMINATED)
2918 scmd->result = DID_RESET << 16;
2919 else if (!xfer_cnt && scmd->cmnd[0] == REPORT_LUNS) {
2920 mpi_reply->SCSIState = MPI2_SCSI_STATE_AUTOSENSE_VALID;
2921 mpi_reply->SCSIStatus = SAM_STAT_CHECK_CONDITION;
2922 scmd->result = (DRIVER_SENSE << 24) |
2923 SAM_STAT_CHECK_CONDITION;
2924 scmd->sense_buffer[0] = 0x70;
2925 scmd->sense_buffer[2] = ILLEGAL_REQUEST;
2926 scmd->sense_buffer[12] = 0x20;
2927 scmd->sense_buffer[13] = 0;
2928 }
2929 break;
2930
2931 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
2932 scsi_set_resid(scmd, 0);
2933 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
2934 case MPI2_IOCSTATUS_SUCCESS:
2935 scmd->result = (DID_OK << 16) | scsi_status;
2936 if (scsi_state & (MPI2_SCSI_STATE_AUTOSENSE_FAILED |
2937 MPI2_SCSI_STATE_NO_SCSI_STATUS))
2938 scmd->result = DID_SOFT_ERROR << 16;
2939 else if (scsi_state & MPI2_SCSI_STATE_TERMINATED)
2940 scmd->result = DID_RESET << 16;
2941 break;
2942
2943 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
2944 case MPI2_IOCSTATUS_INVALID_FUNCTION:
2945 case MPI2_IOCSTATUS_INVALID_SGL:
2946 case MPI2_IOCSTATUS_INTERNAL_ERROR:
2947 case MPI2_IOCSTATUS_INVALID_FIELD:
2948 case MPI2_IOCSTATUS_INVALID_STATE:
2949 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
2950 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
2951 default:
2952 scmd->result = DID_SOFT_ERROR << 16;
2953 break;
2954
2955 }
2956
2957#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
2958 if (scmd->result && (ioc->logging_level & MPT_DEBUG_REPLY))
2959 _scsih_scsi_ioc_info(ioc , scmd, mpi_reply, smid);
2960#endif
2961
2962 out:
2963 scsi_dma_unmap(scmd);
2964 scmd->scsi_done(scmd);
2965}
2966
2967/**
2968 * _scsih_link_change - process phy link changes
2969 * @ioc: per adapter object
2970 * @handle: phy handle
2971 * @attached_handle: valid for devices attached to link
2972 * @phy_number: phy number
2973 * @link_rate: new link rate
2974 * Context: user.
2975 *
2976 * Return nothing.
2977 */
2978static void
2979_scsih_link_change(struct MPT2SAS_ADAPTER *ioc, u16 handle, u16 attached_handle,
2980 u8 phy_number, u8 link_rate)
2981{
2982 mpt2sas_transport_update_phy_link_change(ioc, handle, attached_handle,
2983 phy_number, link_rate);
2984}
2985
2986/**
2987 * _scsih_sas_host_refresh - refreshing sas host object contents
2988 * @ioc: per adapter object
2989 * @update: update link information
2990 * Context: user
2991 *
2992 * During port enable, fw will send topology events for every device. Its
2993 * possible that the handles may change from the previous setting, so this
2994 * code keeping handles updating if changed.
2995 *
2996 * Return nothing.
2997 */
2998static void
2999_scsih_sas_host_refresh(struct MPT2SAS_ADAPTER *ioc, u8 update)
3000{
3001 u16 sz;
3002 u16 ioc_status;
3003 int i;
3004 Mpi2ConfigReply_t mpi_reply;
3005 Mpi2SasIOUnitPage0_t *sas_iounit_pg0 = NULL;
3006
3007 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT
3008 "updating handles for sas_host(0x%016llx)\n",
3009 ioc->name, (unsigned long long)ioc->sas_hba.sas_address));
3010
3011 sz = offsetof(Mpi2SasIOUnitPage0_t, PhyData) + (ioc->sas_hba.num_phys
3012 * sizeof(Mpi2SasIOUnit0PhyData_t));
3013 sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL);
3014 if (!sas_iounit_pg0) {
3015 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3016 ioc->name, __FILE__, __LINE__, __func__);
3017 return;
3018 }
3019 if (!(mpt2sas_config_get_sas_iounit_pg0(ioc, &mpi_reply,
3020 sas_iounit_pg0, sz))) {
3021 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
3022 MPI2_IOCSTATUS_MASK;
3023 if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
3024 goto out;
3025 for (i = 0; i < ioc->sas_hba.num_phys ; i++) {
3026 ioc->sas_hba.phy[i].handle =
3027 le16_to_cpu(sas_iounit_pg0->PhyData[i].
3028 ControllerDevHandle);
3029 if (update)
3030 _scsih_link_change(ioc,
3031 ioc->sas_hba.phy[i].handle,
3032 le16_to_cpu(sas_iounit_pg0->PhyData[i].
3033 AttachedDevHandle), i,
3034 sas_iounit_pg0->PhyData[i].
3035 NegotiatedLinkRate >> 4);
3036 }
3037 }
3038
3039 out:
3040 kfree(sas_iounit_pg0);
3041}
3042
3043/**
3044 * _scsih_sas_host_add - create sas host object
3045 * @ioc: per adapter object
3046 *
3047 * Creating host side data object, stored in ioc->sas_hba
3048 *
3049 * Return nothing.
3050 */
3051static void
3052_scsih_sas_host_add(struct MPT2SAS_ADAPTER *ioc)
3053{
3054 int i;
3055 Mpi2ConfigReply_t mpi_reply;
3056 Mpi2SasIOUnitPage0_t *sas_iounit_pg0 = NULL;
3057 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
3058 Mpi2SasPhyPage0_t phy_pg0;
3059 Mpi2SasDevicePage0_t sas_device_pg0;
3060 Mpi2SasEnclosurePage0_t enclosure_pg0;
3061 u16 ioc_status;
3062 u16 sz;
3063 u16 device_missing_delay;
3064
3065 mpt2sas_config_get_number_hba_phys(ioc, &ioc->sas_hba.num_phys);
3066 if (!ioc->sas_hba.num_phys) {
3067 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3068 ioc->name, __FILE__, __LINE__, __func__);
3069 return;
3070 }
3071
3072 /* sas_iounit page 0 */
3073 sz = offsetof(Mpi2SasIOUnitPage0_t, PhyData) + (ioc->sas_hba.num_phys *
3074 sizeof(Mpi2SasIOUnit0PhyData_t));
3075 sas_iounit_pg0 = kzalloc(sz, GFP_KERNEL);
3076 if (!sas_iounit_pg0) {
3077 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3078 ioc->name, __FILE__, __LINE__, __func__);
3079 return;
3080 }
3081 if ((mpt2sas_config_get_sas_iounit_pg0(ioc, &mpi_reply,
3082 sas_iounit_pg0, sz))) {
3083 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3084 ioc->name, __FILE__, __LINE__, __func__);
3085 goto out;
3086 }
3087 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
3088 MPI2_IOCSTATUS_MASK;
3089 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3090 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3091 ioc->name, __FILE__, __LINE__, __func__);
3092 goto out;
3093 }
3094
3095 /* sas_iounit page 1 */
3096 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (ioc->sas_hba.num_phys *
3097 sizeof(Mpi2SasIOUnit1PhyData_t));
3098 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
3099 if (!sas_iounit_pg1) {
3100 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3101 ioc->name, __FILE__, __LINE__, __func__);
3102 goto out;
3103 }
3104 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
3105 sas_iounit_pg1, sz))) {
3106 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3107 ioc->name, __FILE__, __LINE__, __func__);
3108 goto out;
3109 }
3110 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
3111 MPI2_IOCSTATUS_MASK;
3112 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3113 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3114 ioc->name, __FILE__, __LINE__, __func__);
3115 goto out;
3116 }
3117
3118 ioc->io_missing_delay =
3119 le16_to_cpu(sas_iounit_pg1->IODeviceMissingDelay);
3120 device_missing_delay =
3121 le16_to_cpu(sas_iounit_pg1->ReportDeviceMissingDelay);
3122 if (device_missing_delay & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
3123 ioc->device_missing_delay = (device_missing_delay &
3124 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
3125 else
3126 ioc->device_missing_delay = device_missing_delay &
3127 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
3128
3129 ioc->sas_hba.parent_dev = &ioc->shost->shost_gendev;
3130 ioc->sas_hba.phy = kcalloc(ioc->sas_hba.num_phys,
3131 sizeof(struct _sas_phy), GFP_KERNEL);
3132 if (!ioc->sas_hba.phy) {
3133 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3134 ioc->name, __FILE__, __LINE__, __func__);
3135 goto out;
3136 }
3137 for (i = 0; i < ioc->sas_hba.num_phys ; i++) {
3138 if ((mpt2sas_config_get_phy_pg0(ioc, &mpi_reply, &phy_pg0,
3139 i))) {
3140 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3141 ioc->name, __FILE__, __LINE__, __func__);
3142 goto out;
3143 }
3144 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
3145 MPI2_IOCSTATUS_MASK;
3146 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3147 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3148 ioc->name, __FILE__, __LINE__, __func__);
3149 goto out;
3150 }
3151 ioc->sas_hba.phy[i].handle =
3152 le16_to_cpu(sas_iounit_pg0->PhyData[i].ControllerDevHandle);
3153 ioc->sas_hba.phy[i].phy_id = i;
3154 mpt2sas_transport_add_host_phy(ioc, &ioc->sas_hba.phy[i],
3155 phy_pg0, ioc->sas_hba.parent_dev);
3156 }
3157 if ((mpt2sas_config_get_sas_device_pg0(ioc, &mpi_reply, &sas_device_pg0,
3158 MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, ioc->sas_hba.phy[0].handle))) {
3159 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3160 ioc->name, __FILE__, __LINE__, __func__);
3161 goto out;
3162 }
3163 ioc->sas_hba.handle = le16_to_cpu(sas_device_pg0.DevHandle);
3164 ioc->sas_hba.enclosure_handle =
3165 le16_to_cpu(sas_device_pg0.EnclosureHandle);
3166 ioc->sas_hba.sas_address = le64_to_cpu(sas_device_pg0.SASAddress);
3167 printk(MPT2SAS_INFO_FMT "host_add: handle(0x%04x), "
3168 "sas_addr(0x%016llx), phys(%d)\n", ioc->name, ioc->sas_hba.handle,
3169 (unsigned long long) ioc->sas_hba.sas_address,
3170 ioc->sas_hba.num_phys) ;
3171
3172 if (ioc->sas_hba.enclosure_handle) {
3173 if (!(mpt2sas_config_get_enclosure_pg0(ioc, &mpi_reply,
3174 &enclosure_pg0,
3175 MPI2_SAS_ENCLOS_PGAD_FORM_HANDLE,
3176 ioc->sas_hba.enclosure_handle))) {
3177 ioc->sas_hba.enclosure_logical_id =
3178 le64_to_cpu(enclosure_pg0.EnclosureLogicalID);
3179 }
3180 }
3181
3182 out:
3183 kfree(sas_iounit_pg1);
3184 kfree(sas_iounit_pg0);
3185}
3186
3187/**
3188 * _scsih_expander_add - creating expander object
3189 * @ioc: per adapter object
3190 * @handle: expander handle
3191 *
3192 * Creating expander object, stored in ioc->sas_expander_list.
3193 *
3194 * Return 0 for success, else error.
3195 */
3196static int
3197_scsih_expander_add(struct MPT2SAS_ADAPTER *ioc, u16 handle)
3198{
3199 struct _sas_node *sas_expander;
3200 Mpi2ConfigReply_t mpi_reply;
3201 Mpi2ExpanderPage0_t expander_pg0;
3202 Mpi2ExpanderPage1_t expander_pg1;
3203 Mpi2SasEnclosurePage0_t enclosure_pg0;
3204 u32 ioc_status;
3205 u16 parent_handle;
3206 __le64 sas_address;
3207 int i;
3208 unsigned long flags;
3209 struct _sas_port *mpt2sas_port;
3210 int rc = 0;
3211
3212 if (!handle)
3213 return -1;
3214
3215 if ((mpt2sas_config_get_expander_pg0(ioc, &mpi_reply, &expander_pg0,
3216 MPI2_SAS_EXPAND_PGAD_FORM_HNDL, handle))) {
3217 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3218 ioc->name, __FILE__, __LINE__, __func__);
3219 return -1;
3220 }
3221
3222 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
3223 MPI2_IOCSTATUS_MASK;
3224 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3225 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3226 ioc->name, __FILE__, __LINE__, __func__);
3227 return -1;
3228 }
3229
3230 /* handle out of order topology events */
3231 parent_handle = le16_to_cpu(expander_pg0.ParentDevHandle);
3232 if (parent_handle >= ioc->sas_hba.num_phys) {
3233 spin_lock_irqsave(&ioc->sas_node_lock, flags);
3234 sas_expander = mpt2sas_scsih_expander_find_by_handle(ioc,
3235 parent_handle);
3236 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
3237 if (!sas_expander) {
3238 rc = _scsih_expander_add(ioc, parent_handle);
3239 if (rc != 0)
3240 return rc;
3241 }
3242 }
3243
3244 sas_address = le64_to_cpu(expander_pg0.SASAddress);
3245
3246 spin_lock_irqsave(&ioc->sas_node_lock, flags);
3247 sas_expander = mpt2sas_scsih_expander_find_by_sas_address(ioc,
3248 sas_address);
3249 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
3250
3251 if (sas_expander)
3252 return 0;
3253
3254 sas_expander = kzalloc(sizeof(struct _sas_node),
3255 GFP_KERNEL);
3256 if (!sas_expander) {
3257 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3258 ioc->name, __FILE__, __LINE__, __func__);
3259 return -1;
3260 }
3261
3262 sas_expander->handle = handle;
3263 sas_expander->num_phys = expander_pg0.NumPhys;
3264 sas_expander->parent_handle = parent_handle;
3265 sas_expander->enclosure_handle =
3266 le16_to_cpu(expander_pg0.EnclosureHandle);
3267 sas_expander->sas_address = sas_address;
3268
3269 printk(MPT2SAS_INFO_FMT "expander_add: handle(0x%04x),"
3270 " parent(0x%04x), sas_addr(0x%016llx), phys(%d)\n", ioc->name,
3271 handle, sas_expander->parent_handle, (unsigned long long)
3272 sas_expander->sas_address, sas_expander->num_phys);
3273
3274 if (!sas_expander->num_phys)
3275 goto out_fail;
3276 sas_expander->phy = kcalloc(sas_expander->num_phys,
3277 sizeof(struct _sas_phy), GFP_KERNEL);
3278 if (!sas_expander->phy) {
3279 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3280 ioc->name, __FILE__, __LINE__, __func__);
3281 rc = -1;
3282 goto out_fail;
3283 }
3284
3285 INIT_LIST_HEAD(&sas_expander->sas_port_list);
3286 mpt2sas_port = mpt2sas_transport_port_add(ioc, handle,
3287 sas_expander->parent_handle);
3288 if (!mpt2sas_port) {
3289 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3290 ioc->name, __FILE__, __LINE__, __func__);
3291 rc = -1;
3292 goto out_fail;
3293 }
3294 sas_expander->parent_dev = &mpt2sas_port->rphy->dev;
3295
3296 for (i = 0 ; i < sas_expander->num_phys ; i++) {
3297 if ((mpt2sas_config_get_expander_pg1(ioc, &mpi_reply,
3298 &expander_pg1, i, handle))) {
3299 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3300 ioc->name, __FILE__, __LINE__, __func__);
3301 continue;
3302 }
3303 sas_expander->phy[i].handle = handle;
3304 sas_expander->phy[i].phy_id = i;
3305 mpt2sas_transport_add_expander_phy(ioc, &sas_expander->phy[i],
3306 expander_pg1, sas_expander->parent_dev);
3307 }
3308
3309 if (sas_expander->enclosure_handle) {
3310 if (!(mpt2sas_config_get_enclosure_pg0(ioc, &mpi_reply,
3311 &enclosure_pg0, MPI2_SAS_ENCLOS_PGAD_FORM_HANDLE,
3312 sas_expander->enclosure_handle))) {
3313 sas_expander->enclosure_logical_id =
3314 le64_to_cpu(enclosure_pg0.EnclosureLogicalID);
3315 }
3316 }
3317
3318 _scsih_expander_node_add(ioc, sas_expander);
3319 return 0;
3320
3321 out_fail:
3322
3323 if (sas_expander)
3324 kfree(sas_expander->phy);
3325 kfree(sas_expander);
3326 return rc;
3327}
3328
3329/**
3330 * _scsih_expander_remove - removing expander object
3331 * @ioc: per adapter object
3332 * @handle: expander handle
3333 *
3334 * Return nothing.
3335 */
3336static void
3337_scsih_expander_remove(struct MPT2SAS_ADAPTER *ioc, u16 handle)
3338{
3339 struct _sas_node *sas_expander;
3340 unsigned long flags;
3341
3342 spin_lock_irqsave(&ioc->sas_node_lock, flags);
3343 sas_expander = mpt2sas_scsih_expander_find_by_handle(ioc, handle);
3344 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
3345 _scsih_expander_node_remove(ioc, sas_expander);
3346}
3347
3348/**
3349 * _scsih_add_device - creating sas device object
3350 * @ioc: per adapter object
3351 * @handle: sas device handle
3352 * @phy_num: phy number end device attached to
3353 * @is_pd: is this hidden raid component
3354 *
3355 * Creating end device object, stored in ioc->sas_device_list.
3356 *
3357 * Returns 0 for success, non-zero for failure.
3358 */
3359static int
3360_scsih_add_device(struct MPT2SAS_ADAPTER *ioc, u16 handle, u8 phy_num, u8 is_pd)
3361{
3362 Mpi2ConfigReply_t mpi_reply;
3363 Mpi2SasDevicePage0_t sas_device_pg0;
3364 Mpi2SasEnclosurePage0_t enclosure_pg0;
3365 struct _sas_device *sas_device;
3366 u32 ioc_status;
3367 __le64 sas_address;
3368 u32 device_info;
3369 unsigned long flags;
3370
3371 if ((mpt2sas_config_get_sas_device_pg0(ioc, &mpi_reply, &sas_device_pg0,
3372 MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, handle))) {
3373 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3374 ioc->name, __FILE__, __LINE__, __func__);
3375 return -1;
3376 }
3377
3378 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
3379 MPI2_IOCSTATUS_MASK;
3380 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3381 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3382 ioc->name, __FILE__, __LINE__, __func__);
3383 return -1;
3384 }
3385
3386 /* check if device is present */
3387 if (!(le16_to_cpu(sas_device_pg0.Flags) &
3388 MPI2_SAS_DEVICE0_FLAGS_DEVICE_PRESENT)) {
3389 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3390 ioc->name, __FILE__, __LINE__, __func__);
3391 printk(MPT2SAS_ERR_FMT "Flags = 0x%04x\n",
3392 ioc->name, le16_to_cpu(sas_device_pg0.Flags));
3393 return -1;
3394 }
3395
3396 /* check if there were any issus with discovery */
3397 if (sas_device_pg0.AccessStatus ==
3398 MPI2_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED) {
3399 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3400 ioc->name, __FILE__, __LINE__, __func__);
3401 printk(MPT2SAS_ERR_FMT "AccessStatus = 0x%02x\n",
3402 ioc->name, sas_device_pg0.AccessStatus);
3403 return -1;
3404 }
3405
3406 /* check if this is end device */
3407 device_info = le32_to_cpu(sas_device_pg0.DeviceInfo);
3408 if (!(_scsih_is_end_device(device_info))) {
3409 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3410 ioc->name, __FILE__, __LINE__, __func__);
3411 return -1;
3412 }
3413
3414 sas_address = le64_to_cpu(sas_device_pg0.SASAddress);
3415
3416 spin_lock_irqsave(&ioc->sas_device_lock, flags);
3417 sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,
3418 sas_address);
3419 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
3420
3421 if (sas_device) {
3422 _scsih_ublock_io_device(ioc, handle);
3423 return 0;
3424 }
3425
3426 sas_device = kzalloc(sizeof(struct _sas_device),
3427 GFP_KERNEL);
3428 if (!sas_device) {
3429 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3430 ioc->name, __FILE__, __LINE__, __func__);
3431 return -1;
3432 }
3433
3434 sas_device->handle = handle;
3435 sas_device->parent_handle =
3436 le16_to_cpu(sas_device_pg0.ParentDevHandle);
3437 sas_device->enclosure_handle =
3438 le16_to_cpu(sas_device_pg0.EnclosureHandle);
3439 sas_device->slot =
3440 le16_to_cpu(sas_device_pg0.Slot);
3441 sas_device->device_info = device_info;
3442 sas_device->sas_address = sas_address;
3443 sas_device->hidden_raid_component = is_pd;
3444
3445 /* get enclosure_logical_id */
3446 if (!(mpt2sas_config_get_enclosure_pg0(ioc, &mpi_reply, &enclosure_pg0,
3447 MPI2_SAS_ENCLOS_PGAD_FORM_HANDLE,
3448 sas_device->enclosure_handle))) {
3449 sas_device->enclosure_logical_id =
3450 le64_to_cpu(enclosure_pg0.EnclosureLogicalID);
3451 }
3452
3453 /* get device name */
3454 sas_device->device_name = le64_to_cpu(sas_device_pg0.DeviceName);
3455
3456 if (ioc->wait_for_port_enable_to_complete)
3457 _scsih_sas_device_init_add(ioc, sas_device);
3458 else
3459 _scsih_sas_device_add(ioc, sas_device);
3460
3461 return 0;
3462}
3463
3464/**
3465 * _scsih_remove_device - removing sas device object
3466 * @ioc: per adapter object
3467 * @handle: sas device handle
3468 *
3469 * Return nothing.
3470 */
3471static void
3472_scsih_remove_device(struct MPT2SAS_ADAPTER *ioc, u16 handle)
3473{
3474 struct MPT2SAS_TARGET *sas_target_priv_data;
3475 struct _sas_device *sas_device;
3476 unsigned long flags;
3477 Mpi2SasIoUnitControlReply_t mpi_reply;
3478 Mpi2SasIoUnitControlRequest_t mpi_request;
3479 u16 device_handle;
3480
3481 /* lookup sas_device */
3482 spin_lock_irqsave(&ioc->sas_device_lock, flags);
3483 sas_device = _scsih_sas_device_find_by_handle(ioc, handle);
3484 if (!sas_device) {
3485 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
3486 return;
3487 }
3488
3489 dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter: handle"
3490 "(0x%04x)\n", ioc->name, __func__, handle));
3491
3492 if (sas_device->starget && sas_device->starget->hostdata) {
3493 sas_target_priv_data = sas_device->starget->hostdata;
3494 sas_target_priv_data->deleted = 1;
3495 }
3496 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
3497
3498 if (ioc->remove_host)
3499 goto out;
3500
3501 /* Target Reset to flush out all the outstanding IO */
3502 device_handle = (sas_device->hidden_raid_component) ?
3503 sas_device->volume_handle : handle;
3504 if (device_handle) {
3505 dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "issue target reset: "
3506 "handle(0x%04x)\n", ioc->name, device_handle));
3507 mutex_lock(&ioc->tm_cmds.mutex);
3508 mpt2sas_scsih_issue_tm(ioc, device_handle, 0,
3509 MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET, 0, 10);
3510 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3511 mutex_unlock(&ioc->tm_cmds.mutex);
3512 dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "issue target reset "
3513 "done: handle(0x%04x)\n", ioc->name, device_handle));
3514 }
3515
3516 /* SAS_IO_UNIT_CNTR - send REMOVE_DEVICE */
3517 dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "sas_iounit: handle"
3518 "(0x%04x)\n", ioc->name, handle));
3519 memset(&mpi_request, 0, sizeof(Mpi2SasIoUnitControlRequest_t));
3520 mpi_request.Function = MPI2_FUNCTION_SAS_IO_UNIT_CONTROL;
3521 mpi_request.Operation = MPI2_SAS_OP_REMOVE_DEVICE;
3522 mpi_request.DevHandle = handle;
3523 mpi_request.VF_ID = 0;
3524 if ((mpt2sas_base_sas_iounit_control(ioc, &mpi_reply,
3525 &mpi_request)) != 0) {
3526 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
3527 ioc->name, __FILE__, __LINE__, __func__);
3528 }
3529
3530 dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "sas_iounit: ioc_status"
3531 "(0x%04x), loginfo(0x%08x)\n", ioc->name,
3532 le16_to_cpu(mpi_reply.IOCStatus),
3533 le32_to_cpu(mpi_reply.IOCLogInfo)));
3534
3535 out:
3536 mpt2sas_transport_port_remove(ioc, sas_device->sas_address,
3537 sas_device->parent_handle);
3538
3539 printk(MPT2SAS_INFO_FMT "removing handle(0x%04x), sas_addr"
3540 "(0x%016llx)\n", ioc->name, sas_device->handle,
3541 (unsigned long long) sas_device->sas_address);
3542 _scsih_sas_device_remove(ioc, sas_device);
3543
3544 dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit: handle"
3545 "(0x%04x)\n", ioc->name, __func__, handle));
3546}
3547
3548#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
3549/**
3550 * _scsih_sas_topology_change_event_debug - debug for topology event
3551 * @ioc: per adapter object
3552 * @event_data: event data payload
3553 * Context: user.
3554 */
3555static void
3556_scsih_sas_topology_change_event_debug(struct MPT2SAS_ADAPTER *ioc,
3557 Mpi2EventDataSasTopologyChangeList_t *event_data)
3558{
3559 int i;
3560 u16 handle;
3561 u16 reason_code;
3562 u8 phy_number;
3563 char *status_str = NULL;
3564 char link_rate[25];
3565
3566 switch (event_data->ExpStatus) {
3567 case MPI2_EVENT_SAS_TOPO_ES_ADDED:
3568 status_str = "add";
3569 break;
3570 case MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING:
3571 status_str = "remove";
3572 break;
3573 case MPI2_EVENT_SAS_TOPO_ES_RESPONDING:
3574 status_str = "responding";
3575 break;
3576 case MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING:
3577 status_str = "remove delay";
3578 break;
3579 default:
3580 status_str = "unknown status";
3581 break;
3582 }
3583 printk(MPT2SAS_DEBUG_FMT "sas topology change: (%s)\n",
3584 ioc->name, status_str);
3585 printk(KERN_DEBUG "\thandle(0x%04x), enclosure_handle(0x%04x) "
3586 "start_phy(%02d), count(%d)\n",
3587 le16_to_cpu(event_data->ExpanderDevHandle),
3588 le16_to_cpu(event_data->EnclosureHandle),
3589 event_data->StartPhyNum, event_data->NumEntries);
3590 for (i = 0; i < event_data->NumEntries; i++) {
3591 handle = le16_to_cpu(event_data->PHY[i].AttachedDevHandle);
3592 if (!handle)
3593 continue;
3594 phy_number = event_data->StartPhyNum + i;
3595 reason_code = event_data->PHY[i].PhyStatus &
3596 MPI2_EVENT_SAS_TOPO_RC_MASK;
3597 switch (reason_code) {
3598 case MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED:
3599 snprintf(link_rate, 25, ": add, link(0x%02x)",
3600 (event_data->PHY[i].LinkRate >> 4));
3601 status_str = link_rate;
3602 break;
3603 case MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING:
3604 status_str = ": remove";
3605 break;
3606 case MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING:
3607 status_str = ": remove_delay";
3608 break;
3609 case MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED:
3610 snprintf(link_rate, 25, ": link(0x%02x)",
3611 (event_data->PHY[i].LinkRate >> 4));
3612 status_str = link_rate;
3613 break;
3614 case MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE:
3615 status_str = ": responding";
3616 break;
3617 default:
3618 status_str = ": unknown";
3619 break;
3620 }
3621 printk(KERN_DEBUG "\tphy(%02d), attached_handle(0x%04x)%s\n",
3622 phy_number, handle, status_str);
3623 }
3624}
3625#endif
3626
3627/**
3628 * _scsih_sas_topology_change_event - handle topology changes
3629 * @ioc: per adapter object
3630 * @VF_ID:
3631 * @event_data: event data payload
3632 * fw_event:
3633 * Context: user.
3634 *
3635 */
3636static void
3637_scsih_sas_topology_change_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
3638 Mpi2EventDataSasTopologyChangeList_t *event_data,
3639 struct fw_event_work *fw_event)
3640{
3641 int i;
3642 u16 parent_handle, handle;
3643 u16 reason_code;
3644 u8 phy_number;
3645 struct _sas_node *sas_expander;
3646 unsigned long flags;
3647 u8 link_rate_;
3648
3649#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
3650 if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK)
3651 _scsih_sas_topology_change_event_debug(ioc, event_data);
3652#endif
3653
3654 if (!ioc->sas_hba.num_phys)
3655 _scsih_sas_host_add(ioc);
3656 else
3657 _scsih_sas_host_refresh(ioc, 0);
3658
3659 if (fw_event->ignore) {
3660 dewtprintk(ioc, printk(MPT2SAS_DEBUG_FMT "ignoring expander "
3661 "event\n", ioc->name));
3662 return;
3663 }
3664
3665 parent_handle = le16_to_cpu(event_data->ExpanderDevHandle);
3666
3667 /* handle expander add */
3668 if (event_data->ExpStatus == MPI2_EVENT_SAS_TOPO_ES_ADDED)
3669 if (_scsih_expander_add(ioc, parent_handle) != 0)
3670 return;
3671
3672 /* handle siblings events */
3673 for (i = 0; i < event_data->NumEntries; i++) {
3674 if (fw_event->ignore) {
3675 dewtprintk(ioc, printk(MPT2SAS_DEBUG_FMT "ignoring "
3676 "expander event\n", ioc->name));
3677 return;
3678 }
3679 if (event_data->PHY[i].PhyStatus &
3680 MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT)
3681 continue;
3682 handle = le16_to_cpu(event_data->PHY[i].AttachedDevHandle);
3683 if (!handle)
3684 continue;
3685 phy_number = event_data->StartPhyNum + i;
3686 reason_code = event_data->PHY[i].PhyStatus &
3687 MPI2_EVENT_SAS_TOPO_RC_MASK;
3688 link_rate_ = event_data->PHY[i].LinkRate >> 4;
3689 switch (reason_code) {
3690 case MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED:
3691 case MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED:
3692 if (!parent_handle) {
3693 if (phy_number < ioc->sas_hba.num_phys)
3694 _scsih_link_change(ioc,
3695 ioc->sas_hba.phy[phy_number].handle,
3696 handle, phy_number, link_rate_);
3697 } else {
3698 spin_lock_irqsave(&ioc->sas_node_lock, flags);
3699 sas_expander =
3700 mpt2sas_scsih_expander_find_by_handle(ioc,
3701 parent_handle);
3702 spin_unlock_irqrestore(&ioc->sas_node_lock,
3703 flags);
3704 if (sas_expander) {
3705 if (phy_number < sas_expander->num_phys)
3706 _scsih_link_change(ioc,
3707 sas_expander->
3708 phy[phy_number].handle,
3709 handle, phy_number,
3710 link_rate_);
3711 }
3712 }
3713 if (reason_code == MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED) {
3714 if (link_rate_ >= MPI2_SAS_NEG_LINK_RATE_1_5)
3715 _scsih_ublock_io_device(ioc, handle);
3716 }
3717 if (reason_code == MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED) {
3718 if (link_rate_ < MPI2_SAS_NEG_LINK_RATE_1_5)
3719 break;
3720 _scsih_add_device(ioc, handle, phy_number, 0);
3721 }
3722 break;
3723 case MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING:
3724 _scsih_remove_device(ioc, handle);
3725 break;
3726 }
3727 }
3728
3729 /* handle expander removal */
3730 if (event_data->ExpStatus == MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING)
3731 _scsih_expander_remove(ioc, parent_handle);
3732
3733}
3734
3735#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
3736/**
3737 * _scsih_sas_device_status_change_event_debug - debug for device event
3738 * @event_data: event data payload
3739 * Context: user.
3740 *
3741 * Return nothing.
3742 */
3743static void
3744_scsih_sas_device_status_change_event_debug(struct MPT2SAS_ADAPTER *ioc,
3745 Mpi2EventDataSasDeviceStatusChange_t *event_data)
3746{
3747 char *reason_str = NULL;
3748
3749 switch (event_data->ReasonCode) {
3750 case MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA:
3751 reason_str = "smart data";
3752 break;
3753 case MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED:
3754 reason_str = "unsupported device discovered";
3755 break;
3756 case MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET:
3757 reason_str = "internal device reset";
3758 break;
3759 case MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL:
3760 reason_str = "internal task abort";
3761 break;
3762 case MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL:
3763 reason_str = "internal task abort set";
3764 break;
3765 case MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL:
3766 reason_str = "internal clear task set";
3767 break;
3768 case MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL:
3769 reason_str = "internal query task";
3770 break;
3771 case MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE:
3772 reason_str = "sata init failure";
3773 break;
3774 case MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET:
3775 reason_str = "internal device reset complete";
3776 break;
3777 case MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL:
3778 reason_str = "internal task abort complete";
3779 break;
3780 case MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION:
3781 reason_str = "internal async notification";
3782 break;
3783 default:
3784 reason_str = "unknown reason";
3785 break;
3786 }
3787 printk(MPT2SAS_DEBUG_FMT "device status change: (%s)\n"
3788 "\thandle(0x%04x), sas address(0x%016llx)", ioc->name,
3789 reason_str, le16_to_cpu(event_data->DevHandle),
3790 (unsigned long long)le64_to_cpu(event_data->SASAddress));
3791 if (event_data->ReasonCode == MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA)
3792 printk(MPT2SAS_DEBUG_FMT ", ASC(0x%x), ASCQ(0x%x)\n", ioc->name,
3793 event_data->ASC, event_data->ASCQ);
3794 printk(KERN_INFO "\n");
3795}
3796#endif
3797
3798/**
3799 * _scsih_sas_device_status_change_event - handle device status change
3800 * @ioc: per adapter object
3801 * @VF_ID:
3802 * @event_data: event data payload
3803 * Context: user.
3804 *
3805 * Return nothing.
3806 */
3807static void
3808_scsih_sas_device_status_change_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
3809 Mpi2EventDataSasDeviceStatusChange_t *event_data)
3810{
3811#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
3812 if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK)
3813 _scsih_sas_device_status_change_event_debug(ioc, event_data);
3814#endif
3815}
3816
3817#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
3818/**
3819 * _scsih_sas_enclosure_dev_status_change_event_debug - debug for enclosure event
3820 * @ioc: per adapter object
3821 * @event_data: event data payload
3822 * Context: user.
3823 *
3824 * Return nothing.
3825 */
3826static void
3827_scsih_sas_enclosure_dev_status_change_event_debug(struct MPT2SAS_ADAPTER *ioc,
3828 Mpi2EventDataSasEnclDevStatusChange_t *event_data)
3829{
3830 char *reason_str = NULL;
3831
3832 switch (event_data->ReasonCode) {
3833 case MPI2_EVENT_SAS_ENCL_RC_ADDED:
3834 reason_str = "enclosure add";
3835 break;
3836 case MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING:
3837 reason_str = "enclosure remove";
3838 break;
3839 default:
3840 reason_str = "unknown reason";
3841 break;
3842 }
3843
3844 printk(MPT2SAS_DEBUG_FMT "enclosure status change: (%s)\n"
3845 "\thandle(0x%04x), enclosure logical id(0x%016llx)"
3846 " number slots(%d)\n", ioc->name, reason_str,
3847 le16_to_cpu(event_data->EnclosureHandle),
3848 (unsigned long long)le64_to_cpu(event_data->EnclosureLogicalID),
3849 le16_to_cpu(event_data->StartSlot));
3850}
3851#endif
3852
3853/**
3854 * _scsih_sas_enclosure_dev_status_change_event - handle enclosure events
3855 * @ioc: per adapter object
3856 * @VF_ID:
3857 * @event_data: event data payload
3858 * Context: user.
3859 *
3860 * Return nothing.
3861 */
3862static void
3863_scsih_sas_enclosure_dev_status_change_event(struct MPT2SAS_ADAPTER *ioc,
3864 u8 VF_ID, Mpi2EventDataSasEnclDevStatusChange_t *event_data)
3865{
3866#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
3867 if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK)
3868 _scsih_sas_enclosure_dev_status_change_event_debug(ioc,
3869 event_data);
3870#endif
3871}
3872
3873/**
3874 * _scsih_sas_broadcast_primative_event - handle broadcast events
3875 * @ioc: per adapter object
3876 * @event_data: event data payload
3877 * Context: user.
3878 *
3879 * Return nothing.
3880 */
3881static void
3882_scsih_sas_broadcast_primative_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
3883 Mpi2EventDataSasBroadcastPrimitive_t *event_data)
3884{
3885 struct scsi_cmnd *scmd;
3886 u16 smid, handle;
3887 u32 lun;
3888 struct MPT2SAS_DEVICE *sas_device_priv_data;
3889 u32 termination_count;
3890 u32 query_count;
3891 Mpi2SCSITaskManagementReply_t *mpi_reply;
3892
3893 dewtprintk(ioc, printk(MPT2SAS_DEBUG_FMT "broadcast primative: "
3894 "phy number(%d), width(%d)\n", ioc->name, event_data->PhyNum,
3895 event_data->PortWidth));
3896
3897 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
3898 __func__));
3899
3900 mutex_lock(&ioc->tm_cmds.mutex);
3901 termination_count = 0;
3902 query_count = 0;
3903 mpi_reply = ioc->tm_cmds.reply;
3904 for (smid = 1; smid <= ioc->request_depth; smid++) {
3905 scmd = _scsih_scsi_lookup_get(ioc, smid);
3906 if (!scmd)
3907 continue;
3908 sas_device_priv_data = scmd->device->hostdata;
3909 if (!sas_device_priv_data || !sas_device_priv_data->sas_target)
3910 continue;
3911 /* skip hidden raid components */
3912 if (sas_device_priv_data->sas_target->flags &
3913 MPT_TARGET_FLAGS_RAID_COMPONENT)
3914 continue;
3915 /* skip volumes */
3916 if (sas_device_priv_data->sas_target->flags &
3917 MPT_TARGET_FLAGS_VOLUME)
3918 continue;
3919
3920 handle = sas_device_priv_data->sas_target->handle;
3921 lun = sas_device_priv_data->lun;
3922 query_count++;
3923
3924 mpt2sas_scsih_issue_tm(ioc, handle, lun,
3925 MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK, smid, 30);
3926 termination_count += le32_to_cpu(mpi_reply->TerminationCount);
3927
3928 if ((mpi_reply->IOCStatus == MPI2_IOCSTATUS_SUCCESS) &&
3929 (mpi_reply->ResponseCode ==
3930 MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED ||
3931 mpi_reply->ResponseCode ==
3932 MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC))
3933 continue;
3934
3935 mpt2sas_scsih_issue_tm(ioc, handle, lun,
3936 MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET, smid, 30);
3937 termination_count += le32_to_cpu(mpi_reply->TerminationCount);
3938 }
3939 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3940 ioc->broadcast_aen_busy = 0;
3941 mutex_unlock(&ioc->tm_cmds.mutex);
3942
3943 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT
3944 "%s - exit, query_count = %d termination_count = %d\n",
3945 ioc->name, __func__, query_count, termination_count));
3946}
3947
3948/**
3949 * _scsih_sas_discovery_event - handle discovery events
3950 * @ioc: per adapter object
3951 * @event_data: event data payload
3952 * Context: user.
3953 *
3954 * Return nothing.
3955 */
3956static void
3957_scsih_sas_discovery_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
3958 Mpi2EventDataSasDiscovery_t *event_data)
3959{
3960#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
3961 if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK) {
3962 printk(MPT2SAS_DEBUG_FMT "discovery event: (%s)", ioc->name,
3963 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
3964 "start" : "stop");
3965 if (event_data->DiscoveryStatus)
3966 printk(MPT2SAS_DEBUG_FMT ", discovery_status(0x%08x)",
3967 ioc->name, le32_to_cpu(event_data->DiscoveryStatus));
3968 printk("\n");
3969 }
3970#endif
3971
3972 if (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED &&
3973 !ioc->sas_hba.num_phys)
3974 _scsih_sas_host_add(ioc);
3975}
3976
3977/**
3978 * _scsih_reprobe_lun - reprobing lun
3979 * @sdev: scsi device struct
3980 * @no_uld_attach: sdev->no_uld_attach flag setting
3981 *
3982 **/
3983static void
3984_scsih_reprobe_lun(struct scsi_device *sdev, void *no_uld_attach)
3985{
3986 int rc;
3987
3988 sdev->no_uld_attach = no_uld_attach ? 1 : 0;
3989 sdev_printk(KERN_INFO, sdev, "%s raid component\n",
3990 sdev->no_uld_attach ? "hidding" : "exposing");
3991 rc = scsi_device_reprobe(sdev);
3992}
3993
3994/**
3995 * _scsih_reprobe_target - reprobing target
3996 * @starget: scsi target struct
3997 * @no_uld_attach: sdev->no_uld_attach flag setting
3998 *
3999 * Note: no_uld_attach flag determines whether the disk device is attached
4000 * to block layer. A value of `1` means to not attach.
4001 **/
4002static void
4003_scsih_reprobe_target(struct scsi_target *starget, int no_uld_attach)
4004{
4005 struct MPT2SAS_TARGET *sas_target_priv_data = starget->hostdata;
4006
4007 if (no_uld_attach)
4008 sas_target_priv_data->flags |= MPT_TARGET_FLAGS_RAID_COMPONENT;
4009 else
4010 sas_target_priv_data->flags &= ~MPT_TARGET_FLAGS_RAID_COMPONENT;
4011
4012 starget_for_each_device(starget, no_uld_attach ? (void *)1 : NULL,
4013 _scsih_reprobe_lun);
4014}
4015/**
4016 * _scsih_sas_volume_add - add new volume
4017 * @ioc: per adapter object
4018 * @element: IR config element data
4019 * Context: user.
4020 *
4021 * Return nothing.
4022 */
4023static void
4024_scsih_sas_volume_add(struct MPT2SAS_ADAPTER *ioc,
4025 Mpi2EventIrConfigElement_t *element)
4026{
4027 struct _raid_device *raid_device;
4028 unsigned long flags;
4029 u64 wwid;
4030 u16 handle = le16_to_cpu(element->VolDevHandle);
4031 int rc;
4032
4033#if 0 /* RAID_HACKS */
4034 if (le32_to_cpu(event_data->Flags) &
4035 MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG)
4036 return;
4037#endif
4038
4039 mpt2sas_config_get_volume_wwid(ioc, handle, &wwid);
4040 if (!wwid) {
4041 printk(MPT2SAS_ERR_FMT
4042 "failure at %s:%d/%s()!\n", ioc->name,
4043 __FILE__, __LINE__, __func__);
4044 return;
4045 }
4046
4047 spin_lock_irqsave(&ioc->raid_device_lock, flags);
4048 raid_device = _scsih_raid_device_find_by_wwid(ioc, wwid);
4049 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
4050
4051 if (raid_device)
4052 return;
4053
4054 raid_device = kzalloc(sizeof(struct _raid_device), GFP_KERNEL);
4055 if (!raid_device) {
4056 printk(MPT2SAS_ERR_FMT
4057 "failure at %s:%d/%s()!\n", ioc->name,
4058 __FILE__, __LINE__, __func__);
4059 return;
4060 }
4061
4062 raid_device->id = ioc->sas_id++;
4063 raid_device->channel = RAID_CHANNEL;
4064 raid_device->handle = handle;
4065 raid_device->wwid = wwid;
4066 _scsih_raid_device_add(ioc, raid_device);
4067 if (!ioc->wait_for_port_enable_to_complete) {
4068 rc = scsi_add_device(ioc->shost, RAID_CHANNEL,
4069 raid_device->id, 0);
4070 if (rc)
4071 _scsih_raid_device_remove(ioc, raid_device);
4072 } else
4073 _scsih_determine_boot_device(ioc, raid_device, 1);
4074}
4075
4076/**
4077 * _scsih_sas_volume_delete - delete volume
4078 * @ioc: per adapter object
4079 * @element: IR config element data
4080 * Context: user.
4081 *
4082 * Return nothing.
4083 */
4084static void
4085_scsih_sas_volume_delete(struct MPT2SAS_ADAPTER *ioc,
4086 Mpi2EventIrConfigElement_t *element)
4087{
4088 struct _raid_device *raid_device;
4089 u16 handle = le16_to_cpu(element->VolDevHandle);
4090 unsigned long flags;
4091 struct MPT2SAS_TARGET *sas_target_priv_data;
4092
4093#if 0 /* RAID_HACKS */
4094 if (le32_to_cpu(event_data->Flags) &
4095 MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG)
4096 return;
4097#endif
4098
4099 spin_lock_irqsave(&ioc->raid_device_lock, flags);
4100 raid_device = _scsih_raid_device_find_by_handle(ioc, handle);
4101 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
4102 if (!raid_device)
4103 return;
4104 if (raid_device->starget) {
4105 sas_target_priv_data = raid_device->starget->hostdata;
4106 sas_target_priv_data->deleted = 1;
4107 scsi_remove_target(&raid_device->starget->dev);
4108 }
4109 _scsih_raid_device_remove(ioc, raid_device);
4110}
4111
4112/**
4113 * _scsih_sas_pd_expose - expose pd component to /dev/sdX
4114 * @ioc: per adapter object
4115 * @element: IR config element data
4116 * Context: user.
4117 *
4118 * Return nothing.
4119 */
4120static void
4121_scsih_sas_pd_expose(struct MPT2SAS_ADAPTER *ioc,
4122 Mpi2EventIrConfigElement_t *element)
4123{
4124 struct _sas_device *sas_device;
4125 unsigned long flags;
4126 u16 handle = le16_to_cpu(element->PhysDiskDevHandle);
4127
4128 spin_lock_irqsave(&ioc->sas_device_lock, flags);
4129 sas_device = _scsih_sas_device_find_by_handle(ioc, handle);
4130 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
4131 if (!sas_device)
4132 return;
4133
4134 /* exposing raid component */
4135 sas_device->volume_handle = 0;
4136 sas_device->volume_wwid = 0;
4137 sas_device->hidden_raid_component = 0;
4138 _scsih_reprobe_target(sas_device->starget, 0);
4139}
4140
4141/**
4142 * _scsih_sas_pd_hide - hide pd component from /dev/sdX
4143 * @ioc: per adapter object
4144 * @element: IR config element data
4145 * Context: user.
4146 *
4147 * Return nothing.
4148 */
4149static void
4150_scsih_sas_pd_hide(struct MPT2SAS_ADAPTER *ioc,
4151 Mpi2EventIrConfigElement_t *element)
4152{
4153 struct _sas_device *sas_device;
4154 unsigned long flags;
4155 u16 handle = le16_to_cpu(element->PhysDiskDevHandle);
4156
4157 spin_lock_irqsave(&ioc->sas_device_lock, flags);
4158 sas_device = _scsih_sas_device_find_by_handle(ioc, handle);
4159 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
4160 if (!sas_device)
4161 return;
4162
4163 /* hiding raid component */
4164 mpt2sas_config_get_volume_handle(ioc, handle,
4165 &sas_device->volume_handle);
4166 mpt2sas_config_get_volume_wwid(ioc, sas_device->volume_handle,
4167 &sas_device->volume_wwid);
4168 sas_device->hidden_raid_component = 1;
4169 _scsih_reprobe_target(sas_device->starget, 1);
4170}
4171
4172/**
4173 * _scsih_sas_pd_delete - delete pd component
4174 * @ioc: per adapter object
4175 * @element: IR config element data
4176 * Context: user.
4177 *
4178 * Return nothing.
4179 */
4180static void
4181_scsih_sas_pd_delete(struct MPT2SAS_ADAPTER *ioc,
4182 Mpi2EventIrConfigElement_t *element)
4183{
4184 struct _sas_device *sas_device;
4185 unsigned long flags;
4186 u16 handle = le16_to_cpu(element->PhysDiskDevHandle);
4187
4188 spin_lock_irqsave(&ioc->sas_device_lock, flags);
4189 sas_device = _scsih_sas_device_find_by_handle(ioc, handle);
4190 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
4191 if (!sas_device)
4192 return;
4193 _scsih_remove_device(ioc, handle);
4194}
4195
4196/**
4197 * _scsih_sas_pd_add - remove pd component
4198 * @ioc: per adapter object
4199 * @element: IR config element data
4200 * Context: user.
4201 *
4202 * Return nothing.
4203 */
4204static void
4205_scsih_sas_pd_add(struct MPT2SAS_ADAPTER *ioc,
4206 Mpi2EventIrConfigElement_t *element)
4207{
4208 struct _sas_device *sas_device;
4209 unsigned long flags;
4210 u16 handle = le16_to_cpu(element->PhysDiskDevHandle);
4211
4212 spin_lock_irqsave(&ioc->sas_device_lock, flags);
4213 sas_device = _scsih_sas_device_find_by_handle(ioc, handle);
4214 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
4215 if (sas_device)
4216 sas_device->hidden_raid_component = 1;
4217 else
4218 _scsih_add_device(ioc, handle, 0, 1);
4219}
4220
4221#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
4222/**
4223 * _scsih_sas_ir_config_change_event_debug - debug for IR Config Change events
4224 * @ioc: per adapter object
4225 * @event_data: event data payload
4226 * Context: user.
4227 *
4228 * Return nothing.
4229 */
4230static void
4231_scsih_sas_ir_config_change_event_debug(struct MPT2SAS_ADAPTER *ioc,
4232 Mpi2EventDataIrConfigChangeList_t *event_data)
4233{
4234 Mpi2EventIrConfigElement_t *element;
4235 u8 element_type;
4236 int i;
4237 char *reason_str = NULL, *element_str = NULL;
4238
4239 element = (Mpi2EventIrConfigElement_t *)&event_data->ConfigElement[0];
4240
4241 printk(MPT2SAS_DEBUG_FMT "raid config change: (%s), elements(%d)\n",
4242 ioc->name, (le32_to_cpu(event_data->Flags) &
4243 MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG) ?
4244 "foreign" : "native", event_data->NumElements);
4245 for (i = 0; i < event_data->NumElements; i++, element++) {
4246 switch (element->ReasonCode) {
4247 case MPI2_EVENT_IR_CHANGE_RC_ADDED:
4248 reason_str = "add";
4249 break;
4250 case MPI2_EVENT_IR_CHANGE_RC_REMOVED:
4251 reason_str = "remove";
4252 break;
4253 case MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE:
4254 reason_str = "no change";
4255 break;
4256 case MPI2_EVENT_IR_CHANGE_RC_HIDE:
4257 reason_str = "hide";
4258 break;
4259 case MPI2_EVENT_IR_CHANGE_RC_UNHIDE:
4260 reason_str = "unhide";
4261 break;
4262 case MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED:
4263 reason_str = "volume_created";
4264 break;
4265 case MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED:
4266 reason_str = "volume_deleted";
4267 break;
4268 case MPI2_EVENT_IR_CHANGE_RC_PD_CREATED:
4269 reason_str = "pd_created";
4270 break;
4271 case MPI2_EVENT_IR_CHANGE_RC_PD_DELETED:
4272 reason_str = "pd_deleted";
4273 break;
4274 default:
4275 reason_str = "unknown reason";
4276 break;
4277 }
4278 element_type = le16_to_cpu(element->ElementFlags) &
4279 MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK;
4280 switch (element_type) {
4281 case MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT:
4282 element_str = "volume";
4283 break;
4284 case MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT:
4285 element_str = "phys disk";
4286 break;
4287 case MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT:
4288 element_str = "hot spare";
4289 break;
4290 default:
4291 element_str = "unknown element";
4292 break;
4293 }
4294 printk(KERN_DEBUG "\t(%s:%s), vol handle(0x%04x), "
4295 "pd handle(0x%04x), pd num(0x%02x)\n", element_str,
4296 reason_str, le16_to_cpu(element->VolDevHandle),
4297 le16_to_cpu(element->PhysDiskDevHandle),
4298 element->PhysDiskNum);
4299 }
4300}
4301#endif
4302
4303/**
4304 * _scsih_sas_ir_config_change_event - handle ir configuration change events
4305 * @ioc: per adapter object
4306 * @VF_ID:
4307 * @event_data: event data payload
4308 * Context: user.
4309 *
4310 * Return nothing.
4311 */
4312static void
4313_scsih_sas_ir_config_change_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
4314 Mpi2EventDataIrConfigChangeList_t *event_data)
4315{
4316 Mpi2EventIrConfigElement_t *element;
4317 int i;
4318
4319#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
4320 if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK)
4321 _scsih_sas_ir_config_change_event_debug(ioc, event_data);
4322
4323#endif
4324
4325 element = (Mpi2EventIrConfigElement_t *)&event_data->ConfigElement[0];
4326 for (i = 0; i < event_data->NumElements; i++, element++) {
4327
4328 switch (element->ReasonCode) {
4329 case MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED:
4330 case MPI2_EVENT_IR_CHANGE_RC_ADDED:
4331 _scsih_sas_volume_add(ioc, element);
4332 break;
4333 case MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED:
4334 case MPI2_EVENT_IR_CHANGE_RC_REMOVED:
4335 _scsih_sas_volume_delete(ioc, element);
4336 break;
4337 case MPI2_EVENT_IR_CHANGE_RC_PD_CREATED:
4338 _scsih_sas_pd_hide(ioc, element);
4339 break;
4340 case MPI2_EVENT_IR_CHANGE_RC_PD_DELETED:
4341 _scsih_sas_pd_expose(ioc, element);
4342 break;
4343 case MPI2_EVENT_IR_CHANGE_RC_HIDE:
4344 _scsih_sas_pd_add(ioc, element);
4345 break;
4346 case MPI2_EVENT_IR_CHANGE_RC_UNHIDE:
4347 _scsih_sas_pd_delete(ioc, element);
4348 break;
4349 }
4350 }
4351}
4352
4353/**
4354 * _scsih_sas_ir_volume_event - IR volume event
4355 * @ioc: per adapter object
4356 * @event_data: event data payload
4357 * Context: user.
4358 *
4359 * Return nothing.
4360 */
4361static void
4362_scsih_sas_ir_volume_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
4363 Mpi2EventDataIrVolume_t *event_data)
4364{
4365 u64 wwid;
4366 unsigned long flags;
4367 struct _raid_device *raid_device;
4368 u16 handle;
4369 u32 state;
4370 int rc;
4371 struct MPT2SAS_TARGET *sas_target_priv_data;
4372
4373 if (event_data->ReasonCode != MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED)
4374 return;
4375
4376 handle = le16_to_cpu(event_data->VolDevHandle);
4377 state = le32_to_cpu(event_data->NewValue);
4378 dewtprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: handle(0x%04x), "
4379 "old(0x%08x), new(0x%08x)\n", ioc->name, __func__, handle,
4380 le32_to_cpu(event_data->PreviousValue), state));
4381
4382 spin_lock_irqsave(&ioc->raid_device_lock, flags);
4383 raid_device = _scsih_raid_device_find_by_handle(ioc, handle);
4384 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
4385
4386 switch (state) {
4387 case MPI2_RAID_VOL_STATE_MISSING:
4388 case MPI2_RAID_VOL_STATE_FAILED:
4389 if (!raid_device)
4390 break;
4391 if (raid_device->starget) {
4392 sas_target_priv_data = raid_device->starget->hostdata;
4393 sas_target_priv_data->deleted = 1;
4394 scsi_remove_target(&raid_device->starget->dev);
4395 }
4396 _scsih_raid_device_remove(ioc, raid_device);
4397 break;
4398
4399 case MPI2_RAID_VOL_STATE_ONLINE:
4400 case MPI2_RAID_VOL_STATE_DEGRADED:
4401 case MPI2_RAID_VOL_STATE_OPTIMAL:
4402 if (raid_device)
4403 break;
4404
4405 mpt2sas_config_get_volume_wwid(ioc, handle, &wwid);
4406 if (!wwid) {
4407 printk(MPT2SAS_ERR_FMT
4408 "failure at %s:%d/%s()!\n", ioc->name,
4409 __FILE__, __LINE__, __func__);
4410 break;
4411 }
4412
4413 raid_device = kzalloc(sizeof(struct _raid_device), GFP_KERNEL);
4414 if (!raid_device) {
4415 printk(MPT2SAS_ERR_FMT
4416 "failure at %s:%d/%s()!\n", ioc->name,
4417 __FILE__, __LINE__, __func__);
4418 break;
4419 }
4420
4421 raid_device->id = ioc->sas_id++;
4422 raid_device->channel = RAID_CHANNEL;
4423 raid_device->handle = handle;
4424 raid_device->wwid = wwid;
4425 _scsih_raid_device_add(ioc, raid_device);
4426 rc = scsi_add_device(ioc->shost, RAID_CHANNEL,
4427 raid_device->id, 0);
4428 if (rc)
4429 _scsih_raid_device_remove(ioc, raid_device);
4430 break;
4431
4432 case MPI2_RAID_VOL_STATE_INITIALIZING:
4433 default:
4434 break;
4435 }
4436}
4437
4438/**
4439 * _scsih_sas_ir_physical_disk_event - PD event
4440 * @ioc: per adapter object
4441 * @event_data: event data payload
4442 * Context: user.
4443 *
4444 * Return nothing.
4445 */
4446static void
4447_scsih_sas_ir_physical_disk_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
4448 Mpi2EventDataIrPhysicalDisk_t *event_data)
4449{
4450 u16 handle;
4451 u32 state;
4452 struct _sas_device *sas_device;
4453 unsigned long flags;
4454
4455 if (event_data->ReasonCode != MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED)
4456 return;
4457
4458 handle = le16_to_cpu(event_data->PhysDiskDevHandle);
4459 state = le32_to_cpu(event_data->NewValue);
4460
4461 dewtprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: handle(0x%04x), "
4462 "old(0x%08x), new(0x%08x)\n", ioc->name, __func__, handle,
4463 le32_to_cpu(event_data->PreviousValue), state));
4464
4465 spin_lock_irqsave(&ioc->sas_device_lock, flags);
4466 sas_device = _scsih_sas_device_find_by_handle(ioc, handle);
4467 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
4468
4469 switch (state) {
4470#if 0
4471 case MPI2_RAID_PD_STATE_OFFLINE:
4472 if (sas_device)
4473 _scsih_remove_device(ioc, handle);
4474 break;
4475#endif
4476 case MPI2_RAID_PD_STATE_ONLINE:
4477 case MPI2_RAID_PD_STATE_DEGRADED:
4478 case MPI2_RAID_PD_STATE_REBUILDING:
4479 case MPI2_RAID_PD_STATE_OPTIMAL:
4480 if (sas_device)
4481 sas_device->hidden_raid_component = 1;
4482 else
4483 _scsih_add_device(ioc, handle, 0, 1);
4484 break;
4485
4486 case MPI2_RAID_PD_STATE_NOT_CONFIGURED:
4487 case MPI2_RAID_PD_STATE_NOT_COMPATIBLE:
4488 case MPI2_RAID_PD_STATE_HOT_SPARE:
4489 default:
4490 break;
4491 }
4492}
4493
4494#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
4495/**
4496 * _scsih_sas_ir_operation_status_event_debug - debug for IR op event
4497 * @ioc: per adapter object
4498 * @event_data: event data payload
4499 * Context: user.
4500 *
4501 * Return nothing.
4502 */
4503static void
4504_scsih_sas_ir_operation_status_event_debug(struct MPT2SAS_ADAPTER *ioc,
4505 Mpi2EventDataIrOperationStatus_t *event_data)
4506{
4507 char *reason_str = NULL;
4508
4509 switch (event_data->RAIDOperation) {
4510 case MPI2_EVENT_IR_RAIDOP_RESYNC:
4511 reason_str = "resync";
4512 break;
4513 case MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION:
4514 reason_str = "online capacity expansion";
4515 break;
4516 case MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK:
4517 reason_str = "consistency check";
4518 break;
4519 default:
4520 reason_str = "unknown reason";
4521 break;
4522 }
4523
4524 printk(MPT2SAS_INFO_FMT "raid operational status: (%s)"
4525 "\thandle(0x%04x), percent complete(%d)\n",
4526 ioc->name, reason_str,
4527 le16_to_cpu(event_data->VolDevHandle),
4528 event_data->PercentComplete);
4529}
4530#endif
4531
4532/**
4533 * _scsih_sas_ir_operation_status_event - handle RAID operation events
4534 * @ioc: per adapter object
4535 * @VF_ID:
4536 * @event_data: event data payload
4537 * Context: user.
4538 *
4539 * Return nothing.
4540 */
4541static void
4542_scsih_sas_ir_operation_status_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
4543 Mpi2EventDataIrOperationStatus_t *event_data)
4544{
4545#ifdef CONFIG_SCSI_MPT2SAS_LOGGING
4546 if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK)
4547 _scsih_sas_ir_operation_status_event_debug(ioc, event_data);
4548#endif
4549}
4550
4551/**
4552 * _scsih_task_set_full - handle task set full
4553 * @ioc: per adapter object
4554 * @event_data: event data payload
4555 * Context: user.
4556 *
4557 * Throttle back qdepth.
4558 */
4559static void
4560_scsih_task_set_full(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
4561 Mpi2EventDataTaskSetFull_t *event_data)
4562{
4563 unsigned long flags;
4564 struct _sas_device *sas_device;
4565 static struct _raid_device *raid_device;
4566 struct scsi_device *sdev;
4567 int depth;
4568 u16 current_depth;
4569 u16 handle;
4570 int id, channel;
4571 u64 sas_address;
4572
4573 current_depth = le16_to_cpu(event_data->CurrentDepth);
4574 handle = le16_to_cpu(event_data->DevHandle);
4575 spin_lock_irqsave(&ioc->sas_device_lock, flags);
4576 sas_device = _scsih_sas_device_find_by_handle(ioc, handle);
4577 if (!sas_device) {
4578 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
4579 return;
4580 }
4581 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
4582 id = sas_device->id;
4583 channel = sas_device->channel;
4584 sas_address = sas_device->sas_address;
4585
4586 /* if hidden raid component, then change to volume characteristics */
4587 if (sas_device->hidden_raid_component && sas_device->volume_handle) {
4588 spin_lock_irqsave(&ioc->raid_device_lock, flags);
4589 raid_device = _scsih_raid_device_find_by_handle(
4590 ioc, sas_device->volume_handle);
4591 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
4592 if (raid_device) {
4593 id = raid_device->id;
4594 channel = raid_device->channel;
4595 handle = raid_device->handle;
4596 sas_address = raid_device->wwid;
4597 }
4598 }
4599
4600 if (ioc->logging_level & MPT_DEBUG_TASK_SET_FULL)
4601 starget_printk(KERN_DEBUG, sas_device->starget, "task set "
4602 "full: handle(0x%04x), sas_addr(0x%016llx), depth(%d)\n",
4603 handle, (unsigned long long)sas_address, current_depth);
4604
4605 shost_for_each_device(sdev, ioc->shost) {
4606 if (sdev->id == id && sdev->channel == channel) {
4607 if (current_depth > sdev->queue_depth) {
4608 if (ioc->logging_level &
4609 MPT_DEBUG_TASK_SET_FULL)
4610 sdev_printk(KERN_INFO, sdev, "strange "
4611 "observation, the queue depth is"
4612 " (%d) meanwhile fw queue depth "
4613 "is (%d)\n", sdev->queue_depth,
4614 current_depth);
4615 continue;
4616 }
4617 depth = scsi_track_queue_full(sdev,
4618 current_depth - 1);
4619 if (depth > 0)
4620 sdev_printk(KERN_INFO, sdev, "Queue depth "
4621 "reduced to (%d)\n", depth);
4622 else if (depth < 0)
4623 sdev_printk(KERN_INFO, sdev, "Tagged Command "
4624 "Queueing is being disabled\n");
4625 else if (depth == 0)
4626 if (ioc->logging_level &
4627 MPT_DEBUG_TASK_SET_FULL)
4628 sdev_printk(KERN_INFO, sdev,
4629 "Queue depth not changed yet\n");
4630 }
4631 }
4632}
4633
4634/**
4635 * _scsih_mark_responding_sas_device - mark a sas_devices as responding
4636 * @ioc: per adapter object
4637 * @sas_address: sas address
4638 * @slot: enclosure slot id
4639 * @handle: device handle
4640 *
4641 * After host reset, find out whether devices are still responding.
4642 * Used in _scsi_remove_unresponsive_sas_devices.
4643 *
4644 * Return nothing.
4645 */
4646static void
4647_scsih_mark_responding_sas_device(struct MPT2SAS_ADAPTER *ioc, u64 sas_address,
4648 u16 slot, u16 handle)
4649{
4650 struct MPT2SAS_TARGET *sas_target_priv_data;
4651 struct scsi_target *starget;
4652 struct _sas_device *sas_device;
4653 unsigned long flags;
4654
4655 spin_lock_irqsave(&ioc->sas_device_lock, flags);
4656 list_for_each_entry(sas_device, &ioc->sas_device_list, list) {
4657 if (sas_device->sas_address == sas_address &&
4658 sas_device->slot == slot && sas_device->starget) {
4659 sas_device->responding = 1;
4660 starget_printk(KERN_INFO, sas_device->starget,
4661 "handle(0x%04x), sas_addr(0x%016llx), enclosure "
4662 "logical id(0x%016llx), slot(%d)\n", handle,
4663 (unsigned long long)sas_device->sas_address,
4664 (unsigned long long)
4665 sas_device->enclosure_logical_id,
4666 sas_device->slot);
4667 if (sas_device->handle == handle)
4668 goto out;
4669 printk(KERN_INFO "\thandle changed from(0x%04x)!!!\n",
4670 sas_device->handle);
4671 sas_device->handle = handle;
4672 starget = sas_device->starget;
4673 sas_target_priv_data = starget->hostdata;
4674 sas_target_priv_data->handle = handle;
4675 goto out;
4676 }
4677 }
4678 out:
4679 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
4680}
4681
4682/**
4683 * _scsih_search_responding_sas_devices -
4684 * @ioc: per adapter object
4685 *
4686 * After host reset, find out whether devices are still responding.
4687 * If not remove.
4688 *
4689 * Return nothing.
4690 */
4691static void
4692_scsih_search_responding_sas_devices(struct MPT2SAS_ADAPTER *ioc)
4693{
4694 Mpi2SasDevicePage0_t sas_device_pg0;
4695 Mpi2ConfigReply_t mpi_reply;
4696 u16 ioc_status;
4697 __le64 sas_address;
4698 u16 handle;
4699 u32 device_info;
4700 u16 slot;
4701
4702 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, __func__);
4703
4704 if (list_empty(&ioc->sas_device_list))
4705 return;
4706
4707 handle = 0xFFFF;
4708 while (!(mpt2sas_config_get_sas_device_pg0(ioc, &mpi_reply,
4709 &sas_device_pg0, MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE,
4710 handle))) {
4711 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
4712 MPI2_IOCSTATUS_MASK;
4713 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
4714 break;
4715 handle = le16_to_cpu(sas_device_pg0.DevHandle);
4716 device_info = le32_to_cpu(sas_device_pg0.DeviceInfo);
4717 if (!(_scsih_is_end_device(device_info)))
4718 continue;
4719 sas_address = le64_to_cpu(sas_device_pg0.SASAddress);
4720 slot = le16_to_cpu(sas_device_pg0.Slot);
4721 _scsih_mark_responding_sas_device(ioc, sas_address, slot,
4722 handle);
4723 }
4724}
4725
4726/**
4727 * _scsih_mark_responding_raid_device - mark a raid_device as responding
4728 * @ioc: per adapter object
4729 * @wwid: world wide identifier for raid volume
4730 * @handle: device handle
4731 *
4732 * After host reset, find out whether devices are still responding.
4733 * Used in _scsi_remove_unresponsive_raid_devices.
4734 *
4735 * Return nothing.
4736 */
4737static void
4738_scsih_mark_responding_raid_device(struct MPT2SAS_ADAPTER *ioc, u64 wwid,
4739 u16 handle)
4740{
4741 struct MPT2SAS_TARGET *sas_target_priv_data;
4742 struct scsi_target *starget;
4743 struct _raid_device *raid_device;
4744 unsigned long flags;
4745
4746 spin_lock_irqsave(&ioc->raid_device_lock, flags);
4747 list_for_each_entry(raid_device, &ioc->raid_device_list, list) {
4748 if (raid_device->wwid == wwid && raid_device->starget) {
4749 raid_device->responding = 1;
4750 starget_printk(KERN_INFO, raid_device->starget,
4751 "handle(0x%04x), wwid(0x%016llx)\n", handle,
4752 (unsigned long long)raid_device->wwid);
4753 if (raid_device->handle == handle)
4754 goto out;
4755 printk(KERN_INFO "\thandle changed from(0x%04x)!!!\n",
4756 raid_device->handle);
4757 raid_device->handle = handle;
4758 starget = raid_device->starget;
4759 sas_target_priv_data = starget->hostdata;
4760 sas_target_priv_data->handle = handle;
4761 goto out;
4762 }
4763 }
4764 out:
4765 spin_unlock_irqrestore(&ioc->raid_device_lock, flags);
4766}
4767
4768/**
4769 * _scsih_search_responding_raid_devices -
4770 * @ioc: per adapter object
4771 *
4772 * After host reset, find out whether devices are still responding.
4773 * If not remove.
4774 *
4775 * Return nothing.
4776 */
4777static void
4778_scsih_search_responding_raid_devices(struct MPT2SAS_ADAPTER *ioc)
4779{
4780 Mpi2RaidVolPage1_t volume_pg1;
4781 Mpi2ConfigReply_t mpi_reply;
4782 u16 ioc_status;
4783 u16 handle;
4784
4785 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, __func__);
4786
4787 if (list_empty(&ioc->raid_device_list))
4788 return;
4789
4790 handle = 0xFFFF;
4791 while (!(mpt2sas_config_get_raid_volume_pg1(ioc, &mpi_reply,
4792 &volume_pg1, MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE, handle))) {
4793 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
4794 MPI2_IOCSTATUS_MASK;
4795 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
4796 break;
4797 handle = le16_to_cpu(volume_pg1.DevHandle);
4798 _scsih_mark_responding_raid_device(ioc,
4799 le64_to_cpu(volume_pg1.WWID), handle);
4800 }
4801}
4802
4803/**
4804 * _scsih_mark_responding_expander - mark a expander as responding
4805 * @ioc: per adapter object
4806 * @sas_address: sas address
4807 * @handle:
4808 *
4809 * After host reset, find out whether devices are still responding.
4810 * Used in _scsi_remove_unresponsive_expanders.
4811 *
4812 * Return nothing.
4813 */
4814static void
4815_scsih_mark_responding_expander(struct MPT2SAS_ADAPTER *ioc, u64 sas_address,
4816 u16 handle)
4817{
4818 struct _sas_node *sas_expander;
4819 unsigned long flags;
4820
4821 spin_lock_irqsave(&ioc->sas_node_lock, flags);
4822 list_for_each_entry(sas_expander, &ioc->sas_expander_list, list) {
4823 if (sas_expander->sas_address == sas_address) {
4824 sas_expander->responding = 1;
4825 if (sas_expander->handle != handle) {
4826 printk(KERN_INFO "old handle(0x%04x)\n",
4827 sas_expander->handle);
4828 sas_expander->handle = handle;
4829 }
4830 goto out;
4831 }
4832 }
4833 out:
4834 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
4835}
4836
4837/**
4838 * _scsih_search_responding_expanders -
4839 * @ioc: per adapter object
4840 *
4841 * After host reset, find out whether devices are still responding.
4842 * If not remove.
4843 *
4844 * Return nothing.
4845 */
4846static void
4847_scsih_search_responding_expanders(struct MPT2SAS_ADAPTER *ioc)
4848{
4849 Mpi2ExpanderPage0_t expander_pg0;
4850 Mpi2ConfigReply_t mpi_reply;
4851 u16 ioc_status;
4852 __le64 sas_address;
4853 u16 handle;
4854
4855 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, __func__);
4856
4857 if (list_empty(&ioc->sas_expander_list))
4858 return;
4859
4860 handle = 0xFFFF;
4861 while (!(mpt2sas_config_get_expander_pg0(ioc, &mpi_reply, &expander_pg0,
4862 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL, handle))) {
4863
4864 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
4865 MPI2_IOCSTATUS_MASK;
4866 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
4867 break;
4868
4869 handle = le16_to_cpu(expander_pg0.DevHandle);
4870 sas_address = le64_to_cpu(expander_pg0.SASAddress);
4871 printk(KERN_INFO "\texpander present: handle(0x%04x), "
4872 "sas_addr(0x%016llx)\n", handle,
4873 (unsigned long long)sas_address);
4874 _scsih_mark_responding_expander(ioc, sas_address, handle);
4875 }
4876
4877}
4878
4879/**
4880 * _scsih_remove_unresponding_devices - removing unresponding devices
4881 * @ioc: per adapter object
4882 *
4883 * Return nothing.
4884 */
4885static void
4886_scsih_remove_unresponding_devices(struct MPT2SAS_ADAPTER *ioc)
4887{
4888 struct _sas_device *sas_device, *sas_device_next;
4889 struct _sas_node *sas_expander, *sas_expander_next;
4890 struct _raid_device *raid_device, *raid_device_next;
4891 unsigned long flags;
4892
4893 _scsih_search_responding_sas_devices(ioc);
4894 _scsih_search_responding_raid_devices(ioc);
4895 _scsih_search_responding_expanders(ioc);
4896
4897 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4898 ioc->shost_recovery = 0;
4899 if (ioc->shost->shost_state == SHOST_RECOVERY) {
4900 printk(MPT2SAS_INFO_FMT "putting controller into "
4901 "SHOST_RUNNING\n", ioc->name);
4902 scsi_host_set_state(ioc->shost, SHOST_RUNNING);
4903 }
4904 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4905
4906 list_for_each_entry_safe(sas_device, sas_device_next,
4907 &ioc->sas_device_list, list) {
4908 if (sas_device->responding) {
4909 sas_device->responding = 0;
4910 continue;
4911 }
4912 if (sas_device->starget)
4913 starget_printk(KERN_INFO, sas_device->starget,
4914 "removing: handle(0x%04x), sas_addr(0x%016llx), "
4915 "enclosure logical id(0x%016llx), slot(%d)\n",
4916 sas_device->handle,
4917 (unsigned long long)sas_device->sas_address,
4918 (unsigned long long)
4919 sas_device->enclosure_logical_id,
4920 sas_device->slot);
4921 _scsih_remove_device(ioc, sas_device->handle);
4922 }
4923
4924 list_for_each_entry_safe(raid_device, raid_device_next,
4925 &ioc->raid_device_list, list) {
4926 if (raid_device->responding) {
4927 raid_device->responding = 0;
4928 continue;
4929 }
4930 if (raid_device->starget) {
4931 starget_printk(KERN_INFO, raid_device->starget,
4932 "removing: handle(0x%04x), wwid(0x%016llx)\n",
4933 raid_device->handle,
4934 (unsigned long long)raid_device->wwid);
4935 scsi_remove_target(&raid_device->starget->dev);
4936 }
4937 _scsih_raid_device_remove(ioc, raid_device);
4938 }
4939
4940 list_for_each_entry_safe(sas_expander, sas_expander_next,
4941 &ioc->sas_expander_list, list) {
4942 if (sas_expander->responding) {
4943 sas_expander->responding = 0;
4944 continue;
4945 }
4946 printk("\tremoving expander: handle(0x%04x), "
4947 " sas_addr(0x%016llx)\n", sas_expander->handle,
4948 (unsigned long long)sas_expander->sas_address);
4949 _scsih_expander_remove(ioc, sas_expander->handle);
4950 }
4951}
4952
4953/**
4954 * _firmware_event_work - delayed task for processing firmware events
4955 * @ioc: per adapter object
4956 * @work: equal to the fw_event_work object
4957 * Context: user.
4958 *
4959 * Return nothing.
4960 */
4961static void
4962_firmware_event_work(struct work_struct *work)
4963{
4964 struct fw_event_work *fw_event = container_of(work,
4965 struct fw_event_work, work.work);
4966 unsigned long flags;
4967 struct MPT2SAS_ADAPTER *ioc = fw_event->ioc;
4968
4969 /* This is invoked by calling _scsih_queue_rescan(). */
4970 if (fw_event->event == MPT2SAS_RESCAN_AFTER_HOST_RESET) {
4971 _scsih_fw_event_free(ioc, fw_event);
4972 _scsih_sas_host_refresh(ioc, 1);
4973 _scsih_remove_unresponding_devices(ioc);
4974 return;
4975 }
4976
4977 /* the queue is being flushed so ignore this event */
4978 spin_lock_irqsave(&ioc->fw_event_lock, flags);
4979 if (ioc->fw_events_off || ioc->remove_host) {
4980 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
4981 _scsih_fw_event_free(ioc, fw_event);
4982 return;
4983 }
4984 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
4985
4986 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4987 if (ioc->shost_recovery) {
4988 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4989 _scsih_fw_event_requeue(ioc, fw_event, 1000);
4990 return;
4991 }
4992 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4993
4994 switch (fw_event->event) {
4995 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
4996 _scsih_sas_topology_change_event(ioc, fw_event->VF_ID,
4997 fw_event->event_data, fw_event);
4998 break;
4999 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
5000 _scsih_sas_device_status_change_event(ioc, fw_event->VF_ID,
5001 fw_event->event_data);
5002 break;
5003 case MPI2_EVENT_SAS_DISCOVERY:
5004 _scsih_sas_discovery_event(ioc, fw_event->VF_ID,
5005 fw_event->event_data);
5006 break;
5007 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
5008 _scsih_sas_broadcast_primative_event(ioc, fw_event->VF_ID,
5009 fw_event->event_data);
5010 break;
5011 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
5012 _scsih_sas_enclosure_dev_status_change_event(ioc,
5013 fw_event->VF_ID, fw_event->event_data);
5014 break;
5015 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
5016 _scsih_sas_ir_config_change_event(ioc, fw_event->VF_ID,
5017 fw_event->event_data);
5018 break;
5019 case MPI2_EVENT_IR_VOLUME:
5020 _scsih_sas_ir_volume_event(ioc, fw_event->VF_ID,
5021 fw_event->event_data);
5022 break;
5023 case MPI2_EVENT_IR_PHYSICAL_DISK:
5024 _scsih_sas_ir_physical_disk_event(ioc, fw_event->VF_ID,
5025 fw_event->event_data);
5026 break;
5027 case MPI2_EVENT_IR_OPERATION_STATUS:
5028 _scsih_sas_ir_operation_status_event(ioc, fw_event->VF_ID,
5029 fw_event->event_data);
5030 break;
5031 case MPI2_EVENT_TASK_SET_FULL:
5032 _scsih_task_set_full(ioc, fw_event->VF_ID,
5033 fw_event->event_data);
5034 break;
5035 }
5036 _scsih_fw_event_free(ioc, fw_event);
5037}
5038
5039/**
5040 * mpt2sas_scsih_event_callback - firmware event handler (called at ISR time)
5041 * @ioc: per adapter object
5042 * @VF_ID: virtual function id
5043 * @reply: reply message frame(lower 32bit addr)
5044 * Context: interrupt.
5045 *
5046 * This function merely adds a new work task into ioc->firmware_event_thread.
5047 * The tasks are worked from _firmware_event_work in user context.
5048 *
5049 * Return nothing.
5050 */
5051void
5052mpt2sas_scsih_event_callback(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply)
5053{
5054 struct fw_event_work *fw_event;
5055 Mpi2EventNotificationReply_t *mpi_reply;
5056 unsigned long flags;
5057 u16 event;
5058
5059 /* events turned off due to host reset or driver unloading */
5060 spin_lock_irqsave(&ioc->fw_event_lock, flags);
5061 if (ioc->fw_events_off || ioc->remove_host) {
5062 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
5063 return;
5064 }
5065 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
5066
5067 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
5068 event = le16_to_cpu(mpi_reply->Event);
5069
5070 switch (event) {
5071 /* handle these */
5072 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
5073 {
5074 Mpi2EventDataSasBroadcastPrimitive_t *baen_data =
5075 (Mpi2EventDataSasBroadcastPrimitive_t *)
5076 mpi_reply->EventData;
5077
5078 if (baen_data->Primitive !=
5079 MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT ||
5080 ioc->broadcast_aen_busy)
5081 return;
5082 ioc->broadcast_aen_busy = 1;
5083 break;
5084 }
5085
5086 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
5087 _scsih_check_topo_delete_events(ioc,
5088 (Mpi2EventDataSasTopologyChangeList_t *)
5089 mpi_reply->EventData);
5090 break;
5091
5092 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
5093 case MPI2_EVENT_IR_OPERATION_STATUS:
5094 case MPI2_EVENT_SAS_DISCOVERY:
5095 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
5096 case MPI2_EVENT_IR_VOLUME:
5097 case MPI2_EVENT_IR_PHYSICAL_DISK:
5098 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
5099 case MPI2_EVENT_TASK_SET_FULL:
5100 break;
5101
5102 default: /* ignore the rest */
5103 return;
5104 }
5105
5106 fw_event = kzalloc(sizeof(struct fw_event_work), GFP_ATOMIC);
5107 if (!fw_event) {
5108 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
5109 ioc->name, __FILE__, __LINE__, __func__);
5110 return;
5111 }
5112 fw_event->event_data =
5113 kzalloc(mpi_reply->EventDataLength*4, GFP_ATOMIC);
5114 if (!fw_event->event_data) {
5115 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
5116 ioc->name, __FILE__, __LINE__, __func__);
5117 kfree(fw_event);
5118 return;
5119 }
5120
5121 memcpy(fw_event->event_data, mpi_reply->EventData,
5122 mpi_reply->EventDataLength*4);
5123 fw_event->ioc = ioc;
5124 fw_event->VF_ID = VF_ID;
5125 fw_event->event = event;
5126 _scsih_fw_event_add(ioc, fw_event);
5127}
5128
5129/* shost template */
5130static struct scsi_host_template scsih_driver_template = {
5131 .module = THIS_MODULE,
5132 .name = "Fusion MPT SAS Host",
5133 .proc_name = MPT2SAS_DRIVER_NAME,
5134 .queuecommand = scsih_qcmd,
5135 .target_alloc = scsih_target_alloc,
5136 .slave_alloc = scsih_slave_alloc,
5137 .slave_configure = scsih_slave_configure,
5138 .target_destroy = scsih_target_destroy,
5139 .slave_destroy = scsih_slave_destroy,
5140 .change_queue_depth = scsih_change_queue_depth,
5141 .change_queue_type = scsih_change_queue_type,
5142 .eh_abort_handler = scsih_abort,
5143 .eh_device_reset_handler = scsih_dev_reset,
5144 .eh_host_reset_handler = scsih_host_reset,
5145 .bios_param = scsih_bios_param,
5146 .can_queue = 1,
5147 .this_id = -1,
5148 .sg_tablesize = MPT2SAS_SG_DEPTH,
5149 .max_sectors = 8192,
5150 .cmd_per_lun = 7,
5151 .use_clustering = ENABLE_CLUSTERING,
5152 .shost_attrs = mpt2sas_host_attrs,
5153 .sdev_attrs = mpt2sas_dev_attrs,
5154};
5155
5156/**
5157 * _scsih_expander_node_remove - removing expander device from list.
5158 * @ioc: per adapter object
5159 * @sas_expander: the sas_device object
5160 * Context: Calling function should acquire ioc->sas_node_lock.
5161 *
5162 * Removing object and freeing associated memory from the
5163 * ioc->sas_expander_list.
5164 *
5165 * Return nothing.
5166 */
5167static void
5168_scsih_expander_node_remove(struct MPT2SAS_ADAPTER *ioc,
5169 struct _sas_node *sas_expander)
5170{
5171 struct _sas_port *mpt2sas_port;
5172 struct _sas_device *sas_device;
5173 struct _sas_node *expander_sibling;
5174 unsigned long flags;
5175
5176 if (!sas_expander)
5177 return;
5178
5179 /* remove sibling ports attached to this expander */
5180 retry_device_search:
5181 list_for_each_entry(mpt2sas_port,
5182 &sas_expander->sas_port_list, port_list) {
5183 if (mpt2sas_port->remote_identify.device_type ==
5184 SAS_END_DEVICE) {
5185 spin_lock_irqsave(&ioc->sas_device_lock, flags);
5186 sas_device =
5187 mpt2sas_scsih_sas_device_find_by_sas_address(ioc,
5188 mpt2sas_port->remote_identify.sas_address);
5189 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
5190 if (!sas_device)
5191 continue;
5192 _scsih_remove_device(ioc, sas_device->handle);
5193 goto retry_device_search;
5194 }
5195 }
5196
5197 retry_expander_search:
5198 list_for_each_entry(mpt2sas_port,
5199 &sas_expander->sas_port_list, port_list) {
5200
5201 if (mpt2sas_port->remote_identify.device_type ==
5202 MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER ||
5203 mpt2sas_port->remote_identify.device_type ==
5204 MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER) {
5205
5206 spin_lock_irqsave(&ioc->sas_node_lock, flags);
5207 expander_sibling =
5208 mpt2sas_scsih_expander_find_by_sas_address(
5209 ioc, mpt2sas_port->remote_identify.sas_address);
5210 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
5211 if (!expander_sibling)
5212 continue;
5213 _scsih_expander_remove(ioc, expander_sibling->handle);
5214 goto retry_expander_search;
5215 }
5216 }
5217
5218 mpt2sas_transport_port_remove(ioc, sas_expander->sas_address,
5219 sas_expander->parent_handle);
5220
5221 printk(MPT2SAS_INFO_FMT "expander_remove: handle"
5222 "(0x%04x), sas_addr(0x%016llx)\n", ioc->name,
5223 sas_expander->handle, (unsigned long long)
5224 sas_expander->sas_address);
5225
5226 list_del(&sas_expander->list);
5227 kfree(sas_expander->phy);
5228 kfree(sas_expander);
5229}
5230
5231/**
5232 * scsih_remove - detach and remove add host
5233 * @pdev: PCI device struct
5234 *
5235 * Return nothing.
5236 */
5237static void __devexit
5238scsih_remove(struct pci_dev *pdev)
5239{
5240 struct Scsi_Host *shost = pci_get_drvdata(pdev);
5241 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
5242 struct _sas_port *mpt2sas_port;
5243 struct _sas_device *sas_device;
5244 struct _sas_node *expander_sibling;
5245 struct workqueue_struct *wq;
5246 unsigned long flags;
5247
5248 ioc->remove_host = 1;
5249 _scsih_fw_event_off(ioc);
5250
5251 spin_lock_irqsave(&ioc->fw_event_lock, flags);
5252 wq = ioc->firmware_event_thread;
5253 ioc->firmware_event_thread = NULL;
5254 spin_unlock_irqrestore(&ioc->fw_event_lock, flags);
5255 if (wq)
5256 destroy_workqueue(wq);
5257
5258 /* free ports attached to the sas_host */
5259 retry_again:
5260 list_for_each_entry(mpt2sas_port,
5261 &ioc->sas_hba.sas_port_list, port_list) {
5262 if (mpt2sas_port->remote_identify.device_type ==
5263 SAS_END_DEVICE) {
5264 sas_device =
5265 mpt2sas_scsih_sas_device_find_by_sas_address(ioc,
5266 mpt2sas_port->remote_identify.sas_address);
5267 if (sas_device) {
5268 _scsih_remove_device(ioc, sas_device->handle);
5269 goto retry_again;
5270 }
5271 } else {
5272 expander_sibling =
5273 mpt2sas_scsih_expander_find_by_sas_address(ioc,
5274 mpt2sas_port->remote_identify.sas_address);
5275 if (expander_sibling) {
5276 _scsih_expander_remove(ioc,
5277 expander_sibling->handle);
5278 goto retry_again;
5279 }
5280 }
5281 }
5282
5283 /* free phys attached to the sas_host */
5284 if (ioc->sas_hba.num_phys) {
5285 kfree(ioc->sas_hba.phy);
5286 ioc->sas_hba.phy = NULL;
5287 ioc->sas_hba.num_phys = 0;
5288 }
5289
5290 sas_remove_host(shost);
5291 mpt2sas_base_detach(ioc);
5292 list_del(&ioc->list);
5293 scsi_remove_host(shost);
5294 scsi_host_put(shost);
5295}
5296
5297/**
5298 * _scsih_probe_boot_devices - reports 1st device
5299 * @ioc: per adapter object
5300 *
5301 * If specified in bios page 2, this routine reports the 1st
5302 * device scsi-ml or sas transport for persistent boot device
5303 * purposes. Please refer to function _scsih_determine_boot_device()
5304 */
5305static void
5306_scsih_probe_boot_devices(struct MPT2SAS_ADAPTER *ioc)
5307{
5308 u8 is_raid;
5309 void *device;
5310 struct _sas_device *sas_device;
5311 struct _raid_device *raid_device;
5312 u16 handle, parent_handle;
5313 u64 sas_address;
5314 unsigned long flags;
5315 int rc;
5316
5317 device = NULL;
5318 if (ioc->req_boot_device.device) {
5319 device = ioc->req_boot_device.device;
5320 is_raid = ioc->req_boot_device.is_raid;
5321 } else if (ioc->req_alt_boot_device.device) {
5322 device = ioc->req_alt_boot_device.device;
5323 is_raid = ioc->req_alt_boot_device.is_raid;
5324 } else if (ioc->current_boot_device.device) {
5325 device = ioc->current_boot_device.device;
5326 is_raid = ioc->current_boot_device.is_raid;
5327 }
5328
5329 if (!device)
5330 return;
5331
5332 if (is_raid) {
5333 raid_device = device;
5334 rc = scsi_add_device(ioc->shost, RAID_CHANNEL,
5335 raid_device->id, 0);
5336 if (rc)
5337 _scsih_raid_device_remove(ioc, raid_device);
5338 } else {
5339 sas_device = device;
5340 handle = sas_device->handle;
5341 parent_handle = sas_device->parent_handle;
5342 sas_address = sas_device->sas_address;
5343 spin_lock_irqsave(&ioc->sas_device_lock, flags);
5344 list_move_tail(&sas_device->list, &ioc->sas_device_list);
5345 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
5346 if (!mpt2sas_transport_port_add(ioc, sas_device->handle,
5347 sas_device->parent_handle)) {
5348 _scsih_sas_device_remove(ioc, sas_device);
5349 } else if (!sas_device->starget) {
5350 mpt2sas_transport_port_remove(ioc, sas_address,
5351 parent_handle);
5352 _scsih_sas_device_remove(ioc, sas_device);
5353 }
5354 }
5355}
5356
5357/**
5358 * _scsih_probe_raid - reporting raid volumes to scsi-ml
5359 * @ioc: per adapter object
5360 *
5361 * Called during initial loading of the driver.
5362 */
5363static void
5364_scsih_probe_raid(struct MPT2SAS_ADAPTER *ioc)
5365{
5366 struct _raid_device *raid_device, *raid_next;
5367 int rc;
5368
5369 list_for_each_entry_safe(raid_device, raid_next,
5370 &ioc->raid_device_list, list) {
5371 if (raid_device->starget)
5372 continue;
5373 rc = scsi_add_device(ioc->shost, RAID_CHANNEL,
5374 raid_device->id, 0);
5375 if (rc)
5376 _scsih_raid_device_remove(ioc, raid_device);
5377 }
5378}
5379
5380/**
5381 * _scsih_probe_sas - reporting raid volumes to sas transport
5382 * @ioc: per adapter object
5383 *
5384 * Called during initial loading of the driver.
5385 */
5386static void
5387_scsih_probe_sas(struct MPT2SAS_ADAPTER *ioc)
5388{
5389 struct _sas_device *sas_device, *next;
5390 unsigned long flags;
5391 u16 handle, parent_handle;
5392 u64 sas_address;
5393
5394 /* SAS Device List */
5395 list_for_each_entry_safe(sas_device, next, &ioc->sas_device_init_list,
5396 list) {
5397 spin_lock_irqsave(&ioc->sas_device_lock, flags);
5398 list_move_tail(&sas_device->list, &ioc->sas_device_list);
5399 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
5400
5401 handle = sas_device->handle;
5402 parent_handle = sas_device->parent_handle;
5403 sas_address = sas_device->sas_address;
5404 if (!mpt2sas_transport_port_add(ioc, handle, parent_handle)) {
5405 _scsih_sas_device_remove(ioc, sas_device);
5406 } else if (!sas_device->starget) {
5407 mpt2sas_transport_port_remove(ioc, sas_address,
5408 parent_handle);
5409 _scsih_sas_device_remove(ioc, sas_device);
5410 }
5411 }
5412}
5413
5414/**
5415 * _scsih_probe_devices - probing for devices
5416 * @ioc: per adapter object
5417 *
5418 * Called during initial loading of the driver.
5419 */
5420static void
5421_scsih_probe_devices(struct MPT2SAS_ADAPTER *ioc)
5422{
5423 u16 volume_mapping_flags =
5424 le16_to_cpu(ioc->ioc_pg8.IRVolumeMappingFlags) &
5425 MPI2_IOCPAGE8_IRFLAGS_MASK_VOLUME_MAPPING_MODE;
5426
5427 if (!(ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR))
5428 return; /* return when IOC doesn't support initiator mode */
5429
5430 _scsih_probe_boot_devices(ioc);
5431
5432 if (ioc->ir_firmware) {
5433 if ((volume_mapping_flags &
5434 MPI2_IOCPAGE8_IRFLAGS_HIGH_VOLUME_MAPPING)) {
5435 _scsih_probe_sas(ioc);
5436 _scsih_probe_raid(ioc);
5437 } else {
5438 _scsih_probe_raid(ioc);
5439 _scsih_probe_sas(ioc);
5440 }
5441 } else
5442 _scsih_probe_sas(ioc);
5443}
5444
5445/**
5446 * scsih_probe - attach and add scsi host
5447 * @pdev: PCI device struct
5448 * @id: pci device id
5449 *
5450 * Returns 0 success, anything else error.
5451 */
5452static int
5453scsih_probe(struct pci_dev *pdev, const struct pci_device_id *id)
5454{
5455 struct MPT2SAS_ADAPTER *ioc;
5456 struct Scsi_Host *shost;
5457
5458 shost = scsi_host_alloc(&scsih_driver_template,
5459 sizeof(struct MPT2SAS_ADAPTER));
5460 if (!shost)
5461 return -ENODEV;
5462
5463 /* init local params */
5464 ioc = shost_priv(shost);
5465 memset(ioc, 0, sizeof(struct MPT2SAS_ADAPTER));
5466 INIT_LIST_HEAD(&ioc->list);
5467 list_add_tail(&ioc->list, &mpt2sas_ioc_list);
5468 ioc->shost = shost;
5469 ioc->id = mpt_ids++;
5470 sprintf(ioc->name, "%s%d", MPT2SAS_DRIVER_NAME, ioc->id);
5471 ioc->pdev = pdev;
5472 ioc->scsi_io_cb_idx = scsi_io_cb_idx;
5473 ioc->tm_cb_idx = tm_cb_idx;
5474 ioc->ctl_cb_idx = ctl_cb_idx;
5475 ioc->base_cb_idx = base_cb_idx;
5476 ioc->transport_cb_idx = transport_cb_idx;
5477 ioc->config_cb_idx = config_cb_idx;
5478 ioc->logging_level = logging_level;
5479 /* misc semaphores and spin locks */
5480 spin_lock_init(&ioc->ioc_reset_in_progress_lock);
5481 spin_lock_init(&ioc->scsi_lookup_lock);
5482 spin_lock_init(&ioc->sas_device_lock);
5483 spin_lock_init(&ioc->sas_node_lock);
5484 spin_lock_init(&ioc->fw_event_lock);
5485 spin_lock_init(&ioc->raid_device_lock);
5486
5487 INIT_LIST_HEAD(&ioc->sas_device_list);
5488 INIT_LIST_HEAD(&ioc->sas_device_init_list);
5489 INIT_LIST_HEAD(&ioc->sas_expander_list);
5490 INIT_LIST_HEAD(&ioc->fw_event_list);
5491 INIT_LIST_HEAD(&ioc->raid_device_list);
5492 INIT_LIST_HEAD(&ioc->sas_hba.sas_port_list);
5493
5494 /* init shost parameters */
5495 shost->max_cmd_len = 16;
5496 shost->max_lun = max_lun;
5497 shost->transportt = mpt2sas_transport_template;
5498 shost->unique_id = ioc->id;
5499
5500 if ((scsi_add_host(shost, &pdev->dev))) {
5501 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
5502 ioc->name, __FILE__, __LINE__, __func__);
5503 list_del(&ioc->list);
5504 goto out_add_shost_fail;
5505 }
5506
5507 /* event thread */
5508 snprintf(ioc->firmware_event_name, sizeof(ioc->firmware_event_name),
5509 "fw_event%d", ioc->id);
5510 ioc->firmware_event_thread = create_singlethread_workqueue(
5511 ioc->firmware_event_name);
5512 if (!ioc->firmware_event_thread) {
5513 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
5514 ioc->name, __FILE__, __LINE__, __func__);
5515 goto out_thread_fail;
5516 }
5517
5518 ioc->wait_for_port_enable_to_complete = 1;
5519 if ((mpt2sas_base_attach(ioc))) {
5520 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
5521 ioc->name, __FILE__, __LINE__, __func__);
5522 goto out_attach_fail;
5523 }
5524
5525 ioc->wait_for_port_enable_to_complete = 0;
5526 _scsih_probe_devices(ioc);
5527 return 0;
5528
5529 out_attach_fail:
5530 destroy_workqueue(ioc->firmware_event_thread);
5531 out_thread_fail:
5532 list_del(&ioc->list);
5533 scsi_remove_host(shost);
5534 out_add_shost_fail:
5535 return -ENODEV;
5536}
5537
5538#ifdef CONFIG_PM
5539/**
5540 * scsih_suspend - power management suspend main entry point
5541 * @pdev: PCI device struct
5542 * @state: PM state change to (usually PCI_D3)
5543 *
5544 * Returns 0 success, anything else error.
5545 */
5546static int
5547scsih_suspend(struct pci_dev *pdev, pm_message_t state)
5548{
5549 struct Scsi_Host *shost = pci_get_drvdata(pdev);
5550 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
5551 u32 device_state;
5552
5553 flush_scheduled_work();
5554 scsi_block_requests(shost);
5555 device_state = pci_choose_state(pdev, state);
5556 printk(MPT2SAS_INFO_FMT "pdev=0x%p, slot=%s, entering "
5557 "operating state [D%d]\n", ioc->name, pdev,
5558 pci_name(pdev), device_state);
5559
5560 mpt2sas_base_free_resources(ioc);
5561 pci_save_state(pdev);
5562 pci_disable_device(pdev);
5563 pci_set_power_state(pdev, device_state);
5564 return 0;
5565}
5566
5567/**
5568 * scsih_resume - power management resume main entry point
5569 * @pdev: PCI device struct
5570 *
5571 * Returns 0 success, anything else error.
5572 */
5573static int
5574scsih_resume(struct pci_dev *pdev)
5575{
5576 struct Scsi_Host *shost = pci_get_drvdata(pdev);
5577 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
5578 u32 device_state = pdev->current_state;
5579 int r;
5580
5581 printk(MPT2SAS_INFO_FMT "pdev=0x%p, slot=%s, previous "
5582 "operating state [D%d]\n", ioc->name, pdev,
5583 pci_name(pdev), device_state);
5584
5585 pci_set_power_state(pdev, PCI_D0);
5586 pci_enable_wake(pdev, PCI_D0, 0);
5587 pci_restore_state(pdev);
5588 ioc->pdev = pdev;
5589 r = mpt2sas_base_map_resources(ioc);
5590 if (r)
5591 return r;
5592
5593 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, SOFT_RESET);
5594 scsi_unblock_requests(shost);
5595 return 0;
5596}
5597#endif /* CONFIG_PM */
5598
5599
5600static struct pci_driver scsih_driver = {
5601 .name = MPT2SAS_DRIVER_NAME,
5602 .id_table = scsih_pci_table,
5603 .probe = scsih_probe,
5604 .remove = __devexit_p(scsih_remove),
5605#ifdef CONFIG_PM
5606 .suspend = scsih_suspend,
5607 .resume = scsih_resume,
5608#endif
5609};
5610
5611
5612/**
5613 * scsih_init - main entry point for this driver.
5614 *
5615 * Returns 0 success, anything else error.
5616 */
5617static int __init
5618scsih_init(void)
5619{
5620 int error;
5621
5622 mpt_ids = 0;
5623 printk(KERN_INFO "%s version %s loaded\n", MPT2SAS_DRIVER_NAME,
5624 MPT2SAS_DRIVER_VERSION);
5625
5626 mpt2sas_transport_template =
5627 sas_attach_transport(&mpt2sas_transport_functions);
5628 if (!mpt2sas_transport_template)
5629 return -ENODEV;
5630
5631 mpt2sas_base_initialize_callback_handler();
5632
5633 /* queuecommand callback hander */
5634 scsi_io_cb_idx = mpt2sas_base_register_callback_handler(scsih_io_done);
5635
5636 /* task managment callback handler */
5637 tm_cb_idx = mpt2sas_base_register_callback_handler(scsih_tm_done);
5638
5639 /* base internal commands callback handler */
5640 base_cb_idx = mpt2sas_base_register_callback_handler(mpt2sas_base_done);
5641
5642 /* transport internal commands callback handler */
5643 transport_cb_idx = mpt2sas_base_register_callback_handler(
5644 mpt2sas_transport_done);
5645
5646 /* configuration page API internal commands callback handler */
5647 config_cb_idx = mpt2sas_base_register_callback_handler(
5648 mpt2sas_config_done);
5649
5650 /* ctl module callback handler */
5651 ctl_cb_idx = mpt2sas_base_register_callback_handler(mpt2sas_ctl_done);
5652
5653 mpt2sas_ctl_init();
5654
5655 error = pci_register_driver(&scsih_driver);
5656 if (error)
5657 sas_release_transport(mpt2sas_transport_template);
5658
5659 return error;
5660}
5661
5662/**
5663 * scsih_exit - exit point for this driver (when it is a module).
5664 *
5665 * Returns 0 success, anything else error.
5666 */
5667static void __exit
5668scsih_exit(void)
5669{
5670 printk(KERN_INFO "mpt2sas version %s unloading\n",
5671 MPT2SAS_DRIVER_VERSION);
5672
5673 pci_unregister_driver(&scsih_driver);
5674
5675 sas_release_transport(mpt2sas_transport_template);
5676 mpt2sas_base_release_callback_handler(scsi_io_cb_idx);
5677 mpt2sas_base_release_callback_handler(tm_cb_idx);
5678 mpt2sas_base_release_callback_handler(base_cb_idx);
5679 mpt2sas_base_release_callback_handler(transport_cb_idx);
5680 mpt2sas_base_release_callback_handler(config_cb_idx);
5681 mpt2sas_base_release_callback_handler(ctl_cb_idx);
5682
5683 mpt2sas_ctl_exit();
5684}
5685
5686module_init(scsih_init);
5687module_exit(scsih_exit);
diff --git a/drivers/scsi/mpt2sas/mpt2sas_transport.c b/drivers/scsi/mpt2sas/mpt2sas_transport.c
new file mode 100644
index 000000000000..e03dc0b1e1a0
--- /dev/null
+++ b/drivers/scsi/mpt2sas/mpt2sas_transport.c
@@ -0,0 +1,1211 @@
1/*
2 * SAS Transport Layer for MPT (Message Passing Technology) based controllers
3 *
4 * This code is based on drivers/scsi/mpt2sas/mpt2_transport.c
5 * Copyright (C) 2007-2008 LSI Corporation
6 * (mailto:DL-MPTFusionLinux@lsi.com)
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * NO WARRANTY
19 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
20 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
23 * solely responsible for determining the appropriateness of using and
24 * distributing the Program and assumes all risks associated with its
25 * exercise of rights under this Agreement, including but not limited to
26 * the risks and costs of program errors, damage to or loss of data,
27 * programs or equipment, and unavailability or interruption of operations.
28
29 * DISCLAIMER OF LIABILITY
30 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
31 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
33 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
35 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
36 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
37
38 * You should have received a copy of the GNU General Public License
39 * along with this program; if not, write to the Free Software
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
41 * USA.
42 */
43
44#include <linux/module.h>
45#include <linux/kernel.h>
46#include <linux/init.h>
47#include <linux/errno.h>
48#include <linux/sched.h>
49#include <linux/workqueue.h>
50#include <linux/delay.h>
51#include <linux/pci.h>
52
53#include <scsi/scsi.h>
54#include <scsi/scsi_cmnd.h>
55#include <scsi/scsi_device.h>
56#include <scsi/scsi_host.h>
57#include <scsi/scsi_transport_sas.h>
58#include <scsi/scsi_dbg.h>
59
60#include "mpt2sas_base.h"
61/**
62 * _transport_sas_node_find_by_handle - sas node search
63 * @ioc: per adapter object
64 * @handle: expander or hba handle (assigned by firmware)
65 * Context: Calling function should acquire ioc->sas_node_lock.
66 *
67 * Search for either hba phys or expander device based on handle, then returns
68 * the sas_node object.
69 */
70static struct _sas_node *
71_transport_sas_node_find_by_handle(struct MPT2SAS_ADAPTER *ioc, u16 handle)
72{
73 int i;
74
75 for (i = 0; i < ioc->sas_hba.num_phys; i++)
76 if (ioc->sas_hba.phy[i].handle == handle)
77 return &ioc->sas_hba;
78
79 return mpt2sas_scsih_expander_find_by_handle(ioc, handle);
80}
81
82/**
83 * _transport_convert_phy_link_rate -
84 * @link_rate: link rate returned from mpt firmware
85 *
86 * Convert link_rate from mpi fusion into sas_transport form.
87 */
88static enum sas_linkrate
89_transport_convert_phy_link_rate(u8 link_rate)
90{
91 enum sas_linkrate rc;
92
93 switch (link_rate) {
94 case MPI2_SAS_NEG_LINK_RATE_1_5:
95 rc = SAS_LINK_RATE_1_5_GBPS;
96 break;
97 case MPI2_SAS_NEG_LINK_RATE_3_0:
98 rc = SAS_LINK_RATE_3_0_GBPS;
99 break;
100 case MPI2_SAS_NEG_LINK_RATE_6_0:
101 rc = SAS_LINK_RATE_6_0_GBPS;
102 break;
103 case MPI2_SAS_NEG_LINK_RATE_PHY_DISABLED:
104 rc = SAS_PHY_DISABLED;
105 break;
106 case MPI2_SAS_NEG_LINK_RATE_NEGOTIATION_FAILED:
107 rc = SAS_LINK_RATE_FAILED;
108 break;
109 case MPI2_SAS_NEG_LINK_RATE_PORT_SELECTOR:
110 rc = SAS_SATA_PORT_SELECTOR;
111 break;
112 case MPI2_SAS_NEG_LINK_RATE_SMP_RESET_IN_PROGRESS:
113 rc = SAS_PHY_RESET_IN_PROGRESS;
114 break;
115 default:
116 case MPI2_SAS_NEG_LINK_RATE_SATA_OOB_COMPLETE:
117 case MPI2_SAS_NEG_LINK_RATE_UNKNOWN_LINK_RATE:
118 rc = SAS_LINK_RATE_UNKNOWN;
119 break;
120 }
121 return rc;
122}
123
124/**
125 * _transport_set_identify - set identify for phys and end devices
126 * @ioc: per adapter object
127 * @handle: device handle
128 * @identify: sas identify info
129 *
130 * Populates sas identify info.
131 *
132 * Returns 0 for success, non-zero for failure.
133 */
134static int
135_transport_set_identify(struct MPT2SAS_ADAPTER *ioc, u16 handle,
136 struct sas_identify *identify)
137{
138 Mpi2SasDevicePage0_t sas_device_pg0;
139 Mpi2ConfigReply_t mpi_reply;
140 u32 device_info;
141 u32 ioc_status;
142
143 if ((mpt2sas_config_get_sas_device_pg0(ioc, &mpi_reply, &sas_device_pg0,
144 MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, handle))) {
145 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
146 ioc->name, __FILE__, __LINE__, __func__);
147 return -1;
148 }
149
150 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
151 MPI2_IOCSTATUS_MASK;
152 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
153 printk(MPT2SAS_ERR_FMT "handle(0x%04x), ioc_status(0x%04x)"
154 "\nfailure at %s:%d/%s()!\n", ioc->name, handle, ioc_status,
155 __FILE__, __LINE__, __func__);
156 return -1;
157 }
158
159 memset(identify, 0, sizeof(identify));
160 device_info = le32_to_cpu(sas_device_pg0.DeviceInfo);
161
162 /* sas_address */
163 identify->sas_address = le64_to_cpu(sas_device_pg0.SASAddress);
164
165 /* device_type */
166 switch (device_info & MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE) {
167 case MPI2_SAS_DEVICE_INFO_NO_DEVICE:
168 identify->device_type = SAS_PHY_UNUSED;
169 break;
170 case MPI2_SAS_DEVICE_INFO_END_DEVICE:
171 identify->device_type = SAS_END_DEVICE;
172 break;
173 case MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER:
174 identify->device_type = SAS_EDGE_EXPANDER_DEVICE;
175 break;
176 case MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER:
177 identify->device_type = SAS_FANOUT_EXPANDER_DEVICE;
178 break;
179 }
180
181 /* initiator_port_protocols */
182 if (device_info & MPI2_SAS_DEVICE_INFO_SSP_INITIATOR)
183 identify->initiator_port_protocols |= SAS_PROTOCOL_SSP;
184 if (device_info & MPI2_SAS_DEVICE_INFO_STP_INITIATOR)
185 identify->initiator_port_protocols |= SAS_PROTOCOL_STP;
186 if (device_info & MPI2_SAS_DEVICE_INFO_SMP_INITIATOR)
187 identify->initiator_port_protocols |= SAS_PROTOCOL_SMP;
188 if (device_info & MPI2_SAS_DEVICE_INFO_SATA_HOST)
189 identify->initiator_port_protocols |= SAS_PROTOCOL_SATA;
190
191 /* target_port_protocols */
192 if (device_info & MPI2_SAS_DEVICE_INFO_SSP_TARGET)
193 identify->target_port_protocols |= SAS_PROTOCOL_SSP;
194 if (device_info & MPI2_SAS_DEVICE_INFO_STP_TARGET)
195 identify->target_port_protocols |= SAS_PROTOCOL_STP;
196 if (device_info & MPI2_SAS_DEVICE_INFO_SMP_TARGET)
197 identify->target_port_protocols |= SAS_PROTOCOL_SMP;
198 if (device_info & MPI2_SAS_DEVICE_INFO_SATA_DEVICE)
199 identify->target_port_protocols |= SAS_PROTOCOL_SATA;
200
201 return 0;
202}
203
204/**
205 * mpt2sas_transport_done - internal transport layer callback handler.
206 * @ioc: per adapter object
207 * @smid: system request message index
208 * @VF_ID: virtual function id
209 * @reply: reply message frame(lower 32bit addr)
210 *
211 * Callback handler when sending internal generated transport cmds.
212 * The callback index passed is `ioc->transport_cb_idx`
213 *
214 * Return nothing.
215 */
216void
217mpt2sas_transport_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID,
218 u32 reply)
219{
220 MPI2DefaultReply_t *mpi_reply;
221
222 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
223 if (ioc->transport_cmds.status == MPT2_CMD_NOT_USED)
224 return;
225 if (ioc->transport_cmds.smid != smid)
226 return;
227 ioc->transport_cmds.status |= MPT2_CMD_COMPLETE;
228 if (mpi_reply) {
229 memcpy(ioc->transport_cmds.reply, mpi_reply,
230 mpi_reply->MsgLength*4);
231 ioc->transport_cmds.status |= MPT2_CMD_REPLY_VALID;
232 }
233 ioc->transport_cmds.status &= ~MPT2_CMD_PENDING;
234 complete(&ioc->transport_cmds.done);
235}
236
237/* report manufacture request structure */
238struct rep_manu_request{
239 u8 smp_frame_type;
240 u8 function;
241 u8 reserved;
242 u8 request_length;
243};
244
245/* report manufacture reply structure */
246struct rep_manu_reply{
247 u8 smp_frame_type; /* 0x41 */
248 u8 function; /* 0x01 */
249 u8 function_result;
250 u8 response_length;
251 u16 expander_change_count;
252 u8 reserved0[2];
253 u8 sas_format:1;
254 u8 reserved1:7;
255 u8 reserved2[3];
256 u8 vendor_id[SAS_EXPANDER_VENDOR_ID_LEN];
257 u8 product_id[SAS_EXPANDER_PRODUCT_ID_LEN];
258 u8 product_rev[SAS_EXPANDER_PRODUCT_REV_LEN];
259 u8 component_vendor_id[SAS_EXPANDER_COMPONENT_VENDOR_ID_LEN];
260 u16 component_id;
261 u8 component_revision_id;
262 u8 reserved3;
263 u8 vendor_specific[8];
264};
265
266/**
267 * transport_expander_report_manufacture - obtain SMP report_manufacture
268 * @ioc: per adapter object
269 * @sas_address: expander sas address
270 * @edev: the sas_expander_device object
271 *
272 * Fills in the sas_expander_device object when SMP port is created.
273 *
274 * Returns 0 for success, non-zero for failure.
275 */
276static int
277transport_expander_report_manufacture(struct MPT2SAS_ADAPTER *ioc,
278 u64 sas_address, struct sas_expander_device *edev)
279{
280 Mpi2SmpPassthroughRequest_t *mpi_request;
281 Mpi2SmpPassthroughReply_t *mpi_reply;
282 struct rep_manu_reply *manufacture_reply;
283 struct rep_manu_request *manufacture_request;
284 int rc;
285 u16 smid;
286 u32 ioc_state;
287 unsigned long timeleft;
288 void *psge;
289 u32 sgl_flags;
290 u8 issue_reset = 0;
291 unsigned long flags;
292 void *data_out = NULL;
293 dma_addr_t data_out_dma;
294 u32 sz;
295 u64 *sas_address_le;
296 u16 wait_state_count;
297
298 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
299 if (ioc->ioc_reset_in_progress) {
300 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
301 printk(MPT2SAS_INFO_FMT "%s: host reset in progress!\n",
302 __func__, ioc->name);
303 return -EFAULT;
304 }
305 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
306
307 mutex_lock(&ioc->transport_cmds.mutex);
308
309 if (ioc->transport_cmds.status != MPT2_CMD_NOT_USED) {
310 printk(MPT2SAS_ERR_FMT "%s: transport_cmds in use\n",
311 ioc->name, __func__);
312 rc = -EAGAIN;
313 goto out;
314 }
315 ioc->transport_cmds.status = MPT2_CMD_PENDING;
316
317 wait_state_count = 0;
318 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
319 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
320 if (wait_state_count++ == 10) {
321 printk(MPT2SAS_ERR_FMT
322 "%s: failed due to ioc not operational\n",
323 ioc->name, __func__);
324 rc = -EFAULT;
325 goto out;
326 }
327 ssleep(1);
328 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
329 printk(MPT2SAS_INFO_FMT "%s: waiting for "
330 "operational state(count=%d)\n", ioc->name,
331 __func__, wait_state_count);
332 }
333 if (wait_state_count)
334 printk(MPT2SAS_INFO_FMT "%s: ioc is operational\n",
335 ioc->name, __func__);
336
337 smid = mpt2sas_base_get_smid(ioc, ioc->transport_cb_idx);
338 if (!smid) {
339 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
340 ioc->name, __func__);
341 rc = -EAGAIN;
342 goto out;
343 }
344
345 rc = 0;
346 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
347 ioc->transport_cmds.smid = smid;
348
349 sz = sizeof(struct rep_manu_request) + sizeof(struct rep_manu_reply);
350 data_out = pci_alloc_consistent(ioc->pdev, sz, &data_out_dma);
351
352 if (!data_out) {
353 printk(KERN_ERR "failure at %s:%d/%s()!\n", __FILE__,
354 __LINE__, __func__);
355 rc = -ENOMEM;
356 mpt2sas_base_free_smid(ioc, smid);
357 goto out;
358 }
359
360 manufacture_request = data_out;
361 manufacture_request->smp_frame_type = 0x40;
362 manufacture_request->function = 1;
363 manufacture_request->reserved = 0;
364 manufacture_request->request_length = 0;
365
366 memset(mpi_request, 0, sizeof(Mpi2SmpPassthroughRequest_t));
367 mpi_request->Function = MPI2_FUNCTION_SMP_PASSTHROUGH;
368 mpi_request->PhysicalPort = 0xFF;
369 sas_address_le = (u64 *)&mpi_request->SASAddress;
370 *sas_address_le = cpu_to_le64(sas_address);
371 mpi_request->RequestDataLength = sizeof(struct rep_manu_request);
372 psge = &mpi_request->SGL;
373
374 /* WRITE sgel first */
375 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
376 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC);
377 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
378 ioc->base_add_sg_single(psge, sgl_flags |
379 sizeof(struct rep_manu_request), data_out_dma);
380
381 /* incr sgel */
382 psge += ioc->sge_size;
383
384 /* READ sgel last */
385 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
386 MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
387 MPI2_SGE_FLAGS_END_OF_LIST);
388 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
389 ioc->base_add_sg_single(psge, sgl_flags |
390 sizeof(struct rep_manu_reply), data_out_dma +
391 sizeof(struct rep_manu_request));
392
393 dtransportprintk(ioc, printk(MPT2SAS_DEBUG_FMT "report_manufacture - "
394 "send to sas_addr(0x%016llx)\n", ioc->name,
395 (unsigned long long)sas_address));
396 mpt2sas_base_put_smid_default(ioc, smid, 0 /* VF_ID */);
397 timeleft = wait_for_completion_timeout(&ioc->transport_cmds.done,
398 10*HZ);
399
400 if (!(ioc->transport_cmds.status & MPT2_CMD_COMPLETE)) {
401 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
402 ioc->name, __func__);
403 _debug_dump_mf(mpi_request,
404 sizeof(Mpi2SmpPassthroughRequest_t)/4);
405 if (!(ioc->transport_cmds.status & MPT2_CMD_RESET))
406 issue_reset = 1;
407 goto issue_host_reset;
408 }
409
410 dtransportprintk(ioc, printk(MPT2SAS_DEBUG_FMT "report_manufacture - "
411 "complete\n", ioc->name));
412
413 if (ioc->transport_cmds.status & MPT2_CMD_REPLY_VALID) {
414 u8 *tmp;
415
416 mpi_reply = ioc->transport_cmds.reply;
417
418 dtransportprintk(ioc, printk(MPT2SAS_DEBUG_FMT
419 "report_manufacture - reply data transfer size(%d)\n",
420 ioc->name, le16_to_cpu(mpi_reply->ResponseDataLength)));
421
422 if (le16_to_cpu(mpi_reply->ResponseDataLength) !=
423 sizeof(struct rep_manu_reply))
424 goto out;
425
426 manufacture_reply = data_out + sizeof(struct rep_manu_request);
427 strncpy(edev->vendor_id, manufacture_reply->vendor_id,
428 SAS_EXPANDER_VENDOR_ID_LEN);
429 strncpy(edev->product_id, manufacture_reply->product_id,
430 SAS_EXPANDER_PRODUCT_ID_LEN);
431 strncpy(edev->product_rev, manufacture_reply->product_rev,
432 SAS_EXPANDER_PRODUCT_REV_LEN);
433 edev->level = manufacture_reply->sas_format;
434 if (manufacture_reply->sas_format) {
435 strncpy(edev->component_vendor_id,
436 manufacture_reply->component_vendor_id,
437 SAS_EXPANDER_COMPONENT_VENDOR_ID_LEN);
438 tmp = (u8 *)&manufacture_reply->component_id;
439 edev->component_id = tmp[0] << 8 | tmp[1];
440 edev->component_revision_id =
441 manufacture_reply->component_revision_id;
442 }
443 } else
444 dtransportprintk(ioc, printk(MPT2SAS_DEBUG_FMT
445 "report_manufacture - no reply\n", ioc->name));
446
447 issue_host_reset:
448 if (issue_reset)
449 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
450 FORCE_BIG_HAMMER);
451 out:
452 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
453 if (data_out)
454 pci_free_consistent(ioc->pdev, sz, data_out, data_out_dma);
455
456 mutex_unlock(&ioc->transport_cmds.mutex);
457 return rc;
458}
459
460/**
461 * mpt2sas_transport_port_add - insert port to the list
462 * @ioc: per adapter object
463 * @handle: handle of attached device
464 * @parent_handle: parent handle(either hba or expander)
465 * Context: This function will acquire ioc->sas_node_lock.
466 *
467 * Adding new port object to the sas_node->sas_port_list.
468 *
469 * Returns mpt2sas_port.
470 */
471struct _sas_port *
472mpt2sas_transport_port_add(struct MPT2SAS_ADAPTER *ioc, u16 handle,
473 u16 parent_handle)
474{
475 struct _sas_phy *mpt2sas_phy, *next;
476 struct _sas_port *mpt2sas_port;
477 unsigned long flags;
478 struct _sas_node *sas_node;
479 struct sas_rphy *rphy;
480 int i;
481 struct sas_port *port;
482
483 if (!parent_handle)
484 return NULL;
485
486 mpt2sas_port = kzalloc(sizeof(struct _sas_port),
487 GFP_KERNEL);
488 if (!mpt2sas_port) {
489 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
490 ioc->name, __FILE__, __LINE__, __func__);
491 return NULL;
492 }
493
494 INIT_LIST_HEAD(&mpt2sas_port->port_list);
495 INIT_LIST_HEAD(&mpt2sas_port->phy_list);
496 spin_lock_irqsave(&ioc->sas_node_lock, flags);
497 sas_node = _transport_sas_node_find_by_handle(ioc, parent_handle);
498 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
499
500 if (!sas_node) {
501 printk(MPT2SAS_ERR_FMT "%s: Could not find parent(0x%04x)!\n",
502 ioc->name, __func__, parent_handle);
503 goto out_fail;
504 }
505
506 mpt2sas_port->handle = parent_handle;
507 mpt2sas_port->sas_address = sas_node->sas_address;
508 if ((_transport_set_identify(ioc, handle,
509 &mpt2sas_port->remote_identify))) {
510 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
511 ioc->name, __FILE__, __LINE__, __func__);
512 goto out_fail;
513 }
514
515 if (mpt2sas_port->remote_identify.device_type == SAS_PHY_UNUSED) {
516 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
517 ioc->name, __FILE__, __LINE__, __func__);
518 goto out_fail;
519 }
520
521 for (i = 0; i < sas_node->num_phys; i++) {
522 if (sas_node->phy[i].remote_identify.sas_address !=
523 mpt2sas_port->remote_identify.sas_address)
524 continue;
525 list_add_tail(&sas_node->phy[i].port_siblings,
526 &mpt2sas_port->phy_list);
527 mpt2sas_port->num_phys++;
528 }
529
530 if (!mpt2sas_port->num_phys) {
531 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
532 ioc->name, __FILE__, __LINE__, __func__);
533 goto out_fail;
534 }
535
536 port = sas_port_alloc_num(sas_node->parent_dev);
537 if ((sas_port_add(port))) {
538 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
539 ioc->name, __FILE__, __LINE__, __func__);
540 goto out_fail;
541 }
542
543 list_for_each_entry(mpt2sas_phy, &mpt2sas_port->phy_list,
544 port_siblings) {
545 if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
546 dev_printk(KERN_INFO, &port->dev, "add: handle(0x%04x)"
547 ", sas_addr(0x%016llx), phy(%d)\n", handle,
548 (unsigned long long)
549 mpt2sas_port->remote_identify.sas_address,
550 mpt2sas_phy->phy_id);
551 sas_port_add_phy(port, mpt2sas_phy->phy);
552 }
553
554 mpt2sas_port->port = port;
555 if (mpt2sas_port->remote_identify.device_type == SAS_END_DEVICE)
556 rphy = sas_end_device_alloc(port);
557 else
558 rphy = sas_expander_alloc(port,
559 mpt2sas_port->remote_identify.device_type);
560
561 rphy->identify = mpt2sas_port->remote_identify;
562 if ((sas_rphy_add(rphy))) {
563 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
564 ioc->name, __FILE__, __LINE__, __func__);
565 }
566 if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
567 dev_printk(KERN_INFO, &rphy->dev, "add: handle(0x%04x), "
568 "sas_addr(0x%016llx)\n", handle,
569 (unsigned long long)
570 mpt2sas_port->remote_identify.sas_address);
571 mpt2sas_port->rphy = rphy;
572 spin_lock_irqsave(&ioc->sas_node_lock, flags);
573 list_add_tail(&mpt2sas_port->port_list, &sas_node->sas_port_list);
574 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
575
576 /* fill in report manufacture */
577 if (mpt2sas_port->remote_identify.device_type ==
578 MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER ||
579 mpt2sas_port->remote_identify.device_type ==
580 MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER)
581 transport_expander_report_manufacture(ioc,
582 mpt2sas_port->remote_identify.sas_address,
583 rphy_to_expander_device(rphy));
584
585 return mpt2sas_port;
586
587 out_fail:
588 list_for_each_entry_safe(mpt2sas_phy, next, &mpt2sas_port->phy_list,
589 port_siblings)
590 list_del(&mpt2sas_phy->port_siblings);
591 kfree(mpt2sas_port);
592 return NULL;
593}
594
595/**
596 * mpt2sas_transport_port_remove - remove port from the list
597 * @ioc: per adapter object
598 * @sas_address: sas address of attached device
599 * @parent_handle: handle to the upstream parent(either hba or expander)
600 * Context: This function will acquire ioc->sas_node_lock.
601 *
602 * Removing object and freeing associated memory from the
603 * ioc->sas_port_list.
604 *
605 * Return nothing.
606 */
607void
608mpt2sas_transport_port_remove(struct MPT2SAS_ADAPTER *ioc, u64 sas_address,
609 u16 parent_handle)
610{
611 int i;
612 unsigned long flags;
613 struct _sas_port *mpt2sas_port, *next;
614 struct _sas_node *sas_node;
615 u8 found = 0;
616 struct _sas_phy *mpt2sas_phy, *next_phy;
617
618 spin_lock_irqsave(&ioc->sas_node_lock, flags);
619 sas_node = _transport_sas_node_find_by_handle(ioc, parent_handle);
620 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
621 if (!sas_node)
622 return;
623 list_for_each_entry_safe(mpt2sas_port, next, &sas_node->sas_port_list,
624 port_list) {
625 if (mpt2sas_port->remote_identify.sas_address != sas_address)
626 continue;
627 found = 1;
628 list_del(&mpt2sas_port->port_list);
629 goto out;
630 }
631 out:
632 if (!found)
633 return;
634
635 for (i = 0; i < sas_node->num_phys; i++) {
636 if (sas_node->phy[i].remote_identify.sas_address == sas_address)
637 memset(&sas_node->phy[i].remote_identify, 0 ,
638 sizeof(struct sas_identify));
639 }
640
641 list_for_each_entry_safe(mpt2sas_phy, next_phy,
642 &mpt2sas_port->phy_list, port_siblings) {
643 if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
644 dev_printk(KERN_INFO, &mpt2sas_port->port->dev,
645 "remove: parent_handle(0x%04x), "
646 "sas_addr(0x%016llx), phy(%d)\n", parent_handle,
647 (unsigned long long)
648 mpt2sas_port->remote_identify.sas_address,
649 mpt2sas_phy->phy_id);
650 sas_port_delete_phy(mpt2sas_port->port, mpt2sas_phy->phy);
651 list_del(&mpt2sas_phy->port_siblings);
652 }
653 sas_port_delete(mpt2sas_port->port);
654 kfree(mpt2sas_port);
655}
656
657/**
658 * mpt2sas_transport_add_host_phy - report sas_host phy to transport
659 * @ioc: per adapter object
660 * @mpt2sas_phy: mpt2sas per phy object
661 * @phy_pg0: sas phy page 0
662 * @parent_dev: parent device class object
663 *
664 * Returns 0 for success, non-zero for failure.
665 */
666int
667mpt2sas_transport_add_host_phy(struct MPT2SAS_ADAPTER *ioc, struct _sas_phy
668 *mpt2sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev)
669{
670 struct sas_phy *phy;
671 int phy_index = mpt2sas_phy->phy_id;
672
673
674 INIT_LIST_HEAD(&mpt2sas_phy->port_siblings);
675 phy = sas_phy_alloc(parent_dev, phy_index);
676 if (!phy) {
677 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
678 ioc->name, __FILE__, __LINE__, __func__);
679 return -1;
680 }
681 if ((_transport_set_identify(ioc, mpt2sas_phy->handle,
682 &mpt2sas_phy->identify))) {
683 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
684 ioc->name, __FILE__, __LINE__, __func__);
685 return -1;
686 }
687 phy->identify = mpt2sas_phy->identify;
688 mpt2sas_phy->attached_handle = le16_to_cpu(phy_pg0.AttachedDevHandle);
689 if (mpt2sas_phy->attached_handle)
690 _transport_set_identify(ioc, mpt2sas_phy->attached_handle,
691 &mpt2sas_phy->remote_identify);
692 phy->identify.phy_identifier = mpt2sas_phy->phy_id;
693 phy->negotiated_linkrate = _transport_convert_phy_link_rate(
694 phy_pg0.NegotiatedLinkRate & MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL);
695 phy->minimum_linkrate_hw = _transport_convert_phy_link_rate(
696 phy_pg0.HwLinkRate & MPI2_SAS_HWRATE_MIN_RATE_MASK);
697 phy->maximum_linkrate_hw = _transport_convert_phy_link_rate(
698 phy_pg0.HwLinkRate >> 4);
699 phy->minimum_linkrate = _transport_convert_phy_link_rate(
700 phy_pg0.ProgrammedLinkRate & MPI2_SAS_PRATE_MIN_RATE_MASK);
701 phy->maximum_linkrate = _transport_convert_phy_link_rate(
702 phy_pg0.ProgrammedLinkRate >> 4);
703
704 if ((sas_phy_add(phy))) {
705 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
706 ioc->name, __FILE__, __LINE__, __func__);
707 sas_phy_free(phy);
708 return -1;
709 }
710 if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
711 dev_printk(KERN_INFO, &phy->dev,
712 "add: handle(0x%04x), sas_addr(0x%016llx)\n"
713 "\tattached_handle(0x%04x), sas_addr(0x%016llx)\n",
714 mpt2sas_phy->handle, (unsigned long long)
715 mpt2sas_phy->identify.sas_address,
716 mpt2sas_phy->attached_handle,
717 (unsigned long long)
718 mpt2sas_phy->remote_identify.sas_address);
719 mpt2sas_phy->phy = phy;
720 return 0;
721}
722
723
724/**
725 * mpt2sas_transport_add_expander_phy - report expander phy to transport
726 * @ioc: per adapter object
727 * @mpt2sas_phy: mpt2sas per phy object
728 * @expander_pg1: expander page 1
729 * @parent_dev: parent device class object
730 *
731 * Returns 0 for success, non-zero for failure.
732 */
733int
734mpt2sas_transport_add_expander_phy(struct MPT2SAS_ADAPTER *ioc, struct _sas_phy
735 *mpt2sas_phy, Mpi2ExpanderPage1_t expander_pg1, struct device *parent_dev)
736{
737 struct sas_phy *phy;
738 int phy_index = mpt2sas_phy->phy_id;
739
740 INIT_LIST_HEAD(&mpt2sas_phy->port_siblings);
741 phy = sas_phy_alloc(parent_dev, phy_index);
742 if (!phy) {
743 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
744 ioc->name, __FILE__, __LINE__, __func__);
745 return -1;
746 }
747 if ((_transport_set_identify(ioc, mpt2sas_phy->handle,
748 &mpt2sas_phy->identify))) {
749 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
750 ioc->name, __FILE__, __LINE__, __func__);
751 return -1;
752 }
753 phy->identify = mpt2sas_phy->identify;
754 mpt2sas_phy->attached_handle =
755 le16_to_cpu(expander_pg1.AttachedDevHandle);
756 if (mpt2sas_phy->attached_handle)
757 _transport_set_identify(ioc, mpt2sas_phy->attached_handle,
758 &mpt2sas_phy->remote_identify);
759 phy->identify.phy_identifier = mpt2sas_phy->phy_id;
760 phy->negotiated_linkrate = _transport_convert_phy_link_rate(
761 expander_pg1.NegotiatedLinkRate &
762 MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL);
763 phy->minimum_linkrate_hw = _transport_convert_phy_link_rate(
764 expander_pg1.HwLinkRate & MPI2_SAS_HWRATE_MIN_RATE_MASK);
765 phy->maximum_linkrate_hw = _transport_convert_phy_link_rate(
766 expander_pg1.HwLinkRate >> 4);
767 phy->minimum_linkrate = _transport_convert_phy_link_rate(
768 expander_pg1.ProgrammedLinkRate & MPI2_SAS_PRATE_MIN_RATE_MASK);
769 phy->maximum_linkrate = _transport_convert_phy_link_rate(
770 expander_pg1.ProgrammedLinkRate >> 4);
771
772 if ((sas_phy_add(phy))) {
773 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
774 ioc->name, __FILE__, __LINE__, __func__);
775 sas_phy_free(phy);
776 return -1;
777 }
778 if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
779 dev_printk(KERN_INFO, &phy->dev,
780 "add: handle(0x%04x), sas_addr(0x%016llx)\n"
781 "\tattached_handle(0x%04x), sas_addr(0x%016llx)\n",
782 mpt2sas_phy->handle, (unsigned long long)
783 mpt2sas_phy->identify.sas_address,
784 mpt2sas_phy->attached_handle,
785 (unsigned long long)
786 mpt2sas_phy->remote_identify.sas_address);
787 mpt2sas_phy->phy = phy;
788 return 0;
789}
790
791/**
792 * mpt2sas_transport_update_phy_link_change - refreshing phy link changes and attached devices
793 * @ioc: per adapter object
794 * @handle: handle to sas_host or expander
795 * @attached_handle: attached device handle
796 * @phy_numberv: phy number
797 * @link_rate: new link rate
798 *
799 * Returns nothing.
800 */
801void
802mpt2sas_transport_update_phy_link_change(struct MPT2SAS_ADAPTER *ioc,
803 u16 handle, u16 attached_handle, u8 phy_number, u8 link_rate)
804{
805 unsigned long flags;
806 struct _sas_node *sas_node;
807 struct _sas_phy *mpt2sas_phy;
808
809 spin_lock_irqsave(&ioc->sas_node_lock, flags);
810 sas_node = _transport_sas_node_find_by_handle(ioc, handle);
811 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
812 if (!sas_node)
813 return;
814
815 mpt2sas_phy = &sas_node->phy[phy_number];
816 mpt2sas_phy->attached_handle = attached_handle;
817 if (attached_handle && (link_rate >= MPI2_SAS_NEG_LINK_RATE_1_5))
818 _transport_set_identify(ioc, mpt2sas_phy->attached_handle,
819 &mpt2sas_phy->remote_identify);
820 else
821 memset(&mpt2sas_phy->remote_identify, 0 , sizeof(struct
822 sas_identify));
823
824 if (mpt2sas_phy->phy)
825 mpt2sas_phy->phy->negotiated_linkrate =
826 _transport_convert_phy_link_rate(link_rate);
827
828 if ((ioc->logging_level & MPT_DEBUG_TRANSPORT))
829 dev_printk(KERN_INFO, &mpt2sas_phy->phy->dev,
830 "refresh: handle(0x%04x), sas_addr(0x%016llx),\n"
831 "\tlink_rate(0x%02x), phy(%d)\n"
832 "\tattached_handle(0x%04x), sas_addr(0x%016llx)\n",
833 handle, (unsigned long long)
834 mpt2sas_phy->identify.sas_address, link_rate,
835 phy_number, attached_handle,
836 (unsigned long long)
837 mpt2sas_phy->remote_identify.sas_address);
838}
839
840static inline void *
841phy_to_ioc(struct sas_phy *phy)
842{
843 struct Scsi_Host *shost = dev_to_shost(phy->dev.parent);
844 return shost_priv(shost);
845}
846
847static inline void *
848rphy_to_ioc(struct sas_rphy *rphy)
849{
850 struct Scsi_Host *shost = dev_to_shost(rphy->dev.parent->parent);
851 return shost_priv(shost);
852}
853
854/**
855 * transport_get_linkerrors -
856 * @phy: The sas phy object
857 *
858 * Only support sas_host direct attached phys.
859 * Returns 0 for success, non-zero for failure.
860 *
861 */
862static int
863transport_get_linkerrors(struct sas_phy *phy)
864{
865 struct MPT2SAS_ADAPTER *ioc = phy_to_ioc(phy);
866 struct _sas_phy *mpt2sas_phy;
867 Mpi2ConfigReply_t mpi_reply;
868 Mpi2SasPhyPage1_t phy_pg1;
869 int i;
870
871 for (i = 0, mpt2sas_phy = NULL; i < ioc->sas_hba.num_phys &&
872 !mpt2sas_phy; i++) {
873 if (ioc->sas_hba.phy[i].phy != phy)
874 continue;
875 mpt2sas_phy = &ioc->sas_hba.phy[i];
876 }
877
878 if (!mpt2sas_phy) /* this phy not on sas_host */
879 return -EINVAL;
880
881 if ((mpt2sas_config_get_phy_pg1(ioc, &mpi_reply, &phy_pg1,
882 mpt2sas_phy->phy_id))) {
883 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
884 ioc->name, __FILE__, __LINE__, __func__);
885 return -ENXIO;
886 }
887
888 if (mpi_reply.IOCStatus || mpi_reply.IOCLogInfo)
889 printk(MPT2SAS_INFO_FMT "phy(%d), ioc_status"
890 "(0x%04x), loginfo(0x%08x)\n", ioc->name,
891 mpt2sas_phy->phy_id,
892 le16_to_cpu(mpi_reply.IOCStatus),
893 le32_to_cpu(mpi_reply.IOCLogInfo));
894
895 phy->invalid_dword_count = le32_to_cpu(phy_pg1.InvalidDwordCount);
896 phy->running_disparity_error_count =
897 le32_to_cpu(phy_pg1.RunningDisparityErrorCount);
898 phy->loss_of_dword_sync_count =
899 le32_to_cpu(phy_pg1.LossDwordSynchCount);
900 phy->phy_reset_problem_count =
901 le32_to_cpu(phy_pg1.PhyResetProblemCount);
902 return 0;
903}
904
905/**
906 * transport_get_enclosure_identifier -
907 * @phy: The sas phy object
908 *
909 * Obtain the enclosure logical id for an expander.
910 * Returns 0 for success, non-zero for failure.
911 */
912static int
913transport_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
914{
915 struct MPT2SAS_ADAPTER *ioc = rphy_to_ioc(rphy);
916 struct _sas_node *sas_expander;
917 unsigned long flags;
918
919 spin_lock_irqsave(&ioc->sas_node_lock, flags);
920 sas_expander = mpt2sas_scsih_expander_find_by_sas_address(ioc,
921 rphy->identify.sas_address);
922 spin_unlock_irqrestore(&ioc->sas_node_lock, flags);
923
924 if (!sas_expander)
925 return -ENXIO;
926
927 *identifier = sas_expander->enclosure_logical_id;
928 return 0;
929}
930
931/**
932 * transport_get_bay_identifier -
933 * @phy: The sas phy object
934 *
935 * Returns the slot id for a device that resides inside an enclosure.
936 */
937static int
938transport_get_bay_identifier(struct sas_rphy *rphy)
939{
940 struct MPT2SAS_ADAPTER *ioc = rphy_to_ioc(rphy);
941 struct _sas_device *sas_device;
942 unsigned long flags;
943
944 spin_lock_irqsave(&ioc->sas_device_lock, flags);
945 sas_device = mpt2sas_scsih_sas_device_find_by_sas_address(ioc,
946 rphy->identify.sas_address);
947 spin_unlock_irqrestore(&ioc->sas_device_lock, flags);
948
949 if (!sas_device)
950 return -ENXIO;
951
952 return sas_device->slot;
953}
954
955/**
956 * transport_phy_reset -
957 * @phy: The sas phy object
958 * @hard_reset:
959 *
960 * Only support sas_host direct attached phys.
961 * Returns 0 for success, non-zero for failure.
962 */
963static int
964transport_phy_reset(struct sas_phy *phy, int hard_reset)
965{
966 struct MPT2SAS_ADAPTER *ioc = phy_to_ioc(phy);
967 struct _sas_phy *mpt2sas_phy;
968 Mpi2SasIoUnitControlReply_t mpi_reply;
969 Mpi2SasIoUnitControlRequest_t mpi_request;
970 int i;
971
972 for (i = 0, mpt2sas_phy = NULL; i < ioc->sas_hba.num_phys &&
973 !mpt2sas_phy; i++) {
974 if (ioc->sas_hba.phy[i].phy != phy)
975 continue;
976 mpt2sas_phy = &ioc->sas_hba.phy[i];
977 }
978
979 if (!mpt2sas_phy) /* this phy not on sas_host */
980 return -EINVAL;
981
982 memset(&mpi_request, 0, sizeof(Mpi2SasIoUnitControlReply_t));
983 mpi_request.Function = MPI2_FUNCTION_SAS_IO_UNIT_CONTROL;
984 mpi_request.Operation = hard_reset ?
985 MPI2_SAS_OP_PHY_HARD_RESET : MPI2_SAS_OP_PHY_LINK_RESET;
986 mpi_request.PhyNum = mpt2sas_phy->phy_id;
987
988 if ((mpt2sas_base_sas_iounit_control(ioc, &mpi_reply, &mpi_request))) {
989 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
990 ioc->name, __FILE__, __LINE__, __func__);
991 return -ENXIO;
992 }
993
994 if (mpi_reply.IOCStatus || mpi_reply.IOCLogInfo)
995 printk(MPT2SAS_INFO_FMT "phy(%d), ioc_status"
996 "(0x%04x), loginfo(0x%08x)\n", ioc->name,
997 mpt2sas_phy->phy_id,
998 le16_to_cpu(mpi_reply.IOCStatus),
999 le32_to_cpu(mpi_reply.IOCLogInfo));
1000
1001 return 0;
1002}
1003
1004/**
1005 * transport_smp_handler - transport portal for smp passthru
1006 * @shost: shost object
1007 * @rphy: sas transport rphy object
1008 * @req:
1009 *
1010 * This used primarily for smp_utils.
1011 * Example:
1012 * smp_rep_general /sys/class/bsg/expander-5:0
1013 */
1014static int
1015transport_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy,
1016 struct request *req)
1017{
1018 struct MPT2SAS_ADAPTER *ioc = shost_priv(shost);
1019 Mpi2SmpPassthroughRequest_t *mpi_request;
1020 Mpi2SmpPassthroughReply_t *mpi_reply;
1021 int rc;
1022 u16 smid;
1023 u32 ioc_state;
1024 unsigned long timeleft;
1025 void *psge;
1026 u32 sgl_flags;
1027 u8 issue_reset = 0;
1028 unsigned long flags;
1029 dma_addr_t dma_addr_in = 0;
1030 dma_addr_t dma_addr_out = 0;
1031 u16 wait_state_count;
1032 struct request *rsp = req->next_rq;
1033
1034 if (!rsp) {
1035 printk(MPT2SAS_ERR_FMT "%s: the smp response space is "
1036 "missing\n", ioc->name, __func__);
1037 return -EINVAL;
1038 }
1039
1040 /* do we need to support multiple segments? */
1041 if (req->bio->bi_vcnt > 1 || rsp->bio->bi_vcnt > 1) {
1042 printk(MPT2SAS_ERR_FMT "%s: multiple segments req %u %u, "
1043 "rsp %u %u\n", ioc->name, __func__, req->bio->bi_vcnt,
1044 req->data_len, rsp->bio->bi_vcnt, rsp->data_len);
1045 return -EINVAL;
1046 }
1047
1048 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
1049 if (ioc->ioc_reset_in_progress) {
1050 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
1051 printk(MPT2SAS_INFO_FMT "%s: host reset in progress!\n",
1052 __func__, ioc->name);
1053 return -EFAULT;
1054 }
1055 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
1056
1057 rc = mutex_lock_interruptible(&ioc->transport_cmds.mutex);
1058 if (rc)
1059 return rc;
1060
1061 if (ioc->transport_cmds.status != MPT2_CMD_NOT_USED) {
1062 printk(MPT2SAS_ERR_FMT "%s: transport_cmds in use\n", ioc->name,
1063 __func__);
1064 rc = -EAGAIN;
1065 goto out;
1066 }
1067 ioc->transport_cmds.status = MPT2_CMD_PENDING;
1068
1069 wait_state_count = 0;
1070 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
1071 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
1072 if (wait_state_count++ == 10) {
1073 printk(MPT2SAS_ERR_FMT
1074 "%s: failed due to ioc not operational\n",
1075 ioc->name, __func__);
1076 rc = -EFAULT;
1077 goto out;
1078 }
1079 ssleep(1);
1080 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
1081 printk(MPT2SAS_INFO_FMT "%s: waiting for "
1082 "operational state(count=%d)\n", ioc->name,
1083 __func__, wait_state_count);
1084 }
1085 if (wait_state_count)
1086 printk(MPT2SAS_INFO_FMT "%s: ioc is operational\n",
1087 ioc->name, __func__);
1088
1089 smid = mpt2sas_base_get_smid(ioc, ioc->transport_cb_idx);
1090 if (!smid) {
1091 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
1092 ioc->name, __func__);
1093 rc = -EAGAIN;
1094 goto out;
1095 }
1096
1097 rc = 0;
1098 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
1099 ioc->transport_cmds.smid = smid;
1100
1101 memset(mpi_request, 0, sizeof(Mpi2SmpPassthroughRequest_t));
1102 mpi_request->Function = MPI2_FUNCTION_SMP_PASSTHROUGH;
1103 mpi_request->PhysicalPort = 0xFF;
1104 *((u64 *)&mpi_request->SASAddress) = (rphy) ?
1105 cpu_to_le64(rphy->identify.sas_address) :
1106 cpu_to_le64(ioc->sas_hba.sas_address);
1107 mpi_request->RequestDataLength = cpu_to_le16(req->data_len - 4);
1108 psge = &mpi_request->SGL;
1109
1110 /* WRITE sgel first */
1111 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1112 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC);
1113 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1114 dma_addr_out = pci_map_single(ioc->pdev, bio_data(req->bio),
1115 req->data_len, PCI_DMA_BIDIRECTIONAL);
1116 if (!dma_addr_out) {
1117 mpt2sas_base_free_smid(ioc, le16_to_cpu(smid));
1118 goto unmap;
1119 }
1120
1121 ioc->base_add_sg_single(psge, sgl_flags | (req->data_len - 4),
1122 dma_addr_out);
1123
1124 /* incr sgel */
1125 psge += ioc->sge_size;
1126
1127 /* READ sgel last */
1128 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1129 MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1130 MPI2_SGE_FLAGS_END_OF_LIST);
1131 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1132 dma_addr_in = pci_map_single(ioc->pdev, bio_data(rsp->bio),
1133 rsp->data_len, PCI_DMA_BIDIRECTIONAL);
1134 if (!dma_addr_in) {
1135 mpt2sas_base_free_smid(ioc, le16_to_cpu(smid));
1136 goto unmap;
1137 }
1138
1139 ioc->base_add_sg_single(psge, sgl_flags | (rsp->data_len + 4),
1140 dma_addr_in);
1141
1142 dtransportprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s - "
1143 "sending smp request\n", ioc->name, __func__));
1144
1145 mpt2sas_base_put_smid_default(ioc, smid, 0 /* VF_ID */);
1146 timeleft = wait_for_completion_timeout(&ioc->transport_cmds.done,
1147 10*HZ);
1148
1149 if (!(ioc->transport_cmds.status & MPT2_CMD_COMPLETE)) {
1150 printk(MPT2SAS_ERR_FMT "%s : timeout\n",
1151 __func__, ioc->name);
1152 _debug_dump_mf(mpi_request,
1153 sizeof(Mpi2SmpPassthroughRequest_t)/4);
1154 if (!(ioc->transport_cmds.status & MPT2_CMD_RESET))
1155 issue_reset = 1;
1156 goto issue_host_reset;
1157 }
1158
1159 dtransportprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s - "
1160 "complete\n", ioc->name, __func__));
1161
1162 if (ioc->transport_cmds.status & MPT2_CMD_REPLY_VALID) {
1163
1164 mpi_reply = ioc->transport_cmds.reply;
1165
1166 dtransportprintk(ioc, printk(MPT2SAS_DEBUG_FMT
1167 "%s - reply data transfer size(%d)\n",
1168 ioc->name, __func__,
1169 le16_to_cpu(mpi_reply->ResponseDataLength)));
1170
1171 memcpy(req->sense, mpi_reply, sizeof(*mpi_reply));
1172 req->sense_len = sizeof(*mpi_reply);
1173 req->data_len = 0;
1174 rsp->data_len -= mpi_reply->ResponseDataLength;
1175
1176 } else {
1177 dtransportprintk(ioc, printk(MPT2SAS_DEBUG_FMT
1178 "%s - no reply\n", ioc->name, __func__));
1179 rc = -ENXIO;
1180 }
1181
1182 issue_host_reset:
1183 if (issue_reset) {
1184 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
1185 FORCE_BIG_HAMMER);
1186 rc = -ETIMEDOUT;
1187 }
1188
1189 unmap:
1190 if (dma_addr_out)
1191 pci_unmap_single(ioc->pdev, dma_addr_out, req->data_len,
1192 PCI_DMA_BIDIRECTIONAL);
1193 if (dma_addr_in)
1194 pci_unmap_single(ioc->pdev, dma_addr_in, rsp->data_len,
1195 PCI_DMA_BIDIRECTIONAL);
1196
1197 out:
1198 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
1199 mutex_unlock(&ioc->transport_cmds.mutex);
1200 return rc;
1201}
1202
1203struct sas_function_template mpt2sas_transport_functions = {
1204 .get_linkerrors = transport_get_linkerrors,
1205 .get_enclosure_identifier = transport_get_enclosure_identifier,
1206 .get_bay_identifier = transport_get_bay_identifier,
1207 .phy_reset = transport_phy_reset,
1208 .smp_handler = transport_smp_handler,
1209};
1210
1211struct scsi_transport_template *mpt2sas_transport_template;
diff --git a/drivers/scsi/osd/Kbuild b/drivers/scsi/osd/Kbuild
new file mode 100644
index 000000000000..0e207aa67d16
--- /dev/null
+++ b/drivers/scsi/osd/Kbuild
@@ -0,0 +1,45 @@
1#
2# Kbuild for the OSD modules
3#
4# Copyright (C) 2008 Panasas Inc. All rights reserved.
5#
6# Authors:
7# Boaz Harrosh <bharrosh@panasas.com>
8# Benny Halevy <bhalevy@panasas.com>
9#
10# This program is free software; you can redistribute it and/or modify
11# it under the terms of the GNU General Public License version 2
12#
13
14ifneq ($(OSD_INC),)
15# we are built out-of-tree Kconfigure everything as on
16
17CONFIG_SCSI_OSD_INITIATOR=m
18ccflags-y += -DCONFIG_SCSI_OSD_INITIATOR -DCONFIG_SCSI_OSD_INITIATOR_MODULE
19
20CONFIG_SCSI_OSD_ULD=m
21ccflags-y += -DCONFIG_SCSI_OSD_ULD -DCONFIG_SCSI_OSD_ULD_MODULE
22
23# CONFIG_SCSI_OSD_DPRINT_SENSE =
24# 0 - no print of errors
25# 1 - print errors
26# 2 - errors + warrnings
27ccflags-y += -DCONFIG_SCSI_OSD_DPRINT_SENSE=1
28
29# Uncomment to turn debug on
30# ccflags-y += -DCONFIG_SCSI_OSD_DEBUG
31
32# if we are built out-of-tree and the hosting kernel has OSD headers
33# then "ccflags-y +=" will not pick the out-off-tree headers. Only by doing
34# this it will work. This might break in future kernels
35LINUXINCLUDE := -I$(OSD_INC) $(LINUXINCLUDE)
36
37endif
38
39# libosd.ko - osd-initiator library
40libosd-y := osd_initiator.o
41obj-$(CONFIG_SCSI_OSD_INITIATOR) += libosd.o
42
43# osd.ko - SCSI ULD and char-device
44osd-y := osd_uld.o
45obj-$(CONFIG_SCSI_OSD_ULD) += osd.o
diff --git a/drivers/scsi/osd/Kconfig b/drivers/scsi/osd/Kconfig
new file mode 100644
index 000000000000..861b5cebaeae
--- /dev/null
+++ b/drivers/scsi/osd/Kconfig
@@ -0,0 +1,53 @@
1#
2# Kernel configuration file for the OSD scsi protocol
3#
4# Copyright (C) 2008 Panasas Inc. All rights reserved.
5#
6# Authors:
7# Boaz Harrosh <bharrosh@panasas.com>
8# Benny Halevy <bhalevy@panasas.com>
9#
10# This program is free software; you can redistribute it and/or modify
11# it under the terms of the GNU General Public version 2 License as
12# published by the Free Software Foundation
13#
14# FIXME: SCSI_OSD_INITIATOR should select CONFIG (HMAC) SHA1 somehow.
15# How is it done properly?
16#
17
18config SCSI_OSD_INITIATOR
19 tristate "OSD-Initiator library"
20 depends on SCSI
21 help
22 Enable the OSD-Initiator library (libosd.ko).
23 NOTE: You must also select CRYPTO_SHA1 + CRYPTO_HMAC and their
24 dependencies
25
26config SCSI_OSD_ULD
27 tristate "OSD Upper Level driver"
28 depends on SCSI_OSD_INITIATOR
29 help
30 Build a SCSI upper layer driver that exports /dev/osdX devices
31 to user-mode for testing and controlling OSD devices. It is also
32 needed by exofs, for mounting an OSD based file system.
33
34config SCSI_OSD_DPRINT_SENSE
35 int "(0-2) When sense is returned, DEBUG print all sense descriptors"
36 default 1
37 depends on SCSI_OSD_INITIATOR
38 help
39 When a CHECK_CONDITION status is returned from a target, and a
40 sense-buffer is retrieved, turning this on will dump a full
41 sense-decoding message. Setting to 2 will also print recoverable
42 errors that might be regularly returned for some filesystem
43 operations.
44
45config SCSI_OSD_DEBUG
46 bool "Compile All OSD modules with lots of DEBUG prints"
47 default n
48 depends on SCSI_OSD_INITIATOR
49 help
50 OSD Code is populated with lots of OSD_DEBUG(..) printouts to
51 dmesg. Enable this if you found a bug and you want to help us
52 track the problem (see also MAINTAINERS). Setting this will also
53 force SCSI_OSD_DPRINT_SENSE=2.
diff --git a/drivers/scsi/osd/Makefile b/drivers/scsi/osd/Makefile
new file mode 100755
index 000000000000..d905344f83ba
--- /dev/null
+++ b/drivers/scsi/osd/Makefile
@@ -0,0 +1,37 @@
1#
2# Makefile for the OSD modules (out of tree)
3#
4# Copyright (C) 2008 Panasas Inc. All rights reserved.
5#
6# Authors:
7# Boaz Harrosh <bharrosh@panasas.com>
8# Benny Halevy <bhalevy@panasas.com>
9#
10# This program is free software; you can redistribute it and/or modify
11# it under the terms of the GNU General Public License version 2
12#
13# This Makefile is used to call the kernel Makefile in case of an out-of-tree
14# build.
15# $KSRC should point to a Kernel source tree otherwise host's default is
16# used. (eg. /lib/modules/`uname -r`/build)
17
18# include path for out-of-tree Headers
19OSD_INC ?= `pwd`/../../../include
20
21# allow users to override these
22# e.g. to compile for a kernel that you aren't currently running
23KSRC ?= /lib/modules/$(shell uname -r)/build
24KBUILD_OUTPUT ?=
25ARCH ?=
26V ?= 0
27
28# this is the basic Kbuild out-of-tree invocation, with the M= option
29KBUILD_BASE = +$(MAKE) -C $(KSRC) M=`pwd` KBUILD_OUTPUT=$(KBUILD_OUTPUT) ARCH=$(ARCH) V=$(V)
30
31all: libosd
32
33libosd: ;
34 $(KBUILD_BASE) OSD_INC=$(OSD_INC) modules
35
36clean:
37 $(KBUILD_BASE) clean
diff --git a/drivers/scsi/osd/osd_debug.h b/drivers/scsi/osd/osd_debug.h
new file mode 100644
index 000000000000..579e491f11df
--- /dev/null
+++ b/drivers/scsi/osd/osd_debug.h
@@ -0,0 +1,30 @@
1/*
2 * osd_debug.h - Some kprintf macros
3 *
4 * Copyright (C) 2008 Panasas Inc. All rights reserved.
5 *
6 * Authors:
7 * Boaz Harrosh <bharrosh@panasas.com>
8 * Benny Halevy <bhalevy@panasas.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2
12 *
13 */
14#ifndef __OSD_DEBUG_H__
15#define __OSD_DEBUG_H__
16
17#define OSD_ERR(fmt, a...) printk(KERN_ERR "osd: " fmt, ##a)
18#define OSD_INFO(fmt, a...) printk(KERN_NOTICE "osd: " fmt, ##a)
19
20#ifdef CONFIG_SCSI_OSD_DEBUG
21#define OSD_DEBUG(fmt, a...) \
22 printk(KERN_NOTICE "osd @%s:%d: " fmt, __func__, __LINE__, ##a)
23#else
24#define OSD_DEBUG(fmt, a...) do {} while (0)
25#endif
26
27/* u64 has problems with printk this will cast it to unsigned long long */
28#define _LLU(x) (unsigned long long)(x)
29
30#endif /* ndef __OSD_DEBUG_H__ */
diff --git a/drivers/scsi/osd/osd_initiator.c b/drivers/scsi/osd/osd_initiator.c
new file mode 100644
index 000000000000..552f58b655d1
--- /dev/null
+++ b/drivers/scsi/osd/osd_initiator.c
@@ -0,0 +1,1657 @@
1/*
2 * osd_initiator - Main body of the osd initiator library.
3 *
4 * Note: The file does not contain the advanced security functionality which
5 * is only needed by the security_manager's initiators.
6 *
7 * Copyright (C) 2008 Panasas Inc. All rights reserved.
8 *
9 * Authors:
10 * Boaz Harrosh <bharrosh@panasas.com>
11 * Benny Halevy <bhalevy@panasas.com>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 *
20 * 1. Redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer.
22 * 2. Redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution.
25 * 3. Neither the name of the Panasas company nor the names of its
26 * contributors may be used to endorse or promote products derived
27 * from this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
31 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 * DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
36 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
37 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
38 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
39 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42#include <scsi/osd_initiator.h>
43#include <scsi/osd_sec.h>
44#include <scsi/osd_attributes.h>
45#include <scsi/osd_sense.h>
46
47#include <scsi/scsi_device.h>
48
49#include "osd_debug.h"
50
51#ifndef __unused
52# define __unused __attribute__((unused))
53#endif
54
55enum { OSD_REQ_RETRIES = 1 };
56
57MODULE_AUTHOR("Boaz Harrosh <bharrosh@panasas.com>");
58MODULE_DESCRIPTION("open-osd initiator library libosd.ko");
59MODULE_LICENSE("GPL");
60
61static inline void build_test(void)
62{
63 /* structures were not packed */
64 BUILD_BUG_ON(sizeof(struct osd_capability) != OSD_CAP_LEN);
65 BUILD_BUG_ON(sizeof(struct osdv2_cdb) != OSD_TOTAL_CDB_LEN);
66 BUILD_BUG_ON(sizeof(struct osdv1_cdb) != OSDv1_TOTAL_CDB_LEN);
67}
68
69static const char *_osd_ver_desc(struct osd_request *or)
70{
71 return osd_req_is_ver1(or) ? "OSD1" : "OSD2";
72}
73
74#define ATTR_DEF_RI(id, len) ATTR_DEF(OSD_APAGE_ROOT_INFORMATION, id, len)
75
76static int _osd_print_system_info(struct osd_dev *od, void *caps)
77{
78 struct osd_request *or;
79 struct osd_attr get_attrs[] = {
80 ATTR_DEF_RI(OSD_ATTR_RI_VENDOR_IDENTIFICATION, 8),
81 ATTR_DEF_RI(OSD_ATTR_RI_PRODUCT_IDENTIFICATION, 16),
82 ATTR_DEF_RI(OSD_ATTR_RI_PRODUCT_MODEL, 32),
83 ATTR_DEF_RI(OSD_ATTR_RI_PRODUCT_REVISION_LEVEL, 4),
84 ATTR_DEF_RI(OSD_ATTR_RI_PRODUCT_SERIAL_NUMBER, 64 /*variable*/),
85 ATTR_DEF_RI(OSD_ATTR_RI_OSD_NAME, 64 /*variable*/),
86 ATTR_DEF_RI(OSD_ATTR_RI_TOTAL_CAPACITY, 8),
87 ATTR_DEF_RI(OSD_ATTR_RI_USED_CAPACITY, 8),
88 ATTR_DEF_RI(OSD_ATTR_RI_NUMBER_OF_PARTITIONS, 8),
89 ATTR_DEF_RI(OSD_ATTR_RI_CLOCK, 6),
90 /* IBM-OSD-SIM Has a bug with this one put it last */
91 ATTR_DEF_RI(OSD_ATTR_RI_OSD_SYSTEM_ID, 20),
92 };
93 void *iter = NULL, *pFirst;
94 int nelem = ARRAY_SIZE(get_attrs), a = 0;
95 int ret;
96
97 or = osd_start_request(od, GFP_KERNEL);
98 if (!or)
99 return -ENOMEM;
100
101 /* get attrs */
102 osd_req_get_attributes(or, &osd_root_object);
103 osd_req_add_get_attr_list(or, get_attrs, ARRAY_SIZE(get_attrs));
104
105 ret = osd_finalize_request(or, 0, caps, NULL);
106 if (ret)
107 goto out;
108
109 ret = osd_execute_request(or);
110 if (ret) {
111 OSD_ERR("Failed to detect %s => %d\n", _osd_ver_desc(or), ret);
112 goto out;
113 }
114
115 osd_req_decode_get_attr_list(or, get_attrs, &nelem, &iter);
116
117 OSD_INFO("Detected %s device\n",
118 _osd_ver_desc(or));
119
120 pFirst = get_attrs[a++].val_ptr;
121 OSD_INFO("OSD_ATTR_RI_VENDOR_IDENTIFICATION [%s]\n",
122 (char *)pFirst);
123
124 pFirst = get_attrs[a++].val_ptr;
125 OSD_INFO("OSD_ATTR_RI_PRODUCT_IDENTIFICATION [%s]\n",
126 (char *)pFirst);
127
128 pFirst = get_attrs[a++].val_ptr;
129 OSD_INFO("OSD_ATTR_RI_PRODUCT_MODEL [%s]\n",
130 (char *)pFirst);
131
132 pFirst = get_attrs[a++].val_ptr;
133 OSD_INFO("OSD_ATTR_RI_PRODUCT_REVISION_LEVEL [%u]\n",
134 pFirst ? get_unaligned_be32(pFirst) : ~0U);
135
136 pFirst = get_attrs[a++].val_ptr;
137 OSD_INFO("OSD_ATTR_RI_PRODUCT_SERIAL_NUMBER [%s]\n",
138 (char *)pFirst);
139
140 pFirst = get_attrs[a].val_ptr;
141 OSD_INFO("OSD_ATTR_RI_OSD_NAME [%s]\n", (char *)pFirst);
142 a++;
143
144 pFirst = get_attrs[a++].val_ptr;
145 OSD_INFO("OSD_ATTR_RI_TOTAL_CAPACITY [0x%llx]\n",
146 pFirst ? _LLU(get_unaligned_be64(pFirst)) : ~0ULL);
147
148 pFirst = get_attrs[a++].val_ptr;
149 OSD_INFO("OSD_ATTR_RI_USED_CAPACITY [0x%llx]\n",
150 pFirst ? _LLU(get_unaligned_be64(pFirst)) : ~0ULL);
151
152 pFirst = get_attrs[a++].val_ptr;
153 OSD_INFO("OSD_ATTR_RI_NUMBER_OF_PARTITIONS [%llu]\n",
154 pFirst ? _LLU(get_unaligned_be64(pFirst)) : ~0ULL);
155
156 if (a >= nelem)
157 goto out;
158
159 /* FIXME: Where are the time utilities */
160 pFirst = get_attrs[a++].val_ptr;
161 OSD_INFO("OSD_ATTR_RI_CLOCK [0x%02x%02x%02x%02x%02x%02x]\n",
162 ((char *)pFirst)[0], ((char *)pFirst)[1],
163 ((char *)pFirst)[2], ((char *)pFirst)[3],
164 ((char *)pFirst)[4], ((char *)pFirst)[5]);
165
166 if (a < nelem) { /* IBM-OSD-SIM bug, Might not have it */
167 unsigned len = get_attrs[a].len;
168 char sid_dump[32*4 + 2]; /* 2nibbles+space+ASCII */
169
170 hex_dump_to_buffer(get_attrs[a].val_ptr, len, 32, 1,
171 sid_dump, sizeof(sid_dump), true);
172 OSD_INFO("OSD_ATTR_RI_OSD_SYSTEM_ID(%d) [%s]\n", len, sid_dump);
173 a++;
174 }
175out:
176 osd_end_request(or);
177 return ret;
178}
179
180int osd_auto_detect_ver(struct osd_dev *od, void *caps)
181{
182 int ret;
183
184 /* Auto-detect the osd version */
185 ret = _osd_print_system_info(od, caps);
186 if (ret) {
187 osd_dev_set_ver(od, OSD_VER1);
188 OSD_DEBUG("converting to OSD1\n");
189 ret = _osd_print_system_info(od, caps);
190 }
191
192 return ret;
193}
194EXPORT_SYMBOL(osd_auto_detect_ver);
195
196static unsigned _osd_req_cdb_len(struct osd_request *or)
197{
198 return osd_req_is_ver1(or) ? OSDv1_TOTAL_CDB_LEN : OSD_TOTAL_CDB_LEN;
199}
200
201static unsigned _osd_req_alist_elem_size(struct osd_request *or, unsigned len)
202{
203 return osd_req_is_ver1(or) ?
204 osdv1_attr_list_elem_size(len) :
205 osdv2_attr_list_elem_size(len);
206}
207
208static unsigned _osd_req_alist_size(struct osd_request *or, void *list_head)
209{
210 return osd_req_is_ver1(or) ?
211 osdv1_list_size(list_head) :
212 osdv2_list_size(list_head);
213}
214
215static unsigned _osd_req_sizeof_alist_header(struct osd_request *or)
216{
217 return osd_req_is_ver1(or) ?
218 sizeof(struct osdv1_attributes_list_header) :
219 sizeof(struct osdv2_attributes_list_header);
220}
221
222static void _osd_req_set_alist_type(struct osd_request *or,
223 void *list, int list_type)
224{
225 if (osd_req_is_ver1(or)) {
226 struct osdv1_attributes_list_header *attr_list = list;
227
228 memset(attr_list, 0, sizeof(*attr_list));
229 attr_list->type = list_type;
230 } else {
231 struct osdv2_attributes_list_header *attr_list = list;
232
233 memset(attr_list, 0, sizeof(*attr_list));
234 attr_list->type = list_type;
235 }
236}
237
238static bool _osd_req_is_alist_type(struct osd_request *or,
239 void *list, int list_type)
240{
241 if (!list)
242 return false;
243
244 if (osd_req_is_ver1(or)) {
245 struct osdv1_attributes_list_header *attr_list = list;
246
247 return attr_list->type == list_type;
248 } else {
249 struct osdv2_attributes_list_header *attr_list = list;
250
251 return attr_list->type == list_type;
252 }
253}
254
255/* This is for List-objects not Attributes-Lists */
256static void _osd_req_encode_olist(struct osd_request *or,
257 struct osd_obj_id_list *list)
258{
259 struct osd_cdb_head *cdbh = osd_cdb_head(&or->cdb);
260
261 if (osd_req_is_ver1(or)) {
262 cdbh->v1.list_identifier = list->list_identifier;
263 cdbh->v1.start_address = list->continuation_id;
264 } else {
265 cdbh->v2.list_identifier = list->list_identifier;
266 cdbh->v2.start_address = list->continuation_id;
267 }
268}
269
270static osd_cdb_offset osd_req_encode_offset(struct osd_request *or,
271 u64 offset, unsigned *padding)
272{
273 return __osd_encode_offset(offset, padding,
274 osd_req_is_ver1(or) ?
275 OSDv1_OFFSET_MIN_SHIFT : OSD_OFFSET_MIN_SHIFT,
276 OSD_OFFSET_MAX_SHIFT);
277}
278
279static struct osd_security_parameters *
280_osd_req_sec_params(struct osd_request *or)
281{
282 struct osd_cdb *ocdb = &or->cdb;
283
284 if (osd_req_is_ver1(or))
285 return &ocdb->v1.sec_params;
286 else
287 return &ocdb->v2.sec_params;
288}
289
290void osd_dev_init(struct osd_dev *osdd, struct scsi_device *scsi_device)
291{
292 memset(osdd, 0, sizeof(*osdd));
293 osdd->scsi_device = scsi_device;
294 osdd->def_timeout = BLK_DEFAULT_SG_TIMEOUT;
295#ifdef OSD_VER1_SUPPORT
296 osdd->version = OSD_VER2;
297#endif
298 /* TODO: Allocate pools for osd_request attributes ... */
299}
300EXPORT_SYMBOL(osd_dev_init);
301
302void osd_dev_fini(struct osd_dev *osdd)
303{
304 /* TODO: De-allocate pools */
305
306 osdd->scsi_device = NULL;
307}
308EXPORT_SYMBOL(osd_dev_fini);
309
310static struct osd_request *_osd_request_alloc(gfp_t gfp)
311{
312 struct osd_request *or;
313
314 /* TODO: Use mempool with one saved request */
315 or = kzalloc(sizeof(*or), gfp);
316 return or;
317}
318
319static void _osd_request_free(struct osd_request *or)
320{
321 kfree(or);
322}
323
324struct osd_request *osd_start_request(struct osd_dev *dev, gfp_t gfp)
325{
326 struct osd_request *or;
327
328 or = _osd_request_alloc(gfp);
329 if (!or)
330 return NULL;
331
332 or->osd_dev = dev;
333 or->alloc_flags = gfp;
334 or->timeout = dev->def_timeout;
335 or->retries = OSD_REQ_RETRIES;
336
337 return or;
338}
339EXPORT_SYMBOL(osd_start_request);
340
341/*
342 * If osd_finalize_request() was called but the request was not executed through
343 * the block layer, then we must release BIOs.
344 */
345static void _abort_unexecuted_bios(struct request *rq)
346{
347 struct bio *bio;
348
349 while ((bio = rq->bio) != NULL) {
350 rq->bio = bio->bi_next;
351 bio_endio(bio, 0);
352 }
353}
354
355static void _osd_free_seg(struct osd_request *or __unused,
356 struct _osd_req_data_segment *seg)
357{
358 if (!seg->buff || !seg->alloc_size)
359 return;
360
361 kfree(seg->buff);
362 seg->buff = NULL;
363 seg->alloc_size = 0;
364}
365
366void osd_end_request(struct osd_request *or)
367{
368 struct request *rq = or->request;
369
370 _osd_free_seg(or, &or->set_attr);
371 _osd_free_seg(or, &or->enc_get_attr);
372 _osd_free_seg(or, &or->get_attr);
373
374 if (rq) {
375 if (rq->next_rq) {
376 _abort_unexecuted_bios(rq->next_rq);
377 blk_put_request(rq->next_rq);
378 }
379
380 _abort_unexecuted_bios(rq);
381 blk_put_request(rq);
382 }
383 _osd_request_free(or);
384}
385EXPORT_SYMBOL(osd_end_request);
386
387int osd_execute_request(struct osd_request *or)
388{
389 return blk_execute_rq(or->request->q, NULL, or->request, 0);
390}
391EXPORT_SYMBOL(osd_execute_request);
392
393static void osd_request_async_done(struct request *req, int error)
394{
395 struct osd_request *or = req->end_io_data;
396
397 or->async_error = error;
398
399 if (error)
400 OSD_DEBUG("osd_request_async_done error recieved %d\n", error);
401
402 if (or->async_done)
403 or->async_done(or, or->async_private);
404 else
405 osd_end_request(or);
406}
407
408int osd_execute_request_async(struct osd_request *or,
409 osd_req_done_fn *done, void *private)
410{
411 or->request->end_io_data = or;
412 or->async_private = private;
413 or->async_done = done;
414
415 blk_execute_rq_nowait(or->request->q, NULL, or->request, 0,
416 osd_request_async_done);
417 return 0;
418}
419EXPORT_SYMBOL(osd_execute_request_async);
420
421u8 sg_out_pad_buffer[1 << OSDv1_OFFSET_MIN_SHIFT];
422u8 sg_in_pad_buffer[1 << OSDv1_OFFSET_MIN_SHIFT];
423
424static int _osd_realloc_seg(struct osd_request *or,
425 struct _osd_req_data_segment *seg, unsigned max_bytes)
426{
427 void *buff;
428
429 if (seg->alloc_size >= max_bytes)
430 return 0;
431
432 buff = krealloc(seg->buff, max_bytes, or->alloc_flags);
433 if (!buff) {
434 OSD_ERR("Failed to Realloc %d-bytes was-%d\n", max_bytes,
435 seg->alloc_size);
436 return -ENOMEM;
437 }
438
439 memset(buff + seg->alloc_size, 0, max_bytes - seg->alloc_size);
440 seg->buff = buff;
441 seg->alloc_size = max_bytes;
442 return 0;
443}
444
445static int _alloc_set_attr_list(struct osd_request *or,
446 const struct osd_attr *oa, unsigned nelem, unsigned add_bytes)
447{
448 unsigned total_bytes = add_bytes;
449
450 for (; nelem; --nelem, ++oa)
451 total_bytes += _osd_req_alist_elem_size(or, oa->len);
452
453 OSD_DEBUG("total_bytes=%d\n", total_bytes);
454 return _osd_realloc_seg(or, &or->set_attr, total_bytes);
455}
456
457static int _alloc_get_attr_desc(struct osd_request *or, unsigned max_bytes)
458{
459 OSD_DEBUG("total_bytes=%d\n", max_bytes);
460 return _osd_realloc_seg(or, &or->enc_get_attr, max_bytes);
461}
462
463static int _alloc_get_attr_list(struct osd_request *or)
464{
465 OSD_DEBUG("total_bytes=%d\n", or->get_attr.total_bytes);
466 return _osd_realloc_seg(or, &or->get_attr, or->get_attr.total_bytes);
467}
468
469/*
470 * Common to all OSD commands
471 */
472
473static void _osdv1_req_encode_common(struct osd_request *or,
474 __be16 act, const struct osd_obj_id *obj, u64 offset, u64 len)
475{
476 struct osdv1_cdb *ocdb = &or->cdb.v1;
477
478 /*
479 * For speed, the commands
480 * OSD_ACT_PERFORM_SCSI_COMMAND , V1 0x8F7E, V2 0x8F7C
481 * OSD_ACT_SCSI_TASK_MANAGEMENT , V1 0x8F7F, V2 0x8F7D
482 * are not supported here. Should pass zero and set after the call
483 */
484 act &= cpu_to_be16(~0x0080); /* V1 action code */
485
486 OSD_DEBUG("OSDv1 execute opcode 0x%x\n", be16_to_cpu(act));
487
488 ocdb->h.varlen_cdb.opcode = VARIABLE_LENGTH_CMD;
489 ocdb->h.varlen_cdb.additional_cdb_length = OSD_ADDITIONAL_CDB_LENGTH;
490 ocdb->h.varlen_cdb.service_action = act;
491
492 ocdb->h.partition = cpu_to_be64(obj->partition);
493 ocdb->h.object = cpu_to_be64(obj->id);
494 ocdb->h.v1.length = cpu_to_be64(len);
495 ocdb->h.v1.start_address = cpu_to_be64(offset);
496}
497
498static void _osdv2_req_encode_common(struct osd_request *or,
499 __be16 act, const struct osd_obj_id *obj, u64 offset, u64 len)
500{
501 struct osdv2_cdb *ocdb = &or->cdb.v2;
502
503 OSD_DEBUG("OSDv2 execute opcode 0x%x\n", be16_to_cpu(act));
504
505 ocdb->h.varlen_cdb.opcode = VARIABLE_LENGTH_CMD;
506 ocdb->h.varlen_cdb.additional_cdb_length = OSD_ADDITIONAL_CDB_LENGTH;
507 ocdb->h.varlen_cdb.service_action = act;
508
509 ocdb->h.partition = cpu_to_be64(obj->partition);
510 ocdb->h.object = cpu_to_be64(obj->id);
511 ocdb->h.v2.length = cpu_to_be64(len);
512 ocdb->h.v2.start_address = cpu_to_be64(offset);
513}
514
515static void _osd_req_encode_common(struct osd_request *or,
516 __be16 act, const struct osd_obj_id *obj, u64 offset, u64 len)
517{
518 if (osd_req_is_ver1(or))
519 _osdv1_req_encode_common(or, act, obj, offset, len);
520 else
521 _osdv2_req_encode_common(or, act, obj, offset, len);
522}
523
524/*
525 * Device commands
526 */
527/*TODO: void osd_req_set_master_seed_xchg(struct osd_request *, ...); */
528/*TODO: void osd_req_set_master_key(struct osd_request *, ...); */
529
530void osd_req_format(struct osd_request *or, u64 tot_capacity)
531{
532 _osd_req_encode_common(or, OSD_ACT_FORMAT_OSD, &osd_root_object, 0,
533 tot_capacity);
534}
535EXPORT_SYMBOL(osd_req_format);
536
537int osd_req_list_dev_partitions(struct osd_request *or,
538 osd_id initial_id, struct osd_obj_id_list *list, unsigned nelem)
539{
540 return osd_req_list_partition_objects(or, 0, initial_id, list, nelem);
541}
542EXPORT_SYMBOL(osd_req_list_dev_partitions);
543
544static void _osd_req_encode_flush(struct osd_request *or,
545 enum osd_options_flush_scope_values op)
546{
547 struct osd_cdb_head *ocdb = osd_cdb_head(&or->cdb);
548
549 ocdb->command_specific_options = op;
550}
551
552void osd_req_flush_obsd(struct osd_request *or,
553 enum osd_options_flush_scope_values op)
554{
555 _osd_req_encode_common(or, OSD_ACT_FLUSH_OSD, &osd_root_object, 0, 0);
556 _osd_req_encode_flush(or, op);
557}
558EXPORT_SYMBOL(osd_req_flush_obsd);
559
560/*TODO: void osd_req_perform_scsi_command(struct osd_request *,
561 const u8 *cdb, ...); */
562/*TODO: void osd_req_task_management(struct osd_request *, ...); */
563
564/*
565 * Partition commands
566 */
567static void _osd_req_encode_partition(struct osd_request *or,
568 __be16 act, osd_id partition)
569{
570 struct osd_obj_id par = {
571 .partition = partition,
572 .id = 0,
573 };
574
575 _osd_req_encode_common(or, act, &par, 0, 0);
576}
577
578void osd_req_create_partition(struct osd_request *or, osd_id partition)
579{
580 _osd_req_encode_partition(or, OSD_ACT_CREATE_PARTITION, partition);
581}
582EXPORT_SYMBOL(osd_req_create_partition);
583
584void osd_req_remove_partition(struct osd_request *or, osd_id partition)
585{
586 _osd_req_encode_partition(or, OSD_ACT_REMOVE_PARTITION, partition);
587}
588EXPORT_SYMBOL(osd_req_remove_partition);
589
590/*TODO: void osd_req_set_partition_key(struct osd_request *,
591 osd_id partition, u8 new_key_id[OSD_CRYPTO_KEYID_SIZE],
592 u8 seed[OSD_CRYPTO_SEED_SIZE]); */
593
594static int _osd_req_list_objects(struct osd_request *or,
595 __be16 action, const struct osd_obj_id *obj, osd_id initial_id,
596 struct osd_obj_id_list *list, unsigned nelem)
597{
598 struct request_queue *q = or->osd_dev->scsi_device->request_queue;
599 u64 len = nelem * sizeof(osd_id) + sizeof(*list);
600 struct bio *bio;
601
602 _osd_req_encode_common(or, action, obj, (u64)initial_id, len);
603
604 if (list->list_identifier)
605 _osd_req_encode_olist(or, list);
606
607 WARN_ON(or->in.bio);
608 bio = bio_map_kern(q, list, len, or->alloc_flags);
609 if (!bio) {
610 OSD_ERR("!!! Failed to allocate list_objects BIO\n");
611 return -ENOMEM;
612 }
613
614 bio->bi_rw &= ~(1 << BIO_RW);
615 or->in.bio = bio;
616 or->in.total_bytes = bio->bi_size;
617 return 0;
618}
619
620int osd_req_list_partition_collections(struct osd_request *or,
621 osd_id partition, osd_id initial_id, struct osd_obj_id_list *list,
622 unsigned nelem)
623{
624 struct osd_obj_id par = {
625 .partition = partition,
626 .id = 0,
627 };
628
629 return osd_req_list_collection_objects(or, &par, initial_id, list,
630 nelem);
631}
632EXPORT_SYMBOL(osd_req_list_partition_collections);
633
634int osd_req_list_partition_objects(struct osd_request *or,
635 osd_id partition, osd_id initial_id, struct osd_obj_id_list *list,
636 unsigned nelem)
637{
638 struct osd_obj_id par = {
639 .partition = partition,
640 .id = 0,
641 };
642
643 return _osd_req_list_objects(or, OSD_ACT_LIST, &par, initial_id, list,
644 nelem);
645}
646EXPORT_SYMBOL(osd_req_list_partition_objects);
647
648void osd_req_flush_partition(struct osd_request *or,
649 osd_id partition, enum osd_options_flush_scope_values op)
650{
651 _osd_req_encode_partition(or, OSD_ACT_FLUSH_PARTITION, partition);
652 _osd_req_encode_flush(or, op);
653}
654EXPORT_SYMBOL(osd_req_flush_partition);
655
656/*
657 * Collection commands
658 */
659/*TODO: void osd_req_create_collection(struct osd_request *,
660 const struct osd_obj_id *); */
661/*TODO: void osd_req_remove_collection(struct osd_request *,
662 const struct osd_obj_id *); */
663
664int osd_req_list_collection_objects(struct osd_request *or,
665 const struct osd_obj_id *obj, osd_id initial_id,
666 struct osd_obj_id_list *list, unsigned nelem)
667{
668 return _osd_req_list_objects(or, OSD_ACT_LIST_COLLECTION, obj,
669 initial_id, list, nelem);
670}
671EXPORT_SYMBOL(osd_req_list_collection_objects);
672
673/*TODO: void query(struct osd_request *, ...); V2 */
674
675void osd_req_flush_collection(struct osd_request *or,
676 const struct osd_obj_id *obj, enum osd_options_flush_scope_values op)
677{
678 _osd_req_encode_common(or, OSD_ACT_FLUSH_PARTITION, obj, 0, 0);
679 _osd_req_encode_flush(or, op);
680}
681EXPORT_SYMBOL(osd_req_flush_collection);
682
683/*TODO: void get_member_attrs(struct osd_request *, ...); V2 */
684/*TODO: void set_member_attrs(struct osd_request *, ...); V2 */
685
686/*
687 * Object commands
688 */
689void osd_req_create_object(struct osd_request *or, struct osd_obj_id *obj)
690{
691 _osd_req_encode_common(or, OSD_ACT_CREATE, obj, 0, 0);
692}
693EXPORT_SYMBOL(osd_req_create_object);
694
695void osd_req_remove_object(struct osd_request *or, struct osd_obj_id *obj)
696{
697 _osd_req_encode_common(or, OSD_ACT_REMOVE, obj, 0, 0);
698}
699EXPORT_SYMBOL(osd_req_remove_object);
700
701
702/*TODO: void osd_req_create_multi(struct osd_request *or,
703 struct osd_obj_id *first, struct osd_obj_id_list *list, unsigned nelem);
704*/
705
706void osd_req_write(struct osd_request *or,
707 const struct osd_obj_id *obj, struct bio *bio, u64 offset)
708{
709 _osd_req_encode_common(or, OSD_ACT_WRITE, obj, offset, bio->bi_size);
710 WARN_ON(or->out.bio || or->out.total_bytes);
711 bio->bi_rw |= (1 << BIO_RW);
712 or->out.bio = bio;
713 or->out.total_bytes = bio->bi_size;
714}
715EXPORT_SYMBOL(osd_req_write);
716
717/*TODO: void osd_req_append(struct osd_request *,
718 const struct osd_obj_id *, struct bio *data_out); */
719/*TODO: void osd_req_create_write(struct osd_request *,
720 const struct osd_obj_id *, struct bio *data_out, u64 offset); */
721/*TODO: void osd_req_clear(struct osd_request *,
722 const struct osd_obj_id *, u64 offset, u64 len); */
723/*TODO: void osd_req_punch(struct osd_request *,
724 const struct osd_obj_id *, u64 offset, u64 len); V2 */
725
726void osd_req_flush_object(struct osd_request *or,
727 const struct osd_obj_id *obj, enum osd_options_flush_scope_values op,
728 /*V2*/ u64 offset, /*V2*/ u64 len)
729{
730 if (unlikely(osd_req_is_ver1(or) && (offset || len))) {
731 OSD_DEBUG("OSD Ver1 flush on specific range ignored\n");
732 offset = 0;
733 len = 0;
734 }
735
736 _osd_req_encode_common(or, OSD_ACT_FLUSH, obj, offset, len);
737 _osd_req_encode_flush(or, op);
738}
739EXPORT_SYMBOL(osd_req_flush_object);
740
741void osd_req_read(struct osd_request *or,
742 const struct osd_obj_id *obj, struct bio *bio, u64 offset)
743{
744 _osd_req_encode_common(or, OSD_ACT_READ, obj, offset, bio->bi_size);
745 WARN_ON(or->in.bio || or->in.total_bytes);
746 bio->bi_rw &= ~(1 << BIO_RW);
747 or->in.bio = bio;
748 or->in.total_bytes = bio->bi_size;
749}
750EXPORT_SYMBOL(osd_req_read);
751
752void osd_req_get_attributes(struct osd_request *or,
753 const struct osd_obj_id *obj)
754{
755 _osd_req_encode_common(or, OSD_ACT_GET_ATTRIBUTES, obj, 0, 0);
756}
757EXPORT_SYMBOL(osd_req_get_attributes);
758
759void osd_req_set_attributes(struct osd_request *or,
760 const struct osd_obj_id *obj)
761{
762 _osd_req_encode_common(or, OSD_ACT_SET_ATTRIBUTES, obj, 0, 0);
763}
764EXPORT_SYMBOL(osd_req_set_attributes);
765
766/*
767 * Attributes List-mode
768 */
769
770int osd_req_add_set_attr_list(struct osd_request *or,
771 const struct osd_attr *oa, unsigned nelem)
772{
773 unsigned total_bytes = or->set_attr.total_bytes;
774 void *attr_last;
775 int ret;
776
777 if (or->attributes_mode &&
778 or->attributes_mode != OSD_CDB_GET_SET_ATTR_LISTS) {
779 WARN_ON(1);
780 return -EINVAL;
781 }
782 or->attributes_mode = OSD_CDB_GET_SET_ATTR_LISTS;
783
784 if (!total_bytes) { /* first-time: allocate and put list header */
785 total_bytes = _osd_req_sizeof_alist_header(or);
786 ret = _alloc_set_attr_list(or, oa, nelem, total_bytes);
787 if (ret)
788 return ret;
789 _osd_req_set_alist_type(or, or->set_attr.buff,
790 OSD_ATTR_LIST_SET_RETRIEVE);
791 }
792 attr_last = or->set_attr.buff + total_bytes;
793
794 for (; nelem; --nelem) {
795 struct osd_attributes_list_element *attr;
796 unsigned elem_size = _osd_req_alist_elem_size(or, oa->len);
797
798 total_bytes += elem_size;
799 if (unlikely(or->set_attr.alloc_size < total_bytes)) {
800 or->set_attr.total_bytes = total_bytes - elem_size;
801 ret = _alloc_set_attr_list(or, oa, nelem, total_bytes);
802 if (ret)
803 return ret;
804 attr_last =
805 or->set_attr.buff + or->set_attr.total_bytes;
806 }
807
808 attr = attr_last;
809 attr->attr_page = cpu_to_be32(oa->attr_page);
810 attr->attr_id = cpu_to_be32(oa->attr_id);
811 attr->attr_bytes = cpu_to_be16(oa->len);
812 memcpy(attr->attr_val, oa->val_ptr, oa->len);
813
814 attr_last += elem_size;
815 ++oa;
816 }
817
818 or->set_attr.total_bytes = total_bytes;
819 return 0;
820}
821EXPORT_SYMBOL(osd_req_add_set_attr_list);
822
823static int _append_map_kern(struct request *req,
824 void *buff, unsigned len, gfp_t flags)
825{
826 struct bio *bio;
827 int ret;
828
829 bio = bio_map_kern(req->q, buff, len, flags);
830 if (IS_ERR(bio)) {
831 OSD_ERR("Failed bio_map_kern(%p, %d) => %ld\n", buff, len,
832 PTR_ERR(bio));
833 return PTR_ERR(bio);
834 }
835 ret = blk_rq_append_bio(req->q, req, bio);
836 if (ret) {
837 OSD_ERR("Failed blk_rq_append_bio(%p) => %d\n", bio, ret);
838 bio_put(bio);
839 }
840 return ret;
841}
842
843static int _req_append_segment(struct osd_request *or,
844 unsigned padding, struct _osd_req_data_segment *seg,
845 struct _osd_req_data_segment *last_seg, struct _osd_io_info *io)
846{
847 void *pad_buff;
848 int ret;
849
850 if (padding) {
851 /* check if we can just add it to last buffer */
852 if (last_seg &&
853 (padding <= last_seg->alloc_size - last_seg->total_bytes))
854 pad_buff = last_seg->buff + last_seg->total_bytes;
855 else
856 pad_buff = io->pad_buff;
857
858 ret = _append_map_kern(io->req, pad_buff, padding,
859 or->alloc_flags);
860 if (ret)
861 return ret;
862 io->total_bytes += padding;
863 }
864
865 ret = _append_map_kern(io->req, seg->buff, seg->total_bytes,
866 or->alloc_flags);
867 if (ret)
868 return ret;
869
870 io->total_bytes += seg->total_bytes;
871 OSD_DEBUG("padding=%d buff=%p total_bytes=%d\n", padding, seg->buff,
872 seg->total_bytes);
873 return 0;
874}
875
876static int _osd_req_finalize_set_attr_list(struct osd_request *or)
877{
878 struct osd_cdb_head *cdbh = osd_cdb_head(&or->cdb);
879 unsigned padding;
880 int ret;
881
882 if (!or->set_attr.total_bytes) {
883 cdbh->attrs_list.set_attr_offset = OSD_OFFSET_UNUSED;
884 return 0;
885 }
886
887 cdbh->attrs_list.set_attr_bytes = cpu_to_be32(or->set_attr.total_bytes);
888 cdbh->attrs_list.set_attr_offset =
889 osd_req_encode_offset(or, or->out.total_bytes, &padding);
890
891 ret = _req_append_segment(or, padding, &or->set_attr,
892 or->out.last_seg, &or->out);
893 if (ret)
894 return ret;
895
896 or->out.last_seg = &or->set_attr;
897 return 0;
898}
899
900int osd_req_add_get_attr_list(struct osd_request *or,
901 const struct osd_attr *oa, unsigned nelem)
902{
903 unsigned total_bytes = or->enc_get_attr.total_bytes;
904 void *attr_last;
905 int ret;
906
907 if (or->attributes_mode &&
908 or->attributes_mode != OSD_CDB_GET_SET_ATTR_LISTS) {
909 WARN_ON(1);
910 return -EINVAL;
911 }
912 or->attributes_mode = OSD_CDB_GET_SET_ATTR_LISTS;
913
914 /* first time calc data-in list header size */
915 if (!or->get_attr.total_bytes)
916 or->get_attr.total_bytes = _osd_req_sizeof_alist_header(or);
917
918 /* calc data-out info */
919 if (!total_bytes) { /* first-time: allocate and put list header */
920 unsigned max_bytes;
921
922 total_bytes = _osd_req_sizeof_alist_header(or);
923 max_bytes = total_bytes +
924 nelem * sizeof(struct osd_attributes_list_attrid);
925 ret = _alloc_get_attr_desc(or, max_bytes);
926 if (ret)
927 return ret;
928
929 _osd_req_set_alist_type(or, or->enc_get_attr.buff,
930 OSD_ATTR_LIST_GET);
931 }
932 attr_last = or->enc_get_attr.buff + total_bytes;
933
934 for (; nelem; --nelem) {
935 struct osd_attributes_list_attrid *attrid;
936 const unsigned cur_size = sizeof(*attrid);
937
938 total_bytes += cur_size;
939 if (unlikely(or->enc_get_attr.alloc_size < total_bytes)) {
940 or->enc_get_attr.total_bytes = total_bytes - cur_size;
941 ret = _alloc_get_attr_desc(or,
942 total_bytes + nelem * sizeof(*attrid));
943 if (ret)
944 return ret;
945 attr_last = or->enc_get_attr.buff +
946 or->enc_get_attr.total_bytes;
947 }
948
949 attrid = attr_last;
950 attrid->attr_page = cpu_to_be32(oa->attr_page);
951 attrid->attr_id = cpu_to_be32(oa->attr_id);
952
953 attr_last += cur_size;
954
955 /* calc data-in size */
956 or->get_attr.total_bytes +=
957 _osd_req_alist_elem_size(or, oa->len);
958 ++oa;
959 }
960
961 or->enc_get_attr.total_bytes = total_bytes;
962
963 OSD_DEBUG(
964 "get_attr.total_bytes=%u(%u) enc_get_attr.total_bytes=%u(%Zu)\n",
965 or->get_attr.total_bytes,
966 or->get_attr.total_bytes - _osd_req_sizeof_alist_header(or),
967 or->enc_get_attr.total_bytes,
968 (or->enc_get_attr.total_bytes - _osd_req_sizeof_alist_header(or))
969 / sizeof(struct osd_attributes_list_attrid));
970
971 return 0;
972}
973EXPORT_SYMBOL(osd_req_add_get_attr_list);
974
975static int _osd_req_finalize_get_attr_list(struct osd_request *or)
976{
977 struct osd_cdb_head *cdbh = osd_cdb_head(&or->cdb);
978 unsigned out_padding;
979 unsigned in_padding;
980 int ret;
981
982 if (!or->enc_get_attr.total_bytes) {
983 cdbh->attrs_list.get_attr_desc_offset = OSD_OFFSET_UNUSED;
984 cdbh->attrs_list.get_attr_offset = OSD_OFFSET_UNUSED;
985 return 0;
986 }
987
988 ret = _alloc_get_attr_list(or);
989 if (ret)
990 return ret;
991
992 /* The out-going buffer info update */
993 OSD_DEBUG("out-going\n");
994 cdbh->attrs_list.get_attr_desc_bytes =
995 cpu_to_be32(or->enc_get_attr.total_bytes);
996
997 cdbh->attrs_list.get_attr_desc_offset =
998 osd_req_encode_offset(or, or->out.total_bytes, &out_padding);
999
1000 ret = _req_append_segment(or, out_padding, &or->enc_get_attr,
1001 or->out.last_seg, &or->out);
1002 if (ret)
1003 return ret;
1004 or->out.last_seg = &or->enc_get_attr;
1005
1006 /* The incoming buffer info update */
1007 OSD_DEBUG("in-coming\n");
1008 cdbh->attrs_list.get_attr_alloc_length =
1009 cpu_to_be32(or->get_attr.total_bytes);
1010
1011 cdbh->attrs_list.get_attr_offset =
1012 osd_req_encode_offset(or, or->in.total_bytes, &in_padding);
1013
1014 ret = _req_append_segment(or, in_padding, &or->get_attr, NULL,
1015 &or->in);
1016 if (ret)
1017 return ret;
1018 or->in.last_seg = &or->get_attr;
1019
1020 return 0;
1021}
1022
1023int osd_req_decode_get_attr_list(struct osd_request *or,
1024 struct osd_attr *oa, int *nelem, void **iterator)
1025{
1026 unsigned cur_bytes, returned_bytes;
1027 int n;
1028 const unsigned sizeof_attr_list = _osd_req_sizeof_alist_header(or);
1029 void *cur_p;
1030
1031 if (!_osd_req_is_alist_type(or, or->get_attr.buff,
1032 OSD_ATTR_LIST_SET_RETRIEVE)) {
1033 oa->attr_page = 0;
1034 oa->attr_id = 0;
1035 oa->val_ptr = NULL;
1036 oa->len = 0;
1037 *iterator = NULL;
1038 return 0;
1039 }
1040
1041 if (*iterator) {
1042 BUG_ON((*iterator < or->get_attr.buff) ||
1043 (or->get_attr.buff + or->get_attr.alloc_size < *iterator));
1044 cur_p = *iterator;
1045 cur_bytes = (*iterator - or->get_attr.buff) - sizeof_attr_list;
1046 returned_bytes = or->get_attr.total_bytes;
1047 } else { /* first time decode the list header */
1048 cur_bytes = sizeof_attr_list;
1049 returned_bytes = _osd_req_alist_size(or, or->get_attr.buff) +
1050 sizeof_attr_list;
1051
1052 cur_p = or->get_attr.buff + sizeof_attr_list;
1053
1054 if (returned_bytes > or->get_attr.alloc_size) {
1055 OSD_DEBUG("target report: space was not big enough! "
1056 "Allocate=%u Needed=%u\n",
1057 or->get_attr.alloc_size,
1058 returned_bytes + sizeof_attr_list);
1059
1060 returned_bytes =
1061 or->get_attr.alloc_size - sizeof_attr_list;
1062 }
1063 or->get_attr.total_bytes = returned_bytes;
1064 }
1065
1066 for (n = 0; (n < *nelem) && (cur_bytes < returned_bytes); ++n) {
1067 struct osd_attributes_list_element *attr = cur_p;
1068 unsigned inc;
1069
1070 oa->len = be16_to_cpu(attr->attr_bytes);
1071 inc = _osd_req_alist_elem_size(or, oa->len);
1072 OSD_DEBUG("oa->len=%d inc=%d cur_bytes=%d\n",
1073 oa->len, inc, cur_bytes);
1074 cur_bytes += inc;
1075 if (cur_bytes > returned_bytes) {
1076 OSD_ERR("BAD FOOD from target. list not valid!"
1077 "c=%d r=%d n=%d\n",
1078 cur_bytes, returned_bytes, n);
1079 oa->val_ptr = NULL;
1080 break;
1081 }
1082
1083 oa->attr_page = be32_to_cpu(attr->attr_page);
1084 oa->attr_id = be32_to_cpu(attr->attr_id);
1085 oa->val_ptr = attr->attr_val;
1086
1087 cur_p += inc;
1088 ++oa;
1089 }
1090
1091 *iterator = (returned_bytes - cur_bytes) ? cur_p : NULL;
1092 *nelem = n;
1093 return returned_bytes - cur_bytes;
1094}
1095EXPORT_SYMBOL(osd_req_decode_get_attr_list);
1096
1097/*
1098 * Attributes Page-mode
1099 */
1100
1101int osd_req_add_get_attr_page(struct osd_request *or,
1102 u32 page_id, void *attar_page, unsigned max_page_len,
1103 const struct osd_attr *set_one_attr)
1104{
1105 struct osd_cdb_head *cdbh = osd_cdb_head(&or->cdb);
1106
1107 if (or->attributes_mode &&
1108 or->attributes_mode != OSD_CDB_GET_ATTR_PAGE_SET_ONE) {
1109 WARN_ON(1);
1110 return -EINVAL;
1111 }
1112 or->attributes_mode = OSD_CDB_GET_ATTR_PAGE_SET_ONE;
1113
1114 or->get_attr.buff = attar_page;
1115 or->get_attr.total_bytes = max_page_len;
1116
1117 or->set_attr.buff = set_one_attr->val_ptr;
1118 or->set_attr.total_bytes = set_one_attr->len;
1119
1120 cdbh->attrs_page.get_attr_page = cpu_to_be32(page_id);
1121 cdbh->attrs_page.get_attr_alloc_length = cpu_to_be32(max_page_len);
1122 /* ocdb->attrs_page.get_attr_offset; */
1123
1124 cdbh->attrs_page.set_attr_page = cpu_to_be32(set_one_attr->attr_page);
1125 cdbh->attrs_page.set_attr_id = cpu_to_be32(set_one_attr->attr_id);
1126 cdbh->attrs_page.set_attr_length = cpu_to_be32(set_one_attr->len);
1127 /* ocdb->attrs_page.set_attr_offset; */
1128 return 0;
1129}
1130EXPORT_SYMBOL(osd_req_add_get_attr_page);
1131
1132static int _osd_req_finalize_attr_page(struct osd_request *or)
1133{
1134 struct osd_cdb_head *cdbh = osd_cdb_head(&or->cdb);
1135 unsigned in_padding, out_padding;
1136 int ret;
1137
1138 /* returned page */
1139 cdbh->attrs_page.get_attr_offset =
1140 osd_req_encode_offset(or, or->in.total_bytes, &in_padding);
1141
1142 ret = _req_append_segment(or, in_padding, &or->get_attr, NULL,
1143 &or->in);
1144 if (ret)
1145 return ret;
1146
1147 /* set one value */
1148 cdbh->attrs_page.set_attr_offset =
1149 osd_req_encode_offset(or, or->out.total_bytes, &out_padding);
1150
1151 ret = _req_append_segment(or, out_padding, &or->enc_get_attr, NULL,
1152 &or->out);
1153 return ret;
1154}
1155
1156static int _osd_req_finalize_data_integrity(struct osd_request *or,
1157 bool has_in, bool has_out, const u8 *cap_key)
1158{
1159 struct osd_security_parameters *sec_parms = _osd_req_sec_params(or);
1160 int ret;
1161
1162 if (!osd_is_sec_alldata(sec_parms))
1163 return 0;
1164
1165 if (has_out) {
1166 struct _osd_req_data_segment seg = {
1167 .buff = &or->out_data_integ,
1168 .total_bytes = sizeof(or->out_data_integ),
1169 };
1170 unsigned pad;
1171
1172 or->out_data_integ.data_bytes = cpu_to_be64(
1173 or->out.bio ? or->out.bio->bi_size : 0);
1174 or->out_data_integ.set_attributes_bytes = cpu_to_be64(
1175 or->set_attr.total_bytes);
1176 or->out_data_integ.get_attributes_bytes = cpu_to_be64(
1177 or->enc_get_attr.total_bytes);
1178
1179 sec_parms->data_out_integrity_check_offset =
1180 osd_req_encode_offset(or, or->out.total_bytes, &pad);
1181
1182 ret = _req_append_segment(or, pad, &seg, or->out.last_seg,
1183 &or->out);
1184 if (ret)
1185 return ret;
1186 or->out.last_seg = NULL;
1187
1188 /* they are now all chained to request sign them all together */
1189 osd_sec_sign_data(&or->out_data_integ, or->out.req->bio,
1190 cap_key);
1191 }
1192
1193 if (has_in) {
1194 struct _osd_req_data_segment seg = {
1195 .buff = &or->in_data_integ,
1196 .total_bytes = sizeof(or->in_data_integ),
1197 };
1198 unsigned pad;
1199
1200 sec_parms->data_in_integrity_check_offset =
1201 osd_req_encode_offset(or, or->in.total_bytes, &pad);
1202
1203 ret = _req_append_segment(or, pad, &seg, or->in.last_seg,
1204 &or->in);
1205 if (ret)
1206 return ret;
1207
1208 or->in.last_seg = NULL;
1209 }
1210
1211 return 0;
1212}
1213
1214/*
1215 * osd_finalize_request and helpers
1216 */
1217
1218static int _init_blk_request(struct osd_request *or,
1219 bool has_in, bool has_out)
1220{
1221 gfp_t flags = or->alloc_flags;
1222 struct scsi_device *scsi_device = or->osd_dev->scsi_device;
1223 struct request_queue *q = scsi_device->request_queue;
1224 struct request *req;
1225 int ret = -ENOMEM;
1226
1227 req = blk_get_request(q, has_out, flags);
1228 if (!req)
1229 goto out;
1230
1231 or->request = req;
1232 req->cmd_type = REQ_TYPE_BLOCK_PC;
1233 req->timeout = or->timeout;
1234 req->retries = or->retries;
1235 req->sense = or->sense;
1236 req->sense_len = 0;
1237
1238 if (has_out) {
1239 or->out.req = req;
1240 if (has_in) {
1241 /* allocate bidi request */
1242 req = blk_get_request(q, READ, flags);
1243 if (!req) {
1244 OSD_DEBUG("blk_get_request for bidi failed\n");
1245 goto out;
1246 }
1247 req->cmd_type = REQ_TYPE_BLOCK_PC;
1248 or->in.req = or->request->next_rq = req;
1249 }
1250 } else if (has_in)
1251 or->in.req = req;
1252
1253 ret = 0;
1254out:
1255 OSD_DEBUG("or=%p has_in=%d has_out=%d => %d, %p\n",
1256 or, has_in, has_out, ret, or->request);
1257 return ret;
1258}
1259
1260int osd_finalize_request(struct osd_request *or,
1261 u8 options, const void *cap, const u8 *cap_key)
1262{
1263 struct osd_cdb_head *cdbh = osd_cdb_head(&or->cdb);
1264 bool has_in, has_out;
1265 int ret;
1266
1267 if (options & OSD_REQ_FUA)
1268 cdbh->options |= OSD_CDB_FUA;
1269
1270 if (options & OSD_REQ_DPO)
1271 cdbh->options |= OSD_CDB_DPO;
1272
1273 if (options & OSD_REQ_BYPASS_TIMESTAMPS)
1274 cdbh->timestamp_control = OSD_CDB_BYPASS_TIMESTAMPS;
1275
1276 osd_set_caps(&or->cdb, cap);
1277
1278 has_in = or->in.bio || or->get_attr.total_bytes;
1279 has_out = or->out.bio || or->set_attr.total_bytes ||
1280 or->enc_get_attr.total_bytes;
1281
1282 ret = _init_blk_request(or, has_in, has_out);
1283 if (ret) {
1284 OSD_DEBUG("_init_blk_request failed\n");
1285 return ret;
1286 }
1287
1288 if (or->out.bio) {
1289 ret = blk_rq_append_bio(or->request->q, or->out.req,
1290 or->out.bio);
1291 if (ret) {
1292 OSD_DEBUG("blk_rq_append_bio out failed\n");
1293 return ret;
1294 }
1295 OSD_DEBUG("out bytes=%llu (bytes_req=%u)\n",
1296 _LLU(or->out.total_bytes), or->out.req->data_len);
1297 }
1298 if (or->in.bio) {
1299 ret = blk_rq_append_bio(or->request->q, or->in.req, or->in.bio);
1300 if (ret) {
1301 OSD_DEBUG("blk_rq_append_bio in failed\n");
1302 return ret;
1303 }
1304 OSD_DEBUG("in bytes=%llu (bytes_req=%u)\n",
1305 _LLU(or->in.total_bytes), or->in.req->data_len);
1306 }
1307
1308 or->out.pad_buff = sg_out_pad_buffer;
1309 or->in.pad_buff = sg_in_pad_buffer;
1310
1311 if (!or->attributes_mode)
1312 or->attributes_mode = OSD_CDB_GET_SET_ATTR_LISTS;
1313 cdbh->command_specific_options |= or->attributes_mode;
1314 if (or->attributes_mode == OSD_CDB_GET_ATTR_PAGE_SET_ONE) {
1315 ret = _osd_req_finalize_attr_page(or);
1316 } else {
1317 /* TODO: I think that for the GET_ATTR command these 2 should
1318 * be reversed to keep them in execution order (for embeded
1319 * targets with low memory footprint)
1320 */
1321 ret = _osd_req_finalize_set_attr_list(or);
1322 if (ret) {
1323 OSD_DEBUG("_osd_req_finalize_set_attr_list failed\n");
1324 return ret;
1325 }
1326
1327 ret = _osd_req_finalize_get_attr_list(or);
1328 if (ret) {
1329 OSD_DEBUG("_osd_req_finalize_get_attr_list failed\n");
1330 return ret;
1331 }
1332 }
1333
1334 ret = _osd_req_finalize_data_integrity(or, has_in, has_out, cap_key);
1335 if (ret)
1336 return ret;
1337
1338 osd_sec_sign_cdb(&or->cdb, cap_key);
1339
1340 or->request->cmd = or->cdb.buff;
1341 or->request->cmd_len = _osd_req_cdb_len(or);
1342
1343 return 0;
1344}
1345EXPORT_SYMBOL(osd_finalize_request);
1346
1347#define OSD_SENSE_PRINT1(fmt, a...) \
1348 do { \
1349 if (__cur_sense_need_output) \
1350 OSD_ERR(fmt, ##a); \
1351 } while (0)
1352
1353#define OSD_SENSE_PRINT2(fmt, a...) OSD_SENSE_PRINT1(" " fmt, ##a)
1354
1355int osd_req_decode_sense_full(struct osd_request *or,
1356 struct osd_sense_info *osi, bool silent,
1357 struct osd_obj_id *bad_obj_list __unused, int max_obj __unused,
1358 struct osd_attr *bad_attr_list, int max_attr)
1359{
1360 int sense_len, original_sense_len;
1361 struct osd_sense_info local_osi;
1362 struct scsi_sense_descriptor_based *ssdb;
1363 void *cur_descriptor;
1364#if (CONFIG_SCSI_OSD_DPRINT_SENSE == 0)
1365 const bool __cur_sense_need_output = false;
1366#else
1367 bool __cur_sense_need_output = !silent;
1368#endif
1369
1370 if (!or->request->errors)
1371 return 0;
1372
1373 ssdb = or->request->sense;
1374 sense_len = or->request->sense_len;
1375 if ((sense_len < (int)sizeof(*ssdb) || !ssdb->sense_key)) {
1376 OSD_ERR("Block-layer returned error(0x%x) but "
1377 "sense_len(%u) || key(%d) is empty\n",
1378 or->request->errors, sense_len, ssdb->sense_key);
1379 return -EIO;
1380 }
1381
1382 if ((ssdb->response_code != 0x72) && (ssdb->response_code != 0x73)) {
1383 OSD_ERR("Unrecognized scsi sense: rcode=%x length=%d\n",
1384 ssdb->response_code, sense_len);
1385 return -EIO;
1386 }
1387
1388 osi = osi ? : &local_osi;
1389 memset(osi, 0, sizeof(*osi));
1390 osi->key = ssdb->sense_key;
1391 osi->additional_code = be16_to_cpu(ssdb->additional_sense_code);
1392 original_sense_len = ssdb->additional_sense_length + 8;
1393
1394#if (CONFIG_SCSI_OSD_DPRINT_SENSE == 1)
1395 if (__cur_sense_need_output)
1396 __cur_sense_need_output = (osi->key > scsi_sk_recovered_error);
1397#endif
1398 OSD_SENSE_PRINT1("Main Sense information key=0x%x length(%d, %d) "
1399 "additional_code=0x%x\n",
1400 osi->key, original_sense_len, sense_len,
1401 osi->additional_code);
1402
1403 if (original_sense_len < sense_len)
1404 sense_len = original_sense_len;
1405
1406 cur_descriptor = ssdb->ssd;
1407 sense_len -= sizeof(*ssdb);
1408 while (sense_len > 0) {
1409 struct scsi_sense_descriptor *ssd = cur_descriptor;
1410 int cur_len = ssd->additional_length + 2;
1411
1412 sense_len -= cur_len;
1413
1414 if (sense_len < 0)
1415 break; /* sense was truncated */
1416
1417 switch (ssd->descriptor_type) {
1418 case scsi_sense_information:
1419 case scsi_sense_command_specific_information:
1420 {
1421 struct scsi_sense_command_specific_data_descriptor
1422 *sscd = cur_descriptor;
1423
1424 osi->command_info =
1425 get_unaligned_be64(&sscd->information) ;
1426 OSD_SENSE_PRINT2(
1427 "command_specific_information 0x%llx \n",
1428 _LLU(osi->command_info));
1429 break;
1430 }
1431 case scsi_sense_key_specific:
1432 {
1433 struct scsi_sense_key_specific_data_descriptor
1434 *ssks = cur_descriptor;
1435
1436 osi->sense_info = get_unaligned_be16(&ssks->value);
1437 OSD_SENSE_PRINT2(
1438 "sense_key_specific_information %u"
1439 "sksv_cd_bpv_bp (0x%x)\n",
1440 osi->sense_info, ssks->sksv_cd_bpv_bp);
1441 break;
1442 }
1443 case osd_sense_object_identification:
1444 { /*FIXME: Keep first not last, Store in array*/
1445 struct osd_sense_identification_data_descriptor
1446 *osidd = cur_descriptor;
1447
1448 osi->not_initiated_command_functions =
1449 le32_to_cpu(osidd->not_initiated_functions);
1450 osi->completed_command_functions =
1451 le32_to_cpu(osidd->completed_functions);
1452 osi->obj.partition = be64_to_cpu(osidd->partition_id);
1453 osi->obj.id = be64_to_cpu(osidd->object_id);
1454 OSD_SENSE_PRINT2(
1455 "object_identification pid=0x%llx oid=0x%llx\n",
1456 _LLU(osi->obj.partition), _LLU(osi->obj.id));
1457 OSD_SENSE_PRINT2(
1458 "not_initiated_bits(%x) "
1459 "completed_command_bits(%x)\n",
1460 osi->not_initiated_command_functions,
1461 osi->completed_command_functions);
1462 break;
1463 }
1464 case osd_sense_response_integrity_check:
1465 {
1466 struct osd_sense_response_integrity_check_descriptor
1467 *osricd = cur_descriptor;
1468 const unsigned len =
1469 sizeof(osricd->integrity_check_value);
1470 char key_dump[len*4 + 2]; /* 2nibbles+space+ASCII */
1471
1472 hex_dump_to_buffer(osricd->integrity_check_value, len,
1473 32, 1, key_dump, sizeof(key_dump), true);
1474 OSD_SENSE_PRINT2("response_integrity [%s]\n", key_dump);
1475 }
1476 case osd_sense_attribute_identification:
1477 {
1478 struct osd_sense_attributes_data_descriptor
1479 *osadd = cur_descriptor;
1480 int len = min(cur_len, sense_len);
1481 int i = 0;
1482 struct osd_sense_attr *pattr = osadd->sense_attrs;
1483
1484 while (len < 0) {
1485 u32 attr_page = be32_to_cpu(pattr->attr_page);
1486 u32 attr_id = be32_to_cpu(pattr->attr_id);
1487
1488 if (i++ == 0) {
1489 osi->attr.attr_page = attr_page;
1490 osi->attr.attr_id = attr_id;
1491 }
1492
1493 if (bad_attr_list && max_attr) {
1494 bad_attr_list->attr_page = attr_page;
1495 bad_attr_list->attr_id = attr_id;
1496 bad_attr_list++;
1497 max_attr--;
1498 }
1499 OSD_SENSE_PRINT2(
1500 "osd_sense_attribute_identification"
1501 "attr_page=0x%x attr_id=0x%x\n",
1502 attr_page, attr_id);
1503 }
1504 }
1505 /*These are not legal for OSD*/
1506 case scsi_sense_field_replaceable_unit:
1507 OSD_SENSE_PRINT2("scsi_sense_field_replaceable_unit\n");
1508 break;
1509 case scsi_sense_stream_commands:
1510 OSD_SENSE_PRINT2("scsi_sense_stream_commands\n");
1511 break;
1512 case scsi_sense_block_commands:
1513 OSD_SENSE_PRINT2("scsi_sense_block_commands\n");
1514 break;
1515 case scsi_sense_ata_return:
1516 OSD_SENSE_PRINT2("scsi_sense_ata_return\n");
1517 break;
1518 default:
1519 if (ssd->descriptor_type <= scsi_sense_Reserved_last)
1520 OSD_SENSE_PRINT2(
1521 "scsi_sense Reserved descriptor (0x%x)",
1522 ssd->descriptor_type);
1523 else
1524 OSD_SENSE_PRINT2(
1525 "scsi_sense Vendor descriptor (0x%x)",
1526 ssd->descriptor_type);
1527 }
1528
1529 cur_descriptor += cur_len;
1530 }
1531
1532 return (osi->key > scsi_sk_recovered_error) ? -EIO : 0;
1533}
1534EXPORT_SYMBOL(osd_req_decode_sense_full);
1535
1536/*
1537 * Implementation of osd_sec.h API
1538 * TODO: Move to a separate osd_sec.c file at a later stage.
1539 */
1540
1541enum { OSD_SEC_CAP_V1_ALL_CAPS =
1542 OSD_SEC_CAP_APPEND | OSD_SEC_CAP_OBJ_MGMT | OSD_SEC_CAP_REMOVE |
1543 OSD_SEC_CAP_CREATE | OSD_SEC_CAP_SET_ATTR | OSD_SEC_CAP_GET_ATTR |
1544 OSD_SEC_CAP_WRITE | OSD_SEC_CAP_READ | OSD_SEC_CAP_POL_SEC |
1545 OSD_SEC_CAP_GLOBAL | OSD_SEC_CAP_DEV_MGMT
1546};
1547
1548enum { OSD_SEC_CAP_V2_ALL_CAPS =
1549 OSD_SEC_CAP_V1_ALL_CAPS | OSD_SEC_CAP_QUERY | OSD_SEC_CAP_M_OBJECT
1550};
1551
1552void osd_sec_init_nosec_doall_caps(void *caps,
1553 const struct osd_obj_id *obj, bool is_collection, const bool is_v1)
1554{
1555 struct osd_capability *cap = caps;
1556 u8 type;
1557 u8 descriptor_type;
1558
1559 if (likely(obj->id)) {
1560 if (unlikely(is_collection)) {
1561 type = OSD_SEC_OBJ_COLLECTION;
1562 descriptor_type = is_v1 ? OSD_SEC_OBJ_DESC_OBJ :
1563 OSD_SEC_OBJ_DESC_COL;
1564 } else {
1565 type = OSD_SEC_OBJ_USER;
1566 descriptor_type = OSD_SEC_OBJ_DESC_OBJ;
1567 }
1568 WARN_ON(!obj->partition);
1569 } else {
1570 type = obj->partition ? OSD_SEC_OBJ_PARTITION :
1571 OSD_SEC_OBJ_ROOT;
1572 descriptor_type = OSD_SEC_OBJ_DESC_PAR;
1573 }
1574
1575 memset(cap, 0, sizeof(*cap));
1576
1577 cap->h.format = OSD_SEC_CAP_FORMAT_VER1;
1578 cap->h.integrity_algorithm__key_version = 0; /* MAKE_BYTE(0, 0); */
1579 cap->h.security_method = OSD_SEC_NOSEC;
1580/* cap->expiration_time;
1581 cap->AUDIT[30-10];
1582 cap->discriminator[42-30];
1583 cap->object_created_time; */
1584 cap->h.object_type = type;
1585 osd_sec_set_caps(&cap->h, OSD_SEC_CAP_V1_ALL_CAPS);
1586 cap->h.object_descriptor_type = descriptor_type;
1587 cap->od.obj_desc.policy_access_tag = 0;
1588 cap->od.obj_desc.allowed_partition_id = cpu_to_be64(obj->partition);
1589 cap->od.obj_desc.allowed_object_id = cpu_to_be64(obj->id);
1590}
1591EXPORT_SYMBOL(osd_sec_init_nosec_doall_caps);
1592
1593/* FIXME: Extract version from caps pointer.
1594 * Also Pete's target only supports caps from OSDv1 for now
1595 */
1596void osd_set_caps(struct osd_cdb *cdb, const void *caps)
1597{
1598 bool is_ver1 = true;
1599 /* NOTE: They start at same address */
1600 memcpy(&cdb->v1.caps, caps, is_ver1 ? OSDv1_CAP_LEN : OSD_CAP_LEN);
1601}
1602
1603bool osd_is_sec_alldata(struct osd_security_parameters *sec_parms __unused)
1604{
1605 return false;
1606}
1607
1608void osd_sec_sign_cdb(struct osd_cdb *ocdb __unused, const u8 *cap_key __unused)
1609{
1610}
1611
1612void osd_sec_sign_data(void *data_integ __unused,
1613 struct bio *bio __unused, const u8 *cap_key __unused)
1614{
1615}
1616
1617/*
1618 * Declared in osd_protocol.h
1619 * 4.12.5 Data-In and Data-Out buffer offsets
1620 * byte offset = mantissa * (2^(exponent+8))
1621 * Returns the smallest allowed encoded offset that contains given @offset
1622 * The actual encoded offset returned is @offset + *@padding.
1623 */
1624osd_cdb_offset __osd_encode_offset(
1625 u64 offset, unsigned *padding, int min_shift, int max_shift)
1626{
1627 u64 try_offset = -1, mod, align;
1628 osd_cdb_offset be32_offset;
1629 int shift;
1630
1631 *padding = 0;
1632 if (!offset)
1633 return 0;
1634
1635 for (shift = min_shift; shift < max_shift; ++shift) {
1636 try_offset = offset >> shift;
1637 if (try_offset < (1 << OSD_OFFSET_MAX_BITS))
1638 break;
1639 }
1640
1641 BUG_ON(shift == max_shift);
1642
1643 align = 1 << shift;
1644 mod = offset & (align - 1);
1645 if (mod) {
1646 *padding = align - mod;
1647 try_offset += 1;
1648 }
1649
1650 try_offset |= ((shift - 8) & 0xf) << 28;
1651 be32_offset = cpu_to_be32((u32)try_offset);
1652
1653 OSD_DEBUG("offset=%llu mantissa=%llu exp=%d encoded=%x pad=%d\n",
1654 _LLU(offset), _LLU(try_offset & 0x0FFFFFFF), shift,
1655 be32_offset, *padding);
1656 return be32_offset;
1657}
diff --git a/drivers/scsi/osd/osd_uld.c b/drivers/scsi/osd/osd_uld.c
new file mode 100644
index 000000000000..f8b1a749958b
--- /dev/null
+++ b/drivers/scsi/osd/osd_uld.c
@@ -0,0 +1,487 @@
1/*
2 * osd_uld.c - OSD Upper Layer Driver
3 *
4 * A Linux driver module that registers as a SCSI ULD and probes
5 * for OSD type SCSI devices.
6 * It's main function is to export osd devices to in-kernel users like
7 * osdfs and pNFS-objects-LD. It also provides one ioctl for running
8 * in Kernel tests.
9 *
10 * Copyright (C) 2008 Panasas Inc. All rights reserved.
11 *
12 * Authors:
13 * Boaz Harrosh <bharrosh@panasas.com>
14 * Benny Halevy <bhalevy@panasas.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions
21 * are met:
22 *
23 * 1. Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * 3. Neither the name of the Panasas company nor the names of its
29 * contributors may be used to endorse or promote products derived
30 * from this software without specific prior written permission.
31 *
32 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
33 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
34 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
37 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
38 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
39 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
40 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
41 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
42 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 */
44
45#include <linux/namei.h>
46#include <linux/cdev.h>
47#include <linux/fs.h>
48#include <linux/module.h>
49#include <linux/device.h>
50#include <linux/idr.h>
51#include <linux/major.h>
52
53#include <scsi/scsi.h>
54#include <scsi/scsi_driver.h>
55#include <scsi/scsi_device.h>
56#include <scsi/scsi_ioctl.h>
57
58#include <scsi/osd_initiator.h>
59#include <scsi/osd_sec.h>
60
61#include "osd_debug.h"
62
63#ifndef TYPE_OSD
64# define TYPE_OSD 0x11
65#endif
66
67#ifndef SCSI_OSD_MAJOR
68# define SCSI_OSD_MAJOR 260
69#endif
70#define SCSI_OSD_MAX_MINOR 64
71
72static const char osd_name[] = "osd";
73static const char *osd_version_string = "open-osd 0.1.0";
74const char osd_symlink[] = "scsi_osd";
75
76MODULE_AUTHOR("Boaz Harrosh <bharrosh@panasas.com>");
77MODULE_DESCRIPTION("open-osd Upper-Layer-Driver osd.ko");
78MODULE_LICENSE("GPL");
79MODULE_ALIAS_CHARDEV_MAJOR(SCSI_OSD_MAJOR);
80MODULE_ALIAS_SCSI_DEVICE(TYPE_OSD);
81
82struct osd_uld_device {
83 int minor;
84 struct kref kref;
85 struct cdev cdev;
86 struct osd_dev od;
87 struct gendisk *disk;
88 struct device *class_member;
89};
90
91static void __uld_get(struct osd_uld_device *oud);
92static void __uld_put(struct osd_uld_device *oud);
93
94/*
95 * Char Device operations
96 */
97
98static int osd_uld_open(struct inode *inode, struct file *file)
99{
100 struct osd_uld_device *oud = container_of(inode->i_cdev,
101 struct osd_uld_device, cdev);
102
103 __uld_get(oud);
104 /* cache osd_uld_device on file handle */
105 file->private_data = oud;
106 OSD_DEBUG("osd_uld_open %p\n", oud);
107 return 0;
108}
109
110static int osd_uld_release(struct inode *inode, struct file *file)
111{
112 struct osd_uld_device *oud = file->private_data;
113
114 OSD_DEBUG("osd_uld_release %p\n", file->private_data);
115 file->private_data = NULL;
116 __uld_put(oud);
117 return 0;
118}
119
120/* FIXME: Only one vector for now */
121unsigned g_test_ioctl;
122do_test_fn *g_do_test;
123
124int osduld_register_test(unsigned ioctl, do_test_fn *do_test)
125{
126 if (g_test_ioctl)
127 return -EINVAL;
128
129 g_test_ioctl = ioctl;
130 g_do_test = do_test;
131 return 0;
132}
133EXPORT_SYMBOL(osduld_register_test);
134
135void osduld_unregister_test(unsigned ioctl)
136{
137 if (ioctl == g_test_ioctl) {
138 g_test_ioctl = 0;
139 g_do_test = NULL;
140 }
141}
142EXPORT_SYMBOL(osduld_unregister_test);
143
144static do_test_fn *_find_ioctl(unsigned cmd)
145{
146 if (g_test_ioctl == cmd)
147 return g_do_test;
148 else
149 return NULL;
150}
151
152static long osd_uld_ioctl(struct file *file, unsigned int cmd,
153 unsigned long arg)
154{
155 struct osd_uld_device *oud = file->private_data;
156 int ret;
157 do_test_fn *do_test;
158
159 do_test = _find_ioctl(cmd);
160 if (do_test)
161 ret = do_test(&oud->od, cmd, arg);
162 else {
163 OSD_ERR("Unknown ioctl %d: osd_uld_device=%p\n", cmd, oud);
164 ret = -ENOIOCTLCMD;
165 }
166 return ret;
167}
168
169static const struct file_operations osd_fops = {
170 .owner = THIS_MODULE,
171 .open = osd_uld_open,
172 .release = osd_uld_release,
173 .unlocked_ioctl = osd_uld_ioctl,
174};
175
176struct osd_dev *osduld_path_lookup(const char *path)
177{
178 struct nameidata nd;
179 struct inode *inode;
180 struct cdev *cdev;
181 struct osd_uld_device *uninitialized_var(oud);
182 int error;
183
184 if (!path || !*path) {
185 OSD_ERR("Mount with !path || !*path\n");
186 return ERR_PTR(-EINVAL);
187 }
188
189 error = path_lookup(path, LOOKUP_FOLLOW, &nd);
190 if (error) {
191 OSD_ERR("path_lookup of %s faild=>%d\n", path, error);
192 return ERR_PTR(error);
193 }
194
195 inode = nd.path.dentry->d_inode;
196 error = -EINVAL; /* Not the right device e.g osd_uld_device */
197 if (!S_ISCHR(inode->i_mode)) {
198 OSD_DEBUG("!S_ISCHR()\n");
199 goto out;
200 }
201
202 cdev = inode->i_cdev;
203 if (!cdev) {
204 OSD_ERR("Before mounting an OSD Based filesystem\n");
205 OSD_ERR(" user-mode must open+close the %s device\n", path);
206 OSD_ERR(" Example: bash: echo < %s\n", path);
207 goto out;
208 }
209
210 /* The Magic wand. Is it our char-dev */
211 /* TODO: Support sg devices */
212 if (cdev->owner != THIS_MODULE) {
213 OSD_ERR("Error mounting %s - is not an OSD device\n", path);
214 goto out;
215 }
216
217 oud = container_of(cdev, struct osd_uld_device, cdev);
218
219 __uld_get(oud);
220 error = 0;
221
222out:
223 path_put(&nd.path);
224 return error ? ERR_PTR(error) : &oud->od;
225}
226EXPORT_SYMBOL(osduld_path_lookup);
227
228void osduld_put_device(struct osd_dev *od)
229{
230 if (od) {
231 struct osd_uld_device *oud = container_of(od,
232 struct osd_uld_device, od);
233
234 __uld_put(oud);
235 }
236}
237EXPORT_SYMBOL(osduld_put_device);
238
239/*
240 * Scsi Device operations
241 */
242
243static int __detect_osd(struct osd_uld_device *oud)
244{
245 struct scsi_device *scsi_device = oud->od.scsi_device;
246 char caps[OSD_CAP_LEN];
247 int error;
248
249 /* sending a test_unit_ready as first command seems to be needed
250 * by some targets
251 */
252 OSD_DEBUG("start scsi_test_unit_ready %p %p %p\n",
253 oud, scsi_device, scsi_device->request_queue);
254 error = scsi_test_unit_ready(scsi_device, 10*HZ, 5, NULL);
255 if (error)
256 OSD_ERR("warning: scsi_test_unit_ready failed\n");
257
258 osd_sec_init_nosec_doall_caps(caps, &osd_root_object, false, true);
259 if (osd_auto_detect_ver(&oud->od, caps))
260 return -ENODEV;
261
262 return 0;
263}
264
265static struct class *osd_sysfs_class;
266static DEFINE_IDA(osd_minor_ida);
267
268static int osd_probe(struct device *dev)
269{
270 struct scsi_device *scsi_device = to_scsi_device(dev);
271 struct gendisk *disk;
272 struct osd_uld_device *oud;
273 int minor;
274 int error;
275
276 if (scsi_device->type != TYPE_OSD)
277 return -ENODEV;
278
279 do {
280 if (!ida_pre_get(&osd_minor_ida, GFP_KERNEL))
281 return -ENODEV;
282
283 error = ida_get_new(&osd_minor_ida, &minor);
284 } while (error == -EAGAIN);
285
286 if (error)
287 return error;
288 if (minor >= SCSI_OSD_MAX_MINOR) {
289 error = -EBUSY;
290 goto err_retract_minor;
291 }
292
293 error = -ENOMEM;
294 oud = kzalloc(sizeof(*oud), GFP_KERNEL);
295 if (NULL == oud)
296 goto err_retract_minor;
297
298 kref_init(&oud->kref);
299 dev_set_drvdata(dev, oud);
300 oud->minor = minor;
301
302 /* allocate a disk and set it up */
303 /* FIXME: do we need this since sg has already done that */
304 disk = alloc_disk(1);
305 if (!disk) {
306 OSD_ERR("alloc_disk failed\n");
307 goto err_free_osd;
308 }
309 disk->major = SCSI_OSD_MAJOR;
310 disk->first_minor = oud->minor;
311 sprintf(disk->disk_name, "osd%d", oud->minor);
312 oud->disk = disk;
313
314 /* hold one more reference to the scsi_device that will get released
315 * in __release, in case a logout is happening while fs is mounted
316 */
317 scsi_device_get(scsi_device);
318 osd_dev_init(&oud->od, scsi_device);
319
320 /* Detect the OSD Version */
321 error = __detect_osd(oud);
322 if (error) {
323 OSD_ERR("osd detection failed, non-compatible OSD device\n");
324 goto err_put_disk;
325 }
326
327 /* init the char-device for communication with user-mode */
328 cdev_init(&oud->cdev, &osd_fops);
329 oud->cdev.owner = THIS_MODULE;
330 error = cdev_add(&oud->cdev,
331 MKDEV(SCSI_OSD_MAJOR, oud->minor), 1);
332 if (error) {
333 OSD_ERR("cdev_add failed\n");
334 goto err_put_disk;
335 }
336 kobject_get(&oud->cdev.kobj); /* 2nd ref see osd_remove() */
337
338 /* class_member */
339 oud->class_member = device_create(osd_sysfs_class, dev,
340 MKDEV(SCSI_OSD_MAJOR, oud->minor), "%s", disk->disk_name);
341 if (IS_ERR(oud->class_member)) {
342 OSD_ERR("class_device_create failed\n");
343 error = PTR_ERR(oud->class_member);
344 goto err_put_cdev;
345 }
346
347 dev_set_drvdata(oud->class_member, oud);
348 error = sysfs_create_link(&scsi_device->sdev_gendev.kobj,
349 &oud->class_member->kobj, osd_symlink);
350 if (error)
351 OSD_ERR("warning: unable to make symlink\n");
352
353 OSD_INFO("osd_probe %s\n", disk->disk_name);
354 return 0;
355
356err_put_cdev:
357 cdev_del(&oud->cdev);
358err_put_disk:
359 scsi_device_put(scsi_device);
360 put_disk(disk);
361err_free_osd:
362 dev_set_drvdata(dev, NULL);
363 kfree(oud);
364err_retract_minor:
365 ida_remove(&osd_minor_ida, minor);
366 return error;
367}
368
369static int osd_remove(struct device *dev)
370{
371 struct scsi_device *scsi_device = to_scsi_device(dev);
372 struct osd_uld_device *oud = dev_get_drvdata(dev);
373
374 if (!oud || (oud->od.scsi_device != scsi_device)) {
375 OSD_ERR("Half cooked osd-device %p,%p || %p!=%p",
376 dev, oud, oud ? oud->od.scsi_device : NULL,
377 scsi_device);
378 }
379
380 sysfs_remove_link(&oud->od.scsi_device->sdev_gendev.kobj, osd_symlink);
381
382 if (oud->class_member)
383 device_destroy(osd_sysfs_class,
384 MKDEV(SCSI_OSD_MAJOR, oud->minor));
385
386 /* We have 2 references to the cdev. One is released here
387 * and also takes down the /dev/osdX mapping. The second
388 * Will be released in __remove() after all users have released
389 * the osd_uld_device.
390 */
391 if (oud->cdev.owner)
392 cdev_del(&oud->cdev);
393
394 __uld_put(oud);
395 return 0;
396}
397
398static void __remove(struct kref *kref)
399{
400 struct osd_uld_device *oud = container_of(kref,
401 struct osd_uld_device, kref);
402 struct scsi_device *scsi_device = oud->od.scsi_device;
403
404 /* now let delete the char_dev */
405 kobject_put(&oud->cdev.kobj);
406
407 osd_dev_fini(&oud->od);
408 scsi_device_put(scsi_device);
409
410 OSD_INFO("osd_remove %s\n",
411 oud->disk ? oud->disk->disk_name : NULL);
412
413 if (oud->disk)
414 put_disk(oud->disk);
415
416 ida_remove(&osd_minor_ida, oud->minor);
417 kfree(oud);
418}
419
420static void __uld_get(struct osd_uld_device *oud)
421{
422 kref_get(&oud->kref);
423}
424
425static void __uld_put(struct osd_uld_device *oud)
426{
427 kref_put(&oud->kref, __remove);
428}
429
430/*
431 * Global driver and scsi registration
432 */
433
434static struct scsi_driver osd_driver = {
435 .owner = THIS_MODULE,
436 .gendrv = {
437 .name = osd_name,
438 .probe = osd_probe,
439 .remove = osd_remove,
440 }
441};
442
443static int __init osd_uld_init(void)
444{
445 int err;
446
447 osd_sysfs_class = class_create(THIS_MODULE, osd_symlink);
448 if (IS_ERR(osd_sysfs_class)) {
449 OSD_ERR("Unable to register sysfs class => %ld\n",
450 PTR_ERR(osd_sysfs_class));
451 return PTR_ERR(osd_sysfs_class);
452 }
453
454 err = register_chrdev_region(MKDEV(SCSI_OSD_MAJOR, 0),
455 SCSI_OSD_MAX_MINOR, osd_name);
456 if (err) {
457 OSD_ERR("Unable to register major %d for osd ULD => %d\n",
458 SCSI_OSD_MAJOR, err);
459 goto err_out;
460 }
461
462 err = scsi_register_driver(&osd_driver.gendrv);
463 if (err) {
464 OSD_ERR("scsi_register_driver failed => %d\n", err);
465 goto err_out_chrdev;
466 }
467
468 OSD_INFO("LOADED %s\n", osd_version_string);
469 return 0;
470
471err_out_chrdev:
472 unregister_chrdev_region(MKDEV(SCSI_OSD_MAJOR, 0), SCSI_OSD_MAX_MINOR);
473err_out:
474 class_destroy(osd_sysfs_class);
475 return err;
476}
477
478static void __exit osd_uld_exit(void)
479{
480 scsi_unregister_driver(&osd_driver.gendrv);
481 unregister_chrdev_region(MKDEV(SCSI_OSD_MAJOR, 0), SCSI_OSD_MAX_MINOR);
482 class_destroy(osd_sysfs_class);
483 OSD_INFO("UNLOADED %s\n", osd_version_string);
484}
485
486module_init(osd_uld_init);
487module_exit(osd_uld_exit);
diff --git a/drivers/scsi/osst.c b/drivers/scsi/osst.c
index 0ea78d9a37db..acb835837eec 100644
--- a/drivers/scsi/osst.c
+++ b/drivers/scsi/osst.c
@@ -280,8 +280,8 @@ static int osst_chk_result(struct osst_tape * STp, struct osst_request * SRpnt)
280 static int notyetprinted = 1; 280 static int notyetprinted = 1;
281 281
282 printk(KERN_WARNING 282 printk(KERN_WARNING
283 "%s:W: Warning %x (sugg. bt 0x%x, driver bt 0x%x, host bt 0x%x).\n", 283 "%s:W: Warning %x (driver bt 0x%x, host bt 0x%x).\n",
284 name, result, suggestion(result), driver_byte(result) & DRIVER_MASK, 284 name, result, driver_byte(result),
285 host_byte(result)); 285 host_byte(result));
286 if (notyetprinted) { 286 if (notyetprinted) {
287 notyetprinted = 0; 287 notyetprinted = 0;
@@ -317,18 +317,25 @@ static int osst_chk_result(struct osst_tape * STp, struct osst_request * SRpnt)
317 317
318 318
319/* Wakeup from interrupt */ 319/* Wakeup from interrupt */
320static void osst_sleep_done(void *data, char *sense, int result, int resid) 320static void osst_end_async(struct request *req, int update)
321{ 321{
322 struct osst_request *SRpnt = data; 322 struct osst_request *SRpnt = req->end_io_data;
323 struct osst_tape *STp = SRpnt->stp; 323 struct osst_tape *STp = SRpnt->stp;
324 struct rq_map_data *mdata = &SRpnt->stp->buffer->map_data;
324 325
325 memcpy(SRpnt->sense, sense, SCSI_SENSE_BUFFERSIZE); 326 STp->buffer->cmdstat.midlevel_result = SRpnt->result = req->errors;
326 STp->buffer->cmdstat.midlevel_result = SRpnt->result = result;
327#if DEBUG 327#if DEBUG
328 STp->write_pending = 0; 328 STp->write_pending = 0;
329#endif 329#endif
330 if (SRpnt->waiting) 330 if (SRpnt->waiting)
331 complete(SRpnt->waiting); 331 complete(SRpnt->waiting);
332
333 if (SRpnt->bio) {
334 kfree(mdata->pages);
335 blk_rq_unmap_user(SRpnt->bio);
336 }
337
338 __blk_put_request(req->q, req);
332} 339}
333 340
334/* osst_request memory management */ 341/* osst_request memory management */
@@ -342,6 +349,74 @@ static void osst_release_request(struct osst_request *streq)
342 kfree(streq); 349 kfree(streq);
343} 350}
344 351
352static int osst_execute(struct osst_request *SRpnt, const unsigned char *cmd,
353 int cmd_len, int data_direction, void *buffer, unsigned bufflen,
354 int use_sg, int timeout, int retries)
355{
356 struct request *req;
357 struct page **pages = NULL;
358 struct rq_map_data *mdata = &SRpnt->stp->buffer->map_data;
359
360 int err = 0;
361 int write = (data_direction == DMA_TO_DEVICE);
362
363 req = blk_get_request(SRpnt->stp->device->request_queue, write, GFP_KERNEL);
364 if (!req)
365 return DRIVER_ERROR << 24;
366
367 req->cmd_type = REQ_TYPE_BLOCK_PC;
368 req->cmd_flags |= REQ_QUIET;
369
370 SRpnt->bio = NULL;
371
372 if (use_sg) {
373 struct scatterlist *sg, *sgl = (struct scatterlist *)buffer;
374 int i;
375
376 pages = kzalloc(use_sg * sizeof(struct page *), GFP_KERNEL);
377 if (!pages)
378 goto free_req;
379
380 for_each_sg(sgl, sg, use_sg, i)
381 pages[i] = sg_page(sg);
382
383 mdata->null_mapped = 1;
384
385 mdata->page_order = get_order(sgl[0].length);
386 mdata->nr_entries =
387 DIV_ROUND_UP(bufflen, PAGE_SIZE << mdata->page_order);
388 mdata->offset = 0;
389
390 err = blk_rq_map_user(req->q, req, mdata, NULL, bufflen, GFP_KERNEL);
391 if (err) {
392 kfree(pages);
393 goto free_req;
394 }
395 SRpnt->bio = req->bio;
396 mdata->pages = pages;
397
398 } else if (bufflen) {
399 err = blk_rq_map_kern(req->q, req, buffer, bufflen, GFP_KERNEL);
400 if (err)
401 goto free_req;
402 }
403
404 req->cmd_len = cmd_len;
405 memset(req->cmd, 0, BLK_MAX_CDB); /* ATAPI hates garbage after CDB */
406 memcpy(req->cmd, cmd, req->cmd_len);
407 req->sense = SRpnt->sense;
408 req->sense_len = 0;
409 req->timeout = timeout;
410 req->retries = retries;
411 req->end_io_data = SRpnt;
412
413 blk_execute_rq_nowait(req->q, NULL, req, 1, osst_end_async);
414 return 0;
415free_req:
416 blk_put_request(req);
417 return DRIVER_ERROR << 24;
418}
419
345/* Do the scsi command. Waits until command performed if do_wait is true. 420/* Do the scsi command. Waits until command performed if do_wait is true.
346 Otherwise osst_write_behind_check() is used to check that the command 421 Otherwise osst_write_behind_check() is used to check that the command
347 has finished. */ 422 has finished. */
@@ -403,8 +478,8 @@ static struct osst_request * osst_do_scsi(struct osst_request *SRpnt, struct oss
403 STp->buffer->cmdstat.have_sense = 0; 478 STp->buffer->cmdstat.have_sense = 0;
404 STp->buffer->syscall_result = 0; 479 STp->buffer->syscall_result = 0;
405 480
406 if (scsi_execute_async(STp->device, cmd, COMMAND_SIZE(cmd[0]), direction, bp, bytes, 481 if (osst_execute(SRpnt, cmd, COMMAND_SIZE(cmd[0]), direction, bp, bytes,
407 use_sg, timeout, retries, SRpnt, osst_sleep_done, GFP_KERNEL)) 482 use_sg, timeout, retries))
408 /* could not allocate the buffer or request was too large */ 483 /* could not allocate the buffer or request was too large */
409 (STp->buffer)->syscall_result = (-EBUSY); 484 (STp->buffer)->syscall_result = (-EBUSY);
410 else if (do_wait) { 485 else if (do_wait) {
@@ -5286,11 +5361,6 @@ static int enlarge_buffer(struct osst_buffer *STbuffer, int need_dma)
5286 struct page *page = alloc_pages(priority, (OS_FRAME_SIZE - got <= PAGE_SIZE) ? 0 : order); 5361 struct page *page = alloc_pages(priority, (OS_FRAME_SIZE - got <= PAGE_SIZE) ? 0 : order);
5287 STbuffer->sg[segs].offset = 0; 5362 STbuffer->sg[segs].offset = 0;
5288 if (page == NULL) { 5363 if (page == NULL) {
5289 if (OS_FRAME_SIZE - got <= (max_segs - segs) * b_size / 2 && order) {
5290 b_size /= 2; /* Large enough for the rest of the buffers */
5291 order--;
5292 continue;
5293 }
5294 printk(KERN_WARNING "osst :W: Failed to enlarge buffer to %d bytes.\n", 5364 printk(KERN_WARNING "osst :W: Failed to enlarge buffer to %d bytes.\n",
5295 OS_FRAME_SIZE); 5365 OS_FRAME_SIZE);
5296#if DEBUG 5366#if DEBUG
diff --git a/drivers/scsi/osst.h b/drivers/scsi/osst.h
index 5aa22740b5df..11d26c57f3f8 100644
--- a/drivers/scsi/osst.h
+++ b/drivers/scsi/osst.h
@@ -520,6 +520,7 @@ struct osst_buffer {
520 int syscall_result; 520 int syscall_result;
521 struct osst_request *last_SRpnt; 521 struct osst_request *last_SRpnt;
522 struct st_cmdstatus cmdstat; 522 struct st_cmdstatus cmdstat;
523 struct rq_map_data map_data;
523 unsigned char *b_data; 524 unsigned char *b_data;
524 os_aux_t *aux; /* onstream AUX structure at end of each block */ 525 os_aux_t *aux; /* onstream AUX structure at end of each block */
525 unsigned short use_sg; /* zero or number of s/g segments for this adapter */ 526 unsigned short use_sg; /* zero or number of s/g segments for this adapter */
@@ -634,6 +635,7 @@ struct osst_request {
634 int result; 635 int result;
635 struct osst_tape *stp; 636 struct osst_tape *stp;
636 struct completion *waiting; 637 struct completion *waiting;
638 struct bio *bio;
637}; 639};
638 640
639/* Values of write_type */ 641/* Values of write_type */
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index cbcd3f681b62..a2ef03243a2c 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -967,6 +967,110 @@ int scsi_track_queue_full(struct scsi_device *sdev, int depth)
967EXPORT_SYMBOL(scsi_track_queue_full); 967EXPORT_SYMBOL(scsi_track_queue_full);
968 968
969/** 969/**
970 * scsi_vpd_inquiry - Request a device provide us with a VPD page
971 * @sdev: The device to ask
972 * @buffer: Where to put the result
973 * @page: Which Vital Product Data to return
974 * @len: The length of the buffer
975 *
976 * This is an internal helper function. You probably want to use
977 * scsi_get_vpd_page instead.
978 *
979 * Returns 0 on success or a negative error number.
980 */
981static int scsi_vpd_inquiry(struct scsi_device *sdev, unsigned char *buffer,
982 u8 page, unsigned len)
983{
984 int result;
985 unsigned char cmd[16];
986
987 cmd[0] = INQUIRY;
988 cmd[1] = 1; /* EVPD */
989 cmd[2] = page;
990 cmd[3] = len >> 8;
991 cmd[4] = len & 0xff;
992 cmd[5] = 0; /* Control byte */
993
994 /*
995 * I'm not convinced we need to try quite this hard to get VPD, but
996 * all the existing users tried this hard.
997 */
998 result = scsi_execute_req(sdev, cmd, DMA_FROM_DEVICE, buffer,
999 len + 4, NULL, 30 * HZ, 3, NULL);
1000 if (result)
1001 return result;
1002
1003 /* Sanity check that we got the page back that we asked for */
1004 if (buffer[1] != page)
1005 return -EIO;
1006
1007 return 0;
1008}
1009
1010/**
1011 * scsi_get_vpd_page - Get Vital Product Data from a SCSI device
1012 * @sdev: The device to ask
1013 * @page: Which Vital Product Data to return
1014 *
1015 * SCSI devices may optionally supply Vital Product Data. Each 'page'
1016 * of VPD is defined in the appropriate SCSI document (eg SPC, SBC).
1017 * If the device supports this VPD page, this routine returns a pointer
1018 * to a buffer containing the data from that page. The caller is
1019 * responsible for calling kfree() on this pointer when it is no longer
1020 * needed. If we cannot retrieve the VPD page this routine returns %NULL.
1021 */
1022unsigned char *scsi_get_vpd_page(struct scsi_device *sdev, u8 page)
1023{
1024 int i, result;
1025 unsigned int len;
1026 unsigned char *buf = kmalloc(259, GFP_KERNEL);
1027
1028 if (!buf)
1029 return NULL;
1030
1031 /* Ask for all the pages supported by this device */
1032 result = scsi_vpd_inquiry(sdev, buf, 0, 255);
1033 if (result)
1034 goto fail;
1035
1036 /* If the user actually wanted this page, we can skip the rest */
1037 if (page == 0)
1038 return buf;
1039
1040 for (i = 0; i < buf[3]; i++)
1041 if (buf[i + 4] == page)
1042 goto found;
1043 /* The device claims it doesn't support the requested page */
1044 goto fail;
1045
1046 found:
1047 result = scsi_vpd_inquiry(sdev, buf, page, 255);
1048 if (result)
1049 goto fail;
1050
1051 /*
1052 * Some pages are longer than 255 bytes. The actual length of
1053 * the page is returned in the header.
1054 */
1055 len = (buf[2] << 8) | buf[3];
1056 if (len <= 255)
1057 return buf;
1058
1059 kfree(buf);
1060 buf = kmalloc(len + 4, GFP_KERNEL);
1061 result = scsi_vpd_inquiry(sdev, buf, page, len);
1062 if (result)
1063 goto fail;
1064
1065 return buf;
1066
1067 fail:
1068 kfree(buf);
1069 return NULL;
1070}
1071EXPORT_SYMBOL_GPL(scsi_get_vpd_page);
1072
1073/**
970 * scsi_device_get - get an additional reference to a scsi_device 1074 * scsi_device_get - get an additional reference to a scsi_device
971 * @sdev: device to get a reference to 1075 * @sdev: device to get a reference to
972 * 1076 *
diff --git a/drivers/scsi/scsi_debug.c b/drivers/scsi/scsi_debug.c
index 6eebd0bbe8a8..213123b0486b 100644
--- a/drivers/scsi/scsi_debug.c
+++ b/drivers/scsi/scsi_debug.c
@@ -40,6 +40,9 @@
40#include <linux/moduleparam.h> 40#include <linux/moduleparam.h>
41#include <linux/scatterlist.h> 41#include <linux/scatterlist.h>
42#include <linux/blkdev.h> 42#include <linux/blkdev.h>
43#include <linux/crc-t10dif.h>
44
45#include <net/checksum.h>
43 46
44#include <scsi/scsi.h> 47#include <scsi/scsi.h>
45#include <scsi/scsi_cmnd.h> 48#include <scsi/scsi_cmnd.h>
@@ -48,8 +51,7 @@
48#include <scsi/scsicam.h> 51#include <scsi/scsicam.h>
49#include <scsi/scsi_eh.h> 52#include <scsi/scsi_eh.h>
50 53
51#include <linux/stat.h> 54#include "sd.h"
52
53#include "scsi_logging.h" 55#include "scsi_logging.h"
54 56
55#define SCSI_DEBUG_VERSION "1.81" 57#define SCSI_DEBUG_VERSION "1.81"
@@ -95,6 +97,10 @@ static const char * scsi_debug_version_date = "20070104";
95#define DEF_FAKE_RW 0 97#define DEF_FAKE_RW 0
96#define DEF_VPD_USE_HOSTNO 1 98#define DEF_VPD_USE_HOSTNO 1
97#define DEF_SECTOR_SIZE 512 99#define DEF_SECTOR_SIZE 512
100#define DEF_DIX 0
101#define DEF_DIF 0
102#define DEF_GUARD 0
103#define DEF_ATO 1
98 104
99/* bit mask values for scsi_debug_opts */ 105/* bit mask values for scsi_debug_opts */
100#define SCSI_DEBUG_OPT_NOISE 1 106#define SCSI_DEBUG_OPT_NOISE 1
@@ -102,6 +108,8 @@ static const char * scsi_debug_version_date = "20070104";
102#define SCSI_DEBUG_OPT_TIMEOUT 4 108#define SCSI_DEBUG_OPT_TIMEOUT 4
103#define SCSI_DEBUG_OPT_RECOVERED_ERR 8 109#define SCSI_DEBUG_OPT_RECOVERED_ERR 8
104#define SCSI_DEBUG_OPT_TRANSPORT_ERR 16 110#define SCSI_DEBUG_OPT_TRANSPORT_ERR 16
111#define SCSI_DEBUG_OPT_DIF_ERR 32
112#define SCSI_DEBUG_OPT_DIX_ERR 64
105/* When "every_nth" > 0 then modulo "every_nth" commands: 113/* When "every_nth" > 0 then modulo "every_nth" commands:
106 * - a no response is simulated if SCSI_DEBUG_OPT_TIMEOUT is set 114 * - a no response is simulated if SCSI_DEBUG_OPT_TIMEOUT is set
107 * - a RECOVERED_ERROR is simulated on successful read and write 115 * - a RECOVERED_ERROR is simulated on successful read and write
@@ -144,6 +152,10 @@ static int scsi_debug_virtual_gb = DEF_VIRTUAL_GB;
144static int scsi_debug_fake_rw = DEF_FAKE_RW; 152static int scsi_debug_fake_rw = DEF_FAKE_RW;
145static int scsi_debug_vpd_use_hostno = DEF_VPD_USE_HOSTNO; 153static int scsi_debug_vpd_use_hostno = DEF_VPD_USE_HOSTNO;
146static int scsi_debug_sector_size = DEF_SECTOR_SIZE; 154static int scsi_debug_sector_size = DEF_SECTOR_SIZE;
155static int scsi_debug_dix = DEF_DIX;
156static int scsi_debug_dif = DEF_DIF;
157static int scsi_debug_guard = DEF_GUARD;
158static int scsi_debug_ato = DEF_ATO;
147 159
148static int scsi_debug_cmnd_count = 0; 160static int scsi_debug_cmnd_count = 0;
149 161
@@ -204,11 +216,15 @@ struct sdebug_queued_cmd {
204static struct sdebug_queued_cmd queued_arr[SCSI_DEBUG_CANQUEUE]; 216static struct sdebug_queued_cmd queued_arr[SCSI_DEBUG_CANQUEUE];
205 217
206static unsigned char * fake_storep; /* ramdisk storage */ 218static unsigned char * fake_storep; /* ramdisk storage */
219static unsigned char *dif_storep; /* protection info */
207 220
208static int num_aborts = 0; 221static int num_aborts = 0;
209static int num_dev_resets = 0; 222static int num_dev_resets = 0;
210static int num_bus_resets = 0; 223static int num_bus_resets = 0;
211static int num_host_resets = 0; 224static int num_host_resets = 0;
225static int dix_writes;
226static int dix_reads;
227static int dif_errors;
212 228
213static DEFINE_SPINLOCK(queued_arr_lock); 229static DEFINE_SPINLOCK(queued_arr_lock);
214static DEFINE_RWLOCK(atomic_rw); 230static DEFINE_RWLOCK(atomic_rw);
@@ -217,6 +233,11 @@ static char sdebug_proc_name[] = "scsi_debug";
217 233
218static struct bus_type pseudo_lld_bus; 234static struct bus_type pseudo_lld_bus;
219 235
236static inline sector_t dif_offset(sector_t sector)
237{
238 return sector << 3;
239}
240
220static struct device_driver sdebug_driverfs_driver = { 241static struct device_driver sdebug_driverfs_driver = {
221 .name = sdebug_proc_name, 242 .name = sdebug_proc_name,
222 .bus = &pseudo_lld_bus, 243 .bus = &pseudo_lld_bus,
@@ -225,6 +246,9 @@ static struct device_driver sdebug_driverfs_driver = {
225static const int check_condition_result = 246static const int check_condition_result =
226 (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION; 247 (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
227 248
249static const int illegal_condition_result =
250 (DRIVER_SENSE << 24) | (DID_ABORT << 16) | SAM_STAT_CHECK_CONDITION;
251
228static unsigned char ctrl_m_pg[] = {0xa, 10, 2, 0, 0, 0, 0, 0, 252static unsigned char ctrl_m_pg[] = {0xa, 10, 2, 0, 0, 0, 0, 0,
229 0, 0, 0x2, 0x4b}; 253 0, 0, 0x2, 0x4b};
230static unsigned char iec_m_pg[] = {0x1c, 0xa, 0x08, 0, 0, 0, 0, 0, 254static unsigned char iec_m_pg[] = {0x1c, 0xa, 0x08, 0, 0, 0, 0, 0,
@@ -726,7 +750,12 @@ static int resp_inquiry(struct scsi_cmnd * scp, int target,
726 } else if (0x86 == cmd[2]) { /* extended inquiry */ 750 } else if (0x86 == cmd[2]) { /* extended inquiry */
727 arr[1] = cmd[2]; /*sanity */ 751 arr[1] = cmd[2]; /*sanity */
728 arr[3] = 0x3c; /* number of following entries */ 752 arr[3] = 0x3c; /* number of following entries */
729 arr[4] = 0x0; /* no protection stuff */ 753 if (scsi_debug_dif == SD_DIF_TYPE3_PROTECTION)
754 arr[4] = 0x4; /* SPT: GRD_CHK:1 */
755 else if (scsi_debug_dif)
756 arr[4] = 0x5; /* SPT: GRD_CHK:1, REF_CHK:1 */
757 else
758 arr[4] = 0x0; /* no protection stuff */
730 arr[5] = 0x7; /* head of q, ordered + simple q's */ 759 arr[5] = 0x7; /* head of q, ordered + simple q's */
731 } else if (0x87 == cmd[2]) { /* mode page policy */ 760 } else if (0x87 == cmd[2]) { /* mode page policy */
732 arr[1] = cmd[2]; /*sanity */ 761 arr[1] = cmd[2]; /*sanity */
@@ -767,6 +796,7 @@ static int resp_inquiry(struct scsi_cmnd * scp, int target,
767 arr[2] = scsi_debug_scsi_level; 796 arr[2] = scsi_debug_scsi_level;
768 arr[3] = 2; /* response_data_format==2 */ 797 arr[3] = 2; /* response_data_format==2 */
769 arr[4] = SDEBUG_LONG_INQ_SZ - 5; 798 arr[4] = SDEBUG_LONG_INQ_SZ - 5;
799 arr[5] = scsi_debug_dif ? 1 : 0; /* PROTECT bit */
770 if (0 == scsi_debug_vpd_use_hostno) 800 if (0 == scsi_debug_vpd_use_hostno)
771 arr[5] = 0x10; /* claim: implicit TGPS */ 801 arr[5] = 0x10; /* claim: implicit TGPS */
772 arr[6] = 0x10; /* claim: MultiP */ 802 arr[6] = 0x10; /* claim: MultiP */
@@ -915,6 +945,12 @@ static int resp_readcap16(struct scsi_cmnd * scp,
915 arr[9] = (scsi_debug_sector_size >> 16) & 0xff; 945 arr[9] = (scsi_debug_sector_size >> 16) & 0xff;
916 arr[10] = (scsi_debug_sector_size >> 8) & 0xff; 946 arr[10] = (scsi_debug_sector_size >> 8) & 0xff;
917 arr[11] = scsi_debug_sector_size & 0xff; 947 arr[11] = scsi_debug_sector_size & 0xff;
948
949 if (scsi_debug_dif) {
950 arr[12] = (scsi_debug_dif - 1) << 1; /* P_TYPE */
951 arr[12] |= 1; /* PROT_EN */
952 }
953
918 return fill_from_dev_buffer(scp, arr, 954 return fill_from_dev_buffer(scp, arr,
919 min(alloc_len, SDEBUG_READCAP16_ARR_SZ)); 955 min(alloc_len, SDEBUG_READCAP16_ARR_SZ));
920} 956}
@@ -1066,6 +1102,10 @@ static int resp_ctrl_m_pg(unsigned char * p, int pcontrol, int target)
1066 ctrl_m_pg[2] |= 0x4; 1102 ctrl_m_pg[2] |= 0x4;
1067 else 1103 else
1068 ctrl_m_pg[2] &= ~0x4; 1104 ctrl_m_pg[2] &= ~0x4;
1105
1106 if (scsi_debug_ato)
1107 ctrl_m_pg[5] |= 0x80; /* ATO=1 */
1108
1069 memcpy(p, ctrl_m_pg, sizeof(ctrl_m_pg)); 1109 memcpy(p, ctrl_m_pg, sizeof(ctrl_m_pg));
1070 if (1 == pcontrol) 1110 if (1 == pcontrol)
1071 memcpy(p + 2, ch_ctrl_m_pg, sizeof(ch_ctrl_m_pg)); 1111 memcpy(p + 2, ch_ctrl_m_pg, sizeof(ch_ctrl_m_pg));
@@ -1536,6 +1576,87 @@ static int do_device_access(struct scsi_cmnd *scmd,
1536 return ret; 1576 return ret;
1537} 1577}
1538 1578
1579static int prot_verify_read(struct scsi_cmnd *SCpnt, sector_t start_sec,
1580 unsigned int sectors)
1581{
1582 unsigned int i, resid;
1583 struct scatterlist *psgl;
1584 struct sd_dif_tuple *sdt;
1585 sector_t sector;
1586 sector_t tmp_sec = start_sec;
1587 void *paddr;
1588
1589 start_sec = do_div(tmp_sec, sdebug_store_sectors);
1590
1591 sdt = (struct sd_dif_tuple *)(dif_storep + dif_offset(start_sec));
1592
1593 for (i = 0 ; i < sectors ; i++) {
1594 u16 csum;
1595
1596 if (sdt[i].app_tag == 0xffff)
1597 continue;
1598
1599 sector = start_sec + i;
1600
1601 switch (scsi_debug_guard) {
1602 case 1:
1603 csum = ip_compute_csum(fake_storep +
1604 sector * scsi_debug_sector_size,
1605 scsi_debug_sector_size);
1606 break;
1607 case 0:
1608 csum = crc_t10dif(fake_storep +
1609 sector * scsi_debug_sector_size,
1610 scsi_debug_sector_size);
1611 csum = cpu_to_be16(csum);
1612 break;
1613 default:
1614 BUG();
1615 }
1616
1617 if (sdt[i].guard_tag != csum) {
1618 printk(KERN_ERR "%s: GUARD check failed on sector %lu" \
1619 " rcvd 0x%04x, data 0x%04x\n", __func__,
1620 (unsigned long)sector,
1621 be16_to_cpu(sdt[i].guard_tag),
1622 be16_to_cpu(csum));
1623 dif_errors++;
1624 return 0x01;
1625 }
1626
1627 if (scsi_debug_dif != SD_DIF_TYPE3_PROTECTION &&
1628 be32_to_cpu(sdt[i].ref_tag) != (sector & 0xffffffff)) {
1629 printk(KERN_ERR "%s: REF check failed on sector %lu\n",
1630 __func__, (unsigned long)sector);
1631 dif_errors++;
1632 return 0x03;
1633 }
1634 }
1635
1636 resid = sectors * 8; /* Bytes of protection data to copy into sgl */
1637 sector = start_sec;
1638
1639 scsi_for_each_prot_sg(SCpnt, psgl, scsi_prot_sg_count(SCpnt), i) {
1640 int len = min(psgl->length, resid);
1641
1642 paddr = kmap_atomic(sg_page(psgl), KM_IRQ0) + psgl->offset;
1643 memcpy(paddr, dif_storep + dif_offset(sector), len);
1644
1645 sector += len >> 3;
1646 if (sector >= sdebug_store_sectors) {
1647 /* Force wrap */
1648 tmp_sec = sector;
1649 sector = do_div(tmp_sec, sdebug_store_sectors);
1650 }
1651 resid -= len;
1652 kunmap_atomic(paddr, KM_IRQ0);
1653 }
1654
1655 dix_reads++;
1656
1657 return 0;
1658}
1659
1539static int resp_read(struct scsi_cmnd *SCpnt, unsigned long long lba, 1660static int resp_read(struct scsi_cmnd *SCpnt, unsigned long long lba,
1540 unsigned int num, struct sdebug_dev_info *devip) 1661 unsigned int num, struct sdebug_dev_info *devip)
1541{ 1662{
@@ -1563,12 +1684,162 @@ static int resp_read(struct scsi_cmnd *SCpnt, unsigned long long lba,
1563 } 1684 }
1564 return check_condition_result; 1685 return check_condition_result;
1565 } 1686 }
1687
1688 /* DIX + T10 DIF */
1689 if (scsi_debug_dix && scsi_prot_sg_count(SCpnt)) {
1690 int prot_ret = prot_verify_read(SCpnt, lba, num);
1691
1692 if (prot_ret) {
1693 mk_sense_buffer(devip, ABORTED_COMMAND, 0x10, prot_ret);
1694 return illegal_condition_result;
1695 }
1696 }
1697
1566 read_lock_irqsave(&atomic_rw, iflags); 1698 read_lock_irqsave(&atomic_rw, iflags);
1567 ret = do_device_access(SCpnt, devip, lba, num, 0); 1699 ret = do_device_access(SCpnt, devip, lba, num, 0);
1568 read_unlock_irqrestore(&atomic_rw, iflags); 1700 read_unlock_irqrestore(&atomic_rw, iflags);
1569 return ret; 1701 return ret;
1570} 1702}
1571 1703
1704void dump_sector(unsigned char *buf, int len)
1705{
1706 int i, j;
1707
1708 printk(KERN_ERR ">>> Sector Dump <<<\n");
1709
1710 for (i = 0 ; i < len ; i += 16) {
1711 printk(KERN_ERR "%04d: ", i);
1712
1713 for (j = 0 ; j < 16 ; j++) {
1714 unsigned char c = buf[i+j];
1715 if (c >= 0x20 && c < 0x7e)
1716 printk(" %c ", buf[i+j]);
1717 else
1718 printk("%02x ", buf[i+j]);
1719 }
1720
1721 printk("\n");
1722 }
1723}
1724
1725static int prot_verify_write(struct scsi_cmnd *SCpnt, sector_t start_sec,
1726 unsigned int sectors)
1727{
1728 int i, j, ret;
1729 struct sd_dif_tuple *sdt;
1730 struct scatterlist *dsgl = scsi_sglist(SCpnt);
1731 struct scatterlist *psgl = scsi_prot_sglist(SCpnt);
1732 void *daddr, *paddr;
1733 sector_t tmp_sec = start_sec;
1734 sector_t sector;
1735 int ppage_offset;
1736 unsigned short csum;
1737
1738 sector = do_div(tmp_sec, sdebug_store_sectors);
1739
1740 if (((SCpnt->cmnd[1] >> 5) & 7) != 1) {
1741 printk(KERN_WARNING "scsi_debug: WRPROTECT != 1\n");
1742 return 0;
1743 }
1744
1745 BUG_ON(scsi_sg_count(SCpnt) == 0);
1746 BUG_ON(scsi_prot_sg_count(SCpnt) == 0);
1747
1748 paddr = kmap_atomic(sg_page(psgl), KM_IRQ1) + psgl->offset;
1749 ppage_offset = 0;
1750
1751 /* For each data page */
1752 scsi_for_each_sg(SCpnt, dsgl, scsi_sg_count(SCpnt), i) {
1753 daddr = kmap_atomic(sg_page(dsgl), KM_IRQ0) + dsgl->offset;
1754
1755 /* For each sector-sized chunk in data page */
1756 for (j = 0 ; j < dsgl->length ; j += scsi_debug_sector_size) {
1757
1758 /* If we're at the end of the current
1759 * protection page advance to the next one
1760 */
1761 if (ppage_offset >= psgl->length) {
1762 kunmap_atomic(paddr, KM_IRQ1);
1763 psgl = sg_next(psgl);
1764 BUG_ON(psgl == NULL);
1765 paddr = kmap_atomic(sg_page(psgl), KM_IRQ1)
1766 + psgl->offset;
1767 ppage_offset = 0;
1768 }
1769
1770 sdt = paddr + ppage_offset;
1771
1772 switch (scsi_debug_guard) {
1773 case 1:
1774 csum = ip_compute_csum(daddr,
1775 scsi_debug_sector_size);
1776 break;
1777 case 0:
1778 csum = cpu_to_be16(crc_t10dif(daddr,
1779 scsi_debug_sector_size));
1780 break;
1781 default:
1782 BUG();
1783 ret = 0;
1784 goto out;
1785 }
1786
1787 if (sdt->guard_tag != csum) {
1788 printk(KERN_ERR
1789 "%s: GUARD check failed on sector %lu " \
1790 "rcvd 0x%04x, calculated 0x%04x\n",
1791 __func__, (unsigned long)sector,
1792 be16_to_cpu(sdt->guard_tag),
1793 be16_to_cpu(csum));
1794 ret = 0x01;
1795 dump_sector(daddr, scsi_debug_sector_size);
1796 goto out;
1797 }
1798
1799 if (scsi_debug_dif != SD_DIF_TYPE3_PROTECTION &&
1800 be32_to_cpu(sdt->ref_tag)
1801 != (start_sec & 0xffffffff)) {
1802 printk(KERN_ERR
1803 "%s: REF check failed on sector %lu\n",
1804 __func__, (unsigned long)sector);
1805 ret = 0x03;
1806 dump_sector(daddr, scsi_debug_sector_size);
1807 goto out;
1808 }
1809
1810 /* Would be great to copy this in bigger
1811 * chunks. However, for the sake of
1812 * correctness we need to verify each sector
1813 * before writing it to "stable" storage
1814 */
1815 memcpy(dif_storep + dif_offset(sector), sdt, 8);
1816
1817 sector++;
1818
1819 if (sector == sdebug_store_sectors)
1820 sector = 0; /* Force wrap */
1821
1822 start_sec++;
1823 daddr += scsi_debug_sector_size;
1824 ppage_offset += sizeof(struct sd_dif_tuple);
1825 }
1826
1827 kunmap_atomic(daddr, KM_IRQ0);
1828 }
1829
1830 kunmap_atomic(paddr, KM_IRQ1);
1831
1832 dix_writes++;
1833
1834 return 0;
1835
1836out:
1837 dif_errors++;
1838 kunmap_atomic(daddr, KM_IRQ0);
1839 kunmap_atomic(paddr, KM_IRQ1);
1840 return ret;
1841}
1842
1572static int resp_write(struct scsi_cmnd *SCpnt, unsigned long long lba, 1843static int resp_write(struct scsi_cmnd *SCpnt, unsigned long long lba,
1573 unsigned int num, struct sdebug_dev_info *devip) 1844 unsigned int num, struct sdebug_dev_info *devip)
1574{ 1845{
@@ -1579,6 +1850,16 @@ static int resp_write(struct scsi_cmnd *SCpnt, unsigned long long lba,
1579 if (ret) 1850 if (ret)
1580 return ret; 1851 return ret;
1581 1852
1853 /* DIX + T10 DIF */
1854 if (scsi_debug_dix && scsi_prot_sg_count(SCpnt)) {
1855 int prot_ret = prot_verify_write(SCpnt, lba, num);
1856
1857 if (prot_ret) {
1858 mk_sense_buffer(devip, ILLEGAL_REQUEST, 0x10, prot_ret);
1859 return illegal_condition_result;
1860 }
1861 }
1862
1582 write_lock_irqsave(&atomic_rw, iflags); 1863 write_lock_irqsave(&atomic_rw, iflags);
1583 ret = do_device_access(SCpnt, devip, lba, num, 1); 1864 ret = do_device_access(SCpnt, devip, lba, num, 1);
1584 write_unlock_irqrestore(&atomic_rw, iflags); 1865 write_unlock_irqrestore(&atomic_rw, iflags);
@@ -2095,6 +2376,10 @@ module_param_named(virtual_gb, scsi_debug_virtual_gb, int, S_IRUGO | S_IWUSR);
2095module_param_named(vpd_use_hostno, scsi_debug_vpd_use_hostno, int, 2376module_param_named(vpd_use_hostno, scsi_debug_vpd_use_hostno, int,
2096 S_IRUGO | S_IWUSR); 2377 S_IRUGO | S_IWUSR);
2097module_param_named(sector_size, scsi_debug_sector_size, int, S_IRUGO); 2378module_param_named(sector_size, scsi_debug_sector_size, int, S_IRUGO);
2379module_param_named(dix, scsi_debug_dix, int, S_IRUGO);
2380module_param_named(dif, scsi_debug_dif, int, S_IRUGO);
2381module_param_named(guard, scsi_debug_guard, int, S_IRUGO);
2382module_param_named(ato, scsi_debug_ato, int, S_IRUGO);
2098 2383
2099MODULE_AUTHOR("Eric Youngdale + Douglas Gilbert"); 2384MODULE_AUTHOR("Eric Youngdale + Douglas Gilbert");
2100MODULE_DESCRIPTION("SCSI debug adapter driver"); 2385MODULE_DESCRIPTION("SCSI debug adapter driver");
@@ -2117,7 +2402,10 @@ MODULE_PARM_DESC(scsi_level, "SCSI level to simulate(def=5[SPC-3])");
2117MODULE_PARM_DESC(virtual_gb, "virtual gigabyte size (def=0 -> use dev_size_mb)"); 2402MODULE_PARM_DESC(virtual_gb, "virtual gigabyte size (def=0 -> use dev_size_mb)");
2118MODULE_PARM_DESC(vpd_use_hostno, "0 -> dev ids ignore hostno (def=1 -> unique dev ids)"); 2403MODULE_PARM_DESC(vpd_use_hostno, "0 -> dev ids ignore hostno (def=1 -> unique dev ids)");
2119MODULE_PARM_DESC(sector_size, "hardware sector size in bytes (def=512)"); 2404MODULE_PARM_DESC(sector_size, "hardware sector size in bytes (def=512)");
2120 2405MODULE_PARM_DESC(dix, "data integrity extensions mask (def=0)");
2406MODULE_PARM_DESC(dif, "data integrity field type: 0-3 (def=0)");
2407MODULE_PARM_DESC(guard, "protection checksum: 0=crc, 1=ip (def=0)");
2408MODULE_PARM_DESC(ato, "application tag ownership: 0=disk 1=host (def=1)");
2121 2409
2122static char sdebug_info[256]; 2410static char sdebug_info[256];
2123 2411
@@ -2164,14 +2452,14 @@ static int scsi_debug_proc_info(struct Scsi_Host *host, char *buffer, char **sta
2164 "delay=%d, max_luns=%d, scsi_level=%d\n" 2452 "delay=%d, max_luns=%d, scsi_level=%d\n"
2165 "sector_size=%d bytes, cylinders=%d, heads=%d, sectors=%d\n" 2453 "sector_size=%d bytes, cylinders=%d, heads=%d, sectors=%d\n"
2166 "number of aborts=%d, device_reset=%d, bus_resets=%d, " 2454 "number of aborts=%d, device_reset=%d, bus_resets=%d, "
2167 "host_resets=%d\n", 2455 "host_resets=%d\ndix_reads=%d dix_writes=%d dif_errors=%d\n",
2168 SCSI_DEBUG_VERSION, scsi_debug_version_date, scsi_debug_num_tgts, 2456 SCSI_DEBUG_VERSION, scsi_debug_version_date, scsi_debug_num_tgts,
2169 scsi_debug_dev_size_mb, scsi_debug_opts, scsi_debug_every_nth, 2457 scsi_debug_dev_size_mb, scsi_debug_opts, scsi_debug_every_nth,
2170 scsi_debug_cmnd_count, scsi_debug_delay, 2458 scsi_debug_cmnd_count, scsi_debug_delay,
2171 scsi_debug_max_luns, scsi_debug_scsi_level, 2459 scsi_debug_max_luns, scsi_debug_scsi_level,
2172 scsi_debug_sector_size, sdebug_cylinders_per, sdebug_heads, 2460 scsi_debug_sector_size, sdebug_cylinders_per, sdebug_heads,
2173 sdebug_sectors_per, num_aborts, num_dev_resets, num_bus_resets, 2461 sdebug_sectors_per, num_aborts, num_dev_resets, num_bus_resets,
2174 num_host_resets); 2462 num_host_resets, dix_reads, dix_writes, dif_errors);
2175 if (pos < offset) { 2463 if (pos < offset) {
2176 len = 0; 2464 len = 0;
2177 begin = pos; 2465 begin = pos;
@@ -2452,6 +2740,31 @@ static ssize_t sdebug_sector_size_show(struct device_driver * ddp, char * buf)
2452} 2740}
2453DRIVER_ATTR(sector_size, S_IRUGO, sdebug_sector_size_show, NULL); 2741DRIVER_ATTR(sector_size, S_IRUGO, sdebug_sector_size_show, NULL);
2454 2742
2743static ssize_t sdebug_dix_show(struct device_driver *ddp, char *buf)
2744{
2745 return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_dix);
2746}
2747DRIVER_ATTR(dix, S_IRUGO, sdebug_dix_show, NULL);
2748
2749static ssize_t sdebug_dif_show(struct device_driver *ddp, char *buf)
2750{
2751 return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_dif);
2752}
2753DRIVER_ATTR(dif, S_IRUGO, sdebug_dif_show, NULL);
2754
2755static ssize_t sdebug_guard_show(struct device_driver *ddp, char *buf)
2756{
2757 return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_guard);
2758}
2759DRIVER_ATTR(guard, S_IRUGO, sdebug_guard_show, NULL);
2760
2761static ssize_t sdebug_ato_show(struct device_driver *ddp, char *buf)
2762{
2763 return scnprintf(buf, PAGE_SIZE, "%d\n", scsi_debug_ato);
2764}
2765DRIVER_ATTR(ato, S_IRUGO, sdebug_ato_show, NULL);
2766
2767
2455/* Note: The following function creates attribute files in the 2768/* Note: The following function creates attribute files in the
2456 /sys/bus/pseudo/drivers/scsi_debug directory. The advantage of these 2769 /sys/bus/pseudo/drivers/scsi_debug directory. The advantage of these
2457 files (over those found in the /sys/module/scsi_debug/parameters 2770 files (over those found in the /sys/module/scsi_debug/parameters
@@ -2478,11 +2791,19 @@ static int do_create_driverfs_files(void)
2478 ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_virtual_gb); 2791 ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_virtual_gb);
2479 ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_vpd_use_hostno); 2792 ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_vpd_use_hostno);
2480 ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_sector_size); 2793 ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_sector_size);
2794 ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_dix);
2795 ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_dif);
2796 ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_guard);
2797 ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_ato);
2481 return ret; 2798 return ret;
2482} 2799}
2483 2800
2484static void do_remove_driverfs_files(void) 2801static void do_remove_driverfs_files(void)
2485{ 2802{
2803 driver_remove_file(&sdebug_driverfs_driver, &driver_attr_ato);
2804 driver_remove_file(&sdebug_driverfs_driver, &driver_attr_guard);
2805 driver_remove_file(&sdebug_driverfs_driver, &driver_attr_dif);
2806 driver_remove_file(&sdebug_driverfs_driver, &driver_attr_dix);
2486 driver_remove_file(&sdebug_driverfs_driver, &driver_attr_sector_size); 2807 driver_remove_file(&sdebug_driverfs_driver, &driver_attr_sector_size);
2487 driver_remove_file(&sdebug_driverfs_driver, &driver_attr_vpd_use_hostno); 2808 driver_remove_file(&sdebug_driverfs_driver, &driver_attr_vpd_use_hostno);
2488 driver_remove_file(&sdebug_driverfs_driver, &driver_attr_virtual_gb); 2809 driver_remove_file(&sdebug_driverfs_driver, &driver_attr_virtual_gb);
@@ -2526,11 +2847,33 @@ static int __init scsi_debug_init(void)
2526 case 4096: 2847 case 4096:
2527 break; 2848 break;
2528 default: 2849 default:
2529 printk(KERN_ERR "scsi_debug_init: invalid sector_size %u\n", 2850 printk(KERN_ERR "scsi_debug_init: invalid sector_size %d\n",
2530 scsi_debug_sector_size); 2851 scsi_debug_sector_size);
2531 return -EINVAL; 2852 return -EINVAL;
2532 } 2853 }
2533 2854
2855 switch (scsi_debug_dif) {
2856
2857 case SD_DIF_TYPE0_PROTECTION:
2858 case SD_DIF_TYPE1_PROTECTION:
2859 case SD_DIF_TYPE3_PROTECTION:
2860 break;
2861
2862 default:
2863 printk(KERN_ERR "scsi_debug_init: dif must be 0, 1 or 3\n");
2864 return -EINVAL;
2865 }
2866
2867 if (scsi_debug_guard > 1) {
2868 printk(KERN_ERR "scsi_debug_init: guard must be 0 or 1\n");
2869 return -EINVAL;
2870 }
2871
2872 if (scsi_debug_ato > 1) {
2873 printk(KERN_ERR "scsi_debug_init: ato must be 0 or 1\n");
2874 return -EINVAL;
2875 }
2876
2534 if (scsi_debug_dev_size_mb < 1) 2877 if (scsi_debug_dev_size_mb < 1)
2535 scsi_debug_dev_size_mb = 1; /* force minimum 1 MB ramdisk */ 2878 scsi_debug_dev_size_mb = 1; /* force minimum 1 MB ramdisk */
2536 sz = (unsigned long)scsi_debug_dev_size_mb * 1048576; 2879 sz = (unsigned long)scsi_debug_dev_size_mb * 1048576;
@@ -2563,6 +2906,24 @@ static int __init scsi_debug_init(void)
2563 if (scsi_debug_num_parts > 0) 2906 if (scsi_debug_num_parts > 0)
2564 sdebug_build_parts(fake_storep, sz); 2907 sdebug_build_parts(fake_storep, sz);
2565 2908
2909 if (scsi_debug_dif) {
2910 int dif_size;
2911
2912 dif_size = sdebug_store_sectors * sizeof(struct sd_dif_tuple);
2913 dif_storep = vmalloc(dif_size);
2914
2915 printk(KERN_ERR "scsi_debug_init: dif_storep %u bytes @ %p\n",
2916 dif_size, dif_storep);
2917
2918 if (dif_storep == NULL) {
2919 printk(KERN_ERR "scsi_debug_init: out of mem. (DIX)\n");
2920 ret = -ENOMEM;
2921 goto free_vm;
2922 }
2923
2924 memset(dif_storep, 0xff, dif_size);
2925 }
2926
2566 ret = device_register(&pseudo_primary); 2927 ret = device_register(&pseudo_primary);
2567 if (ret < 0) { 2928 if (ret < 0) {
2568 printk(KERN_WARNING "scsi_debug: device_register error: %d\n", 2929 printk(KERN_WARNING "scsi_debug: device_register error: %d\n",
@@ -2615,6 +2976,8 @@ bus_unreg:
2615dev_unreg: 2976dev_unreg:
2616 device_unregister(&pseudo_primary); 2977 device_unregister(&pseudo_primary);
2617free_vm: 2978free_vm:
2979 if (dif_storep)
2980 vfree(dif_storep);
2618 vfree(fake_storep); 2981 vfree(fake_storep);
2619 2982
2620 return ret; 2983 return ret;
@@ -2632,6 +2995,9 @@ static void __exit scsi_debug_exit(void)
2632 bus_unregister(&pseudo_lld_bus); 2995 bus_unregister(&pseudo_lld_bus);
2633 device_unregister(&pseudo_primary); 2996 device_unregister(&pseudo_primary);
2634 2997
2998 if (dif_storep)
2999 vfree(dif_storep);
3000
2635 vfree(fake_storep); 3001 vfree(fake_storep);
2636} 3002}
2637 3003
@@ -2732,6 +3098,8 @@ int scsi_debug_queuecommand(struct scsi_cmnd *SCpnt, done_funct_t done)
2732 struct sdebug_dev_info *devip = NULL; 3098 struct sdebug_dev_info *devip = NULL;
2733 int inj_recovered = 0; 3099 int inj_recovered = 0;
2734 int inj_transport = 0; 3100 int inj_transport = 0;
3101 int inj_dif = 0;
3102 int inj_dix = 0;
2735 int delay_override = 0; 3103 int delay_override = 0;
2736 3104
2737 scsi_set_resid(SCpnt, 0); 3105 scsi_set_resid(SCpnt, 0);
@@ -2769,6 +3137,10 @@ int scsi_debug_queuecommand(struct scsi_cmnd *SCpnt, done_funct_t done)
2769 inj_recovered = 1; /* to reads and writes below */ 3137 inj_recovered = 1; /* to reads and writes below */
2770 else if (SCSI_DEBUG_OPT_TRANSPORT_ERR & scsi_debug_opts) 3138 else if (SCSI_DEBUG_OPT_TRANSPORT_ERR & scsi_debug_opts)
2771 inj_transport = 1; /* to reads and writes below */ 3139 inj_transport = 1; /* to reads and writes below */
3140 else if (SCSI_DEBUG_OPT_DIF_ERR & scsi_debug_opts)
3141 inj_dif = 1; /* to reads and writes below */
3142 else if (SCSI_DEBUG_OPT_DIX_ERR & scsi_debug_opts)
3143 inj_dix = 1; /* to reads and writes below */
2772 } 3144 }
2773 3145
2774 if (devip->wlun) { 3146 if (devip->wlun) {
@@ -2870,6 +3242,12 @@ int scsi_debug_queuecommand(struct scsi_cmnd *SCpnt, done_funct_t done)
2870 mk_sense_buffer(devip, ABORTED_COMMAND, 3242 mk_sense_buffer(devip, ABORTED_COMMAND,
2871 TRANSPORT_PROBLEM, ACK_NAK_TO); 3243 TRANSPORT_PROBLEM, ACK_NAK_TO);
2872 errsts = check_condition_result; 3244 errsts = check_condition_result;
3245 } else if (inj_dif && (0 == errsts)) {
3246 mk_sense_buffer(devip, ABORTED_COMMAND, 0x10, 1);
3247 errsts = illegal_condition_result;
3248 } else if (inj_dix && (0 == errsts)) {
3249 mk_sense_buffer(devip, ILLEGAL_REQUEST, 0x10, 1);
3250 errsts = illegal_condition_result;
2873 } 3251 }
2874 break; 3252 break;
2875 case REPORT_LUNS: /* mandatory, ignore unit attention */ 3253 case REPORT_LUNS: /* mandatory, ignore unit attention */
@@ -2894,6 +3272,12 @@ int scsi_debug_queuecommand(struct scsi_cmnd *SCpnt, done_funct_t done)
2894 mk_sense_buffer(devip, RECOVERED_ERROR, 3272 mk_sense_buffer(devip, RECOVERED_ERROR,
2895 THRESHOLD_EXCEEDED, 0); 3273 THRESHOLD_EXCEEDED, 0);
2896 errsts = check_condition_result; 3274 errsts = check_condition_result;
3275 } else if (inj_dif && (0 == errsts)) {
3276 mk_sense_buffer(devip, ABORTED_COMMAND, 0x10, 1);
3277 errsts = illegal_condition_result;
3278 } else if (inj_dix && (0 == errsts)) {
3279 mk_sense_buffer(devip, ILLEGAL_REQUEST, 0x10, 1);
3280 errsts = illegal_condition_result;
2897 } 3281 }
2898 break; 3282 break;
2899 case MODE_SENSE: 3283 case MODE_SENSE:
@@ -2982,6 +3366,7 @@ static int sdebug_driver_probe(struct device * dev)
2982 int error = 0; 3366 int error = 0;
2983 struct sdebug_host_info *sdbg_host; 3367 struct sdebug_host_info *sdbg_host;
2984 struct Scsi_Host *hpnt; 3368 struct Scsi_Host *hpnt;
3369 int host_prot;
2985 3370
2986 sdbg_host = to_sdebug_host(dev); 3371 sdbg_host = to_sdebug_host(dev);
2987 3372
@@ -3000,6 +3385,50 @@ static int sdebug_driver_probe(struct device * dev)
3000 hpnt->max_id = scsi_debug_num_tgts; 3385 hpnt->max_id = scsi_debug_num_tgts;
3001 hpnt->max_lun = SAM2_WLUN_REPORT_LUNS; /* = scsi_debug_max_luns; */ 3386 hpnt->max_lun = SAM2_WLUN_REPORT_LUNS; /* = scsi_debug_max_luns; */
3002 3387
3388 host_prot = 0;
3389
3390 switch (scsi_debug_dif) {
3391
3392 case SD_DIF_TYPE1_PROTECTION:
3393 host_prot = SHOST_DIF_TYPE1_PROTECTION;
3394 if (scsi_debug_dix)
3395 host_prot |= SHOST_DIX_TYPE1_PROTECTION;
3396 break;
3397
3398 case SD_DIF_TYPE2_PROTECTION:
3399 host_prot = SHOST_DIF_TYPE2_PROTECTION;
3400 if (scsi_debug_dix)
3401 host_prot |= SHOST_DIX_TYPE2_PROTECTION;
3402 break;
3403
3404 case SD_DIF_TYPE3_PROTECTION:
3405 host_prot = SHOST_DIF_TYPE3_PROTECTION;
3406 if (scsi_debug_dix)
3407 host_prot |= SHOST_DIX_TYPE3_PROTECTION;
3408 break;
3409
3410 default:
3411 if (scsi_debug_dix)
3412 host_prot |= SHOST_DIX_TYPE0_PROTECTION;
3413 break;
3414 }
3415
3416 scsi_host_set_prot(hpnt, host_prot);
3417
3418 printk(KERN_INFO "scsi_debug: host protection%s%s%s%s%s%s%s\n",
3419 (host_prot & SHOST_DIF_TYPE1_PROTECTION) ? " DIF1" : "",
3420 (host_prot & SHOST_DIF_TYPE2_PROTECTION) ? " DIF2" : "",
3421 (host_prot & SHOST_DIF_TYPE3_PROTECTION) ? " DIF3" : "",
3422 (host_prot & SHOST_DIX_TYPE0_PROTECTION) ? " DIX0" : "",
3423 (host_prot & SHOST_DIX_TYPE1_PROTECTION) ? " DIX1" : "",
3424 (host_prot & SHOST_DIX_TYPE2_PROTECTION) ? " DIX2" : "",
3425 (host_prot & SHOST_DIX_TYPE3_PROTECTION) ? " DIX3" : "");
3426
3427 if (scsi_debug_guard == 1)
3428 scsi_host_set_guard(hpnt, SHOST_DIX_GUARD_IP);
3429 else
3430 scsi_host_set_guard(hpnt, SHOST_DIX_GUARD_CRC);
3431
3003 error = scsi_add_host(hpnt, &sdbg_host->dev); 3432 error = scsi_add_host(hpnt, &sdbg_host->dev);
3004 if (error) { 3433 if (error) {
3005 printk(KERN_ERR "%s: scsi_add_host failed\n", __func__); 3434 printk(KERN_ERR "%s: scsi_add_host failed\n", __func__);
diff --git a/drivers/scsi/scsi_error.c b/drivers/scsi/scsi_error.c
index ad6a1370761e..0c2c73be1974 100644
--- a/drivers/scsi/scsi_error.c
+++ b/drivers/scsi/scsi_error.c
@@ -1441,6 +1441,11 @@ int scsi_decide_disposition(struct scsi_cmnd *scmd)
1441 } 1441 }
1442} 1442}
1443 1443
1444static void eh_lock_door_done(struct request *req, int uptodate)
1445{
1446 __blk_put_request(req->q, req);
1447}
1448
1444/** 1449/**
1445 * scsi_eh_lock_door - Prevent medium removal for the specified device 1450 * scsi_eh_lock_door - Prevent medium removal for the specified device
1446 * @sdev: SCSI device to prevent medium removal 1451 * @sdev: SCSI device to prevent medium removal
@@ -1463,19 +1468,28 @@ int scsi_decide_disposition(struct scsi_cmnd *scmd)
1463 */ 1468 */
1464static void scsi_eh_lock_door(struct scsi_device *sdev) 1469static void scsi_eh_lock_door(struct scsi_device *sdev)
1465{ 1470{
1466 unsigned char cmnd[MAX_COMMAND_SIZE]; 1471 struct request *req;
1467 1472
1468 cmnd[0] = ALLOW_MEDIUM_REMOVAL; 1473 req = blk_get_request(sdev->request_queue, READ, GFP_KERNEL);
1469 cmnd[1] = 0; 1474 if (!req)
1470 cmnd[2] = 0; 1475 return;
1471 cmnd[3] = 0;
1472 cmnd[4] = SCSI_REMOVAL_PREVENT;
1473 cmnd[5] = 0;
1474 1476
1475 scsi_execute_async(sdev, cmnd, 6, DMA_NONE, NULL, 0, 0, 10 * HZ, 1477 req->cmd[0] = ALLOW_MEDIUM_REMOVAL;
1476 5, NULL, NULL, GFP_KERNEL); 1478 req->cmd[1] = 0;
1477} 1479 req->cmd[2] = 0;
1480 req->cmd[3] = 0;
1481 req->cmd[4] = SCSI_REMOVAL_PREVENT;
1482 req->cmd[5] = 0;
1478 1483
1484 req->cmd_len = COMMAND_SIZE(req->cmd[0]);
1485
1486 req->cmd_type = REQ_TYPE_BLOCK_PC;
1487 req->cmd_flags |= REQ_QUIET;
1488 req->timeout = 10 * HZ;
1489 req->retries = 5;
1490
1491 blk_execute_rq_nowait(req->q, NULL, req, 1, eh_lock_door_done);
1492}
1479 1493
1480/** 1494/**
1481 * scsi_restart_operations - restart io operations to the specified host. 1495 * scsi_restart_operations - restart io operations to the specified host.
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index b82ffd90632e..4b13e36d3aa0 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -277,196 +277,6 @@ int scsi_execute_req(struct scsi_device *sdev, const unsigned char *cmd,
277} 277}
278EXPORT_SYMBOL(scsi_execute_req); 278EXPORT_SYMBOL(scsi_execute_req);
279 279
280struct scsi_io_context {
281 void *data;
282 void (*done)(void *data, char *sense, int result, int resid);
283 char sense[SCSI_SENSE_BUFFERSIZE];
284};
285
286static struct kmem_cache *scsi_io_context_cache;
287
288static void scsi_end_async(struct request *req, int uptodate)
289{
290 struct scsi_io_context *sioc = req->end_io_data;
291
292 if (sioc->done)
293 sioc->done(sioc->data, sioc->sense, req->errors, req->data_len);
294
295 kmem_cache_free(scsi_io_context_cache, sioc);
296 __blk_put_request(req->q, req);
297}
298
299static int scsi_merge_bio(struct request *rq, struct bio *bio)
300{
301 struct request_queue *q = rq->q;
302
303 bio->bi_flags &= ~(1 << BIO_SEG_VALID);
304 if (rq_data_dir(rq) == WRITE)
305 bio->bi_rw |= (1 << BIO_RW);
306 blk_queue_bounce(q, &bio);
307
308 return blk_rq_append_bio(q, rq, bio);
309}
310
311static void scsi_bi_endio(struct bio *bio, int error)
312{
313 bio_put(bio);
314}
315
316/**
317 * scsi_req_map_sg - map a scatterlist into a request
318 * @rq: request to fill
319 * @sgl: scatterlist
320 * @nsegs: number of elements
321 * @bufflen: len of buffer
322 * @gfp: memory allocation flags
323 *
324 * scsi_req_map_sg maps a scatterlist into a request so that the
325 * request can be sent to the block layer. We do not trust the scatterlist
326 * sent to use, as some ULDs use that struct to only organize the pages.
327 */
328static int scsi_req_map_sg(struct request *rq, struct scatterlist *sgl,
329 int nsegs, unsigned bufflen, gfp_t gfp)
330{
331 struct request_queue *q = rq->q;
332 int nr_pages = (bufflen + sgl[0].offset + PAGE_SIZE - 1) >> PAGE_SHIFT;
333 unsigned int data_len = bufflen, len, bytes, off;
334 struct scatterlist *sg;
335 struct page *page;
336 struct bio *bio = NULL;
337 int i, err, nr_vecs = 0;
338
339 for_each_sg(sgl, sg, nsegs, i) {
340 page = sg_page(sg);
341 off = sg->offset;
342 len = sg->length;
343
344 while (len > 0 && data_len > 0) {
345 /*
346 * sg sends a scatterlist that is larger than
347 * the data_len it wants transferred for certain
348 * IO sizes
349 */
350 bytes = min_t(unsigned int, len, PAGE_SIZE - off);
351 bytes = min(bytes, data_len);
352
353 if (!bio) {
354 nr_vecs = min_t(int, BIO_MAX_PAGES, nr_pages);
355 nr_pages -= nr_vecs;
356
357 bio = bio_alloc(gfp, nr_vecs);
358 if (!bio) {
359 err = -ENOMEM;
360 goto free_bios;
361 }
362 bio->bi_end_io = scsi_bi_endio;
363 }
364
365 if (bio_add_pc_page(q, bio, page, bytes, off) !=
366 bytes) {
367 bio_put(bio);
368 err = -EINVAL;
369 goto free_bios;
370 }
371
372 if (bio->bi_vcnt >= nr_vecs) {
373 err = scsi_merge_bio(rq, bio);
374 if (err) {
375 bio_endio(bio, 0);
376 goto free_bios;
377 }
378 bio = NULL;
379 }
380
381 page++;
382 len -= bytes;
383 data_len -=bytes;
384 off = 0;
385 }
386 }
387
388 rq->buffer = rq->data = NULL;
389 rq->data_len = bufflen;
390 return 0;
391
392free_bios:
393 while ((bio = rq->bio) != NULL) {
394 rq->bio = bio->bi_next;
395 /*
396 * call endio instead of bio_put incase it was bounced
397 */
398 bio_endio(bio, 0);
399 }
400
401 return err;
402}
403
404/**
405 * scsi_execute_async - insert request
406 * @sdev: scsi device
407 * @cmd: scsi command
408 * @cmd_len: length of scsi cdb
409 * @data_direction: DMA_TO_DEVICE, DMA_FROM_DEVICE, or DMA_NONE
410 * @buffer: data buffer (this can be a kernel buffer or scatterlist)
411 * @bufflen: len of buffer
412 * @use_sg: if buffer is a scatterlist this is the number of elements
413 * @timeout: request timeout in seconds
414 * @retries: number of times to retry request
415 * @privdata: data passed to done()
416 * @done: callback function when done
417 * @gfp: memory allocation flags
418 */
419int scsi_execute_async(struct scsi_device *sdev, const unsigned char *cmd,
420 int cmd_len, int data_direction, void *buffer, unsigned bufflen,
421 int use_sg, int timeout, int retries, void *privdata,
422 void (*done)(void *, char *, int, int), gfp_t gfp)
423{
424 struct request *req;
425 struct scsi_io_context *sioc;
426 int err = 0;
427 int write = (data_direction == DMA_TO_DEVICE);
428
429 sioc = kmem_cache_zalloc(scsi_io_context_cache, gfp);
430 if (!sioc)
431 return DRIVER_ERROR << 24;
432
433 req = blk_get_request(sdev->request_queue, write, gfp);
434 if (!req)
435 goto free_sense;
436 req->cmd_type = REQ_TYPE_BLOCK_PC;
437 req->cmd_flags |= REQ_QUIET;
438
439 if (use_sg)
440 err = scsi_req_map_sg(req, buffer, use_sg, bufflen, gfp);
441 else if (bufflen)
442 err = blk_rq_map_kern(req->q, req, buffer, bufflen, gfp);
443
444 if (err)
445 goto free_req;
446
447 req->cmd_len = cmd_len;
448 memset(req->cmd, 0, BLK_MAX_CDB); /* ATAPI hates garbage after CDB */
449 memcpy(req->cmd, cmd, req->cmd_len);
450 req->sense = sioc->sense;
451 req->sense_len = 0;
452 req->timeout = timeout;
453 req->retries = retries;
454 req->end_io_data = sioc;
455
456 sioc->data = privdata;
457 sioc->done = done;
458
459 blk_execute_rq_nowait(req->q, NULL, req, 1, scsi_end_async);
460 return 0;
461
462free_req:
463 blk_put_request(req);
464free_sense:
465 kmem_cache_free(scsi_io_context_cache, sioc);
466 return DRIVER_ERROR << 24;
467}
468EXPORT_SYMBOL_GPL(scsi_execute_async);
469
470/* 280/*
471 * Function: scsi_init_cmd_errh() 281 * Function: scsi_init_cmd_errh()
472 * 282 *
@@ -1920,20 +1730,12 @@ int __init scsi_init_queue(void)
1920{ 1730{
1921 int i; 1731 int i;
1922 1732
1923 scsi_io_context_cache = kmem_cache_create("scsi_io_context",
1924 sizeof(struct scsi_io_context),
1925 0, 0, NULL);
1926 if (!scsi_io_context_cache) {
1927 printk(KERN_ERR "SCSI: can't init scsi io context cache\n");
1928 return -ENOMEM;
1929 }
1930
1931 scsi_sdb_cache = kmem_cache_create("scsi_data_buffer", 1733 scsi_sdb_cache = kmem_cache_create("scsi_data_buffer",
1932 sizeof(struct scsi_data_buffer), 1734 sizeof(struct scsi_data_buffer),
1933 0, 0, NULL); 1735 0, 0, NULL);
1934 if (!scsi_sdb_cache) { 1736 if (!scsi_sdb_cache) {
1935 printk(KERN_ERR "SCSI: can't init scsi sdb cache\n"); 1737 printk(KERN_ERR "SCSI: can't init scsi sdb cache\n");
1936 goto cleanup_io_context; 1738 return -ENOMEM;
1937 } 1739 }
1938 1740
1939 for (i = 0; i < SG_MEMPOOL_NR; i++) { 1741 for (i = 0; i < SG_MEMPOOL_NR; i++) {
@@ -1968,8 +1770,6 @@ cleanup_sdb:
1968 kmem_cache_destroy(sgp->slab); 1770 kmem_cache_destroy(sgp->slab);
1969 } 1771 }
1970 kmem_cache_destroy(scsi_sdb_cache); 1772 kmem_cache_destroy(scsi_sdb_cache);
1971cleanup_io_context:
1972 kmem_cache_destroy(scsi_io_context_cache);
1973 1773
1974 return -ENOMEM; 1774 return -ENOMEM;
1975} 1775}
@@ -1978,7 +1778,6 @@ void scsi_exit_queue(void)
1978{ 1778{
1979 int i; 1779 int i;
1980 1780
1981 kmem_cache_destroy(scsi_io_context_cache);
1982 kmem_cache_destroy(scsi_sdb_cache); 1781 kmem_cache_destroy(scsi_sdb_cache);
1983 1782
1984 for (i = 0; i < SG_MEMPOOL_NR; i++) { 1783 for (i = 0; i < SG_MEMPOOL_NR; i++) {
diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c
index 8f4de20c9deb..a14d245a66b8 100644
--- a/drivers/scsi/scsi_scan.c
+++ b/drivers/scsi/scsi_scan.c
@@ -797,6 +797,7 @@ static int scsi_add_lun(struct scsi_device *sdev, unsigned char *inq_result,
797 case TYPE_ENCLOSURE: 797 case TYPE_ENCLOSURE:
798 case TYPE_COMM: 798 case TYPE_COMM:
799 case TYPE_RAID: 799 case TYPE_RAID:
800 case TYPE_OSD:
800 sdev->writeable = 1; 801 sdev->writeable = 1;
801 break; 802 break;
802 case TYPE_ROM: 803 case TYPE_ROM:
diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c
index da63802cbf9d..fa4711d12744 100644
--- a/drivers/scsi/scsi_sysfs.c
+++ b/drivers/scsi/scsi_sysfs.c
@@ -1043,7 +1043,6 @@ EXPORT_SYMBOL(scsi_register_interface);
1043/** 1043/**
1044 * scsi_sysfs_add_host - add scsi host to subsystem 1044 * scsi_sysfs_add_host - add scsi host to subsystem
1045 * @shost: scsi host struct to add to subsystem 1045 * @shost: scsi host struct to add to subsystem
1046 * @dev: parent struct device pointer
1047 **/ 1046 **/
1048int scsi_sysfs_add_host(struct Scsi_Host *shost) 1047int scsi_sysfs_add_host(struct Scsi_Host *shost)
1049{ 1048{
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c
index 3ee4eb40abcf..a152f89ae51c 100644
--- a/drivers/scsi/scsi_transport_fc.c
+++ b/drivers/scsi/scsi_transport_fc.c
@@ -95,7 +95,7 @@ static struct {
95 { FC_PORTTYPE_NPORT, "NPort (fabric via point-to-point)" }, 95 { FC_PORTTYPE_NPORT, "NPort (fabric via point-to-point)" },
96 { FC_PORTTYPE_NLPORT, "NLPort (fabric via loop)" }, 96 { FC_PORTTYPE_NLPORT, "NLPort (fabric via loop)" },
97 { FC_PORTTYPE_LPORT, "LPort (private loop)" }, 97 { FC_PORTTYPE_LPORT, "LPort (private loop)" },
98 { FC_PORTTYPE_PTP, "Point-To-Point (direct nport connection" }, 98 { FC_PORTTYPE_PTP, "Point-To-Point (direct nport connection)" },
99 { FC_PORTTYPE_NPIV, "NPIV VPORT" }, 99 { FC_PORTTYPE_NPIV, "NPIV VPORT" },
100}; 100};
101fc_enum_name_search(port_type, fc_port_type, fc_port_type_names) 101fc_enum_name_search(port_type, fc_port_type, fc_port_type_names)
diff --git a/drivers/scsi/scsi_transport_iscsi.c b/drivers/scsi/scsi_transport_iscsi.c
index 2adfab8c11c1..094795455293 100644
--- a/drivers/scsi/scsi_transport_iscsi.c
+++ b/drivers/scsi/scsi_transport_iscsi.c
@@ -246,30 +246,13 @@ static int iscsi_setup_host(struct transport_container *tc, struct device *dev,
246 memset(ihost, 0, sizeof(*ihost)); 246 memset(ihost, 0, sizeof(*ihost));
247 atomic_set(&ihost->nr_scans, 0); 247 atomic_set(&ihost->nr_scans, 0);
248 mutex_init(&ihost->mutex); 248 mutex_init(&ihost->mutex);
249
250 snprintf(ihost->scan_workq_name, sizeof(ihost->scan_workq_name),
251 "iscsi_scan_%d", shost->host_no);
252 ihost->scan_workq = create_singlethread_workqueue(
253 ihost->scan_workq_name);
254 if (!ihost->scan_workq)
255 return -ENOMEM;
256 return 0;
257}
258
259static int iscsi_remove_host(struct transport_container *tc, struct device *dev,
260 struct device *cdev)
261{
262 struct Scsi_Host *shost = dev_to_shost(dev);
263 struct iscsi_cls_host *ihost = shost->shost_data;
264
265 destroy_workqueue(ihost->scan_workq);
266 return 0; 249 return 0;
267} 250}
268 251
269static DECLARE_TRANSPORT_CLASS(iscsi_host_class, 252static DECLARE_TRANSPORT_CLASS(iscsi_host_class,
270 "iscsi_host", 253 "iscsi_host",
271 iscsi_setup_host, 254 iscsi_setup_host,
272 iscsi_remove_host, 255 NULL,
273 NULL); 256 NULL);
274 257
275static DECLARE_TRANSPORT_CLASS(iscsi_session_class, 258static DECLARE_TRANSPORT_CLASS(iscsi_session_class,
@@ -568,7 +551,7 @@ static void __iscsi_unblock_session(struct work_struct *work)
568 * scanning from userspace). 551 * scanning from userspace).
569 */ 552 */
570 if (shost->hostt->scan_finished) { 553 if (shost->hostt->scan_finished) {
571 if (queue_work(ihost->scan_workq, &session->scan_work)) 554 if (scsi_queue_work(shost, &session->scan_work))
572 atomic_inc(&ihost->nr_scans); 555 atomic_inc(&ihost->nr_scans);
573 } 556 }
574} 557}
@@ -636,14 +619,6 @@ static void __iscsi_unbind_session(struct work_struct *work)
636 iscsi_session_event(session, ISCSI_KEVENT_UNBIND_SESSION); 619 iscsi_session_event(session, ISCSI_KEVENT_UNBIND_SESSION);
637} 620}
638 621
639static int iscsi_unbind_session(struct iscsi_cls_session *session)
640{
641 struct Scsi_Host *shost = iscsi_session_to_shost(session);
642 struct iscsi_cls_host *ihost = shost->shost_data;
643
644 return queue_work(ihost->scan_workq, &session->unbind_work);
645}
646
647struct iscsi_cls_session * 622struct iscsi_cls_session *
648iscsi_alloc_session(struct Scsi_Host *shost, struct iscsi_transport *transport, 623iscsi_alloc_session(struct Scsi_Host *shost, struct iscsi_transport *transport,
649 int dd_size) 624 int dd_size)
@@ -796,7 +771,6 @@ static int iscsi_iter_destroy_conn_fn(struct device *dev, void *data)
796void iscsi_remove_session(struct iscsi_cls_session *session) 771void iscsi_remove_session(struct iscsi_cls_session *session)
797{ 772{
798 struct Scsi_Host *shost = iscsi_session_to_shost(session); 773 struct Scsi_Host *shost = iscsi_session_to_shost(session);
799 struct iscsi_cls_host *ihost = shost->shost_data;
800 unsigned long flags; 774 unsigned long flags;
801 int err; 775 int err;
802 776
@@ -821,7 +795,7 @@ void iscsi_remove_session(struct iscsi_cls_session *session)
821 795
822 scsi_target_unblock(&session->dev); 796 scsi_target_unblock(&session->dev);
823 /* flush running scans then delete devices */ 797 /* flush running scans then delete devices */
824 flush_workqueue(ihost->scan_workq); 798 scsi_flush_work(shost);
825 __iscsi_unbind_session(&session->unbind_work); 799 __iscsi_unbind_session(&session->unbind_work);
826 800
827 /* hw iscsi may not have removed all connections from session */ 801 /* hw iscsi may not have removed all connections from session */
@@ -1215,14 +1189,15 @@ iscsi_if_create_session(struct iscsi_internal *priv, struct iscsi_endpoint *ep,
1215{ 1189{
1216 struct iscsi_transport *transport = priv->iscsi_transport; 1190 struct iscsi_transport *transport = priv->iscsi_transport;
1217 struct iscsi_cls_session *session; 1191 struct iscsi_cls_session *session;
1218 uint32_t host_no; 1192 struct Scsi_Host *shost;
1219 1193
1220 session = transport->create_session(ep, cmds_max, queue_depth, 1194 session = transport->create_session(ep, cmds_max, queue_depth,
1221 initial_cmdsn, &host_no); 1195 initial_cmdsn);
1222 if (!session) 1196 if (!session)
1223 return -ENOMEM; 1197 return -ENOMEM;
1224 1198
1225 ev->r.c_session_ret.host_no = host_no; 1199 shost = iscsi_session_to_shost(session);
1200 ev->r.c_session_ret.host_no = shost->host_no;
1226 ev->r.c_session_ret.sid = session->sid; 1201 ev->r.c_session_ret.sid = session->sid;
1227 return 0; 1202 return 0;
1228} 1203}
@@ -1439,7 +1414,8 @@ iscsi_if_recv_msg(struct sk_buff *skb, struct nlmsghdr *nlh)
1439 case ISCSI_UEVENT_UNBIND_SESSION: 1414 case ISCSI_UEVENT_UNBIND_SESSION:
1440 session = iscsi_session_lookup(ev->u.d_session.sid); 1415 session = iscsi_session_lookup(ev->u.d_session.sid);
1441 if (session) 1416 if (session)
1442 iscsi_unbind_session(session); 1417 scsi_queue_work(iscsi_session_to_shost(session),
1418 &session->unbind_work);
1443 else 1419 else
1444 err = -EINVAL; 1420 err = -EINVAL;
1445 break; 1421 break;
@@ -1801,8 +1777,7 @@ iscsi_register_transport(struct iscsi_transport *tt)
1801 priv->daemon_pid = -1; 1777 priv->daemon_pid = -1;
1802 priv->iscsi_transport = tt; 1778 priv->iscsi_transport = tt;
1803 priv->t.user_scan = iscsi_user_scan; 1779 priv->t.user_scan = iscsi_user_scan;
1804 if (!(tt->caps & CAP_DATA_PATH_OFFLOAD)) 1780 priv->t.create_work_queue = 1;
1805 priv->t.create_work_queue = 1;
1806 1781
1807 priv->dev.class = &iscsi_transport_class; 1782 priv->dev.class = &iscsi_transport_class;
1808 dev_set_name(&priv->dev, "%s", tt->name); 1783 dev_set_name(&priv->dev, "%s", tt->name);
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 4970ae4a62d6..aeab5d9dff27 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -1273,42 +1273,126 @@ disable:
1273 sdkp->capacity = 0; 1273 sdkp->capacity = 0;
1274} 1274}
1275 1275
1276/* 1276static void read_capacity_error(struct scsi_disk *sdkp, struct scsi_device *sdp,
1277 * read disk capacity 1277 struct scsi_sense_hdr *sshdr, int sense_valid,
1278 */ 1278 int the_result)
1279static void 1279{
1280sd_read_capacity(struct scsi_disk *sdkp, unsigned char *buffer) 1280 sd_print_result(sdkp, the_result);
1281 if (driver_byte(the_result) & DRIVER_SENSE)
1282 sd_print_sense_hdr(sdkp, sshdr);
1283 else
1284 sd_printk(KERN_NOTICE, sdkp, "Sense not available.\n");
1285
1286 /*
1287 * Set dirty bit for removable devices if not ready -
1288 * sometimes drives will not report this properly.
1289 */
1290 if (sdp->removable &&
1291 sense_valid && sshdr->sense_key == NOT_READY)
1292 sdp->changed = 1;
1293
1294 /*
1295 * We used to set media_present to 0 here to indicate no media
1296 * in the drive, but some drives fail read capacity even with
1297 * media present, so we can't do that.
1298 */
1299 sdkp->capacity = 0; /* unknown mapped to zero - as usual */
1300}
1301
1302#define RC16_LEN 32
1303#if RC16_LEN > SD_BUF_SIZE
1304#error RC16_LEN must not be more than SD_BUF_SIZE
1305#endif
1306
1307static int read_capacity_16(struct scsi_disk *sdkp, struct scsi_device *sdp,
1308 unsigned char *buffer)
1281{ 1309{
1282 unsigned char cmd[16]; 1310 unsigned char cmd[16];
1283 int the_result, retries;
1284 int sector_size = 0;
1285 /* Force READ CAPACITY(16) when PROTECT=1 */
1286 int longrc = scsi_device_protection(sdkp->device) ? 1 : 0;
1287 struct scsi_sense_hdr sshdr; 1311 struct scsi_sense_hdr sshdr;
1288 int sense_valid = 0; 1312 int sense_valid = 0;
1289 struct scsi_device *sdp = sdkp->device; 1313 int the_result;
1314 int retries = 3;
1315 unsigned long long lba;
1316 unsigned sector_size;
1290 1317
1291repeat:
1292 retries = 3;
1293 do { 1318 do {
1294 if (longrc) { 1319 memset(cmd, 0, 16);
1295 memset((void *) cmd, 0, 16); 1320 cmd[0] = SERVICE_ACTION_IN;
1296 cmd[0] = SERVICE_ACTION_IN; 1321 cmd[1] = SAI_READ_CAPACITY_16;
1297 cmd[1] = SAI_READ_CAPACITY_16; 1322 cmd[13] = RC16_LEN;
1298 cmd[13] = 13; 1323 memset(buffer, 0, RC16_LEN);
1299 memset((void *) buffer, 0, 13); 1324
1300 } else { 1325 the_result = scsi_execute_req(sdp, cmd, DMA_FROM_DEVICE,
1301 cmd[0] = READ_CAPACITY; 1326 buffer, RC16_LEN, &sshdr,
1302 memset((void *) &cmd[1], 0, 9); 1327 SD_TIMEOUT, SD_MAX_RETRIES, NULL);
1303 memset((void *) buffer, 0, 8); 1328
1329 if (media_not_present(sdkp, &sshdr))
1330 return -ENODEV;
1331
1332 if (the_result) {
1333 sense_valid = scsi_sense_valid(&sshdr);
1334 if (sense_valid &&
1335 sshdr.sense_key == ILLEGAL_REQUEST &&
1336 (sshdr.asc == 0x20 || sshdr.asc == 0x24) &&
1337 sshdr.ascq == 0x00)
1338 /* Invalid Command Operation Code or
1339 * Invalid Field in CDB, just retry
1340 * silently with RC10 */
1341 return -EINVAL;
1304 } 1342 }
1305 1343 retries--;
1344
1345 } while (the_result && retries);
1346
1347 if (the_result) {
1348 sd_printk(KERN_NOTICE, sdkp, "READ CAPACITY(16) failed\n");
1349 read_capacity_error(sdkp, sdp, &sshdr, sense_valid, the_result);
1350 return -EINVAL;
1351 }
1352
1353 sector_size = (buffer[8] << 24) | (buffer[9] << 16) |
1354 (buffer[10] << 8) | buffer[11];
1355 lba = (((u64)buffer[0] << 56) | ((u64)buffer[1] << 48) |
1356 ((u64)buffer[2] << 40) | ((u64)buffer[3] << 32) |
1357 ((u64)buffer[4] << 24) | ((u64)buffer[5] << 16) |
1358 ((u64)buffer[6] << 8) | (u64)buffer[7]);
1359
1360 sd_read_protection_type(sdkp, buffer);
1361
1362 if ((sizeof(sdkp->capacity) == 4) && (lba >= 0xffffffffULL)) {
1363 sd_printk(KERN_ERR, sdkp, "Too big for this kernel. Use a "
1364 "kernel compiled with support for large block "
1365 "devices.\n");
1366 sdkp->capacity = 0;
1367 return -EOVERFLOW;
1368 }
1369
1370 sdkp->capacity = lba + 1;
1371 return sector_size;
1372}
1373
1374static int read_capacity_10(struct scsi_disk *sdkp, struct scsi_device *sdp,
1375 unsigned char *buffer)
1376{
1377 unsigned char cmd[16];
1378 struct scsi_sense_hdr sshdr;
1379 int sense_valid = 0;
1380 int the_result;
1381 int retries = 3;
1382 sector_t lba;
1383 unsigned sector_size;
1384
1385 do {
1386 cmd[0] = READ_CAPACITY;
1387 memset(&cmd[1], 0, 9);
1388 memset(buffer, 0, 8);
1389
1306 the_result = scsi_execute_req(sdp, cmd, DMA_FROM_DEVICE, 1390 the_result = scsi_execute_req(sdp, cmd, DMA_FROM_DEVICE,
1307 buffer, longrc ? 13 : 8, &sshdr, 1391 buffer, 8, &sshdr,
1308 SD_TIMEOUT, SD_MAX_RETRIES, NULL); 1392 SD_TIMEOUT, SD_MAX_RETRIES, NULL);
1309 1393
1310 if (media_not_present(sdkp, &sshdr)) 1394 if (media_not_present(sdkp, &sshdr))
1311 return; 1395 return -ENODEV;
1312 1396
1313 if (the_result) 1397 if (the_result)
1314 sense_valid = scsi_sense_valid(&sshdr); 1398 sense_valid = scsi_sense_valid(&sshdr);
@@ -1316,85 +1400,96 @@ repeat:
1316 1400
1317 } while (the_result && retries); 1401 } while (the_result && retries);
1318 1402
1319 if (the_result && !longrc) { 1403 if (the_result) {
1320 sd_printk(KERN_NOTICE, sdkp, "READ CAPACITY failed\n"); 1404 sd_printk(KERN_NOTICE, sdkp, "READ CAPACITY failed\n");
1321 sd_print_result(sdkp, the_result); 1405 read_capacity_error(sdkp, sdp, &sshdr, sense_valid, the_result);
1322 if (driver_byte(the_result) & DRIVER_SENSE) 1406 return -EINVAL;
1323 sd_print_sense_hdr(sdkp, &sshdr); 1407 }
1324 else
1325 sd_printk(KERN_NOTICE, sdkp, "Sense not available.\n");
1326 1408
1327 /* Set dirty bit for removable devices if not ready - 1409 sector_size = (buffer[4] << 24) | (buffer[5] << 16) |
1328 * sometimes drives will not report this properly. */ 1410 (buffer[6] << 8) | buffer[7];
1329 if (sdp->removable && 1411 lba = (buffer[0] << 24) | (buffer[1] << 16) |
1330 sense_valid && sshdr.sense_key == NOT_READY) 1412 (buffer[2] << 8) | buffer[3];
1331 sdp->changed = 1;
1332 1413
1333 /* Either no media are present but the drive didn't tell us, 1414 if ((sizeof(sdkp->capacity) == 4) && (lba == 0xffffffff)) {
1334 or they are present but the read capacity command fails */ 1415 sd_printk(KERN_ERR, sdkp, "Too big for this kernel. Use a "
1335 /* sdkp->media_present = 0; -- not always correct */ 1416 "kernel compiled with support for large block "
1336 sdkp->capacity = 0; /* unknown mapped to zero - as usual */ 1417 "devices.\n");
1418 sdkp->capacity = 0;
1419 return -EOVERFLOW;
1420 }
1337 1421
1338 return; 1422 sdkp->capacity = lba + 1;
1339 } else if (the_result && longrc) { 1423 return sector_size;
1340 /* READ CAPACITY(16) has been failed */ 1424}
1341 sd_printk(KERN_NOTICE, sdkp, "READ CAPACITY(16) failed\n");
1342 sd_print_result(sdkp, the_result);
1343 sd_printk(KERN_NOTICE, sdkp, "Use 0xffffffff as device size\n");
1344 1425
1345 sdkp->capacity = 1 + (sector_t) 0xffffffff; 1426static int sd_try_rc16_first(struct scsi_device *sdp)
1346 goto got_data; 1427{
1347 } 1428 if (sdp->scsi_level > SCSI_SPC_2)
1348 1429 return 1;
1349 if (!longrc) { 1430 if (scsi_device_protection(sdp))
1350 sector_size = (buffer[4] << 24) | 1431 return 1;
1351 (buffer[5] << 16) | (buffer[6] << 8) | buffer[7]; 1432 return 0;
1352 if (buffer[0] == 0xff && buffer[1] == 0xff && 1433}
1353 buffer[2] == 0xff && buffer[3] == 0xff) { 1434
1354 if(sizeof(sdkp->capacity) > 4) { 1435/*
1355 sd_printk(KERN_NOTICE, sdkp, "Very big device. " 1436 * read disk capacity
1356 "Trying to use READ CAPACITY(16).\n"); 1437 */
1357 longrc = 1; 1438static void
1358 goto repeat; 1439sd_read_capacity(struct scsi_disk *sdkp, unsigned char *buffer)
1359 } 1440{
1360 sd_printk(KERN_ERR, sdkp, "Too big for this kernel. Use " 1441 int sector_size;
1361 "a kernel compiled with support for large " 1442 struct scsi_device *sdp = sdkp->device;
1362 "block devices.\n"); 1443 sector_t old_capacity = sdkp->capacity;
1363 sdkp->capacity = 0; 1444
1445 if (sd_try_rc16_first(sdp)) {
1446 sector_size = read_capacity_16(sdkp, sdp, buffer);
1447 if (sector_size == -EOVERFLOW)
1364 goto got_data; 1448 goto got_data;
1365 } 1449 if (sector_size == -ENODEV)
1366 sdkp->capacity = 1 + (((sector_t)buffer[0] << 24) | 1450 return;
1367 (buffer[1] << 16) | 1451 if (sector_size < 0)
1368 (buffer[2] << 8) | 1452 sector_size = read_capacity_10(sdkp, sdp, buffer);
1369 buffer[3]); 1453 if (sector_size < 0)
1454 return;
1370 } else { 1455 } else {
1371 sdkp->capacity = 1 + (((u64)buffer[0] << 56) | 1456 sector_size = read_capacity_10(sdkp, sdp, buffer);
1372 ((u64)buffer[1] << 48) | 1457 if (sector_size == -EOVERFLOW)
1373 ((u64)buffer[2] << 40) | 1458 goto got_data;
1374 ((u64)buffer[3] << 32) | 1459 if (sector_size < 0)
1375 ((sector_t)buffer[4] << 24) | 1460 return;
1376 ((sector_t)buffer[5] << 16) | 1461 if ((sizeof(sdkp->capacity) > 4) &&
1377 ((sector_t)buffer[6] << 8) | 1462 (sdkp->capacity > 0xffffffffULL)) {
1378 (sector_t)buffer[7]); 1463 int old_sector_size = sector_size;
1379 1464 sd_printk(KERN_NOTICE, sdkp, "Very big device. "
1380 sector_size = (buffer[8] << 24) | 1465 "Trying to use READ CAPACITY(16).\n");
1381 (buffer[9] << 16) | (buffer[10] << 8) | buffer[11]; 1466 sector_size = read_capacity_16(sdkp, sdp, buffer);
1382 1467 if (sector_size < 0) {
1383 sd_read_protection_type(sdkp, buffer); 1468 sd_printk(KERN_NOTICE, sdkp,
1384 } 1469 "Using 0xffffffff as device size\n");
1385 1470 sdkp->capacity = 1 + (sector_t) 0xffffffff;
1386 /* Some devices return the total number of sectors, not the 1471 sector_size = old_sector_size;
1387 * highest sector number. Make the necessary adjustment. */ 1472 goto got_data;
1388 if (sdp->fix_capacity) { 1473 }
1389 --sdkp->capacity; 1474 }
1475 }
1390 1476
1391 /* Some devices have version which report the correct sizes 1477 /* Some devices are known to return the total number of blocks,
1392 * and others which do not. We guess size according to a heuristic 1478 * not the highest block number. Some devices have versions
1393 * and err on the side of lowering the capacity. */ 1479 * which do this and others which do not. Some devices we might
1394 } else { 1480 * suspect of doing this but we don't know for certain.
1395 if (sdp->guess_capacity) 1481 *
1396 if (sdkp->capacity & 0x01) /* odd sizes are odd */ 1482 * If we know the reported capacity is wrong, decrement it. If
1397 --sdkp->capacity; 1483 * we can only guess, then assume the number of blocks is even
1484 * (usually true but not always) and err on the side of lowering
1485 * the capacity.
1486 */
1487 if (sdp->fix_capacity ||
1488 (sdp->guess_capacity && (sdkp->capacity & 0x01))) {
1489 sd_printk(KERN_INFO, sdkp, "Adjusting the sector count "
1490 "from its reported value: %llu\n",
1491 (unsigned long long) sdkp->capacity);
1492 --sdkp->capacity;
1398 } 1493 }
1399 1494
1400got_data: 1495got_data:
@@ -1437,10 +1532,11 @@ got_data:
1437 string_get_size(sz, STRING_UNITS_10, cap_str_10, 1532 string_get_size(sz, STRING_UNITS_10, cap_str_10,
1438 sizeof(cap_str_10)); 1533 sizeof(cap_str_10));
1439 1534
1440 sd_printk(KERN_NOTICE, sdkp, 1535 if (sdkp->first_scan || old_capacity != sdkp->capacity)
1441 "%llu %d-byte hardware sectors: (%s/%s)\n", 1536 sd_printk(KERN_NOTICE, sdkp,
1442 (unsigned long long)sdkp->capacity, 1537 "%llu %d-byte hardware sectors: (%s/%s)\n",
1443 sector_size, cap_str_10, cap_str_2); 1538 (unsigned long long)sdkp->capacity,
1539 sector_size, cap_str_10, cap_str_2);
1444 } 1540 }
1445 1541
1446 /* Rescale capacity to 512-byte units */ 1542 /* Rescale capacity to 512-byte units */
@@ -1477,6 +1573,7 @@ sd_read_write_protect_flag(struct scsi_disk *sdkp, unsigned char *buffer)
1477 int res; 1573 int res;
1478 struct scsi_device *sdp = sdkp->device; 1574 struct scsi_device *sdp = sdkp->device;
1479 struct scsi_mode_data data; 1575 struct scsi_mode_data data;
1576 int old_wp = sdkp->write_prot;
1480 1577
1481 set_disk_ro(sdkp->disk, 0); 1578 set_disk_ro(sdkp->disk, 0);
1482 if (sdp->skip_ms_page_3f) { 1579 if (sdp->skip_ms_page_3f) {
@@ -1517,11 +1614,13 @@ sd_read_write_protect_flag(struct scsi_disk *sdkp, unsigned char *buffer)
1517 } else { 1614 } else {
1518 sdkp->write_prot = ((data.device_specific & 0x80) != 0); 1615 sdkp->write_prot = ((data.device_specific & 0x80) != 0);
1519 set_disk_ro(sdkp->disk, sdkp->write_prot); 1616 set_disk_ro(sdkp->disk, sdkp->write_prot);
1520 sd_printk(KERN_NOTICE, sdkp, "Write Protect is %s\n", 1617 if (sdkp->first_scan || old_wp != sdkp->write_prot) {
1521 sdkp->write_prot ? "on" : "off"); 1618 sd_printk(KERN_NOTICE, sdkp, "Write Protect is %s\n",
1522 sd_printk(KERN_DEBUG, sdkp, 1619 sdkp->write_prot ? "on" : "off");
1523 "Mode Sense: %02x %02x %02x %02x\n", 1620 sd_printk(KERN_DEBUG, sdkp,
1524 buffer[0], buffer[1], buffer[2], buffer[3]); 1621 "Mode Sense: %02x %02x %02x %02x\n",
1622 buffer[0], buffer[1], buffer[2], buffer[3]);
1623 }
1525 } 1624 }
1526} 1625}
1527 1626
@@ -1539,6 +1638,9 @@ sd_read_cache_type(struct scsi_disk *sdkp, unsigned char *buffer)
1539 int modepage; 1638 int modepage;
1540 struct scsi_mode_data data; 1639 struct scsi_mode_data data;
1541 struct scsi_sense_hdr sshdr; 1640 struct scsi_sense_hdr sshdr;
1641 int old_wce = sdkp->WCE;
1642 int old_rcd = sdkp->RCD;
1643 int old_dpofua = sdkp->DPOFUA;
1542 1644
1543 if (sdp->skip_ms_page_8) 1645 if (sdp->skip_ms_page_8)
1544 goto defaults; 1646 goto defaults;
@@ -1610,12 +1712,14 @@ sd_read_cache_type(struct scsi_disk *sdkp, unsigned char *buffer)
1610 sdkp->DPOFUA = 0; 1712 sdkp->DPOFUA = 0;
1611 } 1713 }
1612 1714
1613 sd_printk(KERN_NOTICE, sdkp, 1715 if (sdkp->first_scan || old_wce != sdkp->WCE ||
1614 "Write cache: %s, read cache: %s, %s\n", 1716 old_rcd != sdkp->RCD || old_dpofua != sdkp->DPOFUA)
1615 sdkp->WCE ? "enabled" : "disabled", 1717 sd_printk(KERN_NOTICE, sdkp,
1616 sdkp->RCD ? "disabled" : "enabled", 1718 "Write cache: %s, read cache: %s, %s\n",
1617 sdkp->DPOFUA ? "supports DPO and FUA" 1719 sdkp->WCE ? "enabled" : "disabled",
1618 : "doesn't support DPO or FUA"); 1720 sdkp->RCD ? "disabled" : "enabled",
1721 sdkp->DPOFUA ? "supports DPO and FUA"
1722 : "doesn't support DPO or FUA");
1619 1723
1620 return; 1724 return;
1621 } 1725 }
@@ -1711,15 +1815,6 @@ static int sd_revalidate_disk(struct gendisk *disk)
1711 goto out; 1815 goto out;
1712 } 1816 }
1713 1817
1714 /* defaults, until the device tells us otherwise */
1715 sdp->sector_size = 512;
1716 sdkp->capacity = 0;
1717 sdkp->media_present = 1;
1718 sdkp->write_prot = 0;
1719 sdkp->WCE = 0;
1720 sdkp->RCD = 0;
1721 sdkp->ATO = 0;
1722
1723 sd_spinup_disk(sdkp); 1818 sd_spinup_disk(sdkp);
1724 1819
1725 /* 1820 /*
@@ -1733,6 +1828,8 @@ static int sd_revalidate_disk(struct gendisk *disk)
1733 sd_read_app_tag_own(sdkp, buffer); 1828 sd_read_app_tag_own(sdkp, buffer);
1734 } 1829 }
1735 1830
1831 sdkp->first_scan = 0;
1832
1736 /* 1833 /*
1737 * We now have all cache related info, determine how we deal 1834 * We now have all cache related info, determine how we deal
1738 * with ordered requests. Note that as the current SCSI 1835 * with ordered requests. Note that as the current SCSI
@@ -1843,6 +1940,16 @@ static void sd_probe_async(void *data, async_cookie_t cookie)
1843 gd->private_data = &sdkp->driver; 1940 gd->private_data = &sdkp->driver;
1844 gd->queue = sdkp->device->request_queue; 1941 gd->queue = sdkp->device->request_queue;
1845 1942
1943 /* defaults, until the device tells us otherwise */
1944 sdp->sector_size = 512;
1945 sdkp->capacity = 0;
1946 sdkp->media_present = 1;
1947 sdkp->write_prot = 0;
1948 sdkp->WCE = 0;
1949 sdkp->RCD = 0;
1950 sdkp->ATO = 0;
1951 sdkp->first_scan = 1;
1952
1846 sd_revalidate_disk(gd); 1953 sd_revalidate_disk(gd);
1847 1954
1848 blk_queue_prep_rq(sdp->request_queue, sd_prep_fn); 1955 blk_queue_prep_rq(sdp->request_queue, sd_prep_fn);
diff --git a/drivers/scsi/sd.h b/drivers/scsi/sd.h
index 75638e7d3f66..708778cf5f06 100644
--- a/drivers/scsi/sd.h
+++ b/drivers/scsi/sd.h
@@ -53,6 +53,7 @@ struct scsi_disk {
53 unsigned WCE : 1; /* state of disk WCE bit */ 53 unsigned WCE : 1; /* state of disk WCE bit */
54 unsigned RCD : 1; /* state of disk RCD bit, unused */ 54 unsigned RCD : 1; /* state of disk RCD bit, unused */
55 unsigned DPOFUA : 1; /* state of disk DPOFUA bit */ 55 unsigned DPOFUA : 1; /* state of disk DPOFUA bit */
56 unsigned first_scan : 1;
56}; 57};
57#define to_scsi_disk(obj) container_of(obj,struct scsi_disk,dev) 58#define to_scsi_disk(obj) container_of(obj,struct scsi_disk,dev)
58 59
diff --git a/drivers/scsi/ses.c b/drivers/scsi/ses.c
index e946e05db7f7..c9146d751cbf 100644
--- a/drivers/scsi/ses.c
+++ b/drivers/scsi/ses.c
@@ -345,44 +345,21 @@ static int ses_enclosure_find_by_addr(struct enclosure_device *edev,
345 return 0; 345 return 0;
346} 346}
347 347
348#define VPD_INQUIRY_SIZE 36
349
350static void ses_match_to_enclosure(struct enclosure_device *edev, 348static void ses_match_to_enclosure(struct enclosure_device *edev,
351 struct scsi_device *sdev) 349 struct scsi_device *sdev)
352{ 350{
353 unsigned char *buf = kmalloc(VPD_INQUIRY_SIZE, GFP_KERNEL); 351 unsigned char *buf;
354 unsigned char *desc; 352 unsigned char *desc;
355 u16 vpd_len; 353 unsigned int vpd_len;
356 struct efd efd = { 354 struct efd efd = {
357 .addr = 0, 355 .addr = 0,
358 }; 356 };
359 unsigned char cmd[] = {
360 INQUIRY,
361 1,
362 0x83,
363 VPD_INQUIRY_SIZE >> 8,
364 VPD_INQUIRY_SIZE & 0xff,
365 0
366 };
367 357
358 buf = scsi_get_vpd_page(sdev, 0x83);
368 if (!buf) 359 if (!buf)
369 return; 360 return;
370 361
371 if (scsi_execute_req(sdev, cmd, DMA_FROM_DEVICE, buf, 362 vpd_len = ((buf[2] << 8) | buf[3]) + 4;
372 VPD_INQUIRY_SIZE, NULL, SES_TIMEOUT, SES_RETRIES,
373 NULL))
374 goto free;
375
376 vpd_len = (buf[2] << 8) + buf[3];
377 kfree(buf);
378 buf = kmalloc(vpd_len, GFP_KERNEL);
379 if (!buf)
380 return;
381 cmd[3] = vpd_len >> 8;
382 cmd[4] = vpd_len & 0xff;
383 if (scsi_execute_req(sdev, cmd, DMA_FROM_DEVICE, buf,
384 vpd_len, NULL, SES_TIMEOUT, SES_RETRIES, NULL))
385 goto free;
386 363
387 desc = buf + 4; 364 desc = buf + 4;
388 while (desc < buf + vpd_len) { 365 while (desc < buf + vpd_len) {
@@ -393,7 +370,7 @@ static void ses_match_to_enclosure(struct enclosure_device *edev,
393 u8 type = desc[1] & 0x0f; 370 u8 type = desc[1] & 0x0f;
394 u8 len = desc[3]; 371 u8 len = desc[3];
395 372
396 if (piv && code_set == 1 && assoc == 1 && code_set == 1 373 if (piv && code_set == 1 && assoc == 1
397 && proto == SCSI_PROTOCOL_SAS && type == 3 && len == 8) 374 && proto == SCSI_PROTOCOL_SAS && type == 3 && len == 8)
398 efd.addr = (u64)desc[4] << 56 | 375 efd.addr = (u64)desc[4] << 56 |
399 (u64)desc[5] << 48 | 376 (u64)desc[5] << 48 |
diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c
index b4ef2f84ea32..ffc87851f2e8 100644
--- a/drivers/scsi/sg.c
+++ b/drivers/scsi/sg.c
@@ -98,7 +98,6 @@ static int scatter_elem_sz = SG_SCATTER_SZ;
98static int scatter_elem_sz_prev = SG_SCATTER_SZ; 98static int scatter_elem_sz_prev = SG_SCATTER_SZ;
99 99
100#define SG_SECTOR_SZ 512 100#define SG_SECTOR_SZ 512
101#define SG_SECTOR_MSK (SG_SECTOR_SZ - 1)
102 101
103static int sg_add(struct device *, struct class_interface *); 102static int sg_add(struct device *, struct class_interface *);
104static void sg_remove(struct device *, struct class_interface *); 103static void sg_remove(struct device *, struct class_interface *);
@@ -137,10 +136,11 @@ typedef struct sg_request { /* SG_MAX_QUEUE requests outstanding per file */
137 volatile char done; /* 0->before bh, 1->before read, 2->read */ 136 volatile char done; /* 0->before bh, 1->before read, 2->read */
138 struct request *rq; 137 struct request *rq;
139 struct bio *bio; 138 struct bio *bio;
139 struct execute_work ew;
140} Sg_request; 140} Sg_request;
141 141
142typedef struct sg_fd { /* holds the state of a file descriptor */ 142typedef struct sg_fd { /* holds the state of a file descriptor */
143 struct sg_fd *nextfp; /* NULL when last opened fd on this device */ 143 struct list_head sfd_siblings;
144 struct sg_device *parentdp; /* owning device */ 144 struct sg_device *parentdp; /* owning device */
145 wait_queue_head_t read_wait; /* queue read until command done */ 145 wait_queue_head_t read_wait; /* queue read until command done */
146 rwlock_t rq_list_lock; /* protect access to list in req_arr */ 146 rwlock_t rq_list_lock; /* protect access to list in req_arr */
@@ -158,6 +158,8 @@ typedef struct sg_fd { /* holds the state of a file descriptor */
158 char next_cmd_len; /* 0 -> automatic (def), >0 -> use on next write() */ 158 char next_cmd_len; /* 0 -> automatic (def), >0 -> use on next write() */
159 char keep_orphan; /* 0 -> drop orphan (def), 1 -> keep for read() */ 159 char keep_orphan; /* 0 -> drop orphan (def), 1 -> keep for read() */
160 char mmap_called; /* 0 -> mmap() never called on this fd */ 160 char mmap_called; /* 0 -> mmap() never called on this fd */
161 struct kref f_ref;
162 struct execute_work ew;
161} Sg_fd; 163} Sg_fd;
162 164
163typedef struct sg_device { /* holds the state of each scsi generic device */ 165typedef struct sg_device { /* holds the state of each scsi generic device */
@@ -165,27 +167,25 @@ typedef struct sg_device { /* holds the state of each scsi generic device */
165 wait_queue_head_t o_excl_wait; /* queue open() when O_EXCL in use */ 167 wait_queue_head_t o_excl_wait; /* queue open() when O_EXCL in use */
166 int sg_tablesize; /* adapter's max scatter-gather table size */ 168 int sg_tablesize; /* adapter's max scatter-gather table size */
167 u32 index; /* device index number */ 169 u32 index; /* device index number */
168 Sg_fd *headfp; /* first open fd belonging to this device */ 170 struct list_head sfds;
169 volatile char detached; /* 0->attached, 1->detached pending removal */ 171 volatile char detached; /* 0->attached, 1->detached pending removal */
170 volatile char exclude; /* opened for exclusive access */ 172 volatile char exclude; /* opened for exclusive access */
171 char sgdebug; /* 0->off, 1->sense, 9->dump dev, 10-> all devs */ 173 char sgdebug; /* 0->off, 1->sense, 9->dump dev, 10-> all devs */
172 struct gendisk *disk; 174 struct gendisk *disk;
173 struct cdev * cdev; /* char_dev [sysfs: /sys/cdev/major/sg<n>] */ 175 struct cdev * cdev; /* char_dev [sysfs: /sys/cdev/major/sg<n>] */
176 struct kref d_ref;
174} Sg_device; 177} Sg_device;
175 178
176static int sg_fasync(int fd, struct file *filp, int mode);
177/* tasklet or soft irq callback */ 179/* tasklet or soft irq callback */
178static void sg_rq_end_io(struct request *rq, int uptodate); 180static void sg_rq_end_io(struct request *rq, int uptodate);
179static int sg_start_req(Sg_request *srp, unsigned char *cmd); 181static int sg_start_req(Sg_request *srp, unsigned char *cmd);
180static void sg_finish_rem_req(Sg_request * srp); 182static void sg_finish_rem_req(Sg_request * srp);
181static int sg_build_indirect(Sg_scatter_hold * schp, Sg_fd * sfp, int buff_size); 183static int sg_build_indirect(Sg_scatter_hold * schp, Sg_fd * sfp, int buff_size);
182static int sg_build_sgat(Sg_scatter_hold * schp, const Sg_fd * sfp,
183 int tablesize);
184static ssize_t sg_new_read(Sg_fd * sfp, char __user *buf, size_t count, 184static ssize_t sg_new_read(Sg_fd * sfp, char __user *buf, size_t count,
185 Sg_request * srp); 185 Sg_request * srp);
186static ssize_t sg_new_write(Sg_fd *sfp, struct file *file, 186static ssize_t sg_new_write(Sg_fd *sfp, struct file *file,
187 const char __user *buf, size_t count, int blocking, 187 const char __user *buf, size_t count, int blocking,
188 int read_only, Sg_request **o_srp); 188 int read_only, int sg_io_owned, Sg_request **o_srp);
189static int sg_common_write(Sg_fd * sfp, Sg_request * srp, 189static int sg_common_write(Sg_fd * sfp, Sg_request * srp,
190 unsigned char *cmnd, int timeout, int blocking); 190 unsigned char *cmnd, int timeout, int blocking);
191static int sg_read_oxfer(Sg_request * srp, char __user *outp, int num_read_xfer); 191static int sg_read_oxfer(Sg_request * srp, char __user *outp, int num_read_xfer);
@@ -194,16 +194,13 @@ static void sg_build_reserve(Sg_fd * sfp, int req_size);
194static void sg_link_reserve(Sg_fd * sfp, Sg_request * srp, int size); 194static void sg_link_reserve(Sg_fd * sfp, Sg_request * srp, int size);
195static void sg_unlink_reserve(Sg_fd * sfp, Sg_request * srp); 195static void sg_unlink_reserve(Sg_fd * sfp, Sg_request * srp);
196static Sg_fd *sg_add_sfp(Sg_device * sdp, int dev); 196static Sg_fd *sg_add_sfp(Sg_device * sdp, int dev);
197static int sg_remove_sfp(Sg_device * sdp, Sg_fd * sfp); 197static void sg_remove_sfp(struct kref *);
198static void __sg_remove_sfp(Sg_device * sdp, Sg_fd * sfp);
199static Sg_request *sg_get_rq_mark(Sg_fd * sfp, int pack_id); 198static Sg_request *sg_get_rq_mark(Sg_fd * sfp, int pack_id);
200static Sg_request *sg_add_request(Sg_fd * sfp); 199static Sg_request *sg_add_request(Sg_fd * sfp);
201static int sg_remove_request(Sg_fd * sfp, Sg_request * srp); 200static int sg_remove_request(Sg_fd * sfp, Sg_request * srp);
202static int sg_res_in_use(Sg_fd * sfp); 201static int sg_res_in_use(Sg_fd * sfp);
203static Sg_device *sg_get_dev(int dev); 202static Sg_device *sg_get_dev(int dev);
204#ifdef CONFIG_SCSI_PROC_FS 203static void sg_put_dev(Sg_device *sdp);
205static int sg_last_dev(void);
206#endif
207 204
208#define SZ_SG_HEADER sizeof(struct sg_header) 205#define SZ_SG_HEADER sizeof(struct sg_header)
209#define SZ_SG_IO_HDR sizeof(sg_io_hdr_t) 206#define SZ_SG_IO_HDR sizeof(sg_io_hdr_t)
@@ -237,22 +234,17 @@ sg_open(struct inode *inode, struct file *filp)
237 nonseekable_open(inode, filp); 234 nonseekable_open(inode, filp);
238 SCSI_LOG_TIMEOUT(3, printk("sg_open: dev=%d, flags=0x%x\n", dev, flags)); 235 SCSI_LOG_TIMEOUT(3, printk("sg_open: dev=%d, flags=0x%x\n", dev, flags));
239 sdp = sg_get_dev(dev); 236 sdp = sg_get_dev(dev);
240 if ((!sdp) || (!sdp->device)) { 237 if (IS_ERR(sdp)) {
241 unlock_kernel(); 238 retval = PTR_ERR(sdp);
242 return -ENXIO; 239 sdp = NULL;
243 } 240 goto sg_put;
244 if (sdp->detached) {
245 unlock_kernel();
246 return -ENODEV;
247 } 241 }
248 242
249 /* This driver's module count bumped by fops_get in <linux/fs.h> */ 243 /* This driver's module count bumped by fops_get in <linux/fs.h> */
250 /* Prevent the device driver from vanishing while we sleep */ 244 /* Prevent the device driver from vanishing while we sleep */
251 retval = scsi_device_get(sdp->device); 245 retval = scsi_device_get(sdp->device);
252 if (retval) { 246 if (retval)
253 unlock_kernel(); 247 goto sg_put;
254 return retval;
255 }
256 248
257 if (!((flags & O_NONBLOCK) || 249 if (!((flags & O_NONBLOCK) ||
258 scsi_block_when_processing_errors(sdp->device))) { 250 scsi_block_when_processing_errors(sdp->device))) {
@@ -266,13 +258,13 @@ sg_open(struct inode *inode, struct file *filp)
266 retval = -EPERM; /* Can't lock it with read only access */ 258 retval = -EPERM; /* Can't lock it with read only access */
267 goto error_out; 259 goto error_out;
268 } 260 }
269 if (sdp->headfp && (flags & O_NONBLOCK)) { 261 if (!list_empty(&sdp->sfds) && (flags & O_NONBLOCK)) {
270 retval = -EBUSY; 262 retval = -EBUSY;
271 goto error_out; 263 goto error_out;
272 } 264 }
273 res = 0; 265 res = 0;
274 __wait_event_interruptible(sdp->o_excl_wait, 266 __wait_event_interruptible(sdp->o_excl_wait,
275 ((sdp->headfp || sdp->exclude) ? 0 : (sdp->exclude = 1)), res); 267 ((!list_empty(&sdp->sfds) || sdp->exclude) ? 0 : (sdp->exclude = 1)), res);
276 if (res) { 268 if (res) {
277 retval = res; /* -ERESTARTSYS because signal hit process */ 269 retval = res; /* -ERESTARTSYS because signal hit process */
278 goto error_out; 270 goto error_out;
@@ -294,7 +286,7 @@ sg_open(struct inode *inode, struct file *filp)
294 retval = -ENODEV; 286 retval = -ENODEV;
295 goto error_out; 287 goto error_out;
296 } 288 }
297 if (!sdp->headfp) { /* no existing opens on this device */ 289 if (list_empty(&sdp->sfds)) { /* no existing opens on this device */
298 sdp->sgdebug = 0; 290 sdp->sgdebug = 0;
299 q = sdp->device->request_queue; 291 q = sdp->device->request_queue;
300 sdp->sg_tablesize = min(q->max_hw_segments, 292 sdp->sg_tablesize = min(q->max_hw_segments,
@@ -303,16 +295,20 @@ sg_open(struct inode *inode, struct file *filp)
303 if ((sfp = sg_add_sfp(sdp, dev))) 295 if ((sfp = sg_add_sfp(sdp, dev)))
304 filp->private_data = sfp; 296 filp->private_data = sfp;
305 else { 297 else {
306 if (flags & O_EXCL) 298 if (flags & O_EXCL) {
307 sdp->exclude = 0; /* undo if error */ 299 sdp->exclude = 0; /* undo if error */
300 wake_up_interruptible(&sdp->o_excl_wait);
301 }
308 retval = -ENOMEM; 302 retval = -ENOMEM;
309 goto error_out; 303 goto error_out;
310 } 304 }
311 unlock_kernel(); 305 retval = 0;
312 return 0; 306error_out:
313 307 if (retval)
314 error_out: 308 scsi_device_put(sdp->device);
315 scsi_device_put(sdp->device); 309sg_put:
310 if (sdp)
311 sg_put_dev(sdp);
316 unlock_kernel(); 312 unlock_kernel();
317 return retval; 313 return retval;
318} 314}
@@ -327,13 +323,13 @@ sg_release(struct inode *inode, struct file *filp)
327 if ((!(sfp = (Sg_fd *) filp->private_data)) || (!(sdp = sfp->parentdp))) 323 if ((!(sfp = (Sg_fd *) filp->private_data)) || (!(sdp = sfp->parentdp)))
328 return -ENXIO; 324 return -ENXIO;
329 SCSI_LOG_TIMEOUT(3, printk("sg_release: %s\n", sdp->disk->disk_name)); 325 SCSI_LOG_TIMEOUT(3, printk("sg_release: %s\n", sdp->disk->disk_name));
330 if (0 == sg_remove_sfp(sdp, sfp)) { /* Returns 1 when sdp gone */ 326
331 if (!sdp->detached) { 327 sfp->closed = 1;
332 scsi_device_put(sdp->device); 328
333 } 329 sdp->exclude = 0;
334 sdp->exclude = 0; 330 wake_up_interruptible(&sdp->o_excl_wait);
335 wake_up_interruptible(&sdp->o_excl_wait); 331
336 } 332 kref_put(&sfp->f_ref, sg_remove_sfp);
337 return 0; 333 return 0;
338} 334}
339 335
@@ -557,7 +553,8 @@ sg_write(struct file *filp, const char __user *buf, size_t count, loff_t * ppos)
557 return -EFAULT; 553 return -EFAULT;
558 blocking = !(filp->f_flags & O_NONBLOCK); 554 blocking = !(filp->f_flags & O_NONBLOCK);
559 if (old_hdr.reply_len < 0) 555 if (old_hdr.reply_len < 0)
560 return sg_new_write(sfp, filp, buf, count, blocking, 0, NULL); 556 return sg_new_write(sfp, filp, buf, count,
557 blocking, 0, 0, NULL);
561 if (count < (SZ_SG_HEADER + 6)) 558 if (count < (SZ_SG_HEADER + 6))
562 return -EIO; /* The minimum scsi command length is 6 bytes. */ 559 return -EIO; /* The minimum scsi command length is 6 bytes. */
563 560
@@ -638,7 +635,7 @@ sg_write(struct file *filp, const char __user *buf, size_t count, loff_t * ppos)
638 635
639static ssize_t 636static ssize_t
640sg_new_write(Sg_fd *sfp, struct file *file, const char __user *buf, 637sg_new_write(Sg_fd *sfp, struct file *file, const char __user *buf,
641 size_t count, int blocking, int read_only, 638 size_t count, int blocking, int read_only, int sg_io_owned,
642 Sg_request **o_srp) 639 Sg_request **o_srp)
643{ 640{
644 int k; 641 int k;
@@ -658,6 +655,7 @@ sg_new_write(Sg_fd *sfp, struct file *file, const char __user *buf,
658 SCSI_LOG_TIMEOUT(1, printk("sg_new_write: queue full\n")); 655 SCSI_LOG_TIMEOUT(1, printk("sg_new_write: queue full\n"));
659 return -EDOM; 656 return -EDOM;
660 } 657 }
658 srp->sg_io_owned = sg_io_owned;
661 hp = &srp->header; 659 hp = &srp->header;
662 if (__copy_from_user(hp, buf, SZ_SG_IO_HDR)) { 660 if (__copy_from_user(hp, buf, SZ_SG_IO_HDR)) {
663 sg_remove_request(sfp, srp); 661 sg_remove_request(sfp, srp);
@@ -755,24 +753,13 @@ sg_common_write(Sg_fd * sfp, Sg_request * srp,
755 hp->duration = jiffies_to_msecs(jiffies); 753 hp->duration = jiffies_to_msecs(jiffies);
756 754
757 srp->rq->timeout = timeout; 755 srp->rq->timeout = timeout;
756 kref_get(&sfp->f_ref); /* sg_rq_end_io() does kref_put(). */
758 blk_execute_rq_nowait(sdp->device->request_queue, sdp->disk, 757 blk_execute_rq_nowait(sdp->device->request_queue, sdp->disk,
759 srp->rq, 1, sg_rq_end_io); 758 srp->rq, 1, sg_rq_end_io);
760 return 0; 759 return 0;
761} 760}
762 761
763static int 762static int
764sg_srp_done(Sg_request *srp, Sg_fd *sfp)
765{
766 unsigned long iflags;
767 int done;
768
769 read_lock_irqsave(&sfp->rq_list_lock, iflags);
770 done = srp->done;
771 read_unlock_irqrestore(&sfp->rq_list_lock, iflags);
772 return done;
773}
774
775static int
776sg_ioctl(struct inode *inode, struct file *filp, 763sg_ioctl(struct inode *inode, struct file *filp,
777 unsigned int cmd_in, unsigned long arg) 764 unsigned int cmd_in, unsigned long arg)
778{ 765{
@@ -804,27 +791,26 @@ sg_ioctl(struct inode *inode, struct file *filp,
804 return -EFAULT; 791 return -EFAULT;
805 result = 792 result =
806 sg_new_write(sfp, filp, p, SZ_SG_IO_HDR, 793 sg_new_write(sfp, filp, p, SZ_SG_IO_HDR,
807 blocking, read_only, &srp); 794 blocking, read_only, 1, &srp);
808 if (result < 0) 795 if (result < 0)
809 return result; 796 return result;
810 srp->sg_io_owned = 1;
811 while (1) { 797 while (1) {
812 result = 0; /* following macro to beat race condition */ 798 result = 0; /* following macro to beat race condition */
813 __wait_event_interruptible(sfp->read_wait, 799 __wait_event_interruptible(sfp->read_wait,
814 (sdp->detached || sfp->closed || sg_srp_done(srp, sfp)), 800 (srp->done || sdp->detached),
815 result); 801 result);
816 if (sdp->detached) 802 if (sdp->detached)
817 return -ENODEV; 803 return -ENODEV;
818 if (sfp->closed) 804 write_lock_irq(&sfp->rq_list_lock);
819 return 0; /* request packet dropped already */ 805 if (srp->done) {
820 if (0 == result) 806 srp->done = 2;
807 write_unlock_irq(&sfp->rq_list_lock);
821 break; 808 break;
809 }
822 srp->orphan = 1; 810 srp->orphan = 1;
811 write_unlock_irq(&sfp->rq_list_lock);
823 return result; /* -ERESTARTSYS because signal hit process */ 812 return result; /* -ERESTARTSYS because signal hit process */
824 } 813 }
825 write_lock_irqsave(&sfp->rq_list_lock, iflags);
826 srp->done = 2;
827 write_unlock_irqrestore(&sfp->rq_list_lock, iflags);
828 result = sg_new_read(sfp, p, SZ_SG_IO_HDR, srp); 814 result = sg_new_read(sfp, p, SZ_SG_IO_HDR, srp);
829 return (result < 0) ? result : 0; 815 return (result < 0) ? result : 0;
830 } 816 }
@@ -1238,6 +1224,15 @@ sg_mmap(struct file *filp, struct vm_area_struct *vma)
1238 return 0; 1224 return 0;
1239} 1225}
1240 1226
1227static void sg_rq_end_io_usercontext(struct work_struct *work)
1228{
1229 struct sg_request *srp = container_of(work, struct sg_request, ew.work);
1230 struct sg_fd *sfp = srp->parentfp;
1231
1232 sg_finish_rem_req(srp);
1233 kref_put(&sfp->f_ref, sg_remove_sfp);
1234}
1235
1241/* 1236/*
1242 * This function is a "bottom half" handler that is called by the mid 1237 * This function is a "bottom half" handler that is called by the mid
1243 * level when a command is completed (or has failed). 1238 * level when a command is completed (or has failed).
@@ -1245,24 +1240,23 @@ sg_mmap(struct file *filp, struct vm_area_struct *vma)
1245static void sg_rq_end_io(struct request *rq, int uptodate) 1240static void sg_rq_end_io(struct request *rq, int uptodate)
1246{ 1241{
1247 struct sg_request *srp = rq->end_io_data; 1242 struct sg_request *srp = rq->end_io_data;
1248 Sg_device *sdp = NULL; 1243 Sg_device *sdp;
1249 Sg_fd *sfp; 1244 Sg_fd *sfp;
1250 unsigned long iflags; 1245 unsigned long iflags;
1251 unsigned int ms; 1246 unsigned int ms;
1252 char *sense; 1247 char *sense;
1253 int result, resid; 1248 int result, resid, done = 1;
1254 1249
1255 if (NULL == srp) { 1250 if (WARN_ON(srp->done != 0))
1256 printk(KERN_ERR "sg_cmd_done: NULL request\n");
1257 return; 1251 return;
1258 } 1252
1259 sfp = srp->parentfp; 1253 sfp = srp->parentfp;
1260 if (sfp) 1254 if (WARN_ON(sfp == NULL))
1261 sdp = sfp->parentdp;
1262 if ((NULL == sdp) || sdp->detached) {
1263 printk(KERN_INFO "sg_cmd_done: device detached\n");
1264 return; 1255 return;
1265 } 1256
1257 sdp = sfp->parentdp;
1258 if (unlikely(sdp->detached))
1259 printk(KERN_INFO "sg_rq_end_io: device detached\n");
1266 1260
1267 sense = rq->sense; 1261 sense = rq->sense;
1268 result = rq->errors; 1262 result = rq->errors;
@@ -1301,33 +1295,25 @@ static void sg_rq_end_io(struct request *rq, int uptodate)
1301 } 1295 }
1302 /* Rely on write phase to clean out srp status values, so no "else" */ 1296 /* Rely on write phase to clean out srp status values, so no "else" */
1303 1297
1304 if (sfp->closed) { /* whoops this fd already released, cleanup */ 1298 write_lock_irqsave(&sfp->rq_list_lock, iflags);
1305 SCSI_LOG_TIMEOUT(1, printk("sg_cmd_done: already closed, freeing ...\n")); 1299 if (unlikely(srp->orphan)) {
1306 sg_finish_rem_req(srp);
1307 srp = NULL;
1308 if (NULL == sfp->headrp) {
1309 SCSI_LOG_TIMEOUT(1, printk("sg_cmd_done: already closed, final cleanup\n"));
1310 if (0 == sg_remove_sfp(sdp, sfp)) { /* device still present */
1311 scsi_device_put(sdp->device);
1312 }
1313 sfp = NULL;
1314 }
1315 } else if (srp && srp->orphan) {
1316 if (sfp->keep_orphan) 1300 if (sfp->keep_orphan)
1317 srp->sg_io_owned = 0; 1301 srp->sg_io_owned = 0;
1318 else { 1302 else
1319 sg_finish_rem_req(srp); 1303 done = 0;
1320 srp = NULL;
1321 }
1322 } 1304 }
1323 if (sfp && srp) { 1305 srp->done = done;
1324 /* Now wake up any sg_read() that is waiting for this packet. */ 1306 write_unlock_irqrestore(&sfp->rq_list_lock, iflags);
1325 kill_fasync(&sfp->async_qp, SIGPOLL, POLL_IN); 1307
1326 write_lock_irqsave(&sfp->rq_list_lock, iflags); 1308 if (likely(done)) {
1327 srp->done = 1; 1309 /* Now wake up any sg_read() that is waiting for this
1310 * packet.
1311 */
1328 wake_up_interruptible(&sfp->read_wait); 1312 wake_up_interruptible(&sfp->read_wait);
1329 write_unlock_irqrestore(&sfp->rq_list_lock, iflags); 1313 kill_fasync(&sfp->async_qp, SIGPOLL, POLL_IN);
1330 } 1314 kref_put(&sfp->f_ref, sg_remove_sfp);
1315 } else
1316 execute_in_process_context(sg_rq_end_io_usercontext, &srp->ew);
1331} 1317}
1332 1318
1333static struct file_operations sg_fops = { 1319static struct file_operations sg_fops = {
@@ -1362,17 +1348,18 @@ static Sg_device *sg_alloc(struct gendisk *disk, struct scsi_device *scsidp)
1362 printk(KERN_WARNING "kmalloc Sg_device failure\n"); 1348 printk(KERN_WARNING "kmalloc Sg_device failure\n");
1363 return ERR_PTR(-ENOMEM); 1349 return ERR_PTR(-ENOMEM);
1364 } 1350 }
1365 error = -ENOMEM; 1351
1366 if (!idr_pre_get(&sg_index_idr, GFP_KERNEL)) { 1352 if (!idr_pre_get(&sg_index_idr, GFP_KERNEL)) {
1367 printk(KERN_WARNING "idr expansion Sg_device failure\n"); 1353 printk(KERN_WARNING "idr expansion Sg_device failure\n");
1354 error = -ENOMEM;
1368 goto out; 1355 goto out;
1369 } 1356 }
1370 1357
1371 write_lock_irqsave(&sg_index_lock, iflags); 1358 write_lock_irqsave(&sg_index_lock, iflags);
1372 error = idr_get_new(&sg_index_idr, sdp, &k);
1373 write_unlock_irqrestore(&sg_index_lock, iflags);
1374 1359
1360 error = idr_get_new(&sg_index_idr, sdp, &k);
1375 if (error) { 1361 if (error) {
1362 write_unlock_irqrestore(&sg_index_lock, iflags);
1376 printk(KERN_WARNING "idr allocation Sg_device failure: %d\n", 1363 printk(KERN_WARNING "idr allocation Sg_device failure: %d\n",
1377 error); 1364 error);
1378 goto out; 1365 goto out;
@@ -1386,9 +1373,13 @@ static Sg_device *sg_alloc(struct gendisk *disk, struct scsi_device *scsidp)
1386 disk->first_minor = k; 1373 disk->first_minor = k;
1387 sdp->disk = disk; 1374 sdp->disk = disk;
1388 sdp->device = scsidp; 1375 sdp->device = scsidp;
1376 INIT_LIST_HEAD(&sdp->sfds);
1389 init_waitqueue_head(&sdp->o_excl_wait); 1377 init_waitqueue_head(&sdp->o_excl_wait);
1390 sdp->sg_tablesize = min(q->max_hw_segments, q->max_phys_segments); 1378 sdp->sg_tablesize = min(q->max_hw_segments, q->max_phys_segments);
1391 sdp->index = k; 1379 sdp->index = k;
1380 kref_init(&sdp->d_ref);
1381
1382 write_unlock_irqrestore(&sg_index_lock, iflags);
1392 1383
1393 error = 0; 1384 error = 0;
1394 out: 1385 out:
@@ -1399,6 +1390,8 @@ static Sg_device *sg_alloc(struct gendisk *disk, struct scsi_device *scsidp)
1399 return sdp; 1390 return sdp;
1400 1391
1401 overflow: 1392 overflow:
1393 idr_remove(&sg_index_idr, k);
1394 write_unlock_irqrestore(&sg_index_lock, iflags);
1402 sdev_printk(KERN_WARNING, scsidp, 1395 sdev_printk(KERN_WARNING, scsidp,
1403 "Unable to attach sg device type=%d, minor " 1396 "Unable to attach sg device type=%d, minor "
1404 "number exceeds %d\n", scsidp->type, SG_MAX_DEVS - 1); 1397 "number exceeds %d\n", scsidp->type, SG_MAX_DEVS - 1);
@@ -1486,49 +1479,46 @@ out:
1486 return error; 1479 return error;
1487} 1480}
1488 1481
1489static void 1482static void sg_device_destroy(struct kref *kref)
1490sg_remove(struct device *cl_dev, struct class_interface *cl_intf) 1483{
1484 struct sg_device *sdp = container_of(kref, struct sg_device, d_ref);
1485 unsigned long flags;
1486
1487 /* CAUTION! Note that the device can still be found via idr_find()
1488 * even though the refcount is 0. Therefore, do idr_remove() BEFORE
1489 * any other cleanup.
1490 */
1491
1492 write_lock_irqsave(&sg_index_lock, flags);
1493 idr_remove(&sg_index_idr, sdp->index);
1494 write_unlock_irqrestore(&sg_index_lock, flags);
1495
1496 SCSI_LOG_TIMEOUT(3,
1497 printk("sg_device_destroy: %s\n",
1498 sdp->disk->disk_name));
1499
1500 put_disk(sdp->disk);
1501 kfree(sdp);
1502}
1503
1504static void sg_remove(struct device *cl_dev, struct class_interface *cl_intf)
1491{ 1505{
1492 struct scsi_device *scsidp = to_scsi_device(cl_dev->parent); 1506 struct scsi_device *scsidp = to_scsi_device(cl_dev->parent);
1493 Sg_device *sdp = dev_get_drvdata(cl_dev); 1507 Sg_device *sdp = dev_get_drvdata(cl_dev);
1494 unsigned long iflags; 1508 unsigned long iflags;
1495 Sg_fd *sfp; 1509 Sg_fd *sfp;
1496 Sg_fd *tsfp;
1497 Sg_request *srp;
1498 Sg_request *tsrp;
1499 int delay;
1500 1510
1501 if (!sdp) 1511 if (!sdp || sdp->detached)
1502 return; 1512 return;
1503 1513
1504 delay = 0; 1514 SCSI_LOG_TIMEOUT(3, printk("sg_remove: %s\n", sdp->disk->disk_name));
1515
1516 /* Need a write lock to set sdp->detached. */
1505 write_lock_irqsave(&sg_index_lock, iflags); 1517 write_lock_irqsave(&sg_index_lock, iflags);
1506 if (sdp->headfp) { 1518 sdp->detached = 1;
1507 sdp->detached = 1; 1519 list_for_each_entry(sfp, &sdp->sfds, sfd_siblings) {
1508 for (sfp = sdp->headfp; sfp; sfp = tsfp) { 1520 wake_up_interruptible(&sfp->read_wait);
1509 tsfp = sfp->nextfp; 1521 kill_fasync(&sfp->async_qp, SIGPOLL, POLL_HUP);
1510 for (srp = sfp->headrp; srp; srp = tsrp) {
1511 tsrp = srp->nextrp;
1512 if (sfp->closed || (0 == sg_srp_done(srp, sfp)))
1513 sg_finish_rem_req(srp);
1514 }
1515 if (sfp->closed) {
1516 scsi_device_put(sdp->device);
1517 __sg_remove_sfp(sdp, sfp);
1518 } else {
1519 delay = 1;
1520 wake_up_interruptible(&sfp->read_wait);
1521 kill_fasync(&sfp->async_qp, SIGPOLL,
1522 POLL_HUP);
1523 }
1524 }
1525 SCSI_LOG_TIMEOUT(3, printk("sg_remove: dev=%d, dirty\n", sdp->index));
1526 if (NULL == sdp->headfp) {
1527 idr_remove(&sg_index_idr, sdp->index);
1528 }
1529 } else { /* nothing active, simple case */
1530 SCSI_LOG_TIMEOUT(3, printk("sg_remove: dev=%d\n", sdp->index));
1531 idr_remove(&sg_index_idr, sdp->index);
1532 } 1522 }
1533 write_unlock_irqrestore(&sg_index_lock, iflags); 1523 write_unlock_irqrestore(&sg_index_lock, iflags);
1534 1524
@@ -1536,13 +1526,8 @@ sg_remove(struct device *cl_dev, struct class_interface *cl_intf)
1536 device_destroy(sg_sysfs_class, MKDEV(SCSI_GENERIC_MAJOR, sdp->index)); 1526 device_destroy(sg_sysfs_class, MKDEV(SCSI_GENERIC_MAJOR, sdp->index));
1537 cdev_del(sdp->cdev); 1527 cdev_del(sdp->cdev);
1538 sdp->cdev = NULL; 1528 sdp->cdev = NULL;
1539 put_disk(sdp->disk);
1540 sdp->disk = NULL;
1541 if (NULL == sdp->headfp)
1542 kfree(sdp);
1543 1529
1544 if (delay) 1530 sg_put_dev(sdp);
1545 msleep(10); /* dirty detach so delay device destruction */
1546} 1531}
1547 1532
1548module_param_named(scatter_elem_sz, scatter_elem_sz, int, S_IRUGO | S_IWUSR); 1533module_param_named(scatter_elem_sz, scatter_elem_sz, int, S_IRUGO | S_IWUSR);
@@ -1736,8 +1721,8 @@ sg_build_indirect(Sg_scatter_hold * schp, Sg_fd * sfp, int buff_size)
1736 return -EFAULT; 1721 return -EFAULT;
1737 if (0 == blk_size) 1722 if (0 == blk_size)
1738 ++blk_size; /* don't know why */ 1723 ++blk_size; /* don't know why */
1739/* round request up to next highest SG_SECTOR_SZ byte boundary */ 1724 /* round request up to next highest SG_SECTOR_SZ byte boundary */
1740 blk_size = (blk_size + SG_SECTOR_MSK) & (~SG_SECTOR_MSK); 1725 blk_size = ALIGN(blk_size, SG_SECTOR_SZ);
1741 SCSI_LOG_TIMEOUT(4, printk("sg_build_indirect: buff_size=%d, blk_size=%d\n", 1726 SCSI_LOG_TIMEOUT(4, printk("sg_build_indirect: buff_size=%d, blk_size=%d\n",
1742 buff_size, blk_size)); 1727 buff_size, blk_size));
1743 1728
@@ -1939,22 +1924,6 @@ sg_get_rq_mark(Sg_fd * sfp, int pack_id)
1939 return resp; 1924 return resp;
1940} 1925}
1941 1926
1942#ifdef CONFIG_SCSI_PROC_FS
1943static Sg_request *
1944sg_get_nth_request(Sg_fd * sfp, int nth)
1945{
1946 Sg_request *resp;
1947 unsigned long iflags;
1948 int k;
1949
1950 read_lock_irqsave(&sfp->rq_list_lock, iflags);
1951 for (k = 0, resp = sfp->headrp; resp && (k < nth);
1952 ++k, resp = resp->nextrp) ;
1953 read_unlock_irqrestore(&sfp->rq_list_lock, iflags);
1954 return resp;
1955}
1956#endif
1957
1958/* always adds to end of list */ 1927/* always adds to end of list */
1959static Sg_request * 1928static Sg_request *
1960sg_add_request(Sg_fd * sfp) 1929sg_add_request(Sg_fd * sfp)
@@ -2030,22 +1999,6 @@ sg_remove_request(Sg_fd * sfp, Sg_request * srp)
2030 return res; 1999 return res;
2031} 2000}
2032 2001
2033#ifdef CONFIG_SCSI_PROC_FS
2034static Sg_fd *
2035sg_get_nth_sfp(Sg_device * sdp, int nth)
2036{
2037 Sg_fd *resp;
2038 unsigned long iflags;
2039 int k;
2040
2041 read_lock_irqsave(&sg_index_lock, iflags);
2042 for (k = 0, resp = sdp->headfp; resp && (k < nth);
2043 ++k, resp = resp->nextfp) ;
2044 read_unlock_irqrestore(&sg_index_lock, iflags);
2045 return resp;
2046}
2047#endif
2048
2049static Sg_fd * 2002static Sg_fd *
2050sg_add_sfp(Sg_device * sdp, int dev) 2003sg_add_sfp(Sg_device * sdp, int dev)
2051{ 2004{
@@ -2060,6 +2013,7 @@ sg_add_sfp(Sg_device * sdp, int dev)
2060 init_waitqueue_head(&sfp->read_wait); 2013 init_waitqueue_head(&sfp->read_wait);
2061 rwlock_init(&sfp->rq_list_lock); 2014 rwlock_init(&sfp->rq_list_lock);
2062 2015
2016 kref_init(&sfp->f_ref);
2063 sfp->timeout = SG_DEFAULT_TIMEOUT; 2017 sfp->timeout = SG_DEFAULT_TIMEOUT;
2064 sfp->timeout_user = SG_DEFAULT_TIMEOUT_USER; 2018 sfp->timeout_user = SG_DEFAULT_TIMEOUT_USER;
2065 sfp->force_packid = SG_DEF_FORCE_PACK_ID; 2019 sfp->force_packid = SG_DEF_FORCE_PACK_ID;
@@ -2069,14 +2023,7 @@ sg_add_sfp(Sg_device * sdp, int dev)
2069 sfp->keep_orphan = SG_DEF_KEEP_ORPHAN; 2023 sfp->keep_orphan = SG_DEF_KEEP_ORPHAN;
2070 sfp->parentdp = sdp; 2024 sfp->parentdp = sdp;
2071 write_lock_irqsave(&sg_index_lock, iflags); 2025 write_lock_irqsave(&sg_index_lock, iflags);
2072 if (!sdp->headfp) 2026 list_add_tail(&sfp->sfd_siblings, &sdp->sfds);
2073 sdp->headfp = sfp;
2074 else { /* add to tail of existing list */
2075 Sg_fd *pfp = sdp->headfp;
2076 while (pfp->nextfp)
2077 pfp = pfp->nextfp;
2078 pfp->nextfp = sfp;
2079 }
2080 write_unlock_irqrestore(&sg_index_lock, iflags); 2027 write_unlock_irqrestore(&sg_index_lock, iflags);
2081 SCSI_LOG_TIMEOUT(3, printk("sg_add_sfp: sfp=0x%p\n", sfp)); 2028 SCSI_LOG_TIMEOUT(3, printk("sg_add_sfp: sfp=0x%p\n", sfp));
2082 if (unlikely(sg_big_buff != def_reserved_size)) 2029 if (unlikely(sg_big_buff != def_reserved_size))
@@ -2087,75 +2034,52 @@ sg_add_sfp(Sg_device * sdp, int dev)
2087 sg_build_reserve(sfp, bufflen); 2034 sg_build_reserve(sfp, bufflen);
2088 SCSI_LOG_TIMEOUT(3, printk("sg_add_sfp: bufflen=%d, k_use_sg=%d\n", 2035 SCSI_LOG_TIMEOUT(3, printk("sg_add_sfp: bufflen=%d, k_use_sg=%d\n",
2089 sfp->reserve.bufflen, sfp->reserve.k_use_sg)); 2036 sfp->reserve.bufflen, sfp->reserve.k_use_sg));
2037
2038 kref_get(&sdp->d_ref);
2039 __module_get(THIS_MODULE);
2090 return sfp; 2040 return sfp;
2091} 2041}
2092 2042
2093static void 2043static void sg_remove_sfp_usercontext(struct work_struct *work)
2094__sg_remove_sfp(Sg_device * sdp, Sg_fd * sfp)
2095{ 2044{
2096 Sg_fd *fp; 2045 struct sg_fd *sfp = container_of(work, struct sg_fd, ew.work);
2097 Sg_fd *prev_fp; 2046 struct sg_device *sdp = sfp->parentdp;
2047
2048 /* Cleanup any responses which were never read(). */
2049 while (sfp->headrp)
2050 sg_finish_rem_req(sfp->headrp);
2098 2051
2099 prev_fp = sdp->headfp;
2100 if (sfp == prev_fp)
2101 sdp->headfp = prev_fp->nextfp;
2102 else {
2103 while ((fp = prev_fp->nextfp)) {
2104 if (sfp == fp) {
2105 prev_fp->nextfp = fp->nextfp;
2106 break;
2107 }
2108 prev_fp = fp;
2109 }
2110 }
2111 if (sfp->reserve.bufflen > 0) { 2052 if (sfp->reserve.bufflen > 0) {
2112 SCSI_LOG_TIMEOUT(6, 2053 SCSI_LOG_TIMEOUT(6,
2113 printk("__sg_remove_sfp: bufflen=%d, k_use_sg=%d\n", 2054 printk("sg_remove_sfp: bufflen=%d, k_use_sg=%d\n",
2114 (int) sfp->reserve.bufflen, (int) sfp->reserve.k_use_sg)); 2055 (int) sfp->reserve.bufflen,
2056 (int) sfp->reserve.k_use_sg));
2115 sg_remove_scat(&sfp->reserve); 2057 sg_remove_scat(&sfp->reserve);
2116 } 2058 }
2117 sfp->parentdp = NULL; 2059
2118 SCSI_LOG_TIMEOUT(6, printk("__sg_remove_sfp: sfp=0x%p\n", sfp)); 2060 SCSI_LOG_TIMEOUT(6,
2061 printk("sg_remove_sfp: %s, sfp=0x%p\n",
2062 sdp->disk->disk_name,
2063 sfp));
2119 kfree(sfp); 2064 kfree(sfp);
2065
2066 scsi_device_put(sdp->device);
2067 sg_put_dev(sdp);
2068 module_put(THIS_MODULE);
2120} 2069}
2121 2070
2122/* Returns 0 in normal case, 1 when detached and sdp object removed */ 2071static void sg_remove_sfp(struct kref *kref)
2123static int
2124sg_remove_sfp(Sg_device * sdp, Sg_fd * sfp)
2125{ 2072{
2126 Sg_request *srp; 2073 struct sg_fd *sfp = container_of(kref, struct sg_fd, f_ref);
2127 Sg_request *tsrp; 2074 struct sg_device *sdp = sfp->parentdp;
2128 int dirty = 0; 2075 unsigned long iflags;
2129 int res = 0;
2130 2076
2131 for (srp = sfp->headrp; srp; srp = tsrp) { 2077 write_lock_irqsave(&sg_index_lock, iflags);
2132 tsrp = srp->nextrp; 2078 list_del(&sfp->sfd_siblings);
2133 if (sg_srp_done(srp, sfp)) 2079 write_unlock_irqrestore(&sg_index_lock, iflags);
2134 sg_finish_rem_req(srp); 2080 wake_up_interruptible(&sdp->o_excl_wait);
2135 else 2081
2136 ++dirty; 2082 execute_in_process_context(sg_remove_sfp_usercontext, &sfp->ew);
2137 }
2138 if (0 == dirty) {
2139 unsigned long iflags;
2140
2141 write_lock_irqsave(&sg_index_lock, iflags);
2142 __sg_remove_sfp(sdp, sfp);
2143 if (sdp->detached && (NULL == sdp->headfp)) {
2144 idr_remove(&sg_index_idr, sdp->index);
2145 kfree(sdp);
2146 res = 1;
2147 }
2148 write_unlock_irqrestore(&sg_index_lock, iflags);
2149 } else {
2150 /* MOD_INC's to inhibit unloading sg and associated adapter driver */
2151 /* only bump the access_count if we actually succeeded in
2152 * throwing another counter on the host module */
2153 scsi_device_get(sdp->device); /* XXX: retval ignored? */
2154 sfp->closed = 1; /* flag dirty state on this fd */
2155 SCSI_LOG_TIMEOUT(1, printk("sg_remove_sfp: worrisome, %d writes pending\n",
2156 dirty));
2157 }
2158 return res;
2159} 2083}
2160 2084
2161static int 2085static int
@@ -2197,19 +2121,38 @@ sg_last_dev(void)
2197} 2121}
2198#endif 2122#endif
2199 2123
2200static Sg_device * 2124/* must be called with sg_index_lock held */
2201sg_get_dev(int dev) 2125static Sg_device *sg_lookup_dev(int dev)
2202{ 2126{
2203 Sg_device *sdp; 2127 return idr_find(&sg_index_idr, dev);
2204 unsigned long iflags; 2128}
2205 2129
2206 read_lock_irqsave(&sg_index_lock, iflags); 2130static Sg_device *sg_get_dev(int dev)
2207 sdp = idr_find(&sg_index_idr, dev); 2131{
2208 read_unlock_irqrestore(&sg_index_lock, iflags); 2132 struct sg_device *sdp;
2133 unsigned long flags;
2134
2135 read_lock_irqsave(&sg_index_lock, flags);
2136 sdp = sg_lookup_dev(dev);
2137 if (!sdp)
2138 sdp = ERR_PTR(-ENXIO);
2139 else if (sdp->detached) {
2140 /* If sdp->detached, then the refcount may already be 0, in
2141 * which case it would be a bug to do kref_get().
2142 */
2143 sdp = ERR_PTR(-ENODEV);
2144 } else
2145 kref_get(&sdp->d_ref);
2146 read_unlock_irqrestore(&sg_index_lock, flags);
2209 2147
2210 return sdp; 2148 return sdp;
2211} 2149}
2212 2150
2151static void sg_put_dev(struct sg_device *sdp)
2152{
2153 kref_put(&sdp->d_ref, sg_device_destroy);
2154}
2155
2213#ifdef CONFIG_SCSI_PROC_FS 2156#ifdef CONFIG_SCSI_PROC_FS
2214 2157
2215static struct proc_dir_entry *sg_proc_sgp = NULL; 2158static struct proc_dir_entry *sg_proc_sgp = NULL;
@@ -2466,8 +2409,10 @@ static int sg_proc_seq_show_dev(struct seq_file *s, void *v)
2466 struct sg_proc_deviter * it = (struct sg_proc_deviter *) v; 2409 struct sg_proc_deviter * it = (struct sg_proc_deviter *) v;
2467 Sg_device *sdp; 2410 Sg_device *sdp;
2468 struct scsi_device *scsidp; 2411 struct scsi_device *scsidp;
2412 unsigned long iflags;
2469 2413
2470 sdp = it ? sg_get_dev(it->index) : NULL; 2414 read_lock_irqsave(&sg_index_lock, iflags);
2415 sdp = it ? sg_lookup_dev(it->index) : NULL;
2471 if (sdp && (scsidp = sdp->device) && (!sdp->detached)) 2416 if (sdp && (scsidp = sdp->device) && (!sdp->detached))
2472 seq_printf(s, "%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d\n", 2417 seq_printf(s, "%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d\t%d\n",
2473 scsidp->host->host_no, scsidp->channel, 2418 scsidp->host->host_no, scsidp->channel,
@@ -2478,6 +2423,7 @@ static int sg_proc_seq_show_dev(struct seq_file *s, void *v)
2478 (int) scsi_device_online(scsidp)); 2423 (int) scsi_device_online(scsidp));
2479 else 2424 else
2480 seq_printf(s, "-1\t-1\t-1\t-1\t-1\t-1\t-1\t-1\t-1\n"); 2425 seq_printf(s, "-1\t-1\t-1\t-1\t-1\t-1\t-1\t-1\t-1\n");
2426 read_unlock_irqrestore(&sg_index_lock, iflags);
2481 return 0; 2427 return 0;
2482} 2428}
2483 2429
@@ -2491,16 +2437,20 @@ static int sg_proc_seq_show_devstrs(struct seq_file *s, void *v)
2491 struct sg_proc_deviter * it = (struct sg_proc_deviter *) v; 2437 struct sg_proc_deviter * it = (struct sg_proc_deviter *) v;
2492 Sg_device *sdp; 2438 Sg_device *sdp;
2493 struct scsi_device *scsidp; 2439 struct scsi_device *scsidp;
2440 unsigned long iflags;
2494 2441
2495 sdp = it ? sg_get_dev(it->index) : NULL; 2442 read_lock_irqsave(&sg_index_lock, iflags);
2443 sdp = it ? sg_lookup_dev(it->index) : NULL;
2496 if (sdp && (scsidp = sdp->device) && (!sdp->detached)) 2444 if (sdp && (scsidp = sdp->device) && (!sdp->detached))
2497 seq_printf(s, "%8.8s\t%16.16s\t%4.4s\n", 2445 seq_printf(s, "%8.8s\t%16.16s\t%4.4s\n",
2498 scsidp->vendor, scsidp->model, scsidp->rev); 2446 scsidp->vendor, scsidp->model, scsidp->rev);
2499 else 2447 else
2500 seq_printf(s, "<no active device>\n"); 2448 seq_printf(s, "<no active device>\n");
2449 read_unlock_irqrestore(&sg_index_lock, iflags);
2501 return 0; 2450 return 0;
2502} 2451}
2503 2452
2453/* must be called while holding sg_index_lock */
2504static void sg_proc_debug_helper(struct seq_file *s, Sg_device * sdp) 2454static void sg_proc_debug_helper(struct seq_file *s, Sg_device * sdp)
2505{ 2455{
2506 int k, m, new_interface, blen, usg; 2456 int k, m, new_interface, blen, usg;
@@ -2510,9 +2460,12 @@ static void sg_proc_debug_helper(struct seq_file *s, Sg_device * sdp)
2510 const char * cp; 2460 const char * cp;
2511 unsigned int ms; 2461 unsigned int ms;
2512 2462
2513 for (k = 0; (fp = sg_get_nth_sfp(sdp, k)); ++k) { 2463 k = 0;
2464 list_for_each_entry(fp, &sdp->sfds, sfd_siblings) {
2465 k++;
2466 read_lock(&fp->rq_list_lock); /* irqs already disabled */
2514 seq_printf(s, " FD(%d): timeout=%dms bufflen=%d " 2467 seq_printf(s, " FD(%d): timeout=%dms bufflen=%d "
2515 "(res)sgat=%d low_dma=%d\n", k + 1, 2468 "(res)sgat=%d low_dma=%d\n", k,
2516 jiffies_to_msecs(fp->timeout), 2469 jiffies_to_msecs(fp->timeout),
2517 fp->reserve.bufflen, 2470 fp->reserve.bufflen,
2518 (int) fp->reserve.k_use_sg, 2471 (int) fp->reserve.k_use_sg,
@@ -2520,7 +2473,9 @@ static void sg_proc_debug_helper(struct seq_file *s, Sg_device * sdp)
2520 seq_printf(s, " cmd_q=%d f_packid=%d k_orphan=%d closed=%d\n", 2473 seq_printf(s, " cmd_q=%d f_packid=%d k_orphan=%d closed=%d\n",
2521 (int) fp->cmd_q, (int) fp->force_packid, 2474 (int) fp->cmd_q, (int) fp->force_packid,
2522 (int) fp->keep_orphan, (int) fp->closed); 2475 (int) fp->keep_orphan, (int) fp->closed);
2523 for (m = 0; (srp = sg_get_nth_request(fp, m)); ++m) { 2476 for (m = 0, srp = fp->headrp;
2477 srp != NULL;
2478 ++m, srp = srp->nextrp) {
2524 hp = &srp->header; 2479 hp = &srp->header;
2525 new_interface = (hp->interface_id == '\0') ? 0 : 1; 2480 new_interface = (hp->interface_id == '\0') ? 0 : 1;
2526 if (srp->res_used) { 2481 if (srp->res_used) {
@@ -2557,6 +2512,7 @@ static void sg_proc_debug_helper(struct seq_file *s, Sg_device * sdp)
2557 } 2512 }
2558 if (0 == m) 2513 if (0 == m)
2559 seq_printf(s, " No requests active\n"); 2514 seq_printf(s, " No requests active\n");
2515 read_unlock(&fp->rq_list_lock);
2560 } 2516 }
2561} 2517}
2562 2518
@@ -2569,39 +2525,34 @@ static int sg_proc_seq_show_debug(struct seq_file *s, void *v)
2569{ 2525{
2570 struct sg_proc_deviter * it = (struct sg_proc_deviter *) v; 2526 struct sg_proc_deviter * it = (struct sg_proc_deviter *) v;
2571 Sg_device *sdp; 2527 Sg_device *sdp;
2528 unsigned long iflags;
2572 2529
2573 if (it && (0 == it->index)) { 2530 if (it && (0 == it->index)) {
2574 seq_printf(s, "max_active_device=%d(origin 1)\n", 2531 seq_printf(s, "max_active_device=%d(origin 1)\n",
2575 (int)it->max); 2532 (int)it->max);
2576 seq_printf(s, " def_reserved_size=%d\n", sg_big_buff); 2533 seq_printf(s, " def_reserved_size=%d\n", sg_big_buff);
2577 } 2534 }
2578 sdp = it ? sg_get_dev(it->index) : NULL;
2579 if (sdp) {
2580 struct scsi_device *scsidp = sdp->device;
2581 2535
2582 if (NULL == scsidp) { 2536 read_lock_irqsave(&sg_index_lock, iflags);
2583 seq_printf(s, "device %d detached ??\n", 2537 sdp = it ? sg_lookup_dev(it->index) : NULL;
2584 (int)it->index); 2538 if (sdp && !list_empty(&sdp->sfds)) {
2585 return 0; 2539 struct scsi_device *scsidp = sdp->device;
2586 }
2587 2540
2588 if (sg_get_nth_sfp(sdp, 0)) { 2541 seq_printf(s, " >>> device=%s ", sdp->disk->disk_name);
2589 seq_printf(s, " >>> device=%s ", 2542 if (sdp->detached)
2590 sdp->disk->disk_name); 2543 seq_printf(s, "detached pending close ");
2591 if (sdp->detached) 2544 else
2592 seq_printf(s, "detached pending close "); 2545 seq_printf
2593 else 2546 (s, "scsi%d chan=%d id=%d lun=%d em=%d",
2594 seq_printf 2547 scsidp->host->host_no,
2595 (s, "scsi%d chan=%d id=%d lun=%d em=%d", 2548 scsidp->channel, scsidp->id,
2596 scsidp->host->host_no, 2549 scsidp->lun,
2597 scsidp->channel, scsidp->id, 2550 scsidp->host->hostt->emulated);
2598 scsidp->lun, 2551 seq_printf(s, " sg_tablesize=%d excl=%d\n",
2599 scsidp->host->hostt->emulated); 2552 sdp->sg_tablesize, sdp->exclude);
2600 seq_printf(s, " sg_tablesize=%d excl=%d\n",
2601 sdp->sg_tablesize, sdp->exclude);
2602 }
2603 sg_proc_debug_helper(s, sdp); 2553 sg_proc_debug_helper(s, sdp);
2604 } 2554 }
2555 read_unlock_irqrestore(&sg_index_lock, iflags);
2605 return 0; 2556 return 0;
2606} 2557}
2607 2558
diff --git a/drivers/scsi/st.c b/drivers/scsi/st.c
index c6f19ee8f2cb..eb24efea8f14 100644
--- a/drivers/scsi/st.c
+++ b/drivers/scsi/st.c
@@ -374,9 +374,9 @@ static int st_chk_result(struct scsi_tape *STp, struct st_request * SRpnt)
374 if (!debugging) { /* Abnormal conditions for tape */ 374 if (!debugging) { /* Abnormal conditions for tape */
375 if (!cmdstatp->have_sense) 375 if (!cmdstatp->have_sense)
376 printk(KERN_WARNING 376 printk(KERN_WARNING
377 "%s: Error %x (sugg. bt 0x%x, driver bt 0x%x, host bt 0x%x).\n", 377 "%s: Error %x (driver bt 0x%x, host bt 0x%x).\n",
378 name, result, suggestion(result), 378 name, result, driver_byte(result),
379 driver_byte(result) & DRIVER_MASK, host_byte(result)); 379 host_byte(result));
380 else if (cmdstatp->have_sense && 380 else if (cmdstatp->have_sense &&
381 scode != NO_SENSE && 381 scode != NO_SENSE &&
382 scode != RECOVERED_ERROR && 382 scode != RECOVERED_ERROR &&
diff --git a/drivers/scsi/stex.c b/drivers/scsi/stex.c
index a3a18ad73125..47b614e8580c 100644
--- a/drivers/scsi/stex.c
+++ b/drivers/scsi/stex.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SuperTrak EX Series Storage Controller driver for Linux 2 * SuperTrak EX Series Storage Controller driver for Linux
3 * 3 *
4 * Copyright (C) 2005, 2006 Promise Technology Inc. 4 * Copyright (C) 2005-2009 Promise Technology Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License 7 * modify it under the terms of the GNU General Public License
@@ -36,8 +36,8 @@
36#include <scsi/scsi_eh.h> 36#include <scsi/scsi_eh.h>
37 37
38#define DRV_NAME "stex" 38#define DRV_NAME "stex"
39#define ST_DRIVER_VERSION "3.6.0000.1" 39#define ST_DRIVER_VERSION "4.6.0000.1"
40#define ST_VER_MAJOR 3 40#define ST_VER_MAJOR 4
41#define ST_VER_MINOR 6 41#define ST_VER_MINOR 6
42#define ST_OEM 0 42#define ST_OEM 0
43#define ST_BUILD_VER 1 43#define ST_BUILD_VER 1
@@ -103,7 +103,7 @@ enum {
103 MU_REQ_COUNT = (MU_MAX_REQUEST + 1), 103 MU_REQ_COUNT = (MU_MAX_REQUEST + 1),
104 MU_STATUS_COUNT = (MU_MAX_REQUEST + 1), 104 MU_STATUS_COUNT = (MU_MAX_REQUEST + 1),
105 105
106 STEX_CDB_LENGTH = MAX_COMMAND_SIZE, 106 STEX_CDB_LENGTH = 16,
107 REQ_VARIABLE_LEN = 1024, 107 REQ_VARIABLE_LEN = 1024,
108 STATUS_VAR_LEN = 128, 108 STATUS_VAR_LEN = 128,
109 ST_CAN_QUEUE = MU_MAX_REQUEST, 109 ST_CAN_QUEUE = MU_MAX_REQUEST,
@@ -114,15 +114,19 @@ enum {
114 SG_CF_EOT = 0x80, /* end of table */ 114 SG_CF_EOT = 0x80, /* end of table */
115 SG_CF_64B = 0x40, /* 64 bit item */ 115 SG_CF_64B = 0x40, /* 64 bit item */
116 SG_CF_HOST = 0x20, /* sg in host memory */ 116 SG_CF_HOST = 0x20, /* sg in host memory */
117 MSG_DATA_DIR_ND = 0,
118 MSG_DATA_DIR_IN = 1,
119 MSG_DATA_DIR_OUT = 2,
117 120
118 st_shasta = 0, 121 st_shasta = 0,
119 st_vsc = 1, 122 st_vsc = 1,
120 st_vsc1 = 2, 123 st_vsc1 = 2,
121 st_yosemite = 3, 124 st_yosemite = 3,
125 st_seq = 4,
122 126
123 PASSTHRU_REQ_TYPE = 0x00000001, 127 PASSTHRU_REQ_TYPE = 0x00000001,
124 PASSTHRU_REQ_NO_WAKEUP = 0x00000100, 128 PASSTHRU_REQ_NO_WAKEUP = 0x00000100,
125 ST_INTERNAL_TIMEOUT = 30, 129 ST_INTERNAL_TIMEOUT = 180,
126 130
127 ST_TO_CMD = 0, 131 ST_TO_CMD = 0,
128 ST_FROM_CMD = 1, 132 ST_FROM_CMD = 1,
@@ -152,35 +156,6 @@ enum {
152 ST_ADDITIONAL_MEM = 0x200000, 156 ST_ADDITIONAL_MEM = 0x200000,
153}; 157};
154 158
155/* SCSI inquiry data */
156typedef struct st_inq {
157 u8 DeviceType :5;
158 u8 DeviceTypeQualifier :3;
159 u8 DeviceTypeModifier :7;
160 u8 RemovableMedia :1;
161 u8 Versions;
162 u8 ResponseDataFormat :4;
163 u8 HiSupport :1;
164 u8 NormACA :1;
165 u8 ReservedBit :1;
166 u8 AERC :1;
167 u8 AdditionalLength;
168 u8 Reserved[2];
169 u8 SoftReset :1;
170 u8 CommandQueue :1;
171 u8 Reserved2 :1;
172 u8 LinkedCommands :1;
173 u8 Synchronous :1;
174 u8 Wide16Bit :1;
175 u8 Wide32Bit :1;
176 u8 RelativeAddressing :1;
177 u8 VendorId[8];
178 u8 ProductId[16];
179 u8 ProductRevisionLevel[4];
180 u8 VendorSpecific[20];
181 u8 Reserved3[40];
182} ST_INQ;
183
184struct st_sgitem { 159struct st_sgitem {
185 u8 ctrl; /* SG_CF_xxx */ 160 u8 ctrl; /* SG_CF_xxx */
186 u8 reserved[3]; 161 u8 reserved[3];
@@ -222,7 +197,7 @@ struct req_msg {
222 u8 target; 197 u8 target;
223 u8 task_attr; 198 u8 task_attr;
224 u8 task_manage; 199 u8 task_manage;
225 u8 prd_entry; 200 u8 data_dir;
226 u8 payload_sz; /* payload size in 4-byte, not used */ 201 u8 payload_sz; /* payload size in 4-byte, not used */
227 u8 cdb[STEX_CDB_LENGTH]; 202 u8 cdb[STEX_CDB_LENGTH];
228 u8 variable[REQ_VARIABLE_LEN]; 203 u8 variable[REQ_VARIABLE_LEN];
@@ -284,7 +259,7 @@ struct st_drvver {
284#define MU_REQ_BUFFER_SIZE (MU_REQ_COUNT * sizeof(struct req_msg)) 259#define MU_REQ_BUFFER_SIZE (MU_REQ_COUNT * sizeof(struct req_msg))
285#define MU_STATUS_BUFFER_SIZE (MU_STATUS_COUNT * sizeof(struct status_msg)) 260#define MU_STATUS_BUFFER_SIZE (MU_STATUS_COUNT * sizeof(struct status_msg))
286#define MU_BUFFER_SIZE (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE) 261#define MU_BUFFER_SIZE (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE)
287#define STEX_EXTRA_SIZE max(sizeof(struct st_frame), sizeof(ST_INQ)) 262#define STEX_EXTRA_SIZE sizeof(struct st_frame)
288#define STEX_BUFFER_SIZE (MU_BUFFER_SIZE + STEX_EXTRA_SIZE) 263#define STEX_BUFFER_SIZE (MU_BUFFER_SIZE + STEX_EXTRA_SIZE)
289 264
290struct st_ccb { 265struct st_ccb {
@@ -346,8 +321,8 @@ MODULE_VERSION(ST_DRIVER_VERSION);
346static void stex_gettime(__le32 *time) 321static void stex_gettime(__le32 *time)
347{ 322{
348 struct timeval tv; 323 struct timeval tv;
349 do_gettimeofday(&tv);
350 324
325 do_gettimeofday(&tv);
351 *time = cpu_to_le32(tv.tv_sec & 0xffffffff); 326 *time = cpu_to_le32(tv.tv_sec & 0xffffffff);
352 *(time + 1) = cpu_to_le32((tv.tv_sec >> 16) >> 16); 327 *(time + 1) = cpu_to_le32((tv.tv_sec >> 16) >> 16);
353} 328}
@@ -368,7 +343,7 @@ static void stex_invalid_field(struct scsi_cmnd *cmd,
368{ 343{
369 cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION; 344 cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
370 345
371 /* "Invalid field in cbd" */ 346 /* "Invalid field in cdb" */
372 scsi_build_sense_buffer(0, cmd->sense_buffer, ILLEGAL_REQUEST, 0x24, 347 scsi_build_sense_buffer(0, cmd->sense_buffer, ILLEGAL_REQUEST, 0x24,
373 0x0); 348 0x0);
374 done(cmd); 349 done(cmd);
@@ -497,6 +472,7 @@ stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
497 unsigned int id,lun; 472 unsigned int id,lun;
498 struct req_msg *req; 473 struct req_msg *req;
499 u16 tag; 474 u16 tag;
475
500 host = cmd->device->host; 476 host = cmd->device->host;
501 id = cmd->device->id; 477 id = cmd->device->id;
502 lun = cmd->device->lun; 478 lun = cmd->device->lun;
@@ -508,6 +484,7 @@ stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
508 static char ms10_caching_page[12] = 484 static char ms10_caching_page[12] =
509 { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 }; 485 { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 };
510 unsigned char page; 486 unsigned char page;
487
511 page = cmd->cmnd[2] & 0x3f; 488 page = cmd->cmnd[2] & 0x3f;
512 if (page == 0x8 || page == 0x3f) { 489 if (page == 0x8 || page == 0x3f) {
513 scsi_sg_copy_from_buffer(cmd, ms10_caching_page, 490 scsi_sg_copy_from_buffer(cmd, ms10_caching_page,
@@ -551,6 +528,7 @@ stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
551 if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) { 528 if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) {
552 struct st_drvver ver; 529 struct st_drvver ver;
553 size_t cp_len = sizeof(ver); 530 size_t cp_len = sizeof(ver);
531
554 ver.major = ST_VER_MAJOR; 532 ver.major = ST_VER_MAJOR;
555 ver.minor = ST_VER_MINOR; 533 ver.minor = ST_VER_MINOR;
556 ver.oem = ST_OEM; 534 ver.oem = ST_OEM;
@@ -584,6 +562,13 @@ stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
584 /* cdb */ 562 /* cdb */
585 memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH); 563 memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH);
586 564
565 if (cmd->sc_data_direction == DMA_FROM_DEVICE)
566 req->data_dir = MSG_DATA_DIR_IN;
567 else if (cmd->sc_data_direction == DMA_TO_DEVICE)
568 req->data_dir = MSG_DATA_DIR_OUT;
569 else
570 req->data_dir = MSG_DATA_DIR_ND;
571
587 hba->ccb[tag].cmd = cmd; 572 hba->ccb[tag].cmd = cmd;
588 hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE; 573 hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE;
589 hba->ccb[tag].sense_buffer = cmd->sense_buffer; 574 hba->ccb[tag].sense_buffer = cmd->sense_buffer;
@@ -642,6 +627,7 @@ static void stex_copy_data(struct st_ccb *ccb,
642 struct status_msg *resp, unsigned int variable) 627 struct status_msg *resp, unsigned int variable)
643{ 628{
644 size_t count = variable; 629 size_t count = variable;
630
645 if (resp->scsi_status != SAM_STAT_GOOD) { 631 if (resp->scsi_status != SAM_STAT_GOOD) {
646 if (ccb->sense_buffer != NULL) 632 if (ccb->sense_buffer != NULL)
647 memcpy(ccb->sense_buffer, resp->variable, 633 memcpy(ccb->sense_buffer, resp->variable,
@@ -661,24 +647,6 @@ static void stex_ys_commands(struct st_hba *hba,
661 resp->scsi_status != SAM_STAT_CHECK_CONDITION) { 647 resp->scsi_status != SAM_STAT_CHECK_CONDITION) {
662 scsi_set_resid(ccb->cmd, scsi_bufflen(ccb->cmd) - 648 scsi_set_resid(ccb->cmd, scsi_bufflen(ccb->cmd) -
663 le32_to_cpu(*(__le32 *)&resp->variable[0])); 649 le32_to_cpu(*(__le32 *)&resp->variable[0]));
664 return;
665 }
666
667 if (resp->srb_status != 0)
668 return;
669
670 /* determine inquiry command status by DeviceTypeQualifier */
671 if (ccb->cmd->cmnd[0] == INQUIRY &&
672 resp->scsi_status == SAM_STAT_GOOD) {
673 ST_INQ *inq_data;
674
675 scsi_sg_copy_to_buffer(ccb->cmd, hba->copy_buffer,
676 STEX_EXTRA_SIZE);
677 inq_data = (ST_INQ *)hba->copy_buffer;
678 if (inq_data->DeviceTypeQualifier != 0)
679 ccb->srb_status = SRB_STATUS_SELECTION_TIMEOUT;
680 else
681 ccb->srb_status = SRB_STATUS_SUCCESS;
682 } 650 }
683} 651}
684 652
@@ -746,6 +714,7 @@ static void stex_mu_intr(struct st_hba *hba, u32 doorbell)
746 stex_copy_data(ccb, resp, size); 714 stex_copy_data(ccb, resp, size);
747 } 715 }
748 716
717 ccb->req = NULL;
749 ccb->srb_status = resp->srb_status; 718 ccb->srb_status = resp->srb_status;
750 ccb->scsi_status = resp->scsi_status; 719 ccb->scsi_status = resp->scsi_status;
751 720
@@ -983,6 +952,7 @@ static int stex_reset(struct scsi_cmnd *cmd)
983 struct st_hba *hba; 952 struct st_hba *hba;
984 unsigned long flags; 953 unsigned long flags;
985 unsigned long before; 954 unsigned long before;
955
986 hba = (struct st_hba *) &cmd->device->host->hostdata[0]; 956 hba = (struct st_hba *) &cmd->device->host->hostdata[0];
987 957
988 printk(KERN_INFO DRV_NAME 958 printk(KERN_INFO DRV_NAME
@@ -1067,6 +1037,7 @@ static struct scsi_host_template driver_template = {
1067static int stex_set_dma_mask(struct pci_dev * pdev) 1037static int stex_set_dma_mask(struct pci_dev * pdev)
1068{ 1038{
1069 int ret; 1039 int ret;
1040
1070 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) 1041 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)
1071 && !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) 1042 && !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1072 return 0; 1043 return 0;
@@ -1124,9 +1095,9 @@ stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1124 } 1095 }
1125 1096
1126 hba->cardtype = (unsigned int) id->driver_data; 1097 hba->cardtype = (unsigned int) id->driver_data;
1127 if (hba->cardtype == st_vsc && (pdev->subsystem_device & 0xf) == 0x1) 1098 if (hba->cardtype == st_vsc && (pdev->subsystem_device & 1))
1128 hba->cardtype = st_vsc1; 1099 hba->cardtype = st_vsc1;
1129 hba->dma_size = (hba->cardtype == st_vsc1) ? 1100 hba->dma_size = (hba->cardtype == st_vsc1 || hba->cardtype == st_seq) ?
1130 (STEX_BUFFER_SIZE + ST_ADDITIONAL_MEM) : (STEX_BUFFER_SIZE); 1101 (STEX_BUFFER_SIZE + ST_ADDITIONAL_MEM) : (STEX_BUFFER_SIZE);
1131 hba->dma_mem = dma_alloc_coherent(&pdev->dev, 1102 hba->dma_mem = dma_alloc_coherent(&pdev->dev,
1132 hba->dma_size, &hba->dma_handle, GFP_KERNEL); 1103 hba->dma_size, &hba->dma_handle, GFP_KERNEL);
@@ -1146,10 +1117,10 @@ stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1146 host->max_lun = 8; 1117 host->max_lun = 8;
1147 host->max_id = 16 + 1; 1118 host->max_id = 16 + 1;
1148 } else if (hba->cardtype == st_yosemite) { 1119 } else if (hba->cardtype == st_yosemite) {
1149 host->max_lun = 128; 1120 host->max_lun = 256;
1150 host->max_id = 1 + 1; 1121 host->max_id = 1 + 1;
1151 } else { 1122 } else {
1152 /* st_vsc and st_vsc1 */ 1123 /* st_vsc , st_vsc1 and st_seq */
1153 host->max_lun = 1; 1124 host->max_lun = 1;
1154 host->max_id = 128 + 1; 1125 host->max_id = 128 + 1;
1155 } 1126 }
@@ -1299,18 +1270,10 @@ static struct pci_device_id stex_pci_tbl[] = {
1299 { 0x105a, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc }, 1270 { 0x105a, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc },
1300 1271
1301 /* st_yosemite */ 1272 /* st_yosemite */
1302 { 0x105a, 0x8650, PCI_ANY_ID, 0x4600, 0, 0, 1273 { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_yosemite },
1303 st_yosemite }, /* SuperTrak EX4650 */ 1274
1304 { 0x105a, 0x8650, PCI_ANY_ID, 0x4610, 0, 0, 1275 /* st_seq */
1305 st_yosemite }, /* SuperTrak EX4650o */ 1276 { 0x105a, 0x3360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_seq },
1306 { 0x105a, 0x8650, PCI_ANY_ID, 0x8600, 0, 0,
1307 st_yosemite }, /* SuperTrak EX8650EL */
1308 { 0x105a, 0x8650, PCI_ANY_ID, 0x8601, 0, 0,
1309 st_yosemite }, /* SuperTrak EX8650 */
1310 { 0x105a, 0x8650, PCI_ANY_ID, 0x8602, 0, 0,
1311 st_yosemite }, /* SuperTrak EX8654 */
1312 { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1313 st_yosemite }, /* generic st_yosemite */
1314 { } /* terminate list */ 1277 { } /* terminate list */
1315}; 1278};
1316MODULE_DEVICE_TABLE(pci, stex_pci_tbl); 1279MODULE_DEVICE_TABLE(pci, stex_pci_tbl);
diff --git a/drivers/scsi/sym53c8xx_2/sym_glue.c b/drivers/scsi/sym53c8xx_2/sym_glue.c
index f4e6cde1fd0d..23e782015880 100644
--- a/drivers/scsi/sym53c8xx_2/sym_glue.c
+++ b/drivers/scsi/sym53c8xx_2/sym_glue.c
@@ -792,9 +792,9 @@ static int sym53c8xx_slave_configure(struct scsi_device *sdev)
792 792
793 /* 793 /*
794 * Select queue depth from driver setup. 794 * Select queue depth from driver setup.
795 * Donnot use more than configured by user. 795 * Do not use more than configured by user.
796 * Use at least 2. 796 * Use at least 1.
797 * Donnot use more than our maximum. 797 * Do not use more than our maximum.
798 */ 798 */
799 reqtags = sym_driver_setup.max_tag; 799 reqtags = sym_driver_setup.max_tag;
800 if (reqtags > tp->usrtags) 800 if (reqtags > tp->usrtags)
@@ -803,7 +803,7 @@ static int sym53c8xx_slave_configure(struct scsi_device *sdev)
803 reqtags = 0; 803 reqtags = 0;
804 if (reqtags > SYM_CONF_MAX_TAG) 804 if (reqtags > SYM_CONF_MAX_TAG)
805 reqtags = SYM_CONF_MAX_TAG; 805 reqtags = SYM_CONF_MAX_TAG;
806 depth_to_use = reqtags ? reqtags : 2; 806 depth_to_use = reqtags ? reqtags : 1;
807 scsi_adjust_queue_depth(sdev, 807 scsi_adjust_queue_depth(sdev,
808 sdev->tagged_supported ? MSG_SIMPLE_TAG : 0, 808 sdev->tagged_supported ? MSG_SIMPLE_TAG : 0,
809 depth_to_use); 809 depth_to_use);
@@ -1236,14 +1236,29 @@ static int sym53c8xx_proc_info(struct Scsi_Host *shost, char *buffer,
1236#endif /* SYM_LINUX_PROC_INFO_SUPPORT */ 1236#endif /* SYM_LINUX_PROC_INFO_SUPPORT */
1237 1237
1238/* 1238/*
1239 * Free resources claimed by sym_iomap_device(). Note that
1240 * sym_free_resources() should be used instead of this function after calling
1241 * sym_attach().
1242 */
1243static void __devinit
1244sym_iounmap_device(struct sym_device *device)
1245{
1246 if (device->s.ioaddr)
1247 pci_iounmap(device->pdev, device->s.ioaddr);
1248 if (device->s.ramaddr)
1249 pci_iounmap(device->pdev, device->s.ramaddr);
1250}
1251
1252/*
1239 * Free controller resources. 1253 * Free controller resources.
1240 */ 1254 */
1241static void sym_free_resources(struct sym_hcb *np, struct pci_dev *pdev) 1255static void sym_free_resources(struct sym_hcb *np, struct pci_dev *pdev,
1256 int do_free_irq)
1242{ 1257{
1243 /* 1258 /*
1244 * Free O/S specific resources. 1259 * Free O/S specific resources.
1245 */ 1260 */
1246 if (pdev->irq) 1261 if (do_free_irq)
1247 free_irq(pdev->irq, np->s.host); 1262 free_irq(pdev->irq, np->s.host);
1248 if (np->s.ioaddr) 1263 if (np->s.ioaddr)
1249 pci_iounmap(pdev, np->s.ioaddr); 1264 pci_iounmap(pdev, np->s.ioaddr);
@@ -1271,10 +1286,11 @@ static struct Scsi_Host * __devinit sym_attach(struct scsi_host_template *tpnt,
1271{ 1286{
1272 struct sym_data *sym_data; 1287 struct sym_data *sym_data;
1273 struct sym_hcb *np = NULL; 1288 struct sym_hcb *np = NULL;
1274 struct Scsi_Host *shost; 1289 struct Scsi_Host *shost = NULL;
1275 struct pci_dev *pdev = dev->pdev; 1290 struct pci_dev *pdev = dev->pdev;
1276 unsigned long flags; 1291 unsigned long flags;
1277 struct sym_fw *fw; 1292 struct sym_fw *fw;
1293 int do_free_irq = 0;
1278 1294
1279 printk(KERN_INFO "sym%d: <%s> rev 0x%x at pci %s irq %u\n", 1295 printk(KERN_INFO "sym%d: <%s> rev 0x%x at pci %s irq %u\n",
1280 unit, dev->chip.name, pdev->revision, pci_name(pdev), 1296 unit, dev->chip.name, pdev->revision, pci_name(pdev),
@@ -1285,11 +1301,11 @@ static struct Scsi_Host * __devinit sym_attach(struct scsi_host_template *tpnt,
1285 */ 1301 */
1286 fw = sym_find_firmware(&dev->chip); 1302 fw = sym_find_firmware(&dev->chip);
1287 if (!fw) 1303 if (!fw)
1288 return NULL; 1304 goto attach_failed;
1289 1305
1290 shost = scsi_host_alloc(tpnt, sizeof(*sym_data)); 1306 shost = scsi_host_alloc(tpnt, sizeof(*sym_data));
1291 if (!shost) 1307 if (!shost)
1292 return NULL; 1308 goto attach_failed;
1293 sym_data = shost_priv(shost); 1309 sym_data = shost_priv(shost);
1294 1310
1295 /* 1311 /*
@@ -1319,6 +1335,10 @@ static struct Scsi_Host * __devinit sym_attach(struct scsi_host_template *tpnt,
1319 np->maxoffs = dev->chip.offset_max; 1335 np->maxoffs = dev->chip.offset_max;
1320 np->maxburst = dev->chip.burst_max; 1336 np->maxburst = dev->chip.burst_max;
1321 np->myaddr = dev->host_id; 1337 np->myaddr = dev->host_id;
1338 np->mmio_ba = (u32)dev->mmio_base;
1339 np->ram_ba = (u32)dev->ram_base;
1340 np->s.ioaddr = dev->s.ioaddr;
1341 np->s.ramaddr = dev->s.ramaddr;
1322 1342
1323 /* 1343 /*
1324 * Edit its name. 1344 * Edit its name.
@@ -1334,22 +1354,6 @@ static struct Scsi_Host * __devinit sym_attach(struct scsi_host_template *tpnt,
1334 goto attach_failed; 1354 goto attach_failed;
1335 } 1355 }
1336 1356
1337 /*
1338 * Try to map the controller chip to
1339 * virtual and physical memory.
1340 */
1341 np->mmio_ba = (u32)dev->mmio_base;
1342 np->s.ioaddr = dev->s.ioaddr;
1343 np->s.ramaddr = dev->s.ramaddr;
1344
1345 /*
1346 * Map on-chip RAM if present and supported.
1347 */
1348 if (!(np->features & FE_RAM))
1349 dev->ram_base = 0;
1350 if (dev->ram_base)
1351 np->ram_ba = (u32)dev->ram_base;
1352
1353 if (sym_hcb_attach(shost, fw, dev->nvram)) 1357 if (sym_hcb_attach(shost, fw, dev->nvram))
1354 goto attach_failed; 1358 goto attach_failed;
1355 1359
@@ -1364,6 +1368,7 @@ static struct Scsi_Host * __devinit sym_attach(struct scsi_host_template *tpnt,
1364 sym_name(np), pdev->irq); 1368 sym_name(np), pdev->irq);
1365 goto attach_failed; 1369 goto attach_failed;
1366 } 1370 }
1371 do_free_irq = 1;
1367 1372
1368 /* 1373 /*
1369 * After SCSI devices have been opened, we cannot 1374 * After SCSI devices have been opened, we cannot
@@ -1416,12 +1421,13 @@ static struct Scsi_Host * __devinit sym_attach(struct scsi_host_template *tpnt,
1416 "TERMINATION, DEVICE POWER etc.!\n", sym_name(np)); 1421 "TERMINATION, DEVICE POWER etc.!\n", sym_name(np));
1417 spin_unlock_irqrestore(shost->host_lock, flags); 1422 spin_unlock_irqrestore(shost->host_lock, flags);
1418 attach_failed: 1423 attach_failed:
1419 if (!shost) 1424 printf_info("sym%d: giving up ...\n", unit);
1420 return NULL;
1421 printf_info("%s: giving up ...\n", sym_name(np));
1422 if (np) 1425 if (np)
1423 sym_free_resources(np, pdev); 1426 sym_free_resources(np, pdev, do_free_irq);
1424 scsi_host_put(shost); 1427 else
1428 sym_iounmap_device(dev);
1429 if (shost)
1430 scsi_host_put(shost);
1425 1431
1426 return NULL; 1432 return NULL;
1427 } 1433 }
@@ -1550,30 +1556,28 @@ static int __devinit sym_set_workarounds(struct sym_device *device)
1550} 1556}
1551 1557
1552/* 1558/*
1553 * Read and check the PCI configuration for any detected NCR 1559 * Map HBA registers and on-chip SRAM (if present).
1554 * boards and save data for attaching after all boards have
1555 * been detected.
1556 */ 1560 */
1557static void __devinit 1561static int __devinit
1558sym_init_device(struct pci_dev *pdev, struct sym_device *device) 1562sym_iomap_device(struct sym_device *device)
1559{ 1563{
1560 int i = 2; 1564 struct pci_dev *pdev = device->pdev;
1561 struct pci_bus_region bus_addr; 1565 struct pci_bus_region bus_addr;
1562 1566 int i = 2;
1563 device->host_id = SYM_SETUP_HOST_ID;
1564 device->pdev = pdev;
1565 1567
1566 pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[1]); 1568 pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[1]);
1567 device->mmio_base = bus_addr.start; 1569 device->mmio_base = bus_addr.start;
1568 1570
1569 /* 1571 if (device->chip.features & FE_RAM) {
1570 * If the BAR is 64-bit, resource 2 will be occupied by the 1572 /*
1571 * upper 32 bits 1573 * If the BAR is 64-bit, resource 2 will be occupied by the
1572 */ 1574 * upper 32 bits
1573 if (!pdev->resource[i].flags) 1575 */
1574 i++; 1576 if (!pdev->resource[i].flags)
1575 pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[i]); 1577 i++;
1576 device->ram_base = bus_addr.start; 1578 pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[i]);
1579 device->ram_base = bus_addr.start;
1580 }
1577 1581
1578#ifdef CONFIG_SCSI_SYM53C8XX_MMIO 1582#ifdef CONFIG_SCSI_SYM53C8XX_MMIO
1579 if (device->mmio_base) 1583 if (device->mmio_base)
@@ -1583,9 +1587,21 @@ sym_init_device(struct pci_dev *pdev, struct sym_device *device)
1583 if (!device->s.ioaddr) 1587 if (!device->s.ioaddr)
1584 device->s.ioaddr = pci_iomap(pdev, 0, 1588 device->s.ioaddr = pci_iomap(pdev, 0,
1585 pci_resource_len(pdev, 0)); 1589 pci_resource_len(pdev, 0));
1586 if (device->ram_base) 1590 if (!device->s.ioaddr) {
1591 dev_err(&pdev->dev, "could not map registers; giving up.\n");
1592 return -EIO;
1593 }
1594 if (device->ram_base) {
1587 device->s.ramaddr = pci_iomap(pdev, i, 1595 device->s.ramaddr = pci_iomap(pdev, i,
1588 pci_resource_len(pdev, i)); 1596 pci_resource_len(pdev, i));
1597 if (!device->s.ramaddr) {
1598 dev_warn(&pdev->dev,
1599 "could not map SRAM; continuing anyway.\n");
1600 device->ram_base = 0;
1601 }
1602 }
1603
1604 return 0;
1589} 1605}
1590 1606
1591/* 1607/*
@@ -1659,7 +1675,8 @@ static int sym_detach(struct Scsi_Host *shost, struct pci_dev *pdev)
1659 udelay(10); 1675 udelay(10);
1660 OUTB(np, nc_istat, 0); 1676 OUTB(np, nc_istat, 0);
1661 1677
1662 sym_free_resources(np, pdev); 1678 sym_free_resources(np, pdev, 1);
1679 scsi_host_put(shost);
1663 1680
1664 return 1; 1681 return 1;
1665} 1682}
@@ -1696,9 +1713,13 @@ static int __devinit sym2_probe(struct pci_dev *pdev,
1696 struct sym_device sym_dev; 1713 struct sym_device sym_dev;
1697 struct sym_nvram nvram; 1714 struct sym_nvram nvram;
1698 struct Scsi_Host *shost; 1715 struct Scsi_Host *shost;
1716 int do_iounmap = 0;
1717 int do_disable_device = 1;
1699 1718
1700 memset(&sym_dev, 0, sizeof(sym_dev)); 1719 memset(&sym_dev, 0, sizeof(sym_dev));
1701 memset(&nvram, 0, sizeof(nvram)); 1720 memset(&nvram, 0, sizeof(nvram));
1721 sym_dev.pdev = pdev;
1722 sym_dev.host_id = SYM_SETUP_HOST_ID;
1702 1723
1703 if (pci_enable_device(pdev)) 1724 if (pci_enable_device(pdev))
1704 goto leave; 1725 goto leave;
@@ -1708,12 +1729,17 @@ static int __devinit sym2_probe(struct pci_dev *pdev,
1708 if (pci_request_regions(pdev, NAME53C8XX)) 1729 if (pci_request_regions(pdev, NAME53C8XX))
1709 goto disable; 1730 goto disable;
1710 1731
1711 sym_init_device(pdev, &sym_dev);
1712 if (sym_check_supported(&sym_dev)) 1732 if (sym_check_supported(&sym_dev))
1713 goto free; 1733 goto free;
1714 1734
1715 if (sym_check_raid(&sym_dev)) 1735 if (sym_iomap_device(&sym_dev))
1716 goto leave; /* Don't disable the device */ 1736 goto free;
1737 do_iounmap = 1;
1738
1739 if (sym_check_raid(&sym_dev)) {
1740 do_disable_device = 0; /* Don't disable the device */
1741 goto free;
1742 }
1717 1743
1718 if (sym_set_workarounds(&sym_dev)) 1744 if (sym_set_workarounds(&sym_dev))
1719 goto free; 1745 goto free;
@@ -1722,6 +1748,7 @@ static int __devinit sym2_probe(struct pci_dev *pdev,
1722 1748
1723 sym_get_nvram(&sym_dev, &nvram); 1749 sym_get_nvram(&sym_dev, &nvram);
1724 1750
1751 do_iounmap = 0; /* Don't sym_iounmap_device() after sym_attach(). */
1725 shost = sym_attach(&sym2_template, attach_count, &sym_dev); 1752 shost = sym_attach(&sym2_template, attach_count, &sym_dev);
1726 if (!shost) 1753 if (!shost)
1727 goto free; 1754 goto free;
@@ -1737,9 +1764,12 @@ static int __devinit sym2_probe(struct pci_dev *pdev,
1737 detach: 1764 detach:
1738 sym_detach(pci_get_drvdata(pdev), pdev); 1765 sym_detach(pci_get_drvdata(pdev), pdev);
1739 free: 1766 free:
1767 if (do_iounmap)
1768 sym_iounmap_device(&sym_dev);
1740 pci_release_regions(pdev); 1769 pci_release_regions(pdev);
1741 disable: 1770 disable:
1742 pci_disable_device(pdev); 1771 if (do_disable_device)
1772 pci_disable_device(pdev);
1743 leave: 1773 leave:
1744 return -ENODEV; 1774 return -ENODEV;
1745} 1775}
@@ -1749,7 +1779,6 @@ static void sym2_remove(struct pci_dev *pdev)
1749 struct Scsi_Host *shost = pci_get_drvdata(pdev); 1779 struct Scsi_Host *shost = pci_get_drvdata(pdev);
1750 1780
1751 scsi_remove_host(shost); 1781 scsi_remove_host(shost);
1752 scsi_host_put(shost);
1753 sym_detach(shost, pdev); 1782 sym_detach(shost, pdev);
1754 pci_release_regions(pdev); 1783 pci_release_regions(pdev);
1755 pci_disable_device(pdev); 1784 pci_disable_device(pdev);
diff --git a/drivers/scsi/sym53c8xx_2/sym_hipd.c b/drivers/scsi/sym53c8xx_2/sym_hipd.c
index 98df1651404f..ccea7db59f49 100644
--- a/drivers/scsi/sym53c8xx_2/sym_hipd.c
+++ b/drivers/scsi/sym53c8xx_2/sym_hipd.c
@@ -1433,13 +1433,12 @@ static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgp
1433 * Many devices implement PPR in a buggy way, so only use it if we 1433 * Many devices implement PPR in a buggy way, so only use it if we
1434 * really want to. 1434 * really want to.
1435 */ 1435 */
1436 if (goal->offset && 1436 if (goal->renego == NS_PPR || (goal->offset &&
1437 (goal->iu || goal->dt || goal->qas || (goal->period < 0xa))) { 1437 (goal->iu || goal->dt || goal->qas || (goal->period < 0xa)))) {
1438 nego = NS_PPR; 1438 nego = NS_PPR;
1439 } else if (spi_width(starget) != goal->width) { 1439 } else if (goal->renego == NS_WIDE || goal->width) {
1440 nego = NS_WIDE; 1440 nego = NS_WIDE;
1441 } else if (spi_period(starget) != goal->period || 1441 } else if (goal->renego == NS_SYNC || goal->offset) {
1442 spi_offset(starget) != goal->offset) {
1443 nego = NS_SYNC; 1442 nego = NS_SYNC;
1444 } else { 1443 } else {
1445 goal->check_nego = 0; 1444 goal->check_nego = 0;
@@ -2040,6 +2039,29 @@ static void sym_settrans(struct sym_hcb *np, int target, u_char opts, u_char ofs
2040 } 2039 }
2041} 2040}
2042 2041
2042static void sym_announce_transfer_rate(struct sym_tcb *tp)
2043{
2044 struct scsi_target *starget = tp->starget;
2045
2046 if (tp->tprint.period != spi_period(starget) ||
2047 tp->tprint.offset != spi_offset(starget) ||
2048 tp->tprint.width != spi_width(starget) ||
2049 tp->tprint.iu != spi_iu(starget) ||
2050 tp->tprint.dt != spi_dt(starget) ||
2051 tp->tprint.qas != spi_qas(starget) ||
2052 !tp->tprint.check_nego) {
2053 tp->tprint.period = spi_period(starget);
2054 tp->tprint.offset = spi_offset(starget);
2055 tp->tprint.width = spi_width(starget);
2056 tp->tprint.iu = spi_iu(starget);
2057 tp->tprint.dt = spi_dt(starget);
2058 tp->tprint.qas = spi_qas(starget);
2059 tp->tprint.check_nego = 1;
2060
2061 spi_display_xfer_agreement(starget);
2062 }
2063}
2064
2043/* 2065/*
2044 * We received a WDTR. 2066 * We received a WDTR.
2045 * Let everything be aware of the changes. 2067 * Let everything be aware of the changes.
@@ -2049,11 +2071,13 @@ static void sym_setwide(struct sym_hcb *np, int target, u_char wide)
2049 struct sym_tcb *tp = &np->target[target]; 2071 struct sym_tcb *tp = &np->target[target];
2050 struct scsi_target *starget = tp->starget; 2072 struct scsi_target *starget = tp->starget;
2051 2073
2052 if (spi_width(starget) == wide)
2053 return;
2054
2055 sym_settrans(np, target, 0, 0, 0, wide, 0, 0); 2074 sym_settrans(np, target, 0, 0, 0, wide, 0, 0);
2056 2075
2076 if (wide)
2077 tp->tgoal.renego = NS_WIDE;
2078 else
2079 tp->tgoal.renego = 0;
2080 tp->tgoal.check_nego = 0;
2057 tp->tgoal.width = wide; 2081 tp->tgoal.width = wide;
2058 spi_offset(starget) = 0; 2082 spi_offset(starget) = 0;
2059 spi_period(starget) = 0; 2083 spi_period(starget) = 0;
@@ -2063,7 +2087,7 @@ static void sym_setwide(struct sym_hcb *np, int target, u_char wide)
2063 spi_qas(starget) = 0; 2087 spi_qas(starget) = 0;
2064 2088
2065 if (sym_verbose >= 3) 2089 if (sym_verbose >= 3)
2066 spi_display_xfer_agreement(starget); 2090 sym_announce_transfer_rate(tp);
2067} 2091}
2068 2092
2069/* 2093/*
@@ -2080,6 +2104,12 @@ sym_setsync(struct sym_hcb *np, int target,
2080 2104
2081 sym_settrans(np, target, 0, ofs, per, wide, div, fak); 2105 sym_settrans(np, target, 0, ofs, per, wide, div, fak);
2082 2106
2107 if (wide)
2108 tp->tgoal.renego = NS_WIDE;
2109 else if (ofs)
2110 tp->tgoal.renego = NS_SYNC;
2111 else
2112 tp->tgoal.renego = 0;
2083 spi_period(starget) = per; 2113 spi_period(starget) = per;
2084 spi_offset(starget) = ofs; 2114 spi_offset(starget) = ofs;
2085 spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0; 2115 spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0;
@@ -2090,7 +2120,7 @@ sym_setsync(struct sym_hcb *np, int target,
2090 tp->tgoal.check_nego = 0; 2120 tp->tgoal.check_nego = 0;
2091 } 2121 }
2092 2122
2093 spi_display_xfer_agreement(starget); 2123 sym_announce_transfer_rate(tp);
2094} 2124}
2095 2125
2096/* 2126/*
@@ -2106,6 +2136,10 @@ sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs,
2106 2136
2107 sym_settrans(np, target, opts, ofs, per, wide, div, fak); 2137 sym_settrans(np, target, opts, ofs, per, wide, div, fak);
2108 2138
2139 if (wide || ofs)
2140 tp->tgoal.renego = NS_PPR;
2141 else
2142 tp->tgoal.renego = 0;
2109 spi_width(starget) = tp->tgoal.width = wide; 2143 spi_width(starget) = tp->tgoal.width = wide;
2110 spi_period(starget) = tp->tgoal.period = per; 2144 spi_period(starget) = tp->tgoal.period = per;
2111 spi_offset(starget) = tp->tgoal.offset = ofs; 2145 spi_offset(starget) = tp->tgoal.offset = ofs;
@@ -2114,7 +2148,7 @@ sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs,
2114 spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS); 2148 spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS);
2115 tp->tgoal.check_nego = 0; 2149 tp->tgoal.check_nego = 0;
2116 2150
2117 spi_display_xfer_agreement(starget); 2151 sym_announce_transfer_rate(tp);
2118} 2152}
2119 2153
2120/* 2154/*
@@ -3516,6 +3550,7 @@ static void sym_sir_task_recovery(struct sym_hcb *np, int num)
3516 spi_dt(starget) = 0; 3550 spi_dt(starget) = 0;
3517 spi_qas(starget) = 0; 3551 spi_qas(starget) = 0;
3518 tp->tgoal.check_nego = 1; 3552 tp->tgoal.check_nego = 1;
3553 tp->tgoal.renego = 0;
3519 } 3554 }
3520 3555
3521 /* 3556 /*
@@ -5135,9 +5170,14 @@ int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *
5135 /* 5170 /*
5136 * Build a negotiation message if needed. 5171 * Build a negotiation message if needed.
5137 * (nego_status is filled by sym_prepare_nego()) 5172 * (nego_status is filled by sym_prepare_nego())
5173 *
5174 * Always negotiate on INQUIRY and REQUEST SENSE.
5175 *
5138 */ 5176 */
5139 cp->nego_status = 0; 5177 cp->nego_status = 0;
5140 if (tp->tgoal.check_nego && !tp->nego_cp && lp) { 5178 if ((tp->tgoal.check_nego ||
5179 cmd->cmnd[0] == INQUIRY || cmd->cmnd[0] == REQUEST_SENSE) &&
5180 !tp->nego_cp && lp) {
5141 msglen += sym_prepare_nego(np, cp, msgptr + msglen); 5181 msglen += sym_prepare_nego(np, cp, msgptr + msglen);
5142 } 5182 }
5143 5183
diff --git a/drivers/scsi/sym53c8xx_2/sym_hipd.h b/drivers/scsi/sym53c8xx_2/sym_hipd.h
index ad078805e62b..61d28fcfffbf 100644
--- a/drivers/scsi/sym53c8xx_2/sym_hipd.h
+++ b/drivers/scsi/sym53c8xx_2/sym_hipd.h
@@ -354,6 +354,7 @@ struct sym_trans {
354 unsigned int dt:1; 354 unsigned int dt:1;
355 unsigned int qas:1; 355 unsigned int qas:1;
356 unsigned int check_nego:1; 356 unsigned int check_nego:1;
357 unsigned int renego:2;
357}; 358};
358 359
359/* 360/*
@@ -419,6 +420,9 @@ struct sym_tcb {
419 /* Transfer goal */ 420 /* Transfer goal */
420 struct sym_trans tgoal; 421 struct sym_trans tgoal;
421 422
423 /* Last printed transfer speed */
424 struct sym_trans tprint;
425
422 /* 426 /*
423 * Keep track of the CCB used for the negotiation in order 427 * Keep track of the CCB used for the negotiation in order
424 * to ensure that only 1 negotiation is queued at a time. 428 * to ensure that only 1 negotiation is queued at a time.
diff --git a/drivers/usb/storage/transport.c b/drivers/usb/storage/transport.c
index d48c8553539d..49aedb36dc19 100644
--- a/drivers/usb/storage/transport.c
+++ b/drivers/usb/storage/transport.c
@@ -787,7 +787,7 @@ void usb_stor_invoke_transport(struct scsi_cmnd *srb, struct us_data *us)
787 /* Did we transfer less than the minimum amount required? */ 787 /* Did we transfer less than the minimum amount required? */
788 if ((srb->result == SAM_STAT_GOOD || srb->sense_buffer[2] == 0) && 788 if ((srb->result == SAM_STAT_GOOD || srb->sense_buffer[2] == 0) &&
789 scsi_bufflen(srb) - scsi_get_resid(srb) < srb->underflow) 789 scsi_bufflen(srb) - scsi_get_resid(srb) < srb->underflow)
790 srb->result = (DID_ERROR << 16) | (SUGGEST_RETRY << 24); 790 srb->result = DID_ERROR << 16;
791 791
792 last_sector_hacks(us, srb); 792 last_sector_hacks(us, srb);
793 return; 793 return;
diff --git a/drivers/watchdog/rdc321x_wdt.c b/drivers/watchdog/rdc321x_wdt.c
index bf92802f2bbe..36e221beedcd 100644
--- a/drivers/watchdog/rdc321x_wdt.c
+++ b/drivers/watchdog/rdc321x_wdt.c
@@ -37,7 +37,7 @@
37#include <linux/io.h> 37#include <linux/io.h>
38#include <linux/uaccess.h> 38#include <linux/uaccess.h>
39 39
40#include <asm/mach-rdc321x/rdc321x_defs.h> 40#include <asm/rdc321x_defs.h>
41 41
42#define RDC_WDT_MASK 0x80000000 /* Mask */ 42#define RDC_WDT_MASK 0x80000000 /* Mask */
43#define RDC_WDT_EN 0x00800000 /* Enable bit */ 43#define RDC_WDT_EN 0x00800000 /* Enable bit */
diff --git a/drivers/xen/events.c b/drivers/xen/events.c
index eb0dfdeaa949..30963af5dba0 100644
--- a/drivers/xen/events.c
+++ b/drivers/xen/events.c
@@ -26,9 +26,11 @@
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/string.h> 28#include <linux/string.h>
29#include <linux/bootmem.h>
29 30
30#include <asm/ptrace.h> 31#include <asm/ptrace.h>
31#include <asm/irq.h> 32#include <asm/irq.h>
33#include <asm/idle.h>
32#include <asm/sync_bitops.h> 34#include <asm/sync_bitops.h>
33#include <asm/xen/hypercall.h> 35#include <asm/xen/hypercall.h>
34#include <asm/xen/hypervisor.h> 36#include <asm/xen/hypervisor.h>
@@ -50,36 +52,55 @@ static DEFINE_PER_CPU(int, virq_to_irq[NR_VIRQS]) = {[0 ... NR_VIRQS-1] = -1};
50/* IRQ <-> IPI mapping */ 52/* IRQ <-> IPI mapping */
51static DEFINE_PER_CPU(int, ipi_to_irq[XEN_NR_IPIS]) = {[0 ... XEN_NR_IPIS-1] = -1}; 53static DEFINE_PER_CPU(int, ipi_to_irq[XEN_NR_IPIS]) = {[0 ... XEN_NR_IPIS-1] = -1};
52 54
53/* Packed IRQ information: binding type, sub-type index, and event channel. */ 55/* Interrupt types. */
54struct packed_irq 56enum xen_irq_type {
55{ 57 IRQT_UNBOUND = 0,
56 unsigned short evtchn;
57 unsigned char index;
58 unsigned char type;
59};
60
61static struct packed_irq irq_info[NR_IRQS];
62
63/* Binding types. */
64enum {
65 IRQT_UNBOUND,
66 IRQT_PIRQ, 58 IRQT_PIRQ,
67 IRQT_VIRQ, 59 IRQT_VIRQ,
68 IRQT_IPI, 60 IRQT_IPI,
69 IRQT_EVTCHN 61 IRQT_EVTCHN
70}; 62};
71 63
72/* Convenient shorthand for packed representation of an unbound IRQ. */ 64/*
73#define IRQ_UNBOUND mk_irq_info(IRQT_UNBOUND, 0, 0) 65 * Packed IRQ information:
66 * type - enum xen_irq_type
67 * event channel - irq->event channel mapping
68 * cpu - cpu this event channel is bound to
69 * index - type-specific information:
70 * PIRQ - vector, with MSB being "needs EIO"
71 * VIRQ - virq number
72 * IPI - IPI vector
73 * EVTCHN -
74 */
75struct irq_info
76{
77 enum xen_irq_type type; /* type */
78 unsigned short evtchn; /* event channel */
79 unsigned short cpu; /* cpu bound */
80
81 union {
82 unsigned short virq;
83 enum ipi_vector ipi;
84 struct {
85 unsigned short gsi;
86 unsigned short vector;
87 } pirq;
88 } u;
89};
90
91static struct irq_info irq_info[NR_IRQS];
74 92
75static int evtchn_to_irq[NR_EVENT_CHANNELS] = { 93static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
76 [0 ... NR_EVENT_CHANNELS-1] = -1 94 [0 ... NR_EVENT_CHANNELS-1] = -1
77}; 95};
78static unsigned long cpu_evtchn_mask[NR_CPUS][NR_EVENT_CHANNELS/BITS_PER_LONG]; 96struct cpu_evtchn_s {
79static u8 cpu_evtchn[NR_EVENT_CHANNELS]; 97 unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
80 98};
81/* Reference counts for bindings to IRQs. */ 99static struct cpu_evtchn_s *cpu_evtchn_mask_p;
82static int irq_bindcount[NR_IRQS]; 100static inline unsigned long *cpu_evtchn_mask(int cpu)
101{
102 return cpu_evtchn_mask_p[cpu].bits;
103}
83 104
84/* Xen will never allocate port zero for any purpose. */ 105/* Xen will never allocate port zero for any purpose. */
85#define VALID_EVTCHN(chn) ((chn) != 0) 106#define VALID_EVTCHN(chn) ((chn) != 0)
@@ -87,27 +108,108 @@ static int irq_bindcount[NR_IRQS];
87static struct irq_chip xen_dynamic_chip; 108static struct irq_chip xen_dynamic_chip;
88 109
89/* Constructor for packed IRQ information. */ 110/* Constructor for packed IRQ information. */
90static inline struct packed_irq mk_irq_info(u32 type, u32 index, u32 evtchn) 111static struct irq_info mk_unbound_info(void)
112{
113 return (struct irq_info) { .type = IRQT_UNBOUND };
114}
115
116static struct irq_info mk_evtchn_info(unsigned short evtchn)
117{
118 return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
119 .cpu = 0 };
120}
121
122static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
91{ 123{
92 return (struct packed_irq) { evtchn, index, type }; 124 return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
125 .cpu = 0, .u.ipi = ipi };
126}
127
128static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
129{
130 return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
131 .cpu = 0, .u.virq = virq };
132}
133
134static struct irq_info mk_pirq_info(unsigned short evtchn,
135 unsigned short gsi, unsigned short vector)
136{
137 return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
138 .cpu = 0, .u.pirq = { .gsi = gsi, .vector = vector } };
93} 139}
94 140
95/* 141/*
96 * Accessors for packed IRQ information. 142 * Accessors for packed IRQ information.
97 */ 143 */
98static inline unsigned int evtchn_from_irq(int irq) 144static struct irq_info *info_for_irq(unsigned irq)
145{
146 return &irq_info[irq];
147}
148
149static unsigned int evtchn_from_irq(unsigned irq)
99{ 150{
100 return irq_info[irq].evtchn; 151 return info_for_irq(irq)->evtchn;
101} 152}
102 153
103static inline unsigned int index_from_irq(int irq) 154static enum ipi_vector ipi_from_irq(unsigned irq)
104{ 155{
105 return irq_info[irq].index; 156 struct irq_info *info = info_for_irq(irq);
157
158 BUG_ON(info == NULL);
159 BUG_ON(info->type != IRQT_IPI);
160
161 return info->u.ipi;
106} 162}
107 163
108static inline unsigned int type_from_irq(int irq) 164static unsigned virq_from_irq(unsigned irq)
109{ 165{
110 return irq_info[irq].type; 166 struct irq_info *info = info_for_irq(irq);
167
168 BUG_ON(info == NULL);
169 BUG_ON(info->type != IRQT_VIRQ);
170
171 return info->u.virq;
172}
173
174static unsigned gsi_from_irq(unsigned irq)
175{
176 struct irq_info *info = info_for_irq(irq);
177
178 BUG_ON(info == NULL);
179 BUG_ON(info->type != IRQT_PIRQ);
180
181 return info->u.pirq.gsi;
182}
183
184static unsigned vector_from_irq(unsigned irq)
185{
186 struct irq_info *info = info_for_irq(irq);
187
188 BUG_ON(info == NULL);
189 BUG_ON(info->type != IRQT_PIRQ);
190
191 return info->u.pirq.vector;
192}
193
194static enum xen_irq_type type_from_irq(unsigned irq)
195{
196 return info_for_irq(irq)->type;
197}
198
199static unsigned cpu_from_irq(unsigned irq)
200{
201 return info_for_irq(irq)->cpu;
202}
203
204static unsigned int cpu_from_evtchn(unsigned int evtchn)
205{
206 int irq = evtchn_to_irq[evtchn];
207 unsigned ret = 0;
208
209 if (irq != -1)
210 ret = cpu_from_irq(irq);
211
212 return ret;
111} 213}
112 214
113static inline unsigned long active_evtchns(unsigned int cpu, 215static inline unsigned long active_evtchns(unsigned int cpu,
@@ -115,7 +217,7 @@ static inline unsigned long active_evtchns(unsigned int cpu,
115 unsigned int idx) 217 unsigned int idx)
116{ 218{
117 return (sh->evtchn_pending[idx] & 219 return (sh->evtchn_pending[idx] &
118 cpu_evtchn_mask[cpu][idx] & 220 cpu_evtchn_mask(cpu)[idx] &
119 ~sh->evtchn_mask[idx]); 221 ~sh->evtchn_mask[idx]);
120} 222}
121 223
@@ -125,13 +227,13 @@ static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
125 227
126 BUG_ON(irq == -1); 228 BUG_ON(irq == -1);
127#ifdef CONFIG_SMP 229#ifdef CONFIG_SMP
128 irq_to_desc(irq)->affinity = cpumask_of_cpu(cpu); 230 cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
129#endif 231#endif
130 232
131 __clear_bit(chn, cpu_evtchn_mask[cpu_evtchn[chn]]); 233 __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
132 __set_bit(chn, cpu_evtchn_mask[cpu]); 234 __set_bit(chn, cpu_evtchn_mask(cpu));
133 235
134 cpu_evtchn[chn] = cpu; 236 irq_info[irq].cpu = cpu;
135} 237}
136 238
137static void init_evtchn_cpu_bindings(void) 239static void init_evtchn_cpu_bindings(void)
@@ -142,17 +244,11 @@ static void init_evtchn_cpu_bindings(void)
142 244
143 /* By default all event channels notify CPU#0. */ 245 /* By default all event channels notify CPU#0. */
144 for_each_irq_desc(i, desc) { 246 for_each_irq_desc(i, desc) {
145 desc->affinity = cpumask_of_cpu(0); 247 cpumask_copy(desc->affinity, cpumask_of(0));
146 } 248 }
147#endif 249#endif
148 250
149 memset(cpu_evtchn, 0, sizeof(cpu_evtchn)); 251 memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
150 memset(cpu_evtchn_mask[0], ~0, sizeof(cpu_evtchn_mask[0]));
151}
152
153static inline unsigned int cpu_from_evtchn(unsigned int evtchn)
154{
155 return cpu_evtchn[evtchn];
156} 252}
157 253
158static inline void clear_evtchn(int port) 254static inline void clear_evtchn(int port)
@@ -232,9 +328,8 @@ static int find_unbound_irq(void)
232 int irq; 328 int irq;
233 struct irq_desc *desc; 329 struct irq_desc *desc;
234 330
235 /* Only allocate from dynirq range */
236 for (irq = 0; irq < nr_irqs; irq++) 331 for (irq = 0; irq < nr_irqs; irq++)
237 if (irq_bindcount[irq] == 0) 332 if (irq_info[irq].type == IRQT_UNBOUND)
238 break; 333 break;
239 334
240 if (irq == nr_irqs) 335 if (irq == nr_irqs)
@@ -244,6 +339,8 @@ static int find_unbound_irq(void)
244 if (WARN_ON(desc == NULL)) 339 if (WARN_ON(desc == NULL))
245 return -1; 340 return -1;
246 341
342 dynamic_irq_init(irq);
343
247 return irq; 344 return irq;
248} 345}
249 346
@@ -258,16 +355,13 @@ int bind_evtchn_to_irq(unsigned int evtchn)
258 if (irq == -1) { 355 if (irq == -1) {
259 irq = find_unbound_irq(); 356 irq = find_unbound_irq();
260 357
261 dynamic_irq_init(irq);
262 set_irq_chip_and_handler_name(irq, &xen_dynamic_chip, 358 set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
263 handle_level_irq, "event"); 359 handle_level_irq, "event");
264 360
265 evtchn_to_irq[evtchn] = irq; 361 evtchn_to_irq[evtchn] = irq;
266 irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn); 362 irq_info[irq] = mk_evtchn_info(evtchn);
267 } 363 }
268 364
269 irq_bindcount[irq]++;
270
271 spin_unlock(&irq_mapping_update_lock); 365 spin_unlock(&irq_mapping_update_lock);
272 366
273 return irq; 367 return irq;
@@ -282,12 +376,12 @@ static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
282 spin_lock(&irq_mapping_update_lock); 376 spin_lock(&irq_mapping_update_lock);
283 377
284 irq = per_cpu(ipi_to_irq, cpu)[ipi]; 378 irq = per_cpu(ipi_to_irq, cpu)[ipi];
379
285 if (irq == -1) { 380 if (irq == -1) {
286 irq = find_unbound_irq(); 381 irq = find_unbound_irq();
287 if (irq < 0) 382 if (irq < 0)
288 goto out; 383 goto out;
289 384
290 dynamic_irq_init(irq);
291 set_irq_chip_and_handler_name(irq, &xen_dynamic_chip, 385 set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
292 handle_level_irq, "ipi"); 386 handle_level_irq, "ipi");
293 387
@@ -298,15 +392,12 @@ static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
298 evtchn = bind_ipi.port; 392 evtchn = bind_ipi.port;
299 393
300 evtchn_to_irq[evtchn] = irq; 394 evtchn_to_irq[evtchn] = irq;
301 irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn); 395 irq_info[irq] = mk_ipi_info(evtchn, ipi);
302
303 per_cpu(ipi_to_irq, cpu)[ipi] = irq; 396 per_cpu(ipi_to_irq, cpu)[ipi] = irq;
304 397
305 bind_evtchn_to_cpu(evtchn, cpu); 398 bind_evtchn_to_cpu(evtchn, cpu);
306 } 399 }
307 400
308 irq_bindcount[irq]++;
309
310 out: 401 out:
311 spin_unlock(&irq_mapping_update_lock); 402 spin_unlock(&irq_mapping_update_lock);
312 return irq; 403 return irq;
@@ -332,20 +423,17 @@ static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
332 423
333 irq = find_unbound_irq(); 424 irq = find_unbound_irq();
334 425
335 dynamic_irq_init(irq);
336 set_irq_chip_and_handler_name(irq, &xen_dynamic_chip, 426 set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
337 handle_level_irq, "virq"); 427 handle_level_irq, "virq");
338 428
339 evtchn_to_irq[evtchn] = irq; 429 evtchn_to_irq[evtchn] = irq;
340 irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn); 430 irq_info[irq] = mk_virq_info(evtchn, virq);
341 431
342 per_cpu(virq_to_irq, cpu)[virq] = irq; 432 per_cpu(virq_to_irq, cpu)[virq] = irq;
343 433
344 bind_evtchn_to_cpu(evtchn, cpu); 434 bind_evtchn_to_cpu(evtchn, cpu);
345 } 435 }
346 436
347 irq_bindcount[irq]++;
348
349 spin_unlock(&irq_mapping_update_lock); 437 spin_unlock(&irq_mapping_update_lock);
350 438
351 return irq; 439 return irq;
@@ -358,7 +446,7 @@ static void unbind_from_irq(unsigned int irq)
358 446
359 spin_lock(&irq_mapping_update_lock); 447 spin_lock(&irq_mapping_update_lock);
360 448
361 if ((--irq_bindcount[irq] == 0) && VALID_EVTCHN(evtchn)) { 449 if (VALID_EVTCHN(evtchn)) {
362 close.port = evtchn; 450 close.port = evtchn;
363 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0) 451 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
364 BUG(); 452 BUG();
@@ -366,11 +454,11 @@ static void unbind_from_irq(unsigned int irq)
366 switch (type_from_irq(irq)) { 454 switch (type_from_irq(irq)) {
367 case IRQT_VIRQ: 455 case IRQT_VIRQ:
368 per_cpu(virq_to_irq, cpu_from_evtchn(evtchn)) 456 per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
369 [index_from_irq(irq)] = -1; 457 [virq_from_irq(irq)] = -1;
370 break; 458 break;
371 case IRQT_IPI: 459 case IRQT_IPI:
372 per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn)) 460 per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
373 [index_from_irq(irq)] = -1; 461 [ipi_from_irq(irq)] = -1;
374 break; 462 break;
375 default: 463 default:
376 break; 464 break;
@@ -380,7 +468,7 @@ static void unbind_from_irq(unsigned int irq)
380 bind_evtchn_to_cpu(evtchn, 0); 468 bind_evtchn_to_cpu(evtchn, 0);
381 469
382 evtchn_to_irq[evtchn] = -1; 470 evtchn_to_irq[evtchn] = -1;
383 irq_info[irq] = IRQ_UNBOUND; 471 irq_info[irq] = mk_unbound_info();
384 472
385 dynamic_irq_cleanup(irq); 473 dynamic_irq_cleanup(irq);
386 } 474 }
@@ -498,8 +586,8 @@ irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
498 for(i = 0; i < NR_EVENT_CHANNELS; i++) { 586 for(i = 0; i < NR_EVENT_CHANNELS; i++) {
499 if (sync_test_bit(i, sh->evtchn_pending)) { 587 if (sync_test_bit(i, sh->evtchn_pending)) {
500 printk(" %d: event %d -> irq %d\n", 588 printk(" %d: event %d -> irq %d\n",
501 cpu_evtchn[i], i, 589 cpu_from_evtchn(i), i,
502 evtchn_to_irq[i]); 590 evtchn_to_irq[i]);
503 } 591 }
504 } 592 }
505 593
@@ -508,7 +596,6 @@ irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
508 return IRQ_HANDLED; 596 return IRQ_HANDLED;
509} 597}
510 598
511
512/* 599/*
513 * Search the CPUs pending events bitmasks. For each one found, map 600 * Search the CPUs pending events bitmasks. For each one found, map
514 * the event number to an irq, and feed it into do_IRQ() for 601 * the event number to an irq, and feed it into do_IRQ() for
@@ -521,11 +608,15 @@ irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
521void xen_evtchn_do_upcall(struct pt_regs *regs) 608void xen_evtchn_do_upcall(struct pt_regs *regs)
522{ 609{
523 int cpu = get_cpu(); 610 int cpu = get_cpu();
611 struct pt_regs *old_regs = set_irq_regs(regs);
524 struct shared_info *s = HYPERVISOR_shared_info; 612 struct shared_info *s = HYPERVISOR_shared_info;
525 struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu); 613 struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
526 static DEFINE_PER_CPU(unsigned, nesting_count); 614 static DEFINE_PER_CPU(unsigned, nesting_count);
527 unsigned count; 615 unsigned count;
528 616
617 exit_idle();
618 irq_enter();
619
529 do { 620 do {
530 unsigned long pending_words; 621 unsigned long pending_words;
531 622
@@ -550,7 +641,7 @@ void xen_evtchn_do_upcall(struct pt_regs *regs)
550 int irq = evtchn_to_irq[port]; 641 int irq = evtchn_to_irq[port];
551 642
552 if (irq != -1) 643 if (irq != -1)
553 xen_do_IRQ(irq, regs); 644 handle_irq(irq, regs);
554 } 645 }
555 } 646 }
556 647
@@ -561,12 +652,17 @@ void xen_evtchn_do_upcall(struct pt_regs *regs)
561 } while(count != 1); 652 } while(count != 1);
562 653
563out: 654out:
655 irq_exit();
656 set_irq_regs(old_regs);
657
564 put_cpu(); 658 put_cpu();
565} 659}
566 660
567/* Rebind a new event channel to an existing irq. */ 661/* Rebind a new event channel to an existing irq. */
568void rebind_evtchn_irq(int evtchn, int irq) 662void rebind_evtchn_irq(int evtchn, int irq)
569{ 663{
664 struct irq_info *info = info_for_irq(irq);
665
570 /* Make sure the irq is masked, since the new event channel 666 /* Make sure the irq is masked, since the new event channel
571 will also be masked. */ 667 will also be masked. */
572 disable_irq(irq); 668 disable_irq(irq);
@@ -576,11 +672,11 @@ void rebind_evtchn_irq(int evtchn, int irq)
576 /* After resume the irq<->evtchn mappings are all cleared out */ 672 /* After resume the irq<->evtchn mappings are all cleared out */
577 BUG_ON(evtchn_to_irq[evtchn] != -1); 673 BUG_ON(evtchn_to_irq[evtchn] != -1);
578 /* Expect irq to have been bound before, 674 /* Expect irq to have been bound before,
579 so the bindcount should be non-0 */ 675 so there should be a proper type */
580 BUG_ON(irq_bindcount[irq] == 0); 676 BUG_ON(info->type == IRQT_UNBOUND);
581 677
582 evtchn_to_irq[evtchn] = irq; 678 evtchn_to_irq[evtchn] = irq;
583 irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn); 679 irq_info[irq] = mk_evtchn_info(evtchn);
584 680
585 spin_unlock(&irq_mapping_update_lock); 681 spin_unlock(&irq_mapping_update_lock);
586 682
@@ -690,8 +786,7 @@ static void restore_cpu_virqs(unsigned int cpu)
690 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1) 786 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
691 continue; 787 continue;
692 788
693 BUG_ON(irq_info[irq].type != IRQT_VIRQ); 789 BUG_ON(virq_from_irq(irq) != virq);
694 BUG_ON(irq_info[irq].index != virq);
695 790
696 /* Get a new binding from Xen. */ 791 /* Get a new binding from Xen. */
697 bind_virq.virq = virq; 792 bind_virq.virq = virq;
@@ -703,7 +798,7 @@ static void restore_cpu_virqs(unsigned int cpu)
703 798
704 /* Record the new mapping. */ 799 /* Record the new mapping. */
705 evtchn_to_irq[evtchn] = irq; 800 evtchn_to_irq[evtchn] = irq;
706 irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn); 801 irq_info[irq] = mk_virq_info(evtchn, virq);
707 bind_evtchn_to_cpu(evtchn, cpu); 802 bind_evtchn_to_cpu(evtchn, cpu);
708 803
709 /* Ready for use. */ 804 /* Ready for use. */
@@ -720,8 +815,7 @@ static void restore_cpu_ipis(unsigned int cpu)
720 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1) 815 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
721 continue; 816 continue;
722 817
723 BUG_ON(irq_info[irq].type != IRQT_IPI); 818 BUG_ON(ipi_from_irq(irq) != ipi);
724 BUG_ON(irq_info[irq].index != ipi);
725 819
726 /* Get a new binding from Xen. */ 820 /* Get a new binding from Xen. */
727 bind_ipi.vcpu = cpu; 821 bind_ipi.vcpu = cpu;
@@ -732,7 +826,7 @@ static void restore_cpu_ipis(unsigned int cpu)
732 826
733 /* Record the new mapping. */ 827 /* Record the new mapping. */
734 evtchn_to_irq[evtchn] = irq; 828 evtchn_to_irq[evtchn] = irq;
735 irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn); 829 irq_info[irq] = mk_ipi_info(evtchn, ipi);
736 bind_evtchn_to_cpu(evtchn, cpu); 830 bind_evtchn_to_cpu(evtchn, cpu);
737 831
738 /* Ready for use. */ 832 /* Ready for use. */
@@ -812,8 +906,11 @@ void xen_irq_resume(void)
812 906
813static struct irq_chip xen_dynamic_chip __read_mostly = { 907static struct irq_chip xen_dynamic_chip __read_mostly = {
814 .name = "xen-dyn", 908 .name = "xen-dyn",
909
910 .disable = disable_dynirq,
815 .mask = disable_dynirq, 911 .mask = disable_dynirq,
816 .unmask = enable_dynirq, 912 .unmask = enable_dynirq,
913
817 .ack = ack_dynirq, 914 .ack = ack_dynirq,
818 .set_affinity = set_affinity_irq, 915 .set_affinity = set_affinity_irq,
819 .retrigger = retrigger_dynirq, 916 .retrigger = retrigger_dynirq,
@@ -822,6 +919,10 @@ static struct irq_chip xen_dynamic_chip __read_mostly = {
822void __init xen_init_IRQ(void) 919void __init xen_init_IRQ(void)
823{ 920{
824 int i; 921 int i;
922 size_t size = nr_cpu_ids * sizeof(struct cpu_evtchn_s);
923
924 cpu_evtchn_mask_p = alloc_bootmem(size);
925 BUG_ON(cpu_evtchn_mask_p == NULL);
825 926
826 init_evtchn_cpu_bindings(); 927 init_evtchn_cpu_bindings();
827 928
@@ -829,9 +930,5 @@ void __init xen_init_IRQ(void)
829 for (i = 0; i < NR_EVENT_CHANNELS; i++) 930 for (i = 0; i < NR_EVENT_CHANNELS; i++)
830 mask_evtchn(i); 931 mask_evtchn(i);
831 932
832 /* Dynamic IRQ space is currently unbound. Zero the refcnts. */
833 for (i = 0; i < nr_irqs; i++)
834 irq_bindcount[i] = 0;
835
836 irq_ctx_init(smp_processor_id()); 933 irq_ctx_init(smp_processor_id());
837} 934}
diff --git a/drivers/xen/manage.c b/drivers/xen/manage.c
index 56892a142ee2..3ccd348d112d 100644
--- a/drivers/xen/manage.c
+++ b/drivers/xen/manage.c
@@ -108,7 +108,7 @@ static void do_suspend(void)
108 /* XXX use normal device tree? */ 108 /* XXX use normal device tree? */
109 xenbus_suspend(); 109 xenbus_suspend();
110 110
111 err = stop_machine(xen_suspend, &cancelled, &cpumask_of_cpu(0)); 111 err = stop_machine(xen_suspend, &cancelled, cpumask_of(0));
112 if (err) { 112 if (err) {
113 printk(KERN_ERR "failed to start xen_suspend: %d\n", err); 113 printk(KERN_ERR "failed to start xen_suspend: %d\n", err);
114 goto out; 114 goto out;
diff --git a/include/acpi/acpiosxf.h b/include/acpi/acpiosxf.h
index a62720a7edc0..ab0b85cf21f3 100644
--- a/include/acpi/acpiosxf.h
+++ b/include/acpi/acpiosxf.h
@@ -144,6 +144,7 @@ void __iomem *acpi_os_map_memory(acpi_physical_address where,
144 acpi_size length); 144 acpi_size length);
145 145
146void acpi_os_unmap_memory(void __iomem * logical_address, acpi_size size); 146void acpi_os_unmap_memory(void __iomem * logical_address, acpi_size size);
147void early_acpi_os_unmap_memory(void __iomem * virt, acpi_size size);
147 148
148#ifdef ACPI_FUTURE_USAGE 149#ifdef ACPI_FUTURE_USAGE
149acpi_status 150acpi_status
diff --git a/include/acpi/acpixf.h b/include/acpi/acpixf.h
index c8e8cf45830f..cc40102fe2f3 100644
--- a/include/acpi/acpixf.h
+++ b/include/acpi/acpixf.h
@@ -130,6 +130,10 @@ acpi_get_table_header(acpi_string signature,
130 struct acpi_table_header *out_table_header); 130 struct acpi_table_header *out_table_header);
131 131
132acpi_status 132acpi_status
133acpi_get_table_with_size(acpi_string signature,
134 u32 instance, struct acpi_table_header **out_table,
135 acpi_size *tbl_size);
136acpi_status
133acpi_get_table(acpi_string signature, 137acpi_get_table(acpi_string signature,
134 u32 instance, struct acpi_table_header **out_table); 138 u32 instance, struct acpi_table_header **out_table);
135 139
diff --git a/include/asm-generic/percpu.h b/include/asm-generic/percpu.h
index b0e63c672ebd..00f45ff081a6 100644
--- a/include/asm-generic/percpu.h
+++ b/include/asm-generic/percpu.h
@@ -80,4 +80,56 @@ extern void setup_per_cpu_areas(void);
80#define DECLARE_PER_CPU(type, name) extern PER_CPU_ATTRIBUTES \ 80#define DECLARE_PER_CPU(type, name) extern PER_CPU_ATTRIBUTES \
81 __typeof__(type) per_cpu_var(name) 81 __typeof__(type) per_cpu_var(name)
82 82
83/*
84 * Optional methods for optimized non-lvalue per-cpu variable access.
85 *
86 * @var can be a percpu variable or a field of it and its size should
87 * equal char, int or long. percpu_read() evaluates to a lvalue and
88 * all others to void.
89 *
90 * These operations are guaranteed to be atomic w.r.t. preemption.
91 * The generic versions use plain get/put_cpu_var(). Archs are
92 * encouraged to implement single-instruction alternatives which don't
93 * require preemption protection.
94 */
95#ifndef percpu_read
96# define percpu_read(var) \
97 ({ \
98 typeof(per_cpu_var(var)) __tmp_var__; \
99 __tmp_var__ = get_cpu_var(var); \
100 put_cpu_var(var); \
101 __tmp_var__; \
102 })
103#endif
104
105#define __percpu_generic_to_op(var, val, op) \
106do { \
107 get_cpu_var(var) op val; \
108 put_cpu_var(var); \
109} while (0)
110
111#ifndef percpu_write
112# define percpu_write(var, val) __percpu_generic_to_op(var, (val), =)
113#endif
114
115#ifndef percpu_add
116# define percpu_add(var, val) __percpu_generic_to_op(var, (val), +=)
117#endif
118
119#ifndef percpu_sub
120# define percpu_sub(var, val) __percpu_generic_to_op(var, (val), -=)
121#endif
122
123#ifndef percpu_and
124# define percpu_and(var, val) __percpu_generic_to_op(var, (val), &=)
125#endif
126
127#ifndef percpu_or
128# define percpu_or(var, val) __percpu_generic_to_op(var, (val), |=)
129#endif
130
131#ifndef percpu_xor
132# define percpu_xor(var, val) __percpu_generic_to_op(var, (val), ^=)
133#endif
134
83#endif /* _ASM_GENERIC_PERCPU_H_ */ 135#endif /* _ASM_GENERIC_PERCPU_H_ */
diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h
index 79a7ff925bf8..4ce48e878530 100644
--- a/include/asm-generic/sections.h
+++ b/include/asm-generic/sections.h
@@ -9,7 +9,7 @@ extern char __bss_start[], __bss_stop[];
9extern char __init_begin[], __init_end[]; 9extern char __init_begin[], __init_end[];
10extern char _sinittext[], _einittext[]; 10extern char _sinittext[], _einittext[];
11extern char _end[]; 11extern char _end[];
12extern char __per_cpu_start[], __per_cpu_end[]; 12extern char __per_cpu_load[], __per_cpu_start[], __per_cpu_end[];
13extern char __kprobes_text_start[], __kprobes_text_end[]; 13extern char __kprobes_text_start[], __kprobes_text_end[];
14extern char __initdata_begin[], __initdata_end[]; 14extern char __initdata_begin[], __initdata_end[];
15extern char __start_rodata[], __end_rodata[]; 15extern char __start_rodata[], __end_rodata[];
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index aca40b93bd28..a654d724d3b0 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -427,12 +427,59 @@
427 *(.initcall7.init) \ 427 *(.initcall7.init) \
428 *(.initcall7s.init) 428 *(.initcall7s.init)
429 429
430/**
431 * PERCPU_VADDR - define output section for percpu area
432 * @vaddr: explicit base address (optional)
433 * @phdr: destination PHDR (optional)
434 *
435 * Macro which expands to output section for percpu area. If @vaddr
436 * is not blank, it specifies explicit base address and all percpu
437 * symbols will be offset from the given address. If blank, @vaddr
438 * always equals @laddr + LOAD_OFFSET.
439 *
440 * @phdr defines the output PHDR to use if not blank. Be warned that
441 * output PHDR is sticky. If @phdr is specified, the next output
442 * section in the linker script will go there too. @phdr should have
443 * a leading colon.
444 *
445 * Note that this macros defines __per_cpu_load as an absolute symbol.
446 * If there is no need to put the percpu section at a predetermined
447 * address, use PERCPU().
448 */
449#define PERCPU_VADDR(vaddr, phdr) \
450 VMLINUX_SYMBOL(__per_cpu_load) = .; \
451 .data.percpu vaddr : AT(VMLINUX_SYMBOL(__per_cpu_load) \
452 - LOAD_OFFSET) { \
453 VMLINUX_SYMBOL(__per_cpu_start) = .; \
454 *(.data.percpu.first) \
455 *(.data.percpu.page_aligned) \
456 *(.data.percpu) \
457 *(.data.percpu.shared_aligned) \
458 VMLINUX_SYMBOL(__per_cpu_end) = .; \
459 } phdr \
460 . = VMLINUX_SYMBOL(__per_cpu_load) + SIZEOF(.data.percpu);
461
462/**
463 * PERCPU - define output section for percpu area, simple version
464 * @align: required alignment
465 *
466 * Align to @align and outputs output section for percpu area. This
467 * macro doesn't maniuplate @vaddr or @phdr and __per_cpu_load and
468 * __per_cpu_start will be identical.
469 *
470 * This macro is equivalent to ALIGN(align); PERCPU_VADDR( , ) except
471 * that __per_cpu_load is defined as a relative symbol against
472 * .data.percpu which is required for relocatable x86_32
473 * configuration.
474 */
430#define PERCPU(align) \ 475#define PERCPU(align) \
431 . = ALIGN(align); \ 476 . = ALIGN(align); \
432 VMLINUX_SYMBOL(__per_cpu_start) = .; \ 477 .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { \
433 .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { \ 478 VMLINUX_SYMBOL(__per_cpu_load) = .; \
479 VMLINUX_SYMBOL(__per_cpu_start) = .; \
480 *(.data.percpu.first) \
434 *(.data.percpu.page_aligned) \ 481 *(.data.percpu.page_aligned) \
435 *(.data.percpu) \ 482 *(.data.percpu) \
436 *(.data.percpu.shared_aligned) \ 483 *(.data.percpu.shared_aligned) \
437 } \ 484 VMLINUX_SYMBOL(__per_cpu_end) = .; \
438 VMLINUX_SYMBOL(__per_cpu_end) = .; 485 }
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 6fce2fc2d124..78199151c00b 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -79,6 +79,7 @@ typedef int (*acpi_table_handler) (struct acpi_table_header *table);
79typedef int (*acpi_table_entry_handler) (struct acpi_subtable_header *header, const unsigned long end); 79typedef int (*acpi_table_entry_handler) (struct acpi_subtable_header *header, const unsigned long end);
80 80
81char * __acpi_map_table (unsigned long phys_addr, unsigned long size); 81char * __acpi_map_table (unsigned long phys_addr, unsigned long size);
82void __acpi_unmap_table(char *map, unsigned long size);
82int early_acpi_boot_init(void); 83int early_acpi_boot_init(void);
83int acpi_boot_init (void); 84int acpi_boot_init (void);
84int acpi_boot_table_init (void); 85int acpi_boot_table_init (void);
diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h
index 95837bfb5256..455d83219fae 100644
--- a/include/linux/bootmem.h
+++ b/include/linux/bootmem.h
@@ -65,23 +65,20 @@ extern void free_bootmem(unsigned long addr, unsigned long size);
65#define BOOTMEM_DEFAULT 0 65#define BOOTMEM_DEFAULT 0
66#define BOOTMEM_EXCLUSIVE (1<<0) 66#define BOOTMEM_EXCLUSIVE (1<<0)
67 67
68extern int reserve_bootmem(unsigned long addr,
69 unsigned long size,
70 int flags);
68extern int reserve_bootmem_node(pg_data_t *pgdat, 71extern int reserve_bootmem_node(pg_data_t *pgdat,
69 unsigned long physaddr, 72 unsigned long physaddr,
70 unsigned long size, 73 unsigned long size,
71 int flags); 74 int flags);
72#ifndef CONFIG_HAVE_ARCH_BOOTMEM_NODE
73extern int reserve_bootmem(unsigned long addr, unsigned long size, int flags);
74#endif
75 75
76extern void *__alloc_bootmem_nopanic(unsigned long size, 76extern void *__alloc_bootmem(unsigned long size,
77 unsigned long align, 77 unsigned long align,
78 unsigned long goal); 78 unsigned long goal);
79extern void *__alloc_bootmem(unsigned long size, 79extern void *__alloc_bootmem_nopanic(unsigned long size,
80 unsigned long align, 80 unsigned long align,
81 unsigned long goal); 81 unsigned long goal);
82extern void *__alloc_bootmem_low(unsigned long size,
83 unsigned long align,
84 unsigned long goal);
85extern void *__alloc_bootmem_node(pg_data_t *pgdat, 82extern void *__alloc_bootmem_node(pg_data_t *pgdat,
86 unsigned long size, 83 unsigned long size,
87 unsigned long align, 84 unsigned long align,
@@ -90,30 +87,35 @@ extern void *__alloc_bootmem_node_nopanic(pg_data_t *pgdat,
90 unsigned long size, 87 unsigned long size,
91 unsigned long align, 88 unsigned long align,
92 unsigned long goal); 89 unsigned long goal);
90extern void *__alloc_bootmem_low(unsigned long size,
91 unsigned long align,
92 unsigned long goal);
93extern void *__alloc_bootmem_low_node(pg_data_t *pgdat, 93extern void *__alloc_bootmem_low_node(pg_data_t *pgdat,
94 unsigned long size, 94 unsigned long size,
95 unsigned long align, 95 unsigned long align,
96 unsigned long goal); 96 unsigned long goal);
97#ifndef CONFIG_HAVE_ARCH_BOOTMEM_NODE 97
98#define alloc_bootmem(x) \ 98#define alloc_bootmem(x) \
99 __alloc_bootmem(x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS)) 99 __alloc_bootmem(x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
100#define alloc_bootmem_nopanic(x) \ 100#define alloc_bootmem_nopanic(x) \
101 __alloc_bootmem_nopanic(x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS)) 101 __alloc_bootmem_nopanic(x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
102#define alloc_bootmem_low(x) \
103 __alloc_bootmem_low(x, SMP_CACHE_BYTES, 0)
104#define alloc_bootmem_pages(x) \ 102#define alloc_bootmem_pages(x) \
105 __alloc_bootmem(x, PAGE_SIZE, __pa(MAX_DMA_ADDRESS)) 103 __alloc_bootmem(x, PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
106#define alloc_bootmem_pages_nopanic(x) \ 104#define alloc_bootmem_pages_nopanic(x) \
107 __alloc_bootmem_nopanic(x, PAGE_SIZE, __pa(MAX_DMA_ADDRESS)) 105 __alloc_bootmem_nopanic(x, PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
108#define alloc_bootmem_low_pages(x) \
109 __alloc_bootmem_low(x, PAGE_SIZE, 0)
110#define alloc_bootmem_node(pgdat, x) \ 106#define alloc_bootmem_node(pgdat, x) \
111 __alloc_bootmem_node(pgdat, x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS)) 107 __alloc_bootmem_node(pgdat, x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
112#define alloc_bootmem_pages_node(pgdat, x) \ 108#define alloc_bootmem_pages_node(pgdat, x) \
113 __alloc_bootmem_node(pgdat, x, PAGE_SIZE, __pa(MAX_DMA_ADDRESS)) 109 __alloc_bootmem_node(pgdat, x, PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
110#define alloc_bootmem_pages_node_nopanic(pgdat, x) \
111 __alloc_bootmem_node_nopanic(pgdat, x, PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
112
113#define alloc_bootmem_low(x) \
114 __alloc_bootmem_low(x, SMP_CACHE_BYTES, 0)
115#define alloc_bootmem_low_pages(x) \
116 __alloc_bootmem_low(x, PAGE_SIZE, 0)
114#define alloc_bootmem_low_pages_node(pgdat, x) \ 117#define alloc_bootmem_low_pages_node(pgdat, x) \
115 __alloc_bootmem_low_node(pgdat, x, PAGE_SIZE, 0) 118 __alloc_bootmem_low_node(pgdat, x, PAGE_SIZE, 0)
116#endif /* !CONFIG_HAVE_ARCH_BOOTMEM_NODE */
117 119
118extern int reserve_bootmem_generic(unsigned long addr, unsigned long size, 120extern int reserve_bootmem_generic(unsigned long addr, unsigned long size,
119 int flags); 121 int flags);
diff --git a/include/linux/bsg.h b/include/linux/bsg.h
index 3f0c64ace424..ecb4730d0868 100644
--- a/include/linux/bsg.h
+++ b/include/linux/bsg.h
@@ -1,6 +1,8 @@
1#ifndef BSG_H 1#ifndef BSG_H
2#define BSG_H 2#define BSG_H
3 3
4#include <linux/types.h>
5
4#define BSG_PROTOCOL_SCSI 0 6#define BSG_PROTOCOL_SCSI 0
5 7
6#define BSG_SUB_PROTOCOL_SCSI_CMD 0 8#define BSG_SUB_PROTOCOL_SCSI_CMD 0
diff --git a/include/linux/decompress/bunzip2.h b/include/linux/decompress/bunzip2.h
new file mode 100644
index 000000000000..115272137a9c
--- /dev/null
+++ b/include/linux/decompress/bunzip2.h
@@ -0,0 +1,10 @@
1#ifndef DECOMPRESS_BUNZIP2_H
2#define DECOMPRESS_BUNZIP2_H
3
4int bunzip2(unsigned char *inbuf, int len,
5 int(*fill)(void*, unsigned int),
6 int(*flush)(void*, unsigned int),
7 unsigned char *output,
8 int *pos,
9 void(*error)(char *x));
10#endif
diff --git a/include/linux/decompress/generic.h b/include/linux/decompress/generic.h
new file mode 100644
index 000000000000..6dfb856327bb
--- /dev/null
+++ b/include/linux/decompress/generic.h
@@ -0,0 +1,33 @@
1#ifndef DECOMPRESS_GENERIC_H
2#define DECOMPRESS_GENERIC_H
3
4/* Minimal chunksize to be read.
5 *Bzip2 prefers at least 4096
6 *Lzma prefers 0x10000 */
7#define COMPR_IOBUF_SIZE 4096
8
9typedef int (*decompress_fn) (unsigned char *inbuf, int len,
10 int(*fill)(void*, unsigned int),
11 int(*writebb)(void*, unsigned int),
12 unsigned char *output,
13 int *posp,
14 void(*error)(char *x));
15
16/* inbuf - input buffer
17 *len - len of pre-read data in inbuf
18 *fill - function to fill inbuf if empty
19 *writebb - function to write out outbug
20 *posp - if non-null, input position (number of bytes read) will be
21 * returned here
22 *
23 *If len != 0, the inbuf is initialized (with as much data), and fill
24 *should not be called
25 *If len = 0, the inbuf is allocated, but empty. Its size is IOBUF_SIZE
26 *fill should be called (repeatedly...) to read data, at most IOBUF_SIZE
27 */
28
29/* Utility routine to detect the decompression method */
30decompress_fn decompress_method(const unsigned char *inbuf, int len,
31 const char **name);
32
33#endif
diff --git a/include/linux/decompress/inflate.h b/include/linux/decompress/inflate.h
new file mode 100644
index 000000000000..f9b06ccc3e5c
--- /dev/null
+++ b/include/linux/decompress/inflate.h
@@ -0,0 +1,13 @@
1#ifndef INFLATE_H
2#define INFLATE_H
3
4/* Other housekeeping constants */
5#define INBUFSIZ 4096
6
7int gunzip(unsigned char *inbuf, int len,
8 int(*fill)(void*, unsigned int),
9 int(*flush)(void*, unsigned int),
10 unsigned char *output,
11 int *pos,
12 void(*error_fn)(char *x));
13#endif
diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h
new file mode 100644
index 000000000000..12ff8c3f1d05
--- /dev/null
+++ b/include/linux/decompress/mm.h
@@ -0,0 +1,87 @@
1/*
2 * linux/compr_mm.h
3 *
4 * Memory management for pre-boot and ramdisk uncompressors
5 *
6 * Authors: Alain Knaff <alain@knaff.lu>
7 *
8 */
9
10#ifndef DECOMPR_MM_H
11#define DECOMPR_MM_H
12
13#ifdef STATIC
14
15/* Code active when included from pre-boot environment: */
16
17/* A trivial malloc implementation, adapted from
18 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
19 */
20static unsigned long malloc_ptr;
21static int malloc_count;
22
23static void *malloc(int size)
24{
25 void *p;
26
27 if (size < 0)
28 error("Malloc error");
29 if (!malloc_ptr)
30 malloc_ptr = free_mem_ptr;
31
32 malloc_ptr = (malloc_ptr + 3) & ~3; /* Align */
33
34 p = (void *)malloc_ptr;
35 malloc_ptr += size;
36
37 if (free_mem_end_ptr && malloc_ptr >= free_mem_end_ptr)
38 error("Out of memory");
39
40 malloc_count++;
41 return p;
42}
43
44static void free(void *where)
45{
46 malloc_count--;
47 if (!malloc_count)
48 malloc_ptr = free_mem_ptr;
49}
50
51#define large_malloc(a) malloc(a)
52#define large_free(a) free(a)
53
54#define set_error_fn(x)
55
56#define INIT
57
58#else /* STATIC */
59
60/* Code active when compiled standalone for use when loading ramdisk: */
61
62#include <linux/kernel.h>
63#include <linux/fs.h>
64#include <linux/string.h>
65#include <linux/vmalloc.h>
66
67/* Use defines rather than static inline in order to avoid spurious
68 * warnings when not needed (indeed large_malloc / large_free are not
69 * needed by inflate */
70
71#define malloc(a) kmalloc(a, GFP_KERNEL)
72#define free(a) kfree(a)
73
74#define large_malloc(a) vmalloc(a)
75#define large_free(a) vfree(a)
76
77static void(*error)(char *m);
78#define set_error_fn(x) error = x;
79
80#define INIT __init
81#define STATIC
82
83#include <linux/init.h>
84
85#endif /* STATIC */
86
87#endif /* DECOMPR_MM_H */
diff --git a/include/linux/decompress/unlzma.h b/include/linux/decompress/unlzma.h
new file mode 100644
index 000000000000..7796538f1bf4
--- /dev/null
+++ b/include/linux/decompress/unlzma.h
@@ -0,0 +1,12 @@
1#ifndef DECOMPRESS_UNLZMA_H
2#define DECOMPRESS_UNLZMA_H
3
4int unlzma(unsigned char *, int,
5 int(*fill)(void*, unsigned int),
6 int(*flush)(void*, unsigned int),
7 unsigned char *output,
8 int *posp,
9 void(*error)(char *x)
10 );
11
12#endif
diff --git a/include/linux/elfcore.h b/include/linux/elfcore.h
index 5ca54d77079f..7605c5e9589f 100644
--- a/include/linux/elfcore.h
+++ b/include/linux/elfcore.h
@@ -111,6 +111,15 @@ static inline void elf_core_copy_regs(elf_gregset_t *elfregs, struct pt_regs *re
111#endif 111#endif
112} 112}
113 113
114static inline void elf_core_copy_kernel_regs(elf_gregset_t *elfregs, struct pt_regs *regs)
115{
116#ifdef ELF_CORE_COPY_KERNEL_REGS
117 ELF_CORE_COPY_KERNEL_REGS((*elfregs), regs);
118#else
119 elf_core_copy_regs(elfregs, regs);
120#endif
121}
122
114static inline int elf_core_copy_task_regs(struct task_struct *t, elf_gregset_t* elfregs) 123static inline int elf_core_copy_task_regs(struct task_struct *t, elf_gregset_t* elfregs)
115{ 124{
116#ifdef ELF_CORE_COPY_TASK_REGS 125#ifdef ELF_CORE_COPY_TASK_REGS
diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h
index 0216e1bdbc56..cfe4fe1b7132 100644
--- a/include/linux/if_ether.h
+++ b/include/linux/if_ether.h
@@ -78,6 +78,7 @@
78#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ 78#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
79#define ETH_P_AOE 0x88A2 /* ATA over Ethernet */ 79#define ETH_P_AOE 0x88A2 /* ATA over Ethernet */
80#define ETH_P_TIPC 0x88CA /* TIPC */ 80#define ETH_P_TIPC 0x88CA /* TIPC */
81#define ETH_P_FCOE 0x8906 /* Fibre Channel over Ethernet */
81#define ETH_P_EDSA 0xDADA /* Ethertype DSA [ NOT AN OFFICIALLY REGISTERED ID ] */ 82#define ETH_P_EDSA 0xDADA /* Ethertype DSA [ NOT AN OFFICIALLY REGISTERED ID ] */
82 83
83/* 84/*
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 91658d076598..0c9cb63e6895 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -484,6 +484,7 @@ int show_interrupts(struct seq_file *p, void *v);
484struct irq_desc; 484struct irq_desc;
485 485
486extern int early_irq_init(void); 486extern int early_irq_init(void);
487extern int arch_probe_nr_irqs(void);
487extern int arch_early_irq_init(void); 488extern int arch_early_irq_init(void);
488extern int arch_init_chip_data(struct irq_desc *desc, int cpu); 489extern int arch_init_chip_data(struct irq_desc *desc, int cpu);
489 490
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 6db939a575bd..873e4ac11b81 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -180,11 +180,11 @@ struct irq_desc {
180 unsigned int irqs_unhandled; 180 unsigned int irqs_unhandled;
181 spinlock_t lock; 181 spinlock_t lock;
182#ifdef CONFIG_SMP 182#ifdef CONFIG_SMP
183 cpumask_t affinity; 183 cpumask_var_t affinity;
184 unsigned int cpu; 184 unsigned int cpu;
185#endif
186#ifdef CONFIG_GENERIC_PENDING_IRQ 185#ifdef CONFIG_GENERIC_PENDING_IRQ
187 cpumask_t pending_mask; 186 cpumask_var_t pending_mask;
187#endif
188#endif 188#endif
189#ifdef CONFIG_PROC_FS 189#ifdef CONFIG_PROC_FS
190 struct proc_dir_entry *dir; 190 struct proc_dir_entry *dir;
@@ -414,4 +414,84 @@ extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
414 414
415#endif /* !CONFIG_S390 */ 415#endif /* !CONFIG_S390 */
416 416
417#ifdef CONFIG_SMP
418/**
419 * init_alloc_desc_masks - allocate cpumasks for irq_desc
420 * @desc: pointer to irq_desc struct
421 * @cpu: cpu which will be handling the cpumasks
422 * @boot: true if need bootmem
423 *
424 * Allocates affinity and pending_mask cpumask if required.
425 * Returns true if successful (or not required).
426 * Side effect: affinity has all bits set, pending_mask has all bits clear.
427 */
428static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu,
429 bool boot)
430{
431 int node;
432
433 if (boot) {
434 alloc_bootmem_cpumask_var(&desc->affinity);
435 cpumask_setall(desc->affinity);
436
437#ifdef CONFIG_GENERIC_PENDING_IRQ
438 alloc_bootmem_cpumask_var(&desc->pending_mask);
439 cpumask_clear(desc->pending_mask);
440#endif
441 return true;
442 }
443
444 node = cpu_to_node(cpu);
445
446 if (!alloc_cpumask_var_node(&desc->affinity, GFP_ATOMIC, node))
447 return false;
448 cpumask_setall(desc->affinity);
449
450#ifdef CONFIG_GENERIC_PENDING_IRQ
451 if (!alloc_cpumask_var_node(&desc->pending_mask, GFP_ATOMIC, node)) {
452 free_cpumask_var(desc->affinity);
453 return false;
454 }
455 cpumask_clear(desc->pending_mask);
456#endif
457 return true;
458}
459
460/**
461 * init_copy_desc_masks - copy cpumasks for irq_desc
462 * @old_desc: pointer to old irq_desc struct
463 * @new_desc: pointer to new irq_desc struct
464 *
465 * Insures affinity and pending_masks are copied to new irq_desc.
466 * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the
467 * irq_desc struct so the copy is redundant.
468 */
469
470static inline void init_copy_desc_masks(struct irq_desc *old_desc,
471 struct irq_desc *new_desc)
472{
473#ifdef CONFIG_CPUMASKS_OFFSTACK
474 cpumask_copy(new_desc->affinity, old_desc->affinity);
475
476#ifdef CONFIG_GENERIC_PENDING_IRQ
477 cpumask_copy(new_desc->pending_mask, old_desc->pending_mask);
478#endif
479#endif
480}
481
482#else /* !CONFIG_SMP */
483
484static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu,
485 bool boot)
486{
487 return true;
488}
489
490static inline void init_copy_desc_masks(struct irq_desc *old_desc,
491 struct irq_desc *new_desc)
492{
493}
494
495#endif /* CONFIG_SMP */
496
417#endif /* _LINUX_IRQ_H */ 497#endif /* _LINUX_IRQ_H */
diff --git a/include/linux/irqnr.h b/include/linux/irqnr.h
index 52ebbb4b161d..ec87b212ff7d 100644
--- a/include/linux/irqnr.h
+++ b/include/linux/irqnr.h
@@ -20,6 +20,7 @@
20 20
21# define for_each_irq_desc_reverse(irq, desc) \ 21# define for_each_irq_desc_reverse(irq, desc) \
22 for (irq = nr_irqs - 1; irq >= 0; irq--) 22 for (irq = nr_irqs - 1; irq >= 0; irq--)
23
23#else /* CONFIG_GENERIC_HARDIRQS */ 24#else /* CONFIG_GENERIC_HARDIRQS */
24 25
25extern int nr_irqs; 26extern int nr_irqs;
diff --git a/include/linux/kprobes.h b/include/linux/kprobes.h
index 32851eef48f0..2ec6cc14a114 100644
--- a/include/linux/kprobes.h
+++ b/include/linux/kprobes.h
@@ -182,6 +182,14 @@ struct kprobe_blackpoint {
182DECLARE_PER_CPU(struct kprobe *, current_kprobe); 182DECLARE_PER_CPU(struct kprobe *, current_kprobe);
183DECLARE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); 183DECLARE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
184 184
185/*
186 * For #ifdef avoidance:
187 */
188static inline int kprobes_built_in(void)
189{
190 return 1;
191}
192
185#ifdef CONFIG_KRETPROBES 193#ifdef CONFIG_KRETPROBES
186extern void arch_prepare_kretprobe(struct kretprobe_instance *ri, 194extern void arch_prepare_kretprobe(struct kretprobe_instance *ri,
187 struct pt_regs *regs); 195 struct pt_regs *regs);
@@ -271,8 +279,16 @@ void unregister_kretprobes(struct kretprobe **rps, int num);
271void kprobe_flush_task(struct task_struct *tk); 279void kprobe_flush_task(struct task_struct *tk);
272void recycle_rp_inst(struct kretprobe_instance *ri, struct hlist_head *head); 280void recycle_rp_inst(struct kretprobe_instance *ri, struct hlist_head *head);
273 281
274#else /* CONFIG_KPROBES */ 282#else /* !CONFIG_KPROBES: */
275 283
284static inline int kprobes_built_in(void)
285{
286 return 0;
287}
288static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
289{
290 return 0;
291}
276static inline struct kprobe *get_kprobe(void *addr) 292static inline struct kprobe *get_kprobe(void *addr)
277{ 293{
278 return NULL; 294 return NULL;
@@ -329,5 +345,5 @@ static inline void unregister_kretprobes(struct kretprobe **rps, int num)
329static inline void kprobe_flush_task(struct task_struct *tk) 345static inline void kprobe_flush_task(struct task_struct *tk)
330{ 346{
331} 347}
332#endif /* CONFIG_KPROBES */ 348#endif /* CONFIG_KPROBES */
333#endif /* _LINUX_KPROBES_H */ 349#endif /* _LINUX_KPROBES_H */
diff --git a/include/linux/magic.h b/include/linux/magic.h
index 0b4df7eba852..5b4e28bcb788 100644
--- a/include/linux/magic.h
+++ b/include/linux/magic.h
@@ -49,4 +49,5 @@
49#define FUTEXFS_SUPER_MAGIC 0xBAD1DEA 49#define FUTEXFS_SUPER_MAGIC 0xBAD1DEA
50#define INOTIFYFS_SUPER_MAGIC 0x2BAD1DEA 50#define INOTIFYFS_SUPER_MAGIC 0x2BAD1DEA
51 51
52#define STACK_END_MAGIC 0x57AC6E9D
52#endif /* __LINUX_MAGIC_H__ */ 53#endif /* __LINUX_MAGIC_H__ */
diff --git a/include/linux/major.h b/include/linux/major.h
index 88249452b935..058ec15dd060 100644
--- a/include/linux/major.h
+++ b/include/linux/major.h
@@ -171,5 +171,6 @@
171#define VIOTAPE_MAJOR 230 171#define VIOTAPE_MAJOR 230
172 172
173#define BLOCK_EXT_MAJOR 259 173#define BLOCK_EXT_MAJOR 259
174#define SCSI_OSD_MAJOR 260 /* open-osd's OSD scsi device */
174 175
175#endif 176#endif
diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h
index a820f816a49e..beb6ec99cfef 100644
--- a/include/linux/miscdevice.h
+++ b/include/linux/miscdevice.h
@@ -26,6 +26,7 @@
26#define TUN_MINOR 200 26#define TUN_MINOR 200
27#define MWAVE_MINOR 219 /* ACP/Mwave Modem */ 27#define MWAVE_MINOR 219 /* ACP/Mwave Modem */
28#define MPT_MINOR 220 28#define MPT_MINOR 220
29#define MPT2SAS_MINOR 221
29#define HPET_MINOR 228 30#define HPET_MINOR 228
30#define FUSE_MINOR 229 31#define FUSE_MINOR 229
31#define KVM_MINOR 232 32#define KVM_MINOR 232
diff --git a/include/linux/mmiotrace.h b/include/linux/mmiotrace.h
index 139d7c88d9c9..3d1b7bde1283 100644
--- a/include/linux/mmiotrace.h
+++ b/include/linux/mmiotrace.h
@@ -1,5 +1,5 @@
1#ifndef MMIOTRACE_H 1#ifndef _LINUX_MMIOTRACE_H
2#define MMIOTRACE_H 2#define _LINUX_MMIOTRACE_H
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <linux/list.h> 5#include <linux/list.h>
@@ -13,28 +13,34 @@ typedef void (*kmmio_post_handler_t)(struct kmmio_probe *,
13 unsigned long condition, struct pt_regs *); 13 unsigned long condition, struct pt_regs *);
14 14
15struct kmmio_probe { 15struct kmmio_probe {
16 struct list_head list; /* kmmio internal list */ 16 /* kmmio internal list: */
17 unsigned long addr; /* start location of the probe point */ 17 struct list_head list;
18 unsigned long len; /* length of the probe region */ 18 /* start location of the probe point: */
19 kmmio_pre_handler_t pre_handler; /* Called before addr is executed. */ 19 unsigned long addr;
20 kmmio_post_handler_t post_handler; /* Called after addr is executed */ 20 /* length of the probe region: */
21 void *private; 21 unsigned long len;
22 /* Called before addr is executed: */
23 kmmio_pre_handler_t pre_handler;
24 /* Called after addr is executed: */
25 kmmio_post_handler_t post_handler;
26 void *private;
22}; 27};
23 28
29extern unsigned int kmmio_count;
30
31extern int register_kmmio_probe(struct kmmio_probe *p);
32extern void unregister_kmmio_probe(struct kmmio_probe *p);
33
34#ifdef CONFIG_MMIOTRACE
24/* kmmio is active by some kmmio_probes? */ 35/* kmmio is active by some kmmio_probes? */
25static inline int is_kmmio_active(void) 36static inline int is_kmmio_active(void)
26{ 37{
27 extern unsigned int kmmio_count;
28 return kmmio_count; 38 return kmmio_count;
29} 39}
30 40
31extern int register_kmmio_probe(struct kmmio_probe *p);
32extern void unregister_kmmio_probe(struct kmmio_probe *p);
33
34/* Called from page fault handler. */ 41/* Called from page fault handler. */
35extern int kmmio_handler(struct pt_regs *regs, unsigned long addr); 42extern int kmmio_handler(struct pt_regs *regs, unsigned long addr);
36 43
37#ifdef CONFIG_MMIOTRACE
38/* Called from ioremap.c */ 44/* Called from ioremap.c */
39extern void mmiotrace_ioremap(resource_size_t offset, unsigned long size, 45extern void mmiotrace_ioremap(resource_size_t offset, unsigned long size,
40 void __iomem *addr); 46 void __iomem *addr);
@@ -43,7 +49,17 @@ extern void mmiotrace_iounmap(volatile void __iomem *addr);
43/* For anyone to insert markers. Remember trailing newline. */ 49/* For anyone to insert markers. Remember trailing newline. */
44extern int mmiotrace_printk(const char *fmt, ...) 50extern int mmiotrace_printk(const char *fmt, ...)
45 __attribute__ ((format (printf, 1, 2))); 51 __attribute__ ((format (printf, 1, 2)));
46#else 52#else /* !CONFIG_MMIOTRACE: */
53static inline int is_kmmio_active(void)
54{
55 return 0;
56}
57
58static inline int kmmio_handler(struct pt_regs *regs, unsigned long addr)
59{
60 return 0;
61}
62
47static inline void mmiotrace_ioremap(resource_size_t offset, 63static inline void mmiotrace_ioremap(resource_size_t offset,
48 unsigned long size, void __iomem *addr) 64 unsigned long size, void __iomem *addr)
49{ 65{
@@ -63,28 +79,28 @@ static inline int mmiotrace_printk(const char *fmt, ...)
63#endif /* CONFIG_MMIOTRACE */ 79#endif /* CONFIG_MMIOTRACE */
64 80
65enum mm_io_opcode { 81enum mm_io_opcode {
66 MMIO_READ = 0x1, /* struct mmiotrace_rw */ 82 MMIO_READ = 0x1, /* struct mmiotrace_rw */
67 MMIO_WRITE = 0x2, /* struct mmiotrace_rw */ 83 MMIO_WRITE = 0x2, /* struct mmiotrace_rw */
68 MMIO_PROBE = 0x3, /* struct mmiotrace_map */ 84 MMIO_PROBE = 0x3, /* struct mmiotrace_map */
69 MMIO_UNPROBE = 0x4, /* struct mmiotrace_map */ 85 MMIO_UNPROBE = 0x4, /* struct mmiotrace_map */
70 MMIO_UNKNOWN_OP = 0x5, /* struct mmiotrace_rw */ 86 MMIO_UNKNOWN_OP = 0x5, /* struct mmiotrace_rw */
71}; 87};
72 88
73struct mmiotrace_rw { 89struct mmiotrace_rw {
74 resource_size_t phys; /* PCI address of register */ 90 resource_size_t phys; /* PCI address of register */
75 unsigned long value; 91 unsigned long value;
76 unsigned long pc; /* optional program counter */ 92 unsigned long pc; /* optional program counter */
77 int map_id; 93 int map_id;
78 unsigned char opcode; /* one of MMIO_{READ,WRITE,UNKNOWN_OP} */ 94 unsigned char opcode; /* one of MMIO_{READ,WRITE,UNKNOWN_OP} */
79 unsigned char width; /* size of register access in bytes */ 95 unsigned char width; /* size of register access in bytes */
80}; 96};
81 97
82struct mmiotrace_map { 98struct mmiotrace_map {
83 resource_size_t phys; /* base address in PCI space */ 99 resource_size_t phys; /* base address in PCI space */
84 unsigned long virt; /* base virtual address */ 100 unsigned long virt; /* base virtual address */
85 unsigned long len; /* mapping size */ 101 unsigned long len; /* mapping size */
86 int map_id; 102 int map_id;
87 unsigned char opcode; /* MMIO_PROBE or MMIO_UNPROBE */ 103 unsigned char opcode; /* MMIO_PROBE or MMIO_UNPROBE */
88}; 104};
89 105
90/* in kernel/trace/trace_mmiotrace.c */ 106/* in kernel/trace/trace_mmiotrace.c */
@@ -94,4 +110,4 @@ extern void mmio_trace_rw(struct mmiotrace_rw *rw);
94extern void mmio_trace_mapping(struct mmiotrace_map *map); 110extern void mmio_trace_mapping(struct mmiotrace_map *map);
95extern int mmio_trace_printk(const char *fmt, va_list args); 111extern int mmio_trace_printk(const char *fmt, va_list args);
96 112
97#endif /* MMIOTRACE_H */ 113#endif /* _LINUX_MMIOTRACE_H */
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 1b55952a17f6..2e7783f4a755 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -594,6 +594,14 @@ struct net_device_ops {
594#define HAVE_NETDEV_POLL 594#define HAVE_NETDEV_POLL
595 void (*ndo_poll_controller)(struct net_device *dev); 595 void (*ndo_poll_controller)(struct net_device *dev);
596#endif 596#endif
597#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
598 int (*ndo_fcoe_ddp_setup)(struct net_device *dev,
599 u16 xid,
600 struct scatterlist *sgl,
601 unsigned int sgc);
602 int (*ndo_fcoe_ddp_done)(struct net_device *dev,
603 u16 xid);
604#endif
597}; 605};
598 606
599/* 607/*
@@ -662,14 +670,17 @@ struct net_device
662#define NETIF_F_GRO 16384 /* Generic receive offload */ 670#define NETIF_F_GRO 16384 /* Generic receive offload */
663#define NETIF_F_LRO 32768 /* large receive offload */ 671#define NETIF_F_LRO 32768 /* large receive offload */
664 672
673#define NETIF_F_FCOE_CRC (1 << 24) /* FCoE CRC32 */
674
665 /* Segmentation offload features */ 675 /* Segmentation offload features */
666#define NETIF_F_GSO_SHIFT 16 676#define NETIF_F_GSO_SHIFT 16
667#define NETIF_F_GSO_MASK 0xffff0000 677#define NETIF_F_GSO_MASK 0x00ff0000
668#define NETIF_F_TSO (SKB_GSO_TCPV4 << NETIF_F_GSO_SHIFT) 678#define NETIF_F_TSO (SKB_GSO_TCPV4 << NETIF_F_GSO_SHIFT)
669#define NETIF_F_UFO (SKB_GSO_UDP << NETIF_F_GSO_SHIFT) 679#define NETIF_F_UFO (SKB_GSO_UDP << NETIF_F_GSO_SHIFT)
670#define NETIF_F_GSO_ROBUST (SKB_GSO_DODGY << NETIF_F_GSO_SHIFT) 680#define NETIF_F_GSO_ROBUST (SKB_GSO_DODGY << NETIF_F_GSO_SHIFT)
671#define NETIF_F_TSO_ECN (SKB_GSO_TCP_ECN << NETIF_F_GSO_SHIFT) 681#define NETIF_F_TSO_ECN (SKB_GSO_TCP_ECN << NETIF_F_GSO_SHIFT)
672#define NETIF_F_TSO6 (SKB_GSO_TCPV6 << NETIF_F_GSO_SHIFT) 682#define NETIF_F_TSO6 (SKB_GSO_TCPV6 << NETIF_F_GSO_SHIFT)
683#define NETIF_F_FSO (SKB_GSO_FCOE << NETIF_F_GSO_SHIFT)
673 684
674 /* List of features with software fallbacks. */ 685 /* List of features with software fallbacks. */
675#define NETIF_F_GSO_SOFTWARE (NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6) 686#define NETIF_F_GSO_SOFTWARE (NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6)
@@ -852,6 +863,11 @@ struct net_device
852 struct dcbnl_rtnl_ops *dcbnl_ops; 863 struct dcbnl_rtnl_ops *dcbnl_ops;
853#endif 864#endif
854 865
866#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
867 /* max exchange id for FCoE LRO by ddp */
868 unsigned int fcoe_ddp_xid;
869#endif
870
855#ifdef CONFIG_COMPAT_NET_DEV_OPS 871#ifdef CONFIG_COMPAT_NET_DEV_OPS
856 struct { 872 struct {
857 int (*init)(struct net_device *dev); 873 int (*init)(struct net_device *dev);
diff --git a/include/linux/percpu.h b/include/linux/percpu.h
index 9f2a3751873a..ee5615d65211 100644
--- a/include/linux/percpu.h
+++ b/include/linux/percpu.h
@@ -5,53 +5,66 @@
5#include <linux/slab.h> /* For kmalloc() */ 5#include <linux/slab.h> /* For kmalloc() */
6#include <linux/smp.h> 6#include <linux/smp.h>
7#include <linux/cpumask.h> 7#include <linux/cpumask.h>
8#include <linux/pfn.h>
8 9
9#include <asm/percpu.h> 10#include <asm/percpu.h>
10 11
12#ifndef PER_CPU_BASE_SECTION
13#ifdef CONFIG_SMP
14#define PER_CPU_BASE_SECTION ".data.percpu"
15#else
16#define PER_CPU_BASE_SECTION ".data"
17#endif
18#endif
19
11#ifdef CONFIG_SMP 20#ifdef CONFIG_SMP
12#define DEFINE_PER_CPU(type, name) \
13 __attribute__((__section__(".data.percpu"))) \
14 PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name
15 21
16#ifdef MODULE 22#ifdef MODULE
17#define SHARED_ALIGNED_SECTION ".data.percpu" 23#define PER_CPU_SHARED_ALIGNED_SECTION ""
18#else 24#else
19#define SHARED_ALIGNED_SECTION ".data.percpu.shared_aligned" 25#define PER_CPU_SHARED_ALIGNED_SECTION ".shared_aligned"
20#endif 26#endif
27#define PER_CPU_FIRST_SECTION ".first"
21 28
22#define DEFINE_PER_CPU_SHARED_ALIGNED(type, name) \ 29#else
23 __attribute__((__section__(SHARED_ALIGNED_SECTION))) \ 30
24 PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name \ 31#define PER_CPU_SHARED_ALIGNED_SECTION ""
25 ____cacheline_aligned_in_smp 32#define PER_CPU_FIRST_SECTION ""
26 33
27#define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \ 34#endif
28 __attribute__((__section__(".data.percpu.page_aligned"))) \ 35
36#define DEFINE_PER_CPU_SECTION(type, name, section) \
37 __attribute__((__section__(PER_CPU_BASE_SECTION section))) \
29 PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name 38 PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name
30#else 39
31#define DEFINE_PER_CPU(type, name) \ 40#define DEFINE_PER_CPU(type, name) \
32 PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name 41 DEFINE_PER_CPU_SECTION(type, name, "")
33 42
34#define DEFINE_PER_CPU_SHARED_ALIGNED(type, name) \ 43#define DEFINE_PER_CPU_SHARED_ALIGNED(type, name) \
35 DEFINE_PER_CPU(type, name) 44 DEFINE_PER_CPU_SECTION(type, name, PER_CPU_SHARED_ALIGNED_SECTION) \
45 ____cacheline_aligned_in_smp
36 46
37#define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \ 47#define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \
38 DEFINE_PER_CPU(type, name) 48 DEFINE_PER_CPU_SECTION(type, name, ".page_aligned")
39#endif 49
50#define DEFINE_PER_CPU_FIRST(type, name) \
51 DEFINE_PER_CPU_SECTION(type, name, PER_CPU_FIRST_SECTION)
40 52
41#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var) 53#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var)
42#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var) 54#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var)
43 55
44/* Enough to cover all DEFINE_PER_CPUs in kernel, including modules. */ 56/* enough to cover all DEFINE_PER_CPUs in modules */
45#ifndef PERCPU_ENOUGH_ROOM
46#ifdef CONFIG_MODULES 57#ifdef CONFIG_MODULES
47#define PERCPU_MODULE_RESERVE 8192 58#define PERCPU_MODULE_RESERVE (8 << 10)
48#else 59#else
49#define PERCPU_MODULE_RESERVE 0 60#define PERCPU_MODULE_RESERVE 0
50#endif 61#endif
51 62
63#ifndef PERCPU_ENOUGH_ROOM
52#define PERCPU_ENOUGH_ROOM \ 64#define PERCPU_ENOUGH_ROOM \
53 (__per_cpu_end - __per_cpu_start + PERCPU_MODULE_RESERVE) 65 (ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES) + \
54#endif /* PERCPU_ENOUGH_ROOM */ 66 PERCPU_MODULE_RESERVE)
67#endif
55 68
56/* 69/*
57 * Must be an lvalue. Since @var must be a simple identifier, 70 * Must be an lvalue. Since @var must be a simple identifier,
@@ -65,52 +78,94 @@
65 78
66#ifdef CONFIG_SMP 79#ifdef CONFIG_SMP
67 80
81#ifdef CONFIG_HAVE_DYNAMIC_PER_CPU_AREA
82
83/* minimum unit size, also is the maximum supported allocation size */
84#define PCPU_MIN_UNIT_SIZE PFN_ALIGN(64 << 10)
85
86/*
87 * PERCPU_DYNAMIC_RESERVE indicates the amount of free area to piggy
88 * back on the first chunk for dynamic percpu allocation if arch is
89 * manually allocating and mapping it for faster access (as a part of
90 * large page mapping for example).
91 *
92 * The following values give between one and two pages of free space
93 * after typical minimal boot (2-way SMP, single disk and NIC) with
94 * both defconfig and a distro config on x86_64 and 32. More
95 * intelligent way to determine this would be nice.
96 */
97#if BITS_PER_LONG > 32
98#define PERCPU_DYNAMIC_RESERVE (20 << 10)
99#else
100#define PERCPU_DYNAMIC_RESERVE (12 << 10)
101#endif
102
103extern void *pcpu_base_addr;
104
105typedef struct page * (*pcpu_get_page_fn_t)(unsigned int cpu, int pageno);
106typedef void (*pcpu_populate_pte_fn_t)(unsigned long addr);
107
108extern size_t __init pcpu_setup_first_chunk(pcpu_get_page_fn_t get_page_fn,
109 size_t static_size, size_t reserved_size,
110 ssize_t dyn_size, ssize_t unit_size,
111 void *base_addr,
112 pcpu_populate_pte_fn_t populate_pte_fn);
113
114extern ssize_t __init pcpu_embed_first_chunk(
115 size_t static_size, size_t reserved_size,
116 ssize_t dyn_size, ssize_t unit_size);
117
118/*
119 * Use this to get to a cpu's version of the per-cpu object
120 * dynamically allocated. Non-atomic access to the current CPU's
121 * version should probably be combined with get_cpu()/put_cpu().
122 */
123#define per_cpu_ptr(ptr, cpu) SHIFT_PERCPU_PTR((ptr), per_cpu_offset((cpu)))
124
125extern void *__alloc_reserved_percpu(size_t size, size_t align);
126
127#else /* CONFIG_HAVE_DYNAMIC_PER_CPU_AREA */
128
68struct percpu_data { 129struct percpu_data {
69 void *ptrs[1]; 130 void *ptrs[1];
70}; 131};
71 132
72#define __percpu_disguise(pdata) (struct percpu_data *)~(unsigned long)(pdata) 133#define __percpu_disguise(pdata) (struct percpu_data *)~(unsigned long)(pdata)
73/* 134
74 * Use this to get to a cpu's version of the per-cpu object dynamically 135#define per_cpu_ptr(ptr, cpu) \
75 * allocated. Non-atomic access to the current CPU's version should 136({ \
76 * probably be combined with get_cpu()/put_cpu(). 137 struct percpu_data *__p = __percpu_disguise(ptr); \
77 */ 138 (__typeof__(ptr))__p->ptrs[(cpu)]; \
78#define percpu_ptr(ptr, cpu) \
79({ \
80 struct percpu_data *__p = __percpu_disguise(ptr); \
81 (__typeof__(ptr))__p->ptrs[(cpu)]; \
82}) 139})
83 140
84extern void *__percpu_alloc_mask(size_t size, gfp_t gfp, cpumask_t *mask); 141#endif /* CONFIG_HAVE_DYNAMIC_PER_CPU_AREA */
85extern void percpu_free(void *__pdata); 142
143extern void *__alloc_percpu(size_t size, size_t align);
144extern void free_percpu(void *__pdata);
86 145
87#else /* CONFIG_SMP */ 146#else /* CONFIG_SMP */
88 147
89#define percpu_ptr(ptr, cpu) ({ (void)(cpu); (ptr); }) 148#define per_cpu_ptr(ptr, cpu) ({ (void)(cpu); (ptr); })
90 149
91static __always_inline void *__percpu_alloc_mask(size_t size, gfp_t gfp, cpumask_t *mask) 150static inline void *__alloc_percpu(size_t size, size_t align)
92{ 151{
93 return kzalloc(size, gfp); 152 /*
153 * Can't easily make larger alignment work with kmalloc. WARN
154 * on it. Larger alignment should only be used for module
155 * percpu sections on SMP for which this path isn't used.
156 */
157 WARN_ON_ONCE(align > SMP_CACHE_BYTES);
158 return kzalloc(size, GFP_KERNEL);
94} 159}
95 160
96static inline void percpu_free(void *__pdata) 161static inline void free_percpu(void *p)
97{ 162{
98 kfree(__pdata); 163 kfree(p);
99} 164}
100 165
101#endif /* CONFIG_SMP */ 166#endif /* CONFIG_SMP */
102 167
103#define percpu_alloc_mask(size, gfp, mask) \ 168#define alloc_percpu(type) (type *)__alloc_percpu(sizeof(type), \
104 __percpu_alloc_mask((size), (gfp), &(mask)) 169 __alignof__(type))
105
106#define percpu_alloc(size, gfp) percpu_alloc_mask((size), (gfp), cpu_online_map)
107
108/* (legacy) interface for use without CPU hotplug handling */
109
110#define __alloc_percpu(size) percpu_alloc_mask((size), GFP_KERNEL, \
111 cpu_possible_map)
112#define alloc_percpu(type) (type *)__alloc_percpu(sizeof(type))
113#define free_percpu(ptr) percpu_free((ptr))
114#define per_cpu_ptr(ptr, cpu) percpu_ptr((ptr), (cpu))
115 170
116#endif /* __LINUX_PERCPU_H */ 171#endif /* __LINUX_PERCPU_H */
diff --git a/include/linux/sched.h b/include/linux/sched.h
index ff904b0606d4..1d19c025f9d2 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1185,10 +1185,9 @@ struct task_struct {
1185 pid_t pid; 1185 pid_t pid;
1186 pid_t tgid; 1186 pid_t tgid;
1187 1187
1188#ifdef CONFIG_CC_STACKPROTECTOR
1189 /* Canary value for the -fstack-protector gcc feature */ 1188 /* Canary value for the -fstack-protector gcc feature */
1190 unsigned long stack_canary; 1189 unsigned long stack_canary;
1191#endif 1190
1192 /* 1191 /*
1193 * pointers to (original) parent process, youngest child, younger sibling, 1192 * pointers to (original) parent process, youngest child, younger sibling,
1194 * older sibling, respectively. (p->father can be replaced with 1193 * older sibling, respectively. (p->father can be replaced with
@@ -2107,6 +2106,19 @@ static inline int object_is_on_stack(void *obj)
2107 2106
2108extern void thread_info_cache_init(void); 2107extern void thread_info_cache_init(void);
2109 2108
2109#ifdef CONFIG_DEBUG_STACK_USAGE
2110static inline unsigned long stack_not_used(struct task_struct *p)
2111{
2112 unsigned long *n = end_of_stack(p);
2113
2114 do { /* Skip over canary */
2115 n++;
2116 } while (!*n);
2117
2118 return (unsigned long)n - (unsigned long)end_of_stack(p);
2119}
2120#endif
2121
2110/* set thread flags in other task's structures 2122/* set thread flags in other task's structures
2111 * - see asm/thread_info.h for TIF_xxxx flags available 2123 * - see asm/thread_info.h for TIF_xxxx flags available
2112 */ 2124 */
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index bb1981fd60f3..55d67300fa10 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -236,6 +236,8 @@ enum {
236 SKB_GSO_TCP_ECN = 1 << 3, 236 SKB_GSO_TCP_ECN = 1 << 3,
237 237
238 SKB_GSO_TCPV6 = 1 << 4, 238 SKB_GSO_TCPV6 = 1 << 4,
239
240 SKB_GSO_FCOE = 1 << 5,
239}; 241};
240 242
241#if BITS_PER_LONG > 32 243#if BITS_PER_LONG > 32
diff --git a/include/linux/smp.h b/include/linux/smp.h
index 715196b09d67..bbacb7baa446 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -176,6 +176,12 @@ static inline void init_call_single_data(void)
176#define put_cpu() preempt_enable() 176#define put_cpu() preempt_enable()
177#define put_cpu_no_resched() preempt_enable_no_resched() 177#define put_cpu_no_resched() preempt_enable_no_resched()
178 178
179/*
180 * Callback to arch code if there's nosmp or maxcpus=0 on the
181 * boot command line:
182 */
183extern void arch_disable_smp_support(void);
184
179void smp_setup_processor_id(void); 185void smp_setup_processor_id(void);
180 186
181#endif /* __LINUX_SMP_H */ 187#endif /* __LINUX_SMP_H */
diff --git a/include/linux/stackprotector.h b/include/linux/stackprotector.h
new file mode 100644
index 000000000000..6f3e54c704c0
--- /dev/null
+++ b/include/linux/stackprotector.h
@@ -0,0 +1,16 @@
1#ifndef _LINUX_STACKPROTECTOR_H
2#define _LINUX_STACKPROTECTOR_H 1
3
4#include <linux/compiler.h>
5#include <linux/sched.h>
6#include <linux/random.h>
7
8#ifdef CONFIG_CC_STACKPROTECTOR
9# include <asm/stackprotector.h>
10#else
11static inline void boot_init_stack_canary(void)
12{
13}
14#endif
15
16#endif
diff --git a/include/linux/topology.h b/include/linux/topology.h
index e632d29f0544..a16b9e06f2e5 100644
--- a/include/linux/topology.h
+++ b/include/linux/topology.h
@@ -193,5 +193,11 @@ int arch_update_cpu_topology(void);
193#ifndef topology_core_siblings 193#ifndef topology_core_siblings
194#define topology_core_siblings(cpu) cpumask_of_cpu(cpu) 194#define topology_core_siblings(cpu) cpumask_of_cpu(cpu)
195#endif 195#endif
196#ifndef topology_thread_cpumask
197#define topology_thread_cpumask(cpu) cpumask_of(cpu)
198#endif
199#ifndef topology_core_cpumask
200#define topology_core_cpumask(cpu) cpumask_of(cpu)
201#endif
196 202
197#endif /* _LINUX_TOPOLOGY_H */ 203#endif /* _LINUX_TOPOLOGY_H */
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 9c0890c7a06a..a43ebec3a7b9 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -95,6 +95,9 @@ extern struct vm_struct *remove_vm_area(const void *addr);
95 95
96extern int map_vm_area(struct vm_struct *area, pgprot_t prot, 96extern int map_vm_area(struct vm_struct *area, pgprot_t prot,
97 struct page ***pages); 97 struct page ***pages);
98extern int map_kernel_range_noflush(unsigned long start, unsigned long size,
99 pgprot_t prot, struct page **pages);
100extern void unmap_kernel_range_noflush(unsigned long addr, unsigned long size);
98extern void unmap_kernel_range(unsigned long addr, unsigned long size); 101extern void unmap_kernel_range(unsigned long addr, unsigned long size);
99 102
100/* Allocate/destroy a 'vmalloc' VM area. */ 103/* Allocate/destroy a 'vmalloc' VM area. */
@@ -110,5 +113,6 @@ extern long vwrite(char *buf, char *addr, unsigned long count);
110 */ 113 */
111extern rwlock_t vmlist_lock; 114extern rwlock_t vmlist_lock;
112extern struct vm_struct *vmlist; 115extern struct vm_struct *vmlist;
116extern __init void vm_area_register_early(struct vm_struct *vm, size_t align);
113 117
114#endif /* _LINUX_VMALLOC_H */ 118#endif /* _LINUX_VMALLOC_H */
diff --git a/include/scsi/fc/fc_fcoe.h b/include/scsi/fc/fc_fcoe.h
index f271d9cc0fc2..ccb3dbe90463 100644
--- a/include/scsi/fc/fc_fcoe.h
+++ b/include/scsi/fc/fc_fcoe.h
@@ -25,13 +25,6 @@
25 */ 25 */
26 26
27/* 27/*
28 * The FCoE ethertype eventually goes in net/if_ether.h.
29 */
30#ifndef ETH_P_FCOE
31#define ETH_P_FCOE 0x8906 /* FCOE ether type */
32#endif
33
34/*
35 * FC_FCOE_OUI hasn't been standardized yet. XXX TBD. 28 * FC_FCOE_OUI hasn't been standardized yet. XXX TBD.
36 */ 29 */
37#ifndef FC_FCOE_OUI 30#ifndef FC_FCOE_OUI
diff --git a/include/scsi/fc_frame.h b/include/scsi/fc_frame.h
index 04d34a71355f..59511057cee0 100644
--- a/include/scsi/fc_frame.h
+++ b/include/scsi/fc_frame.h
@@ -54,8 +54,7 @@
54#define fr_eof(fp) (fr_cb(fp)->fr_eof) 54#define fr_eof(fp) (fr_cb(fp)->fr_eof)
55#define fr_flags(fp) (fr_cb(fp)->fr_flags) 55#define fr_flags(fp) (fr_cb(fp)->fr_flags)
56#define fr_max_payload(fp) (fr_cb(fp)->fr_max_payload) 56#define fr_max_payload(fp) (fr_cb(fp)->fr_max_payload)
57#define fr_cmd(fp) (fr_cb(fp)->fr_cmd) 57#define fr_fsp(fp) (fr_cb(fp)->fr_fsp)
58#define fr_dir(fp) (fr_cmd(fp)->sc_data_direction)
59#define fr_crc(fp) (fr_cb(fp)->fr_crc) 58#define fr_crc(fp) (fr_cb(fp)->fr_crc)
60 59
61struct fc_frame { 60struct fc_frame {
@@ -66,7 +65,7 @@ struct fcoe_rcv_info {
66 struct packet_type *ptype; 65 struct packet_type *ptype;
67 struct fc_lport *fr_dev; /* transport layer private pointer */ 66 struct fc_lport *fr_dev; /* transport layer private pointer */
68 struct fc_seq *fr_seq; /* for use with exchange manager */ 67 struct fc_seq *fr_seq; /* for use with exchange manager */
69 struct scsi_cmnd *fr_cmd; /* for use of scsi command */ 68 struct fc_fcp_pkt *fr_fsp; /* for the corresponding fcp I/O */
70 u32 fr_crc; 69 u32 fr_crc;
71 u16 fr_max_payload; /* max FC payload */ 70 u16 fr_max_payload; /* max FC payload */
72 enum fc_sof fr_sof; /* start of frame delimiter */ 71 enum fc_sof fr_sof; /* start of frame delimiter */
@@ -218,20 +217,6 @@ static inline bool fc_frame_is_cmd(const struct fc_frame *fp)
218 return fc_frame_rctl(fp) == FC_RCTL_DD_UNSOL_CMD; 217 return fc_frame_rctl(fp) == FC_RCTL_DD_UNSOL_CMD;
219} 218}
220 219
221static inline bool fc_frame_is_read(const struct fc_frame *fp)
222{
223 if (fc_frame_is_cmd(fp) && fr_cmd(fp))
224 return fr_dir(fp) == DMA_FROM_DEVICE;
225 return false;
226}
227
228static inline bool fc_frame_is_write(const struct fc_frame *fp)
229{
230 if (fc_frame_is_cmd(fp) && fr_cmd(fp))
231 return fr_dir(fp) == DMA_TO_DEVICE;
232 return false;
233}
234
235/* 220/*
236 * Check for leaks. 221 * Check for leaks.
237 * Print the frame header of any currently allocated frame, assuming there 222 * Print the frame header of any currently allocated frame, assuming there
diff --git a/include/scsi/libfc.h b/include/scsi/libfc.h
index a2e126b86e3e..a70eafaad084 100644
--- a/include/scsi/libfc.h
+++ b/include/scsi/libfc.h
@@ -245,6 +245,7 @@ struct fc_fcp_pkt {
245 */ 245 */
246 struct fcp_cmnd cdb_cmd; 246 struct fcp_cmnd cdb_cmd;
247 size_t xfer_len; 247 size_t xfer_len;
248 u16 xfer_ddp; /* this xfer is ddped */
248 u32 xfer_contig_end; /* offset of end of contiguous xfer */ 249 u32 xfer_contig_end; /* offset of end of contiguous xfer */
249 u16 max_payload; /* max payload size in bytes */ 250 u16 max_payload; /* max payload size in bytes */
250 251
@@ -267,6 +268,15 @@ struct fc_fcp_pkt {
267 u8 recov_retry; /* count of recovery retries */ 268 u8 recov_retry; /* count of recovery retries */
268 struct fc_seq *recov_seq; /* sequence for REC or SRR */ 269 struct fc_seq *recov_seq; /* sequence for REC or SRR */
269}; 270};
271/*
272 * FC_FCP HELPER FUNCTIONS
273 *****************************/
274static inline bool fc_fcp_is_read(const struct fc_fcp_pkt *fsp)
275{
276 if (fsp && fsp->cmd)
277 return fsp->cmd->sc_data_direction == DMA_FROM_DEVICE;
278 return false;
279}
270 280
271/* 281/*
272 * Structure and function definitions for managing Fibre Channel Exchanges 282 * Structure and function definitions for managing Fibre Channel Exchanges
@@ -400,6 +410,21 @@ struct libfc_function_template {
400 void *arg, unsigned int timer_msec); 410 void *arg, unsigned int timer_msec);
401 411
402 /* 412 /*
413 * Sets up the DDP context for a given exchange id on the given
414 * scatterlist if LLD supports DDP for large receive.
415 *
416 * STATUS: OPTIONAL
417 */
418 int (*ddp_setup)(struct fc_lport *lp, u16 xid,
419 struct scatterlist *sgl, unsigned int sgc);
420 /*
421 * Completes the DDP transfer and returns the length of data DDPed
422 * for the given exchange id.
423 *
424 * STATUS: OPTIONAL
425 */
426 int (*ddp_done)(struct fc_lport *lp, u16 xid);
427 /*
403 * Send a frame using an existing sequence and exchange. 428 * Send a frame using an existing sequence and exchange.
404 * 429 *
405 * STATUS: OPTIONAL 430 * STATUS: OPTIONAL
@@ -654,6 +679,7 @@ struct fc_lport {
654 u16 link_speed; 679 u16 link_speed;
655 u16 link_supported_speeds; 680 u16 link_supported_speeds;
656 u16 lro_xid; /* max xid for fcoe lro */ 681 u16 lro_xid; /* max xid for fcoe lro */
682 unsigned int lso_max; /* max large send size */
657 struct fc_ns_fts fcts; /* FC-4 type masks */ 683 struct fc_ns_fts fcts; /* FC-4 type masks */
658 struct fc_els_rnid_gen rnid_gen; /* RNID information */ 684 struct fc_els_rnid_gen rnid_gen; /* RNID information */
659 685
@@ -821,6 +847,11 @@ int fc_change_queue_type(struct scsi_device *sdev, int tag_type);
821void fc_fcp_destroy(struct fc_lport *); 847void fc_fcp_destroy(struct fc_lport *);
822 848
823/* 849/*
850 * Set up direct-data placement for this I/O request
851 */
852void fc_fcp_ddp_setup(struct fc_fcp_pkt *fsp, u16 xid);
853
854/*
824 * ELS/CT interface 855 * ELS/CT interface
825 *****************************/ 856 *****************************/
826/* 857/*
diff --git a/include/scsi/libfcoe.h b/include/scsi/libfcoe.h
index 941818f29f59..c41f7d0c6efc 100644
--- a/include/scsi/libfcoe.h
+++ b/include/scsi/libfcoe.h
@@ -124,24 +124,6 @@ static inline u16 skb_fc_rxid(const struct sk_buff *skb)
124 return be16_to_cpu(skb_fc_header(skb)->fh_rx_id); 124 return be16_to_cpu(skb_fc_header(skb)->fh_rx_id);
125} 125}
126 126
127/* FIXME - DMA_BIDIRECTIONAL ? */
128#define skb_cb(skb) ((struct fcoe_rcv_info *)&((skb)->cb[0]))
129#define skb_cmd(skb) (skb_cb(skb)->fr_cmd)
130#define skb_dir(skb) (skb_cmd(skb)->sc_data_direction)
131static inline bool skb_fc_is_read(const struct sk_buff *skb)
132{
133 if (skb_fc_is_cmd(skb) && skb_cmd(skb))
134 return skb_dir(skb) == DMA_FROM_DEVICE;
135 return false;
136}
137
138static inline bool skb_fc_is_write(const struct sk_buff *skb)
139{
140 if (skb_fc_is_cmd(skb) && skb_cmd(skb))
141 return skb_dir(skb) == DMA_TO_DEVICE;
142 return false;
143}
144
145/* libfcoe funcs */ 127/* libfcoe funcs */
146int fcoe_reset(struct Scsi_Host *shost); 128int fcoe_reset(struct Scsi_Host *shost);
147u64 fcoe_wwn_from_mac(unsigned char mac[MAX_ADDR_LEN], 129u64 fcoe_wwn_from_mac(unsigned char mac[MAX_ADDR_LEN],
diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h
index 7360e1916e75..7ffaed2f94dd 100644
--- a/include/scsi/libiscsi.h
+++ b/include/scsi/libiscsi.h
@@ -45,18 +45,10 @@ struct iscsi_session;
45struct iscsi_nopin; 45struct iscsi_nopin;
46struct device; 46struct device;
47 47
48/* #define DEBUG_SCSI */
49#ifdef DEBUG_SCSI
50#define debug_scsi(fmt...) printk(KERN_INFO "iscsi: " fmt)
51#else
52#define debug_scsi(fmt...)
53#endif
54
55#define ISCSI_DEF_XMIT_CMDS_MAX 128 /* must be power of 2 */ 48#define ISCSI_DEF_XMIT_CMDS_MAX 128 /* must be power of 2 */
56#define ISCSI_MGMT_CMDS_MAX 15 49#define ISCSI_MGMT_CMDS_MAX 15
57 50
58#define ISCSI_DEF_CMD_PER_LUN 32 51#define ISCSI_DEF_CMD_PER_LUN 32
59#define ISCSI_MAX_CMD_PER_LUN 128
60 52
61/* Task Mgmt states */ 53/* Task Mgmt states */
62enum { 54enum {
@@ -326,6 +318,9 @@ struct iscsi_host {
326 spinlock_t lock; 318 spinlock_t lock;
327 int num_sessions; 319 int num_sessions;
328 int state; 320 int state;
321
322 struct workqueue_struct *workq;
323 char workq_name[20];
329}; 324};
330 325
331/* 326/*
@@ -351,7 +346,8 @@ extern int iscsi_host_get_param(struct Scsi_Host *shost,
351 enum iscsi_host_param param, char *buf); 346 enum iscsi_host_param param, char *buf);
352extern int iscsi_host_add(struct Scsi_Host *shost, struct device *pdev); 347extern int iscsi_host_add(struct Scsi_Host *shost, struct device *pdev);
353extern struct Scsi_Host *iscsi_host_alloc(struct scsi_host_template *sht, 348extern struct Scsi_Host *iscsi_host_alloc(struct scsi_host_template *sht,
354 int dd_data_size, uint16_t qdepth); 349 int dd_data_size,
350 bool xmit_can_sleep);
355extern void iscsi_host_remove(struct Scsi_Host *shost); 351extern void iscsi_host_remove(struct Scsi_Host *shost);
356extern void iscsi_host_free(struct Scsi_Host *shost); 352extern void iscsi_host_free(struct Scsi_Host *shost);
357 353
@@ -382,11 +378,12 @@ extern void iscsi_conn_stop(struct iscsi_cls_conn *, int);
382extern int iscsi_conn_bind(struct iscsi_cls_session *, struct iscsi_cls_conn *, 378extern int iscsi_conn_bind(struct iscsi_cls_session *, struct iscsi_cls_conn *,
383 int); 379 int);
384extern void iscsi_conn_failure(struct iscsi_conn *conn, enum iscsi_err err); 380extern void iscsi_conn_failure(struct iscsi_conn *conn, enum iscsi_err err);
385extern void iscsi_session_failure(struct iscsi_cls_session *cls_session, 381extern void iscsi_session_failure(struct iscsi_session *session,
386 enum iscsi_err err); 382 enum iscsi_err err);
387extern int iscsi_conn_get_param(struct iscsi_cls_conn *cls_conn, 383extern int iscsi_conn_get_param(struct iscsi_cls_conn *cls_conn,
388 enum iscsi_param param, char *buf); 384 enum iscsi_param param, char *buf);
389extern void iscsi_suspend_tx(struct iscsi_conn *conn); 385extern void iscsi_suspend_tx(struct iscsi_conn *conn);
386extern void iscsi_conn_queue_work(struct iscsi_conn *conn);
390 387
391#define iscsi_conn_printk(prefix, _c, fmt, a...) \ 388#define iscsi_conn_printk(prefix, _c, fmt, a...) \
392 iscsi_cls_conn_printk(prefix, ((struct iscsi_conn *)_c)->cls_conn, \ 389 iscsi_cls_conn_printk(prefix, ((struct iscsi_conn *)_c)->cls_conn, \
diff --git a/include/scsi/osd_attributes.h b/include/scsi/osd_attributes.h
new file mode 100644
index 000000000000..f888a6fda073
--- /dev/null
+++ b/include/scsi/osd_attributes.h
@@ -0,0 +1,327 @@
1#ifndef __OSD_ATTRIBUTES_H__
2#define __OSD_ATTRIBUTES_H__
3
4#include "osd_protocol.h"
5
6/*
7 * Contains types and constants that define attribute pages and attribute
8 * numbers and their data types.
9 */
10
11#define ATTR_SET(pg, id, l, ptr) \
12 { .attr_page = pg, .attr_id = id, .len = l, .val_ptr = ptr }
13
14#define ATTR_DEF(pg, id, l) ATTR_SET(pg, id, l, NULL)
15
16/* osd-r10 4.7.3 Attributes pages */
17enum {
18 OSD_APAGE_OBJECT_FIRST = 0x0,
19 OSD_APAGE_OBJECT_DIRECTORY = 0,
20 OSD_APAGE_OBJECT_INFORMATION = 1,
21 OSD_APAGE_OBJECT_QUOTAS = 2,
22 OSD_APAGE_OBJECT_TIMESTAMP = 3,
23 OSD_APAGE_OBJECT_COLLECTIONS = 4,
24 OSD_APAGE_OBJECT_SECURITY = 5,
25 OSD_APAGE_OBJECT_LAST = 0x2fffffff,
26
27 OSD_APAGE_PARTITION_FIRST = 0x30000000,
28 OSD_APAGE_PARTITION_DIRECTORY = OSD_APAGE_PARTITION_FIRST + 0,
29 OSD_APAGE_PARTITION_INFORMATION = OSD_APAGE_PARTITION_FIRST + 1,
30 OSD_APAGE_PARTITION_QUOTAS = OSD_APAGE_PARTITION_FIRST + 2,
31 OSD_APAGE_PARTITION_TIMESTAMP = OSD_APAGE_PARTITION_FIRST + 3,
32 OSD_APAGE_PARTITION_SECURITY = OSD_APAGE_PARTITION_FIRST + 5,
33 OSD_APAGE_PARTITION_LAST = 0x5FFFFFFF,
34
35 OSD_APAGE_COLLECTION_FIRST = 0x60000000,
36 OSD_APAGE_COLLECTION_DIRECTORY = OSD_APAGE_COLLECTION_FIRST + 0,
37 OSD_APAGE_COLLECTION_INFORMATION = OSD_APAGE_COLLECTION_FIRST + 1,
38 OSD_APAGE_COLLECTION_TIMESTAMP = OSD_APAGE_COLLECTION_FIRST + 3,
39 OSD_APAGE_COLLECTION_SECURITY = OSD_APAGE_COLLECTION_FIRST + 5,
40 OSD_APAGE_COLLECTION_LAST = 0x8FFFFFFF,
41
42 OSD_APAGE_ROOT_FIRST = 0x90000000,
43 OSD_APAGE_ROOT_DIRECTORY = OSD_APAGE_ROOT_FIRST + 0,
44 OSD_APAGE_ROOT_INFORMATION = OSD_APAGE_ROOT_FIRST + 1,
45 OSD_APAGE_ROOT_QUOTAS = OSD_APAGE_ROOT_FIRST + 2,
46 OSD_APAGE_ROOT_TIMESTAMP = OSD_APAGE_ROOT_FIRST + 3,
47 OSD_APAGE_ROOT_SECURITY = OSD_APAGE_ROOT_FIRST + 5,
48 OSD_APAGE_ROOT_LAST = 0xBFFFFFFF,
49
50 OSD_APAGE_RESERVED_TYPE_FIRST = 0xC0000000,
51 OSD_APAGE_RESERVED_TYPE_LAST = 0xEFFFFFFF,
52
53 OSD_APAGE_COMMON_FIRST = 0xF0000000,
54 OSD_APAGE_COMMON_LAST = 0xFFFFFFFE,
55
56 OSD_APAGE_REQUEST_ALL = 0xFFFFFFFF,
57};
58
59/* subcategories of attr pages within each range above */
60enum {
61 OSD_APAGE_STD_FIRST = 0x0,
62 OSD_APAGE_STD_DIRECTORY = 0,
63 OSD_APAGE_STD_INFORMATION = 1,
64 OSD_APAGE_STD_QUOTAS = 2,
65 OSD_APAGE_STD_TIMESTAMP = 3,
66 OSD_APAGE_STD_COLLECTIONS = 4,
67 OSD_APAGE_STD_POLICY_SECURITY = 5,
68 OSD_APAGE_STD_LAST = 0x0000007F,
69
70 OSD_APAGE_RESERVED_FIRST = 0x00000080,
71 OSD_APAGE_RESERVED_LAST = 0x00007FFF,
72
73 OSD_APAGE_OTHER_STD_FIRST = 0x00008000,
74 OSD_APAGE_OTHER_STD_LAST = 0x0000EFFF,
75
76 OSD_APAGE_PUBLIC_FIRST = 0x0000F000,
77 OSD_APAGE_PUBLIC_LAST = 0x0000FFFF,
78
79 OSD_APAGE_APP_DEFINED_FIRST = 0x00010000,
80 OSD_APAGE_APP_DEFINED_LAST = 0x1FFFFFFF,
81
82 OSD_APAGE_VENDOR_SPECIFIC_FIRST = 0x20000000,
83 OSD_APAGE_VENDOR_SPECIFIC_LAST = 0x2FFFFFFF,
84};
85
86enum {
87 OSD_ATTR_PAGE_IDENTIFICATION = 0, /* in all pages 40 bytes */
88};
89
90struct page_identification {
91 u8 vendor_identification[8];
92 u8 page_identification[32];
93} __packed;
94
95struct osd_attr_page_header {
96 __be32 page_number;
97 __be32 page_length;
98} __packed;
99
100/* 7.1.2.8 Root Information attributes page (OSD_APAGE_ROOT_INFORMATION) */
101enum {
102 OSD_ATTR_RI_OSD_SYSTEM_ID = 0x3, /* 20 */
103 OSD_ATTR_RI_VENDOR_IDENTIFICATION = 0x4, /* 8 */
104 OSD_ATTR_RI_PRODUCT_IDENTIFICATION = 0x5, /* 16 */
105 OSD_ATTR_RI_PRODUCT_MODEL = 0x6, /* 32 */
106 OSD_ATTR_RI_PRODUCT_REVISION_LEVEL = 0x7, /* 4 */
107 OSD_ATTR_RI_PRODUCT_SERIAL_NUMBER = 0x8, /* variable */
108 OSD_ATTR_RI_OSD_NAME = 0x9, /* variable */
109 OSD_ATTR_RI_TOTAL_CAPACITY = 0x80, /* 8 */
110 OSD_ATTR_RI_USED_CAPACITY = 0x81, /* 8 */
111 OSD_ATTR_RI_NUMBER_OF_PARTITIONS = 0xC0, /* 8 */
112 OSD_ATTR_RI_CLOCK = 0x100, /* 6 */
113};
114/* Root_Information_attributes_page does not have a get_page structure */
115
116/* 7.1.2.9 Partition Information attributes page
117 * (OSD_APAGE_PARTITION_INFORMATION)
118 */
119enum {
120 OSD_ATTR_PI_PARTITION_ID = 0x1, /* 8 */
121 OSD_ATTR_PI_USERNAME = 0x9, /* variable */
122 OSD_ATTR_PI_USED_CAPACITY = 0x81, /* 8 */
123 OSD_ATTR_PI_NUMBER_OF_OBJECTS = 0xC1, /* 8 */
124};
125/* Partition Information attributes page does not have a get_page structure */
126
127/* 7.1.2.10 Collection Information attributes page
128 * (OSD_APAGE_COLLECTION_INFORMATION)
129 */
130enum {
131 OSD_ATTR_CI_PARTITION_ID = 0x1, /* 8 */
132 OSD_ATTR_CI_COLLECTION_OBJECT_ID = 0x2, /* 8 */
133 OSD_ATTR_CI_USERNAME = 0x9, /* variable */
134 OSD_ATTR_CI_USED_CAPACITY = 0x81, /* 8 */
135};
136/* Collection Information attributes page does not have a get_page structure */
137
138/* 7.1.2.11 User Object Information attributes page
139 * (OSD_APAGE_OBJECT_INFORMATION)
140 */
141enum {
142 OSD_ATTR_OI_PARTITION_ID = 0x1, /* 8 */
143 OSD_ATTR_OI_OBJECT_ID = 0x2, /* 8 */
144 OSD_ATTR_OI_USERNAME = 0x9, /* variable */
145 OSD_ATTR_OI_USED_CAPACITY = 0x81, /* 8 */
146 OSD_ATTR_OI_LOGICAL_LENGTH = 0x82, /* 8 */
147};
148/* Object Information attributes page does not have a get_page structure */
149
150/* 7.1.2.12 Root Quotas attributes page (OSD_APAGE_ROOT_QUOTAS) */
151enum {
152 OSD_ATTR_RQ_DEFAULT_MAXIMUM_USER_OBJECT_LENGTH = 0x1, /* 8 */
153 OSD_ATTR_RQ_PARTITION_CAPACITY_QUOTA = 0x10001, /* 8 */
154 OSD_ATTR_RQ_PARTITION_OBJECT_COUNT = 0x10002, /* 8 */
155 OSD_ATTR_RQ_PARTITION_COLLECTIONS_PER_USER_OBJECT = 0x10081, /* 4 */
156 OSD_ATTR_RQ_PARTITION_COUNT = 0x20002, /* 8 */
157};
158
159struct Root_Quotas_attributes_page {
160 struct osd_attr_page_header hdr; /* id=R+2, size=0x24 */
161 __be64 default_maximum_user_object_length;
162 __be64 partition_capacity_quota;
163 __be64 partition_object_count;
164 __be64 partition_collections_per_user_object;
165 __be64 partition_count;
166} __packed;
167
168/* 7.1.2.13 Partition Quotas attributes page (OSD_APAGE_PARTITION_QUOTAS)*/
169enum {
170 OSD_ATTR_PQ_DEFAULT_MAXIMUM_USER_OBJECT_LENGTH = 0x1, /* 8 */
171 OSD_ATTR_PQ_CAPACITY_QUOTA = 0x10001, /* 8 */
172 OSD_ATTR_PQ_OBJECT_COUNT = 0x10002, /* 8 */
173 OSD_ATTR_PQ_COLLECTIONS_PER_USER_OBJECT = 0x10081, /* 4 */
174};
175
176struct Partition_Quotas_attributes_page {
177 struct osd_attr_page_header hdr; /* id=P+2, size=0x1C */
178 __be64 default_maximum_user_object_length;
179 __be64 capacity_quota;
180 __be64 object_count;
181 __be64 collections_per_user_object;
182} __packed;
183
184/* 7.1.2.14 User Object Quotas attributes page (OSD_APAGE_OBJECT_QUOTAS) */
185enum {
186 OSD_ATTR_OQ_MAXIMUM_LENGTH = 0x1, /* 8 */
187};
188
189struct Object_Quotas_attributes_page {
190 struct osd_attr_page_header hdr; /* id=U+2, size=0x8 */
191 __be64 maximum_length;
192} __packed;
193
194/* 7.1.2.15 Root Timestamps attributes page (OSD_APAGE_ROOT_TIMESTAMP) */
195enum {
196 OSD_ATTR_RT_ATTRIBUTES_ACCESSED_TIME = 0x2, /* 6 */
197 OSD_ATTR_RT_ATTRIBUTES_MODIFIED_TIME = 0x3, /* 6 */
198 OSD_ATTR_RT_TIMESTAMP_BYPASS = 0xFFFFFFFE, /* 1 */
199};
200
201struct root_timestamps_attributes_page {
202 struct osd_attr_page_header hdr; /* id=R+3, size=0xD */
203 struct osd_timestamp attributes_accessed_time;
204 struct osd_timestamp attributes_modified_time;
205 u8 timestamp_bypass;
206} __packed;
207
208/* 7.1.2.16 Partition Timestamps attributes page
209 * (OSD_APAGE_PARTITION_TIMESTAMP)
210 */
211enum {
212 OSD_ATTR_PT_CREATED_TIME = 0x1, /* 6 */
213 OSD_ATTR_PT_ATTRIBUTES_ACCESSED_TIME = 0x2, /* 6 */
214 OSD_ATTR_PT_ATTRIBUTES_MODIFIED_TIME = 0x3, /* 6 */
215 OSD_ATTR_PT_DATA_ACCESSED_TIME = 0x4, /* 6 */
216 OSD_ATTR_PT_DATA_MODIFIED_TIME = 0x5, /* 6 */
217 OSD_ATTR_PT_TIMESTAMP_BYPASS = 0xFFFFFFFE, /* 1 */
218};
219
220struct partition_timestamps_attributes_page {
221 struct osd_attr_page_header hdr; /* id=P+3, size=0x1F */
222 struct osd_timestamp created_time;
223 struct osd_timestamp attributes_accessed_time;
224 struct osd_timestamp attributes_modified_time;
225 struct osd_timestamp data_accessed_time;
226 struct osd_timestamp data_modified_time;
227 u8 timestamp_bypass;
228} __packed;
229
230/* 7.1.2.17/18 Collection/Object Timestamps attributes page
231 * (OSD_APAGE_COLLECTION_TIMESTAMP/OSD_APAGE_OBJECT_TIMESTAMP)
232 */
233enum {
234 OSD_ATTR_OT_CREATED_TIME = 0x1, /* 6 */
235 OSD_ATTR_OT_ATTRIBUTES_ACCESSED_TIME = 0x2, /* 6 */
236 OSD_ATTR_OT_ATTRIBUTES_MODIFIED_TIME = 0x3, /* 6 */
237 OSD_ATTR_OT_DATA_ACCESSED_TIME = 0x4, /* 6 */
238 OSD_ATTR_OT_DATA_MODIFIED_TIME = 0x5, /* 6 */
239};
240
241/* same for collection */
242struct object_timestamps_attributes_page {
243 struct osd_attr_page_header hdr; /* id=C+3/3, size=0x1E */
244 struct osd_timestamp created_time;
245 struct osd_timestamp attributes_accessed_time;
246 struct osd_timestamp attributes_modified_time;
247 struct osd_timestamp data_accessed_time;
248 struct osd_timestamp data_modified_time;
249} __packed;
250
251/* 7.1.2.19 Collections attributes page */
252/* TBD */
253
254/* 7.1.2.20 Root Policy/Security attributes page (OSD_APAGE_ROOT_SECURITY) */
255enum {
256 OSD_ATTR_RS_DEFAULT_SECURITY_METHOD = 0x1, /* 1 */
257 OSD_ATTR_RS_OLDEST_VALID_NONCE_LIMIT = 0x2, /* 6 */
258 OSD_ATTR_RS_NEWEST_VALID_NONCE_LIMIT = 0x3, /* 6 */
259 OSD_ATTR_RS_PARTITION_DEFAULT_SECURITY_METHOD = 0x6, /* 1 */
260 OSD_ATTR_RS_SUPPORTED_SECURITY_METHODS = 0x7, /* 2 */
261 OSD_ATTR_RS_ADJUSTABLE_CLOCK = 0x9, /* 6 */
262 OSD_ATTR_RS_MASTER_KEY_IDENTIFIER = 0x7FFD, /* 0 or 7 */
263 OSD_ATTR_RS_ROOT_KEY_IDENTIFIER = 0x7FFE, /* 0 or 7 */
264 OSD_ATTR_RS_SUPPORTED_INTEGRITY_ALGORITHM_0 = 0x80000000,/* 1,(x16)*/
265 OSD_ATTR_RS_SUPPORTED_DH_GROUP_0 = 0x80000010,/* 1,(x16)*/
266};
267
268struct root_security_attributes_page {
269 struct osd_attr_page_header hdr; /* id=R+5, size=0x3F */
270 u8 default_security_method;
271 u8 partition_default_security_method;
272 __be16 supported_security_methods;
273 u8 mki_valid_rki_valid;
274 struct osd_timestamp oldest_valid_nonce_limit;
275 struct osd_timestamp newest_valid_nonce_limit;
276 struct osd_timestamp adjustable_clock;
277 u8 master_key_identifier[32-25];
278 u8 root_key_identifier[39-32];
279 u8 supported_integrity_algorithm[16];
280 u8 supported_dh_group[16];
281} __packed;
282
283/* 7.1.2.21 Partition Policy/Security attributes page
284 * (OSD_APAGE_PARTITION_SECURITY)
285 */
286enum {
287 OSD_ATTR_PS_DEFAULT_SECURITY_METHOD = 0x1, /* 1 */
288 OSD_ATTR_PS_OLDEST_VALID_NONCE = 0x2, /* 6 */
289 OSD_ATTR_PS_NEWEST_VALID_NONCE = 0x3, /* 6 */
290 OSD_ATTR_PS_REQUEST_NONCE_LIST_DEPTH = 0x4, /* 2 */
291 OSD_ATTR_PS_FROZEN_WORKING_KEY_BIT_MASK = 0x5, /* 2 */
292 OSD_ATTR_PS_PARTITION_KEY_IDENTIFIER = 0x7FFF, /* 0 or 7 */
293 OSD_ATTR_PS_WORKING_KEY_IDENTIFIER_FIRST = 0x8000, /* 0 or 7 */
294 OSD_ATTR_PS_WORKING_KEY_IDENTIFIER_LAST = 0x800F, /* 0 or 7 */
295 OSD_ATTR_PS_POLICY_ACCESS_TAG = 0x40000001, /* 4 */
296 OSD_ATTR_PS_USER_OBJECT_POLICY_ACCESS_TAG = 0x40000002, /* 4 */
297};
298
299struct partition_security_attributes_page {
300 struct osd_attr_page_header hdr; /* id=p+5, size=0x8f */
301 u8 reserved[3];
302 u8 default_security_method;
303 struct osd_timestamp oldest_valid_nonce;
304 struct osd_timestamp newest_valid_nonce;
305 __be16 request_nonce_list_depth;
306 __be16 frozen_working_key_bit_mask;
307 __be32 policy_access_tag;
308 __be32 user_object_policy_access_tag;
309 u8 pki_valid;
310 __be16 wki_00_0f_vld;
311 struct osd_key_identifier partition_key_identifier;
312 struct osd_key_identifier working_key_identifiers[16];
313} __packed;
314
315/* 7.1.2.22/23 Collection/Object Policy-Security attributes page
316 * (OSD_APAGE_COLLECTION_SECURITY/OSD_APAGE_OBJECT_SECURITY)
317 */
318enum {
319 OSD_ATTR_OS_POLICY_ACCESS_TAG = 0x40000001, /* 4 */
320};
321
322struct object_security_attributes_page {
323 struct osd_attr_page_header hdr; /* id=C+5/5, size=4 */
324 __be32 policy_access_tag;
325} __packed;
326
327#endif /*ndef __OSD_ATTRIBUTES_H__*/
diff --git a/include/scsi/osd_initiator.h b/include/scsi/osd_initiator.h
new file mode 100644
index 000000000000..b24d9616eb46
--- /dev/null
+++ b/include/scsi/osd_initiator.h
@@ -0,0 +1,433 @@
1/*
2 * osd_initiator.h - OSD initiator API definition
3 *
4 * Copyright (C) 2008 Panasas Inc. All rights reserved.
5 *
6 * Authors:
7 * Boaz Harrosh <bharrosh@panasas.com>
8 * Benny Halevy <bhalevy@panasas.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2
12 *
13 */
14#ifndef __OSD_INITIATOR_H__
15#define __OSD_INITIATOR_H__
16
17#include "osd_protocol.h"
18#include "osd_types.h"
19
20#include <linux/blkdev.h>
21
22/* Note: "NI" in comments below means "Not Implemented yet" */
23
24/* Configure of code:
25 * #undef if you *don't* want OSD v1 support in runtime.
26 * If #defined the initiator will dynamically configure to encode OSD v1
27 * CDB's if the target is detected to be OSD v1 only.
28 * OSD v2 only commands, options, and attributes will be ignored if target
29 * is v1 only.
30 * If #defined will result in bigger/slower code (OK Slower maybe not)
31 * Q: Should this be CONFIG_SCSI_OSD_VER1_SUPPORT and set from Kconfig?
32 */
33#define OSD_VER1_SUPPORT y
34
35enum osd_std_version {
36 OSD_VER_NONE = 0,
37 OSD_VER1 = 1,
38 OSD_VER2 = 2,
39};
40
41/*
42 * Object-based Storage Device.
43 * This object represents an OSD device.
44 * It is not a full linux device in any way. It is only
45 * a place to hang resources associated with a Linux
46 * request Q and some default properties.
47 */
48struct osd_dev {
49 struct scsi_device *scsi_device;
50 unsigned def_timeout;
51
52#ifdef OSD_VER1_SUPPORT
53 enum osd_std_version version;
54#endif
55};
56
57/* Retrieve/return osd_dev(s) for use by Kernel clients */
58struct osd_dev *osduld_path_lookup(const char *dev_name); /*Use IS_ERR/ERR_PTR*/
59void osduld_put_device(struct osd_dev *od);
60
61/* Add/remove test ioctls from external modules */
62typedef int (do_test_fn)(struct osd_dev *od, unsigned cmd, unsigned long arg);
63int osduld_register_test(unsigned ioctl, do_test_fn *do_test);
64void osduld_unregister_test(unsigned ioctl);
65
66/* These are called by uld at probe time */
67void osd_dev_init(struct osd_dev *od, struct scsi_device *scsi_device);
68void osd_dev_fini(struct osd_dev *od);
69
70/* some hi level device operations */
71int osd_auto_detect_ver(struct osd_dev *od, void *caps); /* GFP_KERNEL */
72
73/* we might want to use function vector in the future */
74static inline void osd_dev_set_ver(struct osd_dev *od, enum osd_std_version v)
75{
76#ifdef OSD_VER1_SUPPORT
77 od->version = v;
78#endif
79}
80
81struct osd_request;
82typedef void (osd_req_done_fn)(struct osd_request *or, void *private);
83
84struct osd_request {
85 struct osd_cdb cdb;
86 struct osd_data_out_integrity_info out_data_integ;
87 struct osd_data_in_integrity_info in_data_integ;
88
89 struct osd_dev *osd_dev;
90 struct request *request;
91
92 struct _osd_req_data_segment {
93 void *buff;
94 unsigned alloc_size; /* 0 here means: don't call kfree */
95 unsigned total_bytes;
96 } set_attr, enc_get_attr, get_attr;
97
98 struct _osd_io_info {
99 struct bio *bio;
100 u64 total_bytes;
101 struct request *req;
102 struct _osd_req_data_segment *last_seg;
103 u8 *pad_buff;
104 } out, in;
105
106 gfp_t alloc_flags;
107 unsigned timeout;
108 unsigned retries;
109 u8 sense[OSD_MAX_SENSE_LEN];
110 enum osd_attributes_mode attributes_mode;
111
112 osd_req_done_fn *async_done;
113 void *async_private;
114 int async_error;
115};
116
117/* OSD Version control */
118static inline bool osd_req_is_ver1(struct osd_request *or)
119{
120#ifdef OSD_VER1_SUPPORT
121 return or->osd_dev->version == OSD_VER1;
122#else
123 return false;
124#endif
125}
126
127/*
128 * How to use the osd library:
129 *
130 * osd_start_request
131 * Allocates a request.
132 *
133 * osd_req_*
134 * Call one of, to encode the desired operation.
135 *
136 * osd_add_{get,set}_attr
137 * Optionally add attributes to the CDB, list or page mode.
138 *
139 * osd_finalize_request
140 * Computes final data out/in offsets and signs the request,
141 * making it ready for execution.
142 *
143 * osd_execute_request
144 * May be called to execute it through the block layer. Other wise submit
145 * the associated block request in some other way.
146 *
147 * After execution:
148 * osd_req_decode_sense
149 * Decodes sense information to verify execution results.
150 *
151 * osd_req_decode_get_attr
152 * Retrieve osd_add_get_attr_list() values if used.
153 *
154 * osd_end_request
155 * Must be called to deallocate the request.
156 */
157
158/**
159 * osd_start_request - Allocate and initialize an osd_request
160 *
161 * @osd_dev: OSD device that holds the scsi-device and default values
162 * that the request is associated with.
163 * @gfp: The allocation flags to use for request allocation, and all
164 * subsequent allocations. This will be stored at
165 * osd_request->alloc_flags, can be changed by user later
166 *
167 * Allocate osd_request and initialize all members to the
168 * default/initial state.
169 */
170struct osd_request *osd_start_request(struct osd_dev *od, gfp_t gfp);
171
172enum osd_req_options {
173 OSD_REQ_FUA = 0x08, /* Force Unit Access */
174 OSD_REQ_DPO = 0x10, /* Disable Page Out */
175
176 OSD_REQ_BYPASS_TIMESTAMPS = 0x80,
177};
178
179/**
180 * osd_finalize_request - Sign request and prepare request for execution
181 *
182 * @or: osd_request to prepare
183 * @options: combination of osd_req_options bit flags or 0.
184 * @cap: A Pointer to an OSD_CAP_LEN bytes buffer that is received from
185 * The security manager as capabilities for this cdb.
186 * @cap_key: The cryptographic key used to sign the cdb/data. Can be null
187 * if NOSEC is used.
188 *
189 * The actual request and bios are only allocated here, so are the get_attr
190 * buffers that will receive the returned attributes. Copy's @cap to cdb.
191 * Sign the cdb/data with @cap_key.
192 */
193int osd_finalize_request(struct osd_request *or,
194 u8 options, const void *cap, const u8 *cap_key);
195
196/**
197 * osd_execute_request - Execute the request synchronously through block-layer
198 *
199 * @or: osd_request to Executed
200 *
201 * Calls blk_execute_rq to q the command and waits for completion.
202 */
203int osd_execute_request(struct osd_request *or);
204
205/**
206 * osd_execute_request_async - Execute the request without waitting.
207 *
208 * @or: - osd_request to Executed
209 * @done: (Optional) - Called at end of execution
210 * @private: - Will be passed to @done function
211 *
212 * Calls blk_execute_rq_nowait to queue the command. When execution is done
213 * optionally calls @done with @private as parameter. @or->async_error will
214 * have the return code
215 */
216int osd_execute_request_async(struct osd_request *or,
217 osd_req_done_fn *done, void *private);
218
219/**
220 * osd_req_decode_sense_full - Decode sense information after execution.
221 *
222 * @or: - osd_request to examine
223 * @osi - Recievs a more detailed error report information (optional).
224 * @silent - Do not print to dmsg (Even if enabled)
225 * @bad_obj_list - Some commands act on multiple objects. Failed objects will
226 * be recieved here (optional)
227 * @max_obj - Size of @bad_obj_list.
228 * @bad_attr_list - List of failing attributes (optional)
229 * @max_attr - Size of @bad_attr_list.
230 *
231 * After execution, sense + return code can be analyzed using this function. The
232 * return code is the final disposition on the error. So it is possible that a
233 * CHECK_CONDITION was returned from target but this will return NO_ERROR, for
234 * example on recovered errors. All parameters are optional if caller does
235 * not need any returned information.
236 * Note: This function will also dump the error to dmsg according to settings
237 * of the SCSI_OSD_DPRINT_SENSE Kconfig value. Set @silent if you know the
238 * command would routinely fail, to not spam the dmsg file.
239 */
240struct osd_sense_info {
241 int key; /* one of enum scsi_sense_keys */
242 int additional_code ; /* enum osd_additional_sense_codes */
243 union { /* Sense specific information */
244 u16 sense_info;
245 u16 cdb_field_offset; /* scsi_invalid_field_in_cdb */
246 };
247 union { /* Command specific information */
248 u64 command_info;
249 };
250
251 u32 not_initiated_command_functions; /* osd_command_functions_bits */
252 u32 completed_command_functions; /* osd_command_functions_bits */
253 struct osd_obj_id obj;
254 struct osd_attr attr;
255};
256
257int osd_req_decode_sense_full(struct osd_request *or,
258 struct osd_sense_info *osi, bool silent,
259 struct osd_obj_id *bad_obj_list, int max_obj,
260 struct osd_attr *bad_attr_list, int max_attr);
261
262static inline int osd_req_decode_sense(struct osd_request *or,
263 struct osd_sense_info *osi)
264{
265 return osd_req_decode_sense_full(or, osi, false, NULL, 0, NULL, 0);
266}
267
268/**
269 * osd_end_request - return osd_request to free store
270 *
271 * @or: osd_request to free
272 *
273 * Deallocate all osd_request resources (struct req's, BIOs, buffers, etc.)
274 */
275void osd_end_request(struct osd_request *or);
276
277/*
278 * CDB Encoding
279 *
280 * Note: call only one of the following methods.
281 */
282
283/*
284 * Device commands
285 */
286void osd_req_set_master_seed_xchg(struct osd_request *or, ...);/* NI */
287void osd_req_set_master_key(struct osd_request *or, ...);/* NI */
288
289void osd_req_format(struct osd_request *or, u64 tot_capacity);
290
291/* list all partitions
292 * @list header must be initialized to zero on first run.
293 *
294 * Call osd_is_obj_list_done() to find if we got the complete list.
295 */
296int osd_req_list_dev_partitions(struct osd_request *or,
297 osd_id initial_id, struct osd_obj_id_list *list, unsigned nelem);
298
299void osd_req_flush_obsd(struct osd_request *or,
300 enum osd_options_flush_scope_values);
301
302void osd_req_perform_scsi_command(struct osd_request *or,
303 const u8 *cdb, ...);/* NI */
304void osd_req_task_management(struct osd_request *or, ...);/* NI */
305
306/*
307 * Partition commands
308 */
309void osd_req_create_partition(struct osd_request *or, osd_id partition);
310void osd_req_remove_partition(struct osd_request *or, osd_id partition);
311
312void osd_req_set_partition_key(struct osd_request *or,
313 osd_id partition, u8 new_key_id[OSD_CRYPTO_KEYID_SIZE],
314 u8 seed[OSD_CRYPTO_SEED_SIZE]);/* NI */
315
316/* list all collections in the partition
317 * @list header must be init to zero on first run.
318 *
319 * Call osd_is_obj_list_done() to find if we got the complete list.
320 */
321int osd_req_list_partition_collections(struct osd_request *or,
322 osd_id partition, osd_id initial_id, struct osd_obj_id_list *list,
323 unsigned nelem);
324
325/* list all objects in the partition
326 * @list header must be init to zero on first run.
327 *
328 * Call osd_is_obj_list_done() to find if we got the complete list.
329 */
330int osd_req_list_partition_objects(struct osd_request *or,
331 osd_id partition, osd_id initial_id, struct osd_obj_id_list *list,
332 unsigned nelem);
333
334void osd_req_flush_partition(struct osd_request *or,
335 osd_id partition, enum osd_options_flush_scope_values);
336
337/*
338 * Collection commands
339 */
340void osd_req_create_collection(struct osd_request *or,
341 const struct osd_obj_id *);/* NI */
342void osd_req_remove_collection(struct osd_request *or,
343 const struct osd_obj_id *);/* NI */
344
345/* list all objects in the collection */
346int osd_req_list_collection_objects(struct osd_request *or,
347 const struct osd_obj_id *, osd_id initial_id,
348 struct osd_obj_id_list *list, unsigned nelem);
349
350/* V2 only filtered list of objects in the collection */
351void osd_req_query(struct osd_request *or, ...);/* NI */
352
353void osd_req_flush_collection(struct osd_request *or,
354 const struct osd_obj_id *, enum osd_options_flush_scope_values);
355
356void osd_req_get_member_attrs(struct osd_request *or, ...);/* V2-only NI */
357void osd_req_set_member_attrs(struct osd_request *or, ...);/* V2-only NI */
358
359/*
360 * Object commands
361 */
362void osd_req_create_object(struct osd_request *or, struct osd_obj_id *);
363void osd_req_remove_object(struct osd_request *or, struct osd_obj_id *);
364
365void osd_req_write(struct osd_request *or,
366 const struct osd_obj_id *, struct bio *data_out, u64 offset);
367void osd_req_append(struct osd_request *or,
368 const struct osd_obj_id *, struct bio *data_out);/* NI */
369void osd_req_create_write(struct osd_request *or,
370 const struct osd_obj_id *, struct bio *data_out, u64 offset);/* NI */
371void osd_req_clear(struct osd_request *or,
372 const struct osd_obj_id *, u64 offset, u64 len);/* NI */
373void osd_req_punch(struct osd_request *or,
374 const struct osd_obj_id *, u64 offset, u64 len);/* V2-only NI */
375
376void osd_req_flush_object(struct osd_request *or,
377 const struct osd_obj_id *, enum osd_options_flush_scope_values,
378 /*V2*/ u64 offset, /*V2*/ u64 len);
379
380void osd_req_read(struct osd_request *or,
381 const struct osd_obj_id *, struct bio *data_in, u64 offset);
382
383/*
384 * Root/Partition/Collection/Object Attributes commands
385 */
386
387/* get before set */
388void osd_req_get_attributes(struct osd_request *or, const struct osd_obj_id *);
389
390/* set before get */
391void osd_req_set_attributes(struct osd_request *or, const struct osd_obj_id *);
392
393/*
394 * Attributes appended to most commands
395 */
396
397/* Attributes List mode (or V2 CDB) */
398 /*
399 * TODO: In ver2 if at finalize time only one attr was set and no gets,
400 * then the Attributes CDB mode is used automatically to save IO.
401 */
402
403/* set a list of attributes. */
404int osd_req_add_set_attr_list(struct osd_request *or,
405 const struct osd_attr *, unsigned nelem);
406
407/* get a list of attributes */
408int osd_req_add_get_attr_list(struct osd_request *or,
409 const struct osd_attr *, unsigned nelem);
410
411/*
412 * Attributes list decoding
413 * Must be called after osd_request.request was executed
414 * It is called in a loop to decode the returned get_attr
415 * (see osd_add_get_attr)
416 */
417int osd_req_decode_get_attr_list(struct osd_request *or,
418 struct osd_attr *, int *nelem, void **iterator);
419
420/* Attributes Page mode */
421
422/*
423 * Read an attribute page and optionally set one attribute
424 *
425 * Retrieves the attribute page directly to a user buffer.
426 * @attr_page_data shall stay valid until end of execution.
427 * See osd_attributes.h for common page structures
428 */
429int osd_req_add_get_attr_page(struct osd_request *or,
430 u32 page_id, void *attr_page_data, unsigned max_page_len,
431 const struct osd_attr *set_one);
432
433#endif /* __OSD_LIB_H__ */
diff --git a/include/scsi/osd_protocol.h b/include/scsi/osd_protocol.h
new file mode 100644
index 000000000000..cd3cbf764650
--- /dev/null
+++ b/include/scsi/osd_protocol.h
@@ -0,0 +1,579 @@
1/*
2 * osd_protocol.h - OSD T10 standard C definitions.
3 *
4 * Copyright (C) 2008 Panasas Inc. All rights reserved.
5 *
6 * Authors:
7 * Boaz Harrosh <bharrosh@panasas.com>
8 * Benny Halevy <bhalevy@panasas.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2
12 *
13 * This file contains types and constants that are defined by the protocol
14 * Note: All names and symbols are taken from the OSD standard's text.
15 */
16#ifndef __OSD_PROTOCOL_H__
17#define __OSD_PROTOCOL_H__
18
19#include <linux/types.h>
20#include <asm/unaligned.h>
21#include <scsi/scsi.h>
22
23enum {
24 OSDv1_ADDITIONAL_CDB_LENGTH = 192,
25 OSDv1_TOTAL_CDB_LEN = OSDv1_ADDITIONAL_CDB_LENGTH + 8,
26 OSDv1_CAP_LEN = 80,
27 /* Latest supported version */
28/* OSD_ADDITIONAL_CDB_LENGTH = 216,*/
29 OSD_ADDITIONAL_CDB_LENGTH =
30 OSDv1_ADDITIONAL_CDB_LENGTH, /* FIXME: Pete rev-001 sup */
31 OSD_TOTAL_CDB_LEN = OSD_ADDITIONAL_CDB_LENGTH + 8,
32/* OSD_CAP_LEN = 104,*/
33 OSD_CAP_LEN = OSDv1_CAP_LEN,/* FIXME: Pete rev-001 sup */
34
35 OSD_SYSTEMID_LEN = 20,
36 OSD_CRYPTO_KEYID_SIZE = 20,
37 /*FIXME: OSDv2_CRYPTO_KEYID_SIZE = 32,*/
38 OSD_CRYPTO_SEED_SIZE = 4,
39 OSD_CRYPTO_NONCE_SIZE = 12,
40 OSD_MAX_SENSE_LEN = 252, /* from SPC-3 */
41
42 OSD_PARTITION_FIRST_ID = 0x10000,
43 OSD_OBJECT_FIRST_ID = 0x10000,
44};
45
46/* (osd-r10 5.2.4)
47 * osd2r03: 5.2.3 Caching control bits
48 */
49enum osd_options_byte {
50 OSD_CDB_FUA = 0x08, /* Force Unit Access */
51 OSD_CDB_DPO = 0x10, /* Disable Page Out */
52};
53
54/*
55 * osd2r03: 5.2.5 Isolation.
56 * First 3 bits, V2-only.
57 * Also for attr 110h "default isolation method" at Root Information page
58 */
59enum osd_options_byte_isolation {
60 OSD_ISOLATION_DEFAULT = 0,
61 OSD_ISOLATION_NONE = 1,
62 OSD_ISOLATION_STRICT = 2,
63 OSD_ISOLATION_RANGE = 4,
64 OSD_ISOLATION_FUNCTIONAL = 5,
65 OSD_ISOLATION_VENDOR = 7,
66};
67
68/* (osd-r10: 6.7)
69 * osd2r03: 6.8 FLUSH, FLUSH COLLECTION, FLUSH OSD, FLUSH PARTITION
70 */
71enum osd_options_flush_scope_values {
72 OSD_CDB_FLUSH_ALL = 0,
73 OSD_CDB_FLUSH_ATTR_ONLY = 1,
74
75 OSD_CDB_FLUSH_ALL_RECURSIVE = 2,
76 /* V2-only */
77 OSD_CDB_FLUSH_ALL_RANGE = 2,
78};
79
80/* osd2r03: 5.2.10 Timestamps control */
81enum {
82 OSD_CDB_NORMAL_TIMESTAMPS = 0,
83 OSD_CDB_BYPASS_TIMESTAMPS = 0x7f,
84};
85
86/* (osd-r10: 5.2.2.1)
87 * osd2r03: 5.2.4.1 Get and set attributes CDB format selection
88 * 2 bits at second nibble of command_specific_options byte
89 */
90enum osd_attributes_mode {
91 /* V2-only */
92 OSD_CDB_SET_ONE_ATTR = 0x10,
93
94 OSD_CDB_GET_ATTR_PAGE_SET_ONE = 0x20,
95 OSD_CDB_GET_SET_ATTR_LISTS = 0x30,
96
97 OSD_CDB_GET_SET_ATTR_MASK = 0x30,
98};
99
100/* (osd-r10: 4.12.5)
101 * osd2r03: 4.14.5 Data-In and Data-Out buffer offsets
102 * byte offset = mantissa * (2^(exponent+8))
103 * struct {
104 * unsigned mantissa: 28;
105 * int exponent: 04;
106 * }
107 */
108typedef __be32 __bitwise osd_cdb_offset;
109
110enum {
111 OSD_OFFSET_UNUSED = 0xFFFFFFFF,
112 OSD_OFFSET_MAX_BITS = 28,
113
114 OSDv1_OFFSET_MIN_SHIFT = 8,
115 OSD_OFFSET_MIN_SHIFT = 3,
116 OSD_OFFSET_MAX_SHIFT = 16,
117};
118
119/* Return the smallest allowed encoded offset that contains @offset.
120 *
121 * The actual encoded offset returned is @offset + *padding.
122 * (up to max_shift, non-inclusive)
123 */
124osd_cdb_offset __osd_encode_offset(u64 offset, unsigned *padding,
125 int min_shift, int max_shift);
126
127/* Minimum alignment is 256 bytes
128 * Note: Seems from std v1 that exponent can be from 0+8 to 0xE+8 (inclusive)
129 * which is 8 to 23 but IBM code restricts it to 16, so be it.
130 */
131static inline osd_cdb_offset osd_encode_offset_v1(u64 offset, unsigned *padding)
132{
133 return __osd_encode_offset(offset, padding,
134 OSDv1_OFFSET_MIN_SHIFT, OSD_OFFSET_MAX_SHIFT);
135}
136
137/* Minimum 8 bytes alignment
138 * Same as v1 but since exponent can be signed than a less than
139 * 256 alignment can be reached with small offsets (<2GB)
140 */
141static inline osd_cdb_offset osd_encode_offset_v2(u64 offset, unsigned *padding)
142{
143 return __osd_encode_offset(offset, padding,
144 OSD_OFFSET_MIN_SHIFT, OSD_OFFSET_MAX_SHIFT);
145}
146
147/* osd2r03: 5.2.1 Overview */
148struct osd_cdb_head {
149 struct scsi_varlen_cdb_hdr varlen_cdb;
150/*10*/ u8 options;
151 u8 command_specific_options;
152 u8 timestamp_control;
153/*13*/ u8 reserved1[3];
154/*16*/ __be64 partition;
155/*24*/ __be64 object;
156/*32*/ union { /* V1 vs V2 alignment differences */
157 struct __osdv1_cdb_addr_len {
158/*32*/ __be32 list_identifier;/* Rarely used */
159/*36*/ __be64 length;
160/*44*/ __be64 start_address;
161 } __packed v1;
162
163 struct __osdv2_cdb_addr_len {
164 /* called allocation_length in some commands */
165/*32*/ __be64 length;
166/*40*/ __be64 start_address;
167/*48*/ __be32 list_identifier;/* Rarely used */
168 } __packed v2;
169 };
170/*52*/ union { /* selected attributes mode Page/List/Single */
171 struct osd_attributes_page_mode {
172/*52*/ __be32 get_attr_page;
173/*56*/ __be32 get_attr_alloc_length;
174/*60*/ osd_cdb_offset get_attr_offset;
175
176/*64*/ __be32 set_attr_page;
177/*68*/ __be32 set_attr_id;
178/*72*/ __be32 set_attr_length;
179/*76*/ osd_cdb_offset set_attr_offset;
180/*80*/ } __packed attrs_page;
181
182 struct osd_attributes_list_mode {
183/*52*/ __be32 get_attr_desc_bytes;
184/*56*/ osd_cdb_offset get_attr_desc_offset;
185
186/*60*/ __be32 get_attr_alloc_length;
187/*64*/ osd_cdb_offset get_attr_offset;
188
189/*68*/ __be32 set_attr_bytes;
190/*72*/ osd_cdb_offset set_attr_offset;
191 __be32 not_used;
192/*80*/ } __packed attrs_list;
193
194 /* osd2r03:5.2.4.2 Set one attribute value using CDB fields */
195 struct osd_attributes_cdb_mode {
196/*52*/ __be32 set_attr_page;
197/*56*/ __be32 set_attr_id;
198/*60*/ __be16 set_attr_len;
199/*62*/ u8 set_attr_val[18];
200/*80*/ } __packed attrs_cdb;
201/*52*/ u8 get_set_attributes_parameters[28];
202 };
203} __packed;
204/*80*/
205
206/*160 v1*/
207/*184 v2*/
208struct osd_security_parameters {
209/*160*/u8 integrity_check_value[OSD_CRYPTO_KEYID_SIZE];
210/*180*/u8 request_nonce[OSD_CRYPTO_NONCE_SIZE];
211/*192*/osd_cdb_offset data_in_integrity_check_offset;
212/*196*/osd_cdb_offset data_out_integrity_check_offset;
213} __packed;
214/*200 v1*/
215/*224 v2*/
216
217/* FIXME: osdv2_security_parameters */
218
219struct osdv1_cdb {
220 struct osd_cdb_head h;
221 u8 caps[OSDv1_CAP_LEN];
222 struct osd_security_parameters sec_params;
223} __packed;
224
225struct osdv2_cdb {
226 struct osd_cdb_head h;
227 u8 caps[OSD_CAP_LEN];
228 struct osd_security_parameters sec_params;
229 /* FIXME: osdv2_security_parameters */
230} __packed;
231
232struct osd_cdb {
233 union {
234 struct osdv1_cdb v1;
235 struct osdv2_cdb v2;
236 u8 buff[OSD_TOTAL_CDB_LEN];
237 };
238} __packed;
239
240static inline struct osd_cdb_head *osd_cdb_head(struct osd_cdb *ocdb)
241{
242 return (struct osd_cdb_head *)ocdb->buff;
243}
244
245/* define both version actions
246 * Ex name = FORMAT_OSD we have OSD_ACT_FORMAT_OSD && OSDv1_ACT_FORMAT_OSD
247 */
248#define OSD_ACT___(Name, Num) \
249 OSD_ACT_##Name = __constant_cpu_to_be16(0x8880 + Num), \
250 OSDv1_ACT_##Name = __constant_cpu_to_be16(0x8800 + Num),
251
252/* V2 only actions */
253#define OSD_ACT_V2(Name, Num) \
254 OSD_ACT_##Name = __constant_cpu_to_be16(0x8880 + Num),
255
256#define OSD_ACT_V1_V2(Name, Num1, Num2) \
257 OSD_ACT_##Name = __constant_cpu_to_be16(Num2), \
258 OSDv1_ACT_##Name = __constant_cpu_to_be16(Num1),
259
260enum osd_service_actions {
261 OSD_ACT_V2(OBJECT_STRUCTURE_CHECK, 0x00)
262 OSD_ACT___(FORMAT_OSD, 0x01)
263 OSD_ACT___(CREATE, 0x02)
264 OSD_ACT___(LIST, 0x03)
265 OSD_ACT_V2(PUNCH, 0x04)
266 OSD_ACT___(READ, 0x05)
267 OSD_ACT___(WRITE, 0x06)
268 OSD_ACT___(APPEND, 0x07)
269 OSD_ACT___(FLUSH, 0x08)
270 OSD_ACT_V2(CLEAR, 0x09)
271 OSD_ACT___(REMOVE, 0x0A)
272 OSD_ACT___(CREATE_PARTITION, 0x0B)
273 OSD_ACT___(REMOVE_PARTITION, 0x0C)
274 OSD_ACT___(GET_ATTRIBUTES, 0x0E)
275 OSD_ACT___(SET_ATTRIBUTES, 0x0F)
276 OSD_ACT___(CREATE_AND_WRITE, 0x12)
277 OSD_ACT___(CREATE_COLLECTION, 0x15)
278 OSD_ACT___(REMOVE_COLLECTION, 0x16)
279 OSD_ACT___(LIST_COLLECTION, 0x17)
280 OSD_ACT___(SET_KEY, 0x18)
281 OSD_ACT___(SET_MASTER_KEY, 0x19)
282 OSD_ACT___(FLUSH_COLLECTION, 0x1A)
283 OSD_ACT___(FLUSH_PARTITION, 0x1B)
284 OSD_ACT___(FLUSH_OSD, 0x1C)
285
286 OSD_ACT_V2(QUERY, 0x20)
287 OSD_ACT_V2(REMOVE_MEMBER_OBJECTS, 0x21)
288 OSD_ACT_V2(GET_MEMBER_ATTRIBUTES, 0x22)
289 OSD_ACT_V2(SET_MEMBER_ATTRIBUTES, 0x23)
290 OSD_ACT_V2(READ_MAP, 0x31)
291
292 OSD_ACT_V1_V2(PERFORM_SCSI_COMMAND, 0x8F7E, 0x8F7C)
293 OSD_ACT_V1_V2(SCSI_TASK_MANAGEMENT, 0x8F7F, 0x8F7D)
294 /* 0x8F80 to 0x8FFF are Vendor specific */
295};
296
297/* osd2r03: 7.1.3.2 List entry format for retrieving attributes */
298struct osd_attributes_list_attrid {
299 __be32 attr_page;
300 __be32 attr_id;
301} __packed;
302
303/*
304 * osd2r03: 7.1.3.3 List entry format for retrieved attributes and
305 * for setting attributes
306 * NOTE: v2 is 8-bytes aligned, v1 is not aligned.
307 */
308struct osd_attributes_list_element {
309 __be32 attr_page;
310 __be32 attr_id;
311 __be16 attr_bytes;
312 u8 attr_val[0];
313} __packed;
314
315enum {
316 OSDv1_ATTRIBUTES_ELEM_ALIGN = 1,
317 OSD_ATTRIBUTES_ELEM_ALIGN = 8,
318};
319
320enum {
321 OSD_ATTR_LIST_ALL_PAGES = 0xFFFFFFFF,
322 OSD_ATTR_LIST_ALL_IN_PAGE = 0xFFFFFFFF,
323};
324
325static inline unsigned osdv1_attr_list_elem_size(unsigned len)
326{
327 return ALIGN(len + sizeof(struct osd_attributes_list_element),
328 OSDv1_ATTRIBUTES_ELEM_ALIGN);
329}
330
331static inline unsigned osdv2_attr_list_elem_size(unsigned len)
332{
333 return ALIGN(len + sizeof(struct osd_attributes_list_element),
334 OSD_ATTRIBUTES_ELEM_ALIGN);
335}
336
337/*
338 * osd2r03: 7.1.3 OSD attributes lists (Table 184) — List type values
339 */
340enum osd_attr_list_types {
341 OSD_ATTR_LIST_GET = 0x1, /* descriptors only */
342 OSD_ATTR_LIST_SET_RETRIEVE = 0x9, /*descriptors/values variable-length*/
343 OSD_V2_ATTR_LIST_MULTIPLE = 0xE, /* ver2, Multiple Objects lists*/
344 OSD_V1_ATTR_LIST_CREATE_MULTIPLE = 0xF,/*ver1, used by create_multple*/
345};
346
347/* osd2r03: 7.1.3.4 Multi-object retrieved attributes format */
348struct osd_attributes_list_multi_header {
349 __be64 object_id;
350 u8 object_type; /* object_type enum below */
351 u8 reserved[5];
352 __be16 list_bytes;
353 /* followed by struct osd_attributes_list_element's */
354};
355
356struct osdv1_attributes_list_header {
357 u8 type; /* low 4-bit only */
358 u8 pad;
359 __be16 list_bytes; /* Initiator shall set to Zero. Only set by target */
360 /*
361 * type=9 followed by struct osd_attributes_list_element's
362 * type=E followed by struct osd_attributes_list_multi_header's
363 */
364} __packed;
365
366static inline unsigned osdv1_list_size(struct osdv1_attributes_list_header *h)
367{
368 return be16_to_cpu(h->list_bytes);
369}
370
371struct osdv2_attributes_list_header {
372 u8 type; /* lower 4-bits only */
373 u8 pad[3];
374/*4*/ __be32 list_bytes; /* Initiator shall set to zero. Only set by target */
375 /*
376 * type=9 followed by struct osd_attributes_list_element's
377 * type=E followed by struct osd_attributes_list_multi_header's
378 */
379} __packed;
380
381static inline unsigned osdv2_list_size(struct osdv2_attributes_list_header *h)
382{
383 return be32_to_cpu(h->list_bytes);
384}
385
386/* (osd-r10 6.13)
387 * osd2r03: 6.15 LIST (Table 79) LIST command parameter data.
388 * for root_lstchg below
389 */
390enum {
391 OSD_OBJ_ID_LIST_PAR = 0x1, /* V1-only. Not used in V2 */
392 OSD_OBJ_ID_LIST_LSTCHG = 0x2,
393};
394
395/*
396 * osd2r03: 6.15.2 LIST command parameter data
397 * (Also for LIST COLLECTION)
398 */
399struct osd_obj_id_list {
400 __be64 list_bytes; /* bytes in list excluding list_bytes (-8) */
401 __be64 continuation_id;
402 __be32 list_identifier;
403 u8 pad[3];
404 u8 root_lstchg;
405 __be64 object_ids[0];
406} __packed;
407
408static inline bool osd_is_obj_list_done(struct osd_obj_id_list *list,
409 bool *is_changed)
410{
411 *is_changed = (0 != (list->root_lstchg & OSD_OBJ_ID_LIST_LSTCHG));
412 return 0 != list->continuation_id;
413}
414
415/*
416 * osd2r03: 4.12.4.5 The ALLDATA security method
417 */
418struct osd_data_out_integrity_info {
419 __be64 data_bytes;
420 __be64 set_attributes_bytes;
421 __be64 get_attributes_bytes;
422 __be64 integrity_check_value;
423} __packed;
424
425struct osd_data_in_integrity_info {
426 __be64 data_bytes;
427 __be64 retrieved_attributes_bytes;
428 __be64 integrity_check_value;
429} __packed;
430
431struct osd_timestamp {
432 u8 time[6]; /* number of milliseconds since 1/1/1970 UT (big endian) */
433} __packed;
434/* FIXME: define helper functions to convert to/from osd time format */
435
436/*
437 * Capability & Security definitions
438 * osd2r03: 4.11.2.2 Capability format
439 * osd2r03: 5.2.8 Security parameters
440 */
441
442struct osd_key_identifier {
443 u8 id[7]; /* if you know why 7 please email bharrosh@panasas.com */
444} __packed;
445
446/* for osd_capability.format */
447enum {
448 OSD_SEC_CAP_FORMAT_NO_CAPS = 0,
449 OSD_SEC_CAP_FORMAT_VER1 = 1,
450 OSD_SEC_CAP_FORMAT_VER2 = 2,
451};
452
453/* security_method */
454enum {
455 OSD_SEC_NOSEC = 0,
456 OSD_SEC_CAPKEY = 1,
457 OSD_SEC_CMDRSP = 2,
458 OSD_SEC_ALLDATA = 3,
459};
460
461enum object_type {
462 OSD_SEC_OBJ_ROOT = 0x1,
463 OSD_SEC_OBJ_PARTITION = 0x2,
464 OSD_SEC_OBJ_COLLECTION = 0x40,
465 OSD_SEC_OBJ_USER = 0x80,
466};
467
468enum osd_capability_bit_masks {
469 OSD_SEC_CAP_APPEND = BIT(0),
470 OSD_SEC_CAP_OBJ_MGMT = BIT(1),
471 OSD_SEC_CAP_REMOVE = BIT(2),
472 OSD_SEC_CAP_CREATE = BIT(3),
473 OSD_SEC_CAP_SET_ATTR = BIT(4),
474 OSD_SEC_CAP_GET_ATTR = BIT(5),
475 OSD_SEC_CAP_WRITE = BIT(6),
476 OSD_SEC_CAP_READ = BIT(7),
477
478 OSD_SEC_CAP_NONE1 = BIT(8),
479 OSD_SEC_CAP_NONE2 = BIT(9),
480 OSD_SEC_CAP_NONE3 = BIT(10),
481 OSD_SEC_CAP_QUERY = BIT(11), /*v2 only*/
482 OSD_SEC_CAP_M_OBJECT = BIT(12), /*v2 only*/
483 OSD_SEC_CAP_POL_SEC = BIT(13),
484 OSD_SEC_CAP_GLOBAL = BIT(14),
485 OSD_SEC_CAP_DEV_MGMT = BIT(15),
486};
487
488/* for object_descriptor_type (hi nibble used) */
489enum {
490 OSD_SEC_OBJ_DESC_NONE = 0, /* Not allowed */
491 OSD_SEC_OBJ_DESC_OBJ = 1 << 4, /* v1: also collection */
492 OSD_SEC_OBJ_DESC_PAR = 2 << 4, /* also root */
493 OSD_SEC_OBJ_DESC_COL = 3 << 4, /* v2 only */
494};
495
496/* (osd-r10:4.9.2.2)
497 * osd2r03:4.11.2.2 Capability format
498 */
499struct osd_capability_head {
500 u8 format; /* low nibble */
501 u8 integrity_algorithm__key_version; /* MAKE_BYTE(integ_alg, key_ver) */
502 u8 security_method;
503 u8 reserved1;
504/*04*/ struct osd_timestamp expiration_time;
505/*10*/ u8 audit[20];
506/*30*/ u8 discriminator[12];
507/*42*/ struct osd_timestamp object_created_time;
508/*48*/ u8 object_type;
509/*49*/ u8 permissions_bit_mask[5];
510/*54*/ u8 reserved2;
511/*55*/ u8 object_descriptor_type; /* high nibble */
512} __packed;
513
514/*56 v1*/
515struct osdv1_cap_object_descriptor {
516 union {
517 struct {
518/*56*/ __be32 policy_access_tag;
519/*60*/ __be64 allowed_partition_id;
520/*68*/ __be64 allowed_object_id;
521/*76*/ __be32 reserved;
522 } __packed obj_desc;
523
524/*56*/ u8 object_descriptor[24];
525 };
526} __packed;
527/*80 v1*/
528
529/*56 v2*/
530struct osd_cap_object_descriptor {
531 union {
532 struct {
533/*56*/ __be32 allowed_attributes_access;
534/*60*/ __be32 policy_access_tag;
535/*64*/ __be16 boot_epoch;
536/*66*/ u8 reserved[6];
537/*72*/ __be64 allowed_partition_id;
538/*80*/ __be64 allowed_object_id;
539/*88*/ __be64 allowed_range_length;
540/*96*/ __be64 allowed_range_start;
541 } __packed obj_desc;
542
543/*56*/ u8 object_descriptor[48];
544 };
545} __packed;
546/*104 v2*/
547
548struct osdv1_capability {
549 struct osd_capability_head h;
550 struct osdv1_cap_object_descriptor od;
551} __packed;
552
553struct osd_capability {
554 struct osd_capability_head h;
555/* struct osd_cap_object_descriptor od;*/
556 struct osdv1_cap_object_descriptor od; /* FIXME: Pete rev-001 sup */
557} __packed;
558
559/**
560 * osd_sec_set_caps - set cap-bits into the capabilities header
561 *
562 * @cap: The osd_capability_head to set cap bits to.
563 * @bit_mask: Use an ORed list of enum osd_capability_bit_masks values
564 *
565 * permissions_bit_mask is unaligned use below to set into caps
566 * in a version independent way
567 */
568static inline void osd_sec_set_caps(struct osd_capability_head *cap,
569 u16 bit_mask)
570{
571 /*
572 *Note: The bits above are defined LE order this is because this way
573 * they can grow in the future to more then 16, and still retain
574 * there constant values.
575 */
576 put_unaligned_le16(bit_mask, &cap->permissions_bit_mask);
577}
578
579#endif /* ndef __OSD_PROTOCOL_H__ */
diff --git a/include/scsi/osd_sec.h b/include/scsi/osd_sec.h
new file mode 100644
index 000000000000..4c09fee8ae1e
--- /dev/null
+++ b/include/scsi/osd_sec.h
@@ -0,0 +1,45 @@
1/*
2 * osd_sec.h - OSD security manager API
3 *
4 * Copyright (C) 2008 Panasas Inc. All rights reserved.
5 *
6 * Authors:
7 * Boaz Harrosh <bharrosh@panasas.com>
8 * Benny Halevy <bhalevy@panasas.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2
12 *
13 */
14#ifndef __OSD_SEC_H__
15#define __OSD_SEC_H__
16
17#include "osd_protocol.h"
18#include "osd_types.h"
19
20/*
21 * Contains types and constants of osd capabilities and security
22 * encoding/decoding.
23 * API is trying to keep security abstract so initiator of an object
24 * based pNFS client knows as little as possible about security and
25 * capabilities. It is the Server's osd-initiator place to know more.
26 * Also can be used by osd-target.
27 */
28void osd_sec_encode_caps(void *caps, ...);/* NI */
29void osd_sec_init_nosec_doall_caps(void *caps,
30 const struct osd_obj_id *obj, bool is_collection, const bool is_v1);
31
32bool osd_is_sec_alldata(struct osd_security_parameters *sec_params);
33
34/* Conditionally sign the CDB according to security setting in ocdb
35 * with cap_key */
36void osd_sec_sign_cdb(struct osd_cdb *ocdb, const u8 *cap_key);
37
38/* Unconditionally sign the BIO data with cap_key.
39 * Check for osd_is_sec_alldata() was done prior to calling this. */
40void osd_sec_sign_data(void *data_integ, struct bio *bio, const u8 *cap_key);
41
42/* Version independent copy of caps into the cdb */
43void osd_set_caps(struct osd_cdb *cdb, const void *caps);
44
45#endif /* ndef __OSD_SEC_H__ */
diff --git a/include/scsi/osd_sense.h b/include/scsi/osd_sense.h
new file mode 100644
index 000000000000..ff9b33c773c7
--- /dev/null
+++ b/include/scsi/osd_sense.h
@@ -0,0 +1,260 @@
1/*
2 * osd_sense.h - OSD Related sense handling definitions.
3 *
4 * Copyright (C) 2008 Panasas Inc. All rights reserved.
5 *
6 * Authors:
7 * Boaz Harrosh <bharrosh@panasas.com>
8 * Benny Halevy <bhalevy@panasas.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2
12 *
13 * This file contains types and constants that are defined by the protocol
14 * Note: All names and symbols are taken from the OSD standard's text.
15 */
16#ifndef __OSD_SENSE_H__
17#define __OSD_SENSE_H__
18
19#include <scsi/osd_protocol.h>
20
21/* SPC3r23 4.5.6 Sense key and sense code definitions table 27 */
22enum scsi_sense_keys {
23 scsi_sk_no_sense = 0x0,
24 scsi_sk_recovered_error = 0x1,
25 scsi_sk_not_ready = 0x2,
26 scsi_sk_medium_error = 0x3,
27 scsi_sk_hardware_error = 0x4,
28 scsi_sk_illegal_request = 0x5,
29 scsi_sk_unit_attention = 0x6,
30 scsi_sk_data_protect = 0x7,
31 scsi_sk_blank_check = 0x8,
32 scsi_sk_vendor_specific = 0x9,
33 scsi_sk_copy_aborted = 0xa,
34 scsi_sk_aborted_command = 0xb,
35 scsi_sk_volume_overflow = 0xd,
36 scsi_sk_miscompare = 0xe,
37 scsi_sk_reserved = 0xf,
38};
39
40/* SPC3r23 4.5.6 Sense key and sense code definitions table 28 */
41/* Note: only those which can be returned by an OSD target. Most of
42 * these errors are taken care of by the generic scsi layer.
43 */
44enum osd_additional_sense_codes {
45 scsi_no_additional_sense_information = 0x0000,
46 scsi_operation_in_progress = 0x0016,
47 scsi_cleaning_requested = 0x0017,
48 scsi_lunr_cause_not_reportable = 0x0400,
49 scsi_logical_unit_is_in_process_of_becoming_ready = 0x0401,
50 scsi_lunr_initializing_command_required = 0x0402,
51 scsi_lunr_manual_intervention_required = 0x0403,
52 scsi_lunr_operation_in_progress = 0x0407,
53 scsi_lunr_selftest_in_progress = 0x0409,
54 scsi_luna_asymmetric_access_state_transition = 0x040a,
55 scsi_luna_target_port_in_standby_state = 0x040b,
56 scsi_luna_target_port_in_unavailable_state = 0x040c,
57 scsi_lunr_notify_enable_spinup_required = 0x0411,
58 scsi_logical_unit_does_not_respond_to_selection = 0x0500,
59 scsi_logical_unit_communication_failure = 0x0800,
60 scsi_logical_unit_communication_timeout = 0x0801,
61 scsi_logical_unit_communication_parity_error = 0x0802,
62 scsi_error_log_overflow = 0x0a00,
63 scsi_warning = 0x0b00,
64 scsi_warning_specified_temperature_exceeded = 0x0b01,
65 scsi_warning_enclosure_degraded = 0x0b02,
66 scsi_write_error_unexpected_unsolicited_data = 0x0c0c,
67 scsi_write_error_not_enough_unsolicited_data = 0x0c0d,
68 scsi_invalid_information_unit = 0x0e00,
69 scsi_invalid_field_in_command_information_unit = 0x0e03,
70 scsi_read_error_failed_retransmission_request = 0x1113,
71 scsi_parameter_list_length_error = 0x1a00,
72 scsi_invalid_command_operation_code = 0x2000,
73 scsi_invalid_field_in_cdb = 0x2400,
74 osd_security_audit_value_frozen = 0x2404,
75 osd_security_working_key_frozen = 0x2405,
76 osd_nonce_not_unique = 0x2406,
77 osd_nonce_timestamp_out_of_range = 0x2407,
78 scsi_logical_unit_not_supported = 0x2500,
79 scsi_invalid_field_in_parameter_list = 0x2600,
80 scsi_parameter_not_supported = 0x2601,
81 scsi_parameter_value_invalid = 0x2602,
82 scsi_invalid_release_of_persistent_reservation = 0x2604,
83 osd_invalid_dataout_buffer_integrity_check_value = 0x260f,
84 scsi_not_ready_to_ready_change_medium_may_have_changed = 0x2800,
85 scsi_power_on_reset_or_bus_device_reset_occurred = 0x2900,
86 scsi_power_on_occurred = 0x2901,
87 scsi_scsi_bus_reset_occurred = 0x2902,
88 scsi_bus_device_reset_function_occurred = 0x2903,
89 scsi_device_internal_reset = 0x2904,
90 scsi_transceiver_mode_changed_to_single_ended = 0x2905,
91 scsi_transceiver_mode_changed_to_lvd = 0x2906,
92 scsi_i_t_nexus_loss_occurred = 0x2907,
93 scsi_parameters_changed = 0x2a00,
94 scsi_mode_parameters_changed = 0x2a01,
95 scsi_asymmetric_access_state_changed = 0x2a06,
96 scsi_priority_changed = 0x2a08,
97 scsi_command_sequence_error = 0x2c00,
98 scsi_previous_busy_status = 0x2c07,
99 scsi_previous_task_set_full_status = 0x2c08,
100 scsi_previous_reservation_conflict_status = 0x2c09,
101 osd_partition_or_collection_contains_user_objects = 0x2c0a,
102 scsi_commands_cleared_by_another_initiator = 0x2f00,
103 scsi_cleaning_failure = 0x3007,
104 scsi_enclosure_failure = 0x3400,
105 scsi_enclosure_services_failure = 0x3500,
106 scsi_unsupported_enclosure_function = 0x3501,
107 scsi_enclosure_services_unavailable = 0x3502,
108 scsi_enclosure_services_transfer_failure = 0x3503,
109 scsi_enclosure_services_transfer_refused = 0x3504,
110 scsi_enclosure_services_checksum_error = 0x3505,
111 scsi_rounded_parameter = 0x3700,
112 osd_read_past_end_of_user_object = 0x3b17,
113 scsi_logical_unit_has_not_self_configured_yet = 0x3e00,
114 scsi_logical_unit_failure = 0x3e01,
115 scsi_timeout_on_logical_unit = 0x3e02,
116 scsi_logical_unit_failed_selftest = 0x3e03,
117 scsi_logical_unit_unable_to_update_selftest_log = 0x3e04,
118 scsi_target_operating_conditions_have_changed = 0x3f00,
119 scsi_microcode_has_been_changed = 0x3f01,
120 scsi_inquiry_data_has_changed = 0x3f03,
121 scsi_echo_buffer_overwritten = 0x3f0f,
122 scsi_diagnostic_failure_on_component_nn_first = 0x4080,
123 scsi_diagnostic_failure_on_component_nn_last = 0x40ff,
124 scsi_message_error = 0x4300,
125 scsi_internal_target_failure = 0x4400,
126 scsi_select_or_reselect_failure = 0x4500,
127 scsi_scsi_parity_error = 0x4700,
128 scsi_data_phase_crc_error_detected = 0x4701,
129 scsi_scsi_parity_error_detected_during_st_data_phase = 0x4702,
130 scsi_asynchronous_information_protection_error_detected = 0x4704,
131 scsi_protocol_service_crc_error = 0x4705,
132 scsi_phy_test_function_in_progress = 0x4706,
133 scsi_invalid_message_error = 0x4900,
134 scsi_command_phase_error = 0x4a00,
135 scsi_data_phase_error = 0x4b00,
136 scsi_logical_unit_failed_self_configuration = 0x4c00,
137 scsi_overlapped_commands_attempted = 0x4e00,
138 osd_quota_error = 0x5507,
139 scsi_failure_prediction_threshold_exceeded = 0x5d00,
140 scsi_failure_prediction_threshold_exceeded_false = 0x5dff,
141 scsi_voltage_fault = 0x6500,
142};
143
144enum scsi_descriptor_types {
145 scsi_sense_information = 0x0,
146 scsi_sense_command_specific_information = 0x1,
147 scsi_sense_key_specific = 0x2,
148 scsi_sense_field_replaceable_unit = 0x3,
149 scsi_sense_stream_commands = 0x4,
150 scsi_sense_block_commands = 0x5,
151 osd_sense_object_identification = 0x6,
152 osd_sense_response_integrity_check = 0x7,
153 osd_sense_attribute_identification = 0x8,
154 scsi_sense_ata_return = 0x9,
155
156 scsi_sense_Reserved_first = 0x0A,
157 scsi_sense_Reserved_last = 0x7F,
158 scsi_sense_Vendor_specific_first = 0x80,
159 scsi_sense_Vendor_specific_last = 0xFF,
160};
161
162struct scsi_sense_descriptor { /* for picking into desc type */
163 u8 descriptor_type; /* one of enum scsi_descriptor_types */
164 u8 additional_length; /* n - 1 */
165 u8 data[];
166} __packed;
167
168/* OSD deploys only scsi descriptor_based sense buffers */
169struct scsi_sense_descriptor_based {
170/*0*/ u8 response_code; /* 0x72 or 0x73 */
171/*1*/ u8 sense_key; /* one of enum scsi_sense_keys (4 lower bits) */
172/*2*/ __be16 additional_sense_code; /* enum osd_additional_sense_codes */
173/*4*/ u8 Reserved[3];
174/*7*/ u8 additional_sense_length; /* n - 7 */
175/*8*/ struct scsi_sense_descriptor ssd[0]; /* variable length, 1 or more */
176} __packed;
177
178/* some descriptors deployed by OSD */
179
180/* SPC3r23 4.5.2.3 Command-specific information sense data descriptor */
181/* Note: this is the same for descriptor_type=00 but with type=00 the
182 * Reserved[0] == 0x80 (ie. bit-7 set)
183 */
184struct scsi_sense_command_specific_data_descriptor {
185/*0*/ u8 descriptor_type; /* (00h/01h) */
186/*1*/ u8 additional_length; /* (0Ah) */
187/*2*/ u8 Reserved[2];
188/*4*/ __be64 information;
189} __packed;
190/*12*/
191
192struct scsi_sense_key_specific_data_descriptor {
193/*0*/ u8 descriptor_type; /* (02h) */
194/*1*/ u8 additional_length; /* (06h) */
195/*2*/ u8 Reserved[2];
196/* SKSV, C/D, Reserved (2), BPV, BIT POINTER (3) */
197/*4*/ u8 sksv_cd_bpv_bp;
198/*5*/ __be16 value; /* field-pointer/progress-value/retry-count/... */
199/*7*/ u8 Reserved2;
200} __packed;
201/*8*/
202
203/* 4.16.2.1 OSD error identification sense data descriptor - table 52 */
204/* Note: these bits are defined LE order for easy definition, this way the BIT()
205 * number is the same as in the documentation. Below members at
206 * osd_sense_identification_data_descriptor are therefore defined __le32.
207 */
208enum osd_command_functions_bits {
209 OSD_CFB_COMMAND = BIT(4),
210 OSD_CFB_CMD_CAP_VERIFIED = BIT(5),
211 OSD_CFB_VALIDATION = BIT(7),
212 OSD_CFB_IMP_ST_ATT = BIT(12),
213 OSD_CFB_SET_ATT = BIT(20),
214 OSD_CFB_SA_CAP_VERIFIED = BIT(21),
215 OSD_CFB_GET_ATT = BIT(28),
216 OSD_CFB_GA_CAP_VERIFIED = BIT(29),
217};
218
219struct osd_sense_identification_data_descriptor {
220/*0*/ u8 descriptor_type; /* (06h) */
221/*1*/ u8 additional_length; /* (1Eh) */
222/*2*/ u8 Reserved[6];
223/*8*/ __le32 not_initiated_functions; /*osd_command_functions_bits*/
224/*12*/ __le32 completed_functions; /*osd_command_functions_bits*/
225/*16*/ __be64 partition_id;
226/*24*/ __be64 object_id;
227} __packed;
228/*32*/
229
230struct osd_sense_response_integrity_check_descriptor {
231/*0*/ u8 descriptor_type; /* (07h) */
232/*1*/ u8 additional_length; /* (20h) */
233/*2*/ u8 integrity_check_value[32]; /*FIXME: OSDv2_CRYPTO_KEYID_SIZE*/
234} __packed;
235/*34*/
236
237struct osd_sense_attributes_data_descriptor {
238/*0*/ u8 descriptor_type; /* (08h) */
239/*1*/ u8 additional_length; /* (n-2) */
240/*2*/ u8 Reserved[6];
241 struct osd_sense_attr {
242/*8*/ __be32 attr_page;
243/*12*/ __be32 attr_id;
244/*16*/ } sense_attrs[0]; /* 1 or more */
245} __packed;
246/*variable*/
247
248/* Dig into scsi_sk_illegal_request/scsi_invalid_field_in_cdb errors */
249
250/*FIXME: Support also field in CAPS*/
251#define OSD_CDB_OFFSET(F) offsetof(struct osd_cdb_head, F)
252
253enum osdv2_cdb_field_offset {
254 OSDv1_CFO_STARTING_BYTE = OSD_CDB_OFFSET(v1.start_address),
255 OSD_CFO_STARTING_BYTE = OSD_CDB_OFFSET(v2.start_address),
256 OSD_CFO_PARTITION_ID = OSD_CDB_OFFSET(partition),
257 OSD_CFO_OBJECT_ID = OSD_CDB_OFFSET(object),
258};
259
260#endif /* ndef __OSD_SENSE_H__ */
diff --git a/include/scsi/osd_types.h b/include/scsi/osd_types.h
new file mode 100644
index 000000000000..3f5e88cc75c0
--- /dev/null
+++ b/include/scsi/osd_types.h
@@ -0,0 +1,40 @@
1/*
2 * osd_types.h - Types and constants which are not part of the protocol.
3 *
4 * Copyright (C) 2008 Panasas Inc. All rights reserved.
5 *
6 * Authors:
7 * Boaz Harrosh <bharrosh@panasas.com>
8 * Benny Halevy <bhalevy@panasas.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2
12 *
13 * Contains types and constants that are implementation specific and are
14 * used by more than one part of the osd library.
15 * (Eg initiator/target/security_manager/...)
16 */
17#ifndef __OSD_TYPES_H__
18#define __OSD_TYPES_H__
19
20struct osd_systemid {
21 u8 data[OSD_SYSTEMID_LEN];
22};
23
24typedef u64 __bitwise osd_id;
25
26struct osd_obj_id {
27 osd_id partition;
28 osd_id id;
29};
30
31static const struct __weak osd_obj_id osd_root_object = {0, 0};
32
33struct osd_attr {
34 u32 attr_page;
35 u32 attr_id;
36 u16 len; /* byte count of operand */
37 void *val_ptr; /* in network order */
38};
39
40#endif /* ndef __OSD_TYPES_H__ */
diff --git a/include/scsi/scsi.h b/include/scsi/scsi.h
index a109165714d6..084478e14d24 100644
--- a/include/scsi/scsi.h
+++ b/include/scsi/scsi.h
@@ -9,7 +9,8 @@
9#define _SCSI_SCSI_H 9#define _SCSI_SCSI_H
10 10
11#include <linux/types.h> 11#include <linux/types.h>
12#include <scsi/scsi_cmnd.h> 12
13struct scsi_cmnd;
13 14
14/* 15/*
15 * The maximum number of SG segments that we will put inside a 16 * The maximum number of SG segments that we will put inside a
@@ -263,6 +264,7 @@ static inline int scsi_status_is_good(int status)
263#define TYPE_RAID 0x0c 264#define TYPE_RAID 0x0c
264#define TYPE_ENCLOSURE 0x0d /* Enclosure Services Device */ 265#define TYPE_ENCLOSURE 0x0d /* Enclosure Services Device */
265#define TYPE_RBC 0x0e 266#define TYPE_RBC 0x0e
267#define TYPE_OSD 0x11
266#define TYPE_NO_LUN 0x7f 268#define TYPE_NO_LUN 0x7f
267 269
268/* SCSI protocols; these are taken from SPC-3 section 7.5 */ 270/* SCSI protocols; these are taken from SPC-3 section 7.5 */
@@ -402,16 +404,6 @@ static inline int scsi_is_wlun(unsigned int lun)
402#define DRIVER_HARD 0x07 404#define DRIVER_HARD 0x07
403#define DRIVER_SENSE 0x08 405#define DRIVER_SENSE 0x08
404 406
405#define SUGGEST_RETRY 0x10
406#define SUGGEST_ABORT 0x20
407#define SUGGEST_REMAP 0x30
408#define SUGGEST_DIE 0x40
409#define SUGGEST_SENSE 0x80
410#define SUGGEST_IS_OK 0xff
411
412#define DRIVER_MASK 0x0f
413#define SUGGEST_MASK 0xf0
414
415/* 407/*
416 * Internal return values. 408 * Internal return values.
417 */ 409 */
@@ -447,23 +439,6 @@ static inline int scsi_is_wlun(unsigned int lun)
447#define msg_byte(result) (((result) >> 8) & 0xff) 439#define msg_byte(result) (((result) >> 8) & 0xff)
448#define host_byte(result) (((result) >> 16) & 0xff) 440#define host_byte(result) (((result) >> 16) & 0xff)
449#define driver_byte(result) (((result) >> 24) & 0xff) 441#define driver_byte(result) (((result) >> 24) & 0xff)
450#define suggestion(result) (driver_byte(result) & SUGGEST_MASK)
451
452static inline void set_msg_byte(struct scsi_cmnd *cmd, char status)
453{
454 cmd->result |= status << 8;
455}
456
457static inline void set_host_byte(struct scsi_cmnd *cmd, char status)
458{
459 cmd->result |= status << 16;
460}
461
462static inline void set_driver_byte(struct scsi_cmnd *cmd, char status)
463{
464 cmd->result |= status << 24;
465}
466
467 442
468#define sense_class(sense) (((sense) >> 4) & 0x7) 443#define sense_class(sense) (((sense) >> 4) & 0x7)
469#define sense_error(sense) ((sense) & 0xf) 444#define sense_error(sense) ((sense) & 0xf)
diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h
index 855bf95963e7..43b50d36925c 100644
--- a/include/scsi/scsi_cmnd.h
+++ b/include/scsi/scsi_cmnd.h
@@ -291,4 +291,19 @@ static inline struct scsi_data_buffer *scsi_prot(struct scsi_cmnd *cmd)
291#define scsi_for_each_prot_sg(cmd, sg, nseg, __i) \ 291#define scsi_for_each_prot_sg(cmd, sg, nseg, __i) \
292 for_each_sg(scsi_prot_sglist(cmd), sg, nseg, __i) 292 for_each_sg(scsi_prot_sglist(cmd), sg, nseg, __i)
293 293
294static inline void set_msg_byte(struct scsi_cmnd *cmd, char status)
295{
296 cmd->result |= status << 8;
297}
298
299static inline void set_host_byte(struct scsi_cmnd *cmd, char status)
300{
301 cmd->result |= status << 16;
302}
303
304static inline void set_driver_byte(struct scsi_cmnd *cmd, char status)
305{
306 cmd->result |= status << 24;
307}
308
294#endif /* _SCSI_SCSI_CMND_H */ 309#endif /* _SCSI_SCSI_CMND_H */
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index 01a4c58f8bad..3f566af3f101 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -340,6 +340,7 @@ extern int scsi_mode_select(struct scsi_device *sdev, int pf, int sp,
340 struct scsi_sense_hdr *); 340 struct scsi_sense_hdr *);
341extern int scsi_test_unit_ready(struct scsi_device *sdev, int timeout, 341extern int scsi_test_unit_ready(struct scsi_device *sdev, int timeout,
342 int retries, struct scsi_sense_hdr *sshdr); 342 int retries, struct scsi_sense_hdr *sshdr);
343extern unsigned char *scsi_get_vpd_page(struct scsi_device *, u8 page);
343extern int scsi_device_set_state(struct scsi_device *sdev, 344extern int scsi_device_set_state(struct scsi_device *sdev,
344 enum scsi_device_state state); 345 enum scsi_device_state state);
345extern struct scsi_event *sdev_evt_alloc(enum scsi_device_event evt_type, 346extern struct scsi_event *sdev_evt_alloc(enum scsi_device_event evt_type,
@@ -370,12 +371,6 @@ extern int scsi_execute_req(struct scsi_device *sdev, const unsigned char *cmd,
370 int data_direction, void *buffer, unsigned bufflen, 371 int data_direction, void *buffer, unsigned bufflen,
371 struct scsi_sense_hdr *, int timeout, int retries, 372 struct scsi_sense_hdr *, int timeout, int retries,
372 int *resid); 373 int *resid);
373extern int scsi_execute_async(struct scsi_device *sdev,
374 const unsigned char *cmd, int cmd_len, int data_direction,
375 void *buffer, unsigned bufflen, int use_sg,
376 int timeout, int retries, void *privdata,
377 void (*done)(void *, char *, int, int),
378 gfp_t gfp);
379 374
380static inline int __must_check scsi_device_reprobe(struct scsi_device *sdev) 375static inline int __must_check scsi_device_reprobe(struct scsi_device *sdev)
381{ 376{
@@ -400,7 +395,8 @@ static inline unsigned int sdev_id(struct scsi_device *sdev)
400 */ 395 */
401static inline int scsi_device_online(struct scsi_device *sdev) 396static inline int scsi_device_online(struct scsi_device *sdev)
402{ 397{
403 return sdev->sdev_state != SDEV_OFFLINE; 398 return (sdev->sdev_state != SDEV_OFFLINE &&
399 sdev->sdev_state != SDEV_DEL);
404} 400}
405static inline int scsi_device_blocked(struct scsi_device *sdev) 401static inline int scsi_device_blocked(struct scsi_device *sdev)
406{ 402{
diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h
index b50aabe2861e..457588e1119b 100644
--- a/include/scsi/scsi_transport_iscsi.h
+++ b/include/scsi/scsi_transport_iscsi.h
@@ -88,7 +88,7 @@ struct iscsi_transport {
88 uint64_t host_param_mask; 88 uint64_t host_param_mask;
89 struct iscsi_cls_session *(*create_session) (struct iscsi_endpoint *ep, 89 struct iscsi_cls_session *(*create_session) (struct iscsi_endpoint *ep,
90 uint16_t cmds_max, uint16_t qdepth, 90 uint16_t cmds_max, uint16_t qdepth,
91 uint32_t sn, uint32_t *hn); 91 uint32_t sn);
92 void (*destroy_session) (struct iscsi_cls_session *session); 92 void (*destroy_session) (struct iscsi_cls_session *session);
93 struct iscsi_cls_conn *(*create_conn) (struct iscsi_cls_session *sess, 93 struct iscsi_cls_conn *(*create_conn) (struct iscsi_cls_session *sess,
94 uint32_t cid); 94 uint32_t cid);
@@ -206,8 +206,6 @@ struct iscsi_cls_session {
206struct iscsi_cls_host { 206struct iscsi_cls_host {
207 atomic_t nr_scans; 207 atomic_t nr_scans;
208 struct mutex mutex; 208 struct mutex mutex;
209 struct workqueue_struct *scan_workq;
210 char scan_workq_name[20];
211}; 209};
212 210
213extern void iscsi_host_for_each_session(struct Scsi_Host *shost, 211extern void iscsi_host_for_each_session(struct Scsi_Host *shost,
diff --git a/init/Kconfig b/init/Kconfig
index 68699137b147..14c483d2b7c9 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -101,6 +101,66 @@ config LOCALVERSION_AUTO
101 101
102 which is done within the script "scripts/setlocalversion".) 102 which is done within the script "scripts/setlocalversion".)
103 103
104config HAVE_KERNEL_GZIP
105 bool
106
107config HAVE_KERNEL_BZIP2
108 bool
109
110config HAVE_KERNEL_LZMA
111 bool
112
113choice
114 prompt "Kernel compression mode"
115 default KERNEL_GZIP
116 depends on HAVE_KERNEL_GZIP || HAVE_KERNEL_BZIP2 || HAVE_KERNEL_LZMA
117 help
118 The linux kernel is a kind of self-extracting executable.
119 Several compression algorithms are available, which differ
120 in efficiency, compression and decompression speed.
121 Compression speed is only relevant when building a kernel.
122 Decompression speed is relevant at each boot.
123
124 If you have any problems with bzip2 or lzma compressed
125 kernels, mail me (Alain Knaff) <alain@knaff.lu>. (An older
126 version of this functionality (bzip2 only), for 2.4, was
127 supplied by Christian Ludwig)
128
129 High compression options are mostly useful for users, who
130 are low on disk space (embedded systems), but for whom ram
131 size matters less.
132
133 If in doubt, select 'gzip'
134
135config KERNEL_GZIP
136 bool "Gzip"
137 depends on HAVE_KERNEL_GZIP
138 help
139 The old and tried gzip compression. Its compression ratio is
140 the poorest among the 3 choices; however its speed (both
141 compression and decompression) is the fastest.
142
143config KERNEL_BZIP2
144 bool "Bzip2"
145 depends on HAVE_KERNEL_BZIP2
146 help
147 Its compression ratio and speed is intermediate.
148 Decompression speed is slowest among the three. The kernel
149 size is about 10% smaller with bzip2, in comparison to gzip.
150 Bzip2 uses a large amount of memory. For modern kernels you
151 will need at least 8MB RAM or more for booting.
152
153config KERNEL_LZMA
154 bool "LZMA"
155 depends on HAVE_KERNEL_LZMA
156 help
157 The most recent compression algorithm.
158 Its ratio is best, decompression speed is between the other
159 two. Compression is slowest. The kernel size is about 33%
160 smaller with LZMA in comparison to gzip.
161
162endchoice
163
104config SWAP 164config SWAP
105 bool "Support for paging of anonymous memory (swap)" 165 bool "Support for paging of anonymous memory (swap)"
106 depends on MMU && BLOCK 166 depends on MMU && BLOCK
diff --git a/init/do_mounts_rd.c b/init/do_mounts_rd.c
index 0f0f0cf3ba9a..027a402708de 100644
--- a/init/do_mounts_rd.c
+++ b/init/do_mounts_rd.c
@@ -11,6 +11,9 @@
11#include "do_mounts.h" 11#include "do_mounts.h"
12#include "../fs/squashfs/squashfs_fs.h" 12#include "../fs/squashfs/squashfs_fs.h"
13 13
14#include <linux/decompress/generic.h>
15
16
14int __initdata rd_prompt = 1;/* 1 = prompt for RAM disk, 0 = don't prompt */ 17int __initdata rd_prompt = 1;/* 1 = prompt for RAM disk, 0 = don't prompt */
15 18
16static int __init prompt_ramdisk(char *str) 19static int __init prompt_ramdisk(char *str)
@@ -29,7 +32,7 @@ static int __init ramdisk_start_setup(char *str)
29} 32}
30__setup("ramdisk_start=", ramdisk_start_setup); 33__setup("ramdisk_start=", ramdisk_start_setup);
31 34
32static int __init crd_load(int in_fd, int out_fd); 35static int __init crd_load(int in_fd, int out_fd, decompress_fn deco);
33 36
34/* 37/*
35 * This routine tries to find a RAM disk image to load, and returns the 38 * This routine tries to find a RAM disk image to load, and returns the
@@ -38,15 +41,15 @@ static int __init crd_load(int in_fd, int out_fd);
38 * numbers could not be found. 41 * numbers could not be found.
39 * 42 *
40 * We currently check for the following magic numbers: 43 * We currently check for the following magic numbers:
41 * minix 44 * minix
42 * ext2 45 * ext2
43 * romfs 46 * romfs
44 * cramfs 47 * cramfs
45 * squashfs 48 * squashfs
46 * gzip 49 * gzip
47 */ 50 */
48static int __init 51static int __init
49identify_ramdisk_image(int fd, int start_block) 52identify_ramdisk_image(int fd, int start_block, decompress_fn *decompressor)
50{ 53{
51 const int size = 512; 54 const int size = 512;
52 struct minix_super_block *minixsb; 55 struct minix_super_block *minixsb;
@@ -56,6 +59,7 @@ identify_ramdisk_image(int fd, int start_block)
56 struct squashfs_super_block *squashfsb; 59 struct squashfs_super_block *squashfsb;
57 int nblocks = -1; 60 int nblocks = -1;
58 unsigned char *buf; 61 unsigned char *buf;
62 const char *compress_name;
59 63
60 buf = kmalloc(size, GFP_KERNEL); 64 buf = kmalloc(size, GFP_KERNEL);
61 if (!buf) 65 if (!buf)
@@ -69,18 +73,19 @@ identify_ramdisk_image(int fd, int start_block)
69 memset(buf, 0xe5, size); 73 memset(buf, 0xe5, size);
70 74
71 /* 75 /*
72 * Read block 0 to test for gzipped kernel 76 * Read block 0 to test for compressed kernel
73 */ 77 */
74 sys_lseek(fd, start_block * BLOCK_SIZE, 0); 78 sys_lseek(fd, start_block * BLOCK_SIZE, 0);
75 sys_read(fd, buf, size); 79 sys_read(fd, buf, size);
76 80
77 /* 81 *decompressor = decompress_method(buf, size, &compress_name);
78 * If it matches the gzip magic numbers, return 0 82 if (compress_name) {
79 */ 83 printk(KERN_NOTICE "RAMDISK: %s image found at block %d\n",
80 if (buf[0] == 037 && ((buf[1] == 0213) || (buf[1] == 0236))) { 84 compress_name, start_block);
81 printk(KERN_NOTICE 85 if (!*decompressor)
82 "RAMDISK: Compressed image found at block %d\n", 86 printk(KERN_EMERG
83 start_block); 87 "RAMDISK: %s decompressor not configured!\n",
88 compress_name);
84 nblocks = 0; 89 nblocks = 0;
85 goto done; 90 goto done;
86 } 91 }
@@ -142,7 +147,7 @@ identify_ramdisk_image(int fd, int start_block)
142 printk(KERN_NOTICE 147 printk(KERN_NOTICE
143 "RAMDISK: Couldn't find valid RAM disk image starting at %d.\n", 148 "RAMDISK: Couldn't find valid RAM disk image starting at %d.\n",
144 start_block); 149 start_block);
145 150
146done: 151done:
147 sys_lseek(fd, start_block * BLOCK_SIZE, 0); 152 sys_lseek(fd, start_block * BLOCK_SIZE, 0);
148 kfree(buf); 153 kfree(buf);
@@ -157,6 +162,7 @@ int __init rd_load_image(char *from)
157 int nblocks, i, disk; 162 int nblocks, i, disk;
158 char *buf = NULL; 163 char *buf = NULL;
159 unsigned short rotate = 0; 164 unsigned short rotate = 0;
165 decompress_fn decompressor = NULL;
160#if !defined(CONFIG_S390) && !defined(CONFIG_PPC_ISERIES) 166#if !defined(CONFIG_S390) && !defined(CONFIG_PPC_ISERIES)
161 char rotator[4] = { '|' , '/' , '-' , '\\' }; 167 char rotator[4] = { '|' , '/' , '-' , '\\' };
162#endif 168#endif
@@ -169,12 +175,12 @@ int __init rd_load_image(char *from)
169 if (in_fd < 0) 175 if (in_fd < 0)
170 goto noclose_input; 176 goto noclose_input;
171 177
172 nblocks = identify_ramdisk_image(in_fd, rd_image_start); 178 nblocks = identify_ramdisk_image(in_fd, rd_image_start, &decompressor);
173 if (nblocks < 0) 179 if (nblocks < 0)
174 goto done; 180 goto done;
175 181
176 if (nblocks == 0) { 182 if (nblocks == 0) {
177 if (crd_load(in_fd, out_fd) == 0) 183 if (crd_load(in_fd, out_fd, decompressor) == 0)
178 goto successful_load; 184 goto successful_load;
179 goto done; 185 goto done;
180 } 186 }
@@ -200,7 +206,7 @@ int __init rd_load_image(char *from)
200 nblocks, rd_blocks); 206 nblocks, rd_blocks);
201 goto done; 207 goto done;
202 } 208 }
203 209
204 /* 210 /*
205 * OK, time to copy in the data 211 * OK, time to copy in the data
206 */ 212 */
@@ -273,138 +279,48 @@ int __init rd_load_disk(int n)
273 return rd_load_image("/dev/root"); 279 return rd_load_image("/dev/root");
274} 280}
275 281
276/*
277 * gzip declarations
278 */
279
280#define OF(args) args
281
282#ifndef memzero
283#define memzero(s, n) memset ((s), 0, (n))
284#endif
285
286typedef unsigned char uch;
287typedef unsigned short ush;
288typedef unsigned long ulg;
289
290#define INBUFSIZ 4096
291#define WSIZE 0x8000 /* window size--must be a power of two, and */
292 /* at least 32K for zip's deflate method */
293
294static uch *inbuf;
295static uch *window;
296
297static unsigned insize; /* valid bytes in inbuf */
298static unsigned inptr; /* index of next byte to be processed in inbuf */
299static unsigned outcnt; /* bytes in output buffer */
300static int exit_code; 282static int exit_code;
301static int unzip_error; 283static int decompress_error;
302static long bytes_out;
303static int crd_infd, crd_outfd; 284static int crd_infd, crd_outfd;
304 285
305#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf()) 286static int __init compr_fill(void *buf, unsigned int len)
306
307/* Diagnostic functions (stubbed out) */
308#define Assert(cond,msg)
309#define Trace(x)
310#define Tracev(x)
311#define Tracevv(x)
312#define Tracec(c,x)
313#define Tracecv(c,x)
314
315#define STATIC static
316#define INIT __init
317
318static int __init fill_inbuf(void);
319static void __init flush_window(void);
320static void __init error(char *m);
321
322#define NO_INFLATE_MALLOC
323
324#include "../lib/inflate.c"
325
326/* ===========================================================================
327 * Fill the input buffer. This is called only when the buffer is empty
328 * and at least one byte is really needed.
329 * Returning -1 does not guarantee that gunzip() will ever return.
330 */
331static int __init fill_inbuf(void)
332{ 287{
333 if (exit_code) return -1; 288 int r = sys_read(crd_infd, buf, len);
334 289 if (r < 0)
335 insize = sys_read(crd_infd, inbuf, INBUFSIZ); 290 printk(KERN_ERR "RAMDISK: error while reading compressed data");
336 if (insize == 0) { 291 else if (r == 0)
337 error("RAMDISK: ran out of compressed data"); 292 printk(KERN_ERR "RAMDISK: EOF while reading compressed data");
338 return -1; 293 return r;
339 }
340
341 inptr = 1;
342
343 return inbuf[0];
344} 294}
345 295
346/* =========================================================================== 296static int __init compr_flush(void *window, unsigned int outcnt)
347 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
348 * (Used for the decompressed data only.)
349 */
350static void __init flush_window(void)
351{ 297{
352 ulg c = crc; /* temporary variable */ 298 int written = sys_write(crd_outfd, window, outcnt);
353 unsigned n, written; 299 if (written != outcnt) {
354 uch *in, ch; 300 if (decompress_error == 0)
355 301 printk(KERN_ERR
356 written = sys_write(crd_outfd, window, outcnt); 302 "RAMDISK: incomplete write (%d != %d)\n",
357 if (written != outcnt && unzip_error == 0) { 303 written, outcnt);
358 printk(KERN_ERR "RAMDISK: incomplete write (%d != %d) %ld\n", 304 decompress_error = 1;
359 written, outcnt, bytes_out); 305 return -1;
360 unzip_error = 1; 306 }
361 } 307 return outcnt;
362 in = window;
363 for (n = 0; n < outcnt; n++) {
364 ch = *in++;
365 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
366 }
367 crc = c;
368 bytes_out += (ulg)outcnt;
369 outcnt = 0;
370} 308}
371 309
372static void __init error(char *x) 310static void __init error(char *x)
373{ 311{
374 printk(KERN_ERR "%s\n", x); 312 printk(KERN_ERR "%s\n", x);
375 exit_code = 1; 313 exit_code = 1;
376 unzip_error = 1; 314 decompress_error = 1;
377} 315}
378 316
379static int __init crd_load(int in_fd, int out_fd) 317static int __init crd_load(int in_fd, int out_fd, decompress_fn deco)
380{ 318{
381 int result; 319 int result;
382
383 insize = 0; /* valid bytes in inbuf */
384 inptr = 0; /* index of next byte to be processed in inbuf */
385 outcnt = 0; /* bytes in output buffer */
386 exit_code = 0;
387 bytes_out = 0;
388 crc = (ulg)0xffffffffL; /* shift register contents */
389
390 crd_infd = in_fd; 320 crd_infd = in_fd;
391 crd_outfd = out_fd; 321 crd_outfd = out_fd;
392 inbuf = kmalloc(INBUFSIZ, GFP_KERNEL); 322 result = deco(NULL, 0, compr_fill, compr_flush, NULL, NULL, error);
393 if (!inbuf) { 323 if (decompress_error)
394 printk(KERN_ERR "RAMDISK: Couldn't allocate gzip buffer\n");
395 return -1;
396 }
397 window = kmalloc(WSIZE, GFP_KERNEL);
398 if (!window) {
399 printk(KERN_ERR "RAMDISK: Couldn't allocate gzip window\n");
400 kfree(inbuf);
401 return -1;
402 }
403 makecrc();
404 result = gunzip();
405 if (unzip_error)
406 result = 1; 324 result = 1;
407 kfree(inbuf);
408 kfree(window);
409 return result; 325 return result;
410} 326}
diff --git a/init/initramfs.c b/init/initramfs.c
index d9c941c0c3ca..619c1baf7701 100644
--- a/init/initramfs.c
+++ b/init/initramfs.c
@@ -5,6 +5,7 @@
5#include <linux/fcntl.h> 5#include <linux/fcntl.h>
6#include <linux/delay.h> 6#include <linux/delay.h>
7#include <linux/string.h> 7#include <linux/string.h>
8#include <linux/dirent.h>
8#include <linux/syscalls.h> 9#include <linux/syscalls.h>
9#include <linux/utime.h> 10#include <linux/utime.h>
10 11
@@ -166,8 +167,6 @@ static __initdata char *victim;
166static __initdata unsigned count; 167static __initdata unsigned count;
167static __initdata loff_t this_header, next_header; 168static __initdata loff_t this_header, next_header;
168 169
169static __initdata int dry_run;
170
171static inline void __init eat(unsigned n) 170static inline void __init eat(unsigned n)
172{ 171{
173 victim += n; 172 victim += n;
@@ -229,10 +228,6 @@ static int __init do_header(void)
229 parse_header(collected); 228 parse_header(collected);
230 next_header = this_header + N_ALIGN(name_len) + body_len; 229 next_header = this_header + N_ALIGN(name_len) + body_len;
231 next_header = (next_header + 3) & ~3; 230 next_header = (next_header + 3) & ~3;
232 if (dry_run) {
233 read_into(name_buf, N_ALIGN(name_len), GotName);
234 return 0;
235 }
236 state = SkipIt; 231 state = SkipIt;
237 if (name_len <= 0 || name_len > PATH_MAX) 232 if (name_len <= 0 || name_len > PATH_MAX)
238 return 0; 233 return 0;
@@ -303,8 +298,6 @@ static int __init do_name(void)
303 free_hash(); 298 free_hash();
304 return 0; 299 return 0;
305 } 300 }
306 if (dry_run)
307 return 0;
308 clean_path(collected, mode); 301 clean_path(collected, mode);
309 if (S_ISREG(mode)) { 302 if (S_ISREG(mode)) {
310 int ml = maybe_link(); 303 int ml = maybe_link();
@@ -390,11 +383,13 @@ static int __init write_buffer(char *buf, unsigned len)
390 return len - count; 383 return len - count;
391} 384}
392 385
393static void __init flush_buffer(char *buf, unsigned len) 386static int __init flush_buffer(void *bufv, unsigned len)
394{ 387{
388 char *buf = (char *) bufv;
395 int written; 389 int written;
390 int origLen = len;
396 if (message) 391 if (message)
397 return; 392 return -1;
398 while ((written = write_buffer(buf, len)) < len && !message) { 393 while ((written = write_buffer(buf, len)) < len && !message) {
399 char c = buf[written]; 394 char c = buf[written];
400 if (c == '0') { 395 if (c == '0') {
@@ -408,84 +403,27 @@ static void __init flush_buffer(char *buf, unsigned len)
408 } else 403 } else
409 error("junk in compressed archive"); 404 error("junk in compressed archive");
410 } 405 }
406 return origLen;
411} 407}
412 408
413/* 409static unsigned my_inptr; /* index of next byte to be processed in inbuf */
414 * gzip declarations
415 */
416
417#define OF(args) args
418
419#ifndef memzero
420#define memzero(s, n) memset ((s), 0, (n))
421#endif
422
423typedef unsigned char uch;
424typedef unsigned short ush;
425typedef unsigned long ulg;
426 410
427#define WSIZE 0x8000 /* window size--must be a power of two, and */ 411#include <linux/decompress/generic.h>
428 /* at least 32K for zip's deflate method */
429
430static uch *inbuf;
431static uch *window;
432
433static unsigned insize; /* valid bytes in inbuf */
434static unsigned inptr; /* index of next byte to be processed in inbuf */
435static unsigned outcnt; /* bytes in output buffer */
436static long bytes_out;
437
438#define get_byte() (inptr < insize ? inbuf[inptr++] : -1)
439
440/* Diagnostic functions (stubbed out) */
441#define Assert(cond,msg)
442#define Trace(x)
443#define Tracev(x)
444#define Tracevv(x)
445#define Tracec(c,x)
446#define Tracecv(c,x)
447
448#define STATIC static
449#define INIT __init
450
451static void __init flush_window(void);
452static void __init error(char *m);
453
454#define NO_INFLATE_MALLOC
455
456#include "../lib/inflate.c"
457
458/* ===========================================================================
459 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
460 * (Used for the decompressed data only.)
461 */
462static void __init flush_window(void)
463{
464 ulg c = crc; /* temporary variable */
465 unsigned n;
466 uch *in, ch;
467
468 flush_buffer(window, outcnt);
469 in = window;
470 for (n = 0; n < outcnt; n++) {
471 ch = *in++;
472 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
473 }
474 crc = c;
475 bytes_out += (ulg)outcnt;
476 outcnt = 0;
477}
478 412
479static char * __init unpack_to_rootfs(char *buf, unsigned len, int check_only) 413static char * __init unpack_to_rootfs(char *buf, unsigned len)
480{ 414{
481 int written; 415 int written;
482 dry_run = check_only; 416 decompress_fn decompress;
417 const char *compress_name;
418 static __initdata char msg_buf[64];
419
483 header_buf = kmalloc(110, GFP_KERNEL); 420 header_buf = kmalloc(110, GFP_KERNEL);
484 symlink_buf = kmalloc(PATH_MAX + N_ALIGN(PATH_MAX) + 1, GFP_KERNEL); 421 symlink_buf = kmalloc(PATH_MAX + N_ALIGN(PATH_MAX) + 1, GFP_KERNEL);
485 name_buf = kmalloc(N_ALIGN(PATH_MAX), GFP_KERNEL); 422 name_buf = kmalloc(N_ALIGN(PATH_MAX), GFP_KERNEL);
486 window = kmalloc(WSIZE, GFP_KERNEL); 423
487 if (!window || !header_buf || !symlink_buf || !name_buf) 424 if (!header_buf || !symlink_buf || !name_buf)
488 panic("can't allocate buffers"); 425 panic("can't allocate buffers");
426
489 state = Start; 427 state = Start;
490 this_header = 0; 428 this_header = 0;
491 message = NULL; 429 message = NULL;
@@ -505,22 +443,25 @@ static char * __init unpack_to_rootfs(char *buf, unsigned len, int check_only)
505 continue; 443 continue;
506 } 444 }
507 this_header = 0; 445 this_header = 0;
508 insize = len; 446 decompress = decompress_method(buf, len, &compress_name);
509 inbuf = buf; 447 if (decompress)
510 inptr = 0; 448 decompress(buf, len, NULL, flush_buffer, NULL,
511 outcnt = 0; /* bytes in output buffer */ 449 &my_inptr, error);
512 bytes_out = 0; 450 else if (compress_name) {
513 crc = (ulg)0xffffffffL; /* shift register contents */ 451 if (!message) {
514 makecrc(); 452 snprintf(msg_buf, sizeof msg_buf,
515 gunzip(); 453 "compression method %s not configured",
454 compress_name);
455 message = msg_buf;
456 }
457 }
516 if (state != Reset) 458 if (state != Reset)
517 error("junk in gzipped archive"); 459 error("junk in compressed archive");
518 this_header = saved_offset + inptr; 460 this_header = saved_offset + my_inptr;
519 buf += inptr; 461 buf += my_inptr;
520 len -= inptr; 462 len -= my_inptr;
521 } 463 }
522 dir_utime(); 464 dir_utime();
523 kfree(window);
524 kfree(name_buf); 465 kfree(name_buf);
525 kfree(symlink_buf); 466 kfree(symlink_buf);
526 kfree(header_buf); 467 kfree(header_buf);
@@ -574,24 +515,73 @@ skip:
574 initrd_end = 0; 515 initrd_end = 0;
575} 516}
576 517
518#define BUF_SIZE 1024
519static void __init clean_rootfs(void)
520{
521 int fd;
522 void *buf;
523 struct linux_dirent64 *dirp;
524 int count;
525
526 fd = sys_open("/", O_RDONLY, 0);
527 WARN_ON(fd < 0);
528 if (fd < 0)
529 return;
530 buf = kzalloc(BUF_SIZE, GFP_KERNEL);
531 WARN_ON(!buf);
532 if (!buf) {
533 sys_close(fd);
534 return;
535 }
536
537 dirp = buf;
538 count = sys_getdents64(fd, dirp, BUF_SIZE);
539 while (count > 0) {
540 while (count > 0) {
541 struct stat st;
542 int ret;
543
544 ret = sys_newlstat(dirp->d_name, &st);
545 WARN_ON_ONCE(ret);
546 if (!ret) {
547 if (S_ISDIR(st.st_mode))
548 sys_rmdir(dirp->d_name);
549 else
550 sys_unlink(dirp->d_name);
551 }
552
553 count -= dirp->d_reclen;
554 dirp = (void *)dirp + dirp->d_reclen;
555 }
556 dirp = buf;
557 memset(buf, 0, BUF_SIZE);
558 count = sys_getdents64(fd, dirp, BUF_SIZE);
559 }
560
561 sys_close(fd);
562 kfree(buf);
563}
564
577static int __init populate_rootfs(void) 565static int __init populate_rootfs(void)
578{ 566{
579 char *err = unpack_to_rootfs(__initramfs_start, 567 char *err = unpack_to_rootfs(__initramfs_start,
580 __initramfs_end - __initramfs_start, 0); 568 __initramfs_end - __initramfs_start);
581 if (err) 569 if (err)
582 panic(err); 570 panic(err); /* Failed to decompress INTERNAL initramfs */
583 if (initrd_start) { 571 if (initrd_start) {
584#ifdef CONFIG_BLK_DEV_RAM 572#ifdef CONFIG_BLK_DEV_RAM
585 int fd; 573 int fd;
586 printk(KERN_INFO "checking if image is initramfs..."); 574 printk(KERN_INFO "checking if image is initramfs...");
587 err = unpack_to_rootfs((char *)initrd_start, 575 err = unpack_to_rootfs((char *)initrd_start,
588 initrd_end - initrd_start, 1); 576 initrd_end - initrd_start);
589 if (!err) { 577 if (!err) {
590 printk(" it is\n"); 578 printk(" it is\n");
591 unpack_to_rootfs((char *)initrd_start,
592 initrd_end - initrd_start, 0);
593 free_initrd(); 579 free_initrd();
594 return 0; 580 return 0;
581 } else {
582 clean_rootfs();
583 unpack_to_rootfs(__initramfs_start,
584 __initramfs_end - __initramfs_start);
595 } 585 }
596 printk("it isn't (%s); looks like an initrd\n", err); 586 printk("it isn't (%s); looks like an initrd\n", err);
597 fd = sys_open("/initrd.image", O_WRONLY|O_CREAT, 0700); 587 fd = sys_open("/initrd.image", O_WRONLY|O_CREAT, 0700);
@@ -604,10 +594,13 @@ static int __init populate_rootfs(void)
604#else 594#else
605 printk(KERN_INFO "Unpacking initramfs..."); 595 printk(KERN_INFO "Unpacking initramfs...");
606 err = unpack_to_rootfs((char *)initrd_start, 596 err = unpack_to_rootfs((char *)initrd_start,
607 initrd_end - initrd_start, 0); 597 initrd_end - initrd_start);
608 if (err) 598 if (err) {
609 panic(err); 599 printk(" failed!\n");
610 printk(" done\n"); 600 printk(KERN_EMERG "%s\n", err);
601 } else {
602 printk(" done\n");
603 }
611 free_initrd(); 604 free_initrd();
612#endif 605#endif
613 } 606 }
diff --git a/init/main.c b/init/main.c
index 83697e160b3a..6bf83afd654d 100644
--- a/init/main.c
+++ b/init/main.c
@@ -14,6 +14,7 @@
14#include <linux/proc_fs.h> 14#include <linux/proc_fs.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/syscalls.h> 16#include <linux/syscalls.h>
17#include <linux/stackprotector.h>
17#include <linux/string.h> 18#include <linux/string.h>
18#include <linux/ctype.h> 19#include <linux/ctype.h>
19#include <linux/delay.h> 20#include <linux/delay.h>
@@ -135,14 +136,14 @@ unsigned int __initdata setup_max_cpus = NR_CPUS;
135 * greater than 0, limits the maximum number of CPUs activated in 136 * greater than 0, limits the maximum number of CPUs activated in
136 * SMP mode to <NUM>. 137 * SMP mode to <NUM>.
137 */ 138 */
138#ifndef CONFIG_X86_IO_APIC 139
139static inline void disable_ioapic_setup(void) {}; 140void __weak arch_disable_smp_support(void) { }
140#endif
141 141
142static int __init nosmp(char *str) 142static int __init nosmp(char *str)
143{ 143{
144 setup_max_cpus = 0; 144 setup_max_cpus = 0;
145 disable_ioapic_setup(); 145 arch_disable_smp_support();
146
146 return 0; 147 return 0;
147} 148}
148 149
@@ -152,14 +153,14 @@ static int __init maxcpus(char *str)
152{ 153{
153 get_option(&str, &setup_max_cpus); 154 get_option(&str, &setup_max_cpus);
154 if (setup_max_cpus == 0) 155 if (setup_max_cpus == 0)
155 disable_ioapic_setup(); 156 arch_disable_smp_support();
156 157
157 return 0; 158 return 0;
158} 159}
159 160
160early_param("maxcpus", maxcpus); 161early_param("maxcpus", maxcpus);
161#else 162#else
162#define setup_max_cpus NR_CPUS 163const unsigned int setup_max_cpus = NR_CPUS;
163#endif 164#endif
164 165
165/* 166/*
@@ -540,6 +541,12 @@ asmlinkage void __init start_kernel(void)
540 */ 541 */
541 lockdep_init(); 542 lockdep_init();
542 debug_objects_early_init(); 543 debug_objects_early_init();
544
545 /*
546 * Set up the the initial canary ASAP:
547 */
548 boot_init_stack_canary();
549
543 cgroup_init_early(); 550 cgroup_init_early();
544 551
545 local_irq_disable(); 552 local_irq_disable();
diff --git a/kernel/async.c b/kernel/async.c
index f565891f2c9b..968ef9457d4e 100644
--- a/kernel/async.c
+++ b/kernel/async.c
@@ -49,6 +49,7 @@ asynchronous and synchronous parts of the kernel.
49*/ 49*/
50 50
51#include <linux/async.h> 51#include <linux/async.h>
52#include <linux/bug.h>
52#include <linux/module.h> 53#include <linux/module.h>
53#include <linux/wait.h> 54#include <linux/wait.h>
54#include <linux/sched.h> 55#include <linux/sched.h>
@@ -387,20 +388,11 @@ static int async_manager_thread(void *unused)
387 388
388static int __init async_init(void) 389static int __init async_init(void)
389{ 390{
390 if (async_enabled) 391 async_enabled =
391 if (IS_ERR(kthread_run(async_manager_thread, NULL, 392 !IS_ERR(kthread_run(async_manager_thread, NULL, "async/mgr"));
392 "async/mgr")))
393 async_enabled = 0;
394 return 0;
395}
396 393
397static int __init setup_async(char *str) 394 WARN_ON(!async_enabled);
398{ 395 return 0;
399 async_enabled = 1;
400 return 1;
401} 396}
402 397
403__setup("fastboot", setup_async);
404
405
406core_initcall(async_init); 398core_initcall(async_init);
diff --git a/kernel/exit.c b/kernel/exit.c
index efd30ccf3858..167e1e3ad7c6 100644
--- a/kernel/exit.c
+++ b/kernel/exit.c
@@ -980,12 +980,9 @@ static void check_stack_usage(void)
980{ 980{
981 static DEFINE_SPINLOCK(low_water_lock); 981 static DEFINE_SPINLOCK(low_water_lock);
982 static int lowest_to_date = THREAD_SIZE; 982 static int lowest_to_date = THREAD_SIZE;
983 unsigned long *n = end_of_stack(current);
984 unsigned long free; 983 unsigned long free;
985 984
986 while (*n == 0) 985 free = stack_not_used(current);
987 n++;
988 free = (unsigned long)n - (unsigned long)end_of_stack(current);
989 986
990 if (free >= lowest_to_date) 987 if (free >= lowest_to_date)
991 return; 988 return;
diff --git a/kernel/fork.c b/kernel/fork.c
index 4854c2c4a82e..6715ebc3761d 100644
--- a/kernel/fork.c
+++ b/kernel/fork.c
@@ -61,6 +61,7 @@
61#include <linux/proc_fs.h> 61#include <linux/proc_fs.h>
62#include <linux/blkdev.h> 62#include <linux/blkdev.h>
63#include <trace/sched.h> 63#include <trace/sched.h>
64#include <linux/magic.h>
64 65
65#include <asm/pgtable.h> 66#include <asm/pgtable.h>
66#include <asm/pgalloc.h> 67#include <asm/pgalloc.h>
@@ -212,6 +213,8 @@ static struct task_struct *dup_task_struct(struct task_struct *orig)
212{ 213{
213 struct task_struct *tsk; 214 struct task_struct *tsk;
214 struct thread_info *ti; 215 struct thread_info *ti;
216 unsigned long *stackend;
217
215 int err; 218 int err;
216 219
217 prepare_to_copy(orig); 220 prepare_to_copy(orig);
@@ -237,6 +240,8 @@ static struct task_struct *dup_task_struct(struct task_struct *orig)
237 goto out; 240 goto out;
238 241
239 setup_thread_stack(tsk, orig); 242 setup_thread_stack(tsk, orig);
243 stackend = end_of_stack(tsk);
244 *stackend = STACK_END_MAGIC; /* for overflow detection */
240 245
241#ifdef CONFIG_CC_STACKPROTECTOR 246#ifdef CONFIG_CC_STACKPROTECTOR
242 tsk->stack_canary = get_random_int(); 247 tsk->stack_canary = get_random_int();
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index 03d0bed2b8d9..c687ba4363f2 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -46,7 +46,10 @@ void dynamic_irq_init(unsigned int irq)
46 desc->irq_count = 0; 46 desc->irq_count = 0;
47 desc->irqs_unhandled = 0; 47 desc->irqs_unhandled = 0;
48#ifdef CONFIG_SMP 48#ifdef CONFIG_SMP
49 cpumask_setall(&desc->affinity); 49 cpumask_setall(desc->affinity);
50#ifdef CONFIG_GENERIC_PENDING_IRQ
51 cpumask_clear(desc->pending_mask);
52#endif
50#endif 53#endif
51 spin_unlock_irqrestore(&desc->lock, flags); 54 spin_unlock_irqrestore(&desc->lock, flags);
52} 55}
diff --git a/kernel/irq/handle.c b/kernel/irq/handle.c
index f6cdda68e5c6..9ebf77968871 100644
--- a/kernel/irq/handle.c
+++ b/kernel/irq/handle.c
@@ -17,6 +17,7 @@
17#include <linux/kernel_stat.h> 17#include <linux/kernel_stat.h>
18#include <linux/rculist.h> 18#include <linux/rculist.h>
19#include <linux/hash.h> 19#include <linux/hash.h>
20#include <linux/bootmem.h>
20 21
21#include "internals.h" 22#include "internals.h"
22 23
@@ -69,6 +70,7 @@ int nr_irqs = NR_IRQS;
69EXPORT_SYMBOL_GPL(nr_irqs); 70EXPORT_SYMBOL_GPL(nr_irqs);
70 71
71#ifdef CONFIG_SPARSE_IRQ 72#ifdef CONFIG_SPARSE_IRQ
73
72static struct irq_desc irq_desc_init = { 74static struct irq_desc irq_desc_init = {
73 .irq = -1, 75 .irq = -1,
74 .status = IRQ_DISABLED, 76 .status = IRQ_DISABLED,
@@ -76,9 +78,6 @@ static struct irq_desc irq_desc_init = {
76 .handle_irq = handle_bad_irq, 78 .handle_irq = handle_bad_irq,
77 .depth = 1, 79 .depth = 1,
78 .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), 80 .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
79#ifdef CONFIG_SMP
80 .affinity = CPU_MASK_ALL
81#endif
82}; 81};
83 82
84void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr) 83void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr)
@@ -115,6 +114,10 @@ static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu)
115 printk(KERN_ERR "can not alloc kstat_irqs\n"); 114 printk(KERN_ERR "can not alloc kstat_irqs\n");
116 BUG_ON(1); 115 BUG_ON(1);
117 } 116 }
117 if (!init_alloc_desc_masks(desc, cpu, false)) {
118 printk(KERN_ERR "can not alloc irq_desc cpumasks\n");
119 BUG_ON(1);
120 }
118 arch_init_chip_data(desc, cpu); 121 arch_init_chip_data(desc, cpu);
119} 122}
120 123
@@ -123,7 +126,7 @@ static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu)
123 */ 126 */
124DEFINE_SPINLOCK(sparse_irq_lock); 127DEFINE_SPINLOCK(sparse_irq_lock);
125 128
126struct irq_desc *irq_desc_ptrs[NR_IRQS] __read_mostly; 129struct irq_desc **irq_desc_ptrs __read_mostly;
127 130
128static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = { 131static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = {
129 [0 ... NR_IRQS_LEGACY-1] = { 132 [0 ... NR_IRQS_LEGACY-1] = {
@@ -133,14 +136,10 @@ static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_sm
133 .handle_irq = handle_bad_irq, 136 .handle_irq = handle_bad_irq,
134 .depth = 1, 137 .depth = 1,
135 .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), 138 .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock),
136#ifdef CONFIG_SMP
137 .affinity = CPU_MASK_ALL
138#endif
139 } 139 }
140}; 140};
141 141
142/* FIXME: use bootmem alloc ...*/ 142static unsigned int *kstat_irqs_legacy;
143static unsigned int kstat_irqs_legacy[NR_IRQS_LEGACY][NR_CPUS];
144 143
145int __init early_irq_init(void) 144int __init early_irq_init(void)
146{ 145{
@@ -150,18 +149,30 @@ int __init early_irq_init(void)
150 149
151 init_irq_default_affinity(); 150 init_irq_default_affinity();
152 151
152 /* initialize nr_irqs based on nr_cpu_ids */
153 arch_probe_nr_irqs();
154 printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d\n", NR_IRQS, nr_irqs);
155
153 desc = irq_desc_legacy; 156 desc = irq_desc_legacy;
154 legacy_count = ARRAY_SIZE(irq_desc_legacy); 157 legacy_count = ARRAY_SIZE(irq_desc_legacy);
155 158
159 /* allocate irq_desc_ptrs array based on nr_irqs */
160 irq_desc_ptrs = alloc_bootmem(nr_irqs * sizeof(void *));
161
162 /* allocate based on nr_cpu_ids */
163 /* FIXME: invert kstat_irgs, and it'd be a per_cpu_alloc'd thing */
164 kstat_irqs_legacy = alloc_bootmem(NR_IRQS_LEGACY * nr_cpu_ids *
165 sizeof(int));
166
156 for (i = 0; i < legacy_count; i++) { 167 for (i = 0; i < legacy_count; i++) {
157 desc[i].irq = i; 168 desc[i].irq = i;
158 desc[i].kstat_irqs = kstat_irqs_legacy[i]; 169 desc[i].kstat_irqs = kstat_irqs_legacy + i * nr_cpu_ids;
159 lockdep_set_class(&desc[i].lock, &irq_desc_lock_class); 170 lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
160 171 init_alloc_desc_masks(&desc[i], 0, true);
161 irq_desc_ptrs[i] = desc + i; 172 irq_desc_ptrs[i] = desc + i;
162 } 173 }
163 174
164 for (i = legacy_count; i < NR_IRQS; i++) 175 for (i = legacy_count; i < nr_irqs; i++)
165 irq_desc_ptrs[i] = NULL; 176 irq_desc_ptrs[i] = NULL;
166 177
167 return arch_early_irq_init(); 178 return arch_early_irq_init();
@@ -169,7 +180,10 @@ int __init early_irq_init(void)
169 180
170struct irq_desc *irq_to_desc(unsigned int irq) 181struct irq_desc *irq_to_desc(unsigned int irq)
171{ 182{
172 return (irq < NR_IRQS) ? irq_desc_ptrs[irq] : NULL; 183 if (irq_desc_ptrs && irq < nr_irqs)
184 return irq_desc_ptrs[irq];
185
186 return NULL;
173} 187}
174 188
175struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu) 189struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
@@ -178,10 +192,9 @@ struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu)
178 unsigned long flags; 192 unsigned long flags;
179 int node; 193 int node;
180 194
181 if (irq >= NR_IRQS) { 195 if (irq >= nr_irqs) {
182 printk(KERN_WARNING "irq >= NR_IRQS in irq_to_desc_alloc: %d %d\n", 196 WARN(1, "irq (%d) >= nr_irqs (%d) in irq_to_desc_alloc\n",
183 irq, NR_IRQS); 197 irq, nr_irqs);
184 WARN_ON(1);
185 return NULL; 198 return NULL;
186 } 199 }
187 200
@@ -223,9 +236,6 @@ struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
223 .handle_irq = handle_bad_irq, 236 .handle_irq = handle_bad_irq,
224 .depth = 1, 237 .depth = 1,
225 .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock), 238 .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
226#ifdef CONFIG_SMP
227 .affinity = CPU_MASK_ALL
228#endif
229 } 239 }
230}; 240};
231 241
@@ -238,14 +248,16 @@ int __init early_irq_init(void)
238 248
239 init_irq_default_affinity(); 249 init_irq_default_affinity();
240 250
251 printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS);
252
241 desc = irq_desc; 253 desc = irq_desc;
242 count = ARRAY_SIZE(irq_desc); 254 count = ARRAY_SIZE(irq_desc);
243 255
244 for (i = 0; i < count; i++) { 256 for (i = 0; i < count; i++) {
245 desc[i].irq = i; 257 desc[i].irq = i;
258 init_alloc_desc_masks(&desc[i], 0, true);
246 desc[i].kstat_irqs = kstat_irqs_all[i]; 259 desc[i].kstat_irqs = kstat_irqs_all[i];
247 } 260 }
248
249 return arch_early_irq_init(); 261 return arch_early_irq_init();
250} 262}
251 263
diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h
index b60950bf5a16..ee1aa9f8e8b9 100644
--- a/kernel/irq/internals.h
+++ b/kernel/irq/internals.h
@@ -17,7 +17,14 @@ extern struct lock_class_key irq_desc_lock_class;
17extern void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr); 17extern void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr);
18extern void clear_kstat_irqs(struct irq_desc *desc); 18extern void clear_kstat_irqs(struct irq_desc *desc);
19extern spinlock_t sparse_irq_lock; 19extern spinlock_t sparse_irq_lock;
20
21#ifdef CONFIG_SPARSE_IRQ
22/* irq_desc_ptrs allocated at boot time */
23extern struct irq_desc **irq_desc_ptrs;
24#else
25/* irq_desc_ptrs is a fixed size array */
20extern struct irq_desc *irq_desc_ptrs[NR_IRQS]; 26extern struct irq_desc *irq_desc_ptrs[NR_IRQS];
27#endif
21 28
22#ifdef CONFIG_PROC_FS 29#ifdef CONFIG_PROC_FS
23extern void register_irq_proc(unsigned int irq, struct irq_desc *desc); 30extern void register_irq_proc(unsigned int irq, struct irq_desc *desc);
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index ea119effe096..6458e99984c0 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -90,14 +90,14 @@ int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask)
90 90
91#ifdef CONFIG_GENERIC_PENDING_IRQ 91#ifdef CONFIG_GENERIC_PENDING_IRQ
92 if (desc->status & IRQ_MOVE_PCNTXT || desc->status & IRQ_DISABLED) { 92 if (desc->status & IRQ_MOVE_PCNTXT || desc->status & IRQ_DISABLED) {
93 cpumask_copy(&desc->affinity, cpumask); 93 cpumask_copy(desc->affinity, cpumask);
94 desc->chip->set_affinity(irq, cpumask); 94 desc->chip->set_affinity(irq, cpumask);
95 } else { 95 } else {
96 desc->status |= IRQ_MOVE_PENDING; 96 desc->status |= IRQ_MOVE_PENDING;
97 cpumask_copy(&desc->pending_mask, cpumask); 97 cpumask_copy(desc->pending_mask, cpumask);
98 } 98 }
99#else 99#else
100 cpumask_copy(&desc->affinity, cpumask); 100 cpumask_copy(desc->affinity, cpumask);
101 desc->chip->set_affinity(irq, cpumask); 101 desc->chip->set_affinity(irq, cpumask);
102#endif 102#endif
103 desc->status |= IRQ_AFFINITY_SET; 103 desc->status |= IRQ_AFFINITY_SET;
@@ -119,16 +119,16 @@ static int setup_affinity(unsigned int irq, struct irq_desc *desc)
119 * one of the targets is online. 119 * one of the targets is online.
120 */ 120 */
121 if (desc->status & (IRQ_AFFINITY_SET | IRQ_NO_BALANCING)) { 121 if (desc->status & (IRQ_AFFINITY_SET | IRQ_NO_BALANCING)) {
122 if (cpumask_any_and(&desc->affinity, cpu_online_mask) 122 if (cpumask_any_and(desc->affinity, cpu_online_mask)
123 < nr_cpu_ids) 123 < nr_cpu_ids)
124 goto set_affinity; 124 goto set_affinity;
125 else 125 else
126 desc->status &= ~IRQ_AFFINITY_SET; 126 desc->status &= ~IRQ_AFFINITY_SET;
127 } 127 }
128 128
129 cpumask_and(&desc->affinity, cpu_online_mask, irq_default_affinity); 129 cpumask_and(desc->affinity, cpu_online_mask, irq_default_affinity);
130set_affinity: 130set_affinity:
131 desc->chip->set_affinity(irq, &desc->affinity); 131 desc->chip->set_affinity(irq, desc->affinity);
132 132
133 return 0; 133 return 0;
134} 134}
diff --git a/kernel/irq/migration.c b/kernel/irq/migration.c
index bd72329e630c..e05ad9be43b7 100644
--- a/kernel/irq/migration.c
+++ b/kernel/irq/migration.c
@@ -18,7 +18,7 @@ void move_masked_irq(int irq)
18 18
19 desc->status &= ~IRQ_MOVE_PENDING; 19 desc->status &= ~IRQ_MOVE_PENDING;
20 20
21 if (unlikely(cpumask_empty(&desc->pending_mask))) 21 if (unlikely(cpumask_empty(desc->pending_mask)))
22 return; 22 return;
23 23
24 if (!desc->chip->set_affinity) 24 if (!desc->chip->set_affinity)
@@ -38,13 +38,13 @@ void move_masked_irq(int irq)
38 * For correct operation this depends on the caller 38 * For correct operation this depends on the caller
39 * masking the irqs. 39 * masking the irqs.
40 */ 40 */
41 if (likely(cpumask_any_and(&desc->pending_mask, cpu_online_mask) 41 if (likely(cpumask_any_and(desc->pending_mask, cpu_online_mask)
42 < nr_cpu_ids)) { 42 < nr_cpu_ids)) {
43 cpumask_and(&desc->affinity, 43 cpumask_and(desc->affinity,
44 &desc->pending_mask, cpu_online_mask); 44 desc->pending_mask, cpu_online_mask);
45 desc->chip->set_affinity(irq, &desc->affinity); 45 desc->chip->set_affinity(irq, desc->affinity);
46 } 46 }
47 cpumask_clear(&desc->pending_mask); 47 cpumask_clear(desc->pending_mask);
48} 48}
49 49
50void move_native_irq(int irq) 50void move_native_irq(int irq)
diff --git a/kernel/irq/numa_migrate.c b/kernel/irq/numa_migrate.c
index aef18ab6b75b..243d6121e50e 100644
--- a/kernel/irq/numa_migrate.c
+++ b/kernel/irq/numa_migrate.c
@@ -33,15 +33,22 @@ static void free_kstat_irqs(struct irq_desc *old_desc, struct irq_desc *desc)
33 old_desc->kstat_irqs = NULL; 33 old_desc->kstat_irqs = NULL;
34} 34}
35 35
36static void init_copy_one_irq_desc(int irq, struct irq_desc *old_desc, 36static bool init_copy_one_irq_desc(int irq, struct irq_desc *old_desc,
37 struct irq_desc *desc, int cpu) 37 struct irq_desc *desc, int cpu)
38{ 38{
39 memcpy(desc, old_desc, sizeof(struct irq_desc)); 39 memcpy(desc, old_desc, sizeof(struct irq_desc));
40 if (!init_alloc_desc_masks(desc, cpu, false)) {
41 printk(KERN_ERR "irq %d: can not get new irq_desc cpumask "
42 "for migration.\n", irq);
43 return false;
44 }
40 spin_lock_init(&desc->lock); 45 spin_lock_init(&desc->lock);
41 desc->cpu = cpu; 46 desc->cpu = cpu;
42 lockdep_set_class(&desc->lock, &irq_desc_lock_class); 47 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
43 init_copy_kstat_irqs(old_desc, desc, cpu, nr_cpu_ids); 48 init_copy_kstat_irqs(old_desc, desc, cpu, nr_cpu_ids);
49 init_copy_desc_masks(old_desc, desc);
44 arch_init_copy_chip_data(old_desc, desc, cpu); 50 arch_init_copy_chip_data(old_desc, desc, cpu);
51 return true;
45} 52}
46 53
47static void free_one_irq_desc(struct irq_desc *old_desc, struct irq_desc *desc) 54static void free_one_irq_desc(struct irq_desc *old_desc, struct irq_desc *desc)
@@ -71,12 +78,18 @@ static struct irq_desc *__real_move_irq_desc(struct irq_desc *old_desc,
71 node = cpu_to_node(cpu); 78 node = cpu_to_node(cpu);
72 desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node); 79 desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node);
73 if (!desc) { 80 if (!desc) {
74 printk(KERN_ERR "irq %d: can not get new irq_desc for migration.\n", irq); 81 printk(KERN_ERR "irq %d: can not get new irq_desc "
82 "for migration.\n", irq);
83 /* still use old one */
84 desc = old_desc;
85 goto out_unlock;
86 }
87 if (!init_copy_one_irq_desc(irq, old_desc, desc, cpu)) {
75 /* still use old one */ 88 /* still use old one */
89 kfree(desc);
76 desc = old_desc; 90 desc = old_desc;
77 goto out_unlock; 91 goto out_unlock;
78 } 92 }
79 init_copy_one_irq_desc(irq, old_desc, desc, cpu);
80 93
81 irq_desc_ptrs[irq] = desc; 94 irq_desc_ptrs[irq] = desc;
82 spin_unlock_irqrestore(&sparse_irq_lock, flags); 95 spin_unlock_irqrestore(&sparse_irq_lock, flags);
diff --git a/kernel/irq/proc.c b/kernel/irq/proc.c
index aae3f742bcec..692363dd591f 100644
--- a/kernel/irq/proc.c
+++ b/kernel/irq/proc.c
@@ -20,11 +20,11 @@ static struct proc_dir_entry *root_irq_dir;
20static int irq_affinity_proc_show(struct seq_file *m, void *v) 20static int irq_affinity_proc_show(struct seq_file *m, void *v)
21{ 21{
22 struct irq_desc *desc = irq_to_desc((long)m->private); 22 struct irq_desc *desc = irq_to_desc((long)m->private);
23 const struct cpumask *mask = &desc->affinity; 23 const struct cpumask *mask = desc->affinity;
24 24
25#ifdef CONFIG_GENERIC_PENDING_IRQ 25#ifdef CONFIG_GENERIC_PENDING_IRQ
26 if (desc->status & IRQ_MOVE_PENDING) 26 if (desc->status & IRQ_MOVE_PENDING)
27 mask = &desc->pending_mask; 27 mask = desc->pending_mask;
28#endif 28#endif
29 seq_cpumask(m, mask); 29 seq_cpumask(m, mask);
30 seq_putc(m, '\n'); 30 seq_putc(m, '\n');
diff --git a/kernel/kexec.c b/kernel/kexec.c
index 483899578259..c7fd6692939d 100644
--- a/kernel/kexec.c
+++ b/kernel/kexec.c
@@ -1130,7 +1130,7 @@ void crash_save_cpu(struct pt_regs *regs, int cpu)
1130 return; 1130 return;
1131 memset(&prstatus, 0, sizeof(prstatus)); 1131 memset(&prstatus, 0, sizeof(prstatus));
1132 prstatus.pr_pid = current->pid; 1132 prstatus.pr_pid = current->pid;
1133 elf_core_copy_regs(&prstatus.pr_reg, regs); 1133 elf_core_copy_kernel_regs(&prstatus.pr_reg, regs);
1134 buf = append_elf_note(buf, KEXEC_CORE_NOTE_NAME, NT_PRSTATUS, 1134 buf = append_elf_note(buf, KEXEC_CORE_NOTE_NAME, NT_PRSTATUS,
1135 &prstatus, sizeof(prstatus)); 1135 &prstatus, sizeof(prstatus));
1136 final_note(buf); 1136 final_note(buf);
diff --git a/kernel/module.c b/kernel/module.c
index 77672233387f..f77ac320d0b5 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -51,6 +51,7 @@
51#include <linux/tracepoint.h> 51#include <linux/tracepoint.h>
52#include <linux/ftrace.h> 52#include <linux/ftrace.h>
53#include <linux/async.h> 53#include <linux/async.h>
54#include <linux/percpu.h>
54 55
55#if 0 56#if 0
56#define DEBUGP printk 57#define DEBUGP printk
@@ -366,6 +367,34 @@ static struct module *find_module(const char *name)
366} 367}
367 368
368#ifdef CONFIG_SMP 369#ifdef CONFIG_SMP
370
371#ifdef CONFIG_HAVE_DYNAMIC_PER_CPU_AREA
372
373static void *percpu_modalloc(unsigned long size, unsigned long align,
374 const char *name)
375{
376 void *ptr;
377
378 if (align > PAGE_SIZE) {
379 printk(KERN_WARNING "%s: per-cpu alignment %li > %li\n",
380 name, align, PAGE_SIZE);
381 align = PAGE_SIZE;
382 }
383
384 ptr = __alloc_reserved_percpu(size, align);
385 if (!ptr)
386 printk(KERN_WARNING
387 "Could not allocate %lu bytes percpu data\n", size);
388 return ptr;
389}
390
391static void percpu_modfree(void *freeme)
392{
393 free_percpu(freeme);
394}
395
396#else /* ... !CONFIG_HAVE_DYNAMIC_PER_CPU_AREA */
397
369/* Number of blocks used and allocated. */ 398/* Number of blocks used and allocated. */
370static unsigned int pcpu_num_used, pcpu_num_allocated; 399static unsigned int pcpu_num_used, pcpu_num_allocated;
371/* Size of each block. -ve means used. */ 400/* Size of each block. -ve means used. */
@@ -480,21 +509,6 @@ static void percpu_modfree(void *freeme)
480 } 509 }
481} 510}
482 511
483static unsigned int find_pcpusec(Elf_Ehdr *hdr,
484 Elf_Shdr *sechdrs,
485 const char *secstrings)
486{
487 return find_sec(hdr, sechdrs, secstrings, ".data.percpu");
488}
489
490static void percpu_modcopy(void *pcpudest, const void *from, unsigned long size)
491{
492 int cpu;
493
494 for_each_possible_cpu(cpu)
495 memcpy(pcpudest + per_cpu_offset(cpu), from, size);
496}
497
498static int percpu_modinit(void) 512static int percpu_modinit(void)
499{ 513{
500 pcpu_num_used = 2; 514 pcpu_num_used = 2;
@@ -513,7 +527,26 @@ static int percpu_modinit(void)
513 return 0; 527 return 0;
514} 528}
515__initcall(percpu_modinit); 529__initcall(percpu_modinit);
530
531#endif /* CONFIG_HAVE_DYNAMIC_PER_CPU_AREA */
532
533static unsigned int find_pcpusec(Elf_Ehdr *hdr,
534 Elf_Shdr *sechdrs,
535 const char *secstrings)
536{
537 return find_sec(hdr, sechdrs, secstrings, ".data.percpu");
538}
539
540static void percpu_modcopy(void *pcpudest, const void *from, unsigned long size)
541{
542 int cpu;
543
544 for_each_possible_cpu(cpu)
545 memcpy(pcpudest + per_cpu_offset(cpu), from, size);
546}
547
516#else /* ... !CONFIG_SMP */ 548#else /* ... !CONFIG_SMP */
549
517static inline void *percpu_modalloc(unsigned long size, unsigned long align, 550static inline void *percpu_modalloc(unsigned long size, unsigned long align,
518 const char *name) 551 const char *name)
519{ 552{
@@ -535,6 +568,7 @@ static inline void percpu_modcopy(void *pcpudst, const void *src,
535 /* pcpusec should be 0, and size of that section should be 0. */ 568 /* pcpusec should be 0, and size of that section should be 0. */
536 BUG_ON(size != 0); 569 BUG_ON(size != 0);
537} 570}
571
538#endif /* CONFIG_SMP */ 572#endif /* CONFIG_SMP */
539 573
540#define MODINFO_ATTR(field) \ 574#define MODINFO_ATTR(field) \
diff --git a/kernel/panic.c b/kernel/panic.c
index 2a2ff36ff44d..32fe4eff1b89 100644
--- a/kernel/panic.c
+++ b/kernel/panic.c
@@ -74,6 +74,9 @@ NORET_TYPE void panic(const char * fmt, ...)
74 vsnprintf(buf, sizeof(buf), fmt, args); 74 vsnprintf(buf, sizeof(buf), fmt, args);
75 va_end(args); 75 va_end(args);
76 printk(KERN_EMERG "Kernel panic - not syncing: %s\n",buf); 76 printk(KERN_EMERG "Kernel panic - not syncing: %s\n",buf);
77#ifdef CONFIG_DEBUG_BUGVERBOSE
78 dump_stack();
79#endif
77 bust_spinlocks(0); 80 bust_spinlocks(0);
78 81
79 /* 82 /*
@@ -355,15 +358,18 @@ EXPORT_SYMBOL(warn_slowpath);
355#endif 358#endif
356 359
357#ifdef CONFIG_CC_STACKPROTECTOR 360#ifdef CONFIG_CC_STACKPROTECTOR
361
358/* 362/*
359 * Called when gcc's -fstack-protector feature is used, and 363 * Called when gcc's -fstack-protector feature is used, and
360 * gcc detects corruption of the on-stack canary value 364 * gcc detects corruption of the on-stack canary value
361 */ 365 */
362void __stack_chk_fail(void) 366void __stack_chk_fail(void)
363{ 367{
364 panic("stack-protector: Kernel stack is corrupted"); 368 panic("stack-protector: Kernel stack is corrupted in: %p\n",
369 __builtin_return_address(0));
365} 370}
366EXPORT_SYMBOL(__stack_chk_fail); 371EXPORT_SYMBOL(__stack_chk_fail);
372
367#endif 373#endif
368 374
369core_param(panic, panic_timeout, int, 0644); 375core_param(panic, panic_timeout, int, 0644);
diff --git a/kernel/sched.c b/kernel/sched.c
index 9f8506d68fdc..f4c413bdd38d 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -6342,12 +6342,7 @@ void sched_show_task(struct task_struct *p)
6342 printk(KERN_CONT " %016lx ", thread_saved_pc(p)); 6342 printk(KERN_CONT " %016lx ", thread_saved_pc(p));
6343#endif 6343#endif
6344#ifdef CONFIG_DEBUG_STACK_USAGE 6344#ifdef CONFIG_DEBUG_STACK_USAGE
6345 { 6345 free = stack_not_used(p);
6346 unsigned long *n = end_of_stack(p);
6347 while (!*n)
6348 n++;
6349 free = (unsigned long)n - (unsigned long)end_of_stack(p);
6350 }
6351#endif 6346#endif
6352 printk(KERN_CONT "%5lu %5d %6d\n", free, 6347 printk(KERN_CONT "%5lu %5d %6d\n", free,
6353 task_pid_nr(p), task_pid_nr(p->real_parent)); 6348 task_pid_nr(p), task_pid_nr(p->real_parent));
@@ -9892,7 +9887,7 @@ cpuacct_destroy(struct cgroup_subsys *ss, struct cgroup *cgrp)
9892 9887
9893static u64 cpuacct_cpuusage_read(struct cpuacct *ca, int cpu) 9888static u64 cpuacct_cpuusage_read(struct cpuacct *ca, int cpu)
9894{ 9889{
9895 u64 *cpuusage = percpu_ptr(ca->cpuusage, cpu); 9890 u64 *cpuusage = per_cpu_ptr(ca->cpuusage, cpu);
9896 u64 data; 9891 u64 data;
9897 9892
9898#ifndef CONFIG_64BIT 9893#ifndef CONFIG_64BIT
@@ -9911,7 +9906,7 @@ static u64 cpuacct_cpuusage_read(struct cpuacct *ca, int cpu)
9911 9906
9912static void cpuacct_cpuusage_write(struct cpuacct *ca, int cpu, u64 val) 9907static void cpuacct_cpuusage_write(struct cpuacct *ca, int cpu, u64 val)
9913{ 9908{
9914 u64 *cpuusage = percpu_ptr(ca->cpuusage, cpu); 9909 u64 *cpuusage = per_cpu_ptr(ca->cpuusage, cpu);
9915 9910
9916#ifndef CONFIG_64BIT 9911#ifndef CONFIG_64BIT
9917 /* 9912 /*
@@ -10007,7 +10002,7 @@ static void cpuacct_charge(struct task_struct *tsk, u64 cputime)
10007 ca = task_ca(tsk); 10002 ca = task_ca(tsk);
10008 10003
10009 for (; ca; ca = ca->parent) { 10004 for (; ca; ca = ca->parent) {
10010 u64 *cpuusage = percpu_ptr(ca->cpuusage, cpu); 10005 u64 *cpuusage = per_cpu_ptr(ca->cpuusage, cpu);
10011 *cpuusage += cputime; 10006 *cpuusage += cputime;
10012 } 10007 }
10013} 10008}
diff --git a/kernel/sched_rt.c b/kernel/sched_rt.c
index c79dc7844012..299d012b4394 100644
--- a/kernel/sched_rt.c
+++ b/kernel/sched_rt.c
@@ -1122,12 +1122,13 @@ static struct task_struct *pick_next_highest_task_rt(struct rq *rq, int cpu)
1122 1122
1123static DEFINE_PER_CPU(cpumask_var_t, local_cpu_mask); 1123static DEFINE_PER_CPU(cpumask_var_t, local_cpu_mask);
1124 1124
1125static inline int pick_optimal_cpu(int this_cpu, cpumask_t *mask) 1125static inline int pick_optimal_cpu(int this_cpu,
1126 const struct cpumask *mask)
1126{ 1127{
1127 int first; 1128 int first;
1128 1129
1129 /* "this_cpu" is cheaper to preempt than a remote processor */ 1130 /* "this_cpu" is cheaper to preempt than a remote processor */
1130 if ((this_cpu != -1) && cpu_isset(this_cpu, *mask)) 1131 if ((this_cpu != -1) && cpumask_test_cpu(this_cpu, mask))
1131 return this_cpu; 1132 return this_cpu;
1132 1133
1133 first = cpumask_first(mask); 1134 first = cpumask_first(mask);
@@ -1143,6 +1144,7 @@ static int find_lowest_rq(struct task_struct *task)
1143 struct cpumask *lowest_mask = __get_cpu_var(local_cpu_mask); 1144 struct cpumask *lowest_mask = __get_cpu_var(local_cpu_mask);
1144 int this_cpu = smp_processor_id(); 1145 int this_cpu = smp_processor_id();
1145 int cpu = task_cpu(task); 1146 int cpu = task_cpu(task);
1147 cpumask_var_t domain_mask;
1146 1148
1147 if (task->rt.nr_cpus_allowed == 1) 1149 if (task->rt.nr_cpus_allowed == 1)
1148 return -1; /* No other targets possible */ 1150 return -1; /* No other targets possible */
@@ -1175,19 +1177,25 @@ static int find_lowest_rq(struct task_struct *task)
1175 if (this_cpu == cpu) 1177 if (this_cpu == cpu)
1176 this_cpu = -1; /* Skip this_cpu opt if the same */ 1178 this_cpu = -1; /* Skip this_cpu opt if the same */
1177 1179
1178 for_each_domain(cpu, sd) { 1180 if (alloc_cpumask_var(&domain_mask, GFP_ATOMIC)) {
1179 if (sd->flags & SD_WAKE_AFFINE) { 1181 for_each_domain(cpu, sd) {
1180 cpumask_t domain_mask; 1182 if (sd->flags & SD_WAKE_AFFINE) {
1181 int best_cpu; 1183 int best_cpu;
1182 1184
1183 cpumask_and(&domain_mask, sched_domain_span(sd), 1185 cpumask_and(domain_mask,
1184 lowest_mask); 1186 sched_domain_span(sd),
1187 lowest_mask);
1185 1188
1186 best_cpu = pick_optimal_cpu(this_cpu, 1189 best_cpu = pick_optimal_cpu(this_cpu,
1187 &domain_mask); 1190 domain_mask);
1188 if (best_cpu != -1) 1191
1189 return best_cpu; 1192 if (best_cpu != -1) {
1193 free_cpumask_var(domain_mask);
1194 return best_cpu;
1195 }
1196 }
1190 } 1197 }
1198 free_cpumask_var(domain_mask);
1191 } 1199 }
1192 1200
1193 /* 1201 /*
diff --git a/kernel/softirq.c b/kernel/softirq.c
index 9041ea7948fe..57d3f67f6f38 100644
--- a/kernel/softirq.c
+++ b/kernel/softirq.c
@@ -796,6 +796,11 @@ int __init __weak early_irq_init(void)
796 return 0; 796 return 0;
797} 797}
798 798
799int __init __weak arch_probe_nr_irqs(void)
800{
801 return 0;
802}
803
799int __init __weak arch_early_irq_init(void) 804int __init __weak arch_early_irq_init(void)
800{ 805{
801 return 0; 806 return 0;
diff --git a/kernel/stop_machine.c b/kernel/stop_machine.c
index 0cd415ee62a2..74541ca49536 100644
--- a/kernel/stop_machine.c
+++ b/kernel/stop_machine.c
@@ -170,7 +170,7 @@ int __stop_machine(int (*fn)(void *), void *data, const struct cpumask *cpus)
170 * doesn't hit this CPU until we're ready. */ 170 * doesn't hit this CPU until we're ready. */
171 get_cpu(); 171 get_cpu();
172 for_each_online_cpu(i) { 172 for_each_online_cpu(i) {
173 sm_work = percpu_ptr(stop_machine_work, i); 173 sm_work = per_cpu_ptr(stop_machine_work, i);
174 INIT_WORK(sm_work, stop_cpu); 174 INIT_WORK(sm_work, stop_cpu);
175 queue_work_on(i, stop_machine_wq, sm_work); 175 queue_work_on(i, stop_machine_wq, sm_work);
176 } 176 }
diff --git a/lib/Kconfig b/lib/Kconfig
index 54aaf4feaf6c..2a9c69f34482 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -98,6 +98,20 @@ config LZO_DECOMPRESS
98 tristate 98 tristate
99 99
100# 100#
101# These all provide a common interface (hence the apparent duplication with
102# ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.)
103#
104config DECOMPRESS_GZIP
105 select ZLIB_INFLATE
106 tristate
107
108config DECOMPRESS_BZIP2
109 tristate
110
111config DECOMPRESS_LZMA
112 tristate
113
114#
101# Generic allocator support is selected if needed 115# Generic allocator support is selected if needed
102# 116#
103config GENERIC_ALLOCATOR 117config GENERIC_ALLOCATOR
diff --git a/lib/Makefile b/lib/Makefile
index 8bdc647e6d62..051a33a8e028 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -12,7 +12,7 @@ lib-y := ctype.o string.o vsprintf.o cmdline.o \
12 idr.o int_sqrt.o extable.o prio_tree.o \ 12 idr.o int_sqrt.o extable.o prio_tree.o \
13 sha1.o irq_regs.o reciprocal_div.o argv_split.o \ 13 sha1.o irq_regs.o reciprocal_div.o argv_split.o \
14 proportions.o prio_heap.o ratelimit.o show_mem.o \ 14 proportions.o prio_heap.o ratelimit.o show_mem.o \
15 is_single_threaded.o plist.o 15 is_single_threaded.o plist.o decompress.o
16 16
17lib-$(CONFIG_MMU) += ioremap.o 17lib-$(CONFIG_MMU) += ioremap.o
18lib-$(CONFIG_SMP) += cpumask.o 18lib-$(CONFIG_SMP) += cpumask.o
@@ -65,6 +65,10 @@ obj-$(CONFIG_REED_SOLOMON) += reed_solomon/
65obj-$(CONFIG_LZO_COMPRESS) += lzo/ 65obj-$(CONFIG_LZO_COMPRESS) += lzo/
66obj-$(CONFIG_LZO_DECOMPRESS) += lzo/ 66obj-$(CONFIG_LZO_DECOMPRESS) += lzo/
67 67
68lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o
69lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o
70lib-$(CONFIG_DECOMPRESS_LZMA) += decompress_unlzma.o
71
68obj-$(CONFIG_TEXTSEARCH) += textsearch.o 72obj-$(CONFIG_TEXTSEARCH) += textsearch.o
69obj-$(CONFIG_TEXTSEARCH_KMP) += ts_kmp.o 73obj-$(CONFIG_TEXTSEARCH_KMP) += ts_kmp.o
70obj-$(CONFIG_TEXTSEARCH_BM) += ts_bm.o 74obj-$(CONFIG_TEXTSEARCH_BM) += ts_bm.o
diff --git a/lib/decompress.c b/lib/decompress.c
new file mode 100644
index 000000000000..d2842f571674
--- /dev/null
+++ b/lib/decompress.c
@@ -0,0 +1,54 @@
1/*
2 * decompress.c
3 *
4 * Detect the decompression method based on magic number
5 */
6
7#include <linux/decompress/generic.h>
8
9#include <linux/decompress/bunzip2.h>
10#include <linux/decompress/unlzma.h>
11#include <linux/decompress/inflate.h>
12
13#include <linux/types.h>
14#include <linux/string.h>
15
16#ifndef CONFIG_DECOMPRESS_GZIP
17# define gunzip NULL
18#endif
19#ifndef CONFIG_DECOMPRESS_BZIP2
20# define bunzip2 NULL
21#endif
22#ifndef CONFIG_DECOMPRESS_LZMA
23# define unlzma NULL
24#endif
25
26static const struct compress_format {
27 unsigned char magic[2];
28 const char *name;
29 decompress_fn decompressor;
30} compressed_formats[] = {
31 { {037, 0213}, "gzip", gunzip },
32 { {037, 0236}, "gzip", gunzip },
33 { {0x42, 0x5a}, "bzip2", bunzip2 },
34 { {0x5d, 0x00}, "lzma", unlzma },
35 { {0, 0}, NULL, NULL }
36};
37
38decompress_fn decompress_method(const unsigned char *inbuf, int len,
39 const char **name)
40{
41 const struct compress_format *cf;
42
43 if (len < 2)
44 return NULL; /* Need at least this much... */
45
46 for (cf = compressed_formats; cf->name; cf++) {
47 if (!memcmp(inbuf, cf->magic, 2))
48 break;
49
50 }
51 if (name)
52 *name = cf->name;
53 return cf->decompressor;
54}
diff --git a/lib/decompress_bunzip2.c b/lib/decompress_bunzip2.c
new file mode 100644
index 000000000000..5d3ddb5fcfd9
--- /dev/null
+++ b/lib/decompress_bunzip2.c
@@ -0,0 +1,735 @@
1/* vi: set sw = 4 ts = 4: */
2/* Small bzip2 deflate implementation, by Rob Landley (rob@landley.net).
3
4 Based on bzip2 decompression code by Julian R Seward (jseward@acm.org),
5 which also acknowledges contributions by Mike Burrows, David Wheeler,
6 Peter Fenwick, Alistair Moffat, Radford Neal, Ian H. Witten,
7 Robert Sedgewick, and Jon L. Bentley.
8
9 This code is licensed under the LGPLv2:
10 LGPL (http://www.gnu.org/copyleft/lgpl.html
11*/
12
13/*
14 Size and speed optimizations by Manuel Novoa III (mjn3@codepoet.org).
15
16 More efficient reading of Huffman codes, a streamlined read_bunzip()
17 function, and various other tweaks. In (limited) tests, approximately
18 20% faster than bzcat on x86 and about 10% faster on arm.
19
20 Note that about 2/3 of the time is spent in read_unzip() reversing
21 the Burrows-Wheeler transformation. Much of that time is delay
22 resulting from cache misses.
23
24 I would ask that anyone benefiting from this work, especially those
25 using it in commercial products, consider making a donation to my local
26 non-profit hospice organization in the name of the woman I loved, who
27 passed away Feb. 12, 2003.
28
29 In memory of Toni W. Hagan
30
31 Hospice of Acadiana, Inc.
32 2600 Johnston St., Suite 200
33 Lafayette, LA 70503-3240
34
35 Phone (337) 232-1234 or 1-800-738-2226
36 Fax (337) 232-1297
37
38 http://www.hospiceacadiana.com/
39
40 Manuel
41 */
42
43/*
44 Made it fit for running in Linux Kernel by Alain Knaff (alain@knaff.lu)
45*/
46
47
48#ifndef STATIC
49#include <linux/decompress/bunzip2.h>
50#endif /* !STATIC */
51
52#include <linux/decompress/mm.h>
53
54#ifndef INT_MAX
55#define INT_MAX 0x7fffffff
56#endif
57
58/* Constants for Huffman coding */
59#define MAX_GROUPS 6
60#define GROUP_SIZE 50 /* 64 would have been more efficient */
61#define MAX_HUFCODE_BITS 20 /* Longest Huffman code allowed */
62#define MAX_SYMBOLS 258 /* 256 literals + RUNA + RUNB */
63#define SYMBOL_RUNA 0
64#define SYMBOL_RUNB 1
65
66/* Status return values */
67#define RETVAL_OK 0
68#define RETVAL_LAST_BLOCK (-1)
69#define RETVAL_NOT_BZIP_DATA (-2)
70#define RETVAL_UNEXPECTED_INPUT_EOF (-3)
71#define RETVAL_UNEXPECTED_OUTPUT_EOF (-4)
72#define RETVAL_DATA_ERROR (-5)
73#define RETVAL_OUT_OF_MEMORY (-6)
74#define RETVAL_OBSOLETE_INPUT (-7)
75
76/* Other housekeeping constants */
77#define BZIP2_IOBUF_SIZE 4096
78
79/* This is what we know about each Huffman coding group */
80struct group_data {
81 /* We have an extra slot at the end of limit[] for a sentinal value. */
82 int limit[MAX_HUFCODE_BITS+1];
83 int base[MAX_HUFCODE_BITS];
84 int permute[MAX_SYMBOLS];
85 int minLen, maxLen;
86};
87
88/* Structure holding all the housekeeping data, including IO buffers and
89 memory that persists between calls to bunzip */
90struct bunzip_data {
91 /* State for interrupting output loop */
92 int writeCopies, writePos, writeRunCountdown, writeCount, writeCurrent;
93 /* I/O tracking data (file handles, buffers, positions, etc.) */
94 int (*fill)(void*, unsigned int);
95 int inbufCount, inbufPos /*, outbufPos*/;
96 unsigned char *inbuf /*,*outbuf*/;
97 unsigned int inbufBitCount, inbufBits;
98 /* The CRC values stored in the block header and calculated from the
99 data */
100 unsigned int crc32Table[256], headerCRC, totalCRC, writeCRC;
101 /* Intermediate buffer and its size (in bytes) */
102 unsigned int *dbuf, dbufSize;
103 /* These things are a bit too big to go on the stack */
104 unsigned char selectors[32768]; /* nSelectors = 15 bits */
105 struct group_data groups[MAX_GROUPS]; /* Huffman coding tables */
106 int io_error; /* non-zero if we have IO error */
107};
108
109
110/* Return the next nnn bits of input. All reads from the compressed input
111 are done through this function. All reads are big endian */
112static unsigned int INIT get_bits(struct bunzip_data *bd, char bits_wanted)
113{
114 unsigned int bits = 0;
115
116 /* If we need to get more data from the byte buffer, do so.
117 (Loop getting one byte at a time to enforce endianness and avoid
118 unaligned access.) */
119 while (bd->inbufBitCount < bits_wanted) {
120 /* If we need to read more data from file into byte buffer, do
121 so */
122 if (bd->inbufPos == bd->inbufCount) {
123 if (bd->io_error)
124 return 0;
125 bd->inbufCount = bd->fill(bd->inbuf, BZIP2_IOBUF_SIZE);
126 if (bd->inbufCount <= 0) {
127 bd->io_error = RETVAL_UNEXPECTED_INPUT_EOF;
128 return 0;
129 }
130 bd->inbufPos = 0;
131 }
132 /* Avoid 32-bit overflow (dump bit buffer to top of output) */
133 if (bd->inbufBitCount >= 24) {
134 bits = bd->inbufBits&((1 << bd->inbufBitCount)-1);
135 bits_wanted -= bd->inbufBitCount;
136 bits <<= bits_wanted;
137 bd->inbufBitCount = 0;
138 }
139 /* Grab next 8 bits of input from buffer. */
140 bd->inbufBits = (bd->inbufBits << 8)|bd->inbuf[bd->inbufPos++];
141 bd->inbufBitCount += 8;
142 }
143 /* Calculate result */
144 bd->inbufBitCount -= bits_wanted;
145 bits |= (bd->inbufBits >> bd->inbufBitCount)&((1 << bits_wanted)-1);
146
147 return bits;
148}
149
150/* Unpacks the next block and sets up for the inverse burrows-wheeler step. */
151
152static int INIT get_next_block(struct bunzip_data *bd)
153{
154 struct group_data *hufGroup = NULL;
155 int *base = NULL;
156 int *limit = NULL;
157 int dbufCount, nextSym, dbufSize, groupCount, selector,
158 i, j, k, t, runPos, symCount, symTotal, nSelectors,
159 byteCount[256];
160 unsigned char uc, symToByte[256], mtfSymbol[256], *selectors;
161 unsigned int *dbuf, origPtr;
162
163 dbuf = bd->dbuf;
164 dbufSize = bd->dbufSize;
165 selectors = bd->selectors;
166
167 /* Read in header signature and CRC, then validate signature.
168 (last block signature means CRC is for whole file, return now) */
169 i = get_bits(bd, 24);
170 j = get_bits(bd, 24);
171 bd->headerCRC = get_bits(bd, 32);
172 if ((i == 0x177245) && (j == 0x385090))
173 return RETVAL_LAST_BLOCK;
174 if ((i != 0x314159) || (j != 0x265359))
175 return RETVAL_NOT_BZIP_DATA;
176 /* We can add support for blockRandomised if anybody complains.
177 There was some code for this in busybox 1.0.0-pre3, but nobody ever
178 noticed that it didn't actually work. */
179 if (get_bits(bd, 1))
180 return RETVAL_OBSOLETE_INPUT;
181 origPtr = get_bits(bd, 24);
182 if (origPtr > dbufSize)
183 return RETVAL_DATA_ERROR;
184 /* mapping table: if some byte values are never used (encoding things
185 like ascii text), the compression code removes the gaps to have fewer
186 symbols to deal with, and writes a sparse bitfield indicating which
187 values were present. We make a translation table to convert the
188 symbols back to the corresponding bytes. */
189 t = get_bits(bd, 16);
190 symTotal = 0;
191 for (i = 0; i < 16; i++) {
192 if (t&(1 << (15-i))) {
193 k = get_bits(bd, 16);
194 for (j = 0; j < 16; j++)
195 if (k&(1 << (15-j)))
196 symToByte[symTotal++] = (16*i)+j;
197 }
198 }
199 /* How many different Huffman coding groups does this block use? */
200 groupCount = get_bits(bd, 3);
201 if (groupCount < 2 || groupCount > MAX_GROUPS)
202 return RETVAL_DATA_ERROR;
203 /* nSelectors: Every GROUP_SIZE many symbols we select a new
204 Huffman coding group. Read in the group selector list,
205 which is stored as MTF encoded bit runs. (MTF = Move To
206 Front, as each value is used it's moved to the start of the
207 list.) */
208 nSelectors = get_bits(bd, 15);
209 if (!nSelectors)
210 return RETVAL_DATA_ERROR;
211 for (i = 0; i < groupCount; i++)
212 mtfSymbol[i] = i;
213 for (i = 0; i < nSelectors; i++) {
214 /* Get next value */
215 for (j = 0; get_bits(bd, 1); j++)
216 if (j >= groupCount)
217 return RETVAL_DATA_ERROR;
218 /* Decode MTF to get the next selector */
219 uc = mtfSymbol[j];
220 for (; j; j--)
221 mtfSymbol[j] = mtfSymbol[j-1];
222 mtfSymbol[0] = selectors[i] = uc;
223 }
224 /* Read the Huffman coding tables for each group, which code
225 for symTotal literal symbols, plus two run symbols (RUNA,
226 RUNB) */
227 symCount = symTotal+2;
228 for (j = 0; j < groupCount; j++) {
229 unsigned char length[MAX_SYMBOLS], temp[MAX_HUFCODE_BITS+1];
230 int minLen, maxLen, pp;
231 /* Read Huffman code lengths for each symbol. They're
232 stored in a way similar to mtf; record a starting
233 value for the first symbol, and an offset from the
234 previous value for everys symbol after that.
235 (Subtracting 1 before the loop and then adding it
236 back at the end is an optimization that makes the
237 test inside the loop simpler: symbol length 0
238 becomes negative, so an unsigned inequality catches
239 it.) */
240 t = get_bits(bd, 5)-1;
241 for (i = 0; i < symCount; i++) {
242 for (;;) {
243 if (((unsigned)t) > (MAX_HUFCODE_BITS-1))
244 return RETVAL_DATA_ERROR;
245
246 /* If first bit is 0, stop. Else
247 second bit indicates whether to
248 increment or decrement the value.
249 Optimization: grab 2 bits and unget
250 the second if the first was 0. */
251
252 k = get_bits(bd, 2);
253 if (k < 2) {
254 bd->inbufBitCount++;
255 break;
256 }
257 /* Add one if second bit 1, else
258 * subtract 1. Avoids if/else */
259 t += (((k+1)&2)-1);
260 }
261 /* Correct for the initial -1, to get the
262 * final symbol length */
263 length[i] = t+1;
264 }
265 /* Find largest and smallest lengths in this group */
266 minLen = maxLen = length[0];
267
268 for (i = 1; i < symCount; i++) {
269 if (length[i] > maxLen)
270 maxLen = length[i];
271 else if (length[i] < minLen)
272 minLen = length[i];
273 }
274
275 /* Calculate permute[], base[], and limit[] tables from
276 * length[].
277 *
278 * permute[] is the lookup table for converting
279 * Huffman coded symbols into decoded symbols. base[]
280 * is the amount to subtract from the value of a
281 * Huffman symbol of a given length when using
282 * permute[].
283 *
284 * limit[] indicates the largest numerical value a
285 * symbol with a given number of bits can have. This
286 * is how the Huffman codes can vary in length: each
287 * code with a value > limit[length] needs another
288 * bit.
289 */
290 hufGroup = bd->groups+j;
291 hufGroup->minLen = minLen;
292 hufGroup->maxLen = maxLen;
293 /* Note that minLen can't be smaller than 1, so we
294 adjust the base and limit array pointers so we're
295 not always wasting the first entry. We do this
296 again when using them (during symbol decoding).*/
297 base = hufGroup->base-1;
298 limit = hufGroup->limit-1;
299 /* Calculate permute[]. Concurently, initialize
300 * temp[] and limit[]. */
301 pp = 0;
302 for (i = minLen; i <= maxLen; i++) {
303 temp[i] = limit[i] = 0;
304 for (t = 0; t < symCount; t++)
305 if (length[t] == i)
306 hufGroup->permute[pp++] = t;
307 }
308 /* Count symbols coded for at each bit length */
309 for (i = 0; i < symCount; i++)
310 temp[length[i]]++;
311 /* Calculate limit[] (the largest symbol-coding value
312 *at each bit length, which is (previous limit <<
313 *1)+symbols at this level), and base[] (number of
314 *symbols to ignore at each bit length, which is limit
315 *minus the cumulative count of symbols coded for
316 *already). */
317 pp = t = 0;
318 for (i = minLen; i < maxLen; i++) {
319 pp += temp[i];
320 /* We read the largest possible symbol size
321 and then unget bits after determining how
322 many we need, and those extra bits could be
323 set to anything. (They're noise from
324 future symbols.) At each level we're
325 really only interested in the first few
326 bits, so here we set all the trailing
327 to-be-ignored bits to 1 so they don't
328 affect the value > limit[length]
329 comparison. */
330 limit[i] = (pp << (maxLen - i)) - 1;
331 pp <<= 1;
332 base[i+1] = pp-(t += temp[i]);
333 }
334 limit[maxLen+1] = INT_MAX; /* Sentinal value for
335 * reading next sym. */
336 limit[maxLen] = pp+temp[maxLen]-1;
337 base[minLen] = 0;
338 }
339 /* We've finished reading and digesting the block header. Now
340 read this block's Huffman coded symbols from the file and
341 undo the Huffman coding and run length encoding, saving the
342 result into dbuf[dbufCount++] = uc */
343
344 /* Initialize symbol occurrence counters and symbol Move To
345 * Front table */
346 for (i = 0; i < 256; i++) {
347 byteCount[i] = 0;
348 mtfSymbol[i] = (unsigned char)i;
349 }
350 /* Loop through compressed symbols. */
351 runPos = dbufCount = symCount = selector = 0;
352 for (;;) {
353 /* Determine which Huffman coding group to use. */
354 if (!(symCount--)) {
355 symCount = GROUP_SIZE-1;
356 if (selector >= nSelectors)
357 return RETVAL_DATA_ERROR;
358 hufGroup = bd->groups+selectors[selector++];
359 base = hufGroup->base-1;
360 limit = hufGroup->limit-1;
361 }
362 /* Read next Huffman-coded symbol. */
363 /* Note: It is far cheaper to read maxLen bits and
364 back up than it is to read minLen bits and then an
365 additional bit at a time, testing as we go.
366 Because there is a trailing last block (with file
367 CRC), there is no danger of the overread causing an
368 unexpected EOF for a valid compressed file. As a
369 further optimization, we do the read inline
370 (falling back to a call to get_bits if the buffer
371 runs dry). The following (up to got_huff_bits:) is
372 equivalent to j = get_bits(bd, hufGroup->maxLen);
373 */
374 while (bd->inbufBitCount < hufGroup->maxLen) {
375 if (bd->inbufPos == bd->inbufCount) {
376 j = get_bits(bd, hufGroup->maxLen);
377 goto got_huff_bits;
378 }
379 bd->inbufBits =
380 (bd->inbufBits << 8)|bd->inbuf[bd->inbufPos++];
381 bd->inbufBitCount += 8;
382 };
383 bd->inbufBitCount -= hufGroup->maxLen;
384 j = (bd->inbufBits >> bd->inbufBitCount)&
385 ((1 << hufGroup->maxLen)-1);
386got_huff_bits:
387 /* Figure how how many bits are in next symbol and
388 * unget extras */
389 i = hufGroup->minLen;
390 while (j > limit[i])
391 ++i;
392 bd->inbufBitCount += (hufGroup->maxLen - i);
393 /* Huffman decode value to get nextSym (with bounds checking) */
394 if ((i > hufGroup->maxLen)
395 || (((unsigned)(j = (j>>(hufGroup->maxLen-i))-base[i]))
396 >= MAX_SYMBOLS))
397 return RETVAL_DATA_ERROR;
398 nextSym = hufGroup->permute[j];
399 /* We have now decoded the symbol, which indicates
400 either a new literal byte, or a repeated run of the
401 most recent literal byte. First, check if nextSym
402 indicates a repeated run, and if so loop collecting
403 how many times to repeat the last literal. */
404 if (((unsigned)nextSym) <= SYMBOL_RUNB) { /* RUNA or RUNB */
405 /* If this is the start of a new run, zero out
406 * counter */
407 if (!runPos) {
408 runPos = 1;
409 t = 0;
410 }
411 /* Neat trick that saves 1 symbol: instead of
412 or-ing 0 or 1 at each bit position, add 1
413 or 2 instead. For example, 1011 is 1 << 0
414 + 1 << 1 + 2 << 2. 1010 is 2 << 0 + 2 << 1
415 + 1 << 2. You can make any bit pattern
416 that way using 1 less symbol than the basic
417 or 0/1 method (except all bits 0, which
418 would use no symbols, but a run of length 0
419 doesn't mean anything in this context).
420 Thus space is saved. */
421 t += (runPos << nextSym);
422 /* +runPos if RUNA; +2*runPos if RUNB */
423
424 runPos <<= 1;
425 continue;
426 }
427 /* When we hit the first non-run symbol after a run,
428 we now know how many times to repeat the last
429 literal, so append that many copies to our buffer
430 of decoded symbols (dbuf) now. (The last literal
431 used is the one at the head of the mtfSymbol
432 array.) */
433 if (runPos) {
434 runPos = 0;
435 if (dbufCount+t >= dbufSize)
436 return RETVAL_DATA_ERROR;
437
438 uc = symToByte[mtfSymbol[0]];
439 byteCount[uc] += t;
440 while (t--)
441 dbuf[dbufCount++] = uc;
442 }
443 /* Is this the terminating symbol? */
444 if (nextSym > symTotal)
445 break;
446 /* At this point, nextSym indicates a new literal
447 character. Subtract one to get the position in the
448 MTF array at which this literal is currently to be
449 found. (Note that the result can't be -1 or 0,
450 because 0 and 1 are RUNA and RUNB. But another
451 instance of the first symbol in the mtf array,
452 position 0, would have been handled as part of a
453 run above. Therefore 1 unused mtf position minus 2
454 non-literal nextSym values equals -1.) */
455 if (dbufCount >= dbufSize)
456 return RETVAL_DATA_ERROR;
457 i = nextSym - 1;
458 uc = mtfSymbol[i];
459 /* Adjust the MTF array. Since we typically expect to
460 *move only a small number of symbols, and are bound
461 *by 256 in any case, using memmove here would
462 *typically be bigger and slower due to function call
463 *overhead and other assorted setup costs. */
464 do {
465 mtfSymbol[i] = mtfSymbol[i-1];
466 } while (--i);
467 mtfSymbol[0] = uc;
468 uc = symToByte[uc];
469 /* We have our literal byte. Save it into dbuf. */
470 byteCount[uc]++;
471 dbuf[dbufCount++] = (unsigned int)uc;
472 }
473 /* At this point, we've read all the Huffman-coded symbols
474 (and repeated runs) for this block from the input stream,
475 and decoded them into the intermediate buffer. There are
476 dbufCount many decoded bytes in dbuf[]. Now undo the
477 Burrows-Wheeler transform on dbuf. See
478 http://dogma.net/markn/articles/bwt/bwt.htm
479 */
480 /* Turn byteCount into cumulative occurrence counts of 0 to n-1. */
481 j = 0;
482 for (i = 0; i < 256; i++) {
483 k = j+byteCount[i];
484 byteCount[i] = j;
485 j = k;
486 }
487 /* Figure out what order dbuf would be in if we sorted it. */
488 for (i = 0; i < dbufCount; i++) {
489 uc = (unsigned char)(dbuf[i] & 0xff);
490 dbuf[byteCount[uc]] |= (i << 8);
491 byteCount[uc]++;
492 }
493 /* Decode first byte by hand to initialize "previous" byte.
494 Note that it doesn't get output, and if the first three
495 characters are identical it doesn't qualify as a run (hence
496 writeRunCountdown = 5). */
497 if (dbufCount) {
498 if (origPtr >= dbufCount)
499 return RETVAL_DATA_ERROR;
500 bd->writePos = dbuf[origPtr];
501 bd->writeCurrent = (unsigned char)(bd->writePos&0xff);
502 bd->writePos >>= 8;
503 bd->writeRunCountdown = 5;
504 }
505 bd->writeCount = dbufCount;
506
507 return RETVAL_OK;
508}
509
510/* Undo burrows-wheeler transform on intermediate buffer to produce output.
511 If start_bunzip was initialized with out_fd =-1, then up to len bytes of
512 data are written to outbuf. Return value is number of bytes written or
513 error (all errors are negative numbers). If out_fd!=-1, outbuf and len
514 are ignored, data is written to out_fd and return is RETVAL_OK or error.
515*/
516
517static int INIT read_bunzip(struct bunzip_data *bd, char *outbuf, int len)
518{
519 const unsigned int *dbuf;
520 int pos, xcurrent, previous, gotcount;
521
522 /* If last read was short due to end of file, return last block now */
523 if (bd->writeCount < 0)
524 return bd->writeCount;
525
526 gotcount = 0;
527 dbuf = bd->dbuf;
528 pos = bd->writePos;
529 xcurrent = bd->writeCurrent;
530
531 /* We will always have pending decoded data to write into the output
532 buffer unless this is the very first call (in which case we haven't
533 Huffman-decoded a block into the intermediate buffer yet). */
534
535 if (bd->writeCopies) {
536 /* Inside the loop, writeCopies means extra copies (beyond 1) */
537 --bd->writeCopies;
538 /* Loop outputting bytes */
539 for (;;) {
540 /* If the output buffer is full, snapshot
541 * state and return */
542 if (gotcount >= len) {
543 bd->writePos = pos;
544 bd->writeCurrent = xcurrent;
545 bd->writeCopies++;
546 return len;
547 }
548 /* Write next byte into output buffer, updating CRC */
549 outbuf[gotcount++] = xcurrent;
550 bd->writeCRC = (((bd->writeCRC) << 8)
551 ^bd->crc32Table[((bd->writeCRC) >> 24)
552 ^xcurrent]);
553 /* Loop now if we're outputting multiple
554 * copies of this byte */
555 if (bd->writeCopies) {
556 --bd->writeCopies;
557 continue;
558 }
559decode_next_byte:
560 if (!bd->writeCount--)
561 break;
562 /* Follow sequence vector to undo
563 * Burrows-Wheeler transform */
564 previous = xcurrent;
565 pos = dbuf[pos];
566 xcurrent = pos&0xff;
567 pos >>= 8;
568 /* After 3 consecutive copies of the same
569 byte, the 4th is a repeat count. We count
570 down from 4 instead *of counting up because
571 testing for non-zero is faster */
572 if (--bd->writeRunCountdown) {
573 if (xcurrent != previous)
574 bd->writeRunCountdown = 4;
575 } else {
576 /* We have a repeated run, this byte
577 * indicates the count */
578 bd->writeCopies = xcurrent;
579 xcurrent = previous;
580 bd->writeRunCountdown = 5;
581 /* Sometimes there are just 3 bytes
582 * (run length 0) */
583 if (!bd->writeCopies)
584 goto decode_next_byte;
585 /* Subtract the 1 copy we'd output
586 * anyway to get extras */
587 --bd->writeCopies;
588 }
589 }
590 /* Decompression of this block completed successfully */
591 bd->writeCRC = ~bd->writeCRC;
592 bd->totalCRC = ((bd->totalCRC << 1) |
593 (bd->totalCRC >> 31)) ^ bd->writeCRC;
594 /* If this block had a CRC error, force file level CRC error. */
595 if (bd->writeCRC != bd->headerCRC) {
596 bd->totalCRC = bd->headerCRC+1;
597 return RETVAL_LAST_BLOCK;
598 }
599 }
600
601 /* Refill the intermediate buffer by Huffman-decoding next
602 * block of input */
603 /* (previous is just a convenient unused temp variable here) */
604 previous = get_next_block(bd);
605 if (previous) {
606 bd->writeCount = previous;
607 return (previous != RETVAL_LAST_BLOCK) ? previous : gotcount;
608 }
609 bd->writeCRC = 0xffffffffUL;
610 pos = bd->writePos;
611 xcurrent = bd->writeCurrent;
612 goto decode_next_byte;
613}
614
615static int INIT nofill(void *buf, unsigned int len)
616{
617 return -1;
618}
619
620/* Allocate the structure, read file header. If in_fd ==-1, inbuf must contain
621 a complete bunzip file (len bytes long). If in_fd!=-1, inbuf and len are
622 ignored, and data is read from file handle into temporary buffer. */
623static int INIT start_bunzip(struct bunzip_data **bdp, void *inbuf, int len,
624 int (*fill)(void*, unsigned int))
625{
626 struct bunzip_data *bd;
627 unsigned int i, j, c;
628 const unsigned int BZh0 =
629 (((unsigned int)'B') << 24)+(((unsigned int)'Z') << 16)
630 +(((unsigned int)'h') << 8)+(unsigned int)'0';
631
632 /* Figure out how much data to allocate */
633 i = sizeof(struct bunzip_data);
634
635 /* Allocate bunzip_data. Most fields initialize to zero. */
636 bd = *bdp = malloc(i);
637 memset(bd, 0, sizeof(struct bunzip_data));
638 /* Setup input buffer */
639 bd->inbuf = inbuf;
640 bd->inbufCount = len;
641 if (fill != NULL)
642 bd->fill = fill;
643 else
644 bd->fill = nofill;
645
646 /* Init the CRC32 table (big endian) */
647 for (i = 0; i < 256; i++) {
648 c = i << 24;
649 for (j = 8; j; j--)
650 c = c&0x80000000 ? (c << 1)^0x04c11db7 : (c << 1);
651 bd->crc32Table[i] = c;
652 }
653
654 /* Ensure that file starts with "BZh['1'-'9']." */
655 i = get_bits(bd, 32);
656 if (((unsigned int)(i-BZh0-1)) >= 9)
657 return RETVAL_NOT_BZIP_DATA;
658
659 /* Fourth byte (ascii '1'-'9'), indicates block size in units of 100k of
660 uncompressed data. Allocate intermediate buffer for block. */
661 bd->dbufSize = 100000*(i-BZh0);
662
663 bd->dbuf = large_malloc(bd->dbufSize * sizeof(int));
664 return RETVAL_OK;
665}
666
667/* Example usage: decompress src_fd to dst_fd. (Stops at end of bzip2 data,
668 not end of file.) */
669STATIC int INIT bunzip2(unsigned char *buf, int len,
670 int(*fill)(void*, unsigned int),
671 int(*flush)(void*, unsigned int),
672 unsigned char *outbuf,
673 int *pos,
674 void(*error_fn)(char *x))
675{
676 struct bunzip_data *bd;
677 int i = -1;
678 unsigned char *inbuf;
679
680 set_error_fn(error_fn);
681 if (flush)
682 outbuf = malloc(BZIP2_IOBUF_SIZE);
683 else
684 len -= 4; /* Uncompressed size hack active in pre-boot
685 environment */
686 if (!outbuf) {
687 error("Could not allocate output bufer");
688 return -1;
689 }
690 if (buf)
691 inbuf = buf;
692 else
693 inbuf = malloc(BZIP2_IOBUF_SIZE);
694 if (!inbuf) {
695 error("Could not allocate input bufer");
696 goto exit_0;
697 }
698 i = start_bunzip(&bd, inbuf, len, fill);
699 if (!i) {
700 for (;;) {
701 i = read_bunzip(bd, outbuf, BZIP2_IOBUF_SIZE);
702 if (i <= 0)
703 break;
704 if (!flush)
705 outbuf += i;
706 else
707 if (i != flush(outbuf, i)) {
708 i = RETVAL_UNEXPECTED_OUTPUT_EOF;
709 break;
710 }
711 }
712 }
713 /* Check CRC and release memory */
714 if (i == RETVAL_LAST_BLOCK) {
715 if (bd->headerCRC != bd->totalCRC)
716 error("Data integrity error when decompressing.");
717 else
718 i = RETVAL_OK;
719 } else if (i == RETVAL_UNEXPECTED_OUTPUT_EOF) {
720 error("Compressed file ends unexpectedly");
721 }
722 if (bd->dbuf)
723 large_free(bd->dbuf);
724 if (pos)
725 *pos = bd->inbufPos;
726 free(bd);
727 if (!buf)
728 free(inbuf);
729exit_0:
730 if (flush)
731 free(outbuf);
732 return i;
733}
734
735#define decompress bunzip2
diff --git a/lib/decompress_inflate.c b/lib/decompress_inflate.c
new file mode 100644
index 000000000000..839a329b4fc4
--- /dev/null
+++ b/lib/decompress_inflate.c
@@ -0,0 +1,167 @@
1#ifdef STATIC
2/* Pre-boot environment: included */
3
4/* prevent inclusion of _LINUX_KERNEL_H in pre-boot environment: lots
5 * errors about console_printk etc... on ARM */
6#define _LINUX_KERNEL_H
7
8#include "zlib_inflate/inftrees.c"
9#include "zlib_inflate/inffast.c"
10#include "zlib_inflate/inflate.c"
11
12#else /* STATIC */
13/* initramfs et al: linked */
14
15#include <linux/zutil.h>
16
17#include "zlib_inflate/inftrees.h"
18#include "zlib_inflate/inffast.h"
19#include "zlib_inflate/inflate.h"
20
21#include "zlib_inflate/infutil.h"
22
23#endif /* STATIC */
24
25#include <linux/decompress/mm.h>
26
27#define INBUF_LEN (16*1024)
28
29/* Included from initramfs et al code */
30STATIC int INIT gunzip(unsigned char *buf, int len,
31 int(*fill)(void*, unsigned int),
32 int(*flush)(void*, unsigned int),
33 unsigned char *out_buf,
34 int *pos,
35 void(*error_fn)(char *x)) {
36 u8 *zbuf;
37 struct z_stream_s *strm;
38 int rc;
39 size_t out_len;
40
41 set_error_fn(error_fn);
42 rc = -1;
43 if (flush) {
44 out_len = 0x8000; /* 32 K */
45 out_buf = malloc(out_len);
46 } else {
47 out_len = 0x7fffffff; /* no limit */
48 }
49 if (!out_buf) {
50 error("Out of memory while allocating output buffer");
51 goto gunzip_nomem1;
52 }
53
54 if (buf)
55 zbuf = buf;
56 else {
57 zbuf = malloc(INBUF_LEN);
58 len = 0;
59 }
60 if (!zbuf) {
61 error("Out of memory while allocating input buffer");
62 goto gunzip_nomem2;
63 }
64
65 strm = malloc(sizeof(*strm));
66 if (strm == NULL) {
67 error("Out of memory while allocating z_stream");
68 goto gunzip_nomem3;
69 }
70
71 strm->workspace = malloc(flush ? zlib_inflate_workspacesize() :
72 sizeof(struct inflate_state));
73 if (strm->workspace == NULL) {
74 error("Out of memory while allocating workspace");
75 goto gunzip_nomem4;
76 }
77
78 if (len == 0)
79 len = fill(zbuf, INBUF_LEN);
80
81 /* verify the gzip header */
82 if (len < 10 ||
83 zbuf[0] != 0x1f || zbuf[1] != 0x8b || zbuf[2] != 0x08) {
84 if (pos)
85 *pos = 0;
86 error("Not a gzip file");
87 goto gunzip_5;
88 }
89
90 /* skip over gzip header (1f,8b,08... 10 bytes total +
91 * possible asciz filename)
92 */
93 strm->next_in = zbuf + 10;
94 /* skip over asciz filename */
95 if (zbuf[3] & 0x8) {
96 while (strm->next_in[0])
97 strm->next_in++;
98 strm->next_in++;
99 }
100 strm->avail_in = len - (strm->next_in - zbuf);
101
102 strm->next_out = out_buf;
103 strm->avail_out = out_len;
104
105 rc = zlib_inflateInit2(strm, -MAX_WBITS);
106
107 if (!flush) {
108 WS(strm)->inflate_state.wsize = 0;
109 WS(strm)->inflate_state.window = NULL;
110 }
111
112 while (rc == Z_OK) {
113 if (strm->avail_in == 0) {
114 /* TODO: handle case where both pos and fill are set */
115 len = fill(zbuf, INBUF_LEN);
116 if (len < 0) {
117 rc = -1;
118 error("read error");
119 break;
120 }
121 strm->next_in = zbuf;
122 strm->avail_in = len;
123 }
124 rc = zlib_inflate(strm, 0);
125
126 /* Write any data generated */
127 if (flush && strm->next_out > out_buf) {
128 int l = strm->next_out - out_buf;
129 if (l != flush(out_buf, l)) {
130 rc = -1;
131 error("write error");
132 break;
133 }
134 strm->next_out = out_buf;
135 strm->avail_out = out_len;
136 }
137
138 /* after Z_FINISH, only Z_STREAM_END is "we unpacked it all" */
139 if (rc == Z_STREAM_END) {
140 rc = 0;
141 break;
142 } else if (rc != Z_OK) {
143 error("uncompression error");
144 rc = -1;
145 }
146 }
147
148 zlib_inflateEnd(strm);
149 if (pos)
150 /* add + 8 to skip over trailer */
151 *pos = strm->next_in - zbuf+8;
152
153gunzip_5:
154 free(strm->workspace);
155gunzip_nomem4:
156 free(strm);
157gunzip_nomem3:
158 if (!buf)
159 free(zbuf);
160gunzip_nomem2:
161 if (flush)
162 free(out_buf);
163gunzip_nomem1:
164 return rc; /* returns Z_OK (0) if successful */
165}
166
167#define decompress gunzip
diff --git a/lib/decompress_unlzma.c b/lib/decompress_unlzma.c
new file mode 100644
index 000000000000..546f2f4c157e
--- /dev/null
+++ b/lib/decompress_unlzma.c
@@ -0,0 +1,647 @@
1/* Lzma decompressor for Linux kernel. Shamelessly snarfed
2 *from busybox 1.1.1
3 *
4 *Linux kernel adaptation
5 *Copyright (C) 2006 Alain < alain@knaff.lu >
6 *
7 *Based on small lzma deflate implementation/Small range coder
8 *implementation for lzma.
9 *Copyright (C) 2006 Aurelien Jacobs < aurel@gnuage.org >
10 *
11 *Based on LzmaDecode.c from the LZMA SDK 4.22 (http://www.7-zip.org/)
12 *Copyright (C) 1999-2005 Igor Pavlov
13 *
14 *Copyrights of the parts, see headers below.
15 *
16 *
17 *This program is free software; you can redistribute it and/or
18 *modify it under the terms of the GNU Lesser General Public
19 *License as published by the Free Software Foundation; either
20 *version 2.1 of the License, or (at your option) any later version.
21 *
22 *This program is distributed in the hope that it will be useful,
23 *but WITHOUT ANY WARRANTY; without even the implied warranty of
24 *MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
25 *Lesser General Public License for more details.
26 *
27 *You should have received a copy of the GNU Lesser General Public
28 *License along with this library; if not, write to the Free Software
29 *Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 */
31
32#ifndef STATIC
33#include <linux/decompress/unlzma.h>
34#endif /* STATIC */
35
36#include <linux/decompress/mm.h>
37
38#define MIN(a, b) (((a) < (b)) ? (a) : (b))
39
40static long long INIT read_int(unsigned char *ptr, int size)
41{
42 int i;
43 long long ret = 0;
44
45 for (i = 0; i < size; i++)
46 ret = (ret << 8) | ptr[size-i-1];
47 return ret;
48}
49
50#define ENDIAN_CONVERT(x) \
51 x = (typeof(x))read_int((unsigned char *)&x, sizeof(x))
52
53
54/* Small range coder implementation for lzma.
55 *Copyright (C) 2006 Aurelien Jacobs < aurel@gnuage.org >
56 *
57 *Based on LzmaDecode.c from the LZMA SDK 4.22 (http://www.7-zip.org/)
58 *Copyright (c) 1999-2005 Igor Pavlov
59 */
60
61#include <linux/compiler.h>
62
63#define LZMA_IOBUF_SIZE 0x10000
64
65struct rc {
66 int (*fill)(void*, unsigned int);
67 uint8_t *ptr;
68 uint8_t *buffer;
69 uint8_t *buffer_end;
70 int buffer_size;
71 uint32_t code;
72 uint32_t range;
73 uint32_t bound;
74};
75
76
77#define RC_TOP_BITS 24
78#define RC_MOVE_BITS 5
79#define RC_MODEL_TOTAL_BITS 11
80
81
82/* Called twice: once at startup and once in rc_normalize() */
83static void INIT rc_read(struct rc *rc)
84{
85 rc->buffer_size = rc->fill((char *)rc->buffer, LZMA_IOBUF_SIZE);
86 if (rc->buffer_size <= 0)
87 error("unexpected EOF");
88 rc->ptr = rc->buffer;
89 rc->buffer_end = rc->buffer + rc->buffer_size;
90}
91
92/* Called once */
93static inline void INIT rc_init(struct rc *rc,
94 int (*fill)(void*, unsigned int),
95 char *buffer, int buffer_size)
96{
97 rc->fill = fill;
98 rc->buffer = (uint8_t *)buffer;
99 rc->buffer_size = buffer_size;
100 rc->buffer_end = rc->buffer + rc->buffer_size;
101 rc->ptr = rc->buffer;
102
103 rc->code = 0;
104 rc->range = 0xFFFFFFFF;
105}
106
107static inline void INIT rc_init_code(struct rc *rc)
108{
109 int i;
110
111 for (i = 0; i < 5; i++) {
112 if (rc->ptr >= rc->buffer_end)
113 rc_read(rc);
114 rc->code = (rc->code << 8) | *rc->ptr++;
115 }
116}
117
118
119/* Called once. TODO: bb_maybe_free() */
120static inline void INIT rc_free(struct rc *rc)
121{
122 free(rc->buffer);
123}
124
125/* Called twice, but one callsite is in inline'd rc_is_bit_0_helper() */
126static void INIT rc_do_normalize(struct rc *rc)
127{
128 if (rc->ptr >= rc->buffer_end)
129 rc_read(rc);
130 rc->range <<= 8;
131 rc->code = (rc->code << 8) | *rc->ptr++;
132}
133static inline void INIT rc_normalize(struct rc *rc)
134{
135 if (rc->range < (1 << RC_TOP_BITS))
136 rc_do_normalize(rc);
137}
138
139/* Called 9 times */
140/* Why rc_is_bit_0_helper exists?
141 *Because we want to always expose (rc->code < rc->bound) to optimizer
142 */
143static inline uint32_t INIT rc_is_bit_0_helper(struct rc *rc, uint16_t *p)
144{
145 rc_normalize(rc);
146 rc->bound = *p * (rc->range >> RC_MODEL_TOTAL_BITS);
147 return rc->bound;
148}
149static inline int INIT rc_is_bit_0(struct rc *rc, uint16_t *p)
150{
151 uint32_t t = rc_is_bit_0_helper(rc, p);
152 return rc->code < t;
153}
154
155/* Called ~10 times, but very small, thus inlined */
156static inline void INIT rc_update_bit_0(struct rc *rc, uint16_t *p)
157{
158 rc->range = rc->bound;
159 *p += ((1 << RC_MODEL_TOTAL_BITS) - *p) >> RC_MOVE_BITS;
160}
161static inline void rc_update_bit_1(struct rc *rc, uint16_t *p)
162{
163 rc->range -= rc->bound;
164 rc->code -= rc->bound;
165 *p -= *p >> RC_MOVE_BITS;
166}
167
168/* Called 4 times in unlzma loop */
169static int INIT rc_get_bit(struct rc *rc, uint16_t *p, int *symbol)
170{
171 if (rc_is_bit_0(rc, p)) {
172 rc_update_bit_0(rc, p);
173 *symbol *= 2;
174 return 0;
175 } else {
176 rc_update_bit_1(rc, p);
177 *symbol = *symbol * 2 + 1;
178 return 1;
179 }
180}
181
182/* Called once */
183static inline int INIT rc_direct_bit(struct rc *rc)
184{
185 rc_normalize(rc);
186 rc->range >>= 1;
187 if (rc->code >= rc->range) {
188 rc->code -= rc->range;
189 return 1;
190 }
191 return 0;
192}
193
194/* Called twice */
195static inline void INIT
196rc_bit_tree_decode(struct rc *rc, uint16_t *p, int num_levels, int *symbol)
197{
198 int i = num_levels;
199
200 *symbol = 1;
201 while (i--)
202 rc_get_bit(rc, p + *symbol, symbol);
203 *symbol -= 1 << num_levels;
204}
205
206
207/*
208 * Small lzma deflate implementation.
209 * Copyright (C) 2006 Aurelien Jacobs < aurel@gnuage.org >
210 *
211 * Based on LzmaDecode.c from the LZMA SDK 4.22 (http://www.7-zip.org/)
212 * Copyright (C) 1999-2005 Igor Pavlov
213 */
214
215
216struct lzma_header {
217 uint8_t pos;
218 uint32_t dict_size;
219 uint64_t dst_size;
220} __attribute__ ((packed)) ;
221
222
223#define LZMA_BASE_SIZE 1846
224#define LZMA_LIT_SIZE 768
225
226#define LZMA_NUM_POS_BITS_MAX 4
227
228#define LZMA_LEN_NUM_LOW_BITS 3
229#define LZMA_LEN_NUM_MID_BITS 3
230#define LZMA_LEN_NUM_HIGH_BITS 8
231
232#define LZMA_LEN_CHOICE 0
233#define LZMA_LEN_CHOICE_2 (LZMA_LEN_CHOICE + 1)
234#define LZMA_LEN_LOW (LZMA_LEN_CHOICE_2 + 1)
235#define LZMA_LEN_MID (LZMA_LEN_LOW \
236 + (1 << (LZMA_NUM_POS_BITS_MAX + LZMA_LEN_NUM_LOW_BITS)))
237#define LZMA_LEN_HIGH (LZMA_LEN_MID \
238 +(1 << (LZMA_NUM_POS_BITS_MAX + LZMA_LEN_NUM_MID_BITS)))
239#define LZMA_NUM_LEN_PROBS (LZMA_LEN_HIGH + (1 << LZMA_LEN_NUM_HIGH_BITS))
240
241#define LZMA_NUM_STATES 12
242#define LZMA_NUM_LIT_STATES 7
243
244#define LZMA_START_POS_MODEL_INDEX 4
245#define LZMA_END_POS_MODEL_INDEX 14
246#define LZMA_NUM_FULL_DISTANCES (1 << (LZMA_END_POS_MODEL_INDEX >> 1))
247
248#define LZMA_NUM_POS_SLOT_BITS 6
249#define LZMA_NUM_LEN_TO_POS_STATES 4
250
251#define LZMA_NUM_ALIGN_BITS 4
252
253#define LZMA_MATCH_MIN_LEN 2
254
255#define LZMA_IS_MATCH 0
256#define LZMA_IS_REP (LZMA_IS_MATCH + (LZMA_NUM_STATES << LZMA_NUM_POS_BITS_MAX))
257#define LZMA_IS_REP_G0 (LZMA_IS_REP + LZMA_NUM_STATES)
258#define LZMA_IS_REP_G1 (LZMA_IS_REP_G0 + LZMA_NUM_STATES)
259#define LZMA_IS_REP_G2 (LZMA_IS_REP_G1 + LZMA_NUM_STATES)
260#define LZMA_IS_REP_0_LONG (LZMA_IS_REP_G2 + LZMA_NUM_STATES)
261#define LZMA_POS_SLOT (LZMA_IS_REP_0_LONG \
262 + (LZMA_NUM_STATES << LZMA_NUM_POS_BITS_MAX))
263#define LZMA_SPEC_POS (LZMA_POS_SLOT \
264 +(LZMA_NUM_LEN_TO_POS_STATES << LZMA_NUM_POS_SLOT_BITS))
265#define LZMA_ALIGN (LZMA_SPEC_POS \
266 + LZMA_NUM_FULL_DISTANCES - LZMA_END_POS_MODEL_INDEX)
267#define LZMA_LEN_CODER (LZMA_ALIGN + (1 << LZMA_NUM_ALIGN_BITS))
268#define LZMA_REP_LEN_CODER (LZMA_LEN_CODER + LZMA_NUM_LEN_PROBS)
269#define LZMA_LITERAL (LZMA_REP_LEN_CODER + LZMA_NUM_LEN_PROBS)
270
271
272struct writer {
273 uint8_t *buffer;
274 uint8_t previous_byte;
275 size_t buffer_pos;
276 int bufsize;
277 size_t global_pos;
278 int(*flush)(void*, unsigned int);
279 struct lzma_header *header;
280};
281
282struct cstate {
283 int state;
284 uint32_t rep0, rep1, rep2, rep3;
285};
286
287static inline size_t INIT get_pos(struct writer *wr)
288{
289 return
290 wr->global_pos + wr->buffer_pos;
291}
292
293static inline uint8_t INIT peek_old_byte(struct writer *wr,
294 uint32_t offs)
295{
296 if (!wr->flush) {
297 int32_t pos;
298 while (offs > wr->header->dict_size)
299 offs -= wr->header->dict_size;
300 pos = wr->buffer_pos - offs;
301 return wr->buffer[pos];
302 } else {
303 uint32_t pos = wr->buffer_pos - offs;
304 while (pos >= wr->header->dict_size)
305 pos += wr->header->dict_size;
306 return wr->buffer[pos];
307 }
308
309}
310
311static inline void INIT write_byte(struct writer *wr, uint8_t byte)
312{
313 wr->buffer[wr->buffer_pos++] = wr->previous_byte = byte;
314 if (wr->flush && wr->buffer_pos == wr->header->dict_size) {
315 wr->buffer_pos = 0;
316 wr->global_pos += wr->header->dict_size;
317 wr->flush((char *)wr->buffer, wr->header->dict_size);
318 }
319}
320
321
322static inline void INIT copy_byte(struct writer *wr, uint32_t offs)
323{
324 write_byte(wr, peek_old_byte(wr, offs));
325}
326
327static inline void INIT copy_bytes(struct writer *wr,
328 uint32_t rep0, int len)
329{
330 do {
331 copy_byte(wr, rep0);
332 len--;
333 } while (len != 0 && wr->buffer_pos < wr->header->dst_size);
334}
335
336static inline void INIT process_bit0(struct writer *wr, struct rc *rc,
337 struct cstate *cst, uint16_t *p,
338 int pos_state, uint16_t *prob,
339 int lc, uint32_t literal_pos_mask) {
340 int mi = 1;
341 rc_update_bit_0(rc, prob);
342 prob = (p + LZMA_LITERAL +
343 (LZMA_LIT_SIZE
344 * (((get_pos(wr) & literal_pos_mask) << lc)
345 + (wr->previous_byte >> (8 - lc))))
346 );
347
348 if (cst->state >= LZMA_NUM_LIT_STATES) {
349 int match_byte = peek_old_byte(wr, cst->rep0);
350 do {
351 int bit;
352 uint16_t *prob_lit;
353
354 match_byte <<= 1;
355 bit = match_byte & 0x100;
356 prob_lit = prob + 0x100 + bit + mi;
357 if (rc_get_bit(rc, prob_lit, &mi)) {
358 if (!bit)
359 break;
360 } else {
361 if (bit)
362 break;
363 }
364 } while (mi < 0x100);
365 }
366 while (mi < 0x100) {
367 uint16_t *prob_lit = prob + mi;
368 rc_get_bit(rc, prob_lit, &mi);
369 }
370 write_byte(wr, mi);
371 if (cst->state < 4)
372 cst->state = 0;
373 else if (cst->state < 10)
374 cst->state -= 3;
375 else
376 cst->state -= 6;
377}
378
379static inline void INIT process_bit1(struct writer *wr, struct rc *rc,
380 struct cstate *cst, uint16_t *p,
381 int pos_state, uint16_t *prob) {
382 int offset;
383 uint16_t *prob_len;
384 int num_bits;
385 int len;
386
387 rc_update_bit_1(rc, prob);
388 prob = p + LZMA_IS_REP + cst->state;
389 if (rc_is_bit_0(rc, prob)) {
390 rc_update_bit_0(rc, prob);
391 cst->rep3 = cst->rep2;
392 cst->rep2 = cst->rep1;
393 cst->rep1 = cst->rep0;
394 cst->state = cst->state < LZMA_NUM_LIT_STATES ? 0 : 3;
395 prob = p + LZMA_LEN_CODER;
396 } else {
397 rc_update_bit_1(rc, prob);
398 prob = p + LZMA_IS_REP_G0 + cst->state;
399 if (rc_is_bit_0(rc, prob)) {
400 rc_update_bit_0(rc, prob);
401 prob = (p + LZMA_IS_REP_0_LONG
402 + (cst->state <<
403 LZMA_NUM_POS_BITS_MAX) +
404 pos_state);
405 if (rc_is_bit_0(rc, prob)) {
406 rc_update_bit_0(rc, prob);
407
408 cst->state = cst->state < LZMA_NUM_LIT_STATES ?
409 9 : 11;
410 copy_byte(wr, cst->rep0);
411 return;
412 } else {
413 rc_update_bit_1(rc, prob);
414 }
415 } else {
416 uint32_t distance;
417
418 rc_update_bit_1(rc, prob);
419 prob = p + LZMA_IS_REP_G1 + cst->state;
420 if (rc_is_bit_0(rc, prob)) {
421 rc_update_bit_0(rc, prob);
422 distance = cst->rep1;
423 } else {
424 rc_update_bit_1(rc, prob);
425 prob = p + LZMA_IS_REP_G2 + cst->state;
426 if (rc_is_bit_0(rc, prob)) {
427 rc_update_bit_0(rc, prob);
428 distance = cst->rep2;
429 } else {
430 rc_update_bit_1(rc, prob);
431 distance = cst->rep3;
432 cst->rep3 = cst->rep2;
433 }
434 cst->rep2 = cst->rep1;
435 }
436 cst->rep1 = cst->rep0;
437 cst->rep0 = distance;
438 }
439 cst->state = cst->state < LZMA_NUM_LIT_STATES ? 8 : 11;
440 prob = p + LZMA_REP_LEN_CODER;
441 }
442
443 prob_len = prob + LZMA_LEN_CHOICE;
444 if (rc_is_bit_0(rc, prob_len)) {
445 rc_update_bit_0(rc, prob_len);
446 prob_len = (prob + LZMA_LEN_LOW
447 + (pos_state <<
448 LZMA_LEN_NUM_LOW_BITS));
449 offset = 0;
450 num_bits = LZMA_LEN_NUM_LOW_BITS;
451 } else {
452 rc_update_bit_1(rc, prob_len);
453 prob_len = prob + LZMA_LEN_CHOICE_2;
454 if (rc_is_bit_0(rc, prob_len)) {
455 rc_update_bit_0(rc, prob_len);
456 prob_len = (prob + LZMA_LEN_MID
457 + (pos_state <<
458 LZMA_LEN_NUM_MID_BITS));
459 offset = 1 << LZMA_LEN_NUM_LOW_BITS;
460 num_bits = LZMA_LEN_NUM_MID_BITS;
461 } else {
462 rc_update_bit_1(rc, prob_len);
463 prob_len = prob + LZMA_LEN_HIGH;
464 offset = ((1 << LZMA_LEN_NUM_LOW_BITS)
465 + (1 << LZMA_LEN_NUM_MID_BITS));
466 num_bits = LZMA_LEN_NUM_HIGH_BITS;
467 }
468 }
469
470 rc_bit_tree_decode(rc, prob_len, num_bits, &len);
471 len += offset;
472
473 if (cst->state < 4) {
474 int pos_slot;
475
476 cst->state += LZMA_NUM_LIT_STATES;
477 prob =
478 p + LZMA_POS_SLOT +
479 ((len <
480 LZMA_NUM_LEN_TO_POS_STATES ? len :
481 LZMA_NUM_LEN_TO_POS_STATES - 1)
482 << LZMA_NUM_POS_SLOT_BITS);
483 rc_bit_tree_decode(rc, prob,
484 LZMA_NUM_POS_SLOT_BITS,
485 &pos_slot);
486 if (pos_slot >= LZMA_START_POS_MODEL_INDEX) {
487 int i, mi;
488 num_bits = (pos_slot >> 1) - 1;
489 cst->rep0 = 2 | (pos_slot & 1);
490 if (pos_slot < LZMA_END_POS_MODEL_INDEX) {
491 cst->rep0 <<= num_bits;
492 prob = p + LZMA_SPEC_POS +
493 cst->rep0 - pos_slot - 1;
494 } else {
495 num_bits -= LZMA_NUM_ALIGN_BITS;
496 while (num_bits--)
497 cst->rep0 = (cst->rep0 << 1) |
498 rc_direct_bit(rc);
499 prob = p + LZMA_ALIGN;
500 cst->rep0 <<= LZMA_NUM_ALIGN_BITS;
501 num_bits = LZMA_NUM_ALIGN_BITS;
502 }
503 i = 1;
504 mi = 1;
505 while (num_bits--) {
506 if (rc_get_bit(rc, prob + mi, &mi))
507 cst->rep0 |= i;
508 i <<= 1;
509 }
510 } else
511 cst->rep0 = pos_slot;
512 if (++(cst->rep0) == 0)
513 return;
514 }
515
516 len += LZMA_MATCH_MIN_LEN;
517
518 copy_bytes(wr, cst->rep0, len);
519}
520
521
522
523STATIC inline int INIT unlzma(unsigned char *buf, int in_len,
524 int(*fill)(void*, unsigned int),
525 int(*flush)(void*, unsigned int),
526 unsigned char *output,
527 int *posp,
528 void(*error_fn)(char *x)
529 )
530{
531 struct lzma_header header;
532 int lc, pb, lp;
533 uint32_t pos_state_mask;
534 uint32_t literal_pos_mask;
535 uint16_t *p;
536 int num_probs;
537 struct rc rc;
538 int i, mi;
539 struct writer wr;
540 struct cstate cst;
541 unsigned char *inbuf;
542 int ret = -1;
543
544 set_error_fn(error_fn);
545 if (!flush)
546 in_len -= 4; /* Uncompressed size hack active in pre-boot
547 environment */
548 if (buf)
549 inbuf = buf;
550 else
551 inbuf = malloc(LZMA_IOBUF_SIZE);
552 if (!inbuf) {
553 error("Could not allocate input bufer");
554 goto exit_0;
555 }
556
557 cst.state = 0;
558 cst.rep0 = cst.rep1 = cst.rep2 = cst.rep3 = 1;
559
560 wr.header = &header;
561 wr.flush = flush;
562 wr.global_pos = 0;
563 wr.previous_byte = 0;
564 wr.buffer_pos = 0;
565
566 rc_init(&rc, fill, inbuf, in_len);
567
568 for (i = 0; i < sizeof(header); i++) {
569 if (rc.ptr >= rc.buffer_end)
570 rc_read(&rc);
571 ((unsigned char *)&header)[i] = *rc.ptr++;
572 }
573
574 if (header.pos >= (9 * 5 * 5))
575 error("bad header");
576
577 mi = 0;
578 lc = header.pos;
579 while (lc >= 9) {
580 mi++;
581 lc -= 9;
582 }
583 pb = 0;
584 lp = mi;
585 while (lp >= 5) {
586 pb++;
587 lp -= 5;
588 }
589 pos_state_mask = (1 << pb) - 1;
590 literal_pos_mask = (1 << lp) - 1;
591
592 ENDIAN_CONVERT(header.dict_size);
593 ENDIAN_CONVERT(header.dst_size);
594
595 if (header.dict_size == 0)
596 header.dict_size = 1;
597
598 if (output)
599 wr.buffer = output;
600 else {
601 wr.bufsize = MIN(header.dst_size, header.dict_size);
602 wr.buffer = large_malloc(wr.bufsize);
603 }
604 if (wr.buffer == NULL)
605 goto exit_1;
606
607 num_probs = LZMA_BASE_SIZE + (LZMA_LIT_SIZE << (lc + lp));
608 p = (uint16_t *) large_malloc(num_probs * sizeof(*p));
609 if (p == 0)
610 goto exit_2;
611 num_probs = LZMA_LITERAL + (LZMA_LIT_SIZE << (lc + lp));
612 for (i = 0; i < num_probs; i++)
613 p[i] = (1 << RC_MODEL_TOTAL_BITS) >> 1;
614
615 rc_init_code(&rc);
616
617 while (get_pos(&wr) < header.dst_size) {
618 int pos_state = get_pos(&wr) & pos_state_mask;
619 uint16_t *prob = p + LZMA_IS_MATCH +
620 (cst.state << LZMA_NUM_POS_BITS_MAX) + pos_state;
621 if (rc_is_bit_0(&rc, prob))
622 process_bit0(&wr, &rc, &cst, p, pos_state, prob,
623 lc, literal_pos_mask);
624 else {
625 process_bit1(&wr, &rc, &cst, p, pos_state, prob);
626 if (cst.rep0 == 0)
627 break;
628 }
629 }
630
631 if (posp)
632 *posp = rc.ptr-rc.buffer;
633 if (wr.flush)
634 wr.flush(wr.buffer, wr.buffer_pos);
635 ret = 0;
636 large_free(p);
637exit_2:
638 if (!output)
639 large_free(wr.buffer);
640exit_1:
641 if (!buf)
642 free(inbuf);
643exit_0:
644 return ret;
645}
646
647#define decompress unlzma
diff --git a/lib/zlib_inflate/inflate.h b/lib/zlib_inflate/inflate.h
index df8a6c92052d..3d17b3d1b21f 100644
--- a/lib/zlib_inflate/inflate.h
+++ b/lib/zlib_inflate/inflate.h
@@ -1,3 +1,6 @@
1#ifndef INFLATE_H
2#define INFLATE_H
3
1/* inflate.h -- internal inflate state definition 4/* inflate.h -- internal inflate state definition
2 * Copyright (C) 1995-2004 Mark Adler 5 * Copyright (C) 1995-2004 Mark Adler
3 * For conditions of distribution and use, see copyright notice in zlib.h 6 * For conditions of distribution and use, see copyright notice in zlib.h
@@ -105,3 +108,4 @@ struct inflate_state {
105 unsigned short work[288]; /* work area for code table building */ 108 unsigned short work[288]; /* work area for code table building */
106 code codes[ENOUGH]; /* space for code tables */ 109 code codes[ENOUGH]; /* space for code tables */
107}; 110};
111#endif
diff --git a/lib/zlib_inflate/inftrees.h b/lib/zlib_inflate/inftrees.h
index 5f5219b1240e..b70b4731ac7a 100644
--- a/lib/zlib_inflate/inftrees.h
+++ b/lib/zlib_inflate/inftrees.h
@@ -1,3 +1,6 @@
1#ifndef INFTREES_H
2#define INFTREES_H
3
1/* inftrees.h -- header to use inftrees.c 4/* inftrees.h -- header to use inftrees.c
2 * Copyright (C) 1995-2005 Mark Adler 5 * Copyright (C) 1995-2005 Mark Adler
3 * For conditions of distribution and use, see copyright notice in zlib.h 6 * For conditions of distribution and use, see copyright notice in zlib.h
@@ -53,3 +56,4 @@ typedef enum {
53extern int zlib_inflate_table (codetype type, unsigned short *lens, 56extern int zlib_inflate_table (codetype type, unsigned short *lens,
54 unsigned codes, code **table, 57 unsigned codes, code **table,
55 unsigned *bits, unsigned short *work); 58 unsigned *bits, unsigned short *work);
59#endif
diff --git a/mm/Makefile b/mm/Makefile
index 72255be57f89..818569b68f46 100644
--- a/mm/Makefile
+++ b/mm/Makefile
@@ -30,6 +30,10 @@ obj-$(CONFIG_FAILSLAB) += failslab.o
30obj-$(CONFIG_MEMORY_HOTPLUG) += memory_hotplug.o 30obj-$(CONFIG_MEMORY_HOTPLUG) += memory_hotplug.o
31obj-$(CONFIG_FS_XIP) += filemap_xip.o 31obj-$(CONFIG_FS_XIP) += filemap_xip.o
32obj-$(CONFIG_MIGRATION) += migrate.o 32obj-$(CONFIG_MIGRATION) += migrate.o
33ifdef CONFIG_HAVE_DYNAMIC_PER_CPU_AREA
34obj-$(CONFIG_SMP) += percpu.o
35else
33obj-$(CONFIG_SMP) += allocpercpu.o 36obj-$(CONFIG_SMP) += allocpercpu.o
37endif
34obj-$(CONFIG_QUICKLIST) += quicklist.o 38obj-$(CONFIG_QUICKLIST) += quicklist.o
35obj-$(CONFIG_CGROUP_MEM_RES_CTLR) += memcontrol.o page_cgroup.o 39obj-$(CONFIG_CGROUP_MEM_RES_CTLR) += memcontrol.o page_cgroup.o
diff --git a/mm/allocpercpu.c b/mm/allocpercpu.c
index 4297bc41bfd2..1882923bc706 100644
--- a/mm/allocpercpu.c
+++ b/mm/allocpercpu.c
@@ -99,45 +99,51 @@ static int __percpu_populate_mask(void *__pdata, size_t size, gfp_t gfp,
99 __percpu_populate_mask((__pdata), (size), (gfp), &(mask)) 99 __percpu_populate_mask((__pdata), (size), (gfp), &(mask))
100 100
101/** 101/**
102 * percpu_alloc_mask - initial setup of per-cpu data 102 * alloc_percpu - initial setup of per-cpu data
103 * @size: size of per-cpu object 103 * @size: size of per-cpu object
104 * @gfp: may sleep or not etc. 104 * @align: alignment
105 * @mask: populate per-data for cpu's selected through mask bits
106 * 105 *
107 * Populating per-cpu data for all online cpu's would be a typical use case, 106 * Allocate dynamic percpu area. Percpu objects are populated with
108 * which is simplified by the percpu_alloc() wrapper. 107 * zeroed buffers.
109 * Per-cpu objects are populated with zeroed buffers.
110 */ 108 */
111void *__percpu_alloc_mask(size_t size, gfp_t gfp, cpumask_t *mask) 109void *__alloc_percpu(size_t size, size_t align)
112{ 110{
113 /* 111 /*
114 * We allocate whole cache lines to avoid false sharing 112 * We allocate whole cache lines to avoid false sharing
115 */ 113 */
116 size_t sz = roundup(nr_cpu_ids * sizeof(void *), cache_line_size()); 114 size_t sz = roundup(nr_cpu_ids * sizeof(void *), cache_line_size());
117 void *pdata = kzalloc(sz, gfp); 115 void *pdata = kzalloc(sz, GFP_KERNEL);
118 void *__pdata = __percpu_disguise(pdata); 116 void *__pdata = __percpu_disguise(pdata);
119 117
118 /*
119 * Can't easily make larger alignment work with kmalloc. WARN
120 * on it. Larger alignment should only be used for module
121 * percpu sections on SMP for which this path isn't used.
122 */
123 WARN_ON_ONCE(align > SMP_CACHE_BYTES);
124
120 if (unlikely(!pdata)) 125 if (unlikely(!pdata))
121 return NULL; 126 return NULL;
122 if (likely(!__percpu_populate_mask(__pdata, size, gfp, mask))) 127 if (likely(!__percpu_populate_mask(__pdata, size, GFP_KERNEL,
128 &cpu_possible_map)))
123 return __pdata; 129 return __pdata;
124 kfree(pdata); 130 kfree(pdata);
125 return NULL; 131 return NULL;
126} 132}
127EXPORT_SYMBOL_GPL(__percpu_alloc_mask); 133EXPORT_SYMBOL_GPL(__alloc_percpu);
128 134
129/** 135/**
130 * percpu_free - final cleanup of per-cpu data 136 * free_percpu - final cleanup of per-cpu data
131 * @__pdata: object to clean up 137 * @__pdata: object to clean up
132 * 138 *
133 * We simply clean up any per-cpu object left. No need for the client to 139 * We simply clean up any per-cpu object left. No need for the client to
134 * track and specify through a bis mask which per-cpu objects are to free. 140 * track and specify through a bis mask which per-cpu objects are to free.
135 */ 141 */
136void percpu_free(void *__pdata) 142void free_percpu(void *__pdata)
137{ 143{
138 if (unlikely(!__pdata)) 144 if (unlikely(!__pdata))
139 return; 145 return;
140 __percpu_depopulate_mask(__pdata, &cpu_possible_map); 146 __percpu_depopulate_mask(__pdata, &cpu_possible_map);
141 kfree(__percpu_disguise(__pdata)); 147 kfree(__percpu_disguise(__pdata));
142} 148}
143EXPORT_SYMBOL_GPL(percpu_free); 149EXPORT_SYMBOL_GPL(free_percpu);
diff --git a/mm/bootmem.c b/mm/bootmem.c
index 51a0ccf61e0e..daf92713f7de 100644
--- a/mm/bootmem.c
+++ b/mm/bootmem.c
@@ -382,7 +382,6 @@ int __init reserve_bootmem_node(pg_data_t *pgdat, unsigned long physaddr,
382 return mark_bootmem_node(pgdat->bdata, start, end, 1, flags); 382 return mark_bootmem_node(pgdat->bdata, start, end, 1, flags);
383} 383}
384 384
385#ifndef CONFIG_HAVE_ARCH_BOOTMEM_NODE
386/** 385/**
387 * reserve_bootmem - mark a page range as usable 386 * reserve_bootmem - mark a page range as usable
388 * @addr: starting address of the range 387 * @addr: starting address of the range
@@ -403,7 +402,6 @@ int __init reserve_bootmem(unsigned long addr, unsigned long size,
403 402
404 return mark_bootmem(start, end, 1, flags); 403 return mark_bootmem(start, end, 1, flags);
405} 404}
406#endif /* !CONFIG_HAVE_ARCH_BOOTMEM_NODE */
407 405
408static unsigned long align_idx(struct bootmem_data *bdata, unsigned long idx, 406static unsigned long align_idx(struct bootmem_data *bdata, unsigned long idx,
409 unsigned long step) 407 unsigned long step)
@@ -429,8 +427,8 @@ static unsigned long align_off(struct bootmem_data *bdata, unsigned long off,
429} 427}
430 428
431static void * __init alloc_bootmem_core(struct bootmem_data *bdata, 429static void * __init alloc_bootmem_core(struct bootmem_data *bdata,
432 unsigned long size, unsigned long align, 430 unsigned long size, unsigned long align,
433 unsigned long goal, unsigned long limit) 431 unsigned long goal, unsigned long limit)
434{ 432{
435 unsigned long fallback = 0; 433 unsigned long fallback = 0;
436 unsigned long min, max, start, sidx, midx, step; 434 unsigned long min, max, start, sidx, midx, step;
@@ -530,17 +528,34 @@ find_block:
530 return NULL; 528 return NULL;
531} 529}
532 530
531static void * __init alloc_arch_preferred_bootmem(bootmem_data_t *bdata,
532 unsigned long size, unsigned long align,
533 unsigned long goal, unsigned long limit)
534{
535#ifdef CONFIG_HAVE_ARCH_BOOTMEM
536 bootmem_data_t *p_bdata;
537
538 p_bdata = bootmem_arch_preferred_node(bdata, size, align, goal, limit);
539 if (p_bdata)
540 return alloc_bootmem_core(p_bdata, size, align, goal, limit);
541#endif
542 return NULL;
543}
544
533static void * __init ___alloc_bootmem_nopanic(unsigned long size, 545static void * __init ___alloc_bootmem_nopanic(unsigned long size,
534 unsigned long align, 546 unsigned long align,
535 unsigned long goal, 547 unsigned long goal,
536 unsigned long limit) 548 unsigned long limit)
537{ 549{
538 bootmem_data_t *bdata; 550 bootmem_data_t *bdata;
551 void *region;
539 552
540restart: 553restart:
541 list_for_each_entry(bdata, &bdata_list, list) { 554 region = alloc_arch_preferred_bootmem(NULL, size, align, goal, limit);
542 void *region; 555 if (region)
556 return region;
543 557
558 list_for_each_entry(bdata, &bdata_list, list) {
544 if (goal && bdata->node_low_pfn <= PFN_DOWN(goal)) 559 if (goal && bdata->node_low_pfn <= PFN_DOWN(goal))
545 continue; 560 continue;
546 if (limit && bdata->node_min_pfn >= PFN_DOWN(limit)) 561 if (limit && bdata->node_min_pfn >= PFN_DOWN(limit))
@@ -618,6 +633,10 @@ static void * __init ___alloc_bootmem_node(bootmem_data_t *bdata,
618{ 633{
619 void *ptr; 634 void *ptr;
620 635
636 ptr = alloc_arch_preferred_bootmem(bdata, size, align, goal, limit);
637 if (ptr)
638 return ptr;
639
621 ptr = alloc_bootmem_core(bdata, size, align, goal, limit); 640 ptr = alloc_bootmem_core(bdata, size, align, goal, limit);
622 if (ptr) 641 if (ptr)
623 return ptr; 642 return ptr;
@@ -674,6 +693,10 @@ void * __init __alloc_bootmem_node_nopanic(pg_data_t *pgdat, unsigned long size,
674{ 693{
675 void *ptr; 694 void *ptr;
676 695
696 ptr = alloc_arch_preferred_bootmem(pgdat->bdata, size, align, goal, 0);
697 if (ptr)
698 return ptr;
699
677 ptr = alloc_bootmem_core(pgdat->bdata, size, align, goal, 0); 700 ptr = alloc_bootmem_core(pgdat->bdata, size, align, goal, 0);
678 if (ptr) 701 if (ptr)
679 return ptr; 702 return ptr;
diff --git a/mm/filemap.c b/mm/filemap.c
index 23acefe51808..126d3973b3d1 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -1823,7 +1823,7 @@ static size_t __iovec_copy_from_user_inatomic(char *vaddr,
1823 int copy = min(bytes, iov->iov_len - base); 1823 int copy = min(bytes, iov->iov_len - base);
1824 1824
1825 base = 0; 1825 base = 0;
1826 left = __copy_from_user_inatomic_nocache(vaddr, buf, copy); 1826 left = __copy_from_user_inatomic(vaddr, buf, copy);
1827 copied += copy; 1827 copied += copy;
1828 bytes -= copy; 1828 bytes -= copy;
1829 vaddr += copy; 1829 vaddr += copy;
@@ -1851,8 +1851,7 @@ size_t iov_iter_copy_from_user_atomic(struct page *page,
1851 if (likely(i->nr_segs == 1)) { 1851 if (likely(i->nr_segs == 1)) {
1852 int left; 1852 int left;
1853 char __user *buf = i->iov->iov_base + i->iov_offset; 1853 char __user *buf = i->iov->iov_base + i->iov_offset;
1854 left = __copy_from_user_inatomic_nocache(kaddr + offset, 1854 left = __copy_from_user_inatomic(kaddr + offset, buf, bytes);
1855 buf, bytes);
1856 copied = bytes - left; 1855 copied = bytes - left;
1857 } else { 1856 } else {
1858 copied = __iovec_copy_from_user_inatomic(kaddr + offset, 1857 copied = __iovec_copy_from_user_inatomic(kaddr + offset,
@@ -1880,7 +1879,7 @@ size_t iov_iter_copy_from_user(struct page *page,
1880 if (likely(i->nr_segs == 1)) { 1879 if (likely(i->nr_segs == 1)) {
1881 int left; 1880 int left;
1882 char __user *buf = i->iov->iov_base + i->iov_offset; 1881 char __user *buf = i->iov->iov_base + i->iov_offset;
1883 left = __copy_from_user_nocache(kaddr + offset, buf, bytes); 1882 left = __copy_from_user(kaddr + offset, buf, bytes);
1884 copied = bytes - left; 1883 copied = bytes - left;
1885 } else { 1884 } else {
1886 copied = __iovec_copy_from_user_inatomic(kaddr + offset, 1885 copied = __iovec_copy_from_user_inatomic(kaddr + offset,
diff --git a/mm/percpu.c b/mm/percpu.c
new file mode 100644
index 000000000000..1aa5d8fbca12
--- /dev/null
+++ b/mm/percpu.c
@@ -0,0 +1,1326 @@
1/*
2 * linux/mm/percpu.c - percpu memory allocator
3 *
4 * Copyright (C) 2009 SUSE Linux Products GmbH
5 * Copyright (C) 2009 Tejun Heo <tj@kernel.org>
6 *
7 * This file is released under the GPLv2.
8 *
9 * This is percpu allocator which can handle both static and dynamic
10 * areas. Percpu areas are allocated in chunks in vmalloc area. Each
11 * chunk is consisted of num_possible_cpus() units and the first chunk
12 * is used for static percpu variables in the kernel image (special
13 * boot time alloc/init handling necessary as these areas need to be
14 * brought up before allocation services are running). Unit grows as
15 * necessary and all units grow or shrink in unison. When a chunk is
16 * filled up, another chunk is allocated. ie. in vmalloc area
17 *
18 * c0 c1 c2
19 * ------------------- ------------------- ------------
20 * | u0 | u1 | u2 | u3 | | u0 | u1 | u2 | u3 | | u0 | u1 | u
21 * ------------------- ...... ------------------- .... ------------
22 *
23 * Allocation is done in offset-size areas of single unit space. Ie,
24 * an area of 512 bytes at 6k in c1 occupies 512 bytes at 6k of c1:u0,
25 * c1:u1, c1:u2 and c1:u3. Percpu access can be done by configuring
26 * percpu base registers UNIT_SIZE apart.
27 *
28 * There are usually many small percpu allocations many of them as
29 * small as 4 bytes. The allocator organizes chunks into lists
30 * according to free size and tries to allocate from the fullest one.
31 * Each chunk keeps the maximum contiguous area size hint which is
32 * guaranteed to be eqaul to or larger than the maximum contiguous
33 * area in the chunk. This helps the allocator not to iterate the
34 * chunk maps unnecessarily.
35 *
36 * Allocation state in each chunk is kept using an array of integers
37 * on chunk->map. A positive value in the map represents a free
38 * region and negative allocated. Allocation inside a chunk is done
39 * by scanning this map sequentially and serving the first matching
40 * entry. This is mostly copied from the percpu_modalloc() allocator.
41 * Chunks are also linked into a rb tree to ease address to chunk
42 * mapping during free.
43 *
44 * To use this allocator, arch code should do the followings.
45 *
46 * - define CONFIG_HAVE_DYNAMIC_PER_CPU_AREA
47 *
48 * - define __addr_to_pcpu_ptr() and __pcpu_ptr_to_addr() to translate
49 * regular address to percpu pointer and back if they need to be
50 * different from the default
51 *
52 * - use pcpu_setup_first_chunk() during percpu area initialization to
53 * setup the first chunk containing the kernel static percpu area
54 */
55
56#include <linux/bitmap.h>
57#include <linux/bootmem.h>
58#include <linux/list.h>
59#include <linux/mm.h>
60#include <linux/module.h>
61#include <linux/mutex.h>
62#include <linux/percpu.h>
63#include <linux/pfn.h>
64#include <linux/rbtree.h>
65#include <linux/slab.h>
66#include <linux/spinlock.h>
67#include <linux/vmalloc.h>
68#include <linux/workqueue.h>
69
70#include <asm/cacheflush.h>
71#include <asm/sections.h>
72#include <asm/tlbflush.h>
73
74#define PCPU_SLOT_BASE_SHIFT 5 /* 1-31 shares the same slot */
75#define PCPU_DFL_MAP_ALLOC 16 /* start a map with 16 ents */
76
77/* default addr <-> pcpu_ptr mapping, override in asm/percpu.h if necessary */
78#ifndef __addr_to_pcpu_ptr
79#define __addr_to_pcpu_ptr(addr) \
80 (void *)((unsigned long)(addr) - (unsigned long)pcpu_base_addr \
81 + (unsigned long)__per_cpu_start)
82#endif
83#ifndef __pcpu_ptr_to_addr
84#define __pcpu_ptr_to_addr(ptr) \
85 (void *)((unsigned long)(ptr) + (unsigned long)pcpu_base_addr \
86 - (unsigned long)__per_cpu_start)
87#endif
88
89struct pcpu_chunk {
90 struct list_head list; /* linked to pcpu_slot lists */
91 struct rb_node rb_node; /* key is chunk->vm->addr */
92 int free_size; /* free bytes in the chunk */
93 int contig_hint; /* max contiguous size hint */
94 struct vm_struct *vm; /* mapped vmalloc region */
95 int map_used; /* # of map entries used */
96 int map_alloc; /* # of map entries allocated */
97 int *map; /* allocation map */
98 bool immutable; /* no [de]population allowed */
99 struct page **page; /* points to page array */
100 struct page *page_ar[]; /* #cpus * UNIT_PAGES */
101};
102
103static int pcpu_unit_pages __read_mostly;
104static int pcpu_unit_size __read_mostly;
105static int pcpu_chunk_size __read_mostly;
106static int pcpu_nr_slots __read_mostly;
107static size_t pcpu_chunk_struct_size __read_mostly;
108
109/* the address of the first chunk which starts with the kernel static area */
110void *pcpu_base_addr __read_mostly;
111EXPORT_SYMBOL_GPL(pcpu_base_addr);
112
113/* optional reserved chunk, only accessible for reserved allocations */
114static struct pcpu_chunk *pcpu_reserved_chunk;
115/* offset limit of the reserved chunk */
116static int pcpu_reserved_chunk_limit;
117
118/*
119 * Synchronization rules.
120 *
121 * There are two locks - pcpu_alloc_mutex and pcpu_lock. The former
122 * protects allocation/reclaim paths, chunks and chunk->page arrays.
123 * The latter is a spinlock and protects the index data structures -
124 * chunk slots, rbtree, chunks and area maps in chunks.
125 *
126 * During allocation, pcpu_alloc_mutex is kept locked all the time and
127 * pcpu_lock is grabbed and released as necessary. All actual memory
128 * allocations are done using GFP_KERNEL with pcpu_lock released.
129 *
130 * Free path accesses and alters only the index data structures, so it
131 * can be safely called from atomic context. When memory needs to be
132 * returned to the system, free path schedules reclaim_work which
133 * grabs both pcpu_alloc_mutex and pcpu_lock, unlinks chunks to be
134 * reclaimed, release both locks and frees the chunks. Note that it's
135 * necessary to grab both locks to remove a chunk from circulation as
136 * allocation path might be referencing the chunk with only
137 * pcpu_alloc_mutex locked.
138 */
139static DEFINE_MUTEX(pcpu_alloc_mutex); /* protects whole alloc and reclaim */
140static DEFINE_SPINLOCK(pcpu_lock); /* protects index data structures */
141
142static struct list_head *pcpu_slot __read_mostly; /* chunk list slots */
143static struct rb_root pcpu_addr_root = RB_ROOT; /* chunks by address */
144
145/* reclaim work to release fully free chunks, scheduled from free path */
146static void pcpu_reclaim(struct work_struct *work);
147static DECLARE_WORK(pcpu_reclaim_work, pcpu_reclaim);
148
149static int __pcpu_size_to_slot(int size)
150{
151 int highbit = fls(size); /* size is in bytes */
152 return max(highbit - PCPU_SLOT_BASE_SHIFT + 2, 1);
153}
154
155static int pcpu_size_to_slot(int size)
156{
157 if (size == pcpu_unit_size)
158 return pcpu_nr_slots - 1;
159 return __pcpu_size_to_slot(size);
160}
161
162static int pcpu_chunk_slot(const struct pcpu_chunk *chunk)
163{
164 if (chunk->free_size < sizeof(int) || chunk->contig_hint < sizeof(int))
165 return 0;
166
167 return pcpu_size_to_slot(chunk->free_size);
168}
169
170static int pcpu_page_idx(unsigned int cpu, int page_idx)
171{
172 return cpu * pcpu_unit_pages + page_idx;
173}
174
175static struct page **pcpu_chunk_pagep(struct pcpu_chunk *chunk,
176 unsigned int cpu, int page_idx)
177{
178 return &chunk->page[pcpu_page_idx(cpu, page_idx)];
179}
180
181static unsigned long pcpu_chunk_addr(struct pcpu_chunk *chunk,
182 unsigned int cpu, int page_idx)
183{
184 return (unsigned long)chunk->vm->addr +
185 (pcpu_page_idx(cpu, page_idx) << PAGE_SHIFT);
186}
187
188static bool pcpu_chunk_page_occupied(struct pcpu_chunk *chunk,
189 int page_idx)
190{
191 return *pcpu_chunk_pagep(chunk, 0, page_idx) != NULL;
192}
193
194/**
195 * pcpu_mem_alloc - allocate memory
196 * @size: bytes to allocate
197 *
198 * Allocate @size bytes. If @size is smaller than PAGE_SIZE,
199 * kzalloc() is used; otherwise, vmalloc() is used. The returned
200 * memory is always zeroed.
201 *
202 * CONTEXT:
203 * Does GFP_KERNEL allocation.
204 *
205 * RETURNS:
206 * Pointer to the allocated area on success, NULL on failure.
207 */
208static void *pcpu_mem_alloc(size_t size)
209{
210 if (size <= PAGE_SIZE)
211 return kzalloc(size, GFP_KERNEL);
212 else {
213 void *ptr = vmalloc(size);
214 if (ptr)
215 memset(ptr, 0, size);
216 return ptr;
217 }
218}
219
220/**
221 * pcpu_mem_free - free memory
222 * @ptr: memory to free
223 * @size: size of the area
224 *
225 * Free @ptr. @ptr should have been allocated using pcpu_mem_alloc().
226 */
227static void pcpu_mem_free(void *ptr, size_t size)
228{
229 if (size <= PAGE_SIZE)
230 kfree(ptr);
231 else
232 vfree(ptr);
233}
234
235/**
236 * pcpu_chunk_relocate - put chunk in the appropriate chunk slot
237 * @chunk: chunk of interest
238 * @oslot: the previous slot it was on
239 *
240 * This function is called after an allocation or free changed @chunk.
241 * New slot according to the changed state is determined and @chunk is
242 * moved to the slot. Note that the reserved chunk is never put on
243 * chunk slots.
244 *
245 * CONTEXT:
246 * pcpu_lock.
247 */
248static void pcpu_chunk_relocate(struct pcpu_chunk *chunk, int oslot)
249{
250 int nslot = pcpu_chunk_slot(chunk);
251
252 if (chunk != pcpu_reserved_chunk && oslot != nslot) {
253 if (oslot < nslot)
254 list_move(&chunk->list, &pcpu_slot[nslot]);
255 else
256 list_move_tail(&chunk->list, &pcpu_slot[nslot]);
257 }
258}
259
260static struct rb_node **pcpu_chunk_rb_search(void *addr,
261 struct rb_node **parentp)
262{
263 struct rb_node **p = &pcpu_addr_root.rb_node;
264 struct rb_node *parent = NULL;
265 struct pcpu_chunk *chunk;
266
267 while (*p) {
268 parent = *p;
269 chunk = rb_entry(parent, struct pcpu_chunk, rb_node);
270
271 if (addr < chunk->vm->addr)
272 p = &(*p)->rb_left;
273 else if (addr > chunk->vm->addr)
274 p = &(*p)->rb_right;
275 else
276 break;
277 }
278
279 if (parentp)
280 *parentp = parent;
281 return p;
282}
283
284/**
285 * pcpu_chunk_addr_search - search for chunk containing specified address
286 * @addr: address to search for
287 *
288 * Look for chunk which might contain @addr. More specifically, it
289 * searchs for the chunk with the highest start address which isn't
290 * beyond @addr.
291 *
292 * CONTEXT:
293 * pcpu_lock.
294 *
295 * RETURNS:
296 * The address of the found chunk.
297 */
298static struct pcpu_chunk *pcpu_chunk_addr_search(void *addr)
299{
300 struct rb_node *n, *parent;
301 struct pcpu_chunk *chunk;
302
303 /* is it in the reserved chunk? */
304 if (pcpu_reserved_chunk) {
305 void *start = pcpu_reserved_chunk->vm->addr;
306
307 if (addr >= start && addr < start + pcpu_reserved_chunk_limit)
308 return pcpu_reserved_chunk;
309 }
310
311 /* nah... search the regular ones */
312 n = *pcpu_chunk_rb_search(addr, &parent);
313 if (!n) {
314 /* no exactly matching chunk, the parent is the closest */
315 n = parent;
316 BUG_ON(!n);
317 }
318 chunk = rb_entry(n, struct pcpu_chunk, rb_node);
319
320 if (addr < chunk->vm->addr) {
321 /* the parent was the next one, look for the previous one */
322 n = rb_prev(n);
323 BUG_ON(!n);
324 chunk = rb_entry(n, struct pcpu_chunk, rb_node);
325 }
326
327 return chunk;
328}
329
330/**
331 * pcpu_chunk_addr_insert - insert chunk into address rb tree
332 * @new: chunk to insert
333 *
334 * Insert @new into address rb tree.
335 *
336 * CONTEXT:
337 * pcpu_lock.
338 */
339static void pcpu_chunk_addr_insert(struct pcpu_chunk *new)
340{
341 struct rb_node **p, *parent;
342
343 p = pcpu_chunk_rb_search(new->vm->addr, &parent);
344 BUG_ON(*p);
345 rb_link_node(&new->rb_node, parent, p);
346 rb_insert_color(&new->rb_node, &pcpu_addr_root);
347}
348
349/**
350 * pcpu_extend_area_map - extend area map for allocation
351 * @chunk: target chunk
352 *
353 * Extend area map of @chunk so that it can accomodate an allocation.
354 * A single allocation can split an area into three areas, so this
355 * function makes sure that @chunk->map has at least two extra slots.
356 *
357 * CONTEXT:
358 * pcpu_alloc_mutex, pcpu_lock. pcpu_lock is released and reacquired
359 * if area map is extended.
360 *
361 * RETURNS:
362 * 0 if noop, 1 if successfully extended, -errno on failure.
363 */
364static int pcpu_extend_area_map(struct pcpu_chunk *chunk)
365{
366 int new_alloc;
367 int *new;
368 size_t size;
369
370 /* has enough? */
371 if (chunk->map_alloc >= chunk->map_used + 2)
372 return 0;
373
374 spin_unlock_irq(&pcpu_lock);
375
376 new_alloc = PCPU_DFL_MAP_ALLOC;
377 while (new_alloc < chunk->map_used + 2)
378 new_alloc *= 2;
379
380 new = pcpu_mem_alloc(new_alloc * sizeof(new[0]));
381 if (!new) {
382 spin_lock_irq(&pcpu_lock);
383 return -ENOMEM;
384 }
385
386 /*
387 * Acquire pcpu_lock and switch to new area map. Only free
388 * could have happened inbetween, so map_used couldn't have
389 * grown.
390 */
391 spin_lock_irq(&pcpu_lock);
392 BUG_ON(new_alloc < chunk->map_used + 2);
393
394 size = chunk->map_alloc * sizeof(chunk->map[0]);
395 memcpy(new, chunk->map, size);
396
397 /*
398 * map_alloc < PCPU_DFL_MAP_ALLOC indicates that the chunk is
399 * one of the first chunks and still using static map.
400 */
401 if (chunk->map_alloc >= PCPU_DFL_MAP_ALLOC)
402 pcpu_mem_free(chunk->map, size);
403
404 chunk->map_alloc = new_alloc;
405 chunk->map = new;
406 return 0;
407}
408
409/**
410 * pcpu_split_block - split a map block
411 * @chunk: chunk of interest
412 * @i: index of map block to split
413 * @head: head size in bytes (can be 0)
414 * @tail: tail size in bytes (can be 0)
415 *
416 * Split the @i'th map block into two or three blocks. If @head is
417 * non-zero, @head bytes block is inserted before block @i moving it
418 * to @i+1 and reducing its size by @head bytes.
419 *
420 * If @tail is non-zero, the target block, which can be @i or @i+1
421 * depending on @head, is reduced by @tail bytes and @tail byte block
422 * is inserted after the target block.
423 *
424 * @chunk->map must have enough free slots to accomodate the split.
425 *
426 * CONTEXT:
427 * pcpu_lock.
428 */
429static void pcpu_split_block(struct pcpu_chunk *chunk, int i,
430 int head, int tail)
431{
432 int nr_extra = !!head + !!tail;
433
434 BUG_ON(chunk->map_alloc < chunk->map_used + nr_extra);
435
436 /* insert new subblocks */
437 memmove(&chunk->map[i + nr_extra], &chunk->map[i],
438 sizeof(chunk->map[0]) * (chunk->map_used - i));
439 chunk->map_used += nr_extra;
440
441 if (head) {
442 chunk->map[i + 1] = chunk->map[i] - head;
443 chunk->map[i++] = head;
444 }
445 if (tail) {
446 chunk->map[i++] -= tail;
447 chunk->map[i] = tail;
448 }
449}
450
451/**
452 * pcpu_alloc_area - allocate area from a pcpu_chunk
453 * @chunk: chunk of interest
454 * @size: wanted size in bytes
455 * @align: wanted align
456 *
457 * Try to allocate @size bytes area aligned at @align from @chunk.
458 * Note that this function only allocates the offset. It doesn't
459 * populate or map the area.
460 *
461 * @chunk->map must have at least two free slots.
462 *
463 * CONTEXT:
464 * pcpu_lock.
465 *
466 * RETURNS:
467 * Allocated offset in @chunk on success, -1 if no matching area is
468 * found.
469 */
470static int pcpu_alloc_area(struct pcpu_chunk *chunk, int size, int align)
471{
472 int oslot = pcpu_chunk_slot(chunk);
473 int max_contig = 0;
474 int i, off;
475
476 for (i = 0, off = 0; i < chunk->map_used; off += abs(chunk->map[i++])) {
477 bool is_last = i + 1 == chunk->map_used;
478 int head, tail;
479
480 /* extra for alignment requirement */
481 head = ALIGN(off, align) - off;
482 BUG_ON(i == 0 && head != 0);
483
484 if (chunk->map[i] < 0)
485 continue;
486 if (chunk->map[i] < head + size) {
487 max_contig = max(chunk->map[i], max_contig);
488 continue;
489 }
490
491 /*
492 * If head is small or the previous block is free,
493 * merge'em. Note that 'small' is defined as smaller
494 * than sizeof(int), which is very small but isn't too
495 * uncommon for percpu allocations.
496 */
497 if (head && (head < sizeof(int) || chunk->map[i - 1] > 0)) {
498 if (chunk->map[i - 1] > 0)
499 chunk->map[i - 1] += head;
500 else {
501 chunk->map[i - 1] -= head;
502 chunk->free_size -= head;
503 }
504 chunk->map[i] -= head;
505 off += head;
506 head = 0;
507 }
508
509 /* if tail is small, just keep it around */
510 tail = chunk->map[i] - head - size;
511 if (tail < sizeof(int))
512 tail = 0;
513
514 /* split if warranted */
515 if (head || tail) {
516 pcpu_split_block(chunk, i, head, tail);
517 if (head) {
518 i++;
519 off += head;
520 max_contig = max(chunk->map[i - 1], max_contig);
521 }
522 if (tail)
523 max_contig = max(chunk->map[i + 1], max_contig);
524 }
525
526 /* update hint and mark allocated */
527 if (is_last)
528 chunk->contig_hint = max_contig; /* fully scanned */
529 else
530 chunk->contig_hint = max(chunk->contig_hint,
531 max_contig);
532
533 chunk->free_size -= chunk->map[i];
534 chunk->map[i] = -chunk->map[i];
535
536 pcpu_chunk_relocate(chunk, oslot);
537 return off;
538 }
539
540 chunk->contig_hint = max_contig; /* fully scanned */
541 pcpu_chunk_relocate(chunk, oslot);
542
543 /* tell the upper layer that this chunk has no matching area */
544 return -1;
545}
546
547/**
548 * pcpu_free_area - free area to a pcpu_chunk
549 * @chunk: chunk of interest
550 * @freeme: offset of area to free
551 *
552 * Free area starting from @freeme to @chunk. Note that this function
553 * only modifies the allocation map. It doesn't depopulate or unmap
554 * the area.
555 *
556 * CONTEXT:
557 * pcpu_lock.
558 */
559static void pcpu_free_area(struct pcpu_chunk *chunk, int freeme)
560{
561 int oslot = pcpu_chunk_slot(chunk);
562 int i, off;
563
564 for (i = 0, off = 0; i < chunk->map_used; off += abs(chunk->map[i++]))
565 if (off == freeme)
566 break;
567 BUG_ON(off != freeme);
568 BUG_ON(chunk->map[i] > 0);
569
570 chunk->map[i] = -chunk->map[i];
571 chunk->free_size += chunk->map[i];
572
573 /* merge with previous? */
574 if (i > 0 && chunk->map[i - 1] >= 0) {
575 chunk->map[i - 1] += chunk->map[i];
576 chunk->map_used--;
577 memmove(&chunk->map[i], &chunk->map[i + 1],
578 (chunk->map_used - i) * sizeof(chunk->map[0]));
579 i--;
580 }
581 /* merge with next? */
582 if (i + 1 < chunk->map_used && chunk->map[i + 1] >= 0) {
583 chunk->map[i] += chunk->map[i + 1];
584 chunk->map_used--;
585 memmove(&chunk->map[i + 1], &chunk->map[i + 2],
586 (chunk->map_used - (i + 1)) * sizeof(chunk->map[0]));
587 }
588
589 chunk->contig_hint = max(chunk->map[i], chunk->contig_hint);
590 pcpu_chunk_relocate(chunk, oslot);
591}
592
593/**
594 * pcpu_unmap - unmap pages out of a pcpu_chunk
595 * @chunk: chunk of interest
596 * @page_start: page index of the first page to unmap
597 * @page_end: page index of the last page to unmap + 1
598 * @flush: whether to flush cache and tlb or not
599 *
600 * For each cpu, unmap pages [@page_start,@page_end) out of @chunk.
601 * If @flush is true, vcache is flushed before unmapping and tlb
602 * after.
603 */
604static void pcpu_unmap(struct pcpu_chunk *chunk, int page_start, int page_end,
605 bool flush)
606{
607 unsigned int last = num_possible_cpus() - 1;
608 unsigned int cpu;
609
610 /* unmap must not be done on immutable chunk */
611 WARN_ON(chunk->immutable);
612
613 /*
614 * Each flushing trial can be very expensive, issue flush on
615 * the whole region at once rather than doing it for each cpu.
616 * This could be an overkill but is more scalable.
617 */
618 if (flush)
619 flush_cache_vunmap(pcpu_chunk_addr(chunk, 0, page_start),
620 pcpu_chunk_addr(chunk, last, page_end));
621
622 for_each_possible_cpu(cpu)
623 unmap_kernel_range_noflush(
624 pcpu_chunk_addr(chunk, cpu, page_start),
625 (page_end - page_start) << PAGE_SHIFT);
626
627 /* ditto as flush_cache_vunmap() */
628 if (flush)
629 flush_tlb_kernel_range(pcpu_chunk_addr(chunk, 0, page_start),
630 pcpu_chunk_addr(chunk, last, page_end));
631}
632
633/**
634 * pcpu_depopulate_chunk - depopulate and unmap an area of a pcpu_chunk
635 * @chunk: chunk to depopulate
636 * @off: offset to the area to depopulate
637 * @size: size of the area to depopulate in bytes
638 * @flush: whether to flush cache and tlb or not
639 *
640 * For each cpu, depopulate and unmap pages [@page_start,@page_end)
641 * from @chunk. If @flush is true, vcache is flushed before unmapping
642 * and tlb after.
643 *
644 * CONTEXT:
645 * pcpu_alloc_mutex.
646 */
647static void pcpu_depopulate_chunk(struct pcpu_chunk *chunk, int off, int size,
648 bool flush)
649{
650 int page_start = PFN_DOWN(off);
651 int page_end = PFN_UP(off + size);
652 int unmap_start = -1;
653 int uninitialized_var(unmap_end);
654 unsigned int cpu;
655 int i;
656
657 for (i = page_start; i < page_end; i++) {
658 for_each_possible_cpu(cpu) {
659 struct page **pagep = pcpu_chunk_pagep(chunk, cpu, i);
660
661 if (!*pagep)
662 continue;
663
664 __free_page(*pagep);
665
666 /*
667 * If it's partial depopulation, it might get
668 * populated or depopulated again. Mark the
669 * page gone.
670 */
671 *pagep = NULL;
672
673 unmap_start = unmap_start < 0 ? i : unmap_start;
674 unmap_end = i + 1;
675 }
676 }
677
678 if (unmap_start >= 0)
679 pcpu_unmap(chunk, unmap_start, unmap_end, flush);
680}
681
682/**
683 * pcpu_map - map pages into a pcpu_chunk
684 * @chunk: chunk of interest
685 * @page_start: page index of the first page to map
686 * @page_end: page index of the last page to map + 1
687 *
688 * For each cpu, map pages [@page_start,@page_end) into @chunk.
689 * vcache is flushed afterwards.
690 */
691static int pcpu_map(struct pcpu_chunk *chunk, int page_start, int page_end)
692{
693 unsigned int last = num_possible_cpus() - 1;
694 unsigned int cpu;
695 int err;
696
697 /* map must not be done on immutable chunk */
698 WARN_ON(chunk->immutable);
699
700 for_each_possible_cpu(cpu) {
701 err = map_kernel_range_noflush(
702 pcpu_chunk_addr(chunk, cpu, page_start),
703 (page_end - page_start) << PAGE_SHIFT,
704 PAGE_KERNEL,
705 pcpu_chunk_pagep(chunk, cpu, page_start));
706 if (err < 0)
707 return err;
708 }
709
710 /* flush at once, please read comments in pcpu_unmap() */
711 flush_cache_vmap(pcpu_chunk_addr(chunk, 0, page_start),
712 pcpu_chunk_addr(chunk, last, page_end));
713 return 0;
714}
715
716/**
717 * pcpu_populate_chunk - populate and map an area of a pcpu_chunk
718 * @chunk: chunk of interest
719 * @off: offset to the area to populate
720 * @size: size of the area to populate in bytes
721 *
722 * For each cpu, populate and map pages [@page_start,@page_end) into
723 * @chunk. The area is cleared on return.
724 *
725 * CONTEXT:
726 * pcpu_alloc_mutex, does GFP_KERNEL allocation.
727 */
728static int pcpu_populate_chunk(struct pcpu_chunk *chunk, int off, int size)
729{
730 const gfp_t alloc_mask = GFP_KERNEL | __GFP_HIGHMEM | __GFP_COLD;
731 int page_start = PFN_DOWN(off);
732 int page_end = PFN_UP(off + size);
733 int map_start = -1;
734 int uninitialized_var(map_end);
735 unsigned int cpu;
736 int i;
737
738 for (i = page_start; i < page_end; i++) {
739 if (pcpu_chunk_page_occupied(chunk, i)) {
740 if (map_start >= 0) {
741 if (pcpu_map(chunk, map_start, map_end))
742 goto err;
743 map_start = -1;
744 }
745 continue;
746 }
747
748 map_start = map_start < 0 ? i : map_start;
749 map_end = i + 1;
750
751 for_each_possible_cpu(cpu) {
752 struct page **pagep = pcpu_chunk_pagep(chunk, cpu, i);
753
754 *pagep = alloc_pages_node(cpu_to_node(cpu),
755 alloc_mask, 0);
756 if (!*pagep)
757 goto err;
758 }
759 }
760
761 if (map_start >= 0 && pcpu_map(chunk, map_start, map_end))
762 goto err;
763
764 for_each_possible_cpu(cpu)
765 memset(chunk->vm->addr + cpu * pcpu_unit_size + off, 0,
766 size);
767
768 return 0;
769err:
770 /* likely under heavy memory pressure, give memory back */
771 pcpu_depopulate_chunk(chunk, off, size, true);
772 return -ENOMEM;
773}
774
775static void free_pcpu_chunk(struct pcpu_chunk *chunk)
776{
777 if (!chunk)
778 return;
779 if (chunk->vm)
780 free_vm_area(chunk->vm);
781 pcpu_mem_free(chunk->map, chunk->map_alloc * sizeof(chunk->map[0]));
782 kfree(chunk);
783}
784
785static struct pcpu_chunk *alloc_pcpu_chunk(void)
786{
787 struct pcpu_chunk *chunk;
788
789 chunk = kzalloc(pcpu_chunk_struct_size, GFP_KERNEL);
790 if (!chunk)
791 return NULL;
792
793 chunk->map = pcpu_mem_alloc(PCPU_DFL_MAP_ALLOC * sizeof(chunk->map[0]));
794 chunk->map_alloc = PCPU_DFL_MAP_ALLOC;
795 chunk->map[chunk->map_used++] = pcpu_unit_size;
796 chunk->page = chunk->page_ar;
797
798 chunk->vm = get_vm_area(pcpu_chunk_size, GFP_KERNEL);
799 if (!chunk->vm) {
800 free_pcpu_chunk(chunk);
801 return NULL;
802 }
803
804 INIT_LIST_HEAD(&chunk->list);
805 chunk->free_size = pcpu_unit_size;
806 chunk->contig_hint = pcpu_unit_size;
807
808 return chunk;
809}
810
811/**
812 * pcpu_alloc - the percpu allocator
813 * @size: size of area to allocate in bytes
814 * @align: alignment of area (max PAGE_SIZE)
815 * @reserved: allocate from the reserved chunk if available
816 *
817 * Allocate percpu area of @size bytes aligned at @align.
818 *
819 * CONTEXT:
820 * Does GFP_KERNEL allocation.
821 *
822 * RETURNS:
823 * Percpu pointer to the allocated area on success, NULL on failure.
824 */
825static void *pcpu_alloc(size_t size, size_t align, bool reserved)
826{
827 struct pcpu_chunk *chunk;
828 int slot, off;
829
830 if (unlikely(!size || size > PCPU_MIN_UNIT_SIZE || align > PAGE_SIZE)) {
831 WARN(true, "illegal size (%zu) or align (%zu) for "
832 "percpu allocation\n", size, align);
833 return NULL;
834 }
835
836 mutex_lock(&pcpu_alloc_mutex);
837 spin_lock_irq(&pcpu_lock);
838
839 /* serve reserved allocations from the reserved chunk if available */
840 if (reserved && pcpu_reserved_chunk) {
841 chunk = pcpu_reserved_chunk;
842 if (size > chunk->contig_hint ||
843 pcpu_extend_area_map(chunk) < 0)
844 goto fail_unlock;
845 off = pcpu_alloc_area(chunk, size, align);
846 if (off >= 0)
847 goto area_found;
848 goto fail_unlock;
849 }
850
851restart:
852 /* search through normal chunks */
853 for (slot = pcpu_size_to_slot(size); slot < pcpu_nr_slots; slot++) {
854 list_for_each_entry(chunk, &pcpu_slot[slot], list) {
855 if (size > chunk->contig_hint)
856 continue;
857
858 switch (pcpu_extend_area_map(chunk)) {
859 case 0:
860 break;
861 case 1:
862 goto restart; /* pcpu_lock dropped, restart */
863 default:
864 goto fail_unlock;
865 }
866
867 off = pcpu_alloc_area(chunk, size, align);
868 if (off >= 0)
869 goto area_found;
870 }
871 }
872
873 /* hmmm... no space left, create a new chunk */
874 spin_unlock_irq(&pcpu_lock);
875
876 chunk = alloc_pcpu_chunk();
877 if (!chunk)
878 goto fail_unlock_mutex;
879
880 spin_lock_irq(&pcpu_lock);
881 pcpu_chunk_relocate(chunk, -1);
882 pcpu_chunk_addr_insert(chunk);
883 goto restart;
884
885area_found:
886 spin_unlock_irq(&pcpu_lock);
887
888 /* populate, map and clear the area */
889 if (pcpu_populate_chunk(chunk, off, size)) {
890 spin_lock_irq(&pcpu_lock);
891 pcpu_free_area(chunk, off);
892 goto fail_unlock;
893 }
894
895 mutex_unlock(&pcpu_alloc_mutex);
896
897 return __addr_to_pcpu_ptr(chunk->vm->addr + off);
898
899fail_unlock:
900 spin_unlock_irq(&pcpu_lock);
901fail_unlock_mutex:
902 mutex_unlock(&pcpu_alloc_mutex);
903 return NULL;
904}
905
906/**
907 * __alloc_percpu - allocate dynamic percpu area
908 * @size: size of area to allocate in bytes
909 * @align: alignment of area (max PAGE_SIZE)
910 *
911 * Allocate percpu area of @size bytes aligned at @align. Might
912 * sleep. Might trigger writeouts.
913 *
914 * CONTEXT:
915 * Does GFP_KERNEL allocation.
916 *
917 * RETURNS:
918 * Percpu pointer to the allocated area on success, NULL on failure.
919 */
920void *__alloc_percpu(size_t size, size_t align)
921{
922 return pcpu_alloc(size, align, false);
923}
924EXPORT_SYMBOL_GPL(__alloc_percpu);
925
926/**
927 * __alloc_reserved_percpu - allocate reserved percpu area
928 * @size: size of area to allocate in bytes
929 * @align: alignment of area (max PAGE_SIZE)
930 *
931 * Allocate percpu area of @size bytes aligned at @align from reserved
932 * percpu area if arch has set it up; otherwise, allocation is served
933 * from the same dynamic area. Might sleep. Might trigger writeouts.
934 *
935 * CONTEXT:
936 * Does GFP_KERNEL allocation.
937 *
938 * RETURNS:
939 * Percpu pointer to the allocated area on success, NULL on failure.
940 */
941void *__alloc_reserved_percpu(size_t size, size_t align)
942{
943 return pcpu_alloc(size, align, true);
944}
945
946/**
947 * pcpu_reclaim - reclaim fully free chunks, workqueue function
948 * @work: unused
949 *
950 * Reclaim all fully free chunks except for the first one.
951 *
952 * CONTEXT:
953 * workqueue context.
954 */
955static void pcpu_reclaim(struct work_struct *work)
956{
957 LIST_HEAD(todo);
958 struct list_head *head = &pcpu_slot[pcpu_nr_slots - 1];
959 struct pcpu_chunk *chunk, *next;
960
961 mutex_lock(&pcpu_alloc_mutex);
962 spin_lock_irq(&pcpu_lock);
963
964 list_for_each_entry_safe(chunk, next, head, list) {
965 WARN_ON(chunk->immutable);
966
967 /* spare the first one */
968 if (chunk == list_first_entry(head, struct pcpu_chunk, list))
969 continue;
970
971 rb_erase(&chunk->rb_node, &pcpu_addr_root);
972 list_move(&chunk->list, &todo);
973 }
974
975 spin_unlock_irq(&pcpu_lock);
976 mutex_unlock(&pcpu_alloc_mutex);
977
978 list_for_each_entry_safe(chunk, next, &todo, list) {
979 pcpu_depopulate_chunk(chunk, 0, pcpu_unit_size, false);
980 free_pcpu_chunk(chunk);
981 }
982}
983
984/**
985 * free_percpu - free percpu area
986 * @ptr: pointer to area to free
987 *
988 * Free percpu area @ptr.
989 *
990 * CONTEXT:
991 * Can be called from atomic context.
992 */
993void free_percpu(void *ptr)
994{
995 void *addr = __pcpu_ptr_to_addr(ptr);
996 struct pcpu_chunk *chunk;
997 unsigned long flags;
998 int off;
999
1000 if (!ptr)
1001 return;
1002
1003 spin_lock_irqsave(&pcpu_lock, flags);
1004
1005 chunk = pcpu_chunk_addr_search(addr);
1006 off = addr - chunk->vm->addr;
1007
1008 pcpu_free_area(chunk, off);
1009
1010 /* if there are more than one fully free chunks, wake up grim reaper */
1011 if (chunk->free_size == pcpu_unit_size) {
1012 struct pcpu_chunk *pos;
1013
1014 list_for_each_entry(pos, &pcpu_slot[pcpu_nr_slots - 1], list)
1015 if (pos != chunk) {
1016 schedule_work(&pcpu_reclaim_work);
1017 break;
1018 }
1019 }
1020
1021 spin_unlock_irqrestore(&pcpu_lock, flags);
1022}
1023EXPORT_SYMBOL_GPL(free_percpu);
1024
1025/**
1026 * pcpu_setup_first_chunk - initialize the first percpu chunk
1027 * @get_page_fn: callback to fetch page pointer
1028 * @static_size: the size of static percpu area in bytes
1029 * @reserved_size: the size of reserved percpu area in bytes
1030 * @dyn_size: free size for dynamic allocation in bytes, -1 for auto
1031 * @unit_size: unit size in bytes, must be multiple of PAGE_SIZE, -1 for auto
1032 * @base_addr: mapped address, NULL for auto
1033 * @populate_pte_fn: callback to allocate pagetable, NULL if unnecessary
1034 *
1035 * Initialize the first percpu chunk which contains the kernel static
1036 * perpcu area. This function is to be called from arch percpu area
1037 * setup path. The first two parameters are mandatory. The rest are
1038 * optional.
1039 *
1040 * @get_page_fn() should return pointer to percpu page given cpu
1041 * number and page number. It should at least return enough pages to
1042 * cover the static area. The returned pages for static area should
1043 * have been initialized with valid data. If @unit_size is specified,
1044 * it can also return pages after the static area. NULL return
1045 * indicates end of pages for the cpu. Note that @get_page_fn() must
1046 * return the same number of pages for all cpus.
1047 *
1048 * @reserved_size, if non-zero, specifies the amount of bytes to
1049 * reserve after the static area in the first chunk. This reserves
1050 * the first chunk such that it's available only through reserved
1051 * percpu allocation. This is primarily used to serve module percpu
1052 * static areas on architectures where the addressing model has
1053 * limited offset range for symbol relocations to guarantee module
1054 * percpu symbols fall inside the relocatable range.
1055 *
1056 * @dyn_size, if non-negative, determines the number of bytes
1057 * available for dynamic allocation in the first chunk. Specifying
1058 * non-negative value makes percpu leave alone the area beyond
1059 * @static_size + @reserved_size + @dyn_size.
1060 *
1061 * @unit_size, if non-negative, specifies unit size and must be
1062 * aligned to PAGE_SIZE and equal to or larger than @static_size +
1063 * @reserved_size + if non-negative, @dyn_size.
1064 *
1065 * Non-null @base_addr means that the caller already allocated virtual
1066 * region for the first chunk and mapped it. percpu must not mess
1067 * with the chunk. Note that @base_addr with 0 @unit_size or non-NULL
1068 * @populate_pte_fn doesn't make any sense.
1069 *
1070 * @populate_pte_fn is used to populate the pagetable. NULL means the
1071 * caller already populated the pagetable.
1072 *
1073 * If the first chunk ends up with both reserved and dynamic areas, it
1074 * is served by two chunks - one to serve the core static and reserved
1075 * areas and the other for the dynamic area. They share the same vm
1076 * and page map but uses different area allocation map to stay away
1077 * from each other. The latter chunk is circulated in the chunk slots
1078 * and available for dynamic allocation like any other chunks.
1079 *
1080 * RETURNS:
1081 * The determined pcpu_unit_size which can be used to initialize
1082 * percpu access.
1083 */
1084size_t __init pcpu_setup_first_chunk(pcpu_get_page_fn_t get_page_fn,
1085 size_t static_size, size_t reserved_size,
1086 ssize_t dyn_size, ssize_t unit_size,
1087 void *base_addr,
1088 pcpu_populate_pte_fn_t populate_pte_fn)
1089{
1090 static struct vm_struct first_vm;
1091 static int smap[2], dmap[2];
1092 size_t size_sum = static_size + reserved_size +
1093 (dyn_size >= 0 ? dyn_size : 0);
1094 struct pcpu_chunk *schunk, *dchunk = NULL;
1095 unsigned int cpu;
1096 int nr_pages;
1097 int err, i;
1098
1099 /* santiy checks */
1100 BUILD_BUG_ON(ARRAY_SIZE(smap) >= PCPU_DFL_MAP_ALLOC ||
1101 ARRAY_SIZE(dmap) >= PCPU_DFL_MAP_ALLOC);
1102 BUG_ON(!static_size);
1103 if (unit_size >= 0) {
1104 BUG_ON(unit_size < size_sum);
1105 BUG_ON(unit_size & ~PAGE_MASK);
1106 BUG_ON(unit_size < PCPU_MIN_UNIT_SIZE);
1107 } else
1108 BUG_ON(base_addr);
1109 BUG_ON(base_addr && populate_pte_fn);
1110
1111 if (unit_size >= 0)
1112 pcpu_unit_pages = unit_size >> PAGE_SHIFT;
1113 else
1114 pcpu_unit_pages = max_t(int, PCPU_MIN_UNIT_SIZE >> PAGE_SHIFT,
1115 PFN_UP(size_sum));
1116
1117 pcpu_unit_size = pcpu_unit_pages << PAGE_SHIFT;
1118 pcpu_chunk_size = num_possible_cpus() * pcpu_unit_size;
1119 pcpu_chunk_struct_size = sizeof(struct pcpu_chunk)
1120 + num_possible_cpus() * pcpu_unit_pages * sizeof(struct page *);
1121
1122 if (dyn_size < 0)
1123 dyn_size = pcpu_unit_size - static_size - reserved_size;
1124
1125 /*
1126 * Allocate chunk slots. The additional last slot is for
1127 * empty chunks.
1128 */
1129 pcpu_nr_slots = __pcpu_size_to_slot(pcpu_unit_size) + 2;
1130 pcpu_slot = alloc_bootmem(pcpu_nr_slots * sizeof(pcpu_slot[0]));
1131 for (i = 0; i < pcpu_nr_slots; i++)
1132 INIT_LIST_HEAD(&pcpu_slot[i]);
1133
1134 /*
1135 * Initialize static chunk. If reserved_size is zero, the
1136 * static chunk covers static area + dynamic allocation area
1137 * in the first chunk. If reserved_size is not zero, it
1138 * covers static area + reserved area (mostly used for module
1139 * static percpu allocation).
1140 */
1141 schunk = alloc_bootmem(pcpu_chunk_struct_size);
1142 INIT_LIST_HEAD(&schunk->list);
1143 schunk->vm = &first_vm;
1144 schunk->map = smap;
1145 schunk->map_alloc = ARRAY_SIZE(smap);
1146 schunk->page = schunk->page_ar;
1147
1148 if (reserved_size) {
1149 schunk->free_size = reserved_size;
1150 pcpu_reserved_chunk = schunk; /* not for dynamic alloc */
1151 } else {
1152 schunk->free_size = dyn_size;
1153 dyn_size = 0; /* dynamic area covered */
1154 }
1155 schunk->contig_hint = schunk->free_size;
1156
1157 schunk->map[schunk->map_used++] = -static_size;
1158 if (schunk->free_size)
1159 schunk->map[schunk->map_used++] = schunk->free_size;
1160
1161 pcpu_reserved_chunk_limit = static_size + schunk->free_size;
1162
1163 /* init dynamic chunk if necessary */
1164 if (dyn_size) {
1165 dchunk = alloc_bootmem(sizeof(struct pcpu_chunk));
1166 INIT_LIST_HEAD(&dchunk->list);
1167 dchunk->vm = &first_vm;
1168 dchunk->map = dmap;
1169 dchunk->map_alloc = ARRAY_SIZE(dmap);
1170 dchunk->page = schunk->page_ar; /* share page map with schunk */
1171
1172 dchunk->contig_hint = dchunk->free_size = dyn_size;
1173 dchunk->map[dchunk->map_used++] = -pcpu_reserved_chunk_limit;
1174 dchunk->map[dchunk->map_used++] = dchunk->free_size;
1175 }
1176
1177 /* allocate vm address */
1178 first_vm.flags = VM_ALLOC;
1179 first_vm.size = pcpu_chunk_size;
1180
1181 if (!base_addr)
1182 vm_area_register_early(&first_vm, PAGE_SIZE);
1183 else {
1184 /*
1185 * Pages already mapped. No need to remap into
1186 * vmalloc area. In this case the first chunks can't
1187 * be mapped or unmapped by percpu and are marked
1188 * immutable.
1189 */
1190 first_vm.addr = base_addr;
1191 schunk->immutable = true;
1192 if (dchunk)
1193 dchunk->immutable = true;
1194 }
1195
1196 /* assign pages */
1197 nr_pages = -1;
1198 for_each_possible_cpu(cpu) {
1199 for (i = 0; i < pcpu_unit_pages; i++) {
1200 struct page *page = get_page_fn(cpu, i);
1201
1202 if (!page)
1203 break;
1204 *pcpu_chunk_pagep(schunk, cpu, i) = page;
1205 }
1206
1207 BUG_ON(i < PFN_UP(static_size));
1208
1209 if (nr_pages < 0)
1210 nr_pages = i;
1211 else
1212 BUG_ON(nr_pages != i);
1213 }
1214
1215 /* map them */
1216 if (populate_pte_fn) {
1217 for_each_possible_cpu(cpu)
1218 for (i = 0; i < nr_pages; i++)
1219 populate_pte_fn(pcpu_chunk_addr(schunk,
1220 cpu, i));
1221
1222 err = pcpu_map(schunk, 0, nr_pages);
1223 if (err)
1224 panic("failed to setup static percpu area, err=%d\n",
1225 err);
1226 }
1227
1228 /* link the first chunk in */
1229 if (!dchunk) {
1230 pcpu_chunk_relocate(schunk, -1);
1231 pcpu_chunk_addr_insert(schunk);
1232 } else {
1233 pcpu_chunk_relocate(dchunk, -1);
1234 pcpu_chunk_addr_insert(dchunk);
1235 }
1236
1237 /* we're done */
1238 pcpu_base_addr = (void *)pcpu_chunk_addr(schunk, 0, 0);
1239 return pcpu_unit_size;
1240}
1241
1242/*
1243 * Embedding first chunk setup helper.
1244 */
1245static void *pcpue_ptr __initdata;
1246static size_t pcpue_size __initdata;
1247static size_t pcpue_unit_size __initdata;
1248
1249static struct page * __init pcpue_get_page(unsigned int cpu, int pageno)
1250{
1251 size_t off = (size_t)pageno << PAGE_SHIFT;
1252
1253 if (off >= pcpue_size)
1254 return NULL;
1255
1256 return virt_to_page(pcpue_ptr + cpu * pcpue_unit_size + off);
1257}
1258
1259/**
1260 * pcpu_embed_first_chunk - embed the first percpu chunk into bootmem
1261 * @static_size: the size of static percpu area in bytes
1262 * @reserved_size: the size of reserved percpu area in bytes
1263 * @dyn_size: free size for dynamic allocation in bytes, -1 for auto
1264 * @unit_size: unit size in bytes, must be multiple of PAGE_SIZE, -1 for auto
1265 *
1266 * This is a helper to ease setting up embedded first percpu chunk and
1267 * can be called where pcpu_setup_first_chunk() is expected.
1268 *
1269 * If this function is used to setup the first chunk, it is allocated
1270 * as a contiguous area using bootmem allocator and used as-is without
1271 * being mapped into vmalloc area. This enables the first chunk to
1272 * piggy back on the linear physical mapping which often uses larger
1273 * page size.
1274 *
1275 * When @dyn_size is positive, dynamic area might be larger than
1276 * specified to fill page alignment. Also, when @dyn_size is auto,
1277 * @dyn_size does not fill the whole first chunk but only what's
1278 * necessary for page alignment after static and reserved areas.
1279 *
1280 * If the needed size is smaller than the minimum or specified unit
1281 * size, the leftover is returned to the bootmem allocator.
1282 *
1283 * RETURNS:
1284 * The determined pcpu_unit_size which can be used to initialize
1285 * percpu access on success, -errno on failure.
1286 */
1287ssize_t __init pcpu_embed_first_chunk(size_t static_size, size_t reserved_size,
1288 ssize_t dyn_size, ssize_t unit_size)
1289{
1290 unsigned int cpu;
1291
1292 /* determine parameters and allocate */
1293 pcpue_size = PFN_ALIGN(static_size + reserved_size +
1294 (dyn_size >= 0 ? dyn_size : 0));
1295 if (dyn_size != 0)
1296 dyn_size = pcpue_size - static_size - reserved_size;
1297
1298 if (unit_size >= 0) {
1299 BUG_ON(unit_size < pcpue_size);
1300 pcpue_unit_size = unit_size;
1301 } else
1302 pcpue_unit_size = max_t(size_t, pcpue_size, PCPU_MIN_UNIT_SIZE);
1303
1304 pcpue_ptr = __alloc_bootmem_nopanic(
1305 num_possible_cpus() * pcpue_unit_size,
1306 PAGE_SIZE, __pa(MAX_DMA_ADDRESS));
1307 if (!pcpue_ptr)
1308 return -ENOMEM;
1309
1310 /* return the leftover and copy */
1311 for_each_possible_cpu(cpu) {
1312 void *ptr = pcpue_ptr + cpu * pcpue_unit_size;
1313
1314 free_bootmem(__pa(ptr + pcpue_size),
1315 pcpue_unit_size - pcpue_size);
1316 memcpy(ptr, __per_cpu_load, static_size);
1317 }
1318
1319 /* we're ready, commit */
1320 pr_info("PERCPU: Embedded %zu pages at %p, static data %zu bytes\n",
1321 pcpue_size >> PAGE_SHIFT, pcpue_ptr, static_size);
1322
1323 return pcpu_setup_first_chunk(pcpue_get_page, static_size,
1324 reserved_size, dyn_size,
1325 pcpue_unit_size, pcpue_ptr, NULL);
1326}
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 520a75980269..af58324c361a 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -24,6 +24,7 @@
24#include <linux/radix-tree.h> 24#include <linux/radix-tree.h>
25#include <linux/rcupdate.h> 25#include <linux/rcupdate.h>
26#include <linux/bootmem.h> 26#include <linux/bootmem.h>
27#include <linux/pfn.h>
27 28
28#include <asm/atomic.h> 29#include <asm/atomic.h>
29#include <asm/uaccess.h> 30#include <asm/uaccess.h>
@@ -152,8 +153,8 @@ static int vmap_pud_range(pgd_t *pgd, unsigned long addr,
152 * 153 *
153 * Ie. pte at addr+N*PAGE_SIZE shall point to pfn corresponding to pages[N] 154 * Ie. pte at addr+N*PAGE_SIZE shall point to pfn corresponding to pages[N]
154 */ 155 */
155static int vmap_page_range(unsigned long start, unsigned long end, 156static int vmap_page_range_noflush(unsigned long start, unsigned long end,
156 pgprot_t prot, struct page **pages) 157 pgprot_t prot, struct page **pages)
157{ 158{
158 pgd_t *pgd; 159 pgd_t *pgd;
159 unsigned long next; 160 unsigned long next;
@@ -169,13 +170,22 @@ static int vmap_page_range(unsigned long start, unsigned long end,
169 if (err) 170 if (err)
170 break; 171 break;
171 } while (pgd++, addr = next, addr != end); 172 } while (pgd++, addr = next, addr != end);
172 flush_cache_vmap(start, end);
173 173
174 if (unlikely(err)) 174 if (unlikely(err))
175 return err; 175 return err;
176 return nr; 176 return nr;
177} 177}
178 178
179static int vmap_page_range(unsigned long start, unsigned long end,
180 pgprot_t prot, struct page **pages)
181{
182 int ret;
183
184 ret = vmap_page_range_noflush(start, end, prot, pages);
185 flush_cache_vmap(start, end);
186 return ret;
187}
188
179static inline int is_vmalloc_or_module_addr(const void *x) 189static inline int is_vmalloc_or_module_addr(const void *x)
180{ 190{
181 /* 191 /*
@@ -990,6 +1000,32 @@ void *vm_map_ram(struct page **pages, unsigned int count, int node, pgprot_t pro
990} 1000}
991EXPORT_SYMBOL(vm_map_ram); 1001EXPORT_SYMBOL(vm_map_ram);
992 1002
1003/**
1004 * vm_area_register_early - register vmap area early during boot
1005 * @vm: vm_struct to register
1006 * @align: requested alignment
1007 *
1008 * This function is used to register kernel vm area before
1009 * vmalloc_init() is called. @vm->size and @vm->flags should contain
1010 * proper values on entry and other fields should be zero. On return,
1011 * vm->addr contains the allocated address.
1012 *
1013 * DO NOT USE THIS FUNCTION UNLESS YOU KNOW WHAT YOU'RE DOING.
1014 */
1015void __init vm_area_register_early(struct vm_struct *vm, size_t align)
1016{
1017 static size_t vm_init_off __initdata;
1018 unsigned long addr;
1019
1020 addr = ALIGN(VMALLOC_START + vm_init_off, align);
1021 vm_init_off = PFN_ALIGN(addr + vm->size) - VMALLOC_START;
1022
1023 vm->addr = (void *)addr;
1024
1025 vm->next = vmlist;
1026 vmlist = vm;
1027}
1028
993void __init vmalloc_init(void) 1029void __init vmalloc_init(void)
994{ 1030{
995 struct vmap_area *va; 1031 struct vmap_area *va;
@@ -1017,6 +1053,58 @@ void __init vmalloc_init(void)
1017 vmap_initialized = true; 1053 vmap_initialized = true;
1018} 1054}
1019 1055
1056/**
1057 * map_kernel_range_noflush - map kernel VM area with the specified pages
1058 * @addr: start of the VM area to map
1059 * @size: size of the VM area to map
1060 * @prot: page protection flags to use
1061 * @pages: pages to map
1062 *
1063 * Map PFN_UP(@size) pages at @addr. The VM area @addr and @size
1064 * specify should have been allocated using get_vm_area() and its
1065 * friends.
1066 *
1067 * NOTE:
1068 * This function does NOT do any cache flushing. The caller is
1069 * responsible for calling flush_cache_vmap() on to-be-mapped areas
1070 * before calling this function.
1071 *
1072 * RETURNS:
1073 * The number of pages mapped on success, -errno on failure.
1074 */
1075int map_kernel_range_noflush(unsigned long addr, unsigned long size,
1076 pgprot_t prot, struct page **pages)
1077{
1078 return vmap_page_range_noflush(addr, addr + size, prot, pages);
1079}
1080
1081/**
1082 * unmap_kernel_range_noflush - unmap kernel VM area
1083 * @addr: start of the VM area to unmap
1084 * @size: size of the VM area to unmap
1085 *
1086 * Unmap PFN_UP(@size) pages at @addr. The VM area @addr and @size
1087 * specify should have been allocated using get_vm_area() and its
1088 * friends.
1089 *
1090 * NOTE:
1091 * This function does NOT do any cache flushing. The caller is
1092 * responsible for calling flush_cache_vunmap() on to-be-mapped areas
1093 * before calling this function and flush_tlb_kernel_range() after.
1094 */
1095void unmap_kernel_range_noflush(unsigned long addr, unsigned long size)
1096{
1097 vunmap_page_range(addr, addr + size);
1098}
1099
1100/**
1101 * unmap_kernel_range - unmap kernel VM area and flush cache and TLB
1102 * @addr: start of the VM area to unmap
1103 * @size: size of the VM area to unmap
1104 *
1105 * Similar to unmap_kernel_range_noflush() but flushes vcache before
1106 * the unmapping and tlb after.
1107 */
1020void unmap_kernel_range(unsigned long addr, unsigned long size) 1108void unmap_kernel_range(unsigned long addr, unsigned long size)
1021{ 1109{
1022 unsigned long end = addr + size; 1110 unsigned long end = addr + size;
@@ -1267,6 +1355,7 @@ EXPORT_SYMBOL(vfree);
1267void vunmap(const void *addr) 1355void vunmap(const void *addr)
1268{ 1356{
1269 BUG_ON(in_interrupt()); 1357 BUG_ON(in_interrupt());
1358 might_sleep();
1270 __vunmap(addr, 0); 1359 __vunmap(addr, 0);
1271} 1360}
1272EXPORT_SYMBOL(vunmap); 1361EXPORT_SYMBOL(vunmap);
@@ -1286,6 +1375,8 @@ void *vmap(struct page **pages, unsigned int count,
1286{ 1375{
1287 struct vm_struct *area; 1376 struct vm_struct *area;
1288 1377
1378 might_sleep();
1379
1289 if (count > num_physpages) 1380 if (count > num_physpages)
1290 return NULL; 1381 return NULL;
1291 1382
diff --git a/net/core/dev.c b/net/core/dev.c
index 63ec4bf89b29..52fea5b28ca6 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -1457,7 +1457,9 @@ static bool can_checksum_protocol(unsigned long features, __be16 protocol)
1457 ((features & NETIF_F_IP_CSUM) && 1457 ((features & NETIF_F_IP_CSUM) &&
1458 protocol == htons(ETH_P_IP)) || 1458 protocol == htons(ETH_P_IP)) ||
1459 ((features & NETIF_F_IPV6_CSUM) && 1459 ((features & NETIF_F_IPV6_CSUM) &&
1460 protocol == htons(ETH_P_IPV6))); 1460 protocol == htons(ETH_P_IPV6)) ||
1461 ((features & NETIF_F_FCOE_CRC) &&
1462 protocol == htons(ETH_P_FCOE)));
1461} 1463}
1462 1464
1463static bool dev_can_checksum(struct net_device *dev, struct sk_buff *skb) 1465static bool dev_can_checksum(struct net_device *dev, struct sk_buff *skb)
diff --git a/net/ipv4/af_inet.c b/net/ipv4/af_inet.c
index d5aaabbb7cb3..7f03373b8c07 100644
--- a/net/ipv4/af_inet.c
+++ b/net/ipv4/af_inet.c
@@ -1375,10 +1375,10 @@ EXPORT_SYMBOL_GPL(snmp_fold_field);
1375int snmp_mib_init(void *ptr[2], size_t mibsize) 1375int snmp_mib_init(void *ptr[2], size_t mibsize)
1376{ 1376{
1377 BUG_ON(ptr == NULL); 1377 BUG_ON(ptr == NULL);
1378 ptr[0] = __alloc_percpu(mibsize); 1378 ptr[0] = __alloc_percpu(mibsize, __alignof__(unsigned long long));
1379 if (!ptr[0]) 1379 if (!ptr[0])
1380 goto err0; 1380 goto err0;
1381 ptr[1] = __alloc_percpu(mibsize); 1381 ptr[1] = __alloc_percpu(mibsize, __alignof__(unsigned long long));
1382 if (!ptr[1]) 1382 if (!ptr[1])
1383 goto err1; 1383 goto err1;
1384 return 0; 1384 return 0;
diff --git a/net/ipv4/route.c b/net/ipv4/route.c
index 5caee609be06..c40debe51b38 100644
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -3377,7 +3377,7 @@ int __init ip_rt_init(void)
3377 int rc = 0; 3377 int rc = 0;
3378 3378
3379#ifdef CONFIG_NET_CLS_ROUTE 3379#ifdef CONFIG_NET_CLS_ROUTE
3380 ip_rt_acct = __alloc_percpu(256 * sizeof(struct ip_rt_acct)); 3380 ip_rt_acct = __alloc_percpu(256 * sizeof(struct ip_rt_acct), __alignof__(struct ip_rt_acct));
3381 if (!ip_rt_acct) 3381 if (!ip_rt_acct)
3382 panic("IP: failed to allocate ip_rt_acct\n"); 3382 panic("IP: failed to allocate ip_rt_acct\n");
3383#endif 3383#endif
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index c18fa150b6fe..979619574f70 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -186,3 +186,17 @@ quiet_cmd_gzip = GZIP $@
186cmd_gzip = gzip -f -9 < $< > $@ 186cmd_gzip = gzip -f -9 < $< > $@
187 187
188 188
189# Bzip2
190# ---------------------------------------------------------------------------
191
192# Bzip2 does not include size in file... so we have to fake that
193size_append=$(CONFIG_SHELL) $(srctree)/scripts/bin_size
194
195quiet_cmd_bzip2 = BZIP2 $@
196cmd_bzip2 = (bzip2 -9 < $< && $(size_append) $<) > $@ || (rm -f $@ ; false)
197
198# Lzma
199# ---------------------------------------------------------------------------
200
201quiet_cmd_lzma = LZMA $@
202cmd_lzma = (lzma -9 -c $< && $(size_append) $<) >$@ || (rm -f $@ ; false)
diff --git a/scripts/bin_size b/scripts/bin_size
new file mode 100644
index 000000000000..43e1b360cee6
--- /dev/null
+++ b/scripts/bin_size
@@ -0,0 +1,10 @@
1#!/bin/sh
2
3if [ $# = 0 ] ; then
4 echo Usage: $0 file
5fi
6
7size_dec=`stat -c "%s" $1`
8size_hex_echo_string=`printf "%08x" $size_dec |
9 sed 's/\(..\)\(..\)\(..\)\(..\)/\\\\x\4\\\\x\3\\\\x\2\\\\x\1/g'`
10/bin/echo -ne $size_hex_echo_string
diff --git a/scripts/gcc-x86_32-has-stack-protector.sh b/scripts/gcc-x86_32-has-stack-protector.sh
new file mode 100644
index 000000000000..29493dc4528d
--- /dev/null
+++ b/scripts/gcc-x86_32-has-stack-protector.sh
@@ -0,0 +1,8 @@
1#!/bin/sh
2
3echo "int foo(void) { char X[200]; return 3; }" | $* -S -xc -c -O0 -fstack-protector - -o - 2> /dev/null | grep -q "%gs"
4if [ "$?" -eq "0" ] ; then
5 echo y
6else
7 echo n
8fi
diff --git a/scripts/gcc-x86_64-has-stack-protector.sh b/scripts/gcc-x86_64-has-stack-protector.sh
index 325c0a1b03b6..afaec618b395 100644
--- a/scripts/gcc-x86_64-has-stack-protector.sh
+++ b/scripts/gcc-x86_64-has-stack-protector.sh
@@ -1,6 +1,8 @@
1#!/bin/sh 1#!/bin/sh
2 2
3echo "int foo(void) { char X[200]; return 3; }" | $1 -S -xc -c -O0 -mcmodel=kernel -fstack-protector - -o - 2> /dev/null | grep -q "%gs" 3echo "int foo(void) { char X[200]; return 3; }" | $* -S -xc -c -O0 -mcmodel=kernel -fstack-protector - -o - 2> /dev/null | grep -q "%gs"
4if [ "$?" -eq "0" ] ; then 4if [ "$?" -eq "0" ] ; then
5 echo $2 5 echo y
6else
7 echo n
6fi 8fi
diff --git a/scripts/gen_initramfs_list.sh b/scripts/gen_initramfs_list.sh
index 5f3415f28736..3eea8f15131b 100644
--- a/scripts/gen_initramfs_list.sh
+++ b/scripts/gen_initramfs_list.sh
@@ -5,7 +5,7 @@
5# Released under the terms of the GNU GPL 5# Released under the terms of the GNU GPL
6# 6#
7# Generate a cpio packed initramfs. It uses gen_init_cpio to generate 7# Generate a cpio packed initramfs. It uses gen_init_cpio to generate
8# the cpio archive, and gzip to pack it. 8# the cpio archive, and then compresses it.
9# The script may also be used to generate the inputfile used for gen_init_cpio 9# The script may also be used to generate the inputfile used for gen_init_cpio
10# This script assumes that gen_init_cpio is located in usr/ directory 10# This script assumes that gen_init_cpio is located in usr/ directory
11 11
@@ -16,8 +16,8 @@ usage() {
16cat << EOF 16cat << EOF
17Usage: 17Usage:
18$0 [-o <file>] [-u <uid>] [-g <gid>] {-d | <cpio_source>} ... 18$0 [-o <file>] [-u <uid>] [-g <gid>] {-d | <cpio_source>} ...
19 -o <file> Create gzipped initramfs file named <file> using 19 -o <file> Create compressed initramfs file named <file> using
20 gen_init_cpio and gzip 20 gen_init_cpio and compressor depending on the extension
21 -u <uid> User ID to map to user ID 0 (root). 21 -u <uid> User ID to map to user ID 0 (root).
22 <uid> is only meaningful if <cpio_source> is a 22 <uid> is only meaningful if <cpio_source> is a
23 directory. "squash" forces all files to uid 0. 23 directory. "squash" forces all files to uid 0.
@@ -225,6 +225,7 @@ cpio_list=
225output="/dev/stdout" 225output="/dev/stdout"
226output_file="" 226output_file=""
227is_cpio_compressed= 227is_cpio_compressed=
228compr="gzip -9 -f"
228 229
229arg="$1" 230arg="$1"
230case "$arg" in 231case "$arg" in
@@ -233,11 +234,15 @@ case "$arg" in
233 echo "deps_initramfs := \\" 234 echo "deps_initramfs := \\"
234 shift 235 shift
235 ;; 236 ;;
236 "-o") # generate gzipped cpio image named $1 237 "-o") # generate compressed cpio image named $1
237 shift 238 shift
238 output_file="$1" 239 output_file="$1"
239 cpio_list="$(mktemp ${TMPDIR:-/tmp}/cpiolist.XXXXXX)" 240 cpio_list="$(mktemp ${TMPDIR:-/tmp}/cpiolist.XXXXXX)"
240 output=${cpio_list} 241 output=${cpio_list}
242 echo "$output_file" | grep -q "\.gz$" && compr="gzip -9 -f"
243 echo "$output_file" | grep -q "\.bz2$" && compr="bzip2 -9 -f"
244 echo "$output_file" | grep -q "\.lzma$" && compr="lzma -9 -f"
245 echo "$output_file" | grep -q "\.cpio$" && compr="cat"
241 shift 246 shift
242 ;; 247 ;;
243esac 248esac
@@ -274,7 +279,7 @@ while [ $# -gt 0 ]; do
274 esac 279 esac
275done 280done
276 281
277# If output_file is set we will generate cpio archive and gzip it 282# If output_file is set we will generate cpio archive and compress it
278# we are carefull to delete tmp files 283# we are carefull to delete tmp files
279if [ ! -z ${output_file} ]; then 284if [ ! -z ${output_file} ]; then
280 if [ -z ${cpio_file} ]; then 285 if [ -z ${cpio_file} ]; then
@@ -287,7 +292,8 @@ if [ ! -z ${output_file} ]; then
287 if [ "${is_cpio_compressed}" = "compressed" ]; then 292 if [ "${is_cpio_compressed}" = "compressed" ]; then
288 cat ${cpio_tfile} > ${output_file} 293 cat ${cpio_tfile} > ${output_file}
289 else 294 else
290 cat ${cpio_tfile} | gzip -f -9 - > ${output_file} 295 (cat ${cpio_tfile} | ${compr} - > ${output_file}) \
296 || (rm -f ${output_file} ; false)
291 fi 297 fi
292 [ -z ${cpio_file} ] && rm ${cpio_tfile} 298 [ -z ${cpio_file} ] && rm ${cpio_tfile}
293fi 299fi
diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
index 88921611b22e..7e62303133dc 100644
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
@@ -415,8 +415,9 @@ static int parse_elf(struct elf_info *info, const char *filename)
415 const char *secstrings 415 const char *secstrings
416 = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; 416 = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
417 const char *secname; 417 const char *secname;
418 int nobits = sechdrs[i].sh_type == SHT_NOBITS;
418 419
419 if (sechdrs[i].sh_offset > info->size) { 420 if (!nobits && sechdrs[i].sh_offset > info->size) {
420 fatal("%s is truncated. sechdrs[i].sh_offset=%lu > " 421 fatal("%s is truncated. sechdrs[i].sh_offset=%lu > "
421 "sizeof(*hrd)=%zu\n", filename, 422 "sizeof(*hrd)=%zu\n", filename,
422 (unsigned long)sechdrs[i].sh_offset, 423 (unsigned long)sechdrs[i].sh_offset,
@@ -425,6 +426,8 @@ static int parse_elf(struct elf_info *info, const char *filename)
425 } 426 }
426 secname = secstrings + sechdrs[i].sh_name; 427 secname = secstrings + sechdrs[i].sh_name;
427 if (strcmp(secname, ".modinfo") == 0) { 428 if (strcmp(secname, ".modinfo") == 0) {
429 if (nobits)
430 fatal("%s has NOBITS .modinfo\n", filename);
428 info->modinfo = (void *)hdr + sechdrs[i].sh_offset; 431 info->modinfo = (void *)hdr + sechdrs[i].sh_offset;
429 info->modinfo_len = sechdrs[i].sh_size; 432 info->modinfo_len = sechdrs[i].sh_size;
430 } else if (strcmp(secname, "__ksymtab") == 0) 433 } else if (strcmp(secname, "__ksymtab") == 0)
diff --git a/sound/drivers/Kconfig b/sound/drivers/Kconfig
index 0bcf14640fde..84714a65e5c8 100644
--- a/sound/drivers/Kconfig
+++ b/sound/drivers/Kconfig
@@ -33,7 +33,7 @@ if SND_DRIVERS
33 33
34config SND_PCSP 34config SND_PCSP
35 tristate "PC-Speaker support (READ HELP!)" 35 tristate "PC-Speaker support (READ HELP!)"
36 depends on PCSPKR_PLATFORM && X86_PC && HIGH_RES_TIMERS 36 depends on PCSPKR_PLATFORM && X86 && HIGH_RES_TIMERS
37 depends on INPUT 37 depends on INPUT
38 depends on EXPERIMENTAL 38 depends on EXPERIMENTAL
39 select SND_PCM 39 select SND_PCM
diff --git a/usr/Kconfig b/usr/Kconfig
index 86cecb59dd07..43a3a0fe8f29 100644
--- a/usr/Kconfig
+++ b/usr/Kconfig
@@ -44,3 +44,92 @@ config INITRAMFS_ROOT_GID
44 owned by group root in the initial ramdisk image. 44 owned by group root in the initial ramdisk image.
45 45
46 If you are not sure, leave it set to "0". 46 If you are not sure, leave it set to "0".
47
48config RD_GZIP
49 bool "Initial ramdisk compressed using gzip"
50 default y
51 depends on BLK_DEV_INITRD=y
52 select DECOMPRESS_GZIP
53 help
54 Support loading of a gzip encoded initial ramdisk or cpio buffer.
55 If unsure, say Y.
56
57config RD_BZIP2
58 bool "Initial ramdisk compressed using bzip2"
59 default n
60 depends on BLK_DEV_INITRD=y
61 select DECOMPRESS_BZIP2
62 help
63 Support loading of a bzip2 encoded initial ramdisk or cpio buffer
64 If unsure, say N.
65
66config RD_LZMA
67 bool "Initial ramdisk compressed using lzma"
68 default n
69 depends on BLK_DEV_INITRD=y
70 select DECOMPRESS_LZMA
71 help
72 Support loading of a lzma encoded initial ramdisk or cpio buffer
73 If unsure, say N.
74
75choice
76 prompt "Built-in initramfs compression mode"
77 help
78 This setting is only meaningful if the INITRAMFS_SOURCE is
79 set. It decides by which algorithm the INITRAMFS_SOURCE will
80 be compressed.
81 Several compression algorithms are available, which differ
82 in efficiency, compression and decompression speed.
83 Compression speed is only relevant when building a kernel.
84 Decompression speed is relevant at each boot.
85
86 If you have any problems with bzip2 or lzma compressed
87 initramfs, mail me (Alain Knaff) <alain@knaff.lu>.
88
89 High compression options are mostly useful for users who
90 are low on disk space (embedded systems), but for whom ram
91 size matters less.
92
93 If in doubt, select 'gzip'
94
95config INITRAMFS_COMPRESSION_NONE
96 bool "None"
97 help
98 Do not compress the built-in initramfs at all. This may
99 sound wasteful in space, but, you should be aware that the
100 built-in initramfs will be compressed at a later stage
101 anyways along with the rest of the kernel, on those
102 architectures that support this.
103 However, not compressing the initramfs may lead to slightly
104 higher memory consumption during a short time at boot, while
105 both the cpio image and the unpacked filesystem image will
106 be present in memory simultaneously
107
108config INITRAMFS_COMPRESSION_GZIP
109 bool "Gzip"
110 depends on RD_GZIP
111 help
112 The old and tried gzip compression. Its compression ratio is
113 the poorest among the 3 choices; however its speed (both
114 compression and decompression) is the fastest.
115
116config INITRAMFS_COMPRESSION_BZIP2
117 bool "Bzip2"
118 depends on RD_BZIP2
119 help
120 Its compression ratio and speed is intermediate.
121 Decompression speed is slowest among the three. The initramfs
122 size is about 10% smaller with bzip2, in comparison to gzip.
123 Bzip2 uses a large amount of memory. For modern kernels you
124 will need at least 8MB RAM or more for booting.
125
126config INITRAMFS_COMPRESSION_LZMA
127 bool "LZMA"
128 depends on RD_LZMA
129 help
130 The most recent compression algorithm.
131 Its ratio is best, decompression speed is between the other
132 two. Compression is slowest. The initramfs size is about 33%
133 smaller with LZMA in comparison to gzip.
134
135endchoice
diff --git a/usr/Makefile b/usr/Makefile
index 201f27f8cbaf..b84894b3929d 100644
--- a/usr/Makefile
+++ b/usr/Makefile
@@ -6,13 +6,25 @@ klibcdirs:;
6PHONY += klibcdirs 6PHONY += klibcdirs
7 7
8 8
9# No compression
10suffix_$(CONFIG_INITRAMFS_COMPRESSION_NONE) =
11
12# Gzip, but no bzip2
13suffix_$(CONFIG_INITRAMFS_COMPRESSION_GZIP) = .gz
14
15# Bzip2
16suffix_$(CONFIG_INITRAMFS_COMPRESSION_BZIP2) = .bz2
17
18# Lzma
19suffix_$(CONFIG_INITRAMFS_COMPRESSION_LZMA) = .lzma
20
9# Generate builtin.o based on initramfs_data.o 21# Generate builtin.o based on initramfs_data.o
10obj-$(CONFIG_BLK_DEV_INITRD) := initramfs_data.o 22obj-$(CONFIG_BLK_DEV_INITRD) := initramfs_data$(suffix_y).o
11 23
12# initramfs_data.o contains the initramfs_data.cpio.gz image. 24# initramfs_data.o contains the compressed initramfs_data.cpio image.
13# The image is included using .incbin, a dependency which is not 25# The image is included using .incbin, a dependency which is not
14# tracked automatically. 26# tracked automatically.
15$(obj)/initramfs_data.o: $(obj)/initramfs_data.cpio.gz FORCE 27$(obj)/initramfs_data$(suffix_y).o: $(obj)/initramfs_data.cpio$(suffix_y) FORCE
16 28
17##### 29#####
18# Generate the initramfs cpio archive 30# Generate the initramfs cpio archive
@@ -25,28 +37,28 @@ ramfs-args := \
25 $(if $(CONFIG_INITRAMFS_ROOT_UID), -u $(CONFIG_INITRAMFS_ROOT_UID)) \ 37 $(if $(CONFIG_INITRAMFS_ROOT_UID), -u $(CONFIG_INITRAMFS_ROOT_UID)) \
26 $(if $(CONFIG_INITRAMFS_ROOT_GID), -g $(CONFIG_INITRAMFS_ROOT_GID)) 38 $(if $(CONFIG_INITRAMFS_ROOT_GID), -g $(CONFIG_INITRAMFS_ROOT_GID))
27 39
28# .initramfs_data.cpio.gz.d is used to identify all files included 40# .initramfs_data.cpio.d is used to identify all files included
29# in initramfs and to detect if any files are added/removed. 41# in initramfs and to detect if any files are added/removed.
30# Removed files are identified by directory timestamp being updated 42# Removed files are identified by directory timestamp being updated
31# The dependency list is generated by gen_initramfs.sh -l 43# The dependency list is generated by gen_initramfs.sh -l
32ifneq ($(wildcard $(obj)/.initramfs_data.cpio.gz.d),) 44ifneq ($(wildcard $(obj)/.initramfs_data.cpio.d),)
33 include $(obj)/.initramfs_data.cpio.gz.d 45 include $(obj)/.initramfs_data.cpio.d
34endif 46endif
35 47
36quiet_cmd_initfs = GEN $@ 48quiet_cmd_initfs = GEN $@
37 cmd_initfs = $(initramfs) -o $@ $(ramfs-args) $(ramfs-input) 49 cmd_initfs = $(initramfs) -o $@ $(ramfs-args) $(ramfs-input)
38 50
39targets := initramfs_data.cpio.gz 51targets := initramfs_data.cpio.gz initramfs_data.cpio.bz2 initramfs_data.cpio.lzma initramfs_data.cpio
40# do not try to update files included in initramfs 52# do not try to update files included in initramfs
41$(deps_initramfs): ; 53$(deps_initramfs): ;
42 54
43$(deps_initramfs): klibcdirs 55$(deps_initramfs): klibcdirs
44# We rebuild initramfs_data.cpio.gz if: 56# We rebuild initramfs_data.cpio if:
45# 1) Any included file is newer then initramfs_data.cpio.gz 57# 1) Any included file is newer then initramfs_data.cpio
46# 2) There are changes in which files are included (added or deleted) 58# 2) There are changes in which files are included (added or deleted)
47# 3) If gen_init_cpio are newer than initramfs_data.cpio.gz 59# 3) If gen_init_cpio are newer than initramfs_data.cpio
48# 4) arguments to gen_initramfs.sh changes 60# 4) arguments to gen_initramfs.sh changes
49$(obj)/initramfs_data.cpio.gz: $(obj)/gen_init_cpio $(deps_initramfs) klibcdirs 61$(obj)/initramfs_data.cpio$(suffix_y): $(obj)/gen_init_cpio $(deps_initramfs) klibcdirs
50 $(Q)$(initramfs) -l $(ramfs-input) > $(obj)/.initramfs_data.cpio.gz.d 62 $(Q)$(initramfs) -l $(ramfs-input) > $(obj)/.initramfs_data.cpio.d
51 $(call if_changed,initfs) 63 $(call if_changed,initfs)
52 64
diff --git a/usr/initramfs_data.S b/usr/initramfs_data.S
index c2e1ad424f4a..7c6973d8d829 100644
--- a/usr/initramfs_data.S
+++ b/usr/initramfs_data.S
@@ -26,5 +26,5 @@ SECTIONS
26*/ 26*/
27 27
28.section .init.ramfs,"a" 28.section .init.ramfs,"a"
29.incbin "usr/initramfs_data.cpio.gz" 29.incbin "usr/initramfs_data.cpio"
30 30
diff --git a/usr/initramfs_data.bz2.S b/usr/initramfs_data.bz2.S
new file mode 100644
index 000000000000..bc54d090365c
--- /dev/null
+++ b/usr/initramfs_data.bz2.S
@@ -0,0 +1,29 @@
1/*
2 initramfs_data includes the compressed binary that is the
3 filesystem used for early user space.
4 Note: Older versions of "as" (prior to binutils 2.11.90.0.23
5 released on 2001-07-14) dit not support .incbin.
6 If you are forced to use older binutils than that then the
7 following trick can be applied to create the resulting binary:
8
9
10 ld -m elf_i386 --format binary --oformat elf32-i386 -r \
11 -T initramfs_data.scr initramfs_data.cpio.gz -o initramfs_data.o
12 ld -m elf_i386 -r -o built-in.o initramfs_data.o
13
14 initramfs_data.scr looks like this:
15SECTIONS
16{
17 .init.ramfs : { *(.data) }
18}
19
20 The above example is for i386 - the parameters vary from architectures.
21 Eventually look up LDFLAGS_BLOB in an older version of the
22 arch/$(ARCH)/Makefile to see the flags used before .incbin was introduced.
23
24 Using .incbin has the advantage over ld that the correct flags are set
25 in the ELF header, as required by certain architectures.
26*/
27
28.section .init.ramfs,"a"
29.incbin "usr/initramfs_data.cpio.bz2"
diff --git a/usr/initramfs_data.gz.S b/usr/initramfs_data.gz.S
new file mode 100644
index 000000000000..890c8dd1d6bd
--- /dev/null
+++ b/usr/initramfs_data.gz.S
@@ -0,0 +1,29 @@
1/*
2 initramfs_data includes the compressed binary that is the
3 filesystem used for early user space.
4 Note: Older versions of "as" (prior to binutils 2.11.90.0.23
5 released on 2001-07-14) dit not support .incbin.
6 If you are forced to use older binutils than that then the
7 following trick can be applied to create the resulting binary:
8
9
10 ld -m elf_i386 --format binary --oformat elf32-i386 -r \
11 -T initramfs_data.scr initramfs_data.cpio.gz -o initramfs_data.o
12 ld -m elf_i386 -r -o built-in.o initramfs_data.o
13
14 initramfs_data.scr looks like this:
15SECTIONS
16{
17 .init.ramfs : { *(.data) }
18}
19
20 The above example is for i386 - the parameters vary from architectures.
21 Eventually look up LDFLAGS_BLOB in an older version of the
22 arch/$(ARCH)/Makefile to see the flags used before .incbin was introduced.
23
24 Using .incbin has the advantage over ld that the correct flags are set
25 in the ELF header, as required by certain architectures.
26*/
27
28.section .init.ramfs,"a"
29.incbin "usr/initramfs_data.cpio.gz"
diff --git a/usr/initramfs_data.lzma.S b/usr/initramfs_data.lzma.S
new file mode 100644
index 000000000000..e11469e48562
--- /dev/null
+++ b/usr/initramfs_data.lzma.S
@@ -0,0 +1,29 @@
1/*
2 initramfs_data includes the compressed binary that is the
3 filesystem used for early user space.
4 Note: Older versions of "as" (prior to binutils 2.11.90.0.23
5 released on 2001-07-14) dit not support .incbin.
6 If you are forced to use older binutils than that then the
7 following trick can be applied to create the resulting binary:
8
9
10 ld -m elf_i386 --format binary --oformat elf32-i386 -r \
11 -T initramfs_data.scr initramfs_data.cpio.gz -o initramfs_data.o
12 ld -m elf_i386 -r -o built-in.o initramfs_data.o
13
14 initramfs_data.scr looks like this:
15SECTIONS
16{
17 .init.ramfs : { *(.data) }
18}
19
20 The above example is for i386 - the parameters vary from architectures.
21 Eventually look up LDFLAGS_BLOB in an older version of the
22 arch/$(ARCH)/Makefile to see the flags used before .incbin was introduced.
23
24 Using .incbin has the advantage over ld that the correct flags are set
25 in the ELF header, as required by certain architectures.
26*/
27
28.section .init.ramfs,"a"
29.incbin "usr/initramfs_data.cpio.lzma"