2 files changed, 27 insertions, 10 deletions

diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 286c3ac6bdcc..531230b87976 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1,7 +1,7 @@
 /*
  * Freescale MPC85xx, MPC83xx DMA Engine support
  *
- * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved.
  *
  * Author:
  *   Zhang Wei <wei.zhang@freescale.com>, Jul 2007
@@ -1322,6 +1322,8 @@ static int __devinit fsldma_of_probe(struct platform_device *op,
         fdev->common.device_control = fsl_dma_device_control;
         fdev->common.dev = &op->dev;
 
+        dma_set_mask(&(op->dev), DMA_BIT_MASK(36));
+
         dev_set_drvdata(&op->dev, fdev);
 
         /*
diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c
index 3109bd94bc4f..5397d8535e0a 100644
--- a/drivers/dma/intel_mid_dma.c
+++ b/drivers/dma/intel_mid_dma.c
@@ -664,11 +664,20 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_memcpy(
         /*calculate CTL_LO*/
         ctl_lo.ctl_lo = 0;
         ctl_lo.ctlx.int_en = 1;
-        ctl_lo.ctlx.dst_tr_width = mids->dma_slave.dst_addr_width;
-        ctl_lo.ctlx.src_tr_width = mids->dma_slave.src_addr_width;
         ctl_lo.ctlx.dst_msize = mids->dma_slave.src_maxburst;
         ctl_lo.ctlx.src_msize = mids->dma_slave.dst_maxburst;
 
+        /*
+         * Here we need some translation from "enum dma_slave_buswidth"
+         * to the format for our dma controller
+         *              standard        intel_mid_dmac's format
+         *               1 Byte                 0b000
+         *               2 Bytes                0b001
+         *               4 Bytes                0b010
+         */
+        ctl_lo.ctlx.dst_tr_width = mids->dma_slave.dst_addr_width / 2;
+        ctl_lo.ctlx.src_tr_width = mids->dma_slave.src_addr_width / 2;
+
         if (mids->cfg_mode == LNW_DMA_MEM_TO_MEM) {
                 ctl_lo.ctlx.tt_fc = 0;
                 ctl_lo.ctlx.sinc = 0;
@@ -746,8 +755,18 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg(
         BUG_ON(!mids);
 
         if (!midc->dma->pimr_mask) {
-                pr_debug("MDMA: SG list is not supported by this controller\n");
-                return  NULL;
+                /* We can still handle sg list with only one item */
+                if (sg_len == 1) {
+                        txd = intel_mid_dma_prep_memcpy(chan,
+                                                mids->dma_slave.dst_addr,
+                                                mids->dma_slave.src_addr,
+                                                sgl->length,
+                                                flags);
+                        return txd;
+                } else {
+                        pr_warn("MDMA: SG list is not supported by this controller\n");
+                        return  NULL;
+                }
         }
 
         pr_debug("MDMA: SG Length = %d, direction = %d, Flags = %#lx\n",
@@ -758,6 +777,7 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg(
                 pr_err("MDMA: Prep memcpy failed\n");
                 return NULL;
         }
+
         desc = to_intel_mid_dma_desc(txd);
         desc->dirn = direction;
         ctl_lo.ctl_lo = desc->ctl_lo;
@@ -1021,11 +1041,6 @@ static irqreturn_t intel_mid_dma_interrupt(int irq, void *data)
 
         /*DMA Interrupt*/
         pr_debug("MDMA:Got an interrupt on irq %d\n", irq);
-        if (!mid) {
-                pr_err("ERR_MDMA:null pointer mid\n");
-                return -EINVAL;
-        }
-
         pr_debug("MDMA: Status %x, Mask %x\n", tfr_status, mid->intr_mask);
         tfr_status &= mid->intr_mask;
         if (tfr_status) {