diff options
-rw-r--r-- | arch/arm/plat-mxc/ehci.c | 26 |
1 files changed, 18 insertions, 8 deletions
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c index d59f5feb3c54..a45660301b08 100644 --- a/arch/arm/plat-mxc/ehci.c +++ b/arch/arm/plat-mxc/ehci.c | |||
@@ -278,10 +278,13 @@ int mxc_initialize_usb_hw(int port, unsigned int flags) | |||
278 | if (flags & MXC_EHCI_INTERNAL_PHY) { | 278 | if (flags & MXC_EHCI_INTERNAL_PHY) { |
279 | v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); | 279 | v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); |
280 | 280 | ||
281 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) | 281 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) { |
282 | v |= (MXC_OTG_PHYCTRL_OC_DIS_BIT | MXC_OTG_UCTRL_OPM_BIT); /* OC/USBPWR is not used */ | 282 | /* OC/USBPWR is not used */ |
283 | else | 283 | v |= MXC_OTG_PHYCTRL_OC_DIS_BIT; |
284 | v &= ~(MXC_OTG_PHYCTRL_OC_DIS_BIT | MXC_OTG_UCTRL_OPM_BIT); /* OC/USBPWR is used */ | 284 | } else { |
285 | /* OC/USBPWR is used */ | ||
286 | v &= ~MXC_OTG_PHYCTRL_OC_DIS_BIT; | ||
287 | } | ||
285 | __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); | 288 | __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); |
286 | 289 | ||
287 | v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET); | 290 | v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET); |
@@ -289,16 +292,23 @@ int mxc_initialize_usb_hw(int port, unsigned int flags) | |||
289 | v |= MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup enable */ | 292 | v |= MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup enable */ |
290 | else | 293 | else |
291 | v &= ~MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup disable */ | 294 | v &= ~MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup disable */ |
295 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) | ||
296 | v |= MXC_OTG_UCTRL_OPM_BIT; | ||
297 | else | ||
298 | v &= ~MXC_OTG_UCTRL_OPM_BIT; | ||
292 | __raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET); | 299 | __raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET); |
293 | } | 300 | } |
294 | break; | 301 | break; |
295 | case 1: /* Host 1 */ | 302 | case 1: /* Host 1 */ |
296 | /*Host ULPI */ | 303 | /*Host ULPI */ |
297 | v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET); | 304 | v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET); |
298 | if (flags & MXC_EHCI_WAKEUP_ENABLED) | 305 | if (flags & MXC_EHCI_WAKEUP_ENABLED) { |
299 | v &= ~(MXC_H1_UCTRL_H1WIE_BIT | MXC_H1_UCTRL_H1UIE_BIT);/* HOST1 wakeup/ULPI intr disable */ | 306 | /* HOST1 wakeup/ULPI intr enable */ |
300 | else | 307 | v |= (MXC_H1_UCTRL_H1WIE_BIT | MXC_H1_UCTRL_H1UIE_BIT); |
301 | v &= ~(MXC_H1_UCTRL_H1WIE_BIT | MXC_H1_UCTRL_H1UIE_BIT);/* HOST1 wakeup/ULPI intr disable */ | 308 | } else { |
309 | /* HOST1 wakeup/ULPI intr disable */ | ||
310 | v &= ~(MXC_H1_UCTRL_H1WIE_BIT | MXC_H1_UCTRL_H1UIE_BIT); | ||
311 | } | ||
302 | 312 | ||
303 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) | 313 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) |
304 | v &= ~MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used*/ | 314 | v &= ~MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used*/ |