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-rw-r--r--Documentation/feature-removal-schedule.txt7
-rw-r--r--Documentation/i2c/busses/i2c-i81047
-rw-r--r--Documentation/i2c/busses/i2c-prosavage23
-rw-r--r--Documentation/i2c/busses/i2c-savage426
-rw-r--r--drivers/i2c/busses/Kconfig52
-rw-r--r--drivers/i2c/busses/Makefile3
-rw-r--r--drivers/i2c/busses/i2c-i810.c260
-rw-r--r--drivers/i2c/busses/i2c-prosavage.c325
-rw-r--r--drivers/i2c/busses/i2c-savage4.c185
-rw-r--r--include/linux/i2c-id.h1
10 files changed, 0 insertions, 929 deletions
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt
index 46ece3fba6f9..65a1482457a8 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -222,13 +222,6 @@ Who: Thomas Gleixner <tglx@linutronix.de>
222 222
223--------------------------- 223---------------------------
224 224
225What: i2c-i810, i2c-prosavage and i2c-savage4
226When: May 2008
227Why: These drivers are superseded by i810fb, intelfb and savagefb.
228Who: Jean Delvare <khali@linux-fr.org>
229
230---------------------------
231
232What (Why): 225What (Why):
233 - include/linux/netfilter_ipv4/ipt_TOS.h ipt_tos.h header files 226 - include/linux/netfilter_ipv4/ipt_TOS.h ipt_tos.h header files
234 (superseded by xt_TOS/xt_tos target & match) 227 (superseded by xt_TOS/xt_tos target & match)
diff --git a/Documentation/i2c/busses/i2c-i810 b/Documentation/i2c/busses/i2c-i810
deleted file mode 100644
index 778210ee1583..000000000000
--- a/Documentation/i2c/busses/i2c-i810
+++ /dev/null
@@ -1,47 +0,0 @@
1Kernel driver i2c-i810
2
3Supported adapters:
4 * Intel 82810, 82810-DC100, 82810E, and 82815 (GMCH)
5 * Intel 82845G (GMCH)
6
7Authors:
8 Frodo Looijaard <frodol@dds.nl>,
9 Philip Edelbrock <phil@netroedge.com>,
10 Kyösti Mälkki <kmalkki@cc.hut.fi>,
11 Ralph Metzler <rjkm@thp.uni-koeln.de>,
12 Mark D. Studebaker <mdsxyz123@yahoo.com>
13
14Main contact: Mark Studebaker <mdsxyz123@yahoo.com>
15
16Description
17-----------
18
19WARNING: If you have an '810' or '815' motherboard, your standard I2C
20temperature sensors are most likely on the 801's I2C bus. You want the
21i2c-i801 driver for those, not this driver.
22
23Now for the i2c-i810...
24
25The GMCH chip contains two I2C interfaces.
26
27The first interface is used for DDC (Data Display Channel) which is a
28serial channel through the VGA monitor connector to a DDC-compliant
29monitor. This interface is defined by the Video Electronics Standards
30Association (VESA). The standards are available for purchase at
31http://www.vesa.org .
32
33The second interface is a general-purpose I2C bus. It may be connected to a
34TV-out chip such as the BT869 or possibly to a digital flat-panel display.
35
36Features
37--------
38
39Both busses use the i2c-algo-bit driver for 'bit banging'
40and support for specific transactions is provided by i2c-algo-bit.
41
42Issues
43------
44
45If you enable bus testing in i2c-algo-bit (insmod i2c-algo-bit bit_test=1),
46the test may fail; if so, the i2c-i810 driver won't be inserted. However,
47we think this has been fixed.
diff --git a/Documentation/i2c/busses/i2c-prosavage b/Documentation/i2c/busses/i2c-prosavage
deleted file mode 100644
index 703687902511..000000000000
--- a/Documentation/i2c/busses/i2c-prosavage
+++ /dev/null
@@ -1,23 +0,0 @@
1Kernel driver i2c-prosavage
2
3Supported adapters:
4
5 S3/VIA KM266/VT8375 aka ProSavage8
6 S3/VIA KM133/VT8365 aka Savage4
7
8Author: Henk Vergonet <henk@god.dyndns.org>
9
10Description
11-----------
12
13The Savage4 chips contain two I2C interfaces (aka a I2C 'master' or
14'host').
15
16The first interface is used for DDC (Data Display Channel) which is a
17serial channel through the VGA monitor connector to a DDC-compliant
18monitor. This interface is defined by the Video Electronics Standards
19Association (VESA). The standards are available for purchase at
20http://www.vesa.org . The second interface is a general-purpose I2C bus.
21
22Usefull for gaining access to the TV Encoder chips.
23
diff --git a/Documentation/i2c/busses/i2c-savage4 b/Documentation/i2c/busses/i2c-savage4
deleted file mode 100644
index 6ecceab618d3..000000000000
--- a/Documentation/i2c/busses/i2c-savage4
+++ /dev/null
@@ -1,26 +0,0 @@
1Kernel driver i2c-savage4
2
3Supported adapters:
4 * Savage4
5 * Savage2000
6
7Authors:
8 Alexander Wold <awold@bigfoot.com>,
9 Mark D. Studebaker <mdsxyz123@yahoo.com>
10
11Description
12-----------
13
14The Savage4 chips contain two I2C interfaces (aka a I2C 'master'
15or 'host').
16
17The first interface is used for DDC (Data Display Channel) which is a
18serial channel through the VGA monitor connector to a DDC-compliant
19monitor. This interface is defined by the Video Electronics Standards
20Association (VESA). The standards are available for purchase at
21http://www.vesa.org . The DDC bus is not yet supported because its register
22is not directly memory-mapped.
23
24The second interface is a general-purpose I2C bus. This is the only
25interface supported by the driver at the moment.
26
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 00d76e13588f..b7cce9211838 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -186,26 +186,6 @@ config I2C_I801
186 This driver can also be built as a module. If so, the module 186 This driver can also be built as a module. If so, the module
187 will be called i2c-i801. 187 will be called i2c-i801.
188 188
189config I2C_I810
190 tristate "Intel 810/815 (DEPRECATED)"
191 default n
192 depends on PCI
193 select I2C_ALGOBIT
194 help
195 If you say yes to this option, support will be included for the Intel
196 810/815 family of mainboard I2C interfaces. Specifically, the
197 following versions of the chipset are supported:
198 i810AA
199 i810AB
200 i810E
201 i815
202 i845G
203
204 This driver is deprecated in favor of the i810fb and intelfb drivers.
205
206 This driver can also be built as a module. If so, the module
207 will be called i2c-i810.
208
209config I2C_PXA 189config I2C_PXA
210 tristate "Intel PXA2XX I2C adapter (EXPERIMENTAL)" 190 tristate "Intel PXA2XX I2C adapter (EXPERIMENTAL)"
211 depends on EXPERIMENTAL && ARCH_PXA 191 depends on EXPERIMENTAL && ARCH_PXA
@@ -402,24 +382,6 @@ config I2C_PASEMI
402 help 382 help
403 Supports the PA Semi PWRficient on-chip SMBus interfaces. 383 Supports the PA Semi PWRficient on-chip SMBus interfaces.
404 384
405config I2C_PROSAVAGE
406 tristate "S3/VIA (Pro)Savage (DEPRECATED)"
407 default n
408 depends on PCI
409 select I2C_ALGOBIT
410 help
411 If you say yes to this option, support will be included for the
412 I2C bus and DDC bus of the S3VIA embedded Savage4 and ProSavage8
413 graphics processors.
414 chipsets supported:
415 S3/VIA KM266/VT8375 aka ProSavage8
416 S3/VIA KM133/VT8365 aka Savage4
417
418 This driver is deprecated in favor of the savagefb driver.
419
420 This support is also available as a module. If so, the module
421 will be called i2c-prosavage.
422
423config I2C_S3C2410 385config I2C_S3C2410
424 tristate "S3C2410 I2C Driver" 386 tristate "S3C2410 I2C Driver"
425 depends on ARCH_S3C2410 387 depends on ARCH_S3C2410
@@ -427,20 +389,6 @@ config I2C_S3C2410
427 Say Y here to include support for I2C controller in the 389 Say Y here to include support for I2C controller in the
428 Samsung S3C2410 based System-on-Chip devices. 390 Samsung S3C2410 based System-on-Chip devices.
429 391
430config I2C_SAVAGE4
431 tristate "S3 Savage 4 (DEPRECATED)"
432 default n
433 depends on PCI
434 select I2C_ALGOBIT
435 help
436 If you say yes to this option, support will be included for the
437 S3 Savage 4 I2C interface.
438
439 This driver is deprecated in favor of the savagefb driver.
440
441 This driver can also be built as a module. If so, the module
442 will be called i2c-savage4.
443
444config I2C_SIBYTE 392config I2C_SIBYTE
445 tristate "SiByte SMBus interface" 393 tristate "SiByte SMBus interface"
446 depends on SIBYTE_SB1xxx_SOC 394 depends on SIBYTE_SB1xxx_SOC
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 8b0a8c257905..81bb407d24cc 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -16,7 +16,6 @@ obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
16obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o 16obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o
17obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o 17obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o
18obj-$(CONFIG_I2C_I801) += i2c-i801.o 18obj-$(CONFIG_I2C_I801) += i2c-i801.o
19obj-$(CONFIG_I2C_I810) += i2c-i810.o
20obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o 19obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
21obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o 20obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
22obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o 21obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
@@ -35,10 +34,8 @@ obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pca-platform.o
35obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o 34obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
36obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o 35obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
37obj-$(CONFIG_I2C_PNX) += i2c-pnx.o 36obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
38obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o
39obj-$(CONFIG_I2C_PXA) += i2c-pxa.o 37obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
40obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o 38obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
41obj-$(CONFIG_I2C_SAVAGE4) += i2c-savage4.o
42obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o 39obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o
43obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o 40obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
44obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o 41obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o
diff --git a/drivers/i2c/busses/i2c-i810.c b/drivers/i2c/busses/i2c-i810.c
deleted file mode 100644
index 42e8d94c276f..000000000000
--- a/drivers/i2c/busses/i2c-i810.c
+++ /dev/null
@@ -1,260 +0,0 @@
1/*
2 i2c-i810.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998, 1999, 2000 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 Ralph Metzler <rjkm@thp.uni-koeln.de>, and
7 Mark D. Studebaker <mdsxyz123@yahoo.com>
8
9 Based on code written by Ralph Metzler <rjkm@thp.uni-koeln.de> and
10 Simon Vogl
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25*/
26/*
27 This interfaces to the I810/I815 to provide access to
28 the DDC Bus and the I2C Bus.
29
30 SUPPORTED DEVICES PCI ID
31 i810AA 7121
32 i810AB 7123
33 i810E 7125
34 i815 1132
35 i845G 2562
36*/
37
38#include <linux/kernel.h>
39#include <linux/module.h>
40#include <linux/init.h>
41#include <linux/pci.h>
42#include <linux/i2c.h>
43#include <linux/i2c-algo-bit.h>
44#include <asm/io.h>
45
46/* GPIO register locations */
47#define I810_IOCONTROL_OFFSET 0x5000
48#define I810_HVSYNC 0x00 /* not used */
49#define I810_GPIOA 0x10
50#define I810_GPIOB 0x14
51
52/* bit locations in the registers */
53#define SCL_DIR_MASK 0x0001
54#define SCL_DIR 0x0002
55#define SCL_VAL_MASK 0x0004
56#define SCL_VAL_OUT 0x0008
57#define SCL_VAL_IN 0x0010
58#define SDA_DIR_MASK 0x0100
59#define SDA_DIR 0x0200
60#define SDA_VAL_MASK 0x0400
61#define SDA_VAL_OUT 0x0800
62#define SDA_VAL_IN 0x1000
63
64/* initialization states */
65#define INIT1 0x1
66#define INIT2 0x2
67#define INIT3 0x4
68
69/* delays */
70#define CYCLE_DELAY 10
71#define TIMEOUT (HZ / 2)
72
73static void __iomem *ioaddr;
74
75/* The i810 GPIO registers have individual masks for each bit
76 so we never have to read before writing. Nice. */
77
78static void bit_i810i2c_setscl(void *data, int val)
79{
80 writel((val ? SCL_VAL_OUT : 0) | SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK,
81 ioaddr + I810_GPIOB);
82 readl(ioaddr + I810_GPIOB); /* flush posted write */
83}
84
85static void bit_i810i2c_setsda(void *data, int val)
86{
87 writel((val ? SDA_VAL_OUT : 0) | SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK,
88 ioaddr + I810_GPIOB);
89 readl(ioaddr + I810_GPIOB); /* flush posted write */
90}
91
92/* The GPIO pins are open drain, so the pins could always remain outputs.
93 However, some chip versions don't latch the inputs unless they
94 are set as inputs.
95 We rely on the i2c-algo-bit routines to set the pins high before
96 reading the input from other chips. Following guidance in the 815
97 prog. ref. guide, we do a "dummy write" of 0 to the register before
98 reading which forces the input value to be latched. We presume this
99 applies to the 810 as well; shouldn't hurt anyway. This is necessary to get
100 i2c_algo_bit bit_test=1 to pass. */
101
102static int bit_i810i2c_getscl(void *data)
103{
104 writel(SCL_DIR_MASK, ioaddr + I810_GPIOB);
105 writel(0, ioaddr + I810_GPIOB);
106 return (0 != (readl(ioaddr + I810_GPIOB) & SCL_VAL_IN));
107}
108
109static int bit_i810i2c_getsda(void *data)
110{
111 writel(SDA_DIR_MASK, ioaddr + I810_GPIOB);
112 writel(0, ioaddr + I810_GPIOB);
113 return (0 != (readl(ioaddr + I810_GPIOB) & SDA_VAL_IN));
114}
115
116static void bit_i810ddc_setscl(void *data, int val)
117{
118 writel((val ? SCL_VAL_OUT : 0) | SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK,
119 ioaddr + I810_GPIOA);
120 readl(ioaddr + I810_GPIOA); /* flush posted write */
121}
122
123static void bit_i810ddc_setsda(void *data, int val)
124{
125 writel((val ? SDA_VAL_OUT : 0) | SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK,
126 ioaddr + I810_GPIOA);
127 readl(ioaddr + I810_GPIOA); /* flush posted write */
128}
129
130static int bit_i810ddc_getscl(void *data)
131{
132 writel(SCL_DIR_MASK, ioaddr + I810_GPIOA);
133 writel(0, ioaddr + I810_GPIOA);
134 return (0 != (readl(ioaddr + I810_GPIOA) & SCL_VAL_IN));
135}
136
137static int bit_i810ddc_getsda(void *data)
138{
139 writel(SDA_DIR_MASK, ioaddr + I810_GPIOA);
140 writel(0, ioaddr + I810_GPIOA);
141 return (0 != (readl(ioaddr + I810_GPIOA) & SDA_VAL_IN));
142}
143
144static int config_i810(struct pci_dev *dev)
145{
146 unsigned long cadr;
147
148 /* map I810 memory */
149 cadr = dev->resource[1].start;
150 cadr += I810_IOCONTROL_OFFSET;
151 cadr &= PCI_BASE_ADDRESS_MEM_MASK;
152 ioaddr = ioremap_nocache(cadr, 0x1000);
153 if (ioaddr) {
154 bit_i810i2c_setscl(NULL, 1);
155 bit_i810i2c_setsda(NULL, 1);
156 bit_i810ddc_setscl(NULL, 1);
157 bit_i810ddc_setsda(NULL, 1);
158 return 0;
159 }
160 return -ENODEV;
161}
162
163static struct i2c_algo_bit_data i810_i2c_bit_data = {
164 .setsda = bit_i810i2c_setsda,
165 .setscl = bit_i810i2c_setscl,
166 .getsda = bit_i810i2c_getsda,
167 .getscl = bit_i810i2c_getscl,
168 .udelay = CYCLE_DELAY,
169 .timeout = TIMEOUT,
170};
171
172static struct i2c_adapter i810_i2c_adapter = {
173 .owner = THIS_MODULE,
174 .id = I2C_HW_B_I810,
175 .name = "I810/I815 I2C Adapter",
176 .algo_data = &i810_i2c_bit_data,
177};
178
179static struct i2c_algo_bit_data i810_ddc_bit_data = {
180 .setsda = bit_i810ddc_setsda,
181 .setscl = bit_i810ddc_setscl,
182 .getsda = bit_i810ddc_getsda,
183 .getscl = bit_i810ddc_getscl,
184 .udelay = CYCLE_DELAY,
185 .timeout = TIMEOUT,
186};
187
188static struct i2c_adapter i810_ddc_adapter = {
189 .owner = THIS_MODULE,
190 .id = I2C_HW_B_I810,
191 .name = "I810/I815 DDC Adapter",
192 .algo_data = &i810_ddc_bit_data,
193};
194
195static struct pci_device_id i810_ids[] __devinitdata = {
196 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG1) },
197 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG3) },
198 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_IG) },
199 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_CGC) },
200 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845G_IG) },
201 { 0, },
202};
203
204MODULE_DEVICE_TABLE (pci, i810_ids);
205
206static int __devinit i810_probe(struct pci_dev *dev, const struct pci_device_id *id)
207{
208 int retval;
209
210 retval = config_i810(dev);
211 if (retval)
212 return retval;
213 dev_info(&dev->dev, "i810/i815 i2c device found.\n");
214
215 /* set up the sysfs linkage to our parent device */
216 i810_i2c_adapter.dev.parent = &dev->dev;
217 i810_ddc_adapter.dev.parent = &dev->dev;
218
219 retval = i2c_bit_add_bus(&i810_i2c_adapter);
220 if (retval)
221 return retval;
222 retval = i2c_bit_add_bus(&i810_ddc_adapter);
223 if (retval)
224 i2c_del_adapter(&i810_i2c_adapter);
225 return retval;
226}
227
228static void __devexit i810_remove(struct pci_dev *dev)
229{
230 i2c_del_adapter(&i810_ddc_adapter);
231 i2c_del_adapter(&i810_i2c_adapter);
232 iounmap(ioaddr);
233}
234
235static struct pci_driver i810_driver = {
236 .name = "i810_smbus",
237 .id_table = i810_ids,
238 .probe = i810_probe,
239 .remove = __devexit_p(i810_remove),
240};
241
242static int __init i2c_i810_init(void)
243{
244 return pci_register_driver(&i810_driver);
245}
246
247static void __exit i2c_i810_exit(void)
248{
249 pci_unregister_driver(&i810_driver);
250}
251
252MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
253 "Philip Edelbrock <phil@netroedge.com>, "
254 "Ralph Metzler <rjkm@thp.uni-koeln.de>, "
255 "and Mark D. Studebaker <mdsxyz123@yahoo.com>");
256MODULE_DESCRIPTION("I810/I815 I2C/DDC driver");
257MODULE_LICENSE("GPL");
258
259module_init(i2c_i810_init);
260module_exit(i2c_i810_exit);
diff --git a/drivers/i2c/busses/i2c-prosavage.c b/drivers/i2c/busses/i2c-prosavage.c
deleted file mode 100644
index 07c1f1e27df1..000000000000
--- a/drivers/i2c/busses/i2c-prosavage.c
+++ /dev/null
@@ -1,325 +0,0 @@
1/*
2 * kernel/busses/i2c-prosavage.c
3 *
4 * i2c bus driver for S3/VIA 8365/8375 graphics processor.
5 * Copyright (c) 2003 Henk Vergonet <henk@god.dyndns.org>
6 * Based on code written by:
7 * Frodo Looijaard <frodol@dds.nl>,
8 * Philip Edelbrock <phil@netroedge.com>,
9 * Ralph Metzler <rjkm@thp.uni-koeln.de>, and
10 * Mark D. Studebaker <mdsxyz123@yahoo.com>
11 * Simon Vogl
12 * and others
13 *
14 * Please read the lm_sensors documentation for details on use.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 *
30 */
31/* 18-05-2003 HVE - created
32 * 14-06-2003 HVE - adapted for lm_sensors2
33 * 17-06-2003 HVE - linux 2.5.xx compatible
34 * 18-06-2003 HVE - codingstyle
35 * 21-06-2003 HVE - compatibility lm_sensors2 and linux 2.5.xx
36 * codingstyle, mmio enabled
37 *
38 * This driver interfaces to the I2C bus of the VIA north bridge embedded
39 * ProSavage4/8 devices. Usefull for gaining access to the TV Encoder chips.
40 *
41 * Graphics cores:
42 * S3/VIA KM266/VT8375 aka ProSavage8
43 * S3/VIA KM133/VT8365 aka Savage4
44 *
45 * Two serial busses are implemented:
46 * SERIAL1 - I2C serial communications interface
47 * SERIAL2 - DDC2 monitor communications interface
48 *
49 * Tested on a FX41 mainboard, see http://www.shuttle.com
50 *
51 *
52 * TODO:
53 * - integration with prosavage framebuffer device
54 * (Additional documentation needed :(
55 */
56
57#include <linux/module.h>
58#include <linux/init.h>
59#include <linux/pci.h>
60#include <linux/i2c.h>
61#include <linux/i2c-algo-bit.h>
62#include <asm/io.h>
63
64/*
65 * driver configuration
66 */
67#define MAX_BUSSES 2
68
69struct s_i2c_bus {
70 void __iomem *mmvga;
71 int i2c_reg;
72 int adap_ok;
73 struct i2c_adapter adap;
74 struct i2c_algo_bit_data algo;
75};
76
77struct s_i2c_chip {
78 void __iomem *mmio;
79 struct s_i2c_bus i2c_bus[MAX_BUSSES];
80};
81
82
83/*
84 * i2c configuration
85 */
86#define CYCLE_DELAY 10
87#define TIMEOUT (HZ / 2)
88
89
90/*
91 * S3/VIA 8365/8375 registers
92 */
93#define VGA_CR_IX 0x3d4
94#define VGA_CR_DATA 0x3d5
95
96#define CR_SERIAL1 0xa0 /* I2C serial communications interface */
97#define MM_SERIAL1 0xff20
98#define CR_SERIAL2 0xb1 /* DDC2 monitor communications interface */
99
100/* based on vt8365 documentation */
101#define I2C_ENAB 0x10
102#define I2C_SCL_OUT 0x01
103#define I2C_SDA_OUT 0x02
104#define I2C_SCL_IN 0x04
105#define I2C_SDA_IN 0x08
106
107#define SET_CR_IX(p, val) writeb((val), (p)->mmvga + VGA_CR_IX)
108#define SET_CR_DATA(p, val) writeb((val), (p)->mmvga + VGA_CR_DATA)
109#define GET_CR_DATA(p) readb((p)->mmvga + VGA_CR_DATA)
110
111
112/*
113 * Serial bus line handling
114 *
115 * serial communications register as parameter in private data
116 *
117 * TODO: locks with other code sections accessing video registers?
118 */
119static void bit_s3via_setscl(void *bus, int val)
120{
121 struct s_i2c_bus *p = (struct s_i2c_bus *)bus;
122 unsigned int r;
123
124 SET_CR_IX(p, p->i2c_reg);
125 r = GET_CR_DATA(p);
126 r |= I2C_ENAB;
127 if (val) {
128 r |= I2C_SCL_OUT;
129 } else {
130 r &= ~I2C_SCL_OUT;
131 }
132 SET_CR_DATA(p, r);
133}
134
135static void bit_s3via_setsda(void *bus, int val)
136{
137 struct s_i2c_bus *p = (struct s_i2c_bus *)bus;
138 unsigned int r;
139
140 SET_CR_IX(p, p->i2c_reg);
141 r = GET_CR_DATA(p);
142 r |= I2C_ENAB;
143 if (val) {
144 r |= I2C_SDA_OUT;
145 } else {
146 r &= ~I2C_SDA_OUT;
147 }
148 SET_CR_DATA(p, r);
149}
150
151static int bit_s3via_getscl(void *bus)
152{
153 struct s_i2c_bus *p = (struct s_i2c_bus *)bus;
154
155 SET_CR_IX(p, p->i2c_reg);
156 return (0 != (GET_CR_DATA(p) & I2C_SCL_IN));
157}
158
159static int bit_s3via_getsda(void *bus)
160{
161 struct s_i2c_bus *p = (struct s_i2c_bus *)bus;
162
163 SET_CR_IX(p, p->i2c_reg);
164 return (0 != (GET_CR_DATA(p) & I2C_SDA_IN));
165}
166
167
168/*
169 * adapter initialisation
170 */
171static int i2c_register_bus(struct pci_dev *dev, struct s_i2c_bus *p, void __iomem *mmvga, u32 i2c_reg)
172{
173 int ret;
174 p->adap.owner = THIS_MODULE;
175 p->adap.id = I2C_HW_B_S3VIA;
176 p->adap.algo_data = &p->algo;
177 p->adap.dev.parent = &dev->dev;
178 p->algo.setsda = bit_s3via_setsda;
179 p->algo.setscl = bit_s3via_setscl;
180 p->algo.getsda = bit_s3via_getsda;
181 p->algo.getscl = bit_s3via_getscl;
182 p->algo.udelay = CYCLE_DELAY;
183 p->algo.timeout = TIMEOUT;
184 p->algo.data = p;
185 p->mmvga = mmvga;
186 p->i2c_reg = i2c_reg;
187
188 ret = i2c_bit_add_bus(&p->adap);
189 if (ret) {
190 return ret;
191 }
192
193 p->adap_ok = 1;
194 return 0;
195}
196
197
198/*
199 * Cleanup stuff
200 */
201static void prosavage_remove(struct pci_dev *dev)
202{
203 struct s_i2c_chip *chip;
204 int i, ret;
205
206 chip = (struct s_i2c_chip *)pci_get_drvdata(dev);
207
208 if (!chip) {
209 return;
210 }
211 for (i = MAX_BUSSES - 1; i >= 0; i--) {
212 if (chip->i2c_bus[i].adap_ok == 0)
213 continue;
214
215 ret = i2c_del_adapter(&chip->i2c_bus[i].adap);
216 if (ret) {
217 dev_err(&dev->dev, "%s not removed\n",
218 chip->i2c_bus[i].adap.name);
219 }
220 }
221 if (chip->mmio) {
222 iounmap(chip->mmio);
223 }
224 kfree(chip);
225}
226
227
228/*
229 * Detect chip and initialize it
230 */
231static int __devinit prosavage_probe(struct pci_dev *dev, const struct pci_device_id *id)
232{
233 int ret;
234 unsigned long base, len;
235 struct s_i2c_chip *chip;
236 struct s_i2c_bus *bus;
237
238 pci_set_drvdata(dev, kzalloc(sizeof(struct s_i2c_chip), GFP_KERNEL));
239 chip = (struct s_i2c_chip *)pci_get_drvdata(dev);
240 if (chip == NULL) {
241 return -ENOMEM;
242 }
243
244 base = dev->resource[0].start & PCI_BASE_ADDRESS_MEM_MASK;
245 len = dev->resource[0].end - base + 1;
246 chip->mmio = ioremap_nocache(base, len);
247
248 if (chip->mmio == NULL) {
249 dev_err(&dev->dev, "ioremap failed\n");
250 prosavage_remove(dev);
251 return -ENODEV;
252 }
253
254
255 /*
256 * Chip initialisation
257 */
258 /* Unlock Extended IO Space ??? */
259
260
261 /*
262 * i2c bus registration
263 */
264 bus = &chip->i2c_bus[0];
265 snprintf(bus->adap.name, sizeof(bus->adap.name),
266 "ProSavage I2C bus at %02x:%02x.%x",
267 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
268 ret = i2c_register_bus(dev, bus, chip->mmio + 0x8000, CR_SERIAL1);
269 if (ret) {
270 goto err_adap;
271 }
272 /*
273 * ddc bus registration
274 */
275 bus = &chip->i2c_bus[1];
276 snprintf(bus->adap.name, sizeof(bus->adap.name),
277 "ProSavage DDC bus at %02x:%02x.%x",
278 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
279 ret = i2c_register_bus(dev, bus, chip->mmio + 0x8000, CR_SERIAL2);
280 if (ret) {
281 goto err_adap;
282 }
283 return 0;
284err_adap:
285 dev_err(&dev->dev, "%s failed\n", bus->adap.name);
286 prosavage_remove(dev);
287 return ret;
288}
289
290
291/*
292 * Data for PCI driver interface
293 */
294static struct pci_device_id prosavage_pci_tbl[] = {
295 { PCI_DEVICE(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SAVAGE4) },
296 { PCI_DEVICE(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_PROSAVAGE8) },
297 { 0, },
298};
299
300MODULE_DEVICE_TABLE (pci, prosavage_pci_tbl);
301
302static struct pci_driver prosavage_driver = {
303 .name = "prosavage_smbus",
304 .id_table = prosavage_pci_tbl,
305 .probe = prosavage_probe,
306 .remove = prosavage_remove,
307};
308
309static int __init i2c_prosavage_init(void)
310{
311 return pci_register_driver(&prosavage_driver);
312}
313
314static void __exit i2c_prosavage_exit(void)
315{
316 pci_unregister_driver(&prosavage_driver);
317}
318
319MODULE_DEVICE_TABLE(pci, prosavage_pci_tbl);
320MODULE_AUTHOR("Henk Vergonet");
321MODULE_DESCRIPTION("ProSavage VIA 8365/8375 smbus driver");
322MODULE_LICENSE("GPL");
323
324module_init (i2c_prosavage_init);
325module_exit (i2c_prosavage_exit);
diff --git a/drivers/i2c/busses/i2c-savage4.c b/drivers/i2c/busses/i2c-savage4.c
deleted file mode 100644
index 8adf4abaa035..000000000000
--- a/drivers/i2c/busses/i2c-savage4.c
+++ /dev/null
@@ -1,185 +0,0 @@
1/*
2 i2c-savage4.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (C) 1998-2003 The LM Sensors Team
5 Alexander Wold <awold@bigfoot.com>
6 Mark D. Studebaker <mdsxyz123@yahoo.com>
7
8 Based on i2c-voodoo3.c.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23*/
24
25/* This interfaces to the I2C bus of the Savage4 to gain access to
26 the BT869 and possibly other I2C devices. The DDC bus is not
27 yet supported because its register is not memory-mapped.
28*/
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/i2c.h>
35#include <linux/i2c-algo-bit.h>
36#include <asm/io.h>
37
38/* device IDs */
39#define PCI_CHIP_SAVAGE4 0x8A22
40#define PCI_CHIP_SAVAGE2000 0x9102
41
42#define REG 0xff20 /* Serial Port 1 Register */
43
44/* bit locations in the register */
45#define I2C_ENAB 0x00000020
46#define I2C_SCL_OUT 0x00000001
47#define I2C_SDA_OUT 0x00000002
48#define I2C_SCL_IN 0x00000008
49#define I2C_SDA_IN 0x00000010
50
51/* delays */
52#define CYCLE_DELAY 10
53#define TIMEOUT (HZ / 2)
54
55
56static void __iomem *ioaddr;
57
58/* The sav GPIO registers don't have individual masks for each bit
59 so we always have to read before writing. */
60
61static void bit_savi2c_setscl(void *data, int val)
62{
63 unsigned int r;
64 r = readl(ioaddr + REG);
65 if(val)
66 r |= I2C_SCL_OUT;
67 else
68 r &= ~I2C_SCL_OUT;
69 writel(r, ioaddr + REG);
70 readl(ioaddr + REG); /* flush posted write */
71}
72
73static void bit_savi2c_setsda(void *data, int val)
74{
75 unsigned int r;
76 r = readl(ioaddr + REG);
77 if(val)
78 r |= I2C_SDA_OUT;
79 else
80 r &= ~I2C_SDA_OUT;
81 writel(r, ioaddr + REG);
82 readl(ioaddr + REG); /* flush posted write */
83}
84
85/* The GPIO pins are open drain, so the pins always remain outputs.
86 We rely on the i2c-algo-bit routines to set the pins high before
87 reading the input from other chips. */
88
89static int bit_savi2c_getscl(void *data)
90{
91 return (0 != (readl(ioaddr + REG) & I2C_SCL_IN));
92}
93
94static int bit_savi2c_getsda(void *data)
95{
96 return (0 != (readl(ioaddr + REG) & I2C_SDA_IN));
97}
98
99/* Configures the chip */
100
101static int config_s4(struct pci_dev *dev)
102{
103 unsigned long cadr;
104
105 /* map memory */
106 cadr = dev->resource[0].start;
107 cadr &= PCI_BASE_ADDRESS_MEM_MASK;
108 ioaddr = ioremap_nocache(cadr, 0x0080000);
109 if (ioaddr) {
110 /* writel(0x8160, ioaddr + REG2); */
111 writel(0x00000020, ioaddr + REG);
112 dev_info(&dev->dev, "Using Savage4 at %p\n", ioaddr);
113 return 0;
114 }
115 return -ENODEV;
116}
117
118static struct i2c_algo_bit_data sav_i2c_bit_data = {
119 .setsda = bit_savi2c_setsda,
120 .setscl = bit_savi2c_setscl,
121 .getsda = bit_savi2c_getsda,
122 .getscl = bit_savi2c_getscl,
123 .udelay = CYCLE_DELAY,
124 .timeout = TIMEOUT
125};
126
127static struct i2c_adapter savage4_i2c_adapter = {
128 .owner = THIS_MODULE,
129 .id = I2C_HW_B_SAVAGE,
130 .name = "I2C Savage4 adapter",
131 .algo_data = &sav_i2c_bit_data,
132};
133
134static struct pci_device_id savage4_ids[] __devinitdata = {
135 { PCI_DEVICE(PCI_VENDOR_ID_S3, PCI_CHIP_SAVAGE4) },
136 { PCI_DEVICE(PCI_VENDOR_ID_S3, PCI_CHIP_SAVAGE2000) },
137 { 0, }
138};
139
140MODULE_DEVICE_TABLE (pci, savage4_ids);
141
142static int __devinit savage4_probe(struct pci_dev *dev, const struct pci_device_id *id)
143{
144 int retval;
145
146 retval = config_s4(dev);
147 if (retval)
148 return retval;
149
150 /* set up the sysfs linkage to our parent device */
151 savage4_i2c_adapter.dev.parent = &dev->dev;
152
153 return i2c_bit_add_bus(&savage4_i2c_adapter);
154}
155
156static void __devexit savage4_remove(struct pci_dev *dev)
157{
158 i2c_del_adapter(&savage4_i2c_adapter);
159 iounmap(ioaddr);
160}
161
162static struct pci_driver savage4_driver = {
163 .name = "savage4_smbus",
164 .id_table = savage4_ids,
165 .probe = savage4_probe,
166 .remove = __devexit_p(savage4_remove),
167};
168
169static int __init i2c_savage4_init(void)
170{
171 return pci_register_driver(&savage4_driver);
172}
173
174static void __exit i2c_savage4_exit(void)
175{
176 pci_unregister_driver(&savage4_driver);
177}
178
179MODULE_AUTHOR("Alexander Wold <awold@bigfoot.com> "
180 "and Mark D. Studebaker <mdsxyz123@yahoo.com>");
181MODULE_DESCRIPTION("Savage4 I2C/SMBus driver");
182MODULE_LICENSE("GPL");
183
184module_init(i2c_savage4_init);
185module_exit(i2c_savage4_exit);
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index 580acc93903e..988e566d3ed5 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -111,7 +111,6 @@
111#define I2C_HW_B_RIVA 0x010010 /* Riva based graphics cards */ 111#define I2C_HW_B_RIVA 0x010010 /* Riva based graphics cards */
112#define I2C_HW_B_IOC 0x010011 /* IOC bit-wiggling */ 112#define I2C_HW_B_IOC 0x010011 /* IOC bit-wiggling */
113#define I2C_HW_B_IXP2000 0x010016 /* GPIO on IXP2000 systems */ 113#define I2C_HW_B_IXP2000 0x010016 /* GPIO on IXP2000 systems */
114#define I2C_HW_B_S3VIA 0x010018 /* S3Via ProSavage adapter */
115#define I2C_HW_B_ZR36067 0x010019 /* Zoran-36057/36067 based boards */ 114#define I2C_HW_B_ZR36067 0x010019 /* Zoran-36057/36067 based boards */
116#define I2C_HW_B_PCILYNX 0x01001a /* TI PCILynx I2C adapter */ 115#define I2C_HW_B_PCILYNX 0x01001a /* TI PCILynx I2C adapter */
117#define I2C_HW_B_CX2388x 0x01001b /* connexant 2388x based tv cards */ 116#define I2C_HW_B_CX2388x 0x01001b /* connexant 2388x based tv cards */