diff options
-rw-r--r-- | arch/arm/mach-s3c6410/cpu.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-s3c64xx/irq.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-s3c64xx/s3c6400-clock.c | 8 |
3 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c6410/cpu.c index 846f464c7673..975cf88f0e84 100644 --- a/arch/arm/mach-s3c6410/cpu.c +++ b/arch/arm/mach-s3c6410/cpu.c | |||
@@ -55,7 +55,7 @@ void __init s3c6410_map_io(void) | |||
55 | 55 | ||
56 | void __init s3c6410_init_clocks(int xtal) | 56 | void __init s3c6410_init_clocks(int xtal) |
57 | { | 57 | { |
58 | printk(KERN_INFO "%s: initialising clocks\n", __func__); | 58 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); |
59 | s3c24xx_register_baseclocks(xtal); | 59 | s3c24xx_register_baseclocks(xtal); |
60 | s3c64xx_register_clocks(); | 60 | s3c64xx_register_clocks(); |
61 | s3c6400_register_clocks(); | 61 | s3c6400_register_clocks(); |
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c index 99df9dbefa69..a94f1d5e819d 100644 --- a/arch/arm/plat-s3c64xx/irq.c +++ b/arch/arm/plat-s3c64xx/irq.c | |||
@@ -230,7 +230,7 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) | |||
230 | { | 230 | { |
231 | int uart, irq; | 231 | int uart, irq; |
232 | 232 | ||
233 | printk(KERN_INFO "%s: initialising interrupts\n", __func__); | 233 | printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); |
234 | 234 | ||
235 | /* initialise the pair of VICs */ | 235 | /* initialise the pair of VICs */ |
236 | vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid); | 236 | vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid); |
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c index ff5d907f2fc4..64a9721cccb0 100644 --- a/arch/arm/plat-s3c64xx/s3c6400-clock.c +++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c | |||
@@ -137,7 +137,7 @@ static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk) | |||
137 | { | 137 | { |
138 | unsigned long rate = clk_get_rate(clk->parent); | 138 | unsigned long rate = clk_get_rate(clk->parent); |
139 | 139 | ||
140 | printk(KERN_INFO "%s: parent is %ld\n", __func__, rate); | 140 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); |
141 | 141 | ||
142 | if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK) | 142 | if (__raw_readl(S3C_CLK_DIV0) & S3C6400_CLKDIV0_MPLL_MASK) |
143 | rate /= 2; | 143 | rate /= 2; |
@@ -573,10 +573,10 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) | |||
573 | unsigned int ptr; | 573 | unsigned int ptr; |
574 | u32 clkdiv0; | 574 | u32 clkdiv0; |
575 | 575 | ||
576 | printk(KERN_INFO "%s: registering clocks\n", __func__); | 576 | printk(KERN_DEBUG "%s: registering clocks\n", __func__); |
577 | 577 | ||
578 | clkdiv0 = __raw_readl(S3C_CLK_DIV0); | 578 | clkdiv0 = __raw_readl(S3C_CLK_DIV0); |
579 | printk(KERN_INFO "%s: clkdiv0 = %08x\n", __func__, clkdiv0); | 579 | printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0); |
580 | 580 | ||
581 | xtal_clk = clk_get(NULL, "xtal"); | 581 | xtal_clk = clk_get(NULL, "xtal"); |
582 | BUG_ON(IS_ERR(xtal_clk)); | 582 | BUG_ON(IS_ERR(xtal_clk)); |
@@ -584,7 +584,7 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) | |||
584 | xtal = clk_get_rate(xtal_clk); | 584 | xtal = clk_get_rate(xtal_clk); |
585 | clk_put(xtal_clk); | 585 | clk_put(xtal_clk); |
586 | 586 | ||
587 | printk(KERN_INFO "%s: xtal is %ld\n", __func__, xtal); | 587 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); |
588 | 588 | ||
589 | epll = s3c6400_get_epll(xtal); | 589 | epll = s3c6400_get_epll(xtal); |
590 | mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); | 590 | mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); |