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-rw-r--r--arch/i386/defconfig1
-rw-r--r--arch/parisc/configs/c3000_defconfig1
-rw-r--r--arch/x86_64/defconfig1
-rw-r--r--drivers/ata/Kconfig43
-rw-r--r--drivers/ata/Makefile1
-rw-r--r--drivers/ata/ahci.c473
-rw-r--r--drivers/ata/ata_generic.c32
-rw-r--r--drivers/ata/ata_piix.c56
-rw-r--r--drivers/ata/libata-core.c1015
-rw-r--r--drivers/ata/libata-eh.c15
-rw-r--r--drivers/ata/libata-scsi.c85
-rw-r--r--drivers/ata/libata-sff.c631
-rw-r--r--drivers/ata/libata.h10
-rw-r--r--drivers/ata/pata_ali.c74
-rw-r--r--drivers/ata/pata_amd.c89
-rw-r--r--drivers/ata/pata_artop.c26
-rw-r--r--drivers/ata/pata_atiixp.c26
-rw-r--r--drivers/ata/pata_cmd640.c312
-rw-r--r--drivers/ata/pata_cmd64x.c34
-rw-r--r--drivers/ata/pata_cs5520.c145
-rw-r--r--drivers/ata/pata_cs5530.c15
-rw-r--r--drivers/ata/pata_cs5535.c24
-rw-r--r--drivers/ata/pata_cypress.c14
-rw-r--r--drivers/ata/pata_efar.c31
-rw-r--r--drivers/ata/pata_hpt366.c26
-rw-r--r--drivers/ata/pata_hpt37x.c381
-rw-r--r--drivers/ata/pata_hpt3x2n.c74
-rw-r--r--drivers/ata/pata_hpt3x3.c22
-rw-r--r--drivers/ata/pata_isapnp.c44
-rw-r--r--drivers/ata/pata_it8213.c36
-rw-r--r--drivers/ata/pata_it821x.c36
-rw-r--r--drivers/ata/pata_ixp4xx_cf.c40
-rw-r--r--drivers/ata/pata_legacy.c45
-rw-r--r--drivers/ata/pata_marvell.c20
-rw-r--r--drivers/ata/pata_mpc52xx.c49
-rw-r--r--drivers/ata/pata_mpiix.c40
-rw-r--r--drivers/ata/pata_netcell.c31
-rw-r--r--drivers/ata/pata_ns87410.c6
-rw-r--r--drivers/ata/pata_oldpiix.c6
-rw-r--r--drivers/ata/pata_opti.c5
-rw-r--r--drivers/ata/pata_optidma.c54
-rw-r--r--drivers/ata/pata_pcmcia.c77
-rw-r--r--drivers/ata/pata_pdc2027x.c158
-rw-r--r--drivers/ata/pata_pdc202xx_old.c45
-rw-r--r--drivers/ata/pata_platform.c44
-rw-r--r--drivers/ata/pata_qdi.c47
-rw-r--r--drivers/ata/pata_radisys.c37
-rw-r--r--drivers/ata/pata_rz1000.c28
-rw-r--r--drivers/ata/pata_sc1200.c1
-rw-r--r--drivers/ata/pata_scc.c51
-rw-r--r--drivers/ata/pata_serverworks.c34
-rw-r--r--drivers/ata/pata_sil680.c11
-rw-r--r--drivers/ata/pata_sis.c109
-rw-r--r--drivers/ata/pata_sl82c105.c2
-rw-r--r--drivers/ata/pata_triflex.c4
-rw-r--r--drivers/ata/pata_via.c27
-rw-r--r--drivers/ata/pata_winbond.c101
-rw-r--r--drivers/ata/pdc_adma.c85
-rw-r--r--drivers/ata/sata_inic162x.c86
-rw-r--r--drivers/ata/sata_mv.c213
-rw-r--r--drivers/ata/sata_nv.c130
-rw-r--r--drivers/ata/sata_promise.c398
-rw-r--r--drivers/ata/sata_qstor.c62
-rw-r--r--drivers/ata/sata_sil.c118
-rw-r--r--drivers/ata/sata_sil24.c122
-rw-r--r--drivers/ata/sata_sis.c50
-rw-r--r--drivers/ata/sata_svw.c107
-rw-r--r--drivers/ata/sata_sx4.c150
-rw-r--r--drivers/ata/sata_uli.c65
-rw-r--r--drivers/ata/sata_via.c217
-rw-r--r--drivers/ata/sata_vsc.c72
-rw-r--r--drivers/pci/quirks.c113
-rw-r--r--drivers/scsi/ipr.c3
-rw-r--r--include/linux/ata.h10
-rw-r--r--include/linux/ioport.h1
-rw-r--r--include/linux/libata.h78
-rw-r--r--include/linux/pci.h1
-rw-r--r--include/linux/pci_ids.h1
-rw-r--r--kernel/resource.c21
-rw-r--r--lib/devres.c26
80 files changed, 3656 insertions, 3318 deletions
diff --git a/arch/i386/defconfig b/arch/i386/defconfig
index f4efd66e1ee5..c96911c37aea 100644
--- a/arch/i386/defconfig
+++ b/arch/i386/defconfig
@@ -692,7 +692,6 @@ CONFIG_SATA_SIL=y
692CONFIG_SATA_VIA=y 692CONFIG_SATA_VIA=y
693# CONFIG_SATA_VITESSE is not set 693# CONFIG_SATA_VITESSE is not set
694# CONFIG_SATA_INIC162X is not set 694# CONFIG_SATA_INIC162X is not set
695CONFIG_SATA_INTEL_COMBINED=y
696CONFIG_SATA_ACPI=y 695CONFIG_SATA_ACPI=y
697# CONFIG_PATA_ALI is not set 696# CONFIG_PATA_ALI is not set
698# CONFIG_PATA_AMD is not set 697# CONFIG_PATA_AMD is not set
diff --git a/arch/parisc/configs/c3000_defconfig b/arch/parisc/configs/c3000_defconfig
index 782906b644dd..eb2f9a3d515c 100644
--- a/arch/parisc/configs/c3000_defconfig
+++ b/arch/parisc/configs/c3000_defconfig
@@ -435,7 +435,6 @@ CONFIG_SCSI_SATA_SIL=m
435# CONFIG_SCSI_SATA_ULI is not set 435# CONFIG_SCSI_SATA_ULI is not set
436CONFIG_SCSI_SATA_VIA=m 436CONFIG_SCSI_SATA_VIA=m
437# CONFIG_SCSI_SATA_VITESSE is not set 437# CONFIG_SCSI_SATA_VITESSE is not set
438CONFIG_SCSI_SATA_INTEL_COMBINED=y
439# CONFIG_SCSI_DMX3191D is not set 438# CONFIG_SCSI_DMX3191D is not set
440# CONFIG_SCSI_FUTURE_DOMAIN is not set 439# CONFIG_SCSI_FUTURE_DOMAIN is not set
441# CONFIG_SCSI_IPS is not set 440# CONFIG_SCSI_IPS is not set
diff --git a/arch/x86_64/defconfig b/arch/x86_64/defconfig
index 7a1e251e333d..b26378815b91 100644
--- a/arch/x86_64/defconfig
+++ b/arch/x86_64/defconfig
@@ -631,7 +631,6 @@ CONFIG_SATA_SIL=y
631CONFIG_SATA_VIA=y 631CONFIG_SATA_VIA=y
632# CONFIG_SATA_VITESSE is not set 632# CONFIG_SATA_VITESSE is not set
633# CONFIG_SATA_INIC162X is not set 633# CONFIG_SATA_INIC162X is not set
634CONFIG_SATA_INTEL_COMBINED=y
635CONFIG_SATA_ACPI=y 634CONFIG_SATA_ACPI=y
636# CONFIG_PATA_ALI is not set 635# CONFIG_PATA_ALI is not set
637# CONFIG_PATA_AMD is not set 636# CONFIG_PATA_AMD is not set
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 7bdbe5a914d0..365c306c7cf8 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -156,11 +156,6 @@ config SATA_INIC162X
156 help 156 help
157 This option enables support for Initio 162x Serial ATA. 157 This option enables support for Initio 162x Serial ATA.
158 158
159config SATA_INTEL_COMBINED
160 bool
161 depends on IDE=y && !BLK_DEV_IDE_SATA && (SATA_AHCI || ATA_PIIX)
162 default y
163
164config SATA_ACPI 159config SATA_ACPI
165 bool 160 bool
166 depends on ACPI && PCI 161 depends on ACPI && PCI
@@ -184,7 +179,7 @@ config PATA_ALI
184 If unsure, say N. 179 If unsure, say N.
185 180
186config PATA_AMD 181config PATA_AMD
187 tristate "AMD/NVidia PATA support (Experimental)" 182 tristate "AMD/NVidia PATA support"
188 depends on PCI 183 depends on PCI
189 help 184 help
190 This option enables support for the AMD and NVidia PATA 185 This option enables support for the AMD and NVidia PATA
@@ -209,6 +204,16 @@ config PATA_ATIIXP
209 204
210 If unsure, say N. 205 If unsure, say N.
211 206
207config PATA_CMD640_PCI
208 tristate "CMD640 PCI PATA support (Very Experimental)"
209 depends on PCI && EXPERIMENTAL
210 help
211 This option enables support for the CMD640 PCI IDE
212 interface chip. Only the primary channel is currently
213 supported.
214
215 If unsure, say N.
216
212config PATA_CMD64X 217config PATA_CMD64X
213 tristate "CMD64x PATA support (Very Experimental)" 218 tristate "CMD64x PATA support (Very Experimental)"
214 depends on PCI&& EXPERIMENTAL 219 depends on PCI&& EXPERIMENTAL
@@ -273,7 +278,7 @@ config ATA_GENERIC
273 If unsure, say N. 278 If unsure, say N.
274 279
275config PATA_HPT366 280config PATA_HPT366
276 tristate "HPT 366/368 PATA support (Very Experimental)" 281 tristate "HPT 366/368 PATA support (Experimental)"
277 depends on PCI && EXPERIMENTAL 282 depends on PCI && EXPERIMENTAL
278 help 283 help
279 This option enables support for the HPT 366 and 368 284 This option enables support for the HPT 366 and 368
@@ -282,7 +287,7 @@ config PATA_HPT366
282 If unsure, say N. 287 If unsure, say N.
283 288
284config PATA_HPT37X 289config PATA_HPT37X
285 tristate "HPT 370/370A/371/372/374/302 PATA support (Very Experimental)" 290 tristate "HPT 370/370A/371/372/374/302 PATA support (Experimental)"
286 depends on PCI && EXPERIMENTAL 291 depends on PCI && EXPERIMENTAL
287 help 292 help
288 This option enables support for the majority of the later HPT 293 This option enables support for the majority of the later HPT
@@ -309,7 +314,7 @@ config PATA_HPT3X3
309 If unsure, say N. 314 If unsure, say N.
310 315
311config PATA_ISAPNP 316config PATA_ISAPNP
312 tristate "ISA Plug and Play PATA support (Very Experimental)" 317 tristate "ISA Plug and Play PATA support (Experimental)"
313 depends on EXPERIMENTAL && ISAPNP 318 depends on EXPERIMENTAL && ISAPNP
314 help 319 help
315 This option enables support for ISA plug & play ATA 320 This option enables support for ISA plug & play ATA
@@ -318,8 +323,8 @@ config PATA_ISAPNP
318 If unsure, say N. 323 If unsure, say N.
319 324
320config PATA_IT821X 325config PATA_IT821X
321 tristate "IT8211/2 PATA support (Experimental)" 326 tristate "IT8211/2 PATA support"
322 depends on PCI && EXPERIMENTAL 327 depends on PCI
323 help 328 help
324 This option enables support for the ITE 8211 and 8212 329 This option enables support for the ITE 8211 and 8212
325 PATA controllers via the new ATA layer, including RAID 330 PATA controllers via the new ATA layer, including RAID
@@ -390,10 +395,10 @@ config PATA_MPIIX
390 If unsure, say N. 395 If unsure, say N.
391 396
392config PATA_OLDPIIX 397config PATA_OLDPIIX
393 tristate "Intel PATA old PIIX support (Experimental)" 398 tristate "Intel PATA old PIIX support"
394 depends on PCI && EXPERIMENTAL 399 depends on PCI
395 help 400 help
396 This option enables support for old(?) PIIX PATA support. 401 This option enables support for early PIIX PATA support.
397 402
398 If unsure, say N. 403 If unsure, say N.
399 404
@@ -444,7 +449,7 @@ config PATA_PCMCIA
444 If unsure, say N. 449 If unsure, say N.
445 450
446config PATA_PDC_OLD 451config PATA_PDC_OLD
447 tristate "Older Promise PATA controller support (Very Experimental)" 452 tristate "Older Promise PATA controller support (Experimental)"
448 depends on PCI && EXPERIMENTAL 453 depends on PCI && EXPERIMENTAL
449 help 454 help
450 This option enables support for the Promise 20246, 20262, 20263, 455 This option enables support for the Promise 20246, 20262, 20263,
@@ -459,7 +464,7 @@ config PATA_QDI
459 Support for QDI 6500 and 6580 PATA controllers on VESA local bus. 464 Support for QDI 6500 and 6580 PATA controllers on VESA local bus.
460 465
461config PATA_RADISYS 466config PATA_RADISYS
462 tristate "RADISYS 82600 PATA support (Very experimental)" 467 tristate "RADISYS 82600 PATA support (Very Experimental)"
463 depends on PCI && EXPERIMENTAL 468 depends on PCI && EXPERIMENTAL
464 help 469 help
465 This option enables support for the RADISYS 82600 470 This option enables support for the RADISYS 82600
@@ -477,7 +482,7 @@ config PATA_RZ1000
477 If unsure, say N. 482 If unsure, say N.
478 483
479config PATA_SC1200 484config PATA_SC1200
480 tristate "SC1200 PATA support (Raving Lunatic)" 485 tristate "SC1200 PATA support (Very Experimental)"
481 depends on PCI && EXPERIMENTAL 486 depends on PCI && EXPERIMENTAL
482 help 487 help
483 This option enables support for the NatSemi/AMD SC1200 SoC 488 This option enables support for the NatSemi/AMD SC1200 SoC
@@ -486,8 +491,8 @@ config PATA_SC1200
486 If unsure, say N. 491 If unsure, say N.
487 492
488config PATA_SERVERWORKS 493config PATA_SERVERWORKS
489 tristate "SERVERWORKS OSB4/CSB5/CSB6/HT1000 PATA support (Experimental)" 494 tristate "SERVERWORKS OSB4/CSB5/CSB6/HT1000 PATA support"
490 depends on PCI && EXPERIMENTAL 495 depends on PCI
491 help 496 help
492 This option enables support for the Serverworks OSB4/CSB5/CSB6 and 497 This option enables support for the Serverworks OSB4/CSB5/CSB6 and
493 HT1000 PATA controllers, via the new ATA layer. 498 HT1000 PATA controllers, via the new ATA layer.
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 13d7397e0008..b7055e302650 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_PATA_ALI) += pata_ali.o
22obj-$(CONFIG_PATA_AMD) += pata_amd.o 22obj-$(CONFIG_PATA_AMD) += pata_amd.o
23obj-$(CONFIG_PATA_ARTOP) += pata_artop.o 23obj-$(CONFIG_PATA_ARTOP) += pata_artop.o
24obj-$(CONFIG_PATA_ATIIXP) += pata_atiixp.o 24obj-$(CONFIG_PATA_ATIIXP) += pata_atiixp.o
25obj-$(CONFIG_PATA_CMD640_PCI) += pata_cmd640.o
25obj-$(CONFIG_PATA_CMD64X) += pata_cmd64x.o 26obj-$(CONFIG_PATA_CMD64X) += pata_cmd64x.o
26obj-$(CONFIG_PATA_CS5520) += pata_cs5520.o 27obj-$(CONFIG_PATA_CS5520) += pata_cs5520.o
27obj-$(CONFIG_PATA_CS5530) += pata_cs5530.o 28obj-$(CONFIG_PATA_CS5530) += pata_cs5530.o
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index fd27227771b4..34c5534ed64c 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -170,6 +170,10 @@ enum {
170 AHCI_FLAG_IGN_IRQ_IF_ERR = (1 << 25), /* ignore IRQ_IF_ERR */ 170 AHCI_FLAG_IGN_IRQ_IF_ERR = (1 << 25), /* ignore IRQ_IF_ERR */
171 AHCI_FLAG_HONOR_PI = (1 << 26), /* honor PORTS_IMPL */ 171 AHCI_FLAG_HONOR_PI = (1 << 26), /* honor PORTS_IMPL */
172 AHCI_FLAG_IGN_SERR_INTERNAL = (1 << 27), /* ignore SERR_INTERNAL */ 172 AHCI_FLAG_IGN_SERR_INTERNAL = (1 << 27), /* ignore SERR_INTERNAL */
173
174 AHCI_FLAG_COMMON = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
175 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
176 ATA_FLAG_SKIP_D2H_BSY,
173}; 177};
174 178
175struct ahci_cmd_hdr { 179struct ahci_cmd_hdr {
@@ -188,8 +192,10 @@ struct ahci_sg {
188}; 192};
189 193
190struct ahci_host_priv { 194struct ahci_host_priv {
191 u32 cap; /* cache of HOST_CAP register */ 195 u32 cap; /* cap to use */
192 u32 port_map; /* cache of HOST_PORTS_IMPL reg */ 196 u32 port_map; /* port map to use */
197 u32 saved_cap; /* saved initial cap */
198 u32 saved_port_map; /* saved initial port_map */
193}; 199};
194 200
195struct ahci_port_priv { 201struct ahci_port_priv {
@@ -209,7 +215,6 @@ static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg);
209static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 215static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
210static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 216static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
211static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc); 217static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
212static irqreturn_t ahci_interrupt (int irq, void *dev_instance);
213static void ahci_irq_clear(struct ata_port *ap); 218static void ahci_irq_clear(struct ata_port *ap);
214static int ahci_port_start(struct ata_port *ap); 219static int ahci_port_start(struct ata_port *ap);
215static void ahci_port_stop(struct ata_port *ap); 220static void ahci_port_stop(struct ata_port *ap);
@@ -263,7 +268,6 @@ static const struct ata_port_operations ahci_ops = {
263 .qc_prep = ahci_qc_prep, 268 .qc_prep = ahci_qc_prep,
264 .qc_issue = ahci_qc_issue, 269 .qc_issue = ahci_qc_issue,
265 270
266 .irq_handler = ahci_interrupt,
267 .irq_clear = ahci_irq_clear, 271 .irq_clear = ahci_irq_clear,
268 .irq_on = ata_dummy_irq_on, 272 .irq_on = ata_dummy_irq_on,
269 .irq_ack = ata_dummy_irq_ack, 273 .irq_ack = ata_dummy_irq_ack,
@@ -298,7 +302,6 @@ static const struct ata_port_operations ahci_vt8251_ops = {
298 .qc_prep = ahci_qc_prep, 302 .qc_prep = ahci_qc_prep,
299 .qc_issue = ahci_qc_issue, 303 .qc_issue = ahci_qc_issue,
300 304
301 .irq_handler = ahci_interrupt,
302 .irq_clear = ahci_irq_clear, 305 .irq_clear = ahci_irq_clear,
303 .irq_on = ata_dummy_irq_on, 306 .irq_on = ata_dummy_irq_on,
304 .irq_ack = ata_dummy_irq_ack, 307 .irq_ack = ata_dummy_irq_ack,
@@ -324,58 +327,41 @@ static const struct ata_port_operations ahci_vt8251_ops = {
324static const struct ata_port_info ahci_port_info[] = { 327static const struct ata_port_info ahci_port_info[] = {
325 /* board_ahci */ 328 /* board_ahci */
326 { 329 {
327 .sht = &ahci_sht, 330 .flags = AHCI_FLAG_COMMON,
328 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
329 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
330 ATA_FLAG_SKIP_D2H_BSY,
331 .pio_mask = 0x1f, /* pio0-4 */ 331 .pio_mask = 0x1f, /* pio0-4 */
332 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 332 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
333 .port_ops = &ahci_ops, 333 .port_ops = &ahci_ops,
334 }, 334 },
335 /* board_ahci_pi */ 335 /* board_ahci_pi */
336 { 336 {
337 .sht = &ahci_sht, 337 .flags = AHCI_FLAG_COMMON | AHCI_FLAG_HONOR_PI,
338 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
339 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
340 ATA_FLAG_SKIP_D2H_BSY | AHCI_FLAG_HONOR_PI,
341 .pio_mask = 0x1f, /* pio0-4 */ 338 .pio_mask = 0x1f, /* pio0-4 */
342 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 339 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
343 .port_ops = &ahci_ops, 340 .port_ops = &ahci_ops,
344 }, 341 },
345 /* board_ahci_vt8251 */ 342 /* board_ahci_vt8251 */
346 { 343 {
347 .sht = &ahci_sht, 344 .flags = AHCI_FLAG_COMMON | ATA_FLAG_HRST_TO_RESUME |
348 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 345 AHCI_FLAG_NO_NCQ,
349 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
350 ATA_FLAG_SKIP_D2H_BSY |
351 ATA_FLAG_HRST_TO_RESUME | AHCI_FLAG_NO_NCQ,
352 .pio_mask = 0x1f, /* pio0-4 */ 346 .pio_mask = 0x1f, /* pio0-4 */
353 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 347 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
354 .port_ops = &ahci_vt8251_ops, 348 .port_ops = &ahci_vt8251_ops,
355 }, 349 },
356 /* board_ahci_ign_iferr */ 350 /* board_ahci_ign_iferr */
357 { 351 {
358 .sht = &ahci_sht, 352 .flags = AHCI_FLAG_COMMON | AHCI_FLAG_IGN_IRQ_IF_ERR,
359 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
360 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
361 ATA_FLAG_SKIP_D2H_BSY |
362 AHCI_FLAG_IGN_IRQ_IF_ERR,
363 .pio_mask = 0x1f, /* pio0-4 */ 353 .pio_mask = 0x1f, /* pio0-4 */
364 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 354 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
365 .port_ops = &ahci_ops, 355 .port_ops = &ahci_ops,
366 }, 356 },
367 /* board_ahci_sb600 */ 357 /* board_ahci_sb600 */
368 { 358 {
369 .sht = &ahci_sht, 359 .flags = AHCI_FLAG_COMMON |
370 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
371 ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
372 ATA_FLAG_SKIP_D2H_BSY |
373 AHCI_FLAG_IGN_SERR_INTERNAL, 360 AHCI_FLAG_IGN_SERR_INTERNAL,
374 .pio_mask = 0x1f, /* pio0-4 */ 361 .pio_mask = 0x1f, /* pio0-4 */
375 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 362 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
376 .port_ops = &ahci_ops, 363 .port_ops = &ahci_ops,
377 }, 364 },
378
379}; 365};
380 366
381static const struct pci_device_id ahci_pci_tbl[] = { 367static const struct pci_device_id ahci_pci_tbl[] = {
@@ -413,11 +399,11 @@ static const struct pci_device_id ahci_pci_tbl[] = {
413 PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci_ign_iferr }, 399 PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci_ign_iferr },
414 400
415 /* ATI */ 401 /* ATI */
416 { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 non-raid */ 402 { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */
417 { PCI_VDEVICE(ATI, 0x4381), board_ahci }, /* ATI SB600 raid */
418 403
419 /* VIA */ 404 /* VIA */
420 { PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251 }, /* VIA VT8251 */ 405 { PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251 }, /* VIA VT8251 */
406 { PCI_VDEVICE(VIA, 0x6287), board_ahci_vt8251 }, /* VIA VT8251 */
421 407
422 /* NVIDIA */ 408 /* NVIDIA */
423 { PCI_VDEVICE(NVIDIA, 0x044c), board_ahci }, /* MCP65 */ 409 { PCI_VDEVICE(NVIDIA, 0x044c), board_ahci }, /* MCP65 */
@@ -471,10 +457,100 @@ static inline int ahci_nr_ports(u32 cap)
471 return (cap & 0x1f) + 1; 457 return (cap & 0x1f) + 1;
472} 458}
473 459
474static inline void __iomem *ahci_port_base(void __iomem *base, 460static inline void __iomem *ahci_port_base(struct ata_port *ap)
475 unsigned int port) 461{
462 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
463
464 return mmio + 0x100 + (ap->port_no * 0x80);
465}
466
467/**
468 * ahci_save_initial_config - Save and fixup initial config values
469 * @pdev: target PCI device
470 * @pi: associated ATA port info
471 * @hpriv: host private area to store config values
472 *
473 * Some registers containing configuration info might be setup by
474 * BIOS and might be cleared on reset. This function saves the
475 * initial values of those registers into @hpriv such that they
476 * can be restored after controller reset.
477 *
478 * If inconsistent, config values are fixed up by this function.
479 *
480 * LOCKING:
481 * None.
482 */
483static void ahci_save_initial_config(struct pci_dev *pdev,
484 const struct ata_port_info *pi,
485 struct ahci_host_priv *hpriv)
476{ 486{
477 return base + 0x100 + (port * 0x80); 487 void __iomem *mmio = pcim_iomap_table(pdev)[AHCI_PCI_BAR];
488 u32 cap, port_map;
489 int i;
490
491 /* Values prefixed with saved_ are written back to host after
492 * reset. Values without are used for driver operation.
493 */
494 hpriv->saved_cap = cap = readl(mmio + HOST_CAP);
495 hpriv->saved_port_map = port_map = readl(mmio + HOST_PORTS_IMPL);
496
497 /* fixup zero port_map */
498 if (!port_map) {
499 port_map = (1 << ahci_nr_ports(hpriv->cap)) - 1;
500 dev_printk(KERN_WARNING, &pdev->dev,
501 "PORTS_IMPL is zero, forcing 0x%x\n", port_map);
502
503 /* write the fixed up value to the PI register */
504 hpriv->saved_port_map = port_map;
505 }
506
507 /* cross check port_map and cap.n_ports */
508 if (pi->flags & AHCI_FLAG_HONOR_PI) {
509 u32 tmp_port_map = port_map;
510 int n_ports = ahci_nr_ports(cap);
511
512 for (i = 0; i < AHCI_MAX_PORTS && n_ports; i++) {
513 if (tmp_port_map & (1 << i)) {
514 n_ports--;
515 tmp_port_map &= ~(1 << i);
516 }
517 }
518
519 /* Whine if inconsistent. No need to update cap.
520 * port_map is used to determine number of ports.
521 */
522 if (n_ports || tmp_port_map)
523 dev_printk(KERN_WARNING, &pdev->dev,
524 "nr_ports (%u) and implemented port map "
525 "(0x%x) don't match\n",
526 ahci_nr_ports(cap), port_map);
527 } else {
528 /* fabricate port_map from cap.nr_ports */
529 port_map = (1 << ahci_nr_ports(cap)) - 1;
530 }
531
532 /* record values to use during operation */
533 hpriv->cap = cap;
534 hpriv->port_map = port_map;
535}
536
537/**
538 * ahci_restore_initial_config - Restore initial config
539 * @host: target ATA host
540 *
541 * Restore initial config stored by ahci_save_initial_config().
542 *
543 * LOCKING:
544 * None.
545 */
546static void ahci_restore_initial_config(struct ata_host *host)
547{
548 struct ahci_host_priv *hpriv = host->private_data;
549 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
550
551 writel(hpriv->saved_cap, mmio + HOST_CAP);
552 writel(hpriv->saved_port_map, mmio + HOST_PORTS_IMPL);
553 (void) readl(mmio + HOST_PORTS_IMPL); /* flush */
478} 554}
479 555
480static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg_in) 556static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg_in)
@@ -511,8 +587,9 @@ static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in,
511 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); 587 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4));
512} 588}
513 589
514static void ahci_start_engine(void __iomem *port_mmio) 590static void ahci_start_engine(struct ata_port *ap)
515{ 591{
592 void __iomem *port_mmio = ahci_port_base(ap);
516 u32 tmp; 593 u32 tmp;
517 594
518 /* start DMA */ 595 /* start DMA */
@@ -522,8 +599,9 @@ static void ahci_start_engine(void __iomem *port_mmio)
522 readl(port_mmio + PORT_CMD); /* flush */ 599 readl(port_mmio + PORT_CMD); /* flush */
523} 600}
524 601
525static int ahci_stop_engine(void __iomem *port_mmio) 602static int ahci_stop_engine(struct ata_port *ap)
526{ 603{
604 void __iomem *port_mmio = ahci_port_base(ap);
527 u32 tmp; 605 u32 tmp;
528 606
529 tmp = readl(port_mmio + PORT_CMD); 607 tmp = readl(port_mmio + PORT_CMD);
@@ -545,19 +623,23 @@ static int ahci_stop_engine(void __iomem *port_mmio)
545 return 0; 623 return 0;
546} 624}
547 625
548static void ahci_start_fis_rx(void __iomem *port_mmio, u32 cap, 626static void ahci_start_fis_rx(struct ata_port *ap)
549 dma_addr_t cmd_slot_dma, dma_addr_t rx_fis_dma)
550{ 627{
628 void __iomem *port_mmio = ahci_port_base(ap);
629 struct ahci_host_priv *hpriv = ap->host->private_data;
630 struct ahci_port_priv *pp = ap->private_data;
551 u32 tmp; 631 u32 tmp;
552 632
553 /* set FIS registers */ 633 /* set FIS registers */
554 if (cap & HOST_CAP_64) 634 if (hpriv->cap & HOST_CAP_64)
555 writel((cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI); 635 writel((pp->cmd_slot_dma >> 16) >> 16,
556 writel(cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR); 636 port_mmio + PORT_LST_ADDR_HI);
637 writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
557 638
558 if (cap & HOST_CAP_64) 639 if (hpriv->cap & HOST_CAP_64)
559 writel((rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI); 640 writel((pp->rx_fis_dma >> 16) >> 16,
560 writel(rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR); 641 port_mmio + PORT_FIS_ADDR_HI);
642 writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
561 643
562 /* enable FIS reception */ 644 /* enable FIS reception */
563 tmp = readl(port_mmio + PORT_CMD); 645 tmp = readl(port_mmio + PORT_CMD);
@@ -568,8 +650,9 @@ static void ahci_start_fis_rx(void __iomem *port_mmio, u32 cap,
568 readl(port_mmio + PORT_CMD); 650 readl(port_mmio + PORT_CMD);
569} 651}
570 652
571static int ahci_stop_fis_rx(void __iomem *port_mmio) 653static int ahci_stop_fis_rx(struct ata_port *ap)
572{ 654{
655 void __iomem *port_mmio = ahci_port_base(ap);
573 u32 tmp; 656 u32 tmp;
574 657
575 /* disable FIS reception */ 658 /* disable FIS reception */
@@ -586,14 +669,16 @@ static int ahci_stop_fis_rx(void __iomem *port_mmio)
586 return 0; 669 return 0;
587} 670}
588 671
589static void ahci_power_up(void __iomem *port_mmio, u32 cap) 672static void ahci_power_up(struct ata_port *ap)
590{ 673{
674 struct ahci_host_priv *hpriv = ap->host->private_data;
675 void __iomem *port_mmio = ahci_port_base(ap);
591 u32 cmd; 676 u32 cmd;
592 677
593 cmd = readl(port_mmio + PORT_CMD) & ~PORT_CMD_ICC_MASK; 678 cmd = readl(port_mmio + PORT_CMD) & ~PORT_CMD_ICC_MASK;
594 679
595 /* spin up device */ 680 /* spin up device */
596 if (cap & HOST_CAP_SSS) { 681 if (hpriv->cap & HOST_CAP_SSS) {
597 cmd |= PORT_CMD_SPIN_UP; 682 cmd |= PORT_CMD_SPIN_UP;
598 writel(cmd, port_mmio + PORT_CMD); 683 writel(cmd, port_mmio + PORT_CMD);
599 } 684 }
@@ -603,11 +688,13 @@ static void ahci_power_up(void __iomem *port_mmio, u32 cap)
603} 688}
604 689
605#ifdef CONFIG_PM 690#ifdef CONFIG_PM
606static void ahci_power_down(void __iomem *port_mmio, u32 cap) 691static void ahci_power_down(struct ata_port *ap)
607{ 692{
693 struct ahci_host_priv *hpriv = ap->host->private_data;
694 void __iomem *port_mmio = ahci_port_base(ap);
608 u32 cmd, scontrol; 695 u32 cmd, scontrol;
609 696
610 if (!(cap & HOST_CAP_SSS)) 697 if (!(hpriv->cap & HOST_CAP_SSS))
611 return; 698 return;
612 699
613 /* put device into listen mode, first set PxSCTL.DET to 0 */ 700 /* put device into listen mode, first set PxSCTL.DET to 0 */
@@ -622,29 +709,28 @@ static void ahci_power_down(void __iomem *port_mmio, u32 cap)
622} 709}
623#endif 710#endif
624 711
625static void ahci_init_port(void __iomem *port_mmio, u32 cap, 712static void ahci_init_port(struct ata_port *ap)
626 dma_addr_t cmd_slot_dma, dma_addr_t rx_fis_dma)
627{ 713{
628 /* enable FIS reception */ 714 /* enable FIS reception */
629 ahci_start_fis_rx(port_mmio, cap, cmd_slot_dma, rx_fis_dma); 715 ahci_start_fis_rx(ap);
630 716
631 /* enable DMA */ 717 /* enable DMA */
632 ahci_start_engine(port_mmio); 718 ahci_start_engine(ap);
633} 719}
634 720
635static int ahci_deinit_port(void __iomem *port_mmio, u32 cap, const char **emsg) 721static int ahci_deinit_port(struct ata_port *ap, const char **emsg)
636{ 722{
637 int rc; 723 int rc;
638 724
639 /* disable DMA */ 725 /* disable DMA */
640 rc = ahci_stop_engine(port_mmio); 726 rc = ahci_stop_engine(ap);
641 if (rc) { 727 if (rc) {
642 *emsg = "failed to stop engine"; 728 *emsg = "failed to stop engine";
643 return rc; 729 return rc;
644 } 730 }
645 731
646 /* disable FIS reception */ 732 /* disable FIS reception */
647 rc = ahci_stop_fis_rx(port_mmio); 733 rc = ahci_stop_fis_rx(ap);
648 if (rc) { 734 if (rc) {
649 *emsg = "failed stop FIS RX"; 735 *emsg = "failed stop FIS RX";
650 return rc; 736 return rc;
@@ -653,12 +739,11 @@ static int ahci_deinit_port(void __iomem *port_mmio, u32 cap, const char **emsg)
653 return 0; 739 return 0;
654} 740}
655 741
656static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev) 742static int ahci_reset_controller(struct ata_host *host)
657{ 743{
658 u32 cap_save, impl_save, tmp; 744 struct pci_dev *pdev = to_pci_dev(host->dev);
659 745 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
660 cap_save = readl(mmio + HOST_CAP); 746 u32 tmp;
661 impl_save = readl(mmio + HOST_PORTS_IMPL);
662 747
663 /* global controller reset */ 748 /* global controller reset */
664 tmp = readl(mmio + HOST_CTL); 749 tmp = readl(mmio + HOST_CTL);
@@ -674,7 +759,7 @@ static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev)
674 759
675 tmp = readl(mmio + HOST_CTL); 760 tmp = readl(mmio + HOST_CTL);
676 if (tmp & HOST_RESET) { 761 if (tmp & HOST_RESET) {
677 dev_printk(KERN_ERR, &pdev->dev, 762 dev_printk(KERN_ERR, host->dev,
678 "controller reset failed (0x%x)\n", tmp); 763 "controller reset failed (0x%x)\n", tmp);
679 return -EIO; 764 return -EIO;
680 } 765 }
@@ -683,18 +768,8 @@ static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev)
683 writel(HOST_AHCI_EN, mmio + HOST_CTL); 768 writel(HOST_AHCI_EN, mmio + HOST_CTL);
684 (void) readl(mmio + HOST_CTL); /* flush */ 769 (void) readl(mmio + HOST_CTL); /* flush */
685 770
686 /* These write-once registers are normally cleared on reset. 771 /* some registers might be cleared on reset. restore initial values */
687 * Restore BIOS values... which we HOPE were present before 772 ahci_restore_initial_config(host);
688 * reset.
689 */
690 if (!impl_save) {
691 impl_save = (1 << ahci_nr_ports(cap_save)) - 1;
692 dev_printk(KERN_WARNING, &pdev->dev,
693 "PORTS_IMPL is zero, forcing 0x%x\n", impl_save);
694 }
695 writel(cap_save, mmio + HOST_CAP);
696 writel(impl_save, mmio + HOST_PORTS_IMPL);
697 (void) readl(mmio + HOST_PORTS_IMPL); /* flush */
698 773
699 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 774 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
700 u16 tmp16; 775 u16 tmp16;
@@ -708,23 +783,23 @@ static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev)
708 return 0; 783 return 0;
709} 784}
710 785
711static void ahci_init_controller(void __iomem *mmio, struct pci_dev *pdev, 786static void ahci_init_controller(struct ata_host *host)
712 int n_ports, unsigned int port_flags,
713 struct ahci_host_priv *hpriv)
714{ 787{
788 struct pci_dev *pdev = to_pci_dev(host->dev);
789 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
715 int i, rc; 790 int i, rc;
716 u32 tmp; 791 u32 tmp;
717 792
718 for (i = 0; i < n_ports; i++) { 793 for (i = 0; i < host->n_ports; i++) {
719 void __iomem *port_mmio = ahci_port_base(mmio, i); 794 struct ata_port *ap = host->ports[i];
795 void __iomem *port_mmio = ahci_port_base(ap);
720 const char *emsg = NULL; 796 const char *emsg = NULL;
721 797
722 if ((port_flags & AHCI_FLAG_HONOR_PI) && 798 if (ata_port_is_dummy(ap))
723 !(hpriv->port_map & (1 << i)))
724 continue; 799 continue;
725 800
726 /* make sure port is not active */ 801 /* make sure port is not active */
727 rc = ahci_deinit_port(port_mmio, hpriv->cap, &emsg); 802 rc = ahci_deinit_port(ap, &emsg);
728 if (rc) 803 if (rc)
729 dev_printk(KERN_WARNING, &pdev->dev, 804 dev_printk(KERN_WARNING, &pdev->dev,
730 "%s (%d)\n", emsg, rc); 805 "%s (%d)\n", emsg, rc);
@@ -752,7 +827,7 @@ static void ahci_init_controller(void __iomem *mmio, struct pci_dev *pdev,
752 827
753static unsigned int ahci_dev_classify(struct ata_port *ap) 828static unsigned int ahci_dev_classify(struct ata_port *ap)
754{ 829{
755 void __iomem *port_mmio = ap->ioaddr.cmd_addr; 830 void __iomem *port_mmio = ahci_port_base(ap);
756 struct ata_taskfile tf; 831 struct ata_taskfile tf;
757 u32 tmp; 832 u32 tmp;
758 833
@@ -802,8 +877,7 @@ static int ahci_clo(struct ata_port *ap)
802static int ahci_softreset(struct ata_port *ap, unsigned int *class) 877static int ahci_softreset(struct ata_port *ap, unsigned int *class)
803{ 878{
804 struct ahci_port_priv *pp = ap->private_data; 879 struct ahci_port_priv *pp = ap->private_data;
805 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR]; 880 void __iomem *port_mmio = ahci_port_base(ap);
806 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
807 const u32 cmd_fis_len = 5; /* five dwords */ 881 const u32 cmd_fis_len = 5; /* five dwords */
808 const char *reason = NULL; 882 const char *reason = NULL;
809 struct ata_taskfile tf; 883 struct ata_taskfile tf;
@@ -820,7 +894,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class)
820 } 894 }
821 895
822 /* prepare for SRST (AHCI-1.1 10.4.1) */ 896 /* prepare for SRST (AHCI-1.1 10.4.1) */
823 rc = ahci_stop_engine(port_mmio); 897 rc = ahci_stop_engine(ap);
824 if (rc) { 898 if (rc) {
825 reason = "failed to stop engine"; 899 reason = "failed to stop engine";
826 goto fail_restart; 900 goto fail_restart;
@@ -840,7 +914,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class)
840 } 914 }
841 915
842 /* restart engine */ 916 /* restart engine */
843 ahci_start_engine(port_mmio); 917 ahci_start_engine(ap);
844 918
845 ata_tf_init(ap->device, &tf); 919 ata_tf_init(ap->device, &tf);
846 fis = pp->cmd_tbl; 920 fis = pp->cmd_tbl;
@@ -899,7 +973,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class)
899 return 0; 973 return 0;
900 974
901 fail_restart: 975 fail_restart:
902 ahci_start_engine(port_mmio); 976 ahci_start_engine(ap);
903 fail: 977 fail:
904 ata_port_printk(ap, KERN_ERR, "softreset failed (%s)\n", reason); 978 ata_port_printk(ap, KERN_ERR, "softreset failed (%s)\n", reason);
905 return rc; 979 return rc;
@@ -910,13 +984,11 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class)
910 struct ahci_port_priv *pp = ap->private_data; 984 struct ahci_port_priv *pp = ap->private_data;
911 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; 985 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
912 struct ata_taskfile tf; 986 struct ata_taskfile tf;
913 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
914 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
915 int rc; 987 int rc;
916 988
917 DPRINTK("ENTER\n"); 989 DPRINTK("ENTER\n");
918 990
919 ahci_stop_engine(port_mmio); 991 ahci_stop_engine(ap);
920 992
921 /* clear D2H reception area to properly wait for D2H FIS */ 993 /* clear D2H reception area to properly wait for D2H FIS */
922 ata_tf_init(ap->device, &tf); 994 ata_tf_init(ap->device, &tf);
@@ -925,7 +997,7 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class)
925 997
926 rc = sata_std_hardreset(ap, class); 998 rc = sata_std_hardreset(ap, class);
927 999
928 ahci_start_engine(port_mmio); 1000 ahci_start_engine(ap);
929 1001
930 if (rc == 0 && ata_port_online(ap)) 1002 if (rc == 0 && ata_port_online(ap))
931 *class = ahci_dev_classify(ap); 1003 *class = ahci_dev_classify(ap);
@@ -938,20 +1010,18 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class)
938 1010
939static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class) 1011static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class)
940{ 1012{
941 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
942 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
943 int rc; 1013 int rc;
944 1014
945 DPRINTK("ENTER\n"); 1015 DPRINTK("ENTER\n");
946 1016
947 ahci_stop_engine(port_mmio); 1017 ahci_stop_engine(ap);
948 1018
949 rc = sata_port_hardreset(ap, sata_ehc_deb_timing(&ap->eh_context)); 1019 rc = sata_port_hardreset(ap, sata_ehc_deb_timing(&ap->eh_context));
950 1020
951 /* vt8251 needs SError cleared for the port to operate */ 1021 /* vt8251 needs SError cleared for the port to operate */
952 ahci_scr_write(ap, SCR_ERROR, ahci_scr_read(ap, SCR_ERROR)); 1022 ahci_scr_write(ap, SCR_ERROR, ahci_scr_read(ap, SCR_ERROR));
953 1023
954 ahci_start_engine(port_mmio); 1024 ahci_start_engine(ap);
955 1025
956 DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class); 1026 DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
957 1027
@@ -963,7 +1033,7 @@ static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class)
963 1033
964static void ahci_postreset(struct ata_port *ap, unsigned int *class) 1034static void ahci_postreset(struct ata_port *ap, unsigned int *class)
965{ 1035{
966 void __iomem *port_mmio = ap->ioaddr.cmd_addr; 1036 void __iomem *port_mmio = ahci_port_base(ap);
967 u32 new_tmp, tmp; 1037 u32 new_tmp, tmp;
968 1038
969 ata_std_postreset(ap, class); 1039 ata_std_postreset(ap, class);
@@ -1131,8 +1201,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
1131 1201
1132static void ahci_host_intr(struct ata_port *ap) 1202static void ahci_host_intr(struct ata_port *ap)
1133{ 1203{
1134 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR]; 1204 void __iomem *port_mmio = ap->ioaddr.cmd_addr;
1135 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1136 struct ata_eh_info *ehi = &ap->eh_info; 1205 struct ata_eh_info *ehi = &ap->eh_info;
1137 struct ahci_port_priv *pp = ap->private_data; 1206 struct ahci_port_priv *pp = ap->private_data;
1138 u32 status, qc_active; 1207 u32 status, qc_active;
@@ -1283,7 +1352,7 @@ static irqreturn_t ahci_interrupt(int irq, void *dev_instance)
1283static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc) 1352static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)
1284{ 1353{
1285 struct ata_port *ap = qc->ap; 1354 struct ata_port *ap = qc->ap;
1286 void __iomem *port_mmio = ap->ioaddr.cmd_addr; 1355 void __iomem *port_mmio = ahci_port_base(ap);
1287 1356
1288 if (qc->tf.protocol == ATA_PROT_NCQ) 1357 if (qc->tf.protocol == ATA_PROT_NCQ)
1289 writel(1 << qc->tag, port_mmio + PORT_SCR_ACT); 1358 writel(1 << qc->tag, port_mmio + PORT_SCR_ACT);
@@ -1295,8 +1364,7 @@ static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)
1295 1364
1296static void ahci_freeze(struct ata_port *ap) 1365static void ahci_freeze(struct ata_port *ap)
1297{ 1366{
1298 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR]; 1367 void __iomem *port_mmio = ahci_port_base(ap);
1299 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1300 1368
1301 /* turn IRQ off */ 1369 /* turn IRQ off */
1302 writel(0, port_mmio + PORT_IRQ_MASK); 1370 writel(0, port_mmio + PORT_IRQ_MASK);
@@ -1305,7 +1373,7 @@ static void ahci_freeze(struct ata_port *ap)
1305static void ahci_thaw(struct ata_port *ap) 1373static void ahci_thaw(struct ata_port *ap)
1306{ 1374{
1307 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR]; 1375 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1308 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no); 1376 void __iomem *port_mmio = ahci_port_base(ap);
1309 u32 tmp; 1377 u32 tmp;
1310 1378
1311 /* clear IRQ */ 1379 /* clear IRQ */
@@ -1319,13 +1387,10 @@ static void ahci_thaw(struct ata_port *ap)
1319 1387
1320static void ahci_error_handler(struct ata_port *ap) 1388static void ahci_error_handler(struct ata_port *ap)
1321{ 1389{
1322 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1323 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1324
1325 if (!(ap->pflags & ATA_PFLAG_FROZEN)) { 1390 if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
1326 /* restart engine */ 1391 /* restart engine */
1327 ahci_stop_engine(port_mmio); 1392 ahci_stop_engine(ap);
1328 ahci_start_engine(port_mmio); 1393 ahci_start_engine(ap);
1329 } 1394 }
1330 1395
1331 /* perform recovery */ 1396 /* perform recovery */
@@ -1335,13 +1400,10 @@ static void ahci_error_handler(struct ata_port *ap)
1335 1400
1336static void ahci_vt8251_error_handler(struct ata_port *ap) 1401static void ahci_vt8251_error_handler(struct ata_port *ap)
1337{ 1402{
1338 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1339 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1340
1341 if (!(ap->pflags & ATA_PFLAG_FROZEN)) { 1403 if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
1342 /* restart engine */ 1404 /* restart engine */
1343 ahci_stop_engine(port_mmio); 1405 ahci_stop_engine(ap);
1344 ahci_start_engine(port_mmio); 1406 ahci_start_engine(ap);
1345 } 1407 }
1346 1408
1347 /* perform recovery */ 1409 /* perform recovery */
@@ -1352,36 +1414,26 @@ static void ahci_vt8251_error_handler(struct ata_port *ap)
1352static void ahci_post_internal_cmd(struct ata_queued_cmd *qc) 1414static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
1353{ 1415{
1354 struct ata_port *ap = qc->ap; 1416 struct ata_port *ap = qc->ap;
1355 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1356 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1357 1417
1358 if (qc->flags & ATA_QCFLAG_FAILED) 1418 if (qc->flags & ATA_QCFLAG_FAILED) {
1359 qc->err_mask |= AC_ERR_OTHER;
1360
1361 if (qc->err_mask) {
1362 /* make DMA engine forget about the failed command */ 1419 /* make DMA engine forget about the failed command */
1363 ahci_stop_engine(port_mmio); 1420 ahci_stop_engine(ap);
1364 ahci_start_engine(port_mmio); 1421 ahci_start_engine(ap);
1365 } 1422 }
1366} 1423}
1367 1424
1368#ifdef CONFIG_PM 1425#ifdef CONFIG_PM
1369static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg) 1426static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg)
1370{ 1427{
1371 struct ahci_host_priv *hpriv = ap->host->private_data;
1372 struct ahci_port_priv *pp = ap->private_data;
1373 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1374 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1375 const char *emsg = NULL; 1428 const char *emsg = NULL;
1376 int rc; 1429 int rc;
1377 1430
1378 rc = ahci_deinit_port(port_mmio, hpriv->cap, &emsg); 1431 rc = ahci_deinit_port(ap, &emsg);
1379 if (rc == 0) 1432 if (rc == 0)
1380 ahci_power_down(port_mmio, hpriv->cap); 1433 ahci_power_down(ap);
1381 else { 1434 else {
1382 ata_port_printk(ap, KERN_ERR, "%s (%d)\n", emsg, rc); 1435 ata_port_printk(ap, KERN_ERR, "%s (%d)\n", emsg, rc);
1383 ahci_init_port(port_mmio, hpriv->cap, 1436 ahci_init_port(ap);
1384 pp->cmd_slot_dma, pp->rx_fis_dma);
1385 } 1437 }
1386 1438
1387 return rc; 1439 return rc;
@@ -1389,13 +1441,8 @@ static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg)
1389 1441
1390static int ahci_port_resume(struct ata_port *ap) 1442static int ahci_port_resume(struct ata_port *ap)
1391{ 1443{
1392 struct ahci_port_priv *pp = ap->private_data; 1444 ahci_power_up(ap);
1393 struct ahci_host_priv *hpriv = ap->host->private_data; 1445 ahci_init_port(ap);
1394 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1395 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1396
1397 ahci_power_up(port_mmio, hpriv->cap);
1398 ahci_init_port(port_mmio, hpriv->cap, pp->cmd_slot_dma, pp->rx_fis_dma);
1399 1446
1400 return 0; 1447 return 0;
1401} 1448}
@@ -1423,8 +1470,6 @@ static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
1423static int ahci_pci_device_resume(struct pci_dev *pdev) 1470static int ahci_pci_device_resume(struct pci_dev *pdev)
1424{ 1471{
1425 struct ata_host *host = dev_get_drvdata(&pdev->dev); 1472 struct ata_host *host = dev_get_drvdata(&pdev->dev);
1426 struct ahci_host_priv *hpriv = host->private_data;
1427 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
1428 int rc; 1473 int rc;
1429 1474
1430 rc = ata_pci_device_do_resume(pdev); 1475 rc = ata_pci_device_do_resume(pdev);
@@ -1432,12 +1477,11 @@ static int ahci_pci_device_resume(struct pci_dev *pdev)
1432 return rc; 1477 return rc;
1433 1478
1434 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { 1479 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {
1435 rc = ahci_reset_controller(mmio, pdev); 1480 rc = ahci_reset_controller(host);
1436 if (rc) 1481 if (rc)
1437 return rc; 1482 return rc;
1438 1483
1439 ahci_init_controller(mmio, pdev, host->n_ports, 1484 ahci_init_controller(host);
1440 host->ports[0]->flags, hpriv);
1441 } 1485 }
1442 1486
1443 ata_host_resume(host); 1487 ata_host_resume(host);
@@ -1449,10 +1493,7 @@ static int ahci_pci_device_resume(struct pci_dev *pdev)
1449static int ahci_port_start(struct ata_port *ap) 1493static int ahci_port_start(struct ata_port *ap)
1450{ 1494{
1451 struct device *dev = ap->host->dev; 1495 struct device *dev = ap->host->dev;
1452 struct ahci_host_priv *hpriv = ap->host->private_data;
1453 struct ahci_port_priv *pp; 1496 struct ahci_port_priv *pp;
1454 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1455 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1456 void *mem; 1497 void *mem;
1457 dma_addr_t mem_dma; 1498 dma_addr_t mem_dma;
1458 int rc; 1499 int rc;
@@ -1500,85 +1541,29 @@ static int ahci_port_start(struct ata_port *ap)
1500 ap->private_data = pp; 1541 ap->private_data = pp;
1501 1542
1502 /* power up port */ 1543 /* power up port */
1503 ahci_power_up(port_mmio, hpriv->cap); 1544 ahci_power_up(ap);
1504 1545
1505 /* initialize port */ 1546 /* initialize port */
1506 ahci_init_port(port_mmio, hpriv->cap, pp->cmd_slot_dma, pp->rx_fis_dma); 1547 ahci_init_port(ap);
1507 1548
1508 return 0; 1549 return 0;
1509} 1550}
1510 1551
1511static void ahci_port_stop(struct ata_port *ap) 1552static void ahci_port_stop(struct ata_port *ap)
1512{ 1553{
1513 struct ahci_host_priv *hpriv = ap->host->private_data;
1514 void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];
1515 void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
1516 const char *emsg = NULL; 1554 const char *emsg = NULL;
1517 int rc; 1555 int rc;
1518 1556
1519 /* de-initialize port */ 1557 /* de-initialize port */
1520 rc = ahci_deinit_port(port_mmio, hpriv->cap, &emsg); 1558 rc = ahci_deinit_port(ap, &emsg);
1521 if (rc) 1559 if (rc)
1522 ata_port_printk(ap, KERN_WARNING, "%s (%d)\n", emsg, rc); 1560 ata_port_printk(ap, KERN_WARNING, "%s (%d)\n", emsg, rc);
1523} 1561}
1524 1562
1525static void ahci_setup_port(struct ata_ioports *port, void __iomem *base, 1563static int ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac)
1526 unsigned int port_idx)
1527{ 1564{
1528 VPRINTK("ENTER, base==0x%lx, port_idx %u\n", base, port_idx);
1529 base = ahci_port_base(base, port_idx);
1530 VPRINTK("base now==0x%lx\n", base);
1531
1532 port->cmd_addr = base;
1533 port->scr_addr = base + PORT_SCR;
1534
1535 VPRINTK("EXIT\n");
1536}
1537
1538static int ahci_host_init(struct ata_probe_ent *probe_ent)
1539{
1540 struct ahci_host_priv *hpriv = probe_ent->private_data;
1541 struct pci_dev *pdev = to_pci_dev(probe_ent->dev);
1542 void __iomem *mmio = probe_ent->iomap[AHCI_PCI_BAR];
1543 unsigned int i, cap_n_ports, using_dac;
1544 int rc; 1565 int rc;
1545 1566
1546 rc = ahci_reset_controller(mmio, pdev);
1547 if (rc)
1548 return rc;
1549
1550 hpriv->cap = readl(mmio + HOST_CAP);
1551 hpriv->port_map = readl(mmio + HOST_PORTS_IMPL);
1552 cap_n_ports = ahci_nr_ports(hpriv->cap);
1553
1554 VPRINTK("cap 0x%x port_map 0x%x n_ports %d\n",
1555 hpriv->cap, hpriv->port_map, cap_n_ports);
1556
1557 if (probe_ent->port_flags & AHCI_FLAG_HONOR_PI) {
1558 unsigned int n_ports = cap_n_ports;
1559 u32 port_map = hpriv->port_map;
1560 int max_port = 0;
1561
1562 for (i = 0; i < AHCI_MAX_PORTS && n_ports; i++) {
1563 if (port_map & (1 << i)) {
1564 n_ports--;
1565 port_map &= ~(1 << i);
1566 max_port = i;
1567 } else
1568 probe_ent->dummy_port_mask |= 1 << i;
1569 }
1570
1571 if (n_ports || port_map)
1572 dev_printk(KERN_WARNING, &pdev->dev,
1573 "nr_ports (%u) and implemented port map "
1574 "(0x%x) don't match\n",
1575 cap_n_ports, hpriv->port_map);
1576
1577 probe_ent->n_ports = max_port + 1;
1578 } else
1579 probe_ent->n_ports = cap_n_ports;
1580
1581 using_dac = hpriv->cap & HOST_CAP_64;
1582 if (using_dac && 1567 if (using_dac &&
1583 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { 1568 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1584 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); 1569 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
@@ -1604,23 +1589,14 @@ static int ahci_host_init(struct ata_probe_ent *probe_ent)
1604 return rc; 1589 return rc;
1605 } 1590 }
1606 } 1591 }
1607
1608 for (i = 0; i < probe_ent->n_ports; i++)
1609 ahci_setup_port(&probe_ent->port[i], mmio, i);
1610
1611 ahci_init_controller(mmio, pdev, probe_ent->n_ports,
1612 probe_ent->port_flags, hpriv);
1613
1614 pci_set_master(pdev);
1615
1616 return 0; 1592 return 0;
1617} 1593}
1618 1594
1619static void ahci_print_info(struct ata_probe_ent *probe_ent) 1595static void ahci_print_info(struct ata_host *host)
1620{ 1596{
1621 struct ahci_host_priv *hpriv = probe_ent->private_data; 1597 struct ahci_host_priv *hpriv = host->private_data;
1622 struct pci_dev *pdev = to_pci_dev(probe_ent->dev); 1598 struct pci_dev *pdev = to_pci_dev(host->dev);
1623 void __iomem *mmio = probe_ent->iomap[AHCI_PCI_BAR]; 1599 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
1624 u32 vers, cap, impl, speed; 1600 u32 vers, cap, impl, speed;
1625 const char *speed_s; 1601 const char *speed_s;
1626 u16 cc; 1602 u16 cc;
@@ -1690,11 +1666,12 @@ static void ahci_print_info(struct ata_probe_ent *probe_ent)
1690static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 1666static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1691{ 1667{
1692 static int printed_version; 1668 static int printed_version;
1693 unsigned int board_idx = (unsigned int) ent->driver_data; 1669 struct ata_port_info pi = ahci_port_info[ent->driver_data];
1670 const struct ata_port_info *ppi[] = { &pi, NULL };
1694 struct device *dev = &pdev->dev; 1671 struct device *dev = &pdev->dev;
1695 struct ata_probe_ent *probe_ent;
1696 struct ahci_host_priv *hpriv; 1672 struct ahci_host_priv *hpriv;
1697 int rc; 1673 struct ata_host *host;
1674 int i, rc;
1698 1675
1699 VPRINTK("ENTER\n"); 1676 VPRINTK("ENTER\n");
1700 1677
@@ -1703,6 +1680,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1703 if (!printed_version++) 1680 if (!printed_version++)
1704 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 1681 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
1705 1682
1683 /* acquire resources */
1706 rc = pcim_enable_device(pdev); 1684 rc = pcim_enable_device(pdev);
1707 if (rc) 1685 if (rc)
1708 return rc; 1686 return rc;
@@ -1716,44 +1694,49 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1716 if (pci_enable_msi(pdev)) 1694 if (pci_enable_msi(pdev))
1717 pci_intx(pdev, 1); 1695 pci_intx(pdev, 1);
1718 1696
1719 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
1720 if (probe_ent == NULL)
1721 return -ENOMEM;
1722
1723 probe_ent->dev = pci_dev_to_dev(pdev);
1724 INIT_LIST_HEAD(&probe_ent->node);
1725
1726 hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL); 1697 hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
1727 if (!hpriv) 1698 if (!hpriv)
1728 return -ENOMEM; 1699 return -ENOMEM;
1729 1700
1730 probe_ent->sht = ahci_port_info[board_idx].sht; 1701 /* save initial config */
1731 probe_ent->port_flags = ahci_port_info[board_idx].flags; 1702 ahci_save_initial_config(pdev, &pi, hpriv);
1732 probe_ent->pio_mask = ahci_port_info[board_idx].pio_mask;
1733 probe_ent->udma_mask = ahci_port_info[board_idx].udma_mask;
1734 probe_ent->port_ops = ahci_port_info[board_idx].port_ops;
1735 1703
1736 probe_ent->irq = pdev->irq; 1704 /* prepare host */
1737 probe_ent->irq_flags = IRQF_SHARED; 1705 if (!(pi.flags & AHCI_FLAG_NO_NCQ) && (hpriv->cap & HOST_CAP_NCQ))
1738 probe_ent->iomap = pcim_iomap_table(pdev); 1706 pi.flags |= ATA_FLAG_NCQ;
1739 probe_ent->private_data = hpriv; 1707
1708 host = ata_host_alloc_pinfo(&pdev->dev, ppi, fls(hpriv->port_map));
1709 if (!host)
1710 return -ENOMEM;
1711 host->iomap = pcim_iomap_table(pdev);
1712 host->private_data = hpriv;
1713
1714 for (i = 0; i < host->n_ports; i++) {
1715 if (hpriv->port_map & (1 << i)) {
1716 struct ata_port *ap = host->ports[i];
1717 void __iomem *port_mmio = ahci_port_base(ap);
1718
1719 ap->ioaddr.cmd_addr = port_mmio;
1720 ap->ioaddr.scr_addr = port_mmio + PORT_SCR;
1721 } else
1722 host->ports[i]->ops = &ata_dummy_port_ops;
1723 }
1740 1724
1741 /* initialize adapter */ 1725 /* initialize adapter */
1742 rc = ahci_host_init(probe_ent); 1726 rc = ahci_configure_dma_masks(pdev, hpriv->cap & HOST_CAP_64);
1743 if (rc) 1727 if (rc)
1744 return rc; 1728 return rc;
1745 1729
1746 if (!(probe_ent->port_flags & AHCI_FLAG_NO_NCQ) && 1730 rc = ahci_reset_controller(host);
1747 (hpriv->cap & HOST_CAP_NCQ)) 1731 if (rc)
1748 probe_ent->port_flags |= ATA_FLAG_NCQ; 1732 return rc;
1749
1750 ahci_print_info(probe_ent);
1751 1733
1752 if (!ata_device_add(probe_ent)) 1734 ahci_init_controller(host);
1753 return -ENODEV; 1735 ahci_print_info(host);
1754 1736
1755 devm_kfree(dev, probe_ent); 1737 pci_set_master(pdev);
1756 return 0; 1738 return ata_host_activate(host, pdev->irq, ahci_interrupt, IRQF_SHARED,
1739 &ahci_sht);
1757} 1740}
1758 1741
1759static int __init ahci_init(void) 1742static int __init ahci_init(void)
diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c
index d8e79882b880..92a491ddd030 100644
--- a/drivers/ata/ata_generic.c
+++ b/drivers/ata/ata_generic.c
@@ -33,35 +33,6 @@
33 */ 33 */
34 34
35/** 35/**
36 * generic_pre_reset - probe begin
37 * @ap: ATA port
38 *
39 * Set up cable type and use generic probe init
40 */
41
42static int generic_pre_reset(struct ata_port *ap)
43{
44 ap->cbl = ATA_CBL_PATA80;
45 return ata_std_prereset(ap);
46}
47
48
49/**
50 * generic_error_handler - Probe specified port on PATA host controller
51 * @ap: Port to probe
52 * @classes:
53 *
54 * LOCKING:
55 * None (inherited from caller).
56 */
57
58
59static void generic_error_handler(struct ata_port *ap)
60{
61 ata_bmdma_drive_eh(ap, generic_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
62}
63
64/**
65 * generic_set_mode - mode setting 36 * generic_set_mode - mode setting
66 * @ap: interface to set up 37 * @ap: interface to set up
67 * @unused: returned device on error 38 * @unused: returned device on error
@@ -144,8 +115,9 @@ static struct ata_port_operations generic_port_ops = {
144 115
145 .freeze = ata_bmdma_freeze, 116 .freeze = ata_bmdma_freeze,
146 .thaw = ata_bmdma_thaw, 117 .thaw = ata_bmdma_thaw,
147 .error_handler = generic_error_handler, 118 .error_handler = ata_bmdma_error_handler,
148 .post_internal_cmd = ata_bmdma_post_internal_cmd, 119 .post_internal_cmd = ata_bmdma_post_internal_cmd,
120 .cable_detect = ata_cable_unknown,
149 121
150 .qc_prep = ata_qc_prep, 122 .qc_prep = ata_qc_prep,
151 .qc_issue = ata_qc_issue_prot, 123 .qc_issue = ata_qc_issue_prot,
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index b952c584338f..55d306a3e538 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -93,7 +93,7 @@
93#include <linux/libata.h> 93#include <linux/libata.h>
94 94
95#define DRV_NAME "ata_piix" 95#define DRV_NAME "ata_piix"
96#define DRV_VERSION "2.10ac1" 96#define DRV_VERSION "2.11"
97 97
98enum { 98enum {
99 PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ 99 PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
@@ -155,11 +155,11 @@ struct piix_host_priv {
155static int piix_init_one (struct pci_dev *pdev, 155static int piix_init_one (struct pci_dev *pdev,
156 const struct pci_device_id *ent); 156 const struct pci_device_id *ent);
157static void piix_pata_error_handler(struct ata_port *ap); 157static void piix_pata_error_handler(struct ata_port *ap);
158static void ich_pata_error_handler(struct ata_port *ap);
159static void piix_sata_error_handler(struct ata_port *ap); 158static void piix_sata_error_handler(struct ata_port *ap);
160static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev); 159static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev);
161static void piix_set_dmamode (struct ata_port *ap, struct ata_device *adev); 160static void piix_set_dmamode (struct ata_port *ap, struct ata_device *adev);
162static void ich_set_dmamode (struct ata_port *ap, struct ata_device *adev); 161static void ich_set_dmamode (struct ata_port *ap, struct ata_device *adev);
162static int ich_pata_cable_detect(struct ata_port *ap);
163 163
164static unsigned int in_module_init = 1; 164static unsigned int in_module_init = 1;
165 165
@@ -305,6 +305,7 @@ static const struct ata_port_operations piix_pata_ops = {
305 .thaw = ata_bmdma_thaw, 305 .thaw = ata_bmdma_thaw,
306 .error_handler = piix_pata_error_handler, 306 .error_handler = piix_pata_error_handler,
307 .post_internal_cmd = ata_bmdma_post_internal_cmd, 307 .post_internal_cmd = ata_bmdma_post_internal_cmd,
308 .cable_detect = ata_cable_40wire,
308 309
309 .irq_handler = ata_interrupt, 310 .irq_handler = ata_interrupt,
310 .irq_clear = ata_bmdma_irq_clear, 311 .irq_clear = ata_bmdma_irq_clear,
@@ -336,8 +337,9 @@ static const struct ata_port_operations ich_pata_ops = {
336 337
337 .freeze = ata_bmdma_freeze, 338 .freeze = ata_bmdma_freeze,
338 .thaw = ata_bmdma_thaw, 339 .thaw = ata_bmdma_thaw,
339 .error_handler = ich_pata_error_handler, 340 .error_handler = piix_pata_error_handler,
340 .post_internal_cmd = ata_bmdma_post_internal_cmd, 341 .post_internal_cmd = ata_bmdma_post_internal_cmd,
342 .cable_detect = ich_pata_cable_detect,
341 343
342 .irq_handler = ata_interrupt, 344 .irq_handler = ata_interrupt,
343 .irq_clear = ata_bmdma_irq_clear, 345 .irq_clear = ata_bmdma_irq_clear,
@@ -580,12 +582,13 @@ static const struct ich_laptop ich_laptop[] = {
580 /* devid, subvendor, subdev */ 582 /* devid, subvendor, subdev */
581 { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */ 583 { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
582 { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */ 584 { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
585 { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
583 /* end marker */ 586 /* end marker */
584 { 0, } 587 { 0, }
585}; 588};
586 589
587/** 590/**
588 * piix_pata_cbl_detect - Probe host controller cable detect info 591 * ich_pata_cable_detect - Probe host controller cable detect info
589 * @ap: Port for which cable detect info is desired 592 * @ap: Port for which cable detect info is desired
590 * 593 *
591 * Read 80c cable indicator from ATA PCI device's PCI config 594 * Read 80c cable indicator from ATA PCI device's PCI config
@@ -595,23 +598,18 @@ static const struct ich_laptop ich_laptop[] = {
595 * None (inherited from caller). 598 * None (inherited from caller).
596 */ 599 */
597 600
598static void ich_pata_cbl_detect(struct ata_port *ap) 601static int ich_pata_cable_detect(struct ata_port *ap)
599{ 602{
600 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 603 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
601 const struct ich_laptop *lap = &ich_laptop[0]; 604 const struct ich_laptop *lap = &ich_laptop[0];
602 u8 tmp, mask; 605 u8 tmp, mask;
603 606
604 /* no 80c support in host controller? */
605 if ((ap->udma_mask & ~ATA_UDMA_MASK_40C) == 0)
606 goto cbl40;
607
608 /* Check for specials - Acer Aspire 5602WLMi */ 607 /* Check for specials - Acer Aspire 5602WLMi */
609 while (lap->device) { 608 while (lap->device) {
610 if (lap->device == pdev->device && 609 if (lap->device == pdev->device &&
611 lap->subvendor == pdev->subsystem_vendor && 610 lap->subvendor == pdev->subsystem_vendor &&
612 lap->subdevice == pdev->subsystem_device) { 611 lap->subdevice == pdev->subsystem_device) {
613 ap->cbl = ATA_CBL_PATA40_SHORT; 612 return ATA_CBL_PATA40_SHORT;
614 return;
615 } 613 }
616 lap++; 614 lap++;
617 } 615 }
@@ -620,20 +618,14 @@ static void ich_pata_cbl_detect(struct ata_port *ap)
620 mask = ap->port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC; 618 mask = ap->port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC;
621 pci_read_config_byte(pdev, PIIX_IOCFG, &tmp); 619 pci_read_config_byte(pdev, PIIX_IOCFG, &tmp);
622 if ((tmp & mask) == 0) 620 if ((tmp & mask) == 0)
623 goto cbl40; 621 return ATA_CBL_PATA40;
624 622 return ATA_CBL_PATA80;
625 ap->cbl = ATA_CBL_PATA80;
626 return;
627
628cbl40:
629 ap->cbl = ATA_CBL_PATA40;
630} 623}
631 624
632/** 625/**
633 * piix_pata_prereset - prereset for PATA host controller 626 * piix_pata_prereset - prereset for PATA host controller
634 * @ap: Target port 627 * @ap: Target port
635 * 628 *
636 *
637 * LOCKING: 629 * LOCKING:
638 * None (inherited from caller). 630 * None (inherited from caller).
639 */ 631 */
@@ -643,8 +635,6 @@ static int piix_pata_prereset(struct ata_port *ap)
643 635
644 if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->port_no])) 636 if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->port_no]))
645 return -ENOENT; 637 return -ENOENT;
646
647 ap->cbl = ATA_CBL_PATA40;
648 return ata_std_prereset(ap); 638 return ata_std_prereset(ap);
649} 639}
650 640
@@ -655,30 +645,6 @@ static void piix_pata_error_handler(struct ata_port *ap)
655} 645}
656 646
657 647
658/**
659 * ich_pata_prereset - prereset for PATA host controller
660 * @ap: Target port
661 *
662 *
663 * LOCKING:
664 * None (inherited from caller).
665 */
666static int ich_pata_prereset(struct ata_port *ap)
667{
668 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
669
670 if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->port_no]))
671 return -ENOENT;
672 ich_pata_cbl_detect(ap);
673 return ata_std_prereset(ap);
674}
675
676static void ich_pata_error_handler(struct ata_port *ap)
677{
678 ata_bmdma_drive_eh(ap, ich_pata_prereset, ata_std_softreset, NULL,
679 ata_std_postreset);
680}
681
682static void piix_sata_error_handler(struct ata_port *ap) 648static void piix_sata_error_handler(struct ata_port *ap)
683{ 649{
684 ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, NULL, 650 ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, NULL,
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 0abd72d0dec2..ca67484af1eb 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -72,7 +72,7 @@ static unsigned int ata_dev_init_params(struct ata_device *dev,
72static unsigned int ata_dev_set_xfermode(struct ata_device *dev); 72static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73static void ata_dev_xfermask(struct ata_device *dev); 73static void ata_dev_xfermask(struct ata_device *dev);
74 74
75static unsigned int ata_print_id = 1; 75unsigned int ata_print_id = 1;
76static struct workqueue_struct *ata_wq; 76static struct workqueue_struct *ata_wq;
77 77
78struct workqueue_struct *ata_aux_wq; 78struct workqueue_struct *ata_aux_wq;
@@ -89,6 +89,10 @@ int libata_fua = 0;
89module_param_named(fua, libata_fua, int, 0444); 89module_param_named(fua, libata_fua, int, 0444);
90MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); 90MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
91 91
92static int ata_ignore_hpa = 0;
93module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
94MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
95
92static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; 96static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
93module_param(ata_probe_timeout, int, 0444); 97module_param(ata_probe_timeout, int, 0444);
94MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); 98MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
@@ -808,6 +812,205 @@ void ata_id_c_string(const u16 *id, unsigned char *s,
808 *p = '\0'; 812 *p = '\0';
809} 813}
810 814
815static u64 ata_tf_to_lba48(struct ata_taskfile *tf)
816{
817 u64 sectors = 0;
818
819 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
820 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
821 sectors |= (tf->hob_lbal & 0xff) << 24;
822 sectors |= (tf->lbah & 0xff) << 16;
823 sectors |= (tf->lbam & 0xff) << 8;
824 sectors |= (tf->lbal & 0xff);
825
826 return ++sectors;
827}
828
829static u64 ata_tf_to_lba(struct ata_taskfile *tf)
830{
831 u64 sectors = 0;
832
833 sectors |= (tf->device & 0x0f) << 24;
834 sectors |= (tf->lbah & 0xff) << 16;
835 sectors |= (tf->lbam & 0xff) << 8;
836 sectors |= (tf->lbal & 0xff);
837
838 return ++sectors;
839}
840
841/**
842 * ata_read_native_max_address_ext - LBA48 native max query
843 * @dev: Device to query
844 *
845 * Perform an LBA48 size query upon the device in question. Return the
846 * actual LBA48 size or zero if the command fails.
847 */
848
849static u64 ata_read_native_max_address_ext(struct ata_device *dev)
850{
851 unsigned int err;
852 struct ata_taskfile tf;
853
854 ata_tf_init(dev, &tf);
855
856 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
857 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 | ATA_TFLAG_ISADDR;
858 tf.protocol |= ATA_PROT_NODATA;
859 tf.device |= 0x40;
860
861 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
862 if (err)
863 return 0;
864
865 return ata_tf_to_lba48(&tf);
866}
867
868/**
869 * ata_read_native_max_address - LBA28 native max query
870 * @dev: Device to query
871 *
872 * Performa an LBA28 size query upon the device in question. Return the
873 * actual LBA28 size or zero if the command fails.
874 */
875
876static u64 ata_read_native_max_address(struct ata_device *dev)
877{
878 unsigned int err;
879 struct ata_taskfile tf;
880
881 ata_tf_init(dev, &tf);
882
883 tf.command = ATA_CMD_READ_NATIVE_MAX;
884 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
885 tf.protocol |= ATA_PROT_NODATA;
886 tf.device |= 0x40;
887
888 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
889 if (err)
890 return 0;
891
892 return ata_tf_to_lba(&tf);
893}
894
895/**
896 * ata_set_native_max_address_ext - LBA48 native max set
897 * @dev: Device to query
898 *
899 * Perform an LBA48 size set max upon the device in question. Return the
900 * actual LBA48 size or zero if the command fails.
901 */
902
903static u64 ata_set_native_max_address_ext(struct ata_device *dev, u64 new_sectors)
904{
905 unsigned int err;
906 struct ata_taskfile tf;
907
908 new_sectors--;
909
910 ata_tf_init(dev, &tf);
911
912 tf.command = ATA_CMD_SET_MAX_EXT;
913 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48 | ATA_TFLAG_ISADDR;
914 tf.protocol |= ATA_PROT_NODATA;
915 tf.device |= 0x40;
916
917 tf.lbal = (new_sectors >> 0) & 0xff;
918 tf.lbam = (new_sectors >> 8) & 0xff;
919 tf.lbah = (new_sectors >> 16) & 0xff;
920
921 tf.hob_lbal = (new_sectors >> 24) & 0xff;
922 tf.hob_lbam = (new_sectors >> 32) & 0xff;
923 tf.hob_lbah = (new_sectors >> 40) & 0xff;
924
925 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
926 if (err)
927 return 0;
928
929 return ata_tf_to_lba48(&tf);
930}
931
932/**
933 * ata_set_native_max_address - LBA28 native max set
934 * @dev: Device to query
935 *
936 * Perform an LBA28 size set max upon the device in question. Return the
937 * actual LBA28 size or zero if the command fails.
938 */
939
940static u64 ata_set_native_max_address(struct ata_device *dev, u64 new_sectors)
941{
942 unsigned int err;
943 struct ata_taskfile tf;
944
945 new_sectors--;
946
947 ata_tf_init(dev, &tf);
948
949 tf.command = ATA_CMD_SET_MAX;
950 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
951 tf.protocol |= ATA_PROT_NODATA;
952
953 tf.lbal = (new_sectors >> 0) & 0xff;
954 tf.lbam = (new_sectors >> 8) & 0xff;
955 tf.lbah = (new_sectors >> 16) & 0xff;
956 tf.device |= ((new_sectors >> 24) & 0x0f) | 0x40;
957
958 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
959 if (err)
960 return 0;
961
962 return ata_tf_to_lba(&tf);
963}
964
965/**
966 * ata_hpa_resize - Resize a device with an HPA set
967 * @dev: Device to resize
968 *
969 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
970 * it if required to the full size of the media. The caller must check
971 * the drive has the HPA feature set enabled.
972 */
973
974static u64 ata_hpa_resize(struct ata_device *dev)
975{
976 u64 sectors = dev->n_sectors;
977 u64 hpa_sectors;
978
979 if (ata_id_has_lba48(dev->id))
980 hpa_sectors = ata_read_native_max_address_ext(dev);
981 else
982 hpa_sectors = ata_read_native_max_address(dev);
983
984 /* if no hpa, both should be equal */
985 ata_dev_printk(dev, KERN_INFO, "%s 1: sectors = %lld, "
986 "hpa_sectors = %lld\n",
987 __FUNCTION__, (long long)sectors, (long long)hpa_sectors);
988
989 if (hpa_sectors > sectors) {
990 ata_dev_printk(dev, KERN_INFO,
991 "Host Protected Area detected:\n"
992 "\tcurrent size: %lld sectors\n"
993 "\tnative size: %lld sectors\n",
994 (long long)sectors, (long long)hpa_sectors);
995
996 if (ata_ignore_hpa) {
997 if (ata_id_has_lba48(dev->id))
998 hpa_sectors = ata_set_native_max_address_ext(dev, hpa_sectors);
999 else
1000 hpa_sectors = ata_set_native_max_address(dev,
1001 hpa_sectors);
1002
1003 if (hpa_sectors) {
1004 ata_dev_printk(dev, KERN_INFO, "native size "
1005 "increased to %lld sectors\n",
1006 (long long)hpa_sectors);
1007 return hpa_sectors;
1008 }
1009 }
1010 }
1011 return sectors;
1012}
1013
811static u64 ata_id_n_sectors(const u16 *id) 1014static u64 ata_id_n_sectors(const u16 *id)
812{ 1015{
813 if (ata_id_has_lba(id)) { 1016 if (ata_id_has_lba(id)) {
@@ -1270,12 +1473,16 @@ unsigned ata_exec_internal_sg(struct ata_device *dev,
1270 if (ap->ops->post_internal_cmd) 1473 if (ap->ops->post_internal_cmd)
1271 ap->ops->post_internal_cmd(qc); 1474 ap->ops->post_internal_cmd(qc);
1272 1475
1273 if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) { 1476 /* perform minimal error analysis */
1274 if (ata_msg_warn(ap)) 1477 if (qc->flags & ATA_QCFLAG_FAILED) {
1275 ata_dev_printk(dev, KERN_WARNING, 1478 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1276 "zero err_mask for failed " 1479 qc->err_mask |= AC_ERR_DEV;
1277 "internal command, assuming AC_ERR_OTHER\n"); 1480
1278 qc->err_mask |= AC_ERR_OTHER; 1481 if (!qc->err_mask)
1482 qc->err_mask |= AC_ERR_OTHER;
1483
1484 if (qc->err_mask & ~AC_ERR_OTHER)
1485 qc->err_mask &= ~AC_ERR_OTHER;
1279 } 1486 }
1280 1487
1281 /* finish up */ 1488 /* finish up */
@@ -1379,30 +1586,44 @@ unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1379 * Check if the current speed of the device requires IORDY. Used 1586 * Check if the current speed of the device requires IORDY. Used
1380 * by various controllers for chip configuration. 1587 * by various controllers for chip configuration.
1381 */ 1588 */
1382 1589
1383unsigned int ata_pio_need_iordy(const struct ata_device *adev) 1590unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1384{ 1591{
1385 int pio; 1592 /* Controller doesn't support IORDY. Probably a pointless check
1386 int speed = adev->pio_mode - XFER_PIO_0; 1593 as the caller should know this */
1387 1594 if (adev->ap->flags & ATA_FLAG_NO_IORDY)
1388 if (speed < 2)
1389 return 0; 1595 return 0;
1390 if (speed > 2) 1596 /* PIO3 and higher it is mandatory */
1597 if (adev->pio_mode > XFER_PIO_2)
1598 return 1;
1599 /* We turn it on when possible */
1600 if (ata_id_has_iordy(adev->id))
1391 return 1; 1601 return 1;
1602 return 0;
1603}
1392 1604
1605/**
1606 * ata_pio_mask_no_iordy - Return the non IORDY mask
1607 * @adev: ATA device
1608 *
1609 * Compute the highest mode possible if we are not using iordy. Return
1610 * -1 if no iordy mode is available.
1611 */
1612
1613static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1614{
1393 /* If we have no drive specific rule, then PIO 2 is non IORDY */ 1615 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1394
1395 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ 1616 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1396 pio = adev->id[ATA_ID_EIDE_PIO]; 1617 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1397 /* Is the speed faster than the drive allows non IORDY ? */ 1618 /* Is the speed faster than the drive allows non IORDY ? */
1398 if (pio) { 1619 if (pio) {
1399 /* This is cycle times not frequency - watch the logic! */ 1620 /* This is cycle times not frequency - watch the logic! */
1400 if (pio > 240) /* PIO2 is 240nS per cycle */ 1621 if (pio > 240) /* PIO2 is 240nS per cycle */
1401 return 1; 1622 return 3 << ATA_SHIFT_PIO;
1402 return 0; 1623 return 7 << ATA_SHIFT_PIO;
1403 } 1624 }
1404 } 1625 }
1405 return 0; 1626 return 3 << ATA_SHIFT_PIO;
1406} 1627}
1407 1628
1408/** 1629/**
@@ -1431,13 +1652,13 @@ int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1431 struct ata_taskfile tf; 1652 struct ata_taskfile tf;
1432 unsigned int err_mask = 0; 1653 unsigned int err_mask = 0;
1433 const char *reason; 1654 const char *reason;
1655 int tried_spinup = 0;
1434 int rc; 1656 int rc;
1435 1657
1436 if (ata_msg_ctl(ap)) 1658 if (ata_msg_ctl(ap))
1437 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); 1659 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);
1438 1660
1439 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ 1661 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1440
1441 retry: 1662 retry:
1442 ata_tf_init(dev, &tf); 1663 ata_tf_init(dev, &tf);
1443 1664
@@ -1494,6 +1715,32 @@ int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1494 goto err_out; 1715 goto err_out;
1495 } 1716 }
1496 1717
1718 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1719 tried_spinup = 1;
1720 /*
1721 * Drive powered-up in standby mode, and requires a specific
1722 * SET_FEATURES spin-up subcommand before it will accept
1723 * anything other than the original IDENTIFY command.
1724 */
1725 ata_tf_init(dev, &tf);
1726 tf.command = ATA_CMD_SET_FEATURES;
1727 tf.feature = SETFEATURES_SPINUP;
1728 tf.protocol = ATA_PROT_NODATA;
1729 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1730 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1731 if (err_mask) {
1732 rc = -EIO;
1733 reason = "SPINUP failed";
1734 goto err_out;
1735 }
1736 /*
1737 * If the drive initially returned incomplete IDENTIFY info,
1738 * we now must reissue the IDENTIFY command.
1739 */
1740 if (id[2] == 0x37c8)
1741 goto retry;
1742 }
1743
1497 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { 1744 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1498 /* 1745 /*
1499 * The exact sequence expected by certain pre-ATA4 drives is: 1746 * The exact sequence expected by certain pre-ATA4 drives is:
@@ -1560,20 +1807,6 @@ static void ata_dev_config_ncq(struct ata_device *dev,
1560 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); 1807 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1561} 1808}
1562 1809
1563static void ata_set_port_max_cmd_len(struct ata_port *ap)
1564{
1565 int i;
1566
1567 if (ap->scsi_host) {
1568 unsigned int len = 0;
1569
1570 for (i = 0; i < ATA_MAX_DEVICES; i++)
1571 len = max(len, ap->device[i].cdb_len);
1572
1573 ap->scsi_host->max_cmd_len = len;
1574 }
1575}
1576
1577/** 1810/**
1578 * ata_dev_configure - Configure the specified ATA/ATAPI device 1811 * ata_dev_configure - Configure the specified ATA/ATAPI device
1579 * @dev: Target device to configure 1812 * @dev: Target device to configure
@@ -1658,6 +1891,7 @@ int ata_dev_configure(struct ata_device *dev)
1658 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); 1891 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1659 1892
1660 dev->n_sectors = ata_id_n_sectors(id); 1893 dev->n_sectors = ata_id_n_sectors(id);
1894 dev->n_sectors_boot = dev->n_sectors;
1661 1895
1662 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ 1896 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1663 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, 1897 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
@@ -1684,6 +1918,9 @@ int ata_dev_configure(struct ata_device *dev)
1684 dev->flags |= ATA_DFLAG_FLUSH_EXT; 1918 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1685 } 1919 }
1686 1920
1921 if (ata_id_hpa_enabled(dev->id))
1922 dev->n_sectors = ata_hpa_resize(dev);
1923
1687 /* config NCQ */ 1924 /* config NCQ */
1688 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); 1925 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1689 1926
@@ -1773,8 +2010,6 @@ int ata_dev_configure(struct ata_device *dev)
1773 } 2010 }
1774 } 2011 }
1775 2012
1776 ata_set_port_max_cmd_len(ap);
1777
1778 /* limit bridge transfers to udma5, 200 sectors */ 2013 /* limit bridge transfers to udma5, 200 sectors */
1779 if (ata_dev_knobble(dev)) { 2014 if (ata_dev_knobble(dev)) {
1780 if (ata_msg_drv(ap) && print_info) 2015 if (ata_msg_drv(ap) && print_info)
@@ -1785,14 +2020,15 @@ int ata_dev_configure(struct ata_device *dev)
1785 } 2020 }
1786 2021
1787 if (ata_device_blacklisted(dev) & ATA_HORKAGE_MAX_SEC_128) 2022 if (ata_device_blacklisted(dev) & ATA_HORKAGE_MAX_SEC_128)
1788 dev->max_sectors = min(ATA_MAX_SECTORS_128, dev->max_sectors); 2023 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2024 dev->max_sectors);
1789 2025
1790 /* limit ATAPI DMA to R/W commands only */ 2026 /* limit ATAPI DMA to R/W commands only */
1791 if (ata_device_blacklisted(dev) & ATA_HORKAGE_DMA_RW_ONLY) 2027 if (ata_device_blacklisted(dev) & ATA_HORKAGE_DMA_RW_ONLY)
1792 dev->horkage |= ATA_HORKAGE_DMA_RW_ONLY; 2028 dev->horkage |= ATA_HORKAGE_DMA_RW_ONLY;
1793 2029
1794 if (ap->ops->dev_config) 2030 if (ap->ops->dev_config)
1795 ap->ops->dev_config(ap, dev); 2031 ap->ops->dev_config(dev);
1796 2032
1797 if (ata_msg_probe(ap)) 2033 if (ata_msg_probe(ap))
1798 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", 2034 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
@@ -1807,6 +2043,56 @@ err_out_nosup:
1807} 2043}
1808 2044
1809/** 2045/**
2046 * ata_cable_40wire - return 40 wire cable type
2047 * @ap: port
2048 *
2049 * Helper method for drivers which want to hardwire 40 wire cable
2050 * detection.
2051 */
2052
2053int ata_cable_40wire(struct ata_port *ap)
2054{
2055 return ATA_CBL_PATA40;
2056}
2057
2058/**
2059 * ata_cable_80wire - return 80 wire cable type
2060 * @ap: port
2061 *
2062 * Helper method for drivers which want to hardwire 80 wire cable
2063 * detection.
2064 */
2065
2066int ata_cable_80wire(struct ata_port *ap)
2067{
2068 return ATA_CBL_PATA80;
2069}
2070
2071/**
2072 * ata_cable_unknown - return unknown PATA cable.
2073 * @ap: port
2074 *
2075 * Helper method for drivers which have no PATA cable detection.
2076 */
2077
2078int ata_cable_unknown(struct ata_port *ap)
2079{
2080 return ATA_CBL_PATA_UNK;
2081}
2082
2083/**
2084 * ata_cable_sata - return SATA cable type
2085 * @ap: port
2086 *
2087 * Helper method for drivers which have SATA cables
2088 */
2089
2090int ata_cable_sata(struct ata_port *ap)
2091{
2092 return ATA_CBL_SATA;
2093}
2094
2095/**
1810 * ata_bus_probe - Reset and probe ATA bus 2096 * ata_bus_probe - Reset and probe ATA bus
1811 * @ap: Bus to probe 2097 * @ap: Bus to probe
1812 * 2098 *
@@ -1876,6 +2162,10 @@ int ata_bus_probe(struct ata_port *ap)
1876 goto fail; 2162 goto fail;
1877 } 2163 }
1878 2164
2165 /* Now ask for the cable type as PDIAG- should have been released */
2166 if (ap->ops->cable_detect)
2167 ap->cbl = ap->ops->cable_detect(ap);
2168
1879 /* After the identify sequence we can now set up the devices. We do 2169 /* After the identify sequence we can now set up the devices. We do
1880 this in the normal order so that the user doesn't get confused */ 2170 this in the normal order so that the user doesn't get confused */
1881 2171
@@ -1958,7 +2248,7 @@ void ata_port_probe(struct ata_port *ap)
1958 * LOCKING: 2248 * LOCKING:
1959 * None. 2249 * None.
1960 */ 2250 */
1961static void sata_print_link_status(struct ata_port *ap) 2251void sata_print_link_status(struct ata_port *ap)
1962{ 2252{
1963 u32 sstatus, scontrol, tmp; 2253 u32 sstatus, scontrol, tmp;
1964 2254
@@ -2352,6 +2642,12 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2352 t->active += (t->cycle - (t->active + t->recover)) / 2; 2642 t->active += (t->cycle - (t->active + t->recover)) / 2;
2353 t->recover = t->cycle - t->active; 2643 t->recover = t->cycle - t->active;
2354 } 2644 }
2645
2646 /* In a few cases quantisation may produce enough errors to
2647 leave t->cycle too low for the sum of active and recovery
2648 if so we must correct this */
2649 if (t->active + t->recover > t->cycle)
2650 t->cycle = t->active + t->recover;
2355 2651
2356 return 0; 2652 return 0;
2357} 2653}
@@ -2481,12 +2777,13 @@ static int ata_dev_set_mode(struct ata_device *dev)
2481} 2777}
2482 2778
2483/** 2779/**
2484 * ata_set_mode - Program timings and issue SET FEATURES - XFER 2780 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
2485 * @ap: port on which timings will be programmed 2781 * @ap: port on which timings will be programmed
2486 * @r_failed_dev: out paramter for failed device 2782 * @r_failed_dev: out paramter for failed device
2487 * 2783 *
2488 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If 2784 * Standard implementation of the function used to tune and set
2489 * ata_set_mode() fails, pointer to the failing device is 2785 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2786 * ata_dev_set_mode() fails, pointer to the failing device is
2490 * returned in @r_failed_dev. 2787 * returned in @r_failed_dev.
2491 * 2788 *
2492 * LOCKING: 2789 * LOCKING:
@@ -2495,14 +2792,12 @@ static int ata_dev_set_mode(struct ata_device *dev)
2495 * RETURNS: 2792 * RETURNS:
2496 * 0 on success, negative errno otherwise 2793 * 0 on success, negative errno otherwise
2497 */ 2794 */
2498int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) 2795
2796int ata_do_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2499{ 2797{
2500 struct ata_device *dev; 2798 struct ata_device *dev;
2501 int i, rc = 0, used_dma = 0, found = 0; 2799 int i, rc = 0, used_dma = 0, found = 0;
2502 2800
2503 /* has private set_mode? */
2504 if (ap->ops->set_mode)
2505 return ap->ops->set_mode(ap, r_failed_dev);
2506 2801
2507 /* step 1: calculate xfer_mask */ 2802 /* step 1: calculate xfer_mask */
2508 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2803 for (i = 0; i < ATA_MAX_DEVICES; i++) {
@@ -2587,6 +2882,29 @@ int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2587} 2882}
2588 2883
2589/** 2884/**
2885 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2886 * @ap: port on which timings will be programmed
2887 * @r_failed_dev: out paramter for failed device
2888 *
2889 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2890 * ata_set_mode() fails, pointer to the failing device is
2891 * returned in @r_failed_dev.
2892 *
2893 * LOCKING:
2894 * PCI/etc. bus probe sem.
2895 *
2896 * RETURNS:
2897 * 0 on success, negative errno otherwise
2898 */
2899int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2900{
2901 /* has private set_mode? */
2902 if (ap->ops->set_mode)
2903 return ap->ops->set_mode(ap, r_failed_dev);
2904 return ata_do_set_mode(ap, r_failed_dev);
2905}
2906
2907/**
2590 * ata_tf_to_host - issue ATA taskfile to host controller 2908 * ata_tf_to_host - issue ATA taskfile to host controller
2591 * @ap: port to which command is being issued 2909 * @ap: port to which command is being issued
2592 * @tf: ATA taskfile register set 2910 * @tf: ATA taskfile register set
@@ -3267,6 +3585,11 @@ static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3267 "%llu != %llu\n", 3585 "%llu != %llu\n",
3268 (unsigned long long)dev->n_sectors, 3586 (unsigned long long)dev->n_sectors,
3269 (unsigned long long)new_n_sectors); 3587 (unsigned long long)new_n_sectors);
3588 /* Are we the boot time size - if so we appear to be the
3589 same disk at this point and our HPA got reapplied */
3590 if (ata_ignore_hpa && dev->n_sectors_boot == new_n_sectors
3591 && ata_id_hpa_enabled(new_id))
3592 return 1;
3270 return 0; 3593 return 0;
3271 } 3594 }
3272 3595
@@ -3441,19 +3764,7 @@ static void ata_dev_xfermask(struct ata_device *dev)
3441 xfer_mask = ata_pack_xfermask(ap->pio_mask, 3764 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3442 ap->mwdma_mask, ap->udma_mask); 3765 ap->mwdma_mask, ap->udma_mask);
3443 3766
3444 /* Apply cable rule here. Don't apply it early because when 3767 /* drive modes available */
3445 * we handle hot plug the cable type can itself change.
3446 */
3447 if (ap->cbl == ATA_CBL_PATA40)
3448 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3449 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3450 * host side are checked drive side as well. Cases where we know a
3451 * 40wire cable is used safely for 80 are not checked here.
3452 */
3453 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3454 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3455
3456
3457 xfer_mask &= ata_pack_xfermask(dev->pio_mask, 3768 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3458 dev->mwdma_mask, dev->udma_mask); 3769 dev->mwdma_mask, dev->udma_mask);
3459 xfer_mask &= ata_id_xfermask(dev->id); 3770 xfer_mask &= ata_id_xfermask(dev->id);
@@ -3482,8 +3793,30 @@ static void ata_dev_xfermask(struct ata_device *dev)
3482 "other device, disabling DMA\n"); 3793 "other device, disabling DMA\n");
3483 } 3794 }
3484 3795
3796 if (ap->flags & ATA_FLAG_NO_IORDY)
3797 xfer_mask &= ata_pio_mask_no_iordy(dev);
3798
3485 if (ap->ops->mode_filter) 3799 if (ap->ops->mode_filter)
3486 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask); 3800 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
3801
3802 /* Apply cable rule here. Don't apply it early because when
3803 * we handle hot plug the cable type can itself change.
3804 * Check this last so that we know if the transfer rate was
3805 * solely limited by the cable.
3806 * Unknown or 80 wire cables reported host side are checked
3807 * drive side as well. Cases where we know a 40wire cable
3808 * is used safely for 80 are not checked here.
3809 */
3810 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
3811 /* UDMA/44 or higher would be available */
3812 if((ap->cbl == ATA_CBL_PATA40) ||
3813 (ata_drive_40wire(dev->id) &&
3814 (ap->cbl == ATA_CBL_PATA_UNK ||
3815 ap->cbl == ATA_CBL_PATA80))) {
3816 ata_dev_printk(dev, KERN_WARNING,
3817 "limited to UDMA/33 due to 40-wire cable\n");
3818 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3819 }
3487 3820
3488 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, 3821 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3489 &dev->mwdma_mask, &dev->udma_mask); 3822 &dev->mwdma_mask, &dev->udma_mask);
@@ -4022,10 +4355,10 @@ void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
4022 4355
4023 4356
4024/** 4357/**
4025 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. 4358 * ata_pio_sector - Transfer a sector of data.
4026 * @qc: Command on going 4359 * @qc: Command on going
4027 * 4360 *
4028 * Transfer ATA_SECT_SIZE of data from/to the ATA device. 4361 * Transfer qc->sect_size bytes of data from/to the ATA device.
4029 * 4362 *
4030 * LOCKING: 4363 * LOCKING:
4031 * Inherited from caller. 4364 * Inherited from caller.
@@ -4040,7 +4373,7 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
4040 unsigned int offset; 4373 unsigned int offset;
4041 unsigned char *buf; 4374 unsigned char *buf;
4042 4375
4043 if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE) 4376 if (qc->curbytes == qc->nbytes - qc->sect_size)
4044 ap->hsm_task_state = HSM_ST_LAST; 4377 ap->hsm_task_state = HSM_ST_LAST;
4045 4378
4046 page = sg[qc->cursg].page; 4379 page = sg[qc->cursg].page;
@@ -4060,17 +4393,17 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
4060 buf = kmap_atomic(page, KM_IRQ0); 4393 buf = kmap_atomic(page, KM_IRQ0);
4061 4394
4062 /* do the actual data transfer */ 4395 /* do the actual data transfer */
4063 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); 4396 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
4064 4397
4065 kunmap_atomic(buf, KM_IRQ0); 4398 kunmap_atomic(buf, KM_IRQ0);
4066 local_irq_restore(flags); 4399 local_irq_restore(flags);
4067 } else { 4400 } else {
4068 buf = page_address(page); 4401 buf = page_address(page);
4069 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); 4402 ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write);
4070 } 4403 }
4071 4404
4072 qc->curbytes += ATA_SECT_SIZE; 4405 qc->curbytes += qc->sect_size;
4073 qc->cursg_ofs += ATA_SECT_SIZE; 4406 qc->cursg_ofs += qc->sect_size;
4074 4407
4075 if (qc->cursg_ofs == (&sg[qc->cursg])->length) { 4408 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
4076 qc->cursg++; 4409 qc->cursg++;
@@ -4079,10 +4412,10 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
4079} 4412}
4080 4413
4081/** 4414/**
4082 * ata_pio_sectors - Transfer one or many 512-byte sectors. 4415 * ata_pio_sectors - Transfer one or many sectors.
4083 * @qc: Command on going 4416 * @qc: Command on going
4084 * 4417 *
4085 * Transfer one or many ATA_SECT_SIZE of data from/to the 4418 * Transfer one or many sectors of data from/to the
4086 * ATA device for the DRQ request. 4419 * ATA device for the DRQ request.
4087 * 4420 *
4088 * LOCKING: 4421 * LOCKING:
@@ -4097,7 +4430,7 @@ static void ata_pio_sectors(struct ata_queued_cmd *qc)
4097 4430
4098 WARN_ON(qc->dev->multi_count == 0); 4431 WARN_ON(qc->dev->multi_count == 0);
4099 4432
4100 nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE, 4433 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
4101 qc->dev->multi_count); 4434 qc->dev->multi_count);
4102 while (nsect--) 4435 while (nsect--)
4103 ata_pio_sector(qc); 4436 ata_pio_sector(qc);
@@ -5577,42 +5910,35 @@ void ata_dev_init(struct ata_device *dev)
5577} 5910}
5578 5911
5579/** 5912/**
5580 * ata_port_init - Initialize an ata_port structure 5913 * ata_port_alloc - allocate and initialize basic ATA port resources
5581 * @ap: Structure to initialize 5914 * @host: ATA host this allocated port belongs to
5582 * @host: Collection of hosts to which @ap belongs
5583 * @ent: Probe information provided by low-level driver
5584 * @port_no: Port number associated with this ata_port
5585 * 5915 *
5586 * Initialize a new ata_port structure. 5916 * Allocate and initialize basic ATA port resources.
5917 *
5918 * RETURNS:
5919 * Allocate ATA port on success, NULL on failure.
5587 * 5920 *
5588 * LOCKING: 5921 * LOCKING:
5589 * Inherited from caller. 5922 * Inherited from calling layer (may sleep).
5590 */ 5923 */
5591void ata_port_init(struct ata_port *ap, struct ata_host *host, 5924struct ata_port *ata_port_alloc(struct ata_host *host)
5592 const struct ata_probe_ent *ent, unsigned int port_no)
5593{ 5925{
5926 struct ata_port *ap;
5594 unsigned int i; 5927 unsigned int i;
5595 5928
5929 DPRINTK("ENTER\n");
5930
5931 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
5932 if (!ap)
5933 return NULL;
5934
5596 ap->lock = &host->lock; 5935 ap->lock = &host->lock;
5597 ap->flags = ATA_FLAG_DISABLED; 5936 ap->flags = ATA_FLAG_DISABLED;
5598 ap->print_id = ata_print_id++; 5937 ap->print_id = -1;
5599 ap->ctl = ATA_DEVCTL_OBS; 5938 ap->ctl = ATA_DEVCTL_OBS;
5600 ap->host = host; 5939 ap->host = host;
5601 ap->dev = ent->dev; 5940 ap->dev = host->dev;
5602 ap->port_no = port_no; 5941
5603 if (port_no == 1 && ent->pinfo2) {
5604 ap->pio_mask = ent->pinfo2->pio_mask;
5605 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5606 ap->udma_mask = ent->pinfo2->udma_mask;
5607 ap->flags |= ent->pinfo2->flags;
5608 ap->ops = ent->pinfo2->port_ops;
5609 } else {
5610 ap->pio_mask = ent->pio_mask;
5611 ap->mwdma_mask = ent->mwdma_mask;
5612 ap->udma_mask = ent->udma_mask;
5613 ap->flags |= ent->port_flags;
5614 ap->ops = ent->port_ops;
5615 }
5616 ap->hw_sata_spd_limit = UINT_MAX; 5942 ap->hw_sata_spd_limit = UINT_MAX;
5617 ap->active_tag = ATA_TAG_POISON; 5943 ap->active_tag = ATA_TAG_POISON;
5618 ap->last_ctl = 0xFF; 5944 ap->last_ctl = 0xFF;
@@ -5632,10 +5958,7 @@ void ata_port_init(struct ata_port *ap, struct ata_host *host,
5632 INIT_LIST_HEAD(&ap->eh_done_q); 5958 INIT_LIST_HEAD(&ap->eh_done_q);
5633 init_waitqueue_head(&ap->eh_wait_q); 5959 init_waitqueue_head(&ap->eh_wait_q);
5634 5960
5635 /* set cable type */
5636 ap->cbl = ATA_CBL_NONE; 5961 ap->cbl = ATA_CBL_NONE;
5637 if (ap->flags & ATA_FLAG_SATA)
5638 ap->cbl = ATA_CBL_SATA;
5639 5962
5640 for (i = 0; i < ATA_MAX_DEVICES; i++) { 5963 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5641 struct ata_device *dev = &ap->device[i]; 5964 struct ata_device *dev = &ap->device[i];
@@ -5648,100 +5971,209 @@ void ata_port_init(struct ata_port *ap, struct ata_host *host,
5648 ap->stats.unhandled_irq = 1; 5971 ap->stats.unhandled_irq = 1;
5649 ap->stats.idle_irq = 1; 5972 ap->stats.idle_irq = 1;
5650#endif 5973#endif
5974 return ap;
5975}
5651 5976
5652 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); 5977static void ata_host_release(struct device *gendev, void *res)
5978{
5979 struct ata_host *host = dev_get_drvdata(gendev);
5980 int i;
5981
5982 for (i = 0; i < host->n_ports; i++) {
5983 struct ata_port *ap = host->ports[i];
5984
5985 if (!ap)
5986 continue;
5987
5988 if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop)
5989 ap->ops->port_stop(ap);
5990 }
5991
5992 if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop)
5993 host->ops->host_stop(host);
5994
5995 for (i = 0; i < host->n_ports; i++) {
5996 struct ata_port *ap = host->ports[i];
5997
5998 if (!ap)
5999 continue;
6000
6001 if (ap->scsi_host)
6002 scsi_host_put(ap->scsi_host);
6003
6004 kfree(ap);
6005 host->ports[i] = NULL;
6006 }
6007
6008 dev_set_drvdata(gendev, NULL);
5653} 6009}
5654 6010
5655/** 6011/**
5656 * ata_port_init_shost - Initialize SCSI host associated with ATA port 6012 * ata_host_alloc - allocate and init basic ATA host resources
5657 * @ap: ATA port to initialize SCSI host for 6013 * @dev: generic device this host is associated with
5658 * @shost: SCSI host associated with @ap 6014 * @max_ports: maximum number of ATA ports associated with this host
5659 * 6015 *
5660 * Initialize SCSI host @shost associated with ATA port @ap. 6016 * Allocate and initialize basic ATA host resources. LLD calls
6017 * this function to allocate a host, initializes it fully and
6018 * attaches it using ata_host_register().
6019 *
6020 * @max_ports ports are allocated and host->n_ports is
6021 * initialized to @max_ports. The caller is allowed to decrease
6022 * host->n_ports before calling ata_host_register(). The unused
6023 * ports will be automatically freed on registration.
6024 *
6025 * RETURNS:
6026 * Allocate ATA host on success, NULL on failure.
5661 * 6027 *
5662 * LOCKING: 6028 * LOCKING:
5663 * Inherited from caller. 6029 * Inherited from calling layer (may sleep).
5664 */ 6030 */
5665static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost) 6031struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
5666{ 6032{
5667 ap->scsi_host = shost; 6033 struct ata_host *host;
6034 size_t sz;
6035 int i;
6036
6037 DPRINTK("ENTER\n");
6038
6039 if (!devres_open_group(dev, NULL, GFP_KERNEL))
6040 return NULL;
6041
6042 /* alloc a container for our list of ATA ports (buses) */
6043 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
6044 /* alloc a container for our list of ATA ports (buses) */
6045 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
6046 if (!host)
6047 goto err_out;
6048
6049 devres_add(dev, host);
6050 dev_set_drvdata(dev, host);
5668 6051
5669 shost->unique_id = ap->print_id; 6052 spin_lock_init(&host->lock);
5670 shost->max_id = 16; 6053 host->dev = dev;
5671 shost->max_lun = 1; 6054 host->n_ports = max_ports;
5672 shost->max_channel = 1; 6055
5673 shost->max_cmd_len = 12; 6056 /* allocate ports bound to this host */
6057 for (i = 0; i < max_ports; i++) {
6058 struct ata_port *ap;
6059
6060 ap = ata_port_alloc(host);
6061 if (!ap)
6062 goto err_out;
6063
6064 ap->port_no = i;
6065 host->ports[i] = ap;
6066 }
6067
6068 devres_remove_group(dev, NULL);
6069 return host;
6070
6071 err_out:
6072 devres_release_group(dev, NULL);
6073 return NULL;
5674} 6074}
5675 6075
5676/** 6076/**
5677 * ata_port_add - Attach low-level ATA driver to system 6077 * ata_host_alloc_pinfo - alloc host and init with port_info array
5678 * @ent: Information provided by low-level driver 6078 * @dev: generic device this host is associated with
5679 * @host: Collections of ports to which we add 6079 * @ppi: array of ATA port_info to initialize host with
5680 * @port_no: Port number associated with this host 6080 * @n_ports: number of ATA ports attached to this host
5681 * 6081 *
5682 * Attach low-level ATA driver to system. 6082 * Allocate ATA host and initialize with info from @ppi. If NULL
5683 * 6083 * terminated, @ppi may contain fewer entries than @n_ports. The
5684 * LOCKING: 6084 * last entry will be used for the remaining ports.
5685 * PCI/etc. bus probe sem.
5686 * 6085 *
5687 * RETURNS: 6086 * RETURNS:
5688 * New ata_port on success, for NULL on error. 6087 * Allocate ATA host on success, NULL on failure.
6088 *
6089 * LOCKING:
6090 * Inherited from calling layer (may sleep).
5689 */ 6091 */
5690static struct ata_port * ata_port_add(const struct ata_probe_ent *ent, 6092struct ata_host *ata_host_alloc_pinfo(struct device *dev,
5691 struct ata_host *host, 6093 const struct ata_port_info * const * ppi,
5692 unsigned int port_no) 6094 int n_ports)
5693{ 6095{
5694 struct Scsi_Host *shost; 6096 const struct ata_port_info *pi;
5695 struct ata_port *ap; 6097 struct ata_host *host;
5696 6098 int i, j;
5697 DPRINTK("ENTER\n");
5698 6099
5699 if (!ent->port_ops->error_handler && 6100 host = ata_host_alloc(dev, n_ports);
5700 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) { 6101 if (!host)
5701 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5702 port_no);
5703 return NULL; 6102 return NULL;
5704 }
5705 6103
5706 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); 6104 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
5707 if (!shost) 6105 struct ata_port *ap = host->ports[i];
5708 return NULL;
5709 6106
5710 shost->transportt = &ata_scsi_transport_template; 6107 if (ppi[j])
6108 pi = ppi[j++];
5711 6109
5712 ap = ata_shost_to_port(shost); 6110 ap->pio_mask = pi->pio_mask;
6111 ap->mwdma_mask = pi->mwdma_mask;
6112 ap->udma_mask = pi->udma_mask;
6113 ap->flags |= pi->flags;
6114 ap->ops = pi->port_ops;
5713 6115
5714 ata_port_init(ap, host, ent, port_no); 6116 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
5715 ata_port_init_shost(ap, shost); 6117 host->ops = pi->port_ops;
6118 if (!host->private_data && pi->private_data)
6119 host->private_data = pi->private_data;
6120 }
5716 6121
5717 return ap; 6122 return host;
5718} 6123}
5719 6124
5720static void ata_host_release(struct device *gendev, void *res) 6125/**
6126 * ata_host_start - start and freeze ports of an ATA host
6127 * @host: ATA host to start ports for
6128 *
6129 * Start and then freeze ports of @host. Started status is
6130 * recorded in host->flags, so this function can be called
6131 * multiple times. Ports are guaranteed to get started only
6132 * once. If host->ops isn't initialized yet, its set to the
6133 * first non-dummy port ops.
6134 *
6135 * LOCKING:
6136 * Inherited from calling layer (may sleep).
6137 *
6138 * RETURNS:
6139 * 0 if all ports are started successfully, -errno otherwise.
6140 */
6141int ata_host_start(struct ata_host *host)
5721{ 6142{
5722 struct ata_host *host = dev_get_drvdata(gendev); 6143 int i, rc;
5723 int i; 6144
6145 if (host->flags & ATA_HOST_STARTED)
6146 return 0;
5724 6147
5725 for (i = 0; i < host->n_ports; i++) { 6148 for (i = 0; i < host->n_ports; i++) {
5726 struct ata_port *ap = host->ports[i]; 6149 struct ata_port *ap = host->ports[i];
5727 6150
5728 if (ap && ap->ops->port_stop) 6151 if (!host->ops && !ata_port_is_dummy(ap))
5729 ap->ops->port_stop(ap); 6152 host->ops = ap->ops;
6153
6154 if (ap->ops->port_start) {
6155 rc = ap->ops->port_start(ap);
6156 if (rc) {
6157 ata_port_printk(ap, KERN_ERR, "failed to "
6158 "start port (errno=%d)\n", rc);
6159 goto err_out;
6160 }
6161 }
6162
6163 ata_eh_freeze_port(ap);
5730 } 6164 }
5731 6165
5732 if (host->ops->host_stop) 6166 host->flags |= ATA_HOST_STARTED;
5733 host->ops->host_stop(host); 6167 return 0;
5734 6168
5735 for (i = 0; i < host->n_ports; i++) { 6169 err_out:
6170 while (--i >= 0) {
5736 struct ata_port *ap = host->ports[i]; 6171 struct ata_port *ap = host->ports[i];
5737 6172
5738 if (ap) 6173 if (ap->ops->port_stop)
5739 scsi_host_put(ap->scsi_host); 6174 ap->ops->port_stop(ap);
5740
5741 host->ports[i] = NULL;
5742 } 6175 }
5743 6176 return rc;
5744 dev_set_drvdata(gendev, NULL);
5745} 6177}
5746 6178
5747/** 6179/**
@@ -5755,7 +6187,7 @@ static void ata_host_release(struct device *gendev, void *res)
5755 * PCI/etc. bus probe sem. 6187 * PCI/etc. bus probe sem.
5756 * 6188 *
5757 */ 6189 */
5758 6190/* KILLME - the only user left is ipr */
5759void ata_host_init(struct ata_host *host, struct device *dev, 6191void ata_host_init(struct ata_host *host, struct device *dev,
5760 unsigned long flags, const struct ata_port_operations *ops) 6192 unsigned long flags, const struct ata_port_operations *ops)
5761{ 6193{
@@ -5766,155 +6198,95 @@ void ata_host_init(struct ata_host *host, struct device *dev,
5766} 6198}
5767 6199
5768/** 6200/**
5769 * ata_device_add - Register hardware device with ATA and SCSI layers 6201 * ata_host_register - register initialized ATA host
5770 * @ent: Probe information describing hardware device to be registered 6202 * @host: ATA host to register
6203 * @sht: template for SCSI host
5771 * 6204 *
5772 * This function processes the information provided in the probe 6205 * Register initialized ATA host. @host is allocated using
5773 * information struct @ent, allocates the necessary ATA and SCSI 6206 * ata_host_alloc() and fully initialized by LLD. This function
5774 * host information structures, initializes them, and registers 6207 * starts ports, registers @host with ATA and SCSI layers and
5775 * everything with requisite kernel subsystems. 6208 * probe registered devices.
5776 *
5777 * This function requests irqs, probes the ATA bus, and probes
5778 * the SCSI bus.
5779 * 6209 *
5780 * LOCKING: 6210 * LOCKING:
5781 * PCI/etc. bus probe sem. 6211 * Inherited from calling layer (may sleep).
5782 * 6212 *
5783 * RETURNS: 6213 * RETURNS:
5784 * Number of ports registered. Zero on error (no ports registered). 6214 * 0 on success, -errno otherwise.
5785 */ 6215 */
5786int ata_device_add(const struct ata_probe_ent *ent) 6216int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
5787{ 6217{
5788 unsigned int i; 6218 int i, rc;
5789 struct device *dev = ent->dev;
5790 struct ata_host *host;
5791 int rc;
5792
5793 DPRINTK("ENTER\n");
5794 6219
5795 if (ent->irq == 0) { 6220 /* host must have been started */
5796 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n"); 6221 if (!(host->flags & ATA_HOST_STARTED)) {
5797 return 0; 6222 dev_printk(KERN_ERR, host->dev,
6223 "BUG: trying to register unstarted host\n");
6224 WARN_ON(1);
6225 return -EINVAL;
5798 } 6226 }
5799 6227
5800 if (!devres_open_group(dev, ata_device_add, GFP_KERNEL)) 6228 /* Blow away unused ports. This happens when LLD can't
5801 return 0; 6229 * determine the exact number of ports to allocate at
6230 * allocation time.
6231 */
6232 for (i = host->n_ports; host->ports[i]; i++)
6233 kfree(host->ports[i]);
5802 6234
5803 /* alloc a container for our list of ATA ports (buses) */ 6235 /* give ports names and add SCSI hosts */
5804 host = devres_alloc(ata_host_release, sizeof(struct ata_host) + 6236 for (i = 0; i < host->n_ports; i++)
5805 (ent->n_ports * sizeof(void *)), GFP_KERNEL); 6237 host->ports[i]->print_id = ata_print_id++;
5806 if (!host)
5807 goto err_out;
5808 devres_add(dev, host);
5809 dev_set_drvdata(dev, host);
5810 6238
5811 ata_host_init(host, dev, ent->_host_flags, ent->port_ops); 6239 rc = ata_scsi_add_hosts(host, sht);
5812 host->n_ports = ent->n_ports; 6240 if (rc)
5813 host->irq = ent->irq; 6241 return rc;
5814 host->irq2 = ent->irq2;
5815 host->iomap = ent->iomap;
5816 host->private_data = ent->private_data;
5817 6242
5818 /* register each port bound to this device */ 6243 /* set cable, sata_spd_limit and report */
5819 for (i = 0; i < host->n_ports; i++) { 6244 for (i = 0; i < host->n_ports; i++) {
5820 struct ata_port *ap; 6245 struct ata_port *ap = host->ports[i];
5821 unsigned long xfer_mode_mask; 6246 int irq_line;
5822 int irq_line = ent->irq; 6247 u32 scontrol;
6248 unsigned long xfer_mask;
5823 6249
5824 ap = ata_port_add(ent, host, i); 6250 /* set SATA cable type if still unset */
5825 host->ports[i] = ap; 6251 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
5826 if (!ap) 6252 ap->cbl = ATA_CBL_SATA;
5827 goto err_out;
5828 6253
5829 /* dummy? */ 6254 /* init sata_spd_limit to the current value */
5830 if (ent->dummy_port_mask & (1 << i)) { 6255 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5831 ata_port_printk(ap, KERN_INFO, "DUMMY\n"); 6256 int spd = (scontrol >> 4) & 0xf;
5832 ap->ops = &ata_dummy_port_ops; 6257 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5833 continue;
5834 }
5835
5836 /* start port */
5837 rc = ap->ops->port_start(ap);
5838 if (rc) {
5839 host->ports[i] = NULL;
5840 scsi_host_put(ap->scsi_host);
5841 goto err_out;
5842 } 6258 }
6259 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5843 6260
5844 /* Report the secondary IRQ for second channel legacy */ 6261 /* report the secondary IRQ for second channel legacy */
5845 if (i == 1 && ent->irq2) 6262 irq_line = host->irq;
5846 irq_line = ent->irq2; 6263 if (i == 1 && host->irq2)
6264 irq_line = host->irq2;
5847 6265
5848 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | 6266 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
5849 (ap->mwdma_mask << ATA_SHIFT_MWDMA) | 6267 ap->udma_mask);
5850 (ap->pio_mask << ATA_SHIFT_PIO);
5851 6268
5852 /* print per-port info to dmesg */ 6269 /* print per-port info to dmesg */
5853 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p " 6270 if (!ata_port_is_dummy(ap))
5854 "ctl 0x%p bmdma 0x%p irq %d\n", 6271 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "
5855 ap->flags & ATA_FLAG_SATA ? 'S' : 'P', 6272 "ctl 0x%p bmdma 0x%p irq %d\n",
5856 ata_mode_string(xfer_mode_mask), 6273 ap->cbl == ATA_CBL_SATA ? 'S' : 'P',
5857 ap->ioaddr.cmd_addr, 6274 ata_mode_string(xfer_mask),
5858 ap->ioaddr.ctl_addr, 6275 ap->ioaddr.cmd_addr,
5859 ap->ioaddr.bmdma_addr, 6276 ap->ioaddr.ctl_addr,
5860 irq_line); 6277 ap->ioaddr.bmdma_addr,
5861 6278 irq_line);
5862 /* freeze port before requesting IRQ */ 6279 else
5863 ata_eh_freeze_port(ap); 6280 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5864 }
5865
5866 /* obtain irq, that may be shared between channels */
5867 rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler,
5868 ent->irq_flags, DRV_NAME, host);
5869 if (rc) {
5870 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5871 ent->irq, rc);
5872 goto err_out;
5873 }
5874
5875 /* do we have a second IRQ for the other channel, eg legacy mode */
5876 if (ent->irq2) {
5877 /* We will get weird core code crashes later if this is true
5878 so trap it now */
5879 BUG_ON(ent->irq == ent->irq2);
5880
5881 rc = devm_request_irq(dev, ent->irq2,
5882 ent->port_ops->irq_handler, ent->irq_flags,
5883 DRV_NAME, host);
5884 if (rc) {
5885 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5886 ent->irq2, rc);
5887 goto err_out;
5888 }
5889 } 6281 }
5890 6282
5891 /* resource acquisition complete */
5892 devres_remove_group(dev, ata_device_add);
5893
5894 /* perform each probe synchronously */ 6283 /* perform each probe synchronously */
5895 DPRINTK("probe begin\n"); 6284 DPRINTK("probe begin\n");
5896 for (i = 0; i < host->n_ports; i++) { 6285 for (i = 0; i < host->n_ports; i++) {
5897 struct ata_port *ap = host->ports[i]; 6286 struct ata_port *ap = host->ports[i];
5898 u32 scontrol;
5899 int rc; 6287 int rc;
5900 6288
5901 /* init sata_spd_limit to the current value */ 6289 /* probe */
5902 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5903 int spd = (scontrol >> 4) & 0xf;
5904 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5905 }
5906 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5907
5908 rc = scsi_add_host(ap->scsi_host, dev);
5909 if (rc) {
5910 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5911 /* FIXME: do something useful here */
5912 /* FIXME: handle unconditional calls to
5913 * scsi_scan_host and ata_host_remove, below,
5914 * at the very least
5915 */
5916 }
5917
5918 if (ap->ops->error_handler) { 6290 if (ap->ops->error_handler) {
5919 struct ata_eh_info *ehi = &ap->eh_info; 6291 struct ata_eh_info *ehi = &ap->eh_info;
5920 unsigned long flags; 6292 unsigned long flags;
@@ -5959,16 +6331,52 @@ int ata_device_add(const struct ata_probe_ent *ent)
5959 ata_scsi_scan_host(ap); 6331 ata_scsi_scan_host(ap);
5960 } 6332 }
5961 6333
5962 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5963 return ent->n_ports; /* success */
5964
5965 err_out:
5966 devres_release_group(dev, ata_device_add);
5967 VPRINTK("EXIT, returning %d\n", rc);
5968 return 0; 6334 return 0;
5969} 6335}
5970 6336
5971/** 6337/**
6338 * ata_host_activate - start host, request IRQ and register it
6339 * @host: target ATA host
6340 * @irq: IRQ to request
6341 * @irq_handler: irq_handler used when requesting IRQ
6342 * @irq_flags: irq_flags used when requesting IRQ
6343 * @sht: scsi_host_template to use when registering the host
6344 *
6345 * After allocating an ATA host and initializing it, most libata
6346 * LLDs perform three steps to activate the host - start host,
6347 * request IRQ and register it. This helper takes necessasry
6348 * arguments and performs the three steps in one go.
6349 *
6350 * LOCKING:
6351 * Inherited from calling layer (may sleep).
6352 *
6353 * RETURNS:
6354 * 0 on success, -errno otherwise.
6355 */
6356int ata_host_activate(struct ata_host *host, int irq,
6357 irq_handler_t irq_handler, unsigned long irq_flags,
6358 struct scsi_host_template *sht)
6359{
6360 int rc;
6361
6362 rc = ata_host_start(host);
6363 if (rc)
6364 return rc;
6365
6366 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6367 dev_driver_string(host->dev), host);
6368 if (rc)
6369 return rc;
6370
6371 rc = ata_host_register(host, sht);
6372 /* if failed, just free the IRQ and leave ports alone */
6373 if (rc)
6374 devm_free_irq(host->dev, irq, host);
6375
6376 return rc;
6377}
6378
6379/**
5972 * ata_port_detach - Detach ATA port in prepration of device removal 6380 * ata_port_detach - Detach ATA port in prepration of device removal
5973 * @ap: ATA port to be detached 6381 * @ap: ATA port to be detached
5974 * 6382 *
@@ -6043,32 +6451,6 @@ void ata_host_detach(struct ata_host *host)
6043 ata_port_detach(host->ports[i]); 6451 ata_port_detach(host->ports[i]);
6044} 6452}
6045 6453
6046struct ata_probe_ent *
6047ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
6048{
6049 struct ata_probe_ent *probe_ent;
6050
6051 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
6052 if (!probe_ent) {
6053 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
6054 kobject_name(&(dev->kobj)));
6055 return NULL;
6056 }
6057
6058 INIT_LIST_HEAD(&probe_ent->node);
6059 probe_ent->dev = dev;
6060
6061 probe_ent->sht = port->sht;
6062 probe_ent->port_flags = port->flags;
6063 probe_ent->pio_mask = port->pio_mask;
6064 probe_ent->mwdma_mask = port->mwdma_mask;
6065 probe_ent->udma_mask = port->udma_mask;
6066 probe_ent->port_ops = port->port_ops;
6067 probe_ent->private_data = port->private_data;
6068
6069 return probe_ent;
6070}
6071
6072/** 6454/**
6073 * ata_std_ports - initialize ioaddr with standard port offsets. 6455 * ata_std_ports - initialize ioaddr with standard port offsets.
6074 * @ioaddr: IO address structure to be initialized 6456 * @ioaddr: IO address structure to be initialized
@@ -6334,6 +6716,10 @@ const struct ata_port_operations ata_dummy_port_ops = {
6334 .port_stop = ata_dummy_noret, 6716 .port_stop = ata_dummy_noret,
6335}; 6717};
6336 6718
6719const struct ata_port_info ata_dummy_port_info = {
6720 .port_ops = &ata_dummy_port_ops,
6721};
6722
6337/* 6723/*
6338 * libata is essentially a library of internal helper functions for 6724 * libata is essentially a library of internal helper functions for
6339 * low-level ATA host controller drivers. As such, the API/ABI is 6725 * low-level ATA host controller drivers. As such, the API/ABI is
@@ -6345,10 +6731,15 @@ EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6345EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); 6731EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6346EXPORT_SYMBOL_GPL(sata_deb_timing_long); 6732EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6347EXPORT_SYMBOL_GPL(ata_dummy_port_ops); 6733EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6734EXPORT_SYMBOL_GPL(ata_dummy_port_info);
6348EXPORT_SYMBOL_GPL(ata_std_bios_param); 6735EXPORT_SYMBOL_GPL(ata_std_bios_param);
6349EXPORT_SYMBOL_GPL(ata_std_ports); 6736EXPORT_SYMBOL_GPL(ata_std_ports);
6350EXPORT_SYMBOL_GPL(ata_host_init); 6737EXPORT_SYMBOL_GPL(ata_host_init);
6351EXPORT_SYMBOL_GPL(ata_device_add); 6738EXPORT_SYMBOL_GPL(ata_host_alloc);
6739EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
6740EXPORT_SYMBOL_GPL(ata_host_start);
6741EXPORT_SYMBOL_GPL(ata_host_register);
6742EXPORT_SYMBOL_GPL(ata_host_activate);
6352EXPORT_SYMBOL_GPL(ata_host_detach); 6743EXPORT_SYMBOL_GPL(ata_host_detach);
6353EXPORT_SYMBOL_GPL(ata_sg_init); 6744EXPORT_SYMBOL_GPL(ata_sg_init);
6354EXPORT_SYMBOL_GPL(ata_sg_init_one); 6745EXPORT_SYMBOL_GPL(ata_sg_init_one);
@@ -6360,6 +6751,7 @@ EXPORT_SYMBOL_GPL(ata_tf_load);
6360EXPORT_SYMBOL_GPL(ata_tf_read); 6751EXPORT_SYMBOL_GPL(ata_tf_read);
6361EXPORT_SYMBOL_GPL(ata_noop_dev_select); 6752EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6362EXPORT_SYMBOL_GPL(ata_std_dev_select); 6753EXPORT_SYMBOL_GPL(ata_std_dev_select);
6754EXPORT_SYMBOL_GPL(sata_print_link_status);
6363EXPORT_SYMBOL_GPL(ata_tf_to_fis); 6755EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6364EXPORT_SYMBOL_GPL(ata_tf_from_fis); 6756EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6365EXPORT_SYMBOL_GPL(ata_check_status); 6757EXPORT_SYMBOL_GPL(ata_check_status);
@@ -6367,6 +6759,7 @@ EXPORT_SYMBOL_GPL(ata_altstatus);
6367EXPORT_SYMBOL_GPL(ata_exec_command); 6759EXPORT_SYMBOL_GPL(ata_exec_command);
6368EXPORT_SYMBOL_GPL(ata_port_start); 6760EXPORT_SYMBOL_GPL(ata_port_start);
6369EXPORT_SYMBOL_GPL(ata_interrupt); 6761EXPORT_SYMBOL_GPL(ata_interrupt);
6762EXPORT_SYMBOL_GPL(ata_do_set_mode);
6370EXPORT_SYMBOL_GPL(ata_data_xfer); 6763EXPORT_SYMBOL_GPL(ata_data_xfer);
6371EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); 6764EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
6372EXPORT_SYMBOL_GPL(ata_qc_prep); 6765EXPORT_SYMBOL_GPL(ata_qc_prep);
@@ -6429,7 +6822,8 @@ EXPORT_SYMBOL_GPL(ata_timing_merge);
6429 6822
6430#ifdef CONFIG_PCI 6823#ifdef CONFIG_PCI
6431EXPORT_SYMBOL_GPL(pci_test_config_bits); 6824EXPORT_SYMBOL_GPL(pci_test_config_bits);
6432EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); 6825EXPORT_SYMBOL_GPL(ata_pci_init_native_host);
6826EXPORT_SYMBOL_GPL(ata_pci_prepare_native_host);
6433EXPORT_SYMBOL_GPL(ata_pci_init_one); 6827EXPORT_SYMBOL_GPL(ata_pci_init_one);
6434EXPORT_SYMBOL_GPL(ata_pci_remove_one); 6828EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6435#ifdef CONFIG_PM 6829#ifdef CONFIG_PM
@@ -6461,3 +6855,8 @@ EXPORT_SYMBOL_GPL(ata_dummy_irq_on);
6461EXPORT_SYMBOL_GPL(ata_irq_ack); 6855EXPORT_SYMBOL_GPL(ata_irq_ack);
6462EXPORT_SYMBOL_GPL(ata_dummy_irq_ack); 6856EXPORT_SYMBOL_GPL(ata_dummy_irq_ack);
6463EXPORT_SYMBOL_GPL(ata_dev_try_classify); 6857EXPORT_SYMBOL_GPL(ata_dev_try_classify);
6858
6859EXPORT_SYMBOL_GPL(ata_cable_40wire);
6860EXPORT_SYMBOL_GPL(ata_cable_80wire);
6861EXPORT_SYMBOL_GPL(ata_cable_unknown);
6862EXPORT_SYMBOL_GPL(ata_cable_sata);
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 39f556c02992..2bff9adcacf1 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -1056,7 +1056,7 @@ static void ata_eh_analyze_serror(struct ata_port *ap)
1056 } 1056 }
1057 if (serror & SERR_INTERNAL) { 1057 if (serror & SERR_INTERNAL) {
1058 err_mask |= AC_ERR_SYSTEM; 1058 err_mask |= AC_ERR_SYSTEM;
1059 action |= ATA_EH_SOFTRESET; 1059 action |= ATA_EH_HARDRESET;
1060 } 1060 }
1061 if (serror & (SERR_PHYRDY_CHG | SERR_DEV_XCHG)) 1061 if (serror & (SERR_PHYRDY_CHG | SERR_DEV_XCHG))
1062 ata_ehi_hotplugged(&ehc->i); 1062 ata_ehi_hotplugged(&ehc->i);
@@ -1151,7 +1151,9 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc,
1151 return ATA_EH_SOFTRESET; 1151 return ATA_EH_SOFTRESET;
1152 } 1152 }
1153 1153
1154 if (!(qc->err_mask & AC_ERR_DEV)) 1154 if (stat & (ATA_ERR | ATA_DF))
1155 qc->err_mask |= AC_ERR_DEV;
1156 else
1155 return 0; 1157 return 0;
1156 1158
1157 switch (qc->dev->class) { 1159 switch (qc->dev->class) {
@@ -1669,7 +1671,10 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
1669 reset == softreset ? "soft" : "hard"); 1671 reset == softreset ? "soft" : "hard");
1670 1672
1671 /* mark that this EH session started with reset */ 1673 /* mark that this EH session started with reset */
1672 ehc->i.flags |= ATA_EHI_DID_RESET; 1674 if (reset == hardreset)
1675 ehc->i.flags |= ATA_EHI_DID_HARDRESET;
1676 else
1677 ehc->i.flags |= ATA_EHI_DID_SOFTRESET;
1673 1678
1674 rc = ata_do_reset(ap, reset, classes); 1679 rc = ata_do_reset(ap, reset, classes);
1675 1680
@@ -1808,6 +1813,10 @@ static int ata_eh_revalidate_and_attach(struct ata_port *ap,
1808 } 1813 }
1809 } 1814 }
1810 1815
1816 /* PDIAG- should have been released, ask cable type if post-reset */
1817 if ((ehc->i.flags & ATA_EHI_DID_RESET) && ap->ops->cable_detect)
1818 ap->cbl = ap->ops->cable_detect(ap);
1819
1811 /* Configure new devices forward such that user doesn't see 1820 /* Configure new devices forward such that user doesn't see
1812 * device detection messages backwards. 1821 * device detection messages backwards.
1813 */ 1822 */
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index e9364434182c..9afba2ba489e 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -104,7 +104,7 @@ static const u8 def_control_mpage[CONTROL_MPAGE_LEN] = {
104 * libata transport template. libata doesn't do real transport stuff. 104 * libata transport template. libata doesn't do real transport stuff.
105 * It just needs the eh_timed_out hook. 105 * It just needs the eh_timed_out hook.
106 */ 106 */
107struct scsi_transport_template ata_scsi_transport_template = { 107static struct scsi_transport_template ata_scsi_transport_template = {
108 .eh_strategy_handler = ata_scsi_error, 108 .eh_strategy_handler = ata_scsi_error,
109 .eh_timed_out = ata_scsi_timed_out, 109 .eh_timed_out = ata_scsi_timed_out,
110 .user_scan = ata_scsi_user_scan, 110 .user_scan = ata_scsi_user_scan,
@@ -2678,6 +2678,18 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc)
2678 tf->device = qc->dev->devno ? 2678 tf->device = qc->dev->devno ?
2679 tf->device | ATA_DEV1 : tf->device & ~ATA_DEV1; 2679 tf->device | ATA_DEV1 : tf->device & ~ATA_DEV1;
2680 2680
2681 /* READ/WRITE LONG use a non-standard sect_size */
2682 qc->sect_size = ATA_SECT_SIZE;
2683 switch (tf->command) {
2684 case ATA_CMD_READ_LONG:
2685 case ATA_CMD_READ_LONG_ONCE:
2686 case ATA_CMD_WRITE_LONG:
2687 case ATA_CMD_WRITE_LONG_ONCE:
2688 if (tf->protocol != ATA_PROT_PIO || tf->nsect != 1)
2689 goto invalid_fld;
2690 qc->sect_size = scmd->request_bufflen;
2691 }
2692
2681 /* 2693 /*
2682 * Filter SET_FEATURES - XFER MODE command -- otherwise, 2694 * Filter SET_FEATURES - XFER MODE command -- otherwise,
2683 * SET_FEATURES - XFER MODE must be preceded/succeeded 2695 * SET_FEATURES - XFER MODE must be preceded/succeeded
@@ -2792,8 +2804,9 @@ static inline int __ata_scsi_queuecmd(struct scsi_cmnd *scmd,
2792{ 2804{
2793 int rc = 0; 2805 int rc = 0;
2794 2806
2795 if (unlikely(!scmd->cmd_len)) { 2807 if (unlikely(!scmd->cmd_len || scmd->cmd_len > dev->cdb_len)) {
2796 ata_dev_printk(dev, KERN_WARNING, "WARNING: zero len CDB\n"); 2808 DPRINTK("bad CDB len=%u, max=%u\n",
2809 scmd->cmd_len, dev->cdb_len);
2797 scmd->result = DID_ERROR << 16; 2810 scmd->result = DID_ERROR << 16;
2798 done(scmd); 2811 done(scmd);
2799 return 0; 2812 return 0;
@@ -2948,6 +2961,48 @@ void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd,
2948 } 2961 }
2949} 2962}
2950 2963
2964int ata_scsi_add_hosts(struct ata_host *host, struct scsi_host_template *sht)
2965{
2966 int i, rc;
2967
2968 for (i = 0; i < host->n_ports; i++) {
2969 struct ata_port *ap = host->ports[i];
2970 struct Scsi_Host *shost;
2971
2972 rc = -ENOMEM;
2973 shost = scsi_host_alloc(sht, sizeof(struct ata_port *));
2974 if (!shost)
2975 goto err_alloc;
2976
2977 *(struct ata_port **)&shost->hostdata[0] = ap;
2978 ap->scsi_host = shost;
2979
2980 shost->transportt = &ata_scsi_transport_template;
2981 shost->unique_id = ap->print_id;
2982 shost->max_id = 16;
2983 shost->max_lun = 1;
2984 shost->max_channel = 1;
2985 shost->max_cmd_len = 16;
2986
2987 rc = scsi_add_host(ap->scsi_host, ap->host->dev);
2988 if (rc)
2989 goto err_add;
2990 }
2991
2992 return 0;
2993
2994 err_add:
2995 scsi_host_put(host->ports[i]->scsi_host);
2996 err_alloc:
2997 while (--i >= 0) {
2998 struct Scsi_Host *shost = host->ports[i]->scsi_host;
2999
3000 scsi_remove_host(shost);
3001 scsi_host_put(shost);
3002 }
3003 return rc;
3004}
3005
2951void ata_scsi_scan_host(struct ata_port *ap) 3006void ata_scsi_scan_host(struct ata_port *ap)
2952{ 3007{
2953 unsigned int i; 3008 unsigned int i;
@@ -3224,21 +3279,21 @@ struct ata_port *ata_sas_port_alloc(struct ata_host *host,
3224 struct ata_port_info *port_info, 3279 struct ata_port_info *port_info,
3225 struct Scsi_Host *shost) 3280 struct Scsi_Host *shost)
3226{ 3281{
3227 struct ata_port *ap = kzalloc(sizeof(*ap), GFP_KERNEL); 3282 struct ata_port *ap;
3228 struct ata_probe_ent *ent;
3229 3283
3284 ap = ata_port_alloc(host);
3230 if (!ap) 3285 if (!ap)
3231 return NULL; 3286 return NULL;
3232 3287
3233 ent = ata_probe_ent_alloc(host->dev, port_info); 3288 ap->port_no = 0;
3234 if (!ent) {
3235 kfree(ap);
3236 return NULL;
3237 }
3238
3239 ata_port_init(ap, host, ent, 0);
3240 ap->lock = shost->host_lock; 3289 ap->lock = shost->host_lock;
3241 devm_kfree(host->dev, ent); 3290 ap->pio_mask = port_info->pio_mask;
3291 ap->mwdma_mask = port_info->mwdma_mask;
3292 ap->udma_mask = port_info->udma_mask;
3293 ap->flags |= port_info->flags;
3294 ap->ops = port_info->port_ops;
3295 ap->cbl = ATA_CBL_SATA;
3296
3242 return ap; 3297 return ap;
3243} 3298}
3244EXPORT_SYMBOL_GPL(ata_sas_port_alloc); 3299EXPORT_SYMBOL_GPL(ata_sas_port_alloc);
@@ -3294,8 +3349,10 @@ int ata_sas_port_init(struct ata_port *ap)
3294{ 3349{
3295 int rc = ap->ops->port_start(ap); 3350 int rc = ap->ops->port_start(ap);
3296 3351
3297 if (!rc) 3352 if (!rc) {
3353 ap->print_id = ata_print_id++;
3298 rc = ata_bus_probe(ap); 3354 rc = ata_bus_probe(ap);
3355 }
3299 3356
3300 return rc; 3357 return rc;
3301} 3358}
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index 2ffcca063d80..8af18ad1ca7f 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -526,168 +526,399 @@ static int ata_resources_present(struct pci_dev *pdev, int port)
526 port = port * 2; 526 port = port * 2;
527 for (i = 0; i < 2; i ++) { 527 for (i = 0; i < 2; i ++) {
528 if (pci_resource_start(pdev, port + i) == 0 || 528 if (pci_resource_start(pdev, port + i) == 0 ||
529 pci_resource_len(pdev, port + i) == 0) 529 pci_resource_len(pdev, port + i) == 0)
530 return 0; 530 return 0;
531 } 531 }
532 return 1; 532 return 1;
533} 533}
534 534
535/** 535/**
536 * ata_pci_init_native_mode - Initialize native-mode driver 536 * ata_pci_init_bmdma - acquire PCI BMDMA resources and init ATA host
537 * @pdev: pci device to be initialized 537 * @host: target ATA host
538 * @port: array[2] of pointers to port info structures. 538 *
539 * @ports: bitmap of ports present 539 * Acquire PCI BMDMA resources and initialize @host accordingly.
540 * 540 *
541 * Utility function which allocates and initializes an 541 * LOCKING:
542 * ata_probe_ent structure for a standard dual-port 542 * Inherited from calling layer (may sleep).
543 * PIO-based IDE controller. The returned ata_probe_ent 543 *
544 * structure can be passed to ata_device_add(). The returned 544 * RETURNS:
545 * ata_probe_ent structure should then be freed with kfree(). 545 * 0 on success, -errno otherwise.
546 *
547 * The caller need only pass the address of the primary port, the
548 * secondary will be deduced automatically. If the device has non
549 * standard secondary port mappings this function can be called twice,
550 * once for each interface.
551 */ 546 */
547static int ata_pci_init_bmdma(struct ata_host *host)
548{
549 struct device *gdev = host->dev;
550 struct pci_dev *pdev = to_pci_dev(gdev);
551 int i, rc;
552
553 /* TODO: If we get no DMA mask we should fall back to PIO */
554 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
555 if (rc)
556 return rc;
557 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
558 if (rc)
559 return rc;
560
561 /* request and iomap DMA region */
562 rc = pcim_iomap_regions(pdev, 1 << 4, DRV_NAME);
563 if (rc) {
564 dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n");
565 return -ENOMEM;
566 }
567 host->iomap = pcim_iomap_table(pdev);
568
569 for (i = 0; i < 2; i++) {
570 struct ata_port *ap = host->ports[i];
571 void __iomem *bmdma = host->iomap[4] + 8 * i;
572
573 if (ata_port_is_dummy(ap))
574 continue;
575
576 ap->ioaddr.bmdma_addr = bmdma;
577 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
578 (ioread8(bmdma + 2) & 0x80))
579 host->flags |= ATA_HOST_SIMPLEX;
580 }
581
582 return 0;
583}
552 584
553struct ata_probe_ent * 585/**
554ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports) 586 * ata_pci_init_native_host - acquire native ATA resources and init host
587 * @host: target ATA host
588 * @port_mask: ports to consider
589 *
590 * Acquire native PCI ATA resources for @host and initialize
591 * @host accordoingly.
592 *
593 * LOCKING:
594 * Inherited from calling layer (may sleep).
595 *
596 * RETURNS:
597 * 0 on success, -errno otherwise.
598 */
599int ata_pci_init_native_host(struct ata_host *host, unsigned int port_mask)
555{ 600{
556 struct ata_probe_ent *probe_ent; 601 struct device *gdev = host->dev;
557 int i, p = 0; 602 struct pci_dev *pdev = to_pci_dev(gdev);
558 void __iomem * const *iomap; 603 int i, rc;
559 604
560 /* iomap BARs */ 605 /* Discard disabled ports. Some controllers show their unused
561 for (i = 0; i < 4; i++) { 606 * channels this way. Disabled ports are made dummy.
562 if (pcim_iomap(pdev, i, 0) == NULL) { 607 */
563 dev_printk(KERN_ERR, &pdev->dev, 608 for (i = 0; i < 2; i++) {
564 "failed to iomap PCI BAR %d\n", i); 609 if ((port_mask & (1 << i)) && !ata_resources_present(pdev, i)) {
565 return NULL; 610 host->ports[i]->ops = &ata_dummy_port_ops;
611 port_mask &= ~(1 << i);
566 } 612 }
567 } 613 }
568 614
569 pcim_iomap(pdev, 4, 0); /* may fail */ 615 if (!port_mask) {
570 iomap = pcim_iomap_table(pdev); 616 dev_printk(KERN_ERR, gdev, "no available port\n");
571 617 return -ENODEV;
572 /* alloc and init probe_ent */
573 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
574 if (!probe_ent)
575 return NULL;
576
577 probe_ent->irq = pdev->irq;
578 probe_ent->irq_flags = IRQF_SHARED;
579
580 /* Discard disabled ports. Some controllers show their
581 unused channels this way */
582 if (ata_resources_present(pdev, 0) == 0)
583 ports &= ~ATA_PORT_PRIMARY;
584 if (ata_resources_present(pdev, 1) == 0)
585 ports &= ~ATA_PORT_SECONDARY;
586
587 if (ports & ATA_PORT_PRIMARY) {
588 probe_ent->port[p].cmd_addr = iomap[0];
589 probe_ent->port[p].altstatus_addr =
590 probe_ent->port[p].ctl_addr = (void __iomem *)
591 ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS);
592 if (iomap[4]) {
593 if ((!(port[p]->flags & ATA_FLAG_IGN_SIMPLEX)) &&
594 (ioread8(iomap[4] + 2) & 0x80))
595 probe_ent->_host_flags |= ATA_HOST_SIMPLEX;
596 probe_ent->port[p].bmdma_addr = iomap[4];
597 }
598 ata_std_ports(&probe_ent->port[p]);
599 p++;
600 } 618 }
601 619
602 if (ports & ATA_PORT_SECONDARY) { 620 /* request, iomap BARs and init port addresses accordingly */
603 probe_ent->port[p].cmd_addr = iomap[2]; 621 for (i = 0; i < 2; i++) {
604 probe_ent->port[p].altstatus_addr = 622 struct ata_port *ap = host->ports[i];
605 probe_ent->port[p].ctl_addr = (void __iomem *) 623 int base = i * 2;
606 ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS); 624 void __iomem * const *iomap;
607 if (iomap[4]) { 625
608 if ((!(port[p]->flags & ATA_FLAG_IGN_SIMPLEX)) && 626 if (!(port_mask & (1 << i)))
609 (ioread8(iomap[4] + 10) & 0x80)) 627 continue;
610 probe_ent->_host_flags |= ATA_HOST_SIMPLEX; 628
611 probe_ent->port[p].bmdma_addr = iomap[4] + 8; 629 rc = pcim_iomap_regions(pdev, 0x3 << base, DRV_NAME);
630 if (rc) {
631 dev_printk(KERN_ERR, gdev, "failed to request/iomap "
632 "BARs for port %d (errno=%d)\n", i, rc);
633 if (rc == -EBUSY)
634 pcim_pin_device(pdev);
635 return rc;
612 } 636 }
613 ata_std_ports(&probe_ent->port[p]); 637 host->iomap = iomap = pcim_iomap_table(pdev);
614 probe_ent->pinfo2 = port[1]; 638
615 p++; 639 ap->ioaddr.cmd_addr = iomap[base];
640 ap->ioaddr.altstatus_addr =
641 ap->ioaddr.ctl_addr = (void __iomem *)
642 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
643 ata_std_ports(&ap->ioaddr);
616 } 644 }
617 645
618 probe_ent->n_ports = p; 646 return 0;
619 return probe_ent;
620} 647}
621 648
622static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, 649/**
623 struct ata_port_info **port, int port_mask) 650 * ata_pci_prepare_native_host - helper to prepare native PCI ATA host
651 * @pdev: target PCI device
652 * @ppi: array of port_info
653 * @n_ports: number of ports to allocate
654 * @r_host: out argument for the initialized ATA host
655 *
656 * Helper to allocate ATA host for @pdev, acquire all native PCI
657 * resources and initialize it accordingly in one go.
658 *
659 * LOCKING:
660 * Inherited from calling layer (may sleep).
661 *
662 * RETURNS:
663 * 0 on success, -errno otherwise.
664 */
665int ata_pci_prepare_native_host(struct pci_dev *pdev,
666 const struct ata_port_info * const * ppi,
667 int n_ports, struct ata_host **r_host)
668{
669 struct ata_host *host;
670 unsigned int port_mask;
671 int rc;
672
673 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
674 return -ENOMEM;
675
676 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
677 if (!host) {
678 dev_printk(KERN_ERR, &pdev->dev,
679 "failed to allocate ATA host\n");
680 rc = -ENOMEM;
681 goto err_out;
682 }
683
684 port_mask = ATA_PORT_PRIMARY;
685 if (n_ports > 1)
686 port_mask |= ATA_PORT_SECONDARY;
687
688 rc = ata_pci_init_native_host(host, port_mask);
689 if (rc)
690 goto err_out;
691
692 /* init DMA related stuff */
693 rc = ata_pci_init_bmdma(host);
694 if (rc)
695 goto err_bmdma;
696
697 devres_remove_group(&pdev->dev, NULL);
698 *r_host = host;
699 return 0;
700
701 err_bmdma:
702 /* This is necessary because PCI and iomap resources are
703 * merged and releasing the top group won't release the
704 * acquired resources if some of those have been acquired
705 * before entering this function.
706 */
707 pcim_iounmap_regions(pdev, 0xf);
708 err_out:
709 devres_release_group(&pdev->dev, NULL);
710 return rc;
711}
712
713struct ata_legacy_devres {
714 unsigned int mask;
715 unsigned long cmd_port[2];
716 void __iomem * cmd_addr[2];
717 void __iomem * ctl_addr[2];
718 unsigned int irq[2];
719 void * irq_dev_id[2];
720};
721
722static void ata_legacy_free_irqs(struct ata_legacy_devres *legacy_dr)
624{ 723{
625 struct ata_probe_ent *probe_ent; 724 int i;
626 void __iomem *iomap[5] = { }, *bmdma; 725
627 726 for (i = 0; i < 2; i++) {
628 if (port_mask & ATA_PORT_PRIMARY) { 727 if (!legacy_dr->irq[i])
629 iomap[0] = devm_ioport_map(&pdev->dev, ATA_PRIMARY_CMD, 8); 728 continue;
630 iomap[1] = devm_ioport_map(&pdev->dev, ATA_PRIMARY_CTL, 1); 729
631 if (!iomap[0] || !iomap[1]) 730 free_irq(legacy_dr->irq[i], legacy_dr->irq_dev_id[i]);
632 return NULL; 731 legacy_dr->irq[i] = 0;
732 legacy_dr->irq_dev_id[i] = NULL;
633 } 733 }
734}
735
736static void ata_legacy_release(struct device *gdev, void *res)
737{
738 struct ata_legacy_devres *this = res;
739 int i;
634 740
635 if (port_mask & ATA_PORT_SECONDARY) { 741 ata_legacy_free_irqs(this);
636 iomap[2] = devm_ioport_map(&pdev->dev, ATA_SECONDARY_CMD, 8); 742
637 iomap[3] = devm_ioport_map(&pdev->dev, ATA_SECONDARY_CTL, 1); 743 for (i = 0; i < 2; i++) {
638 if (!iomap[2] || !iomap[3]) 744 if (this->cmd_addr[i])
639 return NULL; 745 ioport_unmap(this->cmd_addr[i]);
746 if (this->ctl_addr[i])
747 ioport_unmap(this->ctl_addr[i]);
748 if (this->cmd_port[i])
749 release_region(this->cmd_port[i], 8);
640 } 750 }
751}
641 752
642 bmdma = pcim_iomap(pdev, 4, 16); /* may fail */ 753static int ata_init_legacy_port(struct ata_port *ap,
643 754 struct ata_legacy_devres *legacy_dr)
644 /* alloc and init probe_ent */ 755{
645 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); 756 struct ata_host *host = ap->host;
646 if (!probe_ent) 757 int port_no = ap->port_no;
647 return NULL; 758 unsigned long cmd_port, ctl_port;
648 759
649 probe_ent->n_ports = 2; 760 if (port_no == 0) {
650 probe_ent->irq_flags = IRQF_SHARED; 761 cmd_port = ATA_PRIMARY_CMD;
651 762 ctl_port = ATA_PRIMARY_CTL;
652 if (port_mask & ATA_PORT_PRIMARY) { 763 } else {
653 probe_ent->irq = ATA_PRIMARY_IRQ(pdev); 764 cmd_port = ATA_SECONDARY_CMD;
654 probe_ent->port[0].cmd_addr = iomap[0]; 765 ctl_port = ATA_SECONDARY_CTL;
655 probe_ent->port[0].altstatus_addr = 766 }
656 probe_ent->port[0].ctl_addr = iomap[1];
657 if (bmdma) {
658 probe_ent->port[0].bmdma_addr = bmdma;
659 if ((!(port[0]->flags & ATA_FLAG_IGN_SIMPLEX)) &&
660 (ioread8(bmdma + 2) & 0x80))
661 probe_ent->_host_flags |= ATA_HOST_SIMPLEX;
662 }
663 ata_std_ports(&probe_ent->port[0]);
664 } else
665 probe_ent->dummy_port_mask |= ATA_PORT_PRIMARY;
666 767
667 if (port_mask & ATA_PORT_SECONDARY) { 768 /* request cmd_port */
668 if (probe_ent->irq) 769 if (request_region(cmd_port, 8, "libata"))
669 probe_ent->irq2 = ATA_SECONDARY_IRQ(pdev); 770 legacy_dr->cmd_port[port_no] = cmd_port;
771 else {
772 dev_printk(KERN_WARNING, host->dev,
773 "0x%0lX IDE port busy\n", cmd_port);
774 return -EBUSY;
775 }
776
777 /* iomap cmd and ctl ports */
778 legacy_dr->cmd_addr[port_no] = ioport_map(cmd_port, 8);
779 legacy_dr->ctl_addr[port_no] = ioport_map(ctl_port, 1);
780 if (!legacy_dr->cmd_addr[port_no] || !legacy_dr->ctl_addr[port_no])
781 return -ENOMEM;
782
783 /* init IO addresses */
784 ap->ioaddr.cmd_addr = legacy_dr->cmd_addr[port_no];
785 ap->ioaddr.altstatus_addr = legacy_dr->ctl_addr[port_no];
786 ap->ioaddr.ctl_addr = legacy_dr->ctl_addr[port_no];
787 ata_std_ports(&ap->ioaddr);
788
789 return 0;
790}
791
792/**
793 * ata_init_legacy_host - acquire legacy ATA resources and init ATA host
794 * @host: target ATA host
795 * @legacy_mask: out parameter, mask indicating ports is in legacy mode
796 * @was_busy: out parameter, indicates whether any port was busy
797 *
798 * Acquire legacy ATA resources for ports.
799 *
800 * LOCKING:
801 * Inherited from calling layer (may sleep).
802 *
803 * RETURNS:
804 * 0 on success, -errno otherwise.
805 */
806static int ata_init_legacy_host(struct ata_host *host,
807 unsigned int *legacy_mask, int *was_busy)
808{
809 struct device *gdev = host->dev;
810 struct ata_legacy_devres *legacy_dr;
811 int i, rc;
812
813 if (!devres_open_group(gdev, NULL, GFP_KERNEL))
814 return -ENOMEM;
815
816 rc = -ENOMEM;
817 legacy_dr = devres_alloc(ata_legacy_release, sizeof(*legacy_dr),
818 GFP_KERNEL);
819 if (!legacy_dr)
820 goto err_out;
821 devres_add(gdev, legacy_dr);
822
823 for (i = 0; i < 2; i++) {
824 *legacy_mask &= ~(1 << i);
825 rc = ata_init_legacy_port(host->ports[i], legacy_dr);
826 if (rc == 0)
827 legacy_dr->mask |= 1 << i;
828 else if (rc == -EBUSY)
829 (*was_busy)++;
830 }
831
832 if (!legacy_dr->mask)
833 return -EBUSY;
834
835 for (i = 0; i < 2; i++)
836 if (!(legacy_dr->mask & (1 << i)))
837 host->ports[i]->ops = &ata_dummy_port_ops;
838
839 *legacy_mask |= legacy_dr->mask;
840
841 devres_remove_group(gdev, NULL);
842 return 0;
843
844 err_out:
845 devres_release_group(gdev, NULL);
846 return rc;
847}
848
849/**
850 * ata_request_legacy_irqs - request legacy ATA IRQs
851 * @host: target ATA host
852 * @handler: array of IRQ handlers
853 * @irq_flags: array of IRQ flags
854 * @dev_id: array of IRQ dev_ids
855 *
856 * Request legacy IRQs for non-dummy legacy ports in @host. All
857 * IRQ parameters are passed as array to allow ports to have
858 * separate IRQ handlers.
859 *
860 * LOCKING:
861 * Inherited from calling layer (may sleep).
862 *
863 * RETURNS:
864 * 0 on success, -errno otherwise.
865 */
866static int ata_request_legacy_irqs(struct ata_host *host,
867 irq_handler_t const *handler,
868 const unsigned int *irq_flags,
869 void * const *dev_id)
870{
871 struct device *gdev = host->dev;
872 struct ata_legacy_devres *legacy_dr;
873 int i, rc;
874
875 legacy_dr = devres_find(host->dev, ata_legacy_release, NULL, NULL);
876 BUG_ON(!legacy_dr);
877
878 for (i = 0; i < 2; i++) {
879 unsigned int irq;
880
881 /* FIXME: ATA_*_IRQ() should take generic device not pci_dev */
882 if (i == 0)
883 irq = ATA_PRIMARY_IRQ(to_pci_dev(gdev));
670 else 884 else
671 probe_ent->irq = ATA_SECONDARY_IRQ(pdev); 885 irq = ATA_SECONDARY_IRQ(to_pci_dev(gdev));
672 probe_ent->port[1].cmd_addr = iomap[2]; 886
673 probe_ent->port[1].altstatus_addr = 887 if (!(legacy_dr->mask & (1 << i)))
674 probe_ent->port[1].ctl_addr = iomap[3]; 888 continue;
675 if (bmdma) { 889
676 probe_ent->port[1].bmdma_addr = bmdma + 8; 890 if (!handler[i]) {
677 if ((!(port[1]->flags & ATA_FLAG_IGN_SIMPLEX)) && 891 dev_printk(KERN_ERR, gdev,
678 (ioread8(bmdma + 10) & 0x80)) 892 "NULL handler specified for port %d\n", i);
679 probe_ent->_host_flags |= ATA_HOST_SIMPLEX; 893 rc = -EINVAL;
894 goto err_out;
895 }
896
897 rc = request_irq(irq, handler[i], irq_flags[i], DRV_NAME,
898 dev_id[i]);
899 if (rc) {
900 dev_printk(KERN_ERR, gdev,
901 "irq %u request failed (errno=%d)\n", irq, rc);
902 goto err_out;
680 } 903 }
681 ata_std_ports(&probe_ent->port[1]);
682 904
683 /* FIXME: could be pointing to stack area; must copy */ 905 /* record irq allocation in legacy_dr */
684 probe_ent->pinfo2 = port[1]; 906 legacy_dr->irq[i] = irq;
685 } else 907 legacy_dr->irq_dev_id[i] = dev_id[i];
686 probe_ent->dummy_port_mask |= ATA_PORT_SECONDARY;
687 908
688 return probe_ent; 909 /* only used to print info */
689} 910 if (i == 0)
911 host->irq = irq;
912 else
913 host->irq2 = irq;
914 }
690 915
916 return 0;
917
918 err_out:
919 ata_legacy_free_irqs(legacy_dr);
920 return rc;
921}
691 922
692/** 923/**
693 * ata_pci_init_one - Initialize/register PCI IDE host controller 924 * ata_pci_init_one - Initialize/register PCI IDE host controller
@@ -718,8 +949,8 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
718 unsigned int n_ports) 949 unsigned int n_ports)
719{ 950{
720 struct device *dev = &pdev->dev; 951 struct device *dev = &pdev->dev;
721 struct ata_probe_ent *probe_ent = NULL; 952 struct ata_host *host = NULL;
722 struct ata_port_info *port[2]; 953 const struct ata_port_info *port[2];
723 u8 mask; 954 u8 mask;
724 unsigned int legacy_mode = 0; 955 unsigned int legacy_mode = 0;
725 int rc; 956 int rc;
@@ -743,7 +974,7 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
743 974
744 Checking dev->is_enabled is insufficient as this is not set at 975 Checking dev->is_enabled is insufficient as this is not set at
745 boot for the primary video which is BIOS enabled 976 boot for the primary video which is BIOS enabled
746 */ 977 */
747 978
748 rc = pcim_enable_device(pdev); 979 rc = pcim_enable_device(pdev);
749 if (rc) 980 if (rc)
@@ -769,96 +1000,68 @@ int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
769#endif 1000#endif
770 } 1001 }
771 1002
1003 /* alloc and init host */
1004 host = ata_host_alloc_pinfo(dev, port, 2);
1005 if (!host) {
1006 dev_printk(KERN_ERR, &pdev->dev,
1007 "failed to allocate ATA host\n");
1008 rc = -ENOMEM;
1009 goto err_out;
1010 }
1011
772 if (!legacy_mode) { 1012 if (!legacy_mode) {
773 rc = pci_request_regions(pdev, DRV_NAME); 1013 unsigned int port_mask;
774 if (rc) { 1014
775 pcim_pin_device(pdev); 1015 port_mask = ATA_PORT_PRIMARY;
1016 if (n_ports > 1)
1017 port_mask |= ATA_PORT_SECONDARY;
1018
1019 rc = ata_pci_init_native_host(host, port_mask);
1020 if (rc)
776 goto err_out; 1021 goto err_out;
777 }
778 } else { 1022 } else {
779 /* Deal with combined mode hack. This side of the logic all 1023 int was_busy = 0;
780 goes away once the combined mode hack is killed in 2.6.21 */
781 if (!devm_request_region(dev, ATA_PRIMARY_CMD, 8, "libata")) {
782 struct resource *conflict, res;
783 res.start = ATA_PRIMARY_CMD;
784 res.end = ATA_PRIMARY_CMD + 8 - 1;
785 conflict = ____request_resource(&ioport_resource, &res);
786 while (conflict->child)
787 conflict = ____request_resource(conflict, &res);
788 if (!strcmp(conflict->name, "libata"))
789 legacy_mode |= ATA_PORT_PRIMARY;
790 else {
791 pcim_pin_device(pdev);
792 printk(KERN_WARNING "ata: 0x%0X IDE port busy\n" \
793 "ata: conflict with %s\n",
794 ATA_PRIMARY_CMD,
795 conflict->name);
796 }
797 } else
798 legacy_mode |= ATA_PORT_PRIMARY;
799
800 if (!devm_request_region(dev, ATA_SECONDARY_CMD, 8, "libata")) {
801 struct resource *conflict, res;
802 res.start = ATA_SECONDARY_CMD;
803 res.end = ATA_SECONDARY_CMD + 8 - 1;
804 conflict = ____request_resource(&ioport_resource, &res);
805 while (conflict->child)
806 conflict = ____request_resource(conflict, &res);
807 if (!strcmp(conflict->name, "libata"))
808 legacy_mode |= ATA_PORT_SECONDARY;
809 else {
810 pcim_pin_device(pdev);
811 printk(KERN_WARNING "ata: 0x%X IDE port busy\n" \
812 "ata: conflict with %s\n",
813 ATA_SECONDARY_CMD,
814 conflict->name);
815 }
816 } else
817 legacy_mode |= ATA_PORT_SECONDARY;
818
819 if (legacy_mode & ATA_PORT_PRIMARY)
820 pci_request_region(pdev, 1, DRV_NAME);
821 if (legacy_mode & ATA_PORT_SECONDARY)
822 pci_request_region(pdev, 3, DRV_NAME);
823 /* If there is a DMA resource, allocate it */
824 pci_request_region(pdev, 4, DRV_NAME);
825 }
826 1024
827 /* we have legacy mode, but all ports are unavailable */ 1025 rc = ata_init_legacy_host(host, &legacy_mode, &was_busy);
828 if (legacy_mode == (1 << 3)) { 1026 if (was_busy)
829 rc = -EBUSY; 1027 pcim_pin_device(pdev);
830 goto err_out; 1028 if (rc)
1029 goto err_out;
1030
1031 /* request respective PCI regions, may fail */
1032 rc = pci_request_region(pdev, 1, DRV_NAME);
1033 rc = pci_request_region(pdev, 3, DRV_NAME);
831 } 1034 }
832 1035
833 /* TODO: If we get no DMA mask we should fall back to PIO */ 1036 /* init BMDMA, may fail */
834 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 1037 ata_pci_init_bmdma(host);
835 if (rc) 1038 pci_set_master(pdev);
836 goto err_out; 1039
837 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); 1040 /* start host and request IRQ */
1041 rc = ata_host_start(host);
838 if (rc) 1042 if (rc)
839 goto err_out; 1043 goto err_out;
840 1044
841 if (legacy_mode) { 1045 if (!legacy_mode)
842 probe_ent = ata_pci_init_legacy_port(pdev, port, legacy_mode); 1046 rc = devm_request_irq(dev, pdev->irq,
843 } else { 1047 port_info[0]->port_ops->irq_handler,
844 if (n_ports == 2) 1048 IRQF_SHARED, DRV_NAME, host);
845 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); 1049 else {
846 else 1050 irq_handler_t handler[2] = { host->ops->irq_handler,
847 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY); 1051 host->ops->irq_handler };
1052 unsigned int irq_flags[2] = { IRQF_SHARED, IRQF_SHARED };
1053 void *dev_id[2] = { host, host };
1054
1055 rc = ata_request_legacy_irqs(host, handler, irq_flags, dev_id);
848 } 1056 }
849 if (!probe_ent) { 1057 if (rc)
850 rc = -ENOMEM;
851 goto err_out; 1058 goto err_out;
852 }
853
854 pci_set_master(pdev);
855 1059
856 if (!ata_device_add(probe_ent)) { 1060 /* register */
857 rc = -ENODEV; 1061 rc = ata_host_register(host, port_info[0]->sht);
1062 if (rc)
858 goto err_out; 1063 goto err_out;
859 }
860 1064
861 devm_kfree(dev, probe_ent);
862 devres_remove_group(dev, NULL); 1065 devres_remove_group(dev, NULL);
863 return 0; 1066 return 0;
864 1067
@@ -893,12 +1096,12 @@ int ata_pci_clear_simplex(struct pci_dev *pdev)
893 return 0; 1096 return 0;
894} 1097}
895 1098
896unsigned long ata_pci_default_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long xfer_mask) 1099unsigned long ata_pci_default_filter(struct ata_device *adev, unsigned long xfer_mask)
897{ 1100{
898 /* Filter out DMA modes if the device has been configured by 1101 /* Filter out DMA modes if the device has been configured by
899 the BIOS as PIO only */ 1102 the BIOS as PIO only */
900 1103
901 if (ap->ioaddr.bmdma_addr == 0) 1104 if (adev->ap->ioaddr.bmdma_addr == 0)
902 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); 1105 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
903 return xfer_mask; 1106 return xfer_mask;
904} 1107}
diff --git a/drivers/ata/libata.h b/drivers/ata/libata.h
index 1f1e3a51f859..5f4d40cd3288 100644
--- a/drivers/ata/libata.h
+++ b/drivers/ata/libata.h
@@ -52,6 +52,7 @@ enum {
52 ATA_DNXFER_QUIET = (1 << 31), 52 ATA_DNXFER_QUIET = (1 << 31),
53}; 53};
54 54
55extern unsigned int ata_print_id;
55extern struct workqueue_struct *ata_aux_wq; 56extern struct workqueue_struct *ata_aux_wq;
56extern int atapi_enabled; 57extern int atapi_enabled;
57extern int atapi_dmadir; 58extern int atapi_dmadir;
@@ -92,10 +93,7 @@ extern int ata_flush_cache(struct ata_device *dev);
92extern void ata_dev_init(struct ata_device *dev); 93extern void ata_dev_init(struct ata_device *dev);
93extern int ata_task_ioctl(struct scsi_device *scsidev, void __user *arg); 94extern int ata_task_ioctl(struct scsi_device *scsidev, void __user *arg);
94extern int ata_cmd_ioctl(struct scsi_device *scsidev, void __user *arg); 95extern int ata_cmd_ioctl(struct scsi_device *scsidev, void __user *arg);
95extern void ata_port_init(struct ata_port *ap, struct ata_host *host, 96extern struct ata_port *ata_port_alloc(struct ata_host *host);
96 const struct ata_probe_ent *ent, unsigned int port_no);
97extern struct ata_probe_ent *ata_probe_ent_alloc(struct device *dev,
98 const struct ata_port_info *port);
99 97
100/* libata-acpi.c */ 98/* libata-acpi.c */
101#ifdef CONFIG_SATA_ACPI 99#ifdef CONFIG_SATA_ACPI
@@ -113,8 +111,8 @@ static inline int ata_acpi_push_id(struct ata_port *ap, unsigned int ix)
113#endif 111#endif
114 112
115/* libata-scsi.c */ 113/* libata-scsi.c */
116extern struct scsi_transport_template ata_scsi_transport_template; 114extern int ata_scsi_add_hosts(struct ata_host *host,
117 115 struct scsi_host_template *sht);
118extern void ata_scsi_scan_host(struct ata_port *ap); 116extern void ata_scsi_scan_host(struct ata_port *ap);
119extern int ata_scsi_offline_dev(struct ata_device *dev); 117extern int ata_scsi_offline_dev(struct ata_device *dev);
120extern void ata_scsi_hotplug(struct work_struct *work); 118extern void ata_scsi_hotplug(struct work_struct *work);
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c
index 11ea552a58ca..d40edebb510a 100644
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -34,7 +34,7 @@
34#include <linux/dmi.h> 34#include <linux/dmi.h>
35 35
36#define DRV_NAME "pata_ali" 36#define DRV_NAME "pata_ali"
37#define DRV_VERSION "0.7.3" 37#define DRV_VERSION "0.7.4"
38 38
39/* 39/*
40 * Cable special cases 40 * Cable special cases
@@ -90,59 +90,6 @@ static int ali_c2_cable_detect(struct ata_port *ap)
90} 90}
91 91
92/** 92/**
93 * ali_early_error_handler - reset for eary chip
94 * @ap: ATA port
95 *
96 * Handle the reset callback for the later chips with cable detect
97 */
98
99static int ali_c2_pre_reset(struct ata_port *ap)
100{
101 ap->cbl = ali_c2_cable_detect(ap);
102 return ata_std_prereset(ap);
103}
104
105static void ali_c2_error_handler(struct ata_port *ap)
106{
107 ata_bmdma_drive_eh(ap, ali_c2_pre_reset,
108 ata_std_softreset, NULL,
109 ata_std_postreset);
110}
111
112/**
113 * ali_early_cable_detect - cable detection
114 * @ap: ATA port
115 *
116 * Perform cable detection for older chipsets. This turns out to be
117 * rather easy to implement
118 */
119
120static int ali_early_cable_detect(struct ata_port *ap)
121{
122 return ATA_CBL_PATA40;
123}
124
125/**
126 * ali_early_probe_init - reset for early chip
127 * @ap: ATA port
128 *
129 * Handle the reset callback for the early (pre cable detect) chips.
130 */
131
132static int ali_early_pre_reset(struct ata_port *ap)
133{
134 ap->cbl = ali_early_cable_detect(ap);
135 return ata_std_prereset(ap);
136}
137
138static void ali_early_error_handler(struct ata_port *ap)
139{
140 return ata_bmdma_drive_eh(ap, ali_early_pre_reset,
141 ata_std_softreset, NULL,
142 ata_std_postreset);
143}
144
145/**
146 * ali_20_filter - filter for earlier ALI DMA 93 * ali_20_filter - filter for earlier ALI DMA
147 * @ap: ALi ATA port 94 * @ap: ALi ATA port
148 * @adev: attached device 95 * @adev: attached device
@@ -151,7 +98,7 @@ static void ali_early_error_handler(struct ata_port *ap)
151 * fix that later on. Also ensure we do not do UDMA on WDC drives 98 * fix that later on. Also ensure we do not do UDMA on WDC drives
152 */ 99 */
153 100
154static unsigned long ali_20_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) 101static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
155{ 102{
156 char model_num[ATA_ID_PROD_LEN + 1]; 103 char model_num[ATA_ID_PROD_LEN + 1];
157 /* No DMA on anything but a disk for now */ 104 /* No DMA on anything but a disk for now */
@@ -160,7 +107,7 @@ static unsigned long ali_20_filter(const struct ata_port *ap, struct ata_device
160 ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 107 ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
161 if (strstr(model_num, "WDC")) 108 if (strstr(model_num, "WDC"))
162 return mask &= ~ATA_MASK_UDMA; 109 return mask &= ~ATA_MASK_UDMA;
163 return ata_pci_default_filter(ap, adev, mask); 110 return ata_pci_default_filter(adev, mask);
164} 111}
165 112
166/** 113/**
@@ -314,7 +261,6 @@ static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
314 261
315/** 262/**
316 * ali_lock_sectors - Keep older devices to 255 sector mode 263 * ali_lock_sectors - Keep older devices to 255 sector mode
317 * @ap: ATA port
318 * @adev: Device 264 * @adev: Device
319 * 265 *
320 * Called during the bus probe for each device that is found. We use 266 * Called during the bus probe for each device that is found. We use
@@ -324,7 +270,7 @@ static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
324 * slower PIO methods 270 * slower PIO methods
325 */ 271 */
326 272
327static void ali_lock_sectors(struct ata_port *ap, struct ata_device *adev) 273static void ali_lock_sectors(struct ata_device *adev)
328{ 274{
329 adev->max_sectors = 255; 275 adev->max_sectors = 255;
330} 276}
@@ -366,8 +312,9 @@ static struct ata_port_operations ali_early_port_ops = {
366 312
367 .freeze = ata_bmdma_freeze, 313 .freeze = ata_bmdma_freeze,
368 .thaw = ata_bmdma_thaw, 314 .thaw = ata_bmdma_thaw,
369 .error_handler = ali_early_error_handler, 315 .error_handler = ata_bmdma_error_handler,
370 .post_internal_cmd = ata_bmdma_post_internal_cmd, 316 .post_internal_cmd = ata_bmdma_post_internal_cmd,
317 .cable_detect = ata_cable_40wire,
371 318
372 .qc_prep = ata_qc_prep, 319 .qc_prep = ata_qc_prep,
373 .qc_issue = ata_qc_issue_prot, 320 .qc_issue = ata_qc_issue_prot,
@@ -402,8 +349,9 @@ static struct ata_port_operations ali_20_port_ops = {
402 349
403 .freeze = ata_bmdma_freeze, 350 .freeze = ata_bmdma_freeze,
404 .thaw = ata_bmdma_thaw, 351 .thaw = ata_bmdma_thaw,
405 .error_handler = ali_early_error_handler, 352 .error_handler = ata_bmdma_error_handler,
406 .post_internal_cmd = ata_bmdma_post_internal_cmd, 353 .post_internal_cmd = ata_bmdma_post_internal_cmd,
354 .cable_detect = ata_cable_40wire,
407 355
408 .bmdma_setup = ata_bmdma_setup, 356 .bmdma_setup = ata_bmdma_setup,
409 .bmdma_start = ata_bmdma_start, 357 .bmdma_start = ata_bmdma_start,
@@ -440,8 +388,9 @@ static struct ata_port_operations ali_c2_port_ops = {
440 388
441 .freeze = ata_bmdma_freeze, 389 .freeze = ata_bmdma_freeze,
442 .thaw = ata_bmdma_thaw, 390 .thaw = ata_bmdma_thaw,
443 .error_handler = ali_c2_error_handler, 391 .error_handler = ata_bmdma_error_handler,
444 .post_internal_cmd = ata_bmdma_post_internal_cmd, 392 .post_internal_cmd = ata_bmdma_post_internal_cmd,
393 .cable_detect = ali_c2_cable_detect,
445 394
446 .bmdma_setup = ata_bmdma_setup, 395 .bmdma_setup = ata_bmdma_setup,
447 .bmdma_start = ata_bmdma_start, 396 .bmdma_start = ata_bmdma_start,
@@ -477,8 +426,9 @@ static struct ata_port_operations ali_c5_port_ops = {
477 426
478 .freeze = ata_bmdma_freeze, 427 .freeze = ata_bmdma_freeze,
479 .thaw = ata_bmdma_thaw, 428 .thaw = ata_bmdma_thaw,
480 .error_handler = ali_c2_error_handler, 429 .error_handler = ata_bmdma_error_handler,
481 .post_internal_cmd = ata_bmdma_post_internal_cmd, 430 .post_internal_cmd = ata_bmdma_post_internal_cmd,
431 .cable_detect = ali_c2_cable_detect,
482 432
483 .bmdma_setup = ata_bmdma_setup, 433 .bmdma_setup = ata_bmdma_setup,
484 .bmdma_start = ata_bmdma_start, 434 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_amd.c b/drivers/ata/pata_amd.c
index 18381762908b..536ee892ab72 100644
--- a/drivers/ata/pata_amd.c
+++ b/drivers/ata/pata_amd.c
@@ -25,7 +25,7 @@
25#include <linux/libata.h> 25#include <linux/libata.h>
26 26
27#define DRV_NAME "pata_amd" 27#define DRV_NAME "pata_amd"
28#define DRV_VERSION "0.2.8" 28#define DRV_VERSION "0.3.8"
29 29
30/** 30/**
31 * timing_setup - shared timing computation and load 31 * timing_setup - shared timing computation and load
@@ -119,32 +119,25 @@ static void timing_setup(struct ata_port *ap, struct ata_device *adev, int offse
119} 119}
120 120
121/** 121/**
122 * amd_probe_init - cable detection 122 * amd_probe_init - perform reset handling
123 * @ap: ATA port 123 * @ap: ATA port
124 * 124 *
125 * Perform cable detection. The BIOS stores this in PCI config 125 * Reset sequence checking enable bits to see which ports are
126 * space for us. 126 * active.
127 */ 127 */
128 128
129static int amd_pre_reset(struct ata_port *ap) 129static int amd_pre_reset(struct ata_port *ap)
130{ 130{
131 static const u32 bitmask[2] = {0x03, 0x0C};
132 static const struct pci_bits amd_enable_bits[] = { 131 static const struct pci_bits amd_enable_bits[] = {
133 { 0x40, 1, 0x02, 0x02 }, 132 { 0x40, 1, 0x02, 0x02 },
134 { 0x40, 1, 0x01, 0x01 } 133 { 0x40, 1, 0x01, 0x01 }
135 }; 134 };
136 135
137 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 136 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
138 u8 ata66;
139 137
140 if (!pci_test_config_bits(pdev, &amd_enable_bits[ap->port_no])) 138 if (!pci_test_config_bits(pdev, &amd_enable_bits[ap->port_no]))
141 return -ENOENT; 139 return -ENOENT;
142 140
143 pci_read_config_byte(pdev, 0x42, &ata66);
144 if (ata66 & bitmask[ap->port_no])
145 ap->cbl = ATA_CBL_PATA80;
146 else
147 ap->cbl = ATA_CBL_PATA40;
148 return ata_std_prereset(ap); 141 return ata_std_prereset(ap);
149 142
150} 143}
@@ -156,28 +149,16 @@ static void amd_error_handler(struct ata_port *ap)
156 ata_std_postreset); 149 ata_std_postreset);
157} 150}
158 151
159static int amd_early_pre_reset(struct ata_port *ap) 152static int amd_cable_detect(struct ata_port *ap)
160{ 153{
154 static const u32 bitmask[2] = {0x03, 0x0C};
161 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 155 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
162 static struct pci_bits amd_enable_bits[] = { 156 u8 ata66;
163 { 0x40, 1, 0x02, 0x02 },
164 { 0x40, 1, 0x01, 0x01 }
165 };
166
167 if (!pci_test_config_bits(pdev, &amd_enable_bits[ap->port_no]))
168 return -ENOENT;
169
170 /* No host side cable detection */
171 ap->cbl = ATA_CBL_PATA80;
172 return ata_std_prereset(ap);
173
174}
175 157
176static void amd_early_error_handler(struct ata_port *ap) 158 pci_read_config_byte(pdev, 0x42, &ata66);
177{ 159 if (ata66 & bitmask[ap->port_no])
178 ata_bmdma_drive_eh(ap, amd_early_pre_reset, 160 return ATA_CBL_PATA80;
179 ata_std_softreset, NULL, 161 return ATA_CBL_PATA40;
180 ata_std_postreset);
181} 162}
182 163
183/** 164/**
@@ -247,31 +228,16 @@ static void amd133_set_dmamode(struct ata_port *ap, struct ata_device *adev)
247 */ 228 */
248 229
249static int nv_pre_reset(struct ata_port *ap) { 230static int nv_pre_reset(struct ata_port *ap) {
250 static const u8 bitmask[2] = {0x03, 0x0C};
251 static const struct pci_bits nv_enable_bits[] = { 231 static const struct pci_bits nv_enable_bits[] = {
252 { 0x50, 1, 0x02, 0x02 }, 232 { 0x50, 1, 0x02, 0x02 },
253 { 0x50, 1, 0x01, 0x01 } 233 { 0x50, 1, 0x01, 0x01 }
254 }; 234 };
255 235
256 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 236 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
257 u8 ata66;
258 u16 udma;
259 237
260 if (!pci_test_config_bits(pdev, &nv_enable_bits[ap->port_no])) 238 if (!pci_test_config_bits(pdev, &nv_enable_bits[ap->port_no]))
261 return -ENOENT; 239 return -ENOENT;
262 240
263 pci_read_config_byte(pdev, 0x52, &ata66);
264 if (ata66 & bitmask[ap->port_no])
265 ap->cbl = ATA_CBL_PATA80;
266 else
267 ap->cbl = ATA_CBL_PATA40;
268
269 /* We now have to double check because the Nvidia boxes BIOS
270 doesn't always set the cable bits but does set mode bits */
271
272 pci_read_config_word(pdev, 0x62 - 2 * ap->port_no, &udma);
273 if ((udma & 0xC4) == 0xC4 || (udma & 0xC400) == 0xC400)
274 ap->cbl = ATA_CBL_PATA80;
275 return ata_std_prereset(ap); 241 return ata_std_prereset(ap);
276} 242}
277 243
@@ -281,6 +247,29 @@ static void nv_error_handler(struct ata_port *ap)
281 ata_std_softreset, NULL, 247 ata_std_softreset, NULL,
282 ata_std_postreset); 248 ata_std_postreset);
283} 249}
250
251static int nv_cable_detect(struct ata_port *ap)
252{
253 static const u8 bitmask[2] = {0x03, 0x0C};
254 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
255 u8 ata66;
256 u16 udma;
257 int cbl;
258
259 pci_read_config_byte(pdev, 0x52, &ata66);
260 if (ata66 & bitmask[ap->port_no])
261 cbl = ATA_CBL_PATA80;
262 else
263 cbl = ATA_CBL_PATA40;
264
265 /* We now have to double check because the Nvidia boxes BIOS
266 doesn't always set the cable bits but does set mode bits */
267 pci_read_config_word(pdev, 0x62 - 2 * ap->port_no, &udma);
268 if ((udma & 0xC4) == 0xC4 || (udma & 0xC400) == 0xC400)
269 cbl = ATA_CBL_PATA80;
270 return cbl;
271}
272
284/** 273/**
285 * nv100_set_piomode - set initial PIO mode data 274 * nv100_set_piomode - set initial PIO mode data
286 * @ap: ATA interface 275 * @ap: ATA interface
@@ -353,8 +342,9 @@ static struct ata_port_operations amd33_port_ops = {
353 342
354 .freeze = ata_bmdma_freeze, 343 .freeze = ata_bmdma_freeze,
355 .thaw = ata_bmdma_thaw, 344 .thaw = ata_bmdma_thaw,
356 .error_handler = amd_early_error_handler, 345 .error_handler = amd_error_handler,
357 .post_internal_cmd = ata_bmdma_post_internal_cmd, 346 .post_internal_cmd = ata_bmdma_post_internal_cmd,
347 .cable_detect = ata_cable_40wire,
358 348
359 .bmdma_setup = ata_bmdma_setup, 349 .bmdma_setup = ata_bmdma_setup,
360 .bmdma_start = ata_bmdma_start, 350 .bmdma_start = ata_bmdma_start,
@@ -387,8 +377,9 @@ static struct ata_port_operations amd66_port_ops = {
387 377
388 .freeze = ata_bmdma_freeze, 378 .freeze = ata_bmdma_freeze,
389 .thaw = ata_bmdma_thaw, 379 .thaw = ata_bmdma_thaw,
390 .error_handler = amd_early_error_handler, 380 .error_handler = amd_error_handler,
391 .post_internal_cmd = ata_bmdma_post_internal_cmd, 381 .post_internal_cmd = ata_bmdma_post_internal_cmd,
382 .cable_detect = ata_cable_unknown,
392 383
393 .bmdma_setup = ata_bmdma_setup, 384 .bmdma_setup = ata_bmdma_setup,
394 .bmdma_start = ata_bmdma_start, 385 .bmdma_start = ata_bmdma_start,
@@ -423,6 +414,7 @@ static struct ata_port_operations amd100_port_ops = {
423 .thaw = ata_bmdma_thaw, 414 .thaw = ata_bmdma_thaw,
424 .error_handler = amd_error_handler, 415 .error_handler = amd_error_handler,
425 .post_internal_cmd = ata_bmdma_post_internal_cmd, 416 .post_internal_cmd = ata_bmdma_post_internal_cmd,
417 .cable_detect = ata_cable_unknown,
426 418
427 .bmdma_setup = ata_bmdma_setup, 419 .bmdma_setup = ata_bmdma_setup,
428 .bmdma_start = ata_bmdma_start, 420 .bmdma_start = ata_bmdma_start,
@@ -457,6 +449,7 @@ static struct ata_port_operations amd133_port_ops = {
457 .thaw = ata_bmdma_thaw, 449 .thaw = ata_bmdma_thaw,
458 .error_handler = amd_error_handler, 450 .error_handler = amd_error_handler,
459 .post_internal_cmd = ata_bmdma_post_internal_cmd, 451 .post_internal_cmd = ata_bmdma_post_internal_cmd,
452 .cable_detect = amd_cable_detect,
460 453
461 .bmdma_setup = ata_bmdma_setup, 454 .bmdma_setup = ata_bmdma_setup,
462 .bmdma_start = ata_bmdma_start, 455 .bmdma_start = ata_bmdma_start,
@@ -491,6 +484,7 @@ static struct ata_port_operations nv100_port_ops = {
491 .thaw = ata_bmdma_thaw, 484 .thaw = ata_bmdma_thaw,
492 .error_handler = nv_error_handler, 485 .error_handler = nv_error_handler,
493 .post_internal_cmd = ata_bmdma_post_internal_cmd, 486 .post_internal_cmd = ata_bmdma_post_internal_cmd,
487 .cable_detect = nv_cable_detect,
494 488
495 .bmdma_setup = ata_bmdma_setup, 489 .bmdma_setup = ata_bmdma_setup,
496 .bmdma_start = ata_bmdma_start, 490 .bmdma_start = ata_bmdma_start,
@@ -525,6 +519,7 @@ static struct ata_port_operations nv133_port_ops = {
525 .thaw = ata_bmdma_thaw, 519 .thaw = ata_bmdma_thaw,
526 .error_handler = nv_error_handler, 520 .error_handler = nv_error_handler,
527 .post_internal_cmd = ata_bmdma_post_internal_cmd, 521 .post_internal_cmd = ata_bmdma_post_internal_cmd,
522 .cable_detect = nv_cable_detect,
528 523
529 .bmdma_setup = ata_bmdma_setup, 524 .bmdma_setup = ata_bmdma_setup,
530 .bmdma_start = ata_bmdma_start, 525 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_artop.c b/drivers/ata/pata_artop.c
index 21c30282717c..00e9ec342db0 100644
--- a/drivers/ata/pata_artop.c
+++ b/drivers/ata/pata_artop.c
@@ -49,8 +49,6 @@ static int artop6210_pre_reset(struct ata_port *ap)
49 49
50 if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) 50 if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
51 return -ENOENT; 51 return -ENOENT;
52
53 ap->cbl = ATA_CBL_PATA40;
54 return ata_std_prereset(ap); 52 return ata_std_prereset(ap);
55} 53}
56 54
@@ -85,18 +83,28 @@ static int artop6260_pre_reset(struct ata_port *ap)
85 }; 83 };
86 84
87 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 85 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
88 u8 tmp;
89 86
90 /* Odd numbered device ids are the units with enable bits (the -R cards) */ 87 /* Odd numbered device ids are the units with enable bits (the -R cards) */
91 if (pdev->device % 1 && !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) 88 if (pdev->device % 1 && !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
92 return -ENOENT; 89 return -ENOENT;
90 return ata_std_prereset(ap);
91}
93 92
93/**
94 * artop6260_cable_detect - identify cable type
95 * @ap: Port
96 *
97 * Identify the cable type for the ARTOp interface in question
98 */
99
100static int artop6260_cable_detect(struct ata_port *ap)
101{
102 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
103 u8 tmp;
94 pci_read_config_byte(pdev, 0x49, &tmp); 104 pci_read_config_byte(pdev, 0x49, &tmp);
95 if (tmp & (1 << ap->port_no)) 105 if (tmp & (1 << ap->port_no))
96 ap->cbl = ATA_CBL_PATA40; 106 return ATA_CBL_PATA40;
97 else 107 return ATA_CBL_PATA80;
98 ap->cbl = ATA_CBL_PATA80;
99 return ata_std_prereset(ap);
100} 108}
101 109
102/** 110/**
@@ -225,7 +233,7 @@ static void artop6260_set_piomode(struct ata_port *ap, struct ata_device *adev)
225/** 233/**
226 * artop6210_set_dmamode - Initialize host controller PATA PIO timings 234 * artop6210_set_dmamode - Initialize host controller PATA PIO timings
227 * @ap: Port whose timings we are configuring 235 * @ap: Port whose timings we are configuring
228 * @adev: um 236 * @adev: Device whose timings we are configuring
229 * 237 *
230 * Set DMA mode for device, in host controller PCI config space. 238 * Set DMA mode for device, in host controller PCI config space.
231 * 239 *
@@ -333,6 +341,7 @@ static const struct ata_port_operations artop6210_ops = {
333 .thaw = ata_bmdma_thaw, 341 .thaw = ata_bmdma_thaw,
334 .error_handler = artop6210_error_handler, 342 .error_handler = artop6210_error_handler,
335 .post_internal_cmd = ata_bmdma_post_internal_cmd, 343 .post_internal_cmd = ata_bmdma_post_internal_cmd,
344 .cable_detect = ata_cable_40wire,
336 345
337 .bmdma_setup = ata_bmdma_setup, 346 .bmdma_setup = ata_bmdma_setup,
338 .bmdma_start = ata_bmdma_start, 347 .bmdma_start = ata_bmdma_start,
@@ -366,6 +375,7 @@ static const struct ata_port_operations artop6260_ops = {
366 .thaw = ata_bmdma_thaw, 375 .thaw = ata_bmdma_thaw,
367 .error_handler = artop6260_error_handler, 376 .error_handler = artop6260_error_handler,
368 .post_internal_cmd = ata_bmdma_post_internal_cmd, 377 .post_internal_cmd = ata_bmdma_post_internal_cmd,
378 .cable_detect = artop6260_cable_detect,
369 379
370 .bmdma_setup = ata_bmdma_setup, 380 .bmdma_setup = ata_bmdma_setup,
371 .bmdma_start = ata_bmdma_start, 381 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c
index 51d9923be02e..39c871a3ddac 100644
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -22,7 +22,7 @@
22#include <linux/libata.h> 22#include <linux/libata.h>
23 23
24#define DRV_NAME "pata_atiixp" 24#define DRV_NAME "pata_atiixp"
25#define DRV_VERSION "0.4.4" 25#define DRV_VERSION "0.4.5"
26 26
27enum { 27enum {
28 ATIIXP_IDE_PIO_TIMING = 0x40, 28 ATIIXP_IDE_PIO_TIMING = 0x40,
@@ -35,23 +35,15 @@ enum {
35 35
36static int atiixp_pre_reset(struct ata_port *ap) 36static int atiixp_pre_reset(struct ata_port *ap)
37{ 37{
38 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
39 static const struct pci_bits atiixp_enable_bits[] = { 38 static const struct pci_bits atiixp_enable_bits[] = {
40 { 0x48, 1, 0x01, 0x00 }, 39 { 0x48, 1, 0x01, 0x00 },
41 { 0x48, 1, 0x08, 0x00 } 40 { 0x48, 1, 0x08, 0x00 }
42 }; 41 };
43 u8 udma; 42 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
44 43
45 if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no])) 44 if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no]))
46 return -ENOENT; 45 return -ENOENT;
47 46
48 /* Hack from drivers/ide/pci. Really we want to know how to do the
49 raw detection not play follow the bios mode guess */
50 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
51 if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40)
52 ap->cbl = ATA_CBL_PATA80;
53 else
54 ap->cbl = ATA_CBL_PATA40;
55 return ata_std_prereset(ap); 47 return ata_std_prereset(ap);
56} 48}
57 49
@@ -60,6 +52,19 @@ static void atiixp_error_handler(struct ata_port *ap)
60 ata_bmdma_drive_eh(ap, atiixp_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 52 ata_bmdma_drive_eh(ap, atiixp_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
61} 53}
62 54
55static int atiixp_cable_detect(struct ata_port *ap)
56{
57 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
58 u8 udma;
59
60 /* Hack from drivers/ide/pci. Really we want to know how to do the
61 raw detection not play follow the bios mode guess */
62 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
63 if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40)
64 return ATA_CBL_PATA80;
65 return ATA_CBL_PATA40;
66}
67
63/** 68/**
64 * atiixp_set_pio_timing - set initial PIO mode data 69 * atiixp_set_pio_timing - set initial PIO mode data
65 * @ap: ATA interface 70 * @ap: ATA interface
@@ -245,6 +250,7 @@ static struct ata_port_operations atiixp_port_ops = {
245 .thaw = ata_bmdma_thaw, 250 .thaw = ata_bmdma_thaw,
246 .error_handler = atiixp_error_handler, 251 .error_handler = atiixp_error_handler,
247 .post_internal_cmd = ata_bmdma_post_internal_cmd, 252 .post_internal_cmd = ata_bmdma_post_internal_cmd,
253 .cable_detect = atiixp_cable_detect,
248 254
249 .bmdma_setup = ata_bmdma_setup, 255 .bmdma_setup = ata_bmdma_setup,
250 .bmdma_start = atiixp_bmdma_start, 256 .bmdma_start = atiixp_bmdma_start,
diff --git a/drivers/ata/pata_cmd640.c b/drivers/ata/pata_cmd640.c
new file mode 100644
index 000000000000..2105985a8013
--- /dev/null
+++ b/drivers/ata/pata_cmd640.c
@@ -0,0 +1,312 @@
1/*
2 * pata_cmd640.c - CMD640 PCI PATA for new ATA layer
3 * (C) 2007 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * Based upon
7 * linux/drivers/ide/pci/cmd640.c Version 1.02 Sep 01, 1996
8 *
9 * Copyright (C) 1995-1996 Linus Torvalds & authors (see driver)
10 *
11 * This drives only the PCI version of the controller. If you have a
12 * VLB one then we have enough docs to support it but you can write
13 * your own code.
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19#include <linux/init.h>
20#include <linux/blkdev.h>
21#include <linux/delay.h>
22#include <scsi/scsi_host.h>
23#include <linux/libata.h>
24
25#define DRV_NAME "pata_cmd640"
26#define DRV_VERSION "0.0.5"
27
28struct cmd640_reg {
29 int last;
30 u8 reg58[ATA_MAX_DEVICES];
31};
32
33enum {
34 CFR = 0x50,
35 CNTRL = 0x51,
36 CMDTIM = 0x52,
37 ARTIM0 = 0x53,
38 DRWTIM0 = 0x54,
39 ARTIM23 = 0x57,
40 DRWTIM23 = 0x58,
41 BRST = 0x59
42};
43
44/**
45 * cmd640_set_piomode - set initial PIO mode data
46 * @ap: ATA port
47 * @adev: ATA device
48 *
49 * Called to do the PIO mode setup.
50 */
51
52static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
53{
54 struct cmd640_reg *timing = ap->private_data;
55 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
56 struct ata_timing t;
57 const unsigned long T = 1000000 / 33;
58 const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
59 u8 reg;
60 int arttim = ARTIM0 + 2 * adev->devno;
61 struct ata_device *pair = ata_dev_pair(adev);
62
63 if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
64 printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
65 return;
66 }
67
68 /* The second channel has shared timings and the setup timing is
69 messy to switch to merge it for worst case */
70 if (ap->port_no && pair) {
71 struct ata_timing p;
72 ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
73 ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
74 }
75
76 /* Make the timings fit */
77 if (t.recover > 16) {
78 t.active += t.recover - 16;
79 t.recover = 16;
80 }
81 if (t.active > 16)
82 t.active = 16;
83
84 /* Now convert the clocks into values we can actually stuff into
85 the chip */
86
87 if (t.recover > 1)
88 t.recover--; /* 640B only */
89 else
90 t.recover = 15;
91
92 if (t.setup > 4)
93 t.setup = 0xC0;
94 else
95 t.setup = setup_data[t.setup];
96
97 if (ap->port_no == 0) {
98 t.active &= 0x0F; /* 0 = 16 */
99
100 /* Load setup timing */
101 pci_read_config_byte(pdev, arttim, &reg);
102 reg &= 0x3F;
103 reg |= t.setup;
104 pci_write_config_byte(pdev, arttim, reg);
105
106 /* Load active/recovery */
107 pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
108 } else {
109 /* Save the shared timings for channel, they will be loaded
110 by qc_issue_prot. Reloading the setup time is expensive
111 so we keep a merged one loaded */
112 pci_read_config_byte(pdev, ARTIM23, &reg);
113 reg &= 0x3F;
114 reg |= t.setup;
115 pci_write_config_byte(pdev, ARTIM23, reg);
116 timing->reg58[adev->devno] = (t.active << 4) | t.recover;
117 }
118}
119
120
121/**
122 * cmd640_qc_issue_prot - command preparation hook
123 * @qc: Command to be issued
124 *
125 * Channel 1 has shared timings. We must reprogram the
126 * clock each drive 2/3 switch we do.
127 */
128
129static unsigned int cmd640_qc_issue_prot(struct ata_queued_cmd *qc)
130{
131 struct ata_port *ap = qc->ap;
132 struct ata_device *adev = qc->dev;
133 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
134 struct cmd640_reg *timing = ap->private_data;
135
136 if (ap->port_no != 0 && adev->devno != timing->last) {
137 pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
138 timing->last = adev->devno;
139 }
140 return ata_qc_issue_prot(qc);
141}
142
143/**
144 * cmd640_port_start - port setup
145 * @ap: ATA port being set up
146 *
147 * The CMD640 needs to maintain private data structures so we
148 * allocate space here.
149 */
150
151static int cmd640_port_start(struct ata_port *ap)
152{
153 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
154 struct cmd640_reg *timing;
155
156 int ret = ata_port_start(ap);
157 if (ret < 0)
158 return ret;
159
160 timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
161 if (timing == NULL)
162 return -ENOMEM;
163 timing->last = -1; /* Force a load */
164 ap->private_data = timing;
165 return ret;
166}
167
168static struct scsi_host_template cmd640_sht = {
169 .module = THIS_MODULE,
170 .name = DRV_NAME,
171 .ioctl = ata_scsi_ioctl,
172 .queuecommand = ata_scsi_queuecmd,
173 .can_queue = ATA_DEF_QUEUE,
174 .this_id = ATA_SHT_THIS_ID,
175 .sg_tablesize = LIBATA_MAX_PRD,
176 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
177 .emulated = ATA_SHT_EMULATED,
178 .use_clustering = ATA_SHT_USE_CLUSTERING,
179 .proc_name = DRV_NAME,
180 .dma_boundary = ATA_DMA_BOUNDARY,
181 .slave_configure = ata_scsi_slave_config,
182 .slave_destroy = ata_scsi_slave_destroy,
183 .bios_param = ata_std_bios_param,
184#ifdef CONFIG_PM
185 .resume = ata_scsi_device_resume,
186 .suspend = ata_scsi_device_suspend,
187#endif
188};
189
190static struct ata_port_operations cmd640_port_ops = {
191 .port_disable = ata_port_disable,
192 .set_piomode = cmd640_set_piomode,
193 .mode_filter = ata_pci_default_filter,
194 .tf_load = ata_tf_load,
195 .tf_read = ata_tf_read,
196 .check_status = ata_check_status,
197 .exec_command = ata_exec_command,
198 .dev_select = ata_std_dev_select,
199
200 .freeze = ata_bmdma_freeze,
201 .thaw = ata_bmdma_thaw,
202 .error_handler = ata_bmdma_error_handler,
203 .post_internal_cmd = ata_bmdma_post_internal_cmd,
204 .cable_detect = ata_cable_40wire,
205
206 .bmdma_setup = ata_bmdma_setup,
207 .bmdma_start = ata_bmdma_start,
208 .bmdma_stop = ata_bmdma_stop,
209 .bmdma_status = ata_bmdma_status,
210
211 .qc_prep = ata_qc_prep,
212 .qc_issue = cmd640_qc_issue_prot,
213
214 /* In theory this is not needed once we kill the prefetcher */
215 .data_xfer = ata_data_xfer_noirq,
216
217 .irq_handler = ata_interrupt,
218 .irq_clear = ata_bmdma_irq_clear,
219 .irq_on = ata_irq_on,
220 .irq_ack = ata_irq_ack,
221
222 .port_start = cmd640_port_start,
223};
224
225static void cmd640_hardware_init(struct pci_dev *pdev)
226{
227 u8 r;
228 u8 ctrl;
229
230 /* CMD640 detected, commiserations */
231 pci_write_config_byte(pdev, 0x5B, 0x00);
232 /* Get version info */
233 pci_read_config_byte(pdev, CFR, &r);
234 /* PIO0 command cycles */
235 pci_write_config_byte(pdev, CMDTIM, 0);
236 /* 512 byte bursts (sector) */
237 pci_write_config_byte(pdev, BRST, 0x40);
238 /*
239 * A reporter a long time ago
240 * Had problems with the data fifo
241 * So don't run the risk
242 * Of putting crap on the disk
243 * For its better just to go slow
244 */
245 /* Do channel 0 */
246 pci_read_config_byte(pdev, CNTRL, &ctrl);
247 pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0);
248 /* Ditto for channel 1 */
249 pci_read_config_byte(pdev, ARTIM23, &ctrl);
250 ctrl |= 0x0C;
251 pci_write_config_byte(pdev, ARTIM23, ctrl);
252}
253
254static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
255{
256 static struct ata_port_info info = {
257 .sht = &cmd640_sht,
258 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
259 .pio_mask = 0x1f,
260 .port_ops = &cmd640_port_ops
261 };
262
263 static struct ata_port_info *port_info[2] = { &info, &info };
264
265 cmd640_hardware_init(pdev);
266 return ata_pci_init_one(pdev, port_info, 2);
267}
268
269static int cmd640_reinit_one(struct pci_dev *pdev)
270{
271 cmd640_hardware_init(pdev);
272#ifdef CONFIG_PM
273 return ata_pci_device_resume(pdev);
274#else
275 return 0;
276#endif
277}
278
279static const struct pci_device_id cmd640[] = {
280 { PCI_VDEVICE(CMD, 0x640), 0 },
281 { },
282};
283
284static struct pci_driver cmd640_pci_driver = {
285 .name = DRV_NAME,
286 .id_table = cmd640,
287 .probe = cmd640_init_one,
288 .remove = ata_pci_remove_one,
289#ifdef CONFIG_PM
290 .suspend = ata_pci_device_suspend,
291#endif
292 .resume = cmd640_reinit_one,
293};
294
295static int __init cmd640_init(void)
296{
297 return pci_register_driver(&cmd640_pci_driver);
298}
299
300static void __exit cmd640_exit(void)
301{
302 pci_unregister_driver(&cmd640_pci_driver);
303}
304
305MODULE_AUTHOR("Alan Cox");
306MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
307MODULE_LICENSE("GPL");
308MODULE_DEVICE_TABLE(pci, cmd640);
309MODULE_VERSION(DRV_VERSION);
310
311module_init(cmd640_init);
312module_exit(cmd640_exit);
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c
index 5b13bdd1edc0..3989cc577fcd 100644
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -75,13 +75,7 @@ enum {
75 DTPR1 = 0x7C 75 DTPR1 = 0x7C
76}; 76};
77 77
78static int cmd64x_pre_reset(struct ata_port *ap) 78static int cmd648_cable_detect(struct ata_port *ap)
79{
80 ap->cbl = ATA_CBL_PATA40;
81 return ata_std_prereset(ap);
82}
83
84static int cmd648_pre_reset(struct ata_port *ap)
85{ 79{
86 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 80 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
87 u8 r; 81 u8 r;
@@ -89,21 +83,8 @@ static int cmd648_pre_reset(struct ata_port *ap)
89 /* Check cable detect bits */ 83 /* Check cable detect bits */
90 pci_read_config_byte(pdev, BMIDECSR, &r); 84 pci_read_config_byte(pdev, BMIDECSR, &r);
91 if (r & (1 << ap->port_no)) 85 if (r & (1 << ap->port_no))
92 ap->cbl = ATA_CBL_PATA80; 86 return ATA_CBL_PATA80;
93 else 87 return ATA_CBL_PATA40;
94 ap->cbl = ATA_CBL_PATA40;
95
96 return ata_std_prereset(ap);
97}
98
99static void cmd64x_error_handler(struct ata_port *ap)
100{
101 return ata_bmdma_drive_eh(ap, cmd64x_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
102}
103
104static void cmd648_error_handler(struct ata_port *ap)
105{
106 ata_bmdma_drive_eh(ap, cmd648_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
107} 88}
108 89
109/** 90/**
@@ -304,8 +285,9 @@ static struct ata_port_operations cmd64x_port_ops = {
304 285
305 .freeze = ata_bmdma_freeze, 286 .freeze = ata_bmdma_freeze,
306 .thaw = ata_bmdma_thaw, 287 .thaw = ata_bmdma_thaw,
307 .error_handler = cmd64x_error_handler, 288 .error_handler = ata_bmdma_error_handler,
308 .post_internal_cmd = ata_bmdma_post_internal_cmd, 289 .post_internal_cmd = ata_bmdma_post_internal_cmd,
290 .cable_detect = ata_cable_40wire,
309 291
310 .bmdma_setup = ata_bmdma_setup, 292 .bmdma_setup = ata_bmdma_setup,
311 .bmdma_start = ata_bmdma_start, 293 .bmdma_start = ata_bmdma_start,
@@ -338,8 +320,9 @@ static struct ata_port_operations cmd646r1_port_ops = {
338 320
339 .freeze = ata_bmdma_freeze, 321 .freeze = ata_bmdma_freeze,
340 .thaw = ata_bmdma_thaw, 322 .thaw = ata_bmdma_thaw,
341 .error_handler = cmd64x_error_handler, 323 .error_handler = ata_bmdma_error_handler,
342 .post_internal_cmd = ata_bmdma_post_internal_cmd, 324 .post_internal_cmd = ata_bmdma_post_internal_cmd,
325 .cable_detect = ata_cable_40wire,
343 326
344 .bmdma_setup = ata_bmdma_setup, 327 .bmdma_setup = ata_bmdma_setup,
345 .bmdma_start = ata_bmdma_start, 328 .bmdma_start = ata_bmdma_start,
@@ -372,8 +355,9 @@ static struct ata_port_operations cmd648_port_ops = {
372 355
373 .freeze = ata_bmdma_freeze, 356 .freeze = ata_bmdma_freeze,
374 .thaw = ata_bmdma_thaw, 357 .thaw = ata_bmdma_thaw,
375 .error_handler = cmd648_error_handler, 358 .error_handler = ata_bmdma_error_handler,
376 .post_internal_cmd = ata_bmdma_post_internal_cmd, 359 .post_internal_cmd = ata_bmdma_post_internal_cmd,
360 .cable_detect = cmd648_cable_detect,
377 361
378 .bmdma_setup = ata_bmdma_setup, 362 .bmdma_setup = ata_bmdma_setup,
379 .bmdma_start = ata_bmdma_start, 363 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_cs5520.c b/drivers/ata/pata_cs5520.c
index 55cc293e7487..79bef0d1fad3 100644
--- a/drivers/ata/pata_cs5520.c
+++ b/drivers/ata/pata_cs5520.c
@@ -139,18 +139,6 @@ static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev)
139 cs5520_set_timings(ap, adev, adev->pio_mode); 139 cs5520_set_timings(ap, adev, adev->pio_mode);
140} 140}
141 141
142
143static int cs5520_pre_reset(struct ata_port *ap)
144{
145 ap->cbl = ATA_CBL_PATA40;
146 return ata_std_prereset(ap);
147}
148
149static void cs5520_error_handler(struct ata_port *ap)
150{
151 return ata_bmdma_drive_eh(ap, cs5520_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
152}
153
154static struct scsi_host_template cs5520_sht = { 142static struct scsi_host_template cs5520_sht = {
155 .module = THIS_MODULE, 143 .module = THIS_MODULE,
156 .name = DRV_NAME, 144 .name = DRV_NAME,
@@ -186,8 +174,9 @@ static struct ata_port_operations cs5520_port_ops = {
186 174
187 .freeze = ata_bmdma_freeze, 175 .freeze = ata_bmdma_freeze,
188 .thaw = ata_bmdma_thaw, 176 .thaw = ata_bmdma_thaw,
189 .error_handler = cs5520_error_handler, 177 .error_handler = ata_bmdma_error_handler,
190 .post_internal_cmd = ata_bmdma_post_internal_cmd, 178 .post_internal_cmd = ata_bmdma_post_internal_cmd,
179 .cable_detect = ata_cable_40wire,
191 180
192 .bmdma_setup = ata_bmdma_setup, 181 .bmdma_setup = ata_bmdma_setup,
193 .bmdma_start = ata_bmdma_start, 182 .bmdma_start = ata_bmdma_start,
@@ -197,7 +186,6 @@ static struct ata_port_operations cs5520_port_ops = {
197 .qc_issue = ata_qc_issue_prot, 186 .qc_issue = ata_qc_issue_prot,
198 .data_xfer = ata_data_xfer, 187 .data_xfer = ata_data_xfer,
199 188
200 .irq_handler = ata_interrupt,
201 .irq_clear = ata_bmdma_irq_clear, 189 .irq_clear = ata_bmdma_irq_clear,
202 .irq_on = ata_irq_on, 190 .irq_on = ata_irq_on,
203 .irq_ack = ata_irq_ack, 191 .irq_ack = ata_irq_ack,
@@ -205,91 +193,104 @@ static struct ata_port_operations cs5520_port_ops = {
205 .port_start = ata_port_start, 193 .port_start = ata_port_start,
206}; 194};
207 195
208static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id) 196static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
209{ 197{
198 struct ata_port_info pi = {
199 .flags = ATA_FLAG_SLAVE_POSS,
200 .pio_mask = 0x1f,
201 .port_ops = &cs5520_port_ops,
202 };
203 const struct ata_port_info *ppi[2];
210 u8 pcicfg; 204 u8 pcicfg;
211 void __iomem *iomap[5]; 205 void *iomap[5];
212 static struct ata_probe_ent probe[2]; 206 struct ata_host *host;
213 int ports = 0; 207 struct ata_ioports *ioaddr;
208 int i, rc;
214 209
215 /* IDE port enable bits */ 210 /* IDE port enable bits */
216 pci_read_config_byte(dev, 0x60, &pcicfg); 211 pci_read_config_byte(pdev, 0x60, &pcicfg);
217 212
218 /* Check if the ATA ports are enabled */ 213 /* Check if the ATA ports are enabled */
219 if ((pcicfg & 3) == 0) 214 if ((pcicfg & 3) == 0)
220 return -ENODEV; 215 return -ENODEV;
221 216
217 ppi[0] = ppi[1] = &ata_dummy_port_info;
218 if (pcicfg & 1)
219 ppi[0] = &pi;
220 if (pcicfg & 2)
221 ppi[1] = &pi;
222
222 if ((pcicfg & 0x40) == 0) { 223 if ((pcicfg & 0x40) == 0) {
223 printk(KERN_WARNING DRV_NAME ": DMA mode disabled. Enabling.\n"); 224 dev_printk(KERN_WARNING, &pdev->dev,
224 pci_write_config_byte(dev, 0x60, pcicfg | 0x40); 225 "DMA mode disabled. Enabling.\n");
226 pci_write_config_byte(pdev, 0x60, pcicfg | 0x40);
225 } 227 }
226 228
229 pi.mwdma_mask = id->driver_data;
230
231 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
232 if (!host)
233 return -ENOMEM;
234
227 /* Perform set up for DMA */ 235 /* Perform set up for DMA */
228 if (pci_enable_device_bars(dev, 1<<2)) { 236 if (pci_enable_device_bars(pdev, 1<<2)) {
229 printk(KERN_ERR DRV_NAME ": unable to configure BAR2.\n"); 237 printk(KERN_ERR DRV_NAME ": unable to configure BAR2.\n");
230 return -ENODEV; 238 return -ENODEV;
231 } 239 }
232 pci_set_master(dev); 240
233 if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) { 241 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
234 printk(KERN_ERR DRV_NAME ": unable to configure DMA mask.\n"); 242 printk(KERN_ERR DRV_NAME ": unable to configure DMA mask.\n");
235 return -ENODEV; 243 return -ENODEV;
236 } 244 }
237 if (pci_set_consistent_dma_mask(dev, DMA_32BIT_MASK)) { 245 if (pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
238 printk(KERN_ERR DRV_NAME ": unable to configure consistent DMA mask.\n"); 246 printk(KERN_ERR DRV_NAME ": unable to configure consistent DMA mask.\n");
239 return -ENODEV; 247 return -ENODEV;
240 } 248 }
241 249
242 /* Map IO ports */ 250 /* Map IO ports and initialize host accordingly */
243 iomap[0] = devm_ioport_map(&dev->dev, 0x1F0, 8); 251 iomap[0] = devm_ioport_map(&pdev->dev, 0x1F0, 8);
244 iomap[1] = devm_ioport_map(&dev->dev, 0x3F6, 1); 252 iomap[1] = devm_ioport_map(&pdev->dev, 0x3F6, 1);
245 iomap[2] = devm_ioport_map(&dev->dev, 0x170, 8); 253 iomap[2] = devm_ioport_map(&pdev->dev, 0x170, 8);
246 iomap[3] = devm_ioport_map(&dev->dev, 0x376, 1); 254 iomap[3] = devm_ioport_map(&pdev->dev, 0x376, 1);
247 iomap[4] = pcim_iomap(dev, 2, 0); 255 iomap[4] = pcim_iomap(pdev, 2, 0);
248 256
249 if (!iomap[0] || !iomap[1] || !iomap[2] || !iomap[3] || !iomap[4]) 257 if (!iomap[0] || !iomap[1] || !iomap[2] || !iomap[3] || !iomap[4])
250 return -ENOMEM; 258 return -ENOMEM;
251 259
252 /* We have to do our own plumbing as the PCI setup for this 260 ioaddr = &host->ports[0]->ioaddr;
253 chipset is non-standard so we can't punt to the libata code */ 261 ioaddr->cmd_addr = iomap[0];
254 262 ioaddr->ctl_addr = iomap[1];
255 INIT_LIST_HEAD(&probe[0].node); 263 ioaddr->altstatus_addr = iomap[1];
256 probe[0].dev = pci_dev_to_dev(dev); 264 ioaddr->bmdma_addr = iomap[4];
257 probe[0].port_ops = &cs5520_port_ops; 265 ata_std_ports(ioaddr);
258 probe[0].sht = &cs5520_sht; 266
259 probe[0].pio_mask = 0x1F; 267 ioaddr = &host->ports[1]->ioaddr;
260 probe[0].mwdma_mask = id->driver_data; 268 ioaddr->cmd_addr = iomap[2];
261 probe[0].irq = 14; 269 ioaddr->ctl_addr = iomap[3];
262 probe[0].irq_flags = 0; 270 ioaddr->altstatus_addr = iomap[3];
263 probe[0].port_flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST; 271 ioaddr->bmdma_addr = iomap[4] + 8;
264 probe[0].n_ports = 1; 272 ata_std_ports(ioaddr);
265 probe[0].port[0].cmd_addr = iomap[0]; 273
266 probe[0].port[0].ctl_addr = iomap[1]; 274 /* activate the host */
267 probe[0].port[0].altstatus_addr = iomap[1]; 275 pci_set_master(pdev);
268 probe[0].port[0].bmdma_addr = iomap[4]; 276 rc = ata_host_start(host);
269 277 if (rc)
270 /* The secondary lurks at different addresses but is otherwise 278 return rc;
271 the same beastie */ 279
272 280 for (i = 0; i < 2; i++) {
273 probe[1] = probe[0]; 281 static const int irq[] = { 14, 15 };
274 INIT_LIST_HEAD(&probe[1].node); 282 struct ata_port *ap = host->ports[0];
275 probe[1].irq = 15; 283
276 probe[1].port[0].cmd_addr = iomap[2]; 284 if (ata_port_is_dummy(ap))
277 probe[1].port[0].ctl_addr = iomap[3]; 285 continue;
278 probe[1].port[0].altstatus_addr = iomap[3]; 286
279 probe[1].port[0].bmdma_addr = iomap[4] + 8; 287 rc = devm_request_irq(&pdev->dev, irq[ap->port_no],
280 288 ata_interrupt, 0, DRV_NAME, host);
281 /* Let libata fill in the port details */ 289 if (rc)
282 ata_std_ports(&probe[0].port[0]); 290 return rc;
283 ata_std_ports(&probe[1].port[0]); 291 }
284 292
285 /* Now add the ports that are active */ 293 return ata_host_register(host, &cs5520_sht);
286 if (pcicfg & 1)
287 ports += ata_device_add(&probe[0]);
288 if (pcicfg & 2)
289 ports += ata_device_add(&probe[1]);
290 if (ports)
291 return 0;
292 return -ENODEV;
293} 294}
294 295
295/** 296/**
diff --git a/drivers/ata/pata_cs5530.c b/drivers/ata/pata_cs5530.c
index db63e80e608b..29642d5ee189 100644
--- a/drivers/ata/pata_cs5530.c
+++ b/drivers/ata/pata_cs5530.c
@@ -160,18 +160,6 @@ static unsigned int cs5530_qc_issue_prot(struct ata_queued_cmd *qc)
160 return ata_qc_issue_prot(qc); 160 return ata_qc_issue_prot(qc);
161} 161}
162 162
163static int cs5530_pre_reset(struct ata_port *ap)
164{
165 ap->cbl = ATA_CBL_PATA40;
166 return ata_std_prereset(ap);
167}
168
169static void cs5530_error_handler(struct ata_port *ap)
170{
171 return ata_bmdma_drive_eh(ap, cs5530_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
172}
173
174
175static struct scsi_host_template cs5530_sht = { 163static struct scsi_host_template cs5530_sht = {
176 .module = THIS_MODULE, 164 .module = THIS_MODULE,
177 .name = DRV_NAME, 165 .name = DRV_NAME,
@@ -213,8 +201,9 @@ static struct ata_port_operations cs5530_port_ops = {
213 201
214 .freeze = ata_bmdma_freeze, 202 .freeze = ata_bmdma_freeze,
215 .thaw = ata_bmdma_thaw, 203 .thaw = ata_bmdma_thaw,
216 .error_handler = cs5530_error_handler, 204 .error_handler = ata_bmdma_error_handler,
217 .post_internal_cmd = ata_bmdma_post_internal_cmd, 205 .post_internal_cmd = ata_bmdma_post_internal_cmd,
206 .cable_detect = ata_cable_40wire,
218 207
219 .qc_prep = ata_qc_prep, 208 .qc_prep = ata_qc_prep,
220 .qc_issue = cs5530_qc_issue_prot, 209 .qc_issue = cs5530_qc_issue_prot,
diff --git a/drivers/ata/pata_cs5535.c b/drivers/ata/pata_cs5535.c
index 1572e5c9031a..08cccc9c659b 100644
--- a/drivers/ata/pata_cs5535.c
+++ b/drivers/ata/pata_cs5535.c
@@ -70,36 +70,23 @@
70#define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL)==0x00009172 ) 70#define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL)==0x00009172 )
71 71
72/** 72/**
73 * cs5535_pre_reset - detect cable type 73 * cs5535_cable_detect - detect cable type
74 * @ap: Port to detect on 74 * @ap: Port to detect on
75 * 75 *
76 * Perform cable detection for ATA66 capable cable. Return a libata 76 * Perform cable detection for ATA66 capable cable. Return a libata
77 * cable type. 77 * cable type.
78 */ 78 */
79 79
80static int cs5535_pre_reset(struct ata_port *ap) 80static int cs5535_cable_detect(struct ata_port *ap)
81{ 81{
82 u8 cable; 82 u8 cable;
83 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 83 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
84 84
85 pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable); 85 pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable);
86 if (cable & 1) 86 if (cable & 1)
87 ap->cbl = ATA_CBL_PATA80; 87 return ATA_CBL_PATA80;
88 else 88 else
89 ap->cbl = ATA_CBL_PATA40; 89 return ATA_CBL_PATA40;
90 return ata_std_prereset(ap);
91}
92
93/**
94 * cs5535_error_handler - reset/probe
95 * @ap: Port to reset
96 *
97 * Reset and configure a port
98 */
99
100static void cs5535_error_handler(struct ata_port *ap)
101{
102 ata_bmdma_drive_eh(ap, cs5535_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
103} 90}
104 91
105/** 92/**
@@ -205,8 +192,9 @@ static struct ata_port_operations cs5535_port_ops = {
205 192
206 .freeze = ata_bmdma_freeze, 193 .freeze = ata_bmdma_freeze,
207 .thaw = ata_bmdma_thaw, 194 .thaw = ata_bmdma_thaw,
208 .error_handler = cs5535_error_handler, 195 .error_handler = ata_bmdma_error_handler,
209 .post_internal_cmd = ata_bmdma_post_internal_cmd, 196 .post_internal_cmd = ata_bmdma_post_internal_cmd,
197 .cable_detect = cs5535_cable_detect,
210 198
211 .bmdma_setup = ata_bmdma_setup, 199 .bmdma_setup = ata_bmdma_setup,
212 .bmdma_start = ata_bmdma_start, 200 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_cypress.c b/drivers/ata/pata_cypress.c
index f69dde5f7066..6ec049c3b1dc 100644
--- a/drivers/ata/pata_cypress.c
+++ b/drivers/ata/pata_cypress.c
@@ -41,17 +41,6 @@ enum {
41 CY82_INDEX_TIMEOUT = 0x32 41 CY82_INDEX_TIMEOUT = 0x32
42}; 42};
43 43
44static int cy82c693_pre_reset(struct ata_port *ap)
45{
46 ap->cbl = ATA_CBL_PATA40;
47 return ata_std_prereset(ap);
48}
49
50static void cy82c693_error_handler(struct ata_port *ap)
51{
52 ata_bmdma_drive_eh(ap, cy82c693_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
53}
54
55/** 44/**
56 * cy82c693_set_piomode - set initial PIO mode data 45 * cy82c693_set_piomode - set initial PIO mode data
57 * @ap: ATA interface 46 * @ap: ATA interface
@@ -156,8 +145,9 @@ static struct ata_port_operations cy82c693_port_ops = {
156 145
157 .freeze = ata_bmdma_freeze, 146 .freeze = ata_bmdma_freeze,
158 .thaw = ata_bmdma_thaw, 147 .thaw = ata_bmdma_thaw,
159 .error_handler = cy82c693_error_handler, 148 .error_handler = ata_bmdma_error_handler,
160 .post_internal_cmd = ata_bmdma_post_internal_cmd, 149 .post_internal_cmd = ata_bmdma_post_internal_cmd,
150 .cable_detect = ata_cable_40wire,
161 151
162 .bmdma_setup = ata_bmdma_setup, 152 .bmdma_setup = ata_bmdma_setup,
163 .bmdma_start = ata_bmdma_start, 153 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_efar.c b/drivers/ata/pata_efar.c
index dac7a6554f6c..a3216850bba1 100644
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -22,10 +22,10 @@
22#include <linux/ata.h> 22#include <linux/ata.h>
23 23
24#define DRV_NAME "pata_efar" 24#define DRV_NAME "pata_efar"
25#define DRV_VERSION "0.4.3" 25#define DRV_VERSION "0.4.4"
26 26
27/** 27/**
28 * efar_pre_reset - check for 40/80 pin 28 * efar_pre_reset - Enable bits
29 * @ap: Port 29 * @ap: Port
30 * 30 *
31 * Perform cable detection for the EFAR ATA interface. This is 31 * Perform cable detection for the EFAR ATA interface. This is
@@ -38,18 +38,11 @@ static int efar_pre_reset(struct ata_port *ap)
38 { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */ 38 { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */
39 { 0x43U, 1U, 0x80UL, 0x80UL }, /* port 1 */ 39 { 0x43U, 1U, 0x80UL, 0x80UL }, /* port 1 */
40 }; 40 };
41
42 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 41 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
43 u8 tmp;
44 42
45 if (!pci_test_config_bits(pdev, &efar_enable_bits[ap->port_no])) 43 if (!pci_test_config_bits(pdev, &efar_enable_bits[ap->port_no]))
46 return -ENOENT; 44 return -ENOENT;
47 45
48 pci_read_config_byte(pdev, 0x47, &tmp);
49 if (tmp & (2 >> ap->port_no))
50 ap->cbl = ATA_CBL_PATA40;
51 else
52 ap->cbl = ATA_CBL_PATA80;
53 return ata_std_prereset(ap); 46 return ata_std_prereset(ap);
54} 47}
55 48
@@ -67,6 +60,25 @@ static void efar_error_handler(struct ata_port *ap)
67} 60}
68 61
69/** 62/**
63 * efar_cable_detect - check for 40/80 pin
64 * @ap: Port
65 *
66 * Perform cable detection for the EFAR ATA interface. This is
67 * different to the PIIX arrangement
68 */
69
70static int efar_cable_detect(struct ata_port *ap)
71{
72 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
73 u8 tmp;
74
75 pci_read_config_byte(pdev, 0x47, &tmp);
76 if (tmp & (2 >> ap->port_no))
77 return ATA_CBL_PATA40;
78 return ATA_CBL_PATA80;
79}
80
81/**
70 * efar_set_piomode - Initialize host controller PATA PIO timings 82 * efar_set_piomode - Initialize host controller PATA PIO timings
71 * @ap: Port whose timings we are configuring 83 * @ap: Port whose timings we are configuring
72 * @adev: um 84 * @adev: um
@@ -256,6 +268,7 @@ static const struct ata_port_operations efar_ops = {
256 .thaw = ata_bmdma_thaw, 268 .thaw = ata_bmdma_thaw,
257 .error_handler = efar_error_handler, 269 .error_handler = efar_error_handler,
258 .post_internal_cmd = ata_bmdma_post_internal_cmd, 270 .post_internal_cmd = ata_bmdma_post_internal_cmd,
271 .cable_detect = efar_cable_detect,
259 272
260 .bmdma_setup = ata_bmdma_setup, 273 .bmdma_setup = ata_bmdma_setup,
261 .bmdma_start = ata_bmdma_start, 274 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c
index baf35f876030..93cfa6d300a5 100644
--- a/drivers/ata/pata_hpt366.c
+++ b/drivers/ata/pata_hpt366.c
@@ -27,7 +27,7 @@
27#include <linux/libata.h> 27#include <linux/libata.h>
28 28
29#define DRV_NAME "pata_hpt366" 29#define DRV_NAME "pata_hpt366"
30#define DRV_VERSION "0.6.0" 30#define DRV_VERSION "0.6.1"
31 31
32struct hpt_clock { 32struct hpt_clock {
33 u8 xfer_speed; 33 u8 xfer_speed;
@@ -169,13 +169,12 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr, cons
169 169
170/** 170/**
171 * hpt366_filter - mode selection filter 171 * hpt366_filter - mode selection filter
172 * @ap: ATA interface
173 * @adev: ATA device 172 * @adev: ATA device
174 * 173 *
175 * Block UDMA on devices that cause trouble with this controller. 174 * Block UDMA on devices that cause trouble with this controller.
176 */ 175 */
177 176
178static unsigned long hpt366_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) 177static unsigned long hpt366_filter(struct ata_device *adev, unsigned long mask)
179{ 178{
180 if (adev->class == ATA_DEV_ATA) { 179 if (adev->class == ATA_DEV_ATA) {
181 if (hpt_dma_blacklisted(adev, "UDMA", bad_ata33)) 180 if (hpt_dma_blacklisted(adev, "UDMA", bad_ata33))
@@ -185,7 +184,7 @@ static unsigned long hpt366_filter(const struct ata_port *ap, struct ata_device
185 if (hpt_dma_blacklisted(adev, "UDMA4", bad_ata66_4)) 184 if (hpt_dma_blacklisted(adev, "UDMA4", bad_ata66_4))
186 mask &= ~(0x0F << ATA_SHIFT_UDMA); 185 mask &= ~(0x0F << ATA_SHIFT_UDMA);
187 } 186 }
188 return ata_pci_default_filter(ap, adev, mask); 187 return ata_pci_default_filter(adev, mask);
189} 188}
190 189
191/** 190/**
@@ -210,24 +209,28 @@ static u32 hpt36x_find_mode(struct ata_port *ap, int speed)
210 return 0xffffffffU; /* silence compiler warning */ 209 return 0xffffffffU; /* silence compiler warning */
211} 210}
212 211
212static int hpt36x_cable_detect(struct ata_port *ap)
213{
214 u8 ata66;
215 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
216
217 pci_read_config_byte(pdev, 0x5A, &ata66);
218 if (ata66 & (1 << ap->port_no))
219 return ATA_CBL_PATA40;
220 return ATA_CBL_PATA80;
221}
222
213static int hpt36x_pre_reset(struct ata_port *ap) 223static int hpt36x_pre_reset(struct ata_port *ap)
214{ 224{
215 static const struct pci_bits hpt36x_enable_bits[] = { 225 static const struct pci_bits hpt36x_enable_bits[] = {
216 { 0x50, 1, 0x04, 0x04 }, 226 { 0x50, 1, 0x04, 0x04 },
217 { 0x54, 1, 0x04, 0x04 } 227 { 0x54, 1, 0x04, 0x04 }
218 }; 228 };
219
220 u8 ata66;
221 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 229 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
222 230
223 if (!pci_test_config_bits(pdev, &hpt36x_enable_bits[ap->port_no])) 231 if (!pci_test_config_bits(pdev, &hpt36x_enable_bits[ap->port_no]))
224 return -ENOENT; 232 return -ENOENT;
225 233
226 pci_read_config_byte(pdev, 0x5A, &ata66);
227 if (ata66 & (1 << ap->port_no))
228 ap->cbl = ATA_CBL_PATA40;
229 else
230 ap->cbl = ATA_CBL_PATA80;
231 return ata_std_prereset(ap); 234 return ata_std_prereset(ap);
232} 235}
233 236
@@ -354,6 +357,7 @@ static struct ata_port_operations hpt366_port_ops = {
354 .thaw = ata_bmdma_thaw, 357 .thaw = ata_bmdma_thaw,
355 .error_handler = hpt36x_error_handler, 358 .error_handler = hpt36x_error_handler,
356 .post_internal_cmd = ata_bmdma_post_internal_cmd, 359 .post_internal_cmd = ata_bmdma_post_internal_cmd,
360 .cable_detect = hpt36x_cable_detect,
357 361
358 .bmdma_setup = ata_bmdma_setup, 362 .bmdma_setup = ata_bmdma_setup,
359 .bmdma_start = ata_bmdma_start, 363 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index f331eeeafa0f..41d831296347 100644
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -8,6 +8,7 @@
8 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> 8 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
9 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 9 * Portions Copyright (C) 2001 Sun Microsystems, Inc.
10 * Portions Copyright (C) 2003 Red Hat Inc 10 * Portions Copyright (C) 2003 Red Hat Inc
11 * Portions Copyright (C) 2005-2006 MontaVista Software, Inc.
11 * 12 *
12 * TODO 13 * TODO
13 * PLL mode 14 * PLL mode
@@ -25,7 +26,7 @@
25#include <linux/libata.h> 26#include <linux/libata.h>
26 27
27#define DRV_NAME "pata_hpt37x" 28#define DRV_NAME "pata_hpt37x"
28#define DRV_VERSION "0.6.0" 29#define DRV_VERSION "0.6.5"
29 30
30struct hpt_clock { 31struct hpt_clock {
31 u8 xfer_speed; 32 u8 xfer_speed;
@@ -61,201 +62,75 @@ struct hpt_chip {
61 * 31 FIFO enable. 62 * 31 FIFO enable.
62 */ 63 */
63 64
64/* from highpoint documentation. these are old values */ 65static struct hpt_clock hpt37x_timings_33[] = {
65static const struct hpt_clock hpt370_timings_33[] = { 66 { XFER_UDMA_6, 0x12446231 }, /* 0x12646231 ?? */
66/* { XFER_UDMA_5, 0x1A85F442, 0x16454e31 }, */ 67 { XFER_UDMA_5, 0x12446231 },
67 { XFER_UDMA_5, 0x16454e31 }, 68 { XFER_UDMA_4, 0x12446231 },
68 { XFER_UDMA_4, 0x16454e31 }, 69 { XFER_UDMA_3, 0x126c6231 },
69 { XFER_UDMA_3, 0x166d4e31 }, 70 { XFER_UDMA_2, 0x12486231 },
70 { XFER_UDMA_2, 0x16494e31 }, 71 { XFER_UDMA_1, 0x124c6233 },
71 { XFER_UDMA_1, 0x164d4e31 }, 72 { XFER_UDMA_0, 0x12506297 },
72 { XFER_UDMA_0, 0x16514e31 }, 73
73 74 { XFER_MW_DMA_2, 0x22406c31 },
74 { XFER_MW_DMA_2, 0x26514e21 }, 75 { XFER_MW_DMA_1, 0x22406c33 },
75 { XFER_MW_DMA_1, 0x26514e33 }, 76 { XFER_MW_DMA_0, 0x22406c97 },
76 { XFER_MW_DMA_0, 0x26514e97 }, 77
77 78 { XFER_PIO_4, 0x06414e31 },
78 { XFER_PIO_4, 0x06514e21 }, 79 { XFER_PIO_3, 0x06414e42 },
79 { XFER_PIO_3, 0x06514e22 }, 80 { XFER_PIO_2, 0x06414e53 },
80 { XFER_PIO_2, 0x06514e33 }, 81 { XFER_PIO_1, 0x06814e93 },
81 { XFER_PIO_1, 0x06914e43 }, 82 { XFER_PIO_0, 0x06814ea7 }
82 { XFER_PIO_0, 0x06914e57 },
83 { 0, 0x06514e57 }
84}; 83};
85 84
86static const struct hpt_clock hpt370_timings_66[] = { 85static struct hpt_clock hpt37x_timings_50[] = {
87 { XFER_UDMA_5, 0x14846231 }, 86 { XFER_UDMA_6, 0x12848242 },
88 { XFER_UDMA_4, 0x14886231 }, 87 { XFER_UDMA_5, 0x12848242 },
89 { XFER_UDMA_3, 0x148c6231 }, 88 { XFER_UDMA_4, 0x12ac8242 },
90 { XFER_UDMA_2, 0x148c6231 }, 89 { XFER_UDMA_3, 0x128c8242 },
91 { XFER_UDMA_1, 0x14906231 }, 90 { XFER_UDMA_2, 0x120c8242 },
92 { XFER_UDMA_0, 0x14986231 }, 91 { XFER_UDMA_1, 0x12148254 },
93 92 { XFER_UDMA_0, 0x121882ea },
94 { XFER_MW_DMA_2, 0x26514e21 }, 93
95 { XFER_MW_DMA_1, 0x26514e33 }, 94 { XFER_MW_DMA_2, 0x22808242 },
96 { XFER_MW_DMA_0, 0x26514e97 }, 95 { XFER_MW_DMA_1, 0x22808254 },
97 96 { XFER_MW_DMA_0, 0x228082ea },
98 { XFER_PIO_4, 0x06514e21 }, 97
99 { XFER_PIO_3, 0x06514e22 }, 98 { XFER_PIO_4, 0x0a81f442 },
100 { XFER_PIO_2, 0x06514e33 }, 99 { XFER_PIO_3, 0x0a81f443 },
101 { XFER_PIO_1, 0x06914e43 }, 100 { XFER_PIO_2, 0x0a81f454 },
102 { XFER_PIO_0, 0x06914e57 }, 101 { XFER_PIO_1, 0x0ac1f465 },
103 { 0, 0x06514e57 } 102 { XFER_PIO_0, 0x0ac1f48a }
104}; 103};
105 104
106/* these are the current (4 sep 2001) timings from highpoint */ 105static struct hpt_clock hpt37x_timings_66[] = {
107static const struct hpt_clock hpt370a_timings_33[] = { 106 { XFER_UDMA_6, 0x1c869c62 },
108 { XFER_UDMA_5, 0x12446231 }, 107 { XFER_UDMA_5, 0x1cae9c62 }, /* 0x1c8a9c62 */
109 { XFER_UDMA_4, 0x12446231 }, 108 { XFER_UDMA_4, 0x1c8a9c62 },
110 { XFER_UDMA_3, 0x126c6231 }, 109 { XFER_UDMA_3, 0x1c8e9c62 },
111 { XFER_UDMA_2, 0x12486231 }, 110 { XFER_UDMA_2, 0x1c929c62 },
112 { XFER_UDMA_1, 0x124c6233 }, 111 { XFER_UDMA_1, 0x1c9a9c62 },
113 { XFER_UDMA_0, 0x12506297 }, 112 { XFER_UDMA_0, 0x1c829c62 },
114 113
115 { XFER_MW_DMA_2, 0x22406c31 }, 114 { XFER_MW_DMA_2, 0x2c829c62 },
116 { XFER_MW_DMA_1, 0x22406c33 }, 115 { XFER_MW_DMA_1, 0x2c829c66 },
117 { XFER_MW_DMA_0, 0x22406c97 }, 116 { XFER_MW_DMA_0, 0x2c829d2e },
118 117
119 { XFER_PIO_4, 0x06414e31 }, 118 { XFER_PIO_4, 0x0c829c62 },
120 { XFER_PIO_3, 0x06414e42 }, 119 { XFER_PIO_3, 0x0c829c84 },
121 { XFER_PIO_2, 0x06414e53 }, 120 { XFER_PIO_2, 0x0c829ca6 },
122 { XFER_PIO_1, 0x06814e93 }, 121 { XFER_PIO_1, 0x0d029d26 },
123 { XFER_PIO_0, 0x06814ea7 }, 122 { XFER_PIO_0, 0x0d029d5e }
124 { 0, 0x06814ea7 }
125}; 123};
126 124
127/* 2x 33MHz timings */
128static const struct hpt_clock hpt370a_timings_66[] = {
129 { XFER_UDMA_5, 0x1488e673 },
130 { XFER_UDMA_4, 0x1488e673 },
131 { XFER_UDMA_3, 0x1498e673 },
132 { XFER_UDMA_2, 0x1490e673 },
133 { XFER_UDMA_1, 0x1498e677 },
134 { XFER_UDMA_0, 0x14a0e73f },
135
136 { XFER_MW_DMA_2, 0x2480fa73 },
137 { XFER_MW_DMA_1, 0x2480fa77 },
138 { XFER_MW_DMA_0, 0x2480fb3f },
139
140 { XFER_PIO_4, 0x0c82be73 },
141 { XFER_PIO_3, 0x0c82be95 },
142 { XFER_PIO_2, 0x0c82beb7 },
143 { XFER_PIO_1, 0x0d02bf37 },
144 { XFER_PIO_0, 0x0d02bf5f },
145 { 0, 0x0d02bf5f }
146};
147
148static const struct hpt_clock hpt370a_timings_50[] = {
149 { XFER_UDMA_5, 0x12848242 },
150 { XFER_UDMA_4, 0x12ac8242 },
151 { XFER_UDMA_3, 0x128c8242 },
152 { XFER_UDMA_2, 0x120c8242 },
153 { XFER_UDMA_1, 0x12148254 },
154 { XFER_UDMA_0, 0x121882ea },
155
156 { XFER_MW_DMA_2, 0x22808242 },
157 { XFER_MW_DMA_1, 0x22808254 },
158 { XFER_MW_DMA_0, 0x228082ea },
159
160 { XFER_PIO_4, 0x0a81f442 },
161 { XFER_PIO_3, 0x0a81f443 },
162 { XFER_PIO_2, 0x0a81f454 },
163 { XFER_PIO_1, 0x0ac1f465 },
164 { XFER_PIO_0, 0x0ac1f48a },
165 { 0, 0x0ac1f48a }
166};
167
168static const struct hpt_clock hpt372_timings_33[] = {
169 { XFER_UDMA_6, 0x1c81dc62 },
170 { XFER_UDMA_5, 0x1c6ddc62 },
171 { XFER_UDMA_4, 0x1c8ddc62 },
172 { XFER_UDMA_3, 0x1c8edc62 }, /* checkme */
173 { XFER_UDMA_2, 0x1c91dc62 },
174 { XFER_UDMA_1, 0x1c9adc62 }, /* checkme */
175 { XFER_UDMA_0, 0x1c82dc62 }, /* checkme */
176
177 { XFER_MW_DMA_2, 0x2c829262 },
178 { XFER_MW_DMA_1, 0x2c829266 }, /* checkme */
179 { XFER_MW_DMA_0, 0x2c82922e }, /* checkme */
180
181 { XFER_PIO_4, 0x0c829c62 },
182 { XFER_PIO_3, 0x0c829c84 },
183 { XFER_PIO_2, 0x0c829ca6 },
184 { XFER_PIO_1, 0x0d029d26 },
185 { XFER_PIO_0, 0x0d029d5e },
186 { 0, 0x0d029d5e }
187};
188
189static const struct hpt_clock hpt372_timings_50[] = {
190 { XFER_UDMA_5, 0x12848242 },
191 { XFER_UDMA_4, 0x12ac8242 },
192 { XFER_UDMA_3, 0x128c8242 },
193 { XFER_UDMA_2, 0x120c8242 },
194 { XFER_UDMA_1, 0x12148254 },
195 { XFER_UDMA_0, 0x121882ea },
196
197 { XFER_MW_DMA_2, 0x22808242 },
198 { XFER_MW_DMA_1, 0x22808254 },
199 { XFER_MW_DMA_0, 0x228082ea },
200
201 { XFER_PIO_4, 0x0a81f442 },
202 { XFER_PIO_3, 0x0a81f443 },
203 { XFER_PIO_2, 0x0a81f454 },
204 { XFER_PIO_1, 0x0ac1f465 },
205 { XFER_PIO_0, 0x0ac1f48a },
206 { 0, 0x0a81f443 }
207};
208
209static const struct hpt_clock hpt372_timings_66[] = {
210 { XFER_UDMA_6, 0x1c869c62 },
211 { XFER_UDMA_5, 0x1cae9c62 },
212 { XFER_UDMA_4, 0x1c8a9c62 },
213 { XFER_UDMA_3, 0x1c8e9c62 },
214 { XFER_UDMA_2, 0x1c929c62 },
215 { XFER_UDMA_1, 0x1c9a9c62 },
216 { XFER_UDMA_0, 0x1c829c62 },
217
218 { XFER_MW_DMA_2, 0x2c829c62 },
219 { XFER_MW_DMA_1, 0x2c829c66 },
220 { XFER_MW_DMA_0, 0x2c829d2e },
221
222 { XFER_PIO_4, 0x0c829c62 },
223 { XFER_PIO_3, 0x0c829c84 },
224 { XFER_PIO_2, 0x0c829ca6 },
225 { XFER_PIO_1, 0x0d029d26 },
226 { XFER_PIO_0, 0x0d029d5e },
227 { 0, 0x0d029d26 }
228};
229
230static const struct hpt_clock hpt374_timings_33[] = {
231 { XFER_UDMA_6, 0x12808242 },
232 { XFER_UDMA_5, 0x12848242 },
233 { XFER_UDMA_4, 0x12ac8242 },
234 { XFER_UDMA_3, 0x128c8242 },
235 { XFER_UDMA_2, 0x120c8242 },
236 { XFER_UDMA_1, 0x12148254 },
237 { XFER_UDMA_0, 0x121882ea },
238
239 { XFER_MW_DMA_2, 0x22808242 },
240 { XFER_MW_DMA_1, 0x22808254 },
241 { XFER_MW_DMA_0, 0x228082ea },
242
243 { XFER_PIO_4, 0x0a81f442 },
244 { XFER_PIO_3, 0x0a81f443 },
245 { XFER_PIO_2, 0x0a81f454 },
246 { XFER_PIO_1, 0x0ac1f465 },
247 { XFER_PIO_0, 0x0ac1f48a },
248 { 0, 0x06814e93 }
249};
250 125
251static const struct hpt_chip hpt370 = { 126static const struct hpt_chip hpt370 = {
252 "HPT370", 127 "HPT370",
253 48, 128 48,
254 { 129 {
255 hpt370_timings_33, 130 hpt37x_timings_33,
256 NULL, 131 NULL,
257 NULL, 132 NULL,
258 hpt370_timings_66 133 NULL
259 } 134 }
260}; 135};
261 136
@@ -263,10 +138,10 @@ static const struct hpt_chip hpt370a = {
263 "HPT370A", 138 "HPT370A",
264 48, 139 48,
265 { 140 {
266 hpt370a_timings_33, 141 hpt37x_timings_33,
267 NULL, 142 NULL,
268 hpt370a_timings_50, 143 hpt37x_timings_50,
269 hpt370a_timings_66 144 NULL
270 } 145 }
271}; 146};
272 147
@@ -274,10 +149,10 @@ static const struct hpt_chip hpt372 = {
274 "HPT372", 149 "HPT372",
275 55, 150 55,
276 { 151 {
277 hpt372_timings_33, 152 hpt37x_timings_33,
278 NULL, 153 NULL,
279 hpt372_timings_50, 154 hpt37x_timings_50,
280 hpt372_timings_66 155 hpt37x_timings_66
281 } 156 }
282}; 157};
283 158
@@ -285,10 +160,10 @@ static const struct hpt_chip hpt302 = {
285 "HPT302", 160 "HPT302",
286 66, 161 66,
287 { 162 {
288 hpt372_timings_33, 163 hpt37x_timings_33,
289 NULL, 164 NULL,
290 hpt372_timings_50, 165 hpt37x_timings_50,
291 hpt372_timings_66 166 hpt37x_timings_66
292 } 167 }
293}; 168};
294 169
@@ -296,10 +171,10 @@ static const struct hpt_chip hpt371 = {
296 "HPT371", 171 "HPT371",
297 66, 172 66,
298 { 173 {
299 hpt372_timings_33, 174 hpt37x_timings_33,
300 NULL, 175 NULL,
301 hpt372_timings_50, 176 hpt37x_timings_50,
302 hpt372_timings_66 177 hpt37x_timings_66
303 } 178 }
304}; 179};
305 180
@@ -307,10 +182,10 @@ static const struct hpt_chip hpt372a = {
307 "HPT372A", 182 "HPT372A",
308 66, 183 66,
309 { 184 {
310 hpt372_timings_33, 185 hpt37x_timings_33,
311 NULL, 186 NULL,
312 hpt372_timings_50, 187 hpt37x_timings_50,
313 hpt372_timings_66 188 hpt37x_timings_66
314 } 189 }
315}; 190};
316 191
@@ -318,7 +193,7 @@ static const struct hpt_chip hpt374 = {
318 "HPT374", 193 "HPT374",
319 48, 194 48,
320 { 195 {
321 hpt374_timings_33, 196 hpt37x_timings_33,
322 NULL, 197 NULL,
323 NULL, 198 NULL,
324 NULL 199 NULL
@@ -397,13 +272,12 @@ static const char *bad_ata100_5[] = {
397 272
398/** 273/**
399 * hpt370_filter - mode selection filter 274 * hpt370_filter - mode selection filter
400 * @ap: ATA interface
401 * @adev: ATA device 275 * @adev: ATA device
402 * 276 *
403 * Block UDMA on devices that cause trouble with this controller. 277 * Block UDMA on devices that cause trouble with this controller.
404 */ 278 */
405 279
406static unsigned long hpt370_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) 280static unsigned long hpt370_filter(struct ata_device *adev, unsigned long mask)
407{ 281{
408 if (adev->class == ATA_DEV_ATA) { 282 if (adev->class == ATA_DEV_ATA) {
409 if (hpt_dma_blacklisted(adev, "UDMA", bad_ata33)) 283 if (hpt_dma_blacklisted(adev, "UDMA", bad_ata33))
@@ -411,24 +285,23 @@ static unsigned long hpt370_filter(const struct ata_port *ap, struct ata_device
411 if (hpt_dma_blacklisted(adev, "UDMA100", bad_ata100_5)) 285 if (hpt_dma_blacklisted(adev, "UDMA100", bad_ata100_5))
412 mask &= ~(0x1F << ATA_SHIFT_UDMA); 286 mask &= ~(0x1F << ATA_SHIFT_UDMA);
413 } 287 }
414 return ata_pci_default_filter(ap, adev, mask); 288 return ata_pci_default_filter(adev, mask);
415} 289}
416 290
417/** 291/**
418 * hpt370a_filter - mode selection filter 292 * hpt370a_filter - mode selection filter
419 * @ap: ATA interface
420 * @adev: ATA device 293 * @adev: ATA device
421 * 294 *
422 * Block UDMA on devices that cause trouble with this controller. 295 * Block UDMA on devices that cause trouble with this controller.
423 */ 296 */
424 297
425static unsigned long hpt370a_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) 298static unsigned long hpt370a_filter(struct ata_device *adev, unsigned long mask)
426{ 299{
427 if (adev->class != ATA_DEV_ATA) { 300 if (adev->class != ATA_DEV_ATA) {
428 if (hpt_dma_blacklisted(adev, "UDMA100", bad_ata100_5)) 301 if (hpt_dma_blacklisted(adev, "UDMA100", bad_ata100_5))
429 mask &= ~ (0x1F << ATA_SHIFT_UDMA); 302 mask &= ~ (0x1F << ATA_SHIFT_UDMA);
430 } 303 }
431 return ata_pci_default_filter(ap, adev, mask); 304 return ata_pci_default_filter(adev, mask);
432} 305}
433 306
434/** 307/**
@@ -462,8 +335,7 @@ static int hpt37x_pre_reset(struct ata_port *ap)
462 ap->cbl = ATA_CBL_PATA80; 335 ap->cbl = ATA_CBL_PATA80;
463 336
464 /* Reset the state machine */ 337 /* Reset the state machine */
465 pci_write_config_byte(pdev, 0x50, 0x37); 338 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
466 pci_write_config_byte(pdev, 0x54, 0x37);
467 udelay(100); 339 udelay(100);
468 340
469 return ata_std_prereset(ap); 341 return ata_std_prereset(ap);
@@ -513,8 +385,7 @@ static int hpt374_pre_reset(struct ata_port *ap)
513 ap->cbl = ATA_CBL_PATA80; 385 ap->cbl = ATA_CBL_PATA80;
514 386
515 /* Reset the state machine */ 387 /* Reset the state machine */
516 pci_write_config_byte(pdev, 0x50, 0x37); 388 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
517 pci_write_config_byte(pdev, 0x54, 0x37);
518 udelay(100); 389 udelay(100);
519 390
520 return ata_std_prereset(ap); 391 return ata_std_prereset(ap);
@@ -1032,6 +903,24 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1032 .udma_mask = 0x3f, 903 .udma_mask = 0x3f,
1033 .port_ops = &hpt370a_port_ops 904 .port_ops = &hpt370a_port_ops
1034 }; 905 };
906 /* HPT370 - UDMA100 */
907 static struct ata_port_info info_hpt370_33 = {
908 .sht = &hpt37x_sht,
909 .flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST,
910 .pio_mask = 0x1f,
911 .mwdma_mask = 0x07,
912 .udma_mask = 0x0f,
913 .port_ops = &hpt370_port_ops
914 };
915 /* HPT370A - UDMA100 */
916 static struct ata_port_info info_hpt370a_33 = {
917 .sht = &hpt37x_sht,
918 .flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST,
919 .pio_mask = 0x1f,
920 .mwdma_mask = 0x07,
921 .udma_mask = 0x0f,
922 .port_ops = &hpt370a_port_ops
923 };
1035 /* HPT371, 372 and friends - UDMA133 */ 924 /* HPT371, 372 and friends - UDMA133 */
1036 static struct ata_port_info info_hpt372 = { 925 static struct ata_port_info info_hpt372 = {
1037 .sht = &hpt37x_sht, 926 .sht = &hpt37x_sht,
@@ -1067,7 +956,11 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1067 956
1068 u8 irqmask; 957 u8 irqmask;
1069 u32 class_rev; 958 u32 class_rev;
959 u8 mcr1;
1070 u32 freq; 960 u32 freq;
961 int prefer_dpll = 1;
962
963 unsigned long iobase = pci_resource_start(dev, 4);
1071 964
1072 const struct hpt_chip *chip_table; 965 const struct hpt_chip *chip_table;
1073 int clock_slot; 966 int clock_slot;
@@ -1088,10 +981,12 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1088 case 3: 981 case 3:
1089 port = &info_hpt370; 982 port = &info_hpt370;
1090 chip_table = &hpt370; 983 chip_table = &hpt370;
984 prefer_dpll = 0;
1091 break; 985 break;
1092 case 4: 986 case 4:
1093 port = &info_hpt370a; 987 port = &info_hpt370a;
1094 chip_table = &hpt370a; 988 chip_table = &hpt370a;
989 prefer_dpll = 0;
1095 break; 990 break;
1096 case 5: 991 case 5:
1097 port = &info_hpt372; 992 port = &info_hpt372;
@@ -1119,8 +1014,16 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1119 chip_table = &hpt302; 1014 chip_table = &hpt302;
1120 break; 1015 break;
1121 case PCI_DEVICE_ID_TTI_HPT371: 1016 case PCI_DEVICE_ID_TTI_HPT371:
1017 if (class_rev > 1)
1018 return -ENODEV;
1122 port = &info_hpt372; 1019 port = &info_hpt372;
1123 chip_table = &hpt371; 1020 chip_table = &hpt371;
1021 /* Single channel device, master is not present
1022 but the BIOS (or us for non x86) must mark it
1023 absent */
1024 pci_read_config_byte(dev, 0x50, &mcr1);
1025 mcr1 &= ~0x04;
1026 pci_write_config_byte(dev, 0x50, mcr1);
1124 break; 1027 break;
1125 case PCI_DEVICE_ID_TTI_HPT374: 1028 case PCI_DEVICE_ID_TTI_HPT374:
1126 chip_table = &hpt374; 1029 chip_table = &hpt374;
@@ -1150,8 +1053,18 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1150 */ 1053 */
1151 1054
1152 pci_write_config_byte(dev, 0x5b, 0x23); 1055 pci_write_config_byte(dev, 0x5b, 0x23);
1056
1057 /*
1058 * HighPoint does this for HPT372A.
1059 * NOTE: This register is only writeable via I/O space.
1060 */
1061 if (chip_table == &hpt372a)
1062 outb(0x0e, iobase + 0x9c);
1153 1063
1154 pci_read_config_dword(dev, 0x70, &freq); 1064 /* Some devices do not let this value be accessed via PCI space
1065 according to the old driver */
1066
1067 freq = inl(iobase + 0x90);
1155 if ((freq >> 12) != 0xABCDE) { 1068 if ((freq >> 12) != 0xABCDE) {
1156 int i; 1069 int i;
1157 u8 sr; 1070 u8 sr;
@@ -1162,7 +1075,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1162 /* This is the process the HPT371 BIOS is reported to use */ 1075 /* This is the process the HPT371 BIOS is reported to use */
1163 for(i = 0; i < 128; i++) { 1076 for(i = 0; i < 128; i++) {
1164 pci_read_config_byte(dev, 0x78, &sr); 1077 pci_read_config_byte(dev, 0x78, &sr);
1165 total += sr; 1078 total += sr & 0x1FF;
1166 udelay(15); 1079 udelay(15);
1167 } 1080 }
1168 freq = total / 128; 1081 freq = total / 128;
@@ -1173,15 +1086,27 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1173 * Turn the frequency check into a band and then find a timing 1086 * Turn the frequency check into a band and then find a timing
1174 * table to match it. 1087 * table to match it.
1175 */ 1088 */
1176 1089
1177 clock_slot = hpt37x_clock_slot(freq, chip_table->base); 1090 clock_slot = hpt37x_clock_slot(freq, chip_table->base);
1178 if (chip_table->clocks[clock_slot] == NULL) { 1091 if (chip_table->clocks[clock_slot] == NULL || prefer_dpll) {
1179 /* 1092 /*
1180 * We need to try PLL mode instead 1093 * We need to try PLL mode instead
1094 *
1095 * For non UDMA133 capable devices we should
1096 * use a 50MHz DPLL by choice
1181 */ 1097 */
1182 unsigned int f_low = (MHz[clock_slot] * chip_table->base) / 192; 1098 unsigned int f_low, f_high;
1183 unsigned int f_high = f_low + 2;
1184 int adjust; 1099 int adjust;
1100
1101 clock_slot = 2;
1102 if (port->udma_mask & 0xE0)
1103 clock_slot = 3;
1104
1105 f_low = (MHz[clock_slot] * chip_table->base) / 192;
1106 f_high = f_low + 2;
1107
1108 /* Select the DPLL clock. */
1109 pci_write_config_byte(dev, 0x5b, 0x21);
1185 1110
1186 for(adjust = 0; adjust < 8; adjust++) { 1111 for(adjust = 0; adjust < 8; adjust++) {
1187 if (hpt37x_calibrate_dpll(dev)) 1112 if (hpt37x_calibrate_dpll(dev))
@@ -1197,25 +1122,27 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1197 printk(KERN_WARNING "hpt37x: DPLL did not stabilize.\n"); 1122 printk(KERN_WARNING "hpt37x: DPLL did not stabilize.\n");
1198 return -ENODEV; 1123 return -ENODEV;
1199 } 1124 }
1200 /* Check if this works for all cases */ 1125 if (clock_slot == 3)
1201 port->private_data = (void *)hpt370_timings_66; 1126 port->private_data = (void *)hpt37x_timings_66;
1127 else
1128 port->private_data = (void *)hpt37x_timings_50;
1202 1129
1203 printk(KERN_INFO "hpt37x: Bus clock %dMHz, using DPLL.\n", MHz[clock_slot]); 1130 printk(KERN_INFO "hpt37x: Bus clock %dMHz, using DPLL.\n", MHz[clock_slot]);
1204 } else { 1131 } else {
1205 port->private_data = (void *)chip_table->clocks[clock_slot]; 1132 port->private_data = (void *)chip_table->clocks[clock_slot];
1206 /* 1133 /*
1207 * Perform a final fixup. The 371 and 372 clock determines 1134 * Perform a final fixup. Note that we will have used the
1208 * if UDMA133 is available. 1135 * DPLL on the HPT372 which means we don't have to worry
1209 */ 1136 * about lack of UDMA133 support on lower clocks
1210 1137 */
1211 if (clock_slot == 2 && chip_table == &hpt372) { /* 50Mhz */ 1138
1212 printk(KERN_WARNING "pata_hpt37x: No UDMA133 support available with 50MHz bus clock.\n"); 1139 if (clock_slot < 2 && port == &info_hpt370)
1213 if (port == &info_hpt372) 1140 port = &info_hpt370_33;
1214 port = &info_hpt372_50; 1141 if (clock_slot < 2 && port == &info_hpt370a)
1215 else BUG(); 1142 port = &info_hpt370a_33;
1216 }
1217 printk(KERN_INFO "hpt37x: %s: Bus clock %dMHz.\n", chip_table->name, MHz[clock_slot]); 1143 printk(KERN_INFO "hpt37x: %s: Bus clock %dMHz.\n", chip_table->name, MHz[clock_slot]);
1218 } 1144 }
1145
1219 port_info[0] = port_info[1] = port; 1146 port_info[0] = port_info[1] = port;
1220 /* Now kick off ATA set up */ 1147 /* Now kick off ATA set up */
1221 return ata_pci_init_one(dev, port_info, 2); 1148 return ata_pci_init_one(dev, port_info, 2);
diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c
index 65f2e180e7fa..6a34521b9e01 100644
--- a/drivers/ata/pata_hpt3x2n.c
+++ b/drivers/ata/pata_hpt3x2n.c
@@ -8,10 +8,10 @@
8 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> 8 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
9 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 9 * Portions Copyright (C) 2001 Sun Microsystems, Inc.
10 * Portions Copyright (C) 2003 Red Hat Inc 10 * Portions Copyright (C) 2003 Red Hat Inc
11 * Portions Copyright (C) 2005-2006 MontaVista Software, Inc.
11 * 12 *
12 * 13 *
13 * TODO 14 * TODO
14 * 371N
15 * Work out best PLL policy 15 * Work out best PLL policy
16 */ 16 */
17 17
@@ -25,7 +25,7 @@
25#include <linux/libata.h> 25#include <linux/libata.h>
26 26
27#define DRV_NAME "pata_hpt3x2n" 27#define DRV_NAME "pata_hpt3x2n"
28#define DRV_VERSION "0.3.2" 28#define DRV_VERSION "0.3.3"
29 29
30enum { 30enum {
31 HPT_PCI_FAST = (1 << 31), 31 HPT_PCI_FAST = (1 << 31),
@@ -115,14 +115,13 @@ static u32 hpt3x2n_find_mode(struct ata_port *ap, int speed)
115} 115}
116 116
117/** 117/**
118 * hpt3x2n_pre_reset - reset the hpt3x2n bus 118 * hpt3x2n_cable_detect - Detect the cable type
119 * @ap: ATA port to reset 119 * @ap: ATA port to detect on
120 * 120 *
121 * Perform the initial reset handling for the 3x2n series controllers. 121 * Return the cable type attached to this port
122 * Reset the hardware and state machine, obtain the cable type.
123 */ 122 */
124 123
125static int hpt3xn_pre_reset(struct ata_port *ap) 124static int hpt3x2n_cable_detect(struct ata_port *ap)
126{ 125{
127 u8 scr2, ata66; 126 u8 scr2, ata66;
128 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 127 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
@@ -135,15 +134,26 @@ static int hpt3xn_pre_reset(struct ata_port *ap)
135 pci_write_config_byte(pdev, 0x5B, scr2); 134 pci_write_config_byte(pdev, 0x5B, scr2);
136 135
137 if (ata66 & (1 << ap->port_no)) 136 if (ata66 & (1 << ap->port_no))
138 ap->cbl = ATA_CBL_PATA40; 137 return ATA_CBL_PATA40;
139 else 138 else
140 ap->cbl = ATA_CBL_PATA80; 139 return ATA_CBL_PATA80;
140}
141
142/**
143 * hpt3x2n_pre_reset - reset the hpt3x2n bus
144 * @ap: ATA port to reset
145 * @deadline: deadline jiffies for the operation
146 *
147 * Perform the initial reset handling for the 3x2n series controllers.
148 * Reset the hardware and state machine,
149 */
141 150
151static int hpt3xn_pre_reset(struct ata_port *ap)
152{
153 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
142 /* Reset the state machine */ 154 /* Reset the state machine */
143 pci_write_config_byte(pdev, 0x50, 0x37); 155 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
144 pci_write_config_byte(pdev, 0x54, 0x37);
145 udelay(100); 156 udelay(100);
146
147 return ata_std_prereset(ap); 157 return ata_std_prereset(ap);
148} 158}
149 159
@@ -364,6 +374,7 @@ static struct ata_port_operations hpt3x2n_port_ops = {
364 .thaw = ata_bmdma_thaw, 374 .thaw = ata_bmdma_thaw,
365 .error_handler = hpt3x2n_error_handler, 375 .error_handler = hpt3x2n_error_handler,
366 .post_internal_cmd = ata_bmdma_post_internal_cmd, 376 .post_internal_cmd = ata_bmdma_post_internal_cmd,
377 .cable_detect = hpt3x2n_cable_detect,
367 378
368 .bmdma_setup = ata_bmdma_setup, 379 .bmdma_setup = ata_bmdma_setup,
369 .bmdma_start = ata_bmdma_start, 380 .bmdma_start = ata_bmdma_start,
@@ -422,8 +433,9 @@ static int hpt3x2n_pci_clock(struct pci_dev *pdev)
422{ 433{
423 unsigned long freq; 434 unsigned long freq;
424 u32 fcnt; 435 u32 fcnt;
436 unsigned long iobase = pci_resource_start(pdev, 4);
425 437
426 pci_read_config_dword(pdev, 0x70/*CHECKME*/, &fcnt); 438 fcnt = inl(iobase + 0x90); /* Not PCI readable for some chips */
427 if ((fcnt >> 12) != 0xABCDE) { 439 if ((fcnt >> 12) != 0xABCDE) {
428 printk(KERN_WARNING "hpt3xn: BIOS clock data not set.\n"); 440 printk(KERN_WARNING "hpt3xn: BIOS clock data not set.\n");
429 return 33; /* Not BIOS set */ 441 return 33; /* Not BIOS set */
@@ -492,6 +504,7 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
492 unsigned int pci_mhz; 504 unsigned int pci_mhz;
493 unsigned int f_low, f_high; 505 unsigned int f_low, f_high;
494 int adjust; 506 int adjust;
507 unsigned long iobase = pci_resource_start(dev, 4);
495 508
496 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 509 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
497 class_rev &= 0xFF; 510 class_rev &= 0xFF;
@@ -501,6 +514,11 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
501 if (class_rev < 6) 514 if (class_rev < 6)
502 return -ENODEV; 515 return -ENODEV;
503 break; 516 break;
517 case PCI_DEVICE_ID_TTI_HPT371:
518 if (class_rev < 2)
519 return -ENODEV;
520 /* 371N if rev > 1 */
521 break;
504 case PCI_DEVICE_ID_TTI_HPT372: 522 case PCI_DEVICE_ID_TTI_HPT372:
505 /* 372N if rev >= 1*/ 523 /* 372N if rev >= 1*/
506 if (class_rev == 0) 524 if (class_rev == 0)
@@ -528,6 +546,19 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
528 irqmask &= ~0x10; 546 irqmask &= ~0x10;
529 pci_write_config_byte(dev, 0x5a, irqmask); 547 pci_write_config_byte(dev, 0x5a, irqmask);
530 548
549 /*
550 * HPT371 chips physically have only one channel, the secondary one,
551 * but the primary channel registers do exist! Go figure...
552 * So, we manually disable the non-existing channel here
553 * (if the BIOS hasn't done this already).
554 */
555 if (dev->device == PCI_DEVICE_ID_TTI_HPT371) {
556 u8 mcr1;
557 pci_read_config_byte(dev, 0x50, &mcr1);
558 mcr1 &= ~0x04;
559 pci_write_config_byte(dev, 0x50, mcr1);
560 }
561
531 /* Tune the PLL. HPT recommend using 75 for SATA, 66 for UDMA133 or 562 /* Tune the PLL. HPT recommend using 75 for SATA, 66 for UDMA133 or
532 50 for UDMA100. Right now we always use 66 */ 563 50 for UDMA100. Right now we always use 66 */
533 564
@@ -546,14 +577,24 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
546 break; 577 break;
547 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low); 578 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);
548 } 579 }
549 if (adjust == 8) 580 if (adjust == 8) {
550 printk(KERN_WARNING "hpt3xn: DPLL did not stabilize.\n"); 581 printk(KERN_WARNING "hpt3x2n: DPLL did not stabilize.\n");
582 return -ENODEV;
583 }
551 584
552 /* Set our private data up. We only need a few flags so we use 585 /* Set our private data up. We only need a few flags so we use
553 it directly */ 586 it directly */
554 port->private_data = NULL; 587 port->private_data = NULL;
555 if (pci_mhz > 60) 588 if (pci_mhz > 60) {
556 port->private_data = (void *)PCI66; 589 port->private_data = (void *)PCI66;
590 /*
591 * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in
592 * the MISC. register to stretch the UltraDMA Tss timing.
593 * NOTE: This register is only writeable via I/O space.
594 */
595 if (dev->device == PCI_DEVICE_ID_TTI_HPT371)
596 outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c);
597 }
557 598
558 /* Now kick off ATA set up */ 599 /* Now kick off ATA set up */
559 port_info[0] = port_info[1] = port; 600 port_info[0] = port_info[1] = port;
@@ -562,6 +603,7 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
562 603
563static const struct pci_device_id hpt3x2n[] = { 604static const struct pci_device_id hpt3x2n[] = {
564 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT366), }, 605 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT366), },
606 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT371), },
565 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372), }, 607 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372), },
566 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT302), }, 608 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT302), },
567 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372N), }, 609 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372N), },
diff --git a/drivers/ata/pata_hpt3x3.c b/drivers/ata/pata_hpt3x3.c
index 813485c8526c..ac28ec8c50aa 100644
--- a/drivers/ata/pata_hpt3x3.c
+++ b/drivers/ata/pata_hpt3x3.c
@@ -25,25 +25,6 @@
25#define DRV_NAME "pata_hpt3x3" 25#define DRV_NAME "pata_hpt3x3"
26#define DRV_VERSION "0.4.2" 26#define DRV_VERSION "0.4.2"
27 27
28static int hpt3x3_probe_init(struct ata_port *ap)
29{
30 ap->cbl = ATA_CBL_PATA40;
31 return ata_std_prereset(ap);
32}
33
34/**
35 * hpt3x3_probe_reset - reset the hpt3x3 bus
36 * @ap: ATA port to reset
37 *
38 * Perform the housekeeping when doing an ATA bus reeset. We just
39 * need to force the cable type.
40 */
41
42static void hpt3x3_error_handler(struct ata_port *ap)
43{
44 return ata_bmdma_drive_eh(ap, hpt3x3_probe_init, ata_std_softreset, NULL, ata_std_postreset);
45}
46
47/** 28/**
48 * hpt3x3_set_piomode - PIO setup 29 * hpt3x3_set_piomode - PIO setup
49 * @ap: ATA interface 30 * @ap: ATA interface
@@ -139,8 +120,9 @@ static struct ata_port_operations hpt3x3_port_ops = {
139 120
140 .freeze = ata_bmdma_freeze, 121 .freeze = ata_bmdma_freeze,
141 .thaw = ata_bmdma_thaw, 122 .thaw = ata_bmdma_thaw,
142 .error_handler = hpt3x3_error_handler, 123 .error_handler = ata_bmdma_error_handler,
143 .post_internal_cmd = ata_bmdma_post_internal_cmd, 124 .post_internal_cmd = ata_bmdma_post_internal_cmd,
125 .cable_detect = ata_cable_40wire,
144 126
145 .bmdma_setup = ata_bmdma_setup, 127 .bmdma_setup = ata_bmdma_setup,
146 .bmdma_start = ata_bmdma_start, 128 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_isapnp.c b/drivers/ata/pata_isapnp.c
index 1a61cc891741..d042efdfbac4 100644
--- a/drivers/ata/pata_isapnp.c
+++ b/drivers/ata/pata_isapnp.c
@@ -49,13 +49,13 @@ static struct ata_port_operations isapnp_port_ops = {
49 .thaw = ata_bmdma_thaw, 49 .thaw = ata_bmdma_thaw,
50 .error_handler = ata_bmdma_error_handler, 50 .error_handler = ata_bmdma_error_handler,
51 .post_internal_cmd = ata_bmdma_post_internal_cmd, 51 .post_internal_cmd = ata_bmdma_post_internal_cmd,
52 .cable_detect = ata_cable_40wire,
52 53
53 .qc_prep = ata_qc_prep, 54 .qc_prep = ata_qc_prep,
54 .qc_issue = ata_qc_issue_prot, 55 .qc_issue = ata_qc_issue_prot,
55 56
56 .data_xfer = ata_data_xfer, 57 .data_xfer = ata_data_xfer,
57 58
58 .irq_handler = ata_interrupt,
59 .irq_clear = ata_bmdma_irq_clear, 59 .irq_clear = ata_bmdma_irq_clear,
60 .irq_on = ata_irq_on, 60 .irq_on = ata_irq_on,
61 .irq_ack = ata_irq_ack, 61 .irq_ack = ata_irq_ack,
@@ -74,8 +74,10 @@ static struct ata_port_operations isapnp_port_ops = {
74 74
75static int isapnp_init_one(struct pnp_dev *idev, const struct pnp_device_id *dev_id) 75static int isapnp_init_one(struct pnp_dev *idev, const struct pnp_device_id *dev_id)
76{ 76{
77 struct ata_probe_ent ae; 77 struct ata_host *host;
78 struct ata_port *ap;
78 void __iomem *cmd_addr, *ctl_addr; 79 void __iomem *cmd_addr, *ctl_addr;
80 int rc;
79 81
80 if (pnp_port_valid(idev, 0) == 0) 82 if (pnp_port_valid(idev, 0) == 0)
81 return -ENODEV; 83 return -ENODEV;
@@ -84,34 +86,36 @@ static int isapnp_init_one(struct pnp_dev *idev, const struct pnp_device_id *dev
84 if (pnp_irq_valid(idev, 0) == 0) 86 if (pnp_irq_valid(idev, 0) == 0)
85 return -ENODEV; 87 return -ENODEV;
86 88
89 /* allocate host */
90 host = ata_host_alloc(&idev->dev, 1);
91 if (!host)
92 return -ENOMEM;
93
94 /* acquire resources and fill host */
87 cmd_addr = devm_ioport_map(&idev->dev, pnp_port_start(idev, 0), 8); 95 cmd_addr = devm_ioport_map(&idev->dev, pnp_port_start(idev, 0), 8);
88 if (!cmd_addr) 96 if (!cmd_addr)
89 return -ENOMEM; 97 return -ENOMEM;
90 98
91 memset(&ae, 0, sizeof(struct ata_probe_ent)); 99 ap = host->ports[0];
92 INIT_LIST_HEAD(&ae.node); 100
93 ae.dev = &idev->dev; 101 ap->ops = &isapnp_port_ops;
94 ae.port_ops = &isapnp_port_ops; 102 ap->pio_mask = 1;
95 ae.sht = &isapnp_sht; 103 ap->flags |= ATA_FLAG_SLAVE_POSS;
96 ae.n_ports = 1; 104
97 ae.pio_mask = 1; /* ISA so PIO 0 cycles */ 105 ap->ioaddr.cmd_addr = cmd_addr;
98 ae.irq = pnp_irq(idev, 0);
99 ae.irq_flags = 0;
100 ae.port_flags = ATA_FLAG_SLAVE_POSS;
101 ae.port[0].cmd_addr = cmd_addr;
102 106
103 if (pnp_port_valid(idev, 1) == 0) { 107 if (pnp_port_valid(idev, 1) == 0) {
104 ctl_addr = devm_ioport_map(&idev->dev, 108 ctl_addr = devm_ioport_map(&idev->dev,
105 pnp_port_start(idev, 1), 1); 109 pnp_port_start(idev, 1), 1);
106 ae.port[0].altstatus_addr = ctl_addr; 110 ap->ioaddr.altstatus_addr = ctl_addr;
107 ae.port[0].ctl_addr = ctl_addr; 111 ap->ioaddr.ctl_addr = ctl_addr;
108 ae.port_flags |= ATA_FLAG_SRST;
109 } 112 }
110 ata_std_ports(&ae.port[0]);
111 113
112 if (ata_device_add(&ae) == 0) 114 ata_std_ports(&ap->ioaddr);
113 return -ENODEV; 115
114 return 0; 116 /* activate */
117 return ata_host_activate(host, pnp_irq(idev, 0), ata_interrupt, 0,
118 &isapnp_sht);
115} 119}
116 120
117/** 121/**
diff --git a/drivers/ata/pata_it8213.c b/drivers/ata/pata_it8213.c
index ea734701555e..011306ef8334 100644
--- a/drivers/ata/pata_it8213.c
+++ b/drivers/ata/pata_it8213.c
@@ -25,8 +25,8 @@
25 * it8213_pre_reset - check for 40/80 pin 25 * it8213_pre_reset - check for 40/80 pin
26 * @ap: Port 26 * @ap: Port
27 * 27 *
28 * Perform cable detection for the 8213 ATA interface. This is 28 * Filter out ports by the enable bits before doing the normal reset
29 * different to the PIIX arrangement 29 * and probe.
30 */ 30 */
31 31
32static int it8213_pre_reset(struct ata_port *ap) 32static int it8213_pre_reset(struct ata_port *ap)
@@ -34,23 +34,14 @@ static int it8213_pre_reset(struct ata_port *ap)
34 static const struct pci_bits it8213_enable_bits[] = { 34 static const struct pci_bits it8213_enable_bits[] = {
35 { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */ 35 { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */
36 }; 36 };
37
38 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 37 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
39 u8 tmp;
40
41 if (!pci_test_config_bits(pdev, &it8213_enable_bits[ap->port_no])) 38 if (!pci_test_config_bits(pdev, &it8213_enable_bits[ap->port_no]))
42 return -ENOENT; 39 return -ENOENT;
43
44 pci_read_config_byte(pdev, 0x42, &tmp);
45 if (tmp & 2) /* The initial docs are incorrect */
46 ap->cbl = ATA_CBL_PATA40;
47 else
48 ap->cbl = ATA_CBL_PATA80;
49 return ata_std_prereset(ap); 40 return ata_std_prereset(ap);
50} 41}
51 42
52/** 43/**
53 * it8213_probe_reset - Probe specified port on PATA host controller 44 * it8213_error_handler - Probe specified port on PATA host controller
54 * @ap: Port to probe 45 * @ap: Port to probe
55 * 46 *
56 * LOCKING: 47 * LOCKING:
@@ -63,9 +54,27 @@ static void it8213_error_handler(struct ata_port *ap)
63} 54}
64 55
65/** 56/**
57 * it8213_cable_detect - check for 40/80 pin
58 * @ap: Port
59 *
60 * Perform cable detection for the 8213 ATA interface. This is
61 * different to the PIIX arrangement
62 */
63
64static int it8213_cable_detect(struct ata_port *ap)
65{
66 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
67 u8 tmp;
68 pci_read_config_byte(pdev, 0x42, &tmp);
69 if (tmp & 2) /* The initial docs are incorrect */
70 return ATA_CBL_PATA40;
71 return ATA_CBL_PATA80;
72}
73
74/**
66 * it8213_set_piomode - Initialize host controller PATA PIO timings 75 * it8213_set_piomode - Initialize host controller PATA PIO timings
67 * @ap: Port whose timings we are configuring 76 * @ap: Port whose timings we are configuring
68 * @adev: um 77 * @adev: Device whose timings we are configuring
69 * 78 *
70 * Set PIO mode for device, in host controller PCI config space. 79 * Set PIO mode for device, in host controller PCI config space.
71 * 80 *
@@ -268,6 +277,7 @@ static const struct ata_port_operations it8213_ops = {
268 .thaw = ata_bmdma_thaw, 277 .thaw = ata_bmdma_thaw,
269 .error_handler = it8213_error_handler, 278 .error_handler = it8213_error_handler,
270 .post_internal_cmd = ata_bmdma_post_internal_cmd, 279 .post_internal_cmd = ata_bmdma_post_internal_cmd,
280 .cable_detect = it8213_cable_detect,
271 281
272 .bmdma_setup = ata_bmdma_setup, 282 .bmdma_setup = ata_bmdma_setup,
273 .bmdma_start = ata_bmdma_start, 283 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_it821x.c b/drivers/ata/pata_it821x.c
index 35ecb2ba067b..f1f8cec8c224 100644
--- a/drivers/ata/pata_it821x.c
+++ b/drivers/ata/pata_it821x.c
@@ -80,7 +80,7 @@
80 80
81 81
82#define DRV_NAME "pata_it821x" 82#define DRV_NAME "pata_it821x"
83#define DRV_VERSION "0.3.4" 83#define DRV_VERSION "0.3.6"
84 84
85struct it821x_dev 85struct it821x_dev
86{ 86{
@@ -113,31 +113,6 @@ struct it821x_dev
113static int it8212_noraid; 113static int it8212_noraid;
114 114
115/** 115/**
116 * it821x_pre_reset - probe
117 * @ap: ATA port
118 *
119 * Set the cable type
120 */
121
122static int it821x_pre_reset(struct ata_port *ap)
123{
124 ap->cbl = ATA_CBL_PATA80;
125 return ata_std_prereset(ap);
126}
127
128/**
129 * it821x_error_handler - probe/reset
130 * @ap: ATA port
131 *
132 * Set the cable type and trigger a probe
133 */
134
135static void it821x_error_handler(struct ata_port *ap)
136{
137 return ata_bmdma_drive_eh(ap, it821x_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
138}
139
140/**
141 * it821x_program - program the PIO/MWDMA registers 116 * it821x_program - program the PIO/MWDMA registers
142 * @ap: ATA port 117 * @ap: ATA port
143 * @adev: Device to program 118 * @adev: Device to program
@@ -520,7 +495,6 @@ static int it821x_smart_set_mode(struct ata_port *ap, struct ata_device **unused
520 495
521/** 496/**
522 * it821x_dev_config - Called each device identify 497 * it821x_dev_config - Called each device identify
523 * @ap: ATA port
524 * @adev: Device that has just been identified 498 * @adev: Device that has just been identified
525 * 499 *
526 * Perform the initial setup needed for each device that is chip 500 * Perform the initial setup needed for each device that is chip
@@ -531,7 +505,7 @@ static int it821x_smart_set_mode(struct ata_port *ap, struct ata_device **unused
531 * basically we need to filter commands for this chip. 505 * basically we need to filter commands for this chip.
532 */ 506 */
533 507
534static void it821x_dev_config(struct ata_port *ap, struct ata_device *adev) 508static void it821x_dev_config(struct ata_device *adev)
535{ 509{
536 unsigned char model_num[ATA_ID_PROD_LEN + 1]; 510 unsigned char model_num[ATA_ID_PROD_LEN + 1];
537 511
@@ -667,8 +641,9 @@ static struct ata_port_operations it821x_smart_port_ops = {
667 641
668 .freeze = ata_bmdma_freeze, 642 .freeze = ata_bmdma_freeze,
669 .thaw = ata_bmdma_thaw, 643 .thaw = ata_bmdma_thaw,
670 .error_handler = it821x_error_handler, 644 .error_handler = ata_bmdma_error_handler,
671 .post_internal_cmd = ata_bmdma_post_internal_cmd, 645 .post_internal_cmd = ata_bmdma_post_internal_cmd,
646 .cable_detect = ata_cable_unknown,
672 647
673 .bmdma_setup = ata_bmdma_setup, 648 .bmdma_setup = ata_bmdma_setup,
674 .bmdma_start = ata_bmdma_start, 649 .bmdma_start = ata_bmdma_start,
@@ -703,8 +678,9 @@ static struct ata_port_operations it821x_passthru_port_ops = {
703 678
704 .freeze = ata_bmdma_freeze, 679 .freeze = ata_bmdma_freeze,
705 .thaw = ata_bmdma_thaw, 680 .thaw = ata_bmdma_thaw,
706 .error_handler = it821x_error_handler, 681 .error_handler = ata_bmdma_error_handler,
707 .post_internal_cmd = ata_bmdma_post_internal_cmd, 682 .post_internal_cmd = ata_bmdma_post_internal_cmd,
683 .cable_detect = ata_cable_unknown,
708 684
709 .bmdma_setup = ata_bmdma_setup, 685 .bmdma_setup = ata_bmdma_setup,
710 .bmdma_start = it821x_passthru_bmdma_start, 686 .bmdma_start = it821x_passthru_bmdma_start,
diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c
index c6f0e1927551..420c343e5711 100644
--- a/drivers/ata/pata_ixp4xx_cf.c
+++ b/drivers/ata/pata_ixp4xx_cf.c
@@ -129,8 +129,8 @@ static struct ata_port_operations ixp4xx_port_ops = {
129 .qc_issue = ata_qc_issue_prot, 129 .qc_issue = ata_qc_issue_prot,
130 .eng_timeout = ata_eng_timeout, 130 .eng_timeout = ata_eng_timeout,
131 .data_xfer = ixp4xx_mmio_data_xfer, 131 .data_xfer = ixp4xx_mmio_data_xfer,
132 .cable_detect = ata_cable_40wire,
132 133
133 .irq_handler = ata_interrupt,
134 .irq_clear = ixp4xx_irq_clear, 134 .irq_clear = ixp4xx_irq_clear,
135 .irq_on = ata_irq_on, 135 .irq_on = ata_irq_on,
136 .irq_ack = ata_irq_ack, 136 .irq_ack = ata_irq_ack,
@@ -173,12 +173,12 @@ static void ixp4xx_setup_port(struct ata_ioports *ioaddr,
173 173
174static __devinit int ixp4xx_pata_probe(struct platform_device *pdev) 174static __devinit int ixp4xx_pata_probe(struct platform_device *pdev)
175{ 175{
176 int ret;
177 unsigned int irq; 176 unsigned int irq;
178 struct resource *cs0, *cs1; 177 struct resource *cs0, *cs1;
179 struct ata_probe_ent ae; 178 struct ata_host *host;
180 179 struct ata_port *ap;
181 struct ixp4xx_pata_data *data = pdev->dev.platform_data; 180 struct ixp4xx_pata_data *data = pdev->dev.platform_data;
181 int rc;
182 182
183 cs0 = platform_get_resource(pdev, IORESOURCE_MEM, 0); 183 cs0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
184 cs1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); 184 cs1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
@@ -186,6 +186,12 @@ static __devinit int ixp4xx_pata_probe(struct platform_device *pdev)
186 if (!cs0 || !cs1) 186 if (!cs0 || !cs1)
187 return -EINVAL; 187 return -EINVAL;
188 188
189 /* allocate host */
190 host = ata_host_alloc(&pdev->dev, 1);
191 if (!host)
192 return -ENOMEM;
193
194 /* acquire resources and fill host */
189 pdev->dev.coherent_dma_mask = DMA_32BIT_MASK; 195 pdev->dev.coherent_dma_mask = DMA_32BIT_MASK;
190 196
191 data->cs0 = devm_ioremap(&pdev->dev, cs0->start, 0x1000); 197 data->cs0 = devm_ioremap(&pdev->dev, cs0->start, 0x1000);
@@ -199,32 +205,22 @@ static __devinit int ixp4xx_pata_probe(struct platform_device *pdev)
199 *data->cs0_cfg = data->cs0_bits; 205 *data->cs0_cfg = data->cs0_bits;
200 *data->cs1_cfg = data->cs1_bits; 206 *data->cs1_cfg = data->cs1_bits;
201 207
202 memset(&ae, 0, sizeof(struct ata_probe_ent)); 208 ap = host->ports[0];
203 INIT_LIST_HEAD(&ae.node);
204 209
205 ae.dev = &pdev->dev; 210 ap->ops = &ixp4xx_port_ops;
206 ae.port_ops = &ixp4xx_port_ops; 211 ap->pio_mask = 0x1f; /* PIO4 */
207 ae.sht = &ixp4xx_sht; 212 ap->flags |= ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY | ATA_FLAG_NO_ATAPI;
208 ae.n_ports = 1;
209 ae.pio_mask = 0x1f; /* PIO4 */
210 ae.irq = irq;
211 ae.irq_flags = 0;
212 ae.port_flags = ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY
213 | ATA_FLAG_NO_ATAPI | ATA_FLAG_SRST;
214 213
215 /* run in polling mode if no irq has been assigned */ 214 /* run in polling mode if no irq has been assigned */
216 if (!irq) 215 if (!irq)
217 ae.port_flags |= ATA_FLAG_PIO_POLLING; 216 ap->flags |= ATA_FLAG_PIO_POLLING;
218 217
219 ixp4xx_setup_port(&ae.port[0], data); 218 ixp4xx_setup_port(&ap->ioaddr, data);
220 219
221 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); 220 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
222 221
223 ret = ata_device_add(&ae); 222 /* activate host */
224 if (ret == 0) 223 return ata_host_activate(host, irq, ata_interrupt, 0, &ixp4xx_sht);
225 return -ENODEV;
226
227 return 0;
228} 224}
229 225
230static __devexit int ixp4xx_pata_remove(struct platform_device *dev) 226static __devexit int ixp4xx_pata_remove(struct platform_device *dev)
diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c
index 86fbcd6a742b..707099291e01 100644
--- a/drivers/ata/pata_legacy.c
+++ b/drivers/ata/pata_legacy.c
@@ -162,6 +162,7 @@ static struct ata_port_operations simple_port_ops = {
162 .thaw = ata_bmdma_thaw, 162 .thaw = ata_bmdma_thaw,
163 .error_handler = ata_bmdma_error_handler, 163 .error_handler = ata_bmdma_error_handler,
164 .post_internal_cmd = ata_bmdma_post_internal_cmd, 164 .post_internal_cmd = ata_bmdma_post_internal_cmd,
165 .cable_detect = ata_cable_40wire,
165 166
166 .qc_prep = ata_qc_prep, 167 .qc_prep = ata_qc_prep,
167 .qc_issue = ata_qc_issue_prot, 168 .qc_issue = ata_qc_issue_prot,
@@ -185,6 +186,7 @@ static struct ata_port_operations legacy_port_ops = {
185 .check_status = ata_check_status, 186 .check_status = ata_check_status,
186 .exec_command = ata_exec_command, 187 .exec_command = ata_exec_command,
187 .dev_select = ata_std_dev_select, 188 .dev_select = ata_std_dev_select,
189 .cable_detect = ata_cable_40wire,
188 190
189 .freeze = ata_bmdma_freeze, 191 .freeze = ata_bmdma_freeze,
190 .thaw = ata_bmdma_thaw, 192 .thaw = ata_bmdma_thaw,
@@ -305,6 +307,7 @@ static struct ata_port_operations pdc20230_port_ops = {
305 .thaw = ata_bmdma_thaw, 307 .thaw = ata_bmdma_thaw,
306 .error_handler = ata_bmdma_error_handler, 308 .error_handler = ata_bmdma_error_handler,
307 .post_internal_cmd = ata_bmdma_post_internal_cmd, 309 .post_internal_cmd = ata_bmdma_post_internal_cmd,
310 .cable_detect = ata_cable_40wire,
308 311
309 .qc_prep = ata_qc_prep, 312 .qc_prep = ata_qc_prep,
310 .qc_issue = ata_qc_issue_prot, 313 .qc_issue = ata_qc_issue_prot,
@@ -360,6 +363,7 @@ static struct ata_port_operations ht6560a_port_ops = {
360 .thaw = ata_bmdma_thaw, 363 .thaw = ata_bmdma_thaw,
361 .error_handler = ata_bmdma_error_handler, 364 .error_handler = ata_bmdma_error_handler,
362 .post_internal_cmd = ata_bmdma_post_internal_cmd, 365 .post_internal_cmd = ata_bmdma_post_internal_cmd,
366 .cable_detect = ata_cable_40wire,
363 367
364 .qc_prep = ata_qc_prep, 368 .qc_prep = ata_qc_prep,
365 .qc_issue = ata_qc_issue_prot, 369 .qc_issue = ata_qc_issue_prot,
@@ -426,6 +430,7 @@ static struct ata_port_operations ht6560b_port_ops = {
426 .thaw = ata_bmdma_thaw, 430 .thaw = ata_bmdma_thaw,
427 .error_handler = ata_bmdma_error_handler, 431 .error_handler = ata_bmdma_error_handler,
428 .post_internal_cmd = ata_bmdma_post_internal_cmd, 432 .post_internal_cmd = ata_bmdma_post_internal_cmd,
433 .cable_detect = ata_cable_40wire,
429 434
430 .qc_prep = ata_qc_prep, 435 .qc_prep = ata_qc_prep,
431 .qc_issue = ata_qc_issue_prot, 436 .qc_issue = ata_qc_issue_prot,
@@ -547,6 +552,7 @@ static struct ata_port_operations opti82c611a_port_ops = {
547 .thaw = ata_bmdma_thaw, 552 .thaw = ata_bmdma_thaw,
548 .error_handler = ata_bmdma_error_handler, 553 .error_handler = ata_bmdma_error_handler,
549 .post_internal_cmd = ata_bmdma_post_internal_cmd, 554 .post_internal_cmd = ata_bmdma_post_internal_cmd,
555 .cable_detect = ata_cable_40wire,
550 556
551 .qc_prep = ata_qc_prep, 557 .qc_prep = ata_qc_prep,
552 .qc_issue = ata_qc_issue_prot, 558 .qc_issue = ata_qc_issue_prot,
@@ -680,6 +686,7 @@ static struct ata_port_operations opti82c46x_port_ops = {
680 .thaw = ata_bmdma_thaw, 686 .thaw = ata_bmdma_thaw,
681 .error_handler = ata_bmdma_error_handler, 687 .error_handler = ata_bmdma_error_handler,
682 .post_internal_cmd = ata_bmdma_post_internal_cmd, 688 .post_internal_cmd = ata_bmdma_post_internal_cmd,
689 .cable_detect = ata_cable_40wire,
683 690
684 .qc_prep = ata_qc_prep, 691 .qc_prep = ata_qc_prep,
685 .qc_issue = opti82c46x_qc_issue_prot, 692 .qc_issue = opti82c46x_qc_issue_prot,
@@ -709,7 +716,8 @@ static struct ata_port_operations opti82c46x_port_ops = {
709static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl, int irq) 716static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl, int irq)
710{ 717{
711 struct legacy_data *ld = &legacy_data[nr_legacy_host]; 718 struct legacy_data *ld = &legacy_data[nr_legacy_host];
712 struct ata_probe_ent ae; 719 struct ata_host *host;
720 struct ata_port *ap;
713 struct platform_device *pdev; 721 struct platform_device *pdev;
714 struct ata_port_operations *ops = &legacy_port_ops; 722 struct ata_port_operations *ops = &legacy_port_ops;
715 void __iomem *io_addr, *ctrl_addr; 723 void __iomem *io_addr, *ctrl_addr;
@@ -791,24 +799,23 @@ static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl
791 if (ops == &legacy_port_ops && (autospeed & mask)) 799 if (ops == &legacy_port_ops && (autospeed & mask))
792 ops = &simple_port_ops; 800 ops = &simple_port_ops;
793 801
794 memset(&ae, 0, sizeof(struct ata_probe_ent)); 802 ret = -ENOMEM;
795 INIT_LIST_HEAD(&ae.node); 803 host = ata_host_alloc(&pdev->dev, 1);
796 ae.dev = &pdev->dev; 804 if (!host)
797 ae.port_ops = ops; 805 goto fail;
798 ae.sht = &legacy_sht; 806 ap = host->ports[0];
799 ae.n_ports = 1; 807
800 ae.pio_mask = pio_modes; 808 ap->ops = ops;
801 ae.irq = irq; 809 ap->pio_mask = pio_modes;
802 ae.irq_flags = 0; 810 ap->flags |= ATA_FLAG_SLAVE_POSS | iordy;
803 ae.port_flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST|iordy; 811 ap->ioaddr.cmd_addr = io_addr;
804 ae.port[0].cmd_addr = io_addr; 812 ap->ioaddr.altstatus_addr = ctrl_addr;
805 ae.port[0].altstatus_addr = ctrl_addr; 813 ap->ioaddr.ctl_addr = ctrl_addr;
806 ae.port[0].ctl_addr = ctrl_addr; 814 ata_std_ports(&ap->ioaddr);
807 ata_std_ports(&ae.port[0]); 815 ap->private_data = ld;
808 ae.private_data = ld; 816
809 817 ret = ata_host_activate(host, irq, ata_interrupt, 0, &legacy_sht);
810 ret = -ENODEV; 818 if (ret)
811 if (!ata_device_add(&ae))
812 goto fail; 819 goto fail;
813 820
814 legacy_host[nr_legacy_host++] = dev_get_drvdata(&pdev->dev); 821 legacy_host[nr_legacy_host++] = dev_get_drvdata(&pdev->dev);
diff --git a/drivers/ata/pata_marvell.c b/drivers/ata/pata_marvell.c
index 6dd7c4ef3e66..d9b94a1b6954 100644
--- a/drivers/ata/pata_marvell.c
+++ b/drivers/ata/pata_marvell.c
@@ -20,7 +20,7 @@
20#include <linux/ata.h> 20#include <linux/ata.h>
21 21
22#define DRV_NAME "pata_marvell" 22#define DRV_NAME "pata_marvell"
23#define DRV_VERSION "0.1.1" 23#define DRV_VERSION "0.1.4"
24 24
25/** 25/**
26 * marvell_pre_reset - check for 40/80 pin 26 * marvell_pre_reset - check for 40/80 pin
@@ -52,22 +52,23 @@ static int marvell_pre_reset(struct ata_port *ap)
52 if ((pdev->device == 0x6145) && (ap->port_no == 0) && 52 if ((pdev->device == 0x6145) && (ap->port_no == 0) &&
53 (!(devices & 0x10))) /* PATA enable ? */ 53 (!(devices & 0x10))) /* PATA enable ? */
54 return -ENOENT; 54 return -ENOENT;
55 return ata_std_prereset(ap);
56}
55 57
58static int marvell_cable_detect(struct ata_port *ap)
59{
56 /* Cable type */ 60 /* Cable type */
57 switch(ap->port_no) 61 switch(ap->port_no)
58 { 62 {
59 case 0: 63 case 0:
60 if (ioread8(ap->ioaddr.bmdma_addr + 1) & 1) 64 if (ioread8(ap->ioaddr.bmdma_addr + 1) & 1)
61 ap->cbl = ATA_CBL_PATA40; 65 return ATA_CBL_PATA40;
62 else 66 return ATA_CBL_PATA80;
63 ap->cbl = ATA_CBL_PATA80;
64 break;
65
66 case 1: /* Legacy SATA port */ 67 case 1: /* Legacy SATA port */
67 ap->cbl = ATA_CBL_SATA; 68 return ATA_CBL_SATA;
68 break;
69 } 69 }
70 return ata_std_prereset(ap); 70 BUG();
71 return 0; /* Our BUG macro needs the right markup */
71} 72}
72 73
73/** 74/**
@@ -123,6 +124,7 @@ static const struct ata_port_operations marvell_ops = {
123 .thaw = ata_bmdma_thaw, 124 .thaw = ata_bmdma_thaw,
124 .error_handler = marvell_error_handler, 125 .error_handler = marvell_error_handler,
125 .post_internal_cmd = ata_bmdma_post_internal_cmd, 126 .post_internal_cmd = ata_bmdma_post_internal_cmd,
127 .cable_detect = marvell_cable_detect,
126 128
127 /* BMDMA handling is PCI ATA format, use helpers */ 129 /* BMDMA handling is PCI ATA format, use helpers */
128 .bmdma_setup = ata_bmdma_setup, 130 .bmdma_setup = ata_bmdma_setup,
diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c
index 882c36eaf293..9587a89f9683 100644
--- a/drivers/ata/pata_mpc52xx.c
+++ b/drivers/ata/pata_mpc52xx.c
@@ -24,7 +24,7 @@
24 24
25 25
26#define DRV_NAME "mpc52xx_ata" 26#define DRV_NAME "mpc52xx_ata"
27#define DRV_VERSION "0.1.0" 27#define DRV_VERSION "0.1.0ac2"
28 28
29 29
30/* Private structures used by the driver */ 30/* Private structures used by the driver */
@@ -297,38 +297,37 @@ static struct ata_port_operations mpc52xx_ata_port_ops = {
297 .freeze = ata_bmdma_freeze, 297 .freeze = ata_bmdma_freeze,
298 .thaw = ata_bmdma_thaw, 298 .thaw = ata_bmdma_thaw,
299 .error_handler = mpc52xx_ata_error_handler, 299 .error_handler = mpc52xx_ata_error_handler,
300 .cable_detect = ata_cable_40wire,
300 .qc_prep = ata_qc_prep, 301 .qc_prep = ata_qc_prep,
301 .qc_issue = ata_qc_issue_prot, 302 .qc_issue = ata_qc_issue_prot,
302 .data_xfer = ata_data_xfer, 303 .data_xfer = ata_data_xfer,
303 .irq_handler = ata_interrupt,
304 .irq_clear = ata_bmdma_irq_clear, 304 .irq_clear = ata_bmdma_irq_clear,
305 .irq_on = ata_irq_on, 305 .irq_on = ata_irq_on,
306 .irq_ack = ata_irq_ack, 306 .irq_ack = ata_irq_ack,
307 .port_start = ata_port_start, 307 .port_start = ata_port_start,
308}; 308};
309 309
310static struct ata_probe_ent mpc52xx_ata_probe_ent = {
311 .port_ops = &mpc52xx_ata_port_ops,
312 .sht = &mpc52xx_ata_sht,
313 .n_ports = 1,
314 .pio_mask = 0x1f, /* Up to PIO4 */
315 .mwdma_mask = 0x00, /* No MWDMA */
316 .udma_mask = 0x00, /* No UDMA */
317 .port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
318 .irq_flags = 0,
319};
320
321static int __devinit 310static int __devinit
322mpc52xx_ata_init_one(struct device *dev, struct mpc52xx_ata_priv *priv) 311mpc52xx_ata_init_one(struct device *dev, struct mpc52xx_ata_priv *priv)
323{ 312{
324 struct ata_probe_ent *ae = &mpc52xx_ata_probe_ent; 313 struct ata_host *host;
325 struct ata_ioports *aio = &ae->port[0]; 314 struct ata_port *ap;
326 int rv; 315 struct ata_ioports *aio;
327 316 int rc;
328 INIT_LIST_HEAD(&ae->node); 317
329 ae->dev = dev; 318 host = ata_host_alloc(dev, 1);
330 ae->irq = priv->ata_irq; 319 if (!host)
331 320 return -ENOMEM;
321
322 ap = host->ports[0];
323 ap->flags |= ATA_FLAG_SLAVE_POSS;
324 ap->pio_mask = 0x1f; /* Up to PIO4 */
325 ap->mwdma_mask = 0x00; /* No MWDMA */
326 ap->udma_mask = 0x00; /* No UDMA */
327 ap->ops = &mpc52xx_ata_port_ops;
328 host->private_data = priv;
329
330 aio = &ap->ioaddr;
332 aio->cmd_addr = NULL; /* Don't have a classic reg block */ 331 aio->cmd_addr = NULL; /* Don't have a classic reg block */
333 aio->altstatus_addr = &priv->ata_regs->tf_control; 332 aio->altstatus_addr = &priv->ata_regs->tf_control;
334 aio->ctl_addr = &priv->ata_regs->tf_control; 333 aio->ctl_addr = &priv->ata_regs->tf_control;
@@ -343,11 +342,9 @@ mpc52xx_ata_init_one(struct device *dev, struct mpc52xx_ata_priv *priv)
343 aio->status_addr = &priv->ata_regs->tf_command; 342 aio->status_addr = &priv->ata_regs->tf_command;
344 aio->command_addr = &priv->ata_regs->tf_command; 343 aio->command_addr = &priv->ata_regs->tf_command;
345 344
346 ae->private_data = priv; 345 /* activate host */
347 346 return ata_host_activate(host, priv->ata_irq, ata_interrupt, 0,
348 rv = ata_device_add(ae); 347 &mpc52xx_ata_sht);
349
350 return rv ? 0 : -EINVAL;
351} 348}
352 349
353static struct mpc52xx_ata_priv * 350static struct mpc52xx_ata_priv *
diff --git a/drivers/ata/pata_mpiix.c b/drivers/ata/pata_mpiix.c
index 4abe45ac19a2..987c5fafab08 100644
--- a/drivers/ata/pata_mpiix.c
+++ b/drivers/ata/pata_mpiix.c
@@ -35,7 +35,7 @@
35#include <linux/libata.h> 35#include <linux/libata.h>
36 36
37#define DRV_NAME "pata_mpiix" 37#define DRV_NAME "pata_mpiix"
38#define DRV_VERSION "0.7.5" 38#define DRV_VERSION "0.7.6"
39 39
40enum { 40enum {
41 IDETIM = 0x6C, /* IDE control register */ 41 IDETIM = 0x6C, /* IDE control register */
@@ -53,7 +53,6 @@ static int mpiix_pre_reset(struct ata_port *ap)
53 53
54 if (!pci_test_config_bits(pdev, &mpiix_enable_bits)) 54 if (!pci_test_config_bits(pdev, &mpiix_enable_bits))
55 return -ENOENT; 55 return -ENOENT;
56 ap->cbl = ATA_CBL_PATA40;
57 return ata_std_prereset(ap); 56 return ata_std_prereset(ap);
58} 57}
59 58
@@ -185,12 +184,12 @@ static struct ata_port_operations mpiix_port_ops = {
185 .thaw = ata_bmdma_thaw, 184 .thaw = ata_bmdma_thaw,
186 .error_handler = mpiix_error_handler, 185 .error_handler = mpiix_error_handler,
187 .post_internal_cmd = ata_bmdma_post_internal_cmd, 186 .post_internal_cmd = ata_bmdma_post_internal_cmd,
187 .cable_detect = ata_cable_40wire,
188 188
189 .qc_prep = ata_qc_prep, 189 .qc_prep = ata_qc_prep,
190 .qc_issue = mpiix_qc_issue_prot, 190 .qc_issue = mpiix_qc_issue_prot,
191 .data_xfer = ata_data_xfer, 191 .data_xfer = ata_data_xfer,
192 192
193 .irq_handler = ata_interrupt,
194 .irq_clear = ata_bmdma_irq_clear, 193 .irq_clear = ata_bmdma_irq_clear,
195 .irq_on = ata_irq_on, 194 .irq_on = ata_irq_on,
196 .irq_ack = ata_irq_ack, 195 .irq_ack = ata_irq_ack,
@@ -201,8 +200,9 @@ static struct ata_port_operations mpiix_port_ops = {
201static int mpiix_init_one(struct pci_dev *dev, const struct pci_device_id *id) 200static int mpiix_init_one(struct pci_dev *dev, const struct pci_device_id *id)
202{ 201{
203 /* Single threaded by the PCI probe logic */ 202 /* Single threaded by the PCI probe logic */
204 static struct ata_probe_ent probe;
205 static int printed_version; 203 static int printed_version;
204 struct ata_host *host;
205 struct ata_port *ap;
206 void __iomem *cmd_addr, *ctl_addr; 206 void __iomem *cmd_addr, *ctl_addr;
207 u16 idetim; 207 u16 idetim;
208 int irq; 208 int irq;
@@ -210,6 +210,10 @@ static int mpiix_init_one(struct pci_dev *dev, const struct pci_device_id *id)
210 if (!printed_version++) 210 if (!printed_version++)
211 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n"); 211 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
212 212
213 host = ata_host_alloc(&dev->dev, 1);
214 if (!host)
215 return -ENOMEM;
216
213 /* MPIIX has many functions which can be turned on or off according 217 /* MPIIX has many functions which can be turned on or off according
214 to other devices present. Make sure IDE is enabled before we try 218 to other devices present. Make sure IDE is enabled before we try
215 and use it */ 219 and use it */
@@ -238,27 +242,21 @@ static int mpiix_init_one(struct pci_dev *dev, const struct pci_device_id *id)
238 without BARs set fools the setup. #2 If you pci_disable_device 242 without BARs set fools the setup. #2 If you pci_disable_device
239 the MPIIX your box goes castors up */ 243 the MPIIX your box goes castors up */
240 244
241 INIT_LIST_HEAD(&probe.node); 245 ap = host->ports[0];
242 probe.dev = pci_dev_to_dev(dev); 246 ap->ops = &mpiix_port_ops;
243 probe.port_ops = &mpiix_port_ops; 247 ap->pio_mask = 0x1F;
244 probe.sht = &mpiix_sht; 248 ap->flags |= ATA_FLAG_SLAVE_POSS;
245 probe.pio_mask = 0x1F;
246 probe.irq_flags = IRQF_SHARED;
247 probe.port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST;
248 probe.n_ports = 1;
249 249
250 probe.irq = irq; 250 ap->ioaddr.cmd_addr = cmd_addr;
251 probe.port[0].cmd_addr = cmd_addr; 251 ap->ioaddr.ctl_addr = ctl_addr;
252 probe.port[0].ctl_addr = ctl_addr; 252 ap->ioaddr.altstatus_addr = ctl_addr;
253 probe.port[0].altstatus_addr = ctl_addr;
254 253
255 /* Let libata fill in the port details */ 254 /* Let libata fill in the port details */
256 ata_std_ports(&probe.port[0]); 255 ata_std_ports(&ap->ioaddr);
257 256
258 /* Now add the port that is active */ 257 /* activate host */
259 if (ata_device_add(&probe)) 258 return ata_host_activate(host, irq, ata_interrupt, IRQF_SHARED,
260 return 0; 259 &mpiix_sht);
261 return -ENODEV;
262} 260}
263 261
264static const struct pci_device_id mpiix[] = { 262static const struct pci_device_id mpiix[] = {
diff --git a/drivers/ata/pata_netcell.c b/drivers/ata/pata_netcell.c
index 38f99b38a5ea..dbba5b77d79c 100644
--- a/drivers/ata/pata_netcell.c
+++ b/drivers/ata/pata_netcell.c
@@ -16,33 +16,7 @@
16#include <linux/ata.h> 16#include <linux/ata.h>
17 17
18#define DRV_NAME "pata_netcell" 18#define DRV_NAME "pata_netcell"
19#define DRV_VERSION "0.1.6" 19#define DRV_VERSION "0.1.7"
20
21/**
22 * netcell_probe_init - check for 40/80 pin
23 * @ap: Port
24 *
25 * Cables are handled by the RAID controller. Report 80 pin.
26 */
27
28static int netcell_pre_reset(struct ata_port *ap)
29{
30 ap->cbl = ATA_CBL_PATA80;
31 return ata_std_prereset(ap);
32}
33
34/**
35 * netcell_probe_reset - Probe specified port on PATA host controller
36 * @ap: Port to probe
37 *
38 * LOCKING:
39 * None (inherited from caller).
40 */
41
42static void netcell_error_handler(struct ata_port *ap)
43{
44 return ata_bmdma_drive_eh(ap, netcell_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
45}
46 20
47/* No PIO or DMA methods needed for this device */ 21/* No PIO or DMA methods needed for this device */
48 22
@@ -81,8 +55,9 @@ static const struct ata_port_operations netcell_ops = {
81 55
82 .freeze = ata_bmdma_freeze, 56 .freeze = ata_bmdma_freeze,
83 .thaw = ata_bmdma_thaw, 57 .thaw = ata_bmdma_thaw,
84 .error_handler = netcell_error_handler, 58 .error_handler = ata_bmdma_error_handler,
85 .post_internal_cmd = ata_bmdma_post_internal_cmd, 59 .post_internal_cmd = ata_bmdma_post_internal_cmd,
60 .cable_detect = ata_cable_80wire,
86 61
87 /* BMDMA handling is PCI ATA format, use helpers */ 62 /* BMDMA handling is PCI ATA format, use helpers */
88 .bmdma_setup = ata_bmdma_setup, 63 .bmdma_setup = ata_bmdma_setup,
diff --git a/drivers/ata/pata_ns87410.c b/drivers/ata/pata_ns87410.c
index 9944a28daa9c..078aeda9cf8d 100644
--- a/drivers/ata/pata_ns87410.c
+++ b/drivers/ata/pata_ns87410.c
@@ -28,13 +28,13 @@
28#include <linux/libata.h> 28#include <linux/libata.h>
29 29
30#define DRV_NAME "pata_ns87410" 30#define DRV_NAME "pata_ns87410"
31#define DRV_VERSION "0.4.3" 31#define DRV_VERSION "0.4.6"
32 32
33/** 33/**
34 * ns87410_pre_reset - probe begin 34 * ns87410_pre_reset - probe begin
35 * @ap: ATA port 35 * @ap: ATA port
36 * 36 *
37 * Set up cable type and use generic probe init 37 * Check enabled ports
38 */ 38 */
39 39
40static int ns87410_pre_reset(struct ata_port *ap) 40static int ns87410_pre_reset(struct ata_port *ap)
@@ -47,7 +47,6 @@ static int ns87410_pre_reset(struct ata_port *ap)
47 47
48 if (!pci_test_config_bits(pdev, &ns87410_enable_bits[ap->port_no])) 48 if (!pci_test_config_bits(pdev, &ns87410_enable_bits[ap->port_no]))
49 return -ENOENT; 49 return -ENOENT;
50 ap->cbl = ATA_CBL_PATA40;
51 return ata_std_prereset(ap); 50 return ata_std_prereset(ap);
52} 51}
53 52
@@ -177,6 +176,7 @@ static struct ata_port_operations ns87410_port_ops = {
177 .thaw = ata_bmdma_thaw, 176 .thaw = ata_bmdma_thaw,
178 .error_handler = ns87410_error_handler, 177 .error_handler = ns87410_error_handler,
179 .post_internal_cmd = ata_bmdma_post_internal_cmd, 178 .post_internal_cmd = ata_bmdma_post_internal_cmd,
179 .cable_detect = ata_cable_40wire,
180 180
181 .qc_prep = ata_qc_prep, 181 .qc_prep = ata_qc_prep,
182 .qc_issue = ns87410_qc_issue_prot, 182 .qc_issue = ns87410_qc_issue_prot,
diff --git a/drivers/ata/pata_oldpiix.c b/drivers/ata/pata_oldpiix.c
index da68cd19efd6..dea4690340d1 100644
--- a/drivers/ata/pata_oldpiix.c
+++ b/drivers/ata/pata_oldpiix.c
@@ -25,7 +25,7 @@
25#include <linux/ata.h> 25#include <linux/ata.h>
26 26
27#define DRV_NAME "pata_oldpiix" 27#define DRV_NAME "pata_oldpiix"
28#define DRV_VERSION "0.5.4" 28#define DRV_VERSION "0.5.5"
29 29
30/** 30/**
31 * oldpiix_pre_reset - probe begin 31 * oldpiix_pre_reset - probe begin
@@ -44,7 +44,6 @@ static int oldpiix_pre_reset(struct ata_port *ap)
44 44
45 if (!pci_test_config_bits(pdev, &oldpiix_enable_bits[ap->port_no])) 45 if (!pci_test_config_bits(pdev, &oldpiix_enable_bits[ap->port_no]))
46 return -ENOENT; 46 return -ENOENT;
47 ap->cbl = ATA_CBL_PATA40;
48 return ata_std_prereset(ap); 47 return ata_std_prereset(ap);
49} 48}
50 49
@@ -65,7 +64,7 @@ static void oldpiix_pata_error_handler(struct ata_port *ap)
65/** 64/**
66 * oldpiix_set_piomode - Initialize host controller PATA PIO timings 65 * oldpiix_set_piomode - Initialize host controller PATA PIO timings
67 * @ap: Port whose timings we are configuring 66 * @ap: Port whose timings we are configuring
68 * @adev: um 67 * @adev: Device whose timings we are configuring
69 * 68 *
70 * Set PIO mode for device, in host controller PCI config space. 69 * Set PIO mode for device, in host controller PCI config space.
71 * 70 *
@@ -255,6 +254,7 @@ static const struct ata_port_operations oldpiix_pata_ops = {
255 .thaw = ata_bmdma_thaw, 254 .thaw = ata_bmdma_thaw,
256 .error_handler = oldpiix_pata_error_handler, 255 .error_handler = oldpiix_pata_error_handler,
257 .post_internal_cmd = ata_bmdma_post_internal_cmd, 256 .post_internal_cmd = ata_bmdma_post_internal_cmd,
257 .cable_detect = ata_cable_40wire,
258 258
259 .bmdma_setup = ata_bmdma_setup, 259 .bmdma_setup = ata_bmdma_setup,
260 .bmdma_start = ata_bmdma_start, 260 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_opti.c b/drivers/ata/pata_opti.c
index 3fd3a35c2241..13b63e21838d 100644
--- a/drivers/ata/pata_opti.c
+++ b/drivers/ata/pata_opti.c
@@ -34,7 +34,7 @@
34#include <linux/libata.h> 34#include <linux/libata.h>
35 35
36#define DRV_NAME "pata_opti" 36#define DRV_NAME "pata_opti"
37#define DRV_VERSION "0.2.8" 37#define DRV_VERSION "0.2.9"
38 38
39enum { 39enum {
40 READ_REG = 0, /* index of Read cycle timing register */ 40 READ_REG = 0, /* index of Read cycle timing register */
@@ -61,8 +61,6 @@ static int opti_pre_reset(struct ata_port *ap)
61 61
62 if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no])) 62 if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
63 return -ENOENT; 63 return -ENOENT;
64
65 ap->cbl = ATA_CBL_PATA40;
66 return ata_std_prereset(ap); 64 return ata_std_prereset(ap);
67} 65}
68 66
@@ -198,6 +196,7 @@ static struct ata_port_operations opti_port_ops = {
198 .thaw = ata_bmdma_thaw, 196 .thaw = ata_bmdma_thaw,
199 .error_handler = opti_error_handler, 197 .error_handler = opti_error_handler,
200 .post_internal_cmd = ata_bmdma_post_internal_cmd, 198 .post_internal_cmd = ata_bmdma_post_internal_cmd,
199 .cable_detect = ata_cable_40wire,
201 200
202 .bmdma_setup = ata_bmdma_setup, 201 .bmdma_setup = ata_bmdma_setup,
203 .bmdma_start = ata_bmdma_start, 202 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_optidma.c b/drivers/ata/pata_optidma.c
index 9764907e8a13..b70e04c144df 100644
--- a/drivers/ata/pata_optidma.c
+++ b/drivers/ata/pata_optidma.c
@@ -33,7 +33,7 @@
33#include <linux/libata.h> 33#include <linux/libata.h>
34 34
35#define DRV_NAME "pata_optidma" 35#define DRV_NAME "pata_optidma"
36#define DRV_VERSION "0.2.4" 36#define DRV_VERSION "0.3.2"
37 37
38enum { 38enum {
39 READ_REG = 0, /* index of Read cycle timing register */ 39 READ_REG = 0, /* index of Read cycle timing register */
@@ -62,7 +62,6 @@ static int optidma_pre_reset(struct ata_port *ap)
62 if (ap->port_no && !pci_test_config_bits(pdev, &optidma_enable_bits)) 62 if (ap->port_no && !pci_test_config_bits(pdev, &optidma_enable_bits))
63 return -ENOENT; 63 return -ENOENT;
64 64
65 ap->cbl = ATA_CBL_PATA40;
66 return ata_std_prereset(ap); 65 return ata_std_prereset(ap);
67} 66}
68 67
@@ -115,7 +114,7 @@ static void optidma_lock(struct ata_port *ap)
115} 114}
116 115
117/** 116/**
118 * optidma_set_mode - set mode data 117 * optidma_mode_setup - set mode data
119 * @ap: ATA interface 118 * @ap: ATA interface
120 * @adev: ATA device 119 * @adev: ATA device
121 * @mode: Mode to set 120 * @mode: Mode to set
@@ -128,7 +127,7 @@ static void optidma_lock(struct ata_port *ap)
128 * IRQ here we depend on the host set locking to avoid catastrophe. 127 * IRQ here we depend on the host set locking to avoid catastrophe.
129 */ 128 */
130 129
131static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mode) 130static void optidma_mode_setup(struct ata_port *ap, struct ata_device *adev, u8 mode)
132{ 131{
133 struct ata_device *pair = ata_dev_pair(adev); 132 struct ata_device *pair = ata_dev_pair(adev);
134 int pio = adev->pio_mode - XFER_PIO_0; 133 int pio = adev->pio_mode - XFER_PIO_0;
@@ -202,7 +201,7 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo
202} 201}
203 202
204/** 203/**
205 * optiplus_set_mode - DMA setup for Firestar Plus 204 * optiplus_mode_setup - DMA setup for Firestar Plus
206 * @ap: ATA port 205 * @ap: ATA port
207 * @adev: device 206 * @adev: device
208 * @mode: desired mode 207 * @mode: desired mode
@@ -213,7 +212,7 @@ static void optidma_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo
213 * one 212 * one
214 */ 213 */
215 214
216static void optiplus_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mode) 215static void optiplus_mode_setup(struct ata_port *ap, struct ata_device *adev, u8 mode)
217{ 216{
218 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 217 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
219 u8 udcfg; 218 u8 udcfg;
@@ -225,7 +224,7 @@ static void optiplus_set_mode(struct ata_port *ap, struct ata_device *adev, u8 m
225 pci_read_config_byte(pdev, 0x44, &udcfg); 224 pci_read_config_byte(pdev, 0x44, &udcfg);
226 if (mode <= XFER_UDMA_0) { 225 if (mode <= XFER_UDMA_0) {
227 udcfg &= ~(1 << unit); 226 udcfg &= ~(1 << unit);
228 optidma_set_mode(ap, adev, adev->dma_mode); 227 optidma_mode_setup(ap, adev, adev->dma_mode);
229 } else { 228 } else {
230 udcfg |= (1 << unit); 229 udcfg |= (1 << unit);
231 if (ap->port_no) { 230 if (ap->port_no) {
@@ -253,7 +252,7 @@ static void optiplus_set_mode(struct ata_port *ap, struct ata_device *adev, u8 m
253 252
254static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev) 253static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
255{ 254{
256 optidma_set_mode(ap, adev, adev->pio_mode); 255 optidma_mode_setup(ap, adev, adev->pio_mode);
257} 256}
258 257
259/** 258/**
@@ -268,7 +267,7 @@ static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
268 267
269static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev) 268static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
270{ 269{
271 optidma_set_mode(ap, adev, adev->dma_mode); 270 optidma_mode_setup(ap, adev, adev->dma_mode);
272} 271}
273 272
274/** 273/**
@@ -283,7 +282,7 @@ static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
283 282
284static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev) 283static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
285{ 284{
286 optiplus_set_mode(ap, adev, adev->pio_mode); 285 optiplus_mode_setup(ap, adev, adev->pio_mode);
287} 286}
288 287
289/** 288/**
@@ -298,7 +297,7 @@ static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
298 297
299static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev) 298static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
300{ 299{
301 optiplus_set_mode(ap, adev, adev->dma_mode); 300 optiplus_mode_setup(ap, adev, adev->dma_mode);
302} 301}
303 302
304/** 303/**
@@ -322,26 +321,29 @@ static u8 optidma_make_bits43(struct ata_device *adev)
322} 321}
323 322
324/** 323/**
325 * optidma_post_set_mode - finalize PCI setup 324 * optidma_set_mode - mode setup
326 * @ap: port to set up 325 * @ap: port to set up
327 * 326 *
328 * Finalise the configuration by writing the nibble of extra bits 327 * Use the standard setup to tune the chipset and then finalise the
329 * of data into the chip. 328 * configuration by writing the nibble of extra bits of data into
329 * the chip.
330 */ 330 */
331 331
332static void optidma_post_set_mode(struct ata_port *ap) 332static int optidma_set_mode(struct ata_port *ap, struct ata_device **r_failed)
333{ 333{
334 u8 r; 334 u8 r;
335 int nybble = 4 * ap->port_no; 335 int nybble = 4 * ap->port_no;
336 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 336 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
337 337 int rc = ata_do_set_mode(ap, r_failed);
338 pci_read_config_byte(pdev, 0x43, &r); 338 if (rc == 0) {
339 339 pci_read_config_byte(pdev, 0x43, &r);
340 r &= (0x0F << nybble); 340
341 r |= (optidma_make_bits43(&ap->device[0]) + 341 r &= (0x0F << nybble);
342 (optidma_make_bits43(&ap->device[0]) << 2)) << nybble; 342 r |= (optidma_make_bits43(&ap->device[0]) +
343 343 (optidma_make_bits43(&ap->device[0]) << 2)) << nybble;
344 pci_write_config_byte(pdev, 0x43, r); 344 pci_write_config_byte(pdev, 0x43, r);
345 }
346 return rc;
345} 347}
346 348
347static struct scsi_host_template optidma_sht = { 349static struct scsi_host_template optidma_sht = {
@@ -381,7 +383,8 @@ static struct ata_port_operations optidma_port_ops = {
381 .thaw = ata_bmdma_thaw, 383 .thaw = ata_bmdma_thaw,
382 .post_internal_cmd = ata_bmdma_post_internal_cmd, 384 .post_internal_cmd = ata_bmdma_post_internal_cmd,
383 .error_handler = optidma_error_handler, 385 .error_handler = optidma_error_handler,
384 .post_set_mode = optidma_post_set_mode, 386 .set_mode = optidma_set_mode,
387 .cable_detect = ata_cable_40wire,
385 388
386 .bmdma_setup = ata_bmdma_setup, 389 .bmdma_setup = ata_bmdma_setup,
387 .bmdma_start = ata_bmdma_start, 390 .bmdma_start = ata_bmdma_start,
@@ -416,7 +419,8 @@ static struct ata_port_operations optiplus_port_ops = {
416 .thaw = ata_bmdma_thaw, 419 .thaw = ata_bmdma_thaw,
417 .post_internal_cmd = ata_bmdma_post_internal_cmd, 420 .post_internal_cmd = ata_bmdma_post_internal_cmd,
418 .error_handler = optidma_error_handler, 421 .error_handler = optidma_error_handler,
419 .post_set_mode = optidma_post_set_mode, 422 .set_mode = optidma_set_mode,
423 .cable_detect = ata_cable_40wire,
420 424
421 .bmdma_setup = ata_bmdma_setup, 425 .bmdma_setup = ata_bmdma_setup,
422 .bmdma_start = ata_bmdma_start, 426 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c
index 103720f873c8..75dc84797ff3 100644
--- a/drivers/ata/pata_pcmcia.c
+++ b/drivers/ata/pata_pcmcia.c
@@ -42,7 +42,7 @@
42 42
43 43
44#define DRV_NAME "pata_pcmcia" 44#define DRV_NAME "pata_pcmcia"
45#define DRV_VERSION "0.3.0" 45#define DRV_VERSION "0.3.1"
46 46
47/* 47/*
48 * Private data structure to glue stuff together 48 * Private data structure to glue stuff together
@@ -54,6 +54,39 @@ struct ata_pcmcia_info {
54 dev_node_t node; 54 dev_node_t node;
55}; 55};
56 56
57/**
58 * pcmcia_set_mode - PCMCIA specific mode setup
59 * @ap: Port
60 * @r_failed_dev: Return pointer for failed device
61 *
62 * Perform the tuning and setup of the devices and timings, which
63 * for PCMCIA is the same as any other controller. We wrap it however
64 * as we need to spot hardware with incorrect or missing master/slave
65 * decode, which alas is embarrassingly common in the PC world
66 */
67
68static int pcmcia_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
69{
70 struct ata_device *master = &ap->device[0];
71 struct ata_device *slave = &ap->device[1];
72
73 if (!ata_dev_enabled(master) || !ata_dev_enabled(slave))
74 return ata_do_set_mode(ap, r_failed_dev);
75
76 if (memcmp(master->id + ATA_ID_FW_REV, slave->id + ATA_ID_FW_REV,
77 ATA_ID_FW_REV_LEN + ATA_ID_PROD_LEN) == 0)
78 {
79 /* Suspicious match, but could be two cards from
80 the same vendor - check serial */
81 if (memcmp(master->id + ATA_ID_SERNO, slave->id + ATA_ID_SERNO,
82 ATA_ID_SERNO_LEN) == 0 && master->id[ATA_ID_SERNO] >> 8) {
83 ata_dev_printk(slave, KERN_WARNING, "is a ghost device, ignoring.\n");
84 ata_dev_disable(slave);
85 }
86 }
87 return ata_do_set_mode(ap, r_failed_dev);
88}
89
57static struct scsi_host_template pcmcia_sht = { 90static struct scsi_host_template pcmcia_sht = {
58 .module = THIS_MODULE, 91 .module = THIS_MODULE,
59 .name = DRV_NAME, 92 .name = DRV_NAME,
@@ -73,6 +106,7 @@ static struct scsi_host_template pcmcia_sht = {
73}; 106};
74 107
75static struct ata_port_operations pcmcia_port_ops = { 108static struct ata_port_operations pcmcia_port_ops = {
109 .set_mode = pcmcia_set_mode,
76 .port_disable = ata_port_disable, 110 .port_disable = ata_port_disable,
77 .tf_load = ata_tf_load, 111 .tf_load = ata_tf_load,
78 .tf_read = ata_tf_read, 112 .tf_read = ata_tf_read,
@@ -84,13 +118,13 @@ static struct ata_port_operations pcmcia_port_ops = {
84 .thaw = ata_bmdma_thaw, 118 .thaw = ata_bmdma_thaw,
85 .error_handler = ata_bmdma_error_handler, 119 .error_handler = ata_bmdma_error_handler,
86 .post_internal_cmd = ata_bmdma_post_internal_cmd, 120 .post_internal_cmd = ata_bmdma_post_internal_cmd,
121 .cable_detect = ata_cable_40wire,
87 122
88 .qc_prep = ata_qc_prep, 123 .qc_prep = ata_qc_prep,
89 .qc_issue = ata_qc_issue_prot, 124 .qc_issue = ata_qc_issue_prot,
90 125
91 .data_xfer = ata_data_xfer_noirq, 126 .data_xfer = ata_data_xfer_noirq,
92 127
93 .irq_handler = ata_interrupt,
94 .irq_clear = ata_bmdma_irq_clear, 128 .irq_clear = ata_bmdma_irq_clear,
95 .irq_on = ata_irq_on, 129 .irq_on = ata_irq_on,
96 .irq_ack = ata_irq_ack, 130 .irq_ack = ata_irq_ack,
@@ -111,7 +145,8 @@ do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
111 145
112static int pcmcia_init_one(struct pcmcia_device *pdev) 146static int pcmcia_init_one(struct pcmcia_device *pdev)
113{ 147{
114 struct ata_probe_ent ae; 148 struct ata_host *host;
149 struct ata_port *ap;
115 struct ata_pcmcia_info *info; 150 struct ata_pcmcia_info *info;
116 tuple_t tuple; 151 tuple_t tuple;
117 struct { 152 struct {
@@ -255,24 +290,24 @@ next_entry:
255 * Having done the PCMCIA plumbing the ATA side is relatively 290 * Having done the PCMCIA plumbing the ATA side is relatively
256 * sane. 291 * sane.
257 */ 292 */
258 293 ret = -ENOMEM;
259 memset(&ae, 0, sizeof(struct ata_probe_ent)); 294 host = ata_host_alloc(&pdev->dev, 1);
260 INIT_LIST_HEAD(&ae.node); 295 if (!host)
261 ae.dev = &pdev->dev; 296 goto failed;
262 ae.port_ops = &pcmcia_port_ops; 297 ap = host->ports[0];
263 ae.sht = &pcmcia_sht; 298
264 ae.n_ports = 1; 299 ap->ops = &pcmcia_port_ops;
265 ae.pio_mask = 1; /* ISA so PIO 0 cycles */ 300 ap->pio_mask = 1; /* ISA so PIO 0 cycles */
266 ae.irq = pdev->irq.AssignedIRQ; 301 ap->flags |= ATA_FLAG_SLAVE_POSS;
267 ae.irq_flags = IRQF_SHARED; 302 ap->ioaddr.cmd_addr = io_addr;
268 ae.port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST; 303 ap->ioaddr.altstatus_addr = ctl_addr;
269 ae.port[0].cmd_addr = io_addr; 304 ap->ioaddr.ctl_addr = ctl_addr;
270 ae.port[0].altstatus_addr = ctl_addr; 305 ata_std_ports(&ap->ioaddr);
271 ae.port[0].ctl_addr = ctl_addr; 306
272 ata_std_ports(&ae.port[0]); 307 /* activate */
273 308 ret = ata_host_activate(host, pdev->irq.AssignedIRQ, ata_interrupt,
274 ret = -ENODEV; 309 IRQF_SHARED, &pcmcia_sht);
275 if (ata_device_add(&ae) == 0) 310 if (ret)
276 goto failed; 311 goto failed;
277 312
278 info->ndev = 1; 313 info->ndev = 1;
diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c
index 93bcdadb7be3..a61cbc110688 100644
--- a/drivers/ata/pata_pdc2027x.c
+++ b/drivers/ata/pata_pdc2027x.c
@@ -35,7 +35,7 @@
35#include <linux/libata.h> 35#include <linux/libata.h>
36 36
37#define DRV_NAME "pata_pdc2027x" 37#define DRV_NAME "pata_pdc2027x"
38#define DRV_VERSION "0.8" 38#define DRV_VERSION "0.9"
39#undef PDC_DEBUG 39#undef PDC_DEBUG
40 40
41#ifdef PDC_DEBUG 41#ifdef PDC_DEBUG
@@ -66,8 +66,10 @@ static int pdc2027x_init_one(struct pci_dev *pdev, const struct pci_device_id *e
66static void pdc2027x_error_handler(struct ata_port *ap); 66static void pdc2027x_error_handler(struct ata_port *ap);
67static void pdc2027x_set_piomode(struct ata_port *ap, struct ata_device *adev); 67static void pdc2027x_set_piomode(struct ata_port *ap, struct ata_device *adev);
68static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev); 68static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev);
69static void pdc2027x_post_set_mode(struct ata_port *ap);
70static int pdc2027x_check_atapi_dma(struct ata_queued_cmd *qc); 69static int pdc2027x_check_atapi_dma(struct ata_queued_cmd *qc);
70static unsigned long pdc2027x_mode_filter(struct ata_device *adev, unsigned long mask);
71static int pdc2027x_cable_detect(struct ata_port *ap);
72static int pdc2027x_set_mode(struct ata_port *ap, struct ata_device **r_failed);
71 73
72/* 74/*
73 * ATA Timing Tables based on 133MHz controller clock. 75 * ATA Timing Tables based on 133MHz controller clock.
@@ -146,6 +148,7 @@ static struct scsi_host_template pdc2027x_sht = {
146 148
147static struct ata_port_operations pdc2027x_pata100_ops = { 149static struct ata_port_operations pdc2027x_pata100_ops = {
148 .port_disable = ata_port_disable, 150 .port_disable = ata_port_disable,
151 .mode_filter = ata_pci_default_filter,
149 152
150 .tf_load = ata_tf_load, 153 .tf_load = ata_tf_load,
151 .tf_read = ata_tf_read, 154 .tf_read = ata_tf_read,
@@ -166,8 +169,8 @@ static struct ata_port_operations pdc2027x_pata100_ops = {
166 .thaw = ata_bmdma_thaw, 169 .thaw = ata_bmdma_thaw,
167 .error_handler = pdc2027x_error_handler, 170 .error_handler = pdc2027x_error_handler,
168 .post_internal_cmd = ata_bmdma_post_internal_cmd, 171 .post_internal_cmd = ata_bmdma_post_internal_cmd,
172 .cable_detect = pdc2027x_cable_detect,
169 173
170 .irq_handler = ata_interrupt,
171 .irq_clear = ata_bmdma_irq_clear, 174 .irq_clear = ata_bmdma_irq_clear,
172 .irq_on = ata_irq_on, 175 .irq_on = ata_irq_on,
173 .irq_ack = ata_irq_ack, 176 .irq_ack = ata_irq_ack,
@@ -179,7 +182,8 @@ static struct ata_port_operations pdc2027x_pata133_ops = {
179 .port_disable = ata_port_disable, 182 .port_disable = ata_port_disable,
180 .set_piomode = pdc2027x_set_piomode, 183 .set_piomode = pdc2027x_set_piomode,
181 .set_dmamode = pdc2027x_set_dmamode, 184 .set_dmamode = pdc2027x_set_dmamode,
182 .post_set_mode = pdc2027x_post_set_mode, 185 .set_mode = pdc2027x_set_mode,
186 .mode_filter = pdc2027x_mode_filter,
183 187
184 .tf_load = ata_tf_load, 188 .tf_load = ata_tf_load,
185 .tf_read = ata_tf_read, 189 .tf_read = ata_tf_read,
@@ -200,8 +204,8 @@ static struct ata_port_operations pdc2027x_pata133_ops = {
200 .thaw = ata_bmdma_thaw, 204 .thaw = ata_bmdma_thaw,
201 .error_handler = pdc2027x_error_handler, 205 .error_handler = pdc2027x_error_handler,
202 .post_internal_cmd = ata_bmdma_post_internal_cmd, 206 .post_internal_cmd = ata_bmdma_post_internal_cmd,
207 .cable_detect = pdc2027x_cable_detect,
203 208
204 .irq_handler = ata_interrupt,
205 .irq_clear = ata_bmdma_irq_clear, 209 .irq_clear = ata_bmdma_irq_clear,
206 .irq_on = ata_irq_on, 210 .irq_on = ata_irq_on,
207 .irq_ack = ata_irq_ack, 211 .irq_ack = ata_irq_ack,
@@ -212,7 +216,6 @@ static struct ata_port_operations pdc2027x_pata133_ops = {
212static struct ata_port_info pdc2027x_port_info[] = { 216static struct ata_port_info pdc2027x_port_info[] = {
213 /* PDC_UDMA_100 */ 217 /* PDC_UDMA_100 */
214 { 218 {
215 .sht = &pdc2027x_sht,
216 .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS | 219 .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS |
217 ATA_FLAG_MMIO, 220 ATA_FLAG_MMIO,
218 .pio_mask = 0x1f, /* pio0-4 */ 221 .pio_mask = 0x1f, /* pio0-4 */
@@ -222,7 +225,6 @@ static struct ata_port_info pdc2027x_port_info[] = {
222 }, 225 },
223 /* PDC_UDMA_133 */ 226 /* PDC_UDMA_133 */
224 { 227 {
225 .sht = &pdc2027x_sht,
226 .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS | 228 .flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS |
227 ATA_FLAG_MMIO, 229 ATA_FLAG_MMIO,
228 .pio_mask = 0x1f, /* pio0-4 */ 230 .pio_mask = 0x1f, /* pio0-4 */
@@ -261,7 +263,7 @@ static inline void __iomem *dev_mmio(struct ata_port *ap, struct ata_device *ade
261} 263}
262 264
263/** 265/**
264 * pdc2027x_pata_cbl_detect - Probe host controller cable detect info 266 * pdc2027x_pata_cable_detect - Probe host controller cable detect info
265 * @ap: Port for which cable detect info is desired 267 * @ap: Port for which cable detect info is desired
266 * 268 *
267 * Read 80c cable indicator from Promise extended register. 269 * Read 80c cable indicator from Promise extended register.
@@ -270,7 +272,7 @@ static inline void __iomem *dev_mmio(struct ata_port *ap, struct ata_device *ade
270 * LOCKING: 272 * LOCKING:
271 * None (inherited from caller). 273 * None (inherited from caller).
272 */ 274 */
273static void pdc2027x_cbl_detect(struct ata_port *ap) 275static int pdc2027x_cable_detect(struct ata_port *ap)
274{ 276{
275 u32 cgcr; 277 u32 cgcr;
276 278
@@ -281,13 +283,10 @@ static void pdc2027x_cbl_detect(struct ata_port *ap)
281 283
282 PDPRINTK("No cable or 80-conductor cable on port %d\n", ap->port_no); 284 PDPRINTK("No cable or 80-conductor cable on port %d\n", ap->port_no);
283 285
284 ap->cbl = ATA_CBL_PATA80; 286 return ATA_CBL_PATA80;
285 return;
286
287cbl40: 287cbl40:
288 printk(KERN_INFO DRV_NAME ": 40-conductor cable detected on port %d\n", ap->port_no); 288 printk(KERN_INFO DRV_NAME ": 40-conductor cable detected on port %d\n", ap->port_no);
289 ap->cbl = ATA_CBL_PATA40; 289 return ATA_CBL_PATA40;
290 ap->udma_mask &= ATA_UDMA_MASK_40C;
291} 290}
292 291
293/** 292/**
@@ -314,7 +313,6 @@ static int pdc2027x_prereset(struct ata_port *ap)
314 /* Check whether port enabled */ 313 /* Check whether port enabled */
315 if (!pdc2027x_port_enabled(ap)) 314 if (!pdc2027x_port_enabled(ap))
316 return -ENOENT; 315 return -ENOENT;
317 pdc2027x_cbl_detect(ap);
318 return ata_std_prereset(ap); 316 return ata_std_prereset(ap);
319} 317}
320 318
@@ -334,6 +332,32 @@ static void pdc2027x_error_handler(struct ata_port *ap)
334} 332}
335 333
336/** 334/**
335 * pdc2720x_mode_filter - mode selection filter
336 * @adev: ATA device
337 * @mask: list of modes proposed
338 *
339 * Block UDMA on devices that cause trouble with this controller.
340 */
341
342static unsigned long pdc2027x_mode_filter(struct ata_device *adev, unsigned long mask)
343{
344 unsigned char model_num[ATA_ID_PROD_LEN + 1];
345 struct ata_device *pair = ata_dev_pair(adev);
346
347 if (adev->class != ATA_DEV_ATA || adev->devno == 0 || pair == NULL)
348 return ata_pci_default_filter(adev, mask);
349
350 /* Check for slave of a Maxtor at UDMA6 */
351 ata_id_c_string(pair->id, model_num, ATA_ID_PROD,
352 ATA_ID_PROD_LEN + 1);
353 /* If the master is a maxtor in UDMA6 then the slave should not use UDMA 6 */
354 if(strstr(model_num, "Maxtor") == 0 && pair->dma_mode == XFER_UDMA_6)
355 mask &= ~ (1 << (6 + ATA_SHIFT_UDMA));
356
357 return ata_pci_default_filter(adev, mask);
358}
359
360/**
337 * pdc2027x_set_piomode - Initialize host controller PATA PIO timings 361 * pdc2027x_set_piomode - Initialize host controller PATA PIO timings
338 * @ap: Port to configure 362 * @ap: Port to configure
339 * @adev: um 363 * @adev: um
@@ -444,17 +468,22 @@ static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
444} 468}
445 469
446/** 470/**
447 * pdc2027x_post_set_mode - Set the timing registers back to correct values. 471 * pdc2027x_set_mode - Set the timing registers back to correct values.
448 * @ap: Port to configure 472 * @ap: Port to configure
473 * @r_failed: Returned device for failure
449 * 474 *
450 * The pdc2027x hardware will look at "SET FEATURES" and change the timing registers 475 * The pdc2027x hardware will look at "SET FEATURES" and change the timing registers
451 * automatically. The values set by the hardware might be incorrect, under 133Mhz PLL. 476 * automatically. The values set by the hardware might be incorrect, under 133Mhz PLL.
452 * This function overwrites the possibly incorrect values set by the hardware to be correct. 477 * This function overwrites the possibly incorrect values set by the hardware to be correct.
453 */ 478 */
454static void pdc2027x_post_set_mode(struct ata_port *ap) 479static int pdc2027x_set_mode(struct ata_port *ap, struct ata_device **r_failed)
455{ 480{
456 int i; 481 int i;
457 482
483 i = ata_do_set_mode(ap, r_failed);
484 if (i < 0)
485 return i;
486
458 for (i = 0; i < ATA_MAX_DEVICES; i++) { 487 for (i = 0; i < ATA_MAX_DEVICES; i++) {
459 struct ata_device *dev = &ap->device[i]; 488 struct ata_device *dev = &ap->device[i];
460 489
@@ -476,6 +505,7 @@ static void pdc2027x_post_set_mode(struct ata_port *ap)
476 } 505 }
477 } 506 }
478 } 507 }
508 return 0;
479} 509}
480 510
481/** 511/**
@@ -521,12 +551,12 @@ static int pdc2027x_check_atapi_dma(struct ata_queued_cmd *qc)
521 551
522/** 552/**
523 * pdc_read_counter - Read the ctr counter 553 * pdc_read_counter - Read the ctr counter
524 * @probe_ent: for the port address 554 * @host: target ATA host
525 */ 555 */
526 556
527static long pdc_read_counter(struct ata_probe_ent *probe_ent) 557static long pdc_read_counter(struct ata_host *host)
528{ 558{
529 void __iomem *mmio_base = probe_ent->iomap[PDC_MMIO_BAR]; 559 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
530 long counter; 560 long counter;
531 int retry = 1; 561 int retry = 1;
532 u32 bccrl, bccrh, bccrlv, bccrhv; 562 u32 bccrl, bccrh, bccrlv, bccrhv;
@@ -564,12 +594,12 @@ retry:
564 * adjust_pll - Adjust the PLL input clock in Hz. 594 * adjust_pll - Adjust the PLL input clock in Hz.
565 * 595 *
566 * @pdc_controller: controller specific information 596 * @pdc_controller: controller specific information
567 * @probe_ent: For the port address 597 * @host: target ATA host
568 * @pll_clock: The input of PLL in HZ 598 * @pll_clock: The input of PLL in HZ
569 */ 599 */
570static void pdc_adjust_pll(struct ata_probe_ent *probe_ent, long pll_clock, unsigned int board_idx) 600static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int board_idx)
571{ 601{
572 void __iomem *mmio_base = probe_ent->iomap[PDC_MMIO_BAR]; 602 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
573 u16 pll_ctl; 603 u16 pll_ctl;
574 long pll_clock_khz = pll_clock / 1000; 604 long pll_clock_khz = pll_clock / 1000;
575 long pout_required = board_idx? PDC_133_MHZ:PDC_100_MHZ; 605 long pout_required = board_idx? PDC_133_MHZ:PDC_100_MHZ;
@@ -649,19 +679,19 @@ static void pdc_adjust_pll(struct ata_probe_ent *probe_ent, long pll_clock, unsi
649 679
650/** 680/**
651 * detect_pll_input_clock - Detect the PLL input clock in Hz. 681 * detect_pll_input_clock - Detect the PLL input clock in Hz.
652 * @probe_ent: for the port address 682 * @host: target ATA host
653 * Ex. 16949000 on 33MHz PCI bus for pdc20275. 683 * Ex. 16949000 on 33MHz PCI bus for pdc20275.
654 * Half of the PCI clock. 684 * Half of the PCI clock.
655 */ 685 */
656static long pdc_detect_pll_input_clock(struct ata_probe_ent *probe_ent) 686static long pdc_detect_pll_input_clock(struct ata_host *host)
657{ 687{
658 void __iomem *mmio_base = probe_ent->iomap[PDC_MMIO_BAR]; 688 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
659 u32 scr; 689 u32 scr;
660 long start_count, end_count; 690 long start_count, end_count;
661 long pll_clock; 691 long pll_clock;
662 692
663 /* Read current counter value */ 693 /* Read current counter value */
664 start_count = pdc_read_counter(probe_ent); 694 start_count = pdc_read_counter(host);
665 695
666 /* Start the test mode */ 696 /* Start the test mode */
667 scr = readl(mmio_base + PDC_SYS_CTL); 697 scr = readl(mmio_base + PDC_SYS_CTL);
@@ -673,7 +703,7 @@ static long pdc_detect_pll_input_clock(struct ata_probe_ent *probe_ent)
673 mdelay(100); 703 mdelay(100);
674 704
675 /* Read the counter values again */ 705 /* Read the counter values again */
676 end_count = pdc_read_counter(probe_ent); 706 end_count = pdc_read_counter(host);
677 707
678 /* Stop the test mode */ 708 /* Stop the test mode */
679 scr = readl(mmio_base + PDC_SYS_CTL); 709 scr = readl(mmio_base + PDC_SYS_CTL);
@@ -692,11 +722,10 @@ static long pdc_detect_pll_input_clock(struct ata_probe_ent *probe_ent)
692 722
693/** 723/**
694 * pdc_hardware_init - Initialize the hardware. 724 * pdc_hardware_init - Initialize the hardware.
695 * @pdev: instance of pci_dev found 725 * @host: target ATA host
696 * @pdc_controller: controller specific information 726 * @board_idx: board identifier
697 * @pe: for the port address
698 */ 727 */
699static int pdc_hardware_init(struct pci_dev *pdev, struct ata_probe_ent *pe, unsigned int board_idx) 728static int pdc_hardware_init(struct ata_host *host, unsigned int board_idx)
700{ 729{
701 long pll_clock; 730 long pll_clock;
702 731
@@ -706,15 +735,15 @@ static int pdc_hardware_init(struct pci_dev *pdev, struct ata_probe_ent *pe, uns
706 * Ex. 25MHz or 40MHz, we have to adjust the cycle_time. 735 * Ex. 25MHz or 40MHz, we have to adjust the cycle_time.
707 * The pdc20275 controller employs PLL circuit to help correct timing registers setting. 736 * The pdc20275 controller employs PLL circuit to help correct timing registers setting.
708 */ 737 */
709 pll_clock = pdc_detect_pll_input_clock(pe); 738 pll_clock = pdc_detect_pll_input_clock(host);
710 739
711 if (pll_clock < 0) /* counter overflow? Try again. */ 740 if (pll_clock < 0) /* counter overflow? Try again. */
712 pll_clock = pdc_detect_pll_input_clock(pe); 741 pll_clock = pdc_detect_pll_input_clock(host);
713 742
714 dev_printk(KERN_INFO, &pdev->dev, "PLL input clock %ld kHz\n", pll_clock/1000); 743 dev_printk(KERN_INFO, host->dev, "PLL input clock %ld kHz\n", pll_clock/1000);
715 744
716 /* Adjust PLL control register */ 745 /* Adjust PLL control register */
717 pdc_adjust_pll(pe, pll_clock, board_idx); 746 pdc_adjust_pll(host, pll_clock, board_idx);
718 747
719 return 0; 748 return 0;
720} 749}
@@ -746,8 +775,7 @@ static void pdc_ata_setup_port(struct ata_ioports *port, void __iomem *base)
746 * Called when an instance of PCI adapter is inserted. 775 * Called when an instance of PCI adapter is inserted.
747 * This function checks whether the hardware is supported, 776 * This function checks whether the hardware is supported,
748 * initialize hardware and register an instance of ata_host to 777 * initialize hardware and register an instance of ata_host to
749 * libata by providing struct ata_probe_ent and ata_device_add(). 778 * libata. (implements struct pci_driver.probe() )
750 * (implements struct pci_driver.probe() )
751 * 779 *
752 * @pdev: instance of pci_dev found 780 * @pdev: instance of pci_dev found
753 * @ent: matching entry in the id_tbl[] 781 * @ent: matching entry in the id_tbl[]
@@ -756,14 +784,21 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de
756{ 784{
757 static int printed_version; 785 static int printed_version;
758 unsigned int board_idx = (unsigned int) ent->driver_data; 786 unsigned int board_idx = (unsigned int) ent->driver_data;
759 787 const struct ata_port_info *ppi[] =
760 struct ata_probe_ent *probe_ent; 788 { &pdc2027x_port_info[board_idx], NULL };
789 struct ata_host *host;
761 void __iomem *mmio_base; 790 void __iomem *mmio_base;
762 int rc; 791 int rc;
763 792
764 if (!printed_version++) 793 if (!printed_version++)
765 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 794 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
766 795
796 /* alloc host */
797 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
798 if (!host)
799 return -ENOMEM;
800
801 /* acquire resources and fill host */
767 rc = pcim_enable_device(pdev); 802 rc = pcim_enable_device(pdev);
768 if (rc) 803 if (rc)
769 return rc; 804 return rc;
@@ -771,6 +806,7 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de
771 rc = pcim_iomap_regions(pdev, 1 << PDC_MMIO_BAR, DRV_NAME); 806 rc = pcim_iomap_regions(pdev, 1 << PDC_MMIO_BAR, DRV_NAME);
772 if (rc) 807 if (rc)
773 return rc; 808 return rc;
809 host->iomap = pcim_iomap_table(pdev);
774 810
775 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 811 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
776 if (rc) 812 if (rc)
@@ -780,46 +816,22 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de
780 if (rc) 816 if (rc)
781 return rc; 817 return rc;
782 818
783 /* Prepare the probe entry */ 819 mmio_base = host->iomap[PDC_MMIO_BAR];
784 probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL);
785 if (probe_ent == NULL)
786 return -ENOMEM;
787
788 probe_ent->dev = pci_dev_to_dev(pdev);
789 INIT_LIST_HEAD(&probe_ent->node);
790
791 probe_ent->sht = pdc2027x_port_info[board_idx].sht;
792 probe_ent->port_flags = pdc2027x_port_info[board_idx].flags;
793 probe_ent->pio_mask = pdc2027x_port_info[board_idx].pio_mask;
794 probe_ent->mwdma_mask = pdc2027x_port_info[board_idx].mwdma_mask;
795 probe_ent->udma_mask = pdc2027x_port_info[board_idx].udma_mask;
796 probe_ent->port_ops = pdc2027x_port_info[board_idx].port_ops;
797 820
798 probe_ent->irq = pdev->irq; 821 pdc_ata_setup_port(&host->ports[0]->ioaddr, mmio_base + 0x17c0);
799 probe_ent->irq_flags = IRQF_SHARED; 822 host->ports[0]->ioaddr.bmdma_addr = mmio_base + 0x1000;
800 probe_ent->iomap = pcim_iomap_table(pdev); 823 pdc_ata_setup_port(&host->ports[1]->ioaddr, mmio_base + 0x15c0);
824 host->ports[1]->ioaddr.bmdma_addr = mmio_base + 0x1008;
801 825
802 mmio_base = probe_ent->iomap[PDC_MMIO_BAR];
803
804 pdc_ata_setup_port(&probe_ent->port[0], mmio_base + 0x17c0);
805 probe_ent->port[0].bmdma_addr = mmio_base + 0x1000;
806 pdc_ata_setup_port(&probe_ent->port[1], mmio_base + 0x15c0);
807 probe_ent->port[1].bmdma_addr = mmio_base + 0x1008;
808
809 probe_ent->n_ports = 2;
810
811 pci_set_master(pdev);
812 //pci_enable_intx(pdev); 826 //pci_enable_intx(pdev);
813 827
814 /* initialize adapter */ 828 /* initialize adapter */
815 if (pdc_hardware_init(pdev, probe_ent, board_idx) != 0) 829 if (pdc_hardware_init(host, board_idx) != 0)
816 return -EIO; 830 return -EIO;
817 831
818 if (!ata_device_add(probe_ent)) 832 pci_set_master(pdev);
819 return -ENODEV; 833 return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
820 834 &pdc2027x_sht);
821 devm_kfree(&pdev->dev, probe_ent);
822 return 0;
823} 835}
824 836
825/** 837/**
diff --git a/drivers/ata/pata_pdc202xx_old.c b/drivers/ata/pata_pdc202xx_old.c
index 0a1493398913..ee636beb05e1 100644
--- a/drivers/ata/pata_pdc202xx_old.c
+++ b/drivers/ata/pata_pdc202xx_old.c
@@ -22,45 +22,17 @@
22#include <linux/libata.h> 22#include <linux/libata.h>
23 23
24#define DRV_NAME "pata_pdc202xx_old" 24#define DRV_NAME "pata_pdc202xx_old"
25#define DRV_VERSION "0.4.0" 25#define DRV_VERSION "0.4.2"
26 26
27/** 27static int pdc2026x_cable_detect(struct ata_port *ap)
28 * pdc2024x_pre_reset - probe begin
29 * @ap: ATA port
30 *
31 * Set up cable type and use generic probe init
32 */
33
34static int pdc2024x_pre_reset(struct ata_port *ap)
35{
36 ap->cbl = ATA_CBL_PATA40;
37 return ata_std_prereset(ap);
38}
39
40
41static void pdc2024x_error_handler(struct ata_port *ap)
42{
43 ata_bmdma_drive_eh(ap, pdc2024x_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
44}
45
46
47static int pdc2026x_pre_reset(struct ata_port *ap)
48{ 28{
49 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 29 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
50 u16 cis; 30 u16 cis;
51 31
52 pci_read_config_word(pdev, 0x50, &cis); 32 pci_read_config_word(pdev, 0x50, &cis);
53 if (cis & (1 << (10 + ap->port_no))) 33 if (cis & (1 << (10 + ap->port_no)))
54 ap->cbl = ATA_CBL_PATA80; 34 return ATA_CBL_PATA80;
55 else 35 return ATA_CBL_PATA40;
56 ap->cbl = ATA_CBL_PATA40;
57
58 return ata_std_prereset(ap);
59}
60
61static void pdc2026x_error_handler(struct ata_port *ap)
62{
63 ata_bmdma_drive_eh(ap, pdc2026x_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
64} 36}
65 37
66/** 38/**
@@ -244,7 +216,6 @@ static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc)
244 216
245/** 217/**
246 * pdc2026x_dev_config - device setup hook 218 * pdc2026x_dev_config - device setup hook
247 * @ap: ATA port
248 * @adev: newly found device 219 * @adev: newly found device
249 * 220 *
250 * Perform chip specific early setup. We need to lock the transfer 221 * Perform chip specific early setup. We need to lock the transfer
@@ -252,7 +223,7 @@ static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc)
252 * barf. 223 * barf.
253 */ 224 */
254 225
255static void pdc2026x_dev_config(struct ata_port *ap, struct ata_device *adev) 226static void pdc2026x_dev_config(struct ata_device *adev)
256{ 227{
257 adev->max_sectors = 256; 228 adev->max_sectors = 256;
258} 229}
@@ -292,8 +263,9 @@ static struct ata_port_operations pdc2024x_port_ops = {
292 263
293 .freeze = ata_bmdma_freeze, 264 .freeze = ata_bmdma_freeze,
294 .thaw = ata_bmdma_thaw, 265 .thaw = ata_bmdma_thaw,
295 .error_handler = pdc2024x_error_handler, 266 .error_handler = ata_bmdma_error_handler,
296 .post_internal_cmd = ata_bmdma_post_internal_cmd, 267 .post_internal_cmd = ata_bmdma_post_internal_cmd,
268 .cable_detect = ata_cable_40wire,
297 269
298 .bmdma_setup = ata_bmdma_setup, 270 .bmdma_setup = ata_bmdma_setup,
299 .bmdma_start = ata_bmdma_start, 271 .bmdma_start = ata_bmdma_start,
@@ -326,8 +298,9 @@ static struct ata_port_operations pdc2026x_port_ops = {
326 298
327 .freeze = ata_bmdma_freeze, 299 .freeze = ata_bmdma_freeze,
328 .thaw = ata_bmdma_thaw, 300 .thaw = ata_bmdma_thaw,
329 .error_handler = pdc2026x_error_handler, 301 .error_handler = ata_bmdma_error_handler,
330 .post_internal_cmd = ata_bmdma_post_internal_cmd, 302 .post_internal_cmd = ata_bmdma_post_internal_cmd,
303 .cable_detect = pdc2026x_cable_detect,
331 304
332 .bmdma_setup = ata_bmdma_setup, 305 .bmdma_setup = ata_bmdma_setup,
333 .bmdma_start = pdc2026x_bmdma_start, 306 .bmdma_start = pdc2026x_bmdma_start,
diff --git a/drivers/ata/pata_platform.c b/drivers/ata/pata_platform.c
index 4b82a5435a4e..a0a650c7f272 100644
--- a/drivers/ata/pata_platform.c
+++ b/drivers/ata/pata_platform.c
@@ -80,13 +80,13 @@ static struct ata_port_operations pata_platform_port_ops = {
80 .thaw = ata_bmdma_thaw, 80 .thaw = ata_bmdma_thaw,
81 .error_handler = ata_bmdma_error_handler, 81 .error_handler = ata_bmdma_error_handler,
82 .post_internal_cmd = ata_bmdma_post_internal_cmd, 82 .post_internal_cmd = ata_bmdma_post_internal_cmd,
83 .cable_detect = ata_cable_unknown,
83 84
84 .qc_prep = ata_qc_prep, 85 .qc_prep = ata_qc_prep,
85 .qc_issue = ata_qc_issue_prot, 86 .qc_issue = ata_qc_issue_prot,
86 87
87 .data_xfer = ata_data_xfer_noirq, 88 .data_xfer = ata_data_xfer_noirq,
88 89
89 .irq_handler = ata_interrupt,
90 .irq_clear = ata_bmdma_irq_clear, 90 .irq_clear = ata_bmdma_irq_clear,
91 .irq_on = ata_irq_on, 91 .irq_on = ata_irq_on,
92 .irq_ack = ata_irq_ack, 92 .irq_ack = ata_irq_ack,
@@ -135,7 +135,8 @@ static void pata_platform_setup_port(struct ata_ioports *ioaddr,
135static int __devinit pata_platform_probe(struct platform_device *pdev) 135static int __devinit pata_platform_probe(struct platform_device *pdev)
136{ 136{
137 struct resource *io_res, *ctl_res; 137 struct resource *io_res, *ctl_res;
138 struct ata_probe_ent ae; 138 struct ata_host *host;
139 struct ata_port *ap;
139 unsigned int mmio; 140 unsigned int mmio;
140 141
141 /* 142 /*
@@ -175,44 +176,41 @@ static int __devinit pata_platform_probe(struct platform_device *pdev)
175 /* 176 /*
176 * Now that that's out of the way, wire up the port.. 177 * Now that that's out of the way, wire up the port..
177 */ 178 */
178 memset(&ae, 0, sizeof(struct ata_probe_ent)); 179 host = ata_host_alloc(&pdev->dev, 1);
179 INIT_LIST_HEAD(&ae.node); 180 if (!host)
180 ae.dev = &pdev->dev; 181 return -ENOMEM;
181 ae.port_ops = &pata_platform_port_ops; 182 ap = host->ports[0];
182 ae.sht = &pata_platform_sht; 183
183 ae.n_ports = 1; 184 ap->ops = &pata_platform_port_ops;
184 ae.pio_mask = pio_mask; 185 ap->pio_mask = pio_mask;
185 ae.irq = platform_get_irq(pdev, 0); 186 ap->flags |= ATA_FLAG_SLAVE_POSS;
186 ae.irq_flags = 0;
187 ae.port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST;
188 187
189 /* 188 /*
190 * Handle the MMIO case 189 * Handle the MMIO case
191 */ 190 */
192 if (mmio) { 191 if (mmio) {
193 ae.port[0].cmd_addr = devm_ioremap(&pdev->dev, io_res->start, 192 ap->ioaddr.cmd_addr = devm_ioremap(&pdev->dev, io_res->start,
194 io_res->end - io_res->start + 1); 193 io_res->end - io_res->start + 1);
195 ae.port[0].ctl_addr = devm_ioremap(&pdev->dev, ctl_res->start, 194 ap->ioaddr.ctl_addr = devm_ioremap(&pdev->dev, ctl_res->start,
196 ctl_res->end - ctl_res->start + 1); 195 ctl_res->end - ctl_res->start + 1);
197 } else { 196 } else {
198 ae.port[0].cmd_addr = devm_ioport_map(&pdev->dev, io_res->start, 197 ap->ioaddr.cmd_addr = devm_ioport_map(&pdev->dev, io_res->start,
199 io_res->end - io_res->start + 1); 198 io_res->end - io_res->start + 1);
200 ae.port[0].ctl_addr = devm_ioport_map(&pdev->dev, ctl_res->start, 199 ap->ioaddr.ctl_addr = devm_ioport_map(&pdev->dev, ctl_res->start,
201 ctl_res->end - ctl_res->start + 1); 200 ctl_res->end - ctl_res->start + 1);
202 } 201 }
203 if (!ae.port[0].cmd_addr || !ae.port[0].ctl_addr) { 202 if (!ap->ioaddr.cmd_addr || !ap->ioaddr.ctl_addr) {
204 dev_err(&pdev->dev, "failed to map IO/CTL base\n"); 203 dev_err(&pdev->dev, "failed to map IO/CTL base\n");
205 return -ENOMEM; 204 return -ENOMEM;
206 } 205 }
207 206
208 ae.port[0].altstatus_addr = ae.port[0].ctl_addr; 207 ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
209 208
210 pata_platform_setup_port(&ae.port[0], pdev->dev.platform_data); 209 pata_platform_setup_port(&ap->ioaddr, pdev->dev.platform_data);
211 210
212 if (unlikely(ata_device_add(&ae) == 0)) 211 /* activate */
213 return -ENODEV; 212 return ata_host_activate(host, platform_get_irq(pdev, 0), ata_interrupt,
214 213 0, &pata_platform_sht);
215 return 0;
216} 214}
217 215
218/** 216/**
diff --git a/drivers/ata/pata_qdi.c b/drivers/ata/pata_qdi.c
index c3810012f3f4..27685ce63ceb 100644
--- a/drivers/ata/pata_qdi.c
+++ b/drivers/ata/pata_qdi.c
@@ -183,13 +183,13 @@ static struct ata_port_operations qdi6500_port_ops = {
183 .thaw = ata_bmdma_thaw, 183 .thaw = ata_bmdma_thaw,
184 .error_handler = ata_bmdma_error_handler, 184 .error_handler = ata_bmdma_error_handler,
185 .post_internal_cmd = ata_bmdma_post_internal_cmd, 185 .post_internal_cmd = ata_bmdma_post_internal_cmd,
186 .cable_detect = ata_cable_40wire,
186 187
187 .qc_prep = ata_qc_prep, 188 .qc_prep = ata_qc_prep,
188 .qc_issue = qdi_qc_issue_prot, 189 .qc_issue = qdi_qc_issue_prot,
189 190
190 .data_xfer = qdi_data_xfer, 191 .data_xfer = qdi_data_xfer,
191 192
192 .irq_handler = ata_interrupt,
193 .irq_clear = ata_bmdma_irq_clear, 193 .irq_clear = ata_bmdma_irq_clear,
194 .irq_on = ata_irq_on, 194 .irq_on = ata_irq_on,
195 .irq_ack = ata_irq_ack, 195 .irq_ack = ata_irq_ack,
@@ -211,13 +211,13 @@ static struct ata_port_operations qdi6580_port_ops = {
211 .thaw = ata_bmdma_thaw, 211 .thaw = ata_bmdma_thaw,
212 .error_handler = ata_bmdma_error_handler, 212 .error_handler = ata_bmdma_error_handler,
213 .post_internal_cmd = ata_bmdma_post_internal_cmd, 213 .post_internal_cmd = ata_bmdma_post_internal_cmd,
214 .cable_detect = ata_cable_40wire,
214 215
215 .qc_prep = ata_qc_prep, 216 .qc_prep = ata_qc_prep,
216 .qc_issue = qdi_qc_issue_prot, 217 .qc_issue = qdi_qc_issue_prot,
217 218
218 .data_xfer = qdi_data_xfer, 219 .data_xfer = qdi_data_xfer,
219 220
220 .irq_handler = ata_interrupt,
221 .irq_clear = ata_bmdma_irq_clear, 221 .irq_clear = ata_bmdma_irq_clear,
222 .irq_on = ata_irq_on, 222 .irq_on = ata_irq_on,
223 .irq_ack = ata_irq_ack, 223 .irq_ack = ata_irq_ack,
@@ -238,8 +238,9 @@ static struct ata_port_operations qdi6580_port_ops = {
238 238
239static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast) 239static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast)
240{ 240{
241 struct ata_probe_ent ae;
242 struct platform_device *pdev; 241 struct platform_device *pdev;
242 struct ata_host *host;
243 struct ata_port *ap;
243 void __iomem *io_addr, *ctl_addr; 244 void __iomem *io_addr, *ctl_addr;
244 int ret; 245 int ret;
245 246
@@ -257,34 +258,31 @@ static __init int qdi_init_one(unsigned long port, int type, unsigned long io, i
257 if (!io_addr || !ctl_addr) 258 if (!io_addr || !ctl_addr)
258 goto fail; 259 goto fail;
259 260
260 memset(&ae, 0, sizeof(struct ata_probe_ent)); 261 ret = -ENOMEM;
261 INIT_LIST_HEAD(&ae.node); 262 host = ata_host_alloc(&pdev->dev, 1);
262 ae.dev = &pdev->dev; 263 if (!host)
264 goto fail;
265 ap = host->ports[0];
263 266
264 if (type == 6580) { 267 if (type == 6580) {
265 ae.port_ops = &qdi6580_port_ops; 268 ap->ops = &qdi6580_port_ops;
266 ae.pio_mask = 0x1F; 269 ap->pio_mask = 0x1F;
267 ae.port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST; 270 ap->flags |= ATA_FLAG_SLAVE_POSS;
268 } else { 271 } else {
269 ae.port_ops = &qdi6500_port_ops; 272 ap->ops = &qdi6500_port_ops;
270 ae.pio_mask = 0x07; /* Actually PIO3 !IORDY is possible */ 273 ap->pio_mask = 0x07; /* Actually PIO3 !IORDY is possible */
271 ae.port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | 274 ap->flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY;
272 ATA_FLAG_NO_IORDY;
273 } 275 }
274 276
275 ae.sht = &qdi_sht; 277 ap->ioaddr.cmd_addr = io_addr;
276 ae.n_ports = 1; 278 ap->ioaddr.altstatus_addr = ctl_addr;
277 ae.irq = irq; 279 ap->ioaddr.ctl_addr = ctl_addr;
278 ae.irq_flags = 0; 280 ata_std_ports(&ap->ioaddr);
279 ae.port[0].cmd_addr = io_addr;
280 ae.port[0].altstatus_addr = ctl_addr;
281 ae.port[0].ctl_addr = ctl_addr;
282 ata_std_ports(&ae.port[0]);
283 281
284 /* 282 /*
285 * Hook in a private data structure per channel 283 * Hook in a private data structure per channel
286 */ 284 */
287 ae.private_data = &qdi_data[nr_qdi_host]; 285 ap->private_data = &qdi_data[nr_qdi_host];
288 286
289 qdi_data[nr_qdi_host].timing = port; 287 qdi_data[nr_qdi_host].timing = port;
290 qdi_data[nr_qdi_host].fast = fast; 288 qdi_data[nr_qdi_host].fast = fast;
@@ -292,8 +290,9 @@ static __init int qdi_init_one(unsigned long port, int type, unsigned long io, i
292 290
293 printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io); 291 printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io);
294 292
295 ret = -ENODEV; 293 /* activate */
296 if (!ata_device_add(&ae)) 294 ret = ata_host_activate(host, irq, ata_interrupt, 0, &qdi_sht);
295 if (ret)
297 goto fail; 296 goto fail;
298 297
299 qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev); 298 qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev);
diff --git a/drivers/ata/pata_radisys.c b/drivers/ata/pata_radisys.c
index 9a9132c9e331..1c54673e008d 100644
--- a/drivers/ata/pata_radisys.c
+++ b/drivers/ata/pata_radisys.c
@@ -24,40 +24,12 @@
24#include <linux/ata.h> 24#include <linux/ata.h>
25 25
26#define DRV_NAME "pata_radisys" 26#define DRV_NAME "pata_radisys"
27#define DRV_VERSION "0.4.1" 27#define DRV_VERSION "0.4.4"
28
29/**
30 * radisys_probe_init - probe begin
31 * @ap: ATA port
32 *
33 * Set up cable type and use generic probe init
34 */
35
36static int radisys_pre_reset(struct ata_port *ap)
37{
38 ap->cbl = ATA_CBL_PATA80;
39 return ata_std_prereset(ap);
40}
41
42
43/**
44 * radisys_pata_error_handler - Probe specified port on PATA host controller
45 * @ap: Port to probe
46 * @classes:
47 *
48 * LOCKING:
49 * None (inherited from caller).
50 */
51
52static void radisys_pata_error_handler(struct ata_port *ap)
53{
54 ata_bmdma_drive_eh(ap, radisys_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
55}
56 28
57/** 29/**
58 * radisys_set_piomode - Initialize host controller PATA PIO timings 30 * radisys_set_piomode - Initialize host controller PATA PIO timings
59 * @ap: Port whose timings we are configuring 31 * @ap: ATA port
60 * @adev: um 32 * @adev: Device whose timings we are configuring
61 * 33 *
62 * Set PIO mode for device, in host controller PCI config space. 34 * Set PIO mode for device, in host controller PCI config space.
63 * 35 *
@@ -248,8 +220,9 @@ static const struct ata_port_operations radisys_pata_ops = {
248 220
249 .freeze = ata_bmdma_freeze, 221 .freeze = ata_bmdma_freeze,
250 .thaw = ata_bmdma_thaw, 222 .thaw = ata_bmdma_thaw,
251 .error_handler = radisys_pata_error_handler, 223 .error_handler = ata_bmdma_error_handler,
252 .post_internal_cmd = ata_bmdma_post_internal_cmd, 224 .post_internal_cmd = ata_bmdma_post_internal_cmd,
225 .cable_detect = ata_cable_unknown,
253 226
254 .bmdma_setup = ata_bmdma_setup, 227 .bmdma_setup = ata_bmdma_setup,
255 .bmdma_start = ata_bmdma_start, 228 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_rz1000.c b/drivers/ata/pata_rz1000.c
index f522daa2a6aa..85c45290eeee 100644
--- a/drivers/ata/pata_rz1000.c
+++ b/drivers/ata/pata_rz1000.c
@@ -25,31 +25,6 @@
25 25
26 26
27/** 27/**
28 * rz1000_prereset - probe begin
29 * @ap: ATA port
30 *
31 * Set up cable type and use generics
32 */
33
34static int rz1000_prereset(struct ata_port *ap)
35{
36 ap->cbl = ATA_CBL_PATA40;
37 return ata_std_prereset(ap);
38}
39
40/**
41 * rz1000_error_handler - probe reset
42 * @ap: ATA port
43 *
44 * Perform the ATA standard reset sequence
45 */
46
47static void rz1000_error_handler(struct ata_port *ap)
48{
49 ata_bmdma_drive_eh(ap, rz1000_prereset, ata_std_softreset, NULL, ata_std_postreset);
50}
51
52/**
53 * rz1000_set_mode - mode setting function 28 * rz1000_set_mode - mode setting function
54 * @ap: ATA interface 29 * @ap: ATA interface
55 * @unused: returned device on set_mode failure 30 * @unused: returned device on set_mode failure
@@ -122,8 +97,9 @@ static struct ata_port_operations rz1000_port_ops = {
122 97
123 .freeze = ata_bmdma_freeze, 98 .freeze = ata_bmdma_freeze,
124 .thaw = ata_bmdma_thaw, 99 .thaw = ata_bmdma_thaw,
125 .error_handler = rz1000_error_handler, 100 .error_handler = ata_bmdma_error_handler,
126 .post_internal_cmd = ata_bmdma_post_internal_cmd, 101 .post_internal_cmd = ata_bmdma_post_internal_cmd,
102 .cable_detect = ata_cable_40wire,
127 103
128 .irq_handler = ata_interrupt, 104 .irq_handler = ata_interrupt,
129 .irq_clear = ata_bmdma_irq_clear, 105 .irq_clear = ata_bmdma_irq_clear,
diff --git a/drivers/ata/pata_sc1200.c b/drivers/ata/pata_sc1200.c
index 93b3ed0f9e8a..66e8ff467c8d 100644
--- a/drivers/ata/pata_sc1200.c
+++ b/drivers/ata/pata_sc1200.c
@@ -216,6 +216,7 @@ static struct ata_port_operations sc1200_port_ops = {
216 .thaw = ata_bmdma_thaw, 216 .thaw = ata_bmdma_thaw,
217 .error_handler = ata_bmdma_error_handler, 217 .error_handler = ata_bmdma_error_handler,
218 .post_internal_cmd = ata_bmdma_post_internal_cmd, 218 .post_internal_cmd = ata_bmdma_post_internal_cmd,
219 .cable_detect = ata_cable_40wire,
219 220
220 .bmdma_setup = ata_bmdma_setup, 221 .bmdma_setup = ata_bmdma_setup,
221 .bmdma_start = ata_bmdma_start, 222 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c
index f3ed141fdc0e..5df354d573e8 100644
--- a/drivers/ata/pata_scc.c
+++ b/drivers/ata/pata_scc.c
@@ -1016,7 +1016,6 @@ static const struct ata_port_operations scc_pata_ops = {
1016 .error_handler = scc_error_handler, 1016 .error_handler = scc_error_handler,
1017 .post_internal_cmd = scc_bmdma_stop, 1017 .post_internal_cmd = scc_bmdma_stop,
1018 1018
1019 .irq_handler = ata_interrupt,
1020 .irq_clear = scc_bmdma_irq_clear, 1019 .irq_clear = scc_bmdma_irq_clear,
1021 .irq_on = scc_irq_on, 1020 .irq_on = scc_irq_on,
1022 .irq_ack = scc_irq_ack, 1021 .irq_ack = scc_irq_ack,
@@ -1027,7 +1026,6 @@ static const struct ata_port_operations scc_pata_ops = {
1027 1026
1028static struct ata_port_info scc_port_info[] = { 1027static struct ata_port_info scc_port_info[] = {
1029 { 1028 {
1030 .sht = &scc_sht,
1031 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY, 1029 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY,
1032 .pio_mask = 0x1f, /* pio0-4 */ 1030 .pio_mask = 0x1f, /* pio0-4 */
1033 .mwdma_mask = 0x00, 1031 .mwdma_mask = 0x00,
@@ -1040,10 +1038,10 @@ static struct ata_port_info scc_port_info[] = {
1040 * scc_reset_controller - initialize SCC PATA controller. 1038 * scc_reset_controller - initialize SCC PATA controller.
1041 */ 1039 */
1042 1040
1043static int scc_reset_controller(struct ata_probe_ent *probe_ent) 1041static int scc_reset_controller(struct ata_host *host)
1044{ 1042{
1045 void __iomem *ctrl_base = probe_ent->iomap[SCC_CTRL_BAR]; 1043 void __iomem *ctrl_base = host->iomap[SCC_CTRL_BAR];
1046 void __iomem *bmid_base = probe_ent->iomap[SCC_BMID_BAR]; 1044 void __iomem *bmid_base = host->iomap[SCC_BMID_BAR];
1047 void __iomem *cckctrl_port = ctrl_base + SCC_CTL_CCKCTRL; 1045 void __iomem *cckctrl_port = ctrl_base + SCC_CTL_CCKCTRL;
1048 void __iomem *mode_port = ctrl_base + SCC_CTL_MODEREG; 1046 void __iomem *mode_port = ctrl_base + SCC_CTL_MODEREG;
1049 void __iomem *ecmode_port = ctrl_base + SCC_CTL_ECMODE; 1047 void __iomem *ecmode_port = ctrl_base + SCC_CTL_ECMODE;
@@ -1104,17 +1102,15 @@ static void scc_setup_ports (struct ata_ioports *ioaddr, void __iomem *base)
1104 ioaddr->command_addr = ioaddr->cmd_addr + SCC_REG_CMD; 1102 ioaddr->command_addr = ioaddr->cmd_addr + SCC_REG_CMD;
1105} 1103}
1106 1104
1107static int scc_host_init(struct ata_probe_ent *probe_ent) 1105static int scc_host_init(struct ata_host *host)
1108{ 1106{
1109 struct pci_dev *pdev = to_pci_dev(probe_ent->dev); 1107 struct pci_dev *pdev = to_pci_dev(host->dev);
1110 int rc; 1108 int rc;
1111 1109
1112 rc = scc_reset_controller(probe_ent); 1110 rc = scc_reset_controller(host);
1113 if (rc) 1111 if (rc)
1114 return rc; 1112 return rc;
1115 1113
1116 probe_ent->n_ports = 1;
1117
1118 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 1114 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
1119 if (rc) 1115 if (rc)
1120 return rc; 1116 return rc;
@@ -1122,7 +1118,7 @@ static int scc_host_init(struct ata_probe_ent *probe_ent)
1122 if (rc) 1118 if (rc)
1123 return rc; 1119 return rc;
1124 1120
1125 scc_setup_ports(&probe_ent->port[0], probe_ent->iomap[SCC_BMID_BAR]); 1121 scc_setup_ports(&host->ports[0]->ioaddr, host->iomap[SCC_BMID_BAR]);
1126 1122
1127 pci_set_master(pdev); 1123 pci_set_master(pdev);
1128 1124
@@ -1145,14 +1141,18 @@ static int scc_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1145{ 1141{
1146 static int printed_version; 1142 static int printed_version;
1147 unsigned int board_idx = (unsigned int) ent->driver_data; 1143 unsigned int board_idx = (unsigned int) ent->driver_data;
1144 const struct ata_port_info *ppi[] = { &scc_port_info[board_idx], NULL };
1148 struct device *dev = &pdev->dev; 1145 struct device *dev = &pdev->dev;
1149 struct ata_probe_ent *probe_ent;
1150 int rc; 1146 int rc;
1151 1147
1152 if (!printed_version++) 1148 if (!printed_version++)
1153 dev_printk(KERN_DEBUG, &pdev->dev, 1149 dev_printk(KERN_DEBUG, &pdev->dev,
1154 "version " DRV_VERSION "\n"); 1150 "version " DRV_VERSION "\n");
1155 1151
1152 host = ata_port_alloc_pinfo(&pdev->dev, ppi, 1);
1153 if (!host)
1154 return -ENOMEM;
1155
1156 rc = pcim_enable_device(pdev); 1156 rc = pcim_enable_device(pdev);
1157 if (rc) 1157 if (rc)
1158 return rc; 1158 return rc;
@@ -1162,33 +1162,14 @@ static int scc_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1162 pcim_pin_device(pdev); 1162 pcim_pin_device(pdev);
1163 if (rc) 1163 if (rc)
1164 return rc; 1164 return rc;
1165 host->iomap = pcim_iomap_table(pdev);
1165 1166
1166 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL); 1167 rc = scc_host_init(host);
1167 if (!probe_ent)
1168 return -ENOMEM;
1169
1170 probe_ent->dev = dev;
1171 INIT_LIST_HEAD(&probe_ent->node);
1172
1173 probe_ent->sht = scc_port_info[board_idx].sht;
1174 probe_ent->port_flags = scc_port_info[board_idx].flags;
1175 probe_ent->pio_mask = scc_port_info[board_idx].pio_mask;
1176 probe_ent->udma_mask = scc_port_info[board_idx].udma_mask;
1177 probe_ent->port_ops = scc_port_info[board_idx].port_ops;
1178
1179 probe_ent->irq = pdev->irq;
1180 probe_ent->irq_flags = IRQF_SHARED;
1181 probe_ent->iomap = pcim_iomap_table(pdev);
1182
1183 rc = scc_host_init(probe_ent);
1184 if (rc) 1168 if (rc)
1185 return rc; 1169 return rc;
1186 1170
1187 if (!ata_device_add(probe_ent)) 1171 return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
1188 return -ENODEV; 1172 &scc_sht);
1189
1190 devm_kfree(dev, probe_ent);
1191 return 0;
1192} 1173}
1193 1174
1194static struct pci_driver scc_pci_driver = { 1175static struct pci_driver scc_pci_driver = {
diff --git a/drivers/ata/pata_serverworks.c b/drivers/ata/pata_serverworks.c
index 598eef810a74..3956ef26936d 100644
--- a/drivers/ata/pata_serverworks.c
+++ b/drivers/ata/pata_serverworks.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * ata-serverworks.c - Serverworks PATA for new ATA layer 2 * pata_serverworks.c - Serverworks PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@redhat.com> 4 * Alan Cox <alan@redhat.com>
5 * 5 *
@@ -137,14 +137,14 @@ static struct sv_cable_table cable_detect[] = {
137}; 137};
138 138
139/** 139/**
140 * serverworks_pre_reset - cable detection 140 * serverworks_cable_detect - cable detection
141 * @ap: ATA port 141 * @ap: ATA port
142 * 142 *
143 * Perform cable detection according to the device and subvendor 143 * Perform cable detection according to the device and subvendor
144 * identifications 144 * identifications
145 */ 145 */
146 146
147static int serverworks_pre_reset(struct ata_port *ap) { 147static int serverworks_cable_detect(struct ata_port *ap) {
148 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 148 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
149 struct sv_cable_table *cb = cable_detect; 149 struct sv_cable_table *cb = cable_detect;
150 150
@@ -152,8 +152,7 @@ static int serverworks_pre_reset(struct ata_port *ap) {
152 if (cb->device == pdev->device && 152 if (cb->device == pdev->device &&
153 (cb->subvendor == pdev->subsystem_vendor || 153 (cb->subvendor == pdev->subsystem_vendor ||
154 cb->subvendor == PCI_ANY_ID)) { 154 cb->subvendor == PCI_ANY_ID)) {
155 ap->cbl = cb->cable_detect(ap); 155 return cb->cable_detect(ap);
156 return ata_std_prereset(ap);
157 } 156 }
158 cb++; 157 cb++;
159 } 158 }
@@ -162,11 +161,6 @@ static int serverworks_pre_reset(struct ata_port *ap) {
162 return -1; /* kill compiler warning */ 161 return -1; /* kill compiler warning */
163} 162}
164 163
165static void serverworks_error_handler(struct ata_port *ap)
166{
167 return ata_bmdma_drive_eh(ap, serverworks_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
168}
169
170/** 164/**
171 * serverworks_is_csb - Check for CSB or OSB 165 * serverworks_is_csb - Check for CSB or OSB
172 * @pdev: PCI device to check 166 * @pdev: PCI device to check
@@ -191,31 +185,31 @@ static u8 serverworks_is_csb(struct pci_dev *pdev)
191 185
192/** 186/**
193 * serverworks_osb4_filter - mode selection filter 187 * serverworks_osb4_filter - mode selection filter
194 * @ap: ATA interface
195 * @adev: ATA device 188 * @adev: ATA device
189 * @mask: Mask of proposed modes
196 * 190 *
197 * Filter the offered modes for the device to apply controller 191 * Filter the offered modes for the device to apply controller
198 * specific rules. OSB4 requires no UDMA for disks due to a FIFO 192 * specific rules. OSB4 requires no UDMA for disks due to a FIFO
199 * bug we hit. 193 * bug we hit.
200 */ 194 */
201 195
202static unsigned long serverworks_osb4_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) 196static unsigned long serverworks_osb4_filter(struct ata_device *adev, unsigned long mask)
203{ 197{
204 if (adev->class == ATA_DEV_ATA) 198 if (adev->class == ATA_DEV_ATA)
205 mask &= ~ATA_MASK_UDMA; 199 mask &= ~ATA_MASK_UDMA;
206 return ata_pci_default_filter(ap, adev, mask); 200 return ata_pci_default_filter(adev, mask);
207} 201}
208 202
209 203
210/** 204/**
211 * serverworks_csb_filter - mode selection filter 205 * serverworks_csb_filter - mode selection filter
212 * @ap: ATA interface
213 * @adev: ATA device 206 * @adev: ATA device
207 * @mask: Mask of proposed modes
214 * 208 *
215 * Check the blacklist and disable UDMA5 if matched 209 * Check the blacklist and disable UDMA5 if matched
216 */ 210 */
217 211
218static unsigned long serverworks_csb_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask) 212static unsigned long serverworks_csb_filter(struct ata_device *adev, unsigned long mask)
219{ 213{
220 const char *p; 214 const char *p;
221 char model_num[ATA_ID_PROD_LEN + 1]; 215 char model_num[ATA_ID_PROD_LEN + 1];
@@ -223,7 +217,7 @@ static unsigned long serverworks_csb_filter(const struct ata_port *ap, struct at
223 217
224 /* Disk, UDMA */ 218 /* Disk, UDMA */
225 if (adev->class != ATA_DEV_ATA) 219 if (adev->class != ATA_DEV_ATA)
226 return ata_pci_default_filter(ap, adev, mask); 220 return ata_pci_default_filter(adev, mask);
227 221
228 /* Actually do need to check */ 222 /* Actually do need to check */
229 ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); 223 ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
@@ -232,7 +226,7 @@ static unsigned long serverworks_csb_filter(const struct ata_port *ap, struct at
232 if (!strcmp(p, model_num)) 226 if (!strcmp(p, model_num))
233 mask &= ~(0x1F << ATA_SHIFT_UDMA); 227 mask &= ~(0x1F << ATA_SHIFT_UDMA);
234 } 228 }
235 return ata_pci_default_filter(ap, adev, mask); 229 return ata_pci_default_filter(adev, mask);
236} 230}
237 231
238 232
@@ -339,8 +333,9 @@ static struct ata_port_operations serverworks_osb4_port_ops = {
339 333
340 .freeze = ata_bmdma_freeze, 334 .freeze = ata_bmdma_freeze,
341 .thaw = ata_bmdma_thaw, 335 .thaw = ata_bmdma_thaw,
342 .error_handler = serverworks_error_handler, 336 .error_handler = ata_bmdma_error_handler,
343 .post_internal_cmd = ata_bmdma_post_internal_cmd, 337 .post_internal_cmd = ata_bmdma_post_internal_cmd,
338 .cable_detect = serverworks_cable_detect,
344 339
345 .bmdma_setup = ata_bmdma_setup, 340 .bmdma_setup = ata_bmdma_setup,
346 .bmdma_start = ata_bmdma_start, 341 .bmdma_start = ata_bmdma_start,
@@ -374,8 +369,9 @@ static struct ata_port_operations serverworks_csb_port_ops = {
374 369
375 .freeze = ata_bmdma_freeze, 370 .freeze = ata_bmdma_freeze,
376 .thaw = ata_bmdma_thaw, 371 .thaw = ata_bmdma_thaw,
377 .error_handler = serverworks_error_handler, 372 .error_handler = ata_bmdma_error_handler,
378 .post_internal_cmd = ata_bmdma_post_internal_cmd, 373 .post_internal_cmd = ata_bmdma_post_internal_cmd,
374 .cable_detect = serverworks_cable_detect,
379 375
380 .bmdma_setup = ata_bmdma_setup, 376 .bmdma_setup = ata_bmdma_setup,
381 .bmdma_start = ata_bmdma_start, 377 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c
index dab2889a556f..6770820cfca9 100644
--- a/drivers/ata/pata_sil680.c
+++ b/drivers/ata/pata_sil680.c
@@ -33,7 +33,7 @@
33#include <linux/libata.h> 33#include <linux/libata.h>
34 34
35#define DRV_NAME "pata_sil680" 35#define DRV_NAME "pata_sil680"
36#define DRV_VERSION "0.4.5" 36#define DRV_VERSION "0.4.6"
37 37
38/** 38/**
39 * sil680_selreg - return register base 39 * sil680_selreg - return register base
@@ -91,12 +91,6 @@ static int sil680_cable_detect(struct ata_port *ap) {
91 return ATA_CBL_PATA40; 91 return ATA_CBL_PATA40;
92} 92}
93 93
94static int sil680_pre_reset(struct ata_port *ap)
95{
96 ap->cbl = sil680_cable_detect(ap);
97 return ata_std_prereset(ap);
98}
99
100/** 94/**
101 * sil680_bus_reset - reset the SIL680 bus 95 * sil680_bus_reset - reset the SIL680 bus
102 * @ap: ATA port to reset 96 * @ap: ATA port to reset
@@ -119,7 +113,7 @@ static int sil680_bus_reset(struct ata_port *ap,unsigned int *classes)
119 113
120static void sil680_error_handler(struct ata_port *ap) 114static void sil680_error_handler(struct ata_port *ap)
121{ 115{
122 ata_bmdma_drive_eh(ap, sil680_pre_reset, sil680_bus_reset, NULL, ata_std_postreset); 116 ata_bmdma_drive_eh(ap, ata_std_prereset, sil680_bus_reset, NULL, ata_std_postreset);
123} 117}
124 118
125/** 119/**
@@ -257,6 +251,7 @@ static struct ata_port_operations sil680_port_ops = {
257 .thaw = ata_bmdma_thaw, 251 .thaw = ata_bmdma_thaw,
258 .error_handler = sil680_error_handler, 252 .error_handler = sil680_error_handler,
259 .post_internal_cmd = ata_bmdma_post_internal_cmd, 253 .post_internal_cmd = ata_bmdma_post_internal_cmd,
254 .cable_detect = sil680_cable_detect,
260 255
261 .bmdma_setup = ata_bmdma_setup, 256 .bmdma_setup = ata_bmdma_setup,
262 .bmdma_start = ata_bmdma_start, 257 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c
index 8dc3bc4f5863..a3fbcee6fb33 100644
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -35,7 +35,7 @@
35#include "sis.h" 35#include "sis.h"
36 36
37#define DRV_NAME "pata_sis" 37#define DRV_NAME "pata_sis"
38#define DRV_VERSION "0.5.0" 38#define DRV_VERSION "0.5.1"
39 39
40struct sis_chipset { 40struct sis_chipset {
41 u16 device; /* PCI host ID */ 41 u16 device; /* PCI host ID */
@@ -86,106 +86,55 @@ static int sis_port_base(struct ata_device *adev)
86} 86}
87 87
88/** 88/**
89 * sis_133_pre_reset - check for 40/80 pin 89 * sis_133_cable_detect - check for 40/80 pin
90 * @ap: Port 90 * @ap: Port
91 * 91 *
92 * Perform cable detection for the later UDMA133 capable 92 * Perform cable detection for the later UDMA133 capable
93 * SiS chipset. 93 * SiS chipset.
94 */ 94 */
95 95
96static int sis_133_pre_reset(struct ata_port *ap) 96static int sis_133_cable_detect(struct ata_port *ap)
97{ 97{
98 static const struct pci_bits sis_enable_bits[] = {
99 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
100 { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */
101 };
102
103 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 98 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
104 u16 tmp; 99 u16 tmp;
105 100
106 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no]))
107 return -ENOENT;
108
109 /* The top bit of this register is the cable detect bit */ 101 /* The top bit of this register is the cable detect bit */
110 pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp); 102 pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp);
111 if ((tmp & 0x8000) && !sis_short_ata40(pdev)) 103 if ((tmp & 0x8000) && !sis_short_ata40(pdev))
112 ap->cbl = ATA_CBL_PATA40; 104 return ATA_CBL_PATA40;
113 else 105 return ATA_CBL_PATA80;
114 ap->cbl = ATA_CBL_PATA80;
115
116 return ata_std_prereset(ap);
117} 106}
118 107
119/** 108/**
120 * sis_error_handler - Probe specified port on PATA host controller 109 * sis_66_cable_detect - check for 40/80 pin
121 * @ap: Port to probe
122 *
123 * LOCKING:
124 * None (inherited from caller).
125 */
126
127static void sis_133_error_handler(struct ata_port *ap)
128{
129 ata_bmdma_drive_eh(ap, sis_133_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
130}
131
132
133/**
134 * sis_66_pre_reset - check for 40/80 pin
135 * @ap: Port 110 * @ap: Port
136 * 111 *
137 * Perform cable detection on the UDMA66, UDMA100 and early UDMA133 112 * Perform cable detection on the UDMA66, UDMA100 and early UDMA133
138 * SiS IDE controllers. 113 * SiS IDE controllers.
139 */ 114 */
140 115
141static int sis_66_pre_reset(struct ata_port *ap) 116static int sis_66_cable_detect(struct ata_port *ap)
142{ 117{
143 static const struct pci_bits sis_enable_bits[] = {
144 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
145 { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */
146 };
147
148 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 118 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
149 u8 tmp; 119 u8 tmp;
150 120
151 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) {
152 ata_port_disable(ap);
153 ata_port_printk(ap, KERN_INFO, "port disabled. ignoring.\n");
154 return 0;
155 }
156 /* Older chips keep cable detect in bits 4/5 of reg 0x48 */ 121 /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
157 pci_read_config_byte(pdev, 0x48, &tmp); 122 pci_read_config_byte(pdev, 0x48, &tmp);
158 tmp >>= ap->port_no; 123 tmp >>= ap->port_no;
159 if ((tmp & 0x10) && !sis_short_ata40(pdev)) 124 if ((tmp & 0x10) && !sis_short_ata40(pdev))
160 ap->cbl = ATA_CBL_PATA40; 125 return ATA_CBL_PATA40;
161 else 126 return ATA_CBL_PATA80;
162 ap->cbl = ATA_CBL_PATA80;
163
164 return ata_std_prereset(ap);
165} 127}
166 128
167/**
168 * sis_66_error_handler - Probe specified port on PATA host controller
169 * @ap: Port to probe
170 * @classes:
171 *
172 * LOCKING:
173 * None (inherited from caller).
174 */
175
176static void sis_66_error_handler(struct ata_port *ap)
177{
178 ata_bmdma_drive_eh(ap, sis_66_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
179}
180 129
181/** 130/**
182 * sis_old_pre_reset - probe begin 131 * sis_pre_reset - probe begin
183 * @ap: ATA port 132 * @ap: ATA port
184 * 133 *
185 * Set up cable type and use generic probe init 134 * Set up cable type and use generic probe init
186 */ 135 */
187 136
188static int sis_old_pre_reset(struct ata_port *ap) 137static int sis_pre_reset(struct ata_port *ap)
189{ 138{
190 static const struct pci_bits sis_enable_bits[] = { 139 static const struct pci_bits sis_enable_bits[] = {
191 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ 140 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
@@ -194,27 +143,23 @@ static int sis_old_pre_reset(struct ata_port *ap)
194 143
195 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 144 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
196 145
197 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) { 146 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no]))
198 ata_port_disable(ap); 147 return -ENOENT;
199 ata_port_printk(ap, KERN_INFO, "port disabled. ignoring.\n");
200 return 0;
201 }
202 ap->cbl = ATA_CBL_PATA40;
203 return ata_std_prereset(ap); 148 return ata_std_prereset(ap);
204} 149}
205 150
206 151
207/** 152/**
208 * sis_old_error_handler - Probe specified port on PATA host controller 153 * sis_error_handler - Probe specified port on PATA host controller
209 * @ap: Port to probe 154 * @ap: Port to probe
210 * 155 *
211 * LOCKING: 156 * LOCKING:
212 * None (inherited from caller). 157 * None (inherited from caller).
213 */ 158 */
214 159
215static void sis_old_error_handler(struct ata_port *ap) 160static void sis_error_handler(struct ata_port *ap)
216{ 161{
217 ata_bmdma_drive_eh(ap, sis_old_pre_reset, ata_std_softreset, NULL, ata_std_postreset); 162 ata_bmdma_drive_eh(ap, sis_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
218} 163}
219 164
220/** 165/**
@@ -494,7 +439,7 @@ static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *a
494 int drive_pci = sis_port_base(adev); 439 int drive_pci = sis_port_base(adev);
495 u16 timing; 440 u16 timing;
496 441
497 const u16 udma_bits[] = { 0x8F00, 0x8A00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100}; 442 static const u16 udma_bits[] = { 0x8F00, 0x8A00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100};
498 443
499 pci_read_config_word(pdev, drive_pci, &timing); 444 pci_read_config_word(pdev, drive_pci, &timing);
500 445
@@ -531,8 +476,8 @@ static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev)
531 u32 reg54; 476 u32 reg54;
532 477
533 /* bits 4- cycle time 8 - cvs time */ 478 /* bits 4- cycle time 8 - cvs time */
534 const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; 479 static const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 };
535 const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; 480 static const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 };
536 481
537 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ 482 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
538 pci_read_config_dword(pdev, 0x54, &reg54); 483 pci_read_config_dword(pdev, 0x54, &reg54);
@@ -595,8 +540,9 @@ static const struct ata_port_operations sis_133_ops = {
595 540
596 .freeze = ata_bmdma_freeze, 541 .freeze = ata_bmdma_freeze,
597 .thaw = ata_bmdma_thaw, 542 .thaw = ata_bmdma_thaw,
598 .error_handler = sis_133_error_handler, 543 .error_handler = sis_error_handler,
599 .post_internal_cmd = ata_bmdma_post_internal_cmd, 544 .post_internal_cmd = ata_bmdma_post_internal_cmd,
545 .cable_detect = sis_133_cable_detect,
600 546
601 .bmdma_setup = ata_bmdma_setup, 547 .bmdma_setup = ata_bmdma_setup,
602 .bmdma_start = ata_bmdma_start, 548 .bmdma_start = ata_bmdma_start,
@@ -628,8 +574,9 @@ static const struct ata_port_operations sis_133_early_ops = {
628 574
629 .freeze = ata_bmdma_freeze, 575 .freeze = ata_bmdma_freeze,
630 .thaw = ata_bmdma_thaw, 576 .thaw = ata_bmdma_thaw,
631 .error_handler = sis_66_error_handler, 577 .error_handler = sis_error_handler,
632 .post_internal_cmd = ata_bmdma_post_internal_cmd, 578 .post_internal_cmd = ata_bmdma_post_internal_cmd,
579 .cable_detect = sis_66_cable_detect,
633 580
634 .bmdma_setup = ata_bmdma_setup, 581 .bmdma_setup = ata_bmdma_setup,
635 .bmdma_start = ata_bmdma_start, 582 .bmdma_start = ata_bmdma_start,
@@ -661,9 +608,9 @@ static const struct ata_port_operations sis_100_ops = {
661 608
662 .freeze = ata_bmdma_freeze, 609 .freeze = ata_bmdma_freeze,
663 .thaw = ata_bmdma_thaw, 610 .thaw = ata_bmdma_thaw,
664 .error_handler = sis_66_error_handler, 611 .error_handler = sis_error_handler,
665 .post_internal_cmd = ata_bmdma_post_internal_cmd, 612 .post_internal_cmd = ata_bmdma_post_internal_cmd,
666 613 .cable_detect = sis_66_cable_detect,
667 614
668 .bmdma_setup = ata_bmdma_setup, 615 .bmdma_setup = ata_bmdma_setup,
669 .bmdma_start = ata_bmdma_start, 616 .bmdma_start = ata_bmdma_start,
@@ -692,10 +639,11 @@ static const struct ata_port_operations sis_66_ops = {
692 .check_status = ata_check_status, 639 .check_status = ata_check_status,
693 .exec_command = ata_exec_command, 640 .exec_command = ata_exec_command,
694 .dev_select = ata_std_dev_select, 641 .dev_select = ata_std_dev_select,
642 .cable_detect = sis_66_cable_detect,
695 643
696 .freeze = ata_bmdma_freeze, 644 .freeze = ata_bmdma_freeze,
697 .thaw = ata_bmdma_thaw, 645 .thaw = ata_bmdma_thaw,
698 .error_handler = sis_66_error_handler, 646 .error_handler = sis_error_handler,
699 .post_internal_cmd = ata_bmdma_post_internal_cmd, 647 .post_internal_cmd = ata_bmdma_post_internal_cmd,
700 648
701 .bmdma_setup = ata_bmdma_setup, 649 .bmdma_setup = ata_bmdma_setup,
@@ -728,8 +676,9 @@ static const struct ata_port_operations sis_old_ops = {
728 676
729 .freeze = ata_bmdma_freeze, 677 .freeze = ata_bmdma_freeze,
730 .thaw = ata_bmdma_thaw, 678 .thaw = ata_bmdma_thaw,
731 .error_handler = sis_old_error_handler, 679 .error_handler = sis_error_handler,
732 .post_internal_cmd = ata_bmdma_post_internal_cmd, 680 .post_internal_cmd = ata_bmdma_post_internal_cmd,
681 .cable_detect = ata_cable_40wire,
733 682
734 .bmdma_setup = ata_bmdma_setup, 683 .bmdma_setup = ata_bmdma_setup,
735 .bmdma_start = ata_bmdma_start, 684 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c
index b681441cfcb9..da9e22b25753 100644
--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -58,7 +58,6 @@ static int sl82c105_pre_reset(struct ata_port *ap)
58 58
59 if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no])) 59 if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no]))
60 return -ENOENT; 60 return -ENOENT;
61 ap->cbl = ATA_CBL_PATA40;
62 return ata_std_prereset(ap); 61 return ata_std_prereset(ap);
63} 62}
64 63
@@ -238,6 +237,7 @@ static struct ata_port_operations sl82c105_port_ops = {
238 .thaw = ata_bmdma_thaw, 237 .thaw = ata_bmdma_thaw,
239 .error_handler = sl82c105_error_handler, 238 .error_handler = sl82c105_error_handler,
240 .post_internal_cmd = ata_bmdma_post_internal_cmd, 239 .post_internal_cmd = ata_bmdma_post_internal_cmd,
240 .cable_detect = ata_cable_40wire,
241 241
242 .bmdma_setup = ata_bmdma_setup, 242 .bmdma_setup = ata_bmdma_setup,
243 .bmdma_start = sl82c105_bmdma_start, 243 .bmdma_start = sl82c105_bmdma_start,
diff --git a/drivers/ata/pata_triflex.c b/drivers/ata/pata_triflex.c
index 71418f2a0cdb..e618ffd6e944 100644
--- a/drivers/ata/pata_triflex.c
+++ b/drivers/ata/pata_triflex.c
@@ -43,7 +43,7 @@
43#include <linux/libata.h> 43#include <linux/libata.h>
44 44
45#define DRV_NAME "pata_triflex" 45#define DRV_NAME "pata_triflex"
46#define DRV_VERSION "0.2.7" 46#define DRV_VERSION "0.2.8"
47 47
48/** 48/**
49 * triflex_prereset - probe begin 49 * triflex_prereset - probe begin
@@ -63,7 +63,6 @@ static int triflex_prereset(struct ata_port *ap)
63 63
64 if (!pci_test_config_bits(pdev, &triflex_enable_bits[ap->port_no])) 64 if (!pci_test_config_bits(pdev, &triflex_enable_bits[ap->port_no]))
65 return -ENOENT; 65 return -ENOENT;
66 ap->cbl = ATA_CBL_PATA40;
67 return ata_std_prereset(ap); 66 return ata_std_prereset(ap);
68} 67}
69 68
@@ -214,6 +213,7 @@ static struct ata_port_operations triflex_port_ops = {
214 .thaw = ata_bmdma_thaw, 213 .thaw = ata_bmdma_thaw,
215 .error_handler = triflex_error_handler, 214 .error_handler = triflex_error_handler,
216 .post_internal_cmd = ata_bmdma_post_internal_cmd, 215 .post_internal_cmd = ata_bmdma_post_internal_cmd,
216 .cable_detect = ata_cable_40wire,
217 217
218 .bmdma_setup = ata_bmdma_setup, 218 .bmdma_setup = ata_bmdma_setup,
219 .bmdma_start = triflex_bmdma_start, 219 .bmdma_start = triflex_bmdma_start,
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c
index 946ade0e1f1b..96b71791d2f4 100644
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -62,7 +62,7 @@
62#include <linux/libata.h> 62#include <linux/libata.h>
63 63
64#define DRV_NAME "pata_via" 64#define DRV_NAME "pata_via"
65#define DRV_VERSION "0.2.1" 65#define DRV_VERSION "0.3.1"
66 66
67/* 67/*
68 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx 68 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
@@ -135,16 +135,23 @@ static const struct via_isa_bridge {
135 */ 135 */
136 136
137static int via_cable_detect(struct ata_port *ap) { 137static int via_cable_detect(struct ata_port *ap) {
138 const struct via_isa_bridge *config = ap->host->private_data;
138 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 139 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
139 u32 ata66; 140 u32 ata66;
140 141
142 /* Early chips are 40 wire */
143 if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
144 return ATA_CBL_PATA40;
145 /* UDMA 66 chips have only drive side logic */
146 else if((config->flags & VIA_UDMA) < VIA_UDMA_100)
147 return ATA_CBL_PATA_UNK;
148 /* UDMA 100 or later */
141 pci_read_config_dword(pdev, 0x50, &ata66); 149 pci_read_config_dword(pdev, 0x50, &ata66);
142 /* Check both the drive cable reporting bits, we might not have 150 /* Check both the drive cable reporting bits, we might not have
143 two drives */ 151 two drives */
144 if (ata66 & (0x10100000 >> (16 * ap->port_no))) 152 if (ata66 & (0x10100000 >> (16 * ap->port_no)))
145 return ATA_CBL_PATA80; 153 return ATA_CBL_PATA80;
146 else 154 return ATA_CBL_PATA40;
147 return ATA_CBL_PATA40;
148} 155}
149 156
150static int via_pre_reset(struct ata_port *ap) 157static int via_pre_reset(struct ata_port *ap)
@@ -156,22 +163,10 @@ static int via_pre_reset(struct ata_port *ap)
156 { 0x40, 1, 0x02, 0x02 }, 163 { 0x40, 1, 0x02, 0x02 },
157 { 0x40, 1, 0x01, 0x01 } 164 { 0x40, 1, 0x01, 0x01 }
158 }; 165 };
159
160 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 166 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
161
162 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no])) 167 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
163 return -ENOENT; 168 return -ENOENT;
164 } 169 }
165
166 if ((config->flags & VIA_UDMA) >= VIA_UDMA_100)
167 ap->cbl = via_cable_detect(ap);
168 /* The UDMA66 series has no cable detect so do drive side detect */
169 else if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
170 ap->cbl = ATA_CBL_PATA40;
171 else
172 ap->cbl = ATA_CBL_PATA_UNK;
173
174
175 return ata_std_prereset(ap); 170 return ata_std_prereset(ap);
176} 171}
177 172
@@ -327,6 +322,7 @@ static struct ata_port_operations via_port_ops = {
327 .thaw = ata_bmdma_thaw, 322 .thaw = ata_bmdma_thaw,
328 .error_handler = via_error_handler, 323 .error_handler = via_error_handler,
329 .post_internal_cmd = ata_bmdma_post_internal_cmd, 324 .post_internal_cmd = ata_bmdma_post_internal_cmd,
325 .cable_detect = via_cable_detect,
330 326
331 .bmdma_setup = ata_bmdma_setup, 327 .bmdma_setup = ata_bmdma_setup,
332 .bmdma_start = ata_bmdma_start, 328 .bmdma_start = ata_bmdma_start,
@@ -362,6 +358,7 @@ static struct ata_port_operations via_port_ops_noirq = {
362 .thaw = ata_bmdma_thaw, 358 .thaw = ata_bmdma_thaw,
363 .error_handler = via_error_handler, 359 .error_handler = via_error_handler,
364 .post_internal_cmd = ata_bmdma_post_internal_cmd, 360 .post_internal_cmd = ata_bmdma_post_internal_cmd,
361 .cable_detect = via_cable_detect,
365 362
366 .bmdma_setup = ata_bmdma_setup, 363 .bmdma_setup = ata_bmdma_setup,
367 .bmdma_start = ata_bmdma_start, 364 .bmdma_start = ata_bmdma_start,
diff --git a/drivers/ata/pata_winbond.c b/drivers/ata/pata_winbond.c
index 6c111035fc84..cc4ad271afb5 100644
--- a/drivers/ata/pata_winbond.c
+++ b/drivers/ata/pata_winbond.c
@@ -8,7 +8,6 @@
8 8
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <linux/module.h> 10#include <linux/module.h>
11#include <linux/pci.h>
12#include <linux/init.h> 11#include <linux/init.h>
13#include <linux/blkdev.h> 12#include <linux/blkdev.h>
14#include <linux/delay.h> 13#include <linux/delay.h>
@@ -36,7 +35,7 @@ static int probe_winbond = 1;
36static int probe_winbond; 35static int probe_winbond;
37#endif 36#endif
38 37
39static spinlock_t winbond_lock = SPIN_LOCK_UNLOCKED; 38static DEFINE_SPINLOCK(winbond_lock);
40 39
41static void winbond_writecfg(unsigned long port, u8 reg, u8 val) 40static void winbond_writecfg(unsigned long port, u8 reg, u8 val)
42{ 41{
@@ -152,13 +151,13 @@ static struct ata_port_operations winbond_port_ops = {
152 .thaw = ata_bmdma_thaw, 151 .thaw = ata_bmdma_thaw,
153 .error_handler = ata_bmdma_error_handler, 152 .error_handler = ata_bmdma_error_handler,
154 .post_internal_cmd = ata_bmdma_post_internal_cmd, 153 .post_internal_cmd = ata_bmdma_post_internal_cmd,
154 .cable_detect = ata_cable_40wire,
155 155
156 .qc_prep = ata_qc_prep, 156 .qc_prep = ata_qc_prep,
157 .qc_issue = ata_qc_issue_prot, 157 .qc_issue = ata_qc_issue_prot,
158 158
159 .data_xfer = winbond_data_xfer, 159 .data_xfer = winbond_data_xfer,
160 160
161 .irq_handler = ata_interrupt,
162 .irq_clear = ata_bmdma_irq_clear, 161 .irq_clear = ata_bmdma_irq_clear,
163 .irq_on = ata_irq_on, 162 .irq_on = ata_irq_on,
164 .irq_ack = ata_irq_ack, 163 .irq_ack = ata_irq_ack,
@@ -179,11 +178,9 @@ static struct ata_port_operations winbond_port_ops = {
179 178
180static __init int winbond_init_one(unsigned long port) 179static __init int winbond_init_one(unsigned long port)
181{ 180{
182 struct ata_probe_ent ae;
183 struct platform_device *pdev; 181 struct platform_device *pdev;
184 int ret;
185 u8 reg; 182 u8 reg;
186 int i; 183 int i, rc;
187 184
188 reg = winbond_readcfg(port, 0x81); 185 reg = winbond_readcfg(port, 0x81);
189 reg |= 0x80; /* jumpered mode off */ 186 reg |= 0x80; /* jumpered mode off */
@@ -202,58 +199,56 @@ static __init int winbond_init_one(unsigned long port)
202 199
203 for (i = 0; i < 2 ; i ++) { 200 for (i = 0; i < 2 ; i ++) {
204 unsigned long cmd_port = 0x1F0 - (0x80 * i); 201 unsigned long cmd_port = 0x1F0 - (0x80 * i);
202 struct ata_host *host;
203 struct ata_port *ap;
205 void __iomem *cmd_addr, *ctl_addr; 204 void __iomem *cmd_addr, *ctl_addr;
206 205
207 if (reg & (1 << i)) { 206 if (!(reg & (1 << i)))
208 /* 207 continue;
209 * Fill in a probe structure first of all 208
210 */ 209 pdev = platform_device_register_simple(DRV_NAME, nr_winbond_host, NULL, 0);
211 210 if (IS_ERR(pdev))
212 pdev = platform_device_register_simple(DRV_NAME, nr_winbond_host, NULL, 0); 211 return PTR_ERR(pdev);
213 if (IS_ERR(pdev)) 212
214 return PTR_ERR(pdev); 213 rc = -ENOMEM;
215 214 host = ata_host_alloc(&pdev->dev, 1);
216 cmd_addr = devm_ioport_map(&pdev->dev, cmd_port, 8); 215 if (!host)
217 ctl_addr = devm_ioport_map(&pdev->dev, cmd_port + 0x0206, 1); 216 goto err_unregister;
218 if (!cmd_addr || !ctl_addr) { 217
219 platform_device_unregister(pdev); 218 rc = -ENOMEM;
220 return -ENOMEM; 219 cmd_addr = devm_ioport_map(&pdev->dev, cmd_port, 8);
221 } 220 ctl_addr = devm_ioport_map(&pdev->dev, cmd_port + 0x0206, 1);
222 221 if (!cmd_addr || !ctl_addr)
223 memset(&ae, 0, sizeof(struct ata_probe_ent)); 222 goto err_unregister;
224 INIT_LIST_HEAD(&ae.node); 223
225 ae.dev = &pdev->dev; 224 ap = host->ports[0];
226 225 ap->ops = &winbond_port_ops;
227 ae.port_ops = &winbond_port_ops; 226 ap->pio_mask = 0x1F;
228 ae.pio_mask = 0x1F; 227 ap->flags |= ATA_FLAG_SLAVE_POSS;
229 228 ap->ioaddr.cmd_addr = cmd_addr;
230 ae.sht = &winbond_sht; 229 ap->ioaddr.altstatus_addr = ctl_addr;
231 230 ap->ioaddr.ctl_addr = ctl_addr;
232 ae.n_ports = 1; 231 ata_std_ports(&ap->ioaddr);
233 ae.irq = 14 + i; 232
234 ae.irq_flags = 0; 233 /* hook in a private data structure per channel */
235 ae.port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST; 234 host->private_data = &winbond_data[nr_winbond_host];
236 ae.port[0].cmd_addr = cmd_addr; 235 winbond_data[nr_winbond_host].config = port;
237 ae.port[0].altstatus_addr = ctl_addr; 236 winbond_data[nr_winbond_host].platform_dev = pdev;
238 ae.port[0].ctl_addr = ctl_addr; 237
239 ata_std_ports(&ae.port[0]); 238 /* activate */
240 /* 239 rc = ata_host_activate(host, 14 + i, ata_interrupt, 0,
241 * Hook in a private data structure per channel 240 &winbond_sht);
242 */ 241 if (rc)
243 ae.private_data = &winbond_data[nr_winbond_host]; 242 goto err_unregister;
244 winbond_data[nr_winbond_host].config = port; 243
245 winbond_data[nr_winbond_host].platform_dev = pdev; 244 winbond_host[nr_winbond_host++] = dev_get_drvdata(&pdev->dev);
246
247 ret = ata_device_add(&ae);
248 if (ret == 0) {
249 platform_device_unregister(pdev);
250 return -ENODEV;
251 }
252 winbond_host[nr_winbond_host++] = dev_get_drvdata(&pdev->dev);
253 }
254 } 245 }
255 246
256 return 0; 247 return 0;
248
249 err_unregister:
250 platform_device_unregister(pdev);
251 return rc;
257} 252}
258 253
259/** 254/**
diff --git a/drivers/ata/pdc_adma.c b/drivers/ata/pdc_adma.c
index 5dd3ca8b5f29..52b69530ab29 100644
--- a/drivers/ata/pdc_adma.c
+++ b/drivers/ata/pdc_adma.c
@@ -52,9 +52,9 @@
52/* macro to calculate base address for ADMA regs */ 52/* macro to calculate base address for ADMA regs */
53#define ADMA_REGS(base,port_no) ((base) + 0x80 + ((port_no) * 0x20)) 53#define ADMA_REGS(base,port_no) ((base) + 0x80 + ((port_no) * 0x20))
54 54
55/* macro to obtain addresses from ata_host */ 55/* macro to obtain addresses from ata_port */
56#define ADMA_HOST_REGS(host,port_no) \ 56#define ADMA_PORT_REGS(ap) \
57 ADMA_REGS((host)->iomap[ADMA_MMIO_BAR], port_no) 57 ADMA_REGS((ap)->host->iomap[ADMA_MMIO_BAR], ap->port_no)
58 58
59enum { 59enum {
60 ADMA_MMIO_BAR = 4, 60 ADMA_MMIO_BAR = 4,
@@ -128,7 +128,6 @@ struct adma_port_priv {
128 128
129static int adma_ata_init_one (struct pci_dev *pdev, 129static int adma_ata_init_one (struct pci_dev *pdev,
130 const struct pci_device_id *ent); 130 const struct pci_device_id *ent);
131static irqreturn_t adma_intr (int irq, void *dev_instance);
132static int adma_port_start(struct ata_port *ap); 131static int adma_port_start(struct ata_port *ap);
133static void adma_host_stop(struct ata_host *host); 132static void adma_host_stop(struct ata_host *host);
134static void adma_port_stop(struct ata_port *ap); 133static void adma_port_stop(struct ata_port *ap);
@@ -172,7 +171,6 @@ static const struct ata_port_operations adma_ata_ops = {
172 .qc_issue = adma_qc_issue, 171 .qc_issue = adma_qc_issue,
173 .eng_timeout = adma_eng_timeout, 172 .eng_timeout = adma_eng_timeout,
174 .data_xfer = ata_data_xfer, 173 .data_xfer = ata_data_xfer,
175 .irq_handler = adma_intr,
176 .irq_clear = adma_irq_clear, 174 .irq_clear = adma_irq_clear,
177 .irq_on = ata_irq_on, 175 .irq_on = ata_irq_on,
178 .irq_ack = ata_irq_ack, 176 .irq_ack = ata_irq_ack,
@@ -186,7 +184,6 @@ static const struct ata_port_operations adma_ata_ops = {
186static struct ata_port_info adma_port_info[] = { 184static struct ata_port_info adma_port_info[] = {
187 /* board_1841_idx */ 185 /* board_1841_idx */
188 { 186 {
189 .sht = &adma_ata_sht,
190 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | 187 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST |
191 ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO | 188 ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO |
192 ATA_FLAG_PIO_POLLING, 189 ATA_FLAG_PIO_POLLING,
@@ -229,8 +226,10 @@ static void adma_irq_clear(struct ata_port *ap)
229 /* nothing */ 226 /* nothing */
230} 227}
231 228
232static void adma_reset_engine(void __iomem *chan) 229static void adma_reset_engine(struct ata_port *ap)
233{ 230{
231 void __iomem *chan = ADMA_PORT_REGS(ap);
232
234 /* reset ADMA to idle state */ 233 /* reset ADMA to idle state */
235 writew(aPIOMD4 | aNIEN | aRSTADM, chan + ADMA_CONTROL); 234 writew(aPIOMD4 | aNIEN | aRSTADM, chan + ADMA_CONTROL);
236 udelay(2); 235 udelay(2);
@@ -241,14 +240,14 @@ static void adma_reset_engine(void __iomem *chan)
241static void adma_reinit_engine(struct ata_port *ap) 240static void adma_reinit_engine(struct ata_port *ap)
242{ 241{
243 struct adma_port_priv *pp = ap->private_data; 242 struct adma_port_priv *pp = ap->private_data;
244 void __iomem *chan = ADMA_HOST_REGS(ap->host, ap->port_no); 243 void __iomem *chan = ADMA_PORT_REGS(ap);
245 244
246 /* mask/clear ATA interrupts */ 245 /* mask/clear ATA interrupts */
247 writeb(ATA_NIEN, ap->ioaddr.ctl_addr); 246 writeb(ATA_NIEN, ap->ioaddr.ctl_addr);
248 ata_check_status(ap); 247 ata_check_status(ap);
249 248
250 /* reset the ADMA engine */ 249 /* reset the ADMA engine */
251 adma_reset_engine(chan); 250 adma_reset_engine(ap);
252 251
253 /* set in-FIFO threshold to 0x100 */ 252 /* set in-FIFO threshold to 0x100 */
254 writew(0x100, chan + ADMA_FIFO_IN); 253 writew(0x100, chan + ADMA_FIFO_IN);
@@ -268,7 +267,7 @@ static void adma_reinit_engine(struct ata_port *ap)
268 267
269static inline void adma_enter_reg_mode(struct ata_port *ap) 268static inline void adma_enter_reg_mode(struct ata_port *ap)
270{ 269{
271 void __iomem *chan = ADMA_HOST_REGS(ap->host, ap->port_no); 270 void __iomem *chan = ADMA_PORT_REGS(ap);
272 271
273 writew(aPIOMD4, chan + ADMA_CONTROL); 272 writew(aPIOMD4, chan + ADMA_CONTROL);
274 readb(chan + ADMA_STATUS); /* flush */ 273 readb(chan + ADMA_STATUS); /* flush */
@@ -415,7 +414,7 @@ static void adma_qc_prep(struct ata_queued_cmd *qc)
415static inline void adma_packet_start(struct ata_queued_cmd *qc) 414static inline void adma_packet_start(struct ata_queued_cmd *qc)
416{ 415{
417 struct ata_port *ap = qc->ap; 416 struct ata_port *ap = qc->ap;
418 void __iomem *chan = ADMA_HOST_REGS(ap->host, ap->port_no); 417 void __iomem *chan = ADMA_PORT_REGS(ap);
419 418
420 VPRINTK("ENTER, ap %p\n", ap); 419 VPRINTK("ENTER, ap %p\n", ap);
421 420
@@ -453,7 +452,7 @@ static inline unsigned int adma_intr_pkt(struct ata_host *host)
453 struct ata_port *ap = host->ports[port_no]; 452 struct ata_port *ap = host->ports[port_no];
454 struct adma_port_priv *pp; 453 struct adma_port_priv *pp;
455 struct ata_queued_cmd *qc; 454 struct ata_queued_cmd *qc;
456 void __iomem *chan = ADMA_HOST_REGS(host, port_no); 455 void __iomem *chan = ADMA_PORT_REGS(ap);
457 u8 status = readb(chan + ADMA_STATUS); 456 u8 status = readb(chan + ADMA_STATUS);
458 457
459 if (status == 0) 458 if (status == 0)
@@ -575,7 +574,7 @@ static int adma_port_start(struct ata_port *ap)
575 574
576static void adma_port_stop(struct ata_port *ap) 575static void adma_port_stop(struct ata_port *ap)
577{ 576{
578 adma_reset_engine(ADMA_HOST_REGS(ap->host, ap->port_no)); 577 adma_reset_engine(ap);
579} 578}
580 579
581static void adma_host_stop(struct ata_host *host) 580static void adma_host_stop(struct ata_host *host)
@@ -583,21 +582,19 @@ static void adma_host_stop(struct ata_host *host)
583 unsigned int port_no; 582 unsigned int port_no;
584 583
585 for (port_no = 0; port_no < ADMA_PORTS; ++port_no) 584 for (port_no = 0; port_no < ADMA_PORTS; ++port_no)
586 adma_reset_engine(ADMA_HOST_REGS(host, port_no)); 585 adma_reset_engine(host->ports[port_no]);
587} 586}
588 587
589static void adma_host_init(unsigned int chip_id, 588static void adma_host_init(struct ata_host *host, unsigned int chip_id)
590 struct ata_probe_ent *probe_ent)
591{ 589{
592 unsigned int port_no; 590 unsigned int port_no;
593 void __iomem *mmio_base = probe_ent->iomap[ADMA_MMIO_BAR];
594 591
595 /* enable/lock aGO operation */ 592 /* enable/lock aGO operation */
596 writeb(7, mmio_base + ADMA_MODE_LOCK); 593 writeb(7, host->iomap[ADMA_MMIO_BAR] + ADMA_MODE_LOCK);
597 594
598 /* reset the ADMA logic */ 595 /* reset the ADMA logic */
599 for (port_no = 0; port_no < ADMA_PORTS; ++port_no) 596 for (port_no = 0; port_no < ADMA_PORTS; ++port_no)
600 adma_reset_engine(ADMA_REGS(mmio_base, port_no)); 597 adma_reset_engine(host->ports[port_no]);
601} 598}
602 599
603static int adma_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base) 600static int adma_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base)
@@ -623,14 +620,21 @@ static int adma_ata_init_one(struct pci_dev *pdev,
623 const struct pci_device_id *ent) 620 const struct pci_device_id *ent)
624{ 621{
625 static int printed_version; 622 static int printed_version;
626 struct ata_probe_ent *probe_ent = NULL;
627 void __iomem *mmio_base;
628 unsigned int board_idx = (unsigned int) ent->driver_data; 623 unsigned int board_idx = (unsigned int) ent->driver_data;
624 const struct ata_port_info *ppi[] = { &adma_port_info[board_idx], NULL };
625 struct ata_host *host;
626 void __iomem *mmio_base;
629 int rc, port_no; 627 int rc, port_no;
630 628
631 if (!printed_version++) 629 if (!printed_version++)
632 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 630 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
633 631
632 /* alloc host */
633 host = ata_host_alloc_pinfo(&pdev->dev, ppi, ADMA_PORTS);
634 if (!host)
635 return -ENOMEM;
636
637 /* acquire resources and fill host */
634 rc = pcim_enable_device(pdev); 638 rc = pcim_enable_device(pdev);
635 if (rc) 639 if (rc)
636 return rc; 640 return rc;
@@ -641,46 +645,23 @@ static int adma_ata_init_one(struct pci_dev *pdev,
641 rc = pcim_iomap_regions(pdev, 1 << ADMA_MMIO_BAR, DRV_NAME); 645 rc = pcim_iomap_regions(pdev, 1 << ADMA_MMIO_BAR, DRV_NAME);
642 if (rc) 646 if (rc)
643 return rc; 647 return rc;
644 mmio_base = pcim_iomap_table(pdev)[ADMA_MMIO_BAR]; 648 host->iomap = pcim_iomap_table(pdev);
649 mmio_base = host->iomap[ADMA_MMIO_BAR];
645 650
646 rc = adma_set_dma_masks(pdev, mmio_base); 651 rc = adma_set_dma_masks(pdev, mmio_base);
647 if (rc) 652 if (rc)
648 return rc; 653 return rc;
649 654
650 probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL); 655 for (port_no = 0; port_no < ADMA_PORTS; ++port_no)
651 if (probe_ent == NULL) 656 adma_ata_setup_port(&host->ports[port_no]->ioaddr,
652 return -ENOMEM;
653
654 probe_ent->dev = pci_dev_to_dev(pdev);
655 INIT_LIST_HEAD(&probe_ent->node);
656
657 probe_ent->sht = adma_port_info[board_idx].sht;
658 probe_ent->port_flags = adma_port_info[board_idx].flags;
659 probe_ent->pio_mask = adma_port_info[board_idx].pio_mask;
660 probe_ent->mwdma_mask = adma_port_info[board_idx].mwdma_mask;
661 probe_ent->udma_mask = adma_port_info[board_idx].udma_mask;
662 probe_ent->port_ops = adma_port_info[board_idx].port_ops;
663
664 probe_ent->irq = pdev->irq;
665 probe_ent->irq_flags = IRQF_SHARED;
666 probe_ent->n_ports = ADMA_PORTS;
667 probe_ent->iomap = pcim_iomap_table(pdev);
668
669 for (port_no = 0; port_no < probe_ent->n_ports; ++port_no) {
670 adma_ata_setup_port(&probe_ent->port[port_no],
671 ADMA_ATA_REGS(mmio_base, port_no)); 657 ADMA_ATA_REGS(mmio_base, port_no));
672 }
673
674 pci_set_master(pdev);
675 658
676 /* initialize adapter */ 659 /* initialize adapter */
677 adma_host_init(board_idx, probe_ent); 660 adma_host_init(host, board_idx);
678 661
679 if (!ata_device_add(probe_ent)) 662 pci_set_master(pdev);
680 return -ENODEV; 663 return ata_host_activate(host, pdev->irq, adma_intr, IRQF_SHARED,
681 664 &adma_ata_sht);
682 devm_kfree(&pdev->dev, probe_ent);
683 return 0;
684} 665}
685 666
686static int __init adma_ata_init(void) 667static int __init adma_ata_init(void)
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 1e21688bfcf2..f099a1d83a00 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -488,11 +488,11 @@ static void inic_error_handler(struct ata_port *ap)
488static void inic_post_internal_cmd(struct ata_queued_cmd *qc) 488static void inic_post_internal_cmd(struct ata_queued_cmd *qc)
489{ 489{
490 /* make DMA engine forget about the failed command */ 490 /* make DMA engine forget about the failed command */
491 if (qc->err_mask) 491 if (qc->flags & ATA_QCFLAG_FAILED)
492 inic_reset_port(inic_port_base(qc->ap)); 492 inic_reset_port(inic_port_base(qc->ap));
493} 493}
494 494
495static void inic_dev_config(struct ata_port *ap, struct ata_device *dev) 495static void inic_dev_config(struct ata_device *dev)
496{ 496{
497 /* inic can only handle upto LBA28 max sectors */ 497 /* inic can only handle upto LBA28 max sectors */
498 if (dev->max_sectors > ATA_MAX_SECTORS) 498 if (dev->max_sectors > ATA_MAX_SECTORS)
@@ -559,7 +559,6 @@ static struct ata_port_operations inic_port_ops = {
559 .bmdma_stop = inic_bmdma_stop, 559 .bmdma_stop = inic_bmdma_stop,
560 .bmdma_status = inic_bmdma_status, 560 .bmdma_status = inic_bmdma_status,
561 561
562 .irq_handler = inic_interrupt,
563 .irq_clear = inic_irq_clear, 562 .irq_clear = inic_irq_clear,
564 .irq_on = ata_irq_on, 563 .irq_on = ata_irq_on,
565 .irq_ack = ata_irq_ack, 564 .irq_ack = ata_irq_ack,
@@ -580,7 +579,6 @@ static struct ata_port_operations inic_port_ops = {
580}; 579};
581 580
582static struct ata_port_info inic_port_info = { 581static struct ata_port_info inic_port_info = {
583 .sht = &inic_sht,
584 /* For some reason, ATA_PROT_ATAPI is broken on this 582 /* For some reason, ATA_PROT_ATAPI is broken on this
585 * controller, and no, PIO_POLLING does't fix it. It somehow 583 * controller, and no, PIO_POLLING does't fix it. It somehow
586 * manages to report the wrong ireason and ignoring ireason 584 * manages to report the wrong ireason and ignoring ireason
@@ -642,7 +640,9 @@ static int inic_pci_device_resume(struct pci_dev *pdev)
642 void __iomem *mmio_base = host->iomap[MMIO_BAR]; 640 void __iomem *mmio_base = host->iomap[MMIO_BAR];
643 int rc; 641 int rc;
644 642
645 ata_pci_device_do_resume(pdev); 643 rc = ata_pci_device_do_resume(pdev);
644 if (rc)
645 return rc;
646 646
647 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { 647 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) {
648 rc = init_controller(mmio_base, hpriv->cached_hctl); 648 rc = init_controller(mmio_base, hpriv->cached_hctl);
@@ -659,8 +659,8 @@ static int inic_pci_device_resume(struct pci_dev *pdev)
659static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 659static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
660{ 660{
661 static int printed_version; 661 static int printed_version;
662 struct ata_port_info *pinfo = &inic_port_info; 662 const struct ata_port_info *ppi[] = { &inic_port_info, NULL };
663 struct ata_probe_ent *probe_ent; 663 struct ata_host *host;
664 struct inic_host_priv *hpriv; 664 struct inic_host_priv *hpriv;
665 void __iomem * const *iomap; 665 void __iomem * const *iomap;
666 int i, rc; 666 int i, rc;
@@ -668,6 +668,15 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
668 if (!printed_version++) 668 if (!printed_version++)
669 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 669 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
670 670
671 /* alloc host */
672 host = ata_host_alloc_pinfo(&pdev->dev, ppi, NR_PORTS);
673 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
674 if (!host || !hpriv)
675 return -ENOMEM;
676
677 host->private_data = hpriv;
678
679 /* acquire resources and fill host */
671 rc = pcim_enable_device(pdev); 680 rc = pcim_enable_device(pdev);
672 if (rc) 681 if (rc)
673 return rc; 682 return rc;
@@ -675,7 +684,22 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
675 rc = pcim_iomap_regions(pdev, 0x3f, DRV_NAME); 684 rc = pcim_iomap_regions(pdev, 0x3f, DRV_NAME);
676 if (rc) 685 if (rc)
677 return rc; 686 return rc;
678 iomap = pcim_iomap_table(pdev); 687 host->iomap = iomap = pcim_iomap_table(pdev);
688
689 for (i = 0; i < NR_PORTS; i++) {
690 struct ata_ioports *port = &host->ports[i]->ioaddr;
691 void __iomem *port_base = iomap[MMIO_BAR] + i * PORT_SIZE;
692
693 port->cmd_addr = iomap[2 * i];
694 port->altstatus_addr =
695 port->ctl_addr = (void __iomem *)
696 ((unsigned long)iomap[2 * i + 1] | ATA_PCI_CTL_OFS);
697 port->scr_addr = port_base + PORT_SCR;
698
699 ata_std_ports(port);
700 }
701
702 hpriv->cached_hctl = readw(iomap[MMIO_BAR] + HOST_CTL);
679 703
680 /* Set dma_mask. This devices doesn't support 64bit addressing. */ 704 /* Set dma_mask. This devices doesn't support 64bit addressing. */
681 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 705 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
@@ -692,43 +716,6 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
692 return rc; 716 return rc;
693 } 717 }
694 718
695 probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL);
696 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
697 if (!probe_ent || !hpriv)
698 return -ENOMEM;
699
700 probe_ent->dev = &pdev->dev;
701 INIT_LIST_HEAD(&probe_ent->node);
702
703 probe_ent->sht = pinfo->sht;
704 probe_ent->port_flags = pinfo->flags;
705 probe_ent->pio_mask = pinfo->pio_mask;
706 probe_ent->mwdma_mask = pinfo->mwdma_mask;
707 probe_ent->udma_mask = pinfo->udma_mask;
708 probe_ent->port_ops = pinfo->port_ops;
709 probe_ent->n_ports = NR_PORTS;
710
711 probe_ent->irq = pdev->irq;
712 probe_ent->irq_flags = IRQF_SHARED;
713
714 probe_ent->iomap = iomap;
715
716 for (i = 0; i < NR_PORTS; i++) {
717 struct ata_ioports *port = &probe_ent->port[i];
718 void __iomem *port_base = iomap[MMIO_BAR] + i * PORT_SIZE;
719
720 port->cmd_addr = iomap[2 * i];
721 port->altstatus_addr =
722 port->ctl_addr = (void __iomem *)
723 ((unsigned long)iomap[2 * i + 1] | ATA_PCI_CTL_OFS);
724 port->scr_addr = port_base + PORT_SCR;
725
726 ata_std_ports(port);
727 }
728
729 probe_ent->private_data = hpriv;
730 hpriv->cached_hctl = readw(iomap[MMIO_BAR] + HOST_CTL);
731
732 rc = init_controller(iomap[MMIO_BAR], hpriv->cached_hctl); 719 rc = init_controller(iomap[MMIO_BAR], hpriv->cached_hctl);
733 if (rc) { 720 if (rc) {
734 dev_printk(KERN_ERR, &pdev->dev, 721 dev_printk(KERN_ERR, &pdev->dev,
@@ -737,13 +724,8 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
737 } 724 }
738 725
739 pci_set_master(pdev); 726 pci_set_master(pdev);
740 727 return ata_host_activate(host, pdev->irq, inic_interrupt, IRQF_SHARED,
741 if (!ata_device_add(probe_ent)) 728 &inic_sht);
742 return -ENODEV;
743
744 devm_kfree(&pdev->dev, probe_ent);
745
746 return 0;
747} 729}
748 730
749static const struct pci_device_id inic_pci_tbl[] = { 731static const struct pci_device_id inic_pci_tbl[] = {
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index a65ba636aaa8..cb9b9ac12b4c 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -253,10 +253,7 @@ enum {
253#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE) 253#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE)
254 254
255enum { 255enum {
256 /* Our DMA boundary is determined by an ePRD being unable to handle 256 MV_DMA_BOUNDARY = 0xffffffffU,
257 * anything larger than 64KB
258 */
259 MV_DMA_BOUNDARY = 0xffffU,
260 257
261 EDMA_REQ_Q_BASE_LO_MASK = 0xfffffc00U, 258 EDMA_REQ_Q_BASE_LO_MASK = 0xfffffc00U,
262 259
@@ -350,7 +347,6 @@ static void mv_port_stop(struct ata_port *ap);
350static void mv_qc_prep(struct ata_queued_cmd *qc); 347static void mv_qc_prep(struct ata_queued_cmd *qc);
351static void mv_qc_prep_iie(struct ata_queued_cmd *qc); 348static void mv_qc_prep_iie(struct ata_queued_cmd *qc);
352static unsigned int mv_qc_issue(struct ata_queued_cmd *qc); 349static unsigned int mv_qc_issue(struct ata_queued_cmd *qc);
353static irqreturn_t mv_interrupt(int irq, void *dev_instance);
354static void mv_eng_timeout(struct ata_port *ap); 350static void mv_eng_timeout(struct ata_port *ap);
355static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); 351static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
356 352
@@ -384,10 +380,10 @@ static struct scsi_host_template mv_sht = {
384 .queuecommand = ata_scsi_queuecmd, 380 .queuecommand = ata_scsi_queuecmd,
385 .can_queue = MV_USE_Q_DEPTH, 381 .can_queue = MV_USE_Q_DEPTH,
386 .this_id = ATA_SHT_THIS_ID, 382 .this_id = ATA_SHT_THIS_ID,
387 .sg_tablesize = MV_MAX_SG_CT / 2, 383 .sg_tablesize = MV_MAX_SG_CT,
388 .cmd_per_lun = ATA_SHT_CMD_PER_LUN, 384 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
389 .emulated = ATA_SHT_EMULATED, 385 .emulated = ATA_SHT_EMULATED,
390 .use_clustering = ATA_SHT_USE_CLUSTERING, 386 .use_clustering = 1,
391 .proc_name = DRV_NAME, 387 .proc_name = DRV_NAME,
392 .dma_boundary = MV_DMA_BOUNDARY, 388 .dma_boundary = MV_DMA_BOUNDARY,
393 .slave_configure = ata_scsi_slave_config, 389 .slave_configure = ata_scsi_slave_config,
@@ -405,6 +401,7 @@ static const struct ata_port_operations mv5_ops = {
405 .dev_select = ata_std_dev_select, 401 .dev_select = ata_std_dev_select,
406 402
407 .phy_reset = mv_phy_reset, 403 .phy_reset = mv_phy_reset,
404 .cable_detect = ata_cable_sata,
408 405
409 .qc_prep = mv_qc_prep, 406 .qc_prep = mv_qc_prep,
410 .qc_issue = mv_qc_issue, 407 .qc_issue = mv_qc_issue,
@@ -412,7 +409,6 @@ static const struct ata_port_operations mv5_ops = {
412 409
413 .eng_timeout = mv_eng_timeout, 410 .eng_timeout = mv_eng_timeout,
414 411
415 .irq_handler = mv_interrupt,
416 .irq_clear = mv_irq_clear, 412 .irq_clear = mv_irq_clear,
417 .irq_on = ata_irq_on, 413 .irq_on = ata_irq_on,
418 .irq_ack = ata_irq_ack, 414 .irq_ack = ata_irq_ack,
@@ -434,6 +430,7 @@ static const struct ata_port_operations mv6_ops = {
434 .dev_select = ata_std_dev_select, 430 .dev_select = ata_std_dev_select,
435 431
436 .phy_reset = mv_phy_reset, 432 .phy_reset = mv_phy_reset,
433 .cable_detect = ata_cable_sata,
437 434
438 .qc_prep = mv_qc_prep, 435 .qc_prep = mv_qc_prep,
439 .qc_issue = mv_qc_issue, 436 .qc_issue = mv_qc_issue,
@@ -441,7 +438,6 @@ static const struct ata_port_operations mv6_ops = {
441 438
442 .eng_timeout = mv_eng_timeout, 439 .eng_timeout = mv_eng_timeout,
443 440
444 .irq_handler = mv_interrupt,
445 .irq_clear = mv_irq_clear, 441 .irq_clear = mv_irq_clear,
446 .irq_on = ata_irq_on, 442 .irq_on = ata_irq_on,
447 .irq_ack = ata_irq_ack, 443 .irq_ack = ata_irq_ack,
@@ -463,6 +459,7 @@ static const struct ata_port_operations mv_iie_ops = {
463 .dev_select = ata_std_dev_select, 459 .dev_select = ata_std_dev_select,
464 460
465 .phy_reset = mv_phy_reset, 461 .phy_reset = mv_phy_reset,
462 .cable_detect = ata_cable_sata,
466 463
467 .qc_prep = mv_qc_prep_iie, 464 .qc_prep = mv_qc_prep_iie,
468 .qc_issue = mv_qc_issue, 465 .qc_issue = mv_qc_issue,
@@ -470,7 +467,6 @@ static const struct ata_port_operations mv_iie_ops = {
470 467
471 .eng_timeout = mv_eng_timeout, 468 .eng_timeout = mv_eng_timeout,
472 469
473 .irq_handler = mv_interrupt,
474 .irq_clear = mv_irq_clear, 470 .irq_clear = mv_irq_clear,
475 .irq_on = ata_irq_on, 471 .irq_on = ata_irq_on,
476 .irq_ack = ata_irq_ack, 472 .irq_ack = ata_irq_ack,
@@ -484,35 +480,30 @@ static const struct ata_port_operations mv_iie_ops = {
484 480
485static const struct ata_port_info mv_port_info[] = { 481static const struct ata_port_info mv_port_info[] = {
486 { /* chip_504x */ 482 { /* chip_504x */
487 .sht = &mv_sht,
488 .flags = MV_COMMON_FLAGS, 483 .flags = MV_COMMON_FLAGS,
489 .pio_mask = 0x1f, /* pio0-4 */ 484 .pio_mask = 0x1f, /* pio0-4 */
490 .udma_mask = 0x7f, /* udma0-6 */ 485 .udma_mask = 0x7f, /* udma0-6 */
491 .port_ops = &mv5_ops, 486 .port_ops = &mv5_ops,
492 }, 487 },
493 { /* chip_508x */ 488 { /* chip_508x */
494 .sht = &mv_sht,
495 .flags = (MV_COMMON_FLAGS | MV_FLAG_DUAL_HC), 489 .flags = (MV_COMMON_FLAGS | MV_FLAG_DUAL_HC),
496 .pio_mask = 0x1f, /* pio0-4 */ 490 .pio_mask = 0x1f, /* pio0-4 */
497 .udma_mask = 0x7f, /* udma0-6 */ 491 .udma_mask = 0x7f, /* udma0-6 */
498 .port_ops = &mv5_ops, 492 .port_ops = &mv5_ops,
499 }, 493 },
500 { /* chip_5080 */ 494 { /* chip_5080 */
501 .sht = &mv_sht,
502 .flags = (MV_COMMON_FLAGS | MV_FLAG_DUAL_HC), 495 .flags = (MV_COMMON_FLAGS | MV_FLAG_DUAL_HC),
503 .pio_mask = 0x1f, /* pio0-4 */ 496 .pio_mask = 0x1f, /* pio0-4 */
504 .udma_mask = 0x7f, /* udma0-6 */ 497 .udma_mask = 0x7f, /* udma0-6 */
505 .port_ops = &mv5_ops, 498 .port_ops = &mv5_ops,
506 }, 499 },
507 { /* chip_604x */ 500 { /* chip_604x */
508 .sht = &mv_sht,
509 .flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS), 501 .flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS),
510 .pio_mask = 0x1f, /* pio0-4 */ 502 .pio_mask = 0x1f, /* pio0-4 */
511 .udma_mask = 0x7f, /* udma0-6 */ 503 .udma_mask = 0x7f, /* udma0-6 */
512 .port_ops = &mv6_ops, 504 .port_ops = &mv6_ops,
513 }, 505 },
514 { /* chip_608x */ 506 { /* chip_608x */
515 .sht = &mv_sht,
516 .flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS | 507 .flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS |
517 MV_FLAG_DUAL_HC), 508 MV_FLAG_DUAL_HC),
518 .pio_mask = 0x1f, /* pio0-4 */ 509 .pio_mask = 0x1f, /* pio0-4 */
@@ -520,14 +511,12 @@ static const struct ata_port_info mv_port_info[] = {
520 .port_ops = &mv6_ops, 511 .port_ops = &mv6_ops,
521 }, 512 },
522 { /* chip_6042 */ 513 { /* chip_6042 */
523 .sht = &mv_sht,
524 .flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS), 514 .flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS),
525 .pio_mask = 0x1f, /* pio0-4 */ 515 .pio_mask = 0x1f, /* pio0-4 */
526 .udma_mask = 0x7f, /* udma0-6 */ 516 .udma_mask = 0x7f, /* udma0-6 */
527 .port_ops = &mv_iie_ops, 517 .port_ops = &mv_iie_ops,
528 }, 518 },
529 { /* chip_7042 */ 519 { /* chip_7042 */
530 .sht = &mv_sht,
531 .flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS), 520 .flags = (MV_COMMON_FLAGS | MV_6XXX_FLAGS),
532 .pio_mask = 0x1f, /* pio0-4 */ 521 .pio_mask = 0x1f, /* pio0-4 */
533 .udma_mask = 0x7f, /* udma0-6 */ 522 .udma_mask = 0x7f, /* udma0-6 */
@@ -551,6 +540,9 @@ static const struct pci_device_id mv_pci_tbl[] = {
551 540
552 { PCI_VDEVICE(TTI, 0x2310), chip_7042 }, 541 { PCI_VDEVICE(TTI, 0x2310), chip_7042 },
553 542
543 /* add Marvell 7042 support */
544 { PCI_VDEVICE(MARVELL, 0x7042), chip_7042 },
545
554 { } /* terminate list */ 546 { } /* terminate list */
555}; 547};
556 548
@@ -585,6 +577,39 @@ static const struct mv_hw_ops mv6xxx_ops = {
585static int msi; /* Use PCI msi; either zero (off, default) or non-zero */ 577static int msi; /* Use PCI msi; either zero (off, default) or non-zero */
586 578
587 579
580/* move to PCI layer or libata core? */
581static int pci_go_64(struct pci_dev *pdev)
582{
583 int rc;
584
585 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
586 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
587 if (rc) {
588 rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
589 if (rc) {
590 dev_printk(KERN_ERR, &pdev->dev,
591 "64-bit DMA enable failed\n");
592 return rc;
593 }
594 }
595 } else {
596 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
597 if (rc) {
598 dev_printk(KERN_ERR, &pdev->dev,
599 "32-bit DMA enable failed\n");
600 return rc;
601 }
602 rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
603 if (rc) {
604 dev_printk(KERN_ERR, &pdev->dev,
605 "32-bit consistent DMA enable failed\n");
606 return rc;
607 }
608 }
609
610 return rc;
611}
612
588/* 613/*
589 * Functions 614 * Functions
590 */ 615 */
@@ -798,20 +823,18 @@ static u32 mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in)
798{ 823{
799 unsigned int ofs = mv_scr_offset(sc_reg_in); 824 unsigned int ofs = mv_scr_offset(sc_reg_in);
800 825
801 if (0xffffffffU != ofs) { 826 if (0xffffffffU != ofs)
802 return readl(mv_ap_base(ap) + ofs); 827 return readl(mv_ap_base(ap) + ofs);
803 } else { 828 else
804 return (u32) ofs; 829 return (u32) ofs;
805 }
806} 830}
807 831
808static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) 832static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val)
809{ 833{
810 unsigned int ofs = mv_scr_offset(sc_reg_in); 834 unsigned int ofs = mv_scr_offset(sc_reg_in);
811 835
812 if (0xffffffffU != ofs) { 836 if (0xffffffffU != ofs)
813 writelfl(val, mv_ap_base(ap) + ofs); 837 writelfl(val, mv_ap_base(ap) + ofs);
814 }
815} 838}
816 839
817static void mv_edma_cfg(struct mv_host_priv *hpriv, void __iomem *port_mmio) 840static void mv_edma_cfg(struct mv_host_priv *hpriv, void __iomem *port_mmio)
@@ -959,38 +982,30 @@ static void mv_port_stop(struct ata_port *ap)
959 * LOCKING: 982 * LOCKING:
960 * Inherited from caller. 983 * Inherited from caller.
961 */ 984 */
962static void mv_fill_sg(struct ata_queued_cmd *qc) 985static unsigned int mv_fill_sg(struct ata_queued_cmd *qc)
963{ 986{
964 struct mv_port_priv *pp = qc->ap->private_data; 987 struct mv_port_priv *pp = qc->ap->private_data;
965 unsigned int i = 0; 988 unsigned int n_sg = 0;
966 struct scatterlist *sg; 989 struct scatterlist *sg;
990 struct mv_sg *mv_sg;
967 991
992 mv_sg = pp->sg_tbl;
968 ata_for_each_sg(sg, qc) { 993 ata_for_each_sg(sg, qc) {
969 dma_addr_t addr; 994 dma_addr_t addr = sg_dma_address(sg);
970 u32 sg_len, len, offset; 995 u32 sg_len = sg_dma_len(sg);
971
972 addr = sg_dma_address(sg);
973 sg_len = sg_dma_len(sg);
974
975 while (sg_len) {
976 offset = addr & MV_DMA_BOUNDARY;
977 len = sg_len;
978 if ((offset + sg_len) > 0x10000)
979 len = 0x10000 - offset;
980 996
981 pp->sg_tbl[i].addr = cpu_to_le32(addr & 0xffffffff); 997 mv_sg->addr = cpu_to_le32(addr & 0xffffffff);
982 pp->sg_tbl[i].addr_hi = cpu_to_le32((addr >> 16) >> 16); 998 mv_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16);
983 pp->sg_tbl[i].flags_size = cpu_to_le32(len & 0xffff); 999 mv_sg->flags_size = cpu_to_le32(sg_len & 0xffff);
984 1000
985 sg_len -= len; 1001 if (ata_sg_is_last(sg, qc))
986 addr += len; 1002 mv_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL);
987 1003
988 if (!sg_len && ata_sg_is_last(sg, qc)) 1004 mv_sg++;
989 pp->sg_tbl[i].flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL); 1005 n_sg++;
990
991 i++;
992 }
993 } 1006 }
1007
1008 return n_sg;
994} 1009}
995 1010
996static inline unsigned mv_inc_q_index(unsigned index) 1011static inline unsigned mv_inc_q_index(unsigned index)
@@ -1320,17 +1335,15 @@ static void mv_host_intr(struct ata_host *host, u32 relevant, unsigned int hc)
1320 int shift, port, port0, hard_port, handled; 1335 int shift, port, port0, hard_port, handled;
1321 unsigned int err_mask; 1336 unsigned int err_mask;
1322 1337
1323 if (hc == 0) { 1338 if (hc == 0)
1324 port0 = 0; 1339 port0 = 0;
1325 } else { 1340 else
1326 port0 = MV_PORTS_PER_HC; 1341 port0 = MV_PORTS_PER_HC;
1327 }
1328 1342
1329 /* we'll need the HC success int register in most cases */ 1343 /* we'll need the HC success int register in most cases */
1330 hc_irq_cause = readl(hc_mmio + HC_IRQ_CAUSE_OFS); 1344 hc_irq_cause = readl(hc_mmio + HC_IRQ_CAUSE_OFS);
1331 if (hc_irq_cause) { 1345 if (hc_irq_cause)
1332 writelfl(~hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS); 1346 writelfl(~hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS);
1333 }
1334 1347
1335 VPRINTK("ENTER, hc%u relevant=0x%08x HC IRQ cause=0x%08x\n", 1348 VPRINTK("ENTER, hc%u relevant=0x%08x HC IRQ cause=0x%08x\n",
1336 hc,relevant,hc_irq_cause); 1349 hc,relevant,hc_irq_cause);
@@ -1425,9 +1438,8 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance)
1425 /* check the cases where we either have nothing pending or have read 1438 /* check the cases where we either have nothing pending or have read
1426 * a bogus register value which can indicate HW removal or PCI fault 1439 * a bogus register value which can indicate HW removal or PCI fault
1427 */ 1440 */
1428 if (!irq_stat || (0xffffffffU == irq_stat)) { 1441 if (!irq_stat || (0xffffffffU == irq_stat))
1429 return IRQ_NONE; 1442 return IRQ_NONE;
1430 }
1431 1443
1432 n_hcs = mv_get_hc_count(host->ports[0]->flags); 1444 n_hcs = mv_get_hc_count(host->ports[0]->flags);
1433 spin_lock(&host->lock); 1445 spin_lock(&host->lock);
@@ -1952,7 +1964,6 @@ comreset_retry:
1952 ata_port_disable(ap); 1964 ata_port_disable(ap);
1953 return; 1965 return;
1954 } 1966 }
1955 ap->cbl = ATA_CBL_SATA;
1956 1967
1957 /* even after SStatus reflects that device is ready, 1968 /* even after SStatus reflects that device is ready,
1958 * it seems to take a while for link to be fully 1969 * it seems to take a while for link to be fully
@@ -2077,9 +2088,10 @@ static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio)
2077 readl(port_mmio + EDMA_ERR_IRQ_MASK_OFS)); 2088 readl(port_mmio + EDMA_ERR_IRQ_MASK_OFS));
2078} 2089}
2079 2090
2080static int mv_chip_id(struct pci_dev *pdev, struct mv_host_priv *hpriv, 2091static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
2081 unsigned int board_idx)
2082{ 2092{
2093 struct pci_dev *pdev = to_pci_dev(host->dev);
2094 struct mv_host_priv *hpriv = host->private_data;
2083 u8 rev_id; 2095 u8 rev_id;
2084 u32 hp_flags = hpriv->hp_flags; 2096 u32 hp_flags = hpriv->hp_flags;
2085 2097
@@ -2177,8 +2189,8 @@ static int mv_chip_id(struct pci_dev *pdev, struct mv_host_priv *hpriv,
2177 2189
2178/** 2190/**
2179 * mv_init_host - Perform some early initialization of the host. 2191 * mv_init_host - Perform some early initialization of the host.
2180 * @pdev: host PCI device 2192 * @host: ATA host to initialize
2181 * @probe_ent: early data struct representing the host 2193 * @board_idx: controller index
2182 * 2194 *
2183 * If possible, do an early global reset of the host. Then do 2195 * If possible, do an early global reset of the host. Then do
2184 * our port init and clear/unmask all/relevant host interrupts. 2196 * our port init and clear/unmask all/relevant host interrupts.
@@ -2186,24 +2198,23 @@ static int mv_chip_id(struct pci_dev *pdev, struct mv_host_priv *hpriv,
2186 * LOCKING: 2198 * LOCKING:
2187 * Inherited from caller. 2199 * Inherited from caller.
2188 */ 2200 */
2189static int mv_init_host(struct pci_dev *pdev, struct ata_probe_ent *probe_ent, 2201static int mv_init_host(struct ata_host *host, unsigned int board_idx)
2190 unsigned int board_idx)
2191{ 2202{
2192 int rc = 0, n_hc, port, hc; 2203 int rc = 0, n_hc, port, hc;
2193 void __iomem *mmio = probe_ent->iomap[MV_PRIMARY_BAR]; 2204 struct pci_dev *pdev = to_pci_dev(host->dev);
2194 struct mv_host_priv *hpriv = probe_ent->private_data; 2205 void __iomem *mmio = host->iomap[MV_PRIMARY_BAR];
2206 struct mv_host_priv *hpriv = host->private_data;
2195 2207
2196 /* global interrupt mask */ 2208 /* global interrupt mask */
2197 writel(0, mmio + HC_MAIN_IRQ_MASK_OFS); 2209 writel(0, mmio + HC_MAIN_IRQ_MASK_OFS);
2198 2210
2199 rc = mv_chip_id(pdev, hpriv, board_idx); 2211 rc = mv_chip_id(host, board_idx);
2200 if (rc) 2212 if (rc)
2201 goto done; 2213 goto done;
2202 2214
2203 n_hc = mv_get_hc_count(probe_ent->port_flags); 2215 n_hc = mv_get_hc_count(host->ports[0]->flags);
2204 probe_ent->n_ports = MV_PORTS_PER_HC * n_hc;
2205 2216
2206 for (port = 0; port < probe_ent->n_ports; port++) 2217 for (port = 0; port < host->n_ports; port++)
2207 hpriv->ops->read_preamp(hpriv, port, mmio); 2218 hpriv->ops->read_preamp(hpriv, port, mmio);
2208 2219
2209 rc = hpriv->ops->reset_hc(hpriv, mmio, n_hc); 2220 rc = hpriv->ops->reset_hc(hpriv, mmio, n_hc);
@@ -2214,7 +2225,7 @@ static int mv_init_host(struct pci_dev *pdev, struct ata_probe_ent *probe_ent,
2214 hpriv->ops->reset_bus(pdev, mmio); 2225 hpriv->ops->reset_bus(pdev, mmio);
2215 hpriv->ops->enable_leds(hpriv, mmio); 2226 hpriv->ops->enable_leds(hpriv, mmio);
2216 2227
2217 for (port = 0; port < probe_ent->n_ports; port++) { 2228 for (port = 0; port < host->n_ports; port++) {
2218 if (IS_60XX(hpriv)) { 2229 if (IS_60XX(hpriv)) {
2219 void __iomem *port_mmio = mv_port_base(mmio, port); 2230 void __iomem *port_mmio = mv_port_base(mmio, port);
2220 2231
@@ -2227,9 +2238,9 @@ static int mv_init_host(struct pci_dev *pdev, struct ata_probe_ent *probe_ent,
2227 hpriv->ops->phy_errata(hpriv, mmio, port); 2238 hpriv->ops->phy_errata(hpriv, mmio, port);
2228 } 2239 }
2229 2240
2230 for (port = 0; port < probe_ent->n_ports; port++) { 2241 for (port = 0; port < host->n_ports; port++) {
2231 void __iomem *port_mmio = mv_port_base(mmio, port); 2242 void __iomem *port_mmio = mv_port_base(mmio, port);
2232 mv_port_init(&probe_ent->port[port], port_mmio); 2243 mv_port_init(&host->ports[port]->ioaddr, port_mmio);
2233 } 2244 }
2234 2245
2235 for (hc = 0; hc < n_hc; hc++) { 2246 for (hc = 0; hc < n_hc; hc++) {
@@ -2268,17 +2279,17 @@ done:
2268 2279
2269/** 2280/**
2270 * mv_print_info - Dump key info to kernel log for perusal. 2281 * mv_print_info - Dump key info to kernel log for perusal.
2271 * @probe_ent: early data struct representing the host 2282 * @host: ATA host to print info about
2272 * 2283 *
2273 * FIXME: complete this. 2284 * FIXME: complete this.
2274 * 2285 *
2275 * LOCKING: 2286 * LOCKING:
2276 * Inherited from caller. 2287 * Inherited from caller.
2277 */ 2288 */
2278static void mv_print_info(struct ata_probe_ent *probe_ent) 2289static void mv_print_info(struct ata_host *host)
2279{ 2290{
2280 struct pci_dev *pdev = to_pci_dev(probe_ent->dev); 2291 struct pci_dev *pdev = to_pci_dev(host->dev);
2281 struct mv_host_priv *hpriv = probe_ent->private_data; 2292 struct mv_host_priv *hpriv = host->private_data;
2282 u8 rev_id, scc; 2293 u8 rev_id, scc;
2283 const char *scc_s; 2294 const char *scc_s;
2284 2295
@@ -2297,7 +2308,7 @@ static void mv_print_info(struct ata_probe_ent *probe_ent)
2297 2308
2298 dev_printk(KERN_INFO, &pdev->dev, 2309 dev_printk(KERN_INFO, &pdev->dev,
2299 "%u slots %u ports %s mode IRQ via %s\n", 2310 "%u slots %u ports %s mode IRQ via %s\n",
2300 (unsigned)MV_MAX_Q_DEPTH, probe_ent->n_ports, 2311 (unsigned)MV_MAX_Q_DEPTH, host->n_ports,
2301 scc_s, (MV_HP_FLAG_MSI & hpriv->hp_flags) ? "MSI" : "INTx"); 2312 scc_s, (MV_HP_FLAG_MSI & hpriv->hp_flags) ? "MSI" : "INTx");
2302} 2313}
2303 2314
@@ -2312,50 +2323,42 @@ static void mv_print_info(struct ata_probe_ent *probe_ent)
2312static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 2323static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2313{ 2324{
2314 static int printed_version = 0; 2325 static int printed_version = 0;
2315 struct device *dev = &pdev->dev;
2316 struct ata_probe_ent *probe_ent;
2317 struct mv_host_priv *hpriv;
2318 unsigned int board_idx = (unsigned int)ent->driver_data; 2326 unsigned int board_idx = (unsigned int)ent->driver_data;
2319 int rc; 2327 const struct ata_port_info *ppi[] = { &mv_port_info[board_idx], NULL };
2328 struct ata_host *host;
2329 struct mv_host_priv *hpriv;
2330 int n_ports, rc;
2320 2331
2321 if (!printed_version++) 2332 if (!printed_version++)
2322 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); 2333 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
2323 2334
2335 /* allocate host */
2336 n_ports = mv_get_hc_count(ppi[0]->flags) * MV_PORTS_PER_HC;
2337
2338 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
2339 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
2340 if (!host || !hpriv)
2341 return -ENOMEM;
2342 host->private_data = hpriv;
2343
2344 /* acquire resources */
2324 rc = pcim_enable_device(pdev); 2345 rc = pcim_enable_device(pdev);
2325 if (rc) 2346 if (rc)
2326 return rc; 2347 return rc;
2327 pci_set_master(pdev);
2328 2348
2329 rc = pcim_iomap_regions(pdev, 1 << MV_PRIMARY_BAR, DRV_NAME); 2349 rc = pcim_iomap_regions(pdev, 1 << MV_PRIMARY_BAR, DRV_NAME);
2330 if (rc == -EBUSY) 2350 if (rc == -EBUSY)
2331 pcim_pin_device(pdev); 2351 pcim_pin_device(pdev);
2332 if (rc) 2352 if (rc)
2333 return rc; 2353 return rc;
2354 host->iomap = pcim_iomap_table(pdev);
2334 2355
2335 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL); 2356 rc = pci_go_64(pdev);
2336 if (probe_ent == NULL) 2357 if (rc)
2337 return -ENOMEM; 2358 return rc;
2338
2339 probe_ent->dev = pci_dev_to_dev(pdev);
2340 INIT_LIST_HEAD(&probe_ent->node);
2341
2342 hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
2343 if (!hpriv)
2344 return -ENOMEM;
2345
2346 probe_ent->sht = mv_port_info[board_idx].sht;
2347 probe_ent->port_flags = mv_port_info[board_idx].flags;
2348 probe_ent->pio_mask = mv_port_info[board_idx].pio_mask;
2349 probe_ent->udma_mask = mv_port_info[board_idx].udma_mask;
2350 probe_ent->port_ops = mv_port_info[board_idx].port_ops;
2351
2352 probe_ent->irq = pdev->irq;
2353 probe_ent->irq_flags = IRQF_SHARED;
2354 probe_ent->iomap = pcim_iomap_table(pdev);
2355 probe_ent->private_data = hpriv;
2356 2359
2357 /* initialize adapter */ 2360 /* initialize adapter */
2358 rc = mv_init_host(pdev, probe_ent, board_idx); 2361 rc = mv_init_host(host, board_idx);
2359 if (rc) 2362 if (rc)
2360 return rc; 2363 return rc;
2361 2364
@@ -2364,13 +2367,11 @@ static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2364 pci_intx(pdev, 1); 2367 pci_intx(pdev, 1);
2365 2368
2366 mv_dump_pci_cfg(pdev, 0x68); 2369 mv_dump_pci_cfg(pdev, 0x68);
2367 mv_print_info(probe_ent); 2370 mv_print_info(host);
2368 2371
2369 if (ata_device_add(probe_ent) == 0) 2372 pci_set_master(pdev);
2370 return -ENODEV; 2373 return ata_host_activate(host, pdev->irq, mv_interrupt, IRQF_SHARED,
2371 2374 &mv_sht);
2372 devm_kfree(dev, probe_ent);
2373 return 0;
2374} 2375}
2375 2376
2376static int __init mv_init(void) 2377static int __init mv_init(void)
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 9d9670a9b117..02169740ed24 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -260,6 +260,7 @@ static int nv_adma_port_resume(struct ata_port *ap);
260static void nv_adma_error_handler(struct ata_port *ap); 260static void nv_adma_error_handler(struct ata_port *ap);
261static void nv_adma_host_stop(struct ata_host *host); 261static void nv_adma_host_stop(struct ata_host *host);
262static void nv_adma_post_internal_cmd(struct ata_queued_cmd *qc); 262static void nv_adma_post_internal_cmd(struct ata_queued_cmd *qc);
263static void nv_adma_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
263 264
264enum nv_host_type 265enum nv_host_type
265{ 266{
@@ -368,7 +369,6 @@ static const struct ata_port_operations nv_generic_ops = {
368 .error_handler = nv_error_handler, 369 .error_handler = nv_error_handler,
369 .post_internal_cmd = ata_bmdma_post_internal_cmd, 370 .post_internal_cmd = ata_bmdma_post_internal_cmd,
370 .data_xfer = ata_data_xfer, 371 .data_xfer = ata_data_xfer,
371 .irq_handler = nv_generic_interrupt,
372 .irq_clear = ata_bmdma_irq_clear, 372 .irq_clear = ata_bmdma_irq_clear,
373 .irq_on = ata_irq_on, 373 .irq_on = ata_irq_on,
374 .irq_ack = ata_irq_ack, 374 .irq_ack = ata_irq_ack,
@@ -395,7 +395,6 @@ static const struct ata_port_operations nv_nf2_ops = {
395 .error_handler = nv_error_handler, 395 .error_handler = nv_error_handler,
396 .post_internal_cmd = ata_bmdma_post_internal_cmd, 396 .post_internal_cmd = ata_bmdma_post_internal_cmd,
397 .data_xfer = ata_data_xfer, 397 .data_xfer = ata_data_xfer,
398 .irq_handler = nv_nf2_interrupt,
399 .irq_clear = ata_bmdma_irq_clear, 398 .irq_clear = ata_bmdma_irq_clear,
400 .irq_on = ata_irq_on, 399 .irq_on = ata_irq_on,
401 .irq_ack = ata_irq_ack, 400 .irq_ack = ata_irq_ack,
@@ -422,7 +421,6 @@ static const struct ata_port_operations nv_ck804_ops = {
422 .error_handler = nv_error_handler, 421 .error_handler = nv_error_handler,
423 .post_internal_cmd = ata_bmdma_post_internal_cmd, 422 .post_internal_cmd = ata_bmdma_post_internal_cmd,
424 .data_xfer = ata_data_xfer, 423 .data_xfer = ata_data_xfer,
425 .irq_handler = nv_ck804_interrupt,
426 .irq_clear = ata_bmdma_irq_clear, 424 .irq_clear = ata_bmdma_irq_clear,
427 .irq_on = ata_irq_on, 425 .irq_on = ata_irq_on,
428 .irq_ack = ata_irq_ack, 426 .irq_ack = ata_irq_ack,
@@ -435,7 +433,7 @@ static const struct ata_port_operations nv_ck804_ops = {
435static const struct ata_port_operations nv_adma_ops = { 433static const struct ata_port_operations nv_adma_ops = {
436 .port_disable = ata_port_disable, 434 .port_disable = ata_port_disable,
437 .tf_load = ata_tf_load, 435 .tf_load = ata_tf_load,
438 .tf_read = ata_tf_read, 436 .tf_read = nv_adma_tf_read,
439 .check_atapi_dma = nv_adma_check_atapi_dma, 437 .check_atapi_dma = nv_adma_check_atapi_dma,
440 .exec_command = ata_exec_command, 438 .exec_command = ata_exec_command,
441 .check_status = ata_check_status, 439 .check_status = ata_check_status,
@@ -451,7 +449,6 @@ static const struct ata_port_operations nv_adma_ops = {
451 .error_handler = nv_adma_error_handler, 449 .error_handler = nv_adma_error_handler,
452 .post_internal_cmd = nv_adma_post_internal_cmd, 450 .post_internal_cmd = nv_adma_post_internal_cmd,
453 .data_xfer = ata_data_xfer, 451 .data_xfer = ata_data_xfer,
454 .irq_handler = nv_adma_interrupt,
455 .irq_clear = nv_adma_irq_clear, 452 .irq_clear = nv_adma_irq_clear,
456 .irq_on = ata_irq_on, 453 .irq_on = ata_irq_on,
457 .irq_ack = ata_irq_ack, 454 .irq_ack = ata_irq_ack,
@@ -476,6 +473,7 @@ static struct ata_port_info nv_port_info[] = {
476 .mwdma_mask = NV_MWDMA_MASK, 473 .mwdma_mask = NV_MWDMA_MASK,
477 .udma_mask = NV_UDMA_MASK, 474 .udma_mask = NV_UDMA_MASK,
478 .port_ops = &nv_generic_ops, 475 .port_ops = &nv_generic_ops,
476 .irq_handler = nv_generic_interrupt,
479 }, 477 },
480 /* nforce2/3 */ 478 /* nforce2/3 */
481 { 479 {
@@ -486,6 +484,7 @@ static struct ata_port_info nv_port_info[] = {
486 .mwdma_mask = NV_MWDMA_MASK, 484 .mwdma_mask = NV_MWDMA_MASK,
487 .udma_mask = NV_UDMA_MASK, 485 .udma_mask = NV_UDMA_MASK,
488 .port_ops = &nv_nf2_ops, 486 .port_ops = &nv_nf2_ops,
487 .irq_handler = nv_nf2_interrupt,
489 }, 488 },
490 /* ck804 */ 489 /* ck804 */
491 { 490 {
@@ -496,6 +495,7 @@ static struct ata_port_info nv_port_info[] = {
496 .mwdma_mask = NV_MWDMA_MASK, 495 .mwdma_mask = NV_MWDMA_MASK,
497 .udma_mask = NV_UDMA_MASK, 496 .udma_mask = NV_UDMA_MASK,
498 .port_ops = &nv_ck804_ops, 497 .port_ops = &nv_ck804_ops,
498 .irq_handler = nv_ck804_interrupt,
499 }, 499 },
500 /* ADMA */ 500 /* ADMA */
501 { 501 {
@@ -507,6 +507,7 @@ static struct ata_port_info nv_port_info[] = {
507 .mwdma_mask = NV_MWDMA_MASK, 507 .mwdma_mask = NV_MWDMA_MASK,
508 .udma_mask = NV_UDMA_MASK, 508 .udma_mask = NV_UDMA_MASK,
509 .port_ops = &nv_adma_ops, 509 .port_ops = &nv_adma_ops,
510 .irq_handler = nv_adma_interrupt,
510 }, 511 },
511}; 512};
512 513
@@ -667,6 +668,18 @@ static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc)
667 return !(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE); 668 return !(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE);
668} 669}
669 670
671static void nv_adma_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
672{
673 /* Since commands where a result TF is requested are not
674 executed in ADMA mode, the only time this function will be called
675 in ADMA mode will be if a command fails. In this case we
676 don't care about going into register mode with ADMA commands
677 pending, as the commands will all shortly be aborted anyway. */
678 nv_adma_register_mode(ap);
679
680 ata_tf_read(ap, tf);
681}
682
670static unsigned int nv_adma_tf_to_cpb(struct ata_taskfile *tf, __le16 *cpb) 683static unsigned int nv_adma_tf_to_cpb(struct ata_taskfile *tf, __le16 *cpb)
671{ 684{
672 unsigned int idx = 0; 685 unsigned int idx = 0;
@@ -738,19 +751,11 @@ static int nv_adma_check_cpb(struct ata_port *ap, int cpb_num, int force_err)
738 return 1; 751 return 1;
739 } 752 }
740 753
741 if (flags & NV_CPB_RESP_DONE) { 754 if (likely(flags & NV_CPB_RESP_DONE)) {
742 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, cpb_num); 755 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, cpb_num);
743 VPRINTK("CPB flags done, flags=0x%x\n", flags); 756 VPRINTK("CPB flags done, flags=0x%x\n", flags);
744 if (likely(qc)) { 757 if (likely(qc)) {
745 /* Grab the ATA port status for non-NCQ commands. 758 DPRINTK("Completing qc from tag %d\n",cpb_num);
746 For NCQ commands the current status may have nothing to do with
747 the command just completed. */
748 if (qc->tf.protocol != ATA_PROT_NCQ) {
749 u8 ata_status = readb(pp->ctl_block + (ATA_REG_STATUS * 4));
750 qc->err_mask |= ac_err_mask(ata_status);
751 }
752 DPRINTK("Completing qc from tag %d with err_mask %u\n",cpb_num,
753 qc->err_mask);
754 ata_qc_complete(qc); 759 ata_qc_complete(qc);
755 } else { 760 } else {
756 struct ata_eh_info *ehi = &ap->eh_info; 761 struct ata_eh_info *ehi = &ap->eh_info;
@@ -1074,14 +1079,14 @@ static int nv_adma_port_resume(struct ata_port *ap)
1074} 1079}
1075#endif 1080#endif
1076 1081
1077static void nv_adma_setup_port(struct ata_probe_ent *probe_ent, unsigned int port) 1082static void nv_adma_setup_port(struct ata_port *ap)
1078{ 1083{
1079 void __iomem *mmio = probe_ent->iomap[NV_MMIO_BAR]; 1084 void __iomem *mmio = ap->host->iomap[NV_MMIO_BAR];
1080 struct ata_ioports *ioport = &probe_ent->port[port]; 1085 struct ata_ioports *ioport = &ap->ioaddr;
1081 1086
1082 VPRINTK("ENTER\n"); 1087 VPRINTK("ENTER\n");
1083 1088
1084 mmio += NV_ADMA_PORT + port * NV_ADMA_PORT_SIZE; 1089 mmio += NV_ADMA_PORT + ap->port_no * NV_ADMA_PORT_SIZE;
1085 1090
1086 ioport->cmd_addr = mmio; 1091 ioport->cmd_addr = mmio;
1087 ioport->data_addr = mmio + (ATA_REG_DATA * 4); 1092 ioport->data_addr = mmio + (ATA_REG_DATA * 4);
@@ -1098,9 +1103,9 @@ static void nv_adma_setup_port(struct ata_probe_ent *probe_ent, unsigned int por
1098 ioport->ctl_addr = mmio + 0x20; 1103 ioport->ctl_addr = mmio + 0x20;
1099} 1104}
1100 1105
1101static int nv_adma_host_init(struct ata_probe_ent *probe_ent) 1106static int nv_adma_host_init(struct ata_host *host)
1102{ 1107{
1103 struct pci_dev *pdev = to_pci_dev(probe_ent->dev); 1108 struct pci_dev *pdev = to_pci_dev(host->dev);
1104 unsigned int i; 1109 unsigned int i;
1105 u32 tmp32; 1110 u32 tmp32;
1106 1111
@@ -1115,8 +1120,8 @@ static int nv_adma_host_init(struct ata_probe_ent *probe_ent)
1115 1120
1116 pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, tmp32); 1121 pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, tmp32);
1117 1122
1118 for (i = 0; i < probe_ent->n_ports; i++) 1123 for (i = 0; i < host->n_ports; i++)
1119 nv_adma_setup_port(probe_ent, i); 1124 nv_adma_setup_port(host->ports[i]);
1120 1125
1121 return 0; 1126 return 0;
1122} 1127}
@@ -1167,9 +1172,11 @@ static int nv_adma_use_reg_mode(struct ata_queued_cmd *qc)
1167 struct nv_adma_port_priv *pp = qc->ap->private_data; 1172 struct nv_adma_port_priv *pp = qc->ap->private_data;
1168 1173
1169 /* ADMA engine can only be used for non-ATAPI DMA commands, 1174 /* ADMA engine can only be used for non-ATAPI DMA commands,
1170 or interrupt-driven no-data commands. */ 1175 or interrupt-driven no-data commands, where a result taskfile
1176 is not required. */
1171 if((pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) || 1177 if((pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) ||
1172 (qc->tf.flags & ATA_TFLAG_POLLING)) 1178 (qc->tf.flags & ATA_TFLAG_POLLING) ||
1179 (qc->flags & ATA_QCFLAG_RESULT_TF))
1173 return 1; 1180 return 1;
1174 1181
1175 if((qc->flags & ATA_QCFLAG_DMAMAP) || 1182 if((qc->flags & ATA_QCFLAG_DMAMAP) ||
@@ -1473,14 +1480,13 @@ static void nv_adma_error_handler(struct ata_port *ap)
1473static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 1480static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1474{ 1481{
1475 static int printed_version = 0; 1482 static int printed_version = 0;
1476 struct ata_port_info *ppi[2]; 1483 const struct ata_port_info *ppi[2];
1477 struct ata_probe_ent *probe_ent; 1484 struct ata_host *host;
1478 struct nv_host_priv *hpriv; 1485 struct nv_host_priv *hpriv;
1479 int rc; 1486 int rc;
1480 u32 bar; 1487 u32 bar;
1481 void __iomem *base; 1488 void __iomem *base;
1482 unsigned long type = ent->driver_data; 1489 unsigned long type = ent->driver_data;
1483 int mask_set = 0;
1484 1490
1485 // Make sure this is a SATA controller by counting the number of bars 1491 // Make sure this is a SATA controller by counting the number of bars
1486 // (NVIDIA SATA controllers will always have six bars). Otherwise, 1492 // (NVIDIA SATA controllers will always have six bars). Otherwise,
@@ -1496,50 +1502,38 @@ static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1496 if (rc) 1502 if (rc)
1497 return rc; 1503 return rc;
1498 1504
1499 rc = pci_request_regions(pdev, DRV_NAME); 1505 /* determine type and allocate host */
1500 if (rc) { 1506 if (type >= CK804 && adma_enabled) {
1501 pcim_pin_device(pdev);
1502 return rc;
1503 }
1504
1505 if(type >= CK804 && adma_enabled) {
1506 dev_printk(KERN_NOTICE, &pdev->dev, "Using ADMA mode\n"); 1507 dev_printk(KERN_NOTICE, &pdev->dev, "Using ADMA mode\n");
1507 type = ADMA; 1508 type = ADMA;
1508 if(!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
1509 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1510 mask_set = 1;
1511 }
1512
1513 if(!mask_set) {
1514 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
1515 if (rc)
1516 return rc;
1517 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
1518 if (rc)
1519 return rc;
1520 } 1509 }
1521 1510
1522 rc = -ENOMEM; 1511 ppi[0] = ppi[1] = &nv_port_info[type];
1512 rc = ata_pci_prepare_native_host(pdev, ppi, 2, &host);
1513 if (rc)
1514 return rc;
1523 1515
1524 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); 1516 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
1525 if (!hpriv) 1517 if (!hpriv)
1526 return -ENOMEM; 1518 return -ENOMEM;
1519 hpriv->type = type;
1520 host->private_data = hpriv;
1527 1521
1528 ppi[0] = ppi[1] = &nv_port_info[type]; 1522 /* set 64bit dma masks, may fail */
1529 probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); 1523 if (type == ADMA) {
1530 if (!probe_ent) 1524 if (pci_set_dma_mask(pdev, DMA_64BIT_MASK) == 0)
1531 return -ENOMEM; 1525 pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1532 1526 }
1533 if (!pcim_iomap(pdev, NV_MMIO_BAR, 0))
1534 return -EIO;
1535 probe_ent->iomap = pcim_iomap_table(pdev);
1536 1527
1537 probe_ent->private_data = hpriv; 1528 /* request and iomap NV_MMIO_BAR */
1538 hpriv->type = type; 1529 rc = pcim_iomap_regions(pdev, 1 << NV_MMIO_BAR, DRV_NAME);
1530 if (rc)
1531 return rc;
1539 1532
1540 base = probe_ent->iomap[NV_MMIO_BAR]; 1533 /* configure SCR access */
1541 probe_ent->port[0].scr_addr = base + NV_PORT0_SCR_REG_OFFSET; 1534 base = host->iomap[NV_MMIO_BAR];
1542 probe_ent->port[1].scr_addr = base + NV_PORT1_SCR_REG_OFFSET; 1535 host->ports[0]->ioaddr.scr_addr = base + NV_PORT0_SCR_REG_OFFSET;
1536 host->ports[1]->ioaddr.scr_addr = base + NV_PORT1_SCR_REG_OFFSET;
1543 1537
1544 /* enable SATA space for CK804 */ 1538 /* enable SATA space for CK804 */
1545 if (type >= CK804) { 1539 if (type >= CK804) {
@@ -1550,20 +1544,16 @@ static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1550 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval); 1544 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval);
1551 } 1545 }
1552 1546
1553 pci_set_master(pdev); 1547 /* init ADMA */
1554
1555 if (type == ADMA) { 1548 if (type == ADMA) {
1556 rc = nv_adma_host_init(probe_ent); 1549 rc = nv_adma_host_init(host);
1557 if (rc) 1550 if (rc)
1558 return rc; 1551 return rc;
1559 } 1552 }
1560 1553
1561 rc = ata_device_add(probe_ent); 1554 pci_set_master(pdev);
1562 if (rc != NV_PORTS) 1555 return ata_host_activate(host, pdev->irq, ppi[0]->irq_handler,
1563 return -ENODEV; 1556 IRQF_SHARED, ppi[0]->sht);
1564
1565 devm_kfree(&pdev->dev, probe_ent);
1566 return 0;
1567} 1557}
1568 1558
1569static void nv_remove_one (struct pci_dev *pdev) 1559static void nv_remove_one (struct pci_dev *pdev)
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c
index 2339813ce9f6..f56549b90aa6 100644
--- a/drivers/ata/sata_promise.c
+++ b/drivers/ata/sata_promise.c
@@ -45,10 +45,11 @@
45#include "sata_promise.h" 45#include "sata_promise.h"
46 46
47#define DRV_NAME "sata_promise" 47#define DRV_NAME "sata_promise"
48#define DRV_VERSION "2.00" 48#define DRV_VERSION "2.05"
49 49
50 50
51enum { 51enum {
52 PDC_MAX_PORTS = 4,
52 PDC_MMIO_BAR = 3, 53 PDC_MMIO_BAR = 3,
53 54
54 /* register offsets */ 55 /* register offsets */
@@ -70,14 +71,31 @@ enum {
70 PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */ 71 PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */
71 PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */ 72 PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */
72 73
73 PDC_ERR_MASK = (1<<19) | (1<<20) | (1<<21) | (1<<22) | 74 /* PDC_GLOBAL_CTL bit definitions */
74 (1<<8) | (1<<9) | (1<<10), 75 PDC_PH_ERR = (1 << 8), /* PCI error while loading packet */
76 PDC_SH_ERR = (1 << 9), /* PCI error while loading S/G table */
77 PDC_DH_ERR = (1 << 10), /* PCI error while loading data */
78 PDC2_HTO_ERR = (1 << 12), /* host bus timeout */
79 PDC2_ATA_HBA_ERR = (1 << 13), /* error during SATA DATA FIS transmission */
80 PDC2_ATA_DMA_CNT_ERR = (1 << 14), /* DMA DATA FIS size differs from S/G count */
81 PDC_OVERRUN_ERR = (1 << 19), /* S/G byte count larger than HD requires */
82 PDC_UNDERRUN_ERR = (1 << 20), /* S/G byte count less than HD requires */
83 PDC_DRIVE_ERR = (1 << 21), /* drive error */
84 PDC_PCI_SYS_ERR = (1 << 22), /* PCI system error */
85 PDC1_PCI_PARITY_ERR = (1 << 23), /* PCI parity error (from SATA150 driver) */
86 PDC1_ERR_MASK = PDC1_PCI_PARITY_ERR,
87 PDC2_ERR_MASK = PDC2_HTO_ERR | PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR,
88 PDC_ERR_MASK = (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC_OVERRUN_ERR
89 | PDC_UNDERRUN_ERR | PDC_DRIVE_ERR | PDC_PCI_SYS_ERR
90 | PDC1_ERR_MASK | PDC2_ERR_MASK),
75 91
76 board_2037x = 0, /* FastTrak S150 TX2plus */ 92 board_2037x = 0, /* FastTrak S150 TX2plus */
77 board_20319 = 1, /* FastTrak S150 TX4 */ 93 board_2037x_pata = 1, /* FastTrak S150 TX2plus PATA port */
78 board_20619 = 2, /* FastTrak TX4000 */ 94 board_20319 = 2, /* FastTrak S150 TX4 */
79 board_2057x = 3, /* SATAII150 Tx2plus */ 95 board_20619 = 3, /* FastTrak TX4000 */
80 board_40518 = 4, /* SATAII150 Tx4 */ 96 board_2057x = 4, /* SATAII150 Tx2plus */
97 board_2057x_pata = 5, /* SATAII150 Tx2plus */
98 board_40518 = 6, /* SATAII150 Tx4 */
81 99
82 PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */ 100 PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */
83 101
@@ -100,8 +118,10 @@ enum {
100 ATA_FLAG_MMIO | 118 ATA_FLAG_MMIO |
101 ATA_FLAG_PIO_POLLING, 119 ATA_FLAG_PIO_POLLING,
102 120
103 /* hp->flags bits */ 121 /* ap->flags bits */
104 PDC_FLAG_GEN_II = (1 << 0), 122 PDC_FLAG_GEN_II = (1 << 24),
123 PDC_FLAG_SATA_PATA = (1 << 25), /* supports SATA + PATA */
124 PDC_FLAG_4_PORTS = (1 << 26), /* 4 ports */
105}; 125};
106 126
107 127
@@ -110,28 +130,25 @@ struct pdc_port_priv {
110 dma_addr_t pkt_dma; 130 dma_addr_t pkt_dma;
111}; 131};
112 132
113struct pdc_host_priv {
114 unsigned long flags;
115 unsigned long port_flags[ATA_MAX_PORTS];
116};
117
118static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg); 133static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg);
119static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 134static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
120static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 135static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
121static irqreturn_t pdc_interrupt (int irq, void *dev_instance); 136static int pdc_common_port_start(struct ata_port *ap);
122static int pdc_port_start(struct ata_port *ap); 137static int pdc_sata_port_start(struct ata_port *ap);
123static void pdc_qc_prep(struct ata_queued_cmd *qc); 138static void pdc_qc_prep(struct ata_queued_cmd *qc);
124static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); 139static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
125static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf); 140static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
126static int pdc_check_atapi_dma(struct ata_queued_cmd *qc); 141static int pdc_check_atapi_dma(struct ata_queued_cmd *qc);
127static int pdc_old_check_atapi_dma(struct ata_queued_cmd *qc); 142static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc);
128static void pdc_irq_clear(struct ata_port *ap); 143static void pdc_irq_clear(struct ata_port *ap);
129static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc); 144static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc);
130static void pdc_freeze(struct ata_port *ap); 145static void pdc_freeze(struct ata_port *ap);
131static void pdc_thaw(struct ata_port *ap); 146static void pdc_thaw(struct ata_port *ap);
132static void pdc_error_handler(struct ata_port *ap); 147static void pdc_pata_error_handler(struct ata_port *ap);
148static void pdc_sata_error_handler(struct ata_port *ap);
133static void pdc_post_internal_cmd(struct ata_queued_cmd *qc); 149static void pdc_post_internal_cmd(struct ata_queued_cmd *qc);
134 150static int pdc_pata_cable_detect(struct ata_port *ap);
151static int pdc_sata_cable_detect(struct ata_port *ap);
135 152
136static struct scsi_host_template pdc_ata_sht = { 153static struct scsi_host_template pdc_ata_sht = {
137 .module = THIS_MODULE, 154 .module = THIS_MODULE,
@@ -164,17 +181,17 @@ static const struct ata_port_operations pdc_sata_ops = {
164 .qc_issue = pdc_qc_issue_prot, 181 .qc_issue = pdc_qc_issue_prot,
165 .freeze = pdc_freeze, 182 .freeze = pdc_freeze,
166 .thaw = pdc_thaw, 183 .thaw = pdc_thaw,
167 .error_handler = pdc_error_handler, 184 .error_handler = pdc_sata_error_handler,
168 .post_internal_cmd = pdc_post_internal_cmd, 185 .post_internal_cmd = pdc_post_internal_cmd,
186 .cable_detect = pdc_sata_cable_detect,
169 .data_xfer = ata_data_xfer, 187 .data_xfer = ata_data_xfer,
170 .irq_handler = pdc_interrupt,
171 .irq_clear = pdc_irq_clear, 188 .irq_clear = pdc_irq_clear,
172 .irq_on = ata_irq_on, 189 .irq_on = ata_irq_on,
173 .irq_ack = ata_irq_ack, 190 .irq_ack = ata_irq_ack,
174 191
175 .scr_read = pdc_sata_scr_read, 192 .scr_read = pdc_sata_scr_read,
176 .scr_write = pdc_sata_scr_write, 193 .scr_write = pdc_sata_scr_write,
177 .port_start = pdc_port_start, 194 .port_start = pdc_sata_port_start,
178}; 195};
179 196
180/* First-generation chips need a more restrictive ->check_atapi_dma op */ 197/* First-generation chips need a more restrictive ->check_atapi_dma op */
@@ -185,23 +202,23 @@ static const struct ata_port_operations pdc_old_sata_ops = {
185 .check_status = ata_check_status, 202 .check_status = ata_check_status,
186 .exec_command = pdc_exec_command_mmio, 203 .exec_command = pdc_exec_command_mmio,
187 .dev_select = ata_std_dev_select, 204 .dev_select = ata_std_dev_select,
188 .check_atapi_dma = pdc_old_check_atapi_dma, 205 .check_atapi_dma = pdc_old_sata_check_atapi_dma,
189 206
190 .qc_prep = pdc_qc_prep, 207 .qc_prep = pdc_qc_prep,
191 .qc_issue = pdc_qc_issue_prot, 208 .qc_issue = pdc_qc_issue_prot,
192 .freeze = pdc_freeze, 209 .freeze = pdc_freeze,
193 .thaw = pdc_thaw, 210 .thaw = pdc_thaw,
194 .error_handler = pdc_error_handler, 211 .error_handler = pdc_sata_error_handler,
195 .post_internal_cmd = pdc_post_internal_cmd, 212 .post_internal_cmd = pdc_post_internal_cmd,
213 .cable_detect = pdc_sata_cable_detect,
196 .data_xfer = ata_data_xfer, 214 .data_xfer = ata_data_xfer,
197 .irq_handler = pdc_interrupt,
198 .irq_clear = pdc_irq_clear, 215 .irq_clear = pdc_irq_clear,
199 .irq_on = ata_irq_on, 216 .irq_on = ata_irq_on,
200 .irq_ack = ata_irq_ack, 217 .irq_ack = ata_irq_ack,
201 218
202 .scr_read = pdc_sata_scr_read, 219 .scr_read = pdc_sata_scr_read,
203 .scr_write = pdc_sata_scr_write, 220 .scr_write = pdc_sata_scr_write,
204 .port_start = pdc_port_start, 221 .port_start = pdc_sata_port_start,
205}; 222};
206 223
207static const struct ata_port_operations pdc_pata_ops = { 224static const struct ata_port_operations pdc_pata_ops = {
@@ -217,32 +234,41 @@ static const struct ata_port_operations pdc_pata_ops = {
217 .qc_issue = pdc_qc_issue_prot, 234 .qc_issue = pdc_qc_issue_prot,
218 .freeze = pdc_freeze, 235 .freeze = pdc_freeze,
219 .thaw = pdc_thaw, 236 .thaw = pdc_thaw,
220 .error_handler = pdc_error_handler, 237 .error_handler = pdc_pata_error_handler,
221 .post_internal_cmd = pdc_post_internal_cmd, 238 .post_internal_cmd = pdc_post_internal_cmd,
239 .cable_detect = pdc_pata_cable_detect,
222 .data_xfer = ata_data_xfer, 240 .data_xfer = ata_data_xfer,
223 .irq_handler = pdc_interrupt,
224 .irq_clear = pdc_irq_clear, 241 .irq_clear = pdc_irq_clear,
225 .irq_on = ata_irq_on, 242 .irq_on = ata_irq_on,
226 .irq_ack = ata_irq_ack, 243 .irq_ack = ata_irq_ack,
227 244
228 .port_start = pdc_port_start, 245 .port_start = pdc_common_port_start,
229}; 246};
230 247
231static const struct ata_port_info pdc_port_info[] = { 248static const struct ata_port_info pdc_port_info[] = {
232 /* board_2037x */ 249 /* board_2037x */
233 { 250 {
234 .sht = &pdc_ata_sht, 251 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
235 .flags = PDC_COMMON_FLAGS, 252 PDC_FLAG_SATA_PATA,
236 .pio_mask = 0x1f, /* pio0-4 */ 253 .pio_mask = 0x1f, /* pio0-4 */
237 .mwdma_mask = 0x07, /* mwdma0-2 */ 254 .mwdma_mask = 0x07, /* mwdma0-2 */
238 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 255 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
239 .port_ops = &pdc_old_sata_ops, 256 .port_ops = &pdc_old_sata_ops,
240 }, 257 },
241 258
259 /* board_2037x_pata */
260 {
261 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS,
262 .pio_mask = 0x1f, /* pio0-4 */
263 .mwdma_mask = 0x07, /* mwdma0-2 */
264 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
265 .port_ops = &pdc_pata_ops,
266 },
267
242 /* board_20319 */ 268 /* board_20319 */
243 { 269 {
244 .sht = &pdc_ata_sht, 270 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
245 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA, 271 PDC_FLAG_4_PORTS,
246 .pio_mask = 0x1f, /* pio0-4 */ 272 .pio_mask = 0x1f, /* pio0-4 */
247 .mwdma_mask = 0x07, /* mwdma0-2 */ 273 .mwdma_mask = 0x07, /* mwdma0-2 */
248 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 274 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
@@ -251,8 +277,8 @@ static const struct ata_port_info pdc_port_info[] = {
251 277
252 /* board_20619 */ 278 /* board_20619 */
253 { 279 {
254 .sht = &pdc_ata_sht, 280 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS |
255 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS, 281 PDC_FLAG_4_PORTS,
256 .pio_mask = 0x1f, /* pio0-4 */ 282 .pio_mask = 0x1f, /* pio0-4 */
257 .mwdma_mask = 0x07, /* mwdma0-2 */ 283 .mwdma_mask = 0x07, /* mwdma0-2 */
258 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 284 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
@@ -261,18 +287,28 @@ static const struct ata_port_info pdc_port_info[] = {
261 287
262 /* board_2057x */ 288 /* board_2057x */
263 { 289 {
264 .sht = &pdc_ata_sht, 290 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
265 .flags = PDC_COMMON_FLAGS, 291 PDC_FLAG_GEN_II | PDC_FLAG_SATA_PATA,
266 .pio_mask = 0x1f, /* pio0-4 */ 292 .pio_mask = 0x1f, /* pio0-4 */
267 .mwdma_mask = 0x07, /* mwdma0-2 */ 293 .mwdma_mask = 0x07, /* mwdma0-2 */
268 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 294 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
269 .port_ops = &pdc_sata_ops, 295 .port_ops = &pdc_sata_ops,
270 }, 296 },
271 297
298 /* board_2057x_pata */
299 {
300 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS,
301 PDC_FLAG_GEN_II,
302 .pio_mask = 0x1f, /* pio0-4 */
303 .mwdma_mask = 0x07, /* mwdma0-2 */
304 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
305 .port_ops = &pdc_pata_ops,
306 },
307
272 /* board_40518 */ 308 /* board_40518 */
273 { 309 {
274 .sht = &pdc_ata_sht, 310 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
275 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA, 311 PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS,
276 .pio_mask = 0x1f, /* pio0-4 */ 312 .pio_mask = 0x1f, /* pio0-4 */
277 .mwdma_mask = 0x07, /* mwdma0-2 */ 313 .mwdma_mask = 0x07, /* mwdma0-2 */
278 .udma_mask = 0x7f, /* udma0-6 ; FIXME */ 314 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
@@ -313,18 +349,12 @@ static struct pci_driver pdc_ata_pci_driver = {
313}; 349};
314 350
315 351
316static int pdc_port_start(struct ata_port *ap) 352static int pdc_common_port_start(struct ata_port *ap)
317{ 353{
318 struct device *dev = ap->host->dev; 354 struct device *dev = ap->host->dev;
319 struct pdc_host_priv *hp = ap->host->private_data;
320 struct pdc_port_priv *pp; 355 struct pdc_port_priv *pp;
321 int rc; 356 int rc;
322 357
323 /* fix up port flags and cable type for SATA+PATA chips */
324 ap->flags |= hp->port_flags[ap->port_no];
325 if (ap->flags & ATA_FLAG_SATA)
326 ap->cbl = ATA_CBL_SATA;
327
328 rc = ata_port_start(ap); 358 rc = ata_port_start(ap);
329 if (rc) 359 if (rc)
330 return rc; 360 return rc;
@@ -339,8 +369,19 @@ static int pdc_port_start(struct ata_port *ap)
339 369
340 ap->private_data = pp; 370 ap->private_data = pp;
341 371
372 return 0;
373}
374
375static int pdc_sata_port_start(struct ata_port *ap)
376{
377 int rc;
378
379 rc = pdc_common_port_start(ap);
380 if (rc)
381 return rc;
382
342 /* fix up PHYMODE4 align timing */ 383 /* fix up PHYMODE4 align timing */
343 if ((hp->flags & PDC_FLAG_GEN_II) && sata_scr_valid(ap)) { 384 if (ap->flags & PDC_FLAG_GEN_II) {
344 void __iomem *mmio = (void __iomem *) ap->ioaddr.scr_addr; 385 void __iomem *mmio = (void __iomem *) ap->ioaddr.scr_addr;
345 unsigned int tmp; 386 unsigned int tmp;
346 387
@@ -374,23 +415,25 @@ static void pdc_reset_port(struct ata_port *ap)
374 readl(mmio); /* flush */ 415 readl(mmio); /* flush */
375} 416}
376 417
377static void pdc_pata_cbl_detect(struct ata_port *ap) 418static int pdc_pata_cable_detect(struct ata_port *ap)
378{ 419{
379 u8 tmp; 420 u8 tmp;
380 void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_CTLSTAT + 0x03; 421 void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_CTLSTAT + 0x03;
381 422
382 tmp = readb(mmio); 423 tmp = readb(mmio);
424 if (tmp & 0x01)
425 return ATA_CBL_PATA40;
426 return ATA_CBL_PATA80;
427}
383 428
384 if (tmp & 0x01) { 429static int pdc_sata_cable_detect(struct ata_port *ap)
385 ap->cbl = ATA_CBL_PATA40; 430{
386 ap->udma_mask &= ATA_UDMA_MASK_40C; 431 return ATA_CBL_SATA;
387 } else
388 ap->cbl = ATA_CBL_PATA80;
389} 432}
390 433
391static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) 434static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
392{ 435{
393 if (sc_reg > SCR_CONTROL || ap->cbl != ATA_CBL_SATA) 436 if (sc_reg > SCR_CONTROL)
394 return 0xffffffffU; 437 return 0xffffffffU;
395 return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); 438 return readl(ap->ioaddr.scr_addr + (sc_reg * 4));
396} 439}
@@ -399,7 +442,7 @@ static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
399static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, 442static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
400 u32 val) 443 u32 val)
401{ 444{
402 if (sc_reg > SCR_CONTROL || ap->cbl != ATA_CBL_SATA) 445 if (sc_reg > SCR_CONTROL)
403 return; 446 return;
404 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); 447 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4));
405} 448}
@@ -555,52 +598,79 @@ static void pdc_thaw(struct ata_port *ap)
555 readl(mmio + PDC_CTLSTAT); /* flush */ 598 readl(mmio + PDC_CTLSTAT); /* flush */
556} 599}
557 600
558static int pdc_pre_reset(struct ata_port *ap) 601static void pdc_common_error_handler(struct ata_port *ap, ata_reset_fn_t hardreset)
559{
560 if (!sata_scr_valid(ap))
561 pdc_pata_cbl_detect(ap);
562 return ata_std_prereset(ap);
563}
564
565static void pdc_error_handler(struct ata_port *ap)
566{ 602{
567 ata_reset_fn_t hardreset;
568
569 if (!(ap->pflags & ATA_PFLAG_FROZEN)) 603 if (!(ap->pflags & ATA_PFLAG_FROZEN))
570 pdc_reset_port(ap); 604 pdc_reset_port(ap);
571 605
572 hardreset = NULL;
573 if (sata_scr_valid(ap))
574 hardreset = sata_std_hardreset;
575
576 /* perform recovery */ 606 /* perform recovery */
577 ata_do_eh(ap, pdc_pre_reset, ata_std_softreset, hardreset, 607 ata_do_eh(ap, ata_std_prereset, ata_std_softreset, hardreset,
578 ata_std_postreset); 608 ata_std_postreset);
579} 609}
580 610
611static void pdc_pata_error_handler(struct ata_port *ap)
612{
613 pdc_common_error_handler(ap, NULL);
614}
615
616static void pdc_sata_error_handler(struct ata_port *ap)
617{
618 pdc_common_error_handler(ap, sata_std_hardreset);
619}
620
581static void pdc_post_internal_cmd(struct ata_queued_cmd *qc) 621static void pdc_post_internal_cmd(struct ata_queued_cmd *qc)
582{ 622{
583 struct ata_port *ap = qc->ap; 623 struct ata_port *ap = qc->ap;
584 624
585 if (qc->flags & ATA_QCFLAG_FAILED)
586 qc->err_mask |= AC_ERR_OTHER;
587
588 /* make DMA engine forget about the failed command */ 625 /* make DMA engine forget about the failed command */
589 if (qc->err_mask) 626 if (qc->flags & ATA_QCFLAG_FAILED)
590 pdc_reset_port(ap); 627 pdc_reset_port(ap);
591} 628}
592 629
630static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc,
631 u32 port_status, u32 err_mask)
632{
633 struct ata_eh_info *ehi = &ap->eh_info;
634 unsigned int ac_err_mask = 0;
635
636 ata_ehi_clear_desc(ehi);
637 ata_ehi_push_desc(ehi, "port_status 0x%08x", port_status);
638 port_status &= err_mask;
639
640 if (port_status & PDC_DRIVE_ERR)
641 ac_err_mask |= AC_ERR_DEV;
642 if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR))
643 ac_err_mask |= AC_ERR_HSM;
644 if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR))
645 ac_err_mask |= AC_ERR_ATA_BUS;
646 if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR
647 | PDC_PCI_SYS_ERR | PDC1_PCI_PARITY_ERR))
648 ac_err_mask |= AC_ERR_HOST_BUS;
649
650 if (sata_scr_valid(ap))
651 ehi->serror |= pdc_sata_scr_read(ap, SCR_ERROR);
652
653 qc->err_mask |= ac_err_mask;
654
655 pdc_reset_port(ap);
656}
657
593static inline unsigned int pdc_host_intr( struct ata_port *ap, 658static inline unsigned int pdc_host_intr( struct ata_port *ap,
594 struct ata_queued_cmd *qc) 659 struct ata_queued_cmd *qc)
595{ 660{
596 unsigned int handled = 0; 661 unsigned int handled = 0;
597 u32 tmp; 662 void __iomem *port_mmio = ap->ioaddr.cmd_addr;
598 void __iomem *mmio = ap->ioaddr.cmd_addr + PDC_GLOBAL_CTL; 663 u32 port_status, err_mask;
599 664
600 tmp = readl(mmio); 665 err_mask = PDC_ERR_MASK;
601 if (tmp & PDC_ERR_MASK) { 666 if (ap->flags & PDC_FLAG_GEN_II)
602 qc->err_mask |= AC_ERR_DEV; 667 err_mask &= ~PDC1_ERR_MASK;
603 pdc_reset_port(ap); 668 else
669 err_mask &= ~PDC2_ERR_MASK;
670 port_status = readl(port_mmio + PDC_GLOBAL_CTL);
671 if (unlikely(port_status & err_mask)) {
672 pdc_error_intr(ap, qc, port_status, err_mask);
673 return 1;
604 } 674 }
605 675
606 switch (qc->tf.protocol) { 676 switch (qc->tf.protocol) {
@@ -767,44 +837,40 @@ static int pdc_check_atapi_dma(struct ata_queued_cmd *qc)
767 return pio; 837 return pio;
768} 838}
769 839
770static int pdc_old_check_atapi_dma(struct ata_queued_cmd *qc) 840static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc)
771{ 841{
772 struct ata_port *ap = qc->ap;
773
774 /* First generation chips cannot use ATAPI DMA on SATA ports */ 842 /* First generation chips cannot use ATAPI DMA on SATA ports */
775 if (sata_scr_valid(ap)) 843 return 1;
776 return 1;
777 return pdc_check_atapi_dma(qc);
778} 844}
779 845
780static void pdc_ata_setup_port(struct ata_ioports *port, void __iomem *base, 846static void pdc_ata_setup_port(struct ata_port *ap,
781 void __iomem *scr_addr) 847 void __iomem *base, void __iomem *scr_addr)
782{ 848{
783 port->cmd_addr = base; 849 ap->ioaddr.cmd_addr = base;
784 port->data_addr = base; 850 ap->ioaddr.data_addr = base;
785 port->feature_addr = 851 ap->ioaddr.feature_addr =
786 port->error_addr = base + 0x4; 852 ap->ioaddr.error_addr = base + 0x4;
787 port->nsect_addr = base + 0x8; 853 ap->ioaddr.nsect_addr = base + 0x8;
788 port->lbal_addr = base + 0xc; 854 ap->ioaddr.lbal_addr = base + 0xc;
789 port->lbam_addr = base + 0x10; 855 ap->ioaddr.lbam_addr = base + 0x10;
790 port->lbah_addr = base + 0x14; 856 ap->ioaddr.lbah_addr = base + 0x14;
791 port->device_addr = base + 0x18; 857 ap->ioaddr.device_addr = base + 0x18;
792 port->command_addr = 858 ap->ioaddr.command_addr =
793 port->status_addr = base + 0x1c; 859 ap->ioaddr.status_addr = base + 0x1c;
794 port->altstatus_addr = 860 ap->ioaddr.altstatus_addr =
795 port->ctl_addr = base + 0x38; 861 ap->ioaddr.ctl_addr = base + 0x38;
796 port->scr_addr = scr_addr; 862 ap->ioaddr.scr_addr = scr_addr;
797} 863}
798 864
799 865
800static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe) 866static void pdc_host_init(struct ata_host *host)
801{ 867{
802 void __iomem *mmio = pe->iomap[PDC_MMIO_BAR]; 868 void __iomem *mmio = host->iomap[PDC_MMIO_BAR];
803 struct pdc_host_priv *hp = pe->private_data; 869 int is_gen2 = host->ports[0]->flags & PDC_FLAG_GEN_II;
804 int hotplug_offset; 870 int hotplug_offset;
805 u32 tmp; 871 u32 tmp;
806 872
807 if (hp->flags & PDC_FLAG_GEN_II) 873 if (is_gen2)
808 hotplug_offset = PDC2_SATA_PLUG_CSR; 874 hotplug_offset = PDC2_SATA_PLUG_CSR;
809 else 875 else
810 hotplug_offset = PDC_SATA_PLUG_CSR; 876 hotplug_offset = PDC_SATA_PLUG_CSR;
@@ -818,7 +884,7 @@ static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
818 /* enable BMR_BURST, maybe change FIFO_SHD to 8 dwords */ 884 /* enable BMR_BURST, maybe change FIFO_SHD to 8 dwords */
819 tmp = readl(mmio + PDC_FLASH_CTL); 885 tmp = readl(mmio + PDC_FLASH_CTL);
820 tmp |= 0x02000; /* bit 13 (enable bmr burst) */ 886 tmp |= 0x02000; /* bit 13 (enable bmr burst) */
821 if (!(hp->flags & PDC_FLAG_GEN_II)) 887 if (!is_gen2)
822 tmp |= 0x10000; /* bit 16 (fifo threshold at 8 dw) */ 888 tmp |= 0x10000; /* bit 16 (fifo threshold at 8 dw) */
823 writel(tmp, mmio + PDC_FLASH_CTL); 889 writel(tmp, mmio + PDC_FLASH_CTL);
824 890
@@ -831,7 +897,7 @@ static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
831 writel(tmp | 0xff0000, mmio + hotplug_offset); 897 writel(tmp | 0xff0000, mmio + hotplug_offset);
832 898
833 /* don't initialise TBG or SLEW on 2nd generation chips */ 899 /* don't initialise TBG or SLEW on 2nd generation chips */
834 if (hp->flags & PDC_FLAG_GEN_II) 900 if (is_gen2)
835 return; 901 return;
836 902
837 /* reduce TBG clock to 133 Mhz. */ 903 /* reduce TBG clock to 133 Mhz. */
@@ -853,16 +919,16 @@ static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
853static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 919static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
854{ 920{
855 static int printed_version; 921 static int printed_version;
856 struct ata_probe_ent *probe_ent; 922 const struct ata_port_info *pi = &pdc_port_info[ent->driver_data];
857 struct pdc_host_priv *hp; 923 const struct ata_port_info *ppi[PDC_MAX_PORTS];
924 struct ata_host *host;
858 void __iomem *base; 925 void __iomem *base;
859 unsigned int board_idx = (unsigned int) ent->driver_data; 926 int n_ports, i, rc;
860 int rc;
861 u8 tmp;
862 927
863 if (!printed_version++) 928 if (!printed_version++)
864 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 929 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
865 930
931 /* enable and acquire resources */
866 rc = pcim_enable_device(pdev); 932 rc = pcim_enable_device(pdev);
867 if (rc) 933 if (rc)
868 return rc; 934 return rc;
@@ -872,89 +938,49 @@ static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
872 pcim_pin_device(pdev); 938 pcim_pin_device(pdev);
873 if (rc) 939 if (rc)
874 return rc; 940 return rc;
941 base = pcim_iomap_table(pdev)[PDC_MMIO_BAR];
875 942
876 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 943 /* determine port configuration and setup host */
877 if (rc) 944 n_ports = 2;
878 return rc; 945 if (pi->flags & PDC_FLAG_4_PORTS)
879 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); 946 n_ports = 4;
880 if (rc) 947 for (i = 0; i < n_ports; i++)
881 return rc; 948 ppi[i] = pi;
882
883 probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL);
884 if (probe_ent == NULL)
885 return -ENOMEM;
886 949
887 probe_ent->dev = pci_dev_to_dev(pdev); 950 if (pi->flags & PDC_FLAG_SATA_PATA) {
888 INIT_LIST_HEAD(&probe_ent->node); 951 u8 tmp = readb(base + PDC_FLASH_CTL+1);
952 if (!(tmp & 0x80)) {
953 ppi[n_ports++] = pi + 1;
954 dev_printk(KERN_INFO, &pdev->dev, "PATA port found\n");
955 }
956 }
889 957
890 hp = devm_kzalloc(&pdev->dev, sizeof(*hp), GFP_KERNEL); 958 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
891 if (hp == NULL) 959 if (!host) {
960 dev_printk(KERN_ERR, &pdev->dev, "failed to allocate host\n");
892 return -ENOMEM; 961 return -ENOMEM;
893
894 probe_ent->private_data = hp;
895
896 probe_ent->sht = pdc_port_info[board_idx].sht;
897 probe_ent->port_flags = pdc_port_info[board_idx].flags;
898 probe_ent->pio_mask = pdc_port_info[board_idx].pio_mask;
899 probe_ent->mwdma_mask = pdc_port_info[board_idx].mwdma_mask;
900 probe_ent->udma_mask = pdc_port_info[board_idx].udma_mask;
901 probe_ent->port_ops = pdc_port_info[board_idx].port_ops;
902
903 probe_ent->irq = pdev->irq;
904 probe_ent->irq_flags = IRQF_SHARED;
905 probe_ent->iomap = pcim_iomap_table(pdev);
906
907 base = probe_ent->iomap[PDC_MMIO_BAR];
908
909 pdc_ata_setup_port(&probe_ent->port[0], base + 0x200, base + 0x400);
910 pdc_ata_setup_port(&probe_ent->port[1], base + 0x280, base + 0x500);
911
912 /* notice 4-port boards */
913 switch (board_idx) {
914 case board_40518:
915 hp->flags |= PDC_FLAG_GEN_II;
916 /* Fall through */
917 case board_20319:
918 probe_ent->n_ports = 4;
919 pdc_ata_setup_port(&probe_ent->port[2], base + 0x300, base + 0x600);
920 pdc_ata_setup_port(&probe_ent->port[3], base + 0x380, base + 0x700);
921 break;
922 case board_2057x:
923 hp->flags |= PDC_FLAG_GEN_II;
924 /* Fall through */
925 case board_2037x:
926 /* TX2plus boards also have a PATA port */
927 tmp = readb(base + PDC_FLASH_CTL+1);
928 if (!(tmp & 0x80)) {
929 probe_ent->n_ports = 3;
930 pdc_ata_setup_port(&probe_ent->port[2], base + 0x300, NULL);
931 hp->port_flags[2] = ATA_FLAG_SLAVE_POSS;
932 printk(KERN_INFO DRV_NAME " PATA port found\n");
933 } else
934 probe_ent->n_ports = 2;
935 hp->port_flags[0] = ATA_FLAG_SATA;
936 hp->port_flags[1] = ATA_FLAG_SATA;
937 break;
938 case board_20619:
939 probe_ent->n_ports = 4;
940 pdc_ata_setup_port(&probe_ent->port[2], base + 0x300, NULL);
941 pdc_ata_setup_port(&probe_ent->port[3], base + 0x380, NULL);
942 break;
943 default:
944 BUG();
945 break;
946 } 962 }
963 host->iomap = pcim_iomap_table(pdev);
947 964
948 pci_set_master(pdev); 965 for (i = 0; i < host->n_ports; i++)
966 pdc_ata_setup_port(host->ports[i],
967 base + 0x200 + i * 0x80,
968 base + 0x400 + i * 0x100);
949 969
950 /* initialize adapter */ 970 /* initialize adapter */
951 pdc_host_init(board_idx, probe_ent); 971 pdc_host_init(host);
952 972
953 if (!ata_device_add(probe_ent)) 973 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
954 return -ENODEV; 974 if (rc)
975 return rc;
976 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
977 if (rc)
978 return rc;
955 979
956 devm_kfree(&pdev->dev, probe_ent); 980 /* start host, request IRQ and attach */
957 return 0; 981 pci_set_master(pdev);
982 return ata_host_activate(host, pdev->irq, pdc_interrupt, IRQF_SHARED,
983 &pdc_ata_sht);
958} 984}
959 985
960 986
diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c
index 8786b45f291b..f5a05de0093d 100644
--- a/drivers/ata/sata_qstor.c
+++ b/drivers/ata/sata_qstor.c
@@ -114,7 +114,6 @@ struct qs_port_priv {
114static u32 qs_scr_read (struct ata_port *ap, unsigned int sc_reg); 114static u32 qs_scr_read (struct ata_port *ap, unsigned int sc_reg);
115static void qs_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 115static void qs_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
116static int qs_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 116static int qs_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
117static irqreturn_t qs_intr (int irq, void *dev_instance);
118static int qs_port_start(struct ata_port *ap); 117static int qs_port_start(struct ata_port *ap);
119static void qs_host_stop(struct ata_host *host); 118static void qs_host_stop(struct ata_host *host);
120static void qs_phy_reset(struct ata_port *ap); 119static void qs_phy_reset(struct ata_port *ap);
@@ -158,7 +157,6 @@ static const struct ata_port_operations qs_ata_ops = {
158 .qc_issue = qs_qc_issue, 157 .qc_issue = qs_qc_issue,
159 .data_xfer = ata_data_xfer, 158 .data_xfer = ata_data_xfer,
160 .eng_timeout = qs_eng_timeout, 159 .eng_timeout = qs_eng_timeout,
161 .irq_handler = qs_intr,
162 .irq_clear = qs_irq_clear, 160 .irq_clear = qs_irq_clear,
163 .irq_on = ata_irq_on, 161 .irq_on = ata_irq_on,
164 .irq_ack = ata_irq_ack, 162 .irq_ack = ata_irq_ack,
@@ -173,7 +171,6 @@ static const struct ata_port_operations qs_ata_ops = {
173static const struct ata_port_info qs_port_info[] = { 171static const struct ata_port_info qs_port_info[] = {
174 /* board_2068_idx */ 172 /* board_2068_idx */
175 { 173 {
176 .sht = &qs_ata_sht,
177 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 174 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
178 ATA_FLAG_SATA_RESET | 175 ATA_FLAG_SATA_RESET |
179 //FIXME ATA_FLAG_SRST | 176 //FIXME ATA_FLAG_SRST |
@@ -530,16 +527,16 @@ static void qs_host_stop(struct ata_host *host)
530 writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */ 527 writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */
531} 528}
532 529
533static void qs_host_init(unsigned int chip_id, struct ata_probe_ent *pe) 530static void qs_host_init(struct ata_host *host, unsigned int chip_id)
534{ 531{
535 void __iomem *mmio_base = pe->iomap[QS_MMIO_BAR]; 532 void __iomem *mmio_base = host->iomap[QS_MMIO_BAR];
536 unsigned int port_no; 533 unsigned int port_no;
537 534
538 writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */ 535 writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */
539 writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */ 536 writeb(QS_CNFG3_GSRST, mmio_base + QS_HCF_CNFG3); /* global reset */
540 537
541 /* reset each channel in turn */ 538 /* reset each channel in turn */
542 for (port_no = 0; port_no < pe->n_ports; ++port_no) { 539 for (port_no = 0; port_no < host->n_ports; ++port_no) {
543 u8 __iomem *chan = mmio_base + (port_no * 0x4000); 540 u8 __iomem *chan = mmio_base + (port_no * 0x4000);
544 writeb(QS_CTR1_RDEV|QS_CTR1_RCHN, chan + QS_CCT_CTR1); 541 writeb(QS_CTR1_RDEV|QS_CTR1_RCHN, chan + QS_CCT_CTR1);
545 writeb(QS_CTR0_REG, chan + QS_CCT_CTR0); 542 writeb(QS_CTR0_REG, chan + QS_CCT_CTR0);
@@ -547,7 +544,7 @@ static void qs_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
547 } 544 }
548 writeb(QS_SERD3_PHY_ENA, mmio_base + QS_HVS_SERD3); /* enable phy */ 545 writeb(QS_SERD3_PHY_ENA, mmio_base + QS_HVS_SERD3); /* enable phy */
549 546
550 for (port_no = 0; port_no < pe->n_ports; ++port_no) { 547 for (port_no = 0; port_no < host->n_ports; ++port_no) {
551 u8 __iomem *chan = mmio_base + (port_no * 0x4000); 548 u8 __iomem *chan = mmio_base + (port_no * 0x4000);
552 /* set FIFO depths to same settings as Windows driver */ 549 /* set FIFO depths to same settings as Windows driver */
553 writew(32, chan + QS_CFC_HUFT); 550 writew(32, chan + QS_CFC_HUFT);
@@ -607,14 +604,20 @@ static int qs_ata_init_one(struct pci_dev *pdev,
607 const struct pci_device_id *ent) 604 const struct pci_device_id *ent)
608{ 605{
609 static int printed_version; 606 static int printed_version;
610 struct ata_probe_ent *probe_ent;
611 void __iomem * const *iomap;
612 unsigned int board_idx = (unsigned int) ent->driver_data; 607 unsigned int board_idx = (unsigned int) ent->driver_data;
608 const struct ata_port_info *ppi[] = { &qs_port_info[board_idx], NULL };
609 struct ata_host *host;
613 int rc, port_no; 610 int rc, port_no;
614 611
615 if (!printed_version++) 612 if (!printed_version++)
616 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 613 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
617 614
615 /* alloc host */
616 host = ata_host_alloc_pinfo(&pdev->dev, ppi, QS_PORTS);
617 if (!host)
618 return -ENOMEM;
619
620 /* acquire resources and fill host */
618 rc = pcim_enable_device(pdev); 621 rc = pcim_enable_device(pdev);
619 if (rc) 622 if (rc)
620 return rc; 623 return rc;
@@ -625,47 +628,24 @@ static int qs_ata_init_one(struct pci_dev *pdev,
625 rc = pcim_iomap_regions(pdev, 1 << QS_MMIO_BAR, DRV_NAME); 628 rc = pcim_iomap_regions(pdev, 1 << QS_MMIO_BAR, DRV_NAME);
626 if (rc) 629 if (rc)
627 return rc; 630 return rc;
628 iomap = pcim_iomap_table(pdev); 631 host->iomap = pcim_iomap_table(pdev);
629 632
630 rc = qs_set_dma_masks(pdev, iomap[QS_MMIO_BAR]); 633 rc = qs_set_dma_masks(pdev, host->iomap[QS_MMIO_BAR]);
631 if (rc) 634 if (rc)
632 return rc; 635 return rc;
633 636
634 probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL); 637 for (port_no = 0; port_no < host->n_ports; ++port_no) {
635 if (probe_ent == NULL)
636 return -ENOMEM;
637
638 probe_ent->dev = pci_dev_to_dev(pdev);
639 INIT_LIST_HEAD(&probe_ent->node);
640
641 probe_ent->sht = qs_port_info[board_idx].sht;
642 probe_ent->port_flags = qs_port_info[board_idx].flags;
643 probe_ent->pio_mask = qs_port_info[board_idx].pio_mask;
644 probe_ent->mwdma_mask = qs_port_info[board_idx].mwdma_mask;
645 probe_ent->udma_mask = qs_port_info[board_idx].udma_mask;
646 probe_ent->port_ops = qs_port_info[board_idx].port_ops;
647
648 probe_ent->irq = pdev->irq;
649 probe_ent->irq_flags = IRQF_SHARED;
650 probe_ent->iomap = iomap;
651 probe_ent->n_ports = QS_PORTS;
652
653 for (port_no = 0; port_no < probe_ent->n_ports; ++port_no) {
654 void __iomem *chan = 638 void __iomem *chan =
655 probe_ent->iomap[QS_MMIO_BAR] + (port_no * 0x4000); 639 host->iomap[QS_MMIO_BAR] + (port_no * 0x4000);
656 qs_ata_setup_port(&probe_ent->port[port_no], chan); 640 qs_ata_setup_port(&host->ports[port_no]->ioaddr, chan);
657 } 641 }
658 642
659 pci_set_master(pdev);
660
661 /* initialize adapter */ 643 /* initialize adapter */
662 qs_host_init(board_idx, probe_ent); 644 qs_host_init(host, board_idx);
663 645
664 if (ata_device_add(probe_ent) != QS_PORTS) 646 pci_set_master(pdev);
665 return -EIO; 647 return ata_host_activate(host, pdev->irq, qs_intr, IRQF_SHARED,
666 648 &qs_ata_sht);
667 devm_kfree(&pdev->dev, probe_ent);
668 return 0;
669} 649}
670 650
671static int __init qs_ata_init(void) 651static int __init qs_ata_init(void)
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 917b7ea4ef7c..0a1e417f309c 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -46,7 +46,7 @@
46#include <linux/libata.h> 46#include <linux/libata.h>
47 47
48#define DRV_NAME "sata_sil" 48#define DRV_NAME "sata_sil"
49#define DRV_VERSION "2.1" 49#define DRV_VERSION "2.2"
50 50
51enum { 51enum {
52 SIL_MMIO_BAR = 5, 52 SIL_MMIO_BAR = 5,
@@ -114,11 +114,10 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
114#ifdef CONFIG_PM 114#ifdef CONFIG_PM
115static int sil_pci_device_resume(struct pci_dev *pdev); 115static int sil_pci_device_resume(struct pci_dev *pdev);
116#endif 116#endif
117static void sil_dev_config(struct ata_port *ap, struct ata_device *dev); 117static void sil_dev_config(struct ata_device *dev);
118static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg); 118static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg);
119static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 119static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
120static void sil_post_set_mode (struct ata_port *ap); 120static int sil_set_mode (struct ata_port *ap, struct ata_device **r_failed);
121static irqreturn_t sil_interrupt(int irq, void *dev_instance);
122static void sil_freeze(struct ata_port *ap); 121static void sil_freeze(struct ata_port *ap);
123static void sil_thaw(struct ata_port *ap); 122static void sil_thaw(struct ata_port *ap);
124 123
@@ -197,7 +196,7 @@ static const struct ata_port_operations sil_ops = {
197 .check_status = ata_check_status, 196 .check_status = ata_check_status,
198 .exec_command = ata_exec_command, 197 .exec_command = ata_exec_command,
199 .dev_select = ata_std_dev_select, 198 .dev_select = ata_std_dev_select,
200 .post_set_mode = sil_post_set_mode, 199 .set_mode = sil_set_mode,
201 .bmdma_setup = ata_bmdma_setup, 200 .bmdma_setup = ata_bmdma_setup,
202 .bmdma_start = ata_bmdma_start, 201 .bmdma_start = ata_bmdma_start,
203 .bmdma_stop = ata_bmdma_stop, 202 .bmdma_stop = ata_bmdma_stop,
@@ -209,7 +208,6 @@ static const struct ata_port_operations sil_ops = {
209 .thaw = sil_thaw, 208 .thaw = sil_thaw,
210 .error_handler = ata_bmdma_error_handler, 209 .error_handler = ata_bmdma_error_handler,
211 .post_internal_cmd = ata_bmdma_post_internal_cmd, 210 .post_internal_cmd = ata_bmdma_post_internal_cmd,
212 .irq_handler = sil_interrupt,
213 .irq_clear = ata_bmdma_irq_clear, 211 .irq_clear = ata_bmdma_irq_clear,
214 .irq_on = ata_irq_on, 212 .irq_on = ata_irq_on,
215 .irq_ack = ata_irq_ack, 213 .irq_ack = ata_irq_ack,
@@ -221,7 +219,6 @@ static const struct ata_port_operations sil_ops = {
221static const struct ata_port_info sil_port_info[] = { 219static const struct ata_port_info sil_port_info[] = {
222 /* sil_3112 */ 220 /* sil_3112 */
223 { 221 {
224 .sht = &sil_sht,
225 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE, 222 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE,
226 .pio_mask = 0x1f, /* pio0-4 */ 223 .pio_mask = 0x1f, /* pio0-4 */
227 .mwdma_mask = 0x07, /* mwdma0-2 */ 224 .mwdma_mask = 0x07, /* mwdma0-2 */
@@ -230,7 +227,6 @@ static const struct ata_port_info sil_port_info[] = {
230 }, 227 },
231 /* sil_3112_no_sata_irq */ 228 /* sil_3112_no_sata_irq */
232 { 229 {
233 .sht = &sil_sht,
234 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE | 230 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE |
235 SIL_FLAG_NO_SATA_IRQ, 231 SIL_FLAG_NO_SATA_IRQ,
236 .pio_mask = 0x1f, /* pio0-4 */ 232 .pio_mask = 0x1f, /* pio0-4 */
@@ -240,7 +236,6 @@ static const struct ata_port_info sil_port_info[] = {
240 }, 236 },
241 /* sil_3512 */ 237 /* sil_3512 */
242 { 238 {
243 .sht = &sil_sht,
244 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT, 239 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT,
245 .pio_mask = 0x1f, /* pio0-4 */ 240 .pio_mask = 0x1f, /* pio0-4 */
246 .mwdma_mask = 0x07, /* mwdma0-2 */ 241 .mwdma_mask = 0x07, /* mwdma0-2 */
@@ -249,7 +244,6 @@ static const struct ata_port_info sil_port_info[] = {
249 }, 244 },
250 /* sil_3114 */ 245 /* sil_3114 */
251 { 246 {
252 .sht = &sil_sht,
253 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT, 247 .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT,
254 .pio_mask = 0x1f, /* pio0-4 */ 248 .pio_mask = 0x1f, /* pio0-4 */
255 .mwdma_mask = 0x07, /* mwdma0-2 */ 249 .mwdma_mask = 0x07, /* mwdma0-2 */
@@ -297,7 +291,16 @@ static unsigned char sil_get_device_cache_line(struct pci_dev *pdev)
297 return cache_line; 291 return cache_line;
298} 292}
299 293
300static void sil_post_set_mode (struct ata_port *ap) 294/**
295 * sil_set_mode - wrap set_mode functions
296 * @ap: port to set up
297 * @r_failed: returned device when we fail
298 *
299 * Wrap the libata method for device setup as after the setup we need
300 * to inspect the results and do some configuration work
301 */
302
303static int sil_set_mode (struct ata_port *ap, struct ata_device **r_failed)
301{ 304{
302 struct ata_host *host = ap->host; 305 struct ata_host *host = ap->host;
303 struct ata_device *dev; 306 struct ata_device *dev;
@@ -305,6 +308,11 @@ static void sil_post_set_mode (struct ata_port *ap)
305 void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode; 308 void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode;
306 u32 tmp, dev_mode[2]; 309 u32 tmp, dev_mode[2];
307 unsigned int i; 310 unsigned int i;
311 int rc;
312
313 rc = ata_do_set_mode(ap, r_failed);
314 if (rc)
315 return rc;
308 316
309 for (i = 0; i < 2; i++) { 317 for (i = 0; i < 2; i++) {
310 dev = &ap->device[i]; 318 dev = &ap->device[i];
@@ -323,6 +331,7 @@ static void sil_post_set_mode (struct ata_port *ap)
323 tmp |= (dev_mode[1] << 4); 331 tmp |= (dev_mode[1] << 4);
324 writel(tmp, addr); 332 writel(tmp, addr);
325 readl(addr); /* flush */ 333 readl(addr); /* flush */
334 return 0;
326} 335}
327 336
328static inline void __iomem *sil_scr_addr(struct ata_port *ap, unsigned int sc_reg) 337static inline void __iomem *sil_scr_addr(struct ata_port *ap, unsigned int sc_reg)
@@ -521,7 +530,6 @@ static void sil_thaw(struct ata_port *ap)
521 530
522/** 531/**
523 * sil_dev_config - Apply device/host-specific errata fixups 532 * sil_dev_config - Apply device/host-specific errata fixups
524 * @ap: Port containing device to be examined
525 * @dev: Device to be examined 533 * @dev: Device to be examined
526 * 534 *
527 * After the IDENTIFY [PACKET] DEVICE step is complete, and a 535 * After the IDENTIFY [PACKET] DEVICE step is complete, and a
@@ -548,8 +556,9 @@ static void sil_thaw(struct ata_port *ap)
548 * appreciated. 556 * appreciated.
549 * - But then again UDMA5 is hardly anything to complain about 557 * - But then again UDMA5 is hardly anything to complain about
550 */ 558 */
551static void sil_dev_config(struct ata_port *ap, struct ata_device *dev) 559static void sil_dev_config(struct ata_device *dev)
552{ 560{
561 struct ata_port *ap = dev->ap;
553 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO; 562 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
554 unsigned int n, quirks = 0; 563 unsigned int n, quirks = 0;
555 unsigned char model_num[ATA_ID_PROD_LEN + 1]; 564 unsigned char model_num[ATA_ID_PROD_LEN + 1];
@@ -583,10 +592,10 @@ static void sil_dev_config(struct ata_port *ap, struct ata_device *dev)
583 } 592 }
584} 593}
585 594
586static void sil_init_controller(struct pci_dev *pdev, 595static void sil_init_controller(struct ata_host *host)
587 int n_ports, unsigned long port_flags,
588 void __iomem *mmio_base)
589{ 596{
597 struct pci_dev *pdev = to_pci_dev(host->dev);
598 void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR];
590 u8 cls; 599 u8 cls;
591 u32 tmp; 600 u32 tmp;
592 int i; 601 int i;
@@ -596,7 +605,7 @@ static void sil_init_controller(struct pci_dev *pdev,
596 if (cls) { 605 if (cls) {
597 cls >>= 3; 606 cls >>= 3;
598 cls++; /* cls = (line_size/8)+1 */ 607 cls++; /* cls = (line_size/8)+1 */
599 for (i = 0; i < n_ports; i++) 608 for (i = 0; i < host->n_ports; i++)
600 writew(cls << 8 | cls, 609 writew(cls << 8 | cls,
601 mmio_base + sil_port[i].fifo_cfg); 610 mmio_base + sil_port[i].fifo_cfg);
602 } else 611 } else
@@ -604,10 +613,10 @@ static void sil_init_controller(struct pci_dev *pdev,
604 "cache line size not set. Driver may not function\n"); 613 "cache line size not set. Driver may not function\n");
605 614
606 /* Apply R_ERR on DMA activate FIS errata workaround */ 615 /* Apply R_ERR on DMA activate FIS errata workaround */
607 if (port_flags & SIL_FLAG_RERR_ON_DMA_ACT) { 616 if (host->ports[0]->flags & SIL_FLAG_RERR_ON_DMA_ACT) {
608 int cnt; 617 int cnt;
609 618
610 for (i = 0, cnt = 0; i < n_ports; i++) { 619 for (i = 0, cnt = 0; i < host->n_ports; i++) {
611 tmp = readl(mmio_base + sil_port[i].sfis_cfg); 620 tmp = readl(mmio_base + sil_port[i].sfis_cfg);
612 if ((tmp & 0x3) != 0x01) 621 if ((tmp & 0x3) != 0x01)
613 continue; 622 continue;
@@ -620,7 +629,7 @@ static void sil_init_controller(struct pci_dev *pdev,
620 } 629 }
621 } 630 }
622 631
623 if (n_ports == 4) { 632 if (host->n_ports == 4) {
624 /* flip the magic "make 4 ports work" bit */ 633 /* flip the magic "make 4 ports work" bit */
625 tmp = readl(mmio_base + sil_port[2].bmdma); 634 tmp = readl(mmio_base + sil_port[2].bmdma);
626 if ((tmp & SIL_INTR_STEERING) == 0) 635 if ((tmp & SIL_INTR_STEERING) == 0)
@@ -632,15 +641,26 @@ static void sil_init_controller(struct pci_dev *pdev,
632static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 641static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
633{ 642{
634 static int printed_version; 643 static int printed_version;
635 struct device *dev = &pdev->dev; 644 int board_id = ent->driver_data;
636 struct ata_probe_ent *probe_ent; 645 const struct ata_port_info *ppi[] = { &sil_port_info[board_id], NULL };
646 struct ata_host *host;
637 void __iomem *mmio_base; 647 void __iomem *mmio_base;
638 int rc; 648 int n_ports, rc;
639 unsigned int i; 649 unsigned int i;
640 650
641 if (!printed_version++) 651 if (!printed_version++)
642 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 652 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
643 653
654 /* allocate host */
655 n_ports = 2;
656 if (board_id == sil_3114)
657 n_ports = 4;
658
659 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
660 if (!host)
661 return -ENOMEM;
662
663 /* acquire resources and fill host */
644 rc = pcim_enable_device(pdev); 664 rc = pcim_enable_device(pdev);
645 if (rc) 665 if (rc)
646 return rc; 666 return rc;
@@ -650,6 +670,7 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
650 pcim_pin_device(pdev); 670 pcim_pin_device(pdev);
651 if (rc) 671 if (rc)
652 return rc; 672 return rc;
673 host->iomap = pcim_iomap_table(pdev);
653 674
654 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 675 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
655 if (rc) 676 if (rc)
@@ -658,45 +679,25 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
658 if (rc) 679 if (rc)
659 return rc; 680 return rc;
660 681
661 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL); 682 mmio_base = host->iomap[SIL_MMIO_BAR];
662 if (probe_ent == NULL)
663 return -ENOMEM;
664 683
665 INIT_LIST_HEAD(&probe_ent->node); 684 for (i = 0; i < host->n_ports; i++) {
666 probe_ent->dev = pci_dev_to_dev(pdev); 685 struct ata_ioports *ioaddr = &host->ports[i]->ioaddr;
667 probe_ent->port_ops = sil_port_info[ent->driver_data].port_ops; 686
668 probe_ent->sht = sil_port_info[ent->driver_data].sht; 687 ioaddr->cmd_addr = mmio_base + sil_port[i].tf;
669 probe_ent->n_ports = (ent->driver_data == sil_3114) ? 4 : 2; 688 ioaddr->altstatus_addr =
670 probe_ent->pio_mask = sil_port_info[ent->driver_data].pio_mask; 689 ioaddr->ctl_addr = mmio_base + sil_port[i].ctl;
671 probe_ent->mwdma_mask = sil_port_info[ent->driver_data].mwdma_mask; 690 ioaddr->bmdma_addr = mmio_base + sil_port[i].bmdma;
672 probe_ent->udma_mask = sil_port_info[ent->driver_data].udma_mask; 691 ioaddr->scr_addr = mmio_base + sil_port[i].scr;
673 probe_ent->irq = pdev->irq; 692 ata_std_ports(ioaddr);
674 probe_ent->irq_flags = IRQF_SHARED;
675 probe_ent->port_flags = sil_port_info[ent->driver_data].flags;
676
677 probe_ent->iomap = pcim_iomap_table(pdev);
678
679 mmio_base = probe_ent->iomap[SIL_MMIO_BAR];
680
681 for (i = 0; i < probe_ent->n_ports; i++) {
682 probe_ent->port[i].cmd_addr = mmio_base + sil_port[i].tf;
683 probe_ent->port[i].altstatus_addr =
684 probe_ent->port[i].ctl_addr = mmio_base + sil_port[i].ctl;
685 probe_ent->port[i].bmdma_addr = mmio_base + sil_port[i].bmdma;
686 probe_ent->port[i].scr_addr = mmio_base + sil_port[i].scr;
687 ata_std_ports(&probe_ent->port[i]);
688 } 693 }
689 694
690 sil_init_controller(pdev, probe_ent->n_ports, probe_ent->port_flags, 695 /* initialize and activate */
691 mmio_base); 696 sil_init_controller(host);
692 697
693 pci_set_master(pdev); 698 pci_set_master(pdev);
694 699 return ata_host_activate(host, pdev->irq, sil_interrupt, IRQF_SHARED,
695 if (!ata_device_add(probe_ent)) 700 &sil_sht);
696 return -ENODEV;
697
698 devm_kfree(dev, probe_ent);
699 return 0;
700} 701}
701 702
702#ifdef CONFIG_PM 703#ifdef CONFIG_PM
@@ -709,8 +710,7 @@ static int sil_pci_device_resume(struct pci_dev *pdev)
709 if (rc) 710 if (rc)
710 return rc; 711 return rc;
711 712
712 sil_init_controller(pdev, host->n_ports, host->ports[0]->flags, 713 sil_init_controller(host);
713 host->iomap[SIL_MMIO_BAR]);
714 ata_host_resume(host); 714 ata_host_resume(host);
715 715
716 return 0; 716 return 0;
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c
index 5614df8c1ce2..e6223ba667da 100644
--- a/drivers/ata/sata_sil24.c
+++ b/drivers/ata/sata_sil24.c
@@ -323,7 +323,7 @@ struct sil24_port_priv {
323 struct ata_taskfile tf; /* Cached taskfile registers */ 323 struct ata_taskfile tf; /* Cached taskfile registers */
324}; 324};
325 325
326static void sil24_dev_config(struct ata_port *ap, struct ata_device *dev); 326static void sil24_dev_config(struct ata_device *dev);
327static u8 sil24_check_status(struct ata_port *ap); 327static u8 sil24_check_status(struct ata_port *ap);
328static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg); 328static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg);
329static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val); 329static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val);
@@ -331,7 +331,6 @@ static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
331static void sil24_qc_prep(struct ata_queued_cmd *qc); 331static void sil24_qc_prep(struct ata_queued_cmd *qc);
332static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc); 332static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc);
333static void sil24_irq_clear(struct ata_port *ap); 333static void sil24_irq_clear(struct ata_port *ap);
334static irqreturn_t sil24_interrupt(int irq, void *dev_instance);
335static void sil24_freeze(struct ata_port *ap); 334static void sil24_freeze(struct ata_port *ap);
336static void sil24_thaw(struct ata_port *ap); 335static void sil24_thaw(struct ata_port *ap);
337static void sil24_error_handler(struct ata_port *ap); 336static void sil24_error_handler(struct ata_port *ap);
@@ -401,7 +400,6 @@ static const struct ata_port_operations sil24_ops = {
401 .qc_prep = sil24_qc_prep, 400 .qc_prep = sil24_qc_prep,
402 .qc_issue = sil24_qc_issue, 401 .qc_issue = sil24_qc_issue,
403 402
404 .irq_handler = sil24_interrupt,
405 .irq_clear = sil24_irq_clear, 403 .irq_clear = sil24_irq_clear,
406 .irq_on = ata_dummy_irq_on, 404 .irq_on = ata_dummy_irq_on,
407 .irq_ack = ata_dummy_irq_ack, 405 .irq_ack = ata_dummy_irq_ack,
@@ -424,10 +422,9 @@ static const struct ata_port_operations sil24_ops = {
424#define SIL24_NPORTS2FLAG(nports) ((((unsigned)(nports) - 1) & 0x3) << 30) 422#define SIL24_NPORTS2FLAG(nports) ((((unsigned)(nports) - 1) & 0x3) << 30)
425#define SIL24_FLAG2NPORTS(flag) ((((flag) >> 30) & 0x3) + 1) 423#define SIL24_FLAG2NPORTS(flag) ((((flag) >> 30) & 0x3) + 1)
426 424
427static struct ata_port_info sil24_port_info[] = { 425static const struct ata_port_info sil24_port_info[] = {
428 /* sil_3124 */ 426 /* sil_3124 */
429 { 427 {
430 .sht = &sil24_sht,
431 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(4) | 428 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(4) |
432 SIL24_FLAG_PCIX_IRQ_WOC, 429 SIL24_FLAG_PCIX_IRQ_WOC,
433 .pio_mask = 0x1f, /* pio0-4 */ 430 .pio_mask = 0x1f, /* pio0-4 */
@@ -437,7 +434,6 @@ static struct ata_port_info sil24_port_info[] = {
437 }, 434 },
438 /* sil_3132 */ 435 /* sil_3132 */
439 { 436 {
440 .sht = &sil24_sht,
441 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(2), 437 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(2),
442 .pio_mask = 0x1f, /* pio0-4 */ 438 .pio_mask = 0x1f, /* pio0-4 */
443 .mwdma_mask = 0x07, /* mwdma0-2 */ 439 .mwdma_mask = 0x07, /* mwdma0-2 */
@@ -446,7 +442,6 @@ static struct ata_port_info sil24_port_info[] = {
446 }, 442 },
447 /* sil_3131/sil_3531 */ 443 /* sil_3131/sil_3531 */
448 { 444 {
449 .sht = &sil24_sht,
450 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(1), 445 .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(1),
451 .pio_mask = 0x1f, /* pio0-4 */ 446 .pio_mask = 0x1f, /* pio0-4 */
452 .mwdma_mask = 0x07, /* mwdma0-2 */ 447 .mwdma_mask = 0x07, /* mwdma0-2 */
@@ -462,9 +457,9 @@ static int sil24_tag(int tag)
462 return tag; 457 return tag;
463} 458}
464 459
465static void sil24_dev_config(struct ata_port *ap, struct ata_device *dev) 460static void sil24_dev_config(struct ata_device *dev)
466{ 461{
467 void __iomem *port = ap->ioaddr.cmd_addr; 462 void __iomem *port = dev->ap->ioaddr.cmd_addr;
468 463
469 if (dev->cdb_len == 16) 464 if (dev->cdb_len == 16)
470 writel(PORT_CS_CDB16, port + PORT_CTRL_STAT); 465 writel(PORT_CS_CDB16, port + PORT_CTRL_STAT);
@@ -924,11 +919,8 @@ static void sil24_post_internal_cmd(struct ata_queued_cmd *qc)
924{ 919{
925 struct ata_port *ap = qc->ap; 920 struct ata_port *ap = qc->ap;
926 921
927 if (qc->flags & ATA_QCFLAG_FAILED)
928 qc->err_mask |= AC_ERR_OTHER;
929
930 /* make DMA engine forget about the failed command */ 922 /* make DMA engine forget about the failed command */
931 if (qc->err_mask) 923 if (qc->flags & ATA_QCFLAG_FAILED)
932 sil24_init_port(ap); 924 sil24_init_port(ap);
933} 925}
934 926
@@ -964,11 +956,10 @@ static int sil24_port_start(struct ata_port *ap)
964 return 0; 956 return 0;
965} 957}
966 958
967static void sil24_init_controller(struct pci_dev *pdev, int n_ports, 959static void sil24_init_controller(struct ata_host *host)
968 unsigned long port_flags,
969 void __iomem *host_base,
970 void __iomem *port_base)
971{ 960{
961 void __iomem *host_base = host->iomap[SIL24_HOST_BAR];
962 void __iomem *port_base = host->iomap[SIL24_PORT_BAR];
972 u32 tmp; 963 u32 tmp;
973 int i; 964 int i;
974 965
@@ -979,7 +970,7 @@ static void sil24_init_controller(struct pci_dev *pdev, int n_ports,
979 writel(0, host_base + HOST_CTRL); 970 writel(0, host_base + HOST_CTRL);
980 971
981 /* init ports */ 972 /* init ports */
982 for (i = 0; i < n_ports; i++) { 973 for (i = 0; i < host->n_ports; i++) {
983 void __iomem *port = port_base + i * PORT_REGS_SIZE; 974 void __iomem *port = port_base + i * PORT_REGS_SIZE;
984 975
985 /* Initial PHY setting */ 976 /* Initial PHY setting */
@@ -993,12 +984,12 @@ static void sil24_init_controller(struct pci_dev *pdev, int n_ports,
993 PORT_CS_PORT_RST, 984 PORT_CS_PORT_RST,
994 PORT_CS_PORT_RST, 10, 100); 985 PORT_CS_PORT_RST, 10, 100);
995 if (tmp & PORT_CS_PORT_RST) 986 if (tmp & PORT_CS_PORT_RST)
996 dev_printk(KERN_ERR, &pdev->dev, 987 dev_printk(KERN_ERR, host->dev,
997 "failed to clear port RST\n"); 988 "failed to clear port RST\n");
998 } 989 }
999 990
1000 /* Configure IRQ WoC */ 991 /* Configure IRQ WoC */
1001 if (port_flags & SIL24_FLAG_PCIX_IRQ_WOC) 992 if (host->ports[0]->flags & SIL24_FLAG_PCIX_IRQ_WOC)
1002 writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_STAT); 993 writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_STAT);
1003 else 994 else
1004 writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR); 995 writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR);
@@ -1026,18 +1017,17 @@ static void sil24_init_controller(struct pci_dev *pdev, int n_ports,
1026static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 1017static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1027{ 1018{
1028 static int printed_version = 0; 1019 static int printed_version = 0;
1029 struct device *dev = &pdev->dev; 1020 struct ata_port_info pi = sil24_port_info[ent->driver_data];
1030 unsigned int board_id = (unsigned int)ent->driver_data; 1021 const struct ata_port_info *ppi[] = { &pi, NULL };
1031 struct ata_port_info *pinfo = &sil24_port_info[board_id]; 1022 void __iomem * const *iomap;
1032 struct ata_probe_ent *probe_ent; 1023 struct ata_host *host;
1033 void __iomem *host_base;
1034 void __iomem *port_base;
1035 int i, rc; 1024 int i, rc;
1036 u32 tmp; 1025 u32 tmp;
1037 1026
1038 if (!printed_version++) 1027 if (!printed_version++)
1039 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 1028 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
1040 1029
1030 /* acquire resources */
1041 rc = pcim_enable_device(pdev); 1031 rc = pcim_enable_device(pdev);
1042 if (rc) 1032 if (rc)
1043 return rc; 1033 return rc;
@@ -1047,33 +1037,36 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1047 DRV_NAME); 1037 DRV_NAME);
1048 if (rc) 1038 if (rc)
1049 return rc; 1039 return rc;
1040 iomap = pcim_iomap_table(pdev);
1050 1041
1051 /* allocate & init probe_ent */ 1042 /* apply workaround for completion IRQ loss on PCI-X errata */
1052 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL); 1043 if (pi.flags & SIL24_FLAG_PCIX_IRQ_WOC) {
1053 if (!probe_ent) 1044 tmp = readl(iomap[SIL24_HOST_BAR] + HOST_CTRL);
1054 return -ENOMEM; 1045 if (tmp & (HOST_CTRL_TRDY | HOST_CTRL_STOP | HOST_CTRL_DEVSEL))
1046 dev_printk(KERN_INFO, &pdev->dev,
1047 "Applying completion IRQ loss on PCI-X "
1048 "errata fix\n");
1049 else
1050 pi.flags &= ~SIL24_FLAG_PCIX_IRQ_WOC;
1051 }
1055 1052
1056 probe_ent->dev = pci_dev_to_dev(pdev); 1053 /* allocate and fill host */
1057 INIT_LIST_HEAD(&probe_ent->node); 1054 host = ata_host_alloc_pinfo(&pdev->dev, ppi,
1055 SIL24_FLAG2NPORTS(ppi[0]->flags));
1056 if (!host)
1057 return -ENOMEM;
1058 host->iomap = iomap;
1058 1059
1059 probe_ent->sht = pinfo->sht; 1060 for (i = 0; i < host->n_ports; i++) {
1060 probe_ent->port_flags = pinfo->flags; 1061 void __iomem *port = iomap[SIL24_PORT_BAR] + i * PORT_REGS_SIZE;
1061 probe_ent->pio_mask = pinfo->pio_mask;
1062 probe_ent->mwdma_mask = pinfo->mwdma_mask;
1063 probe_ent->udma_mask = pinfo->udma_mask;
1064 probe_ent->port_ops = pinfo->port_ops;
1065 probe_ent->n_ports = SIL24_FLAG2NPORTS(pinfo->flags);
1066 1062
1067 probe_ent->irq = pdev->irq; 1063 host->ports[i]->ioaddr.cmd_addr = port;
1068 probe_ent->irq_flags = IRQF_SHARED; 1064 host->ports[i]->ioaddr.scr_addr = port + PORT_SCONTROL;
1069 probe_ent->iomap = pcim_iomap_table(pdev);
1070 1065
1071 host_base = probe_ent->iomap[SIL24_HOST_BAR]; 1066 ata_std_ports(&host->ports[i]->ioaddr);
1072 port_base = probe_ent->iomap[SIL24_PORT_BAR]; 1067 }
1073 1068
1074 /* 1069 /* configure and activate the device */
1075 * Configure the device
1076 */
1077 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { 1070 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1078 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); 1071 rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1079 if (rc) { 1072 if (rc) {
@@ -1099,36 +1092,11 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1099 } 1092 }
1100 } 1093 }
1101 1094
1102 /* Apply workaround for completion IRQ loss on PCI-X errata */ 1095 sil24_init_controller(host);
1103 if (probe_ent->port_flags & SIL24_FLAG_PCIX_IRQ_WOC) {
1104 tmp = readl(host_base + HOST_CTRL);
1105 if (tmp & (HOST_CTRL_TRDY | HOST_CTRL_STOP | HOST_CTRL_DEVSEL))
1106 dev_printk(KERN_INFO, &pdev->dev,
1107 "Applying completion IRQ loss on PCI-X "
1108 "errata fix\n");
1109 else
1110 probe_ent->port_flags &= ~SIL24_FLAG_PCIX_IRQ_WOC;
1111 }
1112
1113 for (i = 0; i < probe_ent->n_ports; i++) {
1114 void __iomem *port = port_base + i * PORT_REGS_SIZE;
1115
1116 probe_ent->port[i].cmd_addr = port;
1117 probe_ent->port[i].scr_addr = port + PORT_SCONTROL;
1118
1119 ata_std_ports(&probe_ent->port[i]);
1120 }
1121
1122 sil24_init_controller(pdev, probe_ent->n_ports, probe_ent->port_flags,
1123 host_base, port_base);
1124 1096
1125 pci_set_master(pdev); 1097 pci_set_master(pdev);
1126 1098 return ata_host_activate(host, pdev->irq, sil24_interrupt, IRQF_SHARED,
1127 if (!ata_device_add(probe_ent)) 1099 &sil24_sht);
1128 return -ENODEV;
1129
1130 devm_kfree(dev, probe_ent);
1131 return 0;
1132} 1100}
1133 1101
1134#ifdef CONFIG_PM 1102#ifdef CONFIG_PM
@@ -1136,7 +1104,6 @@ static int sil24_pci_device_resume(struct pci_dev *pdev)
1136{ 1104{
1137 struct ata_host *host = dev_get_drvdata(&pdev->dev); 1105 struct ata_host *host = dev_get_drvdata(&pdev->dev);
1138 void __iomem *host_base = host->iomap[SIL24_HOST_BAR]; 1106 void __iomem *host_base = host->iomap[SIL24_HOST_BAR];
1139 void __iomem *port_base = host->iomap[SIL24_PORT_BAR];
1140 int rc; 1107 int rc;
1141 1108
1142 rc = ata_pci_device_do_resume(pdev); 1109 rc = ata_pci_device_do_resume(pdev);
@@ -1146,8 +1113,7 @@ static int sil24_pci_device_resume(struct pci_dev *pdev)
1146 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) 1113 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND)
1147 writel(HOST_CTRL_GLOBAL_RST, host_base + HOST_CTRL); 1114 writel(HOST_CTRL_GLOBAL_RST, host_base + HOST_CTRL);
1148 1115
1149 sil24_init_controller(pdev, host->n_ports, host->ports[0]->flags, 1116 sil24_init_controller(host);
1150 host_base, port_base);
1151 1117
1152 ata_host_resume(host); 1118 ata_host_resume(host);
1153 1119
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c
index a787f0d4a5ba..d8ee062e82fc 100644
--- a/drivers/ata/sata_sis.c
+++ b/drivers/ata/sata_sis.c
@@ -121,7 +121,6 @@ static const struct ata_port_operations sis_ops = {
121 .thaw = ata_bmdma_thaw, 121 .thaw = ata_bmdma_thaw,
122 .error_handler = ata_bmdma_error_handler, 122 .error_handler = ata_bmdma_error_handler,
123 .post_internal_cmd = ata_bmdma_post_internal_cmd, 123 .post_internal_cmd = ata_bmdma_post_internal_cmd,
124 .irq_handler = ata_interrupt,
125 .irq_clear = ata_bmdma_irq_clear, 124 .irq_clear = ata_bmdma_irq_clear,
126 .irq_on = ata_irq_on, 125 .irq_on = ata_irq_on,
127 .irq_ack = ata_irq_ack, 126 .irq_ack = ata_irq_ack,
@@ -131,7 +130,6 @@ static const struct ata_port_operations sis_ops = {
131}; 130};
132 131
133static struct ata_port_info sis_port_info = { 132static struct ata_port_info sis_port_info = {
134 .sht = &sis_sht,
135 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, 133 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
136 .pio_mask = 0x1f, 134 .pio_mask = 0x1f,
137 .mwdma_mask = 0x7, 135 .mwdma_mask = 0x7,
@@ -256,12 +254,13 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
256static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 254static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
257{ 255{
258 static int printed_version; 256 static int printed_version;
259 struct ata_probe_ent *probe_ent = NULL; 257 struct ata_port_info pi = sis_port_info;
260 int rc; 258 const struct ata_port_info *ppi[2] = { &pi, &pi };
259 struct ata_host *host;
261 u32 genctl, val; 260 u32 genctl, val;
262 struct ata_port_info pi = sis_port_info, *ppi[2] = { &pi, &pi };
263 u8 pmr; 261 u8 pmr;
264 u8 port2_start = 0x20; 262 u8 port2_start = 0x20;
263 int rc;
265 264
266 if (!printed_version++) 265 if (!printed_version++)
267 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); 266 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
@@ -270,19 +269,6 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
270 if (rc) 269 if (rc)
271 return rc; 270 return rc;
272 271
273 rc = pci_request_regions(pdev, DRV_NAME);
274 if (rc) {
275 pcim_pin_device(pdev);
276 return rc;
277 }
278
279 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
280 if (rc)
281 return rc;
282 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
283 if (rc)
284 return rc;
285
286 /* check and see if the SCRs are in IO space or PCI cfg space */ 272 /* check and see if the SCRs are in IO space or PCI cfg space */
287 pci_read_config_dword(pdev, SIS_GENCTL, &genctl); 273 pci_read_config_dword(pdev, SIS_GENCTL, &genctl);
288 if ((genctl & GENCTL_IOMAPPED_SCR) == 0) 274 if ((genctl & GENCTL_IOMAPPED_SCR) == 0)
@@ -349,30 +335,26 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
349 break; 335 break;
350 } 336 }
351 337
352 probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); 338 rc = ata_pci_prepare_native_host(pdev, ppi, 2, &host);
353 if (!probe_ent) 339 if (rc)
354 return -ENOMEM; 340 return rc;
355 341
356 if (!(probe_ent->port_flags & SIS_FLAG_CFGSCR)) { 342 if (!(pi.flags & SIS_FLAG_CFGSCR)) {
357 void __iomem *mmio; 343 void __iomem *mmio;
358 344
359 mmio = pcim_iomap(pdev, SIS_SCR_PCI_BAR, 0); 345 rc = pcim_iomap_regions(pdev, 1 << SIS_SCR_PCI_BAR, DRV_NAME);
360 if (!mmio) 346 if (rc)
361 return -ENOMEM; 347 return rc;
348 mmio = host->iomap[SIS_SCR_PCI_BAR];
362 349
363 probe_ent->port[0].scr_addr = mmio; 350 host->ports[0]->ioaddr.scr_addr = mmio;
364 probe_ent->port[1].scr_addr = mmio + port2_start; 351 host->ports[1]->ioaddr.scr_addr = mmio + port2_start;
365 } 352 }
366 353
367 pci_set_master(pdev); 354 pci_set_master(pdev);
368 pci_intx(pdev, 1); 355 pci_intx(pdev, 1);
369 356 return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
370 if (!ata_device_add(probe_ent)) 357 &sis_sht);
371 return -EIO;
372
373 devm_kfree(&pdev->dev, probe_ent);
374 return 0;
375
376} 358}
377 359
378static int __init sis_init(void) 360static int __init sis_init(void)
diff --git a/drivers/ata/sata_svw.c b/drivers/ata/sata_svw.c
index b121195cc598..cc07aac10e8c 100644
--- a/drivers/ata/sata_svw.c
+++ b/drivers/ata/sata_svw.c
@@ -56,7 +56,9 @@
56#define DRV_VERSION "2.1" 56#define DRV_VERSION "2.1"
57 57
58enum { 58enum {
59 K2_FLAG_NO_ATAPI_DMA = (1 << 29), 59 /* ap->flags bits */
60 K2_FLAG_SATA_8_PORTS = (1 << 24),
61 K2_FLAG_NO_ATAPI_DMA = (1 << 25),
60 62
61 /* Taskfile registers offsets */ 63 /* Taskfile registers offsets */
62 K2_SATA_TF_CMD_OFFSET = 0x00, 64 K2_SATA_TF_CMD_OFFSET = 0x00,
@@ -90,17 +92,6 @@ enum {
90 board_svw8 = 1, 92 board_svw8 = 1,
91}; 93};
92 94
93static const struct k2_board_info {
94 unsigned int n_ports;
95 unsigned long port_flags;
96} k2_board_info[] = {
97 /* board_svw4 */
98 { 4, K2_FLAG_NO_ATAPI_DMA },
99
100 /* board_svw8 */
101 { 8, K2_FLAG_NO_ATAPI_DMA },
102};
103
104static u8 k2_stat_check_status(struct ata_port *ap); 95static u8 k2_stat_check_status(struct ata_port *ap);
105 96
106 97
@@ -354,7 +345,6 @@ static const struct ata_port_operations k2_sata_ops = {
354 .thaw = ata_bmdma_thaw, 345 .thaw = ata_bmdma_thaw,
355 .error_handler = ata_bmdma_error_handler, 346 .error_handler = ata_bmdma_error_handler,
356 .post_internal_cmd = ata_bmdma_post_internal_cmd, 347 .post_internal_cmd = ata_bmdma_post_internal_cmd,
357 .irq_handler = ata_interrupt,
358 .irq_clear = ata_bmdma_irq_clear, 348 .irq_clear = ata_bmdma_irq_clear,
359 .irq_on = ata_irq_on, 349 .irq_on = ata_irq_on,
360 .irq_ack = ata_irq_ack, 350 .irq_ack = ata_irq_ack,
@@ -363,6 +353,28 @@ static const struct ata_port_operations k2_sata_ops = {
363 .port_start = ata_port_start, 353 .port_start = ata_port_start,
364}; 354};
365 355
356static const struct ata_port_info k2_port_info[] = {
357 /* board_svw4 */
358 {
359 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
360 ATA_FLAG_MMIO | K2_FLAG_NO_ATAPI_DMA,
361 .pio_mask = 0x1f,
362 .mwdma_mask = 0x07,
363 .udma_mask = 0x7f,
364 .port_ops = &k2_sata_ops,
365 },
366 /* board_svw8 */
367 {
368 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
369 ATA_FLAG_MMIO | K2_FLAG_NO_ATAPI_DMA |
370 K2_FLAG_SATA_8_PORTS,
371 .pio_mask = 0x1f,
372 .mwdma_mask = 0x07,
373 .udma_mask = 0x7f,
374 .port_ops = &k2_sata_ops,
375 },
376};
377
366static void k2_sata_setup_port(struct ata_ioports *port, void __iomem *base) 378static void k2_sata_setup_port(struct ata_ioports *port, void __iomem *base)
367{ 379{
368 port->cmd_addr = base + K2_SATA_TF_CMD_OFFSET; 380 port->cmd_addr = base + K2_SATA_TF_CMD_OFFSET;
@@ -386,17 +398,24 @@ static void k2_sata_setup_port(struct ata_ioports *port, void __iomem *base)
386static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 398static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
387{ 399{
388 static int printed_version; 400 static int printed_version;
389 struct device *dev = &pdev->dev; 401 const struct ata_port_info *ppi[] =
390 struct ata_probe_ent *probe_ent; 402 { &k2_port_info[ent->driver_data], NULL };
403 struct ata_host *host;
391 void __iomem *mmio_base; 404 void __iomem *mmio_base;
392 const struct k2_board_info *board_info = 405 int n_ports, i, rc;
393 &k2_board_info[ent->driver_data];
394 int rc;
395 int i;
396 406
397 if (!printed_version++) 407 if (!printed_version++)
398 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 408 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
399 409
410 /* allocate host */
411 n_ports = 4;
412 if (ppi[0]->flags & K2_FLAG_SATA_8_PORTS)
413 n_ports = 8;
414
415 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
416 if (!host)
417 return -ENOMEM;
418
400 /* 419 /*
401 * If this driver happens to only be useful on Apple's K2, then 420 * If this driver happens to only be useful on Apple's K2, then
402 * we should check that here as it has a normal Serverworks ID 421 * we should check that here as it has a normal Serverworks ID
@@ -404,6 +423,7 @@ static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
404 rc = pcim_enable_device(pdev); 423 rc = pcim_enable_device(pdev);
405 if (rc) 424 if (rc)
406 return rc; 425 return rc;
426
407 /* 427 /*
408 * Check if we have resources mapped at all (second function may 428 * Check if we have resources mapped at all (second function may
409 * have been disabled by firmware) 429 * have been disabled by firmware)
@@ -417,6 +437,15 @@ static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
417 pcim_pin_device(pdev); 437 pcim_pin_device(pdev);
418 if (rc) 438 if (rc)
419 return rc; 439 return rc;
440 host->iomap = pcim_iomap_table(pdev);
441 mmio_base = host->iomap[5];
442
443 /* different controllers have different number of ports - currently 4 or 8 */
444 /* All ports are on the same function. Multi-function device is no
445 * longer available. This should not be seen in any system. */
446 for (i = 0; i < host->n_ports; i++)
447 k2_sata_setup_port(&host->ports[i]->ioaddr,
448 mmio_base + i * K2_SATA_PORT_OFFSET);
420 449
421 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 450 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
422 if (rc) 451 if (rc)
@@ -425,38 +454,6 @@ static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
425 if (rc) 454 if (rc)
426 return rc; 455 return rc;
427 456
428 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
429 if (probe_ent == NULL)
430 return -ENOMEM;
431
432 probe_ent->dev = pci_dev_to_dev(pdev);
433 INIT_LIST_HEAD(&probe_ent->node);
434
435 probe_ent->sht = &k2_sata_sht;
436 probe_ent->port_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
437 ATA_FLAG_MMIO | board_info->port_flags;
438 probe_ent->port_ops = &k2_sata_ops;
439 probe_ent->n_ports = 4;
440 probe_ent->irq = pdev->irq;
441 probe_ent->irq_flags = IRQF_SHARED;
442 probe_ent->iomap = pcim_iomap_table(pdev);
443
444 /* We don't care much about the PIO/UDMA masks, but the core won't like us
445 * if we don't fill these
446 */
447 probe_ent->pio_mask = 0x1f;
448 probe_ent->mwdma_mask = 0x7;
449 probe_ent->udma_mask = 0x7f;
450
451 mmio_base = probe_ent->iomap[5];
452
453 /* different controllers have different number of ports - currently 4 or 8 */
454 /* All ports are on the same function. Multi-function device is no
455 * longer available. This should not be seen in any system. */
456 for (i = 0; i < board_info->n_ports; i++)
457 k2_sata_setup_port(&probe_ent->port[i],
458 mmio_base + i * K2_SATA_PORT_OFFSET);
459
460 /* Clear a magic bit in SCR1 according to Darwin, those help 457 /* Clear a magic bit in SCR1 according to Darwin, those help
461 * some funky seagate drives (though so far, those were already 458 * some funky seagate drives (though so far, those were already
462 * set by the firmware on the machines I had access to) 459 * set by the firmware on the machines I had access to)
@@ -469,12 +466,8 @@ static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
469 writel(0x0, mmio_base + K2_SATA_SIM_OFFSET); 466 writel(0x0, mmio_base + K2_SATA_SIM_OFFSET);
470 467
471 pci_set_master(pdev); 468 pci_set_master(pdev);
472 469 return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
473 if (!ata_device_add(probe_ent)) 470 &k2_sata_sht);
474 return -ENODEV;
475
476 devm_kfree(dev, probe_ent);
477 return 0;
478} 471}
479 472
480/* 0x240 is device ID for Apple K2 device 473/* 0x240 is device ID for Apple K2 device
diff --git a/drivers/ata/sata_sx4.c b/drivers/ata/sata_sx4.c
index 1a081c3a8c06..3a4f44559d0a 100644
--- a/drivers/ata/sata_sx4.c
+++ b/drivers/ata/sata_sx4.c
@@ -151,24 +151,23 @@ struct pdc_host_priv {
151 151
152 152
153static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 153static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
154static irqreturn_t pdc20621_interrupt (int irq, void *dev_instance);
155static void pdc_eng_timeout(struct ata_port *ap); 154static void pdc_eng_timeout(struct ata_port *ap);
156static void pdc_20621_phy_reset (struct ata_port *ap); 155static void pdc_20621_phy_reset (struct ata_port *ap);
157static int pdc_port_start(struct ata_port *ap); 156static int pdc_port_start(struct ata_port *ap);
158static void pdc20621_qc_prep(struct ata_queued_cmd *qc); 157static void pdc20621_qc_prep(struct ata_queued_cmd *qc);
159static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); 158static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
160static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf); 159static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
161static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe); 160static unsigned int pdc20621_dimm_init(struct ata_host *host);
162static int pdc20621_detect_dimm(struct ata_probe_ent *pe); 161static int pdc20621_detect_dimm(struct ata_host *host);
163static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, 162static unsigned int pdc20621_i2c_read(struct ata_host *host,
164 u32 device, u32 subaddr, u32 *pdata); 163 u32 device, u32 subaddr, u32 *pdata);
165static int pdc20621_prog_dimm0(struct ata_probe_ent *pe); 164static int pdc20621_prog_dimm0(struct ata_host *host);
166static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe); 165static unsigned int pdc20621_prog_dimm_global(struct ata_host *host);
167#ifdef ATA_VERBOSE_DEBUG 166#ifdef ATA_VERBOSE_DEBUG
168static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, 167static void pdc20621_get_from_dimm(struct ata_host *host,
169 void *psource, u32 offset, u32 size); 168 void *psource, u32 offset, u32 size);
170#endif 169#endif
171static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, 170static void pdc20621_put_to_dimm(struct ata_host *host,
172 void *psource, u32 offset, u32 size); 171 void *psource, u32 offset, u32 size);
173static void pdc20621_irq_clear(struct ata_port *ap); 172static void pdc20621_irq_clear(struct ata_port *ap);
174static unsigned int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc); 173static unsigned int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc);
@@ -204,7 +203,6 @@ static const struct ata_port_operations pdc_20621_ops = {
204 .qc_issue = pdc20621_qc_issue_prot, 203 .qc_issue = pdc20621_qc_issue_prot,
205 .data_xfer = ata_data_xfer, 204 .data_xfer = ata_data_xfer,
206 .eng_timeout = pdc_eng_timeout, 205 .eng_timeout = pdc_eng_timeout,
207 .irq_handler = pdc20621_interrupt,
208 .irq_clear = pdc20621_irq_clear, 206 .irq_clear = pdc20621_irq_clear,
209 .irq_on = ata_irq_on, 207 .irq_on = ata_irq_on,
210 .irq_ack = ata_irq_ack, 208 .irq_ack = ata_irq_ack,
@@ -214,7 +212,6 @@ static const struct ata_port_operations pdc_20621_ops = {
214static const struct ata_port_info pdc_port_info[] = { 212static const struct ata_port_info pdc_port_info[] = {
215 /* board_20621 */ 213 /* board_20621 */
216 { 214 {
217 .sht = &pdc_sata_sht,
218 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 215 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
219 ATA_FLAG_SRST | ATA_FLAG_MMIO | 216 ATA_FLAG_SRST | ATA_FLAG_MMIO |
220 ATA_FLAG_NO_ATAPI | ATA_FLAG_PIO_POLLING, 217 ATA_FLAG_NO_ATAPI | ATA_FLAG_PIO_POLLING,
@@ -882,15 +879,15 @@ static void pdc_sata_setup_port(struct ata_ioports *port, void __iomem *base)
882 879
883 880
884#ifdef ATA_VERBOSE_DEBUG 881#ifdef ATA_VERBOSE_DEBUG
885static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, 882static void pdc20621_get_from_dimm(struct ata_host *host, void *psource,
886 u32 offset, u32 size) 883 u32 offset, u32 size)
887{ 884{
888 u32 window_size; 885 u32 window_size;
889 u16 idx; 886 u16 idx;
890 u8 page_mask; 887 u8 page_mask;
891 long dist; 888 long dist;
892 void __iomem *mmio = pe->iomap[PDC_MMIO_BAR]; 889 void __iomem *mmio = host->iomap[PDC_MMIO_BAR];
893 void __iomem *dimm_mmio = pe->iomap[PDC_DIMM_BAR]; 890 void __iomem *dimm_mmio = host->iomap[PDC_DIMM_BAR];
894 891
895 /* hard-code chip #0 */ 892 /* hard-code chip #0 */
896 mmio += PDC_CHIP0_OFS; 893 mmio += PDC_CHIP0_OFS;
@@ -937,15 +934,15 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource,
937#endif 934#endif
938 935
939 936
940static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, 937static void pdc20621_put_to_dimm(struct ata_host *host, void *psource,
941 u32 offset, u32 size) 938 u32 offset, u32 size)
942{ 939{
943 u32 window_size; 940 u32 window_size;
944 u16 idx; 941 u16 idx;
945 u8 page_mask; 942 u8 page_mask;
946 long dist; 943 long dist;
947 void __iomem *mmio = pe->iomap[PDC_MMIO_BAR]; 944 void __iomem *mmio = host->iomap[PDC_MMIO_BAR];
948 void __iomem *dimm_mmio = pe->iomap[PDC_DIMM_BAR]; 945 void __iomem *dimm_mmio = host->iomap[PDC_DIMM_BAR];
949 946
950 /* hard-code chip #0 */ 947 /* hard-code chip #0 */
951 mmio += PDC_CHIP0_OFS; 948 mmio += PDC_CHIP0_OFS;
@@ -987,10 +984,10 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource,
987} 984}
988 985
989 986
990static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, 987static unsigned int pdc20621_i2c_read(struct ata_host *host, u32 device,
991 u32 subaddr, u32 *pdata) 988 u32 subaddr, u32 *pdata)
992{ 989{
993 void __iomem *mmio = pe->iomap[PDC_MMIO_BAR]; 990 void __iomem *mmio = host->iomap[PDC_MMIO_BAR];
994 u32 i2creg = 0; 991 u32 i2creg = 0;
995 u32 status; 992 u32 status;
996 u32 count =0; 993 u32 count =0;
@@ -1023,17 +1020,17 @@ static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device,
1023} 1020}
1024 1021
1025 1022
1026static int pdc20621_detect_dimm(struct ata_probe_ent *pe) 1023static int pdc20621_detect_dimm(struct ata_host *host)
1027{ 1024{
1028 u32 data=0 ; 1025 u32 data=0 ;
1029 if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 1026 if (pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
1030 PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { 1027 PDC_DIMM_SPD_SYSTEM_FREQ, &data)) {
1031 if (data == 100) 1028 if (data == 100)
1032 return 100; 1029 return 100;
1033 } else 1030 } else
1034 return 0; 1031 return 0;
1035 1032
1036 if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { 1033 if (pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) {
1037 if(data <= 0x75) 1034 if(data <= 0x75)
1038 return 133; 1035 return 133;
1039 } else 1036 } else
@@ -1043,13 +1040,13 @@ static int pdc20621_detect_dimm(struct ata_probe_ent *pe)
1043} 1040}
1044 1041
1045 1042
1046static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) 1043static int pdc20621_prog_dimm0(struct ata_host *host)
1047{ 1044{
1048 u32 spd0[50]; 1045 u32 spd0[50];
1049 u32 data = 0; 1046 u32 data = 0;
1050 int size, i; 1047 int size, i;
1051 u8 bdimmsize; 1048 u8 bdimmsize;
1052 void __iomem *mmio = pe->iomap[PDC_MMIO_BAR]; 1049 void __iomem *mmio = host->iomap[PDC_MMIO_BAR];
1053 static const struct { 1050 static const struct {
1054 unsigned int reg; 1051 unsigned int reg;
1055 unsigned int ofs; 1052 unsigned int ofs;
@@ -1072,7 +1069,7 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe)
1072 mmio += PDC_CHIP0_OFS; 1069 mmio += PDC_CHIP0_OFS;
1073 1070
1074 for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++) 1071 for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++)
1075 pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 1072 pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
1076 pdc_i2c_read_data[i].reg, 1073 pdc_i2c_read_data[i].reg,
1077 &spd0[pdc_i2c_read_data[i].ofs]); 1074 &spd0[pdc_i2c_read_data[i].ofs]);
1078 1075
@@ -1108,11 +1105,11 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe)
1108} 1105}
1109 1106
1110 1107
1111static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe) 1108static unsigned int pdc20621_prog_dimm_global(struct ata_host *host)
1112{ 1109{
1113 u32 data, spd0; 1110 u32 data, spd0;
1114 int error, i; 1111 int error, i;
1115 void __iomem *mmio = pe->iomap[PDC_MMIO_BAR]; 1112 void __iomem *mmio = host->iomap[PDC_MMIO_BAR];
1116 1113
1117 /* hard-code chip #0 */ 1114 /* hard-code chip #0 */
1118 mmio += PDC_CHIP0_OFS; 1115 mmio += PDC_CHIP0_OFS;
@@ -1129,7 +1126,7 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe)
1129 readl(mmio + PDC_SDRAM_CONTROL_OFFSET); 1126 readl(mmio + PDC_SDRAM_CONTROL_OFFSET);
1130 1127
1131 /* Turn on for ECC */ 1128 /* Turn on for ECC */
1132 pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 1129 pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
1133 PDC_DIMM_SPD_TYPE, &spd0); 1130 PDC_DIMM_SPD_TYPE, &spd0);
1134 if (spd0 == 0x02) { 1131 if (spd0 == 0x02) {
1135 data |= (0x01 << 16); 1132 data |= (0x01 << 16);
@@ -1156,7 +1153,7 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe)
1156} 1153}
1157 1154
1158 1155
1159static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) 1156static unsigned int pdc20621_dimm_init(struct ata_host *host)
1160{ 1157{
1161 int speed, size, length; 1158 int speed, size, length;
1162 u32 addr,spd0,pci_status; 1159 u32 addr,spd0,pci_status;
@@ -1166,7 +1163,7 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
1166 u32 ticks=0; 1163 u32 ticks=0;
1167 u32 clock=0; 1164 u32 clock=0;
1168 u32 fparam=0; 1165 u32 fparam=0;
1169 void __iomem *mmio = pe->iomap[PDC_MMIO_BAR]; 1166 void __iomem *mmio = host->iomap[PDC_MMIO_BAR];
1170 1167
1171 /* hard-code chip #0 */ 1168 /* hard-code chip #0 */
1172 mmio += PDC_CHIP0_OFS; 1169 mmio += PDC_CHIP0_OFS;
@@ -1225,18 +1222,18 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
1225 Read SPD of DIMM by I2C interface, 1222 Read SPD of DIMM by I2C interface,
1226 and program the DIMM Module Controller. 1223 and program the DIMM Module Controller.
1227 */ 1224 */
1228 if (!(speed = pdc20621_detect_dimm(pe))) { 1225 if (!(speed = pdc20621_detect_dimm(host))) {
1229 printk(KERN_ERR "Detect Local DIMM Fail\n"); 1226 printk(KERN_ERR "Detect Local DIMM Fail\n");
1230 return 1; /* DIMM error */ 1227 return 1; /* DIMM error */
1231 } 1228 }
1232 VPRINTK("Local DIMM Speed = %d\n", speed); 1229 VPRINTK("Local DIMM Speed = %d\n", speed);
1233 1230
1234 /* Programming DIMM0 Module Control Register (index_CID0:80h) */ 1231 /* Programming DIMM0 Module Control Register (index_CID0:80h) */
1235 size = pdc20621_prog_dimm0(pe); 1232 size = pdc20621_prog_dimm0(host);
1236 VPRINTK("Local DIMM Size = %dMB\n",size); 1233 VPRINTK("Local DIMM Size = %dMB\n",size);
1237 1234
1238 /* Programming DIMM Module Global Control Register (index_CID0:88h) */ 1235 /* Programming DIMM Module Global Control Register (index_CID0:88h) */
1239 if (pdc20621_prog_dimm_global(pe)) { 1236 if (pdc20621_prog_dimm_global(host)) {
1240 printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); 1237 printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n");
1241 return 1; 1238 return 1;
1242 } 1239 }
@@ -1249,20 +1246,20 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
1249 '9','8','0','3','1','6','1','2',0,0}; 1246 '9','8','0','3','1','6','1','2',0,0};
1250 u8 test_parttern2[40] = {0}; 1247 u8 test_parttern2[40] = {0};
1251 1248
1252 pdc20621_put_to_dimm(pe, (void *) test_parttern2, 0x10040, 40); 1249 pdc20621_put_to_dimm(host, (void *) test_parttern2, 0x10040, 40);
1253 pdc20621_put_to_dimm(pe, (void *) test_parttern2, 0x40, 40); 1250 pdc20621_put_to_dimm(host, (void *) test_parttern2, 0x40, 40);
1254 1251
1255 pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x10040, 40); 1252 pdc20621_put_to_dimm(host, (void *) test_parttern1, 0x10040, 40);
1256 pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); 1253 pdc20621_get_from_dimm(host, (void *) test_parttern2, 0x40, 40);
1257 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], 1254 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0],
1258 test_parttern2[1], &(test_parttern2[2])); 1255 test_parttern2[1], &(test_parttern2[2]));
1259 pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040, 1256 pdc20621_get_from_dimm(host, (void *) test_parttern2, 0x10040,
1260 40); 1257 40);
1261 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], 1258 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0],
1262 test_parttern2[1], &(test_parttern2[2])); 1259 test_parttern2[1], &(test_parttern2[2]));
1263 1260
1264 pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x40, 40); 1261 pdc20621_put_to_dimm(host, (void *) test_parttern1, 0x40, 40);
1265 pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); 1262 pdc20621_get_from_dimm(host, (void *) test_parttern2, 0x40, 40);
1266 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], 1263 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0],
1267 test_parttern2[1], &(test_parttern2[2])); 1264 test_parttern2[1], &(test_parttern2[2]));
1268 } 1265 }
@@ -1270,14 +1267,14 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
1270 1267
1271 /* ECC initiliazation. */ 1268 /* ECC initiliazation. */
1272 1269
1273 pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 1270 pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
1274 PDC_DIMM_SPD_TYPE, &spd0); 1271 PDC_DIMM_SPD_TYPE, &spd0);
1275 if (spd0 == 0x02) { 1272 if (spd0 == 0x02) {
1276 VPRINTK("Start ECC initialization\n"); 1273 VPRINTK("Start ECC initialization\n");
1277 addr = 0; 1274 addr = 0;
1278 length = size * 1024 * 1024; 1275 length = size * 1024 * 1024;
1279 while (addr < length) { 1276 while (addr < length) {
1280 pdc20621_put_to_dimm(pe, (void *) &tmp, addr, 1277 pdc20621_put_to_dimm(host, (void *) &tmp, addr,
1281 sizeof(u32)); 1278 sizeof(u32));
1282 addr += sizeof(u32); 1279 addr += sizeof(u32);
1283 } 1280 }
@@ -1287,10 +1284,10 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
1287} 1284}
1288 1285
1289 1286
1290static void pdc_20621_init(struct ata_probe_ent *pe) 1287static void pdc_20621_init(struct ata_host *host)
1291{ 1288{
1292 u32 tmp; 1289 u32 tmp;
1293 void __iomem *mmio = pe->iomap[PDC_MMIO_BAR]; 1290 void __iomem *mmio = host->iomap[PDC_MMIO_BAR];
1294 1291
1295 /* hard-code chip #0 */ 1292 /* hard-code chip #0 */
1296 mmio += PDC_CHIP0_OFS; 1293 mmio += PDC_CHIP0_OFS;
@@ -1321,15 +1318,25 @@ static void pdc_20621_init(struct ata_probe_ent *pe)
1321static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 1318static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1322{ 1319{
1323 static int printed_version; 1320 static int printed_version;
1324 struct ata_probe_ent *probe_ent; 1321 const struct ata_port_info *ppi[] =
1322 { &pdc_port_info[ent->driver_data], NULL };
1323 struct ata_host *host;
1325 void __iomem *base; 1324 void __iomem *base;
1326 struct pdc_host_priv *hpriv; 1325 struct pdc_host_priv *hpriv;
1327 unsigned int board_idx = (unsigned int) ent->driver_data;
1328 int rc; 1326 int rc;
1329 1327
1330 if (!printed_version++) 1328 if (!printed_version++)
1331 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 1329 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
1332 1330
1331 /* allocate host */
1332 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 4);
1333 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
1334 if (!host || !hpriv)
1335 return -ENOMEM;
1336
1337 host->private_data = hpriv;
1338
1339 /* acquire resources and fill host */
1333 rc = pcim_enable_device(pdev); 1340 rc = pcim_enable_device(pdev);
1334 if (rc) 1341 if (rc)
1335 return rc; 1342 return rc;
@@ -1340,7 +1347,15 @@ static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *
1340 pcim_pin_device(pdev); 1347 pcim_pin_device(pdev);
1341 if (rc) 1348 if (rc)
1342 return rc; 1349 return rc;
1350 host->iomap = pcim_iomap_table(pdev);
1351
1352 base = host->iomap[PDC_MMIO_BAR] + PDC_CHIP0_OFS;
1353 pdc_sata_setup_port(&host->ports[0]->ioaddr, base + 0x200);
1354 pdc_sata_setup_port(&host->ports[1]->ioaddr, base + 0x280);
1355 pdc_sata_setup_port(&host->ports[2]->ioaddr, base + 0x300);
1356 pdc_sata_setup_port(&host->ports[3]->ioaddr, base + 0x380);
1343 1357
1358 /* configure and activate */
1344 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); 1359 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
1345 if (rc) 1360 if (rc)
1346 return rc; 1361 return rc;
@@ -1348,50 +1363,13 @@ static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *
1348 if (rc) 1363 if (rc)
1349 return rc; 1364 return rc;
1350 1365
1351 probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL); 1366 if (pdc20621_dimm_init(host))
1352 if (probe_ent == NULL)
1353 return -ENOMEM; 1367 return -ENOMEM;
1354 1368 pdc_20621_init(host);
1355 probe_ent->dev = pci_dev_to_dev(pdev);
1356 INIT_LIST_HEAD(&probe_ent->node);
1357
1358 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
1359 if (!hpriv)
1360 return -ENOMEM;
1361
1362 probe_ent->sht = pdc_port_info[board_idx].sht;
1363 probe_ent->port_flags = pdc_port_info[board_idx].flags;
1364 probe_ent->pio_mask = pdc_port_info[board_idx].pio_mask;
1365 probe_ent->mwdma_mask = pdc_port_info[board_idx].mwdma_mask;
1366 probe_ent->udma_mask = pdc_port_info[board_idx].udma_mask;
1367 probe_ent->port_ops = pdc_port_info[board_idx].port_ops;
1368
1369 probe_ent->irq = pdev->irq;
1370 probe_ent->irq_flags = IRQF_SHARED;
1371 probe_ent->iomap = pcim_iomap_table(pdev);
1372
1373 probe_ent->private_data = hpriv;
1374 base = probe_ent->iomap[PDC_MMIO_BAR] + PDC_CHIP0_OFS;
1375
1376 probe_ent->n_ports = 4;
1377 pdc_sata_setup_port(&probe_ent->port[0], base + 0x200);
1378 pdc_sata_setup_port(&probe_ent->port[1], base + 0x280);
1379 pdc_sata_setup_port(&probe_ent->port[2], base + 0x300);
1380 pdc_sata_setup_port(&probe_ent->port[3], base + 0x380);
1381 1369
1382 pci_set_master(pdev); 1370 pci_set_master(pdev);
1383 1371 return ata_host_activate(host, pdev->irq, pdc20621_interrupt,
1384 /* initialize adapter */ 1372 IRQF_SHARED, &pdc_sata_sht);
1385 /* initialize local dimm */
1386 if (pdc20621_dimm_init(probe_ent))
1387 return -ENOMEM;
1388 pdc_20621_init(probe_ent);
1389
1390 if (!ata_device_add(probe_ent))
1391 return -ENODEV;
1392
1393 devm_kfree(&pdev->dev, probe_ent);
1394 return 0;
1395} 1373}
1396 1374
1397 1375
diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c
index d659ace80f4f..f74e383de083 100644
--- a/drivers/ata/sata_uli.c
+++ b/drivers/ata/sata_uli.c
@@ -115,7 +115,6 @@ static const struct ata_port_operations uli_ops = {
115 .error_handler = ata_bmdma_error_handler, 115 .error_handler = ata_bmdma_error_handler,
116 .post_internal_cmd = ata_bmdma_post_internal_cmd, 116 .post_internal_cmd = ata_bmdma_post_internal_cmd,
117 117
118 .irq_handler = ata_interrupt,
119 .irq_clear = ata_bmdma_irq_clear, 118 .irq_clear = ata_bmdma_irq_clear,
120 .irq_on = ata_irq_on, 119 .irq_on = ata_irq_on,
121 .irq_ack = ata_irq_ack, 120 .irq_ack = ata_irq_ack,
@@ -127,7 +126,6 @@ static const struct ata_port_operations uli_ops = {
127}; 126};
128 127
129static struct ata_port_info uli_port_info = { 128static struct ata_port_info uli_port_info = {
130 .sht = &uli_sht,
131 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 129 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
132 ATA_FLAG_IGN_SIMPLEX, 130 ATA_FLAG_IGN_SIMPLEX,
133 .pio_mask = 0x1f, /* pio0-4 */ 131 .pio_mask = 0x1f, /* pio0-4 */
@@ -185,12 +183,13 @@ static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
185static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 183static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
186{ 184{
187 static int printed_version; 185 static int printed_version;
188 struct ata_probe_ent *probe_ent; 186 const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
189 struct ata_port_info *ppi[2];
190 int rc;
191 unsigned int board_idx = (unsigned int) ent->driver_data; 187 unsigned int board_idx = (unsigned int) ent->driver_data;
188 struct ata_host *host;
192 struct uli_priv *hpriv; 189 struct uli_priv *hpriv;
193 void __iomem * const *iomap; 190 void __iomem * const *iomap;
191 struct ata_ioports *ioaddr;
192 int n_ports, rc;
194 193
195 if (!printed_version++) 194 if (!printed_version++)
196 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); 195 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
@@ -199,54 +198,42 @@ static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
199 if (rc) 198 if (rc)
200 return rc; 199 return rc;
201 200
202 rc = pci_request_regions(pdev, DRV_NAME); 201 n_ports = 2;
203 if (rc) { 202 if (board_idx == uli_5287)
204 pcim_pin_device(pdev); 203 n_ports = 4;
205 return rc; 204 rc = ata_pci_prepare_native_host(pdev, ppi, n_ports, &host);
206 }
207
208 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
209 if (rc)
210 return rc;
211 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
212 if (rc) 205 if (rc)
213 return rc; 206 return rc;
214 207
215 ppi[0] = ppi[1] = &uli_port_info;
216 probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
217 if (!probe_ent)
218 return -ENOMEM;
219
220 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); 208 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
221 if (!hpriv) 209 if (!hpriv)
222 return -ENOMEM; 210 return -ENOMEM;
211 host->private_data = hpriv;
223 212
224 probe_ent->private_data = hpriv; 213 iomap = host->iomap;
225
226 iomap = pcim_iomap_table(pdev);
227 214
228 switch (board_idx) { 215 switch (board_idx) {
229 case uli_5287: 216 case uli_5287:
230 hpriv->scr_cfg_addr[0] = ULI5287_BASE; 217 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
231 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS; 218 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
232 probe_ent->n_ports = 4;
233 219
234 probe_ent->port[2].cmd_addr = iomap[0] + 8; 220 ioaddr = &host->ports[2]->ioaddr;
235 probe_ent->port[2].altstatus_addr = 221 ioaddr->cmd_addr = iomap[0] + 8;
236 probe_ent->port[2].ctl_addr = (void __iomem *) 222 ioaddr->altstatus_addr =
223 ioaddr->ctl_addr = (void __iomem *)
237 ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4; 224 ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
238 probe_ent->port[2].bmdma_addr = iomap[4] + 16; 225 ioaddr->bmdma_addr = iomap[4] + 16;
239 hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4; 226 hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
227 ata_std_ports(ioaddr);
240 228
241 probe_ent->port[3].cmd_addr = iomap[2] + 8; 229 ioaddr = &host->ports[3]->ioaddr;
242 probe_ent->port[3].altstatus_addr = 230 ioaddr->cmd_addr = iomap[2] + 8;
243 probe_ent->port[3].ctl_addr = (void __iomem *) 231 ioaddr->altstatus_addr =
232 ioaddr->ctl_addr = (void __iomem *)
244 ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4; 233 ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
245 probe_ent->port[3].bmdma_addr = iomap[4] + 24; 234 ioaddr->bmdma_addr = iomap[4] + 24;
246 hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5; 235 hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
247 236 ata_std_ports(ioaddr);
248 ata_std_ports(&probe_ent->port[2]);
249 ata_std_ports(&probe_ent->port[3]);
250 break; 237 break;
251 238
252 case uli_5289: 239 case uli_5289:
@@ -266,12 +253,8 @@ static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
266 253
267 pci_set_master(pdev); 254 pci_set_master(pdev);
268 pci_intx(pdev, 1); 255 pci_intx(pdev, 1);
269 256 return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
270 if (!ata_device_add(probe_ent)) 257 &uli_sht);
271 return -ENODEV;
272
273 devm_kfree(&pdev->dev, probe_ent);
274 return 0;
275} 258}
276 259
277static int __init uli_init(void) 260static int __init uli_init(void)
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index 598e6a26a481..1d855f55f5f7 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -64,8 +64,6 @@ enum {
64 PORT0 = (1 << 1), 64 PORT0 = (1 << 1),
65 PORT1 = (1 << 0), 65 PORT1 = (1 << 0),
66 ALL_PORTS = PORT0 | PORT1, 66 ALL_PORTS = PORT0 | PORT1,
67 PATA_PORT = 2, /* PATA is port 2 */
68 N_PORTS = 3,
69 67
70 NATIVE_MODE_ALL = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4), 68 NATIVE_MODE_ALL = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4),
71 69
@@ -78,11 +76,9 @@ static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg);
78static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 76static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
79static void svia_noop_freeze(struct ata_port *ap); 77static void svia_noop_freeze(struct ata_port *ap);
80static void vt6420_error_handler(struct ata_port *ap); 78static void vt6420_error_handler(struct ata_port *ap);
81static void vt6421_sata_error_handler(struct ata_port *ap); 79static int vt6421_pata_cable_detect(struct ata_port *ap);
82static void vt6421_pata_error_handler(struct ata_port *ap);
83static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev); 80static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev);
84static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev); 81static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev);
85static int vt6421_port_start(struct ata_port *ap);
86 82
87static const struct pci_device_id svia_pci_tbl[] = { 83static const struct pci_device_id svia_pci_tbl[] = {
88 { PCI_VDEVICE(VIA, 0x5337), vt6420 }, 84 { PCI_VDEVICE(VIA, 0x5337), vt6420 },
@@ -141,7 +137,6 @@ static const struct ata_port_operations vt6420_sata_ops = {
141 .error_handler = vt6420_error_handler, 137 .error_handler = vt6420_error_handler,
142 .post_internal_cmd = ata_bmdma_post_internal_cmd, 138 .post_internal_cmd = ata_bmdma_post_internal_cmd,
143 139
144 .irq_handler = ata_interrupt,
145 .irq_clear = ata_bmdma_irq_clear, 140 .irq_clear = ata_bmdma_irq_clear,
146 .irq_on = ata_irq_on, 141 .irq_on = ata_irq_on,
147 .irq_ack = ata_irq_ack, 142 .irq_ack = ata_irq_ack,
@@ -172,15 +167,15 @@ static const struct ata_port_operations vt6421_pata_ops = {
172 167
173 .freeze = ata_bmdma_freeze, 168 .freeze = ata_bmdma_freeze,
174 .thaw = ata_bmdma_thaw, 169 .thaw = ata_bmdma_thaw,
175 .error_handler = vt6421_pata_error_handler, 170 .error_handler = ata_bmdma_error_handler,
176 .post_internal_cmd = ata_bmdma_post_internal_cmd, 171 .post_internal_cmd = ata_bmdma_post_internal_cmd,
172 .cable_detect = vt6421_pata_cable_detect,
177 173
178 .irq_handler = ata_interrupt,
179 .irq_clear = ata_bmdma_irq_clear, 174 .irq_clear = ata_bmdma_irq_clear,
180 .irq_on = ata_irq_on, 175 .irq_on = ata_irq_on,
181 .irq_ack = ata_irq_ack, 176 .irq_ack = ata_irq_ack,
182 177
183 .port_start = vt6421_port_start, 178 .port_start = ata_port_start,
184}; 179};
185 180
186static const struct ata_port_operations vt6421_sata_ops = { 181static const struct ata_port_operations vt6421_sata_ops = {
@@ -203,10 +198,10 @@ static const struct ata_port_operations vt6421_sata_ops = {
203 198
204 .freeze = ata_bmdma_freeze, 199 .freeze = ata_bmdma_freeze,
205 .thaw = ata_bmdma_thaw, 200 .thaw = ata_bmdma_thaw,
206 .error_handler = vt6421_sata_error_handler, 201 .error_handler = ata_bmdma_error_handler,
207 .post_internal_cmd = ata_bmdma_post_internal_cmd, 202 .post_internal_cmd = ata_bmdma_post_internal_cmd,
203 .cable_detect = ata_cable_sata,
208 204
209 .irq_handler = ata_interrupt,
210 .irq_clear = ata_bmdma_irq_clear, 205 .irq_clear = ata_bmdma_irq_clear,
211 .irq_on = ata_irq_on, 206 .irq_on = ata_irq_on,
212 .irq_ack = ata_irq_ack, 207 .irq_ack = ata_irq_ack,
@@ -214,11 +209,10 @@ static const struct ata_port_operations vt6421_sata_ops = {
214 .scr_read = svia_scr_read, 209 .scr_read = svia_scr_read,
215 .scr_write = svia_scr_write, 210 .scr_write = svia_scr_write,
216 211
217 .port_start = vt6421_port_start, 212 .port_start = ata_port_start,
218}; 213};
219 214
220static struct ata_port_info vt6420_port_info = { 215static const struct ata_port_info vt6420_port_info = {
221 .sht = &svia_sht,
222 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, 216 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
223 .pio_mask = 0x1f, 217 .pio_mask = 0x1f,
224 .mwdma_mask = 0x07, 218 .mwdma_mask = 0x07,
@@ -226,6 +220,22 @@ static struct ata_port_info vt6420_port_info = {
226 .port_ops = &vt6420_sata_ops, 220 .port_ops = &vt6420_sata_ops,
227}; 221};
228 222
223static struct ata_port_info vt6421_sport_info = {
224 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
225 .pio_mask = 0x1f,
226 .mwdma_mask = 0x07,
227 .udma_mask = 0x7f,
228 .port_ops = &vt6421_sata_ops,
229};
230
231static struct ata_port_info vt6421_pport_info = {
232 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_LEGACY,
233 .pio_mask = 0x1f,
234 .mwdma_mask = 0,
235 .udma_mask = 0x7f,
236 .port_ops = &vt6421_pata_ops,
237};
238
229MODULE_AUTHOR("Jeff Garzik"); 239MODULE_AUTHOR("Jeff Garzik");
230MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers"); 240MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers");
231MODULE_LICENSE("GPL"); 241MODULE_LICENSE("GPL");
@@ -330,35 +340,15 @@ static void vt6420_error_handler(struct ata_port *ap)
330 NULL, ata_std_postreset); 340 NULL, ata_std_postreset);
331} 341}
332 342
333static int vt6421_pata_prereset(struct ata_port *ap) 343static int vt6421_pata_cable_detect(struct ata_port *ap)
334{ 344{
335 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 345 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
336 u8 tmp; 346 u8 tmp;
337 347
338 pci_read_config_byte(pdev, PATA_UDMA_TIMING, &tmp); 348 pci_read_config_byte(pdev, PATA_UDMA_TIMING, &tmp);
339 if (tmp & 0x10) 349 if (tmp & 0x10)
340 ap->cbl = ATA_CBL_PATA40; 350 return ATA_CBL_PATA40;
341 else 351 return ATA_CBL_PATA80;
342 ap->cbl = ATA_CBL_PATA80;
343 return 0;
344}
345
346static void vt6421_pata_error_handler(struct ata_port *ap)
347{
348 return ata_bmdma_drive_eh(ap, vt6421_pata_prereset, ata_std_softreset,
349 NULL, ata_std_postreset);
350}
351
352static int vt6421_sata_prereset(struct ata_port *ap)
353{
354 ap->cbl = ATA_CBL_SATA;
355 return 0;
356}
357
358static void vt6421_sata_error_handler(struct ata_port *ap)
359{
360 return ata_bmdma_drive_eh(ap, vt6421_sata_prereset, ata_std_softreset,
361 NULL, ata_std_postreset);
362} 352}
363 353
364static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev) 354static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
@@ -375,16 +365,6 @@ static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
375 pci_write_config_byte(pdev, PATA_UDMA_TIMING, udma_bits[adev->pio_mode - XFER_UDMA_0]); 365 pci_write_config_byte(pdev, PATA_UDMA_TIMING, udma_bits[adev->pio_mode - XFER_UDMA_0]);
376} 366}
377 367
378static int vt6421_port_start(struct ata_port *ap)
379{
380 if (ap->port_no == PATA_PORT) {
381 ap->ops = &vt6421_pata_ops;
382 ap->mwdma_mask = 0;
383 ap->flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_LEGACY | ATA_FLAG_SRST;
384 }
385 return ata_port_start(ap);
386}
387
388static const unsigned int svia_bar_sizes[] = { 368static const unsigned int svia_bar_sizes[] = {
389 8, 4, 8, 4, 16, 256 369 8, 4, 8, 4, 16, 256
390}; 370};
@@ -403,79 +383,78 @@ static void __iomem * vt6421_scr_addr(void __iomem *addr, unsigned int port)
403 return addr + (port * 64); 383 return addr + (port * 64);
404} 384}
405 385
406static void vt6421_init_addrs(struct ata_probe_ent *probe_ent, 386static void vt6421_init_addrs(struct ata_port *ap)
407 void __iomem * const *iomap, unsigned int port)
408{ 387{
409 void __iomem *reg_addr = iomap[port]; 388 void __iomem * const * iomap = ap->host->iomap;
410 void __iomem *bmdma_addr = iomap[4] + (port * 8); 389 void __iomem *reg_addr = iomap[ap->port_no];
411 390 void __iomem *bmdma_addr = iomap[4] + (ap->port_no * 8);
412 probe_ent->port[port].cmd_addr = reg_addr; 391 struct ata_ioports *ioaddr = &ap->ioaddr;
413 probe_ent->port[port].altstatus_addr = 392
414 probe_ent->port[port].ctl_addr = (void __iomem *) 393 ioaddr->cmd_addr = reg_addr;
394 ioaddr->altstatus_addr =
395 ioaddr->ctl_addr = (void __iomem *)
415 ((unsigned long)(reg_addr + 8) | ATA_PCI_CTL_OFS); 396 ((unsigned long)(reg_addr + 8) | ATA_PCI_CTL_OFS);
416 probe_ent->port[port].bmdma_addr = bmdma_addr; 397 ioaddr->bmdma_addr = bmdma_addr;
417 probe_ent->port[port].scr_addr = vt6421_scr_addr(iomap[5], port); 398 ioaddr->scr_addr = vt6421_scr_addr(iomap[5], ap->port_no);
418 399
419 ata_std_ports(&probe_ent->port[port]); 400 ata_std_ports(ioaddr);
420} 401}
421 402
422static struct ata_probe_ent *vt6420_init_probe_ent(struct pci_dev *pdev) 403static int vt6420_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
423{ 404{
424 struct ata_probe_ent *probe_ent; 405 const struct ata_port_info *ppi[] = { &vt6420_port_info, NULL };
425 struct ata_port_info *ppi[2]; 406 struct ata_host *host;
426 void __iomem *bar5; 407 int rc;
427 408
428 ppi[0] = ppi[1] = &vt6420_port_info; 409 rc = ata_pci_prepare_native_host(pdev, ppi, 2, &host);
429 probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); 410 if (rc)
430 if (!probe_ent) 411 return rc;
431 return NULL; 412 *r_host = host;
432 413
433 bar5 = pcim_iomap(pdev, 5, 0); 414 rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME);
434 if (!bar5) { 415 if (rc) {
435 dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n"); 416 dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n");
436 return NULL; 417 return rc;
437 } 418 }
438 419
439 probe_ent->port[0].scr_addr = svia_scr_addr(bar5, 0); 420 host->ports[0]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 0);
440 probe_ent->port[1].scr_addr = svia_scr_addr(bar5, 1); 421 host->ports[1]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 1);
441 422
442 return probe_ent; 423 return 0;
443} 424}
444 425
445static struct ata_probe_ent *vt6421_init_probe_ent(struct pci_dev *pdev) 426static int vt6421_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
446{ 427{
447 struct ata_probe_ent *probe_ent; 428 const struct ata_port_info *ppi[] =
448 unsigned int i; 429 { &vt6421_sport_info, &vt6421_sport_info, &vt6421_pport_info };
430 struct ata_host *host;
431 int i, rc;
432
433 *r_host = host = ata_host_alloc_pinfo(&pdev->dev, ppi, ARRAY_SIZE(ppi));
434 if (!host) {
435 dev_printk(KERN_ERR, &pdev->dev, "failed to allocate host\n");
436 return -ENOMEM;
437 }
449 438
450 probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL); 439 rc = pcim_iomap_regions(pdev, 0x1f, DRV_NAME);
451 if (!probe_ent) 440 if (rc) {
452 return NULL; 441 dev_printk(KERN_ERR, &pdev->dev, "failed to request/iomap "
453 442 "PCI BARs (errno=%d)\n", rc);
454 memset(probe_ent, 0, sizeof(*probe_ent)); 443 return rc;
455 probe_ent->dev = pci_dev_to_dev(pdev); 444 }
456 INIT_LIST_HEAD(&probe_ent->node); 445 host->iomap = pcim_iomap_table(pdev);
457
458 probe_ent->sht = &svia_sht;
459 probe_ent->port_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY;
460 probe_ent->port_ops = &vt6421_sata_ops;
461 probe_ent->n_ports = N_PORTS;
462 probe_ent->irq = pdev->irq;
463 probe_ent->irq_flags = IRQF_SHARED;
464 probe_ent->pio_mask = 0x1f;
465 probe_ent->mwdma_mask = 0x07;
466 probe_ent->udma_mask = 0x7f;
467
468 for (i = 0; i < 6; i++)
469 if (!pcim_iomap(pdev, i, 0)) {
470 dev_printk(KERN_ERR, &pdev->dev,
471 "failed to iomap PCI BAR %d\n", i);
472 return NULL;
473 }
474 446
475 for (i = 0; i < N_PORTS; i++) 447 for (i = 0; i < host->n_ports; i++)
476 vt6421_init_addrs(probe_ent, pcim_iomap_table(pdev), i); 448 vt6421_init_addrs(host->ports[i]);
477 449
478 return probe_ent; 450 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
451 if (rc)
452 return rc;
453 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
454 if (rc)
455 return rc;
456
457 return 0;
479} 458}
480 459
481static void svia_configure(struct pci_dev *pdev) 460static void svia_configure(struct pci_dev *pdev)
@@ -522,7 +501,7 @@ static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
522 static int printed_version; 501 static int printed_version;
523 unsigned int i; 502 unsigned int i;
524 int rc; 503 int rc;
525 struct ata_probe_ent *probe_ent; 504 struct ata_host *host;
526 int board_id = (int) ent->driver_data; 505 int board_id = (int) ent->driver_data;
527 const int *bar_sizes; 506 const int *bar_sizes;
528 u8 tmp8; 507 u8 tmp8;
@@ -534,12 +513,6 @@ static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
534 if (rc) 513 if (rc)
535 return rc; 514 return rc;
536 515
537 rc = pci_request_regions(pdev, DRV_NAME);
538 if (rc) {
539 pcim_pin_device(pdev);
540 return rc;
541 }
542
543 if (board_id == vt6420) { 516 if (board_id == vt6420) {
544 pci_read_config_byte(pdev, SATA_PATA_SHARING, &tmp8); 517 pci_read_config_byte(pdev, SATA_PATA_SHARING, &tmp8);
545 if (tmp8 & SATA_2DEV) { 518 if (tmp8 & SATA_2DEV) {
@@ -565,32 +538,18 @@ static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
565 return -ENODEV; 538 return -ENODEV;
566 } 539 }
567 540
568 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
569 if (rc)
570 return rc;
571 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
572 if (rc)
573 return rc;
574
575 if (board_id == vt6420) 541 if (board_id == vt6420)
576 probe_ent = vt6420_init_probe_ent(pdev); 542 rc = vt6420_prepare_host(pdev, &host);
577 else 543 else
578 probe_ent = vt6421_init_probe_ent(pdev); 544 rc = vt6421_prepare_host(pdev, &host);
579 545 if (rc)
580 if (!probe_ent) { 546 return rc;
581 dev_printk(KERN_ERR, &pdev->dev, "out of memory\n");
582 return -ENOMEM;
583 }
584 547
585 svia_configure(pdev); 548 svia_configure(pdev);
586 549
587 pci_set_master(pdev); 550 pci_set_master(pdev);
588 551 return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
589 if (!ata_device_add(probe_ent)) 552 &svia_sht);
590 return -ENODEV;
591
592 devm_kfree(&pdev->dev, probe_ent);
593 return 0;
594} 553}
595 554
596static int __init svia_init(void) 555static int __init svia_init(void)
diff --git a/drivers/ata/sata_vsc.c b/drivers/ata/sata_vsc.c
index 170bad1b415b..80126f835d32 100644
--- a/drivers/ata/sata_vsc.c
+++ b/drivers/ata/sata_vsc.c
@@ -333,7 +333,6 @@ static const struct ata_port_operations vsc_sata_ops = {
333 .thaw = vsc_thaw, 333 .thaw = vsc_thaw,
334 .error_handler = ata_bmdma_error_handler, 334 .error_handler = ata_bmdma_error_handler,
335 .post_internal_cmd = ata_bmdma_post_internal_cmd, 335 .post_internal_cmd = ata_bmdma_post_internal_cmd,
336 .irq_handler = vsc_sata_interrupt,
337 .irq_clear = ata_bmdma_irq_clear, 336 .irq_clear = ata_bmdma_irq_clear,
338 .irq_on = ata_irq_on, 337 .irq_on = ata_irq_on,
339 .irq_ack = ata_irq_ack, 338 .irq_ack = ata_irq_ack,
@@ -367,30 +366,50 @@ static void __devinit vsc_sata_setup_port(struct ata_ioports *port,
367 366
368static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 367static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
369{ 368{
369 static const struct ata_port_info pi = {
370 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
371 ATA_FLAG_MMIO,
372 .pio_mask = 0x1f,
373 .mwdma_mask = 0x07,
374 .udma_mask = 0x7f,
375 .port_ops = &vsc_sata_ops,
376 };
377 const struct ata_port_info *ppi[] = { &pi, NULL };
370 static int printed_version; 378 static int printed_version;
371 struct ata_probe_ent *probe_ent; 379 struct ata_host *host;
372 void __iomem *mmio_base; 380 void __iomem *mmio_base;
373 int rc; 381 int i, rc;
374 u8 cls; 382 u8 cls;
375 383
376 if (!printed_version++) 384 if (!printed_version++)
377 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 385 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
378 386
387 /* allocate host */
388 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 4);
389 if (!host)
390 return -ENOMEM;
391
379 rc = pcim_enable_device(pdev); 392 rc = pcim_enable_device(pdev);
380 if (rc) 393 if (rc)
381 return rc; 394 return rc;
382 395
383 /* 396 /* check if we have needed resource mapped */
384 * Check if we have needed resource mapped.
385 */
386 if (pci_resource_len(pdev, 0) == 0) 397 if (pci_resource_len(pdev, 0) == 0)
387 return -ENODEV; 398 return -ENODEV;
388 399
400 /* map IO regions and intialize host accordingly */
389 rc = pcim_iomap_regions(pdev, 1 << VSC_MMIO_BAR, DRV_NAME); 401 rc = pcim_iomap_regions(pdev, 1 << VSC_MMIO_BAR, DRV_NAME);
390 if (rc == -EBUSY) 402 if (rc == -EBUSY)
391 pcim_pin_device(pdev); 403 pcim_pin_device(pdev);
392 if (rc) 404 if (rc)
393 return rc; 405 return rc;
406 host->iomap = pcim_iomap_table(pdev);
407
408 mmio_base = host->iomap[VSC_MMIO_BAR];
409
410 for (i = 0; i < host->n_ports; i++)
411 vsc_sata_setup_port(&host->ports[i]->ioaddr,
412 mmio_base + (i + 1) * VSC_SATA_PORT_OFFSET);
394 413
395 /* 414 /*
396 * Use 32 bit DMA mask, because 64 bit address support is poor. 415 * Use 32 bit DMA mask, because 64 bit address support is poor.
@@ -402,12 +421,6 @@ static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_d
402 if (rc) 421 if (rc)
403 return rc; 422 return rc;
404 423
405 probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL);
406 if (probe_ent == NULL)
407 return -ENOMEM;
408 probe_ent->dev = pci_dev_to_dev(pdev);
409 INIT_LIST_HEAD(&probe_ent->node);
410
411 /* 424 /*
412 * Due to a bug in the chip, the default cache line size can't be 425 * Due to a bug in the chip, the default cache line size can't be
413 * used (unless the default is non-zero). 426 * used (unless the default is non-zero).
@@ -418,33 +431,6 @@ static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_d
418 431
419 if (pci_enable_msi(pdev) == 0) 432 if (pci_enable_msi(pdev) == 0)
420 pci_intx(pdev, 0); 433 pci_intx(pdev, 0);
421 else
422 probe_ent->irq_flags = IRQF_SHARED;
423
424 probe_ent->sht = &vsc_sata_sht;
425 probe_ent->port_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
426 ATA_FLAG_MMIO;
427 probe_ent->port_ops = &vsc_sata_ops;
428 probe_ent->n_ports = 4;
429 probe_ent->irq = pdev->irq;
430 probe_ent->iomap = pcim_iomap_table(pdev);
431
432 /* We don't care much about the PIO/UDMA masks, but the core won't like us
433 * if we don't fill these
434 */
435 probe_ent->pio_mask = 0x1f;
436 probe_ent->mwdma_mask = 0x07;
437 probe_ent->udma_mask = 0x7f;
438
439 mmio_base = probe_ent->iomap[VSC_MMIO_BAR];
440
441 /* We have 4 ports per PCI function */
442 vsc_sata_setup_port(&probe_ent->port[0], mmio_base + 1 * VSC_SATA_PORT_OFFSET);
443 vsc_sata_setup_port(&probe_ent->port[1], mmio_base + 2 * VSC_SATA_PORT_OFFSET);
444 vsc_sata_setup_port(&probe_ent->port[2], mmio_base + 3 * VSC_SATA_PORT_OFFSET);
445 vsc_sata_setup_port(&probe_ent->port[3], mmio_base + 4 * VSC_SATA_PORT_OFFSET);
446
447 pci_set_master(pdev);
448 434
449 /* 435 /*
450 * Config offset 0x98 is "Extended Control and Status Register 0" 436 * Config offset 0x98 is "Extended Control and Status Register 0"
@@ -454,11 +440,9 @@ static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_d
454 */ 440 */
455 pci_write_config_dword(pdev, 0x98, 0); 441 pci_write_config_dword(pdev, 0x98, 0);
456 442
457 if (!ata_device_add(probe_ent)) 443 pci_set_master(pdev);
458 return -ENODEV; 444 return ata_host_activate(host, pdev->irq, vsc_sata_interrupt,
459 445 IRQF_SHARED, &vsc_sata_sht);
460 devm_kfree(&pdev->dev, probe_ent);
461 return 0;
462} 446}
463 447
464static const struct pci_device_id vsc_sata_pci_tbl[] = { 448static const struct pci_device_id vsc_sata_pci_tbl[] = {
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 65d6f23ead41..3411483240cd 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1303,119 +1303,6 @@ static void __init quirk_alder_ioapic(struct pci_dev *pdev)
1303DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic ); 1303DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic );
1304#endif 1304#endif
1305 1305
1306enum ide_combined_type { COMBINED = 0, IDE = 1, LIBATA = 2 };
1307/* Defaults to combined */
1308static enum ide_combined_type combined_mode;
1309
1310static int __init combined_setup(char *str)
1311{
1312 if (!strncmp(str, "ide", 3))
1313 combined_mode = IDE;
1314 else if (!strncmp(str, "libata", 6))
1315 combined_mode = LIBATA;
1316 else /* "combined" or anything else defaults to old behavior */
1317 combined_mode = COMBINED;
1318
1319 return 1;
1320}
1321__setup("combined_mode=", combined_setup);
1322
1323#ifdef CONFIG_SATA_INTEL_COMBINED
1324static void __devinit quirk_intel_ide_combined(struct pci_dev *pdev)
1325{
1326 u8 prog, comb, tmp;
1327 int ich = 0;
1328
1329 /*
1330 * Narrow down to Intel SATA PCI devices.
1331 */
1332 switch (pdev->device) {
1333 /* PCI ids taken from drivers/scsi/ata_piix.c */
1334 case 0x24d1:
1335 case 0x24df:
1336 case 0x25a3:
1337 case 0x25b0:
1338 ich = 5;
1339 break;
1340 case 0x2651:
1341 case 0x2652:
1342 case 0x2653:
1343 case 0x2680: /* ESB2 */
1344 ich = 6;
1345 break;
1346 case 0x27c0:
1347 case 0x27c4:
1348 ich = 7;
1349 break;
1350 case 0x2828: /* ICH8M */
1351 ich = 8;
1352 break;
1353 default:
1354 /* we do not handle this PCI device */
1355 return;
1356 }
1357
1358 /*
1359 * Read combined mode register.
1360 */
1361 pci_read_config_byte(pdev, 0x90, &tmp); /* combined mode reg */
1362
1363 if (ich == 5) {
1364 tmp &= 0x6; /* interesting bits 2:1, PATA primary/secondary */
1365 if (tmp == 0x4) /* bits 10x */
1366 comb = (1 << 0); /* SATA port 0, PATA port 1 */
1367 else if (tmp == 0x6) /* bits 11x */
1368 comb = (1 << 2); /* PATA port 0, SATA port 1 */
1369 else
1370 return; /* not in combined mode */
1371 } else {
1372 WARN_ON((ich != 6) && (ich != 7) && (ich != 8));
1373 tmp &= 0x3; /* interesting bits 1:0 */
1374 if (tmp & (1 << 0))
1375 comb = (1 << 2); /* PATA port 0, SATA port 1 */
1376 else if (tmp & (1 << 1))
1377 comb = (1 << 0); /* SATA port 0, PATA port 1 */
1378 else
1379 return; /* not in combined mode */
1380 }
1381
1382 /*
1383 * Read programming interface register.
1384 * (Tells us if it's legacy or native mode)
1385 */
1386 pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
1387
1388 /* if SATA port is in native mode, we're ok. */
1389 if (prog & comb)
1390 return;
1391
1392 /* Don't reserve any so the IDE driver can get them (but only if
1393 * combined_mode=ide).
1394 */
1395 if (combined_mode == IDE)
1396 return;
1397
1398 /* Grab them both for libata if combined_mode=libata. */
1399 if (combined_mode == LIBATA) {
1400 request_region(0x1f0, 8, "libata"); /* port 0 */
1401 request_region(0x170, 8, "libata"); /* port 1 */
1402 return;
1403 }
1404
1405 /* SATA port is in legacy mode. Reserve port so that
1406 * IDE driver does not attempt to use it. If request_region
1407 * fails, it will be obvious at boot time, so we don't bother
1408 * checking return values.
1409 */
1410 if (comb == (1 << 0))
1411 request_region(0x1f0, 8, "libata"); /* port 0 */
1412 else
1413 request_region(0x170, 8, "libata"); /* port 1 */
1414}
1415DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_intel_ide_combined );
1416#endif /* CONFIG_SATA_INTEL_COMBINED */
1417
1418
1419int pcie_mch_quirk; 1306int pcie_mch_quirk;
1420EXPORT_SYMBOL(pcie_mch_quirk); 1307EXPORT_SYMBOL(pcie_mch_quirk);
1421 1308
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 95045e33710d..e9bd29975db4 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -3770,7 +3770,8 @@ static int ipr_device_reset(struct ipr_ioa_cfg *ioa_cfg,
3770 * Return value: 3770 * Return value:
3771 * 0 on success / non-zero on failure 3771 * 0 on success / non-zero on failure
3772 **/ 3772 **/
3773static int ipr_sata_reset(struct ata_port *ap, unsigned int *classes) 3773static int ipr_sata_reset(struct ata_port *ap, unsigned int *classes,
3774 unsigned long deadline)
3774{ 3775{
3775 struct ipr_sata_port *sata_port = ap->private_data; 3776 struct ipr_sata_port *sata_port = ap->private_data;
3776 struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg; 3777 struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
diff --git a/include/linux/ata.h b/include/linux/ata.h
index 6caeb98e29dd..edb31bfff68f 100644
--- a/include/linux/ata.h
+++ b/include/linux/ata.h
@@ -159,11 +159,19 @@ enum {
159 ATA_CMD_INIT_DEV_PARAMS = 0x91, 159 ATA_CMD_INIT_DEV_PARAMS = 0x91,
160 ATA_CMD_READ_NATIVE_MAX = 0xF8, 160 ATA_CMD_READ_NATIVE_MAX = 0xF8,
161 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27, 161 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
162 ATA_CMD_SET_MAX = 0xF9,
163 ATA_CMD_SET_MAX_EXT = 0x37,
162 ATA_CMD_READ_LOG_EXT = 0x2f, 164 ATA_CMD_READ_LOG_EXT = 0x2f,
163 165
164 /* READ_LOG_EXT pages */ 166 /* READ_LOG_EXT pages */
165 ATA_LOG_SATA_NCQ = 0x10, 167 ATA_LOG_SATA_NCQ = 0x10,
166 168
169 /* READ/WRITE LONG (obsolete) */
170 ATA_CMD_READ_LONG = 0x22,
171 ATA_CMD_READ_LONG_ONCE = 0x23,
172 ATA_CMD_WRITE_LONG = 0x32,
173 ATA_CMD_WRITE_LONG_ONCE = 0x33,
174
167 /* SETFEATURES stuff */ 175 /* SETFEATURES stuff */
168 SETFEATURES_XFER = 0x03, 176 SETFEATURES_XFER = 0x03,
169 XFER_UDMA_7 = 0x47, 177 XFER_UDMA_7 = 0x47,
@@ -194,6 +202,8 @@ enum {
194 SETFEATURES_WC_ON = 0x02, /* Enable write cache */ 202 SETFEATURES_WC_ON = 0x02, /* Enable write cache */
195 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */ 203 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
196 204
205 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
206
197 /* ATAPI stuff */ 207 /* ATAPI stuff */
198 ATAPI_PKT_DMA = (1 << 0), 208 ATAPI_PKT_DMA = (1 << 0),
199 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir: 209 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index 6859a3b14088..71ea92319241 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -99,7 +99,6 @@ extern struct resource ioport_resource;
99extern struct resource iomem_resource; 99extern struct resource iomem_resource;
100 100
101extern int request_resource(struct resource *root, struct resource *new); 101extern int request_resource(struct resource *root, struct resource *new);
102extern struct resource * ____request_resource(struct resource *root, struct resource *new);
103extern int release_resource(struct resource *new); 102extern int release_resource(struct resource *new);
104extern int insert_resource(struct resource *parent, struct resource *new); 103extern int insert_resource(struct resource *parent, struct resource *new);
105extern int allocate_resource(struct resource *root, struct resource *new, 104extern int allocate_resource(struct resource *root, struct resource *new,
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 0cfbcb6f08eb..d8cfc72ea9c1 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -210,6 +210,7 @@ enum {
210 210
211 /* host set flags */ 211 /* host set flags */
212 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host only */ 212 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host only */
213 ATA_HOST_STARTED = (1 << 1), /* Host started */
213 214
214 /* various lengths of time */ 215 /* various lengths of time */
215 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */ 216 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
@@ -281,11 +282,13 @@ enum {
281 ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */ 282 ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */
282 ATA_EHI_QUIET = (1 << 3), /* be quiet */ 283 ATA_EHI_QUIET = (1 << 3), /* be quiet */
283 284
284 ATA_EHI_DID_RESET = (1 << 16), /* already reset this port */ 285 ATA_EHI_DID_SOFTRESET = (1 << 16), /* already soft-reset this port */
285 ATA_EHI_PRINTINFO = (1 << 17), /* print configuration info */ 286 ATA_EHI_DID_HARDRESET = (1 << 17), /* already soft-reset this port */
286 ATA_EHI_SETMODE = (1 << 18), /* configure transfer mode */ 287 ATA_EHI_PRINTINFO = (1 << 18), /* print configuration info */
287 ATA_EHI_POST_SETMODE = (1 << 19), /* revaildating after setmode */ 288 ATA_EHI_SETMODE = (1 << 19), /* configure transfer mode */
289 ATA_EHI_POST_SETMODE = (1 << 20), /* revaildating after setmode */
288 290
291 ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET,
289 ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK, 292 ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK,
290 293
291 /* max repeat if error condition is still set after ->error_handler */ 294 /* max repeat if error condition is still set after ->error_handler */
@@ -367,34 +370,6 @@ struct ata_ioports {
367 void __iomem *scr_addr; 370 void __iomem *scr_addr;
368}; 371};
369 372
370struct ata_probe_ent {
371 struct list_head node;
372 struct device *dev;
373 const struct ata_port_operations *port_ops;
374 struct scsi_host_template *sht;
375 struct ata_ioports port[ATA_MAX_PORTS];
376 unsigned int n_ports;
377 unsigned int dummy_port_mask;
378 unsigned int pio_mask;
379 unsigned int mwdma_mask;
380 unsigned int udma_mask;
381 unsigned long irq;
382 unsigned long irq2;
383 unsigned int irq_flags;
384 unsigned long port_flags;
385 unsigned long _host_flags;
386 void __iomem * const *iomap;
387 void *private_data;
388
389 /* port_info for the secondary port. Together with irq2, it's
390 * used to implement non-uniform secondary port. Currently,
391 * the only user is ata_piix combined mode. This workaround
392 * will be removed together with ata_probe_ent when init model
393 * is updated.
394 */
395 const struct ata_port_info *pinfo2;
396};
397
398struct ata_host { 373struct ata_host {
399 spinlock_t lock; 374 spinlock_t lock;
400 struct device *dev; 375 struct device *dev;
@@ -427,6 +402,7 @@ struct ata_queued_cmd {
427 int dma_dir; 402 int dma_dir;
428 403
429 unsigned int pad_len; 404 unsigned int pad_len;
405 unsigned int sect_size;
430 406
431 unsigned int nbytes; 407 unsigned int nbytes;
432 unsigned int curbytes; 408 unsigned int curbytes;
@@ -472,6 +448,7 @@ struct ata_device {
472 struct scsi_device *sdev; /* attached SCSI device */ 448 struct scsi_device *sdev; /* attached SCSI device */
473 /* n_sector is used as CLEAR_OFFSET, read comment above CLEAR_OFFSET */ 449 /* n_sector is used as CLEAR_OFFSET, read comment above CLEAR_OFFSET */
474 u64 n_sectors; /* size of device, if ATA */ 450 u64 n_sectors; /* size of device, if ATA */
451 u64 n_sectors_boot; /* size of ATA device at startup */
475 unsigned int class; /* ATA_DEV_xxx */ 452 unsigned int class; /* ATA_DEV_xxx */
476 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */ 453 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
477 u8 pio_mode; 454 u8 pio_mode;
@@ -597,11 +574,11 @@ struct ata_port {
597struct ata_port_operations { 574struct ata_port_operations {
598 void (*port_disable) (struct ata_port *); 575 void (*port_disable) (struct ata_port *);
599 576
600 void (*dev_config) (struct ata_port *, struct ata_device *); 577 void (*dev_config) (struct ata_device *);
601 578
602 void (*set_piomode) (struct ata_port *, struct ata_device *); 579 void (*set_piomode) (struct ata_port *, struct ata_device *);
603 void (*set_dmamode) (struct ata_port *, struct ata_device *); 580 void (*set_dmamode) (struct ata_port *, struct ata_device *);
604 unsigned long (*mode_filter) (const struct ata_port *, struct ata_device *, unsigned long); 581 unsigned long (*mode_filter) (struct ata_device *, unsigned long);
605 582
606 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf); 583 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf);
607 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf); 584 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
@@ -616,6 +593,8 @@ struct ata_port_operations {
616 593
617 void (*post_set_mode) (struct ata_port *ap); 594 void (*post_set_mode) (struct ata_port *ap);
618 595
596 int (*cable_detect) (struct ata_port *ap);
597
619 int (*check_atapi_dma) (struct ata_queued_cmd *qc); 598 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
620 599
621 void (*bmdma_setup) (struct ata_queued_cmd *qc); 600 void (*bmdma_setup) (struct ata_queued_cmd *qc);
@@ -664,6 +643,7 @@ struct ata_port_info {
664 unsigned long mwdma_mask; 643 unsigned long mwdma_mask;
665 unsigned long udma_mask; 644 unsigned long udma_mask;
666 const struct ata_port_operations *port_ops; 645 const struct ata_port_operations *port_ops;
646 irq_handler_t irq_handler;
667 void *private_data; 647 void *private_data;
668}; 648};
669 649
@@ -686,6 +666,7 @@ extern const unsigned long sata_deb_timing_hotplug[];
686extern const unsigned long sata_deb_timing_long[]; 666extern const unsigned long sata_deb_timing_long[];
687 667
688extern const struct ata_port_operations ata_dummy_port_ops; 668extern const struct ata_port_operations ata_dummy_port_ops;
669extern const struct ata_port_info ata_dummy_port_info;
689 670
690static inline const unsigned long * 671static inline const unsigned long *
691sata_ehc_deb_timing(struct ata_eh_context *ehc) 672sata_ehc_deb_timing(struct ata_eh_context *ehc)
@@ -701,6 +682,7 @@ static inline int ata_port_is_dummy(struct ata_port *ap)
701 return ap->ops == &ata_dummy_port_ops; 682 return ap->ops == &ata_dummy_port_ops;
702} 683}
703 684
685extern void sata_print_link_status(struct ata_port *ap);
704extern void ata_port_probe(struct ata_port *); 686extern void ata_port_probe(struct ata_port *);
705extern void __sata_phy_reset(struct ata_port *ap); 687extern void __sata_phy_reset(struct ata_port *ap);
706extern void sata_phy_reset(struct ata_port *ap); 688extern void sata_phy_reset(struct ata_port *ap);
@@ -728,7 +710,15 @@ extern int ata_pci_device_resume(struct pci_dev *pdev);
728#endif 710#endif
729extern int ata_pci_clear_simplex(struct pci_dev *pdev); 711extern int ata_pci_clear_simplex(struct pci_dev *pdev);
730#endif /* CONFIG_PCI */ 712#endif /* CONFIG_PCI */
731extern int ata_device_add(const struct ata_probe_ent *ent); 713extern struct ata_host *ata_host_alloc(struct device *dev, int max_ports);
714extern struct ata_host *ata_host_alloc_pinfo(struct device *dev,
715 const struct ata_port_info * const * ppi, int n_ports);
716extern int ata_host_start(struct ata_host *host);
717extern int ata_host_register(struct ata_host *host,
718 struct scsi_host_template *sht);
719extern int ata_host_activate(struct ata_host *host, int irq,
720 irq_handler_t irq_handler, unsigned long irq_flags,
721 struct scsi_host_template *sht);
732extern void ata_host_detach(struct ata_host *host); 722extern void ata_host_detach(struct ata_host *host);
733extern void ata_host_init(struct ata_host *, struct device *, 723extern void ata_host_init(struct ata_host *, struct device *,
734 unsigned long, const struct ata_port_operations *); 724 unsigned long, const struct ata_port_operations *);
@@ -828,11 +818,17 @@ extern void ata_scsi_slave_destroy(struct scsi_device *sdev);
828extern int ata_scsi_change_queue_depth(struct scsi_device *sdev, 818extern int ata_scsi_change_queue_depth(struct scsi_device *sdev,
829 int queue_depth); 819 int queue_depth);
830extern struct ata_device *ata_dev_pair(struct ata_device *adev); 820extern struct ata_device *ata_dev_pair(struct ata_device *adev);
821extern int ata_do_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev);
831extern u8 ata_irq_on(struct ata_port *ap); 822extern u8 ata_irq_on(struct ata_port *ap);
832extern u8 ata_dummy_irq_on(struct ata_port *ap); 823extern u8 ata_dummy_irq_on(struct ata_port *ap);
833extern u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq); 824extern u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq);
834extern u8 ata_dummy_irq_ack(struct ata_port *ap, unsigned int chk_drq); 825extern u8 ata_dummy_irq_ack(struct ata_port *ap, unsigned int chk_drq);
835 826
827extern int ata_cable_40wire(struct ata_port *ap);
828extern int ata_cable_80wire(struct ata_port *ap);
829extern int ata_cable_sata(struct ata_port *ap);
830extern int ata_cable_unknown(struct ata_port *ap);
831
836/* 832/*
837 * Timing helpers 833 * Timing helpers
838 */ 834 */
@@ -870,10 +866,13 @@ struct pci_bits {
870 unsigned long val; 866 unsigned long val;
871}; 867};
872 868
873extern struct ata_probe_ent * 869extern int ata_pci_init_native_host(struct ata_host *host,
874ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask); 870 unsigned int port_mask);
871extern int ata_pci_prepare_native_host(struct pci_dev *pdev,
872 const struct ata_port_info * const * ppi,
873 int n_ports, struct ata_host **r_host);
875extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits); 874extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits);
876extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long); 875extern unsigned long ata_pci_default_filter(struct ata_device *, unsigned long);
877#endif /* CONFIG_PCI */ 876#endif /* CONFIG_PCI */
878 877
879/* 878/*
@@ -1173,6 +1172,7 @@ static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
1173 qc->n_elem = 0; 1172 qc->n_elem = 0;
1174 qc->err_mask = 0; 1173 qc->err_mask = 0;
1175 qc->pad_len = 0; 1174 qc->pad_len = 0;
1175 qc->sect_size = ATA_SECT_SIZE;
1176 1176
1177 ata_tf_init(qc->dev, &qc->tf); 1177 ata_tf_init(qc->dev, &qc->tf);
1178 1178
@@ -1220,7 +1220,7 @@ static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
1220 1220
1221static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host) 1221static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host)
1222{ 1222{
1223 return (struct ata_port *) &host->hostdata[0]; 1223 return *(struct ata_port **)&host->hostdata[0];
1224} 1224}
1225 1225
1226#endif /* __LINUX_LIBATA_H__ */ 1226#endif /* __LINUX_LIBATA_H__ */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index a3ad76221c6f..972491089ac9 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -838,6 +838,7 @@ void __iomem * pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
838void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); 838void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
839void __iomem * const * pcim_iomap_table(struct pci_dev *pdev); 839void __iomem * const * pcim_iomap_table(struct pci_dev *pdev);
840int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name); 840int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
841void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
841 842
842extern int pci_pci_problems; 843extern int pci_pci_problems;
843#define PCIPCI_FAIL 1 /* No PCI PCI DMA */ 844#define PCIPCI_FAIL 1 /* No PCI PCI DMA */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 600308fdf9ce..5f21b0f68b42 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -368,7 +368,6 @@
368#define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379 368#define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379
369#define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a 369#define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a
370#define PCI_DEVICE_ID_ATI_IXP600_SATA 0x4380 370#define PCI_DEVICE_ID_ATI_IXP600_SATA 0x4380
371#define PCI_DEVICE_ID_ATI_IXP600_SRAID 0x4381
372#define PCI_DEVICE_ID_ATI_IXP600_SMBUS 0x4385 371#define PCI_DEVICE_ID_ATI_IXP600_SMBUS 0x4385
373#define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c 372#define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c
374 373
diff --git a/kernel/resource.c b/kernel/resource.c
index bdb55a33f969..9bd14fd3e6de 100644
--- a/kernel/resource.c
+++ b/kernel/resource.c
@@ -213,27 +213,6 @@ int request_resource(struct resource *root, struct resource *new)
213EXPORT_SYMBOL(request_resource); 213EXPORT_SYMBOL(request_resource);
214 214
215/** 215/**
216 * ____request_resource - reserve a resource, with resource conflict returned
217 * @root: root resource descriptor
218 * @new: resource descriptor desired by caller
219 *
220 * Returns:
221 * On success, NULL is returned.
222 * On error, a pointer to the conflicting resource is returned.
223 */
224struct resource *____request_resource(struct resource *root, struct resource *new)
225{
226 struct resource *conflict;
227
228 write_lock(&resource_lock);
229 conflict = __request_resource(root, new);
230 write_unlock(&resource_lock);
231 return conflict;
232}
233
234EXPORT_SYMBOL(____request_resource);
235
236/**
237 * release_resource - release a previously reserved resource 216 * release_resource - release a previously reserved resource
238 * @old: resource pointer 217 * @old: resource pointer
239 */ 218 */
diff --git a/lib/devres.c b/lib/devres.c
index eb38849aa717..b1d336ce7f3d 100644
--- a/lib/devres.c
+++ b/lib/devres.c
@@ -296,5 +296,31 @@ int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name)
296 return rc; 296 return rc;
297} 297}
298EXPORT_SYMBOL(pcim_iomap_regions); 298EXPORT_SYMBOL(pcim_iomap_regions);
299
300/**
301 * pcim_iounmap_regions - Unmap and release PCI BARs
302 * @pdev: PCI device to map IO resources for
303 * @mask: Mask of BARs to unmap and release
304 *
305 * Unamp and release regions specified by @mask.
306 */
307void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask)
308{
309 void __iomem * const *iomap;
310 int i;
311
312 iomap = pcim_iomap_table(pdev);
313 if (!iomap)
314 return;
315
316 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
317 if (!(mask & (1 << i)))
318 continue;
319
320 pcim_iounmap(pdev, iomap[i]);
321 pci_release_region(pdev, i);
322 }
323}
324EXPORT_SYMBOL(pcim_iounmap_regions);
299#endif 325#endif
300#endif 326#endif