diff options
-rw-r--r-- | arch/ppc/boot/simple/misc-katana.c | 8 | ||||
-rw-r--r-- | arch/ppc/configs/katana_defconfig | 336 | ||||
-rw-r--r-- | arch/ppc/platforms/katana.c | 253 | ||||
-rw-r--r-- | arch/ppc/platforms/katana.h | 16 |
4 files changed, 420 insertions, 193 deletions
diff --git a/arch/ppc/boot/simple/misc-katana.c b/arch/ppc/boot/simple/misc-katana.c index b6e1bb833157..ec94a11bacac 100644 --- a/arch/ppc/boot/simple/misc-katana.c +++ b/arch/ppc/boot/simple/misc-katana.c | |||
@@ -26,6 +26,8 @@ extern u32 mv64x60_mpsc_clk_freq; | |||
26 | #define min(a,b) (((a) < (b)) ? (a) : (b)) | 26 | #define min(a,b) (((a) < (b)) ? (a) : (b)) |
27 | #endif | 27 | #endif |
28 | 28 | ||
29 | unsigned long mv64360_get_mem_size(void); | ||
30 | |||
29 | void | 31 | void |
30 | mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) | 32 | mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) |
31 | { | 33 | { |
@@ -35,3 +37,9 @@ mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) | |||
35 | min(katana_bus_freq((void __iomem *)KATANA_CPLD_BASE), | 37 | min(katana_bus_freq((void __iomem *)KATANA_CPLD_BASE), |
36 | MV64x60_TCLK_FREQ_MAX); | 38 | MV64x60_TCLK_FREQ_MAX); |
37 | } | 39 | } |
40 | |||
41 | unsigned long | ||
42 | get_mem_size(void) | ||
43 | { | ||
44 | return mv64360_get_mem_size(); | ||
45 | } | ||
diff --git a/arch/ppc/configs/katana_defconfig b/arch/ppc/configs/katana_defconfig index f0b0d5720154..0f3bb9af9c22 100644 --- a/arch/ppc/configs/katana_defconfig +++ b/arch/ppc/configs/katana_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.11 | 3 | # Linux kernel version: 2.6.13-mm1 |
4 | # Tue Mar 8 17:31:00 2005 | 4 | # Thu Sep 1 17:16:03 2005 |
5 | # | 5 | # |
6 | CONFIG_MMU=y | 6 | CONFIG_MMU=y |
7 | CONFIG_GENERIC_HARDIRQS=y | 7 | CONFIG_GENERIC_HARDIRQS=y |
@@ -11,6 +11,7 @@ CONFIG_HAVE_DEC_LOCK=y | |||
11 | CONFIG_PPC=y | 11 | CONFIG_PPC=y |
12 | CONFIG_PPC32=y | 12 | CONFIG_PPC32=y |
13 | CONFIG_GENERIC_NVRAM=y | 13 | CONFIG_GENERIC_NVRAM=y |
14 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
14 | 15 | ||
15 | # | 16 | # |
16 | # Code maturity level options | 17 | # Code maturity level options |
@@ -18,28 +19,31 @@ CONFIG_GENERIC_NVRAM=y | |||
18 | CONFIG_EXPERIMENTAL=y | 19 | CONFIG_EXPERIMENTAL=y |
19 | CONFIG_CLEAN_COMPILE=y | 20 | CONFIG_CLEAN_COMPILE=y |
20 | CONFIG_BROKEN_ON_SMP=y | 21 | CONFIG_BROKEN_ON_SMP=y |
22 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
21 | 23 | ||
22 | # | 24 | # |
23 | # General setup | 25 | # General setup |
24 | # | 26 | # |
25 | CONFIG_LOCALVERSION="" | 27 | CONFIG_LOCALVERSION="" |
28 | CONFIG_LOCALVERSION_AUTO=y | ||
26 | CONFIG_SWAP=y | 29 | CONFIG_SWAP=y |
27 | CONFIG_SYSVIPC=y | 30 | CONFIG_SYSVIPC=y |
28 | # CONFIG_POSIX_MQUEUE is not set | 31 | # CONFIG_POSIX_MQUEUE is not set |
29 | # CONFIG_BSD_PROCESS_ACCT is not set | 32 | # CONFIG_BSD_PROCESS_ACCT is not set |
30 | CONFIG_SYSCTL=y | 33 | CONFIG_SYSCTL=y |
31 | # CONFIG_AUDIT is not set | 34 | # CONFIG_AUDIT is not set |
32 | CONFIG_LOG_BUF_SHIFT=14 | ||
33 | # CONFIG_HOTPLUG is not set | 35 | # CONFIG_HOTPLUG is not set |
34 | CONFIG_KOBJECT_UEVENT=y | 36 | CONFIG_KOBJECT_UEVENT=y |
35 | # CONFIG_IKCONFIG is not set | 37 | # CONFIG_IKCONFIG is not set |
38 | CONFIG_INITRAMFS_SOURCE="" | ||
36 | # CONFIG_EMBEDDED is not set | 39 | # CONFIG_EMBEDDED is not set |
37 | CONFIG_KALLSYMS=y | 40 | CONFIG_KALLSYMS=y |
38 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 41 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
42 | CONFIG_PRINTK=y | ||
43 | CONFIG_BUG=y | ||
39 | CONFIG_BASE_FULL=y | 44 | CONFIG_BASE_FULL=y |
40 | CONFIG_FUTEX=y | 45 | CONFIG_FUTEX=y |
41 | CONFIG_EPOLL=y | 46 | CONFIG_EPOLL=y |
42 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
43 | CONFIG_SHMEM=y | 47 | CONFIG_SHMEM=y |
44 | CONFIG_CC_ALIGN_FUNCTIONS=0 | 48 | CONFIG_CC_ALIGN_FUNCTIONS=0 |
45 | CONFIG_CC_ALIGN_LABELS=0 | 49 | CONFIG_CC_ALIGN_LABELS=0 |
@@ -68,15 +72,23 @@ CONFIG_6xx=y | |||
68 | # CONFIG_POWER3 is not set | 72 | # CONFIG_POWER3 is not set |
69 | # CONFIG_POWER4 is not set | 73 | # CONFIG_POWER4 is not set |
70 | # CONFIG_8xx is not set | 74 | # CONFIG_8xx is not set |
75 | # CONFIG_E200 is not set | ||
71 | # CONFIG_E500 is not set | 76 | # CONFIG_E500 is not set |
77 | CONFIG_PPC_FPU=y | ||
72 | CONFIG_ALTIVEC=y | 78 | CONFIG_ALTIVEC=y |
73 | # CONFIG_TAU is not set | 79 | # CONFIG_TAU is not set |
80 | # CONFIG_KEXEC is not set | ||
74 | # CONFIG_CPU_FREQ is not set | 81 | # CONFIG_CPU_FREQ is not set |
75 | # CONFIG_83xx is not set | 82 | # CONFIG_WANT_EARLY_SERIAL is not set |
76 | CONFIG_PPC_STD_MMU=y | 83 | CONFIG_PPC_STD_MMU=y |
77 | CONFIG_NOT_COHERENT_CACHE=y | 84 | CONFIG_NOT_COHERENT_CACHE=y |
78 | 85 | ||
79 | # | 86 | # |
87 | # Performance-monitoring counters support | ||
88 | # | ||
89 | # CONFIG_PERFCTR is not set | ||
90 | |||
91 | # | ||
80 | # Platform options | 92 | # Platform options |
81 | # | 93 | # |
82 | # CONFIG_PPC_MULTIPLATFORM is not set | 94 | # CONFIG_PPC_MULTIPLATFORM is not set |
@@ -84,21 +96,18 @@ CONFIG_NOT_COHERENT_CACHE=y | |||
84 | CONFIG_KATANA=y | 96 | CONFIG_KATANA=y |
85 | # CONFIG_WILLOW is not set | 97 | # CONFIG_WILLOW is not set |
86 | # CONFIG_CPCI690 is not set | 98 | # CONFIG_CPCI690 is not set |
87 | # CONFIG_PCORE is not set | ||
88 | # CONFIG_POWERPMC250 is not set | 99 | # CONFIG_POWERPMC250 is not set |
89 | # CONFIG_CHESTNUT is not set | 100 | # CONFIG_CHESTNUT is not set |
90 | # CONFIG_SPRUCE is not set | 101 | # CONFIG_SPRUCE is not set |
102 | # CONFIG_HDPU is not set | ||
91 | # CONFIG_EV64260 is not set | 103 | # CONFIG_EV64260 is not set |
92 | # CONFIG_LOPEC is not set | 104 | # CONFIG_LOPEC is not set |
93 | # CONFIG_MCPN765 is not set | ||
94 | # CONFIG_MVME5100 is not set | 105 | # CONFIG_MVME5100 is not set |
95 | # CONFIG_PPLUS is not set | 106 | # CONFIG_PPLUS is not set |
96 | # CONFIG_PRPMC750 is not set | 107 | # CONFIG_PRPMC750 is not set |
97 | # CONFIG_PRPMC800 is not set | 108 | # CONFIG_PRPMC800 is not set |
98 | # CONFIG_SANDPOINT is not set | 109 | # CONFIG_SANDPOINT is not set |
99 | # CONFIG_RADSTONE_PPC7D is not set | 110 | # CONFIG_RADSTONE_PPC7D is not set |
100 | # CONFIG_ADIR is not set | ||
101 | # CONFIG_K2 is not set | ||
102 | # CONFIG_PAL4 is not set | 111 | # CONFIG_PAL4 is not set |
103 | # CONFIG_GEMINI is not set | 112 | # CONFIG_GEMINI is not set |
104 | # CONFIG_EST8260 is not set | 113 | # CONFIG_EST8260 is not set |
@@ -109,6 +118,8 @@ CONFIG_KATANA=y | |||
109 | # CONFIG_ADS8272 is not set | 118 | # CONFIG_ADS8272 is not set |
110 | # CONFIG_PQ2FADS is not set | 119 | # CONFIG_PQ2FADS is not set |
111 | # CONFIG_LITE5200 is not set | 120 | # CONFIG_LITE5200 is not set |
121 | # CONFIG_MPC834x_SYS is not set | ||
122 | # CONFIG_EV64360 is not set | ||
112 | CONFIG_MV64360=y | 123 | CONFIG_MV64360=y |
113 | CONFIG_MV64X60=y | 124 | CONFIG_MV64X60=y |
114 | 125 | ||
@@ -118,12 +129,28 @@ CONFIG_MV64X60=y | |||
118 | CONFIG_MV64X60_BASE=0xf8100000 | 129 | CONFIG_MV64X60_BASE=0xf8100000 |
119 | CONFIG_MV64X60_NEW_BASE=0xf8100000 | 130 | CONFIG_MV64X60_NEW_BASE=0xf8100000 |
120 | # CONFIG_SMP is not set | 131 | # CONFIG_SMP is not set |
132 | CONFIG_HIGHMEM=y | ||
133 | # CONFIG_HZ_100 is not set | ||
134 | CONFIG_HZ_250=y | ||
135 | # CONFIG_HZ_1000 is not set | ||
136 | CONFIG_HZ=250 | ||
137 | CONFIG_PREEMPT_NONE=y | ||
138 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
121 | # CONFIG_PREEMPT is not set | 139 | # CONFIG_PREEMPT is not set |
122 | # CONFIG_HIGHMEM is not set | 140 | CONFIG_SELECT_MEMORY_MODEL=y |
141 | CONFIG_FLATMEM_MANUAL=y | ||
142 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
143 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
144 | CONFIG_FLATMEM=y | ||
145 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
146 | # CONFIG_SPARSEMEM_STATIC is not set | ||
123 | CONFIG_BINFMT_ELF=y | 147 | CONFIG_BINFMT_ELF=y |
124 | CONFIG_BINFMT_MISC=y | 148 | CONFIG_BINFMT_MISC=y |
125 | CONFIG_CMDLINE_BOOL=y | 149 | CONFIG_CMDLINE_BOOL=y |
126 | CONFIG_CMDLINE="console=ttyMM0,9600 ip=on" | 150 | CONFIG_CMDLINE="console=ttyMM0 ip=on" |
151 | # CONFIG_PM is not set | ||
152 | CONFIG_SECCOMP=y | ||
153 | CONFIG_ISA_DMA_API=y | ||
127 | 154 | ||
128 | # | 155 | # |
129 | # Bus options | 156 | # Bus options |
@@ -132,7 +159,6 @@ CONFIG_GENERIC_ISA_DMA=y | |||
132 | CONFIG_PCI=y | 159 | CONFIG_PCI=y |
133 | CONFIG_PCI_DOMAINS=y | 160 | CONFIG_PCI_DOMAINS=y |
134 | CONFIG_PCI_LEGACY_PROC=y | 161 | CONFIG_PCI_LEGACY_PROC=y |
135 | CONFIG_PCI_NAMES=y | ||
136 | 162 | ||
137 | # | 163 | # |
138 | # PCCARD (PCMCIA/CardBus) support | 164 | # PCCARD (PCMCIA/CardBus) support |
@@ -140,13 +166,10 @@ CONFIG_PCI_NAMES=y | |||
140 | # CONFIG_PCCARD is not set | 166 | # CONFIG_PCCARD is not set |
141 | 167 | ||
142 | # | 168 | # |
143 | # PC-card bridges | ||
144 | # | ||
145 | |||
146 | # | ||
147 | # Advanced setup | 169 | # Advanced setup |
148 | # | 170 | # |
149 | CONFIG_ADVANCED_OPTIONS=y | 171 | CONFIG_ADVANCED_OPTIONS=y |
172 | # CONFIG_HIGHMEM_START_BOOL is not set | ||
150 | CONFIG_HIGHMEM_START=0xfe000000 | 173 | CONFIG_HIGHMEM_START=0xfe000000 |
151 | # CONFIG_LOWMEM_SIZE_BOOL is not set | 174 | # CONFIG_LOWMEM_SIZE_BOOL is not set |
152 | CONFIG_LOWMEM_SIZE=0x30000000 | 175 | CONFIG_LOWMEM_SIZE=0x30000000 |
@@ -162,6 +185,76 @@ CONFIG_CONSISTENT_SIZE=0x00400000 | |||
162 | CONFIG_BOOT_LOAD=0x00800000 | 185 | CONFIG_BOOT_LOAD=0x00800000 |
163 | 186 | ||
164 | # | 187 | # |
188 | # Networking | ||
189 | # | ||
190 | CONFIG_NET=y | ||
191 | |||
192 | # | ||
193 | # Networking options | ||
194 | # | ||
195 | CONFIG_PACKET=y | ||
196 | # CONFIG_PACKET_MMAP is not set | ||
197 | CONFIG_UNIX=y | ||
198 | # CONFIG_NET_KEY is not set | ||
199 | CONFIG_INET=y | ||
200 | CONFIG_IP_MULTICAST=y | ||
201 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
202 | CONFIG_IP_FIB_HASH=y | ||
203 | CONFIG_IP_PNP=y | ||
204 | CONFIG_IP_PNP_DHCP=y | ||
205 | # CONFIG_IP_PNP_BOOTP is not set | ||
206 | # CONFIG_IP_PNP_RARP is not set | ||
207 | # CONFIG_NET_IPIP is not set | ||
208 | # CONFIG_NET_IPGRE is not set | ||
209 | # CONFIG_IP_MROUTE is not set | ||
210 | # CONFIG_ARPD is not set | ||
211 | CONFIG_SYN_COOKIES=y | ||
212 | # CONFIG_INET_AH is not set | ||
213 | # CONFIG_INET_ESP is not set | ||
214 | # CONFIG_INET_IPCOMP is not set | ||
215 | # CONFIG_INET_TUNNEL is not set | ||
216 | CONFIG_INET_DIAG=y | ||
217 | CONFIG_INET_TCP_DIAG=y | ||
218 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
219 | CONFIG_TCP_CONG_BIC=y | ||
220 | # CONFIG_IPV6 is not set | ||
221 | # CONFIG_NETFILTER is not set | ||
222 | |||
223 | # | ||
224 | # DCCP Configuration (EXPERIMENTAL) | ||
225 | # | ||
226 | # CONFIG_IP_DCCP is not set | ||
227 | |||
228 | # | ||
229 | # SCTP Configuration (EXPERIMENTAL) | ||
230 | # | ||
231 | # CONFIG_IP_SCTP is not set | ||
232 | # CONFIG_ATM is not set | ||
233 | # CONFIG_BRIDGE is not set | ||
234 | # CONFIG_VLAN_8021Q is not set | ||
235 | # CONFIG_DECNET is not set | ||
236 | # CONFIG_LLC2 is not set | ||
237 | # CONFIG_IPX is not set | ||
238 | # CONFIG_ATALK is not set | ||
239 | # CONFIG_X25 is not set | ||
240 | # CONFIG_LAPB is not set | ||
241 | # CONFIG_NET_DIVERT is not set | ||
242 | # CONFIG_ECONET is not set | ||
243 | # CONFIG_WAN_ROUTER is not set | ||
244 | # CONFIG_NET_SCHED is not set | ||
245 | # CONFIG_NET_CLS_ROUTE is not set | ||
246 | |||
247 | # | ||
248 | # Network testing | ||
249 | # | ||
250 | # CONFIG_NET_PKTGEN is not set | ||
251 | # CONFIG_NETFILTER_NETLINK is not set | ||
252 | # CONFIG_HAMRADIO is not set | ||
253 | # CONFIG_IRDA is not set | ||
254 | # CONFIG_BT is not set | ||
255 | # CONFIG_IEEE80211 is not set | ||
256 | |||
257 | # | ||
165 | # Device Drivers | 258 | # Device Drivers |
166 | # | 259 | # |
167 | 260 | ||
@@ -177,8 +270,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y | |||
177 | # | 270 | # |
178 | CONFIG_MTD=y | 271 | CONFIG_MTD=y |
179 | # CONFIG_MTD_DEBUG is not set | 272 | # CONFIG_MTD_DEBUG is not set |
180 | CONFIG_MTD_PARTITIONS=y | ||
181 | CONFIG_MTD_CONCAT=y | 273 | CONFIG_MTD_CONCAT=y |
274 | CONFIG_MTD_PARTITIONS=y | ||
182 | # CONFIG_MTD_REDBOOT_PARTS is not set | 275 | # CONFIG_MTD_REDBOOT_PARTS is not set |
183 | # CONFIG_MTD_CMDLINE_PARTS is not set | 276 | # CONFIG_MTD_CMDLINE_PARTS is not set |
184 | 277 | ||
@@ -212,6 +305,7 @@ CONFIG_MTD_MAP_BANK_WIDTH_4=y | |||
212 | CONFIG_MTD_CFI_I2=y | 305 | CONFIG_MTD_CFI_I2=y |
213 | # CONFIG_MTD_CFI_I4 is not set | 306 | # CONFIG_MTD_CFI_I4 is not set |
214 | # CONFIG_MTD_CFI_I8 is not set | 307 | # CONFIG_MTD_CFI_I8 is not set |
308 | # CONFIG_MTD_OTP is not set | ||
215 | CONFIG_MTD_CFI_INTELEXT=y | 309 | CONFIG_MTD_CFI_INTELEXT=y |
216 | # CONFIG_MTD_CFI_AMDSTD is not set | 310 | # CONFIG_MTD_CFI_AMDSTD is not set |
217 | # CONFIG_MTD_CFI_STAA is not set | 311 | # CONFIG_MTD_CFI_STAA is not set |
@@ -219,7 +313,6 @@ CONFIG_MTD_CFI_UTIL=y | |||
219 | # CONFIG_MTD_RAM is not set | 313 | # CONFIG_MTD_RAM is not set |
220 | # CONFIG_MTD_ROM is not set | 314 | # CONFIG_MTD_ROM is not set |
221 | # CONFIG_MTD_ABSENT is not set | 315 | # CONFIG_MTD_ABSENT is not set |
222 | # CONFIG_MTD_XIP is not set | ||
223 | 316 | ||
224 | # | 317 | # |
225 | # Mapping drivers for chip access | 318 | # Mapping drivers for chip access |
@@ -229,6 +322,7 @@ CONFIG_MTD_PHYSMAP=y | |||
229 | CONFIG_MTD_PHYSMAP_START=0xe0000000 | 322 | CONFIG_MTD_PHYSMAP_START=0xe0000000 |
230 | CONFIG_MTD_PHYSMAP_LEN=0x0 | 323 | CONFIG_MTD_PHYSMAP_LEN=0x0 |
231 | CONFIG_MTD_PHYSMAP_BANKWIDTH=4 | 324 | CONFIG_MTD_PHYSMAP_BANKWIDTH=4 |
325 | # CONFIG_MTD_PLATRAM is not set | ||
232 | 326 | ||
233 | # | 327 | # |
234 | # Self-contained MTD device drivers | 328 | # Self-contained MTD device drivers |
@@ -278,7 +372,6 @@ CONFIG_BLK_DEV_RAM=y | |||
278 | CONFIG_BLK_DEV_RAM_COUNT=16 | 372 | CONFIG_BLK_DEV_RAM_COUNT=16 |
279 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 373 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
280 | CONFIG_BLK_DEV_INITRD=y | 374 | CONFIG_BLK_DEV_INITRD=y |
281 | CONFIG_INITRAMFS_SOURCE="" | ||
282 | # CONFIG_LBD is not set | 375 | # CONFIG_LBD is not set |
283 | # CONFIG_CDROM_PKTCDVD is not set | 376 | # CONFIG_CDROM_PKTCDVD is not set |
284 | 377 | ||
@@ -299,6 +392,7 @@ CONFIG_IOSCHED_CFQ=y | |||
299 | # | 392 | # |
300 | # SCSI device support | 393 | # SCSI device support |
301 | # | 394 | # |
395 | # CONFIG_RAID_ATTRS is not set | ||
302 | # CONFIG_SCSI is not set | 396 | # CONFIG_SCSI is not set |
303 | 397 | ||
304 | # | 398 | # |
@@ -309,6 +403,7 @@ CONFIG_IOSCHED_CFQ=y | |||
309 | # | 403 | # |
310 | # Fusion MPT device support | 404 | # Fusion MPT device support |
311 | # | 405 | # |
406 | # CONFIG_FUSION is not set | ||
312 | 407 | ||
313 | # | 408 | # |
314 | # IEEE 1394 (FireWire) support | 409 | # IEEE 1394 (FireWire) support |
@@ -325,71 +420,8 @@ CONFIG_IOSCHED_CFQ=y | |||
325 | # | 420 | # |
326 | 421 | ||
327 | # | 422 | # |
328 | # Networking support | 423 | # Network device support |
329 | # | ||
330 | CONFIG_NET=y | ||
331 | |||
332 | # | ||
333 | # Networking options | ||
334 | # | ||
335 | CONFIG_PACKET=y | ||
336 | # CONFIG_PACKET_MMAP is not set | ||
337 | # CONFIG_NETLINK_DEV is not set | ||
338 | CONFIG_UNIX=y | ||
339 | # CONFIG_NET_KEY is not set | ||
340 | CONFIG_INET=y | ||
341 | CONFIG_IP_MULTICAST=y | ||
342 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
343 | CONFIG_IP_PNP=y | ||
344 | CONFIG_IP_PNP_DHCP=y | ||
345 | # CONFIG_IP_PNP_BOOTP is not set | ||
346 | # CONFIG_IP_PNP_RARP is not set | ||
347 | # CONFIG_NET_IPIP is not set | ||
348 | # CONFIG_NET_IPGRE is not set | ||
349 | # CONFIG_IP_MROUTE is not set | ||
350 | # CONFIG_ARPD is not set | ||
351 | CONFIG_SYN_COOKIES=y | ||
352 | # CONFIG_INET_AH is not set | ||
353 | # CONFIG_INET_ESP is not set | ||
354 | # CONFIG_INET_IPCOMP is not set | ||
355 | # CONFIG_INET_TUNNEL is not set | ||
356 | CONFIG_IP_TCPDIAG=y | ||
357 | # CONFIG_IP_TCPDIAG_IPV6 is not set | ||
358 | # CONFIG_IPV6 is not set | ||
359 | # CONFIG_NETFILTER is not set | ||
360 | |||
361 | # | ||
362 | # SCTP Configuration (EXPERIMENTAL) | ||
363 | # | ||
364 | # CONFIG_IP_SCTP is not set | ||
365 | # CONFIG_ATM is not set | ||
366 | # CONFIG_BRIDGE is not set | ||
367 | # CONFIG_VLAN_8021Q is not set | ||
368 | # CONFIG_DECNET is not set | ||
369 | # CONFIG_LLC2 is not set | ||
370 | # CONFIG_IPX is not set | ||
371 | # CONFIG_ATALK is not set | ||
372 | # CONFIG_X25 is not set | ||
373 | # CONFIG_LAPB is not set | ||
374 | # CONFIG_NET_DIVERT is not set | ||
375 | # CONFIG_ECONET is not set | ||
376 | # CONFIG_WAN_ROUTER is not set | ||
377 | |||
378 | # | ||
379 | # QoS and/or fair queueing | ||
380 | # | ||
381 | # CONFIG_NET_SCHED is not set | ||
382 | # CONFIG_NET_CLS_ROUTE is not set | ||
383 | |||
384 | # | ||
385 | # Network testing | ||
386 | # | 424 | # |
387 | # CONFIG_NET_PKTGEN is not set | ||
388 | # CONFIG_NETPOLL is not set | ||
389 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
390 | # CONFIG_HAMRADIO is not set | ||
391 | # CONFIG_IRDA is not set | ||
392 | # CONFIG_BT is not set | ||
393 | CONFIG_NETDEVICES=y | 425 | CONFIG_NETDEVICES=y |
394 | # CONFIG_DUMMY is not set | 426 | # CONFIG_DUMMY is not set |
395 | # CONFIG_BONDING is not set | 427 | # CONFIG_BONDING is not set |
@@ -402,6 +434,11 @@ CONFIG_NETDEVICES=y | |||
402 | # CONFIG_ARCNET is not set | 434 | # CONFIG_ARCNET is not set |
403 | 435 | ||
404 | # | 436 | # |
437 | # PHY device support | ||
438 | # | ||
439 | # CONFIG_PHYLIB is not set | ||
440 | |||
441 | # | ||
405 | # Ethernet (10 or 100Mbit) | 442 | # Ethernet (10 or 100Mbit) |
406 | # | 443 | # |
407 | CONFIG_NET_ETHERNET=y | 444 | CONFIG_NET_ETHERNET=y |
@@ -422,6 +459,7 @@ CONFIG_TULIP=y | |||
422 | # CONFIG_DE4X5 is not set | 459 | # CONFIG_DE4X5 is not set |
423 | # CONFIG_WINBOND_840 is not set | 460 | # CONFIG_WINBOND_840 is not set |
424 | # CONFIG_DM9102 is not set | 461 | # CONFIG_DM9102 is not set |
462 | # CONFIG_ULI526X is not set | ||
425 | # CONFIG_HP100 is not set | 463 | # CONFIG_HP100 is not set |
426 | CONFIG_NET_PCI=y | 464 | CONFIG_NET_PCI=y |
427 | # CONFIG_PCNET32 is not set | 465 | # CONFIG_PCNET32 is not set |
@@ -448,14 +486,19 @@ CONFIG_E100=y | |||
448 | # | 486 | # |
449 | # CONFIG_ACENIC is not set | 487 | # CONFIG_ACENIC is not set |
450 | # CONFIG_DL2K is not set | 488 | # CONFIG_DL2K is not set |
451 | # CONFIG_E1000 is not set | 489 | CONFIG_E1000=y |
490 | # CONFIG_E1000_NAPI is not set | ||
452 | # CONFIG_NS83820 is not set | 491 | # CONFIG_NS83820 is not set |
453 | # CONFIG_HAMACHI is not set | 492 | # CONFIG_HAMACHI is not set |
454 | # CONFIG_YELLOWFIN is not set | 493 | # CONFIG_YELLOWFIN is not set |
455 | # CONFIG_R8169 is not set | 494 | # CONFIG_R8169 is not set |
495 | # CONFIG_SIS190 is not set | ||
496 | # CONFIG_SKGE is not set | ||
497 | # CONFIG_SKY2 is not set | ||
456 | # CONFIG_SK98LIN is not set | 498 | # CONFIG_SK98LIN is not set |
457 | # CONFIG_VIA_VELOCITY is not set | 499 | # CONFIG_VIA_VELOCITY is not set |
458 | # CONFIG_TIGON3 is not set | 500 | # CONFIG_TIGON3 is not set |
501 | # CONFIG_BNX2 is not set | ||
459 | CONFIG_MV643XX_ETH=y | 502 | CONFIG_MV643XX_ETH=y |
460 | CONFIG_MV643XX_ETH_0=y | 503 | CONFIG_MV643XX_ETH_0=y |
461 | CONFIG_MV643XX_ETH_1=y | 504 | CONFIG_MV643XX_ETH_1=y |
@@ -464,6 +507,7 @@ CONFIG_MV643XX_ETH_2=y | |||
464 | # | 507 | # |
465 | # Ethernet (10000 Mbit) | 508 | # Ethernet (10000 Mbit) |
466 | # | 509 | # |
510 | # CONFIG_CHELSIO_T1 is not set | ||
467 | # CONFIG_IXGB is not set | 511 | # CONFIG_IXGB is not set |
468 | # CONFIG_S2IO is not set | 512 | # CONFIG_S2IO is not set |
469 | 513 | ||
@@ -487,6 +531,11 @@ CONFIG_MV643XX_ETH_2=y | |||
487 | # CONFIG_SLIP is not set | 531 | # CONFIG_SLIP is not set |
488 | # CONFIG_SHAPER is not set | 532 | # CONFIG_SHAPER is not set |
489 | # CONFIG_NETCONSOLE is not set | 533 | # CONFIG_NETCONSOLE is not set |
534 | # CONFIG_KGDBOE is not set | ||
535 | # CONFIG_NETPOLL is not set | ||
536 | # CONFIG_NETPOLL_RX is not set | ||
537 | # CONFIG_NETPOLL_TRAP is not set | ||
538 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
490 | 539 | ||
491 | # | 540 | # |
492 | # ISDN subsystem | 541 | # ISDN subsystem |
@@ -516,14 +565,6 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | |||
516 | # CONFIG_INPUT_EVBUG is not set | 565 | # CONFIG_INPUT_EVBUG is not set |
517 | 566 | ||
518 | # | 567 | # |
519 | # Input I/O drivers | ||
520 | # | ||
521 | # CONFIG_GAMEPORT is not set | ||
522 | CONFIG_SOUND_GAMEPORT=y | ||
523 | # CONFIG_SERIO is not set | ||
524 | # CONFIG_SERIO_I8042 is not set | ||
525 | |||
526 | # | ||
527 | # Input Device Drivers | 568 | # Input Device Drivers |
528 | # | 569 | # |
529 | # CONFIG_INPUT_KEYBOARD is not set | 570 | # CONFIG_INPUT_KEYBOARD is not set |
@@ -533,6 +574,12 @@ CONFIG_SOUND_GAMEPORT=y | |||
533 | # CONFIG_INPUT_MISC is not set | 574 | # CONFIG_INPUT_MISC is not set |
534 | 575 | ||
535 | # | 576 | # |
577 | # Hardware I/O ports | ||
578 | # | ||
579 | # CONFIG_SERIO is not set | ||
580 | # CONFIG_GAMEPORT is not set | ||
581 | |||
582 | # | ||
536 | # Character devices | 583 | # Character devices |
537 | # | 584 | # |
538 | CONFIG_VT=y | 585 | CONFIG_VT=y |
@@ -552,6 +599,7 @@ CONFIG_SERIAL_MPSC=y | |||
552 | CONFIG_SERIAL_MPSC_CONSOLE=y | 599 | CONFIG_SERIAL_MPSC_CONSOLE=y |
553 | CONFIG_SERIAL_CORE=y | 600 | CONFIG_SERIAL_CORE=y |
554 | CONFIG_SERIAL_CORE_CONSOLE=y | 601 | CONFIG_SERIAL_CORE_CONSOLE=y |
602 | # CONFIG_SERIAL_JSM is not set | ||
555 | CONFIG_UNIX98_PTYS=y | 603 | CONFIG_UNIX98_PTYS=y |
556 | CONFIG_LEGACY_PTYS=y | 604 | CONFIG_LEGACY_PTYS=y |
557 | CONFIG_LEGACY_PTY_COUNT=256 | 605 | CONFIG_LEGACY_PTY_COUNT=256 |
@@ -580,6 +628,11 @@ CONFIG_GEN_RTC=y | |||
580 | # CONFIG_RAW_DRIVER is not set | 628 | # CONFIG_RAW_DRIVER is not set |
581 | 629 | ||
582 | # | 630 | # |
631 | # TPM devices | ||
632 | # | ||
633 | # CONFIG_TCG_TPM is not set | ||
634 | |||
635 | # | ||
583 | # I2C support | 636 | # I2C support |
584 | # | 637 | # |
585 | CONFIG_I2C=y | 638 | CONFIG_I2C=y |
@@ -602,11 +655,10 @@ CONFIG_I2C_CHARDEV=y | |||
602 | # CONFIG_I2C_AMD8111 is not set | 655 | # CONFIG_I2C_AMD8111 is not set |
603 | # CONFIG_I2C_I801 is not set | 656 | # CONFIG_I2C_I801 is not set |
604 | # CONFIG_I2C_I810 is not set | 657 | # CONFIG_I2C_I810 is not set |
605 | # CONFIG_I2C_ISA is not set | 658 | # CONFIG_I2C_PIIX4 is not set |
606 | # CONFIG_I2C_MPC is not set | 659 | # CONFIG_I2C_MPC is not set |
607 | # CONFIG_I2C_NFORCE2 is not set | 660 | # CONFIG_I2C_NFORCE2 is not set |
608 | # CONFIG_I2C_PARPORT_LIGHT is not set | 661 | # CONFIG_I2C_PARPORT_LIGHT is not set |
609 | # CONFIG_I2C_PIIX4 is not set | ||
610 | # CONFIG_I2C_PROSAVAGE is not set | 662 | # CONFIG_I2C_PROSAVAGE is not set |
611 | # CONFIG_I2C_SAVAGE4 is not set | 663 | # CONFIG_I2C_SAVAGE4 is not set |
612 | # CONFIG_SCx200_ACB is not set | 664 | # CONFIG_SCx200_ACB is not set |
@@ -621,14 +673,39 @@ CONFIG_I2C_CHARDEV=y | |||
621 | CONFIG_I2C_MV64XXX=y | 673 | CONFIG_I2C_MV64XXX=y |
622 | 674 | ||
623 | # | 675 | # |
624 | # Hardware Sensors Chip support | 676 | # Miscellaneous I2C Chip support |
625 | # | 677 | # |
626 | # CONFIG_I2C_SENSOR is not set | 678 | # CONFIG_SENSORS_DS1337 is not set |
679 | # CONFIG_SENSORS_DS1374 is not set | ||
680 | # CONFIG_SENSORS_EEPROM is not set | ||
681 | # CONFIG_SENSORS_PCF8574 is not set | ||
682 | # CONFIG_SENSORS_PCA9539 is not set | ||
683 | # CONFIG_SENSORS_PCF8591 is not set | ||
684 | # CONFIG_SENSORS_RTC8564 is not set | ||
685 | CONFIG_SENSORS_M41T00=y | ||
686 | # CONFIG_SENSORS_MAX6875 is not set | ||
687 | # CONFIG_I2C_DEBUG_CORE is not set | ||
688 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
689 | # CONFIG_I2C_DEBUG_BUS is not set | ||
690 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
691 | |||
692 | # | ||
693 | # Dallas's 1-wire bus | ||
694 | # | ||
695 | # CONFIG_W1 is not set | ||
696 | |||
697 | # | ||
698 | # Hardware Monitoring support | ||
699 | # | ||
700 | CONFIG_HWMON=y | ||
701 | # CONFIG_HWMON_VID is not set | ||
627 | # CONFIG_SENSORS_ADM1021 is not set | 702 | # CONFIG_SENSORS_ADM1021 is not set |
628 | # CONFIG_SENSORS_ADM1025 is not set | 703 | # CONFIG_SENSORS_ADM1025 is not set |
629 | # CONFIG_SENSORS_ADM1026 is not set | 704 | # CONFIG_SENSORS_ADM1026 is not set |
630 | # CONFIG_SENSORS_ADM1031 is not set | 705 | # CONFIG_SENSORS_ADM1031 is not set |
706 | # CONFIG_SENSORS_ADM9240 is not set | ||
631 | # CONFIG_SENSORS_ASB100 is not set | 707 | # CONFIG_SENSORS_ASB100 is not set |
708 | # CONFIG_SENSORS_ATXP1 is not set | ||
632 | # CONFIG_SENSORS_DS1621 is not set | 709 | # CONFIG_SENSORS_DS1621 is not set |
633 | # CONFIG_SENSORS_FSCHER is not set | 710 | # CONFIG_SENSORS_FSCHER is not set |
634 | # CONFIG_SENSORS_FSCPOS is not set | 711 | # CONFIG_SENSORS_FSCPOS is not set |
@@ -644,36 +721,26 @@ CONFIG_I2C_MV64XXX=y | |||
644 | # CONFIG_SENSORS_LM85 is not set | 721 | # CONFIG_SENSORS_LM85 is not set |
645 | # CONFIG_SENSORS_LM87 is not set | 722 | # CONFIG_SENSORS_LM87 is not set |
646 | # CONFIG_SENSORS_LM90 is not set | 723 | # CONFIG_SENSORS_LM90 is not set |
724 | # CONFIG_SENSORS_LM92 is not set | ||
647 | # CONFIG_SENSORS_MAX1619 is not set | 725 | # CONFIG_SENSORS_MAX1619 is not set |
648 | # CONFIG_SENSORS_PC87360 is not set | 726 | # CONFIG_SENSORS_PC87360 is not set |
649 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
650 | # CONFIG_SENSORS_SIS5595 is not set | 727 | # CONFIG_SENSORS_SIS5595 is not set |
651 | # CONFIG_SENSORS_SMSC47M1 is not set | 728 | # CONFIG_SENSORS_SMSC47M1 is not set |
729 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
652 | # CONFIG_SENSORS_VIA686A is not set | 730 | # CONFIG_SENSORS_VIA686A is not set |
653 | # CONFIG_SENSORS_W83781D is not set | 731 | # CONFIG_SENSORS_W83781D is not set |
732 | # CONFIG_SENSORS_W83792D is not set | ||
654 | # CONFIG_SENSORS_W83L785TS is not set | 733 | # CONFIG_SENSORS_W83L785TS is not set |
655 | # CONFIG_SENSORS_W83627HF is not set | 734 | # CONFIG_SENSORS_W83627HF is not set |
735 | # CONFIG_SENSORS_W83627EHF is not set | ||
736 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
656 | 737 | ||
657 | # | 738 | # |
658 | # Other I2C Chip support | 739 | # Misc devices |
659 | # | ||
660 | # CONFIG_SENSORS_EEPROM is not set | ||
661 | # CONFIG_SENSORS_PCF8574 is not set | ||
662 | # CONFIG_SENSORS_PCF8591 is not set | ||
663 | # CONFIG_SENSORS_RTC8564 is not set | ||
664 | CONFIG_SENSORS_M41T00=y | ||
665 | # CONFIG_I2C_DEBUG_CORE is not set | ||
666 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
667 | # CONFIG_I2C_DEBUG_BUS is not set | ||
668 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
669 | |||
670 | # | ||
671 | # Dallas's 1-wire bus | ||
672 | # | 740 | # |
673 | # CONFIG_W1 is not set | ||
674 | 741 | ||
675 | # | 742 | # |
676 | # Misc devices | 743 | # Multimedia Capabilities Port drivers |
677 | # | 744 | # |
678 | 745 | ||
679 | # | 746 | # |
@@ -698,6 +765,11 @@ CONFIG_SENSORS_M41T00=y | |||
698 | CONFIG_DUMMY_CONSOLE=y | 765 | CONFIG_DUMMY_CONSOLE=y |
699 | 766 | ||
700 | # | 767 | # |
768 | # Speakup console speech | ||
769 | # | ||
770 | # CONFIG_SPEAKUP is not set | ||
771 | |||
772 | # | ||
701 | # Sound | 773 | # Sound |
702 | # | 774 | # |
703 | # CONFIG_SOUND is not set | 775 | # CONFIG_SOUND is not set |
@@ -705,13 +777,9 @@ CONFIG_DUMMY_CONSOLE=y | |||
705 | # | 777 | # |
706 | # USB support | 778 | # USB support |
707 | # | 779 | # |
708 | # CONFIG_USB is not set | ||
709 | CONFIG_USB_ARCH_HAS_HCD=y | 780 | CONFIG_USB_ARCH_HAS_HCD=y |
710 | CONFIG_USB_ARCH_HAS_OHCI=y | 781 | CONFIG_USB_ARCH_HAS_OHCI=y |
711 | 782 | # CONFIG_USB is not set | |
712 | # | ||
713 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information | ||
714 | # | ||
715 | 783 | ||
716 | # | 784 | # |
717 | # USB Gadget Support | 785 | # USB Gadget Support |
@@ -729,25 +797,39 @@ CONFIG_USB_ARCH_HAS_OHCI=y | |||
729 | # CONFIG_INFINIBAND is not set | 797 | # CONFIG_INFINIBAND is not set |
730 | 798 | ||
731 | # | 799 | # |
800 | # SN Devices | ||
801 | # | ||
802 | |||
803 | # | ||
804 | # Distributed Lock Manager | ||
805 | # | ||
806 | # CONFIG_DLM is not set | ||
807 | |||
808 | # | ||
732 | # File systems | 809 | # File systems |
733 | # | 810 | # |
734 | CONFIG_EXT2_FS=y | 811 | CONFIG_EXT2_FS=y |
735 | # CONFIG_EXT2_FS_XATTR is not set | 812 | # CONFIG_EXT2_FS_XATTR is not set |
813 | # CONFIG_EXT2_FS_XIP is not set | ||
736 | # CONFIG_EXT3_FS is not set | 814 | # CONFIG_EXT3_FS is not set |
737 | # CONFIG_JBD is not set | 815 | # CONFIG_REISER4_FS is not set |
738 | # CONFIG_REISERFS_FS is not set | 816 | # CONFIG_REISERFS_FS is not set |
739 | # CONFIG_JFS_FS is not set | 817 | # CONFIG_JFS_FS is not set |
818 | # CONFIG_FS_POSIX_ACL is not set | ||
740 | 819 | ||
741 | # | 820 | # |
742 | # XFS support | 821 | # XFS support |
743 | # | 822 | # |
744 | # CONFIG_XFS_FS is not set | 823 | # CONFIG_XFS_FS is not set |
824 | # CONFIG_OCFS2_FS is not set | ||
745 | # CONFIG_MINIX_FS is not set | 825 | # CONFIG_MINIX_FS is not set |
746 | # CONFIG_ROMFS_FS is not set | 826 | # CONFIG_ROMFS_FS is not set |
827 | CONFIG_INOTIFY=y | ||
747 | # CONFIG_QUOTA is not set | 828 | # CONFIG_QUOTA is not set |
748 | CONFIG_DNOTIFY=y | 829 | CONFIG_DNOTIFY=y |
749 | # CONFIG_AUTOFS_FS is not set | 830 | # CONFIG_AUTOFS_FS is not set |
750 | # CONFIG_AUTOFS4_FS is not set | 831 | # CONFIG_AUTOFS4_FS is not set |
832 | # CONFIG_FUSE_FS is not set | ||
751 | 833 | ||
752 | # | 834 | # |
753 | # CD-ROM/DVD Filesystems | 835 | # CD-ROM/DVD Filesystems |
@@ -768,20 +850,18 @@ CONFIG_DNOTIFY=y | |||
768 | CONFIG_PROC_FS=y | 850 | CONFIG_PROC_FS=y |
769 | CONFIG_PROC_KCORE=y | 851 | CONFIG_PROC_KCORE=y |
770 | CONFIG_SYSFS=y | 852 | CONFIG_SYSFS=y |
771 | CONFIG_DEVFS_FS=y | ||
772 | # CONFIG_DEVFS_MOUNT is not set | ||
773 | # CONFIG_DEVFS_DEBUG is not set | ||
774 | # CONFIG_DEVPTS_FS_XATTR is not set | ||
775 | CONFIG_TMPFS=y | 853 | CONFIG_TMPFS=y |
776 | # CONFIG_TMPFS_XATTR is not set | ||
777 | # CONFIG_HUGETLB_PAGE is not set | 854 | # CONFIG_HUGETLB_PAGE is not set |
778 | CONFIG_RAMFS=y | 855 | CONFIG_RAMFS=y |
856 | # CONFIG_CONFIGFS_FS is not set | ||
857 | # CONFIG_RELAYFS_FS is not set | ||
779 | 858 | ||
780 | # | 859 | # |
781 | # Miscellaneous filesystems | 860 | # Miscellaneous filesystems |
782 | # | 861 | # |
783 | # CONFIG_ADFS_FS is not set | 862 | # CONFIG_ADFS_FS is not set |
784 | # CONFIG_AFFS_FS is not set | 863 | # CONFIG_AFFS_FS is not set |
864 | # CONFIG_ASFS_FS is not set | ||
785 | # CONFIG_HFS_FS is not set | 865 | # CONFIG_HFS_FS is not set |
786 | # CONFIG_HFSPLUS_FS is not set | 866 | # CONFIG_HFSPLUS_FS is not set |
787 | # CONFIG_BEFS_FS is not set | 867 | # CONFIG_BEFS_FS is not set |
@@ -801,12 +881,14 @@ CONFIG_RAMFS=y | |||
801 | # | 881 | # |
802 | CONFIG_NFS_FS=y | 882 | CONFIG_NFS_FS=y |
803 | CONFIG_NFS_V3=y | 883 | CONFIG_NFS_V3=y |
884 | # CONFIG_NFS_V3_ACL is not set | ||
804 | # CONFIG_NFS_V4 is not set | 885 | # CONFIG_NFS_V4 is not set |
805 | # CONFIG_NFS_DIRECTIO is not set | 886 | # CONFIG_NFS_DIRECTIO is not set |
806 | # CONFIG_NFSD is not set | 887 | # CONFIG_NFSD is not set |
807 | CONFIG_ROOT_NFS=y | 888 | CONFIG_ROOT_NFS=y |
808 | CONFIG_LOCKD=y | 889 | CONFIG_LOCKD=y |
809 | CONFIG_LOCKD_V4=y | 890 | CONFIG_LOCKD_V4=y |
891 | CONFIG_NFS_COMMON=y | ||
810 | CONFIG_SUNRPC=y | 892 | CONFIG_SUNRPC=y |
811 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 893 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
812 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 894 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
@@ -815,6 +897,7 @@ CONFIG_SUNRPC=y | |||
815 | # CONFIG_NCP_FS is not set | 897 | # CONFIG_NCP_FS is not set |
816 | # CONFIG_CODA_FS is not set | 898 | # CONFIG_CODA_FS is not set |
817 | # CONFIG_AFS_FS is not set | 899 | # CONFIG_AFS_FS is not set |
900 | # CONFIG_9P_FS is not set | ||
818 | 901 | ||
819 | # | 902 | # |
820 | # Partition Types | 903 | # Partition Types |
@@ -831,6 +914,7 @@ CONFIG_MSDOS_PARTITION=y | |||
831 | # Library routines | 914 | # Library routines |
832 | # | 915 | # |
833 | # CONFIG_CRC_CCITT is not set | 916 | # CONFIG_CRC_CCITT is not set |
917 | # CONFIG_CRC16 is not set | ||
834 | CONFIG_CRC32=y | 918 | CONFIG_CRC32=y |
835 | # CONFIG_LIBCRC32C is not set | 919 | # CONFIG_LIBCRC32C is not set |
836 | 920 | ||
@@ -842,8 +926,10 @@ CONFIG_CRC32=y | |||
842 | # | 926 | # |
843 | # Kernel hacking | 927 | # Kernel hacking |
844 | # | 928 | # |
845 | # CONFIG_DEBUG_KERNEL is not set | ||
846 | # CONFIG_PRINTK_TIME is not set | 929 | # CONFIG_PRINTK_TIME is not set |
930 | # CONFIG_DEBUG_KERNEL is not set | ||
931 | CONFIG_LOG_BUF_SHIFT=14 | ||
932 | # CONFIG_SERIAL_TEXT_DEBUG is not set | ||
847 | 933 | ||
848 | # | 934 | # |
849 | # Security options | 935 | # Security options |
diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c index 169dbf6534b9..2b53afae0e9c 100644 --- a/arch/ppc/platforms/katana.c +++ b/arch/ppc/platforms/katana.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/bootimg.h> | 33 | #include <linux/bootimg.h> |
34 | #endif | 34 | #endif |
35 | #include <asm/io.h> | 35 | #include <asm/io.h> |
36 | #include <asm/unistd.h> | ||
36 | #include <asm/page.h> | 37 | #include <asm/page.h> |
37 | #include <asm/time.h> | 38 | #include <asm/time.h> |
38 | #include <asm/smp.h> | 39 | #include <asm/smp.h> |
@@ -42,15 +43,14 @@ | |||
42 | #include <asm/mv64x60.h> | 43 | #include <asm/mv64x60.h> |
43 | #include <platforms/katana.h> | 44 | #include <platforms/katana.h> |
44 | 45 | ||
45 | static struct mv64x60_handle bh; | 46 | static struct mv64x60_handle bh; |
46 | static katana_id_t katana_id; | 47 | static katana_id_t katana_id; |
47 | static void __iomem *cpld_base; | 48 | static void __iomem *cpld_base; |
48 | static void __iomem *sram_base; | 49 | static void __iomem *sram_base; |
49 | 50 | static u32 katana_flash_size_0; | |
50 | static u32 katana_flash_size_0; | 51 | static u32 katana_flash_size_1; |
51 | static u32 katana_flash_size_1; | 52 | static u32 katana_bus_frequency; |
52 | 53 | static struct pci_controller katana_hose_a; | |
53 | static u32 katana_bus_frequency; | ||
54 | 54 | ||
55 | unsigned char __res[sizeof(bd_t)]; | 55 | unsigned char __res[sizeof(bd_t)]; |
56 | 56 | ||
@@ -71,8 +71,12 @@ katana_irq_lookup_750i(unsigned char idsel, unsigned char pin) | |||
71 | KATANA_PCI_INTA_IRQ_750i, KATANA_PCI_INTB_IRQ_750i }, | 71 | KATANA_PCI_INTA_IRQ_750i, KATANA_PCI_INTB_IRQ_750i }, |
72 | /* IDSEL 6 (T8110) */ | 72 | /* IDSEL 6 (T8110) */ |
73 | {KATANA_PCI_INTD_IRQ_750i, 0, 0, 0 }, | 73 | {KATANA_PCI_INTD_IRQ_750i, 0, 0, 0 }, |
74 | /* IDSEL 7 (unused) */ | ||
75 | {0, 0, 0, 0 }, | ||
76 | /* IDSEL 8 (Intel 82544) (752i only but doesn't harm 750i) */ | ||
77 | {KATANA_PCI_INTD_IRQ_750i, 0, 0, 0 }, | ||
74 | }; | 78 | }; |
75 | const long min_idsel = 4, max_idsel = 6, irqs_per_slot = 4; | 79 | const long min_idsel = 4, max_idsel = 8, irqs_per_slot = 4; |
76 | 80 | ||
77 | return PCI_IRQ_TABLE_LOOKUP; | 81 | return PCI_IRQ_TABLE_LOOKUP; |
78 | } | 82 | } |
@@ -148,7 +152,7 @@ katana_get_proc_num(void) | |||
148 | save_exclude = mv64x60_pci_exclude_bridge; | 152 | save_exclude = mv64x60_pci_exclude_bridge; |
149 | mv64x60_pci_exclude_bridge = 0; | 153 | mv64x60_pci_exclude_bridge = 0; |
150 | 154 | ||
151 | early_read_config_word(bh.hose_a, 0, | 155 | early_read_config_word(bh.hose_b, 0, |
152 | PCI_DEVFN(0,0), PCI_DEVICE_ID, &val); | 156 | PCI_DEVFN(0,0), PCI_DEVICE_ID, &val); |
153 | 157 | ||
154 | mv64x60_pci_exclude_bridge = save_exclude; | 158 | mv64x60_pci_exclude_bridge = save_exclude; |
@@ -191,7 +195,8 @@ katana_setup_bridge(void) | |||
191 | struct mv64x60_setup_info si; | 195 | struct mv64x60_setup_info si; |
192 | void __iomem *vaddr; | 196 | void __iomem *vaddr; |
193 | int i; | 197 | int i; |
194 | u16 val; | 198 | u32 v; |
199 | u16 val, type; | ||
195 | u8 save_exclude; | 200 | u8 save_exclude; |
196 | 201 | ||
197 | /* | 202 | /* |
@@ -222,6 +227,20 @@ katana_setup_bridge(void) | |||
222 | PCI_DEVICE_ID, val); | 227 | PCI_DEVICE_ID, val); |
223 | } | 228 | } |
224 | 229 | ||
230 | /* | ||
231 | * While we're in here, set the hotswap register correctly. | ||
232 | * Turn off blue LED; mask ENUM#, clear insertion & extraction bits. | ||
233 | */ | ||
234 | early_read_config_dword(&hose, 0, PCI_DEVFN(0, 0), | ||
235 | MV64360_PCICFG_CPCI_HOTSWAP, &v); | ||
236 | v &= ~(1<<19); | ||
237 | v |= ((1<<17) | (1<<22) | (1<<23)); | ||
238 | early_write_config_dword(&hose, 0, PCI_DEVFN(0, 0), | ||
239 | MV64360_PCICFG_CPCI_HOTSWAP, v); | ||
240 | |||
241 | /* While we're at it, grab the bridge type for later */ | ||
242 | early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_DEVICE_ID, &type); | ||
243 | |||
225 | mv64x60_pci_exclude_bridge = save_exclude; | 244 | mv64x60_pci_exclude_bridge = save_exclude; |
226 | iounmap(vaddr); | 245 | iounmap(vaddr); |
227 | 246 | ||
@@ -251,21 +270,23 @@ katana_setup_bridge(void) | |||
251 | si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; | 270 | si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; |
252 | 271 | ||
253 | si.pci_1.acc_cntl_options[i] = | 272 | si.pci_1.acc_cntl_options[i] = |
254 | MV64360_PCI_ACC_CNTL_SNOOP_NONE | | 273 | MV64360_PCI_ACC_CNTL_SNOOP_NONE | |
255 | MV64360_PCI_ACC_CNTL_SWAP_NONE | | 274 | MV64360_PCI_ACC_CNTL_SWAP_NONE | |
256 | MV64360_PCI_ACC_CNTL_MBURST_128_BYTES | | 275 | MV64360_PCI_ACC_CNTL_MBURST_128_BYTES | |
257 | MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; | 276 | MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; |
258 | #else | 277 | #else |
259 | si.cpu_prot_options[i] = 0; | 278 | si.cpu_prot_options[i] = 0; |
260 | si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE; /* errata */ | 279 | si.enet_options[i] = MV64360_ENET2MEM_SNOOP_WB; |
261 | si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE; /* errata */ | 280 | si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_WB; |
262 | si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; /* errata */ | 281 | si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_WB; |
263 | 282 | ||
264 | si.pci_1.acc_cntl_options[i] = | 283 | si.pci_1.acc_cntl_options[i] = |
265 | MV64360_PCI_ACC_CNTL_SNOOP_WB | | 284 | MV64360_PCI_ACC_CNTL_SNOOP_WB | |
266 | MV64360_PCI_ACC_CNTL_SWAP_NONE | | 285 | MV64360_PCI_ACC_CNTL_SWAP_NONE | |
267 | MV64360_PCI_ACC_CNTL_MBURST_32_BYTES | | 286 | MV64360_PCI_ACC_CNTL_MBURST_32_BYTES | |
268 | MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES; | 287 | ((type == PCI_DEVICE_ID_MARVELL_MV64360) ? |
288 | MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES : | ||
289 | MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES); | ||
269 | #endif | 290 | #endif |
270 | } | 291 | } |
271 | 292 | ||
@@ -281,12 +302,26 @@ katana_setup_bridge(void) | |||
281 | mv64x60_set_bus(&bh, 1, 0); | 302 | mv64x60_set_bus(&bh, 1, 0); |
282 | bh.hose_b->first_busno = 0; | 303 | bh.hose_b->first_busno = 0; |
283 | bh.hose_b->last_busno = 0xff; | 304 | bh.hose_b->last_busno = 0xff; |
305 | |||
306 | /* | ||
307 | * Need to access hotswap reg which is in the pci config area of the | ||
308 | * bridge's hose 0. Note that pcibios_alloc_controller() can't be used | ||
309 | * to alloc hose_a b/c that would make hose 0 known to the generic | ||
310 | * pci code which we don't want. | ||
311 | */ | ||
312 | bh.hose_a = &katana_hose_a; | ||
313 | setup_indirect_pci_nomap(bh.hose_a, | ||
314 | bh.v_base + MV64x60_PCI0_CONFIG_ADDR, | ||
315 | bh.v_base + MV64x60_PCI0_CONFIG_DATA); | ||
284 | } | 316 | } |
285 | 317 | ||
286 | /* Bridge & platform setup routines */ | 318 | /* Bridge & platform setup routines */ |
287 | void __init | 319 | void __init |
288 | katana_intr_setup(void) | 320 | katana_intr_setup(void) |
289 | { | 321 | { |
322 | if (bh.type == MV64x60_TYPE_MV64460) /* As per instns from Marvell */ | ||
323 | mv64x60_clr_bits(&bh, MV64x60_CPU_MASTER_CNTL, 1 << 15); | ||
324 | |||
290 | /* MPP 8, 9, and 10 */ | 325 | /* MPP 8, 9, and 10 */ |
291 | mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0xfff); | 326 | mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0xfff); |
292 | 327 | ||
@@ -309,9 +344,16 @@ katana_intr_setup(void) | |||
309 | /* Config GPP intr ctlr to respond to level trigger */ | 344 | /* Config GPP intr ctlr to respond to level trigger */ |
310 | mv64x60_set_bits(&bh, MV64x60_COMM_ARBITER_CNTL, (1<<10)); | 345 | mv64x60_set_bits(&bh, MV64x60_COMM_ARBITER_CNTL, (1<<10)); |
311 | 346 | ||
312 | /* Erranum FEr PCI-#8 */ | 347 | if (bh.type == MV64x60_TYPE_MV64360) { |
313 | mv64x60_clr_bits(&bh, MV64x60_PCI0_CMD, (1<<5) | (1<<9)); | 348 | /* Erratum FEr PCI-#9 */ |
314 | mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1<<5) | (1<<9)); | 349 | mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, |
350 | (1<<4) | (1<<5) | (1<<6) | (1<<7)); | ||
351 | mv64x60_set_bits(&bh, MV64x60_PCI1_CMD, (1<<8) | (1<<9)); | ||
352 | } else { | ||
353 | mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1<<6) | (1<<7)); | ||
354 | mv64x60_set_bits(&bh, MV64x60_PCI1_CMD, | ||
355 | (1<<4) | (1<<5) | (1<<8) | (1<<9)); | ||
356 | } | ||
315 | 357 | ||
316 | /* | 358 | /* |
317 | * Dismiss and then enable interrupt on GPP interrupt cause | 359 | * Dismiss and then enable interrupt on GPP interrupt cause |
@@ -473,17 +515,46 @@ katana_setup_arch(void) | |||
473 | ppc_md.progress("katana_setup_arch: exit", 0); | 515 | ppc_md.progress("katana_setup_arch: exit", 0); |
474 | } | 516 | } |
475 | 517 | ||
518 | void | ||
519 | katana_fixup_resources(struct pci_dev *dev) | ||
520 | { | ||
521 | u16 v16; | ||
522 | |||
523 | pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_LINE_SIZE>>2); | ||
524 | |||
525 | pci_read_config_word(dev, PCI_COMMAND, &v16); | ||
526 | v16 |= PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK; | ||
527 | pci_write_config_word(dev, PCI_COMMAND, v16); | ||
528 | } | ||
529 | |||
530 | static const unsigned int cpu_750xx[32] = { /* 750FX & 750GX */ | ||
531 | 0, 0, 2, 2, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,/* 0-15*/ | ||
532 | 16, 17, 18, 19, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 0 /*16-31*/ | ||
533 | }; | ||
534 | |||
535 | static int | ||
536 | katana_get_cpu_freq(void) | ||
537 | { | ||
538 | unsigned long pll_cfg; | ||
539 | |||
540 | pll_cfg = (mfspr(SPRN_HID1) & 0xf8000000) >> 27; | ||
541 | return katana_bus_frequency * cpu_750xx[pll_cfg]/2; | ||
542 | } | ||
543 | |||
476 | /* Platform device data fixup routines. */ | 544 | /* Platform device data fixup routines. */ |
477 | #if defined(CONFIG_SERIAL_MPSC) | 545 | #if defined(CONFIG_SERIAL_MPSC) |
478 | static void __init | 546 | static void __init |
479 | katana_fixup_mpsc_pdata(struct platform_device *pdev) | 547 | katana_fixup_mpsc_pdata(struct platform_device *pdev) |
480 | { | 548 | { |
481 | struct mpsc_pdata *pdata; | 549 | struct mpsc_pdata *pdata = (struct mpsc_pdata *)pdev->dev.platform_data; |
550 | bd_t *bdp = (bd_t *)__res; | ||
482 | 551 | ||
483 | pdata = (struct mpsc_pdata *)pdev->dev.platform_data; | 552 | if (bdp->bi_baudrate) |
553 | pdata->default_baud = bdp->bi_baudrate; | ||
554 | else | ||
555 | pdata->default_baud = KATANA_DEFAULT_BAUD; | ||
484 | 556 | ||
485 | pdata->max_idle = 40; | 557 | pdata->max_idle = 40; |
486 | pdata->default_baud = KATANA_DEFAULT_BAUD; | ||
487 | pdata->brg_clk_src = KATANA_MPSC_CLK_SRC; | 558 | pdata->brg_clk_src = KATANA_MPSC_CLK_SRC; |
488 | /* | 559 | /* |
489 | * TCLK (not SysCLk) is routed to BRG, then to the MPSC. On most parts, | 560 | * TCLK (not SysCLk) is routed to BRG, then to the MPSC. On most parts, |
@@ -513,6 +584,18 @@ katana_fixup_eth_pdata(struct platform_device *pdev) | |||
513 | } | 584 | } |
514 | #endif | 585 | #endif |
515 | 586 | ||
587 | #if defined(CONFIG_SYSFS) | ||
588 | static void __init | ||
589 | katana_fixup_mv64xxx_pdata(struct platform_device *pdev) | ||
590 | { | ||
591 | struct mv64xxx_pdata *pdata = (struct mv64xxx_pdata *) | ||
592 | pdev->dev.platform_data; | ||
593 | |||
594 | /* Katana supports the mv64xxx hotswap register */ | ||
595 | pdata->hs_reg_valid = 1; | ||
596 | } | ||
597 | #endif | ||
598 | |||
516 | static int __init | 599 | static int __init |
517 | katana_platform_notify(struct device *dev) | 600 | katana_platform_notify(struct device *dev) |
518 | { | 601 | { |
@@ -529,6 +612,9 @@ katana_platform_notify(struct device *dev) | |||
529 | { MV643XX_ETH_NAME ".1", katana_fixup_eth_pdata }, | 612 | { MV643XX_ETH_NAME ".1", katana_fixup_eth_pdata }, |
530 | { MV643XX_ETH_NAME ".2", katana_fixup_eth_pdata }, | 613 | { MV643XX_ETH_NAME ".2", katana_fixup_eth_pdata }, |
531 | #endif | 614 | #endif |
615 | #if defined(CONFIG_SYSFS) | ||
616 | { MV64XXX_DEV_NAME ".0", katana_fixup_mv64xxx_pdata }, | ||
617 | #endif | ||
532 | }; | 618 | }; |
533 | struct platform_device *pdev; | 619 | struct platform_device *pdev; |
534 | int i; | 620 | int i; |
@@ -536,8 +622,7 @@ katana_platform_notify(struct device *dev) | |||
536 | if (dev && dev->bus_id) | 622 | if (dev && dev->bus_id) |
537 | for (i=0; i<ARRAY_SIZE(dev_map); i++) | 623 | for (i=0; i<ARRAY_SIZE(dev_map); i++) |
538 | if (!strncmp(dev->bus_id, dev_map[i].bus_id, | 624 | if (!strncmp(dev->bus_id, dev_map[i].bus_id, |
539 | BUS_ID_SIZE)) { | 625 | BUS_ID_SIZE)) { |
540 | |||
541 | pdev = container_of(dev, | 626 | pdev = container_of(dev, |
542 | struct platform_device, dev); | 627 | struct platform_device, dev); |
543 | dev_map[i].rtn(pdev); | 628 | dev_map[i].rtn(pdev); |
@@ -578,8 +663,7 @@ katana_setup_mtd(void) | |||
578 | ptbl_entries = (size >= (64*MB)) ? 6 : 4; | 663 | ptbl_entries = (size >= (64*MB)) ? 6 : 4; |
579 | 664 | ||
580 | if ((ptbl = kmalloc(ptbl_entries * sizeof(struct mtd_partition), | 665 | if ((ptbl = kmalloc(ptbl_entries * sizeof(struct mtd_partition), |
581 | GFP_KERNEL)) == NULL) { | 666 | GFP_KERNEL)) == NULL) { |
582 | |||
583 | printk(KERN_WARNING "Can't alloc MTD partition table\n"); | 667 | printk(KERN_WARNING "Can't alloc MTD partition table\n"); |
584 | return -ENOMEM; | 668 | return -ENOMEM; |
585 | } | 669 | } |
@@ -611,7 +695,6 @@ katana_setup_mtd(void) | |||
611 | physmap_set_partitions(ptbl, ptbl_entries); | 695 | physmap_set_partitions(ptbl, ptbl_entries); |
612 | return 0; | 696 | return 0; |
613 | } | 697 | } |
614 | |||
615 | arch_initcall(katana_setup_mtd); | 698 | arch_initcall(katana_setup_mtd); |
616 | #endif | 699 | #endif |
617 | 700 | ||
@@ -632,7 +715,22 @@ katana_halt(void) | |||
632 | { | 715 | { |
633 | u8 v; | 716 | u8 v; |
634 | 717 | ||
635 | if (katana_id == KATANA_ID_752I) { | 718 | /* Turn on blue LED to indicate its okay to remove */ |
719 | if (katana_id == KATANA_ID_750I) { | ||
720 | u32 v; | ||
721 | u8 save_exclude; | ||
722 | |||
723 | /* Set LOO bit in cPCI HotSwap reg of hose 0 to turn on LED. */ | ||
724 | save_exclude = mv64x60_pci_exclude_bridge; | ||
725 | mv64x60_pci_exclude_bridge = 0; | ||
726 | early_read_config_dword(bh.hose_a, 0, PCI_DEVFN(0, 0), | ||
727 | MV64360_PCICFG_CPCI_HOTSWAP, &v); | ||
728 | v &= 0xff; | ||
729 | v |= (1 << 19); | ||
730 | early_write_config_dword(bh.hose_a, 0, PCI_DEVFN(0, 0), | ||
731 | MV64360_PCICFG_CPCI_HOTSWAP, v); | ||
732 | mv64x60_pci_exclude_bridge = save_exclude; | ||
733 | } else if (katana_id == KATANA_ID_752I) { | ||
636 | v = in_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF); | 734 | v = in_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF); |
637 | v |= HSL_PLD_HOT_SWAP_LED_BIT; | 735 | v |= HSL_PLD_HOT_SWAP_LED_BIT; |
638 | out_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF, v); | 736 | out_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF, v); |
@@ -652,37 +750,65 @@ katana_power_off(void) | |||
652 | static int | 750 | static int |
653 | katana_show_cpuinfo(struct seq_file *m) | 751 | katana_show_cpuinfo(struct seq_file *m) |
654 | { | 752 | { |
753 | char *s; | ||
754 | |||
755 | seq_printf(m, "cpu freq\t: %dMHz\n", | ||
756 | (katana_get_cpu_freq() + 500000) / 1000000); | ||
757 | seq_printf(m, "bus freq\t: %ldMHz\n", | ||
758 | ((long)katana_bus_frequency + 500000) / 1000000); | ||
655 | seq_printf(m, "vendor\t\t: Artesyn Communication Products, LLC\n"); | 759 | seq_printf(m, "vendor\t\t: Artesyn Communication Products, LLC\n"); |
656 | 760 | ||
657 | seq_printf(m, "board\t\t: "); | 761 | seq_printf(m, "board\t\t: "); |
658 | |||
659 | switch (katana_id) { | 762 | switch (katana_id) { |
660 | case KATANA_ID_3750: | 763 | case KATANA_ID_3750: |
661 | seq_printf(m, "Katana 3750\n"); | 764 | seq_printf(m, "Katana 3750"); |
662 | break; | 765 | break; |
663 | 766 | ||
664 | case KATANA_ID_750I: | 767 | case KATANA_ID_750I: |
665 | seq_printf(m, "Katana 750i\n"); | 768 | seq_printf(m, "Katana 750i"); |
666 | break; | 769 | break; |
667 | 770 | ||
668 | case KATANA_ID_752I: | 771 | case KATANA_ID_752I: |
669 | seq_printf(m, "Katana 752i\n"); | 772 | seq_printf(m, "Katana 752i"); |
670 | break; | 773 | break; |
671 | 774 | ||
672 | default: | 775 | default: |
673 | seq_printf(m, "Unknown\n"); | 776 | seq_printf(m, "Unknown"); |
674 | break; | 777 | break; |
675 | } | 778 | } |
676 | 779 | seq_printf(m, " (product id: 0x%x)\n", | |
677 | seq_printf(m, "product ID\t: 0x%x\n", | ||
678 | in_8(cpld_base + KATANA_CPLD_PRODUCT_ID)); | 780 | in_8(cpld_base + KATANA_CPLD_PRODUCT_ID)); |
781 | |||
782 | seq_printf(m, "pci mode\t: %sMonarch\n", | ||
783 | katana_is_monarch()? "" : "Non-"); | ||
679 | seq_printf(m, "hardware rev\t: 0x%x\n", | 784 | seq_printf(m, "hardware rev\t: 0x%x\n", |
680 | in_8(cpld_base+KATANA_CPLD_HARDWARE_VER)); | 785 | in_8(cpld_base+KATANA_CPLD_HARDWARE_VER)); |
681 | seq_printf(m, "PLD rev\t\t: 0x%x\n", | 786 | seq_printf(m, "pld rev\t\t: 0x%x\n", |
682 | in_8(cpld_base + KATANA_CPLD_PLD_VER)); | 787 | in_8(cpld_base + KATANA_CPLD_PLD_VER)); |
683 | seq_printf(m, "PLB freq\t: %ldMhz\n", | 788 | |
684 | (long)katana_bus_frequency / 1000000); | 789 | switch(bh.type) { |
685 | seq_printf(m, "PCI\t\t: %sMonarch\n", katana_is_monarch()? "" : "Non-"); | 790 | case MV64x60_TYPE_GT64260A: |
791 | s = "gt64260a"; | ||
792 | break; | ||
793 | case MV64x60_TYPE_GT64260B: | ||
794 | s = "gt64260b"; | ||
795 | break; | ||
796 | case MV64x60_TYPE_MV64360: | ||
797 | s = "mv64360"; | ||
798 | break; | ||
799 | case MV64x60_TYPE_MV64460: | ||
800 | s = "mv64460"; | ||
801 | break; | ||
802 | default: | ||
803 | s = "Unknown"; | ||
804 | } | ||
805 | seq_printf(m, "bridge type\t: %s\n", s); | ||
806 | seq_printf(m, "bridge rev\t: 0x%x\n", bh.rev); | ||
807 | #if defined(CONFIG_NOT_COHERENT_CACHE) | ||
808 | seq_printf(m, "coherency\t: %s\n", "off"); | ||
809 | #else | ||
810 | seq_printf(m, "coherency\t: %s\n", "on"); | ||
811 | #endif | ||
686 | 812 | ||
687 | return 0; | 813 | return 0; |
688 | } | 814 | } |
@@ -701,11 +827,20 @@ katana_calibrate_decr(void) | |||
701 | tb_to_us = mulhwu_scale_factor(freq, 1000000); | 827 | tb_to_us = mulhwu_scale_factor(freq, 1000000); |
702 | } | 828 | } |
703 | 829 | ||
830 | /* | ||
831 | * The katana supports both uImage and zImage. If uImage, get the mem size | ||
832 | * from the bd info. If zImage, the bootwrapper adds a BI_MEMSIZE entry in | ||
833 | * the bi_rec data which is sucked out and put into boot_mem_size by | ||
834 | * parse_bootinfo(). MMU_init() will then use the boot_mem_size for the mem | ||
835 | * size and not call this routine. The only way this will fail is when a uImage | ||
836 | * is used but the fw doesn't pass in a valid bi_memsize. This should never | ||
837 | * happen, though. | ||
838 | */ | ||
704 | unsigned long __init | 839 | unsigned long __init |
705 | katana_find_end_of_memory(void) | 840 | katana_find_end_of_memory(void) |
706 | { | 841 | { |
707 | return mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE, | 842 | bd_t *bdp = (bd_t *)__res; |
708 | MV64x60_TYPE_MV64360); | 843 | return bdp->bi_memsize; |
709 | } | 844 | } |
710 | 845 | ||
711 | #if defined(CONFIG_I2C_MV64XXX) && defined(CONFIG_SENSORS_M41T00) | 846 | #if defined(CONFIG_I2C_MV64XXX) && defined(CONFIG_SENSORS_M41T00) |
@@ -729,15 +864,6 @@ katana_rtc_hookup(void) | |||
729 | late_initcall(katana_rtc_hookup); | 864 | late_initcall(katana_rtc_hookup); |
730 | #endif | 865 | #endif |
731 | 866 | ||
732 | static inline void | ||
733 | katana_set_bat(void) | ||
734 | { | ||
735 | mb(); | ||
736 | mtspr(SPRN_DBAT2U, 0xf0001ffe); | ||
737 | mtspr(SPRN_DBAT2L, 0xf000002a); | ||
738 | mb(); | ||
739 | } | ||
740 | |||
741 | #if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE) | 867 | #if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE) |
742 | static void __init | 868 | static void __init |
743 | katana_map_io(void) | 869 | katana_map_io(void) |
@@ -763,15 +889,24 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |||
763 | */ | 889 | */ |
764 | if (r3 && r6) { | 890 | if (r3 && r6) { |
765 | /* copy board info structure */ | 891 | /* copy board info structure */ |
766 | memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) ); | 892 | memcpy((void *)__res, (void *)(r3+KERNELBASE), sizeof(bd_t)); |
767 | /* copy command line */ | 893 | /* copy command line */ |
768 | *(char *)(r7+KERNELBASE) = 0; | 894 | *(char *)(r7+KERNELBASE) = 0; |
769 | strcpy(cmd_line, (char *)(r6+KERNELBASE)); | 895 | strcpy(cmd_line, (char *)(r6+KERNELBASE)); |
770 | } | 896 | } |
771 | 897 | ||
898 | #ifdef CONFIG_BLK_DEV_INITRD | ||
899 | /* take care of initrd if we have one */ | ||
900 | if (r4) { | ||
901 | initrd_start = r4 + KERNELBASE; | ||
902 | initrd_end = r5 + KERNELBASE; | ||
903 | } | ||
904 | #endif /* CONFIG_BLK_DEV_INITRD */ | ||
905 | |||
772 | isa_mem_base = 0; | 906 | isa_mem_base = 0; |
773 | 907 | ||
774 | ppc_md.setup_arch = katana_setup_arch; | 908 | ppc_md.setup_arch = katana_setup_arch; |
909 | ppc_md.pcibios_fixup_resources = katana_fixup_resources; | ||
775 | ppc_md.show_cpuinfo = katana_show_cpuinfo; | 910 | ppc_md.show_cpuinfo = katana_show_cpuinfo; |
776 | ppc_md.init_IRQ = mv64360_init_irq; | 911 | ppc_md.init_IRQ = mv64360_init_irq; |
777 | ppc_md.get_irq = mv64360_get_irq; | 912 | ppc_md.get_irq = mv64360_get_irq; |
@@ -790,6 +925,4 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | |||
790 | #if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) | 925 | #if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) |
791 | platform_notify = katana_platform_notify; | 926 | platform_notify = katana_platform_notify; |
792 | #endif | 927 | #endif |
793 | |||
794 | katana_set_bat(); /* Need for katana_find_end_of_memory and progress */ | ||
795 | } | 928 | } |
diff --git a/arch/ppc/platforms/katana.h b/arch/ppc/platforms/katana.h index b82ed81950f5..597257eff2ec 100644 --- a/arch/ppc/platforms/katana.h +++ b/arch/ppc/platforms/katana.h | |||
@@ -56,14 +56,14 @@ | |||
56 | #define KATANA_PCI1_IO_SIZE 0x04000000 /* 64 MB */ | 56 | #define KATANA_PCI1_IO_SIZE 0x04000000 /* 64 MB */ |
57 | 57 | ||
58 | /* Board-specific IRQ info */ | 58 | /* Board-specific IRQ info */ |
59 | #define KATANA_PCI_INTA_IRQ_3750 64+8 | 59 | #define KATANA_PCI_INTA_IRQ_3750 (64+8) |
60 | #define KATANA_PCI_INTB_IRQ_3750 64+9 | 60 | #define KATANA_PCI_INTB_IRQ_3750 (64+9) |
61 | #define KATANA_PCI_INTC_IRQ_3750 64+10 | 61 | #define KATANA_PCI_INTC_IRQ_3750 (64+10) |
62 | 62 | ||
63 | #define KATANA_PCI_INTA_IRQ_750i 64+8 | 63 | #define KATANA_PCI_INTA_IRQ_750i (64+8) |
64 | #define KATANA_PCI_INTB_IRQ_750i 64+9 | 64 | #define KATANA_PCI_INTB_IRQ_750i (64+9) |
65 | #define KATANA_PCI_INTC_IRQ_750i 64+10 | 65 | #define KATANA_PCI_INTC_IRQ_750i (64+10) |
66 | #define KATANA_PCI_INTD_IRQ_750i 64+14 | 66 | #define KATANA_PCI_INTD_IRQ_750i (64+14) |
67 | 67 | ||
68 | #define KATANA_CPLD_RST_EVENT 0x00000000 | 68 | #define KATANA_CPLD_RST_EVENT 0x00000000 |
69 | #define KATANA_CPLD_RST_CMD 0x00001000 | 69 | #define KATANA_CPLD_RST_CMD 0x00001000 |