diff options
-rw-r--r-- | arch/arm/mach-mx2/mx27ads.c | 61 | ||||
-rw-r--r-- | arch/arm/mach-mx2/pcm038.c | 35 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h | 9 | ||||
-rw-r--r-- | arch/arm/plat-mxc/iomux-mx1-mx2.c | 37 |
4 files changed, 62 insertions, 80 deletions
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c index 56e22d3ca075..a06497674436 100644 --- a/arch/arm/mach-mx2/mx27ads.c +++ b/arch/arm/mach-mx2/mx27ads.c | |||
@@ -68,15 +68,14 @@ static int mxc_uart0_pins[] = { | |||
68 | static int uart_mxc_port0_init(struct platform_device *pdev) | 68 | static int uart_mxc_port0_init(struct platform_device *pdev) |
69 | { | 69 | { |
70 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | 70 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, |
71 | ARRAY_SIZE(mxc_uart0_pins), | 71 | ARRAY_SIZE(mxc_uart0_pins), "UART0"); |
72 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART0"); | ||
73 | } | 72 | } |
74 | 73 | ||
75 | static int uart_mxc_port0_exit(struct platform_device *pdev) | 74 | static int uart_mxc_port0_exit(struct platform_device *pdev) |
76 | { | 75 | { |
77 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | 76 | mxc_gpio_release_multiple_pins(mxc_uart0_pins, |
78 | ARRAY_SIZE(mxc_uart0_pins), | 77 | ARRAY_SIZE(mxc_uart0_pins)); |
79 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART0"); | 78 | return 0; |
80 | } | 79 | } |
81 | 80 | ||
82 | static int mxc_uart1_pins[] = { | 81 | static int mxc_uart1_pins[] = { |
@@ -89,15 +88,14 @@ static int mxc_uart1_pins[] = { | |||
89 | static int uart_mxc_port1_init(struct platform_device *pdev) | 88 | static int uart_mxc_port1_init(struct platform_device *pdev) |
90 | { | 89 | { |
91 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | 90 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, |
92 | ARRAY_SIZE(mxc_uart1_pins), | 91 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); |
93 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART1"); | ||
94 | } | 92 | } |
95 | 93 | ||
96 | static int uart_mxc_port1_exit(struct platform_device *pdev) | 94 | static int uart_mxc_port1_exit(struct platform_device *pdev) |
97 | { | 95 | { |
98 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | 96 | mxc_gpio_setup_release_pins(mxc_uart1_pins, |
99 | ARRAY_SIZE(mxc_uart1_pins), | 97 | ARRAY_SIZE(mxc_uart1_pins)); |
100 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART1"); | 98 | return 0; |
101 | } | 99 | } |
102 | 100 | ||
103 | static int mxc_uart2_pins[] = { | 101 | static int mxc_uart2_pins[] = { |
@@ -110,15 +108,14 @@ static int mxc_uart2_pins[] = { | |||
110 | static int uart_mxc_port2_init(struct platform_device *pdev) | 108 | static int uart_mxc_port2_init(struct platform_device *pdev) |
111 | { | 109 | { |
112 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | 110 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, |
113 | ARRAY_SIZE(mxc_uart2_pins), | 111 | ARRAY_SIZE(mxc_uart2_pins), "UART2"); |
114 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART2"); | ||
115 | } | 112 | } |
116 | 113 | ||
117 | static int uart_mxc_port2_exit(struct platform_device *pdev) | 114 | static int uart_mxc_port2_exit(struct platform_device *pdev) |
118 | { | 115 | { |
119 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | 116 | mxc_gpio_release_multiple_pins(mxc_uart2_pins, |
120 | ARRAY_SIZE(mxc_uart2_pins), | 117 | ARRAY_SIZE(mxc_uart2_pins)); |
121 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART2"); | 118 | return 0; |
122 | } | 119 | } |
123 | 120 | ||
124 | static int mxc_uart3_pins[] = { | 121 | static int mxc_uart3_pins[] = { |
@@ -131,15 +128,13 @@ static int mxc_uart3_pins[] = { | |||
131 | static int uart_mxc_port3_init(struct platform_device *pdev) | 128 | static int uart_mxc_port3_init(struct platform_device *pdev) |
132 | { | 129 | { |
133 | return mxc_gpio_setup_multiple_pins(mxc_uart3_pins, | 130 | return mxc_gpio_setup_multiple_pins(mxc_uart3_pins, |
134 | ARRAY_SIZE(mxc_uart3_pins), | 131 | ARRAY_SIZE(mxc_uart3_pins), "UART3"); |
135 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART3"); | ||
136 | } | 132 | } |
137 | 133 | ||
138 | static int uart_mxc_port3_exit(struct platform_device *pdev) | 134 | static int uart_mxc_port3_exit(struct platform_device *pdev) |
139 | { | 135 | { |
140 | return mxc_gpio_setup_multiple_pins(mxc_uart3_pins, | 136 | mxc_gpio_release_multiple_pins(mxc_uart3_pins, |
141 | ARRAY_SIZE(mxc_uart3_pins), | 137 | ARRAY_SIZE(mxc_uart3_pins)); |
142 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART3"); | ||
143 | } | 138 | } |
144 | 139 | ||
145 | static int mxc_uart4_pins[] = { | 140 | static int mxc_uart4_pins[] = { |
@@ -152,15 +147,14 @@ static int mxc_uart4_pins[] = { | |||
152 | static int uart_mxc_port4_init(struct platform_device *pdev) | 147 | static int uart_mxc_port4_init(struct platform_device *pdev) |
153 | { | 148 | { |
154 | return mxc_gpio_setup_multiple_pins(mxc_uart4_pins, | 149 | return mxc_gpio_setup_multiple_pins(mxc_uart4_pins, |
155 | ARRAY_SIZE(mxc_uart4_pins), | 150 | ARRAY_SIZE(mxc_uart4_pins), "UART4"); |
156 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART4"); | ||
157 | } | 151 | } |
158 | 152 | ||
159 | static int uart_mxc_port4_exit(struct platform_device *pdev) | 153 | static int uart_mxc_port4_exit(struct platform_device *pdev) |
160 | { | 154 | { |
161 | return mxc_gpio_setup_multiple_pins(mxc_uart4_pins, | 155 | mxc_gpio_release_multiple_pins(mxc_uart4_pins, |
162 | ARRAY_SIZE(mxc_uart4_pins), | 156 | ARRAY_SIZE(mxc_uart4_pins)); |
163 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART4"); | 157 | return 0; |
164 | } | 158 | } |
165 | 159 | ||
166 | static int mxc_uart5_pins[] = { | 160 | static int mxc_uart5_pins[] = { |
@@ -173,15 +167,14 @@ static int mxc_uart5_pins[] = { | |||
173 | static int uart_mxc_port5_init(struct platform_device *pdev) | 167 | static int uart_mxc_port5_init(struct platform_device *pdev) |
174 | { | 168 | { |
175 | return mxc_gpio_setup_multiple_pins(mxc_uart5_pins, | 169 | return mxc_gpio_setup_multiple_pins(mxc_uart5_pins, |
176 | ARRAY_SIZE(mxc_uart5_pins), | 170 | ARRAY_SIZE(mxc_uart5_pins), "UART5"); |
177 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART5"); | ||
178 | } | 171 | } |
179 | 172 | ||
180 | static int uart_mxc_port5_exit(struct platform_device *pdev) | 173 | static int uart_mxc_port5_exit(struct platform_device *pdev) |
181 | { | 174 | { |
182 | return mxc_gpio_setup_multiple_pins(mxc_uart5_pins, | 175 | mxc_gpio_release_multiple_pins(mxc_uart5_pins, |
183 | ARRAY_SIZE(mxc_uart5_pins), | 176 | ARRAY_SIZE(mxc_uart5_pins)); |
184 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART5"); | 177 | return 0; |
185 | } | 178 | } |
186 | 179 | ||
187 | static struct platform_device *platform_devices[] __initdata = { | 180 | static struct platform_device *platform_devices[] __initdata = { |
@@ -212,15 +205,13 @@ static int mxc_fec_pins[] = { | |||
212 | static void gpio_fec_active(void) | 205 | static void gpio_fec_active(void) |
213 | { | 206 | { |
214 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | 207 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, |
215 | ARRAY_SIZE(mxc_fec_pins), | 208 | ARRAY_SIZE(mxc_fec_pins), "FEC"); |
216 | MXC_GPIO_ALLOC_MODE_NORMAL, "FEC"); | ||
217 | } | 209 | } |
218 | 210 | ||
219 | static void gpio_fec_inactive(void) | 211 | static void gpio_fec_inactive(void) |
220 | { | 212 | { |
221 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | 213 | mxc_gpio_release_multiple_pins(mxc_fec_pins, |
222 | ARRAY_SIZE(mxc_fec_pins), | 214 | ARRAY_SIZE(mxc_fec_pins)); |
223 | MXC_GPIO_ALLOC_MODE_RELEASE, "FEC"); | ||
224 | } | 215 | } |
225 | 216 | ||
226 | static struct imxuart_platform_data uart_pdata[] = { | 217 | static struct imxuart_platform_data uart_pdata[] = { |
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c index ac516b1d3f77..91a1e4bbccbc 100644 --- a/arch/arm/mach-mx2/pcm038.c +++ b/arch/arm/mach-mx2/pcm038.c | |||
@@ -64,15 +64,14 @@ static int mxc_uart0_pins[] = { | |||
64 | static int uart_mxc_port0_init(struct platform_device *pdev) | 64 | static int uart_mxc_port0_init(struct platform_device *pdev) |
65 | { | 65 | { |
66 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | 66 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, |
67 | ARRAY_SIZE(mxc_uart0_pins), | 67 | ARRAY_SIZE(mxc_uart0_pins), "UART0"); |
68 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART0"); | ||
69 | } | 68 | } |
70 | 69 | ||
71 | static int uart_mxc_port0_exit(struct platform_device *pdev) | 70 | static int uart_mxc_port0_exit(struct platform_device *pdev) |
72 | { | 71 | { |
73 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | 72 | mxc_gpio_release_multiple_pins(mxc_uart0_pins, |
74 | ARRAY_SIZE(mxc_uart0_pins), | 73 | ARRAY_SIZE(mxc_uart0_pins)); |
75 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART0"); | 74 | return 0; |
76 | } | 75 | } |
77 | 76 | ||
78 | static int mxc_uart1_pins[] = { | 77 | static int mxc_uart1_pins[] = { |
@@ -85,15 +84,14 @@ static int mxc_uart1_pins[] = { | |||
85 | static int uart_mxc_port1_init(struct platform_device *pdev) | 84 | static int uart_mxc_port1_init(struct platform_device *pdev) |
86 | { | 85 | { |
87 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | 86 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, |
88 | ARRAY_SIZE(mxc_uart1_pins), | 87 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); |
89 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART1"); | ||
90 | } | 88 | } |
91 | 89 | ||
92 | static int uart_mxc_port1_exit(struct platform_device *pdev) | 90 | static int uart_mxc_port1_exit(struct platform_device *pdev) |
93 | { | 91 | { |
94 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | 92 | mxc_gpio_release_multiple_pins(mxc_uart1_pins, |
95 | ARRAY_SIZE(mxc_uart1_pins), | 93 | ARRAY_SIZE(mxc_uart1_pins)); |
96 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART1"); | 94 | return 0; |
97 | } | 95 | } |
98 | 96 | ||
99 | static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS, | 97 | static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS, |
@@ -104,15 +102,14 @@ static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS, | |||
104 | static int uart_mxc_port2_init(struct platform_device *pdev) | 102 | static int uart_mxc_port2_init(struct platform_device *pdev) |
105 | { | 103 | { |
106 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | 104 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, |
107 | ARRAY_SIZE(mxc_uart2_pins), | 105 | ARRAY_SIZE(mxc_uart2_pins), "UART2"); |
108 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART2"); | ||
109 | } | 106 | } |
110 | 107 | ||
111 | static int uart_mxc_port2_exit(struct platform_device *pdev) | 108 | static int uart_mxc_port2_exit(struct platform_device *pdev) |
112 | { | 109 | { |
113 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | 110 | mxc_gpio_release_multiple_pins(mxc_uart2_pins, |
114 | ARRAY_SIZE(mxc_uart2_pins), | 111 | ARRAY_SIZE(mxc_uart2_pins)); |
115 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART2"); | 112 | return 0; |
116 | } | 113 | } |
117 | 114 | ||
118 | static struct imxuart_platform_data uart_pdata[] = { | 115 | static struct imxuart_platform_data uart_pdata[] = { |
@@ -155,15 +152,13 @@ static int mxc_fec_pins[] = { | |||
155 | static void gpio_fec_active(void) | 152 | static void gpio_fec_active(void) |
156 | { | 153 | { |
157 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | 154 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, |
158 | ARRAY_SIZE(mxc_fec_pins), | 155 | ARRAY_SIZE(mxc_fec_pins), "FEC"); |
159 | MXC_GPIO_ALLOC_MODE_NORMAL, "FEC"); | ||
160 | } | 156 | } |
161 | 157 | ||
162 | static void gpio_fec_inactive(void) | 158 | static void gpio_fec_inactive(void) |
163 | { | 159 | { |
164 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | 160 | mxc_gpio_release_multiple_pins(mxc_fec_pins, |
165 | ARRAY_SIZE(mxc_fec_pins), | 161 | ARRAY_SIZE(mxc_fec_pins)); |
166 | MXC_GPIO_ALLOC_MODE_RELEASE, "FEC"); | ||
167 | } | 162 | } |
168 | 163 | ||
169 | static struct platform_device *platform_devices[] __initdata = { | 164 | static struct platform_device *platform_devices[] __initdata = { |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h index f49d798c5c3c..6c331c939c00 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h | |||
@@ -21,12 +21,6 @@ | |||
21 | 21 | ||
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | 23 | ||
24 | #define MXC_GPIO_ALLOC_MODE_NORMAL 0 | ||
25 | #define MXC_GPIO_ALLOC_MODE_NO_ALLOC 1 | ||
26 | #define MXC_GPIO_ALLOC_MODE_TRY_ALLOC 2 | ||
27 | #define MXC_GPIO_ALLOC_MODE_ALLOC_ONLY 4 | ||
28 | #define MXC_GPIO_ALLOC_MODE_RELEASE 8 | ||
29 | |||
30 | /* | 24 | /* |
31 | * GPIO Module and I/O Multiplexer | 25 | * GPIO Module and I/O Multiplexer |
32 | * x = 0..3 for reg_A, reg_B, reg_C, reg_D | 26 | * x = 0..3 for reg_A, reg_B, reg_C, reg_D |
@@ -103,7 +97,8 @@ | |||
103 | 97 | ||
104 | extern void mxc_gpio_mode(int gpio_mode); | 98 | extern void mxc_gpio_mode(int gpio_mode); |
105 | extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | 99 | extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, |
106 | int alloc_mode, const char *label); | 100 | const char *label); |
101 | extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); | ||
107 | 102 | ||
108 | /*-------------------------------------------------------------------------*/ | 103 | /*-------------------------------------------------------------------------*/ |
109 | 104 | ||
diff --git a/arch/arm/plat-mxc/iomux-mx1-mx2.c b/arch/arm/plat-mxc/iomux-mx1-mx2.c index d97387aa9a42..df6f18395686 100644 --- a/arch/arm/plat-mxc/iomux-mx1-mx2.c +++ b/arch/arm/plat-mxc/iomux-mx1-mx2.c | |||
@@ -110,12 +110,13 @@ void mxc_gpio_mode(int gpio_mode) | |||
110 | EXPORT_SYMBOL(mxc_gpio_mode); | 110 | EXPORT_SYMBOL(mxc_gpio_mode); |
111 | 111 | ||
112 | int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | 112 | int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, |
113 | int alloc_mode, const char *label) | 113 | const char *label) |
114 | { | 114 | { |
115 | const int *p = pin_list; | 115 | const int *p = pin_list; |
116 | int i; | 116 | int i; |
117 | unsigned gpio; | 117 | unsigned gpio; |
118 | unsigned mode; | 118 | unsigned mode; |
119 | int ret = -EINVAL; | ||
119 | 120 | ||
120 | for (i = 0; i < count; i++) { | 121 | for (i = 0; i < count; i++) { |
121 | gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK); | 122 | gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK); |
@@ -124,33 +125,33 @@ int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | |||
124 | if (gpio >= (GPIO_PORT_MAX + 1) * 32) | 125 | if (gpio >= (GPIO_PORT_MAX + 1) * 32) |
125 | goto setup_error; | 126 | goto setup_error; |
126 | 127 | ||
127 | if (alloc_mode & MXC_GPIO_ALLOC_MODE_RELEASE) | 128 | ret = gpio_request(gpio, label); |
128 | gpio_free(gpio); | 129 | if (ret) |
129 | else if (!(alloc_mode & MXC_GPIO_ALLOC_MODE_NO_ALLOC)) | 130 | goto setup_error; |
130 | if (gpio_request(gpio, label) | ||
131 | && !(alloc_mode & MXC_GPIO_ALLOC_MODE_TRY_ALLOC)) | ||
132 | goto setup_error; | ||
133 | 131 | ||
134 | if (!(alloc_mode & (MXC_GPIO_ALLOC_MODE_ALLOC_ONLY | | 132 | mxc_gpio_mode(gpio | mode); |
135 | MXC_GPIO_ALLOC_MODE_RELEASE))) | ||
136 | mxc_gpio_mode(gpio | mode); | ||
137 | 133 | ||
138 | p++; | 134 | p++; |
139 | } | 135 | } |
140 | return 0; | 136 | return 0; |
141 | 137 | ||
142 | setup_error: | 138 | setup_error: |
143 | if (alloc_mode & (MXC_GPIO_ALLOC_MODE_NO_ALLOC | | 139 | mxc_gpio_release_multiple_pins(pin_list, i); |
144 | MXC_GPIO_ALLOC_MODE_TRY_ALLOC)) | 140 | return ret; |
145 | return -EINVAL; | 141 | } |
142 | EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins); | ||
146 | 143 | ||
147 | while (p != pin_list) { | 144 | void mxc_gpio_release_multiple_pins(const int *pin_list, int count) |
148 | p--; | 145 | { |
149 | gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK); | 146 | const int *p = pin_list; |
147 | int i; | ||
148 | |||
149 | for (i = 0; i < count; i++) { | ||
150 | unsigned gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK); | ||
150 | gpio_free(gpio); | 151 | gpio_free(gpio); |
152 | p++; | ||
151 | } | 153 | } |
152 | 154 | ||
153 | return -EINVAL; | ||
154 | } | 155 | } |
155 | EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins); | 156 | EXPORT_SYMBOL(mxc_gpio_release_multiple_pins); |
156 | 157 | ||