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-rw-r--r--arch/powerpc/boot/4xx.c108
-rw-r--r--arch/powerpc/boot/4xx.h1
-rw-r--r--arch/powerpc/boot/Makefile4
-rw-r--r--arch/powerpc/boot/cuboot-sequoia.c56
4 files changed, 168 insertions, 1 deletions
diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c
index 642d8780bb31..ebf9e217612d 100644
--- a/arch/powerpc/boot/4xx.c
+++ b/arch/powerpc/boot/4xx.c
@@ -39,6 +39,114 @@ void ibm4xx_fixup_memsize(void)
39 dt_fixup_memory(0, memsize); 39 dt_fixup_memory(0, memsize);
40} 40}
41 41
42/* 4xx DDR1/2 Denali memory controller support */
43/* DDR0 registers */
44#define DDR0_02 2
45#define DDR0_08 8
46#define DDR0_10 10
47#define DDR0_14 14
48#define DDR0_42 42
49#define DDR0_43 43
50
51/* DDR0_02 */
52#define DDR_START 0x1
53#define DDR_START_SHIFT 0
54#define DDR_MAX_CS_REG 0x3
55#define DDR_MAX_CS_REG_SHIFT 24
56#define DDR_MAX_COL_REG 0xf
57#define DDR_MAX_COL_REG_SHIFT 16
58#define DDR_MAX_ROW_REG 0xf
59#define DDR_MAX_ROW_REG_SHIFT 8
60/* DDR0_08 */
61#define DDR_DDR2_MODE 0x1
62#define DDR_DDR2_MODE_SHIFT 0
63/* DDR0_10 */
64#define DDR_CS_MAP 0x3
65#define DDR_CS_MAP_SHIFT 8
66/* DDR0_14 */
67#define DDR_REDUC 0x1
68#define DDR_REDUC_SHIFT 16
69/* DDR0_42 */
70#define DDR_APIN 0x7
71#define DDR_APIN_SHIFT 24
72/* DDR0_43 */
73#define DDR_COL_SZ 0x7
74#define DDR_COL_SZ_SHIFT 8
75#define DDR_BANK8 0x1
76#define DDR_BANK8_SHIFT 0
77
78#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask))
79
80static inline u32 mfdcr_sdram0(u32 reg)
81{
82 mtdcr(DCRN_SDRAM0_CFGADDR, reg);
83 return mfdcr(DCRN_SDRAM0_CFGDATA);
84}
85
86void ibm4xx_denali_fixup_memsize(void)
87{
88 u32 val, max_cs, max_col, max_row;
89 u32 cs, col, row, bank, dpath;
90 unsigned long memsize;
91
92 val = mfdcr_sdram0(DDR0_02);
93 if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))
94 fatal("DDR controller is not initialized\n");
95
96 /* get maximum cs col and row values */
97 max_cs = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT);
98 max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT);
99 max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);
100
101 /* get CS value */
102 val = mfdcr_sdram0(DDR0_10);
103
104 val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
105 cs = 0;
106 while (val) {
107 if (val && 0x1)
108 cs++;
109 val = val >> 1;
110 }
111
112 if (!cs)
113 fatal("No memory installed\n");
114 if (cs > max_cs)
115 fatal("DDR wrong CS configuration\n");
116
117 /* get data path bytes */
118 val = mfdcr_sdram0(DDR0_14);
119
120 if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
121 dpath = 8; /* 64 bits */
122 else
123 dpath = 4; /* 32 bits */
124
125 /* get adress pins (rows) */
126 val = mfdcr_sdram0(DDR0_42);
127
128 row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT);
129 if (row > max_row)
130 fatal("DDR wrong APIN configuration\n");
131 row = max_row - row;
132
133 /* get collomn size and banks */
134 val = mfdcr_sdram0(DDR0_43);
135
136 col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT);
137 if (col > max_col)
138 fatal("DDR wrong COL configuration\n");
139 col = max_col - col;
140
141 if (DDR_GET_VAL(val, DDR_BANK8, DDR_BANK8_SHIFT))
142 bank = 8; /* 8 banks */
143 else
144 bank = 4; /* 4 banks */
145
146 memsize = cs * (1 << (col+row)) * bank * dpath;
147 dt_fixup_memory(0, memsize);
148}
149
42#define SPRN_DBCR0_40X 0x3F2 150#define SPRN_DBCR0_40X 0x3F2
43#define SPRN_DBCR0_44X 0x134 151#define SPRN_DBCR0_44X 0x134
44#define DBCR0_RST_SYSTEM 0x30000000 152#define DBCR0_RST_SYSTEM 0x30000000
diff --git a/arch/powerpc/boot/4xx.h b/arch/powerpc/boot/4xx.h
index 8f26e480dcd3..adba6a599a93 100644
--- a/arch/powerpc/boot/4xx.h
+++ b/arch/powerpc/boot/4xx.h
@@ -12,6 +12,7 @@
12#define _POWERPC_BOOT_4XX_H_ 12#define _POWERPC_BOOT_4XX_H_
13 13
14void ibm4xx_fixup_memsize(void); 14void ibm4xx_fixup_memsize(void);
15void ibm4xx_denali_fixup_memsize(void);
15void ibm44x_dbcr_reset(void); 16void ibm44x_dbcr_reset(void);
16void ibm40x_dbcr_reset(void); 17void ibm40x_dbcr_reset(void);
17void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1); 18void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1);
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index cd7c05769e41..2766069e6a2b 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -48,7 +48,8 @@ src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
48 cpm-serial.c 48 cpm-serial.c
49src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \ 49src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
50 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \ 50 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
51 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c cuboot-pq2.c 51 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
52 cuboot-pq2.c cuboot-sequoia.c
52src-boot := $(src-wlib) $(src-plat) empty.c 53src-boot := $(src-wlib) $(src-plat) empty.c
53 54
54src-boot := $(addprefix $(obj)/, $(src-boot)) 55src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -146,6 +147,7 @@ image-$(CONFIG_PPC_83xx) += cuImage.83xx
146image-$(CONFIG_PPC_85xx) += cuImage.85xx 147image-$(CONFIG_PPC_85xx) += cuImage.85xx
147image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony 148image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
148image-$(CONFIG_BAMBOO) += treeImage.bamboo 149image-$(CONFIG_BAMBOO) += treeImage.bamboo
150image-$(CONFIG_SEQUOIA) += cuImage.sequoia
149endif 151endif
150 152
151# For 32-bit powermacs, build the COFF and miboot images 153# For 32-bit powermacs, build the COFF and miboot images
diff --git a/arch/powerpc/boot/cuboot-sequoia.c b/arch/powerpc/boot/cuboot-sequoia.c
new file mode 100644
index 000000000000..ec635e0bd4ec
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-sequoia.c
@@ -0,0 +1,56 @@
1/*
2 * Old U-boot compatibility for Sequoia
3 *
4 * Valentine Barshak <vbarshak@ru.mvista.com>
5 * Copyright 2007 MontaVista Software, Inc
6 *
7 * Based on Ebony code by David Gibson <david@gibson.dropbear.id.au>
8 * Copyright IBM Corporation, 2007
9 *
10 * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
11 * Copyright IBM Corporation, 2007
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; version 2 of the License
16 */
17
18#include <stdarg.h>
19#include <stddef.h>
20#include "types.h"
21#include "elf.h"
22#include "string.h"
23#include "stdio.h"
24#include "page.h"
25#include "ops.h"
26#include "dcr.h"
27#include "4xx.h"
28#include "44x.h"
29#include "cuboot.h"
30
31#define TARGET_4xx
32#define TARGET_44x
33#include "ppcboot.h"
34
35static bd_t bd;
36
37
38static void sequoia_fixups(void)
39{
40 unsigned long sysclk = 33333333;
41
42 ibm440ep_fixup_clocks(sysclk, 11059200);
43 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
44 ibm4xx_denali_fixup_memsize();
45 dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
46}
47
48void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
49 unsigned long r6, unsigned long r7)
50{
51 CUBOOT_INIT();
52 platform_ops.fixups = sequoia_fixups;
53 platform_ops.exit = ibm44x_dbcr_reset;
54 ft_init(_dtb_start, 0, 32);
55 serial_console_init();
56}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 12:27:18 -0500