diff options
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 167 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/gpio.h | 2 |
2 files changed, 134 insertions, 35 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index b2a87b8ef673..7dd50a43fbcf 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -117,17 +117,29 @@ | |||
117 | #define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 | 117 | #define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 |
118 | #define OMAP24XX_GPIO_SETDATAOUT 0x0094 | 118 | #define OMAP24XX_GPIO_SETDATAOUT 0x0094 |
119 | 119 | ||
120 | /* | ||
121 | * omap34xx specific GPIO registers | ||
122 | */ | ||
123 | |||
124 | #define OMAP34XX_GPIO1_BASE (void __iomem *)0x48310000 | ||
125 | #define OMAP34XX_GPIO2_BASE (void __iomem *)0x49050000 | ||
126 | #define OMAP34XX_GPIO3_BASE (void __iomem *)0x49052000 | ||
127 | #define OMAP34XX_GPIO4_BASE (void __iomem *)0x49054000 | ||
128 | #define OMAP34XX_GPIO5_BASE (void __iomem *)0x49056000 | ||
129 | #define OMAP34XX_GPIO6_BASE (void __iomem *)0x49058000 | ||
130 | |||
131 | |||
120 | struct gpio_bank { | 132 | struct gpio_bank { |
121 | void __iomem *base; | 133 | void __iomem *base; |
122 | u16 irq; | 134 | u16 irq; |
123 | u16 virtual_irq_start; | 135 | u16 virtual_irq_start; |
124 | int method; | 136 | int method; |
125 | u32 reserved_map; | 137 | u32 reserved_map; |
126 | #if defined (CONFIG_ARCH_OMAP16XX) || defined (CONFIG_ARCH_OMAP24XX) | 138 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
127 | u32 suspend_wakeup; | 139 | u32 suspend_wakeup; |
128 | u32 saved_wakeup; | 140 | u32 saved_wakeup; |
129 | #endif | 141 | #endif |
130 | #ifdef CONFIG_ARCH_OMAP24XX | 142 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
131 | u32 non_wakeup_gpios; | 143 | u32 non_wakeup_gpios; |
132 | u32 enabled_non_wakeup_gpios; | 144 | u32 enabled_non_wakeup_gpios; |
133 | 145 | ||
@@ -192,6 +204,18 @@ static struct gpio_bank gpio_bank_243x[5] = { | |||
192 | 204 | ||
193 | #endif | 205 | #endif |
194 | 206 | ||
207 | #ifdef CONFIG_ARCH_OMAP34XX | ||
208 | static struct gpio_bank gpio_bank_34xx[6] = { | ||
209 | { OMAP34XX_GPIO1_BASE, INT_34XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX }, | ||
210 | { OMAP34XX_GPIO2_BASE, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX }, | ||
211 | { OMAP34XX_GPIO3_BASE, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX }, | ||
212 | { OMAP34XX_GPIO4_BASE, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX }, | ||
213 | { OMAP34XX_GPIO5_BASE, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX }, | ||
214 | { OMAP34XX_GPIO6_BASE, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_24XX }, | ||
215 | }; | ||
216 | |||
217 | #endif | ||
218 | |||
195 | static struct gpio_bank *gpio_bank; | 219 | static struct gpio_bank *gpio_bank; |
196 | static int gpio_bank_count; | 220 | static int gpio_bank_count; |
197 | 221 | ||
@@ -222,6 +246,10 @@ static inline struct gpio_bank *get_gpio_bank(int gpio) | |||
222 | if (cpu_is_omap24xx()) | 246 | if (cpu_is_omap24xx()) |
223 | return &gpio_bank[gpio >> 5]; | 247 | return &gpio_bank[gpio >> 5]; |
224 | #endif | 248 | #endif |
249 | #ifdef CONFIG_ARCH_OMAP34XX | ||
250 | if (cpu_is_omap34xx()) | ||
251 | return &gpio_bank[gpio >> 5]; | ||
252 | #endif | ||
225 | } | 253 | } |
226 | 254 | ||
227 | static inline int get_gpio_index(int gpio) | 255 | static inline int get_gpio_index(int gpio) |
@@ -234,6 +262,10 @@ static inline int get_gpio_index(int gpio) | |||
234 | if (cpu_is_omap24xx()) | 262 | if (cpu_is_omap24xx()) |
235 | return gpio & 0x1f; | 263 | return gpio & 0x1f; |
236 | #endif | 264 | #endif |
265 | #ifdef CONFIG_ARCH_OMAP34XX | ||
266 | if (cpu_is_omap34xx()) | ||
267 | return gpio & 0x1f; | ||
268 | #endif | ||
237 | return gpio & 0x0f; | 269 | return gpio & 0x0f; |
238 | } | 270 | } |
239 | 271 | ||
@@ -264,6 +296,10 @@ static inline int gpio_valid(int gpio) | |||
264 | if (cpu_is_omap24xx() && gpio < 128) | 296 | if (cpu_is_omap24xx() && gpio < 128) |
265 | return 0; | 297 | return 0; |
266 | #endif | 298 | #endif |
299 | #ifdef CONFIG_ARCH_OMAP34XX | ||
300 | if (cpu_is_omap34xx() && gpio < 160) | ||
301 | return 0; | ||
302 | #endif | ||
267 | return -1; | 303 | return -1; |
268 | } | 304 | } |
269 | 305 | ||
@@ -303,7 +339,7 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) | |||
303 | reg += OMAP730_GPIO_DIR_CONTROL; | 339 | reg += OMAP730_GPIO_DIR_CONTROL; |
304 | break; | 340 | break; |
305 | #endif | 341 | #endif |
306 | #ifdef CONFIG_ARCH_OMAP24XX | 342 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
307 | case METHOD_GPIO_24XX: | 343 | case METHOD_GPIO_24XX: |
308 | reg += OMAP24XX_GPIO_OE; | 344 | reg += OMAP24XX_GPIO_OE; |
309 | break; | 345 | break; |
@@ -377,7 +413,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
377 | l &= ~(1 << gpio); | 413 | l &= ~(1 << gpio); |
378 | break; | 414 | break; |
379 | #endif | 415 | #endif |
380 | #ifdef CONFIG_ARCH_OMAP24XX | 416 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
381 | case METHOD_GPIO_24XX: | 417 | case METHOD_GPIO_24XX: |
382 | if (enable) | 418 | if (enable) |
383 | reg += OMAP24XX_GPIO_SETDATAOUT; | 419 | reg += OMAP24XX_GPIO_SETDATAOUT; |
@@ -435,7 +471,7 @@ int omap_get_gpio_datain(int gpio) | |||
435 | reg += OMAP730_GPIO_DATA_INPUT; | 471 | reg += OMAP730_GPIO_DATA_INPUT; |
436 | break; | 472 | break; |
437 | #endif | 473 | #endif |
438 | #ifdef CONFIG_ARCH_OMAP24XX | 474 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
439 | case METHOD_GPIO_24XX: | 475 | case METHOD_GPIO_24XX: |
440 | reg += OMAP24XX_GPIO_DATAIN; | 476 | reg += OMAP24XX_GPIO_DATAIN; |
441 | break; | 477 | break; |
@@ -455,7 +491,7 @@ do { \ | |||
455 | __raw_writel(l, base + reg); \ | 491 | __raw_writel(l, base + reg); \ |
456 | } while(0) | 492 | } while(0) |
457 | 493 | ||
458 | #ifdef CONFIG_ARCH_OMAP24XX | 494 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
459 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | 495 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) |
460 | { | 496 | { |
461 | void __iomem *base = bank->base; | 497 | void __iomem *base = bank->base; |
@@ -547,7 +583,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
547 | goto bad; | 583 | goto bad; |
548 | break; | 584 | break; |
549 | #endif | 585 | #endif |
550 | #ifdef CONFIG_ARCH_OMAP24XX | 586 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
551 | case METHOD_GPIO_24XX: | 587 | case METHOD_GPIO_24XX: |
552 | set_24xx_gpio_triggering(bank, gpio, trigger); | 588 | set_24xx_gpio_triggering(bank, gpio, trigger); |
553 | break; | 589 | break; |
@@ -567,7 +603,7 @@ static int gpio_irq_type(unsigned irq, unsigned type) | |||
567 | unsigned gpio; | 603 | unsigned gpio; |
568 | int retval; | 604 | int retval; |
569 | 605 | ||
570 | if (!cpu_is_omap24xx() && irq > IH_MPUIO_BASE) | 606 | if (!cpu_class_is_omap2() && irq > IH_MPUIO_BASE) |
571 | gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); | 607 | gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); |
572 | else | 608 | else |
573 | gpio = irq - IH_GPIO_BASE; | 609 | gpio = irq - IH_GPIO_BASE; |
@@ -579,7 +615,7 @@ static int gpio_irq_type(unsigned irq, unsigned type) | |||
579 | return -EINVAL; | 615 | return -EINVAL; |
580 | 616 | ||
581 | /* OMAP1 allows only only edge triggering */ | 617 | /* OMAP1 allows only only edge triggering */ |
582 | if (!cpu_is_omap24xx() | 618 | if (!cpu_class_is_omap2() |
583 | && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) | 619 | && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) |
584 | return -EINVAL; | 620 | return -EINVAL; |
585 | 621 | ||
@@ -620,7 +656,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
620 | reg += OMAP730_GPIO_INT_STATUS; | 656 | reg += OMAP730_GPIO_INT_STATUS; |
621 | break; | 657 | break; |
622 | #endif | 658 | #endif |
623 | #ifdef CONFIG_ARCH_OMAP24XX | 659 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
624 | case METHOD_GPIO_24XX: | 660 | case METHOD_GPIO_24XX: |
625 | reg += OMAP24XX_GPIO_IRQSTATUS1; | 661 | reg += OMAP24XX_GPIO_IRQSTATUS1; |
626 | break; | 662 | break; |
@@ -632,8 +668,10 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
632 | __raw_writel(gpio_mask, reg); | 668 | __raw_writel(gpio_mask, reg); |
633 | 669 | ||
634 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ | 670 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ |
635 | if (cpu_is_omap2420()) | 671 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
672 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
636 | __raw_writel(gpio_mask, bank->base + OMAP24XX_GPIO_IRQSTATUS2); | 673 | __raw_writel(gpio_mask, bank->base + OMAP24XX_GPIO_IRQSTATUS2); |
674 | #endif | ||
637 | } | 675 | } |
638 | 676 | ||
639 | static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) | 677 | static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) |
@@ -676,7 +714,7 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) | |||
676 | inv = 1; | 714 | inv = 1; |
677 | break; | 715 | break; |
678 | #endif | 716 | #endif |
679 | #ifdef CONFIG_ARCH_OMAP24XX | 717 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
680 | case METHOD_GPIO_24XX: | 718 | case METHOD_GPIO_24XX: |
681 | reg += OMAP24XX_GPIO_IRQENABLE1; | 719 | reg += OMAP24XX_GPIO_IRQENABLE1; |
682 | mask = 0xffffffff; | 720 | mask = 0xffffffff; |
@@ -739,7 +777,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
739 | l |= gpio_mask; | 777 | l |= gpio_mask; |
740 | break; | 778 | break; |
741 | #endif | 779 | #endif |
742 | #ifdef CONFIG_ARCH_OMAP24XX | 780 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
743 | case METHOD_GPIO_24XX: | 781 | case METHOD_GPIO_24XX: |
744 | if (enable) | 782 | if (enable) |
745 | reg += OMAP24XX_GPIO_SETIRQENABLE1; | 783 | reg += OMAP24XX_GPIO_SETIRQENABLE1; |
@@ -785,7 +823,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | |||
785 | spin_unlock(&bank->lock); | 823 | spin_unlock(&bank->lock); |
786 | return 0; | 824 | return 0; |
787 | #endif | 825 | #endif |
788 | #ifdef CONFIG_ARCH_OMAP24XX | 826 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
789 | case METHOD_GPIO_24XX: | 827 | case METHOD_GPIO_24XX: |
790 | if (bank->non_wakeup_gpios & (1 << gpio)) { | 828 | if (bank->non_wakeup_gpios & (1 << gpio)) { |
791 | printk(KERN_ERR "Unable to modify wakeup on " | 829 | printk(KERN_ERR "Unable to modify wakeup on " |
@@ -891,7 +929,7 @@ void omap_free_gpio(int gpio) | |||
891 | __raw_writel(1 << get_gpio_index(gpio), reg); | 929 | __raw_writel(1 << get_gpio_index(gpio), reg); |
892 | } | 930 | } |
893 | #endif | 931 | #endif |
894 | #ifdef CONFIG_ARCH_OMAP24XX | 932 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
895 | if (bank->method == METHOD_GPIO_24XX) { | 933 | if (bank->method == METHOD_GPIO_24XX) { |
896 | /* Disable wake-up during idle for dynamic tick */ | 934 | /* Disable wake-up during idle for dynamic tick */ |
897 | void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 935 | void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
@@ -940,7 +978,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
940 | if (bank->method == METHOD_GPIO_730) | 978 | if (bank->method == METHOD_GPIO_730) |
941 | isr_reg = bank->base + OMAP730_GPIO_INT_STATUS; | 979 | isr_reg = bank->base + OMAP730_GPIO_INT_STATUS; |
942 | #endif | 980 | #endif |
943 | #ifdef CONFIG_ARCH_OMAP24XX | 981 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
944 | if (bank->method == METHOD_GPIO_24XX) | 982 | if (bank->method == METHOD_GPIO_24XX) |
945 | isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; | 983 | isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; |
946 | #endif | 984 | #endif |
@@ -954,7 +992,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
954 | if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO)) | 992 | if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO)) |
955 | isr &= 0x0000ffff; | 993 | isr &= 0x0000ffff; |
956 | 994 | ||
957 | if (cpu_is_omap24xx()) { | 995 | if (cpu_class_is_omap2()) { |
958 | level_mask = | 996 | level_mask = |
959 | __raw_readl(bank->base + | 997 | __raw_readl(bank->base + |
960 | OMAP24XX_GPIO_LEVELDETECT0) | | 998 | OMAP24XX_GPIO_LEVELDETECT0) | |
@@ -1023,7 +1061,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1023 | } | 1061 | } |
1024 | } | 1062 | } |
1025 | 1063 | ||
1026 | if (cpu_is_omap24xx()) { | 1064 | if (cpu_class_is_omap2()) { |
1027 | /* clear level sensitive interrupts after handler(s) */ | 1065 | /* clear level sensitive interrupts after handler(s) */ |
1028 | _enable_gpio_irqbank(bank, isr_saved & level_mask, 0); | 1066 | _enable_gpio_irqbank(bank, isr_saved & level_mask, 0); |
1029 | _clear_gpio_irqbank(bank, isr_saved & level_mask); | 1067 | _clear_gpio_irqbank(bank, isr_saved & level_mask); |
@@ -1199,21 +1237,35 @@ static inline void mpuio_init(void) {} | |||
1199 | /*---------------------------------------------------------------------*/ | 1237 | /*---------------------------------------------------------------------*/ |
1200 | 1238 | ||
1201 | static int initialized; | 1239 | static int initialized; |
1240 | #if !defined(CONFIG_ARCH_OMAP3) | ||
1202 | static struct clk * gpio_ick; | 1241 | static struct clk * gpio_ick; |
1242 | #endif | ||
1243 | |||
1244 | #if defined(CONFIG_ARCH_OMAP2) | ||
1203 | static struct clk * gpio_fck; | 1245 | static struct clk * gpio_fck; |
1246 | #endif | ||
1204 | 1247 | ||
1205 | #ifdef CONFIG_ARCH_OMAP2430 | 1248 | #if defined(CONFIG_ARCH_OMAP2430) |
1206 | static struct clk * gpio5_ick; | 1249 | static struct clk * gpio5_ick; |
1207 | static struct clk * gpio5_fck; | 1250 | static struct clk * gpio5_fck; |
1208 | #endif | 1251 | #endif |
1209 | 1252 | ||
1253 | #if defined(CONFIG_ARCH_OMAP3) | ||
1254 | static struct clk *gpio_fclks[OMAP34XX_NR_GPIOS]; | ||
1255 | static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS]; | ||
1256 | #endif | ||
1257 | |||
1210 | static int __init _omap_gpio_init(void) | 1258 | static int __init _omap_gpio_init(void) |
1211 | { | 1259 | { |
1212 | int i; | 1260 | int i; |
1213 | struct gpio_bank *bank; | 1261 | struct gpio_bank *bank; |
1262 | #if defined(CONFIG_ARCH_OMAP3) | ||
1263 | char clk_name[11]; | ||
1264 | #endif | ||
1214 | 1265 | ||
1215 | initialized = 1; | 1266 | initialized = 1; |
1216 | 1267 | ||
1268 | #if defined(CONFIG_ARCH_OMAP1) | ||
1217 | if (cpu_is_omap15xx()) { | 1269 | if (cpu_is_omap15xx()) { |
1218 | gpio_ick = clk_get(NULL, "arm_gpio_ck"); | 1270 | gpio_ick = clk_get(NULL, "arm_gpio_ck"); |
1219 | if (IS_ERR(gpio_ick)) | 1271 | if (IS_ERR(gpio_ick)) |
@@ -1221,7 +1273,9 @@ static int __init _omap_gpio_init(void) | |||
1221 | else | 1273 | else |
1222 | clk_enable(gpio_ick); | 1274 | clk_enable(gpio_ick); |
1223 | } | 1275 | } |
1224 | if (cpu_is_omap24xx()) { | 1276 | #endif |
1277 | #if defined(CONFIG_ARCH_OMAP2) | ||
1278 | if (cpu_class_is_omap2()) { | ||
1225 | gpio_ick = clk_get(NULL, "gpios_ick"); | 1279 | gpio_ick = clk_get(NULL, "gpios_ick"); |
1226 | if (IS_ERR(gpio_ick)) | 1280 | if (IS_ERR(gpio_ick)) |
1227 | printk("Could not get gpios_ick\n"); | 1281 | printk("Could not get gpios_ick\n"); |
@@ -1234,9 +1288,9 @@ static int __init _omap_gpio_init(void) | |||
1234 | clk_enable(gpio_fck); | 1288 | clk_enable(gpio_fck); |
1235 | 1289 | ||
1236 | /* | 1290 | /* |
1237 | * On 2430 GPIO 5 uses CORE L4 ICLK | 1291 | * On 2430 & 3430 GPIO 5 uses CORE L4 ICLK |
1238 | */ | 1292 | */ |
1239 | #ifdef CONFIG_ARCH_OMAP2430 | 1293 | #if defined(CONFIG_ARCH_OMAP2430) |
1240 | if (cpu_is_omap2430()) { | 1294 | if (cpu_is_omap2430()) { |
1241 | gpio5_ick = clk_get(NULL, "gpio5_ick"); | 1295 | gpio5_ick = clk_get(NULL, "gpio5_ick"); |
1242 | if (IS_ERR(gpio5_ick)) | 1296 | if (IS_ERR(gpio5_ick)) |
@@ -1250,7 +1304,28 @@ static int __init _omap_gpio_init(void) | |||
1250 | clk_enable(gpio5_fck); | 1304 | clk_enable(gpio5_fck); |
1251 | } | 1305 | } |
1252 | #endif | 1306 | #endif |
1253 | } | 1307 | } |
1308 | #endif | ||
1309 | |||
1310 | #if defined(CONFIG_ARCH_OMAP3) | ||
1311 | if (cpu_is_omap34xx()) { | ||
1312 | for (i = 0; i < OMAP34XX_NR_GPIOS; i++) { | ||
1313 | sprintf(clk_name, "gpio%d_ick", i + 1); | ||
1314 | gpio_iclks[i] = clk_get(NULL, clk_name); | ||
1315 | if (IS_ERR(gpio_iclks[i])) | ||
1316 | printk(KERN_ERR "Could not get %s\n", clk_name); | ||
1317 | else | ||
1318 | clk_enable(gpio_iclks[i]); | ||
1319 | sprintf(clk_name, "gpio%d_fck", i + 1); | ||
1320 | gpio_fclks[i] = clk_get(NULL, clk_name); | ||
1321 | if (IS_ERR(gpio_fclks[i])) | ||
1322 | printk(KERN_ERR "Could not get %s\n", clk_name); | ||
1323 | else | ||
1324 | clk_enable(gpio_fclks[i]); | ||
1325 | } | ||
1326 | } | ||
1327 | #endif | ||
1328 | |||
1254 | 1329 | ||
1255 | #ifdef CONFIG_ARCH_OMAP15XX | 1330 | #ifdef CONFIG_ARCH_OMAP15XX |
1256 | if (cpu_is_omap15xx()) { | 1331 | if (cpu_is_omap15xx()) { |
@@ -1298,6 +1373,17 @@ static int __init _omap_gpio_init(void) | |||
1298 | (rev >> 4) & 0x0f, rev & 0x0f); | 1373 | (rev >> 4) & 0x0f, rev & 0x0f); |
1299 | } | 1374 | } |
1300 | #endif | 1375 | #endif |
1376 | #ifdef CONFIG_ARCH_OMAP34XX | ||
1377 | if (cpu_is_omap34xx()) { | ||
1378 | int rev; | ||
1379 | |||
1380 | gpio_bank_count = OMAP34XX_NR_GPIOS; | ||
1381 | gpio_bank = gpio_bank_34xx; | ||
1382 | rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | ||
1383 | printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n", | ||
1384 | (rev >> 4) & 0x0f, rev & 0x0f); | ||
1385 | } | ||
1386 | #endif | ||
1301 | for (i = 0; i < gpio_bank_count; i++) { | 1387 | for (i = 0; i < gpio_bank_count; i++) { |
1302 | int j, gpio_count = 16; | 1388 | int j, gpio_count = 16; |
1303 | 1389 | ||
@@ -1328,7 +1414,7 @@ static int __init _omap_gpio_init(void) | |||
1328 | gpio_count = 32; /* 730 has 32-bit GPIOs */ | 1414 | gpio_count = 32; /* 730 has 32-bit GPIOs */ |
1329 | } | 1415 | } |
1330 | #endif | 1416 | #endif |
1331 | #ifdef CONFIG_ARCH_OMAP24XX | 1417 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
1332 | if (bank->method == METHOD_GPIO_24XX) { | 1418 | if (bank->method == METHOD_GPIO_24XX) { |
1333 | static const u32 non_wakeup_gpios[] = { | 1419 | static const u32 non_wakeup_gpios[] = { |
1334 | 0xe203ffc0, 0x08700040 | 1420 | 0xe203ffc0, 0x08700040 |
@@ -1364,21 +1450,23 @@ static int __init _omap_gpio_init(void) | |||
1364 | if (cpu_is_omap16xx()) | 1450 | if (cpu_is_omap16xx()) |
1365 | omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, ULPD_CAM_CLK_CTRL); | 1451 | omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, ULPD_CAM_CLK_CTRL); |
1366 | 1452 | ||
1367 | #ifdef CONFIG_ARCH_OMAP24XX | 1453 | #if defined(CONFIG_ARCH_OMAP24XX) |
1368 | /* Enable autoidle for the OCP interface */ | 1454 | /* Enable autoidle for the OCP interface */ |
1369 | if (cpu_is_omap24xx()) | 1455 | if (cpu_is_omap24xx()) |
1370 | omap_writel(1 << 0, 0x48019010); | 1456 | omap_writel(1 << 0, 0x48019010); |
1457 | #elif defined(CONFIG_ARCH_OMAP34XX) | ||
1458 | if (cpu_is_omap34xx()) | ||
1459 | omap_writel(1 << 0, 0x48306814); | ||
1371 | #endif | 1460 | #endif |
1372 | |||
1373 | return 0; | 1461 | return 0; |
1374 | } | 1462 | } |
1375 | 1463 | ||
1376 | #if defined (CONFIG_ARCH_OMAP16XX) || defined (CONFIG_ARCH_OMAP24XX) | 1464 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
1377 | static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) | 1465 | static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) |
1378 | { | 1466 | { |
1379 | int i; | 1467 | int i; |
1380 | 1468 | ||
1381 | if (!cpu_is_omap24xx() && !cpu_is_omap16xx()) | 1469 | if (!cpu_class_is_omap2() && !cpu_is_omap16xx()) |
1382 | return 0; | 1470 | return 0; |
1383 | 1471 | ||
1384 | for (i = 0; i < gpio_bank_count; i++) { | 1472 | for (i = 0; i < gpio_bank_count; i++) { |
@@ -1395,7 +1483,7 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) | |||
1395 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | 1483 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; |
1396 | break; | 1484 | break; |
1397 | #endif | 1485 | #endif |
1398 | #ifdef CONFIG_ARCH_OMAP24XX | 1486 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
1399 | case METHOD_GPIO_24XX: | 1487 | case METHOD_GPIO_24XX: |
1400 | wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA; | 1488 | wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA; |
1401 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1489 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
@@ -1435,7 +1523,7 @@ static int omap_gpio_resume(struct sys_device *dev) | |||
1435 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | 1523 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; |
1436 | break; | 1524 | break; |
1437 | #endif | 1525 | #endif |
1438 | #ifdef CONFIG_ARCH_OMAP24XX | 1526 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
1439 | case METHOD_GPIO_24XX: | 1527 | case METHOD_GPIO_24XX: |
1440 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1528 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
1441 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; | 1529 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; |
@@ -1467,7 +1555,7 @@ static struct sys_device omap_gpio_device = { | |||
1467 | 1555 | ||
1468 | #endif | 1556 | #endif |
1469 | 1557 | ||
1470 | #ifdef CONFIG_ARCH_OMAP24XX | 1558 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
1471 | 1559 | ||
1472 | static int workaround_enabled; | 1560 | static int workaround_enabled; |
1473 | 1561 | ||
@@ -1483,15 +1571,19 @@ void omap2_gpio_prepare_for_retention(void) | |||
1483 | 1571 | ||
1484 | if (!(bank->enabled_non_wakeup_gpios)) | 1572 | if (!(bank->enabled_non_wakeup_gpios)) |
1485 | continue; | 1573 | continue; |
1574 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | ||
1486 | bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); | 1575 | bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); |
1487 | l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 1576 | l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); |
1488 | l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); | 1577 | l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); |
1578 | #endif | ||
1489 | bank->saved_fallingdetect = l1; | 1579 | bank->saved_fallingdetect = l1; |
1490 | bank->saved_risingdetect = l2; | 1580 | bank->saved_risingdetect = l2; |
1491 | l1 &= ~bank->enabled_non_wakeup_gpios; | 1581 | l1 &= ~bank->enabled_non_wakeup_gpios; |
1492 | l2 &= ~bank->enabled_non_wakeup_gpios; | 1582 | l2 &= ~bank->enabled_non_wakeup_gpios; |
1583 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | ||
1493 | __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 1584 | __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); |
1494 | __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); | 1585 | __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); |
1586 | #endif | ||
1495 | c++; | 1587 | c++; |
1496 | } | 1588 | } |
1497 | if (!c) { | 1589 | if (!c) { |
@@ -1513,26 +1605,31 @@ void omap2_gpio_resume_after_retention(void) | |||
1513 | 1605 | ||
1514 | if (!(bank->enabled_non_wakeup_gpios)) | 1606 | if (!(bank->enabled_non_wakeup_gpios)) |
1515 | continue; | 1607 | continue; |
1608 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | ||
1516 | __raw_writel(bank->saved_fallingdetect, | 1609 | __raw_writel(bank->saved_fallingdetect, |
1517 | bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 1610 | bank->base + OMAP24XX_GPIO_FALLINGDETECT); |
1518 | __raw_writel(bank->saved_risingdetect, | 1611 | __raw_writel(bank->saved_risingdetect, |
1519 | bank->base + OMAP24XX_GPIO_RISINGDETECT); | 1612 | bank->base + OMAP24XX_GPIO_RISINGDETECT); |
1613 | #endif | ||
1520 | /* Check if any of the non-wakeup interrupt GPIOs have changed | 1614 | /* Check if any of the non-wakeup interrupt GPIOs have changed |
1521 | * state. If so, generate an IRQ by software. This is | 1615 | * state. If so, generate an IRQ by software. This is |
1522 | * horribly racy, but it's the best we can do to work around | 1616 | * horribly racy, but it's the best we can do to work around |
1523 | * this silicon bug. */ | 1617 | * this silicon bug. */ |
1618 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | ||
1524 | l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); | 1619 | l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); |
1620 | #endif | ||
1525 | l ^= bank->saved_datain; | 1621 | l ^= bank->saved_datain; |
1526 | l &= bank->non_wakeup_gpios; | 1622 | l &= bank->non_wakeup_gpios; |
1527 | if (l) { | 1623 | if (l) { |
1528 | u32 old0, old1; | 1624 | u32 old0, old1; |
1529 | 1625 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | |
1530 | old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 1626 | old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); |
1531 | old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 1627 | old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); |
1532 | __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 1628 | __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0); |
1533 | __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 1629 | __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1); |
1534 | __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 1630 | __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); |
1535 | __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 1631 | __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); |
1632 | #endif | ||
1536 | } | 1633 | } |
1537 | } | 1634 | } |
1538 | 1635 | ||
@@ -1561,8 +1658,8 @@ static int __init omap_gpio_sysinit(void) | |||
1561 | 1658 | ||
1562 | mpuio_init(); | 1659 | mpuio_init(); |
1563 | 1660 | ||
1564 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) | 1661 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
1565 | if (cpu_is_omap16xx() || cpu_is_omap24xx()) { | 1662 | if (cpu_is_omap16xx() || cpu_class_is_omap2()) { |
1566 | if (ret == 0) { | 1663 | if (ret == 0) { |
1567 | ret = sysdev_class_register(&omap_gpio_sysclass); | 1664 | ret = sysdev_class_register(&omap_gpio_sysclass); |
1568 | if (ret == 0) | 1665 | if (ret == 0) |
@@ -1624,7 +1721,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
1624 | 1721 | ||
1625 | if (bank_is_mpuio(bank)) | 1722 | if (bank_is_mpuio(bank)) |
1626 | gpio = OMAP_MPUIO(0); | 1723 | gpio = OMAP_MPUIO(0); |
1627 | else if (cpu_is_omap24xx() || cpu_is_omap730()) | 1724 | else if (cpu_class_is_omap2() || cpu_is_omap730()) |
1628 | bankwidth = 32; | 1725 | bankwidth = 32; |
1629 | 1726 | ||
1630 | for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) { | 1727 | for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) { |
diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h index 97b397dd7e87..c782ef9a2ace 100644 --- a/include/asm-arm/arch-omap/gpio.h +++ b/include/asm-arm/arch-omap/gpio.h | |||
@@ -62,6 +62,8 @@ | |||
62 | #define OMAP_MPUIO_LATCH 0x34 | 62 | #define OMAP_MPUIO_LATCH 0x34 |
63 | #endif | 63 | #endif |
64 | 64 | ||
65 | #define OMAP34XX_NR_GPIOS 6 | ||
66 | |||
65 | #define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) | 67 | #define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) |
66 | #define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) | 68 | #define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) |
67 | 69 | ||