diff options
68 files changed, 2572 insertions, 2657 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3d9397ec746d..e57226e3afeb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -22,6 +22,9 @@ config ARM | |||
22 | Europe. There is an ARM Linux project with a web page at | 22 | Europe. There is an ARM Linux project with a web page at |
23 | <http://www.arm.linux.org.uk/>. | 23 | <http://www.arm.linux.org.uk/>. |
24 | 24 | ||
25 | config HAVE_PWM | ||
26 | bool | ||
27 | |||
25 | config SYS_SUPPORTS_APM_EMULATION | 28 | config SYS_SUPPORTS_APM_EMULATION |
26 | bool | 29 | bool |
27 | 30 | ||
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c index 5bba5255b119..8822b684d474 100644 --- a/arch/arm/common/sharpsl_pm.c +++ b/arch/arm/common/sharpsl_pm.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <asm/irq.h> | 31 | #include <asm/irq.h> |
32 | #include <asm/arch/pm.h> | 32 | #include <asm/arch/pm.h> |
33 | #include <asm/arch/pxa-regs.h> | 33 | #include <asm/arch/pxa-regs.h> |
34 | #include <asm/arch/pxa2xx-regs.h> | ||
34 | #include <asm/arch/sharpsl.h> | 35 | #include <asm/arch/sharpsl.h> |
35 | #include <asm/hardware/sharpsl_pm.h> | 36 | #include <asm/hardware/sharpsl_pm.h> |
36 | 37 | ||
@@ -157,6 +158,7 @@ static void sharpsl_battery_thread(struct work_struct *private_) | |||
157 | dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage, | 158 | dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage, |
158 | sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies); | 159 | sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies); |
159 | 160 | ||
161 | #ifdef CONFIG_BACKLIGHT_CORGI | ||
160 | /* If battery is low. limit backlight intensity to save power. */ | 162 | /* If battery is low. limit backlight intensity to save power. */ |
161 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) | 163 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) |
162 | && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) || | 164 | && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) || |
@@ -169,6 +171,7 @@ static void sharpsl_battery_thread(struct work_struct *private_) | |||
169 | sharpsl_pm.machinfo->backlight_limit(0); | 171 | sharpsl_pm.machinfo->backlight_limit(0); |
170 | sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT; | 172 | sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT; |
171 | } | 173 | } |
174 | #endif | ||
172 | 175 | ||
173 | /* Suspend if critical battery level */ | 176 | /* Suspend if critical battery level */ |
174 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) | 177 | if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) |
diff --git a/arch/arm/configs/em_x270_defconfig b/arch/arm/configs/em_x270_defconfig deleted file mode 100644 index d3114c23603b..000000000000 --- a/arch/arm/configs/em_x270_defconfig +++ /dev/null | |||
@@ -1,1264 +0,0 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.22 | ||
4 | # Mon Jul 9 15:18:20 2007 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | CONFIG_GENERIC_GPIO=y | ||
9 | CONFIG_GENERIC_TIME=y | ||
10 | # CONFIG_GENERIC_CLOCKEVENTS is not set | ||
11 | CONFIG_MMU=y | ||
12 | # CONFIG_NO_IOPORT is not set | ||
13 | CONFIG_GENERIC_HARDIRQS=y | ||
14 | CONFIG_STACKTRACE_SUPPORT=y | ||
15 | CONFIG_LOCKDEP_SUPPORT=y | ||
16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
17 | CONFIG_HARDIRQS_SW_RESEND=y | ||
18 | CONFIG_GENERIC_IRQ_PROBE=y | ||
19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
20 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
22 | CONFIG_GENERIC_HWEIGHT=y | ||
23 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
24 | CONFIG_ZONE_DMA=y | ||
25 | CONFIG_ARCH_MTD_XIP=y | ||
26 | CONFIG_VECTORS_BASE=0xffff0000 | ||
27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
28 | |||
29 | # | ||
30 | # Code maturity level options | ||
31 | # | ||
32 | CONFIG_EXPERIMENTAL=y | ||
33 | CONFIG_BROKEN_ON_SMP=y | ||
34 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
35 | |||
36 | # | ||
37 | # General setup | ||
38 | # | ||
39 | CONFIG_LOCALVERSION="-em-x270" | ||
40 | # CONFIG_LOCALVERSION_AUTO is not set | ||
41 | CONFIG_SWAP=y | ||
42 | CONFIG_SYSVIPC=y | ||
43 | # CONFIG_IPC_NS is not set | ||
44 | CONFIG_SYSVIPC_SYSCTL=y | ||
45 | # CONFIG_POSIX_MQUEUE is not set | ||
46 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
47 | # CONFIG_TASKSTATS is not set | ||
48 | # CONFIG_UTS_NS is not set | ||
49 | # CONFIG_AUDIT is not set | ||
50 | CONFIG_IKCONFIG=y | ||
51 | CONFIG_IKCONFIG_PROC=y | ||
52 | CONFIG_LOG_BUF_SHIFT=17 | ||
53 | CONFIG_SYSFS_DEPRECATED=y | ||
54 | # CONFIG_RELAY is not set | ||
55 | CONFIG_BLK_DEV_INITRD=y | ||
56 | CONFIG_INITRAMFS_SOURCE="" | ||
57 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
58 | CONFIG_SYSCTL=y | ||
59 | CONFIG_EMBEDDED=y | ||
60 | CONFIG_UID16=y | ||
61 | CONFIG_SYSCTL_SYSCALL=y | ||
62 | CONFIG_KALLSYMS=y | ||
63 | # CONFIG_KALLSYMS_ALL is not set | ||
64 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
65 | CONFIG_HOTPLUG=y | ||
66 | CONFIG_PRINTK=y | ||
67 | CONFIG_BUG=y | ||
68 | CONFIG_ELF_CORE=y | ||
69 | CONFIG_BASE_FULL=y | ||
70 | CONFIG_FUTEX=y | ||
71 | CONFIG_ANON_INODES=y | ||
72 | CONFIG_EPOLL=y | ||
73 | CONFIG_SIGNALFD=y | ||
74 | CONFIG_TIMERFD=y | ||
75 | CONFIG_EVENTFD=y | ||
76 | CONFIG_SHMEM=y | ||
77 | CONFIG_VM_EVENT_COUNTERS=y | ||
78 | CONFIG_SLAB=y | ||
79 | # CONFIG_SLUB is not set | ||
80 | # CONFIG_SLOB is not set | ||
81 | CONFIG_RT_MUTEXES=y | ||
82 | # CONFIG_TINY_SHMEM is not set | ||
83 | CONFIG_BASE_SMALL=0 | ||
84 | |||
85 | # | ||
86 | # Loadable module support | ||
87 | # | ||
88 | CONFIG_MODULES=y | ||
89 | CONFIG_MODULE_UNLOAD=y | ||
90 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
91 | # CONFIG_MODVERSIONS is not set | ||
92 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
93 | CONFIG_KMOD=y | ||
94 | |||
95 | # | ||
96 | # Block layer | ||
97 | # | ||
98 | CONFIG_BLOCK=y | ||
99 | # CONFIG_LBD is not set | ||
100 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
101 | # CONFIG_LSF is not set | ||
102 | |||
103 | # | ||
104 | # IO Schedulers | ||
105 | # | ||
106 | CONFIG_IOSCHED_NOOP=y | ||
107 | CONFIG_IOSCHED_AS=y | ||
108 | CONFIG_IOSCHED_DEADLINE=y | ||
109 | CONFIG_IOSCHED_CFQ=y | ||
110 | CONFIG_DEFAULT_AS=y | ||
111 | # CONFIG_DEFAULT_DEADLINE is not set | ||
112 | # CONFIG_DEFAULT_CFQ is not set | ||
113 | # CONFIG_DEFAULT_NOOP is not set | ||
114 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
115 | |||
116 | # | ||
117 | # System Type | ||
118 | # | ||
119 | # CONFIG_ARCH_AAEC2000 is not set | ||
120 | # CONFIG_ARCH_INTEGRATOR is not set | ||
121 | # CONFIG_ARCH_REALVIEW is not set | ||
122 | # CONFIG_ARCH_VERSATILE is not set | ||
123 | # CONFIG_ARCH_AT91 is not set | ||
124 | # CONFIG_ARCH_CLPS7500 is not set | ||
125 | # CONFIG_ARCH_CLPS711X is not set | ||
126 | # CONFIG_ARCH_CO285 is not set | ||
127 | # CONFIG_ARCH_EBSA110 is not set | ||
128 | # CONFIG_ARCH_EP93XX is not set | ||
129 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
130 | # CONFIG_ARCH_NETX is not set | ||
131 | # CONFIG_ARCH_H720X is not set | ||
132 | # CONFIG_ARCH_IMX is not set | ||
133 | # CONFIG_ARCH_IOP13XX is not set | ||
134 | # CONFIG_ARCH_IOP32X is not set | ||
135 | # CONFIG_ARCH_IOP33X is not set | ||
136 | # CONFIG_ARCH_IXP23XX is not set | ||
137 | # CONFIG_ARCH_IXP2000 is not set | ||
138 | # CONFIG_ARCH_IXP4XX is not set | ||
139 | # CONFIG_ARCH_L7200 is not set | ||
140 | # CONFIG_ARCH_KS8695 is not set | ||
141 | # CONFIG_ARCH_NS9XXX is not set | ||
142 | # CONFIG_ARCH_PNX4008 is not set | ||
143 | CONFIG_ARCH_PXA=y | ||
144 | # CONFIG_ARCH_RPC is not set | ||
145 | # CONFIG_ARCH_SA1100 is not set | ||
146 | # CONFIG_ARCH_S3C2410 is not set | ||
147 | # CONFIG_ARCH_SHARK is not set | ||
148 | # CONFIG_ARCH_LH7A40X is not set | ||
149 | # CONFIG_ARCH_DAVINCI is not set | ||
150 | # CONFIG_ARCH_OMAP is not set | ||
151 | |||
152 | # | ||
153 | # Intel PXA2xx Implementations | ||
154 | # | ||
155 | # CONFIG_ARCH_LUBBOCK is not set | ||
156 | # CONFIG_MACH_LOGICPD_PXA270 is not set | ||
157 | # CONFIG_MACH_MAINSTONE is not set | ||
158 | # CONFIG_ARCH_PXA_IDP is not set | ||
159 | # CONFIG_PXA_SHARPSL is not set | ||
160 | # CONFIG_MACH_TRIZEPS4 is not set | ||
161 | CONFIG_MACH_EM_X270=y | ||
162 | CONFIG_PXA27x=y | ||
163 | |||
164 | # | ||
165 | # Processor Type | ||
166 | # | ||
167 | CONFIG_CPU_32=y | ||
168 | CONFIG_CPU_XSCALE=y | ||
169 | CONFIG_CPU_32v5=y | ||
170 | CONFIG_CPU_ABRT_EV5T=y | ||
171 | CONFIG_CPU_CACHE_VIVT=y | ||
172 | CONFIG_CPU_TLB_V4WBI=y | ||
173 | CONFIG_CPU_CP15=y | ||
174 | CONFIG_CPU_CP15_MMU=y | ||
175 | |||
176 | # | ||
177 | # Processor Features | ||
178 | # | ||
179 | CONFIG_ARM_THUMB=y | ||
180 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
181 | # CONFIG_OUTER_CACHE is not set | ||
182 | CONFIG_IWMMXT=y | ||
183 | CONFIG_XSCALE_PMU=y | ||
184 | |||
185 | # | ||
186 | # Bus support | ||
187 | # | ||
188 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
189 | |||
190 | # | ||
191 | # PCCARD (PCMCIA/CardBus) support | ||
192 | # | ||
193 | # CONFIG_PCCARD is not set | ||
194 | |||
195 | # | ||
196 | # Kernel Features | ||
197 | # | ||
198 | # CONFIG_TICK_ONESHOT is not set | ||
199 | # CONFIG_PREEMPT is not set | ||
200 | CONFIG_HZ=100 | ||
201 | CONFIG_AEABI=y | ||
202 | CONFIG_OABI_COMPAT=y | ||
203 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
204 | CONFIG_SELECT_MEMORY_MODEL=y | ||
205 | CONFIG_FLATMEM_MANUAL=y | ||
206 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
207 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
208 | CONFIG_FLATMEM=y | ||
209 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
210 | # CONFIG_SPARSEMEM_STATIC is not set | ||
211 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
212 | # CONFIG_RESOURCES_64BIT is not set | ||
213 | CONFIG_ZONE_DMA_FLAG=1 | ||
214 | CONFIG_ALIGNMENT_TRAP=y | ||
215 | |||
216 | # | ||
217 | # Boot options | ||
218 | # | ||
219 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
220 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
221 | CONFIG_CMDLINE="" | ||
222 | # CONFIG_XIP_KERNEL is not set | ||
223 | # CONFIG_KEXEC is not set | ||
224 | |||
225 | # | ||
226 | # Floating point emulation | ||
227 | # | ||
228 | |||
229 | # | ||
230 | # At least one emulation must be selected | ||
231 | # | ||
232 | CONFIG_FPE_NWFPE=y | ||
233 | # CONFIG_FPE_NWFPE_XP is not set | ||
234 | # CONFIG_FPE_FASTFPE is not set | ||
235 | |||
236 | # | ||
237 | # Userspace binary formats | ||
238 | # | ||
239 | CONFIG_BINFMT_ELF=y | ||
240 | # CONFIG_BINFMT_AOUT is not set | ||
241 | # CONFIG_BINFMT_MISC is not set | ||
242 | |||
243 | # | ||
244 | # Power management options | ||
245 | # | ||
246 | CONFIG_PM=y | ||
247 | CONFIG_PM_LEGACY=y | ||
248 | # CONFIG_PM_DEBUG is not set | ||
249 | # CONFIG_PM_SYSFS_DEPRECATED is not set | ||
250 | CONFIG_APM_EMULATION=m | ||
251 | |||
252 | # | ||
253 | # Networking | ||
254 | # | ||
255 | CONFIG_NET=y | ||
256 | |||
257 | # | ||
258 | # Networking options | ||
259 | # | ||
260 | CONFIG_PACKET=y | ||
261 | # CONFIG_PACKET_MMAP is not set | ||
262 | CONFIG_UNIX=y | ||
263 | CONFIG_XFRM=y | ||
264 | # CONFIG_XFRM_USER is not set | ||
265 | # CONFIG_XFRM_SUB_POLICY is not set | ||
266 | # CONFIG_XFRM_MIGRATE is not set | ||
267 | # CONFIG_NET_KEY is not set | ||
268 | CONFIG_INET=y | ||
269 | # CONFIG_IP_MULTICAST is not set | ||
270 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
271 | CONFIG_IP_FIB_HASH=y | ||
272 | CONFIG_IP_PNP=y | ||
273 | CONFIG_IP_PNP_DHCP=y | ||
274 | CONFIG_IP_PNP_BOOTP=y | ||
275 | # CONFIG_IP_PNP_RARP is not set | ||
276 | # CONFIG_NET_IPIP is not set | ||
277 | # CONFIG_NET_IPGRE is not set | ||
278 | # CONFIG_ARPD is not set | ||
279 | # CONFIG_SYN_COOKIES is not set | ||
280 | # CONFIG_INET_AH is not set | ||
281 | # CONFIG_INET_ESP is not set | ||
282 | # CONFIG_INET_IPCOMP is not set | ||
283 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
284 | # CONFIG_INET_TUNNEL is not set | ||
285 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
286 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
287 | CONFIG_INET_XFRM_MODE_BEET=y | ||
288 | CONFIG_INET_DIAG=y | ||
289 | CONFIG_INET_TCP_DIAG=y | ||
290 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
291 | CONFIG_TCP_CONG_CUBIC=y | ||
292 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
293 | # CONFIG_TCP_MD5SIG is not set | ||
294 | # CONFIG_IPV6 is not set | ||
295 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
296 | # CONFIG_INET6_TUNNEL is not set | ||
297 | # CONFIG_NETWORK_SECMARK is not set | ||
298 | # CONFIG_NETFILTER is not set | ||
299 | # CONFIG_IP_DCCP is not set | ||
300 | # CONFIG_IP_SCTP is not set | ||
301 | # CONFIG_TIPC is not set | ||
302 | # CONFIG_ATM is not set | ||
303 | # CONFIG_BRIDGE is not set | ||
304 | # CONFIG_VLAN_8021Q is not set | ||
305 | # CONFIG_DECNET is not set | ||
306 | # CONFIG_LLC2 is not set | ||
307 | # CONFIG_IPX is not set | ||
308 | # CONFIG_ATALK is not set | ||
309 | # CONFIG_X25 is not set | ||
310 | # CONFIG_LAPB is not set | ||
311 | # CONFIG_ECONET is not set | ||
312 | # CONFIG_WAN_ROUTER is not set | ||
313 | |||
314 | # | ||
315 | # QoS and/or fair queueing | ||
316 | # | ||
317 | # CONFIG_NET_SCHED is not set | ||
318 | |||
319 | # | ||
320 | # Network testing | ||
321 | # | ||
322 | # CONFIG_NET_PKTGEN is not set | ||
323 | # CONFIG_HAMRADIO is not set | ||
324 | # CONFIG_IRDA is not set | ||
325 | CONFIG_BT=m | ||
326 | CONFIG_BT_L2CAP=m | ||
327 | CONFIG_BT_SCO=m | ||
328 | CONFIG_BT_RFCOMM=m | ||
329 | # CONFIG_BT_RFCOMM_TTY is not set | ||
330 | CONFIG_BT_BNEP=m | ||
331 | # CONFIG_BT_BNEP_MC_FILTER is not set | ||
332 | # CONFIG_BT_BNEP_PROTO_FILTER is not set | ||
333 | CONFIG_BT_HIDP=m | ||
334 | |||
335 | # | ||
336 | # Bluetooth device drivers | ||
337 | # | ||
338 | CONFIG_BT_HCIUSB=m | ||
339 | # CONFIG_BT_HCIUSB_SCO is not set | ||
340 | CONFIG_BT_HCIUART=m | ||
341 | # CONFIG_BT_HCIUART_H4 is not set | ||
342 | # CONFIG_BT_HCIUART_BCSP is not set | ||
343 | CONFIG_BT_HCIBCM203X=m | ||
344 | CONFIG_BT_HCIBPA10X=m | ||
345 | CONFIG_BT_HCIBFUSB=m | ||
346 | # CONFIG_BT_HCIVHCI is not set | ||
347 | # CONFIG_AF_RXRPC is not set | ||
348 | |||
349 | # | ||
350 | # Wireless | ||
351 | # | ||
352 | # CONFIG_CFG80211 is not set | ||
353 | # CONFIG_WIRELESS_EXT is not set | ||
354 | # CONFIG_MAC80211 is not set | ||
355 | CONFIG_IEEE80211=m | ||
356 | # CONFIG_IEEE80211_DEBUG is not set | ||
357 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
358 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
359 | # CONFIG_IEEE80211_CRYPT_TKIP is not set | ||
360 | # CONFIG_IEEE80211_SOFTMAC is not set | ||
361 | # CONFIG_RFKILL is not set | ||
362 | |||
363 | # | ||
364 | # Device Drivers | ||
365 | # | ||
366 | |||
367 | # | ||
368 | # Generic Driver Options | ||
369 | # | ||
370 | CONFIG_STANDALONE=y | ||
371 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
372 | CONFIG_FW_LOADER=y | ||
373 | # CONFIG_DEBUG_DRIVER is not set | ||
374 | # CONFIG_DEBUG_DEVRES is not set | ||
375 | # CONFIG_SYS_HYPERVISOR is not set | ||
376 | |||
377 | # | ||
378 | # Connector - unified userspace <-> kernelspace linker | ||
379 | # | ||
380 | # CONFIG_CONNECTOR is not set | ||
381 | CONFIG_MTD=y | ||
382 | # CONFIG_MTD_DEBUG is not set | ||
383 | CONFIG_MTD_CONCAT=y | ||
384 | CONFIG_MTD_PARTITIONS=y | ||
385 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
386 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
387 | # CONFIG_MTD_AFS_PARTS is not set | ||
388 | |||
389 | # | ||
390 | # User Modules And Translation Layers | ||
391 | # | ||
392 | CONFIG_MTD_CHAR=y | ||
393 | CONFIG_MTD_BLKDEVS=y | ||
394 | CONFIG_MTD_BLOCK=y | ||
395 | # CONFIG_FTL is not set | ||
396 | # CONFIG_NFTL is not set | ||
397 | # CONFIG_INFTL is not set | ||
398 | # CONFIG_RFD_FTL is not set | ||
399 | # CONFIG_SSFDC is not set | ||
400 | |||
401 | # | ||
402 | # RAM/ROM/Flash chip drivers | ||
403 | # | ||
404 | # CONFIG_MTD_CFI is not set | ||
405 | # CONFIG_MTD_JEDECPROBE is not set | ||
406 | # CONFIG_MTD_CFI_NOSWAP is not set | ||
407 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
408 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
409 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
410 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
411 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
412 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
413 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
414 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
415 | CONFIG_MTD_CFI_I1=y | ||
416 | CONFIG_MTD_CFI_I2=y | ||
417 | # CONFIG_MTD_CFI_I4 is not set | ||
418 | # CONFIG_MTD_CFI_I8 is not set | ||
419 | # CONFIG_MTD_RAM is not set | ||
420 | # CONFIG_MTD_ROM is not set | ||
421 | # CONFIG_MTD_ABSENT is not set | ||
422 | |||
423 | # | ||
424 | # Mapping drivers for chip access | ||
425 | # | ||
426 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
427 | # CONFIG_MTD_SHARP_SL is not set | ||
428 | # CONFIG_MTD_PLATRAM is not set | ||
429 | |||
430 | # | ||
431 | # Self-contained MTD device drivers | ||
432 | # | ||
433 | # CONFIG_MTD_SLRAM is not set | ||
434 | # CONFIG_MTD_PHRAM is not set | ||
435 | # CONFIG_MTD_MTDRAM is not set | ||
436 | # CONFIG_MTD_BLOCK2MTD is not set | ||
437 | |||
438 | # | ||
439 | # Disk-On-Chip Device Drivers | ||
440 | # | ||
441 | # CONFIG_MTD_DOC2000 is not set | ||
442 | # CONFIG_MTD_DOC2001 is not set | ||
443 | # CONFIG_MTD_DOC2001PLUS is not set | ||
444 | CONFIG_MTD_NAND=y | ||
445 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
446 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
447 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
448 | # CONFIG_MTD_NAND_H1900 is not set | ||
449 | CONFIG_MTD_NAND_IDS=y | ||
450 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
451 | # CONFIG_MTD_NAND_SHARPSL is not set | ||
452 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
453 | CONFIG_MTD_NAND_PLATFORM=y | ||
454 | # CONFIG_MTD_ONENAND is not set | ||
455 | |||
456 | # | ||
457 | # UBI - Unsorted block images | ||
458 | # | ||
459 | # CONFIG_MTD_UBI is not set | ||
460 | |||
461 | # | ||
462 | # Parallel port support | ||
463 | # | ||
464 | # CONFIG_PARPORT is not set | ||
465 | |||
466 | # | ||
467 | # Plug and Play support | ||
468 | # | ||
469 | # CONFIG_PNPACPI is not set | ||
470 | |||
471 | # | ||
472 | # Block devices | ||
473 | # | ||
474 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
475 | CONFIG_BLK_DEV_LOOP=y | ||
476 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
477 | # CONFIG_BLK_DEV_NBD is not set | ||
478 | # CONFIG_BLK_DEV_UB is not set | ||
479 | CONFIG_BLK_DEV_RAM=y | ||
480 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
481 | CONFIG_BLK_DEV_RAM_SIZE=12000 | ||
482 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
483 | # CONFIG_CDROM_PKTCDVD is not set | ||
484 | # CONFIG_ATA_OVER_ETH is not set | ||
485 | # CONFIG_IDE is not set | ||
486 | |||
487 | # | ||
488 | # SCSI device support | ||
489 | # | ||
490 | # CONFIG_RAID_ATTRS is not set | ||
491 | CONFIG_SCSI=y | ||
492 | # CONFIG_SCSI_TGT is not set | ||
493 | # CONFIG_SCSI_NETLINK is not set | ||
494 | # CONFIG_SCSI_PROC_FS is not set | ||
495 | |||
496 | # | ||
497 | # SCSI support type (disk, tape, CD-ROM) | ||
498 | # | ||
499 | CONFIG_BLK_DEV_SD=y | ||
500 | # CONFIG_CHR_DEV_ST is not set | ||
501 | # CONFIG_CHR_DEV_OSST is not set | ||
502 | # CONFIG_BLK_DEV_SR is not set | ||
503 | # CONFIG_CHR_DEV_SG is not set | ||
504 | # CONFIG_CHR_DEV_SCH is not set | ||
505 | |||
506 | # | ||
507 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
508 | # | ||
509 | # CONFIG_SCSI_MULTI_LUN is not set | ||
510 | # CONFIG_SCSI_CONSTANTS is not set | ||
511 | # CONFIG_SCSI_LOGGING is not set | ||
512 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
513 | CONFIG_SCSI_WAIT_SCAN=m | ||
514 | |||
515 | # | ||
516 | # SCSI Transports | ||
517 | # | ||
518 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
519 | # CONFIG_SCSI_FC_ATTRS is not set | ||
520 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
521 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
522 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
523 | |||
524 | # | ||
525 | # SCSI low-level drivers | ||
526 | # | ||
527 | # CONFIG_ISCSI_TCP is not set | ||
528 | # CONFIG_SCSI_DEBUG is not set | ||
529 | # CONFIG_ATA is not set | ||
530 | |||
531 | # | ||
532 | # Multi-device support (RAID and LVM) | ||
533 | # | ||
534 | # CONFIG_MD is not set | ||
535 | |||
536 | # | ||
537 | # Network device support | ||
538 | # | ||
539 | CONFIG_NETDEVICES=y | ||
540 | # CONFIG_DUMMY is not set | ||
541 | # CONFIG_BONDING is not set | ||
542 | # CONFIG_EQUALIZER is not set | ||
543 | # CONFIG_TUN is not set | ||
544 | # CONFIG_PHYLIB is not set | ||
545 | |||
546 | # | ||
547 | # Ethernet (10 or 100Mbit) | ||
548 | # | ||
549 | CONFIG_NET_ETHERNET=y | ||
550 | CONFIG_MII=y | ||
551 | # CONFIG_SMC91X is not set | ||
552 | CONFIG_DM9000=y | ||
553 | # CONFIG_SMC911X is not set | ||
554 | # CONFIG_NETDEV_1000 is not set | ||
555 | # CONFIG_NETDEV_10000 is not set | ||
556 | |||
557 | # | ||
558 | # Wireless LAN | ||
559 | # | ||
560 | # CONFIG_WLAN_PRE80211 is not set | ||
561 | # CONFIG_WLAN_80211 is not set | ||
562 | |||
563 | # | ||
564 | # USB Network Adapters | ||
565 | # | ||
566 | # CONFIG_USB_CATC is not set | ||
567 | # CONFIG_USB_KAWETH is not set | ||
568 | # CONFIG_USB_PEGASUS is not set | ||
569 | # CONFIG_USB_RTL8150 is not set | ||
570 | # CONFIG_USB_USBNET_MII is not set | ||
571 | # CONFIG_USB_USBNET is not set | ||
572 | # CONFIG_WAN is not set | ||
573 | # CONFIG_PPP is not set | ||
574 | # CONFIG_SLIP is not set | ||
575 | # CONFIG_SHAPER is not set | ||
576 | # CONFIG_NETCONSOLE is not set | ||
577 | # CONFIG_NETPOLL is not set | ||
578 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
579 | |||
580 | # | ||
581 | # ISDN subsystem | ||
582 | # | ||
583 | # CONFIG_ISDN is not set | ||
584 | |||
585 | # | ||
586 | # Input device support | ||
587 | # | ||
588 | CONFIG_INPUT=y | ||
589 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
590 | # CONFIG_INPUT_POLLDEV is not set | ||
591 | |||
592 | # | ||
593 | # Userland interfaces | ||
594 | # | ||
595 | CONFIG_INPUT_MOUSEDEV=y | ||
596 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
597 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
598 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
599 | # CONFIG_INPUT_JOYDEV is not set | ||
600 | # CONFIG_INPUT_TSDEV is not set | ||
601 | CONFIG_INPUT_EVDEV=y | ||
602 | # CONFIG_INPUT_EVBUG is not set | ||
603 | |||
604 | # | ||
605 | # Input Device Drivers | ||
606 | # | ||
607 | CONFIG_INPUT_KEYBOARD=y | ||
608 | # CONFIG_KEYBOARD_ATKBD is not set | ||
609 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
610 | # CONFIG_KEYBOARD_LKKBD is not set | ||
611 | # CONFIG_KEYBOARD_XTKBD is not set | ||
612 | # CONFIG_KEYBOARD_NEWTON is not set | ||
613 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
614 | CONFIG_KEYBOARD_PXA27x=m | ||
615 | # CONFIG_KEYBOARD_GPIO is not set | ||
616 | # CONFIG_INPUT_MOUSE is not set | ||
617 | # CONFIG_INPUT_JOYSTICK is not set | ||
618 | # CONFIG_INPUT_TABLET is not set | ||
619 | CONFIG_INPUT_TOUCHSCREEN=y | ||
620 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
621 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
622 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
623 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
624 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
625 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
626 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
627 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
628 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
629 | # CONFIG_INPUT_MISC is not set | ||
630 | |||
631 | # | ||
632 | # Hardware I/O ports | ||
633 | # | ||
634 | CONFIG_SERIO=y | ||
635 | # CONFIG_SERIO_SERPORT is not set | ||
636 | CONFIG_SERIO_LIBPS2=y | ||
637 | # CONFIG_SERIO_RAW is not set | ||
638 | # CONFIG_GAMEPORT is not set | ||
639 | |||
640 | # | ||
641 | # Character devices | ||
642 | # | ||
643 | CONFIG_VT=y | ||
644 | CONFIG_VT_CONSOLE=y | ||
645 | CONFIG_HW_CONSOLE=y | ||
646 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
647 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
648 | |||
649 | # | ||
650 | # Serial drivers | ||
651 | # | ||
652 | # CONFIG_SERIAL_8250 is not set | ||
653 | |||
654 | # | ||
655 | # Non-8250 serial port support | ||
656 | # | ||
657 | CONFIG_SERIAL_PXA=y | ||
658 | CONFIG_SERIAL_PXA_CONSOLE=y | ||
659 | CONFIG_SERIAL_CORE=y | ||
660 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
661 | CONFIG_UNIX98_PTYS=y | ||
662 | CONFIG_LEGACY_PTYS=y | ||
663 | CONFIG_LEGACY_PTY_COUNT=256 | ||
664 | |||
665 | # | ||
666 | # IPMI | ||
667 | # | ||
668 | # CONFIG_IPMI_HANDLER is not set | ||
669 | # CONFIG_WATCHDOG is not set | ||
670 | CONFIG_HW_RANDOM=m | ||
671 | # CONFIG_NVRAM is not set | ||
672 | # CONFIG_R3964 is not set | ||
673 | # CONFIG_RAW_DRIVER is not set | ||
674 | |||
675 | # | ||
676 | # TPM devices | ||
677 | # | ||
678 | # CONFIG_TCG_TPM is not set | ||
679 | # CONFIG_I2C is not set | ||
680 | |||
681 | # | ||
682 | # SPI support | ||
683 | # | ||
684 | # CONFIG_SPI is not set | ||
685 | # CONFIG_SPI_MASTER is not set | ||
686 | |||
687 | # | ||
688 | # Dallas's 1-wire bus | ||
689 | # | ||
690 | # CONFIG_W1 is not set | ||
691 | # CONFIG_HWMON is not set | ||
692 | |||
693 | # | ||
694 | # Misc devices | ||
695 | # | ||
696 | |||
697 | # | ||
698 | # Multifunction device drivers | ||
699 | # | ||
700 | # CONFIG_MFD_SM501 is not set | ||
701 | |||
702 | # | ||
703 | # LED devices | ||
704 | # | ||
705 | # CONFIG_NEW_LEDS is not set | ||
706 | |||
707 | # | ||
708 | # LED drivers | ||
709 | # | ||
710 | |||
711 | # | ||
712 | # LED Triggers | ||
713 | # | ||
714 | |||
715 | # | ||
716 | # Multimedia devices | ||
717 | # | ||
718 | # CONFIG_VIDEO_DEV is not set | ||
719 | # CONFIG_DVB_CORE is not set | ||
720 | # CONFIG_DAB is not set | ||
721 | |||
722 | # | ||
723 | # Graphics support | ||
724 | # | ||
725 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
726 | |||
727 | # | ||
728 | # Display device support | ||
729 | # | ||
730 | # CONFIG_DISPLAY_SUPPORT is not set | ||
731 | # CONFIG_VGASTATE is not set | ||
732 | CONFIG_FB=y | ||
733 | # CONFIG_FIRMWARE_EDID is not set | ||
734 | # CONFIG_FB_DDC is not set | ||
735 | CONFIG_FB_CFB_FILLRECT=y | ||
736 | CONFIG_FB_CFB_COPYAREA=y | ||
737 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
738 | # CONFIG_FB_SYS_FILLRECT is not set | ||
739 | # CONFIG_FB_SYS_COPYAREA is not set | ||
740 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
741 | # CONFIG_FB_SYS_FOPS is not set | ||
742 | CONFIG_FB_DEFERRED_IO=y | ||
743 | # CONFIG_FB_SVGALIB is not set | ||
744 | # CONFIG_FB_MACMODES is not set | ||
745 | # CONFIG_FB_BACKLIGHT is not set | ||
746 | # CONFIG_FB_MODE_HELPERS is not set | ||
747 | # CONFIG_FB_TILEBLITTING is not set | ||
748 | |||
749 | # | ||
750 | # Frame buffer hardware drivers | ||
751 | # | ||
752 | # CONFIG_FB_S1D13XXX is not set | ||
753 | CONFIG_FB_PXA=y | ||
754 | # CONFIG_FB_PXA_PARAMETERS is not set | ||
755 | # CONFIG_FB_MBX is not set | ||
756 | # CONFIG_FB_VIRTUAL is not set | ||
757 | |||
758 | # | ||
759 | # Console display driver support | ||
760 | # | ||
761 | # CONFIG_VGA_CONSOLE is not set | ||
762 | CONFIG_DUMMY_CONSOLE=y | ||
763 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
764 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
765 | # CONFIG_FONTS is not set | ||
766 | CONFIG_FONT_8x8=y | ||
767 | CONFIG_FONT_8x16=y | ||
768 | CONFIG_LOGO=y | ||
769 | CONFIG_LOGO_LINUX_MONO=y | ||
770 | CONFIG_LOGO_LINUX_VGA16=y | ||
771 | CONFIG_LOGO_LINUX_CLUT224=y | ||
772 | |||
773 | # | ||
774 | # Sound | ||
775 | # | ||
776 | CONFIG_SOUND=m | ||
777 | |||
778 | # | ||
779 | # Advanced Linux Sound Architecture | ||
780 | # | ||
781 | CONFIG_SND=m | ||
782 | CONFIG_SND_TIMER=m | ||
783 | CONFIG_SND_PCM=m | ||
784 | # CONFIG_SND_SEQUENCER is not set | ||
785 | CONFIG_SND_OSSEMUL=y | ||
786 | CONFIG_SND_MIXER_OSS=m | ||
787 | CONFIG_SND_PCM_OSS=m | ||
788 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
789 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
790 | CONFIG_SND_SUPPORT_OLD_API=y | ||
791 | CONFIG_SND_VERBOSE_PROCFS=y | ||
792 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
793 | # CONFIG_SND_DEBUG is not set | ||
794 | |||
795 | # | ||
796 | # Generic devices | ||
797 | # | ||
798 | CONFIG_SND_AC97_CODEC=m | ||
799 | # CONFIG_SND_DUMMY is not set | ||
800 | # CONFIG_SND_MTPAV is not set | ||
801 | # CONFIG_SND_SERIAL_U16550 is not set | ||
802 | # CONFIG_SND_MPU401 is not set | ||
803 | |||
804 | # | ||
805 | # ALSA ARM devices | ||
806 | # | ||
807 | CONFIG_SND_PXA2XX_PCM=m | ||
808 | CONFIG_SND_PXA2XX_AC97=m | ||
809 | |||
810 | # | ||
811 | # USB devices | ||
812 | # | ||
813 | # CONFIG_SND_USB_AUDIO is not set | ||
814 | # CONFIG_SND_USB_CAIAQ is not set | ||
815 | |||
816 | # | ||
817 | # System on Chip audio support | ||
818 | # | ||
819 | # CONFIG_SND_SOC is not set | ||
820 | |||
821 | # | ||
822 | # Open Sound System | ||
823 | # | ||
824 | # CONFIG_SOUND_PRIME is not set | ||
825 | CONFIG_AC97_BUS=m | ||
826 | |||
827 | # | ||
828 | # HID Devices | ||
829 | # | ||
830 | CONFIG_HID=y | ||
831 | # CONFIG_HID_DEBUG is not set | ||
832 | |||
833 | # | ||
834 | # USB Input Devices | ||
835 | # | ||
836 | CONFIG_USB_HID=y | ||
837 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
838 | # CONFIG_HID_FF is not set | ||
839 | # CONFIG_USB_HIDDEV is not set | ||
840 | |||
841 | # | ||
842 | # USB support | ||
843 | # | ||
844 | CONFIG_USB_ARCH_HAS_HCD=y | ||
845 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
846 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
847 | CONFIG_USB=y | ||
848 | # CONFIG_USB_DEBUG is not set | ||
849 | |||
850 | # | ||
851 | # Miscellaneous USB options | ||
852 | # | ||
853 | CONFIG_USB_DEVICEFS=y | ||
854 | # CONFIG_USB_DEVICE_CLASS is not set | ||
855 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
856 | # CONFIG_USB_SUSPEND is not set | ||
857 | # CONFIG_USB_OTG is not set | ||
858 | |||
859 | # | ||
860 | # USB Host Controller Drivers | ||
861 | # | ||
862 | # CONFIG_USB_ISP116X_HCD is not set | ||
863 | CONFIG_USB_OHCI_HCD=y | ||
864 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
865 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
866 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
867 | # CONFIG_USB_SL811_HCD is not set | ||
868 | |||
869 | # | ||
870 | # USB Device Class drivers | ||
871 | # | ||
872 | # CONFIG_USB_ACM is not set | ||
873 | # CONFIG_USB_PRINTER is not set | ||
874 | |||
875 | # | ||
876 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
877 | # | ||
878 | |||
879 | # | ||
880 | # may also be needed; see USB_STORAGE Help for more information | ||
881 | # | ||
882 | CONFIG_USB_STORAGE=y | ||
883 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
884 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
885 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
886 | # CONFIG_USB_STORAGE_DPCM is not set | ||
887 | # CONFIG_USB_STORAGE_USBAT is not set | ||
888 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
889 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
890 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
891 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
892 | # CONFIG_USB_STORAGE_KARMA is not set | ||
893 | # CONFIG_USB_LIBUSUAL is not set | ||
894 | |||
895 | # | ||
896 | # USB Imaging devices | ||
897 | # | ||
898 | # CONFIG_USB_MDC800 is not set | ||
899 | # CONFIG_USB_MICROTEK is not set | ||
900 | # CONFIG_USB_MON is not set | ||
901 | |||
902 | # | ||
903 | # USB port drivers | ||
904 | # | ||
905 | |||
906 | # | ||
907 | # USB Serial Converter support | ||
908 | # | ||
909 | # CONFIG_USB_SERIAL is not set | ||
910 | |||
911 | # | ||
912 | # USB Miscellaneous drivers | ||
913 | # | ||
914 | # CONFIG_USB_EMI62 is not set | ||
915 | # CONFIG_USB_EMI26 is not set | ||
916 | # CONFIG_USB_ADUTUX is not set | ||
917 | # CONFIG_USB_AUERSWALD is not set | ||
918 | # CONFIG_USB_RIO500 is not set | ||
919 | # CONFIG_USB_LEGOTOWER is not set | ||
920 | # CONFIG_USB_LCD is not set | ||
921 | # CONFIG_USB_BERRY_CHARGE is not set | ||
922 | # CONFIG_USB_LED is not set | ||
923 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
924 | # CONFIG_USB_CYTHERM is not set | ||
925 | # CONFIG_USB_PHIDGET is not set | ||
926 | # CONFIG_USB_IDMOUSE is not set | ||
927 | # CONFIG_USB_FTDI_ELAN is not set | ||
928 | # CONFIG_USB_APPLEDISPLAY is not set | ||
929 | # CONFIG_USB_LD is not set | ||
930 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
931 | # CONFIG_USB_IOWARRIOR is not set | ||
932 | # CONFIG_USB_TEST is not set | ||
933 | |||
934 | # | ||
935 | # USB DSL modem support | ||
936 | # | ||
937 | |||
938 | # | ||
939 | # USB Gadget Support | ||
940 | # | ||
941 | # CONFIG_USB_GADGET is not set | ||
942 | CONFIG_MMC=m | ||
943 | # CONFIG_MMC_DEBUG is not set | ||
944 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
945 | |||
946 | # | ||
947 | # MMC/SD Card Drivers | ||
948 | # | ||
949 | CONFIG_MMC_BLOCK=m | ||
950 | |||
951 | # | ||
952 | # MMC/SD Host Controller Drivers | ||
953 | # | ||
954 | CONFIG_MMC_PXA=m | ||
955 | |||
956 | # | ||
957 | # Real Time Clock | ||
958 | # | ||
959 | CONFIG_RTC_LIB=y | ||
960 | CONFIG_RTC_CLASS=m | ||
961 | |||
962 | # | ||
963 | # RTC interfaces | ||
964 | # | ||
965 | CONFIG_RTC_INTF_SYSFS=y | ||
966 | CONFIG_RTC_INTF_PROC=y | ||
967 | CONFIG_RTC_INTF_DEV=y | ||
968 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
969 | # CONFIG_RTC_DRV_TEST is not set | ||
970 | |||
971 | # | ||
972 | # I2C RTC drivers | ||
973 | # | ||
974 | |||
975 | # | ||
976 | # SPI RTC drivers | ||
977 | # | ||
978 | |||
979 | # | ||
980 | # Platform RTC drivers | ||
981 | # | ||
982 | # CONFIG_RTC_DRV_CMOS is not set | ||
983 | # CONFIG_RTC_DRV_DS1553 is not set | ||
984 | # CONFIG_RTC_DRV_DS1742 is not set | ||
985 | # CONFIG_RTC_DRV_M48T86 is not set | ||
986 | CONFIG_RTC_DRV_V3020=m | ||
987 | |||
988 | # | ||
989 | # on-CPU RTC drivers | ||
990 | # | ||
991 | CONFIG_RTC_DRV_SA1100=m | ||
992 | |||
993 | # | ||
994 | # File systems | ||
995 | # | ||
996 | CONFIG_EXT2_FS=y | ||
997 | # CONFIG_EXT2_FS_XATTR is not set | ||
998 | # CONFIG_EXT2_FS_XIP is not set | ||
999 | CONFIG_EXT3_FS=y | ||
1000 | CONFIG_EXT3_FS_XATTR=y | ||
1001 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
1002 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1003 | # CONFIG_EXT4DEV_FS is not set | ||
1004 | CONFIG_JBD=y | ||
1005 | # CONFIG_JBD_DEBUG is not set | ||
1006 | CONFIG_FS_MBCACHE=y | ||
1007 | # CONFIG_REISERFS_FS is not set | ||
1008 | # CONFIG_JFS_FS is not set | ||
1009 | # CONFIG_FS_POSIX_ACL is not set | ||
1010 | # CONFIG_XFS_FS is not set | ||
1011 | # CONFIG_GFS2_FS is not set | ||
1012 | # CONFIG_OCFS2_FS is not set | ||
1013 | # CONFIG_MINIX_FS is not set | ||
1014 | # CONFIG_ROMFS_FS is not set | ||
1015 | CONFIG_INOTIFY=y | ||
1016 | CONFIG_INOTIFY_USER=y | ||
1017 | # CONFIG_QUOTA is not set | ||
1018 | CONFIG_DNOTIFY=y | ||
1019 | # CONFIG_AUTOFS_FS is not set | ||
1020 | # CONFIG_AUTOFS4_FS is not set | ||
1021 | # CONFIG_FUSE_FS is not set | ||
1022 | |||
1023 | # | ||
1024 | # CD-ROM/DVD Filesystems | ||
1025 | # | ||
1026 | # CONFIG_ISO9660_FS is not set | ||
1027 | # CONFIG_UDF_FS is not set | ||
1028 | |||
1029 | # | ||
1030 | # DOS/FAT/NT Filesystems | ||
1031 | # | ||
1032 | CONFIG_FAT_FS=y | ||
1033 | CONFIG_MSDOS_FS=y | ||
1034 | CONFIG_VFAT_FS=y | ||
1035 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1036 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1037 | # CONFIG_NTFS_FS is not set | ||
1038 | |||
1039 | # | ||
1040 | # Pseudo filesystems | ||
1041 | # | ||
1042 | CONFIG_PROC_FS=y | ||
1043 | CONFIG_PROC_SYSCTL=y | ||
1044 | CONFIG_SYSFS=y | ||
1045 | CONFIG_TMPFS=y | ||
1046 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1047 | # CONFIG_HUGETLB_PAGE is not set | ||
1048 | CONFIG_RAMFS=y | ||
1049 | # CONFIG_CONFIGFS_FS is not set | ||
1050 | |||
1051 | # | ||
1052 | # Miscellaneous filesystems | ||
1053 | # | ||
1054 | # CONFIG_ADFS_FS is not set | ||
1055 | # CONFIG_AFFS_FS is not set | ||
1056 | # CONFIG_HFS_FS is not set | ||
1057 | # CONFIG_HFSPLUS_FS is not set | ||
1058 | # CONFIG_BEFS_FS is not set | ||
1059 | # CONFIG_BFS_FS is not set | ||
1060 | # CONFIG_EFS_FS is not set | ||
1061 | CONFIG_JFFS2_FS=y | ||
1062 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1063 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1064 | CONFIG_JFFS2_SUMMARY=y | ||
1065 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1066 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1067 | CONFIG_JFFS2_ZLIB=y | ||
1068 | CONFIG_JFFS2_RTIME=y | ||
1069 | # CONFIG_JFFS2_RUBIN is not set | ||
1070 | # CONFIG_CRAMFS is not set | ||
1071 | # CONFIG_VXFS_FS is not set | ||
1072 | # CONFIG_HPFS_FS is not set | ||
1073 | # CONFIG_QNX4FS_FS is not set | ||
1074 | # CONFIG_SYSV_FS is not set | ||
1075 | # CONFIG_UFS_FS is not set | ||
1076 | |||
1077 | # | ||
1078 | # Network File Systems | ||
1079 | # | ||
1080 | CONFIG_NFS_FS=y | ||
1081 | CONFIG_NFS_V3=y | ||
1082 | # CONFIG_NFS_V3_ACL is not set | ||
1083 | # CONFIG_NFS_V4 is not set | ||
1084 | # CONFIG_NFS_DIRECTIO is not set | ||
1085 | # CONFIG_NFSD is not set | ||
1086 | CONFIG_ROOT_NFS=y | ||
1087 | CONFIG_LOCKD=y | ||
1088 | CONFIG_LOCKD_V4=y | ||
1089 | CONFIG_NFS_COMMON=y | ||
1090 | CONFIG_SUNRPC=y | ||
1091 | # CONFIG_SUNRPC_BIND34 is not set | ||
1092 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1093 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1094 | CONFIG_SMB_FS=y | ||
1095 | # CONFIG_SMB_NLS_DEFAULT is not set | ||
1096 | # CONFIG_CIFS is not set | ||
1097 | # CONFIG_NCP_FS is not set | ||
1098 | # CONFIG_CODA_FS is not set | ||
1099 | # CONFIG_AFS_FS is not set | ||
1100 | # CONFIG_9P_FS is not set | ||
1101 | |||
1102 | # | ||
1103 | # Partition Types | ||
1104 | # | ||
1105 | # CONFIG_PARTITION_ADVANCED is not set | ||
1106 | CONFIG_MSDOS_PARTITION=y | ||
1107 | |||
1108 | # | ||
1109 | # Native Language Support | ||
1110 | # | ||
1111 | CONFIG_NLS=y | ||
1112 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1113 | CONFIG_NLS_CODEPAGE_437=y | ||
1114 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1115 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1116 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1117 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1118 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1119 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1120 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1121 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1122 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1123 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1124 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1125 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1126 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1127 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1128 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1129 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1130 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1131 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1132 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1133 | # CONFIG_NLS_ISO8859_8 is not set | ||
1134 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1135 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1136 | # CONFIG_NLS_ASCII is not set | ||
1137 | CONFIG_NLS_ISO8859_1=y | ||
1138 | # CONFIG_NLS_ISO8859_2 is not set | ||
1139 | # CONFIG_NLS_ISO8859_3 is not set | ||
1140 | # CONFIG_NLS_ISO8859_4 is not set | ||
1141 | # CONFIG_NLS_ISO8859_5 is not set | ||
1142 | # CONFIG_NLS_ISO8859_6 is not set | ||
1143 | # CONFIG_NLS_ISO8859_7 is not set | ||
1144 | # CONFIG_NLS_ISO8859_9 is not set | ||
1145 | # CONFIG_NLS_ISO8859_13 is not set | ||
1146 | # CONFIG_NLS_ISO8859_14 is not set | ||
1147 | # CONFIG_NLS_ISO8859_15 is not set | ||
1148 | # CONFIG_NLS_KOI8_R is not set | ||
1149 | # CONFIG_NLS_KOI8_U is not set | ||
1150 | CONFIG_NLS_UTF8=y | ||
1151 | |||
1152 | # | ||
1153 | # Distributed Lock Manager | ||
1154 | # | ||
1155 | # CONFIG_DLM is not set | ||
1156 | |||
1157 | # | ||
1158 | # Profiling support | ||
1159 | # | ||
1160 | # CONFIG_PROFILING is not set | ||
1161 | |||
1162 | # | ||
1163 | # Kernel hacking | ||
1164 | # | ||
1165 | # CONFIG_PRINTK_TIME is not set | ||
1166 | CONFIG_ENABLE_MUST_CHECK=y | ||
1167 | CONFIG_MAGIC_SYSRQ=y | ||
1168 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1169 | # CONFIG_DEBUG_FS is not set | ||
1170 | # CONFIG_HEADERS_CHECK is not set | ||
1171 | CONFIG_DEBUG_KERNEL=y | ||
1172 | # CONFIG_DEBUG_SHIRQ is not set | ||
1173 | # CONFIG_DETECT_SOFTLOCKUP is not set | ||
1174 | # CONFIG_SCHEDSTATS is not set | ||
1175 | # CONFIG_TIMER_STATS is not set | ||
1176 | # CONFIG_DEBUG_SLAB is not set | ||
1177 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1178 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1179 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1180 | # CONFIG_DEBUG_MUTEXES is not set | ||
1181 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
1182 | # CONFIG_PROVE_LOCKING is not set | ||
1183 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1184 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1185 | # CONFIG_DEBUG_KOBJECT is not set | ||
1186 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1187 | CONFIG_DEBUG_INFO=y | ||
1188 | # CONFIG_DEBUG_VM is not set | ||
1189 | # CONFIG_DEBUG_LIST is not set | ||
1190 | CONFIG_FRAME_POINTER=y | ||
1191 | CONFIG_FORCED_INLINING=y | ||
1192 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1193 | # CONFIG_FAULT_INJECTION is not set | ||
1194 | CONFIG_DEBUG_USER=y | ||
1195 | CONFIG_DEBUG_ERRORS=y | ||
1196 | CONFIG_DEBUG_LL=y | ||
1197 | # CONFIG_DEBUG_ICEDCC is not set | ||
1198 | |||
1199 | # | ||
1200 | # Security options | ||
1201 | # | ||
1202 | # CONFIG_KEYS is not set | ||
1203 | # CONFIG_SECURITY is not set | ||
1204 | |||
1205 | # | ||
1206 | # Cryptographic options | ||
1207 | # | ||
1208 | CONFIG_CRYPTO=y | ||
1209 | CONFIG_CRYPTO_ALGAPI=m | ||
1210 | CONFIG_CRYPTO_BLKCIPHER=m | ||
1211 | CONFIG_CRYPTO_MANAGER=m | ||
1212 | # CONFIG_CRYPTO_HMAC is not set | ||
1213 | # CONFIG_CRYPTO_XCBC is not set | ||
1214 | # CONFIG_CRYPTO_NULL is not set | ||
1215 | # CONFIG_CRYPTO_MD4 is not set | ||
1216 | # CONFIG_CRYPTO_MD5 is not set | ||
1217 | # CONFIG_CRYPTO_SHA1 is not set | ||
1218 | # CONFIG_CRYPTO_SHA256 is not set | ||
1219 | # CONFIG_CRYPTO_SHA512 is not set | ||
1220 | # CONFIG_CRYPTO_WP512 is not set | ||
1221 | # CONFIG_CRYPTO_TGR192 is not set | ||
1222 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1223 | CONFIG_CRYPTO_ECB=m | ||
1224 | CONFIG_CRYPTO_CBC=m | ||
1225 | CONFIG_CRYPTO_PCBC=m | ||
1226 | # CONFIG_CRYPTO_LRW is not set | ||
1227 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1228 | # CONFIG_CRYPTO_DES is not set | ||
1229 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1230 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1231 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1232 | # CONFIG_CRYPTO_SERPENT is not set | ||
1233 | CONFIG_CRYPTO_AES=m | ||
1234 | # CONFIG_CRYPTO_CAST5 is not set | ||
1235 | # CONFIG_CRYPTO_CAST6 is not set | ||
1236 | # CONFIG_CRYPTO_TEA is not set | ||
1237 | CONFIG_CRYPTO_ARC4=m | ||
1238 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1239 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1240 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1241 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1242 | # CONFIG_CRYPTO_CRC32C is not set | ||
1243 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1244 | # CONFIG_CRYPTO_TEST is not set | ||
1245 | |||
1246 | # | ||
1247 | # Hardware crypto devices | ||
1248 | # | ||
1249 | |||
1250 | # | ||
1251 | # Library routines | ||
1252 | # | ||
1253 | CONFIG_BITREVERSE=y | ||
1254 | # CONFIG_CRC_CCITT is not set | ||
1255 | # CONFIG_CRC16 is not set | ||
1256 | # CONFIG_CRC_ITU_T is not set | ||
1257 | CONFIG_CRC32=y | ||
1258 | # CONFIG_LIBCRC32C is not set | ||
1259 | CONFIG_ZLIB_INFLATE=y | ||
1260 | CONFIG_ZLIB_DEFLATE=y | ||
1261 | CONFIG_PLIST=y | ||
1262 | CONFIG_HAS_IOMEM=y | ||
1263 | CONFIG_HAS_IOPORT=y | ||
1264 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/cm_x270_defconfig b/arch/arm/configs/xm_x270_defconfig index 33b201c3b309..aa40d91ce599 100644 --- a/arch/arm/configs/cm_x270_defconfig +++ b/arch/arm/configs/xm_x270_defconfig | |||
@@ -1,13 +1,13 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.22 | 3 | # Linux kernel version: 2.6.25 |
4 | # Wed Jul 18 14:11:48 2007 | 4 | # Sun May 11 15:12:52 2008 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
9 | CONFIG_GENERIC_TIME=y | 9 | CONFIG_GENERIC_TIME=y |
10 | # CONFIG_GENERIC_CLOCKEVENTS is not set | 10 | CONFIG_GENERIC_CLOCKEVENTS=y |
11 | CONFIG_MMU=y | 11 | CONFIG_MMU=y |
12 | # CONFIG_NO_IOPORT is not set | 12 | # CONFIG_NO_IOPORT is not set |
13 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
@@ -21,21 +21,18 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y | |||
21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
22 | CONFIG_GENERIC_HWEIGHT=y | 22 | CONFIG_GENERIC_HWEIGHT=y |
23 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 23 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
24 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
24 | CONFIG_ZONE_DMA=y | 25 | CONFIG_ZONE_DMA=y |
25 | CONFIG_ARCH_MTD_XIP=y | 26 | CONFIG_ARCH_MTD_XIP=y |
26 | CONFIG_VECTORS_BASE=0xffff0000 | 27 | CONFIG_VECTORS_BASE=0xffff0000 |
27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
28 | 29 | ||
29 | # | 30 | # |
30 | # Code maturity level options | 31 | # General setup |
31 | # | 32 | # |
32 | CONFIG_EXPERIMENTAL=y | 33 | CONFIG_EXPERIMENTAL=y |
33 | CONFIG_BROKEN_ON_SMP=y | 34 | CONFIG_BROKEN_ON_SMP=y |
34 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 35 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
35 | |||
36 | # | ||
37 | # General setup | ||
38 | # | ||
39 | CONFIG_LOCALVERSION="" | 36 | CONFIG_LOCALVERSION="" |
40 | # CONFIG_LOCALVERSION_AUTO is not set | 37 | # CONFIG_LOCALVERSION_AUTO is not set |
41 | CONFIG_SWAP=y | 38 | CONFIG_SWAP=y |
@@ -44,13 +41,20 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
44 | # CONFIG_POSIX_MQUEUE is not set | 41 | # CONFIG_POSIX_MQUEUE is not set |
45 | # CONFIG_BSD_PROCESS_ACCT is not set | 42 | # CONFIG_BSD_PROCESS_ACCT is not set |
46 | # CONFIG_TASKSTATS is not set | 43 | # CONFIG_TASKSTATS is not set |
47 | # CONFIG_USER_NS is not set | ||
48 | # CONFIG_AUDIT is not set | 44 | # CONFIG_AUDIT is not set |
49 | CONFIG_IKCONFIG=y | 45 | CONFIG_IKCONFIG=y |
50 | CONFIG_IKCONFIG_PROC=y | 46 | CONFIG_IKCONFIG_PROC=y |
51 | CONFIG_LOG_BUF_SHIFT=17 | 47 | CONFIG_LOG_BUF_SHIFT=14 |
48 | # CONFIG_CGROUPS is not set | ||
49 | CONFIG_GROUP_SCHED=y | ||
50 | CONFIG_FAIR_GROUP_SCHED=y | ||
51 | # CONFIG_RT_GROUP_SCHED is not set | ||
52 | CONFIG_USER_SCHED=y | ||
53 | # CONFIG_CGROUP_SCHED is not set | ||
52 | CONFIG_SYSFS_DEPRECATED=y | 54 | CONFIG_SYSFS_DEPRECATED=y |
55 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
53 | # CONFIG_RELAY is not set | 56 | # CONFIG_RELAY is not set |
57 | # CONFIG_NAMESPACES is not set | ||
54 | CONFIG_BLK_DEV_INITRD=y | 58 | CONFIG_BLK_DEV_INITRD=y |
55 | CONFIG_INITRAMFS_SOURCE="" | 59 | CONFIG_INITRAMFS_SOURCE="" |
56 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 60 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
@@ -58,6 +62,7 @@ CONFIG_SYSCTL=y | |||
58 | CONFIG_EMBEDDED=y | 62 | CONFIG_EMBEDDED=y |
59 | CONFIG_UID16=y | 63 | CONFIG_UID16=y |
60 | CONFIG_SYSCTL_SYSCALL=y | 64 | CONFIG_SYSCTL_SYSCALL=y |
65 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
61 | CONFIG_KALLSYMS=y | 66 | CONFIG_KALLSYMS=y |
62 | # CONFIG_KALLSYMS_ALL is not set | 67 | # CONFIG_KALLSYMS_ALL is not set |
63 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 68 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
@@ -65,24 +70,34 @@ CONFIG_HOTPLUG=y | |||
65 | CONFIG_PRINTK=y | 70 | CONFIG_PRINTK=y |
66 | CONFIG_BUG=y | 71 | CONFIG_BUG=y |
67 | CONFIG_ELF_CORE=y | 72 | CONFIG_ELF_CORE=y |
73 | # CONFIG_COMPAT_BRK is not set | ||
68 | CONFIG_BASE_FULL=y | 74 | CONFIG_BASE_FULL=y |
69 | CONFIG_FUTEX=y | 75 | CONFIG_FUTEX=y |
70 | CONFIG_ANON_INODES=y | 76 | CONFIG_ANON_INODES=y |
71 | # CONFIG_EPOLL is not set | 77 | CONFIG_EPOLL=y |
72 | # CONFIG_SIGNALFD is not set | 78 | CONFIG_SIGNALFD=y |
73 | # CONFIG_TIMERFD is not set | 79 | CONFIG_TIMERFD=y |
74 | # CONFIG_EVENTFD is not set | 80 | CONFIG_EVENTFD=y |
75 | CONFIG_SHMEM=y | 81 | CONFIG_SHMEM=y |
76 | CONFIG_VM_EVENT_COUNTERS=y | 82 | # CONFIG_VM_EVENT_COUNTERS is not set |
77 | CONFIG_SLAB=y | 83 | # CONFIG_SLUB_DEBUG is not set |
78 | # CONFIG_SLUB is not set | 84 | # CONFIG_SLAB is not set |
85 | CONFIG_SLUB=y | ||
79 | # CONFIG_SLOB is not set | 86 | # CONFIG_SLOB is not set |
87 | # CONFIG_PROFILING is not set | ||
88 | # CONFIG_MARKERS is not set | ||
89 | CONFIG_HAVE_OPROFILE=y | ||
90 | # CONFIG_KPROBES is not set | ||
91 | CONFIG_HAVE_KPROBES=y | ||
92 | CONFIG_HAVE_KRETPROBES=y | ||
93 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
94 | # CONFIG_PROC_PAGE_MONITOR is not set | ||
80 | CONFIG_RT_MUTEXES=y | 95 | CONFIG_RT_MUTEXES=y |
81 | # CONFIG_TINY_SHMEM is not set | 96 | # CONFIG_TINY_SHMEM is not set |
82 | CONFIG_BASE_SMALL=0 | 97 | CONFIG_BASE_SMALL=0 |
83 | CONFIG_MODULES=y | 98 | CONFIG_MODULES=y |
84 | CONFIG_MODULE_UNLOAD=y | 99 | CONFIG_MODULE_UNLOAD=y |
85 | CONFIG_MODULE_FORCE_UNLOAD=y | 100 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
86 | # CONFIG_MODVERSIONS is not set | 101 | # CONFIG_MODVERSIONS is not set |
87 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 102 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
88 | CONFIG_KMOD=y | 103 | CONFIG_KMOD=y |
@@ -99,11 +114,12 @@ CONFIG_IOSCHED_NOOP=y | |||
99 | CONFIG_IOSCHED_AS=y | 114 | CONFIG_IOSCHED_AS=y |
100 | CONFIG_IOSCHED_DEADLINE=y | 115 | CONFIG_IOSCHED_DEADLINE=y |
101 | CONFIG_IOSCHED_CFQ=y | 116 | CONFIG_IOSCHED_CFQ=y |
102 | CONFIG_DEFAULT_AS=y | 117 | # CONFIG_DEFAULT_AS is not set |
103 | # CONFIG_DEFAULT_DEADLINE is not set | 118 | # CONFIG_DEFAULT_DEADLINE is not set |
104 | # CONFIG_DEFAULT_CFQ is not set | 119 | CONFIG_DEFAULT_CFQ=y |
105 | # CONFIG_DEFAULT_NOOP is not set | 120 | # CONFIG_DEFAULT_NOOP is not set |
106 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 121 | CONFIG_DEFAULT_IOSCHED="cfq" |
122 | CONFIG_CLASSIC_RCU=y | ||
107 | 123 | ||
108 | # | 124 | # |
109 | # System Type | 125 | # System Type |
@@ -131,6 +147,8 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" | |||
131 | # CONFIG_ARCH_L7200 is not set | 147 | # CONFIG_ARCH_L7200 is not set |
132 | # CONFIG_ARCH_KS8695 is not set | 148 | # CONFIG_ARCH_KS8695 is not set |
133 | # CONFIG_ARCH_NS9XXX is not set | 149 | # CONFIG_ARCH_NS9XXX is not set |
150 | # CONFIG_ARCH_MXC is not set | ||
151 | # CONFIG_ARCH_ORION5X is not set | ||
134 | # CONFIG_ARCH_PNX4008 is not set | 152 | # CONFIG_ARCH_PNX4008 is not set |
135 | CONFIG_ARCH_PXA=y | 153 | CONFIG_ARCH_PXA=y |
136 | # CONFIG_ARCH_RPC is not set | 154 | # CONFIG_ARCH_RPC is not set |
@@ -140,19 +158,41 @@ CONFIG_ARCH_PXA=y | |||
140 | # CONFIG_ARCH_LH7A40X is not set | 158 | # CONFIG_ARCH_LH7A40X is not set |
141 | # CONFIG_ARCH_DAVINCI is not set | 159 | # CONFIG_ARCH_DAVINCI is not set |
142 | # CONFIG_ARCH_OMAP is not set | 160 | # CONFIG_ARCH_OMAP is not set |
161 | # CONFIG_ARCH_MSM7X00A is not set | ||
143 | CONFIG_DMABOUNCE=y | 162 | CONFIG_DMABOUNCE=y |
144 | 163 | ||
145 | # | 164 | # |
146 | # Intel PXA2xx Implementations | 165 | # Intel PXA2xx/PXA3xx Implementations |
147 | # | 166 | # |
167 | |||
168 | # | ||
169 | # Select target boards | ||
170 | # | ||
171 | # CONFIG_ARCH_GUMSTIX is not set | ||
148 | # CONFIG_ARCH_LUBBOCK is not set | 172 | # CONFIG_ARCH_LUBBOCK is not set |
149 | # CONFIG_MACH_LOGICPD_PXA270 is not set | 173 | # CONFIG_MACH_LOGICPD_PXA270 is not set |
150 | # CONFIG_MACH_MAINSTONE is not set | 174 | # CONFIG_MACH_MAINSTONE is not set |
151 | # CONFIG_ARCH_PXA_IDP is not set | 175 | # CONFIG_ARCH_PXA_IDP is not set |
152 | # CONFIG_PXA_SHARPSL is not set | 176 | # CONFIG_PXA_SHARPSL is not set |
177 | # CONFIG_ARCH_PXA_ESERIES is not set | ||
153 | # CONFIG_MACH_TRIZEPS4 is not set | 178 | # CONFIG_MACH_TRIZEPS4 is not set |
179 | CONFIG_MACH_EM_X270=y | ||
180 | # CONFIG_MACH_COLIBRI is not set | ||
181 | # CONFIG_MACH_ZYLONITE is not set | ||
182 | # CONFIG_MACH_LITTLETON is not set | ||
154 | CONFIG_MACH_ARMCORE=y | 183 | CONFIG_MACH_ARMCORE=y |
184 | # CONFIG_MACH_MAGICIAN is not set | ||
185 | # CONFIG_MACH_PCM027 is not set | ||
155 | CONFIG_PXA27x=y | 186 | CONFIG_PXA27x=y |
187 | # CONFIG_PXA_PWM is not set | ||
188 | |||
189 | # | ||
190 | # Boot options | ||
191 | # | ||
192 | |||
193 | # | ||
194 | # Power management | ||
195 | # | ||
156 | 196 | ||
157 | # | 197 | # |
158 | # Processor Type | 198 | # Processor Type |
@@ -161,6 +201,7 @@ CONFIG_CPU_32=y | |||
161 | CONFIG_CPU_XSCALE=y | 201 | CONFIG_CPU_XSCALE=y |
162 | CONFIG_CPU_32v5=y | 202 | CONFIG_CPU_32v5=y |
163 | CONFIG_CPU_ABRT_EV5T=y | 203 | CONFIG_CPU_ABRT_EV5T=y |
204 | CONFIG_CPU_PABRT_NOIFAR=y | ||
164 | CONFIG_CPU_CACHE_VIVT=y | 205 | CONFIG_CPU_CACHE_VIVT=y |
165 | CONFIG_CPU_TLB_V4WBI=y | 206 | CONFIG_CPU_TLB_V4WBI=y |
166 | CONFIG_CPU_CP15=y | 207 | CONFIG_CPU_CP15=y |
@@ -182,20 +223,40 @@ CONFIG_PCI=y | |||
182 | CONFIG_PCI_SYSCALL=y | 223 | CONFIG_PCI_SYSCALL=y |
183 | CONFIG_PCI_HOST_ITE8152=y | 224 | CONFIG_PCI_HOST_ITE8152=y |
184 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 225 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
226 | CONFIG_PCI_LEGACY=y | ||
185 | # CONFIG_PCI_DEBUG is not set | 227 | # CONFIG_PCI_DEBUG is not set |
228 | CONFIG_PCCARD=m | ||
229 | # CONFIG_PCMCIA_DEBUG is not set | ||
230 | CONFIG_PCMCIA=m | ||
231 | CONFIG_PCMCIA_LOAD_CIS=y | ||
232 | CONFIG_PCMCIA_IOCTL=y | ||
233 | CONFIG_CARDBUS=y | ||
186 | 234 | ||
187 | # | 235 | # |
188 | # PCCARD (PCMCIA/CardBus) support | 236 | # PC-card bridges |
189 | # | 237 | # |
190 | # CONFIG_PCCARD is not set | 238 | CONFIG_YENTA=m |
239 | # CONFIG_YENTA_O2 is not set | ||
240 | # CONFIG_YENTA_RICOH is not set | ||
241 | CONFIG_YENTA_TI=y | ||
242 | # CONFIG_YENTA_ENE_TUNE is not set | ||
243 | # CONFIG_YENTA_TOSHIBA is not set | ||
244 | # CONFIG_PD6729 is not set | ||
245 | # CONFIG_I82092 is not set | ||
246 | CONFIG_PCMCIA_PXA2XX=m | ||
247 | CONFIG_PCCARD_NONSTATIC=m | ||
191 | 248 | ||
192 | # | 249 | # |
193 | # Kernel Features | 250 | # Kernel Features |
194 | # | 251 | # |
195 | # CONFIG_TICK_ONESHOT is not set | 252 | CONFIG_TICK_ONESHOT=y |
253 | CONFIG_NO_HZ=y | ||
254 | # CONFIG_HIGH_RES_TIMERS is not set | ||
255 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
196 | # CONFIG_PREEMPT is not set | 256 | # CONFIG_PREEMPT is not set |
197 | CONFIG_HZ=100 | 257 | CONFIG_HZ=100 |
198 | # CONFIG_AEABI is not set | 258 | CONFIG_AEABI=y |
259 | CONFIG_OABI_COMPAT=y | ||
199 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 260 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set |
200 | CONFIG_SELECT_MEMORY_MODEL=y | 261 | CONFIG_SELECT_MEMORY_MODEL=y |
201 | CONFIG_FLATMEM_MANUAL=y | 262 | CONFIG_FLATMEM_MANUAL=y |
@@ -204,6 +265,8 @@ CONFIG_FLATMEM_MANUAL=y | |||
204 | CONFIG_FLATMEM=y | 265 | CONFIG_FLATMEM=y |
205 | CONFIG_FLAT_NODE_MEM_MAP=y | 266 | CONFIG_FLAT_NODE_MEM_MAP=y |
206 | # CONFIG_SPARSEMEM_STATIC is not set | 267 | # CONFIG_SPARSEMEM_STATIC is not set |
268 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
269 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
207 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 270 | CONFIG_SPLIT_PTLOCK_CPUS=4096 |
208 | # CONFIG_RESOURCES_64BIT is not set | 271 | # CONFIG_RESOURCES_64BIT is not set |
209 | CONFIG_ZONE_DMA_FLAG=1 | 272 | CONFIG_ZONE_DMA_FLAG=1 |
@@ -216,11 +279,16 @@ CONFIG_ALIGNMENT_TRAP=y | |||
216 | # | 279 | # |
217 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 280 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
218 | CONFIG_ZBOOT_ROM_BSS=0x0 | 281 | CONFIG_ZBOOT_ROM_BSS=0x0 |
219 | CONFIG_CMDLINE="" | 282 | CONFIG_CMDLINE="root=1f03 mem=32M" |
220 | # CONFIG_XIP_KERNEL is not set | 283 | # CONFIG_XIP_KERNEL is not set |
221 | # CONFIG_KEXEC is not set | 284 | # CONFIG_KEXEC is not set |
222 | 285 | ||
223 | # | 286 | # |
287 | # CPU Frequency scaling | ||
288 | # | ||
289 | # CONFIG_CPU_FREQ is not set | ||
290 | |||
291 | # | ||
224 | # Floating point emulation | 292 | # Floating point emulation |
225 | # | 293 | # |
226 | 294 | ||
@@ -237,16 +305,17 @@ CONFIG_FPE_NWFPE=y | |||
237 | CONFIG_BINFMT_ELF=y | 305 | CONFIG_BINFMT_ELF=y |
238 | # CONFIG_BINFMT_AOUT is not set | 306 | # CONFIG_BINFMT_AOUT is not set |
239 | # CONFIG_BINFMT_MISC is not set | 307 | # CONFIG_BINFMT_MISC is not set |
240 | # CONFIG_ARTHUR is not set | ||
241 | 308 | ||
242 | # | 309 | # |
243 | # Power management options | 310 | # Power management options |
244 | # | 311 | # |
245 | CONFIG_PM=y | 312 | CONFIG_PM=y |
246 | # CONFIG_PM_LEGACY is not set | ||
247 | # CONFIG_PM_DEBUG is not set | 313 | # CONFIG_PM_DEBUG is not set |
248 | # CONFIG_PM_SYSFS_DEPRECATED is not set | 314 | CONFIG_PM_SLEEP=y |
249 | # CONFIG_APM_EMULATION is not set | 315 | CONFIG_SUSPEND=y |
316 | CONFIG_SUSPEND_FREEZER=y | ||
317 | CONFIG_APM_EMULATION=m | ||
318 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
250 | 319 | ||
251 | # | 320 | # |
252 | # Networking | 321 | # Networking |
@@ -257,15 +326,16 @@ CONFIG_NET=y | |||
257 | # Networking options | 326 | # Networking options |
258 | # | 327 | # |
259 | CONFIG_PACKET=y | 328 | CONFIG_PACKET=y |
260 | # CONFIG_PACKET_MMAP is not set | 329 | CONFIG_PACKET_MMAP=y |
261 | CONFIG_UNIX=y | 330 | CONFIG_UNIX=y |
262 | CONFIG_XFRM=y | 331 | CONFIG_XFRM=y |
263 | # CONFIG_XFRM_USER is not set | 332 | # CONFIG_XFRM_USER is not set |
264 | # CONFIG_XFRM_SUB_POLICY is not set | 333 | # CONFIG_XFRM_SUB_POLICY is not set |
265 | # CONFIG_XFRM_MIGRATE is not set | 334 | # CONFIG_XFRM_MIGRATE is not set |
335 | # CONFIG_XFRM_STATISTICS is not set | ||
266 | # CONFIG_NET_KEY is not set | 336 | # CONFIG_NET_KEY is not set |
267 | CONFIG_INET=y | 337 | CONFIG_INET=y |
268 | # CONFIG_IP_MULTICAST is not set | 338 | CONFIG_IP_MULTICAST=y |
269 | # CONFIG_IP_ADVANCED_ROUTER is not set | 339 | # CONFIG_IP_ADVANCED_ROUTER is not set |
270 | CONFIG_IP_FIB_HASH=y | 340 | CONFIG_IP_FIB_HASH=y |
271 | CONFIG_IP_PNP=y | 341 | CONFIG_IP_PNP=y |
@@ -274,6 +344,7 @@ CONFIG_IP_PNP_BOOTP=y | |||
274 | # CONFIG_IP_PNP_RARP is not set | 344 | # CONFIG_IP_PNP_RARP is not set |
275 | # CONFIG_NET_IPIP is not set | 345 | # CONFIG_NET_IPIP is not set |
276 | # CONFIG_NET_IPGRE is not set | 346 | # CONFIG_NET_IPGRE is not set |
347 | # CONFIG_IP_MROUTE is not set | ||
277 | # CONFIG_ARPD is not set | 348 | # CONFIG_ARPD is not set |
278 | # CONFIG_SYN_COOKIES is not set | 349 | # CONFIG_SYN_COOKIES is not set |
279 | # CONFIG_INET_AH is not set | 350 | # CONFIG_INET_AH is not set |
@@ -284,15 +355,13 @@ CONFIG_IP_PNP_BOOTP=y | |||
284 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | 355 | CONFIG_INET_XFRM_MODE_TRANSPORT=y |
285 | CONFIG_INET_XFRM_MODE_TUNNEL=y | 356 | CONFIG_INET_XFRM_MODE_TUNNEL=y |
286 | CONFIG_INET_XFRM_MODE_BEET=y | 357 | CONFIG_INET_XFRM_MODE_BEET=y |
287 | CONFIG_INET_DIAG=y | 358 | # CONFIG_INET_LRO is not set |
288 | CONFIG_INET_TCP_DIAG=y | 359 | # CONFIG_INET_DIAG is not set |
289 | # CONFIG_TCP_CONG_ADVANCED is not set | 360 | # CONFIG_TCP_CONG_ADVANCED is not set |
290 | CONFIG_TCP_CONG_CUBIC=y | 361 | CONFIG_TCP_CONG_CUBIC=y |
291 | CONFIG_DEFAULT_TCP_CONG="cubic" | 362 | CONFIG_DEFAULT_TCP_CONG="cubic" |
292 | # CONFIG_TCP_MD5SIG is not set | 363 | # CONFIG_TCP_MD5SIG is not set |
293 | # CONFIG_IPV6 is not set | 364 | # CONFIG_IPV6 is not set |
294 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
295 | # CONFIG_INET6_TUNNEL is not set | ||
296 | # CONFIG_NETWORK_SECMARK is not set | 365 | # CONFIG_NETWORK_SECMARK is not set |
297 | # CONFIG_NETFILTER is not set | 366 | # CONFIG_NETFILTER is not set |
298 | # CONFIG_IP_DCCP is not set | 367 | # CONFIG_IP_DCCP is not set |
@@ -309,10 +378,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
309 | # CONFIG_LAPB is not set | 378 | # CONFIG_LAPB is not set |
310 | # CONFIG_ECONET is not set | 379 | # CONFIG_ECONET is not set |
311 | # CONFIG_WAN_ROUTER is not set | 380 | # CONFIG_WAN_ROUTER is not set |
312 | |||
313 | # | ||
314 | # QoS and/or fair queueing | ||
315 | # | ||
316 | # CONFIG_NET_SCHED is not set | 381 | # CONFIG_NET_SCHED is not set |
317 | 382 | ||
318 | # | 383 | # |
@@ -320,8 +385,33 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
320 | # | 385 | # |
321 | # CONFIG_NET_PKTGEN is not set | 386 | # CONFIG_NET_PKTGEN is not set |
322 | # CONFIG_HAMRADIO is not set | 387 | # CONFIG_HAMRADIO is not set |
388 | # CONFIG_CAN is not set | ||
323 | # CONFIG_IRDA is not set | 389 | # CONFIG_IRDA is not set |
324 | # CONFIG_BT is not set | 390 | CONFIG_BT=m |
391 | CONFIG_BT_L2CAP=m | ||
392 | CONFIG_BT_SCO=m | ||
393 | CONFIG_BT_RFCOMM=m | ||
394 | # CONFIG_BT_RFCOMM_TTY is not set | ||
395 | CONFIG_BT_BNEP=m | ||
396 | # CONFIG_BT_BNEP_MC_FILTER is not set | ||
397 | # CONFIG_BT_BNEP_PROTO_FILTER is not set | ||
398 | CONFIG_BT_HIDP=m | ||
399 | |||
400 | # | ||
401 | # Bluetooth device drivers | ||
402 | # | ||
403 | CONFIG_BT_HCIUSB=m | ||
404 | CONFIG_BT_HCIUSB_SCO=y | ||
405 | # CONFIG_BT_HCIBTSDIO is not set | ||
406 | # CONFIG_BT_HCIUART is not set | ||
407 | # CONFIG_BT_HCIBCM203X is not set | ||
408 | # CONFIG_BT_HCIBPA10X is not set | ||
409 | # CONFIG_BT_HCIBFUSB is not set | ||
410 | # CONFIG_BT_HCIDTL1 is not set | ||
411 | # CONFIG_BT_HCIBT3C is not set | ||
412 | # CONFIG_BT_HCIBLUECARD is not set | ||
413 | # CONFIG_BT_HCIBTUART is not set | ||
414 | # CONFIG_BT_HCIVHCI is not set | ||
325 | # CONFIG_AF_RXRPC is not set | 415 | # CONFIG_AF_RXRPC is not set |
326 | 416 | ||
327 | # | 417 | # |
@@ -330,12 +420,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
330 | # CONFIG_CFG80211 is not set | 420 | # CONFIG_CFG80211 is not set |
331 | CONFIG_WIRELESS_EXT=y | 421 | CONFIG_WIRELESS_EXT=y |
332 | # CONFIG_MAC80211 is not set | 422 | # CONFIG_MAC80211 is not set |
333 | CONFIG_IEEE80211=m | 423 | # CONFIG_IEEE80211 is not set |
334 | # CONFIG_IEEE80211_DEBUG is not set | ||
335 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
336 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
337 | # CONFIG_IEEE80211_CRYPT_TKIP is not set | ||
338 | # CONFIG_IEEE80211_SOFTMAC is not set | ||
339 | # CONFIG_RFKILL is not set | 424 | # CONFIG_RFKILL is not set |
340 | # CONFIG_NET_9P is not set | 425 | # CONFIG_NET_9P is not set |
341 | 426 | ||
@@ -346,38 +431,47 @@ CONFIG_IEEE80211_CRYPT_CCMP=m | |||
346 | # | 431 | # |
347 | # Generic Driver Options | 432 | # Generic Driver Options |
348 | # | 433 | # |
434 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
349 | CONFIG_STANDALONE=y | 435 | CONFIG_STANDALONE=y |
350 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 436 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
351 | CONFIG_FW_LOADER=y | 437 | CONFIG_FW_LOADER=m |
352 | # CONFIG_DEBUG_DRIVER is not set | 438 | # CONFIG_DEBUG_DRIVER is not set |
353 | # CONFIG_DEBUG_DEVRES is not set | 439 | # CONFIG_DEBUG_DEVRES is not set |
354 | # CONFIG_SYS_HYPERVISOR is not set | 440 | # CONFIG_SYS_HYPERVISOR is not set |
355 | # CONFIG_CONNECTOR is not set | 441 | # CONFIG_CONNECTOR is not set |
356 | CONFIG_MTD=m | 442 | CONFIG_MTD=y |
357 | # CONFIG_MTD_DEBUG is not set | 443 | # CONFIG_MTD_DEBUG is not set |
358 | # CONFIG_MTD_CONCAT is not set | 444 | # CONFIG_MTD_CONCAT is not set |
359 | CONFIG_MTD_PARTITIONS=y | 445 | CONFIG_MTD_PARTITIONS=y |
360 | # CONFIG_MTD_REDBOOT_PARTS is not set | 446 | # CONFIG_MTD_REDBOOT_PARTS is not set |
447 | CONFIG_MTD_CMDLINE_PARTS=y | ||
361 | # CONFIG_MTD_AFS_PARTS is not set | 448 | # CONFIG_MTD_AFS_PARTS is not set |
449 | # CONFIG_MTD_AR7_PARTS is not set | ||
362 | 450 | ||
363 | # | 451 | # |
364 | # User Modules And Translation Layers | 452 | # User Modules And Translation Layers |
365 | # | 453 | # |
366 | CONFIG_MTD_CHAR=m | 454 | CONFIG_MTD_CHAR=y |
367 | CONFIG_MTD_BLKDEVS=m | 455 | CONFIG_MTD_BLKDEVS=y |
368 | CONFIG_MTD_BLOCK=m | 456 | CONFIG_MTD_BLOCK=y |
369 | # CONFIG_MTD_BLOCK_RO is not set | ||
370 | # CONFIG_FTL is not set | 457 | # CONFIG_FTL is not set |
371 | # CONFIG_NFTL is not set | 458 | # CONFIG_NFTL is not set |
372 | # CONFIG_INFTL is not set | 459 | # CONFIG_INFTL is not set |
373 | # CONFIG_RFD_FTL is not set | 460 | # CONFIG_RFD_FTL is not set |
374 | # CONFIG_SSFDC is not set | 461 | # CONFIG_SSFDC is not set |
462 | # CONFIG_MTD_OOPS is not set | ||
375 | 463 | ||
376 | # | 464 | # |
377 | # RAM/ROM/Flash chip drivers | 465 | # RAM/ROM/Flash chip drivers |
378 | # | 466 | # |
379 | # CONFIG_MTD_CFI is not set | 467 | CONFIG_MTD_CFI=y |
380 | # CONFIG_MTD_JEDECPROBE is not set | 468 | CONFIG_MTD_JEDECPROBE=y |
469 | CONFIG_MTD_GEN_PROBE=y | ||
470 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
471 | CONFIG_MTD_CFI_NOSWAP=y | ||
472 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
473 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
474 | # CONFIG_MTD_CFI_GEOMETRY is not set | ||
381 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | 475 | CONFIG_MTD_MAP_BANK_WIDTH_1=y |
382 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | 476 | CONFIG_MTD_MAP_BANK_WIDTH_2=y |
383 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | 477 | CONFIG_MTD_MAP_BANK_WIDTH_4=y |
@@ -388,15 +482,29 @@ CONFIG_MTD_CFI_I1=y | |||
388 | CONFIG_MTD_CFI_I2=y | 482 | CONFIG_MTD_CFI_I2=y |
389 | # CONFIG_MTD_CFI_I4 is not set | 483 | # CONFIG_MTD_CFI_I4 is not set |
390 | # CONFIG_MTD_CFI_I8 is not set | 484 | # CONFIG_MTD_CFI_I8 is not set |
485 | # CONFIG_MTD_OTP is not set | ||
486 | CONFIG_MTD_CFI_INTELEXT=y | ||
487 | CONFIG_MTD_CFI_AMDSTD=y | ||
488 | CONFIG_MTD_CFI_STAA=y | ||
489 | CONFIG_MTD_CFI_UTIL=y | ||
391 | # CONFIG_MTD_RAM is not set | 490 | # CONFIG_MTD_RAM is not set |
392 | # CONFIG_MTD_ROM is not set | 491 | # CONFIG_MTD_ROM is not set |
393 | # CONFIG_MTD_ABSENT is not set | 492 | # CONFIG_MTD_ABSENT is not set |
493 | # CONFIG_MTD_XIP is not set | ||
394 | 494 | ||
395 | # | 495 | # |
396 | # Mapping drivers for chip access | 496 | # Mapping drivers for chip access |
397 | # | 497 | # |
398 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 498 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
499 | CONFIG_MTD_PHYSMAP=y | ||
500 | CONFIG_MTD_PHYSMAP_START=0x0 | ||
501 | CONFIG_MTD_PHYSMAP_LEN=0x400000 | ||
502 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
503 | CONFIG_MTD_PXA2XX=y | ||
504 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
505 | # CONFIG_MTD_IMPA7 is not set | ||
399 | # CONFIG_MTD_SHARP_SL is not set | 506 | # CONFIG_MTD_SHARP_SL is not set |
507 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
400 | # CONFIG_MTD_PLATRAM is not set | 508 | # CONFIG_MTD_PLATRAM is not set |
401 | 509 | ||
402 | # | 510 | # |
@@ -414,18 +522,19 @@ CONFIG_MTD_CFI_I2=y | |||
414 | # CONFIG_MTD_DOC2000 is not set | 522 | # CONFIG_MTD_DOC2000 is not set |
415 | # CONFIG_MTD_DOC2001 is not set | 523 | # CONFIG_MTD_DOC2001 is not set |
416 | # CONFIG_MTD_DOC2001PLUS is not set | 524 | # CONFIG_MTD_DOC2001PLUS is not set |
417 | CONFIG_MTD_NAND=m | 525 | CONFIG_MTD_NAND=y |
418 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | 526 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set |
419 | # CONFIG_MTD_NAND_ECC_SMC is not set | 527 | # CONFIG_MTD_NAND_ECC_SMC is not set |
420 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | 528 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set |
421 | # CONFIG_MTD_NAND_H1900 is not set | 529 | # CONFIG_MTD_NAND_H1900 is not set |
422 | CONFIG_MTD_NAND_IDS=m | 530 | CONFIG_MTD_NAND_IDS=y |
423 | # CONFIG_MTD_NAND_DISKONCHIP is not set | 531 | # CONFIG_MTD_NAND_DISKONCHIP is not set |
424 | # CONFIG_MTD_NAND_SHARPSL is not set | 532 | # CONFIG_MTD_NAND_SHARPSL is not set |
425 | # CONFIG_MTD_NAND_CAFE is not set | 533 | # CONFIG_MTD_NAND_CAFE is not set |
426 | CONFIG_MTD_NAND_CM_X270=m | 534 | CONFIG_MTD_NAND_CM_X270=y |
427 | # CONFIG_MTD_NAND_NANDSIM is not set | 535 | # CONFIG_MTD_NAND_NANDSIM is not set |
428 | # CONFIG_MTD_NAND_PLATFORM is not set | 536 | CONFIG_MTD_NAND_PLATFORM=y |
537 | # CONFIG_MTD_ALAUDA is not set | ||
429 | # CONFIG_MTD_ONENAND is not set | 538 | # CONFIG_MTD_ONENAND is not set |
430 | 539 | ||
431 | # | 540 | # |
@@ -446,36 +555,13 @@ CONFIG_BLK_DEV_LOOP=y | |||
446 | # CONFIG_BLK_DEV_UB is not set | 555 | # CONFIG_BLK_DEV_UB is not set |
447 | CONFIG_BLK_DEV_RAM=y | 556 | CONFIG_BLK_DEV_RAM=y |
448 | CONFIG_BLK_DEV_RAM_COUNT=16 | 557 | CONFIG_BLK_DEV_RAM_COUNT=16 |
449 | CONFIG_BLK_DEV_RAM_SIZE=12000 | 558 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
450 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | 559 | # CONFIG_BLK_DEV_XIP is not set |
451 | # CONFIG_CDROM_PKTCDVD is not set | 560 | # CONFIG_CDROM_PKTCDVD is not set |
452 | # CONFIG_ATA_OVER_ETH is not set | 561 | # CONFIG_ATA_OVER_ETH is not set |
453 | CONFIG_IDE=m | 562 | # CONFIG_MISC_DEVICES is not set |
454 | CONFIG_IDE_MAX_HWIFS=4 | 563 | CONFIG_HAVE_IDE=y |
455 | CONFIG_BLK_DEV_IDE=m | 564 | # CONFIG_IDE is not set |
456 | |||
457 | # | ||
458 | # Please see Documentation/ide.txt for help/info on IDE drives | ||
459 | # | ||
460 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
461 | CONFIG_BLK_DEV_IDEDISK=m | ||
462 | # CONFIG_IDEDISK_MULTI_MODE is not set | ||
463 | CONFIG_BLK_DEV_IDECD=m | ||
464 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
465 | # CONFIG_BLK_DEV_IDEFLOPPY is not set | ||
466 | # CONFIG_BLK_DEV_IDESCSI is not set | ||
467 | # CONFIG_IDE_TASK_IOCTL is not set | ||
468 | CONFIG_IDE_PROC_FS=y | ||
469 | |||
470 | # | ||
471 | # IDE chipset support/bugfixes | ||
472 | # | ||
473 | # CONFIG_IDE_GENERIC is not set | ||
474 | # CONFIG_BLK_DEV_IDEPCI is not set | ||
475 | # CONFIG_IDEPCI_PCIBUS_ORDER is not set | ||
476 | # CONFIG_IDE_ARM is not set | ||
477 | # CONFIG_BLK_DEV_IDEDMA is not set | ||
478 | # CONFIG_BLK_DEV_HD is not set | ||
479 | 565 | ||
480 | # | 566 | # |
481 | # SCSI device support | 567 | # SCSI device support |
@@ -485,7 +571,7 @@ CONFIG_SCSI=y | |||
485 | CONFIG_SCSI_DMA=y | 571 | CONFIG_SCSI_DMA=y |
486 | # CONFIG_SCSI_TGT is not set | 572 | # CONFIG_SCSI_TGT is not set |
487 | # CONFIG_SCSI_NETLINK is not set | 573 | # CONFIG_SCSI_NETLINK is not set |
488 | # CONFIG_SCSI_PROC_FS is not set | 574 | CONFIG_SCSI_PROC_FS=y |
489 | 575 | ||
490 | # | 576 | # |
491 | # SCSI support type (disk, tape, CD-ROM) | 577 | # SCSI support type (disk, tape, CD-ROM) |
@@ -512,12 +598,9 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
512 | # CONFIG_SCSI_SPI_ATTRS is not set | 598 | # CONFIG_SCSI_SPI_ATTRS is not set |
513 | # CONFIG_SCSI_FC_ATTRS is not set | 599 | # CONFIG_SCSI_FC_ATTRS is not set |
514 | # CONFIG_SCSI_ISCSI_ATTRS is not set | 600 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
515 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
516 | # CONFIG_SCSI_SAS_LIBSAS is not set | 601 | # CONFIG_SCSI_SAS_LIBSAS is not set |
517 | 602 | # CONFIG_SCSI_SRP_ATTRS is not set | |
518 | # | 603 | CONFIG_SCSI_LOWLEVEL=y |
519 | # SCSI low-level drivers | ||
520 | # | ||
521 | # CONFIG_ISCSI_TCP is not set | 604 | # CONFIG_ISCSI_TCP is not set |
522 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 605 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
523 | # CONFIG_SCSI_3W_9XXX is not set | 606 | # CONFIG_SCSI_3W_9XXX is not set |
@@ -528,6 +611,7 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
528 | # CONFIG_SCSI_AIC79XX is not set | 611 | # CONFIG_SCSI_AIC79XX is not set |
529 | # CONFIG_SCSI_AIC94XX is not set | 612 | # CONFIG_SCSI_AIC94XX is not set |
530 | # CONFIG_SCSI_DPT_I2O is not set | 613 | # CONFIG_SCSI_DPT_I2O is not set |
614 | # CONFIG_SCSI_ADVANSYS is not set | ||
531 | # CONFIG_SCSI_ARCMSR is not set | 615 | # CONFIG_SCSI_ARCMSR is not set |
532 | # CONFIG_MEGARAID_NEWGEN is not set | 616 | # CONFIG_MEGARAID_NEWGEN is not set |
533 | # CONFIG_MEGARAID_LEGACY is not set | 617 | # CONFIG_MEGARAID_LEGACY is not set |
@@ -538,8 +622,10 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
538 | # CONFIG_SCSI_IPS is not set | 622 | # CONFIG_SCSI_IPS is not set |
539 | # CONFIG_SCSI_INITIO is not set | 623 | # CONFIG_SCSI_INITIO is not set |
540 | # CONFIG_SCSI_INIA100 is not set | 624 | # CONFIG_SCSI_INIA100 is not set |
625 | # CONFIG_SCSI_MVSAS is not set | ||
541 | # CONFIG_SCSI_STEX is not set | 626 | # CONFIG_SCSI_STEX is not set |
542 | # CONFIG_SCSI_SYM53C8XX_2 is not set | 627 | # CONFIG_SCSI_SYM53C8XX_2 is not set |
628 | # CONFIG_SCSI_IPR is not set | ||
543 | # CONFIG_SCSI_QLOGIC_1280 is not set | 629 | # CONFIG_SCSI_QLOGIC_1280 is not set |
544 | # CONFIG_SCSI_QLA_FC is not set | 630 | # CONFIG_SCSI_QLA_FC is not set |
545 | # CONFIG_SCSI_QLA_ISCSI is not set | 631 | # CONFIG_SCSI_QLA_ISCSI is not set |
@@ -549,16 +635,69 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
549 | # CONFIG_SCSI_NSP32 is not set | 635 | # CONFIG_SCSI_NSP32 is not set |
550 | # CONFIG_SCSI_DEBUG is not set | 636 | # CONFIG_SCSI_DEBUG is not set |
551 | # CONFIG_SCSI_SRP is not set | 637 | # CONFIG_SCSI_SRP is not set |
552 | # CONFIG_ATA is not set | 638 | # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set |
639 | CONFIG_ATA=m | ||
640 | # CONFIG_ATA_NONSTANDARD is not set | ||
641 | # CONFIG_SATA_PMP is not set | ||
642 | # CONFIG_SATA_AHCI is not set | ||
643 | # CONFIG_SATA_SIL24 is not set | ||
644 | CONFIG_ATA_SFF=y | ||
645 | # CONFIG_SATA_SVW is not set | ||
646 | # CONFIG_ATA_PIIX is not set | ||
647 | # CONFIG_SATA_MV is not set | ||
648 | # CONFIG_SATA_NV is not set | ||
649 | # CONFIG_PDC_ADMA is not set | ||
650 | # CONFIG_SATA_QSTOR is not set | ||
651 | # CONFIG_SATA_PROMISE is not set | ||
652 | # CONFIG_SATA_SX4 is not set | ||
653 | # CONFIG_SATA_SIL is not set | ||
654 | # CONFIG_SATA_SIS is not set | ||
655 | # CONFIG_SATA_ULI is not set | ||
656 | # CONFIG_SATA_VIA is not set | ||
657 | # CONFIG_SATA_VITESSE is not set | ||
658 | # CONFIG_SATA_INIC162X is not set | ||
659 | # CONFIG_PATA_ALI is not set | ||
660 | # CONFIG_PATA_AMD is not set | ||
661 | # CONFIG_PATA_ARTOP is not set | ||
662 | # CONFIG_PATA_ATIIXP is not set | ||
663 | # CONFIG_PATA_CMD640_PCI is not set | ||
664 | # CONFIG_PATA_CMD64X is not set | ||
665 | # CONFIG_PATA_CS5520 is not set | ||
666 | # CONFIG_PATA_CS5530 is not set | ||
667 | # CONFIG_PATA_CYPRESS is not set | ||
668 | # CONFIG_PATA_EFAR is not set | ||
669 | # CONFIG_ATA_GENERIC is not set | ||
670 | # CONFIG_PATA_HPT366 is not set | ||
671 | # CONFIG_PATA_HPT37X is not set | ||
672 | # CONFIG_PATA_HPT3X2N is not set | ||
673 | # CONFIG_PATA_HPT3X3 is not set | ||
674 | # CONFIG_PATA_IT821X is not set | ||
675 | # CONFIG_PATA_IT8213 is not set | ||
676 | # CONFIG_PATA_JMICRON is not set | ||
677 | # CONFIG_PATA_TRIFLEX is not set | ||
678 | # CONFIG_PATA_MARVELL is not set | ||
679 | # CONFIG_PATA_MPIIX is not set | ||
680 | # CONFIG_PATA_OLDPIIX is not set | ||
681 | # CONFIG_PATA_NETCELL is not set | ||
682 | # CONFIG_PATA_NINJA32 is not set | ||
683 | # CONFIG_PATA_NS87410 is not set | ||
684 | # CONFIG_PATA_NS87415 is not set | ||
685 | # CONFIG_PATA_OPTI is not set | ||
686 | # CONFIG_PATA_OPTIDMA is not set | ||
687 | CONFIG_PATA_PCMCIA=m | ||
688 | # CONFIG_PATA_PDC_OLD is not set | ||
689 | # CONFIG_PATA_RADISYS is not set | ||
690 | # CONFIG_PATA_RZ1000 is not set | ||
691 | # CONFIG_PATA_SC1200 is not set | ||
692 | # CONFIG_PATA_SERVERWORKS is not set | ||
693 | # CONFIG_PATA_PDC2027X is not set | ||
694 | # CONFIG_PATA_SIL680 is not set | ||
695 | # CONFIG_PATA_SIS is not set | ||
696 | # CONFIG_PATA_VIA is not set | ||
697 | # CONFIG_PATA_WINBOND is not set | ||
698 | # CONFIG_PATA_PLATFORM is not set | ||
553 | # CONFIG_MD is not set | 699 | # CONFIG_MD is not set |
554 | |||
555 | # | ||
556 | # Fusion MPT device support | ||
557 | # | ||
558 | # CONFIG_FUSION is not set | 700 | # CONFIG_FUSION is not set |
559 | # CONFIG_FUSION_SPI is not set | ||
560 | # CONFIG_FUSION_FC is not set | ||
561 | # CONFIG_FUSION_SAS is not set | ||
562 | 701 | ||
563 | # | 702 | # |
564 | # IEEE 1394 (FireWire) support | 703 | # IEEE 1394 (FireWire) support |
@@ -573,6 +712,7 @@ CONFIG_NETDEVICES=y | |||
573 | # CONFIG_MACVLAN is not set | 712 | # CONFIG_MACVLAN is not set |
574 | # CONFIG_EQUALIZER is not set | 713 | # CONFIG_EQUALIZER is not set |
575 | # CONFIG_TUN is not set | 714 | # CONFIG_TUN is not set |
715 | # CONFIG_VETH is not set | ||
576 | # CONFIG_ARCNET is not set | 716 | # CONFIG_ARCNET is not set |
577 | # CONFIG_PHYLIB is not set | 717 | # CONFIG_PHYLIB is not set |
578 | CONFIG_NET_ETHERNET=y | 718 | CONFIG_NET_ETHERNET=y |
@@ -584,64 +724,65 @@ CONFIG_MII=y | |||
584 | # CONFIG_NET_VENDOR_3COM is not set | 724 | # CONFIG_NET_VENDOR_3COM is not set |
585 | # CONFIG_SMC91X is not set | 725 | # CONFIG_SMC91X is not set |
586 | CONFIG_DM9000=y | 726 | CONFIG_DM9000=y |
727 | CONFIG_DM9000_DEBUGLEVEL=1 | ||
587 | # CONFIG_SMC911X is not set | 728 | # CONFIG_SMC911X is not set |
588 | # CONFIG_NET_TULIP is not set | 729 | # CONFIG_NET_TULIP is not set |
589 | # CONFIG_HP100 is not set | 730 | # CONFIG_HP100 is not set |
731 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
732 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
733 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
734 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
590 | CONFIG_NET_PCI=y | 735 | CONFIG_NET_PCI=y |
591 | # CONFIG_PCNET32 is not set | 736 | # CONFIG_PCNET32 is not set |
592 | # CONFIG_AMD8111_ETH is not set | 737 | # CONFIG_AMD8111_ETH is not set |
593 | # CONFIG_ADAPTEC_STARFIRE is not set | 738 | # CONFIG_ADAPTEC_STARFIRE is not set |
594 | # CONFIG_B44 is not set | 739 | # CONFIG_B44 is not set |
595 | # CONFIG_FORCEDETH is not set | 740 | # CONFIG_FORCEDETH is not set |
596 | # CONFIG_DGRS is not set | ||
597 | # CONFIG_EEPRO100 is not set | 741 | # CONFIG_EEPRO100 is not set |
598 | # CONFIG_E100 is not set | 742 | # CONFIG_E100 is not set |
599 | # CONFIG_FEALNX is not set | 743 | # CONFIG_FEALNX is not set |
600 | # CONFIG_NATSEMI is not set | 744 | # CONFIG_NATSEMI is not set |
601 | # CONFIG_NE2K_PCI is not set | 745 | # CONFIG_NE2K_PCI is not set |
602 | # CONFIG_8139CP is not set | 746 | # CONFIG_8139CP is not set |
603 | CONFIG_8139TOO=m | 747 | CONFIG_8139TOO=y |
604 | # CONFIG_8139TOO_PIO is not set | 748 | # CONFIG_8139TOO_PIO is not set |
605 | # CONFIG_8139TOO_TUNE_TWISTER is not set | 749 | # CONFIG_8139TOO_TUNE_TWISTER is not set |
606 | # CONFIG_8139TOO_8129 is not set | 750 | # CONFIG_8139TOO_8129 is not set |
607 | # CONFIG_8139_OLD_RX_RESET is not set | 751 | # CONFIG_8139_OLD_RX_RESET is not set |
752 | # CONFIG_R6040 is not set | ||
608 | # CONFIG_SIS900 is not set | 753 | # CONFIG_SIS900 is not set |
609 | # CONFIG_EPIC100 is not set | 754 | # CONFIG_EPIC100 is not set |
610 | # CONFIG_SUNDANCE is not set | 755 | # CONFIG_SUNDANCE is not set |
611 | # CONFIG_TLAN is not set | 756 | # CONFIG_TLAN is not set |
612 | # CONFIG_VIA_RHINE is not set | 757 | # CONFIG_VIA_RHINE is not set |
613 | # CONFIG_SC92031 is not set | 758 | # CONFIG_SC92031 is not set |
614 | CONFIG_NETDEV_1000=y | 759 | # CONFIG_NETDEV_1000 is not set |
615 | # CONFIG_ACENIC is not set | 760 | # CONFIG_NETDEV_10000 is not set |
616 | # CONFIG_DL2K is not set | ||
617 | # CONFIG_E1000 is not set | ||
618 | # CONFIG_NS83820 is not set | ||
619 | # CONFIG_HAMACHI is not set | ||
620 | # CONFIG_YELLOWFIN is not set | ||
621 | # CONFIG_R8169 is not set | ||
622 | # CONFIG_SIS190 is not set | ||
623 | # CONFIG_SKGE is not set | ||
624 | # CONFIG_SKY2 is not set | ||
625 | # CONFIG_VIA_VELOCITY is not set | ||
626 | # CONFIG_TIGON3 is not set | ||
627 | # CONFIG_BNX2 is not set | ||
628 | # CONFIG_QLA3XXX is not set | ||
629 | # CONFIG_ATL1 is not set | ||
630 | CONFIG_NETDEV_10000=y | ||
631 | # CONFIG_CHELSIO_T1 is not set | ||
632 | # CONFIG_CHELSIO_T3 is not set | ||
633 | # CONFIG_IXGB is not set | ||
634 | # CONFIG_S2IO is not set | ||
635 | # CONFIG_MYRI10GE is not set | ||
636 | # CONFIG_NETXEN_NIC is not set | ||
637 | # CONFIG_MLX4_CORE is not set | ||
638 | # CONFIG_TR is not set | 761 | # CONFIG_TR is not set |
639 | 762 | ||
640 | # | 763 | # |
641 | # Wireless LAN | 764 | # Wireless LAN |
642 | # | 765 | # |
643 | # CONFIG_WLAN_PRE80211 is not set | 766 | # CONFIG_WLAN_PRE80211 is not set |
644 | # CONFIG_WLAN_80211 is not set | 767 | CONFIG_WLAN_80211=y |
768 | # CONFIG_PCMCIA_RAYCS is not set | ||
769 | # CONFIG_IPW2100 is not set | ||
770 | # CONFIG_IPW2200 is not set | ||
771 | CONFIG_LIBERTAS=m | ||
772 | # CONFIG_LIBERTAS_USB is not set | ||
773 | # CONFIG_LIBERTAS_CS is not set | ||
774 | CONFIG_LIBERTAS_SDIO=m | ||
775 | # CONFIG_LIBERTAS_DEBUG is not set | ||
776 | # CONFIG_HERMES is not set | ||
777 | # CONFIG_ATMEL is not set | ||
778 | # CONFIG_AIRO_CS is not set | ||
779 | # CONFIG_PCMCIA_WL3501 is not set | ||
780 | # CONFIG_PRISM54 is not set | ||
781 | # CONFIG_USB_ZD1201 is not set | ||
782 | # CONFIG_USB_NET_RNDIS_WLAN is not set | ||
783 | # CONFIG_IWLWIFI is not set | ||
784 | # CONFIG_IWLWIFI_LEDS is not set | ||
785 | # CONFIG_HOSTAP is not set | ||
645 | 786 | ||
646 | # | 787 | # |
647 | # USB Network Adapters | 788 | # USB Network Adapters |
@@ -650,15 +791,24 @@ CONFIG_NETDEV_10000=y | |||
650 | # CONFIG_USB_KAWETH is not set | 791 | # CONFIG_USB_KAWETH is not set |
651 | # CONFIG_USB_PEGASUS is not set | 792 | # CONFIG_USB_PEGASUS is not set |
652 | # CONFIG_USB_RTL8150 is not set | 793 | # CONFIG_USB_RTL8150 is not set |
653 | # CONFIG_USB_USBNET_MII is not set | ||
654 | # CONFIG_USB_USBNET is not set | 794 | # CONFIG_USB_USBNET is not set |
795 | # CONFIG_NET_PCMCIA is not set | ||
655 | # CONFIG_WAN is not set | 796 | # CONFIG_WAN is not set |
656 | # CONFIG_FDDI is not set | 797 | # CONFIG_FDDI is not set |
657 | # CONFIG_HIPPI is not set | 798 | # CONFIG_HIPPI is not set |
658 | # CONFIG_PPP is not set | 799 | CONFIG_PPP=m |
800 | CONFIG_PPP_MULTILINK=y | ||
801 | CONFIG_PPP_FILTER=y | ||
802 | CONFIG_PPP_ASYNC=m | ||
803 | # CONFIG_PPP_SYNC_TTY is not set | ||
804 | CONFIG_PPP_DEFLATE=m | ||
805 | CONFIG_PPP_BSDCOMP=m | ||
806 | # CONFIG_PPP_MPPE is not set | ||
807 | # CONFIG_PPPOE is not set | ||
808 | # CONFIG_PPPOL2TP is not set | ||
659 | # CONFIG_SLIP is not set | 809 | # CONFIG_SLIP is not set |
810 | CONFIG_SLHC=m | ||
660 | # CONFIG_NET_FC is not set | 811 | # CONFIG_NET_FC is not set |
661 | # CONFIG_SHAPER is not set | ||
662 | # CONFIG_NETCONSOLE is not set | 812 | # CONFIG_NETCONSOLE is not set |
663 | # CONFIG_NETPOLL is not set | 813 | # CONFIG_NETPOLL is not set |
664 | # CONFIG_NET_POLL_CONTROLLER is not set | 814 | # CONFIG_NET_POLL_CONTROLLER is not set |
@@ -674,20 +824,32 @@ CONFIG_INPUT=y | |||
674 | # | 824 | # |
675 | # Userland interfaces | 825 | # Userland interfaces |
676 | # | 826 | # |
677 | # CONFIG_INPUT_MOUSEDEV is not set | 827 | CONFIG_INPUT_MOUSEDEV=y |
828 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
829 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
830 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
678 | # CONFIG_INPUT_JOYDEV is not set | 831 | # CONFIG_INPUT_JOYDEV is not set |
679 | # CONFIG_INPUT_TSDEV is not set | ||
680 | CONFIG_INPUT_EVDEV=y | 832 | CONFIG_INPUT_EVDEV=y |
681 | # CONFIG_INPUT_EVBUG is not set | 833 | # CONFIG_INPUT_EVBUG is not set |
834 | # CONFIG_INPUT_APMPOWER is not set | ||
682 | 835 | ||
683 | # | 836 | # |
684 | # Input Device Drivers | 837 | # Input Device Drivers |
685 | # | 838 | # |
686 | # CONFIG_INPUT_KEYBOARD is not set | 839 | CONFIG_INPUT_KEYBOARD=y |
840 | CONFIG_KEYBOARD_ATKBD=y | ||
841 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
842 | # CONFIG_KEYBOARD_LKKBD is not set | ||
843 | # CONFIG_KEYBOARD_XTKBD is not set | ||
844 | # CONFIG_KEYBOARD_NEWTON is not set | ||
845 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
846 | CONFIG_KEYBOARD_PXA27x=m | ||
847 | # CONFIG_KEYBOARD_GPIO is not set | ||
687 | # CONFIG_INPUT_MOUSE is not set | 848 | # CONFIG_INPUT_MOUSE is not set |
688 | # CONFIG_INPUT_JOYSTICK is not set | 849 | # CONFIG_INPUT_JOYSTICK is not set |
689 | # CONFIG_INPUT_TABLET is not set | 850 | # CONFIG_INPUT_TABLET is not set |
690 | CONFIG_INPUT_TOUCHSCREEN=y | 851 | CONFIG_INPUT_TOUCHSCREEN=y |
852 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
691 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 853 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
692 | # CONFIG_TOUCHSCREEN_ELO is not set | 854 | # CONFIG_TOUCHSCREEN_ELO is not set |
693 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | 855 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
@@ -696,13 +858,22 @@ CONFIG_INPUT_TOUCHSCREEN=y | |||
696 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | 858 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set |
697 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | 859 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set |
698 | CONFIG_TOUCHSCREEN_UCB1400=m | 860 | CONFIG_TOUCHSCREEN_UCB1400=m |
861 | CONFIG_TOUCHSCREEN_WM97XX=m | ||
862 | # CONFIG_TOUCHSCREEN_WM9705 is not set | ||
863 | CONFIG_TOUCHSCREEN_WM9712=y | ||
864 | # CONFIG_TOUCHSCREEN_WM9713 is not set | ||
865 | # CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set | ||
699 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | 866 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set |
700 | # CONFIG_INPUT_MISC is not set | 867 | # CONFIG_INPUT_MISC is not set |
701 | 868 | ||
702 | # | 869 | # |
703 | # Hardware I/O ports | 870 | # Hardware I/O ports |
704 | # | 871 | # |
705 | # CONFIG_SERIO is not set | 872 | CONFIG_SERIO=y |
873 | # CONFIG_SERIO_SERPORT is not set | ||
874 | # CONFIG_SERIO_PCIPS2 is not set | ||
875 | CONFIG_SERIO_LIBPS2=y | ||
876 | # CONFIG_SERIO_RAW is not set | ||
706 | # CONFIG_GAMEPORT is not set | 877 | # CONFIG_GAMEPORT is not set |
707 | 878 | ||
708 | # | 879 | # |
@@ -712,7 +883,9 @@ CONFIG_VT=y | |||
712 | CONFIG_VT_CONSOLE=y | 883 | CONFIG_VT_CONSOLE=y |
713 | CONFIG_HW_CONSOLE=y | 884 | CONFIG_HW_CONSOLE=y |
714 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | 885 | # CONFIG_VT_HW_CONSOLE_BINDING is not set |
886 | CONFIG_DEVKMEM=y | ||
715 | # CONFIG_SERIAL_NONSTANDARD is not set | 887 | # CONFIG_SERIAL_NONSTANDARD is not set |
888 | # CONFIG_NOZOMI is not set | ||
716 | 889 | ||
717 | # | 890 | # |
718 | # Serial drivers | 891 | # Serial drivers |
@@ -729,83 +902,141 @@ CONFIG_SERIAL_CORE_CONSOLE=y | |||
729 | # CONFIG_SERIAL_JSM is not set | 902 | # CONFIG_SERIAL_JSM is not set |
730 | CONFIG_UNIX98_PTYS=y | 903 | CONFIG_UNIX98_PTYS=y |
731 | CONFIG_LEGACY_PTYS=y | 904 | CONFIG_LEGACY_PTYS=y |
732 | CONFIG_LEGACY_PTY_COUNT=256 | 905 | CONFIG_LEGACY_PTY_COUNT=16 |
733 | # CONFIG_IPMI_HANDLER is not set | 906 | # CONFIG_IPMI_HANDLER is not set |
734 | # CONFIG_WATCHDOG is not set | 907 | # CONFIG_HW_RANDOM is not set |
735 | CONFIG_HW_RANDOM=m | ||
736 | # CONFIG_NVRAM is not set | 908 | # CONFIG_NVRAM is not set |
737 | # CONFIG_R3964 is not set | 909 | # CONFIG_R3964 is not set |
738 | # CONFIG_APPLICOM is not set | 910 | # CONFIG_APPLICOM is not set |
739 | # CONFIG_DRM is not set | 911 | |
912 | # | ||
913 | # PCMCIA character devices | ||
914 | # | ||
915 | # CONFIG_SYNCLINK_CS is not set | ||
916 | # CONFIG_CARDMAN_4000 is not set | ||
917 | # CONFIG_CARDMAN_4040 is not set | ||
918 | # CONFIG_IPWIRELESS is not set | ||
740 | # CONFIG_RAW_DRIVER is not set | 919 | # CONFIG_RAW_DRIVER is not set |
741 | # CONFIG_TCG_TPM is not set | 920 | # CONFIG_TCG_TPM is not set |
742 | CONFIG_DEVPORT=y | 921 | CONFIG_DEVPORT=y |
743 | # CONFIG_I2C is not set | 922 | CONFIG_I2C=y |
923 | CONFIG_I2C_BOARDINFO=y | ||
924 | CONFIG_I2C_CHARDEV=m | ||
925 | |||
926 | # | ||
927 | # I2C Hardware Bus support | ||
928 | # | ||
929 | # CONFIG_I2C_ALI1535 is not set | ||
930 | # CONFIG_I2C_ALI1563 is not set | ||
931 | # CONFIG_I2C_ALI15X3 is not set | ||
932 | # CONFIG_I2C_AMD756 is not set | ||
933 | # CONFIG_I2C_AMD8111 is not set | ||
934 | # CONFIG_I2C_GPIO is not set | ||
935 | # CONFIG_I2C_I801 is not set | ||
936 | # CONFIG_I2C_I810 is not set | ||
937 | CONFIG_I2C_PXA=y | ||
938 | # CONFIG_I2C_PXA_SLAVE is not set | ||
939 | # CONFIG_I2C_PIIX4 is not set | ||
940 | # CONFIG_I2C_NFORCE2 is not set | ||
941 | # CONFIG_I2C_OCORES is not set | ||
942 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
943 | # CONFIG_I2C_PROSAVAGE is not set | ||
944 | # CONFIG_I2C_SAVAGE4 is not set | ||
945 | # CONFIG_I2C_SIMTEC is not set | ||
946 | # CONFIG_I2C_SIS5595 is not set | ||
947 | # CONFIG_I2C_SIS630 is not set | ||
948 | # CONFIG_I2C_SIS96X is not set | ||
949 | # CONFIG_I2C_TAOS_EVM is not set | ||
950 | # CONFIG_I2C_STUB is not set | ||
951 | # CONFIG_I2C_TINY_USB is not set | ||
952 | # CONFIG_I2C_VIA is not set | ||
953 | # CONFIG_I2C_VIAPRO is not set | ||
954 | # CONFIG_I2C_VOODOO3 is not set | ||
955 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
956 | |||
957 | # | ||
958 | # Miscellaneous I2C Chip support | ||
959 | # | ||
960 | # CONFIG_DS1682 is not set | ||
961 | # CONFIG_SENSORS_EEPROM is not set | ||
962 | # CONFIG_SENSORS_PCF8574 is not set | ||
963 | # CONFIG_PCF8575 is not set | ||
964 | # CONFIG_SENSORS_PCF8591 is not set | ||
965 | # CONFIG_TPS65010 is not set | ||
966 | # CONFIG_SENSORS_MAX6875 is not set | ||
967 | # CONFIG_SENSORS_TSL2550 is not set | ||
968 | # CONFIG_I2C_DEBUG_CORE is not set | ||
969 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
970 | # CONFIG_I2C_DEBUG_BUS is not set | ||
971 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
972 | # CONFIG_SPI is not set | ||
973 | CONFIG_HAVE_GPIO_LIB=y | ||
744 | 974 | ||
745 | # | 975 | # |
746 | # SPI support | 976 | # GPIO Support |
747 | # | 977 | # |
748 | # CONFIG_SPI is not set | 978 | # CONFIG_DEBUG_GPIO is not set |
749 | # CONFIG_SPI_MASTER is not set | ||
750 | # CONFIG_W1 is not set | ||
751 | # CONFIG_HWMON is not set | ||
752 | CONFIG_MISC_DEVICES=y | ||
753 | # CONFIG_PHANTOM is not set | ||
754 | # CONFIG_EEPROM_93CX6 is not set | ||
755 | # CONFIG_SGI_IOC4 is not set | ||
756 | # CONFIG_TIFM_CORE is not set | ||
757 | 979 | ||
758 | # | 980 | # |
759 | # Multifunction device drivers | 981 | # I2C GPIO expanders: |
760 | # | 982 | # |
761 | # CONFIG_MFD_SM501 is not set | 983 | # CONFIG_GPIO_PCA953X is not set |
984 | # CONFIG_GPIO_PCF857X is not set | ||
762 | 985 | ||
763 | # | 986 | # |
764 | # LED devices | 987 | # SPI GPIO expanders: |
765 | # | 988 | # |
766 | CONFIG_NEW_LEDS=y | 989 | # CONFIG_W1 is not set |
767 | CONFIG_LEDS_CLASS=y | 990 | # CONFIG_POWER_SUPPLY is not set |
991 | # CONFIG_HWMON is not set | ||
992 | # CONFIG_WATCHDOG is not set | ||
768 | 993 | ||
769 | # | 994 | # |
770 | # LED drivers | 995 | # Sonics Silicon Backplane |
771 | # | 996 | # |
772 | CONFIG_LEDS_CM_X270=y | 997 | CONFIG_SSB_POSSIBLE=y |
998 | # CONFIG_SSB is not set | ||
773 | 999 | ||
774 | # | 1000 | # |
775 | # LED Triggers | 1001 | # Multifunction device drivers |
776 | # | 1002 | # |
777 | CONFIG_LEDS_TRIGGERS=y | 1003 | # CONFIG_MFD_SM501 is not set |
778 | # CONFIG_LEDS_TRIGGER_TIMER is not set | 1004 | # CONFIG_MFD_ASIC3 is not set |
779 | # CONFIG_LEDS_TRIGGER_IDE_DISK is not set | 1005 | # CONFIG_HTC_EGPIO is not set |
780 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | 1006 | # CONFIG_HTC_PASIC3 is not set |
781 | 1007 | ||
782 | # | 1008 | # |
783 | # Multimedia devices | 1009 | # Multimedia devices |
784 | # | 1010 | # |
1011 | |||
1012 | # | ||
1013 | # Multimedia core support | ||
1014 | # | ||
785 | # CONFIG_VIDEO_DEV is not set | 1015 | # CONFIG_VIDEO_DEV is not set |
786 | # CONFIG_DVB_CORE is not set | 1016 | # CONFIG_DVB_CORE is not set |
787 | CONFIG_DAB=y | ||
788 | # CONFIG_USB_DABUSB is not set | ||
789 | 1017 | ||
790 | # | 1018 | # |
791 | # Graphics support | 1019 | # Multimedia drivers |
792 | # | 1020 | # |
793 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 1021 | # CONFIG_DAB is not set |
794 | 1022 | ||
795 | # | 1023 | # |
796 | # Display device support | 1024 | # Graphics support |
797 | # | 1025 | # |
798 | # CONFIG_DISPLAY_SUPPORT is not set | 1026 | # CONFIG_DRM is not set |
799 | # CONFIG_VGASTATE is not set | 1027 | # CONFIG_VGASTATE is not set |
1028 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
800 | CONFIG_FB=y | 1029 | CONFIG_FB=y |
801 | # CONFIG_FIRMWARE_EDID is not set | 1030 | # CONFIG_FIRMWARE_EDID is not set |
802 | # CONFIG_FB_DDC is not set | 1031 | # CONFIG_FB_DDC is not set |
803 | CONFIG_FB_CFB_FILLRECT=y | 1032 | CONFIG_FB_CFB_FILLRECT=y |
804 | CONFIG_FB_CFB_COPYAREA=y | 1033 | CONFIG_FB_CFB_COPYAREA=y |
805 | CONFIG_FB_CFB_IMAGEBLIT=y | 1034 | CONFIG_FB_CFB_IMAGEBLIT=y |
1035 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
806 | # CONFIG_FB_SYS_FILLRECT is not set | 1036 | # CONFIG_FB_SYS_FILLRECT is not set |
807 | # CONFIG_FB_SYS_COPYAREA is not set | 1037 | # CONFIG_FB_SYS_COPYAREA is not set |
808 | # CONFIG_FB_SYS_IMAGEBLIT is not set | 1038 | # CONFIG_FB_SYS_IMAGEBLIT is not set |
1039 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
809 | # CONFIG_FB_SYS_FOPS is not set | 1040 | # CONFIG_FB_SYS_FOPS is not set |
810 | CONFIG_FB_DEFERRED_IO=y | 1041 | CONFIG_FB_DEFERRED_IO=y |
811 | # CONFIG_FB_SVGALIB is not set | 1042 | # CONFIG_FB_SVGALIB is not set |
@@ -841,9 +1072,17 @@ CONFIG_FB_DEFERRED_IO=y | |||
841 | # CONFIG_FB_ARK is not set | 1072 | # CONFIG_FB_ARK is not set |
842 | # CONFIG_FB_PM3 is not set | 1073 | # CONFIG_FB_PM3 is not set |
843 | CONFIG_FB_PXA=y | 1074 | CONFIG_FB_PXA=y |
844 | # CONFIG_FB_PXA_PARAMETERS is not set | 1075 | # CONFIG_FB_PXA_SMARTPANEL is not set |
1076 | CONFIG_FB_PXA_PARAMETERS=y | ||
845 | CONFIG_FB_MBX=m | 1077 | CONFIG_FB_MBX=m |
1078 | # CONFIG_FB_AM200EPD is not set | ||
846 | # CONFIG_FB_VIRTUAL is not set | 1079 | # CONFIG_FB_VIRTUAL is not set |
1080 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
1081 | |||
1082 | # | ||
1083 | # Display device support | ||
1084 | # | ||
1085 | # CONFIG_DISPLAY_SUPPORT is not set | ||
847 | 1086 | ||
848 | # | 1087 | # |
849 | # Console display driver support | 1088 | # Console display driver support |
@@ -903,10 +1142,12 @@ CONFIG_SND_AC97_CODEC=m | |||
903 | # CONFIG_SND_AU8810 is not set | 1142 | # CONFIG_SND_AU8810 is not set |
904 | # CONFIG_SND_AU8820 is not set | 1143 | # CONFIG_SND_AU8820 is not set |
905 | # CONFIG_SND_AU8830 is not set | 1144 | # CONFIG_SND_AU8830 is not set |
1145 | # CONFIG_SND_AW2 is not set | ||
906 | # CONFIG_SND_AZT3328 is not set | 1146 | # CONFIG_SND_AZT3328 is not set |
907 | # CONFIG_SND_BT87X is not set | 1147 | # CONFIG_SND_BT87X is not set |
908 | # CONFIG_SND_CA0106 is not set | 1148 | # CONFIG_SND_CA0106 is not set |
909 | # CONFIG_SND_CMIPCI is not set | 1149 | # CONFIG_SND_CMIPCI is not set |
1150 | # CONFIG_SND_OXYGEN is not set | ||
910 | # CONFIG_SND_CS4281 is not set | 1151 | # CONFIG_SND_CS4281 is not set |
911 | # CONFIG_SND_CS46XX is not set | 1152 | # CONFIG_SND_CS46XX is not set |
912 | # CONFIG_SND_DARLA20 is not set | 1153 | # CONFIG_SND_DARLA20 is not set |
@@ -931,6 +1172,7 @@ CONFIG_SND_AC97_CODEC=m | |||
931 | # CONFIG_SND_HDA_INTEL is not set | 1172 | # CONFIG_SND_HDA_INTEL is not set |
932 | # CONFIG_SND_HDSP is not set | 1173 | # CONFIG_SND_HDSP is not set |
933 | # CONFIG_SND_HDSPM is not set | 1174 | # CONFIG_SND_HDSPM is not set |
1175 | # CONFIG_SND_HIFIER is not set | ||
934 | # CONFIG_SND_ICE1712 is not set | 1176 | # CONFIG_SND_ICE1712 is not set |
935 | # CONFIG_SND_ICE1724 is not set | 1177 | # CONFIG_SND_ICE1724 is not set |
936 | # CONFIG_SND_INTEL8X0 is not set | 1178 | # CONFIG_SND_INTEL8X0 is not set |
@@ -948,6 +1190,7 @@ CONFIG_SND_AC97_CODEC=m | |||
948 | # CONFIG_SND_TRIDENT is not set | 1190 | # CONFIG_SND_TRIDENT is not set |
949 | # CONFIG_SND_VIA82XX is not set | 1191 | # CONFIG_SND_VIA82XX is not set |
950 | # CONFIG_SND_VIA82XX_MODEM is not set | 1192 | # CONFIG_SND_VIA82XX_MODEM is not set |
1193 | # CONFIG_SND_VIRTUOSO is not set | ||
951 | # CONFIG_SND_VX222 is not set | 1194 | # CONFIG_SND_VX222 is not set |
952 | # CONFIG_SND_YMFPCI is not set | 1195 | # CONFIG_SND_YMFPCI is not set |
953 | # CONFIG_SND_AC97_POWER_SAVE is not set | 1196 | # CONFIG_SND_AC97_POWER_SAVE is not set |
@@ -965,18 +1208,33 @@ CONFIG_SND_PXA2XX_AC97=m | |||
965 | # CONFIG_SND_USB_CAIAQ is not set | 1208 | # CONFIG_SND_USB_CAIAQ is not set |
966 | 1209 | ||
967 | # | 1210 | # |
1211 | # PCMCIA devices | ||
1212 | # | ||
1213 | # CONFIG_SND_VXPOCKET is not set | ||
1214 | # CONFIG_SND_PDAUDIOCF is not set | ||
1215 | |||
1216 | # | ||
968 | # System on Chip audio support | 1217 | # System on Chip audio support |
969 | # | 1218 | # |
970 | # CONFIG_SND_SOC is not set | 1219 | # CONFIG_SND_SOC is not set |
971 | 1220 | ||
972 | # | 1221 | # |
1222 | # ALSA SoC audio for Freescale SOCs | ||
1223 | # | ||
1224 | |||
1225 | # | ||
1226 | # SoC Audio for the Texas Instruments OMAP | ||
1227 | # | ||
1228 | |||
1229 | # | ||
973 | # Open Sound System | 1230 | # Open Sound System |
974 | # | 1231 | # |
975 | # CONFIG_SOUND_PRIME is not set | 1232 | # CONFIG_SOUND_PRIME is not set |
976 | CONFIG_AC97_BUS=m | 1233 | CONFIG_AC97_BUS=m |
977 | CONFIG_HID_SUPPORT=y | 1234 | CONFIG_HID_SUPPORT=y |
978 | CONFIG_HID=y | 1235 | CONFIG_HID=y |
979 | # CONFIG_HID_DEBUG is not set | 1236 | CONFIG_HID_DEBUG=y |
1237 | # CONFIG_HIDRAW is not set | ||
980 | 1238 | ||
981 | # | 1239 | # |
982 | # USB Input Devices | 1240 | # USB Input Devices |
@@ -991,6 +1249,7 @@ CONFIG_USB_ARCH_HAS_OHCI=y | |||
991 | CONFIG_USB_ARCH_HAS_EHCI=y | 1249 | CONFIG_USB_ARCH_HAS_EHCI=y |
992 | CONFIG_USB=y | 1250 | CONFIG_USB=y |
993 | # CONFIG_USB_DEBUG is not set | 1251 | # CONFIG_USB_DEBUG is not set |
1252 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
994 | 1253 | ||
995 | # | 1254 | # |
996 | # Miscellaneous USB options | 1255 | # Miscellaneous USB options |
@@ -999,8 +1258,9 @@ CONFIG_USB_DEVICEFS=y | |||
999 | # CONFIG_USB_DEVICE_CLASS is not set | 1258 | # CONFIG_USB_DEVICE_CLASS is not set |
1000 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1259 | # CONFIG_USB_DYNAMIC_MINORS is not set |
1001 | # CONFIG_USB_SUSPEND is not set | 1260 | # CONFIG_USB_SUSPEND is not set |
1002 | # CONFIG_USB_PERSIST is not set | ||
1003 | # CONFIG_USB_OTG is not set | 1261 | # CONFIG_USB_OTG is not set |
1262 | # CONFIG_USB_OTG_WHITELIST is not set | ||
1263 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1004 | 1264 | ||
1005 | # | 1265 | # |
1006 | # USB Host Controller Drivers | 1266 | # USB Host Controller Drivers |
@@ -1032,13 +1292,16 @@ CONFIG_USB_STORAGE=y | |||
1032 | # CONFIG_USB_STORAGE_DEBUG is not set | 1292 | # CONFIG_USB_STORAGE_DEBUG is not set |
1033 | # CONFIG_USB_STORAGE_DATAFAB is not set | 1293 | # CONFIG_USB_STORAGE_DATAFAB is not set |
1034 | # CONFIG_USB_STORAGE_FREECOM is not set | 1294 | # CONFIG_USB_STORAGE_FREECOM is not set |
1295 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1035 | # CONFIG_USB_STORAGE_DPCM is not set | 1296 | # CONFIG_USB_STORAGE_DPCM is not set |
1036 | # CONFIG_USB_STORAGE_USBAT is not set | 1297 | # CONFIG_USB_STORAGE_USBAT is not set |
1037 | # CONFIG_USB_STORAGE_SDDR09 is not set | 1298 | # CONFIG_USB_STORAGE_SDDR09 is not set |
1038 | # CONFIG_USB_STORAGE_SDDR55 is not set | 1299 | # CONFIG_USB_STORAGE_SDDR55 is not set |
1039 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | 1300 | # CONFIG_USB_STORAGE_JUMPSHOT is not set |
1040 | # CONFIG_USB_STORAGE_ALAUDA is not set | 1301 | # CONFIG_USB_STORAGE_ALAUDA is not set |
1302 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1041 | # CONFIG_USB_STORAGE_KARMA is not set | 1303 | # CONFIG_USB_STORAGE_KARMA is not set |
1304 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1042 | # CONFIG_USB_LIBUSUAL is not set | 1305 | # CONFIG_USB_LIBUSUAL is not set |
1043 | 1306 | ||
1044 | # | 1307 | # |
@@ -1051,10 +1314,6 @@ CONFIG_USB_MON=y | |||
1051 | # | 1314 | # |
1052 | # USB port drivers | 1315 | # USB port drivers |
1053 | # | 1316 | # |
1054 | |||
1055 | # | ||
1056 | # USB Serial Converter support | ||
1057 | # | ||
1058 | # CONFIG_USB_SERIAL is not set | 1317 | # CONFIG_USB_SERIAL is not set |
1059 | 1318 | ||
1060 | # | 1319 | # |
@@ -1079,14 +1338,6 @@ CONFIG_USB_MON=y | |||
1079 | # CONFIG_USB_TRANCEVIBRATOR is not set | 1338 | # CONFIG_USB_TRANCEVIBRATOR is not set |
1080 | # CONFIG_USB_IOWARRIOR is not set | 1339 | # CONFIG_USB_IOWARRIOR is not set |
1081 | # CONFIG_USB_TEST is not set | 1340 | # CONFIG_USB_TEST is not set |
1082 | |||
1083 | # | ||
1084 | # USB DSL modem support | ||
1085 | # | ||
1086 | |||
1087 | # | ||
1088 | # USB Gadget Support | ||
1089 | # | ||
1090 | # CONFIG_USB_GADGET is not set | 1341 | # CONFIG_USB_GADGET is not set |
1091 | CONFIG_MMC=m | 1342 | CONFIG_MMC=m |
1092 | # CONFIG_MMC_DEBUG is not set | 1343 | # CONFIG_MMC_DEBUG is not set |
@@ -1097,6 +1348,7 @@ CONFIG_MMC=m | |||
1097 | # | 1348 | # |
1098 | CONFIG_MMC_BLOCK=m | 1349 | CONFIG_MMC_BLOCK=m |
1099 | CONFIG_MMC_BLOCK_BOUNCE=y | 1350 | CONFIG_MMC_BLOCK_BOUNCE=y |
1351 | # CONFIG_SDIO_UART is not set | ||
1100 | 1352 | ||
1101 | # | 1353 | # |
1102 | # MMC/SD Host Controller Drivers | 1354 | # MMC/SD Host Controller Drivers |
@@ -1104,10 +1356,22 @@ CONFIG_MMC_BLOCK_BOUNCE=y | |||
1104 | CONFIG_MMC_PXA=m | 1356 | CONFIG_MMC_PXA=m |
1105 | # CONFIG_MMC_SDHCI is not set | 1357 | # CONFIG_MMC_SDHCI is not set |
1106 | # CONFIG_MMC_TIFM_SD is not set | 1358 | # CONFIG_MMC_TIFM_SD is not set |
1359 | CONFIG_NEW_LEDS=y | ||
1360 | CONFIG_LEDS_CLASS=y | ||
1107 | 1361 | ||
1108 | # | 1362 | # |
1109 | # Real Time Clock | 1363 | # LED drivers |
1110 | # | 1364 | # |
1365 | # CONFIG_LEDS_GPIO is not set | ||
1366 | CONFIG_LEDS_CM_X270=y | ||
1367 | |||
1368 | # | ||
1369 | # LED Triggers | ||
1370 | # | ||
1371 | CONFIG_LEDS_TRIGGERS=y | ||
1372 | # CONFIG_LEDS_TRIGGER_TIMER is not set | ||
1373 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
1374 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | ||
1111 | CONFIG_RTC_LIB=y | 1375 | CONFIG_RTC_LIB=y |
1112 | CONFIG_RTC_CLASS=y | 1376 | CONFIG_RTC_CLASS=y |
1113 | CONFIG_RTC_HCTOSYS=y | 1377 | CONFIG_RTC_HCTOSYS=y |
@@ -1124,11 +1388,32 @@ CONFIG_RTC_INTF_DEV=y | |||
1124 | # CONFIG_RTC_DRV_TEST is not set | 1388 | # CONFIG_RTC_DRV_TEST is not set |
1125 | 1389 | ||
1126 | # | 1390 | # |
1391 | # I2C RTC drivers | ||
1392 | # | ||
1393 | # CONFIG_RTC_DRV_DS1307 is not set | ||
1394 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1395 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1396 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1397 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1398 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1399 | # CONFIG_RTC_DRV_X1205 is not set | ||
1400 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1401 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1402 | # CONFIG_RTC_DRV_M41T80 is not set | ||
1403 | # CONFIG_RTC_DRV_S35390A is not set | ||
1404 | |||
1405 | # | ||
1406 | # SPI RTC drivers | ||
1407 | # | ||
1408 | |||
1409 | # | ||
1127 | # Platform RTC drivers | 1410 | # Platform RTC drivers |
1128 | # | 1411 | # |
1129 | # CONFIG_RTC_DRV_CMOS is not set | 1412 | # CONFIG_RTC_DRV_CMOS is not set |
1413 | # CONFIG_RTC_DRV_DS1511 is not set | ||
1130 | # CONFIG_RTC_DRV_DS1553 is not set | 1414 | # CONFIG_RTC_DRV_DS1553 is not set |
1131 | # CONFIG_RTC_DRV_DS1742 is not set | 1415 | # CONFIG_RTC_DRV_DS1742 is not set |
1416 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1132 | # CONFIG_RTC_DRV_M48T86 is not set | 1417 | # CONFIG_RTC_DRV_M48T86 is not set |
1133 | # CONFIG_RTC_DRV_M48T59 is not set | 1418 | # CONFIG_RTC_DRV_M48T59 is not set |
1134 | CONFIG_RTC_DRV_V3020=y | 1419 | CONFIG_RTC_DRV_V3020=y |
@@ -1137,19 +1422,7 @@ CONFIG_RTC_DRV_V3020=y | |||
1137 | # on-CPU RTC drivers | 1422 | # on-CPU RTC drivers |
1138 | # | 1423 | # |
1139 | CONFIG_RTC_DRV_SA1100=y | 1424 | CONFIG_RTC_DRV_SA1100=y |
1140 | 1425 | # CONFIG_UIO is not set | |
1141 | # | ||
1142 | # DMA Engine support | ||
1143 | # | ||
1144 | # CONFIG_DMA_ENGINE is not set | ||
1145 | |||
1146 | # | ||
1147 | # DMA Clients | ||
1148 | # | ||
1149 | |||
1150 | # | ||
1151 | # DMA Devices | ||
1152 | # | ||
1153 | 1426 | ||
1154 | # | 1427 | # |
1155 | # File systems | 1428 | # File systems |
@@ -1163,20 +1436,16 @@ CONFIG_EXT3_FS_XATTR=y | |||
1163 | # CONFIG_EXT3_FS_SECURITY is not set | 1436 | # CONFIG_EXT3_FS_SECURITY is not set |
1164 | # CONFIG_EXT4DEV_FS is not set | 1437 | # CONFIG_EXT4DEV_FS is not set |
1165 | CONFIG_JBD=y | 1438 | CONFIG_JBD=y |
1166 | # CONFIG_JBD_DEBUG is not set | ||
1167 | CONFIG_FS_MBCACHE=y | 1439 | CONFIG_FS_MBCACHE=y |
1168 | # CONFIG_REISERFS_FS is not set | 1440 | # CONFIG_REISERFS_FS is not set |
1169 | # CONFIG_JFS_FS is not set | 1441 | # CONFIG_JFS_FS is not set |
1170 | # CONFIG_FS_POSIX_ACL is not set | 1442 | # CONFIG_FS_POSIX_ACL is not set |
1171 | # CONFIG_XFS_FS is not set | 1443 | # CONFIG_XFS_FS is not set |
1172 | # CONFIG_GFS2_FS is not set | ||
1173 | # CONFIG_OCFS2_FS is not set | 1444 | # CONFIG_OCFS2_FS is not set |
1174 | # CONFIG_MINIX_FS is not set | 1445 | CONFIG_DNOTIFY=y |
1175 | # CONFIG_ROMFS_FS is not set | ||
1176 | CONFIG_INOTIFY=y | 1446 | CONFIG_INOTIFY=y |
1177 | CONFIG_INOTIFY_USER=y | 1447 | CONFIG_INOTIFY_USER=y |
1178 | # CONFIG_QUOTA is not set | 1448 | # CONFIG_QUOTA is not set |
1179 | CONFIG_DNOTIFY=y | ||
1180 | # CONFIG_AUTOFS_FS is not set | 1449 | # CONFIG_AUTOFS_FS is not set |
1181 | # CONFIG_AUTOFS4_FS is not set | 1450 | # CONFIG_AUTOFS4_FS is not set |
1182 | # CONFIG_FUSE_FS is not set | 1451 | # CONFIG_FUSE_FS is not set |
@@ -1190,9 +1459,9 @@ CONFIG_DNOTIFY=y | |||
1190 | # | 1459 | # |
1191 | # DOS/FAT/NT Filesystems | 1460 | # DOS/FAT/NT Filesystems |
1192 | # | 1461 | # |
1193 | CONFIG_FAT_FS=y | 1462 | CONFIG_FAT_FS=m |
1194 | CONFIG_MSDOS_FS=y | 1463 | # CONFIG_MSDOS_FS is not set |
1195 | CONFIG_VFAT_FS=y | 1464 | CONFIG_VFAT_FS=m |
1196 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | 1465 | CONFIG_FAT_DEFAULT_CODEPAGE=437 |
1197 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | 1466 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" |
1198 | # CONFIG_NTFS_FS is not set | 1467 | # CONFIG_NTFS_FS is not set |
@@ -1206,7 +1475,6 @@ CONFIG_SYSFS=y | |||
1206 | CONFIG_TMPFS=y | 1475 | CONFIG_TMPFS=y |
1207 | # CONFIG_TMPFS_POSIX_ACL is not set | 1476 | # CONFIG_TMPFS_POSIX_ACL is not set |
1208 | # CONFIG_HUGETLB_PAGE is not set | 1477 | # CONFIG_HUGETLB_PAGE is not set |
1209 | CONFIG_RAMFS=y | ||
1210 | # CONFIG_CONFIGFS_FS is not set | 1478 | # CONFIG_CONFIGFS_FS is not set |
1211 | 1479 | ||
1212 | # | 1480 | # |
@@ -1219,22 +1487,30 @@ CONFIG_RAMFS=y | |||
1219 | # CONFIG_BEFS_FS is not set | 1487 | # CONFIG_BEFS_FS is not set |
1220 | # CONFIG_BFS_FS is not set | 1488 | # CONFIG_BFS_FS is not set |
1221 | # CONFIG_EFS_FS is not set | 1489 | # CONFIG_EFS_FS is not set |
1222 | # CONFIG_JFFS2_FS is not set | 1490 | CONFIG_JFFS2_FS=y |
1491 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1492 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1493 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1494 | CONFIG_JFFS2_SUMMARY=y | ||
1495 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1496 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1497 | CONFIG_JFFS2_ZLIB=y | ||
1498 | # CONFIG_JFFS2_LZO is not set | ||
1499 | CONFIG_JFFS2_RTIME=y | ||
1500 | # CONFIG_JFFS2_RUBIN is not set | ||
1223 | # CONFIG_CRAMFS is not set | 1501 | # CONFIG_CRAMFS is not set |
1224 | # CONFIG_VXFS_FS is not set | 1502 | # CONFIG_VXFS_FS is not set |
1503 | # CONFIG_MINIX_FS is not set | ||
1225 | # CONFIG_HPFS_FS is not set | 1504 | # CONFIG_HPFS_FS is not set |
1226 | # CONFIG_QNX4FS_FS is not set | 1505 | # CONFIG_QNX4FS_FS is not set |
1506 | # CONFIG_ROMFS_FS is not set | ||
1227 | # CONFIG_SYSV_FS is not set | 1507 | # CONFIG_SYSV_FS is not set |
1228 | # CONFIG_UFS_FS is not set | 1508 | # CONFIG_UFS_FS is not set |
1229 | 1509 | CONFIG_NETWORK_FILESYSTEMS=y | |
1230 | # | ||
1231 | # Network File Systems | ||
1232 | # | ||
1233 | CONFIG_NFS_FS=y | 1510 | CONFIG_NFS_FS=y |
1234 | CONFIG_NFS_V3=y | 1511 | CONFIG_NFS_V3=y |
1235 | # CONFIG_NFS_V3_ACL is not set | 1512 | # CONFIG_NFS_V3_ACL is not set |
1236 | # CONFIG_NFS_V4 is not set | 1513 | # CONFIG_NFS_V4 is not set |
1237 | # CONFIG_NFS_DIRECTIO is not set | ||
1238 | # CONFIG_NFSD is not set | 1514 | # CONFIG_NFSD is not set |
1239 | CONFIG_ROOT_NFS=y | 1515 | CONFIG_ROOT_NFS=y |
1240 | CONFIG_LOCKD=y | 1516 | CONFIG_LOCKD=y |
@@ -1244,9 +1520,13 @@ CONFIG_SUNRPC=y | |||
1244 | # CONFIG_SUNRPC_BIND34 is not set | 1520 | # CONFIG_SUNRPC_BIND34 is not set |
1245 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 1521 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
1246 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1522 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
1247 | CONFIG_SMB_FS=y | 1523 | # CONFIG_SMB_FS is not set |
1248 | # CONFIG_SMB_NLS_DEFAULT is not set | 1524 | CONFIG_CIFS=m |
1249 | # CONFIG_CIFS is not set | 1525 | # CONFIG_CIFS_STATS is not set |
1526 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1527 | # CONFIG_CIFS_XATTR is not set | ||
1528 | # CONFIG_CIFS_DEBUG2 is not set | ||
1529 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
1250 | # CONFIG_NCP_FS is not set | 1530 | # CONFIG_NCP_FS is not set |
1251 | # CONFIG_CODA_FS is not set | 1531 | # CONFIG_CODA_FS is not set |
1252 | # CONFIG_AFS_FS is not set | 1532 | # CONFIG_AFS_FS is not set |
@@ -1254,15 +1534,27 @@ CONFIG_SMB_FS=y | |||
1254 | # | 1534 | # |
1255 | # Partition Types | 1535 | # Partition Types |
1256 | # | 1536 | # |
1257 | # CONFIG_PARTITION_ADVANCED is not set | 1537 | CONFIG_PARTITION_ADVANCED=y |
1538 | # CONFIG_ACORN_PARTITION is not set | ||
1539 | # CONFIG_OSF_PARTITION is not set | ||
1540 | # CONFIG_AMIGA_PARTITION is not set | ||
1541 | # CONFIG_ATARI_PARTITION is not set | ||
1542 | # CONFIG_MAC_PARTITION is not set | ||
1258 | CONFIG_MSDOS_PARTITION=y | 1543 | CONFIG_MSDOS_PARTITION=y |
1259 | 1544 | # CONFIG_BSD_DISKLABEL is not set | |
1260 | # | 1545 | # CONFIG_MINIX_SUBPARTITION is not set |
1261 | # Native Language Support | 1546 | # CONFIG_SOLARIS_X86_PARTITION is not set |
1262 | # | 1547 | # CONFIG_UNIXWARE_DISKLABEL is not set |
1263 | CONFIG_NLS=y | 1548 | # CONFIG_LDM_PARTITION is not set |
1549 | # CONFIG_SGI_PARTITION is not set | ||
1550 | # CONFIG_ULTRIX_PARTITION is not set | ||
1551 | # CONFIG_SUN_PARTITION is not set | ||
1552 | # CONFIG_KARMA_PARTITION is not set | ||
1553 | # CONFIG_EFI_PARTITION is not set | ||
1554 | # CONFIG_SYSV68_PARTITION is not set | ||
1555 | CONFIG_NLS=m | ||
1264 | CONFIG_NLS_DEFAULT="iso8859-1" | 1556 | CONFIG_NLS_DEFAULT="iso8859-1" |
1265 | CONFIG_NLS_CODEPAGE_437=y | 1557 | CONFIG_NLS_CODEPAGE_437=m |
1266 | # CONFIG_NLS_CODEPAGE_737 is not set | 1558 | # CONFIG_NLS_CODEPAGE_737 is not set |
1267 | # CONFIG_NLS_CODEPAGE_775 is not set | 1559 | # CONFIG_NLS_CODEPAGE_775 is not set |
1268 | # CONFIG_NLS_CODEPAGE_850 is not set | 1560 | # CONFIG_NLS_CODEPAGE_850 is not set |
@@ -1286,7 +1578,7 @@ CONFIG_NLS_CODEPAGE_437=y | |||
1286 | # CONFIG_NLS_CODEPAGE_1250 is not set | 1578 | # CONFIG_NLS_CODEPAGE_1250 is not set |
1287 | # CONFIG_NLS_CODEPAGE_1251 is not set | 1579 | # CONFIG_NLS_CODEPAGE_1251 is not set |
1288 | # CONFIG_NLS_ASCII is not set | 1580 | # CONFIG_NLS_ASCII is not set |
1289 | CONFIG_NLS_ISO8859_1=y | 1581 | CONFIG_NLS_ISO8859_1=m |
1290 | # CONFIG_NLS_ISO8859_2 is not set | 1582 | # CONFIG_NLS_ISO8859_2 is not set |
1291 | # CONFIG_NLS_ISO8859_3 is not set | 1583 | # CONFIG_NLS_ISO8859_3 is not set |
1292 | # CONFIG_NLS_ISO8859_4 is not set | 1584 | # CONFIG_NLS_ISO8859_4 is not set |
@@ -1299,53 +1591,52 @@ CONFIG_NLS_ISO8859_1=y | |||
1299 | # CONFIG_NLS_ISO8859_15 is not set | 1591 | # CONFIG_NLS_ISO8859_15 is not set |
1300 | # CONFIG_NLS_KOI8_R is not set | 1592 | # CONFIG_NLS_KOI8_R is not set |
1301 | # CONFIG_NLS_KOI8_U is not set | 1593 | # CONFIG_NLS_KOI8_U is not set |
1302 | # CONFIG_NLS_UTF8 is not set | 1594 | CONFIG_NLS_UTF8=m |
1303 | |||
1304 | # | ||
1305 | # Distributed Lock Manager | ||
1306 | # | ||
1307 | # CONFIG_DLM is not set | 1595 | # CONFIG_DLM is not set |
1308 | 1596 | ||
1309 | # | 1597 | # |
1310 | # Profiling support | ||
1311 | # | ||
1312 | # CONFIG_PROFILING is not set | ||
1313 | |||
1314 | # | ||
1315 | # Kernel hacking | 1598 | # Kernel hacking |
1316 | # | 1599 | # |
1317 | # CONFIG_PRINTK_TIME is not set | 1600 | # CONFIG_PRINTK_TIME is not set |
1601 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1318 | CONFIG_ENABLE_MUST_CHECK=y | 1602 | CONFIG_ENABLE_MUST_CHECK=y |
1319 | CONFIG_MAGIC_SYSRQ=y | 1603 | CONFIG_FRAME_WARN=0 |
1604 | # CONFIG_MAGIC_SYSRQ is not set | ||
1320 | # CONFIG_UNUSED_SYMBOLS is not set | 1605 | # CONFIG_UNUSED_SYMBOLS is not set |
1321 | # CONFIG_DEBUG_FS is not set | 1606 | # CONFIG_DEBUG_FS is not set |
1322 | # CONFIG_HEADERS_CHECK is not set | 1607 | # CONFIG_HEADERS_CHECK is not set |
1323 | CONFIG_DEBUG_KERNEL=y | 1608 | CONFIG_DEBUG_KERNEL=y |
1324 | # CONFIG_DEBUG_SHIRQ is not set | 1609 | # CONFIG_DEBUG_SHIRQ is not set |
1325 | # CONFIG_DETECT_SOFTLOCKUP is not set | 1610 | # CONFIG_DETECT_SOFTLOCKUP is not set |
1326 | CONFIG_SCHED_DEBUG=y | 1611 | # CONFIG_SCHED_DEBUG is not set |
1327 | # CONFIG_SCHEDSTATS is not set | 1612 | # CONFIG_SCHEDSTATS is not set |
1328 | # CONFIG_TIMER_STATS is not set | 1613 | # CONFIG_TIMER_STATS is not set |
1329 | # CONFIG_DEBUG_SLAB is not set | 1614 | # CONFIG_DEBUG_OBJECTS is not set |
1330 | # CONFIG_DEBUG_RT_MUTEXES is not set | 1615 | # CONFIG_DEBUG_RT_MUTEXES is not set |
1331 | # CONFIG_RT_MUTEX_TESTER is not set | 1616 | # CONFIG_RT_MUTEX_TESTER is not set |
1332 | # CONFIG_DEBUG_SPINLOCK is not set | 1617 | # CONFIG_DEBUG_SPINLOCK is not set |
1333 | # CONFIG_DEBUG_MUTEXES is not set | 1618 | # CONFIG_DEBUG_MUTEXES is not set |
1334 | # CONFIG_DEBUG_LOCK_ALLOC is not set | 1619 | # CONFIG_DEBUG_LOCK_ALLOC is not set |
1335 | # CONFIG_PROVE_LOCKING is not set | 1620 | # CONFIG_PROVE_LOCKING is not set |
1621 | # CONFIG_LOCK_STAT is not set | ||
1336 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1622 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
1337 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | 1623 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set |
1338 | # CONFIG_DEBUG_KOBJECT is not set | 1624 | # CONFIG_DEBUG_KOBJECT is not set |
1339 | # CONFIG_DEBUG_BUGVERBOSE is not set | 1625 | # CONFIG_DEBUG_BUGVERBOSE is not set |
1340 | CONFIG_DEBUG_INFO=y | 1626 | # CONFIG_DEBUG_INFO is not set |
1341 | # CONFIG_DEBUG_VM is not set | 1627 | # CONFIG_DEBUG_VM is not set |
1628 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
1342 | # CONFIG_DEBUG_LIST is not set | 1629 | # CONFIG_DEBUG_LIST is not set |
1630 | # CONFIG_DEBUG_SG is not set | ||
1343 | CONFIG_FRAME_POINTER=y | 1631 | CONFIG_FRAME_POINTER=y |
1344 | CONFIG_FORCED_INLINING=y | 1632 | # CONFIG_BOOT_PRINTK_DELAY is not set |
1345 | # CONFIG_RCU_TORTURE_TEST is not set | 1633 | # CONFIG_RCU_TORTURE_TEST is not set |
1634 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
1346 | # CONFIG_FAULT_INJECTION is not set | 1635 | # CONFIG_FAULT_INJECTION is not set |
1636 | # CONFIG_SAMPLES is not set | ||
1347 | CONFIG_DEBUG_USER=y | 1637 | CONFIG_DEBUG_USER=y |
1348 | CONFIG_DEBUG_ERRORS=y | 1638 | CONFIG_DEBUG_ERRORS=y |
1639 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
1349 | CONFIG_DEBUG_LL=y | 1640 | CONFIG_DEBUG_LL=y |
1350 | # CONFIG_DEBUG_ICEDCC is not set | 1641 | # CONFIG_DEBUG_ICEDCC is not set |
1351 | 1642 | ||
@@ -1354,55 +1645,96 @@ CONFIG_DEBUG_LL=y | |||
1354 | # | 1645 | # |
1355 | # CONFIG_KEYS is not set | 1646 | # CONFIG_KEYS is not set |
1356 | # CONFIG_SECURITY is not set | 1647 | # CONFIG_SECURITY is not set |
1648 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1357 | CONFIG_CRYPTO=y | 1649 | CONFIG_CRYPTO=y |
1358 | CONFIG_CRYPTO_ALGAPI=m | 1650 | |
1359 | CONFIG_CRYPTO_BLKCIPHER=m | 1651 | # |
1360 | CONFIG_CRYPTO_MANAGER=m | 1652 | # Crypto core or helper |
1653 | # | ||
1654 | # CONFIG_CRYPTO_MANAGER is not set | ||
1655 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1656 | # CONFIG_CRYPTO_NULL is not set | ||
1657 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1658 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1659 | # CONFIG_CRYPTO_TEST is not set | ||
1660 | |||
1661 | # | ||
1662 | # Authenticated Encryption with Associated Data | ||
1663 | # | ||
1664 | # CONFIG_CRYPTO_CCM is not set | ||
1665 | # CONFIG_CRYPTO_GCM is not set | ||
1666 | # CONFIG_CRYPTO_SEQIV is not set | ||
1667 | |||
1668 | # | ||
1669 | # Block modes | ||
1670 | # | ||
1671 | # CONFIG_CRYPTO_CBC is not set | ||
1672 | # CONFIG_CRYPTO_CTR is not set | ||
1673 | # CONFIG_CRYPTO_CTS is not set | ||
1674 | # CONFIG_CRYPTO_ECB is not set | ||
1675 | # CONFIG_CRYPTO_LRW is not set | ||
1676 | # CONFIG_CRYPTO_PCBC is not set | ||
1677 | # CONFIG_CRYPTO_XTS is not set | ||
1678 | |||
1679 | # | ||
1680 | # Hash modes | ||
1681 | # | ||
1361 | # CONFIG_CRYPTO_HMAC is not set | 1682 | # CONFIG_CRYPTO_HMAC is not set |
1362 | # CONFIG_CRYPTO_XCBC is not set | 1683 | # CONFIG_CRYPTO_XCBC is not set |
1363 | # CONFIG_CRYPTO_NULL is not set | 1684 | |
1685 | # | ||
1686 | # Digest | ||
1687 | # | ||
1688 | # CONFIG_CRYPTO_CRC32C is not set | ||
1364 | # CONFIG_CRYPTO_MD4 is not set | 1689 | # CONFIG_CRYPTO_MD4 is not set |
1365 | # CONFIG_CRYPTO_MD5 is not set | 1690 | # CONFIG_CRYPTO_MD5 is not set |
1691 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1366 | # CONFIG_CRYPTO_SHA1 is not set | 1692 | # CONFIG_CRYPTO_SHA1 is not set |
1367 | # CONFIG_CRYPTO_SHA256 is not set | 1693 | # CONFIG_CRYPTO_SHA256 is not set |
1368 | # CONFIG_CRYPTO_SHA512 is not set | 1694 | # CONFIG_CRYPTO_SHA512 is not set |
1369 | # CONFIG_CRYPTO_WP512 is not set | ||
1370 | # CONFIG_CRYPTO_TGR192 is not set | 1695 | # CONFIG_CRYPTO_TGR192 is not set |
1371 | # CONFIG_CRYPTO_GF128MUL is not set | 1696 | # CONFIG_CRYPTO_WP512 is not set |
1372 | CONFIG_CRYPTO_ECB=m | 1697 | |
1373 | CONFIG_CRYPTO_CBC=m | 1698 | # |
1374 | CONFIG_CRYPTO_PCBC=m | 1699 | # Ciphers |
1375 | # CONFIG_CRYPTO_LRW is not set | 1700 | # |
1376 | # CONFIG_CRYPTO_CRYPTD is not set | 1701 | # CONFIG_CRYPTO_AES is not set |
1377 | # CONFIG_CRYPTO_DES is not set | 1702 | # CONFIG_CRYPTO_ANUBIS is not set |
1378 | # CONFIG_CRYPTO_FCRYPT is not set | 1703 | # CONFIG_CRYPTO_ARC4 is not set |
1379 | # CONFIG_CRYPTO_BLOWFISH is not set | 1704 | # CONFIG_CRYPTO_BLOWFISH is not set |
1380 | # CONFIG_CRYPTO_TWOFISH is not set | 1705 | # CONFIG_CRYPTO_CAMELLIA is not set |
1381 | # CONFIG_CRYPTO_SERPENT is not set | ||
1382 | CONFIG_CRYPTO_AES=m | ||
1383 | # CONFIG_CRYPTO_CAST5 is not set | 1706 | # CONFIG_CRYPTO_CAST5 is not set |
1384 | # CONFIG_CRYPTO_CAST6 is not set | 1707 | # CONFIG_CRYPTO_CAST6 is not set |
1385 | # CONFIG_CRYPTO_TEA is not set | 1708 | # CONFIG_CRYPTO_DES is not set |
1386 | CONFIG_CRYPTO_ARC4=m | 1709 | # CONFIG_CRYPTO_FCRYPT is not set |
1387 | # CONFIG_CRYPTO_KHAZAD is not set | 1710 | # CONFIG_CRYPTO_KHAZAD is not set |
1388 | # CONFIG_CRYPTO_ANUBIS is not set | 1711 | # CONFIG_CRYPTO_SALSA20 is not set |
1712 | # CONFIG_CRYPTO_SEED is not set | ||
1713 | # CONFIG_CRYPTO_SERPENT is not set | ||
1714 | # CONFIG_CRYPTO_TEA is not set | ||
1715 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1716 | |||
1717 | # | ||
1718 | # Compression | ||
1719 | # | ||
1389 | # CONFIG_CRYPTO_DEFLATE is not set | 1720 | # CONFIG_CRYPTO_DEFLATE is not set |
1390 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 1721 | # CONFIG_CRYPTO_LZO is not set |
1391 | # CONFIG_CRYPTO_CRC32C is not set | 1722 | # CONFIG_CRYPTO_HW is not set |
1392 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1393 | # CONFIG_CRYPTO_TEST is not set | ||
1394 | CONFIG_CRYPTO_HW=y | ||
1395 | 1723 | ||
1396 | # | 1724 | # |
1397 | # Library routines | 1725 | # Library routines |
1398 | # | 1726 | # |
1399 | CONFIG_BITREVERSE=y | 1727 | CONFIG_BITREVERSE=y |
1400 | # CONFIG_CRC_CCITT is not set | 1728 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set |
1729 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | ||
1730 | CONFIG_CRC_CCITT=m | ||
1401 | # CONFIG_CRC16 is not set | 1731 | # CONFIG_CRC16 is not set |
1402 | # CONFIG_CRC_ITU_T is not set | 1732 | # CONFIG_CRC_ITU_T is not set |
1403 | CONFIG_CRC32=y | 1733 | CONFIG_CRC32=y |
1404 | # CONFIG_CRC7 is not set | 1734 | # CONFIG_CRC7 is not set |
1405 | # CONFIG_LIBCRC32C is not set | 1735 | # CONFIG_LIBCRC32C is not set |
1736 | CONFIG_ZLIB_INFLATE=y | ||
1737 | CONFIG_ZLIB_DEFLATE=y | ||
1406 | CONFIG_PLIST=y | 1738 | CONFIG_PLIST=y |
1407 | CONFIG_HAS_IOMEM=y | 1739 | CONFIG_HAS_IOMEM=y |
1408 | CONFIG_HAS_IOPORT=y | 1740 | CONFIG_HAS_IOPORT=y |
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index f6d66dce6852..3781b3db9f49 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -326,11 +326,11 @@ static struct resource ixp4xx_udc_resources[] = { | |||
326 | }; | 326 | }; |
327 | 327 | ||
328 | /* | 328 | /* |
329 | * USB device controller. The IXP4xx uses the same controller as PXA2XX, | 329 | * USB device controller. The IXP4xx uses the same controller as PXA25X, |
330 | * so we just use the same device. | 330 | * so we just use the same device. |
331 | */ | 331 | */ |
332 | static struct platform_device ixp4xx_udc_device = { | 332 | static struct platform_device ixp4xx_udc_device = { |
333 | .name = "pxa2xx-udc", | 333 | .name = "pxa25x-udc", |
334 | .id = -1, | 334 | .id = -1, |
335 | .num_resources = 2, | 335 | .num_resources = 2, |
336 | .resource = ixp4xx_udc_resources, | 336 | .resource = ixp4xx_udc_resources, |
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 5da7a6820492..914bb33dab92 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -20,8 +20,7 @@ endmenu | |||
20 | 20 | ||
21 | endif | 21 | endif |
22 | 22 | ||
23 | choice | 23 | menu "Select target boards" |
24 | prompt "Select target board" | ||
25 | 24 | ||
26 | config ARCH_GUMSTIX | 25 | config ARCH_GUMSTIX |
27 | bool "Gumstix XScale boards" | 26 | bool "Gumstix XScale boards" |
@@ -37,10 +36,12 @@ config ARCH_LUBBOCK | |||
37 | config MACH_LOGICPD_PXA270 | 36 | config MACH_LOGICPD_PXA270 |
38 | bool "LogicPD PXA270 Card Engine Development Platform" | 37 | bool "LogicPD PXA270 Card Engine Development Platform" |
39 | select PXA27x | 38 | select PXA27x |
39 | select HAVE_PWM | ||
40 | 40 | ||
41 | config MACH_MAINSTONE | 41 | config MACH_MAINSTONE |
42 | bool "Intel HCDDBBVA0 Development Platform" | 42 | bool "Intel HCDDBBVA0 Development Platform" |
43 | select PXA27x | 43 | select PXA27x |
44 | select HAVE_PWM | ||
44 | 45 | ||
45 | config ARCH_PXA_IDP | 46 | config ARCH_PXA_IDP |
46 | bool "Accelent Xscale IDP" | 47 | bool "Accelent Xscale IDP" |
@@ -116,6 +117,7 @@ config MACH_COLIBRI | |||
116 | config MACH_ZYLONITE | 117 | config MACH_ZYLONITE |
117 | bool "PXA3xx Development Platform" | 118 | bool "PXA3xx Development Platform" |
118 | select PXA3xx | 119 | select PXA3xx |
120 | select HAVE_PWM | ||
119 | 121 | ||
120 | config MACH_LITTLETON | 122 | config MACH_LITTLETON |
121 | bool "PXA3xx Form Factor Platform (aka Littleton)" | 123 | bool "PXA3xx Form Factor Platform (aka Littleton)" |
@@ -138,7 +140,7 @@ config MACH_PCM027 | |||
138 | select PXA27x | 140 | select PXA27x |
139 | select IWMMXT | 141 | select IWMMXT |
140 | 142 | ||
141 | endchoice | 143 | endmenu |
142 | 144 | ||
143 | choice | 145 | choice |
144 | prompt "Used baseboard" | 146 | prompt "Used baseboard" |
@@ -146,25 +148,24 @@ choice | |||
146 | 148 | ||
147 | config MACH_PCM990_BASEBOARD | 149 | config MACH_PCM990_BASEBOARD |
148 | bool "PHYTEC PCM-990 development board" | 150 | bool "PHYTEC PCM-990 development board" |
151 | select HAVE_PWM | ||
149 | 152 | ||
150 | endchoice | 153 | endchoice |
151 | 154 | ||
152 | if PXA_SHARPSL | ||
153 | |||
154 | choice | 155 | choice |
155 | prompt "Select target Sharp Zaurus device range" | 156 | prompt "display on pcm990" |
157 | depends on MACH_PCM990_BASEBOARD | ||
156 | 158 | ||
157 | config PXA_SHARPSL_25x | 159 | config PCM990_DISPLAY_SHARP |
158 | bool "Sharp PXA25x models (SL-5600, SL-C7xx and SL-C6000x)" | 160 | bool "sharp lq084v1dg21 stn display" |
159 | select PXA25x | ||
160 | 161 | ||
161 | config PXA_SHARPSL_27x | 162 | config PCM990_DISPLAY_NEC |
162 | bool "Sharp PXA270 models (SL-Cxx00)" | 163 | bool "nec nl6448bc20_18d tft display" |
163 | select PXA27x | ||
164 | 164 | ||
165 | endchoice | 165 | config PCM990_DISPLAY_NONE |
166 | bool "no display" | ||
166 | 167 | ||
167 | endif | 168 | endchoice |
168 | 169 | ||
169 | if ARCH_GUMSTIX | 170 | if ARCH_GUMSTIX |
170 | 171 | ||
@@ -199,28 +200,33 @@ endmenu | |||
199 | 200 | ||
200 | config MACH_POODLE | 201 | config MACH_POODLE |
201 | bool "Enable Sharp SL-5600 (Poodle) Support" | 202 | bool "Enable Sharp SL-5600 (Poodle) Support" |
202 | depends on PXA_SHARPSL_25x | 203 | depends on PXA_SHARPSL |
204 | select PXA25x | ||
203 | select SHARP_LOCOMO | 205 | select SHARP_LOCOMO |
204 | select PXA_SSP | 206 | select PXA_SSP |
205 | 207 | ||
206 | config MACH_CORGI | 208 | config MACH_CORGI |
207 | bool "Enable Sharp SL-C700 (Corgi) Support" | 209 | bool "Enable Sharp SL-C700 (Corgi) Support" |
208 | depends on PXA_SHARPSL_25x | 210 | depends on PXA_SHARPSL |
211 | select PXA25x | ||
209 | select PXA_SHARP_C7xx | 212 | select PXA_SHARP_C7xx |
210 | 213 | ||
211 | config MACH_SHEPHERD | 214 | config MACH_SHEPHERD |
212 | bool "Enable Sharp SL-C750 (Shepherd) Support" | 215 | bool "Enable Sharp SL-C750 (Shepherd) Support" |
213 | depends on PXA_SHARPSL_25x | 216 | depends on PXA_SHARPSL |
217 | select PXA25x | ||
214 | select PXA_SHARP_C7xx | 218 | select PXA_SHARP_C7xx |
215 | 219 | ||
216 | config MACH_HUSKY | 220 | config MACH_HUSKY |
217 | bool "Enable Sharp SL-C760 (Husky) Support" | 221 | bool "Enable Sharp SL-C760 (Husky) Support" |
218 | depends on PXA_SHARPSL_25x | 222 | depends on PXA_SHARPSL |
223 | select PXA25x | ||
219 | select PXA_SHARP_C7xx | 224 | select PXA_SHARP_C7xx |
220 | 225 | ||
221 | config MACH_AKITA | 226 | config MACH_AKITA |
222 | bool "Enable Sharp SL-1000 (Akita) Support" | 227 | bool "Enable Sharp SL-1000 (Akita) Support" |
223 | depends on PXA_SHARPSL_27x | 228 | depends on PXA_SHARPSL |
229 | select PXA27x | ||
224 | select PXA_SHARP_Cxx00 | 230 | select PXA_SHARP_Cxx00 |
225 | select MACH_SPITZ | 231 | select MACH_SPITZ |
226 | select I2C | 232 | select I2C |
@@ -228,17 +234,20 @@ config MACH_AKITA | |||
228 | 234 | ||
229 | config MACH_SPITZ | 235 | config MACH_SPITZ |
230 | bool "Enable Sharp Zaurus SL-3000 (Spitz) Support" | 236 | bool "Enable Sharp Zaurus SL-3000 (Spitz) Support" |
231 | depends on PXA_SHARPSL_27x | 237 | depends on PXA_SHARPSL |
238 | select PXA27x | ||
232 | select PXA_SHARP_Cxx00 | 239 | select PXA_SHARP_Cxx00 |
233 | 240 | ||
234 | config MACH_BORZOI | 241 | config MACH_BORZOI |
235 | bool "Enable Sharp Zaurus SL-3100 (Borzoi) Support" | 242 | bool "Enable Sharp Zaurus SL-3100 (Borzoi) Support" |
236 | depends on PXA_SHARPSL_27x | 243 | depends on PXA_SHARPSL |
244 | select PXA27x | ||
237 | select PXA_SHARP_Cxx00 | 245 | select PXA_SHARP_Cxx00 |
238 | 246 | ||
239 | config MACH_TOSA | 247 | config MACH_TOSA |
240 | bool "Enable Sharp SL-6000x (Tosa) Support" | 248 | bool "Enable Sharp SL-6000x (Tosa) Support" |
241 | depends on PXA_SHARPSL_25x | 249 | depends on PXA_SHARPSL |
250 | select PXA25x | ||
242 | 251 | ||
243 | config PXA25x | 252 | config PXA25x |
244 | bool | 253 | bool |
@@ -273,4 +282,10 @@ config PXA_SSP | |||
273 | tristate | 282 | tristate |
274 | help | 283 | help |
275 | Enable support for PXA2xx SSP ports | 284 | Enable support for PXA2xx SSP ports |
285 | |||
286 | config PXA_PWM | ||
287 | tristate | ||
288 | default BACKLIGHT_PWM | ||
289 | help | ||
290 | Enable support for PXA2xx/PXA3xx PWM controllers | ||
276 | endif | 291 | endif |
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 0e6d05bb81aa..c4dfbe87fc4e 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile | |||
@@ -10,10 +10,11 @@ obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o | |||
10 | 10 | ||
11 | # Generic drivers that other drivers may depend upon | 11 | # Generic drivers that other drivers may depend upon |
12 | obj-$(CONFIG_PXA_SSP) += ssp.o | 12 | obj-$(CONFIG_PXA_SSP) += ssp.o |
13 | obj-$(CONFIG_PXA_PWM) += pwm.o | ||
13 | 14 | ||
14 | # SoC-specific code | 15 | # SoC-specific code |
15 | obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa25x.o | 16 | obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa2xx.o pxa25x.o |
16 | obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa27x.o | 17 | obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa2xx.o pxa27x.o |
17 | obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o | 18 | obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o |
18 | obj-$(CONFIG_CPU_PXA300) += pxa300.o | 19 | obj-$(CONFIG_CPU_PXA300) += pxa300.o |
19 | obj-$(CONFIG_CPU_PXA320) += pxa320.o | 20 | obj-$(CONFIG_CPU_PXA320) += pxa320.o |
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c index e97dc59813c8..b4d04955dcb0 100644 --- a/arch/arm/mach-pxa/clock.c +++ b/arch/arm/mach-pxa/clock.c | |||
@@ -12,7 +12,7 @@ | |||
12 | #include <linux/platform_device.h> | 12 | #include <linux/platform_device.h> |
13 | #include <linux/delay.h> | 13 | #include <linux/delay.h> |
14 | 14 | ||
15 | #include <asm/arch/pxa-regs.h> | 15 | #include <asm/arch/pxa2xx-regs.h> |
16 | #include <asm/arch/pxa2xx-gpio.h> | 16 | #include <asm/arch/pxa2xx-gpio.h> |
17 | #include <asm/hardware.h> | 17 | #include <asm/hardware.h> |
18 | 18 | ||
@@ -47,6 +47,9 @@ struct clk *clk_get(struct device *dev, const char *id) | |||
47 | clk = p; | 47 | clk = p; |
48 | mutex_unlock(&clocks_mutex); | 48 | mutex_unlock(&clocks_mutex); |
49 | 49 | ||
50 | if (!IS_ERR(clk) && clk->ops == NULL) | ||
51 | clk = clk->other; | ||
52 | |||
50 | return clk; | 53 | return clk; |
51 | } | 54 | } |
52 | EXPORT_SYMBOL(clk_get); | 55 | EXPORT_SYMBOL(clk_get); |
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h index bc6b77e1592e..83cbfaba485d 100644 --- a/arch/arm/mach-pxa/clock.h +++ b/arch/arm/mach-pxa/clock.h | |||
@@ -15,6 +15,7 @@ struct clk { | |||
15 | unsigned int cken; | 15 | unsigned int cken; |
16 | unsigned int delay; | 16 | unsigned int delay; |
17 | unsigned int enabled; | 17 | unsigned int enabled; |
18 | struct clk *other; | ||
18 | }; | 19 | }; |
19 | 20 | ||
20 | #define INIT_CKEN(_name, _cken, _rate, _delay, _dev) \ | 21 | #define INIT_CKEN(_name, _cken, _rate, _delay, _dev) \ |
@@ -35,6 +36,17 @@ struct clk { | |||
35 | .cken = CKEN_##_cken, \ | 36 | .cken = CKEN_##_cken, \ |
36 | } | 37 | } |
37 | 38 | ||
39 | /* | ||
40 | * This is a placeholder to alias one clock device+name pair | ||
41 | * to another struct clk. | ||
42 | */ | ||
43 | #define INIT_CKOTHER(_name, _other, _dev) \ | ||
44 | { \ | ||
45 | .name = _name, \ | ||
46 | .dev = _dev, \ | ||
47 | .other = _other, \ | ||
48 | } | ||
49 | |||
38 | extern const struct clkops clk_cken_ops; | 50 | extern const struct clkops clk_cken_ops; |
39 | 51 | ||
40 | void clk_cken_enable(struct clk *clk); | 52 | void clk_cken_enable(struct clk *clk); |
diff --git a/arch/arm/mach-pxa/cm-x270-pci.c b/arch/arm/mach-pxa/cm-x270-pci.c index ac7f05f9f3eb..319c9ff3ab9a 100644 --- a/arch/arm/mach-pxa/cm-x270-pci.c +++ b/arch/arm/mach-pxa/cm-x270-pci.c | |||
@@ -41,18 +41,20 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size, | |||
41 | { | 41 | { |
42 | unsigned int sz = SZ_64M >> PAGE_SHIFT; | 42 | unsigned int sz = SZ_64M >> PAGE_SHIFT; |
43 | 43 | ||
44 | pr_info("Adjusting zones for CM-x270\n"); | 44 | if (machine_is_armcore()) { |
45 | 45 | pr_info("Adjusting zones for CM-x270\n"); | |
46 | /* | 46 | |
47 | * Only adjust if > 64M on current system | 47 | /* |
48 | */ | 48 | * Only adjust if > 64M on current system |
49 | if (node || (zone_size[0] <= sz)) | 49 | */ |
50 | return; | 50 | if (node || (zone_size[0] <= sz)) |
51 | 51 | return; | |
52 | zone_size[1] = zone_size[0] - sz; | 52 | |
53 | zone_size[0] = sz; | 53 | zone_size[1] = zone_size[0] - sz; |
54 | zhole_size[1] = zhole_size[0]; | 54 | zone_size[0] = sz; |
55 | zhole_size[0] = 0; | 55 | zhole_size[1] = zhole_size[0]; |
56 | zhole_size[0] = 0; | ||
57 | } | ||
56 | } | 58 | } |
57 | 59 | ||
58 | static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) | 60 | static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) |
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index f5851d1adc25..01b9964acec1 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <asm/arch/pxa-regs.h> | 31 | #include <asm/arch/pxa-regs.h> |
32 | #include <asm/arch/pxa2xx-regs.h> | 32 | #include <asm/arch/pxa2xx-regs.h> |
33 | #include <asm/arch/pxa2xx-gpio.h> | 33 | #include <asm/arch/pxa2xx-gpio.h> |
34 | #include <asm/arch/audio.h> | ||
34 | #include <asm/arch/pxafb.h> | 35 | #include <asm/arch/pxafb.h> |
35 | #include <asm/arch/ohci.h> | 36 | #include <asm/arch/ohci.h> |
36 | #include <asm/arch/mmc.h> | 37 | #include <asm/arch/mmc.h> |
@@ -81,12 +82,6 @@ static struct platform_device cmx270_device_dm9k = { | |||
81 | } | 82 | } |
82 | }; | 83 | }; |
83 | 84 | ||
84 | /* audio device */ | ||
85 | static struct platform_device cmx270_audio_device = { | ||
86 | .name = "pxa2xx-ac97", | ||
87 | .id = -1, | ||
88 | }; | ||
89 | |||
90 | /* touchscreen controller */ | 85 | /* touchscreen controller */ |
91 | static struct platform_device cmx270_ts_device = { | 86 | static struct platform_device cmx270_ts_device = { |
92 | .name = "ucb1400_ts", | 87 | .name = "ucb1400_ts", |
@@ -219,7 +214,6 @@ static struct platform_device cmx270_ata = { | |||
219 | /* platform devices */ | 214 | /* platform devices */ |
220 | static struct platform_device *platform_devices[] __initdata = { | 215 | static struct platform_device *platform_devices[] __initdata = { |
221 | &cmx270_device_dm9k, | 216 | &cmx270_device_dm9k, |
222 | &cmx270_audio_device, | ||
223 | &cmx270_rtc_device, | 217 | &cmx270_rtc_device, |
224 | &cmx270_2700G, | 218 | &cmx270_2700G, |
225 | &cmx270_led_device, | 219 | &cmx270_led_device, |
@@ -594,6 +588,7 @@ static void __init cmx270_init(void) | |||
594 | 588 | ||
595 | /* register CM-X270 platform devices */ | 589 | /* register CM-X270 platform devices */ |
596 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 590 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
591 | pxa_set_ac97_info(NULL); | ||
597 | 592 | ||
598 | /* set MCI and OHCI platform parameters */ | 593 | /* set MCI and OHCI platform parameters */ |
599 | pxa_set_mci_info(&cmx270_mci_platform_data); | 594 | pxa_set_mci_info(&cmx270_mci_platform_data); |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index b757dd756655..b37671b71886 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
@@ -36,6 +36,7 @@ | |||
36 | #include <asm/mach/irq.h> | 36 | #include <asm/mach/irq.h> |
37 | 37 | ||
38 | #include <asm/arch/pxa-regs.h> | 38 | #include <asm/arch/pxa-regs.h> |
39 | #include <asm/arch/pxa2xx-regs.h> | ||
39 | #include <asm/arch/pxa2xx-gpio.h> | 40 | #include <asm/arch/pxa2xx-gpio.h> |
40 | #include <asm/arch/irda.h> | 41 | #include <asm/arch/irda.h> |
41 | #include <asm/arch/mmc.h> | 42 | #include <asm/arch/mmc.h> |
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index 0a85f706e887..e91c0f26c412 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <asm/arch/sharpsl.h> | 26 | #include <asm/arch/sharpsl.h> |
27 | #include <asm/arch/corgi.h> | 27 | #include <asm/arch/corgi.h> |
28 | #include <asm/arch/pxa-regs.h> | 28 | #include <asm/arch/pxa-regs.h> |
29 | #include <asm/arch/pxa2xx-regs.h> | ||
29 | #include <asm/arch/pxa2xx-gpio.h> | 30 | #include <asm/arch/pxa2xx-gpio.h> |
30 | #include "sharpsl.h" | 31 | #include "sharpsl.h" |
31 | 32 | ||
@@ -204,7 +205,9 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = { | |||
204 | .read_devdata = corgipm_read_devdata, | 205 | .read_devdata = corgipm_read_devdata, |
205 | .charger_wakeup = corgi_charger_wakeup, | 206 | .charger_wakeup = corgi_charger_wakeup, |
206 | .should_wakeup = corgi_should_wakeup, | 207 | .should_wakeup = corgi_should_wakeup, |
208 | #ifdef CONFIG_BACKLIGHT_CORGI | ||
207 | .backlight_limit = corgibl_limit_intensity, | 209 | .backlight_limit = corgibl_limit_intensity, |
210 | #endif | ||
208 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, | 211 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, |
209 | .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, | 212 | .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, |
210 | .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH, | 213 | .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH, |
@@ -226,6 +229,10 @@ static int __devinit corgipm_init(void) | |||
226 | { | 229 | { |
227 | int ret; | 230 | int ret; |
228 | 231 | ||
232 | if (!machine_is_corgi() && !machine_is_shepherd() | ||
233 | && !machine_is_husky()) | ||
234 | return -ENODEV; | ||
235 | |||
229 | corgipm_device = platform_device_alloc("sharpsl-pm", -1); | 236 | corgipm_device = platform_device_alloc("sharpsl-pm", -1); |
230 | if (!corgipm_device) | 237 | if (!corgipm_device) |
231 | return -ENOMEM; | 238 | return -ENOMEM; |
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index d6c05b6eab35..a6f2390ce662 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c | |||
@@ -10,11 +10,14 @@ | |||
10 | #include <asm/arch/mmc.h> | 10 | #include <asm/arch/mmc.h> |
11 | #include <asm/arch/irda.h> | 11 | #include <asm/arch/irda.h> |
12 | #include <asm/arch/i2c.h> | 12 | #include <asm/arch/i2c.h> |
13 | #include <asm/arch/mfp-pxa27x.h> | ||
13 | #include <asm/arch/ohci.h> | 14 | #include <asm/arch/ohci.h> |
14 | #include <asm/arch/pxa27x_keypad.h> | 15 | #include <asm/arch/pxa27x_keypad.h> |
15 | #include <asm/arch/camera.h> | 16 | #include <asm/arch/camera.h> |
17 | #include <asm/arch/audio.h> | ||
16 | 18 | ||
17 | #include "devices.h" | 19 | #include "devices.h" |
20 | #include "generic.h" | ||
18 | 21 | ||
19 | void __init pxa_register_device(struct platform_device *dev, void *data) | 22 | void __init pxa_register_device(struct platform_device *dev, void *data) |
20 | { | 23 | { |
@@ -91,8 +94,19 @@ static struct resource pxa2xx_udc_resources[] = { | |||
91 | 94 | ||
92 | static u64 udc_dma_mask = ~(u32)0; | 95 | static u64 udc_dma_mask = ~(u32)0; |
93 | 96 | ||
94 | struct platform_device pxa_device_udc = { | 97 | struct platform_device pxa25x_device_udc = { |
95 | .name = "pxa2xx-udc", | 98 | .name = "pxa25x-udc", |
99 | .id = -1, | ||
100 | .resource = pxa2xx_udc_resources, | ||
101 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), | ||
102 | .dev = { | ||
103 | .platform_data = &pxa_udc_info, | ||
104 | .dma_mask = &udc_dma_mask, | ||
105 | } | ||
106 | }; | ||
107 | |||
108 | struct platform_device pxa27x_device_udc = { | ||
109 | .name = "pxa27x-udc", | ||
96 | .id = -1, | 110 | .id = -1, |
97 | .resource = pxa2xx_udc_resources, | 111 | .resource = pxa2xx_udc_resources, |
98 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), | 112 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), |
@@ -233,8 +247,15 @@ struct platform_device pxa_device_i2c = { | |||
233 | .num_resources = ARRAY_SIZE(pxai2c_resources), | 247 | .num_resources = ARRAY_SIZE(pxai2c_resources), |
234 | }; | 248 | }; |
235 | 249 | ||
250 | static unsigned long pxa27x_i2c_mfp_cfg[] = { | ||
251 | GPIO117_I2C_SCL, | ||
252 | GPIO118_I2C_SDA, | ||
253 | }; | ||
254 | |||
236 | void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) | 255 | void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) |
237 | { | 256 | { |
257 | if (cpu_is_pxa27x()) | ||
258 | pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg)); | ||
238 | pxa_register_device(&pxa_device_i2c, info); | 259 | pxa_register_device(&pxa_device_i2c, info); |
239 | } | 260 | } |
240 | 261 | ||
@@ -278,8 +299,69 @@ struct platform_device pxa_device_rtc = { | |||
278 | .id = -1, | 299 | .id = -1, |
279 | }; | 300 | }; |
280 | 301 | ||
302 | static struct resource pxa_ac97_resources[] = { | ||
303 | [0] = { | ||
304 | .start = 0x40500000, | ||
305 | .end = 0x40500000 + 0xfff, | ||
306 | .flags = IORESOURCE_MEM, | ||
307 | }, | ||
308 | [1] = { | ||
309 | .start = IRQ_AC97, | ||
310 | .end = IRQ_AC97, | ||
311 | .flags = IORESOURCE_IRQ, | ||
312 | }, | ||
313 | }; | ||
314 | |||
315 | static u64 pxa_ac97_dmamask = 0xffffffffUL; | ||
316 | |||
317 | struct platform_device pxa_device_ac97 = { | ||
318 | .name = "pxa2xx-ac97", | ||
319 | .id = -1, | ||
320 | .dev = { | ||
321 | .dma_mask = &pxa_ac97_dmamask, | ||
322 | .coherent_dma_mask = 0xffffffff, | ||
323 | }, | ||
324 | .num_resources = ARRAY_SIZE(pxa_ac97_resources), | ||
325 | .resource = pxa_ac97_resources, | ||
326 | }; | ||
327 | |||
328 | void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops) | ||
329 | { | ||
330 | pxa_register_device(&pxa_device_ac97, ops); | ||
331 | } | ||
332 | |||
281 | #ifdef CONFIG_PXA25x | 333 | #ifdef CONFIG_PXA25x |
282 | 334 | ||
335 | static struct resource pxa25x_resource_pwm0[] = { | ||
336 | [0] = { | ||
337 | .start = 0x40b00000, | ||
338 | .end = 0x40b0000f, | ||
339 | .flags = IORESOURCE_MEM, | ||
340 | }, | ||
341 | }; | ||
342 | |||
343 | struct platform_device pxa25x_device_pwm0 = { | ||
344 | .name = "pxa25x-pwm", | ||
345 | .id = 0, | ||
346 | .resource = pxa25x_resource_pwm0, | ||
347 | .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0), | ||
348 | }; | ||
349 | |||
350 | static struct resource pxa25x_resource_pwm1[] = { | ||
351 | [0] = { | ||
352 | .start = 0x40c00000, | ||
353 | .end = 0x40c0000f, | ||
354 | .flags = IORESOURCE_MEM, | ||
355 | }, | ||
356 | }; | ||
357 | |||
358 | struct platform_device pxa25x_device_pwm1 = { | ||
359 | .name = "pxa25x-pwm", | ||
360 | .id = 1, | ||
361 | .resource = pxa25x_resource_pwm1, | ||
362 | .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1), | ||
363 | }; | ||
364 | |||
283 | static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32); | 365 | static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32); |
284 | 366 | ||
285 | static struct resource pxa25x_resource_ssp[] = { | 367 | static struct resource pxa25x_resource_ssp[] = { |
@@ -568,6 +650,36 @@ struct platform_device pxa27x_device_ssp3 = { | |||
568 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), | 650 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), |
569 | }; | 651 | }; |
570 | 652 | ||
653 | static struct resource pxa27x_resource_pwm0[] = { | ||
654 | [0] = { | ||
655 | .start = 0x40b00000, | ||
656 | .end = 0x40b0001f, | ||
657 | .flags = IORESOURCE_MEM, | ||
658 | }, | ||
659 | }; | ||
660 | |||
661 | struct platform_device pxa27x_device_pwm0 = { | ||
662 | .name = "pxa27x-pwm", | ||
663 | .id = 0, | ||
664 | .resource = pxa27x_resource_pwm0, | ||
665 | .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0), | ||
666 | }; | ||
667 | |||
668 | static struct resource pxa27x_resource_pwm1[] = { | ||
669 | [0] = { | ||
670 | .start = 0x40c00000, | ||
671 | .end = 0x40c0001f, | ||
672 | .flags = IORESOURCE_MEM, | ||
673 | }, | ||
674 | }; | ||
675 | |||
676 | struct platform_device pxa27x_device_pwm1 = { | ||
677 | .name = "pxa27x-pwm", | ||
678 | .id = 1, | ||
679 | .resource = pxa27x_resource_pwm1, | ||
680 | .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), | ||
681 | }; | ||
682 | |||
571 | static struct resource pxa27x_resource_camera[] = { | 683 | static struct resource pxa27x_resource_camera[] = { |
572 | [0] = { | 684 | [0] = { |
573 | .start = 0x50000000, | 685 | .start = 0x50000000, |
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index fcab017f27ee..b852eb18daa5 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h | |||
@@ -1,7 +1,8 @@ | |||
1 | extern struct platform_device pxa_device_mci; | 1 | extern struct platform_device pxa_device_mci; |
2 | extern struct platform_device pxa3xx_device_mci2; | 2 | extern struct platform_device pxa3xx_device_mci2; |
3 | extern struct platform_device pxa3xx_device_mci3; | 3 | extern struct platform_device pxa3xx_device_mci3; |
4 | extern struct platform_device pxa_device_udc; | 4 | extern struct platform_device pxa25x_device_udc; |
5 | extern struct platform_device pxa27x_device_udc; | ||
5 | extern struct platform_device pxa_device_fb; | 6 | extern struct platform_device pxa_device_fb; |
6 | extern struct platform_device pxa_device_ffuart; | 7 | extern struct platform_device pxa_device_ffuart; |
7 | extern struct platform_device pxa_device_btuart; | 8 | extern struct platform_device pxa_device_btuart; |
@@ -11,6 +12,7 @@ extern struct platform_device pxa_device_i2c; | |||
11 | extern struct platform_device pxa_device_i2s; | 12 | extern struct platform_device pxa_device_i2s; |
12 | extern struct platform_device pxa_device_ficp; | 13 | extern struct platform_device pxa_device_ficp; |
13 | extern struct platform_device pxa_device_rtc; | 14 | extern struct platform_device pxa_device_rtc; |
15 | extern struct platform_device pxa_device_ac97; | ||
14 | 16 | ||
15 | extern struct platform_device pxa27x_device_i2c_power; | 17 | extern struct platform_device pxa27x_device_i2c_power; |
16 | extern struct platform_device pxa27x_device_ohci; | 18 | extern struct platform_device pxa27x_device_ohci; |
@@ -24,4 +26,9 @@ extern struct platform_device pxa27x_device_ssp2; | |||
24 | extern struct platform_device pxa27x_device_ssp3; | 26 | extern struct platform_device pxa27x_device_ssp3; |
25 | extern struct platform_device pxa3xx_device_ssp4; | 27 | extern struct platform_device pxa3xx_device_ssp4; |
26 | 28 | ||
29 | extern struct platform_device pxa25x_device_pwm0; | ||
30 | extern struct platform_device pxa25x_device_pwm1; | ||
31 | extern struct platform_device pxa27x_device_pwm0; | ||
32 | extern struct platform_device pxa27x_device_pwm1; | ||
33 | |||
27 | void __init pxa_register_device(struct platform_device *dev, void *data); | 34 | void __init pxa_register_device(struct platform_device *dev, void *data); |
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index 9c57700ee5c2..1bf680749928 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c | |||
@@ -24,6 +24,8 @@ | |||
24 | 24 | ||
25 | #include <asm/arch/pxa-regs.h> | 25 | #include <asm/arch/pxa-regs.h> |
26 | #include <asm/arch/pxa2xx-gpio.h> | 26 | #include <asm/arch/pxa2xx-gpio.h> |
27 | #include <asm/arch/pxa27x-udc.h> | ||
28 | #include <asm/arch/audio.h> | ||
27 | #include <asm/arch/pxafb.h> | 29 | #include <asm/arch/pxafb.h> |
28 | #include <asm/arch/ohci.h> | 30 | #include <asm/arch/ohci.h> |
29 | #include <asm/arch/mmc.h> | 31 | #include <asm/arch/mmc.h> |
@@ -72,12 +74,6 @@ static struct platform_device em_x270_dm9k = { | |||
72 | } | 74 | } |
73 | }; | 75 | }; |
74 | 76 | ||
75 | /* audio device */ | ||
76 | static struct platform_device em_x270_audio = { | ||
77 | .name = "pxa2xx-ac97", | ||
78 | .id = -1, | ||
79 | }; | ||
80 | |||
81 | /* WM9712 touchscreen controller. Hopefully the driver will make it to | 77 | /* WM9712 touchscreen controller. Hopefully the driver will make it to |
82 | * the mainstream sometime */ | 78 | * the mainstream sometime */ |
83 | static struct platform_device em_x270_ts = { | 79 | static struct platform_device em_x270_ts = { |
@@ -217,7 +213,6 @@ static struct platform_device em_x270_nand = { | |||
217 | /* platform devices */ | 213 | /* platform devices */ |
218 | static struct platform_device *platform_devices[] __initdata = { | 214 | static struct platform_device *platform_devices[] __initdata = { |
219 | &em_x270_dm9k, | 215 | &em_x270_dm9k, |
220 | &em_x270_audio, | ||
221 | &em_x270_ts, | 216 | &em_x270_ts, |
222 | &em_x270_rtc, | 217 | &em_x270_rtc, |
223 | &em_x270_nand, | 218 | &em_x270_nand, |
@@ -325,6 +320,7 @@ static void __init em_x270_init(void) | |||
325 | 320 | ||
326 | /* register EM-X270 platform devices */ | 321 | /* register EM-X270 platform devices */ |
327 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 322 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
323 | pxa_set_ac97_info(NULL); | ||
328 | 324 | ||
329 | /* set MCI and OHCI platform parameters */ | 325 | /* set MCI and OHCI platform parameters */ |
330 | pxa_set_mci_info(&em_x270_mci_platform_data); | 326 | pxa_set_mci_info(&em_x270_mci_platform_data); |
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 44617938f3f1..ca053226fba0 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c | |||
@@ -60,23 +60,6 @@ unsigned int get_memclk_frequency_10khz(void) | |||
60 | EXPORT_SYMBOL(get_memclk_frequency_10khz); | 60 | EXPORT_SYMBOL(get_memclk_frequency_10khz); |
61 | 61 | ||
62 | /* | 62 | /* |
63 | * Routine to safely enable or disable a clock in the CKEN | ||
64 | */ | ||
65 | void __pxa_set_cken(int clock, int enable) | ||
66 | { | ||
67 | unsigned long flags; | ||
68 | local_irq_save(flags); | ||
69 | |||
70 | if (enable) | ||
71 | CKEN |= (1 << clock); | ||
72 | else | ||
73 | CKEN &= ~(1 << clock); | ||
74 | |||
75 | local_irq_restore(flags); | ||
76 | } | ||
77 | EXPORT_SYMBOL(__pxa_set_cken); | ||
78 | |||
79 | /* | ||
80 | * Intel PXA2xx internal register mapping. | 63 | * Intel PXA2xx internal register mapping. |
81 | * | 64 | * |
82 | * Note 1: not all PXA2xx variants implement all those addresses. | 65 | * Note 1: not all PXA2xx variants implement all those addresses. |
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index a9a0c3fab159..fbff557bb225 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <asm/irq.h> | 21 | #include <asm/irq.h> |
22 | #include <asm/mach/irq.h> | 22 | #include <asm/mach/irq.h> |
23 | #include <asm/arch/pxa-regs.h> | 23 | #include <asm/arch/pxa-regs.h> |
24 | #include <asm/arch/pxa2xx-gpio.h> | ||
25 | 24 | ||
26 | #include "generic.h" | 25 | #include "generic.h" |
27 | 26 | ||
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index a20e4b1649d6..cc1c4fa06145 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/ioport.h> | 23 | #include <linux/ioport.h> |
24 | #include <linux/mtd/mtd.h> | 24 | #include <linux/mtd/mtd.h> |
25 | #include <linux/mtd/partitions.h> | 25 | #include <linux/mtd/partitions.h> |
26 | #include <linux/pwm_backlight.h> | ||
26 | 27 | ||
27 | #include <asm/types.h> | 28 | #include <asm/types.h> |
28 | #include <asm/setup.h> | 29 | #include <asm/setup.h> |
@@ -134,9 +135,12 @@ static struct sys_device lpd270_irq_device = { | |||
134 | 135 | ||
135 | static int __init lpd270_irq_device_init(void) | 136 | static int __init lpd270_irq_device_init(void) |
136 | { | 137 | { |
137 | int ret = sysdev_class_register(&lpd270_irq_sysclass); | 138 | int ret = -ENODEV; |
138 | if (ret == 0) | 139 | if (machine_is_logicpd_pxa270()) { |
139 | ret = sysdev_register(&lpd270_irq_device); | 140 | ret = sysdev_class_register(&lpd270_irq_sysclass); |
141 | if (ret == 0) | ||
142 | ret = sysdev_register(&lpd270_irq_device); | ||
143 | } | ||
140 | return ret; | 144 | return ret; |
141 | } | 145 | } |
142 | 146 | ||
@@ -164,11 +168,6 @@ static struct platform_device smc91x_device = { | |||
164 | .resource = smc91x_resources, | 168 | .resource = smc91x_resources, |
165 | }; | 169 | }; |
166 | 170 | ||
167 | static struct platform_device lpd270_audio_device = { | ||
168 | .name = "pxa2xx-ac97", | ||
169 | .id = -1, | ||
170 | }; | ||
171 | |||
172 | static struct resource lpd270_flash_resources[] = { | 171 | static struct resource lpd270_flash_resources[] = { |
173 | [0] = { | 172 | [0] = { |
174 | .start = PXA_CS0_PHYS, | 173 | .start = PXA_CS0_PHYS, |
@@ -233,21 +232,20 @@ static struct platform_device lpd270_flash_device[2] = { | |||
233 | }, | 232 | }, |
234 | }; | 233 | }; |
235 | 234 | ||
236 | static void lpd270_backlight_power(int on) | 235 | static struct platform_pwm_backlight_data lpd270_backlight_data = { |
237 | { | 236 | .pwm_id = 0, |
238 | if (on) { | 237 | .max_brightness = 1, |
239 | pxa_gpio_mode(GPIO16_PWM0_MD); | 238 | .dft_brightness = 1, |
240 | pxa_set_cken(CKEN_PWM0, 1); | 239 | .pwm_period_ns = 78770, |
241 | PWM_CTRL0 = 0; | 240 | }; |
242 | PWM_PWDUTY0 = 0x3ff; | 241 | |
243 | PWM_PERVAL0 = 0x3ff; | 242 | static struct platform_device lpd270_backlight_device = { |
244 | } else { | 243 | .name = "pwm-backlight", |
245 | PWM_CTRL0 = 0; | 244 | .dev = { |
246 | PWM_PWDUTY0 = 0x0; | 245 | .parent = &pxa27x_device_pwm0.dev, |
247 | PWM_PERVAL0 = 0x3FF; | 246 | .platform_data = &lpd270_backlight_data, |
248 | pxa_set_cken(CKEN_PWM0, 0); | 247 | }, |
249 | } | 248 | }; |
250 | } | ||
251 | 249 | ||
252 | /* 5.7" TFT QVGA (LoLo display number 1) */ | 250 | /* 5.7" TFT QVGA (LoLo display number 1) */ |
253 | static struct pxafb_mode_info sharp_lq057q3dc02_mode = { | 251 | static struct pxafb_mode_info sharp_lq057q3dc02_mode = { |
@@ -269,7 +267,6 @@ static struct pxafb_mach_info sharp_lq057q3dc02 = { | |||
269 | .num_modes = 1, | 267 | .num_modes = 1, |
270 | .lccr0 = 0x07800080, | 268 | .lccr0 = 0x07800080, |
271 | .lccr3 = 0x00400000, | 269 | .lccr3 = 0x00400000, |
272 | .pxafb_backlight_power = lpd270_backlight_power, | ||
273 | }; | 270 | }; |
274 | 271 | ||
275 | /* 12.1" TFT SVGA (LoLo display number 2) */ | 272 | /* 12.1" TFT SVGA (LoLo display number 2) */ |
@@ -292,7 +289,6 @@ static struct pxafb_mach_info sharp_lq121s1dg31 = { | |||
292 | .num_modes = 1, | 289 | .num_modes = 1, |
293 | .lccr0 = 0x07800080, | 290 | .lccr0 = 0x07800080, |
294 | .lccr3 = 0x00400000, | 291 | .lccr3 = 0x00400000, |
295 | .pxafb_backlight_power = lpd270_backlight_power, | ||
296 | }; | 292 | }; |
297 | 293 | ||
298 | /* 3.6" TFT QVGA (LoLo display number 3) */ | 294 | /* 3.6" TFT QVGA (LoLo display number 3) */ |
@@ -315,7 +311,6 @@ static struct pxafb_mach_info sharp_lq036q1da01 = { | |||
315 | .num_modes = 1, | 311 | .num_modes = 1, |
316 | .lccr0 = 0x07800080, | 312 | .lccr0 = 0x07800080, |
317 | .lccr3 = 0x00400000, | 313 | .lccr3 = 0x00400000, |
318 | .pxafb_backlight_power = lpd270_backlight_power, | ||
319 | }; | 314 | }; |
320 | 315 | ||
321 | /* 6.4" TFT VGA (LoLo display number 5) */ | 316 | /* 6.4" TFT VGA (LoLo display number 5) */ |
@@ -338,7 +333,6 @@ static struct pxafb_mach_info sharp_lq64d343 = { | |||
338 | .num_modes = 1, | 333 | .num_modes = 1, |
339 | .lccr0 = 0x07800080, | 334 | .lccr0 = 0x07800080, |
340 | .lccr3 = 0x00400000, | 335 | .lccr3 = 0x00400000, |
341 | .pxafb_backlight_power = lpd270_backlight_power, | ||
342 | }; | 336 | }; |
343 | 337 | ||
344 | /* 10.4" TFT VGA (LoLo display number 7) */ | 338 | /* 10.4" TFT VGA (LoLo display number 7) */ |
@@ -361,7 +355,6 @@ static struct pxafb_mach_info sharp_lq10d368 = { | |||
361 | .num_modes = 1, | 355 | .num_modes = 1, |
362 | .lccr0 = 0x07800080, | 356 | .lccr0 = 0x07800080, |
363 | .lccr3 = 0x00400000, | 357 | .lccr3 = 0x00400000, |
364 | .pxafb_backlight_power = lpd270_backlight_power, | ||
365 | }; | 358 | }; |
366 | 359 | ||
367 | /* 3.5" TFT QVGA (LoLo display number 8) */ | 360 | /* 3.5" TFT QVGA (LoLo display number 8) */ |
@@ -384,7 +377,6 @@ static struct pxafb_mach_info sharp_lq035q7db02_20 = { | |||
384 | .num_modes = 1, | 377 | .num_modes = 1, |
385 | .lccr0 = 0x07800080, | 378 | .lccr0 = 0x07800080, |
386 | .lccr3 = 0x00400000, | 379 | .lccr3 = 0x00400000, |
387 | .pxafb_backlight_power = lpd270_backlight_power, | ||
388 | }; | 380 | }; |
389 | 381 | ||
390 | static struct pxafb_mach_info *lpd270_lcd_to_use; | 382 | static struct pxafb_mach_info *lpd270_lcd_to_use; |
@@ -414,7 +406,7 @@ __setup("lcd=", lpd270_set_lcd); | |||
414 | 406 | ||
415 | static struct platform_device *platform_devices[] __initdata = { | 407 | static struct platform_device *platform_devices[] __initdata = { |
416 | &smc91x_device, | 408 | &smc91x_device, |
417 | &lpd270_audio_device, | 409 | &lpd270_backlight_device, |
418 | &lpd270_flash_device[0], | 410 | &lpd270_flash_device[0], |
419 | &lpd270_flash_device[1], | 411 | &lpd270_flash_device[1], |
420 | }; | 412 | }; |
@@ -454,9 +446,12 @@ static void __init lpd270_init(void) | |||
454 | * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45. | 446 | * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45. |
455 | */ | 447 | */ |
456 | pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD); | 448 | pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD); |
449 | pxa_gpio_mode(GPIO16_PWM0_MD); | ||
457 | 450 | ||
458 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 451 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
459 | 452 | ||
453 | pxa_set_ac97_info(NULL); | ||
454 | |||
460 | if (lpd270_lcd_to_use != NULL) | 455 | if (lpd270_lcd_to_use != NULL) |
461 | set_pxa_fb_info(lpd270_lcd_to_use); | 456 | set_pxa_fb_info(lpd270_lcd_to_use); |
462 | 457 | ||
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 7b9bdd0c6665..a3fae4139203 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <asm/arch/pxa-regs.h> | 43 | #include <asm/arch/pxa-regs.h> |
44 | #include <asm/arch/pxa2xx-regs.h> | 44 | #include <asm/arch/pxa2xx-regs.h> |
45 | #include <asm/arch/mfp-pxa25x.h> | 45 | #include <asm/arch/mfp-pxa25x.h> |
46 | #include <asm/arch/audio.h> | ||
46 | #include <asm/arch/lubbock.h> | 47 | #include <asm/arch/lubbock.h> |
47 | #include <asm/arch/udc.h> | 48 | #include <asm/arch/udc.h> |
48 | #include <asm/arch/irda.h> | 49 | #include <asm/arch/irda.h> |
@@ -196,11 +197,6 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = { | |||
196 | // no D+ pullup; lubbock can't connect/disconnect in software | 197 | // no D+ pullup; lubbock can't connect/disconnect in software |
197 | }; | 198 | }; |
198 | 199 | ||
199 | static struct platform_device lub_audio_device = { | ||
200 | .name = "pxa2xx-ac97", | ||
201 | .id = -1, | ||
202 | }; | ||
203 | |||
204 | static struct resource sa1111_resources[] = { | 200 | static struct resource sa1111_resources[] = { |
205 | [0] = { | 201 | [0] = { |
206 | .start = 0x10000000, | 202 | .start = 0x10000000, |
@@ -368,7 +364,6 @@ static struct platform_device lubbock_flash_device[2] = { | |||
368 | 364 | ||
369 | static struct platform_device *devices[] __initdata = { | 365 | static struct platform_device *devices[] __initdata = { |
370 | &sa1111_device, | 366 | &sa1111_device, |
371 | &lub_audio_device, | ||
372 | &smc91x_device, | 367 | &smc91x_device, |
373 | &lubbock_flash_device[0], | 368 | &lubbock_flash_device[0], |
374 | &lubbock_flash_device[1], | 369 | &lubbock_flash_device[1], |
@@ -494,6 +489,7 @@ static void __init lubbock_init(void) | |||
494 | set_pxa_fb_info(&sharp_lm8v31); | 489 | set_pxa_fb_info(&sharp_lm8v31); |
495 | pxa_set_mci_info(&lubbock_mci_platform_data); | 490 | pxa_set_mci_info(&lubbock_mci_platform_data); |
496 | pxa_set_ficp_info(&lubbock_ficp_platform_data); | 491 | pxa_set_ficp_info(&lubbock_ficp_platform_data); |
492 | pxa_set_ac97_info(NULL); | ||
497 | 493 | ||
498 | lubbock_flash_data[0].width = lubbock_flash_data[1].width = | 494 | lubbock_flash_data[0].width = lubbock_flash_data[1].width = |
499 | (BOOT_DEF & 1) ? 2 : 4; | 495 | (BOOT_DEF & 1) ? 2 : 4; |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index badba064dc04..01b2fa790217 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/mtd/map.h> | 25 | #include <linux/mtd/map.h> |
26 | #include <linux/mtd/physmap.h> | 26 | #include <linux/mtd/physmap.h> |
27 | #include <linux/pda_power.h> | 27 | #include <linux/pda_power.h> |
28 | #include <linux/pwm_backlight.h> | ||
28 | 29 | ||
29 | #include <asm/gpio.h> | 30 | #include <asm/gpio.h> |
30 | #include <asm/hardware.h> | 31 | #include <asm/hardware.h> |
@@ -33,12 +34,14 @@ | |||
33 | #include <asm/arch/magician.h> | 34 | #include <asm/arch/magician.h> |
34 | #include <asm/arch/mfp-pxa27x.h> | 35 | #include <asm/arch/mfp-pxa27x.h> |
35 | #include <asm/arch/pxa-regs.h> | 36 | #include <asm/arch/pxa-regs.h> |
37 | #include <asm/arch/pxa2xx-regs.h> | ||
36 | #include <asm/arch/pxafb.h> | 38 | #include <asm/arch/pxafb.h> |
37 | #include <asm/arch/i2c.h> | 39 | #include <asm/arch/i2c.h> |
38 | #include <asm/arch/mmc.h> | 40 | #include <asm/arch/mmc.h> |
39 | #include <asm/arch/irda.h> | 41 | #include <asm/arch/irda.h> |
40 | #include <asm/arch/ohci.h> | 42 | #include <asm/arch/ohci.h> |
41 | 43 | ||
44 | #include "devices.h" | ||
42 | #include "generic.h" | 45 | #include "generic.h" |
43 | 46 | ||
44 | static unsigned long magician_pin_config[] = { | 47 | static unsigned long magician_pin_config[] = { |
@@ -348,40 +351,58 @@ static struct pxafb_mach_info samsung_info = { | |||
348 | * Backlight | 351 | * Backlight |
349 | */ | 352 | */ |
350 | 353 | ||
351 | static void magician_set_bl_intensity(int intensity) | 354 | static int magician_backlight_init(struct device *dev) |
352 | { | 355 | { |
353 | if (intensity) { | 356 | int ret; |
354 | PWM_CTRL0 = 1; | 357 | |
355 | PWM_PERVAL0 = 0xc8; | 358 | ret = gpio_request(EGPIO_MAGICIAN_BL_POWER, "BL_POWER"); |
356 | if (intensity > 0xc7) { | 359 | if (ret) |
357 | PWM_PWDUTY0 = intensity - 0x48; | 360 | goto err; |
358 | gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 1); | 361 | ret = gpio_request(EGPIO_MAGICIAN_BL_POWER2, "BL_POWER2"); |
359 | } else { | 362 | if (ret) |
360 | PWM_PWDUTY0 = intensity; | 363 | goto err2; |
361 | gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 0); | 364 | return 0; |
362 | } | 365 | |
363 | gpio_set_value(EGPIO_MAGICIAN_BL_POWER, 1); | 366 | err2: |
364 | pxa_set_cken(CKEN_PWM0, 1); | 367 | gpio_free(EGPIO_MAGICIAN_BL_POWER); |
368 | err: | ||
369 | return ret; | ||
370 | } | ||
371 | |||
372 | static int magician_backlight_notify(int brightness) | ||
373 | { | ||
374 | gpio_set_value(EGPIO_MAGICIAN_BL_POWER, brightness); | ||
375 | if (brightness >= 200) { | ||
376 | gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 1); | ||
377 | return brightness - 72; | ||
365 | } else { | 378 | } else { |
366 | /* PWM_PWDUTY0 = intensity; */ | 379 | gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 0); |
367 | gpio_set_value(EGPIO_MAGICIAN_BL_POWER, 0); | 380 | return brightness; |
368 | pxa_set_cken(CKEN_PWM0, 0); | ||
369 | } | 381 | } |
370 | } | 382 | } |
371 | 383 | ||
372 | static struct generic_bl_info backlight_info = { | 384 | static void magician_backlight_exit(struct device *dev) |
373 | .default_intensity = 0x64, | 385 | { |
374 | .limit_mask = 0x0b, | 386 | gpio_free(EGPIO_MAGICIAN_BL_POWER); |
375 | .max_intensity = 0xc7+0x48, | 387 | gpio_free(EGPIO_MAGICIAN_BL_POWER2); |
376 | .set_bl_intensity = magician_set_bl_intensity, | 388 | } |
389 | |||
390 | static struct platform_pwm_backlight_data backlight_data = { | ||
391 | .pwm_id = 0, | ||
392 | .max_brightness = 272, | ||
393 | .dft_brightness = 100, | ||
394 | .pwm_period_ns = 30923, | ||
395 | .init = magician_backlight_init, | ||
396 | .notify = magician_backlight_notify, | ||
397 | .exit = magician_backlight_exit, | ||
377 | }; | 398 | }; |
378 | 399 | ||
379 | static struct platform_device backlight = { | 400 | static struct platform_device backlight = { |
380 | .name = "generic-bl", | 401 | .name = "pwm-backlight", |
381 | .dev = { | 402 | .dev = { |
382 | .platform_data = &backlight_info, | 403 | .parent = &pxa27x_device_pwm0.dev, |
404 | .platform_data = &backlight_data, | ||
383 | }, | 405 | }, |
384 | .id = -1, | ||
385 | }; | 406 | }; |
386 | 407 | ||
387 | /* | 408 | /* |
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 7399fb34da4e..f2e9e7c4da8e 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
@@ -23,9 +23,9 @@ | |||
23 | #include <linux/ioport.h> | 23 | #include <linux/ioport.h> |
24 | #include <linux/mtd/mtd.h> | 24 | #include <linux/mtd/mtd.h> |
25 | #include <linux/mtd/partitions.h> | 25 | #include <linux/mtd/partitions.h> |
26 | #include <linux/backlight.h> | ||
27 | #include <linux/input.h> | 26 | #include <linux/input.h> |
28 | #include <linux/gpio_keys.h> | 27 | #include <linux/gpio_keys.h> |
28 | #include <linux/pwm_backlight.h> | ||
29 | 29 | ||
30 | #include <asm/types.h> | 30 | #include <asm/types.h> |
31 | #include <asm/setup.h> | 31 | #include <asm/setup.h> |
@@ -280,12 +280,6 @@ static pxa2xx_audio_ops_t mst_audio_ops = { | |||
280 | .resume = mst_audio_resume, | 280 | .resume = mst_audio_resume, |
281 | }; | 281 | }; |
282 | 282 | ||
283 | static struct platform_device mst_audio_device = { | ||
284 | .name = "pxa2xx-ac97", | ||
285 | .id = -1, | ||
286 | .dev = { .platform_data = &mst_audio_ops }, | ||
287 | }; | ||
288 | |||
289 | static struct resource flash_resources[] = { | 283 | static struct resource flash_resources[] = { |
290 | [0] = { | 284 | [0] = { |
291 | .start = PXA_CS0_PHYS, | 285 | .start = PXA_CS0_PHYS, |
@@ -349,56 +343,27 @@ static struct platform_device mst_flash_device[2] = { | |||
349 | }, | 343 | }, |
350 | }; | 344 | }; |
351 | 345 | ||
352 | #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE | 346 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
353 | static int mainstone_backlight_update_status(struct backlight_device *bl) | 347 | static struct platform_pwm_backlight_data mainstone_backlight_data = { |
354 | { | 348 | .pwm_id = 0, |
355 | int brightness = bl->props.brightness; | 349 | .max_brightness = 1023, |
356 | 350 | .dft_brightness = 1023, | |
357 | if (bl->props.power != FB_BLANK_UNBLANK || | 351 | .pwm_period_ns = 78770, |
358 | bl->props.fb_blank != FB_BLANK_UNBLANK) | 352 | }; |
359 | brightness = 0; | ||
360 | |||
361 | if (brightness != 0) | ||
362 | pxa_set_cken(CKEN_PWM0, 1); | ||
363 | |||
364 | PWM_CTRL0 = 0; | ||
365 | PWM_PWDUTY0 = brightness; | ||
366 | PWM_PERVAL0 = bl->props.max_brightness; | ||
367 | |||
368 | if (brightness == 0) | ||
369 | pxa_set_cken(CKEN_PWM0, 0); | ||
370 | return 0; /* pointless return value */ | ||
371 | } | ||
372 | |||
373 | static int mainstone_backlight_get_brightness(struct backlight_device *bl) | ||
374 | { | ||
375 | return PWM_PWDUTY0; | ||
376 | } | ||
377 | 353 | ||
378 | static /*const*/ struct backlight_ops mainstone_backlight_ops = { | 354 | static struct platform_device mainstone_backlight_device = { |
379 | .update_status = mainstone_backlight_update_status, | 355 | .name = "pwm-backlight", |
380 | .get_brightness = mainstone_backlight_get_brightness, | 356 | .dev = { |
357 | .parent = &pxa27x_device_pwm0.dev, | ||
358 | .platform_data = &mainstone_backlight_data, | ||
359 | }, | ||
381 | }; | 360 | }; |
382 | 361 | ||
383 | static void __init mainstone_backlight_register(void) | 362 | static void __init mainstone_backlight_register(void) |
384 | { | 363 | { |
385 | struct backlight_device *bl; | 364 | int ret = platform_device_register(&mainstone_backlight_device); |
386 | 365 | if (ret) | |
387 | bl = backlight_device_register("mainstone-bl", &pxa_device_fb.dev, | 366 | printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret); |
388 | NULL, &mainstone_backlight_ops); | ||
389 | if (IS_ERR(bl)) { | ||
390 | printk(KERN_ERR "mainstone: unable to register backlight: %ld\n", | ||
391 | PTR_ERR(bl)); | ||
392 | return; | ||
393 | } | ||
394 | |||
395 | /* | ||
396 | * broken design - register-then-setup interfaces are | ||
397 | * utterly broken by definition. | ||
398 | */ | ||
399 | bl->props.max_brightness = 1023; | ||
400 | bl->props.brightness = 1023; | ||
401 | backlight_update_status(bl); | ||
402 | } | 367 | } |
403 | #else | 368 | #else |
404 | #define mainstone_backlight_register() do { } while (0) | 369 | #define mainstone_backlight_register() do { } while (0) |
@@ -528,7 +493,6 @@ static struct platform_device mst_gpio_keys_device = { | |||
528 | 493 | ||
529 | static struct platform_device *platform_devices[] __initdata = { | 494 | static struct platform_device *platform_devices[] __initdata = { |
530 | &smc91x_device, | 495 | &smc91x_device, |
531 | &mst_audio_device, | ||
532 | &mst_flash_device[0], | 496 | &mst_flash_device[0], |
533 | &mst_flash_device[1], | 497 | &mst_flash_device[1], |
534 | &mst_gpio_keys_device, | 498 | &mst_gpio_keys_device, |
@@ -638,6 +602,7 @@ static void __init mainstone_init(void) | |||
638 | pxa_set_ficp_info(&mainstone_ficp_platform_data); | 602 | pxa_set_ficp_info(&mainstone_ficp_platform_data); |
639 | pxa_set_ohci_info(&mainstone_ohci_platform_data); | 603 | pxa_set_ohci_info(&mainstone_ohci_platform_data); |
640 | pxa_set_i2c_info(NULL); | 604 | pxa_set_i2c_info(NULL); |
605 | pxa_set_ac97_info(&mst_audio_ops); | ||
641 | 606 | ||
642 | mainstone_init_keypad(); | 607 | mainstone_init_keypad(); |
643 | } | 608 | } |
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index 22097a1707cc..d1cdb4ecb0b8 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include <asm/arch/hardware.h> | 21 | #include <asm/arch/hardware.h> |
22 | #include <asm/arch/pxa-regs.h> | 22 | #include <asm/arch/pxa-regs.h> |
23 | #include <asm/arch/pxa2xx-regs.h> | ||
23 | #include <asm/arch/mfp-pxa2xx.h> | 24 | #include <asm/arch/mfp-pxa2xx.h> |
24 | 25 | ||
25 | #include "generic.h" | 26 | #include "generic.h" |
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 49d951db0f3d..5d87c7c866e4 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
25 | #include <linux/ide.h> | 25 | #include <linux/ide.h> |
26 | #include <linux/i2c.h> | 26 | #include <linux/i2c.h> |
27 | #include <linux/pwm_backlight.h> | ||
27 | 28 | ||
28 | #include <media/soc_camera.h> | 29 | #include <media/soc_camera.h> |
29 | 30 | ||
@@ -33,12 +34,103 @@ | |||
33 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
34 | #include <asm/arch/pxa-regs.h> | 35 | #include <asm/arch/pxa-regs.h> |
35 | #include <asm/arch/pxa2xx-gpio.h> | 36 | #include <asm/arch/pxa2xx-gpio.h> |
37 | #include <asm/arch/audio.h> | ||
36 | #include <asm/arch/mmc.h> | 38 | #include <asm/arch/mmc.h> |
37 | #include <asm/arch/ohci.h> | 39 | #include <asm/arch/ohci.h> |
38 | #include <asm/arch/pcm990_baseboard.h> | 40 | #include <asm/arch/pcm990_baseboard.h> |
41 | #include <asm/arch/pxafb.h> | ||
42 | |||
43 | #include "devices.h" | ||
39 | 44 | ||
40 | /* | 45 | /* |
41 | * The PCM-990 development baseboard uses PCM-027's hardeware in the | 46 | * pcm990_lcd_power - control power supply to the LCD |
47 | * @on: 0 = switch off, 1 = switch on | ||
48 | * | ||
49 | * Called by the pxafb driver | ||
50 | */ | ||
51 | #ifndef CONFIG_PCM990_DISPLAY_NONE | ||
52 | static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var) | ||
53 | { | ||
54 | if (on) { | ||
55 | /* enable LCD-Latches | ||
56 | * power on LCD | ||
57 | */ | ||
58 | __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = | ||
59 | PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON; | ||
60 | } else { | ||
61 | /* disable LCD-Latches | ||
62 | * power off LCD | ||
63 | */ | ||
64 | __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00; | ||
65 | } | ||
66 | } | ||
67 | #endif | ||
68 | |||
69 | #if defined(CONFIG_PCM990_DISPLAY_SHARP) | ||
70 | static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = { | ||
71 | .pixclock = 28000, | ||
72 | .xres = 640, | ||
73 | .yres = 480, | ||
74 | .bpp = 16, | ||
75 | .hsync_len = 20, | ||
76 | .left_margin = 103, | ||
77 | .right_margin = 47, | ||
78 | .vsync_len = 6, | ||
79 | .upper_margin = 28, | ||
80 | .lower_margin = 5, | ||
81 | .sync = 0, | ||
82 | .cmap_greyscale = 0, | ||
83 | }; | ||
84 | |||
85 | static struct pxafb_mach_info pcm990_fbinfo __initdata = { | ||
86 | .modes = &fb_info_sharp_lq084v1dg21, | ||
87 | .num_modes = 1, | ||
88 | .lccr0 = LCCR0_PAS, | ||
89 | .lccr3 = LCCR3_PCP, | ||
90 | .pxafb_lcd_power = pcm990_lcd_power, | ||
91 | }; | ||
92 | #elif defined(CONFIG_PCM990_DISPLAY_NEC) | ||
93 | struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = { | ||
94 | .pixclock = 39720, | ||
95 | .xres = 640, | ||
96 | .yres = 480, | ||
97 | .bpp = 16, | ||
98 | .hsync_len = 32, | ||
99 | .left_margin = 16, | ||
100 | .right_margin = 48, | ||
101 | .vsync_len = 2, | ||
102 | .upper_margin = 12, | ||
103 | .lower_margin = 17, | ||
104 | .sync = 0, | ||
105 | .cmap_greyscale = 0, | ||
106 | }; | ||
107 | |||
108 | static struct pxafb_mach_info pcm990_fbinfo __initdata = { | ||
109 | .modes = &fb_info_nec_nl6448bc20_18d, | ||
110 | .num_modes = 1, | ||
111 | .lccr0 = LCCR0_Act, | ||
112 | .lccr3 = LCCR3_PixFlEdg, | ||
113 | .pxafb_lcd_power = pcm990_lcd_power, | ||
114 | }; | ||
115 | #endif | ||
116 | |||
117 | static struct platform_pwm_backlight_data pcm990_backlight_data = { | ||
118 | .pwm_id = 0, | ||
119 | .max_brightness = 1023, | ||
120 | .dft_brightness = 1023, | ||
121 | .pwm_period_ns = 78770, | ||
122 | }; | ||
123 | |||
124 | static struct platform_device pcm990_backlight_device = { | ||
125 | .name = "pwm-backlight", | ||
126 | .dev = { | ||
127 | .parent = &pxa27x_device_pwm0.dev, | ||
128 | .platform_data = &pcm990_backlight_data, | ||
129 | }, | ||
130 | }; | ||
131 | |||
132 | /* | ||
133 | * The PCM-990 development baseboard uses PCM-027's hardware in the | ||
42 | * following way: | 134 | * following way: |
43 | * | 135 | * |
44 | * - LCD support is in use | 136 | * - LCD support is in use |
@@ -333,36 +425,6 @@ static struct i2c_board_info __initdata pcm990_i2c_devices[] = { | |||
333 | #endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */ | 425 | #endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */ |
334 | 426 | ||
335 | /* | 427 | /* |
336 | * AC97 support | ||
337 | * Note: The connected AC97 mixer also reports interrupts at PCM990_AC97_IRQ | ||
338 | */ | ||
339 | static struct resource pxa27x_ac97_resources[] = { | ||
340 | [0] = { | ||
341 | .start = 0x40500000, | ||
342 | .end = 0x40500000 + 0xfff, | ||
343 | .flags = IORESOURCE_MEM, | ||
344 | }, | ||
345 | [1] = { | ||
346 | .start = IRQ_AC97, | ||
347 | .end = IRQ_AC97, | ||
348 | .flags = IORESOURCE_IRQ, | ||
349 | }, | ||
350 | }; | ||
351 | |||
352 | static u64 pxa_ac97_dmamask = 0xffffffffUL; | ||
353 | |||
354 | static struct platform_device pxa27x_device_ac97 = { | ||
355 | .name = "pxa2xx-ac97", | ||
356 | .id = -1, | ||
357 | .dev = { | ||
358 | .dma_mask = &pxa_ac97_dmamask, | ||
359 | .coherent_dma_mask = 0xffffffff, | ||
360 | }, | ||
361 | .num_resources = ARRAY_SIZE(pxa27x_ac97_resources), | ||
362 | .resource = pxa27x_ac97_resources, | ||
363 | }; | ||
364 | |||
365 | /* | ||
366 | * enable generic access to the base board control CPLDs U6 and U7 | 428 | * enable generic access to the base board control CPLDs U6 and U7 |
367 | */ | 429 | */ |
368 | static struct map_desc pcm990_io_desc[] __initdata = { | 430 | static struct map_desc pcm990_io_desc[] __initdata = { |
@@ -393,7 +455,11 @@ void __init pcm990_baseboard_init(void) | |||
393 | /* register CPLD's IRQ controller */ | 455 | /* register CPLD's IRQ controller */ |
394 | pcm990_init_irq(); | 456 | pcm990_init_irq(); |
395 | 457 | ||
396 | platform_device_register(&pxa27x_device_ac97); | 458 | #ifndef CONFIG_PCM990_DISPLAY_NONE |
459 | set_pxa_fb_info(&pcm990_fbinfo); | ||
460 | #endif | ||
461 | pxa_gpio_mode(GPIO16_PWM0_MD); | ||
462 | platform_device_register(&pcm990_backlight_device); | ||
397 | 463 | ||
398 | /* MMC */ | 464 | /* MMC */ |
399 | pxa_set_mci_info(&pcm990_mci_platform_data); | 465 | pxa_set_mci_info(&pcm990_mci_platform_data); |
@@ -402,6 +468,7 @@ void __init pcm990_baseboard_init(void) | |||
402 | pxa_set_ohci_info(&pcm990_ohci_platform_data); | 468 | pxa_set_ohci_info(&pcm990_ohci_platform_data); |
403 | 469 | ||
404 | pxa_set_i2c_info(NULL); | 470 | pxa_set_i2c_info(NULL); |
471 | pxa_set_ac97_info(NULL); | ||
405 | 472 | ||
406 | #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) | 473 | #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) |
407 | pxa_set_camera_info(&pcm990_pxacamera_platform_data); | 474 | pxa_set_camera_info(&pcm990_pxacamera_platform_data); |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 0b30f25cff3c..f81c10cafd48 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <asm/mach/irq.h> | 32 | #include <asm/mach/irq.h> |
33 | 33 | ||
34 | #include <asm/arch/pxa-regs.h> | 34 | #include <asm/arch/pxa-regs.h> |
35 | #include <asm/arch/pxa2xx-regs.h> | ||
35 | #include <asm/arch/pxa2xx-gpio.h> | 36 | #include <asm/arch/pxa2xx-gpio.h> |
36 | #include <asm/arch/mmc.h> | 37 | #include <asm/arch/mmc.h> |
37 | #include <asm/arch/udc.h> | 38 | #include <asm/arch/udc.h> |
diff --git a/arch/arm/mach-pxa/pwm.c b/arch/arm/mach-pxa/pwm.c new file mode 100644 index 000000000000..ce28cd9fed16 --- /dev/null +++ b/arch/arm/mach-pxa/pwm.c | |||
@@ -0,0 +1,319 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/pwm.c | ||
3 | * | ||
4 | * simple driver for PWM (Pulse Width Modulator) controller | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * 2008-02-13 initial version | ||
11 | * eric miao <eric.miao@marvell.com> | ||
12 | */ | ||
13 | |||
14 | #include <linux/module.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/err.h> | ||
18 | #include <linux/clk.h> | ||
19 | #include <linux/io.h> | ||
20 | #include <linux/pwm.h> | ||
21 | |||
22 | #include <asm/div64.h> | ||
23 | #include <asm/arch/pxa-regs.h> | ||
24 | |||
25 | /* PWM registers and bits definitions */ | ||
26 | #define PWMCR (0x00) | ||
27 | #define PWMDCR (0x04) | ||
28 | #define PWMPCR (0x08) | ||
29 | |||
30 | #define PWMCR_SD (1 << 6) | ||
31 | #define PWMDCR_FD (1 << 10) | ||
32 | |||
33 | struct pwm_device { | ||
34 | struct list_head node; | ||
35 | struct platform_device *pdev; | ||
36 | |||
37 | const char *label; | ||
38 | struct clk *clk; | ||
39 | int clk_enabled; | ||
40 | void __iomem *mmio_base; | ||
41 | |||
42 | unsigned int use_count; | ||
43 | unsigned int pwm_id; | ||
44 | }; | ||
45 | |||
46 | /* | ||
47 | * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE | ||
48 | * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE | ||
49 | */ | ||
50 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | ||
51 | { | ||
52 | unsigned long long c; | ||
53 | unsigned long period_cycles, prescale, pv, dc; | ||
54 | |||
55 | if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) | ||
56 | return -EINVAL; | ||
57 | |||
58 | c = clk_get_rate(pwm->clk); | ||
59 | c = c * period_ns; | ||
60 | do_div(c, 1000000000); | ||
61 | period_cycles = c; | ||
62 | |||
63 | if (period_cycles < 0) | ||
64 | period_cycles = 1; | ||
65 | prescale = (period_cycles - 1) / 1024; | ||
66 | pv = period_cycles / (prescale + 1) - 1; | ||
67 | |||
68 | if (prescale > 63) | ||
69 | return -EINVAL; | ||
70 | |||
71 | if (duty_ns == period_ns) | ||
72 | dc = PWMDCR_FD; | ||
73 | else | ||
74 | dc = (pv + 1) * duty_ns / period_ns; | ||
75 | |||
76 | /* NOTE: the clock to PWM has to be enabled first | ||
77 | * before writing to the registers | ||
78 | */ | ||
79 | clk_enable(pwm->clk); | ||
80 | __raw_writel(prescale, pwm->mmio_base + PWMCR); | ||
81 | __raw_writel(dc, pwm->mmio_base + PWMDCR); | ||
82 | __raw_writel(pv, pwm->mmio_base + PWMPCR); | ||
83 | clk_disable(pwm->clk); | ||
84 | |||
85 | return 0; | ||
86 | } | ||
87 | EXPORT_SYMBOL(pwm_config); | ||
88 | |||
89 | int pwm_enable(struct pwm_device *pwm) | ||
90 | { | ||
91 | int rc = 0; | ||
92 | |||
93 | if (!pwm->clk_enabled) { | ||
94 | rc = clk_enable(pwm->clk); | ||
95 | if (!rc) | ||
96 | pwm->clk_enabled = 1; | ||
97 | } | ||
98 | return rc; | ||
99 | } | ||
100 | EXPORT_SYMBOL(pwm_enable); | ||
101 | |||
102 | void pwm_disable(struct pwm_device *pwm) | ||
103 | { | ||
104 | if (pwm->clk_enabled) { | ||
105 | clk_disable(pwm->clk); | ||
106 | pwm->clk_enabled = 0; | ||
107 | } | ||
108 | } | ||
109 | EXPORT_SYMBOL(pwm_disable); | ||
110 | |||
111 | static DEFINE_MUTEX(pwm_lock); | ||
112 | static LIST_HEAD(pwm_list); | ||
113 | |||
114 | struct pwm_device *pwm_request(int pwm_id, const char *label) | ||
115 | { | ||
116 | struct pwm_device *pwm; | ||
117 | int found = 0; | ||
118 | |||
119 | mutex_lock(&pwm_lock); | ||
120 | |||
121 | list_for_each_entry(pwm, &pwm_list, node) { | ||
122 | if (pwm->pwm_id == pwm_id) { | ||
123 | found = 1; | ||
124 | break; | ||
125 | } | ||
126 | } | ||
127 | |||
128 | if (found) { | ||
129 | if (pwm->use_count == 0) { | ||
130 | pwm->use_count++; | ||
131 | pwm->label = label; | ||
132 | } else | ||
133 | pwm = ERR_PTR(-EBUSY); | ||
134 | } else | ||
135 | pwm = ERR_PTR(-ENOENT); | ||
136 | |||
137 | mutex_unlock(&pwm_lock); | ||
138 | return pwm; | ||
139 | } | ||
140 | EXPORT_SYMBOL(pwm_request); | ||
141 | |||
142 | void pwm_free(struct pwm_device *pwm) | ||
143 | { | ||
144 | mutex_lock(&pwm_lock); | ||
145 | |||
146 | if (pwm->use_count) { | ||
147 | pwm->use_count--; | ||
148 | pwm->label = NULL; | ||
149 | } else | ||
150 | pr_warning("PWM device already freed\n"); | ||
151 | |||
152 | mutex_unlock(&pwm_lock); | ||
153 | } | ||
154 | EXPORT_SYMBOL(pwm_free); | ||
155 | |||
156 | static inline void __add_pwm(struct pwm_device *pwm) | ||
157 | { | ||
158 | mutex_lock(&pwm_lock); | ||
159 | list_add_tail(&pwm->node, &pwm_list); | ||
160 | mutex_unlock(&pwm_lock); | ||
161 | } | ||
162 | |||
163 | static struct pwm_device *pwm_probe(struct platform_device *pdev, | ||
164 | unsigned int pwm_id, struct pwm_device *parent_pwm) | ||
165 | { | ||
166 | struct pwm_device *pwm; | ||
167 | struct resource *r; | ||
168 | int ret = 0; | ||
169 | |||
170 | pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL); | ||
171 | if (pwm == NULL) { | ||
172 | dev_err(&pdev->dev, "failed to allocate memory\n"); | ||
173 | return ERR_PTR(-ENOMEM); | ||
174 | } | ||
175 | |||
176 | pwm->clk = clk_get(&pdev->dev, "PWMCLK"); | ||
177 | if (IS_ERR(pwm->clk)) { | ||
178 | ret = PTR_ERR(pwm->clk); | ||
179 | goto err_free; | ||
180 | } | ||
181 | pwm->clk_enabled = 0; | ||
182 | |||
183 | pwm->use_count = 0; | ||
184 | pwm->pwm_id = pwm_id; | ||
185 | pwm->pdev = pdev; | ||
186 | |||
187 | if (parent_pwm != NULL) { | ||
188 | /* registers for the second PWM has offset of 0x10 */ | ||
189 | pwm->mmio_base = parent_pwm->mmio_base + 0x10; | ||
190 | __add_pwm(pwm); | ||
191 | return pwm; | ||
192 | } | ||
193 | |||
194 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
195 | if (r == NULL) { | ||
196 | dev_err(&pdev->dev, "no memory resource defined\n"); | ||
197 | ret = -ENODEV; | ||
198 | goto err_free_clk; | ||
199 | } | ||
200 | |||
201 | r = request_mem_region(r->start, r->end - r->start + 1, pdev->name); | ||
202 | if (r == NULL) { | ||
203 | dev_err(&pdev->dev, "failed to request memory resource\n"); | ||
204 | ret = -EBUSY; | ||
205 | goto err_free_clk; | ||
206 | } | ||
207 | |||
208 | pwm->mmio_base = ioremap(r->start, r->end - r->start + 1); | ||
209 | if (pwm->mmio_base == NULL) { | ||
210 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | ||
211 | ret = -ENODEV; | ||
212 | goto err_free_mem; | ||
213 | } | ||
214 | |||
215 | __add_pwm(pwm); | ||
216 | platform_set_drvdata(pdev, pwm); | ||
217 | return pwm; | ||
218 | |||
219 | err_free_mem: | ||
220 | release_mem_region(r->start, r->end - r->start + 1); | ||
221 | err_free_clk: | ||
222 | clk_put(pwm->clk); | ||
223 | err_free: | ||
224 | kfree(pwm); | ||
225 | return ERR_PTR(ret); | ||
226 | } | ||
227 | |||
228 | static int __devinit pxa25x_pwm_probe(struct platform_device *pdev) | ||
229 | { | ||
230 | struct pwm_device *pwm = pwm_probe(pdev, pdev->id, NULL); | ||
231 | |||
232 | if (IS_ERR(pwm)) | ||
233 | return PTR_ERR(pwm); | ||
234 | |||
235 | return 0; | ||
236 | } | ||
237 | |||
238 | static int __devinit pxa27x_pwm_probe(struct platform_device *pdev) | ||
239 | { | ||
240 | struct pwm_device *pwm; | ||
241 | |||
242 | pwm = pwm_probe(pdev, pdev->id, NULL); | ||
243 | if (IS_ERR(pwm)) | ||
244 | return PTR_ERR(pwm); | ||
245 | |||
246 | pwm = pwm_probe(pdev, pdev->id + 2, pwm); | ||
247 | if (IS_ERR(pwm)) | ||
248 | return PTR_ERR(pwm); | ||
249 | |||
250 | return 0; | ||
251 | } | ||
252 | |||
253 | static int __devexit pwm_remove(struct platform_device *pdev) | ||
254 | { | ||
255 | struct pwm_device *pwm; | ||
256 | struct resource *r; | ||
257 | |||
258 | pwm = platform_get_drvdata(pdev); | ||
259 | if (pwm == NULL) | ||
260 | return -ENODEV; | ||
261 | |||
262 | mutex_lock(&pwm_lock); | ||
263 | list_del(&pwm->node); | ||
264 | mutex_unlock(&pwm_lock); | ||
265 | |||
266 | iounmap(pwm->mmio_base); | ||
267 | |||
268 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
269 | release_mem_region(r->start, r->end - r->start + 1); | ||
270 | |||
271 | clk_put(pwm->clk); | ||
272 | kfree(pwm); | ||
273 | return 0; | ||
274 | } | ||
275 | |||
276 | static struct platform_driver pxa25x_pwm_driver = { | ||
277 | .driver = { | ||
278 | .name = "pxa25x-pwm", | ||
279 | }, | ||
280 | .probe = pxa25x_pwm_probe, | ||
281 | .remove = __devexit_p(pwm_remove), | ||
282 | }; | ||
283 | |||
284 | static struct platform_driver pxa27x_pwm_driver = { | ||
285 | .driver = { | ||
286 | .name = "pxa27x-pwm", | ||
287 | }, | ||
288 | .probe = pxa27x_pwm_probe, | ||
289 | .remove = __devexit_p(pwm_remove), | ||
290 | }; | ||
291 | |||
292 | static int __init pwm_init(void) | ||
293 | { | ||
294 | int ret = 0; | ||
295 | |||
296 | ret = platform_driver_register(&pxa25x_pwm_driver); | ||
297 | if (ret) { | ||
298 | printk(KERN_ERR "failed to register pxa25x_pwm_driver\n"); | ||
299 | return ret; | ||
300 | } | ||
301 | |||
302 | ret = platform_driver_register(&pxa27x_pwm_driver); | ||
303 | if (ret) { | ||
304 | printk(KERN_ERR "failed to register pxa27x_pwm_driver\n"); | ||
305 | return ret; | ||
306 | } | ||
307 | |||
308 | return ret; | ||
309 | } | ||
310 | arch_initcall(pwm_init); | ||
311 | |||
312 | static void __exit pwm_exit(void) | ||
313 | { | ||
314 | platform_driver_unregister(&pxa25x_pwm_driver); | ||
315 | platform_driver_unregister(&pxa27x_pwm_driver); | ||
316 | } | ||
317 | module_exit(pwm_exit); | ||
318 | |||
319 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index e5b417d14bb0..4cd50e3005e9 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <asm/hardware.h> | 26 | #include <asm/hardware.h> |
27 | #include <asm/arch/irqs.h> | 27 | #include <asm/arch/irqs.h> |
28 | #include <asm/arch/pxa-regs.h> | 28 | #include <asm/arch/pxa-regs.h> |
29 | #include <asm/arch/pxa2xx-regs.h> | ||
29 | #include <asm/arch/mfp-pxa25x.h> | 30 | #include <asm/arch/mfp-pxa25x.h> |
30 | #include <asm/arch/pm.h> | 31 | #include <asm/arch/pm.h> |
31 | #include <asm/arch/dma.h> | 32 | #include <asm/arch/dma.h> |
@@ -117,29 +118,35 @@ static struct clk pxa25x_hwuart_clk = | |||
117 | INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev) | 118 | INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev) |
118 | ; | 119 | ; |
119 | 120 | ||
121 | /* | ||
122 | * PXA 2xx clock declarations. Order is important (see aliases below) | ||
123 | * Please be careful not to disrupt the ordering. | ||
124 | */ | ||
120 | static struct clk pxa25x_clks[] = { | 125 | static struct clk pxa25x_clks[] = { |
121 | INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev), | 126 | INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev), |
122 | INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev), | 127 | INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev), |
123 | INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), | 128 | INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), |
124 | INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL), | 129 | INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL), |
125 | INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev), | 130 | INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev), |
126 | INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev), | 131 | INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev), |
127 | INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev), | 132 | INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev), |
128 | 133 | ||
129 | INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev), | 134 | INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev), |
130 | INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev), | 135 | INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev), |
131 | INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev), | 136 | INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev), |
137 | INIT_CKEN("PWMCLK", PWM0, 3686400, 0, &pxa25x_device_pwm0.dev), | ||
138 | INIT_CKEN("PWMCLK", PWM1, 3686400, 0, &pxa25x_device_pwm1.dev), | ||
132 | 139 | ||
133 | INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL), | 140 | INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL), |
134 | 141 | ||
135 | /* | 142 | /* |
136 | INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), | ||
137 | INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), | ||
138 | INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL), | 143 | INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL), |
139 | */ | 144 | */ |
140 | INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL), | 145 | INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL), |
141 | }; | 146 | }; |
142 | 147 | ||
148 | static struct clk gpio7_clk = INIT_CKOTHER("GPIO7_CK", &pxa25x_clks[4], NULL); | ||
149 | |||
143 | #ifdef CONFIG_PM | 150 | #ifdef CONFIG_PM |
144 | 151 | ||
145 | #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x | 152 | #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x |
@@ -260,7 +267,7 @@ void __init pxa25x_init_irq(void) | |||
260 | } | 267 | } |
261 | 268 | ||
262 | static struct platform_device *pxa25x_devices[] __initdata = { | 269 | static struct platform_device *pxa25x_devices[] __initdata = { |
263 | &pxa_device_udc, | 270 | &pxa25x_device_udc, |
264 | &pxa_device_ffuart, | 271 | &pxa_device_ffuart, |
265 | &pxa_device_btuart, | 272 | &pxa_device_btuart, |
266 | &pxa_device_stuart, | 273 | &pxa_device_stuart, |
@@ -269,6 +276,8 @@ static struct platform_device *pxa25x_devices[] __initdata = { | |||
269 | &pxa25x_device_ssp, | 276 | &pxa25x_device_ssp, |
270 | &pxa25x_device_nssp, | 277 | &pxa25x_device_nssp, |
271 | &pxa25x_device_assp, | 278 | &pxa25x_device_assp, |
279 | &pxa25x_device_pwm0, | ||
280 | &pxa25x_device_pwm1, | ||
272 | }; | 281 | }; |
273 | 282 | ||
274 | static struct sys_device pxa25x_sysdev[] = { | 283 | static struct sys_device pxa25x_sysdev[] = { |
@@ -311,6 +320,8 @@ static int __init pxa25x_init(void) | |||
311 | if (cpu_is_pxa25x()) | 320 | if (cpu_is_pxa25x()) |
312 | ret = platform_device_register(&pxa_device_hwuart); | 321 | ret = platform_device_register(&pxa_device_hwuart); |
313 | 322 | ||
323 | clks_register(&gpio7_clk, 1); | ||
324 | |||
314 | return ret; | 325 | return ret; |
315 | } | 326 | } |
316 | 327 | ||
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 7e945836e129..d5d14ea33f27 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
@@ -146,7 +146,7 @@ static struct clk pxa27x_clks[] = { | |||
146 | 146 | ||
147 | INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev), | 147 | INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev), |
148 | INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), | 148 | INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), |
149 | INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa_device_udc.dev), | 149 | INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa27x_device_udc.dev), |
150 | INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev), | 150 | INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev), |
151 | INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev), | 151 | INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev), |
152 | 152 | ||
@@ -157,12 +157,13 @@ static struct clk pxa27x_clks[] = { | |||
157 | INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), | 157 | INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), |
158 | INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), | 158 | INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), |
159 | INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), | 159 | INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), |
160 | INIT_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev), | ||
161 | INIT_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev), | ||
160 | 162 | ||
161 | INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL), | 163 | INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL), |
162 | INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL), | 164 | INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL), |
163 | 165 | ||
164 | /* | 166 | /* |
165 | INIT_CKEN("PWMCLK", PWM0, 13000000, 0, NULL), | ||
166 | INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL), | 167 | INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL), |
167 | INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL), | 168 | INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL), |
168 | INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL), | 169 | INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL), |
@@ -349,11 +350,14 @@ struct platform_device pxa27x_device_i2c_power = { | |||
349 | 350 | ||
350 | void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info) | 351 | void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info) |
351 | { | 352 | { |
353 | local_irq_disable(); | ||
354 | PCFR |= PCFR_PI2CEN; | ||
355 | local_irq_enable(); | ||
352 | pxa27x_device_i2c_power.dev.platform_data = info; | 356 | pxa27x_device_i2c_power.dev.platform_data = info; |
353 | } | 357 | } |
354 | 358 | ||
355 | static struct platform_device *devices[] __initdata = { | 359 | static struct platform_device *devices[] __initdata = { |
356 | &pxa_device_udc, | 360 | &pxa27x_device_udc, |
357 | &pxa_device_ffuart, | 361 | &pxa_device_ffuart, |
358 | &pxa_device_btuart, | 362 | &pxa_device_btuart, |
359 | &pxa_device_stuart, | 363 | &pxa_device_stuart, |
@@ -363,6 +367,8 @@ static struct platform_device *devices[] __initdata = { | |||
363 | &pxa27x_device_ssp1, | 367 | &pxa27x_device_ssp1, |
364 | &pxa27x_device_ssp2, | 368 | &pxa27x_device_ssp2, |
365 | &pxa27x_device_ssp3, | 369 | &pxa27x_device_ssp3, |
370 | &pxa27x_device_pwm0, | ||
371 | &pxa27x_device_pwm1, | ||
366 | }; | 372 | }; |
367 | 373 | ||
368 | static struct sys_device pxa27x_sysdev[] = { | 374 | static struct sys_device pxa27x_sysdev[] = { |
diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c new file mode 100644 index 000000000000..d4f6415e8413 --- /dev/null +++ b/arch/arm/mach-pxa/pxa2xx.c | |||
@@ -0,0 +1,46 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/pxa2xx.c | ||
3 | * | ||
4 | * code specific to pxa2xx | ||
5 | * | ||
6 | * Copyright (C) 2008 Dmitry Baryshkov | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/device.h> | ||
16 | |||
17 | #include <asm/arch/mfp-pxa2xx.h> | ||
18 | #include <asm/arch/mfp-pxa25x.h> | ||
19 | #include <asm/arch/irda.h> | ||
20 | |||
21 | static unsigned long pxa2xx_mfp_fir[] = { | ||
22 | GPIO46_FICP_RXD, | ||
23 | GPIO47_FICP_TXD, | ||
24 | }; | ||
25 | |||
26 | static unsigned long pxa2xx_mfp_sir[] = { | ||
27 | GPIO46_STUART_RXD, | ||
28 | GPIO47_STUART_TXD, | ||
29 | }; | ||
30 | |||
31 | static unsigned long pxa2xx_mfp_off[] = { | ||
32 | GPIO46_GPIO | MFP_LPM_DRIVE_LOW, | ||
33 | GPIO47_GPIO | MFP_LPM_DRIVE_LOW, | ||
34 | }; | ||
35 | |||
36 | void pxa2xx_transceiver_mode(struct device *dev, int mode) | ||
37 | { | ||
38 | if (mode & IR_OFF) { | ||
39 | pxa2xx_mfp_config(pxa2xx_mfp_off, ARRAY_SIZE(pxa2xx_mfp_off)); | ||
40 | } else if (mode & IR_SIRMODE) { | ||
41 | pxa2xx_mfp_config(pxa2xx_mfp_sir, ARRAY_SIZE(pxa2xx_mfp_sir)); | ||
42 | } else if (mode & IR_FIRMODE) { | ||
43 | pxa2xx_mfp_config(pxa2xx_mfp_fir, ARRAY_SIZE(pxa2xx_mfp_fir)); | ||
44 | } else | ||
45 | BUG(); | ||
46 | } | ||
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 644550bfa330..15685d2b8f8c 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
@@ -231,7 +231,7 @@ static struct clk pxa3xx_clks[] = { | |||
231 | PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL), | 231 | PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL), |
232 | 232 | ||
233 | PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), | 233 | PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), |
234 | PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev), | 234 | PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa27x_device_udc.dev), |
235 | PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev), | 235 | PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev), |
236 | PXA3xx_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev), | 236 | PXA3xx_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev), |
237 | 237 | ||
@@ -239,6 +239,8 @@ static struct clk pxa3xx_clks[] = { | |||
239 | PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), | 239 | PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), |
240 | PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), | 240 | PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), |
241 | PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev), | 241 | PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev), |
242 | PXA3xx_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev), | ||
243 | PXA3xx_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev), | ||
242 | 244 | ||
243 | PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev), | 245 | PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev), |
244 | PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev), | 246 | PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev), |
@@ -520,7 +522,7 @@ void __init pxa3xx_init_irq(void) | |||
520 | */ | 522 | */ |
521 | 523 | ||
522 | static struct platform_device *devices[] __initdata = { | 524 | static struct platform_device *devices[] __initdata = { |
523 | &pxa_device_udc, | 525 | /* &pxa_device_udc, The UDC driver is PXA25x only */ |
524 | &pxa_device_ffuart, | 526 | &pxa_device_ffuart, |
525 | &pxa_device_btuart, | 527 | &pxa_device_btuart, |
526 | &pxa_device_stuart, | 528 | &pxa_device_stuart, |
@@ -530,6 +532,8 @@ static struct platform_device *devices[] __initdata = { | |||
530 | &pxa27x_device_ssp2, | 532 | &pxa27x_device_ssp2, |
531 | &pxa27x_device_ssp3, | 533 | &pxa27x_device_ssp3, |
532 | &pxa3xx_device_ssp4, | 534 | &pxa3xx_device_ssp4, |
535 | &pxa27x_device_pwm0, | ||
536 | &pxa27x_device_pwm1, | ||
533 | }; | 537 | }; |
534 | 538 | ||
535 | static struct sys_device pxa3xx_sysdev[] = { | 539 | static struct sys_device pxa3xx_sysdev[] = { |
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 23f050feb208..360354084ae4 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <asm/arch/sharpsl.h> | 26 | #include <asm/arch/sharpsl.h> |
27 | #include <asm/arch/spitz.h> | 27 | #include <asm/arch/spitz.h> |
28 | #include <asm/arch/pxa-regs.h> | 28 | #include <asm/arch/pxa-regs.h> |
29 | #include <asm/arch/pxa2xx-regs.h> | ||
29 | #include <asm/arch/pxa2xx-gpio.h> | 30 | #include <asm/arch/pxa2xx-gpio.h> |
30 | #include "sharpsl.h" | 31 | #include "sharpsl.h" |
31 | 32 | ||
@@ -207,7 +208,9 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { | |||
207 | .read_devdata = spitzpm_read_devdata, | 208 | .read_devdata = spitzpm_read_devdata, |
208 | .charger_wakeup = spitz_charger_wakeup, | 209 | .charger_wakeup = spitz_charger_wakeup, |
209 | .should_wakeup = spitz_should_wakeup, | 210 | .should_wakeup = spitz_should_wakeup, |
211 | #ifdef CONFIG_BACKLIGHT_CORGI | ||
210 | .backlight_limit = corgibl_limit_intensity, | 212 | .backlight_limit = corgibl_limit_intensity, |
213 | #endif | ||
211 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, | 214 | .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, |
212 | .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, | 215 | .charge_on_temp = SHARPSL_CHARGE_ON_TEMP, |
213 | .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH, | 216 | .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH, |
@@ -229,6 +232,10 @@ static int __devinit spitzpm_init(void) | |||
229 | { | 232 | { |
230 | int ret; | 233 | int ret; |
231 | 234 | ||
235 | if (!machine_is_spitz() && !machine_is_akita() | ||
236 | && !machine_is_borzoi()) | ||
237 | return -ENODEV; | ||
238 | |||
232 | spitzpm_device = platform_device_alloc("sharpsl-pm", -1); | 239 | spitzpm_device = platform_device_alloc("sharpsl-pm", -1); |
233 | if (!spitzpm_device) | 240 | if (!spitzpm_device) |
234 | return -ENOMEM; | 241 | return -ENOMEM; |
diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S index 167412e6bec8..40bb70eff3fe 100644 --- a/arch/arm/mach-pxa/standby.S +++ b/arch/arm/mach-pxa/standby.S | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <asm/hardware.h> | 14 | #include <asm/hardware.h> |
15 | 15 | ||
16 | #include <asm/arch/pxa-regs.h> | 16 | #include <asm/arch/pxa-regs.h> |
17 | #include <asm/arch/pxa2xx-regs.h> | ||
17 | 18 | ||
18 | .text | 19 | .text |
19 | 20 | ||
@@ -35,20 +36,20 @@ ENTRY(pxa_cpu_standby) | |||
35 | 36 | ||
36 | #ifdef CONFIG_PXA3xx | 37 | #ifdef CONFIG_PXA3xx |
37 | 38 | ||
38 | #define MDCNFG 0x0000 | 39 | #define PXA3_MDCNFG 0x0000 |
39 | #define MDCNFG_DMCEN (1 << 30) | 40 | #define PXA3_MDCNFG_DMCEN (1 << 30) |
40 | #define DDR_HCAL 0x0060 | 41 | #define PXA3_DDR_HCAL 0x0060 |
41 | #define DDR_HCAL_HCRNG 0x1f | 42 | #define PXA3_DDR_HCAL_HCRNG 0x1f |
42 | #define DDR_HCAL_HCPROG (1 << 28) | 43 | #define PXA3_DDR_HCAL_HCPROG (1 << 28) |
43 | #define DDR_HCAL_HCEN (1 << 31) | 44 | #define PXA3_DDR_HCAL_HCEN (1 << 31) |
44 | #define DMCIER 0x0070 | 45 | #define PXA3_DMCIER 0x0070 |
45 | #define DMCIER_EDLP (1 << 29) | 46 | #define PXA3_DMCIER_EDLP (1 << 29) |
46 | #define DMCISR 0x0078 | 47 | #define PXA3_DMCISR 0x0078 |
47 | #define RCOMP 0x0100 | 48 | #define PXA3_RCOMP 0x0100 |
48 | #define RCOMP_SWEVAL (1 << 31) | 49 | #define PXA3_RCOMP_SWEVAL (1 << 31) |
49 | 50 | ||
50 | ENTRY(pm_enter_standby_start) | 51 | ENTRY(pm_enter_standby_start) |
51 | mov r1, #0xf6000000 @ DMEMC_REG_BASE (MDCNFG) | 52 | mov r1, #0xf6000000 @ DMEMC_REG_BASE (PXA3_MDCNFG) |
52 | add r1, r1, #0x00100000 | 53 | add r1, r1, #0x00100000 |
53 | 54 | ||
54 | /* | 55 | /* |
@@ -59,54 +60,54 @@ ENTRY(pm_enter_standby_start) | |||
59 | * This also means that only the dynamic memory controller | 60 | * This also means that only the dynamic memory controller |
60 | * can be reliably accessed in the code following standby. | 61 | * can be reliably accessed in the code following standby. |
61 | */ | 62 | */ |
62 | ldr r2, [r1] @ Dummy read MDCNFG | 63 | ldr r2, [r1] @ Dummy read PXA3_MDCNFG |
63 | 64 | ||
64 | mcr p14, 0, r0, c7, c0, 0 | 65 | mcr p14, 0, r0, c7, c0, 0 |
65 | .rept 8 | 66 | .rept 8 |
66 | nop | 67 | nop |
67 | .endr | 68 | .endr |
68 | 69 | ||
69 | ldr r0, [r1, #DDR_HCAL] @ Clear (and wait for) HCEN | 70 | ldr r0, [r1, #PXA3_DDR_HCAL] @ Clear (and wait for) HCEN |
70 | bic r0, r0, #DDR_HCAL_HCEN | 71 | bic r0, r0, #PXA3_DDR_HCAL_HCEN |
71 | str r0, [r1, #DDR_HCAL] | 72 | str r0, [r1, #PXA3_DDR_HCAL] |
72 | 1: ldr r0, [r1, #DDR_HCAL] | 73 | 1: ldr r0, [r1, #PXA3_DDR_HCAL] |
73 | tst r0, #DDR_HCAL_HCEN | 74 | tst r0, #PXA3_DDR_HCAL_HCEN |
74 | bne 1b | 75 | bne 1b |
75 | 76 | ||
76 | ldr r0, [r1, #RCOMP] @ Initiate RCOMP | 77 | ldr r0, [r1, #PXA3_RCOMP] @ Initiate RCOMP |
77 | orr r0, r0, #RCOMP_SWEVAL | 78 | orr r0, r0, #PXA3_RCOMP_SWEVAL |
78 | str r0, [r1, #RCOMP] | 79 | str r0, [r1, #PXA3_RCOMP] |
79 | 80 | ||
80 | mov r0, #~0 @ Clear interrupts | 81 | mov r0, #~0 @ Clear interrupts |
81 | str r0, [r1, #DMCISR] | 82 | str r0, [r1, #PXA3_DMCISR] |
82 | 83 | ||
83 | ldr r0, [r1, #DMCIER] @ set DMIER[EDLP] | 84 | ldr r0, [r1, #PXA3_DMCIER] @ set DMIER[EDLP] |
84 | orr r0, r0, #DMCIER_EDLP | 85 | orr r0, r0, #PXA3_DMCIER_EDLP |
85 | str r0, [r1, #DMCIER] | 86 | str r0, [r1, #PXA3_DMCIER] |
86 | 87 | ||
87 | ldr r0, [r1, #DDR_HCAL] @ clear HCRNG, set HCPROG, HCEN | 88 | ldr r0, [r1, #PXA3_DDR_HCAL] @ clear HCRNG, set HCPROG, HCEN |
88 | bic r0, r0, #DDR_HCAL_HCRNG | 89 | bic r0, r0, #PXA3_DDR_HCAL_HCRNG |
89 | orr r0, r0, #DDR_HCAL_HCEN | DDR_HCAL_HCPROG | 90 | orr r0, r0, #PXA3_DDR_HCAL_HCEN | PXA3_DDR_HCAL_HCPROG |
90 | str r0, [r1, #DDR_HCAL] | 91 | str r0, [r1, #PXA3_DDR_HCAL] |
91 | 92 | ||
92 | 1: ldr r0, [r1, #DMCISR] | 93 | 1: ldr r0, [r1, #PXA3_DMCISR] |
93 | tst r0, #DMCIER_EDLP | 94 | tst r0, #PXA3_DMCIER_EDLP |
94 | beq 1b | 95 | beq 1b |
95 | 96 | ||
96 | ldr r0, [r1, #MDCNFG] @ set MDCNFG[DMCEN] | 97 | ldr r0, [r1, #PXA3_MDCNFG] @ set PXA3_MDCNFG[DMCEN] |
97 | orr r0, r0, #MDCNFG_DMCEN | 98 | orr r0, r0, #PXA3_MDCNFG_DMCEN |
98 | str r0, [r1, #MDCNFG] | 99 | str r0, [r1, #PXA3_MDCNFG] |
99 | 1: ldr r0, [r1, #MDCNFG] | 100 | 1: ldr r0, [r1, #PXA3_MDCNFG] |
100 | tst r0, #MDCNFG_DMCEN | 101 | tst r0, #PXA3_MDCNFG_DMCEN |
101 | beq 1b | 102 | beq 1b |
102 | 103 | ||
103 | ldr r0, [r1, #DDR_HCAL] @ set DDR_HCAL[HCRNG] | 104 | ldr r0, [r1, #PXA3_DDR_HCAL] @ set PXA3_DDR_HCAL[HCRNG] |
104 | orr r0, r0, #2 @ HCRNG | 105 | orr r0, r0, #2 @ HCRNG |
105 | str r0, [r1, #DDR_HCAL] | 106 | str r0, [r1, #PXA3_DDR_HCAL] |
106 | 107 | ||
107 | ldr r0, [r1, #DMCIER] @ Clear the interrupt | 108 | ldr r0, [r1, #PXA3_DMCIER] @ Clear the interrupt |
108 | bic r0, r0, #0x20000000 | 109 | bic r0, r0, #0x20000000 |
109 | str r0, [r1, #DMCIER] | 110 | str r0, [r1, #PXA3_DMCIER] |
110 | 111 | ||
111 | mov pc, lr | 112 | mov pc, lr |
112 | ENTRY(pm_enter_standby_end) | 113 | ENTRY(pm_enter_standby_end) |
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 931885d86b91..61e244023089 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <asm/mach/flash.h> | 41 | #include <asm/mach/flash.h> |
42 | 42 | ||
43 | #include <asm/arch/pxa-regs.h> | 43 | #include <asm/arch/pxa-regs.h> |
44 | #include <asm/arch/pxa2xx-regs.h> | ||
44 | #include <asm/arch/pxa2xx-gpio.h> | 45 | #include <asm/arch/pxa2xx-gpio.h> |
45 | #include <asm/arch/trizeps4.h> | 46 | #include <asm/arch/trizeps4.h> |
46 | #include <asm/arch/audio.h> | 47 | #include <asm/arch/audio.h> |
@@ -175,19 +176,10 @@ static struct platform_device uart_devices = { | |||
175 | .resource = NULL, | 176 | .resource = NULL, |
176 | }; | 177 | }; |
177 | 178 | ||
178 | /******************************************************************************************** | ||
179 | * PXA270 ac97 sound codec | ||
180 | ********************************************************************************************/ | ||
181 | static struct platform_device ac97_audio_device = { | ||
182 | .name = "pxa2xx-ac97", | ||
183 | .id = -1, | ||
184 | }; | ||
185 | |||
186 | static struct platform_device * trizeps4_devices[] __initdata = { | 179 | static struct platform_device * trizeps4_devices[] __initdata = { |
187 | &flash_device, | 180 | &flash_device, |
188 | &uart_devices, | 181 | &uart_devices, |
189 | &dm9000_device, | 182 | &dm9000_device, |
190 | &ac97_audio_device, | ||
191 | }; | 183 | }; |
192 | 184 | ||
193 | #ifdef CONFIG_MACH_TRIZEPS4_CONXS | 185 | #ifdef CONFIG_MACH_TRIZEPS4_CONXS |
@@ -438,6 +430,7 @@ static void __init trizeps4_init(void) | |||
438 | pxa_set_mci_info(&trizeps4_mci_platform_data); | 430 | pxa_set_mci_info(&trizeps4_mci_platform_data); |
439 | pxa_set_ficp_info(&trizeps4_ficp_platform_data); | 431 | pxa_set_ficp_info(&trizeps4_ficp_platform_data); |
440 | pxa_set_ohci_info(&trizeps4_ohci_platform_data); | 432 | pxa_set_ohci_info(&trizeps4_ohci_platform_data); |
433 | pxa_set_ac97_info(NULL); | ||
441 | } | 434 | } |
442 | 435 | ||
443 | static void __init trizeps4_map_io(void) | 436 | static void __init trizeps4_map_io(void) |
@@ -487,6 +480,7 @@ static void __init trizeps4_map_io(void) | |||
487 | ConXS_BCR = trizeps_conxs_bcr; | 480 | ConXS_BCR = trizeps_conxs_bcr; |
488 | #endif | 481 | #endif |
489 | 482 | ||
483 | #warning FIXME - accessing PM registers directly is deprecated | ||
490 | PWER = 0x00000002; | 484 | PWER = 0x00000002; |
491 | PFER = 0x00000000; | 485 | PFER = 0x00000000; |
492 | PRER = 0x00000002; | 486 | PRER = 0x00000002; |
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 4a0028087ea6..66b446ca273d 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c | |||
@@ -18,22 +18,24 @@ | |||
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/pwm_backlight.h> | ||
21 | 22 | ||
22 | #include <asm/mach-types.h> | 23 | #include <asm/mach-types.h> |
23 | #include <asm/mach/arch.h> | 24 | #include <asm/mach/arch.h> |
24 | #include <asm/hardware.h> | 25 | #include <asm/hardware.h> |
26 | #include <asm/arch/audio.h> | ||
25 | #include <asm/arch/gpio.h> | 27 | #include <asm/arch/gpio.h> |
26 | #include <asm/arch/pxafb.h> | 28 | #include <asm/arch/pxafb.h> |
27 | #include <asm/arch/zylonite.h> | 29 | #include <asm/arch/zylonite.h> |
28 | #include <asm/arch/mmc.h> | 30 | #include <asm/arch/mmc.h> |
29 | #include <asm/arch/pxa27x_keypad.h> | 31 | #include <asm/arch/pxa27x_keypad.h> |
30 | 32 | ||
33 | #include "devices.h" | ||
31 | #include "generic.h" | 34 | #include "generic.h" |
32 | 35 | ||
33 | #define MAX_SLOTS 3 | 36 | #define MAX_SLOTS 3 |
34 | struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS]; | 37 | struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS]; |
35 | 38 | ||
36 | int gpio_backlight; | ||
37 | int gpio_eth_irq; | 39 | int gpio_eth_irq; |
38 | 40 | ||
39 | int wm9713_irq; | 41 | int wm9713_irq; |
@@ -62,10 +64,20 @@ static struct platform_device smc91x_device = { | |||
62 | }; | 64 | }; |
63 | 65 | ||
64 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | 66 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
65 | static void zylonite_backlight_power(int on) | 67 | static struct platform_pwm_backlight_data zylonite_backlight_data = { |
66 | { | 68 | .pwm_id = 3, |
67 | gpio_set_value(gpio_backlight, on); | 69 | .max_brightness = 100, |
68 | } | 70 | .dft_brightness = 100, |
71 | .pwm_period_ns = 10000, | ||
72 | }; | ||
73 | |||
74 | static struct platform_device zylonite_backlight_device = { | ||
75 | .name = "pwm-backlight", | ||
76 | .dev = { | ||
77 | .parent = &pxa27x_device_pwm1.dev, | ||
78 | .platform_data = &zylonite_backlight_data, | ||
79 | }, | ||
80 | }; | ||
69 | 81 | ||
70 | static struct pxafb_mode_info toshiba_ltm035a776c_mode = { | 82 | static struct pxafb_mode_info toshiba_ltm035a776c_mode = { |
71 | .pixclock = 110000, | 83 | .pixclock = 110000, |
@@ -98,7 +110,6 @@ static struct pxafb_mode_info toshiba_ltm04c380k_mode = { | |||
98 | static struct pxafb_mach_info zylonite_toshiba_lcd_info = { | 110 | static struct pxafb_mach_info zylonite_toshiba_lcd_info = { |
99 | .num_modes = 1, | 111 | .num_modes = 1, |
100 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | 112 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
101 | .pxafb_backlight_power = zylonite_backlight_power, | ||
102 | }; | 113 | }; |
103 | 114 | ||
104 | static struct pxafb_mode_info sharp_ls037_modes[] = { | 115 | static struct pxafb_mode_info sharp_ls037_modes[] = { |
@@ -134,13 +145,11 @@ static struct pxafb_mach_info zylonite_sharp_lcd_info = { | |||
134 | .modes = sharp_ls037_modes, | 145 | .modes = sharp_ls037_modes, |
135 | .num_modes = 2, | 146 | .num_modes = 2, |
136 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | 147 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
137 | .pxafb_backlight_power = zylonite_backlight_power, | ||
138 | }; | 148 | }; |
139 | 149 | ||
140 | static void __init zylonite_init_lcd(void) | 150 | static void __init zylonite_init_lcd(void) |
141 | { | 151 | { |
142 | /* backlight GPIO: output, default on */ | 152 | platform_device_register(&zylonite_backlight_device); |
143 | gpio_direction_output(gpio_backlight, 1); | ||
144 | 153 | ||
145 | if (lcd_id & 0x20) { | 154 | if (lcd_id & 0x20) { |
146 | set_pxa_fb_info(&zylonite_sharp_lcd_info); | 155 | set_pxa_fb_info(&zylonite_sharp_lcd_info); |
@@ -329,6 +338,7 @@ static void __init zylonite_init(void) | |||
329 | smc91x_resources[1].end = gpio_to_irq(gpio_eth_irq); | 338 | smc91x_resources[1].end = gpio_to_irq(gpio_eth_irq); |
330 | platform_device_register(&smc91x_device); | 339 | platform_device_register(&smc91x_device); |
331 | 340 | ||
341 | pxa_set_ac97_info(NULL); | ||
332 | zylonite_init_lcd(); | 342 | zylonite_init_lcd(); |
333 | zylonite_init_mmc(); | 343 | zylonite_init_mmc(); |
334 | zylonite_init_keypad(); | 344 | zylonite_init_keypad(); |
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 324fb9daae28..6f7ae972b8db 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c | |||
@@ -50,6 +50,7 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { | |||
50 | GPIO75_LCD_BIAS, | 50 | GPIO75_LCD_BIAS, |
51 | GPIO76_LCD_VSYNC, | 51 | GPIO76_LCD_VSYNC, |
52 | GPIO127_LCD_CS_N, | 52 | GPIO127_LCD_CS_N, |
53 | GPIO20_PWM3_OUT, /* backlight */ | ||
53 | 54 | ||
54 | /* BTUART */ | 55 | /* BTUART */ |
55 | GPIO111_UART2_RTS, | 56 | GPIO111_UART2_RTS, |
@@ -200,9 +201,6 @@ void __init zylonite_pxa300_init(void) | |||
200 | /* detect LCD panel */ | 201 | /* detect LCD panel */ |
201 | zylonite_detect_lcd_panel(); | 202 | zylonite_detect_lcd_panel(); |
202 | 203 | ||
203 | /* GPIO pin assignment */ | ||
204 | gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO20); | ||
205 | |||
206 | /* MMC card detect & write protect for controller 0 */ | 204 | /* MMC card detect & write protect for controller 0 */ |
207 | zylonite_mmc_slot[0].gpio_cd = EXT_GPIO(0); | 205 | zylonite_mmc_slot[0].gpio_cd = EXT_GPIO(0); |
208 | zylonite_mmc_slot[0].gpio_wp = EXT_GPIO(2); | 206 | zylonite_mmc_slot[0].gpio_wp = EXT_GPIO(2); |
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c index 193d07903b06..2b4fc34919ac 100644 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ b/arch/arm/mach-pxa/zylonite_pxa320.c | |||
@@ -49,6 +49,7 @@ static mfp_cfg_t mfp_cfg[] __initdata = { | |||
49 | GPIO15_2_LCD_LCLK, | 49 | GPIO15_2_LCD_LCLK, |
50 | GPIO16_2_LCD_PCLK, | 50 | GPIO16_2_LCD_PCLK, |
51 | GPIO17_2_LCD_BIAS, | 51 | GPIO17_2_LCD_BIAS, |
52 | GPIO14_PWM3_OUT, /* backlight */ | ||
52 | 53 | ||
53 | /* FFUART */ | 54 | /* FFUART */ |
54 | GPIO41_UART1_RXD | MFP_LPM_EDGE_FALL, | 55 | GPIO41_UART1_RXD | MFP_LPM_EDGE_FALL, |
@@ -187,7 +188,6 @@ void __init zylonite_pxa320_init(void) | |||
187 | zylonite_detect_lcd_panel(); | 188 | zylonite_detect_lcd_panel(); |
188 | 189 | ||
189 | /* GPIO pin assignment */ | 190 | /* GPIO pin assignment */ |
190 | gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO14); | ||
191 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO9); | 191 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO9); |
192 | 192 | ||
193 | /* MMC card detect & write protect for controller 0 */ | 193 | /* MMC card detect & write protect for controller 0 */ |
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index eb69fbadc9cb..dde6ce963a19 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c | |||
@@ -39,7 +39,6 @@ | |||
39 | #include <asm/io.h> | 39 | #include <asm/io.h> |
40 | #include <asm/arch/i2c.h> | 40 | #include <asm/arch/i2c.h> |
41 | #include <asm/arch/pxa-regs.h> | 41 | #include <asm/arch/pxa-regs.h> |
42 | #include <asm/arch/pxa2xx-gpio.h> | ||
43 | 42 | ||
44 | struct pxa_i2c { | 43 | struct pxa_i2c { |
45 | spinlock_t lock; | 44 | spinlock_t lock; |
@@ -945,32 +944,6 @@ static const struct i2c_algorithm i2c_pxa_pio_algorithm = { | |||
945 | .functionality = i2c_pxa_functionality, | 944 | .functionality = i2c_pxa_functionality, |
946 | }; | 945 | }; |
947 | 946 | ||
948 | static void i2c_pxa_enable(struct platform_device *dev) | ||
949 | { | ||
950 | if (cpu_is_pxa27x()) { | ||
951 | switch (dev->id) { | ||
952 | case 0: | ||
953 | pxa_gpio_mode(GPIO117_I2CSCL_MD); | ||
954 | pxa_gpio_mode(GPIO118_I2CSDA_MD); | ||
955 | break; | ||
956 | case 1: | ||
957 | local_irq_disable(); | ||
958 | PCFR |= PCFR_PI2CEN; | ||
959 | local_irq_enable(); | ||
960 | break; | ||
961 | } | ||
962 | } | ||
963 | } | ||
964 | |||
965 | static void i2c_pxa_disable(struct platform_device *dev) | ||
966 | { | ||
967 | if (cpu_is_pxa27x() && dev->id == 1) { | ||
968 | local_irq_disable(); | ||
969 | PCFR &= ~PCFR_PI2CEN; | ||
970 | local_irq_enable(); | ||
971 | } | ||
972 | } | ||
973 | |||
974 | #define res_len(r) ((r)->end - (r)->start + 1) | 947 | #define res_len(r) ((r)->end - (r)->start + 1) |
975 | static int i2c_pxa_probe(struct platform_device *dev) | 948 | static int i2c_pxa_probe(struct platform_device *dev) |
976 | { | 949 | { |
@@ -1036,7 +1009,6 @@ static int i2c_pxa_probe(struct platform_device *dev) | |||
1036 | #endif | 1009 | #endif |
1037 | 1010 | ||
1038 | clk_enable(i2c->clk); | 1011 | clk_enable(i2c->clk); |
1039 | i2c_pxa_enable(dev); | ||
1040 | 1012 | ||
1041 | if (plat) { | 1013 | if (plat) { |
1042 | i2c->adap.class = plat->class; | 1014 | i2c->adap.class = plat->class; |
@@ -1080,7 +1052,6 @@ eadapt: | |||
1080 | free_irq(irq, i2c); | 1052 | free_irq(irq, i2c); |
1081 | ereqirq: | 1053 | ereqirq: |
1082 | clk_disable(i2c->clk); | 1054 | clk_disable(i2c->clk); |
1083 | i2c_pxa_disable(dev); | ||
1084 | iounmap(i2c->reg_base); | 1055 | iounmap(i2c->reg_base); |
1085 | eremap: | 1056 | eremap: |
1086 | clk_put(i2c->clk); | 1057 | clk_put(i2c->clk); |
@@ -1103,7 +1074,6 @@ static int __exit i2c_pxa_remove(struct platform_device *dev) | |||
1103 | 1074 | ||
1104 | clk_disable(i2c->clk); | 1075 | clk_disable(i2c->clk); |
1105 | clk_put(i2c->clk); | 1076 | clk_put(i2c->clk); |
1106 | i2c_pxa_disable(dev); | ||
1107 | 1077 | ||
1108 | iounmap(i2c->reg_base); | 1078 | iounmap(i2c->reg_base); |
1109 | release_mem_region(i2c->iobase, i2c->iosize); | 1079 | release_mem_region(i2c->iobase, i2c->iosize); |
diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c index d5c2d27f3ea4..f76b0b6c277d 100644 --- a/drivers/net/irda/pxaficp_ir.c +++ b/drivers/net/irda/pxaficp_ir.c | |||
@@ -13,16 +13,8 @@ | |||
13 | * | 13 | * |
14 | */ | 14 | */ |
15 | #include <linux/module.h> | 15 | #include <linux/module.h> |
16 | #include <linux/types.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/errno.h> | ||
19 | #include <linux/netdevice.h> | 16 | #include <linux/netdevice.h> |
20 | #include <linux/slab.h> | ||
21 | #include <linux/rtnetlink.h> | ||
22 | #include <linux/interrupt.h> | ||
23 | #include <linux/dma-mapping.h> | ||
24 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
25 | #include <linux/pm.h> | ||
26 | #include <linux/clk.h> | 18 | #include <linux/clk.h> |
27 | 19 | ||
28 | #include <net/irda/irda.h> | 20 | #include <net/irda/irda.h> |
@@ -30,17 +22,9 @@ | |||
30 | #include <net/irda/wrapper.h> | 22 | #include <net/irda/wrapper.h> |
31 | #include <net/irda/irda_device.h> | 23 | #include <net/irda/irda_device.h> |
32 | 24 | ||
33 | #include <asm/irq.h> | ||
34 | #include <asm/dma.h> | 25 | #include <asm/dma.h> |
35 | #include <asm/delay.h> | ||
36 | #include <asm/hardware.h> | ||
37 | #include <asm/arch/irda.h> | 26 | #include <asm/arch/irda.h> |
38 | #include <asm/arch/pxa-regs.h> | 27 | #include <asm/arch/pxa-regs.h> |
39 | #include <asm/arch/pxa2xx-gpio.h> | ||
40 | |||
41 | #ifdef CONFIG_MACH_MAINSTONE | ||
42 | #include <asm/arch/mainstone.h> | ||
43 | #endif | ||
44 | 28 | ||
45 | #define IrSR_RXPL_NEG_IS_ZERO (1<<4) | 29 | #define IrSR_RXPL_NEG_IS_ZERO (1<<4) |
46 | #define IrSR_RXPL_POS_IS_ZERO 0x0 | 30 | #define IrSR_RXPL_POS_IS_ZERO 0x0 |
@@ -163,10 +147,6 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed) | |||
163 | /* set board transceiver to SIR mode */ | 147 | /* set board transceiver to SIR mode */ |
164 | si->pdata->transceiver_mode(si->dev, IR_SIRMODE); | 148 | si->pdata->transceiver_mode(si->dev, IR_SIRMODE); |
165 | 149 | ||
166 | /* configure GPIO46/47 */ | ||
167 | pxa_gpio_mode(GPIO46_STRXD_MD); | ||
168 | pxa_gpio_mode(GPIO47_STTXD_MD); | ||
169 | |||
170 | /* enable the STUART clock */ | 150 | /* enable the STUART clock */ |
171 | pxa_irda_enable_sirclk(si); | 151 | pxa_irda_enable_sirclk(si); |
172 | } | 152 | } |
@@ -201,10 +181,6 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed) | |||
201 | /* set board transceiver to FIR mode */ | 181 | /* set board transceiver to FIR mode */ |
202 | si->pdata->transceiver_mode(si->dev, IR_FIRMODE); | 182 | si->pdata->transceiver_mode(si->dev, IR_FIRMODE); |
203 | 183 | ||
204 | /* configure GPIO46/47 */ | ||
205 | pxa_gpio_mode(GPIO46_ICPRXD_MD); | ||
206 | pxa_gpio_mode(GPIO47_ICPTXD_MD); | ||
207 | |||
208 | /* enable the FICP clock */ | 184 | /* enable the FICP clock */ |
209 | pxa_irda_enable_firclk(si); | 185 | pxa_irda_enable_firclk(si); |
210 | 186 | ||
diff --git a/drivers/pcmcia/pxa2xx_cm_x270.c b/drivers/pcmcia/pxa2xx_cm_x270.c index e7ab060ff118..f123fce65f2e 100644 --- a/drivers/pcmcia/pxa2xx_cm_x270.c +++ b/drivers/pcmcia/pxa2xx_cm_x270.c | |||
@@ -18,6 +18,7 @@ | |||
18 | 18 | ||
19 | #include <pcmcia/ss.h> | 19 | #include <pcmcia/ss.h> |
20 | #include <asm/hardware.h> | 20 | #include <asm/hardware.h> |
21 | #include <asm/mach-types.h> | ||
21 | 22 | ||
22 | #include <asm/arch/pxa-regs.h> | 23 | #include <asm/arch/pxa-regs.h> |
23 | #include <asm/arch/pxa2xx-gpio.h> | 24 | #include <asm/arch/pxa2xx-gpio.h> |
@@ -130,7 +131,7 @@ static void cmx270_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) | |||
130 | } | 131 | } |
131 | 132 | ||
132 | 133 | ||
133 | static struct pcmcia_low_level cmx270_pcmcia_ops = { | 134 | static struct pcmcia_low_level cmx270_pcmcia_ops __initdata = { |
134 | .owner = THIS_MODULE, | 135 | .owner = THIS_MODULE, |
135 | .hw_init = cmx270_pcmcia_hw_init, | 136 | .hw_init = cmx270_pcmcia_hw_init, |
136 | .hw_shutdown = cmx270_pcmcia_shutdown, | 137 | .hw_shutdown = cmx270_pcmcia_shutdown, |
@@ -147,15 +148,21 @@ static int __init cmx270_pcmcia_init(void) | |||
147 | { | 148 | { |
148 | int ret; | 149 | int ret; |
149 | 150 | ||
151 | if (!machine_is_armcore()) | ||
152 | return -ENODEV; | ||
153 | |||
150 | cmx270_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); | 154 | cmx270_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); |
151 | 155 | ||
152 | if (!cmx270_pcmcia_device) | 156 | if (!cmx270_pcmcia_device) |
153 | return -ENOMEM; | 157 | return -ENOMEM; |
154 | 158 | ||
155 | cmx270_pcmcia_device->dev.platform_data = &cmx270_pcmcia_ops; | 159 | ret = platform_device_add_data(cmx270_pcmcia_device, &cmx270_pcmcia_ops, |
160 | sizeof(cmx270_pcmcia_ops)); | ||
156 | 161 | ||
157 | printk(KERN_INFO "Registering cm-x270 PCMCIA interface.\n"); | 162 | if (ret == 0) { |
158 | ret = platform_device_add(cmx270_pcmcia_device); | 163 | printk(KERN_INFO "Registering cm-x270 PCMCIA interface.\n"); |
164 | ret = platform_device_add(cmx270_pcmcia_device); | ||
165 | } | ||
159 | 166 | ||
160 | if (ret) | 167 | if (ret) |
161 | platform_device_put(cmx270_pcmcia_device); | 168 | platform_device_put(cmx270_pcmcia_device); |
diff --git a/drivers/pcmcia/pxa2xx_mainstone.c b/drivers/pcmcia/pxa2xx_mainstone.c index 145b85e0f02c..92d1cc33808c 100644 --- a/drivers/pcmcia/pxa2xx_mainstone.c +++ b/drivers/pcmcia/pxa2xx_mainstone.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <pcmcia/ss.h> | 22 | #include <pcmcia/ss.h> |
23 | 23 | ||
24 | #include <asm/hardware.h> | 24 | #include <asm/hardware.h> |
25 | #include <asm/mach-types.h> | ||
25 | #include <asm/irq.h> | 26 | #include <asm/irq.h> |
26 | 27 | ||
27 | #include <asm/arch/pxa-regs.h> | 28 | #include <asm/arch/pxa-regs.h> |
@@ -136,7 +137,7 @@ static void mst_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) | |||
136 | { | 137 | { |
137 | } | 138 | } |
138 | 139 | ||
139 | static struct pcmcia_low_level mst_pcmcia_ops = { | 140 | static struct pcmcia_low_level mst_pcmcia_ops __initdata = { |
140 | .owner = THIS_MODULE, | 141 | .owner = THIS_MODULE, |
141 | .hw_init = mst_pcmcia_hw_init, | 142 | .hw_init = mst_pcmcia_hw_init, |
142 | .hw_shutdown = mst_pcmcia_hw_shutdown, | 143 | .hw_shutdown = mst_pcmcia_hw_shutdown, |
@@ -153,13 +154,17 @@ static int __init mst_pcmcia_init(void) | |||
153 | { | 154 | { |
154 | int ret; | 155 | int ret; |
155 | 156 | ||
157 | if (!machine_is_mainstone()) | ||
158 | return -ENODEV; | ||
159 | |||
156 | mst_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); | 160 | mst_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); |
157 | if (!mst_pcmcia_device) | 161 | if (!mst_pcmcia_device) |
158 | return -ENOMEM; | 162 | return -ENOMEM; |
159 | 163 | ||
160 | mst_pcmcia_device->dev.platform_data = &mst_pcmcia_ops; | 164 | ret = platform_device_add_data(mst_pcmcia_device, &mst_pcmcia_ops, |
161 | 165 | sizeof(mst_pcmcia_ops)); | |
162 | ret = platform_device_add(mst_pcmcia_device); | 166 | if (ret == 0) |
167 | ret = platform_device_add(mst_pcmcia_device); | ||
163 | 168 | ||
164 | if (ret) | 169 | if (ret) |
165 | platform_device_put(mst_pcmcia_device); | 170 | platform_device_put(mst_pcmcia_device); |
diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c index d5c33bd78d68..d71f93d45833 100644 --- a/drivers/pcmcia/pxa2xx_sharpsl.c +++ b/drivers/pcmcia/pxa2xx_sharpsl.c | |||
@@ -222,7 +222,7 @@ static void sharpsl_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) | |||
222 | sharpsl_pcmcia_init_reset(skt); | 222 | sharpsl_pcmcia_init_reset(skt); |
223 | } | 223 | } |
224 | 224 | ||
225 | static struct pcmcia_low_level sharpsl_pcmcia_ops = { | 225 | static struct pcmcia_low_level sharpsl_pcmcia_ops __initdata = { |
226 | .owner = THIS_MODULE, | 226 | .owner = THIS_MODULE, |
227 | .hw_init = sharpsl_pcmcia_hw_init, | 227 | .hw_init = sharpsl_pcmcia_hw_init, |
228 | .hw_shutdown = sharpsl_pcmcia_hw_shutdown, | 228 | .hw_shutdown = sharpsl_pcmcia_hw_shutdown, |
@@ -261,10 +261,12 @@ static int __init sharpsl_pcmcia_init(void) | |||
261 | if (!sharpsl_pcmcia_device) | 261 | if (!sharpsl_pcmcia_device) |
262 | return -ENOMEM; | 262 | return -ENOMEM; |
263 | 263 | ||
264 | sharpsl_pcmcia_device->dev.platform_data = &sharpsl_pcmcia_ops; | 264 | ret = platform_device_add_data(sharpsl_pcmcia_device, |
265 | sharpsl_pcmcia_device->dev.parent = platform_scoop_config->devs[0].dev; | 265 | &sharpsl_pcmcia_ops, sizeof(sharpsl_pcmcia_ops)); |
266 | 266 | if (ret == 0) { | |
267 | ret = platform_device_add(sharpsl_pcmcia_device); | 267 | sharpsl_pcmcia_device->dev.parent = platform_scoop_config->devs[0].dev; |
268 | ret = platform_device_add(sharpsl_pcmcia_device); | ||
269 | } | ||
268 | 270 | ||
269 | if (ret) | 271 | if (ret) |
270 | platform_device_put(sharpsl_pcmcia_device); | 272 | platform_device_put(sharpsl_pcmcia_device); |
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 3565d4352826..d6bab0d5f453 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig | |||
@@ -172,7 +172,7 @@ config USB_NET2280 | |||
172 | default USB_GADGET | 172 | default USB_GADGET |
173 | select USB_GADGET_SELECTED | 173 | select USB_GADGET_SELECTED |
174 | 174 | ||
175 | config USB_GADGET_PXA2XX | 175 | config USB_GADGET_PXA25X |
176 | boolean "PXA 25x or IXP 4xx" | 176 | boolean "PXA 25x or IXP 4xx" |
177 | depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX | 177 | depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX |
178 | help | 178 | help |
@@ -184,19 +184,19 @@ config USB_GADGET_PXA2XX | |||
184 | zero (for control transfers). | 184 | zero (for control transfers). |
185 | 185 | ||
186 | Say "y" to link the driver statically, or "m" to build a | 186 | Say "y" to link the driver statically, or "m" to build a |
187 | dynamically linked module called "pxa2xx_udc" and force all | 187 | dynamically linked module called "pxa25x_udc" and force all |
188 | gadget drivers to also be dynamically linked. | 188 | gadget drivers to also be dynamically linked. |
189 | 189 | ||
190 | config USB_PXA2XX | 190 | config USB_PXA25X |
191 | tristate | 191 | tristate |
192 | depends on USB_GADGET_PXA2XX | 192 | depends on USB_GADGET_PXA25X |
193 | default USB_GADGET | 193 | default USB_GADGET |
194 | select USB_GADGET_SELECTED | 194 | select USB_GADGET_SELECTED |
195 | 195 | ||
196 | # if there's only one gadget driver, using only two bulk endpoints, | 196 | # if there's only one gadget driver, using only two bulk endpoints, |
197 | # don't waste memory for the other endpoints | 197 | # don't waste memory for the other endpoints |
198 | config USB_PXA2XX_SMALL | 198 | config USB_PXA25X_SMALL |
199 | depends on USB_GADGET_PXA2XX | 199 | depends on USB_GADGET_PXA25X |
200 | bool | 200 | bool |
201 | default n if USB_ETH_RNDIS | 201 | default n if USB_ETH_RNDIS |
202 | default y if USB_ZERO | 202 | default y if USB_ZERO |
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 12357255d740..e258afd25faf 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile | |||
@@ -8,7 +8,7 @@ endif | |||
8 | obj-$(CONFIG_USB_DUMMY_HCD) += dummy_hcd.o | 8 | obj-$(CONFIG_USB_DUMMY_HCD) += dummy_hcd.o |
9 | obj-$(CONFIG_USB_NET2280) += net2280.o | 9 | obj-$(CONFIG_USB_NET2280) += net2280.o |
10 | obj-$(CONFIG_USB_AMD5536UDC) += amd5536udc.o | 10 | obj-$(CONFIG_USB_AMD5536UDC) += amd5536udc.o |
11 | obj-$(CONFIG_USB_PXA2XX) += pxa2xx_udc.o | 11 | obj-$(CONFIG_USB_PXA25X) += pxa25x_udc.o |
12 | obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o | 12 | obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o |
13 | obj-$(CONFIG_USB_GOKU) += goku_udc.o | 13 | obj-$(CONFIG_USB_GOKU) += goku_udc.o |
14 | obj-$(CONFIG_USB_OMAP) += omap_udc.o | 14 | obj-$(CONFIG_USB_OMAP) += omap_udc.o |
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 8d61ea67a817..4ce3950b997f 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c | |||
@@ -262,7 +262,7 @@ MODULE_PARM_DESC(host_addr, "Host Ethernet Address"); | |||
262 | /* For CDC-incapable hardware, choose the simple cdc subset. | 262 | /* For CDC-incapable hardware, choose the simple cdc subset. |
263 | * Anything that talks bulk (without notable bugs) can do this. | 263 | * Anything that talks bulk (without notable bugs) can do this. |
264 | */ | 264 | */ |
265 | #ifdef CONFIG_USB_GADGET_PXA2XX | 265 | #ifdef CONFIG_USB_GADGET_PXA25X |
266 | #define DEV_CONFIG_SUBSET | 266 | #define DEV_CONFIG_SUBSET |
267 | #endif | 267 | #endif |
268 | 268 | ||
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index f7f159c1002b..ca5149ea7312 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h | |||
@@ -29,8 +29,8 @@ | |||
29 | #define gadget_is_dummy(g) 0 | 29 | #define gadget_is_dummy(g) 0 |
30 | #endif | 30 | #endif |
31 | 31 | ||
32 | #ifdef CONFIG_USB_GADGET_PXA2XX | 32 | #ifdef CONFIG_USB_GADGET_PXA25X |
33 | #define gadget_is_pxa(g) !strcmp("pxa2xx_udc", (g)->name) | 33 | #define gadget_is_pxa(g) !strcmp("pxa25x_udc", (g)->name) |
34 | #else | 34 | #else |
35 | #define gadget_is_pxa(g) 0 | 35 | #define gadget_is_pxa(g) 0 |
36 | #endif | 36 | #endif |
diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c index 69b0a2754f2a..f132a9219e11 100644 --- a/drivers/usb/gadget/inode.c +++ b/drivers/usb/gadget/inode.c | |||
@@ -1501,7 +1501,7 @@ gadgetfs_setup (struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) | |||
1501 | } | 1501 | } |
1502 | break; | 1502 | break; |
1503 | 1503 | ||
1504 | #ifndef CONFIG_USB_GADGET_PXA2XX | 1504 | #ifndef CONFIG_USB_GADGET_PXA25X |
1505 | /* PXA automagically handles this request too */ | 1505 | /* PXA automagically handles this request too */ |
1506 | case USB_REQ_GET_CONFIGURATION: | 1506 | case USB_REQ_GET_CONFIGURATION: |
1507 | if (ctrl->bRequestType != 0x80) | 1507 | if (ctrl->bRequestType != 0x80) |
diff --git a/drivers/usb/gadget/pxa2xx_udc.c b/drivers/usb/gadget/pxa25x_udc.c index 08f699b1fc57..031dceb93023 100644 --- a/drivers/usb/gadget/pxa2xx_udc.c +++ b/drivers/usb/gadget/pxa25x_udc.c | |||
@@ -1,5 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * linux/drivers/usb/gadget/pxa2xx_udc.c | ||
3 | * Intel PXA25x and IXP4xx on-chip full speed USB device controllers | 2 | * Intel PXA25x and IXP4xx on-chip full speed USB device controllers |
4 | * | 3 | * |
5 | * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker) | 4 | * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker) |
@@ -46,19 +45,25 @@ | |||
46 | #include <linux/err.h> | 45 | #include <linux/err.h> |
47 | #include <linux/seq_file.h> | 46 | #include <linux/seq_file.h> |
48 | #include <linux/debugfs.h> | 47 | #include <linux/debugfs.h> |
48 | #include <linux/io.h> | ||
49 | 49 | ||
50 | #include <asm/byteorder.h> | 50 | #include <asm/byteorder.h> |
51 | #include <asm/dma.h> | 51 | #include <asm/dma.h> |
52 | #include <asm/gpio.h> | 52 | #include <asm/gpio.h> |
53 | #include <asm/io.h> | ||
54 | #include <asm/system.h> | 53 | #include <asm/system.h> |
55 | #include <asm/mach-types.h> | 54 | #include <asm/mach-types.h> |
56 | #include <asm/unaligned.h> | 55 | #include <asm/unaligned.h> |
57 | #include <asm/hardware.h> | ||
58 | 56 | ||
59 | #include <linux/usb/ch9.h> | 57 | #include <linux/usb/ch9.h> |
60 | #include <linux/usb/gadget.h> | 58 | #include <linux/usb/gadget.h> |
61 | 59 | ||
60 | /* | ||
61 | * This driver is PXA25x only. Grab the right register definitions. | ||
62 | */ | ||
63 | #ifdef CONFIG_ARCH_PXA | ||
64 | #include <asm/arch/pxa25x-udc.h> | ||
65 | #endif | ||
66 | |||
62 | #include <asm/mach/udc_pxa2xx.h> | 67 | #include <asm/mach/udc_pxa2xx.h> |
63 | 68 | ||
64 | 69 | ||
@@ -91,7 +96,7 @@ | |||
91 | #define DRIVER_DESC "PXA 25x USB Device Controller driver" | 96 | #define DRIVER_DESC "PXA 25x USB Device Controller driver" |
92 | 97 | ||
93 | 98 | ||
94 | static const char driver_name [] = "pxa2xx_udc"; | 99 | static const char driver_name [] = "pxa25x_udc"; |
95 | 100 | ||
96 | static const char ep0name [] = "ep0"; | 101 | static const char ep0name [] = "ep0"; |
97 | 102 | ||
@@ -111,10 +116,10 @@ static const char ep0name [] = "ep0"; | |||
111 | 116 | ||
112 | #endif | 117 | #endif |
113 | 118 | ||
114 | #include "pxa2xx_udc.h" | 119 | #include "pxa25x_udc.h" |
115 | 120 | ||
116 | 121 | ||
117 | #ifdef CONFIG_USB_PXA2XX_SMALL | 122 | #ifdef CONFIG_USB_PXA25X_SMALL |
118 | #define SIZE_STR " (small)" | 123 | #define SIZE_STR " (small)" |
119 | #else | 124 | #else |
120 | #define SIZE_STR "" | 125 | #define SIZE_STR "" |
@@ -126,8 +131,8 @@ static const char ep0name [] = "ep0"; | |||
126 | * --------------------------------------------------------------------------- | 131 | * --------------------------------------------------------------------------- |
127 | */ | 132 | */ |
128 | 133 | ||
129 | static void pxa2xx_ep_fifo_flush (struct usb_ep *ep); | 134 | static void pxa25x_ep_fifo_flush (struct usb_ep *ep); |
130 | static void nuke (struct pxa2xx_ep *, int status); | 135 | static void nuke (struct pxa25x_ep *, int status); |
131 | 136 | ||
132 | /* one GPIO should be used to detect VBUS from the host */ | 137 | /* one GPIO should be used to detect VBUS from the host */ |
133 | static int is_vbus_present(void) | 138 | static int is_vbus_present(void) |
@@ -212,24 +217,24 @@ static inline void udc_ack_int_UDCCR(int mask) | |||
212 | /* | 217 | /* |
213 | * endpoint enable/disable | 218 | * endpoint enable/disable |
214 | * | 219 | * |
215 | * we need to verify the descriptors used to enable endpoints. since pxa2xx | 220 | * we need to verify the descriptors used to enable endpoints. since pxa25x |
216 | * endpoint configurations are fixed, and are pretty much always enabled, | 221 | * endpoint configurations are fixed, and are pretty much always enabled, |
217 | * there's not a lot to manage here. | 222 | * there's not a lot to manage here. |
218 | * | 223 | * |
219 | * because pxa2xx can't selectively initialize bulk (or interrupt) endpoints, | 224 | * because pxa25x can't selectively initialize bulk (or interrupt) endpoints, |
220 | * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except | 225 | * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except |
221 | * for a single interface (with only the default altsetting) and for gadget | 226 | * for a single interface (with only the default altsetting) and for gadget |
222 | * drivers that don't halt endpoints (not reset by set_interface). that also | 227 | * drivers that don't halt endpoints (not reset by set_interface). that also |
223 | * means that if you use ISO, you must violate the USB spec rule that all | 228 | * means that if you use ISO, you must violate the USB spec rule that all |
224 | * iso endpoints must be in non-default altsettings. | 229 | * iso endpoints must be in non-default altsettings. |
225 | */ | 230 | */ |
226 | static int pxa2xx_ep_enable (struct usb_ep *_ep, | 231 | static int pxa25x_ep_enable (struct usb_ep *_ep, |
227 | const struct usb_endpoint_descriptor *desc) | 232 | const struct usb_endpoint_descriptor *desc) |
228 | { | 233 | { |
229 | struct pxa2xx_ep *ep; | 234 | struct pxa25x_ep *ep; |
230 | struct pxa2xx_udc *dev; | 235 | struct pxa25x_udc *dev; |
231 | 236 | ||
232 | ep = container_of (_ep, struct pxa2xx_ep, ep); | 237 | ep = container_of (_ep, struct pxa25x_ep, ep); |
233 | if (!_ep || !desc || ep->desc || _ep->name == ep0name | 238 | if (!_ep || !desc || ep->desc || _ep->name == ep0name |
234 | || desc->bDescriptorType != USB_DT_ENDPOINT | 239 | || desc->bDescriptorType != USB_DT_ENDPOINT |
235 | || ep->bEndpointAddress != desc->bEndpointAddress | 240 | || ep->bEndpointAddress != desc->bEndpointAddress |
@@ -268,7 +273,7 @@ static int pxa2xx_ep_enable (struct usb_ep *_ep, | |||
268 | ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize); | 273 | ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize); |
269 | 274 | ||
270 | /* flush fifo (mostly for OUT buffers) */ | 275 | /* flush fifo (mostly for OUT buffers) */ |
271 | pxa2xx_ep_fifo_flush (_ep); | 276 | pxa25x_ep_fifo_flush (_ep); |
272 | 277 | ||
273 | /* ... reset halt state too, if we could ... */ | 278 | /* ... reset halt state too, if we could ... */ |
274 | 279 | ||
@@ -276,12 +281,12 @@ static int pxa2xx_ep_enable (struct usb_ep *_ep, | |||
276 | return 0; | 281 | return 0; |
277 | } | 282 | } |
278 | 283 | ||
279 | static int pxa2xx_ep_disable (struct usb_ep *_ep) | 284 | static int pxa25x_ep_disable (struct usb_ep *_ep) |
280 | { | 285 | { |
281 | struct pxa2xx_ep *ep; | 286 | struct pxa25x_ep *ep; |
282 | unsigned long flags; | 287 | unsigned long flags; |
283 | 288 | ||
284 | ep = container_of (_ep, struct pxa2xx_ep, ep); | 289 | ep = container_of (_ep, struct pxa25x_ep, ep); |
285 | if (!_ep || !ep->desc) { | 290 | if (!_ep || !ep->desc) { |
286 | DMSG("%s, %s not enabled\n", __func__, | 291 | DMSG("%s, %s not enabled\n", __func__, |
287 | _ep ? ep->ep.name : NULL); | 292 | _ep ? ep->ep.name : NULL); |
@@ -292,7 +297,7 @@ static int pxa2xx_ep_disable (struct usb_ep *_ep) | |||
292 | nuke (ep, -ESHUTDOWN); | 297 | nuke (ep, -ESHUTDOWN); |
293 | 298 | ||
294 | /* flush fifo (mostly for IN buffers) */ | 299 | /* flush fifo (mostly for IN buffers) */ |
295 | pxa2xx_ep_fifo_flush (_ep); | 300 | pxa25x_ep_fifo_flush (_ep); |
296 | 301 | ||
297 | ep->desc = NULL; | 302 | ep->desc = NULL; |
298 | ep->stopped = 1; | 303 | ep->stopped = 1; |
@@ -304,18 +309,18 @@ static int pxa2xx_ep_disable (struct usb_ep *_ep) | |||
304 | 309 | ||
305 | /*-------------------------------------------------------------------------*/ | 310 | /*-------------------------------------------------------------------------*/ |
306 | 311 | ||
307 | /* for the pxa2xx, these can just wrap kmalloc/kfree. gadget drivers | 312 | /* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers |
308 | * must still pass correctly initialized endpoints, since other controller | 313 | * must still pass correctly initialized endpoints, since other controller |
309 | * drivers may care about how it's currently set up (dma issues etc). | 314 | * drivers may care about how it's currently set up (dma issues etc). |
310 | */ | 315 | */ |
311 | 316 | ||
312 | /* | 317 | /* |
313 | * pxa2xx_ep_alloc_request - allocate a request data structure | 318 | * pxa25x_ep_alloc_request - allocate a request data structure |
314 | */ | 319 | */ |
315 | static struct usb_request * | 320 | static struct usb_request * |
316 | pxa2xx_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags) | 321 | pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags) |
317 | { | 322 | { |
318 | struct pxa2xx_request *req; | 323 | struct pxa25x_request *req; |
319 | 324 | ||
320 | req = kzalloc(sizeof(*req), gfp_flags); | 325 | req = kzalloc(sizeof(*req), gfp_flags); |
321 | if (!req) | 326 | if (!req) |
@@ -327,14 +332,14 @@ pxa2xx_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags) | |||
327 | 332 | ||
328 | 333 | ||
329 | /* | 334 | /* |
330 | * pxa2xx_ep_free_request - deallocate a request data structure | 335 | * pxa25x_ep_free_request - deallocate a request data structure |
331 | */ | 336 | */ |
332 | static void | 337 | static void |
333 | pxa2xx_ep_free_request (struct usb_ep *_ep, struct usb_request *_req) | 338 | pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req) |
334 | { | 339 | { |
335 | struct pxa2xx_request *req; | 340 | struct pxa25x_request *req; |
336 | 341 | ||
337 | req = container_of (_req, struct pxa2xx_request, req); | 342 | req = container_of (_req, struct pxa25x_request, req); |
338 | WARN_ON (!list_empty (&req->queue)); | 343 | WARN_ON (!list_empty (&req->queue)); |
339 | kfree(req); | 344 | kfree(req); |
340 | } | 345 | } |
@@ -344,7 +349,7 @@ pxa2xx_ep_free_request (struct usb_ep *_ep, struct usb_request *_req) | |||
344 | /* | 349 | /* |
345 | * done - retire a request; caller blocked irqs | 350 | * done - retire a request; caller blocked irqs |
346 | */ | 351 | */ |
347 | static void done(struct pxa2xx_ep *ep, struct pxa2xx_request *req, int status) | 352 | static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status) |
348 | { | 353 | { |
349 | unsigned stopped = ep->stopped; | 354 | unsigned stopped = ep->stopped; |
350 | 355 | ||
@@ -367,13 +372,13 @@ static void done(struct pxa2xx_ep *ep, struct pxa2xx_request *req, int status) | |||
367 | } | 372 | } |
368 | 373 | ||
369 | 374 | ||
370 | static inline void ep0_idle (struct pxa2xx_udc *dev) | 375 | static inline void ep0_idle (struct pxa25x_udc *dev) |
371 | { | 376 | { |
372 | dev->ep0state = EP0_IDLE; | 377 | dev->ep0state = EP0_IDLE; |
373 | } | 378 | } |
374 | 379 | ||
375 | static int | 380 | static int |
376 | write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max) | 381 | write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max) |
377 | { | 382 | { |
378 | u8 *buf; | 383 | u8 *buf; |
379 | unsigned length, count; | 384 | unsigned length, count; |
@@ -398,7 +403,7 @@ write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max) | |||
398 | * caller guarantees at least one packet buffer is ready (or a zlp). | 403 | * caller guarantees at least one packet buffer is ready (or a zlp). |
399 | */ | 404 | */ |
400 | static int | 405 | static int |
401 | write_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) | 406 | write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) |
402 | { | 407 | { |
403 | unsigned max; | 408 | unsigned max; |
404 | 409 | ||
@@ -455,7 +460,7 @@ write_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) | |||
455 | * ep0 data stage. these chips want very simple state transitions. | 460 | * ep0 data stage. these chips want very simple state transitions. |
456 | */ | 461 | */ |
457 | static inline | 462 | static inline |
458 | void ep0start(struct pxa2xx_udc *dev, u32 flags, const char *tag) | 463 | void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag) |
459 | { | 464 | { |
460 | UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR; | 465 | UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR; |
461 | USIR0 = USIR0_IR0; | 466 | USIR0 = USIR0_IR0; |
@@ -465,7 +470,7 @@ void ep0start(struct pxa2xx_udc *dev, u32 flags, const char *tag) | |||
465 | } | 470 | } |
466 | 471 | ||
467 | static int | 472 | static int |
468 | write_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) | 473 | write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) |
469 | { | 474 | { |
470 | unsigned count; | 475 | unsigned count; |
471 | int is_short; | 476 | int is_short; |
@@ -525,7 +530,7 @@ write_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) | |||
525 | * request buffer having filled (and maybe overran till end-of-packet). | 530 | * request buffer having filled (and maybe overran till end-of-packet). |
526 | */ | 531 | */ |
527 | static int | 532 | static int |
528 | read_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) | 533 | read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) |
529 | { | 534 | { |
530 | for (;;) { | 535 | for (;;) { |
531 | u32 udccs; | 536 | u32 udccs; |
@@ -602,7 +607,7 @@ read_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) | |||
602 | * protocols do use them. | 607 | * protocols do use them. |
603 | */ | 608 | */ |
604 | static int | 609 | static int |
605 | read_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) | 610 | read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) |
606 | { | 611 | { |
607 | u8 *buf, byte; | 612 | u8 *buf, byte; |
608 | unsigned bufferspace; | 613 | unsigned bufferspace; |
@@ -641,21 +646,21 @@ read_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req) | |||
641 | /*-------------------------------------------------------------------------*/ | 646 | /*-------------------------------------------------------------------------*/ |
642 | 647 | ||
643 | static int | 648 | static int |
644 | pxa2xx_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) | 649 | pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) |
645 | { | 650 | { |
646 | struct pxa2xx_request *req; | 651 | struct pxa25x_request *req; |
647 | struct pxa2xx_ep *ep; | 652 | struct pxa25x_ep *ep; |
648 | struct pxa2xx_udc *dev; | 653 | struct pxa25x_udc *dev; |
649 | unsigned long flags; | 654 | unsigned long flags; |
650 | 655 | ||
651 | req = container_of(_req, struct pxa2xx_request, req); | 656 | req = container_of(_req, struct pxa25x_request, req); |
652 | if (unlikely (!_req || !_req->complete || !_req->buf | 657 | if (unlikely (!_req || !_req->complete || !_req->buf |
653 | || !list_empty(&req->queue))) { | 658 | || !list_empty(&req->queue))) { |
654 | DMSG("%s, bad params\n", __func__); | 659 | DMSG("%s, bad params\n", __func__); |
655 | return -EINVAL; | 660 | return -EINVAL; |
656 | } | 661 | } |
657 | 662 | ||
658 | ep = container_of(_ep, struct pxa2xx_ep, ep); | 663 | ep = container_of(_ep, struct pxa25x_ep, ep); |
659 | if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) { | 664 | if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) { |
660 | DMSG("%s, bad ep\n", __func__); | 665 | DMSG("%s, bad ep\n", __func__); |
661 | return -EINVAL; | 666 | return -EINVAL; |
@@ -751,14 +756,14 @@ pxa2xx_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) | |||
751 | /* | 756 | /* |
752 | * nuke - dequeue ALL requests | 757 | * nuke - dequeue ALL requests |
753 | */ | 758 | */ |
754 | static void nuke(struct pxa2xx_ep *ep, int status) | 759 | static void nuke(struct pxa25x_ep *ep, int status) |
755 | { | 760 | { |
756 | struct pxa2xx_request *req; | 761 | struct pxa25x_request *req; |
757 | 762 | ||
758 | /* called with irqs blocked */ | 763 | /* called with irqs blocked */ |
759 | while (!list_empty(&ep->queue)) { | 764 | while (!list_empty(&ep->queue)) { |
760 | req = list_entry(ep->queue.next, | 765 | req = list_entry(ep->queue.next, |
761 | struct pxa2xx_request, | 766 | struct pxa25x_request, |
762 | queue); | 767 | queue); |
763 | done(ep, req, status); | 768 | done(ep, req, status); |
764 | } | 769 | } |
@@ -768,13 +773,13 @@ static void nuke(struct pxa2xx_ep *ep, int status) | |||
768 | 773 | ||
769 | 774 | ||
770 | /* dequeue JUST ONE request */ | 775 | /* dequeue JUST ONE request */ |
771 | static int pxa2xx_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | 776 | static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) |
772 | { | 777 | { |
773 | struct pxa2xx_ep *ep; | 778 | struct pxa25x_ep *ep; |
774 | struct pxa2xx_request *req; | 779 | struct pxa25x_request *req; |
775 | unsigned long flags; | 780 | unsigned long flags; |
776 | 781 | ||
777 | ep = container_of(_ep, struct pxa2xx_ep, ep); | 782 | ep = container_of(_ep, struct pxa25x_ep, ep); |
778 | if (!_ep || ep->ep.name == ep0name) | 783 | if (!_ep || ep->ep.name == ep0name) |
779 | return -EINVAL; | 784 | return -EINVAL; |
780 | 785 | ||
@@ -798,12 +803,12 @@ static int pxa2xx_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |||
798 | 803 | ||
799 | /*-------------------------------------------------------------------------*/ | 804 | /*-------------------------------------------------------------------------*/ |
800 | 805 | ||
801 | static int pxa2xx_ep_set_halt(struct usb_ep *_ep, int value) | 806 | static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value) |
802 | { | 807 | { |
803 | struct pxa2xx_ep *ep; | 808 | struct pxa25x_ep *ep; |
804 | unsigned long flags; | 809 | unsigned long flags; |
805 | 810 | ||
806 | ep = container_of(_ep, struct pxa2xx_ep, ep); | 811 | ep = container_of(_ep, struct pxa25x_ep, ep); |
807 | if (unlikely (!_ep | 812 | if (unlikely (!_ep |
808 | || (!ep->desc && ep->ep.name != ep0name)) | 813 | || (!ep->desc && ep->ep.name != ep0name)) |
809 | || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { | 814 | || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { |
@@ -853,11 +858,11 @@ static int pxa2xx_ep_set_halt(struct usb_ep *_ep, int value) | |||
853 | return 0; | 858 | return 0; |
854 | } | 859 | } |
855 | 860 | ||
856 | static int pxa2xx_ep_fifo_status(struct usb_ep *_ep) | 861 | static int pxa25x_ep_fifo_status(struct usb_ep *_ep) |
857 | { | 862 | { |
858 | struct pxa2xx_ep *ep; | 863 | struct pxa25x_ep *ep; |
859 | 864 | ||
860 | ep = container_of(_ep, struct pxa2xx_ep, ep); | 865 | ep = container_of(_ep, struct pxa25x_ep, ep); |
861 | if (!_ep) { | 866 | if (!_ep) { |
862 | DMSG("%s, bad ep\n", __func__); | 867 | DMSG("%s, bad ep\n", __func__); |
863 | return -ENODEV; | 868 | return -ENODEV; |
@@ -872,11 +877,11 @@ static int pxa2xx_ep_fifo_status(struct usb_ep *_ep) | |||
872 | return (*ep->reg_ubcr & 0xfff) + 1; | 877 | return (*ep->reg_ubcr & 0xfff) + 1; |
873 | } | 878 | } |
874 | 879 | ||
875 | static void pxa2xx_ep_fifo_flush(struct usb_ep *_ep) | 880 | static void pxa25x_ep_fifo_flush(struct usb_ep *_ep) |
876 | { | 881 | { |
877 | struct pxa2xx_ep *ep; | 882 | struct pxa25x_ep *ep; |
878 | 883 | ||
879 | ep = container_of(_ep, struct pxa2xx_ep, ep); | 884 | ep = container_of(_ep, struct pxa25x_ep, ep); |
880 | if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) { | 885 | if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) { |
881 | DMSG("%s, bad ep\n", __func__); | 886 | DMSG("%s, bad ep\n", __func__); |
882 | return; | 887 | return; |
@@ -898,19 +903,19 @@ static void pxa2xx_ep_fifo_flush(struct usb_ep *_ep) | |||
898 | } | 903 | } |
899 | 904 | ||
900 | 905 | ||
901 | static struct usb_ep_ops pxa2xx_ep_ops = { | 906 | static struct usb_ep_ops pxa25x_ep_ops = { |
902 | .enable = pxa2xx_ep_enable, | 907 | .enable = pxa25x_ep_enable, |
903 | .disable = pxa2xx_ep_disable, | 908 | .disable = pxa25x_ep_disable, |
904 | 909 | ||
905 | .alloc_request = pxa2xx_ep_alloc_request, | 910 | .alloc_request = pxa25x_ep_alloc_request, |
906 | .free_request = pxa2xx_ep_free_request, | 911 | .free_request = pxa25x_ep_free_request, |
907 | 912 | ||
908 | .queue = pxa2xx_ep_queue, | 913 | .queue = pxa25x_ep_queue, |
909 | .dequeue = pxa2xx_ep_dequeue, | 914 | .dequeue = pxa25x_ep_dequeue, |
910 | 915 | ||
911 | .set_halt = pxa2xx_ep_set_halt, | 916 | .set_halt = pxa25x_ep_set_halt, |
912 | .fifo_status = pxa2xx_ep_fifo_status, | 917 | .fifo_status = pxa25x_ep_fifo_status, |
913 | .fifo_flush = pxa2xx_ep_fifo_flush, | 918 | .fifo_flush = pxa25x_ep_fifo_flush, |
914 | }; | 919 | }; |
915 | 920 | ||
916 | 921 | ||
@@ -919,12 +924,12 @@ static struct usb_ep_ops pxa2xx_ep_ops = { | |||
919 | * --------------------------------------------------------------------------- | 924 | * --------------------------------------------------------------------------- |
920 | */ | 925 | */ |
921 | 926 | ||
922 | static int pxa2xx_udc_get_frame(struct usb_gadget *_gadget) | 927 | static int pxa25x_udc_get_frame(struct usb_gadget *_gadget) |
923 | { | 928 | { |
924 | return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff); | 929 | return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff); |
925 | } | 930 | } |
926 | 931 | ||
927 | static int pxa2xx_udc_wakeup(struct usb_gadget *_gadget) | 932 | static int pxa25x_udc_wakeup(struct usb_gadget *_gadget) |
928 | { | 933 | { |
929 | /* host may not have enabled remote wakeup */ | 934 | /* host may not have enabled remote wakeup */ |
930 | if ((UDCCS0 & UDCCS0_DRWF) == 0) | 935 | if ((UDCCS0 & UDCCS0_DRWF) == 0) |
@@ -933,14 +938,14 @@ static int pxa2xx_udc_wakeup(struct usb_gadget *_gadget) | |||
933 | return 0; | 938 | return 0; |
934 | } | 939 | } |
935 | 940 | ||
936 | static void stop_activity(struct pxa2xx_udc *, struct usb_gadget_driver *); | 941 | static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *); |
937 | static void udc_enable (struct pxa2xx_udc *); | 942 | static void udc_enable (struct pxa25x_udc *); |
938 | static void udc_disable(struct pxa2xx_udc *); | 943 | static void udc_disable(struct pxa25x_udc *); |
939 | 944 | ||
940 | /* We disable the UDC -- and its 48 MHz clock -- whenever it's not | 945 | /* We disable the UDC -- and its 48 MHz clock -- whenever it's not |
941 | * in active use. | 946 | * in active use. |
942 | */ | 947 | */ |
943 | static int pullup(struct pxa2xx_udc *udc) | 948 | static int pullup(struct pxa25x_udc *udc) |
944 | { | 949 | { |
945 | int is_active = udc->vbus && udc->pullup && !udc->suspended; | 950 | int is_active = udc->vbus && udc->pullup && !udc->suspended; |
946 | DMSG("%s\n", is_active ? "active" : "inactive"); | 951 | DMSG("%s\n", is_active ? "active" : "inactive"); |
@@ -970,11 +975,11 @@ static int pullup(struct pxa2xx_udc *udc) | |||
970 | } | 975 | } |
971 | 976 | ||
972 | /* VBUS reporting logically comes from a transceiver */ | 977 | /* VBUS reporting logically comes from a transceiver */ |
973 | static int pxa2xx_udc_vbus_session(struct usb_gadget *_gadget, int is_active) | 978 | static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active) |
974 | { | 979 | { |
975 | struct pxa2xx_udc *udc; | 980 | struct pxa25x_udc *udc; |
976 | 981 | ||
977 | udc = container_of(_gadget, struct pxa2xx_udc, gadget); | 982 | udc = container_of(_gadget, struct pxa25x_udc, gadget); |
978 | udc->vbus = (is_active != 0); | 983 | udc->vbus = (is_active != 0); |
979 | DMSG("vbus %s\n", is_active ? "supplied" : "inactive"); | 984 | DMSG("vbus %s\n", is_active ? "supplied" : "inactive"); |
980 | pullup(udc); | 985 | pullup(udc); |
@@ -982,11 +987,11 @@ static int pxa2xx_udc_vbus_session(struct usb_gadget *_gadget, int is_active) | |||
982 | } | 987 | } |
983 | 988 | ||
984 | /* drivers may have software control over D+ pullup */ | 989 | /* drivers may have software control over D+ pullup */ |
985 | static int pxa2xx_udc_pullup(struct usb_gadget *_gadget, int is_active) | 990 | static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active) |
986 | { | 991 | { |
987 | struct pxa2xx_udc *udc; | 992 | struct pxa25x_udc *udc; |
988 | 993 | ||
989 | udc = container_of(_gadget, struct pxa2xx_udc, gadget); | 994 | udc = container_of(_gadget, struct pxa25x_udc, gadget); |
990 | 995 | ||
991 | /* not all boards support pullup control */ | 996 | /* not all boards support pullup control */ |
992 | if (!udc->mach->gpio_pullup && !udc->mach->udc_command) | 997 | if (!udc->mach->gpio_pullup && !udc->mach->udc_command) |
@@ -997,11 +1002,11 @@ static int pxa2xx_udc_pullup(struct usb_gadget *_gadget, int is_active) | |||
997 | return 0; | 1002 | return 0; |
998 | } | 1003 | } |
999 | 1004 | ||
1000 | static const struct usb_gadget_ops pxa2xx_udc_ops = { | 1005 | static const struct usb_gadget_ops pxa25x_udc_ops = { |
1001 | .get_frame = pxa2xx_udc_get_frame, | 1006 | .get_frame = pxa25x_udc_get_frame, |
1002 | .wakeup = pxa2xx_udc_wakeup, | 1007 | .wakeup = pxa25x_udc_wakeup, |
1003 | .vbus_session = pxa2xx_udc_vbus_session, | 1008 | .vbus_session = pxa25x_udc_vbus_session, |
1004 | .pullup = pxa2xx_udc_pullup, | 1009 | .pullup = pxa25x_udc_pullup, |
1005 | 1010 | ||
1006 | // .vbus_draw ... boards may consume current from VBUS, up to | 1011 | // .vbus_draw ... boards may consume current from VBUS, up to |
1007 | // 100-500mA based on config. the 500uA suspend ceiling means | 1012 | // 100-500mA based on config. the 500uA suspend ceiling means |
@@ -1015,7 +1020,7 @@ static const struct usb_gadget_ops pxa2xx_udc_ops = { | |||
1015 | static int | 1020 | static int |
1016 | udc_seq_show(struct seq_file *m, void *_d) | 1021 | udc_seq_show(struct seq_file *m, void *_d) |
1017 | { | 1022 | { |
1018 | struct pxa2xx_udc *dev = m->private; | 1023 | struct pxa25x_udc *dev = m->private; |
1019 | unsigned long flags; | 1024 | unsigned long flags; |
1020 | int i; | 1025 | int i; |
1021 | u32 tmp; | 1026 | u32 tmp; |
@@ -1076,8 +1081,8 @@ udc_seq_show(struct seq_file *m, void *_d) | |||
1076 | 1081 | ||
1077 | /* dump endpoint queues */ | 1082 | /* dump endpoint queues */ |
1078 | for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { | 1083 | for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { |
1079 | struct pxa2xx_ep *ep = &dev->ep [i]; | 1084 | struct pxa25x_ep *ep = &dev->ep [i]; |
1080 | struct pxa2xx_request *req; | 1085 | struct pxa25x_request *req; |
1081 | 1086 | ||
1082 | if (i != 0) { | 1087 | if (i != 0) { |
1083 | const struct usb_endpoint_descriptor *desc; | 1088 | const struct usb_endpoint_descriptor *desc; |
@@ -1150,7 +1155,7 @@ static const struct file_operations debug_fops = { | |||
1150 | /* | 1155 | /* |
1151 | * udc_disable - disable USB device controller | 1156 | * udc_disable - disable USB device controller |
1152 | */ | 1157 | */ |
1153 | static void udc_disable(struct pxa2xx_udc *dev) | 1158 | static void udc_disable(struct pxa25x_udc *dev) |
1154 | { | 1159 | { |
1155 | /* block all irqs */ | 1160 | /* block all irqs */ |
1156 | udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM); | 1161 | udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM); |
@@ -1170,7 +1175,7 @@ static void udc_disable(struct pxa2xx_udc *dev) | |||
1170 | /* | 1175 | /* |
1171 | * udc_reinit - initialize software state | 1176 | * udc_reinit - initialize software state |
1172 | */ | 1177 | */ |
1173 | static void udc_reinit(struct pxa2xx_udc *dev) | 1178 | static void udc_reinit(struct pxa25x_udc *dev) |
1174 | { | 1179 | { |
1175 | u32 i; | 1180 | u32 i; |
1176 | 1181 | ||
@@ -1181,7 +1186,7 @@ static void udc_reinit(struct pxa2xx_udc *dev) | |||
1181 | 1186 | ||
1182 | /* basic endpoint records init */ | 1187 | /* basic endpoint records init */ |
1183 | for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { | 1188 | for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { |
1184 | struct pxa2xx_ep *ep = &dev->ep[i]; | 1189 | struct pxa25x_ep *ep = &dev->ep[i]; |
1185 | 1190 | ||
1186 | if (i != 0) | 1191 | if (i != 0) |
1187 | list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list); | 1192 | list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list); |
@@ -1198,7 +1203,7 @@ static void udc_reinit(struct pxa2xx_udc *dev) | |||
1198 | /* until it's enabled, this UDC should be completely invisible | 1203 | /* until it's enabled, this UDC should be completely invisible |
1199 | * to any USB host. | 1204 | * to any USB host. |
1200 | */ | 1205 | */ |
1201 | static void udc_enable (struct pxa2xx_udc *dev) | 1206 | static void udc_enable (struct pxa25x_udc *dev) |
1202 | { | 1207 | { |
1203 | udc_clear_mask_UDCCR(UDCCR_UDE); | 1208 | udc_clear_mask_UDCCR(UDCCR_UDE); |
1204 | 1209 | ||
@@ -1254,7 +1259,7 @@ static void udc_enable (struct pxa2xx_udc *dev) | |||
1254 | */ | 1259 | */ |
1255 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | 1260 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) |
1256 | { | 1261 | { |
1257 | struct pxa2xx_udc *dev = the_controller; | 1262 | struct pxa25x_udc *dev = the_controller; |
1258 | int retval; | 1263 | int retval; |
1259 | 1264 | ||
1260 | if (!driver | 1265 | if (!driver |
@@ -1299,7 +1304,7 @@ fail: | |||
1299 | EXPORT_SYMBOL(usb_gadget_register_driver); | 1304 | EXPORT_SYMBOL(usb_gadget_register_driver); |
1300 | 1305 | ||
1301 | static void | 1306 | static void |
1302 | stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver) | 1307 | stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver) |
1303 | { | 1308 | { |
1304 | int i; | 1309 | int i; |
1305 | 1310 | ||
@@ -1310,7 +1315,7 @@ stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver) | |||
1310 | 1315 | ||
1311 | /* prevent new request submissions, kill any outstanding requests */ | 1316 | /* prevent new request submissions, kill any outstanding requests */ |
1312 | for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { | 1317 | for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { |
1313 | struct pxa2xx_ep *ep = &dev->ep[i]; | 1318 | struct pxa25x_ep *ep = &dev->ep[i]; |
1314 | 1319 | ||
1315 | ep->stopped = 1; | 1320 | ep->stopped = 1; |
1316 | nuke(ep, -ESHUTDOWN); | 1321 | nuke(ep, -ESHUTDOWN); |
@@ -1327,7 +1332,7 @@ stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver) | |||
1327 | 1332 | ||
1328 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | 1333 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) |
1329 | { | 1334 | { |
1330 | struct pxa2xx_udc *dev = the_controller; | 1335 | struct pxa25x_udc *dev = the_controller; |
1331 | 1336 | ||
1332 | if (!dev) | 1337 | if (!dev) |
1333 | return -ENODEV; | 1338 | return -ENODEV; |
@@ -1364,7 +1369,7 @@ EXPORT_SYMBOL(usb_gadget_unregister_driver); | |||
1364 | static irqreturn_t | 1369 | static irqreturn_t |
1365 | lubbock_vbus_irq(int irq, void *_dev) | 1370 | lubbock_vbus_irq(int irq, void *_dev) |
1366 | { | 1371 | { |
1367 | struct pxa2xx_udc *dev = _dev; | 1372 | struct pxa25x_udc *dev = _dev; |
1368 | int vbus; | 1373 | int vbus; |
1369 | 1374 | ||
1370 | dev->stats.irqs++; | 1375 | dev->stats.irqs++; |
@@ -1383,7 +1388,7 @@ lubbock_vbus_irq(int irq, void *_dev) | |||
1383 | return IRQ_NONE; | 1388 | return IRQ_NONE; |
1384 | } | 1389 | } |
1385 | 1390 | ||
1386 | pxa2xx_udc_vbus_session(&dev->gadget, vbus); | 1391 | pxa25x_udc_vbus_session(&dev->gadget, vbus); |
1387 | return IRQ_HANDLED; | 1392 | return IRQ_HANDLED; |
1388 | } | 1393 | } |
1389 | 1394 | ||
@@ -1391,20 +1396,20 @@ lubbock_vbus_irq(int irq, void *_dev) | |||
1391 | 1396 | ||
1392 | static irqreturn_t udc_vbus_irq(int irq, void *_dev) | 1397 | static irqreturn_t udc_vbus_irq(int irq, void *_dev) |
1393 | { | 1398 | { |
1394 | struct pxa2xx_udc *dev = _dev; | 1399 | struct pxa25x_udc *dev = _dev; |
1395 | int vbus = gpio_get_value(dev->mach->gpio_vbus); | 1400 | int vbus = gpio_get_value(dev->mach->gpio_vbus); |
1396 | 1401 | ||
1397 | if (dev->mach->gpio_vbus_inverted) | 1402 | if (dev->mach->gpio_vbus_inverted) |
1398 | vbus = !vbus; | 1403 | vbus = !vbus; |
1399 | 1404 | ||
1400 | pxa2xx_udc_vbus_session(&dev->gadget, vbus); | 1405 | pxa25x_udc_vbus_session(&dev->gadget, vbus); |
1401 | return IRQ_HANDLED; | 1406 | return IRQ_HANDLED; |
1402 | } | 1407 | } |
1403 | 1408 | ||
1404 | 1409 | ||
1405 | /*-------------------------------------------------------------------------*/ | 1410 | /*-------------------------------------------------------------------------*/ |
1406 | 1411 | ||
1407 | static inline void clear_ep_state (struct pxa2xx_udc *dev) | 1412 | static inline void clear_ep_state (struct pxa25x_udc *dev) |
1408 | { | 1413 | { |
1409 | unsigned i; | 1414 | unsigned i; |
1410 | 1415 | ||
@@ -1417,7 +1422,7 @@ static inline void clear_ep_state (struct pxa2xx_udc *dev) | |||
1417 | 1422 | ||
1418 | static void udc_watchdog(unsigned long _dev) | 1423 | static void udc_watchdog(unsigned long _dev) |
1419 | { | 1424 | { |
1420 | struct pxa2xx_udc *dev = (void *)_dev; | 1425 | struct pxa25x_udc *dev = (void *)_dev; |
1421 | 1426 | ||
1422 | local_irq_disable(); | 1427 | local_irq_disable(); |
1423 | if (dev->ep0state == EP0_STALL | 1428 | if (dev->ep0state == EP0_STALL |
@@ -1430,11 +1435,11 @@ static void udc_watchdog(unsigned long _dev) | |||
1430 | local_irq_enable(); | 1435 | local_irq_enable(); |
1431 | } | 1436 | } |
1432 | 1437 | ||
1433 | static void handle_ep0 (struct pxa2xx_udc *dev) | 1438 | static void handle_ep0 (struct pxa25x_udc *dev) |
1434 | { | 1439 | { |
1435 | u32 udccs0 = UDCCS0; | 1440 | u32 udccs0 = UDCCS0; |
1436 | struct pxa2xx_ep *ep = &dev->ep [0]; | 1441 | struct pxa25x_ep *ep = &dev->ep [0]; |
1437 | struct pxa2xx_request *req; | 1442 | struct pxa25x_request *req; |
1438 | union { | 1443 | union { |
1439 | struct usb_ctrlrequest r; | 1444 | struct usb_ctrlrequest r; |
1440 | u8 raw [8]; | 1445 | u8 raw [8]; |
@@ -1444,7 +1449,7 @@ static void handle_ep0 (struct pxa2xx_udc *dev) | |||
1444 | if (list_empty(&ep->queue)) | 1449 | if (list_empty(&ep->queue)) |
1445 | req = NULL; | 1450 | req = NULL; |
1446 | else | 1451 | else |
1447 | req = list_entry(ep->queue.next, struct pxa2xx_request, queue); | 1452 | req = list_entry(ep->queue.next, struct pxa25x_request, queue); |
1448 | 1453 | ||
1449 | /* clear stall status */ | 1454 | /* clear stall status */ |
1450 | if (udccs0 & UDCCS0_SST) { | 1455 | if (udccs0 & UDCCS0_SST) { |
@@ -1654,9 +1659,9 @@ stall: | |||
1654 | USIR0 = USIR0_IR0; | 1659 | USIR0 = USIR0_IR0; |
1655 | } | 1660 | } |
1656 | 1661 | ||
1657 | static void handle_ep(struct pxa2xx_ep *ep) | 1662 | static void handle_ep(struct pxa25x_ep *ep) |
1658 | { | 1663 | { |
1659 | struct pxa2xx_request *req; | 1664 | struct pxa25x_request *req; |
1660 | int is_in = ep->bEndpointAddress & USB_DIR_IN; | 1665 | int is_in = ep->bEndpointAddress & USB_DIR_IN; |
1661 | int completed; | 1666 | int completed; |
1662 | u32 udccs, tmp; | 1667 | u32 udccs, tmp; |
@@ -1665,7 +1670,7 @@ static void handle_ep(struct pxa2xx_ep *ep) | |||
1665 | completed = 0; | 1670 | completed = 0; |
1666 | if (likely (!list_empty(&ep->queue))) | 1671 | if (likely (!list_empty(&ep->queue))) |
1667 | req = list_entry(ep->queue.next, | 1672 | req = list_entry(ep->queue.next, |
1668 | struct pxa2xx_request, queue); | 1673 | struct pxa25x_request, queue); |
1669 | else | 1674 | else |
1670 | req = NULL; | 1675 | req = NULL; |
1671 | 1676 | ||
@@ -1702,16 +1707,16 @@ static void handle_ep(struct pxa2xx_ep *ep) | |||
1702 | } | 1707 | } |
1703 | 1708 | ||
1704 | /* | 1709 | /* |
1705 | * pxa2xx_udc_irq - interrupt handler | 1710 | * pxa25x_udc_irq - interrupt handler |
1706 | * | 1711 | * |
1707 | * avoid delays in ep0 processing. the control handshaking isn't always | 1712 | * avoid delays in ep0 processing. the control handshaking isn't always |
1708 | * under software control (pxa250c0 and the pxa255 are better), and delays | 1713 | * under software control (pxa250c0 and the pxa255 are better), and delays |
1709 | * could cause usb protocol errors. | 1714 | * could cause usb protocol errors. |
1710 | */ | 1715 | */ |
1711 | static irqreturn_t | 1716 | static irqreturn_t |
1712 | pxa2xx_udc_irq(int irq, void *_dev) | 1717 | pxa25x_udc_irq(int irq, void *_dev) |
1713 | { | 1718 | { |
1714 | struct pxa2xx_udc *dev = _dev; | 1719 | struct pxa25x_udc *dev = _dev; |
1715 | int handled; | 1720 | int handled; |
1716 | 1721 | ||
1717 | dev->stats.irqs++; | 1722 | dev->stats.irqs++; |
@@ -1820,9 +1825,9 @@ static void nop_release (struct device *dev) | |||
1820 | * doing it at run-time) to save code, eliminate fault paths, and | 1825 | * doing it at run-time) to save code, eliminate fault paths, and |
1821 | * be more obviously correct. | 1826 | * be more obviously correct. |
1822 | */ | 1827 | */ |
1823 | static struct pxa2xx_udc memory = { | 1828 | static struct pxa25x_udc memory = { |
1824 | .gadget = { | 1829 | .gadget = { |
1825 | .ops = &pxa2xx_udc_ops, | 1830 | .ops = &pxa25x_udc_ops, |
1826 | .ep0 = &memory.ep[0].ep, | 1831 | .ep0 = &memory.ep[0].ep, |
1827 | .name = driver_name, | 1832 | .name = driver_name, |
1828 | .dev = { | 1833 | .dev = { |
@@ -1835,7 +1840,7 @@ static struct pxa2xx_udc memory = { | |||
1835 | .ep[0] = { | 1840 | .ep[0] = { |
1836 | .ep = { | 1841 | .ep = { |
1837 | .name = ep0name, | 1842 | .name = ep0name, |
1838 | .ops = &pxa2xx_ep_ops, | 1843 | .ops = &pxa25x_ep_ops, |
1839 | .maxpacket = EP0_FIFO_SIZE, | 1844 | .maxpacket = EP0_FIFO_SIZE, |
1840 | }, | 1845 | }, |
1841 | .dev = &memory, | 1846 | .dev = &memory, |
@@ -1847,7 +1852,7 @@ static struct pxa2xx_udc memory = { | |||
1847 | .ep[1] = { | 1852 | .ep[1] = { |
1848 | .ep = { | 1853 | .ep = { |
1849 | .name = "ep1in-bulk", | 1854 | .name = "ep1in-bulk", |
1850 | .ops = &pxa2xx_ep_ops, | 1855 | .ops = &pxa25x_ep_ops, |
1851 | .maxpacket = BULK_FIFO_SIZE, | 1856 | .maxpacket = BULK_FIFO_SIZE, |
1852 | }, | 1857 | }, |
1853 | .dev = &memory, | 1858 | .dev = &memory, |
@@ -1860,7 +1865,7 @@ static struct pxa2xx_udc memory = { | |||
1860 | .ep[2] = { | 1865 | .ep[2] = { |
1861 | .ep = { | 1866 | .ep = { |
1862 | .name = "ep2out-bulk", | 1867 | .name = "ep2out-bulk", |
1863 | .ops = &pxa2xx_ep_ops, | 1868 | .ops = &pxa25x_ep_ops, |
1864 | .maxpacket = BULK_FIFO_SIZE, | 1869 | .maxpacket = BULK_FIFO_SIZE, |
1865 | }, | 1870 | }, |
1866 | .dev = &memory, | 1871 | .dev = &memory, |
@@ -1871,11 +1876,11 @@ static struct pxa2xx_udc memory = { | |||
1871 | .reg_ubcr = &UBCR2, | 1876 | .reg_ubcr = &UBCR2, |
1872 | .reg_uddr = &UDDR2, | 1877 | .reg_uddr = &UDDR2, |
1873 | }, | 1878 | }, |
1874 | #ifndef CONFIG_USB_PXA2XX_SMALL | 1879 | #ifndef CONFIG_USB_PXA25X_SMALL |
1875 | .ep[3] = { | 1880 | .ep[3] = { |
1876 | .ep = { | 1881 | .ep = { |
1877 | .name = "ep3in-iso", | 1882 | .name = "ep3in-iso", |
1878 | .ops = &pxa2xx_ep_ops, | 1883 | .ops = &pxa25x_ep_ops, |
1879 | .maxpacket = ISO_FIFO_SIZE, | 1884 | .maxpacket = ISO_FIFO_SIZE, |
1880 | }, | 1885 | }, |
1881 | .dev = &memory, | 1886 | .dev = &memory, |
@@ -1888,7 +1893,7 @@ static struct pxa2xx_udc memory = { | |||
1888 | .ep[4] = { | 1893 | .ep[4] = { |
1889 | .ep = { | 1894 | .ep = { |
1890 | .name = "ep4out-iso", | 1895 | .name = "ep4out-iso", |
1891 | .ops = &pxa2xx_ep_ops, | 1896 | .ops = &pxa25x_ep_ops, |
1892 | .maxpacket = ISO_FIFO_SIZE, | 1897 | .maxpacket = ISO_FIFO_SIZE, |
1893 | }, | 1898 | }, |
1894 | .dev = &memory, | 1899 | .dev = &memory, |
@@ -1902,7 +1907,7 @@ static struct pxa2xx_udc memory = { | |||
1902 | .ep[5] = { | 1907 | .ep[5] = { |
1903 | .ep = { | 1908 | .ep = { |
1904 | .name = "ep5in-int", | 1909 | .name = "ep5in-int", |
1905 | .ops = &pxa2xx_ep_ops, | 1910 | .ops = &pxa25x_ep_ops, |
1906 | .maxpacket = INT_FIFO_SIZE, | 1911 | .maxpacket = INT_FIFO_SIZE, |
1907 | }, | 1912 | }, |
1908 | .dev = &memory, | 1913 | .dev = &memory, |
@@ -1917,7 +1922,7 @@ static struct pxa2xx_udc memory = { | |||
1917 | .ep[6] = { | 1922 | .ep[6] = { |
1918 | .ep = { | 1923 | .ep = { |
1919 | .name = "ep6in-bulk", | 1924 | .name = "ep6in-bulk", |
1920 | .ops = &pxa2xx_ep_ops, | 1925 | .ops = &pxa25x_ep_ops, |
1921 | .maxpacket = BULK_FIFO_SIZE, | 1926 | .maxpacket = BULK_FIFO_SIZE, |
1922 | }, | 1927 | }, |
1923 | .dev = &memory, | 1928 | .dev = &memory, |
@@ -1930,7 +1935,7 @@ static struct pxa2xx_udc memory = { | |||
1930 | .ep[7] = { | 1935 | .ep[7] = { |
1931 | .ep = { | 1936 | .ep = { |
1932 | .name = "ep7out-bulk", | 1937 | .name = "ep7out-bulk", |
1933 | .ops = &pxa2xx_ep_ops, | 1938 | .ops = &pxa25x_ep_ops, |
1934 | .maxpacket = BULK_FIFO_SIZE, | 1939 | .maxpacket = BULK_FIFO_SIZE, |
1935 | }, | 1940 | }, |
1936 | .dev = &memory, | 1941 | .dev = &memory, |
@@ -1944,7 +1949,7 @@ static struct pxa2xx_udc memory = { | |||
1944 | .ep[8] = { | 1949 | .ep[8] = { |
1945 | .ep = { | 1950 | .ep = { |
1946 | .name = "ep8in-iso", | 1951 | .name = "ep8in-iso", |
1947 | .ops = &pxa2xx_ep_ops, | 1952 | .ops = &pxa25x_ep_ops, |
1948 | .maxpacket = ISO_FIFO_SIZE, | 1953 | .maxpacket = ISO_FIFO_SIZE, |
1949 | }, | 1954 | }, |
1950 | .dev = &memory, | 1955 | .dev = &memory, |
@@ -1957,7 +1962,7 @@ static struct pxa2xx_udc memory = { | |||
1957 | .ep[9] = { | 1962 | .ep[9] = { |
1958 | .ep = { | 1963 | .ep = { |
1959 | .name = "ep9out-iso", | 1964 | .name = "ep9out-iso", |
1960 | .ops = &pxa2xx_ep_ops, | 1965 | .ops = &pxa25x_ep_ops, |
1961 | .maxpacket = ISO_FIFO_SIZE, | 1966 | .maxpacket = ISO_FIFO_SIZE, |
1962 | }, | 1967 | }, |
1963 | .dev = &memory, | 1968 | .dev = &memory, |
@@ -1971,7 +1976,7 @@ static struct pxa2xx_udc memory = { | |||
1971 | .ep[10] = { | 1976 | .ep[10] = { |
1972 | .ep = { | 1977 | .ep = { |
1973 | .name = "ep10in-int", | 1978 | .name = "ep10in-int", |
1974 | .ops = &pxa2xx_ep_ops, | 1979 | .ops = &pxa25x_ep_ops, |
1975 | .maxpacket = INT_FIFO_SIZE, | 1980 | .maxpacket = INT_FIFO_SIZE, |
1976 | }, | 1981 | }, |
1977 | .dev = &memory, | 1982 | .dev = &memory, |
@@ -1986,7 +1991,7 @@ static struct pxa2xx_udc memory = { | |||
1986 | .ep[11] = { | 1991 | .ep[11] = { |
1987 | .ep = { | 1992 | .ep = { |
1988 | .name = "ep11in-bulk", | 1993 | .name = "ep11in-bulk", |
1989 | .ops = &pxa2xx_ep_ops, | 1994 | .ops = &pxa25x_ep_ops, |
1990 | .maxpacket = BULK_FIFO_SIZE, | 1995 | .maxpacket = BULK_FIFO_SIZE, |
1991 | }, | 1996 | }, |
1992 | .dev = &memory, | 1997 | .dev = &memory, |
@@ -1999,7 +2004,7 @@ static struct pxa2xx_udc memory = { | |||
1999 | .ep[12] = { | 2004 | .ep[12] = { |
2000 | .ep = { | 2005 | .ep = { |
2001 | .name = "ep12out-bulk", | 2006 | .name = "ep12out-bulk", |
2002 | .ops = &pxa2xx_ep_ops, | 2007 | .ops = &pxa25x_ep_ops, |
2003 | .maxpacket = BULK_FIFO_SIZE, | 2008 | .maxpacket = BULK_FIFO_SIZE, |
2004 | }, | 2009 | }, |
2005 | .dev = &memory, | 2010 | .dev = &memory, |
@@ -2013,7 +2018,7 @@ static struct pxa2xx_udc memory = { | |||
2013 | .ep[13] = { | 2018 | .ep[13] = { |
2014 | .ep = { | 2019 | .ep = { |
2015 | .name = "ep13in-iso", | 2020 | .name = "ep13in-iso", |
2016 | .ops = &pxa2xx_ep_ops, | 2021 | .ops = &pxa25x_ep_ops, |
2017 | .maxpacket = ISO_FIFO_SIZE, | 2022 | .maxpacket = ISO_FIFO_SIZE, |
2018 | }, | 2023 | }, |
2019 | .dev = &memory, | 2024 | .dev = &memory, |
@@ -2026,7 +2031,7 @@ static struct pxa2xx_udc memory = { | |||
2026 | .ep[14] = { | 2031 | .ep[14] = { |
2027 | .ep = { | 2032 | .ep = { |
2028 | .name = "ep14out-iso", | 2033 | .name = "ep14out-iso", |
2029 | .ops = &pxa2xx_ep_ops, | 2034 | .ops = &pxa25x_ep_ops, |
2030 | .maxpacket = ISO_FIFO_SIZE, | 2035 | .maxpacket = ISO_FIFO_SIZE, |
2031 | }, | 2036 | }, |
2032 | .dev = &memory, | 2037 | .dev = &memory, |
@@ -2040,7 +2045,7 @@ static struct pxa2xx_udc memory = { | |||
2040 | .ep[15] = { | 2045 | .ep[15] = { |
2041 | .ep = { | 2046 | .ep = { |
2042 | .name = "ep15in-int", | 2047 | .name = "ep15in-int", |
2043 | .ops = &pxa2xx_ep_ops, | 2048 | .ops = &pxa25x_ep_ops, |
2044 | .maxpacket = INT_FIFO_SIZE, | 2049 | .maxpacket = INT_FIFO_SIZE, |
2045 | }, | 2050 | }, |
2046 | .dev = &memory, | 2051 | .dev = &memory, |
@@ -2050,7 +2055,7 @@ static struct pxa2xx_udc memory = { | |||
2050 | .reg_udccs = &UDCCS15, | 2055 | .reg_udccs = &UDCCS15, |
2051 | .reg_uddr = &UDDR15, | 2056 | .reg_uddr = &UDDR15, |
2052 | }, | 2057 | }, |
2053 | #endif /* !CONFIG_USB_PXA2XX_SMALL */ | 2058 | #endif /* !CONFIG_USB_PXA25X_SMALL */ |
2054 | }; | 2059 | }; |
2055 | 2060 | ||
2056 | #define CP15R0_VENDOR_MASK 0xffffe000 | 2061 | #define CP15R0_VENDOR_MASK 0xffffe000 |
@@ -2090,9 +2095,9 @@ static struct pxa2xx_udc memory = { | |||
2090 | /* | 2095 | /* |
2091 | * probe - binds to the platform device | 2096 | * probe - binds to the platform device |
2092 | */ | 2097 | */ |
2093 | static int __init pxa2xx_udc_probe(struct platform_device *pdev) | 2098 | static int __init pxa25x_udc_probe(struct platform_device *pdev) |
2094 | { | 2099 | { |
2095 | struct pxa2xx_udc *dev = &memory; | 2100 | struct pxa25x_udc *dev = &memory; |
2096 | int retval, vbus_irq, irq; | 2101 | int retval, vbus_irq, irq; |
2097 | u32 chiprev; | 2102 | u32 chiprev; |
2098 | 2103 | ||
@@ -2155,7 +2160,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev) | |||
2155 | 2160 | ||
2156 | if (dev->mach->gpio_vbus) { | 2161 | if (dev->mach->gpio_vbus) { |
2157 | if ((retval = gpio_request(dev->mach->gpio_vbus, | 2162 | if ((retval = gpio_request(dev->mach->gpio_vbus, |
2158 | "pxa2xx_udc GPIO VBUS"))) { | 2163 | "pxa25x_udc GPIO VBUS"))) { |
2159 | dev_dbg(&pdev->dev, | 2164 | dev_dbg(&pdev->dev, |
2160 | "can't get vbus gpio %d, err: %d\n", | 2165 | "can't get vbus gpio %d, err: %d\n", |
2161 | dev->mach->gpio_vbus, retval); | 2166 | dev->mach->gpio_vbus, retval); |
@@ -2168,7 +2173,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev) | |||
2168 | 2173 | ||
2169 | if (dev->mach->gpio_pullup) { | 2174 | if (dev->mach->gpio_pullup) { |
2170 | if ((retval = gpio_request(dev->mach->gpio_pullup, | 2175 | if ((retval = gpio_request(dev->mach->gpio_pullup, |
2171 | "pca2xx_udc GPIO PULLUP"))) { | 2176 | "pca25x_udc GPIO PULLUP"))) { |
2172 | dev_dbg(&pdev->dev, | 2177 | dev_dbg(&pdev->dev, |
2173 | "can't get pullup gpio %d, err: %d\n", | 2178 | "can't get pullup gpio %d, err: %d\n", |
2174 | dev->mach->gpio_pullup, retval); | 2179 | dev->mach->gpio_pullup, retval); |
@@ -2194,7 +2199,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev) | |||
2194 | dev->vbus = is_vbus_present(); | 2199 | dev->vbus = is_vbus_present(); |
2195 | 2200 | ||
2196 | /* irq setup after old hardware state is cleaned up */ | 2201 | /* irq setup after old hardware state is cleaned up */ |
2197 | retval = request_irq(irq, pxa2xx_udc_irq, | 2202 | retval = request_irq(irq, pxa25x_udc_irq, |
2198 | IRQF_DISABLED, driver_name, dev); | 2203 | IRQF_DISABLED, driver_name, dev); |
2199 | if (retval != 0) { | 2204 | if (retval != 0) { |
2200 | pr_err("%s: can't get irq %d, err %d\n", | 2205 | pr_err("%s: can't get irq %d, err %d\n", |
@@ -2260,14 +2265,14 @@ lubbock_fail0: | |||
2260 | return retval; | 2265 | return retval; |
2261 | } | 2266 | } |
2262 | 2267 | ||
2263 | static void pxa2xx_udc_shutdown(struct platform_device *_dev) | 2268 | static void pxa25x_udc_shutdown(struct platform_device *_dev) |
2264 | { | 2269 | { |
2265 | pullup_off(); | 2270 | pullup_off(); |
2266 | } | 2271 | } |
2267 | 2272 | ||
2268 | static int __exit pxa2xx_udc_remove(struct platform_device *pdev) | 2273 | static int __exit pxa25x_udc_remove(struct platform_device *pdev) |
2269 | { | 2274 | { |
2270 | struct pxa2xx_udc *dev = platform_get_drvdata(pdev); | 2275 | struct pxa25x_udc *dev = platform_get_drvdata(pdev); |
2271 | 2276 | ||
2272 | if (dev->driver) | 2277 | if (dev->driver) |
2273 | return -EBUSY; | 2278 | return -EBUSY; |
@@ -2317,9 +2322,9 @@ static int __exit pxa2xx_udc_remove(struct platform_device *pdev) | |||
2317 | * VBUS IRQs should probably be ignored so that the PXA device just acts | 2322 | * VBUS IRQs should probably be ignored so that the PXA device just acts |
2318 | * "dead" to USB hosts until system resume. | 2323 | * "dead" to USB hosts until system resume. |
2319 | */ | 2324 | */ |
2320 | static int pxa2xx_udc_suspend(struct platform_device *dev, pm_message_t state) | 2325 | static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state) |
2321 | { | 2326 | { |
2322 | struct pxa2xx_udc *udc = platform_get_drvdata(dev); | 2327 | struct pxa25x_udc *udc = platform_get_drvdata(dev); |
2323 | unsigned long flags; | 2328 | unsigned long flags; |
2324 | 2329 | ||
2325 | if (!udc->mach->gpio_pullup && !udc->mach->udc_command) | 2330 | if (!udc->mach->gpio_pullup && !udc->mach->udc_command) |
@@ -2333,9 +2338,9 @@ static int pxa2xx_udc_suspend(struct platform_device *dev, pm_message_t state) | |||
2333 | return 0; | 2338 | return 0; |
2334 | } | 2339 | } |
2335 | 2340 | ||
2336 | static int pxa2xx_udc_resume(struct platform_device *dev) | 2341 | static int pxa25x_udc_resume(struct platform_device *dev) |
2337 | { | 2342 | { |
2338 | struct pxa2xx_udc *udc = platform_get_drvdata(dev); | 2343 | struct pxa25x_udc *udc = platform_get_drvdata(dev); |
2339 | unsigned long flags; | 2344 | unsigned long flags; |
2340 | 2345 | ||
2341 | udc->suspended = 0; | 2346 | udc->suspended = 0; |
@@ -2347,27 +2352,27 @@ static int pxa2xx_udc_resume(struct platform_device *dev) | |||
2347 | } | 2352 | } |
2348 | 2353 | ||
2349 | #else | 2354 | #else |
2350 | #define pxa2xx_udc_suspend NULL | 2355 | #define pxa25x_udc_suspend NULL |
2351 | #define pxa2xx_udc_resume NULL | 2356 | #define pxa25x_udc_resume NULL |
2352 | #endif | 2357 | #endif |
2353 | 2358 | ||
2354 | /*-------------------------------------------------------------------------*/ | 2359 | /*-------------------------------------------------------------------------*/ |
2355 | 2360 | ||
2356 | static struct platform_driver udc_driver = { | 2361 | static struct platform_driver udc_driver = { |
2357 | .shutdown = pxa2xx_udc_shutdown, | 2362 | .shutdown = pxa25x_udc_shutdown, |
2358 | .remove = __exit_p(pxa2xx_udc_remove), | 2363 | .remove = __exit_p(pxa25x_udc_remove), |
2359 | .suspend = pxa2xx_udc_suspend, | 2364 | .suspend = pxa25x_udc_suspend, |
2360 | .resume = pxa2xx_udc_resume, | 2365 | .resume = pxa25x_udc_resume, |
2361 | .driver = { | 2366 | .driver = { |
2362 | .owner = THIS_MODULE, | 2367 | .owner = THIS_MODULE, |
2363 | .name = "pxa2xx-udc", | 2368 | .name = "pxa25x-udc", |
2364 | }, | 2369 | }, |
2365 | }; | 2370 | }; |
2366 | 2371 | ||
2367 | static int __init udc_init(void) | 2372 | static int __init udc_init(void) |
2368 | { | 2373 | { |
2369 | pr_info("%s: version %s\n", driver_name, DRIVER_VERSION); | 2374 | pr_info("%s: version %s\n", driver_name, DRIVER_VERSION); |
2370 | return platform_driver_probe(&udc_driver, pxa2xx_udc_probe); | 2375 | return platform_driver_probe(&udc_driver, pxa25x_udc_probe); |
2371 | } | 2376 | } |
2372 | module_init(udc_init); | 2377 | module_init(udc_init); |
2373 | 2378 | ||
@@ -2380,4 +2385,4 @@ module_exit(udc_exit); | |||
2380 | MODULE_DESCRIPTION(DRIVER_DESC); | 2385 | MODULE_DESCRIPTION(DRIVER_DESC); |
2381 | MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell"); | 2386 | MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell"); |
2382 | MODULE_LICENSE("GPL"); | 2387 | MODULE_LICENSE("GPL"); |
2383 | MODULE_ALIAS("platform:pxa2xx-udc"); | 2388 | MODULE_ALIAS("platform:pxa25x-udc"); |
diff --git a/drivers/usb/gadget/pxa2xx_udc.h b/drivers/usb/gadget/pxa25x_udc.h index e2c19e88c875..4d11ece7c95f 100644 --- a/drivers/usb/gadget/pxa2xx_udc.h +++ b/drivers/usb/gadget/pxa25x_udc.h | |||
@@ -1,6 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/drivers/usb/gadget/pxa2xx_udc.h | 2 | * Intel PXA25x on-chip full speed USB device controller |
3 | * Intel PXA2xx on-chip full speed USB device controller | ||
4 | * | 3 | * |
5 | * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix | 4 | * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix |
6 | * Copyright (C) 2003 David Brownell | 5 | * Copyright (C) 2003 David Brownell |
@@ -21,14 +20,14 @@ | |||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
22 | */ | 21 | */ |
23 | 22 | ||
24 | #ifndef __LINUX_USB_GADGET_PXA2XX_H | 23 | #ifndef __LINUX_USB_GADGET_PXA25X_H |
25 | #define __LINUX_USB_GADGET_PXA2XX_H | 24 | #define __LINUX_USB_GADGET_PXA25X_H |
26 | 25 | ||
27 | #include <linux/types.h> | 26 | #include <linux/types.h> |
28 | 27 | ||
29 | /*-------------------------------------------------------------------------*/ | 28 | /*-------------------------------------------------------------------------*/ |
30 | 29 | ||
31 | /* pxa2xx has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */ | 30 | /* pxa25x has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */ |
32 | #define UFNRH_SIR (1 << 7) /* SOF interrupt request */ | 31 | #define UFNRH_SIR (1 << 7) /* SOF interrupt request */ |
33 | #define UFNRH_SIM (1 << 6) /* SOF interrupt mask */ | 32 | #define UFNRH_SIM (1 << 6) /* SOF interrupt mask */ |
34 | #define UFNRH_IPE14 (1 << 5) /* ISO packet error, ep14 */ | 33 | #define UFNRH_IPE14 (1 << 5) /* ISO packet error, ep14 */ |
@@ -45,11 +44,11 @@ | |||
45 | 44 | ||
46 | /*-------------------------------------------------------------------------*/ | 45 | /*-------------------------------------------------------------------------*/ |
47 | 46 | ||
48 | struct pxa2xx_udc; | 47 | struct pxa25x_udc; |
49 | 48 | ||
50 | struct pxa2xx_ep { | 49 | struct pxa25x_ep { |
51 | struct usb_ep ep; | 50 | struct usb_ep ep; |
52 | struct pxa2xx_udc *dev; | 51 | struct pxa25x_udc *dev; |
53 | 52 | ||
54 | const struct usb_endpoint_descriptor *desc; | 53 | const struct usb_endpoint_descriptor *desc; |
55 | struct list_head queue; | 54 | struct list_head queue; |
@@ -72,7 +71,7 @@ struct pxa2xx_ep { | |||
72 | volatile u32 *reg_uddr; | 71 | volatile u32 *reg_uddr; |
73 | }; | 72 | }; |
74 | 73 | ||
75 | struct pxa2xx_request { | 74 | struct pxa25x_request { |
76 | struct usb_request req; | 75 | struct usb_request req; |
77 | struct list_head queue; | 76 | struct list_head queue; |
78 | }; | 77 | }; |
@@ -98,7 +97,7 @@ struct udc_stats { | |||
98 | unsigned long irqs; | 97 | unsigned long irqs; |
99 | }; | 98 | }; |
100 | 99 | ||
101 | #ifdef CONFIG_USB_PXA2XX_SMALL | 100 | #ifdef CONFIG_USB_PXA25X_SMALL |
102 | /* when memory's tight, SMALL config saves code+data. */ | 101 | /* when memory's tight, SMALL config saves code+data. */ |
103 | #define PXA_UDC_NUM_ENDPOINTS 3 | 102 | #define PXA_UDC_NUM_ENDPOINTS 3 |
104 | #endif | 103 | #endif |
@@ -107,7 +106,7 @@ struct udc_stats { | |||
107 | #define PXA_UDC_NUM_ENDPOINTS 16 | 106 | #define PXA_UDC_NUM_ENDPOINTS 16 |
108 | #endif | 107 | #endif |
109 | 108 | ||
110 | struct pxa2xx_udc { | 109 | struct pxa25x_udc { |
111 | struct usb_gadget gadget; | 110 | struct usb_gadget gadget; |
112 | struct usb_gadget_driver *driver; | 111 | struct usb_gadget_driver *driver; |
113 | 112 | ||
@@ -130,7 +129,7 @@ struct pxa2xx_udc { | |||
130 | struct clk *clk; | 129 | struct clk *clk; |
131 | struct pxa2xx_udc_mach_info *mach; | 130 | struct pxa2xx_udc_mach_info *mach; |
132 | u64 dma_mask; | 131 | u64 dma_mask; |
133 | struct pxa2xx_ep ep [PXA_UDC_NUM_ENDPOINTS]; | 132 | struct pxa25x_ep ep [PXA_UDC_NUM_ENDPOINTS]; |
134 | 133 | ||
135 | #ifdef CONFIG_USB_GADGET_DEBUG_FS | 134 | #ifdef CONFIG_USB_GADGET_DEBUG_FS |
136 | struct dentry *debugfs_udc; | 135 | struct dentry *debugfs_udc; |
@@ -144,7 +143,7 @@ struct pxa2xx_udc { | |||
144 | /* lubbock can also report usb connect/disconnect irqs */ | 143 | /* lubbock can also report usb connect/disconnect irqs */ |
145 | #endif | 144 | #endif |
146 | 145 | ||
147 | static struct pxa2xx_udc *the_controller; | 146 | static struct pxa25x_udc *the_controller; |
148 | 147 | ||
149 | /*-------------------------------------------------------------------------*/ | 148 | /*-------------------------------------------------------------------------*/ |
150 | 149 | ||
@@ -209,7 +208,7 @@ dump_udccs0(const char *label) | |||
209 | } | 208 | } |
210 | 209 | ||
211 | static void __maybe_unused | 210 | static void __maybe_unused |
212 | dump_state(struct pxa2xx_udc *dev) | 211 | dump_state(struct pxa25x_udc *dev) |
213 | { | 212 | { |
214 | u32 tmp; | 213 | u32 tmp; |
215 | unsigned i; | 214 | unsigned i; |
@@ -264,4 +263,4 @@ dump_state(struct pxa2xx_udc *dev) | |||
264 | #define INFO(stuff...) pr_info("udc: " stuff) | 263 | #define INFO(stuff...) pr_info("udc: " stuff) |
265 | 264 | ||
266 | 265 | ||
267 | #endif /* __LINUX_USB_GADGET_PXA2XX_H */ | 266 | #endif /* __LINUX_USB_GADGET_PXA25X_H */ |
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c index e02bfd4df3a6..9c0e82ec5c43 100644 --- a/drivers/usb/gadget/pxa27x_udc.c +++ b/drivers/usb/gadget/pxa27x_udc.c | |||
@@ -38,7 +38,7 @@ | |||
38 | #include <linux/usb.h> | 38 | #include <linux/usb.h> |
39 | #include <linux/usb/ch9.h> | 39 | #include <linux/usb/ch9.h> |
40 | #include <linux/usb/gadget.h> | 40 | #include <linux/usb/gadget.h> |
41 | 41 | #include <asm/arch/pxa2xx-regs.h> /* FIXME: for PSSR */ | |
42 | #include <asm/arch/udc.h> | 42 | #include <asm/arch/udc.h> |
43 | 43 | ||
44 | #include "pxa27x_udc.h" | 44 | #include "pxa27x_udc.h" |
@@ -2360,18 +2360,19 @@ static int pxa_udc_resume(struct platform_device *_dev) | |||
2360 | * Software must configure the USB OTG pad, UDC, and UHC | 2360 | * Software must configure the USB OTG pad, UDC, and UHC |
2361 | * to the state they were in before entering sleep mode. | 2361 | * to the state they were in before entering sleep mode. |
2362 | */ | 2362 | */ |
2363 | PSSR |= PSSR_OTGPH; | 2363 | if (cpu_is_pxa27x()) |
2364 | PSSR |= PSSR_OTGPH; | ||
2364 | 2365 | ||
2365 | return 0; | 2366 | return 0; |
2366 | } | 2367 | } |
2367 | #endif | 2368 | #endif |
2368 | 2369 | ||
2369 | /* work with hotplug and coldplug */ | 2370 | /* work with hotplug and coldplug */ |
2370 | MODULE_ALIAS("platform:pxa2xx-udc"); | 2371 | MODULE_ALIAS("platform:pxa27x-udc"); |
2371 | 2372 | ||
2372 | static struct platform_driver udc_driver = { | 2373 | static struct platform_driver udc_driver = { |
2373 | .driver = { | 2374 | .driver = { |
2374 | .name = "pxa2xx-udc", | 2375 | .name = "pxa27x-udc", |
2375 | .owner = THIS_MODULE, | 2376 | .owner = THIS_MODULE, |
2376 | }, | 2377 | }, |
2377 | .remove = __exit_p(pxa_udc_remove), | 2378 | .remove = __exit_p(pxa_udc_remove), |
diff --git a/drivers/usb/gadget/pxa27x_udc.h b/drivers/usb/gadget/pxa27x_udc.h index 97453db924ff..1d1b7936ee11 100644 --- a/drivers/usb/gadget/pxa27x_udc.h +++ b/drivers/usb/gadget/pxa27x_udc.h | |||
@@ -484,12 +484,4 @@ static inline struct pxa_udc *to_gadget_udc(struct usb_gadget *gadget) | |||
484 | #define ep_warn(ep, fmt, arg...) \ | 484 | #define ep_warn(ep, fmt, arg...) \ |
485 | dev_warn(ep->dev->dev, "%s:%s:" fmt, EPNAME(ep), __func__, ## arg) | 485 | dev_warn(ep->dev->dev, "%s:%s:" fmt, EPNAME(ep), __func__, ## arg) |
486 | 486 | ||
487 | /* | ||
488 | * Cannot include pxa-regs.h, as register names are similar. | ||
489 | * So PSSR is redefined here. This should be removed once UDC registers will | ||
490 | * be gone from pxa-regs.h. | ||
491 | */ | ||
492 | #define PSSR __REG(0x40F00004) /* Power Manager Sleep Status */ | ||
493 | #define PSSR_OTGPH (1 << 6) /* OTG Peripheral Hold */ | ||
494 | |||
495 | #endif /* __LINUX_USB_GADGET_PXA27X_H */ | 487 | #endif /* __LINUX_USB_GADGET_PXA27X_H */ |
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c index 70b0d4b459e7..08b27d6bbd43 100644 --- a/drivers/usb/host/ohci-pxa27x.c +++ b/drivers/usb/host/ohci-pxa27x.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
28 | #include <asm/hardware.h> | 28 | #include <asm/hardware.h> |
29 | #include <asm/arch/pxa-regs.h> | 29 | #include <asm/arch/pxa-regs.h> |
30 | #include <asm/arch/pxa2xx-regs.h> /* FIXME: for PSSR */ | ||
30 | #include <asm/arch/ohci.h> | 31 | #include <asm/arch/ohci.h> |
31 | 32 | ||
32 | #define PXA_UHC_MAX_PORTNUM 3 | 33 | #define PXA_UHC_MAX_PORTNUM 3 |
@@ -104,7 +105,7 @@ static int pxa27x_start_hc(struct device *dev) | |||
104 | UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE); | 105 | UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE); |
105 | 106 | ||
106 | /* Clear any OTG Pin Hold */ | 107 | /* Clear any OTG Pin Hold */ |
107 | if (PSSR & PSSR_OTGPH) | 108 | if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH)) |
108 | PSSR |= PSSR_OTGPH; | 109 | PSSR |= PSSR_OTGPH; |
109 | 110 | ||
110 | return 0; | 111 | return 0; |
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index dcd8073c2369..30bf7f2f1635 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig | |||
@@ -112,3 +112,10 @@ config BACKLIGHT_CARILLO_RANCH | |||
112 | help | 112 | help |
113 | If you have a Intel LE80578 (Carillo Ranch) say Y to enable the | 113 | If you have a Intel LE80578 (Carillo Ranch) say Y to enable the |
114 | backlight driver. | 114 | backlight driver. |
115 | |||
116 | config BACKLIGHT_PWM | ||
117 | tristate "Generic PWM based Backlight Driver" | ||
118 | depends on BACKLIGHT_CLASS_DEVICE && HAVE_PWM | ||
119 | help | ||
120 | If you have a LCD backlight adjustable by PWM, say Y to enable | ||
121 | this driver. | ||
diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index 33f6c7cecc73..b51a7cd12500 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile | |||
@@ -10,3 +10,4 @@ obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o | |||
10 | obj-$(CONFIG_BACKLIGHT_OMAP1) += omap1_bl.o | 10 | obj-$(CONFIG_BACKLIGHT_OMAP1) += omap1_bl.o |
11 | obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o | 11 | obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o |
12 | obj-$(CONFIG_BACKLIGHT_CARILLO_RANCH) += cr_bllcd.o | 12 | obj-$(CONFIG_BACKLIGHT_CARILLO_RANCH) += cr_bllcd.o |
13 | obj-$(CONFIG_BACKLIGHT_PWM) += pwm_bl.o | ||
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c new file mode 100644 index 000000000000..6338d0e2fe07 --- /dev/null +++ b/drivers/video/backlight/pwm_bl.c | |||
@@ -0,0 +1,185 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/backlight/pwm_bl.c | ||
3 | * | ||
4 | * simple PWM based backlight control, board code has to setup | ||
5 | * 1) pin configuration so PWM waveforms can output | ||
6 | * 2) platform_data casts to the PWM id (0/1/2/3 on PXA) | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/fb.h> | ||
18 | #include <linux/backlight.h> | ||
19 | #include <linux/err.h> | ||
20 | #include <linux/pwm.h> | ||
21 | #include <linux/pwm_backlight.h> | ||
22 | |||
23 | struct pwm_bl_data { | ||
24 | struct pwm_device *pwm; | ||
25 | unsigned int period; | ||
26 | int (*notify)(int brightness); | ||
27 | }; | ||
28 | |||
29 | static int pwm_backlight_update_status(struct backlight_device *bl) | ||
30 | { | ||
31 | struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev); | ||
32 | int brightness = bl->props.brightness; | ||
33 | int max = bl->props.max_brightness; | ||
34 | |||
35 | if (bl->props.power != FB_BLANK_UNBLANK) | ||
36 | brightness = 0; | ||
37 | |||
38 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | ||
39 | brightness = 0; | ||
40 | |||
41 | if (pb->notify) | ||
42 | brightness = pb->notify(brightness); | ||
43 | |||
44 | if (brightness == 0) { | ||
45 | pwm_config(pb->pwm, 0, pb->period); | ||
46 | pwm_disable(pb->pwm); | ||
47 | } else { | ||
48 | pwm_config(pb->pwm, brightness * pb->period / max, pb->period); | ||
49 | pwm_enable(pb->pwm); | ||
50 | } | ||
51 | return 0; | ||
52 | } | ||
53 | |||
54 | static int pwm_backlight_get_brightness(struct backlight_device *bl) | ||
55 | { | ||
56 | return bl->props.brightness; | ||
57 | } | ||
58 | |||
59 | static struct backlight_ops pwm_backlight_ops = { | ||
60 | .update_status = pwm_backlight_update_status, | ||
61 | .get_brightness = pwm_backlight_get_brightness, | ||
62 | }; | ||
63 | |||
64 | static int pwm_backlight_probe(struct platform_device *pdev) | ||
65 | { | ||
66 | struct platform_pwm_backlight_data *data = pdev->dev.platform_data; | ||
67 | struct backlight_device *bl; | ||
68 | struct pwm_bl_data *pb; | ||
69 | int ret; | ||
70 | |||
71 | if (!data) | ||
72 | return -EINVAL; | ||
73 | |||
74 | if (data->init) { | ||
75 | ret = data->init(&pdev->dev); | ||
76 | if (ret < 0) | ||
77 | return ret; | ||
78 | } | ||
79 | |||
80 | pb = kzalloc(sizeof(*pb), GFP_KERNEL); | ||
81 | if (!pb) { | ||
82 | ret = -ENOMEM; | ||
83 | goto err_alloc; | ||
84 | } | ||
85 | |||
86 | pb->period = data->pwm_period_ns; | ||
87 | pb->notify = data->notify; | ||
88 | |||
89 | pb->pwm = pwm_request(data->pwm_id, "backlight"); | ||
90 | if (IS_ERR(pb->pwm)) { | ||
91 | dev_err(&pdev->dev, "unable to request PWM for backlight\n"); | ||
92 | ret = PTR_ERR(pb->pwm); | ||
93 | goto err_pwm; | ||
94 | } | ||
95 | |||
96 | bl = backlight_device_register(pdev->name, &pdev->dev, | ||
97 | pb, &pwm_backlight_ops); | ||
98 | if (IS_ERR(bl)) { | ||
99 | dev_err(&pdev->dev, "failed to register backlight\n"); | ||
100 | ret = PTR_ERR(bl); | ||
101 | goto err_bl; | ||
102 | } | ||
103 | |||
104 | bl->props.max_brightness = data->max_brightness; | ||
105 | bl->props.brightness = data->dft_brightness; | ||
106 | backlight_update_status(bl); | ||
107 | |||
108 | platform_set_drvdata(pdev, bl); | ||
109 | return 0; | ||
110 | |||
111 | err_bl: | ||
112 | pwm_free(pb->pwm); | ||
113 | err_pwm: | ||
114 | kfree(pb); | ||
115 | err_alloc: | ||
116 | if (data->exit) | ||
117 | data->exit(&pdev->dev); | ||
118 | return ret; | ||
119 | } | ||
120 | |||
121 | static int pwm_backlight_remove(struct platform_device *pdev) | ||
122 | { | ||
123 | struct platform_pwm_backlight_data *data = pdev->dev.platform_data; | ||
124 | struct backlight_device *bl = platform_get_drvdata(pdev); | ||
125 | struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev); | ||
126 | |||
127 | backlight_device_unregister(bl); | ||
128 | pwm_config(pb->pwm, 0, pb->period); | ||
129 | pwm_disable(pb->pwm); | ||
130 | pwm_free(pb->pwm); | ||
131 | kfree(pb); | ||
132 | if (data->exit) | ||
133 | data->exit(&pdev->dev); | ||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | #ifdef CONFIG_PM | ||
138 | static int pwm_backlight_suspend(struct platform_device *pdev, | ||
139 | pm_message_t state) | ||
140 | { | ||
141 | struct backlight_device *bl = platform_get_drvdata(pdev); | ||
142 | struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev); | ||
143 | |||
144 | pwm_config(pb->pwm, 0, pb->period); | ||
145 | pwm_disable(pb->pwm); | ||
146 | return 0; | ||
147 | } | ||
148 | |||
149 | static int pwm_backlight_resume(struct platform_device *pdev) | ||
150 | { | ||
151 | struct backlight_device *bl = platform_get_drvdata(pdev); | ||
152 | |||
153 | backlight_update_status(bl); | ||
154 | return 0; | ||
155 | } | ||
156 | #else | ||
157 | #define pwm_backlight_suspend NULL | ||
158 | #define pwm_backlight_resume NULL | ||
159 | #endif | ||
160 | |||
161 | static struct platform_driver pwm_backlight_driver = { | ||
162 | .driver = { | ||
163 | .name = "pwm-backlight", | ||
164 | .owner = THIS_MODULE, | ||
165 | }, | ||
166 | .probe = pwm_backlight_probe, | ||
167 | .remove = pwm_backlight_remove, | ||
168 | .suspend = pwm_backlight_suspend, | ||
169 | .resume = pwm_backlight_resume, | ||
170 | }; | ||
171 | |||
172 | static int __init pwm_backlight_init(void) | ||
173 | { | ||
174 | return platform_driver_register(&pwm_backlight_driver); | ||
175 | } | ||
176 | module_init(pwm_backlight_init); | ||
177 | |||
178 | static void __exit pwm_backlight_exit(void) | ||
179 | { | ||
180 | platform_driver_unregister(&pwm_backlight_driver); | ||
181 | } | ||
182 | module_exit(pwm_backlight_exit); | ||
183 | |||
184 | MODULE_DESCRIPTION("PWM based Backlight Driver"); | ||
185 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index fafe7db20d6d..d0746261c957 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c | |||
@@ -1792,11 +1792,49 @@ failed: | |||
1792 | return ret; | 1792 | return ret; |
1793 | } | 1793 | } |
1794 | 1794 | ||
1795 | static int __devexit pxafb_remove(struct platform_device *dev) | ||
1796 | { | ||
1797 | struct pxafb_info *fbi = platform_get_drvdata(dev); | ||
1798 | struct resource *r; | ||
1799 | int irq; | ||
1800 | struct fb_info *info; | ||
1801 | |||
1802 | if (!fbi) | ||
1803 | return 0; | ||
1804 | |||
1805 | info = &fbi->fb; | ||
1806 | |||
1807 | unregister_framebuffer(info); | ||
1808 | |||
1809 | pxafb_disable_controller(fbi); | ||
1810 | |||
1811 | if (fbi->fb.cmap.len) | ||
1812 | fb_dealloc_cmap(&fbi->fb.cmap); | ||
1813 | |||
1814 | irq = platform_get_irq(dev, 0); | ||
1815 | free_irq(irq, fbi); | ||
1816 | |||
1817 | dma_free_writecombine(&dev->dev, fbi->map_size, | ||
1818 | fbi->map_cpu, fbi->map_dma); | ||
1819 | |||
1820 | iounmap(fbi->mmio_base); | ||
1821 | |||
1822 | r = platform_get_resource(dev, IORESOURCE_MEM, 0); | ||
1823 | release_mem_region(r->start, r->end - r->start + 1); | ||
1824 | |||
1825 | clk_put(fbi->clk); | ||
1826 | kfree(fbi); | ||
1827 | |||
1828 | return 0; | ||
1829 | } | ||
1830 | |||
1795 | static struct platform_driver pxafb_driver = { | 1831 | static struct platform_driver pxafb_driver = { |
1796 | .probe = pxafb_probe, | 1832 | .probe = pxafb_probe, |
1833 | .remove = pxafb_remove, | ||
1797 | .suspend = pxafb_suspend, | 1834 | .suspend = pxafb_suspend, |
1798 | .resume = pxafb_resume, | 1835 | .resume = pxafb_resume, |
1799 | .driver = { | 1836 | .driver = { |
1837 | .owner = THIS_MODULE, | ||
1800 | .name = "pxa2xx-fb", | 1838 | .name = "pxa2xx-fb", |
1801 | }, | 1839 | }, |
1802 | }; | 1840 | }; |
@@ -1809,7 +1847,13 @@ static int __init pxafb_init(void) | |||
1809 | return platform_driver_register(&pxafb_driver); | 1847 | return platform_driver_register(&pxafb_driver); |
1810 | } | 1848 | } |
1811 | 1849 | ||
1850 | static void __exit pxafb_exit(void) | ||
1851 | { | ||
1852 | platform_driver_unregister(&pxafb_driver); | ||
1853 | } | ||
1854 | |||
1812 | module_init(pxafb_init); | 1855 | module_init(pxafb_init); |
1856 | module_exit(pxafb_exit); | ||
1813 | 1857 | ||
1814 | MODULE_DESCRIPTION("loadable framebuffer driver for PXA"); | 1858 | MODULE_DESCRIPTION("loadable framebuffer driver for PXA"); |
1815 | MODULE_LICENSE("GPL"); | 1859 | MODULE_LICENSE("GPL"); |
diff --git a/include/asm-arm/arch-pxa/audio.h b/include/asm-arm/arch-pxa/audio.h index 52bbe3bc25e1..f82f96dd1053 100644 --- a/include/asm-arm/arch-pxa/audio.h +++ b/include/asm-arm/arch-pxa/audio.h | |||
@@ -12,4 +12,6 @@ typedef struct { | |||
12 | void *priv; | 12 | void *priv; |
13 | } pxa2xx_audio_ops_t; | 13 | } pxa2xx_audio_ops_t; |
14 | 14 | ||
15 | extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops); | ||
16 | |||
15 | #endif | 17 | #endif |
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h index e25558faa5a4..d9af6dabc899 100644 --- a/include/asm-arm/arch-pxa/hardware.h +++ b/include/asm-arm/arch-pxa/hardware.h | |||
@@ -192,15 +192,6 @@ extern int pxa_gpio_get_value(unsigned gpio); | |||
192 | extern void pxa_gpio_set_value(unsigned gpio, int value); | 192 | extern void pxa_gpio_set_value(unsigned gpio, int value); |
193 | 193 | ||
194 | /* | 194 | /* |
195 | * Routine to enable or disable CKEN | ||
196 | */ | ||
197 | static inline void __deprecated pxa_set_cken(int clock, int enable) | ||
198 | { | ||
199 | extern void __pxa_set_cken(int clock, int enable); | ||
200 | __pxa_set_cken(clock, enable); | ||
201 | } | ||
202 | |||
203 | /* | ||
204 | * return current memory and LCD clock frequency in units of 10kHz | 195 | * return current memory and LCD clock frequency in units of 10kHz |
205 | */ | 196 | */ |
206 | extern unsigned int get_memclk_frequency_10khz(void); | 197 | extern unsigned int get_memclk_frequency_10khz(void); |
diff --git a/include/asm-arm/arch-pxa/irda.h b/include/asm-arm/arch-pxa/irda.h index 99f4f423a8e1..0a50c3c763df 100644 --- a/include/asm-arm/arch-pxa/irda.h +++ b/include/asm-arm/arch-pxa/irda.h | |||
@@ -16,4 +16,8 @@ struct pxaficp_platform_data { | |||
16 | 16 | ||
17 | extern void pxa_set_ficp_info(struct pxaficp_platform_data *info); | 17 | extern void pxa_set_ficp_info(struct pxaficp_platform_data *info); |
18 | 18 | ||
19 | #if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) | ||
20 | void pxa2xx_transceiver_mode(struct device *dev, int mode); | ||
21 | #endif | ||
22 | |||
19 | #endif | 23 | #endif |
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 4b2ea1e95c57..dce9308626b7 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h | |||
@@ -600,418 +600,6 @@ | |||
600 | 600 | ||
601 | 601 | ||
602 | /* | 602 | /* |
603 | * USB Device Controller | ||
604 | * PXA25x and PXA27x USB device controller registers are different. | ||
605 | */ | ||
606 | #if defined(CONFIG_PXA25x) | ||
607 | |||
608 | #define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */ | ||
609 | #define UDC_RES2 __REG(0x40600008) /* UDC Undocumented - Reserved2 */ | ||
610 | #define UDC_RES3 __REG(0x4060000C) /* UDC Undocumented - Reserved3 */ | ||
611 | |||
612 | #define UDCCR __REG(0x40600000) /* UDC Control Register */ | ||
613 | #define UDCCR_UDE (1 << 0) /* UDC enable */ | ||
614 | #define UDCCR_UDA (1 << 1) /* UDC active */ | ||
615 | #define UDCCR_RSM (1 << 2) /* Device resume */ | ||
616 | #define UDCCR_RESIR (1 << 3) /* Resume interrupt request */ | ||
617 | #define UDCCR_SUSIR (1 << 4) /* Suspend interrupt request */ | ||
618 | #define UDCCR_SRM (1 << 5) /* Suspend/resume interrupt mask */ | ||
619 | #define UDCCR_RSTIR (1 << 6) /* Reset interrupt request */ | ||
620 | #define UDCCR_REM (1 << 7) /* Reset interrupt mask */ | ||
621 | |||
622 | #define UDCCS0 __REG(0x40600010) /* UDC Endpoint 0 Control/Status Register */ | ||
623 | #define UDCCS0_OPR (1 << 0) /* OUT packet ready */ | ||
624 | #define UDCCS0_IPR (1 << 1) /* IN packet ready */ | ||
625 | #define UDCCS0_FTF (1 << 2) /* Flush Tx FIFO */ | ||
626 | #define UDCCS0_DRWF (1 << 3) /* Device remote wakeup feature */ | ||
627 | #define UDCCS0_SST (1 << 4) /* Sent stall */ | ||
628 | #define UDCCS0_FST (1 << 5) /* Force stall */ | ||
629 | #define UDCCS0_RNE (1 << 6) /* Receive FIFO no empty */ | ||
630 | #define UDCCS0_SA (1 << 7) /* Setup active */ | ||
631 | |||
632 | /* Bulk IN - Endpoint 1,6,11 */ | ||
633 | #define UDCCS1 __REG(0x40600014) /* UDC Endpoint 1 (IN) Control/Status Register */ | ||
634 | #define UDCCS6 __REG(0x40600028) /* UDC Endpoint 6 (IN) Control/Status Register */ | ||
635 | #define UDCCS11 __REG(0x4060003C) /* UDC Endpoint 11 (IN) Control/Status Register */ | ||
636 | |||
637 | #define UDCCS_BI_TFS (1 << 0) /* Transmit FIFO service */ | ||
638 | #define UDCCS_BI_TPC (1 << 1) /* Transmit packet complete */ | ||
639 | #define UDCCS_BI_FTF (1 << 2) /* Flush Tx FIFO */ | ||
640 | #define UDCCS_BI_TUR (1 << 3) /* Transmit FIFO underrun */ | ||
641 | #define UDCCS_BI_SST (1 << 4) /* Sent stall */ | ||
642 | #define UDCCS_BI_FST (1 << 5) /* Force stall */ | ||
643 | #define UDCCS_BI_TSP (1 << 7) /* Transmit short packet */ | ||
644 | |||
645 | /* Bulk OUT - Endpoint 2,7,12 */ | ||
646 | #define UDCCS2 __REG(0x40600018) /* UDC Endpoint 2 (OUT) Control/Status Register */ | ||
647 | #define UDCCS7 __REG(0x4060002C) /* UDC Endpoint 7 (OUT) Control/Status Register */ | ||
648 | #define UDCCS12 __REG(0x40600040) /* UDC Endpoint 12 (OUT) Control/Status Register */ | ||
649 | |||
650 | #define UDCCS_BO_RFS (1 << 0) /* Receive FIFO service */ | ||
651 | #define UDCCS_BO_RPC (1 << 1) /* Receive packet complete */ | ||
652 | #define UDCCS_BO_DME (1 << 3) /* DMA enable */ | ||
653 | #define UDCCS_BO_SST (1 << 4) /* Sent stall */ | ||
654 | #define UDCCS_BO_FST (1 << 5) /* Force stall */ | ||
655 | #define UDCCS_BO_RNE (1 << 6) /* Receive FIFO not empty */ | ||
656 | #define UDCCS_BO_RSP (1 << 7) /* Receive short packet */ | ||
657 | |||
658 | /* Isochronous IN - Endpoint 3,8,13 */ | ||
659 | #define UDCCS3 __REG(0x4060001C) /* UDC Endpoint 3 (IN) Control/Status Register */ | ||
660 | #define UDCCS8 __REG(0x40600030) /* UDC Endpoint 8 (IN) Control/Status Register */ | ||
661 | #define UDCCS13 __REG(0x40600044) /* UDC Endpoint 13 (IN) Control/Status Register */ | ||
662 | |||
663 | #define UDCCS_II_TFS (1 << 0) /* Transmit FIFO service */ | ||
664 | #define UDCCS_II_TPC (1 << 1) /* Transmit packet complete */ | ||
665 | #define UDCCS_II_FTF (1 << 2) /* Flush Tx FIFO */ | ||
666 | #define UDCCS_II_TUR (1 << 3) /* Transmit FIFO underrun */ | ||
667 | #define UDCCS_II_TSP (1 << 7) /* Transmit short packet */ | ||
668 | |||
669 | /* Isochronous OUT - Endpoint 4,9,14 */ | ||
670 | #define UDCCS4 __REG(0x40600020) /* UDC Endpoint 4 (OUT) Control/Status Register */ | ||
671 | #define UDCCS9 __REG(0x40600034) /* UDC Endpoint 9 (OUT) Control/Status Register */ | ||
672 | #define UDCCS14 __REG(0x40600048) /* UDC Endpoint 14 (OUT) Control/Status Register */ | ||
673 | |||
674 | #define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ | ||
675 | #define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ | ||
676 | #define UDCCS_IO_ROF (1 << 2) /* Receive overflow */ | ||
677 | #define UDCCS_IO_DME (1 << 3) /* DMA enable */ | ||
678 | #define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ | ||
679 | #define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ | ||
680 | |||
681 | /* Interrupt IN - Endpoint 5,10,15 */ | ||
682 | #define UDCCS5 __REG(0x40600024) /* UDC Endpoint 5 (Interrupt) Control/Status Register */ | ||
683 | #define UDCCS10 __REG(0x40600038) /* UDC Endpoint 10 (Interrupt) Control/Status Register */ | ||
684 | #define UDCCS15 __REG(0x4060004C) /* UDC Endpoint 15 (Interrupt) Control/Status Register */ | ||
685 | |||
686 | #define UDCCS_INT_TFS (1 << 0) /* Transmit FIFO service */ | ||
687 | #define UDCCS_INT_TPC (1 << 1) /* Transmit packet complete */ | ||
688 | #define UDCCS_INT_FTF (1 << 2) /* Flush Tx FIFO */ | ||
689 | #define UDCCS_INT_TUR (1 << 3) /* Transmit FIFO underrun */ | ||
690 | #define UDCCS_INT_SST (1 << 4) /* Sent stall */ | ||
691 | #define UDCCS_INT_FST (1 << 5) /* Force stall */ | ||
692 | #define UDCCS_INT_TSP (1 << 7) /* Transmit short packet */ | ||
693 | |||
694 | #define UFNRH __REG(0x40600060) /* UDC Frame Number Register High */ | ||
695 | #define UFNRL __REG(0x40600064) /* UDC Frame Number Register Low */ | ||
696 | #define UBCR2 __REG(0x40600068) /* UDC Byte Count Reg 2 */ | ||
697 | #define UBCR4 __REG(0x4060006c) /* UDC Byte Count Reg 4 */ | ||
698 | #define UBCR7 __REG(0x40600070) /* UDC Byte Count Reg 7 */ | ||
699 | #define UBCR9 __REG(0x40600074) /* UDC Byte Count Reg 9 */ | ||
700 | #define UBCR12 __REG(0x40600078) /* UDC Byte Count Reg 12 */ | ||
701 | #define UBCR14 __REG(0x4060007c) /* UDC Byte Count Reg 14 */ | ||
702 | #define UDDR0 __REG(0x40600080) /* UDC Endpoint 0 Data Register */ | ||
703 | #define UDDR1 __REG(0x40600100) /* UDC Endpoint 1 Data Register */ | ||
704 | #define UDDR2 __REG(0x40600180) /* UDC Endpoint 2 Data Register */ | ||
705 | #define UDDR3 __REG(0x40600200) /* UDC Endpoint 3 Data Register */ | ||
706 | #define UDDR4 __REG(0x40600400) /* UDC Endpoint 4 Data Register */ | ||
707 | #define UDDR5 __REG(0x406000A0) /* UDC Endpoint 5 Data Register */ | ||
708 | #define UDDR6 __REG(0x40600600) /* UDC Endpoint 6 Data Register */ | ||
709 | #define UDDR7 __REG(0x40600680) /* UDC Endpoint 7 Data Register */ | ||
710 | #define UDDR8 __REG(0x40600700) /* UDC Endpoint 8 Data Register */ | ||
711 | #define UDDR9 __REG(0x40600900) /* UDC Endpoint 9 Data Register */ | ||
712 | #define UDDR10 __REG(0x406000C0) /* UDC Endpoint 10 Data Register */ | ||
713 | #define UDDR11 __REG(0x40600B00) /* UDC Endpoint 11 Data Register */ | ||
714 | #define UDDR12 __REG(0x40600B80) /* UDC Endpoint 12 Data Register */ | ||
715 | #define UDDR13 __REG(0x40600C00) /* UDC Endpoint 13 Data Register */ | ||
716 | #define UDDR14 __REG(0x40600E00) /* UDC Endpoint 14 Data Register */ | ||
717 | #define UDDR15 __REG(0x406000E0) /* UDC Endpoint 15 Data Register */ | ||
718 | |||
719 | #define UICR0 __REG(0x40600050) /* UDC Interrupt Control Register 0 */ | ||
720 | |||
721 | #define UICR0_IM0 (1 << 0) /* Interrupt mask ep 0 */ | ||
722 | #define UICR0_IM1 (1 << 1) /* Interrupt mask ep 1 */ | ||
723 | #define UICR0_IM2 (1 << 2) /* Interrupt mask ep 2 */ | ||
724 | #define UICR0_IM3 (1 << 3) /* Interrupt mask ep 3 */ | ||
725 | #define UICR0_IM4 (1 << 4) /* Interrupt mask ep 4 */ | ||
726 | #define UICR0_IM5 (1 << 5) /* Interrupt mask ep 5 */ | ||
727 | #define UICR0_IM6 (1 << 6) /* Interrupt mask ep 6 */ | ||
728 | #define UICR0_IM7 (1 << 7) /* Interrupt mask ep 7 */ | ||
729 | |||
730 | #define UICR1 __REG(0x40600054) /* UDC Interrupt Control Register 1 */ | ||
731 | |||
732 | #define UICR1_IM8 (1 << 0) /* Interrupt mask ep 8 */ | ||
733 | #define UICR1_IM9 (1 << 1) /* Interrupt mask ep 9 */ | ||
734 | #define UICR1_IM10 (1 << 2) /* Interrupt mask ep 10 */ | ||
735 | #define UICR1_IM11 (1 << 3) /* Interrupt mask ep 11 */ | ||
736 | #define UICR1_IM12 (1 << 4) /* Interrupt mask ep 12 */ | ||
737 | #define UICR1_IM13 (1 << 5) /* Interrupt mask ep 13 */ | ||
738 | #define UICR1_IM14 (1 << 6) /* Interrupt mask ep 14 */ | ||
739 | #define UICR1_IM15 (1 << 7) /* Interrupt mask ep 15 */ | ||
740 | |||
741 | #define USIR0 __REG(0x40600058) /* UDC Status Interrupt Register 0 */ | ||
742 | |||
743 | #define USIR0_IR0 (1 << 0) /* Interrupt request ep 0 */ | ||
744 | #define USIR0_IR1 (1 << 1) /* Interrupt request ep 1 */ | ||
745 | #define USIR0_IR2 (1 << 2) /* Interrupt request ep 2 */ | ||
746 | #define USIR0_IR3 (1 << 3) /* Interrupt request ep 3 */ | ||
747 | #define USIR0_IR4 (1 << 4) /* Interrupt request ep 4 */ | ||
748 | #define USIR0_IR5 (1 << 5) /* Interrupt request ep 5 */ | ||
749 | #define USIR0_IR6 (1 << 6) /* Interrupt request ep 6 */ | ||
750 | #define USIR0_IR7 (1 << 7) /* Interrupt request ep 7 */ | ||
751 | |||
752 | #define USIR1 __REG(0x4060005C) /* UDC Status Interrupt Register 1 */ | ||
753 | |||
754 | #define USIR1_IR8 (1 << 0) /* Interrupt request ep 8 */ | ||
755 | #define USIR1_IR9 (1 << 1) /* Interrupt request ep 9 */ | ||
756 | #define USIR1_IR10 (1 << 2) /* Interrupt request ep 10 */ | ||
757 | #define USIR1_IR11 (1 << 3) /* Interrupt request ep 11 */ | ||
758 | #define USIR1_IR12 (1 << 4) /* Interrupt request ep 12 */ | ||
759 | #define USIR1_IR13 (1 << 5) /* Interrupt request ep 13 */ | ||
760 | #define USIR1_IR14 (1 << 6) /* Interrupt request ep 14 */ | ||
761 | #define USIR1_IR15 (1 << 7) /* Interrupt request ep 15 */ | ||
762 | |||
763 | #elif defined(CONFIG_PXA27x) | ||
764 | |||
765 | #define UDCCR __REG(0x40600000) /* UDC Control Register */ | ||
766 | #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ | ||
767 | #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation | ||
768 | Protocol Port Support */ | ||
769 | #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol | ||
770 | Support */ | ||
771 | #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol | ||
772 | Enable */ | ||
773 | #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */ | ||
774 | #define UDCCR_ACN (0x03 << 11) /* Active UDC configuration Number */ | ||
775 | #define UDCCR_ACN_S 11 | ||
776 | #define UDCCR_AIN (0x07 << 8) /* Active UDC interface Number */ | ||
777 | #define UDCCR_AIN_S 8 | ||
778 | #define UDCCR_AAISN (0x07 << 5) /* Active UDC Alternate Interface | ||
779 | Setting Number */ | ||
780 | #define UDCCR_AAISN_S 5 | ||
781 | #define UDCCR_SMAC (1 << 4) /* Switch Endpoint Memory to Active | ||
782 | Configuration */ | ||
783 | #define UDCCR_EMCE (1 << 3) /* Endpoint Memory Configuration | ||
784 | Error */ | ||
785 | #define UDCCR_UDR (1 << 2) /* UDC Resume */ | ||
786 | #define UDCCR_UDA (1 << 1) /* UDC Active */ | ||
787 | #define UDCCR_UDE (1 << 0) /* UDC Enable */ | ||
788 | |||
789 | #define UDCICR0 __REG(0x40600004) /* UDC Interrupt Control Register0 */ | ||
790 | #define UDCICR1 __REG(0x40600008) /* UDC Interrupt Control Register1 */ | ||
791 | #define UDCICR_FIFOERR (1 << 1) /* FIFO Error interrupt for EP */ | ||
792 | #define UDCICR_PKTCOMPL (1 << 0) /* Packet Complete interrupt for EP */ | ||
793 | |||
794 | #define UDC_INT_FIFOERROR (0x2) | ||
795 | #define UDC_INT_PACKETCMP (0x1) | ||
796 | |||
797 | #define UDCICR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) | ||
798 | #define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */ | ||
799 | #define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */ | ||
800 | #define UDCICR1_IERU (1 << 29) /* IntEn - Resume */ | ||
801 | #define UDCICR1_IESU (1 << 28) /* IntEn - Suspend */ | ||
802 | #define UDCICR1_IERS (1 << 27) /* IntEn - Reset */ | ||
803 | |||
804 | #define UDCISR0 __REG(0x4060000C) /* UDC Interrupt Status Register 0 */ | ||
805 | #define UDCISR1 __REG(0x40600010) /* UDC Interrupt Status Register 1 */ | ||
806 | #define UDCISR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) | ||
807 | #define UDCISR1_IRCC (1 << 31) /* IntReq - Configuration Change */ | ||
808 | #define UDCISR1_IRSOF (1 << 30) /* IntReq - Start of Frame */ | ||
809 | #define UDCISR1_IRRU (1 << 29) /* IntReq - Resume */ | ||
810 | #define UDCISR1_IRSU (1 << 28) /* IntReq - Suspend */ | ||
811 | #define UDCISR1_IRRS (1 << 27) /* IntReq - Reset */ | ||
812 | |||
813 | #define UDCFNR __REG(0x40600014) /* UDC Frame Number Register */ | ||
814 | #define UDCOTGICR __REG(0x40600018) /* UDC On-The-Go interrupt control */ | ||
815 | #define UDCOTGICR_IESF (1 << 24) /* OTG SET_FEATURE command recvd */ | ||
816 | #define UDCOTGICR_IEXR (1 << 17) /* Extra Transciever Interrupt | ||
817 | Rising Edge Interrupt Enable */ | ||
818 | #define UDCOTGICR_IEXF (1 << 16) /* Extra Transciever Interrupt | ||
819 | Falling Edge Interrupt Enable */ | ||
820 | #define UDCOTGICR_IEVV40R (1 << 9) /* OTG Vbus Valid 4.0V Rising Edge | ||
821 | Interrupt Enable */ | ||
822 | #define UDCOTGICR_IEVV40F (1 << 8) /* OTG Vbus Valid 4.0V Falling Edge | ||
823 | Interrupt Enable */ | ||
824 | #define UDCOTGICR_IEVV44R (1 << 7) /* OTG Vbus Valid 4.4V Rising Edge | ||
825 | Interrupt Enable */ | ||
826 | #define UDCOTGICR_IEVV44F (1 << 6) /* OTG Vbus Valid 4.4V Falling Edge | ||
827 | Interrupt Enable */ | ||
828 | #define UDCOTGICR_IESVR (1 << 5) /* OTG Session Valid Rising Edge | ||
829 | Interrupt Enable */ | ||
830 | #define UDCOTGICR_IESVF (1 << 4) /* OTG Session Valid Falling Edge | ||
831 | Interrupt Enable */ | ||
832 | #define UDCOTGICR_IESDR (1 << 3) /* OTG A-Device SRP Detect Rising | ||
833 | Edge Interrupt Enable */ | ||
834 | #define UDCOTGICR_IESDF (1 << 2) /* OTG A-Device SRP Detect Falling | ||
835 | Edge Interrupt Enable */ | ||
836 | #define UDCOTGICR_IEIDR (1 << 1) /* OTG ID Change Rising Edge | ||
837 | Interrupt Enable */ | ||
838 | #define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge | ||
839 | Interrupt Enable */ | ||
840 | |||
841 | #define UP2OCR __REG(0x40600020) /* USB Port 2 Output Control register */ | ||
842 | |||
843 | #define UP2OCR_CPVEN (1 << 0) /* Charge Pump Vbus Enable */ | ||
844 | #define UP2OCR_CPVPE (1 << 1) /* Charge Pump Vbus Pulse Enable */ | ||
845 | #define UP2OCR_DPPDE (1 << 2) /* Host Port 2 Transceiver D+ Pull Down Enable */ | ||
846 | #define UP2OCR_DMPDE (1 << 3) /* Host Port 2 Transceiver D- Pull Down Enable */ | ||
847 | #define UP2OCR_DPPUE (1 << 4) /* Host Port 2 Transceiver D+ Pull Up Enable */ | ||
848 | #define UP2OCR_DMPUE (1 << 5) /* Host Port 2 Transceiver D- Pull Up Enable */ | ||
849 | #define UP2OCR_DPPUBE (1 << 6) /* Host Port 2 Transceiver D+ Pull Up Bypass Enable */ | ||
850 | #define UP2OCR_DMPUBE (1 << 7) /* Host Port 2 Transceiver D- Pull Up Bypass Enable */ | ||
851 | #define UP2OCR_EXSP (1 << 8) /* External Transceiver Speed Control */ | ||
852 | #define UP2OCR_EXSUS (1 << 9) /* External Transceiver Speed Enable */ | ||
853 | #define UP2OCR_IDON (1 << 10) /* OTG ID Read Enable */ | ||
854 | #define UP2OCR_HXS (1 << 16) /* Host Port 2 Transceiver Output Select */ | ||
855 | #define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */ | ||
856 | #define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */ | ||
857 | |||
858 | #define UDCCSN(x) __REG2(0x40600100, (x) << 2) | ||
859 | #define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ | ||
860 | #define UDCCSR0_SA (1 << 7) /* Setup Active */ | ||
861 | #define UDCCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */ | ||
862 | #define UDCCSR0_FST (1 << 5) /* Force Stall */ | ||
863 | #define UDCCSR0_SST (1 << 4) /* Sent Stall */ | ||
864 | #define UDCCSR0_DME (1 << 3) /* DMA Enable */ | ||
865 | #define UDCCSR0_FTF (1 << 2) /* Flush Transmit FIFO */ | ||
866 | #define UDCCSR0_IPR (1 << 1) /* IN Packet Ready */ | ||
867 | #define UDCCSR0_OPC (1 << 0) /* OUT Packet Complete */ | ||
868 | |||
869 | #define UDCCSRA __REG(0x40600104) /* UDC Control/Status register - Endpoint A */ | ||
870 | #define UDCCSRB __REG(0x40600108) /* UDC Control/Status register - Endpoint B */ | ||
871 | #define UDCCSRC __REG(0x4060010C) /* UDC Control/Status register - Endpoint C */ | ||
872 | #define UDCCSRD __REG(0x40600110) /* UDC Control/Status register - Endpoint D */ | ||
873 | #define UDCCSRE __REG(0x40600114) /* UDC Control/Status register - Endpoint E */ | ||
874 | #define UDCCSRF __REG(0x40600118) /* UDC Control/Status register - Endpoint F */ | ||
875 | #define UDCCSRG __REG(0x4060011C) /* UDC Control/Status register - Endpoint G */ | ||
876 | #define UDCCSRH __REG(0x40600120) /* UDC Control/Status register - Endpoint H */ | ||
877 | #define UDCCSRI __REG(0x40600124) /* UDC Control/Status register - Endpoint I */ | ||
878 | #define UDCCSRJ __REG(0x40600128) /* UDC Control/Status register - Endpoint J */ | ||
879 | #define UDCCSRK __REG(0x4060012C) /* UDC Control/Status register - Endpoint K */ | ||
880 | #define UDCCSRL __REG(0x40600130) /* UDC Control/Status register - Endpoint L */ | ||
881 | #define UDCCSRM __REG(0x40600134) /* UDC Control/Status register - Endpoint M */ | ||
882 | #define UDCCSRN __REG(0x40600138) /* UDC Control/Status register - Endpoint N */ | ||
883 | #define UDCCSRP __REG(0x4060013C) /* UDC Control/Status register - Endpoint P */ | ||
884 | #define UDCCSRQ __REG(0x40600140) /* UDC Control/Status register - Endpoint Q */ | ||
885 | #define UDCCSRR __REG(0x40600144) /* UDC Control/Status register - Endpoint R */ | ||
886 | #define UDCCSRS __REG(0x40600148) /* UDC Control/Status register - Endpoint S */ | ||
887 | #define UDCCSRT __REG(0x4060014C) /* UDC Control/Status register - Endpoint T */ | ||
888 | #define UDCCSRU __REG(0x40600150) /* UDC Control/Status register - Endpoint U */ | ||
889 | #define UDCCSRV __REG(0x40600154) /* UDC Control/Status register - Endpoint V */ | ||
890 | #define UDCCSRW __REG(0x40600158) /* UDC Control/Status register - Endpoint W */ | ||
891 | #define UDCCSRX __REG(0x4060015C) /* UDC Control/Status register - Endpoint X */ | ||
892 | |||
893 | #define UDCCSR_DPE (1 << 9) /* Data Packet Error */ | ||
894 | #define UDCCSR_FEF (1 << 8) /* Flush Endpoint FIFO */ | ||
895 | #define UDCCSR_SP (1 << 7) /* Short Packet Control/Status */ | ||
896 | #define UDCCSR_BNE (1 << 6) /* Buffer Not Empty (IN endpoints) */ | ||
897 | #define UDCCSR_BNF (1 << 6) /* Buffer Not Full (OUT endpoints) */ | ||
898 | #define UDCCSR_FST (1 << 5) /* Force STALL */ | ||
899 | #define UDCCSR_SST (1 << 4) /* Sent STALL */ | ||
900 | #define UDCCSR_DME (1 << 3) /* DMA Enable */ | ||
901 | #define UDCCSR_TRN (1 << 2) /* Tx/Rx NAK */ | ||
902 | #define UDCCSR_PC (1 << 1) /* Packet Complete */ | ||
903 | #define UDCCSR_FS (1 << 0) /* FIFO needs service */ | ||
904 | |||
905 | #define UDCBCN(x) __REG2(0x40600200, (x)<<2) | ||
906 | #define UDCBCR0 __REG(0x40600200) /* Byte Count Register - EP0 */ | ||
907 | #define UDCBCRA __REG(0x40600204) /* Byte Count Register - EPA */ | ||
908 | #define UDCBCRB __REG(0x40600208) /* Byte Count Register - EPB */ | ||
909 | #define UDCBCRC __REG(0x4060020C) /* Byte Count Register - EPC */ | ||
910 | #define UDCBCRD __REG(0x40600210) /* Byte Count Register - EPD */ | ||
911 | #define UDCBCRE __REG(0x40600214) /* Byte Count Register - EPE */ | ||
912 | #define UDCBCRF __REG(0x40600218) /* Byte Count Register - EPF */ | ||
913 | #define UDCBCRG __REG(0x4060021C) /* Byte Count Register - EPG */ | ||
914 | #define UDCBCRH __REG(0x40600220) /* Byte Count Register - EPH */ | ||
915 | #define UDCBCRI __REG(0x40600224) /* Byte Count Register - EPI */ | ||
916 | #define UDCBCRJ __REG(0x40600228) /* Byte Count Register - EPJ */ | ||
917 | #define UDCBCRK __REG(0x4060022C) /* Byte Count Register - EPK */ | ||
918 | #define UDCBCRL __REG(0x40600230) /* Byte Count Register - EPL */ | ||
919 | #define UDCBCRM __REG(0x40600234) /* Byte Count Register - EPM */ | ||
920 | #define UDCBCRN __REG(0x40600238) /* Byte Count Register - EPN */ | ||
921 | #define UDCBCRP __REG(0x4060023C) /* Byte Count Register - EPP */ | ||
922 | #define UDCBCRQ __REG(0x40600240) /* Byte Count Register - EPQ */ | ||
923 | #define UDCBCRR __REG(0x40600244) /* Byte Count Register - EPR */ | ||
924 | #define UDCBCRS __REG(0x40600248) /* Byte Count Register - EPS */ | ||
925 | #define UDCBCRT __REG(0x4060024C) /* Byte Count Register - EPT */ | ||
926 | #define UDCBCRU __REG(0x40600250) /* Byte Count Register - EPU */ | ||
927 | #define UDCBCRV __REG(0x40600254) /* Byte Count Register - EPV */ | ||
928 | #define UDCBCRW __REG(0x40600258) /* Byte Count Register - EPW */ | ||
929 | #define UDCBCRX __REG(0x4060025C) /* Byte Count Register - EPX */ | ||
930 | |||
931 | #define UDCDN(x) __REG2(0x40600300, (x)<<2) | ||
932 | #define PHYS_UDCDN(x) (0x40600300 + ((x)<<2)) | ||
933 | #define PUDCDN(x) (volatile u32 *)(io_p2v(PHYS_UDCDN((x)))) | ||
934 | #define UDCDR0 __REG(0x40600300) /* Data Register - EP0 */ | ||
935 | #define UDCDRA __REG(0x40600304) /* Data Register - EPA */ | ||
936 | #define UDCDRB __REG(0x40600308) /* Data Register - EPB */ | ||
937 | #define UDCDRC __REG(0x4060030C) /* Data Register - EPC */ | ||
938 | #define UDCDRD __REG(0x40600310) /* Data Register - EPD */ | ||
939 | #define UDCDRE __REG(0x40600314) /* Data Register - EPE */ | ||
940 | #define UDCDRF __REG(0x40600318) /* Data Register - EPF */ | ||
941 | #define UDCDRG __REG(0x4060031C) /* Data Register - EPG */ | ||
942 | #define UDCDRH __REG(0x40600320) /* Data Register - EPH */ | ||
943 | #define UDCDRI __REG(0x40600324) /* Data Register - EPI */ | ||
944 | #define UDCDRJ __REG(0x40600328) /* Data Register - EPJ */ | ||
945 | #define UDCDRK __REG(0x4060032C) /* Data Register - EPK */ | ||
946 | #define UDCDRL __REG(0x40600330) /* Data Register - EPL */ | ||
947 | #define UDCDRM __REG(0x40600334) /* Data Register - EPM */ | ||
948 | #define UDCDRN __REG(0x40600338) /* Data Register - EPN */ | ||
949 | #define UDCDRP __REG(0x4060033C) /* Data Register - EPP */ | ||
950 | #define UDCDRQ __REG(0x40600340) /* Data Register - EPQ */ | ||
951 | #define UDCDRR __REG(0x40600344) /* Data Register - EPR */ | ||
952 | #define UDCDRS __REG(0x40600348) /* Data Register - EPS */ | ||
953 | #define UDCDRT __REG(0x4060034C) /* Data Register - EPT */ | ||
954 | #define UDCDRU __REG(0x40600350) /* Data Register - EPU */ | ||
955 | #define UDCDRV __REG(0x40600354) /* Data Register - EPV */ | ||
956 | #define UDCDRW __REG(0x40600358) /* Data Register - EPW */ | ||
957 | #define UDCDRX __REG(0x4060035C) /* Data Register - EPX */ | ||
958 | |||
959 | #define UDCCN(x) __REG2(0x40600400, (x)<<2) | ||
960 | #define UDCCRA __REG(0x40600404) /* Configuration register EPA */ | ||
961 | #define UDCCRB __REG(0x40600408) /* Configuration register EPB */ | ||
962 | #define UDCCRC __REG(0x4060040C) /* Configuration register EPC */ | ||
963 | #define UDCCRD __REG(0x40600410) /* Configuration register EPD */ | ||
964 | #define UDCCRE __REG(0x40600414) /* Configuration register EPE */ | ||
965 | #define UDCCRF __REG(0x40600418) /* Configuration register EPF */ | ||
966 | #define UDCCRG __REG(0x4060041C) /* Configuration register EPG */ | ||
967 | #define UDCCRH __REG(0x40600420) /* Configuration register EPH */ | ||
968 | #define UDCCRI __REG(0x40600424) /* Configuration register EPI */ | ||
969 | #define UDCCRJ __REG(0x40600428) /* Configuration register EPJ */ | ||
970 | #define UDCCRK __REG(0x4060042C) /* Configuration register EPK */ | ||
971 | #define UDCCRL __REG(0x40600430) /* Configuration register EPL */ | ||
972 | #define UDCCRM __REG(0x40600434) /* Configuration register EPM */ | ||
973 | #define UDCCRN __REG(0x40600438) /* Configuration register EPN */ | ||
974 | #define UDCCRP __REG(0x4060043C) /* Configuration register EPP */ | ||
975 | #define UDCCRQ __REG(0x40600440) /* Configuration register EPQ */ | ||
976 | #define UDCCRR __REG(0x40600444) /* Configuration register EPR */ | ||
977 | #define UDCCRS __REG(0x40600448) /* Configuration register EPS */ | ||
978 | #define UDCCRT __REG(0x4060044C) /* Configuration register EPT */ | ||
979 | #define UDCCRU __REG(0x40600450) /* Configuration register EPU */ | ||
980 | #define UDCCRV __REG(0x40600454) /* Configuration register EPV */ | ||
981 | #define UDCCRW __REG(0x40600458) /* Configuration register EPW */ | ||
982 | #define UDCCRX __REG(0x4060045C) /* Configuration register EPX */ | ||
983 | |||
984 | #define UDCCONR_CN (0x03 << 25) /* Configuration Number */ | ||
985 | #define UDCCONR_CN_S (25) | ||
986 | #define UDCCONR_IN (0x07 << 22) /* Interface Number */ | ||
987 | #define UDCCONR_IN_S (22) | ||
988 | #define UDCCONR_AISN (0x07 << 19) /* Alternate Interface Number */ | ||
989 | #define UDCCONR_AISN_S (19) | ||
990 | #define UDCCONR_EN (0x0f << 15) /* Endpoint Number */ | ||
991 | #define UDCCONR_EN_S (15) | ||
992 | #define UDCCONR_ET (0x03 << 13) /* Endpoint Type: */ | ||
993 | #define UDCCONR_ET_S (13) | ||
994 | #define UDCCONR_ET_INT (0x03 << 13) /* Interrupt */ | ||
995 | #define UDCCONR_ET_BULK (0x02 << 13) /* Bulk */ | ||
996 | #define UDCCONR_ET_ISO (0x01 << 13) /* Isochronous */ | ||
997 | #define UDCCONR_ET_NU (0x00 << 13) /* Not used */ | ||
998 | #define UDCCONR_ED (1 << 12) /* Endpoint Direction */ | ||
999 | #define UDCCONR_MPS (0x3ff << 2) /* Maximum Packet Size */ | ||
1000 | #define UDCCONR_MPS_S (2) | ||
1001 | #define UDCCONR_DE (1 << 1) /* Double Buffering Enable */ | ||
1002 | #define UDCCONR_EE (1 << 0) /* Endpoint Enable */ | ||
1003 | |||
1004 | |||
1005 | #define UDC_INT_FIFOERROR (0x2) | ||
1006 | #define UDC_INT_PACKETCMP (0x1) | ||
1007 | |||
1008 | #define UDC_FNR_MASK (0x7ff) | ||
1009 | |||
1010 | #define UDCCSR_WR_MASK (UDCCSR_DME|UDCCSR_FST) | ||
1011 | #define UDC_BCR_MASK (0x3ff) | ||
1012 | #endif | ||
1013 | |||
1014 | /* | ||
1015 | * Fast Infrared Communication Port | 603 | * Fast Infrared Communication Port |
1016 | */ | 604 | */ |
1017 | 605 | ||
@@ -1237,120 +825,9 @@ | |||
1237 | #endif | 825 | #endif |
1238 | 826 | ||
1239 | /* | 827 | /* |
1240 | * Power Manager | 828 | * Power Manager - see pxa2xx-regs.h |
1241 | */ | 829 | */ |
1242 | 830 | ||
1243 | #define PMCR __REG(0x40F00000) /* Power Manager Control Register */ | ||
1244 | #define PSSR __REG(0x40F00004) /* Power Manager Sleep Status Register */ | ||
1245 | #define PSPR __REG(0x40F00008) /* Power Manager Scratch Pad Register */ | ||
1246 | #define PWER __REG(0x40F0000C) /* Power Manager Wake-up Enable Register */ | ||
1247 | #define PRER __REG(0x40F00010) /* Power Manager GPIO Rising-Edge Detect Enable Register */ | ||
1248 | #define PFER __REG(0x40F00014) /* Power Manager GPIO Falling-Edge Detect Enable Register */ | ||
1249 | #define PEDR __REG(0x40F00018) /* Power Manager GPIO Edge Detect Status Register */ | ||
1250 | #define PCFR __REG(0x40F0001C) /* Power Manager General Configuration Register */ | ||
1251 | #define PGSR0 __REG(0x40F00020) /* Power Manager GPIO Sleep State Register for GP[31-0] */ | ||
1252 | #define PGSR1 __REG(0x40F00024) /* Power Manager GPIO Sleep State Register for GP[63-32] */ | ||
1253 | #define PGSR2 __REG(0x40F00028) /* Power Manager GPIO Sleep State Register for GP[84-64] */ | ||
1254 | #define PGSR3 __REG(0x40F0002C) /* Power Manager GPIO Sleep State Register for GP[118-96] */ | ||
1255 | #define RCSR __REG(0x40F00030) /* Reset Controller Status Register */ | ||
1256 | |||
1257 | #define PSLR __REG(0x40F00034) /* Power Manager Sleep Config Register */ | ||
1258 | #define PSTR __REG(0x40F00038) /*Power Manager Standby Config Register */ | ||
1259 | #define PSNR __REG(0x40F0003C) /*Power Manager Sense Config Register */ | ||
1260 | #define PVCR __REG(0x40F00040) /*Power Manager VoltageControl Register */ | ||
1261 | #define PKWR __REG(0x40F00050) /* Power Manager KB Wake-up Enable Reg */ | ||
1262 | #define PKSR __REG(0x40F00054) /* Power Manager KB Level-Detect Register */ | ||
1263 | #define PCMD(x) __REG2(0x40F00080, (x)<<2) | ||
1264 | #define PCMD0 __REG(0x40F00080 + 0 * 4) | ||
1265 | #define PCMD1 __REG(0x40F00080 + 1 * 4) | ||
1266 | #define PCMD2 __REG(0x40F00080 + 2 * 4) | ||
1267 | #define PCMD3 __REG(0x40F00080 + 3 * 4) | ||
1268 | #define PCMD4 __REG(0x40F00080 + 4 * 4) | ||
1269 | #define PCMD5 __REG(0x40F00080 + 5 * 4) | ||
1270 | #define PCMD6 __REG(0x40F00080 + 6 * 4) | ||
1271 | #define PCMD7 __REG(0x40F00080 + 7 * 4) | ||
1272 | #define PCMD8 __REG(0x40F00080 + 8 * 4) | ||
1273 | #define PCMD9 __REG(0x40F00080 + 9 * 4) | ||
1274 | #define PCMD10 __REG(0x40F00080 + 10 * 4) | ||
1275 | #define PCMD11 __REG(0x40F00080 + 11 * 4) | ||
1276 | #define PCMD12 __REG(0x40F00080 + 12 * 4) | ||
1277 | #define PCMD13 __REG(0x40F00080 + 13 * 4) | ||
1278 | #define PCMD14 __REG(0x40F00080 + 14 * 4) | ||
1279 | #define PCMD15 __REG(0x40F00080 + 15 * 4) | ||
1280 | #define PCMD16 __REG(0x40F00080 + 16 * 4) | ||
1281 | #define PCMD17 __REG(0x40F00080 + 17 * 4) | ||
1282 | #define PCMD18 __REG(0x40F00080 + 18 * 4) | ||
1283 | #define PCMD19 __REG(0x40F00080 + 19 * 4) | ||
1284 | #define PCMD20 __REG(0x40F00080 + 20 * 4) | ||
1285 | #define PCMD21 __REG(0x40F00080 + 21 * 4) | ||
1286 | #define PCMD22 __REG(0x40F00080 + 22 * 4) | ||
1287 | #define PCMD23 __REG(0x40F00080 + 23 * 4) | ||
1288 | #define PCMD24 __REG(0x40F00080 + 24 * 4) | ||
1289 | #define PCMD25 __REG(0x40F00080 + 25 * 4) | ||
1290 | #define PCMD26 __REG(0x40F00080 + 26 * 4) | ||
1291 | #define PCMD27 __REG(0x40F00080 + 27 * 4) | ||
1292 | #define PCMD28 __REG(0x40F00080 + 28 * 4) | ||
1293 | #define PCMD29 __REG(0x40F00080 + 29 * 4) | ||
1294 | #define PCMD30 __REG(0x40F00080 + 30 * 4) | ||
1295 | #define PCMD31 __REG(0x40F00080 + 31 * 4) | ||
1296 | |||
1297 | #define PCMD_MBC (1<<12) | ||
1298 | #define PCMD_DCE (1<<11) | ||
1299 | #define PCMD_LC (1<<10) | ||
1300 | /* FIXME: PCMD_SQC need be checked. */ | ||
1301 | #define PCMD_SQC (3<<8) /* currently only bit 8 is changeable, | ||
1302 | bit 9 should be 0 all day. */ | ||
1303 | #define PVCR_VCSA (0x1<<14) | ||
1304 | #define PVCR_CommandDelay (0xf80) | ||
1305 | #define PCFR_PI2C_EN (0x1 << 6) | ||
1306 | |||
1307 | #define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */ | ||
1308 | #define PSSR_RDH (1 << 5) /* Read Disable Hold */ | ||
1309 | #define PSSR_PH (1 << 4) /* Peripheral Control Hold */ | ||
1310 | #define PSSR_STS (1 << 3) /* Standby Mode Status */ | ||
1311 | #define PSSR_VFS (1 << 2) /* VDD Fault Status */ | ||
1312 | #define PSSR_BFS (1 << 1) /* Battery Fault Status */ | ||
1313 | #define PSSR_SSS (1 << 0) /* Software Sleep Status */ | ||
1314 | |||
1315 | #define PSLR_SL_ROD (1 << 20) /* Sleep-Mode/Depp-Sleep Mode nRESET_OUT Disable */ | ||
1316 | |||
1317 | #define PCFR_RO (1 << 15) /* RDH Override */ | ||
1318 | #define PCFR_PO (1 << 14) /* PH Override */ | ||
1319 | #define PCFR_GPROD (1 << 12) /* GPIO nRESET_OUT Disable */ | ||
1320 | #define PCFR_L1_EN (1 << 11) /* Sleep Mode L1 converter Enable */ | ||
1321 | #define PCFR_FVC (1 << 10) /* Frequency/Voltage Change */ | ||
1322 | #define PCFR_DC_EN (1 << 7) /* Sleep/deep-sleep DC-DC Converter Enable */ | ||
1323 | #define PCFR_PI2CEN (1 << 6) /* Enable PI2C controller */ | ||
1324 | #define PCFR_GPR_EN (1 << 4) /* nRESET_GPIO Pin Enable */ | ||
1325 | #define PCFR_DS (1 << 3) /* Deep Sleep Mode */ | ||
1326 | #define PCFR_FS (1 << 2) /* Float Static Chip Selects */ | ||
1327 | #define PCFR_FP (1 << 1) /* Float PCMCIA controls */ | ||
1328 | #define PCFR_OPDE (1 << 0) /* 3.6864 MHz oscillator power-down enable */ | ||
1329 | |||
1330 | #define RCSR_GPR (1 << 3) /* GPIO Reset */ | ||
1331 | #define RCSR_SMR (1 << 2) /* Sleep Mode */ | ||
1332 | #define RCSR_WDR (1 << 1) /* Watchdog Reset */ | ||
1333 | #define RCSR_HWR (1 << 0) /* Hardware Reset */ | ||
1334 | |||
1335 | #define PWER_GPIO(Nb) (1 << Nb) /* GPIO [0..15] wake-up enable */ | ||
1336 | #define PWER_GPIO0 PWER_GPIO (0) /* GPIO [0] wake-up enable */ | ||
1337 | #define PWER_GPIO1 PWER_GPIO (1) /* GPIO [1] wake-up enable */ | ||
1338 | #define PWER_GPIO2 PWER_GPIO (2) /* GPIO [2] wake-up enable */ | ||
1339 | #define PWER_GPIO3 PWER_GPIO (3) /* GPIO [3] wake-up enable */ | ||
1340 | #define PWER_GPIO4 PWER_GPIO (4) /* GPIO [4] wake-up enable */ | ||
1341 | #define PWER_GPIO5 PWER_GPIO (5) /* GPIO [5] wake-up enable */ | ||
1342 | #define PWER_GPIO6 PWER_GPIO (6) /* GPIO [6] wake-up enable */ | ||
1343 | #define PWER_GPIO7 PWER_GPIO (7) /* GPIO [7] wake-up enable */ | ||
1344 | #define PWER_GPIO8 PWER_GPIO (8) /* GPIO [8] wake-up enable */ | ||
1345 | #define PWER_GPIO9 PWER_GPIO (9) /* GPIO [9] wake-up enable */ | ||
1346 | #define PWER_GPIO10 PWER_GPIO (10) /* GPIO [10] wake-up enable */ | ||
1347 | #define PWER_GPIO11 PWER_GPIO (11) /* GPIO [11] wake-up enable */ | ||
1348 | #define PWER_GPIO12 PWER_GPIO (12) /* GPIO [12] wake-up enable */ | ||
1349 | #define PWER_GPIO13 PWER_GPIO (13) /* GPIO [13] wake-up enable */ | ||
1350 | #define PWER_GPIO14 PWER_GPIO (14) /* GPIO [14] wake-up enable */ | ||
1351 | #define PWER_GPIO15 PWER_GPIO (15) /* GPIO [15] wake-up enable */ | ||
1352 | #define PWER_RTC 0x80000000 /* RTC alarm wake-up enable */ | ||
1353 | |||
1354 | /* | 831 | /* |
1355 | * SSP Serial Port Registers - see include/asm-arm/arch-pxa/regs-ssp.h | 832 | * SSP Serial Port Registers - see include/asm-arm/arch-pxa/regs-ssp.h |
1356 | */ | 833 | */ |
@@ -1360,52 +837,9 @@ | |||
1360 | */ | 837 | */ |
1361 | 838 | ||
1362 | /* | 839 | /* |
1363 | * Core Clock | 840 | * Core Clock - see include/asm-arm/arch-pxa/pxa2xx-regs.h |
1364 | */ | 841 | */ |
1365 | 842 | ||
1366 | #define CCCR __REG(0x41300000) /* Core Clock Configuration Register */ | ||
1367 | #define CKEN __REG(0x41300004) /* Clock Enable Register */ | ||
1368 | #define OSCC __REG(0x41300008) /* Oscillator Configuration Register */ | ||
1369 | #define CCSR __REG(0x4130000C) /* Core Clock Status Register */ | ||
1370 | |||
1371 | #define CCCR_N_MASK 0x0380 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */ | ||
1372 | #define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */ | ||
1373 | #define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */ | ||
1374 | |||
1375 | #define CKEN_AC97CONF (31) /* AC97 Controller Configuration */ | ||
1376 | #define CKEN_CAMERA (24) /* Camera Interface Clock Enable */ | ||
1377 | #define CKEN_SSP1 (23) /* SSP1 Unit Clock Enable */ | ||
1378 | #define CKEN_MEMC (22) /* Memory Controller Clock Enable */ | ||
1379 | #define CKEN_MEMSTK (21) /* Memory Stick Host Controller */ | ||
1380 | #define CKEN_IM (20) /* Internal Memory Clock Enable */ | ||
1381 | #define CKEN_KEYPAD (19) /* Keypad Interface Clock Enable */ | ||
1382 | #define CKEN_USIM (18) /* USIM Unit Clock Enable */ | ||
1383 | #define CKEN_MSL (17) /* MSL Unit Clock Enable */ | ||
1384 | #define CKEN_LCD (16) /* LCD Unit Clock Enable */ | ||
1385 | #define CKEN_PWRI2C (15) /* PWR I2C Unit Clock Enable */ | ||
1386 | #define CKEN_I2C (14) /* I2C Unit Clock Enable */ | ||
1387 | #define CKEN_FICP (13) /* FICP Unit Clock Enable */ | ||
1388 | #define CKEN_MMC (12) /* MMC Unit Clock Enable */ | ||
1389 | #define CKEN_USB (11) /* USB Unit Clock Enable */ | ||
1390 | #define CKEN_ASSP (10) /* ASSP (SSP3) Clock Enable */ | ||
1391 | #define CKEN_USBHOST (10) /* USB Host Unit Clock Enable */ | ||
1392 | #define CKEN_OSTIMER (9) /* OS Timer Unit Clock Enable */ | ||
1393 | #define CKEN_NSSP (9) /* NSSP (SSP2) Clock Enable */ | ||
1394 | #define CKEN_I2S (8) /* I2S Unit Clock Enable */ | ||
1395 | #define CKEN_BTUART (7) /* BTUART Unit Clock Enable */ | ||
1396 | #define CKEN_FFUART (6) /* FFUART Unit Clock Enable */ | ||
1397 | #define CKEN_STUART (5) /* STUART Unit Clock Enable */ | ||
1398 | #define CKEN_HWUART (4) /* HWUART Unit Clock Enable */ | ||
1399 | #define CKEN_SSP3 (4) /* SSP3 Unit Clock Enable */ | ||
1400 | #define CKEN_SSP (3) /* SSP Unit Clock Enable */ | ||
1401 | #define CKEN_SSP2 (3) /* SSP2 Unit Clock Enable */ | ||
1402 | #define CKEN_AC97 (2) /* AC97 Unit Clock Enable */ | ||
1403 | #define CKEN_PWM1 (1) /* PWM1 Clock Enable */ | ||
1404 | #define CKEN_PWM0 (0) /* PWM0 Clock Enable */ | ||
1405 | |||
1406 | #define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */ | ||
1407 | #define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */ | ||
1408 | |||
1409 | #ifdef CONFIG_PXA27x | 843 | #ifdef CONFIG_PXA27x |
1410 | 844 | ||
1411 | /* Camera Interface */ | 845 | /* Camera Interface */ |
diff --git a/include/asm-arm/arch-pxa/pxa25x-udc.h b/include/asm-arm/arch-pxa/pxa25x-udc.h new file mode 100644 index 000000000000..840305916b6d --- /dev/null +++ b/include/asm-arm/arch-pxa/pxa25x-udc.h | |||
@@ -0,0 +1,163 @@ | |||
1 | #ifndef _ASM_ARCH_PXA25X_UDC_H | ||
2 | #define _ASM_ARCH_PXA25X_UDC_H | ||
3 | |||
4 | #ifdef _ASM_ARCH_PXA27X_UDC_H | ||
5 | #error You can't include both PXA25x and PXA27x UDC support | ||
6 | #endif | ||
7 | |||
8 | #define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */ | ||
9 | #define UDC_RES2 __REG(0x40600008) /* UDC Undocumented - Reserved2 */ | ||
10 | #define UDC_RES3 __REG(0x4060000C) /* UDC Undocumented - Reserved3 */ | ||
11 | |||
12 | #define UDCCR __REG(0x40600000) /* UDC Control Register */ | ||
13 | #define UDCCR_UDE (1 << 0) /* UDC enable */ | ||
14 | #define UDCCR_UDA (1 << 1) /* UDC active */ | ||
15 | #define UDCCR_RSM (1 << 2) /* Device resume */ | ||
16 | #define UDCCR_RESIR (1 << 3) /* Resume interrupt request */ | ||
17 | #define UDCCR_SUSIR (1 << 4) /* Suspend interrupt request */ | ||
18 | #define UDCCR_SRM (1 << 5) /* Suspend/resume interrupt mask */ | ||
19 | #define UDCCR_RSTIR (1 << 6) /* Reset interrupt request */ | ||
20 | #define UDCCR_REM (1 << 7) /* Reset interrupt mask */ | ||
21 | |||
22 | #define UDCCS0 __REG(0x40600010) /* UDC Endpoint 0 Control/Status Register */ | ||
23 | #define UDCCS0_OPR (1 << 0) /* OUT packet ready */ | ||
24 | #define UDCCS0_IPR (1 << 1) /* IN packet ready */ | ||
25 | #define UDCCS0_FTF (1 << 2) /* Flush Tx FIFO */ | ||
26 | #define UDCCS0_DRWF (1 << 3) /* Device remote wakeup feature */ | ||
27 | #define UDCCS0_SST (1 << 4) /* Sent stall */ | ||
28 | #define UDCCS0_FST (1 << 5) /* Force stall */ | ||
29 | #define UDCCS0_RNE (1 << 6) /* Receive FIFO no empty */ | ||
30 | #define UDCCS0_SA (1 << 7) /* Setup active */ | ||
31 | |||
32 | /* Bulk IN - Endpoint 1,6,11 */ | ||
33 | #define UDCCS1 __REG(0x40600014) /* UDC Endpoint 1 (IN) Control/Status Register */ | ||
34 | #define UDCCS6 __REG(0x40600028) /* UDC Endpoint 6 (IN) Control/Status Register */ | ||
35 | #define UDCCS11 __REG(0x4060003C) /* UDC Endpoint 11 (IN) Control/Status Register */ | ||
36 | |||
37 | #define UDCCS_BI_TFS (1 << 0) /* Transmit FIFO service */ | ||
38 | #define UDCCS_BI_TPC (1 << 1) /* Transmit packet complete */ | ||
39 | #define UDCCS_BI_FTF (1 << 2) /* Flush Tx FIFO */ | ||
40 | #define UDCCS_BI_TUR (1 << 3) /* Transmit FIFO underrun */ | ||
41 | #define UDCCS_BI_SST (1 << 4) /* Sent stall */ | ||
42 | #define UDCCS_BI_FST (1 << 5) /* Force stall */ | ||
43 | #define UDCCS_BI_TSP (1 << 7) /* Transmit short packet */ | ||
44 | |||
45 | /* Bulk OUT - Endpoint 2,7,12 */ | ||
46 | #define UDCCS2 __REG(0x40600018) /* UDC Endpoint 2 (OUT) Control/Status Register */ | ||
47 | #define UDCCS7 __REG(0x4060002C) /* UDC Endpoint 7 (OUT) Control/Status Register */ | ||
48 | #define UDCCS12 __REG(0x40600040) /* UDC Endpoint 12 (OUT) Control/Status Register */ | ||
49 | |||
50 | #define UDCCS_BO_RFS (1 << 0) /* Receive FIFO service */ | ||
51 | #define UDCCS_BO_RPC (1 << 1) /* Receive packet complete */ | ||
52 | #define UDCCS_BO_DME (1 << 3) /* DMA enable */ | ||
53 | #define UDCCS_BO_SST (1 << 4) /* Sent stall */ | ||
54 | #define UDCCS_BO_FST (1 << 5) /* Force stall */ | ||
55 | #define UDCCS_BO_RNE (1 << 6) /* Receive FIFO not empty */ | ||
56 | #define UDCCS_BO_RSP (1 << 7) /* Receive short packet */ | ||
57 | |||
58 | /* Isochronous IN - Endpoint 3,8,13 */ | ||
59 | #define UDCCS3 __REG(0x4060001C) /* UDC Endpoint 3 (IN) Control/Status Register */ | ||
60 | #define UDCCS8 __REG(0x40600030) /* UDC Endpoint 8 (IN) Control/Status Register */ | ||
61 | #define UDCCS13 __REG(0x40600044) /* UDC Endpoint 13 (IN) Control/Status Register */ | ||
62 | |||
63 | #define UDCCS_II_TFS (1 << 0) /* Transmit FIFO service */ | ||
64 | #define UDCCS_II_TPC (1 << 1) /* Transmit packet complete */ | ||
65 | #define UDCCS_II_FTF (1 << 2) /* Flush Tx FIFO */ | ||
66 | #define UDCCS_II_TUR (1 << 3) /* Transmit FIFO underrun */ | ||
67 | #define UDCCS_II_TSP (1 << 7) /* Transmit short packet */ | ||
68 | |||
69 | /* Isochronous OUT - Endpoint 4,9,14 */ | ||
70 | #define UDCCS4 __REG(0x40600020) /* UDC Endpoint 4 (OUT) Control/Status Register */ | ||
71 | #define UDCCS9 __REG(0x40600034) /* UDC Endpoint 9 (OUT) Control/Status Register */ | ||
72 | #define UDCCS14 __REG(0x40600048) /* UDC Endpoint 14 (OUT) Control/Status Register */ | ||
73 | |||
74 | #define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ | ||
75 | #define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ | ||
76 | #define UDCCS_IO_ROF (1 << 2) /* Receive overflow */ | ||
77 | #define UDCCS_IO_DME (1 << 3) /* DMA enable */ | ||
78 | #define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ | ||
79 | #define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ | ||
80 | |||
81 | /* Interrupt IN - Endpoint 5,10,15 */ | ||
82 | #define UDCCS5 __REG(0x40600024) /* UDC Endpoint 5 (Interrupt) Control/Status Register */ | ||
83 | #define UDCCS10 __REG(0x40600038) /* UDC Endpoint 10 (Interrupt) Control/Status Register */ | ||
84 | #define UDCCS15 __REG(0x4060004C) /* UDC Endpoint 15 (Interrupt) Control/Status Register */ | ||
85 | |||
86 | #define UDCCS_INT_TFS (1 << 0) /* Transmit FIFO service */ | ||
87 | #define UDCCS_INT_TPC (1 << 1) /* Transmit packet complete */ | ||
88 | #define UDCCS_INT_FTF (1 << 2) /* Flush Tx FIFO */ | ||
89 | #define UDCCS_INT_TUR (1 << 3) /* Transmit FIFO underrun */ | ||
90 | #define UDCCS_INT_SST (1 << 4) /* Sent stall */ | ||
91 | #define UDCCS_INT_FST (1 << 5) /* Force stall */ | ||
92 | #define UDCCS_INT_TSP (1 << 7) /* Transmit short packet */ | ||
93 | |||
94 | #define UFNRH __REG(0x40600060) /* UDC Frame Number Register High */ | ||
95 | #define UFNRL __REG(0x40600064) /* UDC Frame Number Register Low */ | ||
96 | #define UBCR2 __REG(0x40600068) /* UDC Byte Count Reg 2 */ | ||
97 | #define UBCR4 __REG(0x4060006c) /* UDC Byte Count Reg 4 */ | ||
98 | #define UBCR7 __REG(0x40600070) /* UDC Byte Count Reg 7 */ | ||
99 | #define UBCR9 __REG(0x40600074) /* UDC Byte Count Reg 9 */ | ||
100 | #define UBCR12 __REG(0x40600078) /* UDC Byte Count Reg 12 */ | ||
101 | #define UBCR14 __REG(0x4060007c) /* UDC Byte Count Reg 14 */ | ||
102 | #define UDDR0 __REG(0x40600080) /* UDC Endpoint 0 Data Register */ | ||
103 | #define UDDR1 __REG(0x40600100) /* UDC Endpoint 1 Data Register */ | ||
104 | #define UDDR2 __REG(0x40600180) /* UDC Endpoint 2 Data Register */ | ||
105 | #define UDDR3 __REG(0x40600200) /* UDC Endpoint 3 Data Register */ | ||
106 | #define UDDR4 __REG(0x40600400) /* UDC Endpoint 4 Data Register */ | ||
107 | #define UDDR5 __REG(0x406000A0) /* UDC Endpoint 5 Data Register */ | ||
108 | #define UDDR6 __REG(0x40600600) /* UDC Endpoint 6 Data Register */ | ||
109 | #define UDDR7 __REG(0x40600680) /* UDC Endpoint 7 Data Register */ | ||
110 | #define UDDR8 __REG(0x40600700) /* UDC Endpoint 8 Data Register */ | ||
111 | #define UDDR9 __REG(0x40600900) /* UDC Endpoint 9 Data Register */ | ||
112 | #define UDDR10 __REG(0x406000C0) /* UDC Endpoint 10 Data Register */ | ||
113 | #define UDDR11 __REG(0x40600B00) /* UDC Endpoint 11 Data Register */ | ||
114 | #define UDDR12 __REG(0x40600B80) /* UDC Endpoint 12 Data Register */ | ||
115 | #define UDDR13 __REG(0x40600C00) /* UDC Endpoint 13 Data Register */ | ||
116 | #define UDDR14 __REG(0x40600E00) /* UDC Endpoint 14 Data Register */ | ||
117 | #define UDDR15 __REG(0x406000E0) /* UDC Endpoint 15 Data Register */ | ||
118 | |||
119 | #define UICR0 __REG(0x40600050) /* UDC Interrupt Control Register 0 */ | ||
120 | |||
121 | #define UICR0_IM0 (1 << 0) /* Interrupt mask ep 0 */ | ||
122 | #define UICR0_IM1 (1 << 1) /* Interrupt mask ep 1 */ | ||
123 | #define UICR0_IM2 (1 << 2) /* Interrupt mask ep 2 */ | ||
124 | #define UICR0_IM3 (1 << 3) /* Interrupt mask ep 3 */ | ||
125 | #define UICR0_IM4 (1 << 4) /* Interrupt mask ep 4 */ | ||
126 | #define UICR0_IM5 (1 << 5) /* Interrupt mask ep 5 */ | ||
127 | #define UICR0_IM6 (1 << 6) /* Interrupt mask ep 6 */ | ||
128 | #define UICR0_IM7 (1 << 7) /* Interrupt mask ep 7 */ | ||
129 | |||
130 | #define UICR1 __REG(0x40600054) /* UDC Interrupt Control Register 1 */ | ||
131 | |||
132 | #define UICR1_IM8 (1 << 0) /* Interrupt mask ep 8 */ | ||
133 | #define UICR1_IM9 (1 << 1) /* Interrupt mask ep 9 */ | ||
134 | #define UICR1_IM10 (1 << 2) /* Interrupt mask ep 10 */ | ||
135 | #define UICR1_IM11 (1 << 3) /* Interrupt mask ep 11 */ | ||
136 | #define UICR1_IM12 (1 << 4) /* Interrupt mask ep 12 */ | ||
137 | #define UICR1_IM13 (1 << 5) /* Interrupt mask ep 13 */ | ||
138 | #define UICR1_IM14 (1 << 6) /* Interrupt mask ep 14 */ | ||
139 | #define UICR1_IM15 (1 << 7) /* Interrupt mask ep 15 */ | ||
140 | |||
141 | #define USIR0 __REG(0x40600058) /* UDC Status Interrupt Register 0 */ | ||
142 | |||
143 | #define USIR0_IR0 (1 << 0) /* Interrupt request ep 0 */ | ||
144 | #define USIR0_IR1 (1 << 1) /* Interrupt request ep 1 */ | ||
145 | #define USIR0_IR2 (1 << 2) /* Interrupt request ep 2 */ | ||
146 | #define USIR0_IR3 (1 << 3) /* Interrupt request ep 3 */ | ||
147 | #define USIR0_IR4 (1 << 4) /* Interrupt request ep 4 */ | ||
148 | #define USIR0_IR5 (1 << 5) /* Interrupt request ep 5 */ | ||
149 | #define USIR0_IR6 (1 << 6) /* Interrupt request ep 6 */ | ||
150 | #define USIR0_IR7 (1 << 7) /* Interrupt request ep 7 */ | ||
151 | |||
152 | #define USIR1 __REG(0x4060005C) /* UDC Status Interrupt Register 1 */ | ||
153 | |||
154 | #define USIR1_IR8 (1 << 0) /* Interrupt request ep 8 */ | ||
155 | #define USIR1_IR9 (1 << 1) /* Interrupt request ep 9 */ | ||
156 | #define USIR1_IR10 (1 << 2) /* Interrupt request ep 10 */ | ||
157 | #define USIR1_IR11 (1 << 3) /* Interrupt request ep 11 */ | ||
158 | #define USIR1_IR12 (1 << 4) /* Interrupt request ep 12 */ | ||
159 | #define USIR1_IR13 (1 << 5) /* Interrupt request ep 13 */ | ||
160 | #define USIR1_IR14 (1 << 6) /* Interrupt request ep 14 */ | ||
161 | #define USIR1_IR15 (1 << 7) /* Interrupt request ep 15 */ | ||
162 | |||
163 | #endif | ||
diff --git a/include/asm-arm/arch-pxa/pxa27x-udc.h b/include/asm-arm/arch-pxa/pxa27x-udc.h new file mode 100644 index 000000000000..bc1cf7d0773a --- /dev/null +++ b/include/asm-arm/arch-pxa/pxa27x-udc.h | |||
@@ -0,0 +1,257 @@ | |||
1 | #ifndef _ASM_ARCH_PXA27X_UDC_H | ||
2 | #define _ASM_ARCH_PXA27X_UDC_H | ||
3 | |||
4 | #ifdef _ASM_ARCH_PXA25X_UDC_H | ||
5 | #error You cannot include both PXA25x and PXA27x UDC support | ||
6 | #endif | ||
7 | |||
8 | #define UDCCR __REG(0x40600000) /* UDC Control Register */ | ||
9 | #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ | ||
10 | #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation | ||
11 | Protocol Port Support */ | ||
12 | #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol | ||
13 | Support */ | ||
14 | #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol | ||
15 | Enable */ | ||
16 | #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */ | ||
17 | #define UDCCR_ACN (0x03 << 11) /* Active UDC configuration Number */ | ||
18 | #define UDCCR_ACN_S 11 | ||
19 | #define UDCCR_AIN (0x07 << 8) /* Active UDC interface Number */ | ||
20 | #define UDCCR_AIN_S 8 | ||
21 | #define UDCCR_AAISN (0x07 << 5) /* Active UDC Alternate Interface | ||
22 | Setting Number */ | ||
23 | #define UDCCR_AAISN_S 5 | ||
24 | #define UDCCR_SMAC (1 << 4) /* Switch Endpoint Memory to Active | ||
25 | Configuration */ | ||
26 | #define UDCCR_EMCE (1 << 3) /* Endpoint Memory Configuration | ||
27 | Error */ | ||
28 | #define UDCCR_UDR (1 << 2) /* UDC Resume */ | ||
29 | #define UDCCR_UDA (1 << 1) /* UDC Active */ | ||
30 | #define UDCCR_UDE (1 << 0) /* UDC Enable */ | ||
31 | |||
32 | #define UDCICR0 __REG(0x40600004) /* UDC Interrupt Control Register0 */ | ||
33 | #define UDCICR1 __REG(0x40600008) /* UDC Interrupt Control Register1 */ | ||
34 | #define UDCICR_FIFOERR (1 << 1) /* FIFO Error interrupt for EP */ | ||
35 | #define UDCICR_PKTCOMPL (1 << 0) /* Packet Complete interrupt for EP */ | ||
36 | |||
37 | #define UDC_INT_FIFOERROR (0x2) | ||
38 | #define UDC_INT_PACKETCMP (0x1) | ||
39 | |||
40 | #define UDCICR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) | ||
41 | #define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */ | ||
42 | #define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */ | ||
43 | #define UDCICR1_IERU (1 << 29) /* IntEn - Resume */ | ||
44 | #define UDCICR1_IESU (1 << 28) /* IntEn - Suspend */ | ||
45 | #define UDCICR1_IERS (1 << 27) /* IntEn - Reset */ | ||
46 | |||
47 | #define UDCISR0 __REG(0x4060000C) /* UDC Interrupt Status Register 0 */ | ||
48 | #define UDCISR1 __REG(0x40600010) /* UDC Interrupt Status Register 1 */ | ||
49 | #define UDCISR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) | ||
50 | #define UDCISR1_IRCC (1 << 31) /* IntReq - Configuration Change */ | ||
51 | #define UDCISR1_IRSOF (1 << 30) /* IntReq - Start of Frame */ | ||
52 | #define UDCISR1_IRRU (1 << 29) /* IntReq - Resume */ | ||
53 | #define UDCISR1_IRSU (1 << 28) /* IntReq - Suspend */ | ||
54 | #define UDCISR1_IRRS (1 << 27) /* IntReq - Reset */ | ||
55 | |||
56 | #define UDCFNR __REG(0x40600014) /* UDC Frame Number Register */ | ||
57 | #define UDCOTGICR __REG(0x40600018) /* UDC On-The-Go interrupt control */ | ||
58 | #define UDCOTGICR_IESF (1 << 24) /* OTG SET_FEATURE command recvd */ | ||
59 | #define UDCOTGICR_IEXR (1 << 17) /* Extra Transciever Interrupt | ||
60 | Rising Edge Interrupt Enable */ | ||
61 | #define UDCOTGICR_IEXF (1 << 16) /* Extra Transciever Interrupt | ||
62 | Falling Edge Interrupt Enable */ | ||
63 | #define UDCOTGICR_IEVV40R (1 << 9) /* OTG Vbus Valid 4.0V Rising Edge | ||
64 | Interrupt Enable */ | ||
65 | #define UDCOTGICR_IEVV40F (1 << 8) /* OTG Vbus Valid 4.0V Falling Edge | ||
66 | Interrupt Enable */ | ||
67 | #define UDCOTGICR_IEVV44R (1 << 7) /* OTG Vbus Valid 4.4V Rising Edge | ||
68 | Interrupt Enable */ | ||
69 | #define UDCOTGICR_IEVV44F (1 << 6) /* OTG Vbus Valid 4.4V Falling Edge | ||
70 | Interrupt Enable */ | ||
71 | #define UDCOTGICR_IESVR (1 << 5) /* OTG Session Valid Rising Edge | ||
72 | Interrupt Enable */ | ||
73 | #define UDCOTGICR_IESVF (1 << 4) /* OTG Session Valid Falling Edge | ||
74 | Interrupt Enable */ | ||
75 | #define UDCOTGICR_IESDR (1 << 3) /* OTG A-Device SRP Detect Rising | ||
76 | Edge Interrupt Enable */ | ||
77 | #define UDCOTGICR_IESDF (1 << 2) /* OTG A-Device SRP Detect Falling | ||
78 | Edge Interrupt Enable */ | ||
79 | #define UDCOTGICR_IEIDR (1 << 1) /* OTG ID Change Rising Edge | ||
80 | Interrupt Enable */ | ||
81 | #define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge | ||
82 | Interrupt Enable */ | ||
83 | |||
84 | #define UP2OCR __REG(0x40600020) /* USB Port 2 Output Control register */ | ||
85 | #define UP3OCR __REG(0x40600024) /* USB Port 2 Output Control register */ | ||
86 | |||
87 | #define UP2OCR_CPVEN (1 << 0) /* Charge Pump Vbus Enable */ | ||
88 | #define UP2OCR_CPVPE (1 << 1) /* Charge Pump Vbus Pulse Enable */ | ||
89 | #define UP2OCR_DPPDE (1 << 2) /* Host Port 2 Transceiver D+ Pull Down Enable */ | ||
90 | #define UP2OCR_DMPDE (1 << 3) /* Host Port 2 Transceiver D- Pull Down Enable */ | ||
91 | #define UP2OCR_DPPUE (1 << 4) /* Host Port 2 Transceiver D+ Pull Up Enable */ | ||
92 | #define UP2OCR_DMPUE (1 << 5) /* Host Port 2 Transceiver D- Pull Up Enable */ | ||
93 | #define UP2OCR_DPPUBE (1 << 6) /* Host Port 2 Transceiver D+ Pull Up Bypass Enable */ | ||
94 | #define UP2OCR_DMPUBE (1 << 7) /* Host Port 2 Transceiver D- Pull Up Bypass Enable */ | ||
95 | #define UP2OCR_EXSP (1 << 8) /* External Transceiver Speed Control */ | ||
96 | #define UP2OCR_EXSUS (1 << 9) /* External Transceiver Speed Enable */ | ||
97 | #define UP2OCR_IDON (1 << 10) /* OTG ID Read Enable */ | ||
98 | #define UP2OCR_HXS (1 << 16) /* Host Port 2 Transceiver Output Select */ | ||
99 | #define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */ | ||
100 | #define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */ | ||
101 | |||
102 | #define UDCCSN(x) __REG2(0x40600100, (x) << 2) | ||
103 | #define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ | ||
104 | #define UDCCSR0_SA (1 << 7) /* Setup Active */ | ||
105 | #define UDCCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */ | ||
106 | #define UDCCSR0_FST (1 << 5) /* Force Stall */ | ||
107 | #define UDCCSR0_SST (1 << 4) /* Sent Stall */ | ||
108 | #define UDCCSR0_DME (1 << 3) /* DMA Enable */ | ||
109 | #define UDCCSR0_FTF (1 << 2) /* Flush Transmit FIFO */ | ||
110 | #define UDCCSR0_IPR (1 << 1) /* IN Packet Ready */ | ||
111 | #define UDCCSR0_OPC (1 << 0) /* OUT Packet Complete */ | ||
112 | |||
113 | #define UDCCSRA __REG(0x40600104) /* UDC Control/Status register - Endpoint A */ | ||
114 | #define UDCCSRB __REG(0x40600108) /* UDC Control/Status register - Endpoint B */ | ||
115 | #define UDCCSRC __REG(0x4060010C) /* UDC Control/Status register - Endpoint C */ | ||
116 | #define UDCCSRD __REG(0x40600110) /* UDC Control/Status register - Endpoint D */ | ||
117 | #define UDCCSRE __REG(0x40600114) /* UDC Control/Status register - Endpoint E */ | ||
118 | #define UDCCSRF __REG(0x40600118) /* UDC Control/Status register - Endpoint F */ | ||
119 | #define UDCCSRG __REG(0x4060011C) /* UDC Control/Status register - Endpoint G */ | ||
120 | #define UDCCSRH __REG(0x40600120) /* UDC Control/Status register - Endpoint H */ | ||
121 | #define UDCCSRI __REG(0x40600124) /* UDC Control/Status register - Endpoint I */ | ||
122 | #define UDCCSRJ __REG(0x40600128) /* UDC Control/Status register - Endpoint J */ | ||
123 | #define UDCCSRK __REG(0x4060012C) /* UDC Control/Status register - Endpoint K */ | ||
124 | #define UDCCSRL __REG(0x40600130) /* UDC Control/Status register - Endpoint L */ | ||
125 | #define UDCCSRM __REG(0x40600134) /* UDC Control/Status register - Endpoint M */ | ||
126 | #define UDCCSRN __REG(0x40600138) /* UDC Control/Status register - Endpoint N */ | ||
127 | #define UDCCSRP __REG(0x4060013C) /* UDC Control/Status register - Endpoint P */ | ||
128 | #define UDCCSRQ __REG(0x40600140) /* UDC Control/Status register - Endpoint Q */ | ||
129 | #define UDCCSRR __REG(0x40600144) /* UDC Control/Status register - Endpoint R */ | ||
130 | #define UDCCSRS __REG(0x40600148) /* UDC Control/Status register - Endpoint S */ | ||
131 | #define UDCCSRT __REG(0x4060014C) /* UDC Control/Status register - Endpoint T */ | ||
132 | #define UDCCSRU __REG(0x40600150) /* UDC Control/Status register - Endpoint U */ | ||
133 | #define UDCCSRV __REG(0x40600154) /* UDC Control/Status register - Endpoint V */ | ||
134 | #define UDCCSRW __REG(0x40600158) /* UDC Control/Status register - Endpoint W */ | ||
135 | #define UDCCSRX __REG(0x4060015C) /* UDC Control/Status register - Endpoint X */ | ||
136 | |||
137 | #define UDCCSR_DPE (1 << 9) /* Data Packet Error */ | ||
138 | #define UDCCSR_FEF (1 << 8) /* Flush Endpoint FIFO */ | ||
139 | #define UDCCSR_SP (1 << 7) /* Short Packet Control/Status */ | ||
140 | #define UDCCSR_BNE (1 << 6) /* Buffer Not Empty (IN endpoints) */ | ||
141 | #define UDCCSR_BNF (1 << 6) /* Buffer Not Full (OUT endpoints) */ | ||
142 | #define UDCCSR_FST (1 << 5) /* Force STALL */ | ||
143 | #define UDCCSR_SST (1 << 4) /* Sent STALL */ | ||
144 | #define UDCCSR_DME (1 << 3) /* DMA Enable */ | ||
145 | #define UDCCSR_TRN (1 << 2) /* Tx/Rx NAK */ | ||
146 | #define UDCCSR_PC (1 << 1) /* Packet Complete */ | ||
147 | #define UDCCSR_FS (1 << 0) /* FIFO needs service */ | ||
148 | |||
149 | #define UDCBCN(x) __REG2(0x40600200, (x)<<2) | ||
150 | #define UDCBCR0 __REG(0x40600200) /* Byte Count Register - EP0 */ | ||
151 | #define UDCBCRA __REG(0x40600204) /* Byte Count Register - EPA */ | ||
152 | #define UDCBCRB __REG(0x40600208) /* Byte Count Register - EPB */ | ||
153 | #define UDCBCRC __REG(0x4060020C) /* Byte Count Register - EPC */ | ||
154 | #define UDCBCRD __REG(0x40600210) /* Byte Count Register - EPD */ | ||
155 | #define UDCBCRE __REG(0x40600214) /* Byte Count Register - EPE */ | ||
156 | #define UDCBCRF __REG(0x40600218) /* Byte Count Register - EPF */ | ||
157 | #define UDCBCRG __REG(0x4060021C) /* Byte Count Register - EPG */ | ||
158 | #define UDCBCRH __REG(0x40600220) /* Byte Count Register - EPH */ | ||
159 | #define UDCBCRI __REG(0x40600224) /* Byte Count Register - EPI */ | ||
160 | #define UDCBCRJ __REG(0x40600228) /* Byte Count Register - EPJ */ | ||
161 | #define UDCBCRK __REG(0x4060022C) /* Byte Count Register - EPK */ | ||
162 | #define UDCBCRL __REG(0x40600230) /* Byte Count Register - EPL */ | ||
163 | #define UDCBCRM __REG(0x40600234) /* Byte Count Register - EPM */ | ||
164 | #define UDCBCRN __REG(0x40600238) /* Byte Count Register - EPN */ | ||
165 | #define UDCBCRP __REG(0x4060023C) /* Byte Count Register - EPP */ | ||
166 | #define UDCBCRQ __REG(0x40600240) /* Byte Count Register - EPQ */ | ||
167 | #define UDCBCRR __REG(0x40600244) /* Byte Count Register - EPR */ | ||
168 | #define UDCBCRS __REG(0x40600248) /* Byte Count Register - EPS */ | ||
169 | #define UDCBCRT __REG(0x4060024C) /* Byte Count Register - EPT */ | ||
170 | #define UDCBCRU __REG(0x40600250) /* Byte Count Register - EPU */ | ||
171 | #define UDCBCRV __REG(0x40600254) /* Byte Count Register - EPV */ | ||
172 | #define UDCBCRW __REG(0x40600258) /* Byte Count Register - EPW */ | ||
173 | #define UDCBCRX __REG(0x4060025C) /* Byte Count Register - EPX */ | ||
174 | |||
175 | #define UDCDN(x) __REG2(0x40600300, (x)<<2) | ||
176 | #define PHYS_UDCDN(x) (0x40600300 + ((x)<<2)) | ||
177 | #define PUDCDN(x) (volatile u32 *)(io_p2v(PHYS_UDCDN((x)))) | ||
178 | #define UDCDR0 __REG(0x40600300) /* Data Register - EP0 */ | ||
179 | #define UDCDRA __REG(0x40600304) /* Data Register - EPA */ | ||
180 | #define UDCDRB __REG(0x40600308) /* Data Register - EPB */ | ||
181 | #define UDCDRC __REG(0x4060030C) /* Data Register - EPC */ | ||
182 | #define UDCDRD __REG(0x40600310) /* Data Register - EPD */ | ||
183 | #define UDCDRE __REG(0x40600314) /* Data Register - EPE */ | ||
184 | #define UDCDRF __REG(0x40600318) /* Data Register - EPF */ | ||
185 | #define UDCDRG __REG(0x4060031C) /* Data Register - EPG */ | ||
186 | #define UDCDRH __REG(0x40600320) /* Data Register - EPH */ | ||
187 | #define UDCDRI __REG(0x40600324) /* Data Register - EPI */ | ||
188 | #define UDCDRJ __REG(0x40600328) /* Data Register - EPJ */ | ||
189 | #define UDCDRK __REG(0x4060032C) /* Data Register - EPK */ | ||
190 | #define UDCDRL __REG(0x40600330) /* Data Register - EPL */ | ||
191 | #define UDCDRM __REG(0x40600334) /* Data Register - EPM */ | ||
192 | #define UDCDRN __REG(0x40600338) /* Data Register - EPN */ | ||
193 | #define UDCDRP __REG(0x4060033C) /* Data Register - EPP */ | ||
194 | #define UDCDRQ __REG(0x40600340) /* Data Register - EPQ */ | ||
195 | #define UDCDRR __REG(0x40600344) /* Data Register - EPR */ | ||
196 | #define UDCDRS __REG(0x40600348) /* Data Register - EPS */ | ||
197 | #define UDCDRT __REG(0x4060034C) /* Data Register - EPT */ | ||
198 | #define UDCDRU __REG(0x40600350) /* Data Register - EPU */ | ||
199 | #define UDCDRV __REG(0x40600354) /* Data Register - EPV */ | ||
200 | #define UDCDRW __REG(0x40600358) /* Data Register - EPW */ | ||
201 | #define UDCDRX __REG(0x4060035C) /* Data Register - EPX */ | ||
202 | |||
203 | #define UDCCN(x) __REG2(0x40600400, (x)<<2) | ||
204 | #define UDCCRA __REG(0x40600404) /* Configuration register EPA */ | ||
205 | #define UDCCRB __REG(0x40600408) /* Configuration register EPB */ | ||
206 | #define UDCCRC __REG(0x4060040C) /* Configuration register EPC */ | ||
207 | #define UDCCRD __REG(0x40600410) /* Configuration register EPD */ | ||
208 | #define UDCCRE __REG(0x40600414) /* Configuration register EPE */ | ||
209 | #define UDCCRF __REG(0x40600418) /* Configuration register EPF */ | ||
210 | #define UDCCRG __REG(0x4060041C) /* Configuration register EPG */ | ||
211 | #define UDCCRH __REG(0x40600420) /* Configuration register EPH */ | ||
212 | #define UDCCRI __REG(0x40600424) /* Configuration register EPI */ | ||
213 | #define UDCCRJ __REG(0x40600428) /* Configuration register EPJ */ | ||
214 | #define UDCCRK __REG(0x4060042C) /* Configuration register EPK */ | ||
215 | #define UDCCRL __REG(0x40600430) /* Configuration register EPL */ | ||
216 | #define UDCCRM __REG(0x40600434) /* Configuration register EPM */ | ||
217 | #define UDCCRN __REG(0x40600438) /* Configuration register EPN */ | ||
218 | #define UDCCRP __REG(0x4060043C) /* Configuration register EPP */ | ||
219 | #define UDCCRQ __REG(0x40600440) /* Configuration register EPQ */ | ||
220 | #define UDCCRR __REG(0x40600444) /* Configuration register EPR */ | ||
221 | #define UDCCRS __REG(0x40600448) /* Configuration register EPS */ | ||
222 | #define UDCCRT __REG(0x4060044C) /* Configuration register EPT */ | ||
223 | #define UDCCRU __REG(0x40600450) /* Configuration register EPU */ | ||
224 | #define UDCCRV __REG(0x40600454) /* Configuration register EPV */ | ||
225 | #define UDCCRW __REG(0x40600458) /* Configuration register EPW */ | ||
226 | #define UDCCRX __REG(0x4060045C) /* Configuration register EPX */ | ||
227 | |||
228 | #define UDCCONR_CN (0x03 << 25) /* Configuration Number */ | ||
229 | #define UDCCONR_CN_S (25) | ||
230 | #define UDCCONR_IN (0x07 << 22) /* Interface Number */ | ||
231 | #define UDCCONR_IN_S (22) | ||
232 | #define UDCCONR_AISN (0x07 << 19) /* Alternate Interface Number */ | ||
233 | #define UDCCONR_AISN_S (19) | ||
234 | #define UDCCONR_EN (0x0f << 15) /* Endpoint Number */ | ||
235 | #define UDCCONR_EN_S (15) | ||
236 | #define UDCCONR_ET (0x03 << 13) /* Endpoint Type: */ | ||
237 | #define UDCCONR_ET_S (13) | ||
238 | #define UDCCONR_ET_INT (0x03 << 13) /* Interrupt */ | ||
239 | #define UDCCONR_ET_BULK (0x02 << 13) /* Bulk */ | ||
240 | #define UDCCONR_ET_ISO (0x01 << 13) /* Isochronous */ | ||
241 | #define UDCCONR_ET_NU (0x00 << 13) /* Not used */ | ||
242 | #define UDCCONR_ED (1 << 12) /* Endpoint Direction */ | ||
243 | #define UDCCONR_MPS (0x3ff << 2) /* Maximum Packet Size */ | ||
244 | #define UDCCONR_MPS_S (2) | ||
245 | #define UDCCONR_DE (1 << 1) /* Double Buffering Enable */ | ||
246 | #define UDCCONR_EE (1 << 0) /* Endpoint Enable */ | ||
247 | |||
248 | |||
249 | #define UDC_INT_FIFOERROR (0x2) | ||
250 | #define UDC_INT_PACKETCMP (0x1) | ||
251 | |||
252 | #define UDC_FNR_MASK (0x7ff) | ||
253 | |||
254 | #define UDCCSR_WR_MASK (UDCCSR_DME|UDCCSR_FST) | ||
255 | #define UDC_BCR_MASK (0x3ff) | ||
256 | |||
257 | #endif | ||
diff --git a/include/asm-arm/arch-pxa/pxa2xx-gpio.h b/include/asm-arm/arch-pxa/pxa2xx-gpio.h index b81cd63cb2eb..6ef1dd09970b 100644 --- a/include/asm-arm/arch-pxa/pxa2xx-gpio.h +++ b/include/asm-arm/arch-pxa/pxa2xx-gpio.h | |||
@@ -1,6 +1,8 @@ | |||
1 | #ifndef __ASM_ARCH_PXA2XX_GPIO_H | 1 | #ifndef __ASM_ARCH_PXA2XX_GPIO_H |
2 | #define __ASM_ARCH_PXA2XX_GPIO_H | 2 | #define __ASM_ARCH_PXA2XX_GPIO_H |
3 | 3 | ||
4 | #warning Please use mfp-pxa2[57]x.h instead of pxa2xx-gpio.h | ||
5 | |||
4 | /* GPIO alternate function assignments */ | 6 | /* GPIO alternate function assignments */ |
5 | 7 | ||
6 | #define GPIO1_RST 1 /* reset */ | 8 | #define GPIO1_RST 1 /* reset */ |
diff --git a/include/asm-arm/arch-pxa/pxa2xx-regs.h b/include/asm-arm/arch-pxa/pxa2xx-regs.h index 9553b54fa5bc..73e0a329cf7f 100644 --- a/include/asm-arm/arch-pxa/pxa2xx-regs.h +++ b/include/asm-arm/arch-pxa/pxa2xx-regs.h | |||
@@ -81,4 +81,166 @@ | |||
81 | 81 | ||
82 | #endif | 82 | #endif |
83 | 83 | ||
84 | |||
85 | /* | ||
86 | * Power Manager | ||
87 | */ | ||
88 | |||
89 | #define PMCR __REG(0x40F00000) /* Power Manager Control Register */ | ||
90 | #define PSSR __REG(0x40F00004) /* Power Manager Sleep Status Register */ | ||
91 | #define PSPR __REG(0x40F00008) /* Power Manager Scratch Pad Register */ | ||
92 | #define PWER __REG(0x40F0000C) /* Power Manager Wake-up Enable Register */ | ||
93 | #define PRER __REG(0x40F00010) /* Power Manager GPIO Rising-Edge Detect Enable Register */ | ||
94 | #define PFER __REG(0x40F00014) /* Power Manager GPIO Falling-Edge Detect Enable Register */ | ||
95 | #define PEDR __REG(0x40F00018) /* Power Manager GPIO Edge Detect Status Register */ | ||
96 | #define PCFR __REG(0x40F0001C) /* Power Manager General Configuration Register */ | ||
97 | #define PGSR0 __REG(0x40F00020) /* Power Manager GPIO Sleep State Register for GP[31-0] */ | ||
98 | #define PGSR1 __REG(0x40F00024) /* Power Manager GPIO Sleep State Register for GP[63-32] */ | ||
99 | #define PGSR2 __REG(0x40F00028) /* Power Manager GPIO Sleep State Register for GP[84-64] */ | ||
100 | #define PGSR3 __REG(0x40F0002C) /* Power Manager GPIO Sleep State Register for GP[118-96] */ | ||
101 | #define RCSR __REG(0x40F00030) /* Reset Controller Status Register */ | ||
102 | |||
103 | #define PSLR __REG(0x40F00034) /* Power Manager Sleep Config Register */ | ||
104 | #define PSTR __REG(0x40F00038) /* Power Manager Standby Config Register */ | ||
105 | #define PSNR __REG(0x40F0003C) /* Power Manager Sense Config Register */ | ||
106 | #define PVCR __REG(0x40F00040) /* Power Manager VoltageControl Register */ | ||
107 | #define PKWR __REG(0x40F00050) /* Power Manager KB Wake-up Enable Reg */ | ||
108 | #define PKSR __REG(0x40F00054) /* Power Manager KB Level-Detect Register */ | ||
109 | #define PCMD(x) __REG2(0x40F00080, (x)<<2) | ||
110 | #define PCMD0 __REG(0x40F00080 + 0 * 4) | ||
111 | #define PCMD1 __REG(0x40F00080 + 1 * 4) | ||
112 | #define PCMD2 __REG(0x40F00080 + 2 * 4) | ||
113 | #define PCMD3 __REG(0x40F00080 + 3 * 4) | ||
114 | #define PCMD4 __REG(0x40F00080 + 4 * 4) | ||
115 | #define PCMD5 __REG(0x40F00080 + 5 * 4) | ||
116 | #define PCMD6 __REG(0x40F00080 + 6 * 4) | ||
117 | #define PCMD7 __REG(0x40F00080 + 7 * 4) | ||
118 | #define PCMD8 __REG(0x40F00080 + 8 * 4) | ||
119 | #define PCMD9 __REG(0x40F00080 + 9 * 4) | ||
120 | #define PCMD10 __REG(0x40F00080 + 10 * 4) | ||
121 | #define PCMD11 __REG(0x40F00080 + 11 * 4) | ||
122 | #define PCMD12 __REG(0x40F00080 + 12 * 4) | ||
123 | #define PCMD13 __REG(0x40F00080 + 13 * 4) | ||
124 | #define PCMD14 __REG(0x40F00080 + 14 * 4) | ||
125 | #define PCMD15 __REG(0x40F00080 + 15 * 4) | ||
126 | #define PCMD16 __REG(0x40F00080 + 16 * 4) | ||
127 | #define PCMD17 __REG(0x40F00080 + 17 * 4) | ||
128 | #define PCMD18 __REG(0x40F00080 + 18 * 4) | ||
129 | #define PCMD19 __REG(0x40F00080 + 19 * 4) | ||
130 | #define PCMD20 __REG(0x40F00080 + 20 * 4) | ||
131 | #define PCMD21 __REG(0x40F00080 + 21 * 4) | ||
132 | #define PCMD22 __REG(0x40F00080 + 22 * 4) | ||
133 | #define PCMD23 __REG(0x40F00080 + 23 * 4) | ||
134 | #define PCMD24 __REG(0x40F00080 + 24 * 4) | ||
135 | #define PCMD25 __REG(0x40F00080 + 25 * 4) | ||
136 | #define PCMD26 __REG(0x40F00080 + 26 * 4) | ||
137 | #define PCMD27 __REG(0x40F00080 + 27 * 4) | ||
138 | #define PCMD28 __REG(0x40F00080 + 28 * 4) | ||
139 | #define PCMD29 __REG(0x40F00080 + 29 * 4) | ||
140 | #define PCMD30 __REG(0x40F00080 + 30 * 4) | ||
141 | #define PCMD31 __REG(0x40F00080 + 31 * 4) | ||
142 | |||
143 | #define PCMD_MBC (1<<12) | ||
144 | #define PCMD_DCE (1<<11) | ||
145 | #define PCMD_LC (1<<10) | ||
146 | /* FIXME: PCMD_SQC need be checked. */ | ||
147 | #define PCMD_SQC (3<<8) /* currently only bit 8 is changeable, | ||
148 | bit 9 should be 0 all day. */ | ||
149 | #define PVCR_VCSA (0x1<<14) | ||
150 | #define PVCR_CommandDelay (0xf80) | ||
151 | #define PCFR_PI2C_EN (0x1 << 6) | ||
152 | |||
153 | #define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */ | ||
154 | #define PSSR_RDH (1 << 5) /* Read Disable Hold */ | ||
155 | #define PSSR_PH (1 << 4) /* Peripheral Control Hold */ | ||
156 | #define PSSR_STS (1 << 3) /* Standby Mode Status */ | ||
157 | #define PSSR_VFS (1 << 2) /* VDD Fault Status */ | ||
158 | #define PSSR_BFS (1 << 1) /* Battery Fault Status */ | ||
159 | #define PSSR_SSS (1 << 0) /* Software Sleep Status */ | ||
160 | |||
161 | #define PSLR_SL_ROD (1 << 20) /* Sleep-Mode/Depp-Sleep Mode nRESET_OUT Disable */ | ||
162 | |||
163 | #define PCFR_RO (1 << 15) /* RDH Override */ | ||
164 | #define PCFR_PO (1 << 14) /* PH Override */ | ||
165 | #define PCFR_GPROD (1 << 12) /* GPIO nRESET_OUT Disable */ | ||
166 | #define PCFR_L1_EN (1 << 11) /* Sleep Mode L1 converter Enable */ | ||
167 | #define PCFR_FVC (1 << 10) /* Frequency/Voltage Change */ | ||
168 | #define PCFR_DC_EN (1 << 7) /* Sleep/deep-sleep DC-DC Converter Enable */ | ||
169 | #define PCFR_PI2CEN (1 << 6) /* Enable PI2C controller */ | ||
170 | #define PCFR_GPR_EN (1 << 4) /* nRESET_GPIO Pin Enable */ | ||
171 | #define PCFR_DS (1 << 3) /* Deep Sleep Mode */ | ||
172 | #define PCFR_FS (1 << 2) /* Float Static Chip Selects */ | ||
173 | #define PCFR_FP (1 << 1) /* Float PCMCIA controls */ | ||
174 | #define PCFR_OPDE (1 << 0) /* 3.6864 MHz oscillator power-down enable */ | ||
175 | |||
176 | #define RCSR_GPR (1 << 3) /* GPIO Reset */ | ||
177 | #define RCSR_SMR (1 << 2) /* Sleep Mode */ | ||
178 | #define RCSR_WDR (1 << 1) /* Watchdog Reset */ | ||
179 | #define RCSR_HWR (1 << 0) /* Hardware Reset */ | ||
180 | |||
181 | #define PWER_GPIO(Nb) (1 << Nb) /* GPIO [0..15] wake-up enable */ | ||
182 | #define PWER_GPIO0 PWER_GPIO (0) /* GPIO [0] wake-up enable */ | ||
183 | #define PWER_GPIO1 PWER_GPIO (1) /* GPIO [1] wake-up enable */ | ||
184 | #define PWER_GPIO2 PWER_GPIO (2) /* GPIO [2] wake-up enable */ | ||
185 | #define PWER_GPIO3 PWER_GPIO (3) /* GPIO [3] wake-up enable */ | ||
186 | #define PWER_GPIO4 PWER_GPIO (4) /* GPIO [4] wake-up enable */ | ||
187 | #define PWER_GPIO5 PWER_GPIO (5) /* GPIO [5] wake-up enable */ | ||
188 | #define PWER_GPIO6 PWER_GPIO (6) /* GPIO [6] wake-up enable */ | ||
189 | #define PWER_GPIO7 PWER_GPIO (7) /* GPIO [7] wake-up enable */ | ||
190 | #define PWER_GPIO8 PWER_GPIO (8) /* GPIO [8] wake-up enable */ | ||
191 | #define PWER_GPIO9 PWER_GPIO (9) /* GPIO [9] wake-up enable */ | ||
192 | #define PWER_GPIO10 PWER_GPIO (10) /* GPIO [10] wake-up enable */ | ||
193 | #define PWER_GPIO11 PWER_GPIO (11) /* GPIO [11] wake-up enable */ | ||
194 | #define PWER_GPIO12 PWER_GPIO (12) /* GPIO [12] wake-up enable */ | ||
195 | #define PWER_GPIO13 PWER_GPIO (13) /* GPIO [13] wake-up enable */ | ||
196 | #define PWER_GPIO14 PWER_GPIO (14) /* GPIO [14] wake-up enable */ | ||
197 | #define PWER_GPIO15 PWER_GPIO (15) /* GPIO [15] wake-up enable */ | ||
198 | #define PWER_RTC 0x80000000 /* RTC alarm wake-up enable */ | ||
199 | |||
200 | /* | ||
201 | * PXA2xx specific Core clock definitions | ||
202 | */ | ||
203 | #define CCCR __REG(0x41300000) /* Core Clock Configuration Register */ | ||
204 | #define CCSR __REG(0x4130000C) /* Core Clock Status Register */ | ||
205 | #define CKEN __REG(0x41300004) /* Clock Enable Register */ | ||
206 | #define OSCC __REG(0x41300008) /* Oscillator Configuration Register */ | ||
207 | |||
208 | #define CCCR_N_MASK 0x0380 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */ | ||
209 | #define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */ | ||
210 | #define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */ | ||
211 | |||
212 | #define CKEN_AC97CONF (31) /* AC97 Controller Configuration */ | ||
213 | #define CKEN_CAMERA (24) /* Camera Interface Clock Enable */ | ||
214 | #define CKEN_SSP1 (23) /* SSP1 Unit Clock Enable */ | ||
215 | #define CKEN_MEMC (22) /* Memory Controller Clock Enable */ | ||
216 | #define CKEN_MEMSTK (21) /* Memory Stick Host Controller */ | ||
217 | #define CKEN_IM (20) /* Internal Memory Clock Enable */ | ||
218 | #define CKEN_KEYPAD (19) /* Keypad Interface Clock Enable */ | ||
219 | #define CKEN_USIM (18) /* USIM Unit Clock Enable */ | ||
220 | #define CKEN_MSL (17) /* MSL Unit Clock Enable */ | ||
221 | #define CKEN_LCD (16) /* LCD Unit Clock Enable */ | ||
222 | #define CKEN_PWRI2C (15) /* PWR I2C Unit Clock Enable */ | ||
223 | #define CKEN_I2C (14) /* I2C Unit Clock Enable */ | ||
224 | #define CKEN_FICP (13) /* FICP Unit Clock Enable */ | ||
225 | #define CKEN_MMC (12) /* MMC Unit Clock Enable */ | ||
226 | #define CKEN_USB (11) /* USB Unit Clock Enable */ | ||
227 | #define CKEN_ASSP (10) /* ASSP (SSP3) Clock Enable */ | ||
228 | #define CKEN_USBHOST (10) /* USB Host Unit Clock Enable */ | ||
229 | #define CKEN_OSTIMER (9) /* OS Timer Unit Clock Enable */ | ||
230 | #define CKEN_NSSP (9) /* NSSP (SSP2) Clock Enable */ | ||
231 | #define CKEN_I2S (8) /* I2S Unit Clock Enable */ | ||
232 | #define CKEN_BTUART (7) /* BTUART Unit Clock Enable */ | ||
233 | #define CKEN_FFUART (6) /* FFUART Unit Clock Enable */ | ||
234 | #define CKEN_STUART (5) /* STUART Unit Clock Enable */ | ||
235 | #define CKEN_HWUART (4) /* HWUART Unit Clock Enable */ | ||
236 | #define CKEN_SSP3 (4) /* SSP3 Unit Clock Enable */ | ||
237 | #define CKEN_SSP (3) /* SSP Unit Clock Enable */ | ||
238 | #define CKEN_SSP2 (3) /* SSP2 Unit Clock Enable */ | ||
239 | #define CKEN_AC97 (2) /* AC97 Unit Clock Enable */ | ||
240 | #define CKEN_PWM1 (1) /* PWM1 Clock Enable */ | ||
241 | #define CKEN_PWM0 (0) /* PWM0 Clock Enable */ | ||
242 | |||
243 | #define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */ | ||
244 | #define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */ | ||
245 | |||
84 | #endif | 246 | #endif |
diff --git a/include/asm-arm/arch-pxa/system.h b/include/asm-arm/arch-pxa/system.h index 9aa6c2e939e8..ba7e132de1b3 100644 --- a/include/asm-arm/arch-pxa/system.h +++ b/include/asm-arm/arch-pxa/system.h | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <asm/proc-fns.h> | 13 | #include <asm/proc-fns.h> |
14 | #include "hardware.h" | 14 | #include "hardware.h" |
15 | #include "pxa2xx-regs.h" | ||
15 | #include "pxa-regs.h" | 16 | #include "pxa-regs.h" |
16 | 17 | ||
17 | static inline void arch_idle(void) | 18 | static inline void arch_idle(void) |
diff --git a/include/asm-arm/arch-pxa/zylonite.h b/include/asm-arm/arch-pxa/zylonite.h index 4881b80f0f90..de577de8d18c 100644 --- a/include/asm-arm/arch-pxa/zylonite.h +++ b/include/asm-arm/arch-pxa/zylonite.h | |||
@@ -15,7 +15,6 @@ struct platform_mmc_slot { | |||
15 | 15 | ||
16 | extern struct platform_mmc_slot zylonite_mmc_slot[]; | 16 | extern struct platform_mmc_slot zylonite_mmc_slot[]; |
17 | 17 | ||
18 | extern int gpio_backlight; | ||
19 | extern int gpio_eth_irq; | 18 | extern int gpio_eth_irq; |
20 | 19 | ||
21 | extern int wm9713_irq; | 20 | extern int wm9713_irq; |
diff --git a/include/linux/pwm.h b/include/linux/pwm.h new file mode 100644 index 000000000000..3945f803d514 --- /dev/null +++ b/include/linux/pwm.h | |||
@@ -0,0 +1,31 @@ | |||
1 | #ifndef __LINUX_PWM_H | ||
2 | #define __LINUX_PWM_H | ||
3 | |||
4 | struct pwm_device; | ||
5 | |||
6 | /* | ||
7 | * pwm_request - request a PWM device | ||
8 | */ | ||
9 | struct pwm_device *pwm_request(int pwm_id, const char *label); | ||
10 | |||
11 | /* | ||
12 | * pwm_free - free a PWM device | ||
13 | */ | ||
14 | void pwm_free(struct pwm_device *pwm); | ||
15 | |||
16 | /* | ||
17 | * pwm_config - change a PWM device configuration | ||
18 | */ | ||
19 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns); | ||
20 | |||
21 | /* | ||
22 | * pwm_enable - start a PWM output toggling | ||
23 | */ | ||
24 | int pwm_enable(struct pwm_device *pwm); | ||
25 | |||
26 | /* | ||
27 | * pwm_disable - stop a PWM output toggling | ||
28 | */ | ||
29 | void pwm_disable(struct pwm_device *pwm); | ||
30 | |||
31 | #endif /* __ASM_ARCH_PWM_H */ | ||
diff --git a/include/linux/pwm_backlight.h b/include/linux/pwm_backlight.h new file mode 100644 index 000000000000..7a9754c96775 --- /dev/null +++ b/include/linux/pwm_backlight.h | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * Generic PWM backlight driver data - see drivers/video/backlight/pwm_bl.c | ||
3 | */ | ||
4 | #ifndef __LINUX_PWM_BACKLIGHT_H | ||
5 | #define __LINUX_PWM_BACKLIGHT_H | ||
6 | |||
7 | struct platform_pwm_backlight_data { | ||
8 | int pwm_id; | ||
9 | unsigned int max_brightness; | ||
10 | unsigned int dft_brightness; | ||
11 | unsigned int pwm_period_ns; | ||
12 | int (*init)(struct device *dev); | ||
13 | int (*notify)(int brightness); | ||
14 | void (*exit)(struct device *dev); | ||
15 | }; | ||
16 | |||
17 | #endif | ||
diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c index 425071030970..e130346732ba 100644 --- a/sound/soc/pxa/pxa2xx-i2s.c +++ b/sound/soc/pxa/pxa2xx-i2s.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/module.h> | 18 | #include <linux/module.h> |
19 | #include <linux/device.h> | 19 | #include <linux/device.h> |
20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
21 | #include <linux/clk.h> | ||
21 | #include <sound/core.h> | 22 | #include <sound/core.h> |
22 | #include <sound/pcm.h> | 23 | #include <sound/pcm.h> |
23 | #include <sound/initval.h> | 24 | #include <sound/initval.h> |
@@ -40,6 +41,7 @@ struct pxa_i2s_port { | |||
40 | u32 fmt; | 41 | u32 fmt; |
41 | }; | 42 | }; |
42 | static struct pxa_i2s_port pxa_i2s; | 43 | static struct pxa_i2s_port pxa_i2s; |
44 | static struct clk *clk_i2s; | ||
43 | 45 | ||
44 | static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_out = { | 46 | static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_out = { |
45 | .name = "I2S PCM Stereo out", | 47 | .name = "I2S PCM Stereo out", |
@@ -82,6 +84,10 @@ static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream) | |||
82 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 84 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
83 | struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai; | 85 | struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai; |
84 | 86 | ||
87 | clk_i2s = clk_get(NULL, "I2SCLK"); | ||
88 | if (IS_ERR(clk_i2s)) | ||
89 | return PTR_ERR(clk_i2s); | ||
90 | |||
85 | if (!cpu_dai->active) { | 91 | if (!cpu_dai->active) { |
86 | SACR0 |= SACR0_RST; | 92 | SACR0 |= SACR0_RST; |
87 | SACR0 = 0; | 93 | SACR0 = 0; |
@@ -149,7 +155,7 @@ static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream, | |||
149 | pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx); | 155 | pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx); |
150 | pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm); | 156 | pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm); |
151 | pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk); | 157 | pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk); |
152 | pxa_set_cken(CKEN_I2S, 1); | 158 | clk_enable(clk_i2s); |
153 | pxa_i2s_wait(); | 159 | pxa_i2s_wait(); |
154 | 160 | ||
155 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 161 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
@@ -234,8 +240,10 @@ static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream) | |||
234 | if (SACR1 & (SACR1_DREC | SACR1_DRPL)) { | 240 | if (SACR1 & (SACR1_DREC | SACR1_DRPL)) { |
235 | SACR0 &= ~SACR0_ENB; | 241 | SACR0 &= ~SACR0_ENB; |
236 | pxa_i2s_wait(); | 242 | pxa_i2s_wait(); |
237 | pxa_set_cken(CKEN_I2S, 0); | 243 | clk_disable(clk_i2s); |
238 | } | 244 | } |
245 | |||
246 | clk_put(clk_i2s); | ||
239 | } | 247 | } |
240 | 248 | ||
241 | #ifdef CONFIG_PM | 249 | #ifdef CONFIG_PM |