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-rw-r--r--arch/mips/alchemy/common/clocks.c31
-rw-r--r--arch/mips/alchemy/common/time.c1
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h2
3 files changed, 0 insertions, 34 deletions
diff --git a/arch/mips/alchemy/common/clocks.c b/arch/mips/alchemy/common/clocks.c
index 043429d17c5f..a8170fda4932 100644
--- a/arch/mips/alchemy/common/clocks.c
+++ b/arch/mips/alchemy/common/clocks.c
@@ -30,7 +30,6 @@
30#include <asm/mach-au1x00/au1000.h> 30#include <asm/mach-au1x00/au1000.h>
31 31
32static unsigned int au1x00_clock; /* Hz */ 32static unsigned int au1x00_clock; /* Hz */
33static unsigned int lcd_clock; /* KHz */
34static unsigned long uart_baud_base; 33static unsigned long uart_baud_base;
35 34
36/* 35/*
@@ -61,33 +60,3 @@ void set_au1x00_uart_baud_base(unsigned long new_baud_base)
61{ 60{
62 uart_baud_base = new_baud_base; 61 uart_baud_base = new_baud_base;
63} 62}
64
65/*
66 * Calculate the Au1x00's LCD clock based on the current
67 * cpu clock and the system bus clock, and try to keep it
68 * below 40 MHz (the Pb1000 board can lock-up if the LCD
69 * clock is over 40 MHz).
70 */
71void set_au1x00_lcd_clock(void)
72{
73 unsigned int static_cfg0;
74 unsigned int sys_busclk = (get_au1x00_speed() / 1000) /
75 ((int)(au_readl(SYS_POWERCTRL) & 0x03) + 2);
76
77 static_cfg0 = au_readl(MEM_STCFG0);
78
79 if (static_cfg0 & (1 << 11))
80 lcd_clock = sys_busclk / 5; /* note: BCLK switching fails with D5 */
81 else
82 lcd_clock = sys_busclk / 4;
83
84 if (lcd_clock > 50000) /* Epson MAX */
85 printk(KERN_WARNING "warning: LCD clock too high (%u KHz)\n",
86 lcd_clock);
87}
88
89unsigned int get_au1x00_lcd_clock(void)
90{
91 return lcd_clock;
92}
93EXPORT_SYMBOL(get_au1x00_lcd_clock);
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c
index 563d9390a872..68d714258e92 100644
--- a/arch/mips/alchemy/common/time.c
+++ b/arch/mips/alchemy/common/time.c
@@ -224,7 +224,6 @@ void __init plat_time_init(void)
224 printk(KERN_INFO "CPU frequency %u.%02u MHz\n", 224 printk(KERN_INFO "CPU frequency %u.%02u MHz\n",
225 est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000); 225 est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000);
226 set_au1x00_speed(est_freq); 226 set_au1x00_speed(est_freq);
227 set_au1x00_lcd_clock(); /* program the LCD clock */
228 227
229#ifdef CONFIG_PM 228#ifdef CONFIG_PM
230 /* 229 /*
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index a7ba35247c8a..d07632e3230b 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -97,8 +97,6 @@ extern void set_au1x00_speed(unsigned int new_freq);
97extern unsigned int get_au1x00_speed(void); 97extern unsigned int get_au1x00_speed(void);
98extern void set_au1x00_uart_baud_base(unsigned long new_baud_base); 98extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
99extern unsigned long get_au1x00_uart_baud_base(void); 99extern unsigned long get_au1x00_uart_baud_base(void);
100extern void set_au1x00_lcd_clock(void);
101extern unsigned int get_au1x00_lcd_clock(void);
102 100
103/* 101/*
104 * Every board describes its IRQ mapping with this table. 102 * Every board describes its IRQ mapping with this table.