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-rw-r--r--arch/arm/mach-omap2/id.c195
-rw-r--r--include/asm-arm/arch-omap/cpu.h39
2 files changed, 205 insertions, 29 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 4dfd878d7968..dff4b16cead6 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -17,16 +17,23 @@
17 17
18#include <asm/io.h> 18#include <asm/io.h>
19 19
20#if defined(CONFIG_ARCH_OMAP2420) 20#include <asm/arch/control.h>
21#define OMAP24XX_TAP_BASE io_p2v(0x48014000) 21#include <asm/arch/cpu.h>
22#endif
23 22
24#if defined(CONFIG_ARCH_OMAP2430) 23#if defined(CONFIG_ARCH_OMAP2420)
25#define OMAP24XX_TAP_BASE io_p2v(0x4900A000) 24#define TAP_BASE io_p2v(0x48014000)
25#elif defined(CONFIG_ARCH_OMAP2430)
26#define TAP_BASE io_p2v(0x4900A000)
27#elif defined(CONFIG_ARCH_OMAP34XX)
28#define TAP_BASE io_p2v(0x4830A000)
26#endif 29#endif
27 30
28#define OMAP_TAP_IDCODE 0x0204 31#define OMAP_TAP_IDCODE 0x0204
32#if defined(CONFIG_ARCH_OMAP34XX)
33#define OMAP_TAP_PROD_ID 0x0210
34#else
29#define OMAP_TAP_PROD_ID 0x0208 35#define OMAP_TAP_PROD_ID 0x0208
36#endif
30 37
31#define OMAP_TAP_DIE_ID_0 0x0218 38#define OMAP_TAP_DIE_ID_0 0x0218
32#define OMAP_TAP_DIE_ID_1 0x021C 39#define OMAP_TAP_DIE_ID_1 0x021C
@@ -56,9 +63,134 @@ static struct omap_id omap_ids[] __initdata = {
56 { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300000 }, 63 { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300000 },
57}; 64};
58 65
66static struct omap_chip_id omap_chip;
67
68/**
69 * omap_chip_is - test whether currently running OMAP matches a chip type
70 * @oc: omap_chip_t to test against
71 *
72 * Test whether the currently-running OMAP chip matches the supplied
73 * chip type 'oc'. Returns 1 upon a match; 0 upon failure.
74 */
75int omap_chip_is(struct omap_chip_id oci)
76{
77 return (oci.oc & omap_chip.oc) ? 1 : 0;
78}
79EXPORT_SYMBOL(omap_chip_is);
80
59static u32 __init read_tap_reg(int reg) 81static u32 __init read_tap_reg(int reg)
60{ 82{
61 return __raw_readl(OMAP24XX_TAP_BASE + reg); 83 unsigned int regval = 0;
84 u32 cpuid;
85
86 /* Reading the IDCODE register on 3430 ES1 results in a
87 * data abort as the register is not exposed on the OCP
88 * Hence reading the Cortex Rev
89 */
90 cpuid = read_cpuid(CPUID_ID);
91
92 /* If the processor type is Cortex-A8 and the revision is 0x0
93 * it means its Cortex r0p0 which is 3430 ES1
94 */
95 if ((((cpuid >> 4) & 0xFFF) == 0xC08) && ((cpuid & 0xF) == 0x0)) {
96 switch (reg) {
97 case OMAP_TAP_IDCODE : regval = 0x0B7AE02F; break;
98 /* Making DevType as 0xF in ES1 to differ from ES2 */
99 case OMAP_TAP_PROD_ID : regval = 0x000F00F0; break;
100 case OMAP_TAP_DIE_ID_0: regval = 0x01000000; break;
101 case OMAP_TAP_DIE_ID_1: regval = 0x1012d687; break;
102 case OMAP_TAP_DIE_ID_2: regval = 0x00000000; break;
103 case OMAP_TAP_DIE_ID_3: regval = 0x2d2c0000; break;
104 }
105 } else
106 regval = __raw_readl(TAP_BASE + reg);
107
108 return regval;
109
110}
111
112/*
113 * _set_system_rev - set the system_rev global based on current OMAP chip type
114 *
115 * Set the system_rev global. This is primarily used by the cpu_is_omapxxxx()
116 * macros.
117 */
118static void __init _set_system_rev(u32 type, u8 rev)
119{
120 u32 i, ctrl_status;
121
122 /*
123 * system_rev encoding is as follows
124 * system_rev & 0xff000000 -> Omap Class (24xx/34xx)
125 * system_rev & 0xfff00000 -> Omap Sub Class (242x/343x)
126 * system_rev & 0xffff0000 -> Omap type (2420/2422/2423/2430/3430)
127 * system_rev & 0x0000f000 -> Silicon revision (ES1, ES2 )
128 * system_rev & 0x00000700 -> Device Type ( EMU/HS/GP/BAD )
129 * system_rev & 0x000000c0 -> IDCODE revision[6:7]
130 * system_rev & 0x0000003f -> sys_boot[0:5]
131 */
132 /* Embedding the ES revision info in type field */
133 system_rev = type;
134 /* Also add IDCODE revision info only two lower bits */
135 system_rev |= ((rev & 0x3) << 6);
136
137 /* Add in the device type and sys_boot fields (see above) */
138 if (cpu_is_omap24xx()) {
139 i = OMAP24XX_CONTROL_STATUS;
140 } else if (cpu_is_omap343x()) {
141 i = OMAP343X_CONTROL_STATUS;
142 } else {
143 printk(KERN_ERR "id: unknown CPU type\n");
144 BUG();
145 }
146 ctrl_status = omap_ctrl_readl(i);
147 system_rev |= (ctrl_status & (OMAP2_SYSBOOT_5_MASK |
148 OMAP2_SYSBOOT_4_MASK |
149 OMAP2_SYSBOOT_3_MASK |
150 OMAP2_SYSBOOT_2_MASK |
151 OMAP2_SYSBOOT_1_MASK |
152 OMAP2_SYSBOOT_0_MASK));
153 system_rev |= (ctrl_status & OMAP2_DEVICETYPE_MASK);
154}
155
156
157/*
158 * _set_omap_chip - set the omap_chip global based on OMAP chip type
159 *
160 * Build the omap_chip bits. This variable is used by powerdomain and
161 * clockdomain code to indicate whether structures are applicable for
162 * the current OMAP chip type by ANDing it against a 'platform' bitfield
163 * in the structure.
164 */
165static void __init _set_omap_chip(void)
166{
167 if (cpu_is_omap343x()) {
168
169 omap_chip.oc = CHIP_IS_OMAP3430;
170 if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0))
171 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
172 else if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0))
173 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
174
175 } else if (cpu_is_omap243x()) {
176
177 /* Currently only supports 2430ES2.1 and 2430-all */
178 omap_chip.oc |= CHIP_IS_OMAP2430;
179
180 } else if (cpu_is_omap242x()) {
181
182 /* Currently only supports 2420ES2.1.1 and 2420-all */
183 omap_chip.oc |= CHIP_IS_OMAP2420;
184
185 } else {
186
187 /* Current CPU not supported by this code. */
188 printk(KERN_WARNING "OMAP chip type code does not yet support "
189 "this CPU type.\n");
190 WARN_ON(1);
191
192 }
193
62} 194}
63 195
64void __init omap2_check_revision(void) 196void __init omap2_check_revision(void)
@@ -76,21 +208,31 @@ void __init omap2_check_revision(void)
76 rev = (idcode >> 28) & 0x0f; 208 rev = (idcode >> 28) & 0x0f;
77 dev_type = (prod_id >> 16) & 0x0f; 209 dev_type = (prod_id >> 16) & 0x0f;
78 210
79#ifdef DEBUG 211 pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
80 printk(KERN_DEBUG "OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n", 212 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
81 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff); 213 pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
82 printk(KERN_DEBUG "OMAP_TAP_DIE_ID_0: 0x%08x\n", 214 read_tap_reg(OMAP_TAP_DIE_ID_0));
83 read_tap_reg(OMAP_TAP_DIE_ID_0)); 215 pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
84 printk(KERN_DEBUG "OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n", 216 read_tap_reg(OMAP_TAP_DIE_ID_1),
85 read_tap_reg(OMAP_TAP_DIE_ID_1), 217 (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
86 (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf); 218 pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
87 printk(KERN_DEBUG "OMAP_TAP_DIE_ID_2: 0x%08x\n", 219 read_tap_reg(OMAP_TAP_DIE_ID_2));
88 read_tap_reg(OMAP_TAP_DIE_ID_2)); 220 pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
89 printk(KERN_DEBUG "OMAP_TAP_DIE_ID_3: 0x%08x\n", 221 read_tap_reg(OMAP_TAP_DIE_ID_3));
90 read_tap_reg(OMAP_TAP_DIE_ID_3)); 222 pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
91 printk(KERN_DEBUG "OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n", 223 prod_id, dev_type);
92 prod_id, dev_type); 224
93#endif 225 /*
226 * Detection for 34xx ES2.0 and above can be done with just
227 * hawkeye and rev. See TRM 1.5.2 Device Identification.
228 * Note that rev cannot be used directly as ES1.0 uses value 0.
229 */
230 if (hawkeye == 0xb7ae) {
231 system_rev = 0x34300000 | ((1 + rev) << 12);
232 pr_info("OMAP%04x ES2.%i\n", system_rev >> 16, rev);
233 _set_omap_chip();
234 return;
235 }
94 236
95 /* Check hawkeye ids */ 237 /* Check hawkeye ids */
96 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { 238 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
@@ -114,16 +256,15 @@ void __init omap2_check_revision(void)
114 omap_ids[i].type >> 16); 256 omap_ids[i].type >> 16);
115 j = i; 257 j = i;
116 } 258 }
117 system_rev = omap_ids[j].type;
118 259
119 system_rev |= rev << 8; 260 _set_system_rev(omap_ids[j].type, rev);
120 261
121 /* Add the cpu class info (24xx) */ 262 _set_omap_chip();
122 system_rev |= 0x24;
123 263
124 pr_info("OMAP%04x", system_rev >> 16); 264 pr_info("OMAP%04x", system_rev >> 16);
125 if ((system_rev >> 8) & 0x0f) 265 if ((system_rev >> 8) & 0x0f)
126 printk("%x", (system_rev >> 8) & 0x0f); 266 pr_info("ES%x", (system_rev >> 12) & 0xf);
127 printk("\n"); 267 pr_info("\n");
268
128} 269}
129 270
diff --git a/include/asm-arm/arch-omap/cpu.h b/include/asm-arm/arch-omap/cpu.h
index e8a4cf52778b..52db09f83281 100644
--- a/include/asm-arm/arch-omap/cpu.h
+++ b/include/asm-arm/arch-omap/cpu.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * OMAP cpu type detection 4 * OMAP cpu type detection
5 * 5 *
6 * Copyright (C) 2004 Nokia Corporation 6 * Copyright (C) 2004, 2008 Nokia Corporation
7 * 7 *
8 * Written by Tony Lindgren <tony.lindgren@nokia.com> 8 * Written by Tony Lindgren <tony.lindgren@nokia.com>
9 * 9 *
@@ -26,6 +26,12 @@
26#ifndef __ASM_ARCH_OMAP_CPU_H 26#ifndef __ASM_ARCH_OMAP_CPU_H
27#define __ASM_ARCH_OMAP_CPU_H 27#define __ASM_ARCH_OMAP_CPU_H
28 28
29struct omap_chip_id {
30 u8 oc;
31};
32
33#define OMAP_CHIP_INIT(x) { .oc = x }
34
29extern unsigned int system_rev; 35extern unsigned int system_rev;
30 36
31#define omap2_cpu_rev() ((system_rev >> 12) & 0x0f) 37#define omap2_cpu_rev() ((system_rev >> 12) & 0x0f)
@@ -345,6 +351,33 @@ IS_OMAP_TYPE(3430, 0x3430)
345#define OMAP2430_REV_ES1_0 0x24300000 351#define OMAP2430_REV_ES1_0 0x24300000
346#define OMAP3430_REV_ES1_0 0x34300000 352#define OMAP3430_REV_ES1_0 0x34300000
347#define OMAP3430_REV_ES2_0 0x34301000 353#define OMAP3430_REV_ES2_0 0x34301000
354#define OMAP3430_REV_ES2_1 0x34302000
355#define OMAP3430_REV_ES2_2 0x34303000
356
357/*
358 * omap_chip bits
359 *
360 * CHIP_IS_OMAP{2420,2430,3430} indicate that a particular structure is
361 * valid on all chips of that type. CHIP_IS_OMAP3430ES{1,2} indicates
362 * something that is only valid on that particular ES revision.
363 *
364 * These bits may be ORed together to indicate structures that are
365 * available on multiple chip types.
366 *
367 * To test whether a particular structure matches the current OMAP chip type,
368 * use omap_chip_is().
369 *
370 */
371#define CHIP_IS_OMAP2420 (1 << 0)
372#define CHIP_IS_OMAP2430 (1 << 1)
373#define CHIP_IS_OMAP3430 (1 << 2)
374#define CHIP_IS_OMAP3430ES1 (1 << 3)
375#define CHIP_IS_OMAP3430ES2 (1 << 4)
376
377#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
378
379int omap_chip_is(struct omap_chip_id oci);
380
348 381
349/* 382/*
350 * Macro to detect device type i.e. EMU/HS/TST/GP/BAD 383 * Macro to detect device type i.e. EMU/HS/TST/GP/BAD
@@ -362,6 +395,8 @@ IS_OMAP_TYPE(3430, 0x3430)
362#define is_device_type_gp() (get_device_type() == DEVICE_TYPE_GP) 395#define is_device_type_gp() (get_device_type() == DEVICE_TYPE_GP)
363#define is_device_type_bad() (get_device_type() == DEVICE_TYPE_BAD) 396#define is_device_type_bad() (get_device_type() == DEVICE_TYPE_BAD)
364 397
365#endif 398void omap2_check_revision(void);
399
400#endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */
366 401
367#endif 402#endif