133 files changed, 9897 insertions, 3423 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index e6c06fa3290e..3d72cbbc579d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -475,11 +475,28 @@ M:	kernel@wantstofly.org
 L:      linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
 S:      Maintained
 
+ARM/COMPULAB CM-X270/EM-X270 MACHINE SUPPORT
+P:      Mike Rapoport
+M:      mike@compulab.co.il
+L:      linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
+S:      Maintained
+
 ARM/CORGI MACHINE SUPPORT
 P:      Richard Purdie
 M:      rpurdie@rpsys.net
 S:      Maintained
 
+ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6)
+P:      Daniel Ribeiro
+M:      drwyrm@gmail.com
+P:      Stefan Schmidt
+M:      stefan@openezx.org
+P:      Harald Welte
+M:      laforge@openezx.org
+L:      openezx-devel@lists.openezx.org (subscribers-only)
+W:      http://www.openezx.org/
+S:      Maintained
+
 ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
 P:      Lennert Buytenhek
 M:      kernel@wantstofly.org
@@ -567,10 +584,18 @@ L:	linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
 S:      Maintained
 
 ARM/TOSA MACHINE SUPPORT
+P:      Dmitry Baryshkov
+M:      dbaryshkov@gmail.com
 P:      Dirk Opfer
 M:      dirk@opfer-online.de
 S:      Maintained
 
+ARM/PALMTX SUPPORT
+P:      Marek Vasut
+M:      marek.vasut@gmail.com
+W:      http://hackndev.com
+S:      Maintained
+
 ARM/PLEB SUPPORT
 P:      Peter Chubb
 M:      pleb@gelato.unsw.edu.au
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3d9397ec746d..e57226e3afeb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -22,6 +22,9 @@ config ARM
           Europe.  There is an ARM Linux project with a web page at
           <http://www.arm.linux.org.uk/>.
 
+config HAVE_PWM
+        bool
+
 config SYS_SUPPORTS_APM_EMULATION
         bool
 
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c
index eb06d0b2cb74..79fa71d990b5 100644
--- a/arch/arm/common/sa1111.c
+++ b/arch/arm/common/sa1111.c
@@ -627,7 +627,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
         if (!sachip)
                 return -ENOMEM;
 
-        sachip->clk = clk_get(me, "GPIO27_CLK");
+        sachip->clk = clk_get(me, "SA1111_CLK");
         if (!sachip->clk) {
                 ret = PTR_ERR(sachip->clk);
                 goto err_free;
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c
index 5bba5255b119..8822b684d474 100644
--- a/arch/arm/common/sharpsl_pm.c
+++ b/arch/arm/common/sharpsl_pm.c
@@ -31,6 +31,7 @@
 #include <asm/irq.h>
 #include <asm/arch/pm.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/sharpsl.h>
 #include <asm/hardware/sharpsl_pm.h>
 
@@ -157,6 +158,7 @@ static void sharpsl_battery_thread(struct work_struct *private_)
         dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage,
                         sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies);
 
+#ifdef CONFIG_BACKLIGHT_CORGI
         /* If battery is low. limit backlight intensity to save power. */
         if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
                         && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) ||
@@ -169,6 +171,7 @@ static void sharpsl_battery_thread(struct work_struct *private_)
                 sharpsl_pm.machinfo->backlight_limit(0);
                 sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT;
         }
+#endif
 
         /* Suspend if critical battery level */
         if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE)
diff --git a/arch/arm/configs/em_x270_defconfig b/arch/arm/configs/em_x270_defconfig
deleted file mode 100644
index d3114c23603b..000000000000
--- a/arch/arm/configs/em_x270_defconfig
+++ /dev/null
@@ -1,1264 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22
-# Mon Jul  9 15:18:20 2007
-#
-CONFIG_ARM=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_GENERIC_GPIO=y
-CONFIG_GENERIC_TIME=y
-# CONFIG_GENERIC_CLOCKEVENTS is not set
-CONFIG_MMU=y
-# CONFIG_NO_IOPORT is not set
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_ZONE_DMA=y
-CONFIG_ARCH_MTD_XIP=y
-CONFIG_VECTORS_BASE=0xffff0000
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION="-em-x270"
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
-# CONFIG_UTS_NS is not set
-# CONFIG_AUDIT is not set
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=17
-CONFIG_SYSFS_DEPRECATED=y
-# CONFIG_RELAY is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
-CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
-CONFIG_SHMEM=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_SLAB=y
-# CONFIG_SLUB is not set
-# CONFIG_SLOB is not set
-CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Block layer
-#
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# System Type
-#
-# CONFIG_ARCH_AAEC2000 is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_REALVIEW is not set
-# CONFIG_ARCH_VERSATILE is not set
-# CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS7500 is not set
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
-# CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_EP93XX is not set
-# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_NETX is not set
-# CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_IOP13XX is not set
-# CONFIG_ARCH_IOP32X is not set
-# CONFIG_ARCH_IOP33X is not set
-# CONFIG_ARCH_IXP23XX is not set
-# CONFIG_ARCH_IXP2000 is not set
-# CONFIG_ARCH_IXP4XX is not set
-# CONFIG_ARCH_L7200 is not set
-# CONFIG_ARCH_KS8695 is not set
-# CONFIG_ARCH_NS9XXX is not set
-# CONFIG_ARCH_PNX4008 is not set
-CONFIG_ARCH_PXA=y
-# CONFIG_ARCH_RPC is not set
-# CONFIG_ARCH_SA1100 is not set
-# CONFIG_ARCH_S3C2410 is not set
-# CONFIG_ARCH_SHARK is not set
-# CONFIG_ARCH_LH7A40X is not set
-# CONFIG_ARCH_DAVINCI is not set
-# CONFIG_ARCH_OMAP is not set
-
-#
-# Intel PXA2xx Implementations
-#
-# CONFIG_ARCH_LUBBOCK is not set
-# CONFIG_MACH_LOGICPD_PXA270 is not set
-# CONFIG_MACH_MAINSTONE is not set
-# CONFIG_ARCH_PXA_IDP is not set
-# CONFIG_PXA_SHARPSL is not set
-# CONFIG_MACH_TRIZEPS4 is not set
-CONFIG_MACH_EM_X270=y
-CONFIG_PXA27x=y
-
-#
-# Processor Type
-#
-CONFIG_CPU_32=y
-CONFIG_CPU_XSCALE=y
-CONFIG_CPU_32v5=y
-CONFIG_CPU_ABRT_EV5T=y
-CONFIG_CPU_CACHE_VIVT=y
-CONFIG_CPU_TLB_V4WBI=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-
-#
-# Processor Features
-#
-CONFIG_ARM_THUMB=y
-# CONFIG_CPU_DCACHE_DISABLE is not set
-# CONFIG_OUTER_CACHE is not set
-CONFIG_IWMMXT=y
-CONFIG_XSCALE_PMU=y
-
-#
-# Bus support
-#
-# CONFIG_ARCH_SUPPORTS_MSI is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Kernel Features
-#
-# CONFIG_TICK_ONESHOT is not set
-# CONFIG_PREEMPT is not set
-CONFIG_HZ=100
-CONFIG_AEABI=y
-CONFIG_OABI_COMPAT=y
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4096
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-CONFIG_ALIGNMENT_TRAP=y
-
-#
-# Boot options
-#
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE=""
-# CONFIG_XIP_KERNEL is not set
-# CONFIG_KEXEC is not set
-
-#
-# Floating point emulation
-#
-
-#
-# At least one emulation must be selected
-#
-CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_NWFPE_XP is not set
-# CONFIG_FPE_FASTFPE is not set
-
-#
-# Userspace binary formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_AOUT is not set
-# CONFIG_BINFMT_MISC is not set
-
-#
-# Power management options
-#
-CONFIG_PM=y
-CONFIG_PM_LEGACY=y
-# CONFIG_PM_DEBUG is not set
-# CONFIG_PM_SYSFS_DEPRECATED is not set
-CONFIG_APM_EMULATION=m
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_INET_XFRM_MODE_TRANSPORT=y
-CONFIG_INET_XFRM_MODE_TUNNEL=y
-CONFIG_INET_XFRM_MODE_BEET=y
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-# CONFIG_TCP_MD5SIG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-# CONFIG_NETWORK_SECMARK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_IP_DCCP is not set
-# CONFIG_IP_SCTP is not set
-# CONFIG_TIPC is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-CONFIG_BT=m
-CONFIG_BT_L2CAP=m
-CONFIG_BT_SCO=m
-CONFIG_BT_RFCOMM=m
-# CONFIG_BT_RFCOMM_TTY is not set
-CONFIG_BT_BNEP=m
-# CONFIG_BT_BNEP_MC_FILTER is not set
-# CONFIG_BT_BNEP_PROTO_FILTER is not set
-CONFIG_BT_HIDP=m
-
-#
-# Bluetooth device drivers
-#
-CONFIG_BT_HCIUSB=m
-# CONFIG_BT_HCIUSB_SCO is not set
-CONFIG_BT_HCIUART=m
-# CONFIG_BT_HCIUART_H4 is not set
-# CONFIG_BT_HCIUART_BCSP is not set
-CONFIG_BT_HCIBCM203X=m
-CONFIG_BT_HCIBPA10X=m
-CONFIG_BT_HCIBFUSB=m
-# CONFIG_BT_HCIVHCI is not set
-# CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-CONFIG_IEEE80211=m
-# CONFIG_IEEE80211_DEBUG is not set
-CONFIG_IEEE80211_CRYPT_WEP=m
-CONFIG_IEEE80211_CRYPT_CCMP=m
-# CONFIG_IEEE80211_CRYPT_TKIP is not set
-# CONFIG_IEEE80211_SOFTMAC is not set
-# CONFIG_RFKILL is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
-# CONFIG_DEBUG_DRIVER is not set
-# CONFIG_DEBUG_DEVRES is not set
-# CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-# CONFIG_CONNECTOR is not set
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-# CONFIG_RFD_FTL is not set
-# CONFIG_SSFDC is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-# CONFIG_MTD_CFI is not set
-# CONFIG_MTD_JEDECPROBE is not set
-# CONFIG_MTD_CFI_NOSWAP is not set
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_SHARP_SL is not set
-# CONFIG_MTD_PLATRAM is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_NAND=y
-# CONFIG_MTD_NAND_VERIFY_WRITE is not set
-# CONFIG_MTD_NAND_ECC_SMC is not set
-# CONFIG_MTD_NAND_MUSEUM_IDS is not set
-# CONFIG_MTD_NAND_H1900 is not set
-CONFIG_MTD_NAND_IDS=y
-# CONFIG_MTD_NAND_DISKONCHIP is not set
-# CONFIG_MTD_NAND_SHARPSL is not set
-# CONFIG_MTD_NAND_NANDSIM is not set
-CONFIG_MTD_NAND_PLATFORM=y
-# CONFIG_MTD_ONENAND is not set
-
-#
-# UBI - Unsorted block images
-#
-# CONFIG_MTD_UBI is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNPACPI is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_UB is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=12000
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-CONFIG_SCSI=y
-# CONFIG_SCSI_TGT is not set
-# CONFIG_SCSI_NETLINK is not set
-# CONFIG_SCSI_PROC_FS is not set
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-# CONFIG_CHR_DEV_SCH is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-# CONFIG_SCSI_SCAN_ASYNC is not set
-CONFIG_SCSI_WAIT_SCAN=m
-
-#
-# SCSI Transports
-#
-# CONFIG_SCSI_SPI_ATTRS is not set
-# CONFIG_SCSI_FC_ATTRS is not set
-# CONFIG_SCSI_ISCSI_ATTRS is not set
-# CONFIG_SCSI_SAS_ATTRS is not set
-# CONFIG_SCSI_SAS_LIBSAS is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_DEBUG is not set
-# CONFIG_ATA is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_SMC91X is not set
-CONFIG_DM9000=y
-# CONFIG_SMC911X is not set
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-
-#
-# USB Network Adapters
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET_MII is not set
-# CONFIG_USB_USBNET is not set
-# CONFIG_WAN is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-# CONFIG_INPUT_FF_MEMLESS is not set
-# CONFIG_INPUT_POLLDEV is not set
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-# CONFIG_KEYBOARD_ATKBD is not set
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_KEYBOARD_STOWAWAY is not set
-CONFIG_KEYBOARD_PXA27x=m
-# CONFIG_KEYBOARD_GPIO is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TABLET is not set
-CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_TOUCHSCREEN_GUNZE is not set
-# CONFIG_TOUCHSCREEN_ELO is not set
-# CONFIG_TOUCHSCREEN_MTOUCH is not set
-# CONFIG_TOUCHSCREEN_MK712 is not set
-# CONFIG_TOUCHSCREEN_PENMOUNT is not set
-# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
-# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-# CONFIG_TOUCHSCREEN_UCB1400 is not set
-# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-# CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_SERIO_RAW is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_VT_HW_CONSOLE_BINDING is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_PXA=y
-CONFIG_SERIAL_PXA_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
-CONFIG_HW_RANDOM=m
-# CONFIG_NVRAM is not set
-# CONFIG_R3964 is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-# CONFIG_HWMON is not set
-
-#
-# Misc devices
-#
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MFD_SM501 is not set
-
-#
-# LED devices
-#
-# CONFIG_NEW_LEDS is not set
-
-#
-# LED drivers
-#
-
-#
-# LED Triggers
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
-
-#
-# Graphics support
-#
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Display device support
-#
-# CONFIG_DISPLAY_SUPPORT is not set
-# CONFIG_VGASTATE is not set
-CONFIG_FB=y
-# CONFIG_FIRMWARE_EDID is not set
-# CONFIG_FB_DDC is not set
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-# CONFIG_FB_SYS_FILLRECT is not set
-# CONFIG_FB_SYS_COPYAREA is not set
-# CONFIG_FB_SYS_IMAGEBLIT is not set
-# CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
-# CONFIG_FB_SVGALIB is not set
-# CONFIG_FB_MACMODES is not set
-# CONFIG_FB_BACKLIGHT is not set
-# CONFIG_FB_MODE_HELPERS is not set
-# CONFIG_FB_TILEBLITTING is not set
-
-#
-# Frame buffer hardware drivers
-#
-# CONFIG_FB_S1D13XXX is not set
-CONFIG_FB_PXA=y
-# CONFIG_FB_PXA_PARAMETERS is not set
-# CONFIG_FB_MBX is not set
-# CONFIG_FB_VIRTUAL is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
-# CONFIG_FONTS is not set
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_LOGO=y
-CONFIG_LOGO_LINUX_MONO=y
-CONFIG_LOGO_LINUX_VGA16=y
-CONFIG_LOGO_LINUX_CLUT224=y
-
-#
-# Sound
-#
-CONFIG_SOUND=m
-
-#
-# Advanced Linux Sound Architecture
-#
-CONFIG_SND=m
-CONFIG_SND_TIMER=m
-CONFIG_SND_PCM=m
-# CONFIG_SND_SEQUENCER is not set
-CONFIG_SND_OSSEMUL=y
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_PCM_OSS_PLUGINS=y
-# CONFIG_SND_DYNAMIC_MINORS is not set
-CONFIG_SND_SUPPORT_OLD_API=y
-CONFIG_SND_VERBOSE_PROCFS=y
-# CONFIG_SND_VERBOSE_PRINTK is not set
-# CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
-CONFIG_SND_AC97_CODEC=m
-# CONFIG_SND_DUMMY is not set
-# CONFIG_SND_MTPAV is not set
-# CONFIG_SND_SERIAL_U16550 is not set
-# CONFIG_SND_MPU401 is not set
-
-#
-# ALSA ARM devices
-#
-CONFIG_SND_PXA2XX_PCM=m
-CONFIG_SND_PXA2XX_AC97=m
-
-#
-# USB devices
-#
-# CONFIG_SND_USB_AUDIO is not set
-# CONFIG_SND_USB_CAIAQ is not set
-
-#
-# System on Chip audio support
-#
-# CONFIG_SND_SOC is not set
-
-#
-# Open Sound System
-#
-# CONFIG_SOUND_PRIME is not set
-CONFIG_AC97_BUS=m
-
-#
-# HID Devices
-#
-CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
-
-#
-# USB Input Devices
-#
-CONFIG_USB_HID=y
-# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-# CONFIG_HID_FF is not set
-# CONFIG_USB_HIDDEV is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-CONFIG_USB=y
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-# CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_SUSPEND is not set
-# CONFIG_USB_OTG is not set
-
-#
-# USB Host Controller Drivers
-#
-# CONFIG_USB_ISP116X_HCD is not set
-CONFIG_USB_OHCI_HCD=y
-# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
-# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
-CONFIG_USB_OHCI_LITTLE_ENDIAN=y
-# CONFIG_USB_SL811_HCD is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# may also be needed; see USB_STORAGE Help for more information
-#
-CONFIG_USB_STORAGE=y
-# CONFIG_USB_STORAGE_DEBUG is not set
-# CONFIG_USB_STORAGE_DATAFAB is not set
-# CONFIG_USB_STORAGE_FREECOM is not set
-# CONFIG_USB_STORAGE_DPCM is not set
-# CONFIG_USB_STORAGE_USBAT is not set
-# CONFIG_USB_STORAGE_SDDR09 is not set
-# CONFIG_USB_STORAGE_SDDR55 is not set
-# CONFIG_USB_STORAGE_JUMPSHOT is not set
-# CONFIG_USB_STORAGE_ALAUDA is not set
-# CONFIG_USB_STORAGE_KARMA is not set
-# CONFIG_USB_LIBUSUAL is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_MON is not set
-
-#
-# USB port drivers
-#
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_EMI62 is not set
-# CONFIG_USB_EMI26 is not set
-# CONFIG_USB_ADUTUX is not set
-# CONFIG_USB_AUERSWALD is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_LEGOTOWER is not set
-# CONFIG_USB_LCD is not set
-# CONFIG_USB_BERRY_CHARGE is not set
-# CONFIG_USB_LED is not set
-# CONFIG_USB_CYPRESS_CY7C63 is not set
-# CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
-# CONFIG_USB_IDMOUSE is not set
-# CONFIG_USB_FTDI_ELAN is not set
-# CONFIG_USB_APPLEDISPLAY is not set
-# CONFIG_USB_LD is not set
-# CONFIG_USB_TRANCEVIBRATOR is not set
-# CONFIG_USB_IOWARRIOR is not set
-# CONFIG_USB_TEST is not set
-
-#
-# USB DSL modem support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-CONFIG_MMC=m
-# CONFIG_MMC_DEBUG is not set
-# CONFIG_MMC_UNSAFE_RESUME is not set
-
-#
-# MMC/SD Card Drivers
-#
-CONFIG_MMC_BLOCK=m
-
-#
-# MMC/SD Host Controller Drivers
-#
-CONFIG_MMC_PXA=m
-
-#
-# Real Time Clock
-#
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=m
-
-#
-# RTC interfaces
-#
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-# CONFIG_RTC_DRV_TEST is not set
-
-#
-# I2C RTC drivers
-#
-
-#
-# SPI RTC drivers
-#
-
-#
-# Platform RTC drivers
-#
-# CONFIG_RTC_DRV_CMOS is not set
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-CONFIG_RTC_DRV_V3020=m
-
-#
-# on-CPU RTC drivers
-#
-CONFIG_RTC_DRV_SA1100=m
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-# CONFIG_EXT4DEV_FS is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_POSIX_ACL is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_FS_WRITEBUFFER=y
-CONFIG_JFFS2_SUMMARY=y
-# CONFIG_JFFS2_FS_XATTR is not set
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_RTIME=y
-# CONFIG_JFFS2_RUBIN is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_BIND34 is not set
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-CONFIG_SMB_FS=y
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=y
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-CONFIG_NLS_UTF8=y
-
-#
-# Distributed Lock Manager
-#
-# CONFIG_DLM is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_MUST_CHECK=y
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_HEADERS_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
-# CONFIG_DETECT_SOFTLOCKUP is not set
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_TIMER_STATS is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_MUTEXES is not set
-# CONFIG_DEBUG_LOCK_ALLOC is not set
-# CONFIG_PROVE_LOCKING is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-# CONFIG_DEBUG_KOBJECT is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_VM is not set
-# CONFIG_DEBUG_LIST is not set
-CONFIG_FRAME_POINTER=y
-CONFIG_FORCED_INLINING=y
-# CONFIG_RCU_TORTURE_TEST is not set
-# CONFIG_FAULT_INJECTION is not set
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-# CONFIG_DEBUG_ICEDCC is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ALGAPI=m
-CONFIG_CRYPTO_BLKCIPHER=m
-CONFIG_CRYPTO_MANAGER=m
-# CONFIG_CRYPTO_HMAC is not set
-# CONFIG_CRYPTO_XCBC is not set
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
-# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_GF128MUL is not set
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_PCBC=m
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_FCRYPT is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=m
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-CONFIG_CRYPTO_ARC4=m
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_CAMELLIA is not set
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Hardware crypto devices
-#
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_PLIST=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig
new file mode 100644
index 000000000000..2a84d557adc2
--- /dev/null
+++ b/arch/arm/configs/ezx_defconfig
@@ -0,0 +1,1614 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26-rc3
+# Mon Jul  7 17:52:21 2008
+#
+CONFIG_ARM=y
+CONFIG_HAVE_PWM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION="-ezxdev"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+# CONFIG_MACH_TRIZEPS4 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_PCM027 is not set
+CONFIG_PXA_EZX=y
+CONFIG_MACH_EZX_A780=y
+CONFIG_MACH_EZX_E680=y
+CONFIG_MACH_EZX_A1200=y
+CONFIG_MACH_EZX_A910=y
+CONFIG_MACH_EZX_E6=y
+CONFIG_MACH_EZX_E2=y
+CONFIG_PXA27x=y
+CONFIG_PXA_SSP=y
+CONFIG_PXA_PWM=y
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+CONFIG_IWMMXT=y
+CONFIG_XSCALE_PMU=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=1 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug"
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_AOUT=m
+CONFIG_BINFMT_MISC=m
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+CONFIG_IPV6_MIP6=m
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=m
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+# CONFIG_NF_CT_PROTO_DCCP is not set
+CONFIG_NF_CT_PROTO_GRE=m
+CONFIG_NF_CT_PROTO_SCTP=m
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_TIME=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_PROTO_UDPLITE=m
+CONFIG_NF_NAT_PROTO_SCTP=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_RAW=m
+
+#
+# Bridge: Netfilter Configuration
+#
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_SCH_FIFO=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=y
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIUSB is not set
+# CONFIG_BT_HCIBTUSB is not set
+# CONFIG_BT_HCIBTSDIO is not set
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+# CONFIG_BT_HCIUART_BCSP is not set
+# CONFIG_BT_HCIUART_LL is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+
+#
+# Wireless
+#
+CONFIG_CFG80211=m
+CONFIG_NL80211=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_MAC80211=m
+
+#
+# Rate control algorithm selection
+#
+CONFIG_MAC80211_RC_DEFAULT_PID=y
+# CONFIG_MAC80211_RC_DEFAULT_NONE is not set
+
+#
+# Selecting 'y' for an algorithm will
+#
+
+#
+# build the algorithm into mac80211.
+#
+CONFIG_MAC80211_RC_DEFAULT="pid"
+CONFIG_MAC80211_RC_PID=y
+# CONFIG_MAC80211_MESH is not set
+CONFIG_MAC80211_LEDS=y
+# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set
+# CONFIG_MAC80211_DEBUG is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=m
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLKDEVS is not set
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+CONFIG_MTD_XIP=y
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x0
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PXA2XX is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_NET_ETHERNET is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_PXA27x=y
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+CONFIG_TOUCHSCREEN_PCAP=y
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+CONFIG_INPUT_UINPUT=y
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=8
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+CONFIG_SPI_PXA2XX=m
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_HAVE_GPIO_LIB=y
+
+#
+# GPIO Support
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TC6393XB is not set
+CONFIG_EZX_PCAP=y
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=m
+CONFIG_VIDEO_V4L2_COMMON=m
+CONFIG_VIDEO_ALLOW_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=m
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=m
+# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_VIDEO_V4L2=m
+CONFIG_VIDEO_V4L1=m
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
+# CONFIG_TUNER_3036 is not set
+# CONFIG_V4L_USB_DRIVERS is not set
+# CONFIG_SOC_CAMERA is not set
+# CONFIG_VIDEO_PXA27x is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_USB_DSBR is not set
+# CONFIG_USB_SI470X is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_SMARTPANEL is not set
+CONFIG_FB_PXA_PARAMETERS=y
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_AM200EPD is not set
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_PWM=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+# CONFIG_FONT_8x16 is not set
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+CONFIG_FONT_MINI_4x6=y
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# ALSA ARM devices
+#
+# CONFIG_SND_PXA2XX_AC97 is not set
+
+#
+# SPI devices
+#
+
+#
+# USB devices
+#
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+
+#
+# System on Chip audio support
+#
+CONFIG_SND_SOC=y
+CONFIG_SND_PXA2XX_SOC=y
+
+#
+# ALSA SoC audio for Freescale SOCs
+#
+
+#
+# SoC Audio for the Texas Instruments OMAP
+#
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MON is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_M66592 is not set
+CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=y
+# CONFIG_USB_ETH_RNDIS is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_UNSAFE_RESUME=y
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_SDIO_UART=y
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_PXA=y
+# CONFIG_MMC_SPI is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_GPIO is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SA1100=m
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=m
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_REISERFS_FS_XATTR=y
+CONFIG_REISERFS_FS_POSIX_ACL=y
+CONFIG_REISERFS_FS_SECURITY=y
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_XFS_FS=m
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+# CONFIG_NFS_V4 is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V2_ACL=y
+CONFIG_NFSD_V3=y
+CONFIG_NFSD_V3_ACL=y
+# CONFIG_NFSD_V4 is not set
+# CONFIG_ROOT_NFS is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+CONFIG_CIFS_STATS=y
+# CONFIG_CIFS_STATS2 is not set
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_SAMPLES is not set
+# CONFIG_DEBUG_USER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_CRYPTD=m
+CONFIG_CRYPTO_AUTHENC=m
+CONFIG_CRYPTO_TEST=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_XTS=m
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=m
+CONFIG_CRYPTO_XCBC=m
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_TGR192=m
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+# CONFIG_CRYPTO_CAMELLIA is not set
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_KHAZAD=m
+# CONFIG_CRYPTO_SALSA20 is not set
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=m
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=m
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/cm_x270_defconfig b/arch/arm/configs/xm_x270_defconfig
index 33b201c3b309..aa40d91ce599 100644
--- a/arch/arm/configs/cm_x270_defconfig
+++ b/arch/arm/configs/xm_x270_defconfig
@@ -1,13 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22
-# Wed Jul 18 14:11:48 2007
+# Linux kernel version: 2.6.25
+# Sun May 11 15:12:52 2008
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_GENERIC_TIME=y
-# CONFIG_GENERIC_CLOCKEVENTS is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_MMU=y
 # CONFIG_NO_IOPORT is not set
 CONFIG_GENERIC_HARDIRQS=y
@@ -21,21 +21,18 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
 CONFIG_ZONE_DMA=y
 CONFIG_ARCH_MTD_XIP=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
-# Code maturity level options
+# General setup
 #
 CONFIG_EXPERIMENTAL=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SWAP=y
@@ -44,13 +41,20 @@ CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
 # CONFIG_AUDIT is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=17
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
 CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -58,6 +62,7 @@ CONFIG_SYSCTL=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -65,24 +70,34 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
+# CONFIG_COMPAT_BRK is not set
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 CONFIG_ANON_INODES=y
-# CONFIG_EPOLL is not set
-# CONFIG_SIGNALFD is not set
-# CONFIG_TIMERFD is not set
-# CONFIG_EVENTFD is not set
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_SLAB=y
-# CONFIG_SLUB is not set
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
 # CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_PROC_PAGE_MONITOR is not set
 CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_KMOD=y
@@ -99,11 +114,12 @@ CONFIG_IOSCHED_NOOP=y
 CONFIG_IOSCHED_AS=y
 CONFIG_IOSCHED_DEADLINE=y
 CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_AS is not set
 # CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_CFQ=y
 # CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
 
 #
 # System Type
@@ -131,6 +147,8 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
 # CONFIG_ARCH_L7200 is not set
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
 # CONFIG_ARCH_PNX4008 is not set
 CONFIG_ARCH_PXA=y
 # CONFIG_ARCH_RPC is not set
@@ -140,19 +158,41 @@ CONFIG_ARCH_PXA=y
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
 CONFIG_DMABOUNCE=y
 
 #
-# Intel PXA2xx Implementations
+# Intel PXA2xx/PXA3xx Implementations
 #
+
+#
+# Select target boards
+#
+# CONFIG_ARCH_GUMSTIX is not set
 # CONFIG_ARCH_LUBBOCK is not set
 # CONFIG_MACH_LOGICPD_PXA270 is not set
 # CONFIG_MACH_MAINSTONE is not set
 # CONFIG_ARCH_PXA_IDP is not set
 # CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
 # CONFIG_MACH_TRIZEPS4 is not set
+CONFIG_MACH_EM_X270=y
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
 CONFIG_MACH_ARMCORE=y
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_PCM027 is not set
 CONFIG_PXA27x=y
+# CONFIG_PXA_PWM is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
 
 #
 # Processor Type
@@ -161,6 +201,7 @@ CONFIG_CPU_32=y
 CONFIG_CPU_XSCALE=y
 CONFIG_CPU_32v5=y
 CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
 CONFIG_CPU_CACHE_VIVT=y
 CONFIG_CPU_TLB_V4WBI=y
 CONFIG_CPU_CP15=y
@@ -182,20 +223,40 @@ CONFIG_PCI=y
 CONFIG_PCI_SYSCALL=y
 CONFIG_PCI_HOST_ITE8152=y
 # CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
 # CONFIG_PCI_DEBUG is not set
+CONFIG_PCCARD=m
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=m
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_IOCTL=y
+CONFIG_CARDBUS=y
 
 #
-# PCCARD (PCMCIA/CardBus) support
+# PC-card bridges
 #
-# CONFIG_PCCARD is not set
+CONFIG_YENTA=m
+# CONFIG_YENTA_O2 is not set
+# CONFIG_YENTA_RICOH is not set
+CONFIG_YENTA_TI=y
+# CONFIG_YENTA_ENE_TUNE is not set
+# CONFIG_YENTA_TOSHIBA is not set
+# CONFIG_PD6729 is not set
+# CONFIG_I82092 is not set
+CONFIG_PCMCIA_PXA2XX=m
+CONFIG_PCCARD_NONSTATIC=m
 
 #
 # Kernel Features
 #
-# CONFIG_TICK_ONESHOT is not set
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 # CONFIG_PREEMPT is not set
 CONFIG_HZ=100
-# CONFIG_AEABI is not set
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
 # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
@@ -204,6 +265,8 @@ CONFIG_FLATMEM_MANUAL=y
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
 # CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4096
 # CONFIG_RESOURCES_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
@@ -216,11 +279,16 @@ CONFIG_ALIGNMENT_TRAP=y
 #
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE=""
+CONFIG_CMDLINE="root=1f03 mem=32M"
 # CONFIG_XIP_KERNEL is not set
 # CONFIG_KEXEC is not set
 
 #
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
 # Floating point emulation
 #
 
@@ -237,16 +305,17 @@ CONFIG_FPE_NWFPE=y
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
-# CONFIG_ARTHUR is not set
 
 #
 # Power management options
 #
 CONFIG_PM=y
-# CONFIG_PM_LEGACY is not set
 # CONFIG_PM_DEBUG is not set
-# CONFIG_PM_SYSFS_DEPRECATED is not set
-# CONFIG_APM_EMULATION is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_APM_EMULATION=m
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
 
 #
 # Networking
@@ -257,15 +326,16 @@ CONFIG_NET=y
 # Networking options
 #
 CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
+CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
 CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
 # CONFIG_XFRM_SUB_POLICY is not set
 # CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_MULTICAST=y
 # CONFIG_IP_ADVANCED_ROUTER is not set
 CONFIG_IP_FIB_HASH=y
 CONFIG_IP_PNP=y
@@ -274,6 +344,7 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IP_PNP_RARP is not set
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
 # CONFIG_ARPD is not set
 # CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
@@ -284,15 +355,13 @@ CONFIG_IP_PNP_BOOTP=y
 CONFIG_INET_XFRM_MODE_TRANSPORT=y
 CONFIG_INET_XFRM_MODE_TUNNEL=y
 CONFIG_INET_XFRM_MODE_BEET=y
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
@@ -309,10 +378,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
 # CONFIG_NET_SCHED is not set
 
 #
@@ -320,8 +385,33 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
-# CONFIG_BT is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+# CONFIG_BT_RFCOMM_TTY is not set
+CONFIG_BT_BNEP=m
+# CONFIG_BT_BNEP_MC_FILTER is not set
+# CONFIG_BT_BNEP_PROTO_FILTER is not set
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIUSB=m
+CONFIG_BT_HCIUSB_SCO=y
+# CONFIG_BT_HCIBTSDIO is not set
+# CONFIG_BT_HCIUART is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+# CONFIG_BT_HCIDTL1 is not set
+# CONFIG_BT_HCIBT3C is not set
+# CONFIG_BT_HCIBLUECARD is not set
+# CONFIG_BT_HCIBTUART is not set
+# CONFIG_BT_HCIVHCI is not set
 # CONFIG_AF_RXRPC is not set
 
 #
@@ -330,12 +420,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_CFG80211 is not set
 CONFIG_WIRELESS_EXT=y
 # CONFIG_MAC80211 is not set
-CONFIG_IEEE80211=m
-# CONFIG_IEEE80211_DEBUG is not set
-CONFIG_IEEE80211_CRYPT_WEP=m
-CONFIG_IEEE80211_CRYPT_CCMP=m
-# CONFIG_IEEE80211_CRYPT_TKIP is not set
-# CONFIG_IEEE80211_SOFTMAC is not set
+# CONFIG_IEEE80211 is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -346,38 +431,47 @@ CONFIG_IEEE80211_CRYPT_CCMP=m
 #
 # Generic Driver Options
 #
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
+CONFIG_FW_LOADER=m
 # CONFIG_DEBUG_DRIVER is not set
 # CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
-CONFIG_MTD=m
+CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
 
 #
 # User Modules And Translation Layers
 #
-CONFIG_MTD_CHAR=m
-CONFIG_MTD_BLKDEVS=m
-CONFIG_MTD_BLOCK=m
-# CONFIG_MTD_BLOCK_RO is not set
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
 # CONFIG_INFTL is not set
 # CONFIG_RFD_FTL is not set
 # CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
 
 #
 # RAM/ROM/Flash chip drivers
 #
-# CONFIG_MTD_CFI is not set
-# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
 CONFIG_MTD_MAP_BANK_WIDTH_1=y
 CONFIG_MTD_MAP_BANK_WIDTH_2=y
 CONFIG_MTD_MAP_BANK_WIDTH_4=y
@@ -388,15 +482,29 @@ CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
 
 #
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x0
+CONFIG_MTD_PHYSMAP_LEN=0x400000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+CONFIG_MTD_PXA2XX=y
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_IMPA7 is not set
 # CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
 # CONFIG_MTD_PLATRAM is not set
 
 #
@@ -414,18 +522,19 @@ CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_DOC2000 is not set
 # CONFIG_MTD_DOC2001 is not set
 # CONFIG_MTD_DOC2001PLUS is not set
-CONFIG_MTD_NAND=m
+CONFIG_MTD_NAND=y
 # CONFIG_MTD_NAND_VERIFY_WRITE is not set
 # CONFIG_MTD_NAND_ECC_SMC is not set
 # CONFIG_MTD_NAND_MUSEUM_IDS is not set
 # CONFIG_MTD_NAND_H1900 is not set
-CONFIG_MTD_NAND_IDS=m
+CONFIG_MTD_NAND_IDS=y
 # CONFIG_MTD_NAND_DISKONCHIP is not set
 # CONFIG_MTD_NAND_SHARPSL is not set
 # CONFIG_MTD_NAND_CAFE is not set
-CONFIG_MTD_NAND_CM_X270=m
+CONFIG_MTD_NAND_CM_X270=y
 # CONFIG_MTD_NAND_NANDSIM is not set
-# CONFIG_MTD_NAND_PLATFORM is not set
+CONFIG_MTD_NAND_PLATFORM=y
+# CONFIG_MTD_ALAUDA is not set
 # CONFIG_MTD_ONENAND is not set
 
 #
@@ -446,36 +555,13 @@ CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_UB is not set
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=12000
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
-CONFIG_IDE=m
-CONFIG_IDE_MAX_HWIFS=4
-CONFIG_BLK_DEV_IDE=m
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECD=m
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_PROC_FS=y
-
-#
-# IDE chipset support/bugfixes
-#
-# CONFIG_IDE_GENERIC is not set
-# CONFIG_BLK_DEV_IDEPCI is not set
-# CONFIG_IDEPCI_PCIBUS_ORDER is not set
-# CONFIG_IDE_ARM is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
 
 #
 # SCSI device support
@@ -485,7 +571,7 @@ CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
 # CONFIG_SCSI_TGT is not set
 # CONFIG_SCSI_NETLINK is not set
-# CONFIG_SCSI_PROC_FS is not set
+CONFIG_SCSI_PROC_FS=y
 
 #
 # SCSI support type (disk, tape, CD-ROM)
@@ -512,12 +598,9 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_SPI_ATTRS is not set
 # CONFIG_SCSI_FC_ATTRS is not set
 # CONFIG_SCSI_ISCSI_ATTRS is not set
-# CONFIG_SCSI_SAS_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
-
-#
-# SCSI low-level drivers
-#
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
 # CONFIG_SCSI_3W_9XXX is not set
@@ -528,6 +611,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_AIC79XX is not set
 # CONFIG_SCSI_AIC94XX is not set
 # CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_ARCMSR is not set
 # CONFIG_MEGARAID_NEWGEN is not set
 # CONFIG_MEGARAID_LEGACY is not set
@@ -538,8 +622,10 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_IPS is not set
 # CONFIG_SCSI_INITIO is not set
 # CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
 # CONFIG_SCSI_STEX is not set
 # CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
 # CONFIG_SCSI_QLOGIC_1280 is not set
 # CONFIG_SCSI_QLA_FC is not set
 # CONFIG_SCSI_QLA_ISCSI is not set
@@ -549,16 +635,69 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_NSP32 is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_SRP is not set
-# CONFIG_ATA is not set
+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+CONFIG_ATA=m
+# CONFIG_ATA_NONSTANDARD is not set
+# CONFIG_SATA_PMP is not set
+# CONFIG_SATA_AHCI is not set
+# CONFIG_SATA_SIL24 is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+CONFIG_PATA_PCMCIA=m
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
 # CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
 # CONFIG_FUSION is not set
-# CONFIG_FUSION_SPI is not set
-# CONFIG_FUSION_FC is not set
-# CONFIG_FUSION_SAS is not set
 
 #
 # IEEE 1394 (FireWire) support
@@ -573,6 +712,7 @@ CONFIG_NETDEVICES=y
 # CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
+# CONFIG_VETH is not set
 # CONFIG_ARCNET is not set
 # CONFIG_PHYLIB is not set
 CONFIG_NET_ETHERNET=y
@@ -584,64 +724,65 @@ CONFIG_MII=y
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_SMC91X is not set
 CONFIG_DM9000=y
+CONFIG_DM9000_DEBUGLEVEL=1
 # CONFIG_SMC911X is not set
 # CONFIG_NET_TULIP is not set
 # CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
 CONFIG_NET_PCI=y
 # CONFIG_PCNET32 is not set
 # CONFIG_AMD8111_ETH is not set
 # CONFIG_ADAPTEC_STARFIRE is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
 # CONFIG_EEPRO100 is not set
 # CONFIG_E100 is not set
 # CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
 # CONFIG_NE2K_PCI is not set
 # CONFIG_8139CP is not set
-CONFIG_8139TOO=m
+CONFIG_8139TOO=y
 # CONFIG_8139TOO_PIO is not set
 # CONFIG_8139TOO_TUNE_TWISTER is not set
 # CONFIG_8139TOO_8129 is not set
 # CONFIG_8139_OLD_RX_RESET is not set
+# CONFIG_R6040 is not set
 # CONFIG_SIS900 is not set
 # CONFIG_EPIC100 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
 # CONFIG_SC92031 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SKY2 is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-# CONFIG_QLA3XXX is not set
-# CONFIG_ATL1 is not set
-CONFIG_NETDEV_10000=y
-# CONFIG_CHELSIO_T1 is not set
-# CONFIG_CHELSIO_T3 is not set
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-# CONFIG_MYRI10GE is not set
-# CONFIG_NETXEN_NIC is not set
-# CONFIG_MLX4_CORE is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 # CONFIG_TR is not set
 
 #
 # Wireless LAN
 #
 # CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
+CONFIG_WLAN_80211=y
+# CONFIG_PCMCIA_RAYCS is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
+CONFIG_LIBERTAS=m
+# CONFIG_LIBERTAS_USB is not set
+# CONFIG_LIBERTAS_CS is not set
+CONFIG_LIBERTAS_SDIO=m
+# CONFIG_LIBERTAS_DEBUG is not set
+# CONFIG_HERMES is not set
+# CONFIG_ATMEL is not set
+# CONFIG_AIRO_CS is not set
+# CONFIG_PCMCIA_WL3501 is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_IWLWIFI is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_HOSTAP is not set
 
 #
 # USB Network Adapters
@@ -650,15 +791,24 @@ CONFIG_NETDEV_10000=y
 # CONFIG_USB_KAWETH is not set
 # CONFIG_USB_PEGASUS is not set
 # CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET_MII is not set
 # CONFIG_USB_USBNET is not set
+# CONFIG_NET_PCMCIA is not set
 # CONFIG_WAN is not set
 # CONFIG_FDDI is not set
 # CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
 # CONFIG_SLIP is not set
+CONFIG_SLHC=m
 # CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
@@ -674,20 +824,32 @@ CONFIG_INPUT=y
 #
 # Userland interfaces
 #
-# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
 # CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
 
 #
 # Input Device Drivers
 #
-# CONFIG_INPUT_KEYBOARD is not set
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_PXA27x=m
+# CONFIG_KEYBOARD_GPIO is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
@@ -696,13 +858,22 @@ CONFIG_INPUT_TOUCHSCREEN=y
 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
 CONFIG_TOUCHSCREEN_UCB1400=m
+CONFIG_TOUCHSCREEN_WM97XX=m
+# CONFIG_TOUCHSCREEN_WM9705 is not set
+CONFIG_TOUCHSCREEN_WM9712=y
+# CONFIG_TOUCHSCREEN_WM9713 is not set
+# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set
 # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 # CONFIG_INPUT_MISC is not set
 
 #
 # Hardware I/O ports
 #
-# CONFIG_SERIO is not set
+CONFIG_SERIO=y
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
 # CONFIG_GAMEPORT is not set
 
 #
@@ -712,7 +883,9 @@ CONFIG_VT=y
 CONFIG_VT_CONSOLE=y
 CONFIG_HW_CONSOLE=y
 # CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
 # CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
 
 #
 # Serial drivers
@@ -729,83 +902,141 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_SERIAL_JSM is not set
 CONFIG_UNIX98_PTYS=y
 CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_LEGACY_PTY_COUNT=16
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
-CONFIG_HW_RANDOM=m
+# CONFIG_HW_RANDOM is not set
 # CONFIG_NVRAM is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
-# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_IPWIRELESS is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
 CONFIG_DEVPORT=y
-# CONFIG_I2C is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+CONFIG_I2C_PXA=y
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_HAVE_GPIO_LIB=y
 
 #
-# SPI support
+# GPIO Support
 #
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-# CONFIG_W1 is not set
-# CONFIG_HWMON is not set
-CONFIG_MISC_DEVICES=y
-# CONFIG_PHANTOM is not set
-# CONFIG_EEPROM_93CX6 is not set
-# CONFIG_SGI_IOC4 is not set
-# CONFIG_TIFM_CORE is not set
+# CONFIG_DEBUG_GPIO is not set
 
 #
-# Multifunction device drivers
+# I2C GPIO expanders:
 #
-# CONFIG_MFD_SM501 is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
 
 #
-# LED devices
+# SPI GPIO expanders:
 #
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
 
 #
-# LED drivers
+# Sonics Silicon Backplane
 #
-CONFIG_LEDS_CM_X270=y
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
 
 #
-# LED Triggers
+# Multifunction device drivers
 #
-CONFIG_LEDS_TRIGGERS=y
-# CONFIG_LEDS_TRIGGER_TIMER is not set
-# CONFIG_LEDS_TRIGGER_IDE_DISK is not set
-CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
 
 #
 # Multimedia devices
 #
+
+#
+# Multimedia core support
+#
 # CONFIG_VIDEO_DEV is not set
 # CONFIG_DVB_CORE is not set
-CONFIG_DAB=y
-# CONFIG_USB_DABUSB is not set
 
 #
-# Graphics support
+# Multimedia drivers
 #
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_DAB is not set
 
 #
-# Display device support
+# Graphics support
 #
-# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_DRM is not set
 # CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
 CONFIG_FB=y
 # CONFIG_FIRMWARE_EDID is not set
 # CONFIG_FB_DDC is not set
 CONFIG_FB_CFB_FILLRECT=y
 CONFIG_FB_CFB_COPYAREA=y
 CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
 # CONFIG_FB_SYS_FILLRECT is not set
 # CONFIG_FB_SYS_COPYAREA is not set
 # CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
 # CONFIG_FB_SYS_FOPS is not set
 CONFIG_FB_DEFERRED_IO=y
 # CONFIG_FB_SVGALIB is not set
@@ -841,9 +1072,17 @@ CONFIG_FB_DEFERRED_IO=y
 # CONFIG_FB_ARK is not set
 # CONFIG_FB_PM3 is not set
 CONFIG_FB_PXA=y
-# CONFIG_FB_PXA_PARAMETERS is not set
+# CONFIG_FB_PXA_SMARTPANEL is not set
+CONFIG_FB_PXA_PARAMETERS=y
 CONFIG_FB_MBX=m
+# CONFIG_FB_AM200EPD is not set
 # CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
 
 #
 # Console display driver support
@@ -903,10 +1142,12 @@ CONFIG_SND_AC97_CODEC=m
 # CONFIG_SND_AU8810 is not set
 # CONFIG_SND_AU8820 is not set
 # CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
 # CONFIG_SND_AZT3328 is not set
 # CONFIG_SND_BT87X is not set
 # CONFIG_SND_CA0106 is not set
 # CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
 # CONFIG_SND_CS4281 is not set
 # CONFIG_SND_CS46XX is not set
 # CONFIG_SND_DARLA20 is not set
@@ -931,6 +1172,7 @@ CONFIG_SND_AC97_CODEC=m
 # CONFIG_SND_HDA_INTEL is not set
 # CONFIG_SND_HDSP is not set
 # CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
 # CONFIG_SND_ICE1712 is not set
 # CONFIG_SND_ICE1724 is not set
 # CONFIG_SND_INTEL8X0 is not set
@@ -948,6 +1190,7 @@ CONFIG_SND_AC97_CODEC=m
 # CONFIG_SND_TRIDENT is not set
 # CONFIG_SND_VIA82XX is not set
 # CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
 # CONFIG_SND_VX222 is not set
 # CONFIG_SND_YMFPCI is not set
 # CONFIG_SND_AC97_POWER_SAVE is not set
@@ -965,18 +1208,33 @@ CONFIG_SND_PXA2XX_AC97=m
 # CONFIG_SND_USB_CAIAQ is not set
 
 #
+# PCMCIA devices
+#
+# CONFIG_SND_VXPOCKET is not set
+# CONFIG_SND_PDAUDIOCF is not set
+
+#
 # System on Chip audio support
 #
 # CONFIG_SND_SOC is not set
 
 #
+# ALSA SoC audio for Freescale SOCs
+#
+
+#
+# SoC Audio for the Texas Instruments OMAP
+#
+
+#
 # Open Sound System
 #
 # CONFIG_SOUND_PRIME is not set
 CONFIG_AC97_BUS=m
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
+CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
 
 #
 # USB Input Devices
@@ -991,6 +1249,7 @@ CONFIG_USB_ARCH_HAS_OHCI=y
 CONFIG_USB_ARCH_HAS_EHCI=y
 CONFIG_USB=y
 # CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
 
 #
 # Miscellaneous USB options
@@ -999,8 +1258,9 @@ CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
 # CONFIG_USB_SUSPEND is not set
-# CONFIG_USB_PERSIST is not set
 # CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
 
 #
 # USB Host Controller Drivers
@@ -1032,13 +1292,16 @@ CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
 # CONFIG_USB_STORAGE_DPCM is not set
 # CONFIG_USB_STORAGE_USBAT is not set
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
 # CONFIG_USB_STORAGE_JUMPSHOT is not set
 # CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
 # CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
 # CONFIG_USB_LIBUSUAL is not set
 
 #
@@ -1051,10 +1314,6 @@ CONFIG_USB_MON=y
 #
 # USB port drivers
 #
-
-#
-# USB Serial Converter support
-#
 # CONFIG_USB_SERIAL is not set
 
 #
@@ -1079,14 +1338,6 @@ CONFIG_USB_MON=y
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
 # CONFIG_USB_TEST is not set
-
-#
-# USB DSL modem support
-#
-
-#
-# USB Gadget Support
-#
 # CONFIG_USB_GADGET is not set
 CONFIG_MMC=m
 # CONFIG_MMC_DEBUG is not set
@@ -1097,6 +1348,7 @@ CONFIG_MMC=m
 #
 CONFIG_MMC_BLOCK=m
 CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
 
 #
 # MMC/SD Host Controller Drivers
@@ -1104,10 +1356,22 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 CONFIG_MMC_PXA=m
 # CONFIG_MMC_SDHCI is not set
 # CONFIG_MMC_TIFM_SD is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
 
 #
-# Real Time Clock
+# LED drivers
 #
+# CONFIG_LEDS_GPIO is not set
+CONFIG_LEDS_CM_X270=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+# CONFIG_LEDS_TRIGGER_TIMER is not set
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
 CONFIG_RTC_LIB=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_HCTOSYS=y
@@ -1124,11 +1388,32 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_TEST is not set
 
 #
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+
+#
+# SPI RTC drivers
+#
+
+#
 # Platform RTC drivers
 #
 # CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
 # CONFIG_RTC_DRV_DS1553 is not set
 # CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_M48T86 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
 CONFIG_RTC_DRV_V3020=y
@@ -1137,19 +1422,7 @@ CONFIG_RTC_DRV_V3020=y
 # on-CPU RTC drivers
 #
 CONFIG_RTC_DRV_SA1100=y
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
+# CONFIG_UIO is not set
 
 #
 # File systems
@@ -1163,20 +1436,16 @@ CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_SECURITY is not set
 # CONFIG_EXT4DEV_FS is not set
 CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
 # CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 # CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
@@ -1190,9 +1459,9 @@ CONFIG_DNOTIFY=y
 #
 # DOS/FAT/NT Filesystems
 #
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
+CONFIG_FAT_FS=m
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=m
 CONFIG_FAT_DEFAULT_CODEPAGE=437
 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
@@ -1206,7 +1475,6 @@ CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
 # CONFIG_CONFIGFS_FS is not set
 
 #
@@ -1219,22 +1487,30 @@ CONFIG_RAMFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_JFFS2_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_SUMMARY=y
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
 # CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
 CONFIG_LOCKD=y
@@ -1244,9 +1520,13 @@ CONFIG_SUNRPC=y
 # CONFIG_SUNRPC_BIND34 is not set
 # CONFIG_RPCSEC_GSS_KRB5 is not set
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
-CONFIG_SMB_FS=y
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
+# CONFIG_SMB_FS is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
@@ -1254,15 +1534,27 @@ CONFIG_SMB_FS=y
 #
 # Partition Types
 #
-# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
 CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=m
 CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_437=m
 # CONFIG_NLS_CODEPAGE_737 is not set
 # CONFIG_NLS_CODEPAGE_775 is not set
 # CONFIG_NLS_CODEPAGE_850 is not set
@@ -1286,7 +1578,7 @@ CONFIG_NLS_CODEPAGE_437=y
 # CONFIG_NLS_CODEPAGE_1250 is not set
 # CONFIG_NLS_CODEPAGE_1251 is not set
 # CONFIG_NLS_ASCII is not set
-CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_1=m
 # CONFIG_NLS_ISO8859_2 is not set
 # CONFIG_NLS_ISO8859_3 is not set
 # CONFIG_NLS_ISO8859_4 is not set
@@ -1299,53 +1591,52 @@ CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_ISO8859_15 is not set
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Distributed Lock Manager
-#
+CONFIG_NLS_UTF8=m
 # CONFIG_DLM is not set
 
 #
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
-CONFIG_MAGIC_SYSRQ=y
+CONFIG_FRAME_WARN=0
+# CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 # CONFIG_DETECT_SOFTLOCKUP is not set
-CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
-# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_RT_MUTEXES is not set
 # CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_LOCK_ALLOC is not set
 # CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 # CONFIG_DEBUG_KOBJECT is not set
 # CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
 # CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
 CONFIG_FRAME_POINTER=y
-CONFIG_FORCED_INLINING=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
 CONFIG_DEBUG_USER=y
 CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_ICEDCC is not set
 
@@ -1354,55 +1645,96 @@ CONFIG_DEBUG_LL=y
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
 CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ALGAPI=m
-CONFIG_CRYPTO_BLKCIPHER=m
-CONFIG_CRYPTO_MANAGER=m
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
 # CONFIG_CRYPTO_HMAC is not set
 # CONFIG_CRYPTO_XCBC is not set
-# CONFIG_CRYPTO_NULL is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
 # CONFIG_CRYPTO_MD4 is not set
 # CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
 # CONFIG_CRYPTO_SHA1 is not set
 # CONFIG_CRYPTO_SHA256 is not set
 # CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
 # CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_GF128MUL is not set
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_PCBC=m
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
 # CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_CAMELLIA is not set
 # CONFIG_CRYPTO_CAST5 is not set
 # CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
 # CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
 # CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_CAMELLIA is not set
-# CONFIG_CRYPTO_TEST is not set
-CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_LZO is not set
+# CONFIG_CRYPTO_HW is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
 CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index f6d66dce6852..3781b3db9f49 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -326,11 +326,11 @@ static struct resource ixp4xx_udc_resources[] = {
 };
 
 /*
- * USB device controller. The IXP4xx uses the same controller as PXA2XX,
+ * USB device controller. The IXP4xx uses the same controller as PXA25X,
  * so we just use the same device.
  */
 static struct platform_device ixp4xx_udc_device = {
-        .name           = "pxa2xx-udc",
+        .name           = "pxa25x-udc",
         .id             = -1,
         .num_resources  = 2,
         .resource       = ixp4xx_udc_resources,
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 5da7a6820492..e8ee7ec9ff6d 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -16,19 +16,24 @@ config CPU_PXA310
 config CPU_PXA320
         bool "PXA320 (codename Monahans-P)"
 
+config CPU_PXA930
+        bool "PXA930 (codename Tavor-P)"
+
 endmenu
 
 endif
 
-choice
-        prompt "Select target board"
-
 config ARCH_GUMSTIX
         bool "Gumstix XScale boards"
         help
           Say Y here if you intend to run this kernel on a
           Gumstix Full Function Minature Computer.
 
+config MACH_GUMSTIX_F
+        bool "Basix, Connex, ws-200ax, ws-400ax systems"
+        depends on ARCH_GUMSTIX
+        select PXA25x
+
 config ARCH_LUBBOCK
         bool "Intel DBPXA250 Development Platform"
         select PXA25x
@@ -37,10 +42,12 @@ config ARCH_LUBBOCK
 config MACH_LOGICPD_PXA270
         bool "LogicPD PXA270 Card Engine Development Platform"
         select PXA27x
+        select HAVE_PWM
 
 config MACH_MAINSTONE
         bool "Intel HCDDBBVA0 Development Platform"
         select PXA27x
+        select HAVE_PWM
 
 config ARCH_PXA_IDP
         bool "Accelent Xscale IDP"
@@ -57,6 +64,57 @@ config PXA_SHARPSL
           SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa)
           handheld computer.
 
+config MACH_POODLE
+        bool "Enable Sharp SL-5600 (Poodle) Support"
+        depends on PXA_SHARPSL
+        select PXA25x
+        select SHARP_LOCOMO
+        select PXA_SSP
+
+config MACH_CORGI
+        bool "Enable Sharp SL-C700 (Corgi) Support"
+        depends on PXA_SHARPSL
+        select PXA25x
+        select PXA_SHARP_C7xx
+
+config MACH_SHEPHERD
+        bool "Enable Sharp SL-C750 (Shepherd) Support"
+        depends on PXA_SHARPSL
+        select PXA25x
+        select PXA_SHARP_C7xx
+
+config MACH_HUSKY
+        bool "Enable Sharp SL-C760 (Husky) Support"
+        depends on PXA_SHARPSL
+        select PXA25x
+        select PXA_SHARP_C7xx
+
+config MACH_AKITA
+        bool "Enable Sharp SL-1000 (Akita) Support"
+        depends on PXA_SHARPSL
+        select PXA27x
+        select PXA_SHARP_Cxx00
+        select MACH_SPITZ
+        select I2C
+        select I2C_PXA
+
+config MACH_SPITZ
+        bool "Enable Sharp Zaurus SL-3000 (Spitz) Support"
+        depends on PXA_SHARPSL
+        select PXA27x
+        select PXA_SHARP_Cxx00
+
+config MACH_BORZOI
+        bool "Enable Sharp Zaurus SL-3100 (Borzoi) Support"
+        depends on PXA_SHARPSL
+        select PXA27x
+        select PXA_SHARP_Cxx00
+
+config MACH_TOSA
+        bool "Enable Sharp SL-6000x (Tosa) Support"
+        depends on PXA_SHARPSL
+        select PXA25x
+
 config ARCH_PXA_ESERIES
         bool "PXA based Toshiba e-series PDAs"
         select PXA25x
@@ -69,10 +127,19 @@ config MACH_E330
           Say Y here if you intend to run this kernel on a Toshiba
           e330 family PDA.
 
+config MACH_E350
+        bool "Toshiba e350"
+        default y
+        depends on ARCH_PXA_ESERIES
+        help
+          Say Y here if you intend to run this kernel on a Toshiba
+          e350 family PDA.
+
 config MACH_E740
         bool "Toshiba e740"
         default y
         depends on ARCH_PXA_ESERIES
+        select FB_W100
         help
           Say Y here if you intend to run this kernel on a Toshiba
           e740 family PDA.
@@ -81,6 +148,7 @@ config MACH_E750
         bool "Toshiba e750"
         default y
         depends on ARCH_PXA_ESERIES
+        select FB_W100
         help
           Say Y here if you intend to run this kernel on a Toshiba
           e750 family PDA.
@@ -97,6 +165,7 @@ config MACH_E800
         bool "Toshiba e800"
         default y
         depends on ARCH_PXA_ESERIES
+        select FB_W100
         help
           Say Y here if you intend to run this kernel on a Toshiba
           e800 family PDA.
@@ -105,6 +174,10 @@ config MACH_TRIZEPS4
         bool "Keith und Koep Trizeps4 DIMM-Module"
         select PXA27x
 
+config MACH_TRIZEPS4_CONXS
+        bool "ConXS Eval Board"
+        depends on MACH_TRIZEPS4
+
 config MACH_EM_X270
         bool "CompuLab EM-x270 platform"
         select PXA27x
@@ -114,14 +187,25 @@ config MACH_COLIBRI
         select PXA27x
 
 config MACH_ZYLONITE
-        bool "PXA3xx Development Platform"
+        bool "PXA3xx Development Platform (aka Zylonite)"
         select PXA3xx
+        select HAVE_PWM
 
 config MACH_LITTLETON
         bool "PXA3xx Form Factor Platform (aka Littleton)"
         select PXA3xx
         select PXA_SSP
 
+config MACH_TAVOREVB
+        bool "PXA930 Evaluation Board (aka TavorEVB)"
+        select PXA3xx
+        select PXA930
+
+config MACH_SAAR
+        bool "PXA930 Handheld Platform (aka SAAR)"
+        select PXA3xx
+        select PXA930
+
 config MACH_ARMCORE
         bool "CompuLab CM-X270 modules"
         select PXA27x
@@ -129,7 +213,6 @@ config MACH_ARMCORE
 
 config MACH_MAGICIAN
         bool "Enable HTC Magician Support"
-        depends on ARCH_PXA
         select PXA27x
         select IWMMXT
 
@@ -137,109 +220,81 @@ config MACH_PCM027
         bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
         select PXA27x
         select IWMMXT
+        select PXA_SSP
 
-endchoice
+config ARCH_PXA_PALM
+        bool "PXA based Palm PDAs"
+        select HAVE_PWM
 
-choice
-        prompt "Used baseboard"
-        depends on MACH_PCM027
+config MACH_PALMTX
+        bool "Palm T|X"
+        default y
+        depends on ARCH_PXA_PALM
+        select PXA27x
+        select IWMMXT
+        help
+          Say Y here if you intend to run this kernel on a Palm T|X
+          handheld computer.
 
 config MACH_PCM990_BASEBOARD
         bool "PHYTEC PCM-990 development board"
-
-endchoice
-
-if PXA_SHARPSL
+        select HAVE_PWM
+        depends on MACH_PCM027
 
 choice
-        prompt "Select target Sharp Zaurus device range"
-
-config PXA_SHARPSL_25x
-        bool "Sharp PXA25x models (SL-5600, SL-C7xx and SL-C6000x)"
-        select PXA25x
-
-config PXA_SHARPSL_27x
-        bool "Sharp PXA270 models (SL-Cxx00)"
-        select PXA27x
-
-endchoice
+        prompt "display on pcm990"
+        depends on MACH_PCM990_BASEBOARD
 
-endif
+config PCM990_DISPLAY_SHARP
+        bool "sharp lq084v1dg21 stn display"
 
-if ARCH_GUMSTIX
+config PCM990_DISPLAY_NEC
+        bool "nec nl6448bc20_18d tft display"
 
-choice
-        prompt "Select target Gumstix board"
-
-config MACH_GUMSTIX_F
-        bool "Basix, Connex, ws-200ax, ws-400ax systems"
-        select PXA25x
+config PCM990_DISPLAY_NONE
+        bool "no display"
 
 endchoice
 
-endif
 
+config PXA_EZX
+        bool "Motorola EZX Platform"
+        select PXA27x
+        select IWMMXT
+        select HAVE_PWM
 
-if MACH_TRIZEPS4
+config MACH_EZX_A780
+        bool "Motorola EZX A780"
+        default y
+        depends on PXA_EZX
 
-choice
-        prompt "Select base board for Trizeps 4 module"
+config MACH_EZX_E680
+        bool "Motorola EZX E680"
+        default y
+        depends on PXA_EZX
 
-config MACH_TRIZEPS4_CONXS
-        bool "ConXS Eval Board"
+config MACH_EZX_A1200
+        bool "Motorola EZX A1200"
+        default y
+        depends on PXA_EZX
 
-config MACH_TRIZEPS4_ANY
-        bool "another Board"
+config MACH_EZX_A910
+        bool "Motorola EZX A910"
+        default y
+        depends on PXA_EZX
 
-endchoice
+config MACH_EZX_E6
+        bool "Motorola EZX E6"
+        default y
+        depends on PXA_EZX
 
-endif
+config MACH_EZX_E2
+        bool "Motorola EZX E2"
+        default y
+        depends on PXA_EZX
 
 endmenu
 
-config MACH_POODLE
-        bool "Enable Sharp SL-5600 (Poodle) Support"
-        depends on PXA_SHARPSL_25x
-        select SHARP_LOCOMO
-        select PXA_SSP
-
-config MACH_CORGI
-        bool "Enable Sharp SL-C700 (Corgi) Support"
-        depends on PXA_SHARPSL_25x
-        select PXA_SHARP_C7xx
-
-config MACH_SHEPHERD
-        bool "Enable Sharp SL-C750 (Shepherd) Support"
-        depends on PXA_SHARPSL_25x
-        select PXA_SHARP_C7xx
-
-config MACH_HUSKY
-        bool "Enable Sharp SL-C760 (Husky) Support"
-        depends on PXA_SHARPSL_25x
-        select PXA_SHARP_C7xx
-
-config MACH_AKITA
-        bool "Enable Sharp SL-1000 (Akita) Support"
-        depends on PXA_SHARPSL_27x
-        select PXA_SHARP_Cxx00
-        select MACH_SPITZ
-        select I2C
-        select I2C_PXA
-
-config MACH_SPITZ
-        bool "Enable Sharp Zaurus SL-3000 (Spitz) Support"
-        depends on PXA_SHARPSL_27x
-        select PXA_SHARP_Cxx00
-
-config MACH_BORZOI
-        bool "Enable Sharp Zaurus SL-3100 (Borzoi) Support"
-        depends on PXA_SHARPSL_27x
-        select PXA_SHARP_Cxx00
-
-config MACH_TOSA
-        bool "Enable Sharp SL-6000x (Tosa) Support"
-        depends on PXA_SHARPSL_25x
-
 config PXA25x
         bool
         help
@@ -273,4 +328,19 @@ config PXA_SSP
         tristate
         help
           Enable support for PXA2xx SSP ports
+
+config PXA_PWM
+        tristate
+        default BACKLIGHT_PWM
+        help
+          Enable support for PXA2xx/PXA3xx PWM controllers
+
+config TOSA_BT
+        tristate "Control the state of built-in bluetooth chip on Sharp SL-6000"
+        depends on MACH_TOSA
+        select RFKILL
+        help
+          This is a simple driver that is able to control
+          the state of built in bluetooth chip on tosa.
+
 endif
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 0e6d05bb81aa..99ecbe7f8506 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -4,19 +4,21 @@
 
 # Common support (must be linked before board specific support)
 obj-y                           += clock.o devices.o generic.o irq.o dma.o \
-                                   time.o gpio.o
+                                   time.o gpio.o reset.o
 obj-$(CONFIG_PM)                += pm.o sleep.o standby.o
 obj-$(CONFIG_CPU_FREQ)          += cpu-pxa.o
 
 # Generic drivers that other drivers may depend upon
 obj-$(CONFIG_PXA_SSP)           += ssp.o
+obj-$(CONFIG_PXA_PWM)           += pwm.o
 
 # SoC-specific code
-obj-$(CONFIG_PXA25x)            += mfp-pxa2xx.o pxa25x.o
-obj-$(CONFIG_PXA27x)            += mfp-pxa2xx.o pxa27x.o
+obj-$(CONFIG_PXA25x)            += mfp-pxa2xx.o pxa2xx.o pxa25x.o
+obj-$(CONFIG_PXA27x)            += mfp-pxa2xx.o pxa2xx.o pxa27x.o
 obj-$(CONFIG_PXA3xx)            += mfp-pxa3xx.o pxa3xx.o smemc.o
 obj-$(CONFIG_CPU_PXA300)        += pxa300.o
 obj-$(CONFIG_CPU_PXA320)        += pxa320.o
+obj-$(CONFIG_CPU_PXA930)        += pxa930.o
 
 # Specific board support
 obj-$(CONFIG_ARCH_GUMSTIX)      += gumstix.o
@@ -35,7 +37,12 @@ obj-$(CONFIG_MACH_PCM990_BASEBOARD)	+= pcm990-baseboard.o
 obj-$(CONFIG_MACH_TOSA)         += tosa.o
 obj-$(CONFIG_MACH_EM_X270)      += em-x270.o
 obj-$(CONFIG_MACH_MAGICIAN)     += magician.o
-obj-$(CONFIG_ARCH_PXA_ESERIES)  += eseries.o
+obj-$(CONFIG_ARCH_PXA_ESERIES)  += eseries.o eseries_udc.o
+obj-$(CONFIG_MACH_E740)         += e740_lcd.o
+obj-$(CONFIG_MACH_E750)         += e750_lcd.o
+obj-$(CONFIG_MACH_E400)         += e400_lcd.o
+obj-$(CONFIG_MACH_E800)         += e800_lcd.o
+obj-$(CONFIG_MACH_PALMTX)       += palmtx.o
 
 ifeq ($(CONFIG_MACH_ZYLONITE),y)
   obj-y                         += zylonite.o
@@ -43,8 +50,11 @@ ifeq ($(CONFIG_MACH_ZYLONITE),y)
   obj-$(CONFIG_CPU_PXA320)      += zylonite_pxa320.o
 endif
 obj-$(CONFIG_MACH_LITTLETON)    += littleton.o
+obj-$(CONFIG_MACH_TAVOREVB)     += tavorevb.o
+obj-$(CONFIG_MACH_SAAR)         += saar.o
 
 obj-$(CONFIG_MACH_ARMCORE)      += cm-x270.o
+obj-$(CONFIG_PXA_EZX)           += ezx.o
 
 # Support for blinky lights
 led-y := leds.o
@@ -58,3 +68,5 @@ obj-$(CONFIG_LEDS)		+= $(led-y)
 ifeq ($(CONFIG_PCI),y)
 obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o
 endif
+
+obj-$(CONFIG_TOSA_BT)           += tosa-bt.o
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index e97dc59813c8..630063ffa6fc 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -12,7 +12,7 @@
 #include <linux/platform_device.h>
 #include <linux/delay.h>
 
-#include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/pxa2xx-gpio.h>
 #include <asm/hardware.h>
 
@@ -47,6 +47,9 @@ struct clk *clk_get(struct device *dev, const char *id)
                 clk = p;
         mutex_unlock(&clocks_mutex);
 
+        if (!IS_ERR(clk) && clk->ops == NULL)
+                clk = clk->other;
+
         return clk;
 }
 EXPORT_SYMBOL(clk_get);
@@ -98,21 +101,6 @@ unsigned long clk_get_rate(struct clk *clk)
 EXPORT_SYMBOL(clk_get_rate);
 
 
-static void clk_gpio27_enable(struct clk *clk)
-{
-        pxa_gpio_mode(GPIO11_3_6MHz_MD);
-}
-
-static void clk_gpio27_disable(struct clk *clk)
-{
-}
-
-static const struct clkops clk_gpio27_ops = {
-        .enable         = clk_gpio27_enable,
-        .disable        = clk_gpio27_disable,
-};
-
-
 void clk_cken_enable(struct clk *clk)
 {
         CKEN |= 1 << clk->cken;
@@ -128,14 +116,6 @@ const struct clkops clk_cken_ops = {
         .disable        = clk_cken_disable,
 };
 
-static struct clk common_clks[] = {
-        {
-                .name           = "GPIO27_CLK",
-                .ops            = &clk_gpio27_ops,
-                .rate           = 3686400,
-        },
-};
-
 void clks_register(struct clk *clks, size_t num)
 {
         int i;
@@ -145,10 +125,3 @@ void clks_register(struct clk *clks, size_t num)
                 list_add(&clks[i].node, &clocks);
         mutex_unlock(&clocks_mutex);
 }
-
-static int __init clk_init(void)
-{
-        clks_register(common_clks, ARRAY_SIZE(common_clks));
-        return 0;
-}
-arch_initcall(clk_init);
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index bc6b77e1592e..1ec8f9178aaf 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -15,6 +15,7 @@ struct clk {
         unsigned int            cken;
         unsigned int            delay;
         unsigned int            enabled;
+        struct clk              *other;
 };
 
 #define INIT_CKEN(_name, _cken, _rate, _delay, _dev)    \
@@ -35,9 +36,53 @@ struct clk {
                 .cken   = CKEN_##_cken,                 \
         }
 
+/*
+ * This is a placeholder to alias one clock device+name pair
+ * to another struct clk.
+ */
+#define INIT_CKOTHER(_name, _other, _dev)               \
+        {                                               \
+                .name   = _name,                        \
+                .dev    = _dev,                         \
+                .other  = _other,                       \
+        }
+
+#define INIT_CLK(_name, _ops, _rate, _delay, _dev)      \
+        {                                               \
+                .name   = _name,                        \
+                .dev    = _dev,                         \
+                .ops    = _ops,                         \
+                .rate   = _rate,                        \
+                .delay  = _delay,                       \
+        }
+
 extern const struct clkops clk_cken_ops;
 
 void clk_cken_enable(struct clk *clk);
 void clk_cken_disable(struct clk *clk);
 
+#ifdef CONFIG_PXA3xx
+#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev)  \
+        {                                               \
+                .name   = _name,                        \
+                .dev    = _dev,                         \
+                .ops    = &clk_pxa3xx_cken_ops,         \
+                .rate   = _rate,                        \
+                .cken   = CKEN_##_cken,                 \
+                .delay  = _delay,                       \
+        }
+
+#define PXA3xx_CK(_name, _cken, _ops, _dev)             \
+        {                                               \
+                .name   = _name,                        \
+                .dev    = _dev,                         \
+                .ops    = _ops,                         \
+                .cken   = CKEN_##_cken,                 \
+        }
+
+extern const struct clkops clk_pxa3xx_cken_ops;
+extern void clk_pxa3xx_cken_enable(struct clk *);
+extern void clk_pxa3xx_cken_disable(struct clk *);
+#endif
+
 void clks_register(struct clk *clks, size_t num);
diff --git a/arch/arm/mach-pxa/cm-x270-pci.c b/arch/arm/mach-pxa/cm-x270-pci.c
index ac7f05f9f3eb..bcf0cde6ccc9 100644
--- a/arch/arm/mach-pxa/cm-x270-pci.c
+++ b/arch/arm/mach-pxa/cm-x270-pci.c
@@ -5,7 +5,7 @@
  *
  * Bits taken from various places.
  *
- * Copyright (C) 2007 Compulab, Ltd.
+ * Copyright (C) 2007, 2008 Compulab, Ltd.
  * Mike Rapoport <mike@compulab.co.il>
  *
  * This program is free software; you can redistribute it and/or modify
@@ -19,16 +19,16 @@
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/irq.h>
+#include <linux/gpio.h>
 
 #include <asm/mach/pci.h>
-#include <asm/arch/cm-x270.h>
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
 #include <asm/mach-types.h>
 
 #include <asm/hardware/it8152.h>
 
-unsigned long it8152_base_address = CMX270_IT8152_VIRT;
+unsigned long it8152_base_address;
+static int cmx270_it8152_irq_gpio;
 
 /*
  * Only first 64MB of memory can be accessed via PCI.
@@ -41,36 +41,39 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
 {
         unsigned int sz = SZ_64M >> PAGE_SHIFT;
 
-        pr_info("Adjusting zones for CM-x270\n");
+        if (machine_is_armcore()) {
+                pr_info("Adjusting zones for CM-X270\n");
 
-        /*
-         * Only adjust if > 64M on current system
-         */
-        if (node || (zone_size[0] <= sz))
-                return;
-
-        zone_size[1] = zone_size[0] - sz;
-        zone_size[0] = sz;
-        zhole_size[1] = zhole_size[0];
-        zhole_size[0] = 0;
+                /*
+                 * Only adjust if > 64M on current system
+                 */
+                if (node || (zone_size[0] <= sz))
+                        return;
+
+                zone_size[1] = zone_size[0] - sz;
+                zone_size[0] = sz;
+                zhole_size[1] = zhole_size[0];
+                zhole_size[0] = 0;
+        }
 }
 
 static void cmx270_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
         /* clear our parent irq */
-        GEDR(GPIO_IT8152_IRQ) = GPIO_bit(GPIO_IT8152_IRQ);
+        GEDR(cmx270_it8152_irq_gpio) = GPIO_bit(cmx270_it8152_irq_gpio);
 
         it8152_irq_demux(irq, desc);
 }
 
-void __cmx270_pci_init_irq(void)
+void __cmx270_pci_init_irq(int irq_gpio)
 {
         it8152_init_irq();
-        pxa_gpio_mode(IRQ_TO_GPIO(GPIO_IT8152_IRQ));
-        set_irq_type(IRQ_GPIO(GPIO_IT8152_IRQ), IRQT_RISING);
 
-        set_irq_chained_handler(IRQ_GPIO(GPIO_IT8152_IRQ),
-                                cmx270_it8152_irq_demux);
+        cmx270_it8152_irq_gpio = irq_gpio;
+
+        set_irq_type(gpio_to_irq(irq_gpio), IRQT_RISING);
+
+        set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx270_it8152_irq_demux);
 }
 
 #ifdef CONFIG_PM
@@ -113,8 +116,8 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 
         /*
           Here comes the ugly part. The routing is baseboard specific,
-          but defining a platform for each possible base of CM-x270 is
-          unrealistic. Here we keep mapping for ATXBase and SB-x270.
+          but defining a platform for each possible base of CM-X270 is
+          unrealistic. Here we keep mapping for ATXBase and SB-X270.
         */
         /* ATXBASE PCI slot */
         if (slot == 7)
diff --git a/arch/arm/mach-pxa/cm-x270-pci.h b/arch/arm/mach-pxa/cm-x270-pci.h
index ffe37b66f9a0..48f532f4cb51 100644
--- a/arch/arm/mach-pxa/cm-x270-pci.h
+++ b/arch/arm/mach-pxa/cm-x270-pci.h
@@ -1,13 +1,13 @@
-extern void __cmx270_pci_init_irq(void);
+extern void __cmx270_pci_init_irq(int irq_gpio);
 extern void __cmx270_pci_suspend(void);
 extern void __cmx270_pci_resume(void);
 
 #ifdef CONFIG_PCI
-#define cmx270_pci_init_irq __cmx270_pci_init_irq
-#define cmx270_pci_suspend __cmx270_pci_suspend
-#define cmx270_pci_resume __cmx270_pci_resume
+#define cmx270_pci_init_irq(x) __cmx270_pci_init_irq(x)
+#define cmx270_pci_suspend(x) __cmx270_pci_suspend(x)
+#define cmx270_pci_resume(x) __cmx270_pci_resume(x)
 #else
-#define cmx270_pci_init_irq() do {} while (0)
-#define cmx270_pci_suspend() do {} while (0)
-#define cmx270_pci_resume() do {} while (0)
+#define cmx270_pci_init_irq(x) do {} while (0)
+#define cmx270_pci_suspend(x) do {} while (0)
+#define cmx270_pci_resume(x) do {} while (0)
 #endif
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index f5851d1adc25..402e807eae54 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -1,7 +1,7 @@
 /*
  * linux/arch/arm/mach-pxa/cm-x270.c
  *
- * Copyright (C) 2007 CompuLab, Ltd.
+ * Copyright (C) 2007, 2008 CompuLab, Ltd.
  * Mike Rapoport <mike@compulab.co.il>
  *
  * This program is free software; you can redistribute it and/or modify
@@ -9,43 +9,156 @@
  * published by the Free Software Foundation.
  */
 
-#include <linux/types.h>
-#include <linux/pm.h>
-#include <linux/fb.h>
 #include <linux/platform_device.h>
-#include <linux/irq.h>
 #include <linux/sysdev.h>
-#include <linux/io.h>
-#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
 
 #include <linux/dm9000.h>
 #include <linux/rtc-v3020.h>
-#include <linux/serial_8250.h>
-
 #include <video/mbxfb.h>
+#include <linux/leds.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
 
-#include <asm/arch/pxa-regs.h>
 #include <asm/arch/pxa2xx-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
+#include <asm/arch/mfp-pxa27x.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/audio.h>
 #include <asm/arch/pxafb.h>
 #include <asm/arch/ohci.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/bitfield.h>
-#include <asm/arch/cm-x270.h>
 
 #include <asm/hardware/it8152.h>
 
 #include "generic.h"
 #include "cm-x270-pci.h"
 
+/* virtual addresses for statically mapped regions */
+#define CMX270_VIRT_BASE        (0xe8000000)
+#define CMX270_IT8152_VIRT      (CMX270_VIRT_BASE)
+
 #define RTC_PHYS_BASE           (PXA_CS1_PHYS + (5 << 22))
 #define DM9000_PHYS_BASE        (PXA_CS1_PHYS + (6 << 22))
 
-static struct resource cmx270_dm9k_resource[] = {
+/* GPIO IRQ usage */
+#define GPIO10_ETHIRQ           (10)
+#define GPIO22_IT8152_IRQ       (22)
+#define GPIO83_MMC_IRQ          (83)
+#define GPIO95_GFXIRQ           (95)
+
+#define CMX270_ETHIRQ           IRQ_GPIO(GPIO10_ETHIRQ)
+#define CMX270_IT8152_IRQ       IRQ_GPIO(GPIO22_IT8152_IRQ)
+#define CMX270_MMC_IRQ          IRQ_GPIO(GPIO83_MMC_IRQ)
+#define CMX270_GFXIRQ           IRQ_GPIO(GPIO95_GFXIRQ)
+
+/* MMC power enable */
+#define GPIO105_MMC_POWER       (105)
+
+static unsigned long cmx270_pin_config[] = {
+        /* AC'97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+        GPIO98_AC97_SYSCLK,
+        GPIO113_AC97_nRESET,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+
+        /* STUART */
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+
+        /* MCI controller */
+        GPIO32_MMC_CLK,
+        GPIO112_MMC_CMD,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+
+        /* LCD */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
+        /* SSP1 */
+        GPIO23_SSP1_SCLK,
+        GPIO24_SSP1_SFRM,
+        GPIO25_SSP1_TXD,
+        GPIO26_SSP1_RXD,
+
+        /* SSP2 */
+        GPIO19_SSP2_SCLK,
+        GPIO14_SSP2_SFRM,
+        GPIO87_SSP2_TXD,
+        GPIO88_SSP2_RXD,
+
+        /* PC Card */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO85_nPCE_1,
+        GPIO54_nPCE_2,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+
+        /* SDRAM and local bus */
+        GPIO15_nCS_1,
+        GPIO78_nCS_2,
+        GPIO79_nCS_3,
+        GPIO80_nCS_4,
+        GPIO33_nCS_5,
+        GPIO49_nPWE,
+        GPIO18_RDY,
+
+        /* GPIO */
+        GPIO0_GPIO      | WAKEUP_ON_EDGE_BOTH,
+        GPIO105_GPIO    | MFP_LPM_DRIVE_HIGH,   /* MMC/SD power */
+        GPIO53_GPIO,                            /* PC card reset */
+
+        /* NAND controls */
+        GPIO11_GPIO     | MFP_LPM_DRIVE_HIGH,   /* NAND CE# */
+        GPIO89_GPIO,                            /* NAND Ready/Busy */
+
+        /* interrupts */
+        GPIO10_GPIO,    /* DM9000 interrupt */
+        GPIO83_GPIO,    /* MMC card detect */
+};
+
+#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
+static struct resource cmx270_dm9000_resource[] = {
         [0] = {
                 .start = DM9000_PHYS_BASE,
                 .end   = DM9000_PHYS_BASE + 4,
@@ -63,37 +176,45 @@ static struct resource cmx270_dm9k_resource[] = {
         }
 };
 
-/* for the moment we limit ourselves to 32bit IO until some
- * better IO routines can be written and tested
- */
-static struct dm9000_plat_data cmx270_dm9k_platdata = {
+static struct dm9000_plat_data cmx270_dm9000_platdata = {
         .flags          = DM9000_PLATF_32BITONLY,
 };
 
-/* Ethernet device */
-static struct platform_device cmx270_device_dm9k = {
+static struct platform_device cmx270_dm9000_device = {
         .name           = "dm9000",
         .id             = 0,
-        .num_resources  = ARRAY_SIZE(cmx270_dm9k_resource),
-        .resource       = cmx270_dm9k_resource,
+        .num_resources  = ARRAY_SIZE(cmx270_dm9000_resource),
+        .resource       = cmx270_dm9000_resource,
         .dev            = {
-                .platform_data = &cmx270_dm9k_platdata,
+                .platform_data = &cmx270_dm9000_platdata,
         }
 };
 
-/* audio device */
-static struct platform_device cmx270_audio_device = {
-        .name           = "pxa2xx-ac97",
-        .id             = -1,
-};
+static void __init cmx270_init_dm9000(void)
+{
+        platform_device_register(&cmx270_dm9000_device);
+}
+#else
+static inline void cmx270_init_dm9000(void) {}
+#endif
 
-/* touchscreen controller */
+/* UCB1400 touchscreen controller */
+#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
 static struct platform_device cmx270_ts_device = {
         .name           = "ucb1400_ts",
         .id             = -1,
 };
 
-/* RTC */
+static void __init cmx270_init_touchscreen(void)
+{
+        platform_device_register(&cmx270_ts_device);
+}
+#else
+static inline void cmx270_init_touchscreen(void) {}
+#endif
+
+/* V3020 RTC */
+#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
 static struct resource cmx270_v3020_resource[] = {
         [0] = {
                 .start = RTC_PHYS_BASE,
@@ -116,28 +237,67 @@ static struct platform_device cmx270_rtc_device = {
         }
 };
 
-/*
- * CM-X270 LEDs
- */
+static void __init cmx270_init_rtc(void)
+{
+        platform_device_register(&cmx270_rtc_device);
+}
+#else
+static inline void cmx270_init_rtc(void) {}
+#endif
+
+/* CM-X270 LEDs */
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+static struct gpio_led cmx270_leds[] = {
+        [0] = {
+                .name = "cm-x270:red",
+                .default_trigger = "nand-disk",
+                .gpio = 93,
+                .active_low = 1,
+        },
+        [1] = {
+                .name = "cm-x270:green",
+                .default_trigger = "heartbeat",
+                .gpio = 94,
+                .active_low = 1,
+        },
+};
+
+static struct gpio_led_platform_data cmx270_gpio_led_pdata = {
+        .num_leds = ARRAY_SIZE(cmx270_leds),
+        .leds = cmx270_leds,
+};
+
 static struct platform_device cmx270_led_device = {
-        .name           = "cm-x270-led",
+        .name           = "leds-gpio",
         .id             = -1,
+        .dev            = {
+                .platform_data = &cmx270_gpio_led_pdata,
+        },
 };
 
+static void __init cmx270_init_leds(void)
+{
+        platform_device_register(&cmx270_led_device);
+}
+#else
+static inline void cmx270_init_leds(void) {}
+#endif
+
 /* 2700G graphics */
+#if defined(CONFIG_FB_MBX) || defined(CONFIG_FB_MBX_MODULE)
 static u64 fb_dma_mask = ~(u64)0;
 
 static struct resource cmx270_2700G_resource[] = {
         /* frame buffer memory including ODFB and External SDRAM */
         [0] = {
-                .start = MARATHON_PHYS,
-                .end   = MARATHON_PHYS + 0x02000000,
+                .start = PXA_CS2_PHYS,
+                .end   = PXA_CS2_PHYS + 0x01ffffff,
                 .flags = IORESOURCE_MEM,
         },
         /* Marathon registers */
         [1] = {
-                .start = MARATHON_PHYS + 0x03fe0000,
-                .end   = MARATHON_PHYS + 0x03ffffff,
+                .start = PXA_CS2_PHYS + 0x03fe0000,
+                .end   = PXA_CS2_PHYS + 0x03ffffff,
                 .flags = IORESOURCE_MEM,
         },
 };
@@ -205,44 +365,15 @@ static struct platform_device cmx270_2700G = {
         .id             = -1,
 };
 
-static u64 ata_dma_mask = ~(u64)0;
-
-static struct platform_device cmx270_ata = {
-        .name = "pata_cm_x270",
-        .id = -1,
-        .dev            = {
-                .dma_mask       = &ata_dma_mask,
-                .coherent_dma_mask = 0xffffffff,
-        },
-};
-
-/* platform devices */
-static struct platform_device *platform_devices[] __initdata = {
-        &cmx270_device_dm9k,
-        &cmx270_audio_device,
-        &cmx270_rtc_device,
-        &cmx270_2700G,
-        &cmx270_led_device,
-        &cmx270_ts_device,
-        &cmx270_ata,
-};
-
-/* Map PCI companion and IDE/General Purpose CS statically */
-static struct map_desc cmx270_io_desc[] __initdata = {
-        [0] = { /* IDE/general purpose space */
-                .virtual        = CMX270_IDE104_VIRT,
-                .pfn            = __phys_to_pfn(CMX270_IDE104_PHYS),
-                .length         = SZ_64M - SZ_8M,
-                .type           = MT_DEVICE
-        },
-        [1] = { /* PCI bridge */
-                .virtual        = CMX270_IT8152_VIRT,
-                .pfn            = __phys_to_pfn(CMX270_IT8152_PHYS),
-                .length         = SZ_64M,
-                .type           = MT_DEVICE
-        },
-};
+static void __init cmx270_init_2700G(void)
+{
+        platform_device_register(&cmx270_2700G);
+}
+#else
+static inline void cmx270_init_2700G(void) {}
+#endif
 
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 /*
   Display definitions
   keep these for backwards compatibility, although symbolic names (as
@@ -452,7 +583,16 @@ static int __init cmx270_set_display(char *str)
 */
 __setup("monitor=", cmx270_set_display);
 
+static void __init cmx270_init_display(void)
+{
+        set_pxa_fb_info(cmx270_display);
+}
+#else
+static inline void cmx270_init_display(void) {}
+#endif
+
 /* PXA27x OHCI controller setup */
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 static int cmx270_ohci_init(struct device *dev)
 {
         /* Set the Power Control Polarity Low */
@@ -467,35 +607,37 @@ static struct pxaohci_platform_data cmx270_ohci_platform_data = {
         .init           = cmx270_ohci_init,
 };
 
+static void __init cmx270_init_ohci(void)
+{
+        pxa_set_ohci_info(&cmx270_ohci_platform_data);
+}
+#else
+static inline void cmx270_init_ohci(void) {}
+#endif
 
+#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
 static int cmx270_mci_init(struct device *dev,
                            irq_handler_t cmx270_detect_int,
                            void *data)
 {
         int err;
 
-        /*
-         * setup GPIO for PXA27x MMC controller
-         */
-        pxa_gpio_mode(GPIO32_MMCCLK_MD);
-        pxa_gpio_mode(GPIO112_MMCCMD_MD);
-        pxa_gpio_mode(GPIO92_MMCDAT0_MD);
-        pxa_gpio_mode(GPIO109_MMCDAT1_MD);
-        pxa_gpio_mode(GPIO110_MMCDAT2_MD);
-        pxa_gpio_mode(GPIO111_MMCDAT3_MD);
-
-        /* SB-X270 uses GPIO105 as SD power enable */
-        pxa_gpio_mode(105 | GPIO_OUT);
+        err = gpio_request(GPIO105_MMC_POWER, "MMC/SD power");
+        if (err) {
+                dev_warn(dev, "power gpio unavailable\n");
+                return err;
+        }
 
-        /* card detect IRQ on GPIO 83 */
-        pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ));
+        gpio_direction_output(GPIO105_MMC_POWER, 0);
 
         err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
                           IRQF_DISABLED | IRQF_TRIGGER_FALLING,
                           "MMC card detect", data);
-        if (err)
-                printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't"
-                       " request MMC card detect IRQ\n");
+        if (err) {
+                gpio_free(GPIO105_MMC_POWER);
+                dev_err(dev, "cmx270_mci_init: MMC/SD: can't"
+                        " request MMC card detect IRQ\n");
+        }
 
         return err;
 }
@@ -505,17 +647,18 @@ static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
         struct pxamci_platform_data *p_d = dev->platform_data;
 
         if ((1 << vdd) & p_d->ocr_mask) {
-                printk(KERN_DEBUG "%s: on\n", __func__);
-                GPCR(105) = GPIO_bit(105);
+                dev_dbg(dev, "power on\n");
+                gpio_set_value(GPIO105_MMC_POWER, 0);
         } else {
-                GPSR(105) = GPIO_bit(105);
-                printk(KERN_DEBUG "%s: off\n", __func__);
+                gpio_set_value(GPIO105_MMC_POWER, 1);
+                dev_dbg(dev, "power off\n");
         }
 }
 
 static void cmx270_mci_exit(struct device *dev, void *data)
 {
         free_irq(CMX270_MMC_IRQ, data);
+        gpio_free(GPIO105_MMC_POWER);
 }
 
 static struct pxamci_platform_data cmx270_mci_platform_data = {
@@ -525,6 +668,14 @@ static struct pxamci_platform_data cmx270_mci_platform_data = {
         .exit           = cmx270_mci_exit,
 };
 
+static void __init cmx270_init_mmc(void)
+{
+        pxa_set_mci_info(&cmx270_mci_platform_data);
+}
+#else
+static inline void cmx270_init_mmc(void) {}
+#endif
+
 #ifdef CONFIG_PM
 static unsigned long sleep_save_msc[10];
 
@@ -586,52 +737,63 @@ static int __init cmx270_pm_init(void)
 static int __init cmx270_pm_init(void) { return 0; }
 #endif
 
+#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
+static void __init cmx270_init_ac97(void)
+{
+        pxa_set_ac97_info(NULL);
+}
+#else
+static inline void cmx270_init_ac97(void) {}
+#endif
+
 static void __init cmx270_init(void)
 {
         cmx270_pm_init();
 
-        set_pxa_fb_info(cmx270_display);
-
-        /* register CM-X270 platform devices */
-        platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
-
-        /* set MCI and OHCI platform parameters */
-        pxa_set_mci_info(&cmx270_mci_platform_data);
-        pxa_set_ohci_info(&cmx270_ohci_platform_data);
-
-        /* This enables the STUART */
-        pxa_gpio_mode(GPIO46_STRXD_MD);
-        pxa_gpio_mode(GPIO47_STTXD_MD);
-
-        /* This enables the BTUART  */
-        pxa_gpio_mode(GPIO42_BTRXD_MD);
-        pxa_gpio_mode(GPIO43_BTTXD_MD);
-        pxa_gpio_mode(GPIO44_BTCTS_MD);
-        pxa_gpio_mode(GPIO45_BTRTS_MD);
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config));
+
+        cmx270_init_dm9000();
+        cmx270_init_rtc();
+        cmx270_init_display();
+        cmx270_init_mmc();
+        cmx270_init_ohci();
+        cmx270_init_ac97();
+        cmx270_init_touchscreen();
+        cmx270_init_leds();
+        cmx270_init_2700G();
 }
 
 static void __init cmx270_init_irq(void)
 {
         pxa27x_init_irq();
 
+        cmx270_pci_init_irq(GPIO22_IT8152_IRQ);
+}
 
-        cmx270_pci_init_irq();
+#ifdef CONFIG_PCI
+/* Map PCI companion statically */
+static struct map_desc cmx270_io_desc[] __initdata = {
+        [0] = { /* PCI bridge */
+                .virtual        = CMX270_IT8152_VIRT,
+                .pfn            = __phys_to_pfn(PXA_CS4_PHYS),
+                .length         = SZ_64M,
+                .type           = MT_DEVICE
+        },
+};
 
-        /* Setup interrupt for dm9000 */
-        pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ));
-        set_irq_type(CMX270_ETHIRQ, IRQT_RISING);
+static void __init cmx270_map_io(void)
+{
+        pxa_map_io();
+        iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
 
-        /* Setup interrupt for 2700G */
-        pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ));
-        set_irq_type(CMX270_GFXIRQ, IRQT_FALLING);
+        it8152_base_address = CMX270_IT8152_VIRT;
 }
-
+#else
 static void __init cmx270_map_io(void)
 {
         pxa_map_io();
-        iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
 }
-
+#endif
 
 MACHINE_START(ARMCORE, "Compulab CM-x270")
         .boot_params    = 0xa0000100,
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index b757dd756655..e58504edb140 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -36,6 +36,7 @@
 #include <asm/mach/irq.h>
 
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/pxa2xx-gpio.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/mmc.h>
@@ -464,6 +465,7 @@ static void corgi_irda_transceiver_mode(struct device *dev, int mode)
                 GPSR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
         else
                 GPCR(CORGI_GPIO_IR_ON) = GPIO_bit(CORGI_GPIO_IR_ON);
+        pxa2xx_transceiver_mode(dev, mode);
 }
 
 static struct pxaficp_platform_data corgi_ficp_platform_data = {
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 0a85f706e887..e91c0f26c412 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -26,6 +26,7 @@
 #include <asm/arch/sharpsl.h>
 #include <asm/arch/corgi.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/pxa2xx-gpio.h>
 #include "sharpsl.h"
 
@@ -204,7 +205,9 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = {
         .read_devdata    = corgipm_read_devdata,
         .charger_wakeup  = corgi_charger_wakeup,
         .should_wakeup   = corgi_should_wakeup,
+#ifdef CONFIG_BACKLIGHT_CORGI
         .backlight_limit = corgibl_limit_intensity,
+#endif
         .charge_on_volt   = SHARPSL_CHARGE_ON_VOLT,
         .charge_on_temp   = SHARPSL_CHARGE_ON_TEMP,
         .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH,
@@ -226,6 +229,10 @@ static int __devinit corgipm_init(void)
 {
         int ret;
 
+        if (!machine_is_corgi() && !machine_is_shepherd()
+                        && !machine_is_husky())
+                return -ENODEV;
+
         corgipm_device = platform_device_alloc("sharpsl-pm", -1);
         if (!corgipm_device)
                 return -ENOMEM;
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index d6c05b6eab35..84489dc51d81 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -10,11 +10,16 @@
 #include <asm/arch/mmc.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/i2c.h>
+#include <asm/arch/mfp-pxa27x.h>
 #include <asm/arch/ohci.h>
 #include <asm/arch/pxa27x_keypad.h>
+#include <asm/arch/pxa2xx_spi.h>
 #include <asm/arch/camera.h>
+#include <asm/arch/audio.h>
+#include <asm/arch/pxa3xx_nand.h>
 
 #include "devices.h"
+#include "generic.h"
 
 void __init pxa_register_device(struct platform_device *dev, void *data)
 {
@@ -91,8 +96,19 @@ static struct resource pxa2xx_udc_resources[] = {
 
 static u64 udc_dma_mask = ~(u32)0;
 
-struct platform_device pxa_device_udc = {
-        .name           = "pxa2xx-udc",
+struct platform_device pxa25x_device_udc = {
+        .name           = "pxa25x-udc",
+        .id             = -1,
+        .resource       = pxa2xx_udc_resources,
+        .num_resources  = ARRAY_SIZE(pxa2xx_udc_resources),
+        .dev            =  {
+                .platform_data  = &pxa_udc_info,
+                .dma_mask       = &udc_dma_mask,
+        }
+};
+
+struct platform_device pxa27x_device_udc = {
+        .name           = "pxa27x-udc",
         .id             = -1,
         .resource       = pxa2xx_udc_resources,
         .num_resources  = ARRAY_SIZE(pxa2xx_udc_resources),
@@ -233,8 +249,15 @@ struct platform_device pxa_device_i2c = {
         .num_resources  = ARRAY_SIZE(pxai2c_resources),
 };
 
+static unsigned long pxa27x_i2c_mfp_cfg[] = {
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+};
+
 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
 {
+        if (cpu_is_pxa27x())
+                pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
         pxa_register_device(&pxa_device_i2c, info);
 }
 
@@ -278,8 +301,69 @@ struct platform_device pxa_device_rtc = {
         .id             = -1,
 };
 
+static struct resource pxa_ac97_resources[] = {
+        [0] = {
+                .start  = 0x40500000,
+                .end    = 0x40500000 + 0xfff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_AC97,
+                .end    = IRQ_AC97,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 pxa_ac97_dmamask = 0xffffffffUL;
+
+struct platform_device pxa_device_ac97 = {
+        .name           = "pxa2xx-ac97",
+        .id             = -1,
+        .dev            = {
+                .dma_mask = &pxa_ac97_dmamask,
+                .coherent_dma_mask = 0xffffffff,
+        },
+        .num_resources  = ARRAY_SIZE(pxa_ac97_resources),
+        .resource       = pxa_ac97_resources,
+};
+
+void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
+{
+        pxa_register_device(&pxa_device_ac97, ops);
+}
+
 #ifdef CONFIG_PXA25x
 
+static struct resource pxa25x_resource_pwm0[] = {
+        [0] = {
+                .start  = 0x40b00000,
+                .end    = 0x40b0000f,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+struct platform_device pxa25x_device_pwm0 = {
+        .name           = "pxa25x-pwm",
+        .id             = 0,
+        .resource       = pxa25x_resource_pwm0,
+        .num_resources  = ARRAY_SIZE(pxa25x_resource_pwm0),
+};
+
+static struct resource pxa25x_resource_pwm1[] = {
+        [0] = {
+                .start  = 0x40c00000,
+                .end    = 0x40c0000f,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+struct platform_device pxa25x_device_pwm1 = {
+        .name           = "pxa25x-pwm",
+        .id             = 1,
+        .resource       = pxa25x_resource_pwm1,
+        .num_resources  = ARRAY_SIZE(pxa25x_resource_pwm1),
+};
+
 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
 
 static struct resource pxa25x_resource_ssp[] = {
@@ -568,6 +652,36 @@ struct platform_device pxa27x_device_ssp3 = {
         .num_resources  = ARRAY_SIZE(pxa27x_resource_ssp3),
 };
 
+static struct resource pxa27x_resource_pwm0[] = {
+        [0] = {
+                .start  = 0x40b00000,
+                .end    = 0x40b0001f,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+struct platform_device pxa27x_device_pwm0 = {
+        .name           = "pxa27x-pwm",
+        .id             = 0,
+        .resource       = pxa27x_resource_pwm0,
+        .num_resources  = ARRAY_SIZE(pxa27x_resource_pwm0),
+};
+
+static struct resource pxa27x_resource_pwm1[] = {
+        [0] = {
+                .start  = 0x40c00000,
+                .end    = 0x40c0001f,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+struct platform_device pxa27x_device_pwm1 = {
+        .name           = "pxa27x-pwm",
+        .id             = 1,
+        .resource       = pxa27x_resource_pwm1,
+        .num_resources  = ARRAY_SIZE(pxa27x_resource_pwm1),
+};
+
 static struct resource pxa27x_resource_camera[] = {
         [0] = {
                 .start  = 0x50000000,
@@ -718,4 +832,63 @@ void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
         pxa_register_device(&pxa3xx_device_mci3, info);
 }
 
+static struct resource pxa3xx_resources_nand[] = {
+        [0] = {
+                .start  = 0x43100000,
+                .end    = 0x43100053,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_NAND,
+                .end    = IRQ_NAND,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* DRCMR for Data DMA */
+                .start  = 97,
+                .end    = 97,
+                .flags  = IORESOURCE_DMA,
+        },
+        [3] = {
+                /* DRCMR for Command DMA */
+                .start  = 99,
+                .end    = 99,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
+
+struct platform_device pxa3xx_device_nand = {
+        .name           = "pxa3xx-nand",
+        .id             = -1,
+        .dev            = {
+                .dma_mask = &pxa3xx_nand_dma_mask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+        .num_resources  = ARRAY_SIZE(pxa3xx_resources_nand),
+        .resource       = pxa3xx_resources_nand,
+};
+
+void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
+{
+        pxa_register_device(&pxa3xx_device_nand, info);
+}
 #endif /* CONFIG_PXA3xx */
+
+/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
+ * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
+void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
+{
+        struct platform_device *pd;
+
+        pd = platform_device_alloc("pxa2xx-spi", id);
+        if (pd == NULL) {
+                printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
+                       id);
+                return;
+        }
+
+        pd->dev.platform_data = info;
+        platform_device_add(pd);
+}
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index fcab017f27ee..887c738f5911 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -1,7 +1,8 @@
 extern struct platform_device pxa_device_mci;
 extern struct platform_device pxa3xx_device_mci2;
 extern struct platform_device pxa3xx_device_mci3;
-extern struct platform_device pxa_device_udc;
+extern struct platform_device pxa25x_device_udc;
+extern struct platform_device pxa27x_device_udc;
 extern struct platform_device pxa_device_fb;
 extern struct platform_device pxa_device_ffuart;
 extern struct platform_device pxa_device_btuart;
@@ -11,6 +12,7 @@ extern struct platform_device pxa_device_i2c;
 extern struct platform_device pxa_device_i2s;
 extern struct platform_device pxa_device_ficp;
 extern struct platform_device pxa_device_rtc;
+extern struct platform_device pxa_device_ac97;
 
 extern struct platform_device pxa27x_device_i2c_power;
 extern struct platform_device pxa27x_device_ohci;
@@ -24,4 +26,11 @@ extern struct platform_device pxa27x_device_ssp2;
 extern struct platform_device pxa27x_device_ssp3;
 extern struct platform_device pxa3xx_device_ssp4;
 
+extern struct platform_device pxa25x_device_pwm0;
+extern struct platform_device pxa25x_device_pwm1;
+extern struct platform_device pxa27x_device_pwm0;
+extern struct platform_device pxa27x_device_pwm1;
+
+extern struct platform_device pxa3xx_device_nand;
+
 void __init pxa_register_device(struct platform_device *dev, void *data);
diff --git a/arch/arm/mach-pxa/e400_lcd.c b/arch/arm/mach-pxa/e400_lcd.c
new file mode 100644
index 000000000000..16c023630626
--- /dev/null
+++ b/arch/arm/mach-pxa/e400_lcd.c
@@ -0,0 +1,56 @@
+/*
+ * e400_lcd.c
+ *
+ * (c) 2005 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+
+#include <asm/mach-types.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxafb.h>
+
+static struct pxafb_mode_info e400_pxafb_mode_info = {
+        .pixclock       = 140703,
+        .xres           = 240,
+        .yres           = 320,
+        .bpp            = 16,
+        .hsync_len      = 4,
+        .left_margin    = 28,
+        .right_margin   = 8,
+        .vsync_len      = 3,
+        .upper_margin   = 5,
+        .lower_margin   = 6,
+        .sync           = 0,
+};
+
+static struct pxafb_mach_info e400_pxafb_mach_info = {
+        .modes          = &e400_pxafb_mode_info,
+        .num_modes      = 1,
+        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
+        .lccr3          = 0,
+        .pxafb_backlight_power  = NULL,
+};
+
+static int __init e400_lcd_init(void)
+{
+        if (!machine_is_e400())
+                return -ENODEV;
+
+        set_pxa_fb_info(&e400_pxafb_mach_info);
+        return 0;
+}
+
+module_init(e400_lcd_init);
+
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("e400 lcd driver");
+MODULE_LICENSE("GPLv2");
+
diff --git a/arch/arm/mach-pxa/e740_lcd.c b/arch/arm/mach-pxa/e740_lcd.c
new file mode 100644
index 000000000000..26bd599af178
--- /dev/null
+++ b/arch/arm/mach-pxa/e740_lcd.c
@@ -0,0 +1,123 @@
+/* e740_lcd.c
+ *
+ * This file contains the definitions for the LCD timings and functions
+ * to control the LCD power / frontlighting via the w100fb driver.
+ *
+ * (c) 2005 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/fb.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+
+#include <video/w100fb.h>
+
+/*
+**potential** shutdown routine - to be investigated
+devmem2 0x0c010528 w 0xff3fff00
+devmem2 0x0c010190 w 0x7FFF8000
+devmem2 0x0c0101b0 w 0x00FF0000
+devmem2 0x0c01008c w 0x00000000
+devmem2 0x0c010080 w 0x000000bf
+devmem2 0x0c010098 w 0x00000015
+devmem2 0x0c010088 w 0x4b000204
+devmem2 0x0c010098 w 0x0000001d
+*/
+
+static struct w100_gen_regs e740_lcd_regs = {
+        .lcd_format =            0x00008023,
+        .lcdd_cntl1 =            0x0f000000,
+        .lcdd_cntl2 =            0x0003ffff,
+        .genlcd_cntl1 =          0x00ffff03,
+        .genlcd_cntl2 =          0x003c0f03,
+        .genlcd_cntl3 =          0x000143aa,
+};
+
+static struct w100_mode e740_lcd_mode = {
+        .xres            = 240,
+        .yres            = 320,
+        .left_margin     = 20,
+        .right_margin    = 28,
+        .upper_margin    = 9,
+        .lower_margin    = 8,
+        .crtc_ss         = 0x80140013,
+        .crtc_ls         = 0x81150110,
+        .crtc_gs         = 0x80050005,
+        .crtc_vpos_gs    = 0x000a0009,
+        .crtc_rev        = 0x0040010a,
+        .crtc_dclk       = 0xa906000a,
+        .crtc_gclk       = 0x80050108,
+        .crtc_goe        = 0x80050108,
+        .pll_freq        = 57,
+        .pixclk_divider         = 4,
+        .pixclk_divider_rotated = 4,
+        .pixclk_src     = CLK_SRC_XTAL,
+        .sysclk_divider  = 1,
+        .sysclk_src     = CLK_SRC_PLL,
+        .crtc_ps1_active =       0x41060010,
+};
+
+
+static struct w100_gpio_regs e740_w100_gpio_info = {
+        .init_data1 = 0x21002103,
+        .gpio_dir1  = 0xffffdeff,
+        .gpio_oe1   = 0x03c00643,
+        .init_data2 = 0x003f003f,
+        .gpio_dir2  = 0xffffffff,
+        .gpio_oe2   = 0x000000ff,
+};
+
+static struct w100fb_mach_info e740_fb_info = {
+        .modelist   = &e740_lcd_mode,
+        .num_modes  = 1,
+        .regs       = &e740_lcd_regs,
+        .gpio       = &e740_w100_gpio_info,
+        .xtal_freq = 14318000,
+        .xtal_dbl   = 1,
+};
+
+static struct resource e740_fb_resources[] = {
+        [0] = {
+                .start          = 0x0c000000,
+                .end            = 0x0cffffff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+/* ----------------------- device declarations -------------------------- */
+
+
+static struct platform_device e740_fb_device = {
+        .name           = "w100fb",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &e740_fb_info,
+        },
+        .num_resources  = ARRAY_SIZE(e740_fb_resources),
+        .resource       = e740_fb_resources,
+};
+
+static int e740_lcd_init(void)
+{
+        int ret;
+
+        if (!machine_is_e740())
+                return -ENODEV;
+
+        return platform_device_register(&e740_fb_device);
+}
+
+module_init(e740_lcd_init);
+
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("e740 lcd driver");
+MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/e750_lcd.c b/arch/arm/mach-pxa/e750_lcd.c
new file mode 100644
index 000000000000..75edc3b5390f
--- /dev/null
+++ b/arch/arm/mach-pxa/e750_lcd.c
@@ -0,0 +1,109 @@
+/* e750_lcd.c
+ *
+ * This file contains the definitions for the LCD timings and functions
+ * to control the LCD power / frontlighting via the w100fb driver.
+ *
+ * (c) 2005 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/fb.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+
+#include <video/w100fb.h>
+
+static struct w100_gen_regs e750_lcd_regs = {
+        .lcd_format =            0x00008003,
+        .lcdd_cntl1 =            0x00000000,
+        .lcdd_cntl2 =            0x0003ffff,
+        .genlcd_cntl1 =          0x00fff003,
+        .genlcd_cntl2 =          0x003c0f03,
+        .genlcd_cntl3 =          0x000143aa,
+};
+
+static struct w100_mode e750_lcd_mode = {
+        .xres            = 240,
+        .yres            = 320,
+        .left_margin     = 21,
+        .right_margin    = 22,
+        .upper_margin    = 5,
+        .lower_margin    = 4,
+        .crtc_ss         = 0x80150014,
+        .crtc_ls         = 0x8014000d,
+        .crtc_gs         = 0xc1000005,
+        .crtc_vpos_gs    = 0x00020147,
+        .crtc_rev        = 0x0040010a,
+        .crtc_dclk       = 0xa1700030,
+        .crtc_gclk       = 0x80cc0015,
+        .crtc_goe        = 0x80cc0015,
+        .crtc_ps1_active = 0x61060017,
+        .pll_freq        = 57,
+        .pixclk_divider         = 4,
+        .pixclk_divider_rotated = 4,
+        .pixclk_src     = CLK_SRC_XTAL,
+        .sysclk_divider  = 1,
+        .sysclk_src     = CLK_SRC_PLL,
+};
+
+
+static struct w100_gpio_regs e750_w100_gpio_info = {
+        .init_data1 = 0x01192f1b,
+        .gpio_dir1  = 0xd5ffdeff,
+        .gpio_oe1   = 0x000020bf,
+        .init_data2 = 0x010f010f,
+        .gpio_dir2  = 0xffffffff,
+        .gpio_oe2   = 0x000001cf,
+};
+
+static struct w100fb_mach_info e750_fb_info = {
+        .modelist   = &e750_lcd_mode,
+        .num_modes  = 1,
+        .regs       = &e750_lcd_regs,
+        .gpio       = &e750_w100_gpio_info,
+        .xtal_freq  = 14318000,
+        .xtal_dbl   = 1,
+};
+
+static struct resource e750_fb_resources[] = {
+        [0] = {
+                .start          = 0x0c000000,
+                .end            = 0x0cffffff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+/* ----------------------- device declarations -------------------------- */
+
+
+static struct platform_device e750_fb_device = {
+        .name           = "w100fb",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &e750_fb_info,
+        },
+        .num_resources  = ARRAY_SIZE(e750_fb_resources),
+        .resource       = e750_fb_resources,
+};
+
+static int e750_lcd_init(void)
+{
+        if (!machine_is_e750())
+                return -ENODEV;
+
+        return platform_device_register(&e750_fb_device);
+}
+
+module_init(e750_lcd_init);
+
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("e750 lcd driver");
+MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/e800_lcd.c b/arch/arm/mach-pxa/e800_lcd.c
new file mode 100644
index 000000000000..e6aeab0ebc22
--- /dev/null
+++ b/arch/arm/mach-pxa/e800_lcd.c
@@ -0,0 +1,159 @@
+/* e800_lcd.c
+ *
+ * This file contains the definitions for the LCD timings and functions
+ * to control the LCD power / frontlighting via the w100fb driver.
+ *
+ * (c) 2005 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/fb.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+
+#include <video/w100fb.h>
+
+static struct w100_gen_regs e800_lcd_regs = {
+        .lcd_format =            0x00008003,
+        .lcdd_cntl1 =            0x02a00000,
+        .lcdd_cntl2 =            0x0003ffff,
+        .genlcd_cntl1 =          0x000ff2a3,
+        .genlcd_cntl2 =          0x000002a3,
+        .genlcd_cntl3 =          0x000102aa,
+};
+
+static struct w100_mode e800_lcd_mode[2] = {
+        [0] = {
+                .xres            = 480,
+                .yres            = 640,
+                .left_margin     = 52,
+                .right_margin    = 148,
+                .upper_margin    = 2,
+                .lower_margin    = 6,
+                .crtc_ss         = 0x80350034,
+                .crtc_ls         = 0x802b0026,
+                .crtc_gs         = 0x80160016,
+                .crtc_vpos_gs    = 0x00020003,
+                .crtc_rev        = 0x0040001d,
+                .crtc_dclk       = 0xe0000000,
+                .crtc_gclk       = 0x82a50049,
+                .crtc_goe        = 0x80ee001c,
+                .crtc_ps1_active = 0x00000000,
+                .pll_freq        = 128,
+                .pixclk_divider         = 4,
+                .pixclk_divider_rotated = 6,
+                .pixclk_src     = CLK_SRC_PLL,
+                .sysclk_divider  = 0,
+                .sysclk_src     = CLK_SRC_PLL,
+        },
+        [1] = {
+                .xres            = 240,
+                .yres            = 320,
+                .left_margin     = 15,
+                .right_margin    = 88,
+                .upper_margin    = 0,
+                .lower_margin    = 7,
+                .crtc_ss         = 0xd010000f,
+                .crtc_ls         = 0x80070003,
+                .crtc_gs         = 0x80000000,
+                .crtc_vpos_gs    = 0x01460147,
+                .crtc_rev        = 0x00400003,
+                .crtc_dclk       = 0xa1700030,
+                .crtc_gclk       = 0x814b0008,
+                .crtc_goe        = 0x80cc0015,
+                .crtc_ps1_active = 0x00000000,
+                .pll_freq        = 100,
+                .pixclk_divider         = 6, /* Wince uses 14 which gives a 7MHz pclk. */
+                .pixclk_divider_rotated = 6, /* we want a 14MHz one (much nicer to look at) */
+                .pixclk_src     = CLK_SRC_PLL,
+                .sysclk_divider  = 0,
+                .sysclk_src     = CLK_SRC_PLL,
+        }
+};
+
+
+static struct w100_gpio_regs e800_w100_gpio_info = {
+        .init_data1 = 0xc13fc019,
+        .gpio_dir1  = 0x3e40df7f,
+        .gpio_oe1   = 0x003c3000,
+        .init_data2 = 0x00000000,
+        .gpio_dir2  = 0x00000000,
+        .gpio_oe2   = 0x00000000,
+};
+
+static struct w100_mem_info e800_w100_mem_info = {
+        .ext_cntl        = 0x09640011,
+        .sdram_mode_reg  = 0x00600021,
+        .ext_timing_cntl = 0x10001545,
+        .io_cntl         = 0x7ddd7333,
+        .size            = 0x1fffff,
+};
+
+static void e800_tg_change(struct w100fb_par *par)
+{
+        unsigned long tmp;
+
+        tmp = w100fb_gpio_read(W100_GPIO_PORT_A);
+        if (par->mode->xres == 480)
+                tmp |= 0x100;
+        else
+                tmp &= ~0x100;
+        w100fb_gpio_write(W100_GPIO_PORT_A, tmp);
+}
+
+static struct w100_tg_info e800_tg_info = {
+        .change = e800_tg_change,
+};
+
+static struct w100fb_mach_info e800_fb_info = {
+        .modelist   = e800_lcd_mode,
+        .num_modes  = 2,
+        .regs       = &e800_lcd_regs,
+        .gpio       = &e800_w100_gpio_info,
+        .mem        = &e800_w100_mem_info,
+        .tg         = &e800_tg_info,
+        .xtal_freq  = 16000000,
+};
+
+static struct resource e800_fb_resources[] = {
+        [0] = {
+                .start          = 0x0c000000,
+                .end            = 0x0cffffff,
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+/* ----------------------- device declarations -------------------------- */
+
+
+static struct platform_device e800_fb_device = {
+        .name           = "w100fb",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &e800_fb_info,
+        },
+        .num_resources  = ARRAY_SIZE(e800_fb_resources),
+        .resource       = e800_fb_resources,
+};
+
+static int e800_lcd_init(void)
+{
+        if (!machine_is_e800())
+                return -ENODEV;
+
+        return platform_device_register(&e800_fb_device);
+}
+
+module_init(e800_lcd_init);
+
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("e800 lcd driver");
+MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 9c57700ee5c2..e5cc6ca63c75 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -1,7 +1,7 @@
 /*
- * Support for CompuLab EM-x270 platform
+ * Support for CompuLab EM-X270 platform
  *
- * Copyright (C) 2007 CompuLab, Ltd.
+ * Copyright (C) 2007, 2008 CompuLab, Ltd.
  * Author: Mike Rapoport <mike@compulab.co.il>
  *
  * This program is free software; you can redistribute it and/or modify
@@ -14,29 +14,159 @@
 
 #include <linux/dm9000.h>
 #include <linux/rtc-v3020.h>
-
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#include <linux/gpio.h>
 
 #include <asm/mach-types.h>
-
 #include <asm/mach/arch.h>
 
+#include <asm/arch/mfp-pxa27x.h>
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
+#include <asm/arch/pxa27x-udc.h>
+#include <asm/arch/audio.h>
 #include <asm/arch/pxafb.h>
 #include <asm/arch/ohci.h>
 #include <asm/arch/mmc.h>
-#include <asm/arch/bitfield.h>
+#include <asm/arch/pxa27x_keypad.h>
 
 #include "generic.h"
 
 /* GPIO IRQ usage */
-#define EM_X270_MMC_PD          (105)
-#define EM_X270_ETHIRQ          IRQ_GPIO(41)
-#define EM_X270_MMC_IRQ         IRQ_GPIO(13)
+#define GPIO41_ETHIRQ           (41)
+#define GPIO13_MMC_CD           (13)
+#define EM_X270_ETHIRQ          IRQ_GPIO(GPIO41_ETHIRQ)
+#define EM_X270_MMC_CD          IRQ_GPIO(GPIO13_MMC_CD)
+
+/* NAND control GPIOs */
+#define GPIO11_NAND_CS  (11)
+#define GPIO56_NAND_RB  (56)
+
+static unsigned long em_x270_pin_config[] = {
+        /* AC'97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+        GPIO98_AC97_SYSCLK,
+        GPIO113_AC97_nRESET,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+
+        /* STUART */
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+
+        /* MCI controller */
+        GPIO32_MMC_CLK,
+        GPIO112_MMC_CMD,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+
+        /* LCD */
+        GPIO58_LCD_LDD_0,
+        GPIO59_LCD_LDD_1,
+        GPIO60_LCD_LDD_2,
+        GPIO61_LCD_LDD_3,
+        GPIO62_LCD_LDD_4,
+        GPIO63_LCD_LDD_5,
+        GPIO64_LCD_LDD_6,
+        GPIO65_LCD_LDD_7,
+        GPIO66_LCD_LDD_8,
+        GPIO67_LCD_LDD_9,
+        GPIO68_LCD_LDD_10,
+        GPIO69_LCD_LDD_11,
+        GPIO70_LCD_LDD_12,
+        GPIO71_LCD_LDD_13,
+        GPIO72_LCD_LDD_14,
+        GPIO73_LCD_LDD_15,
+        GPIO74_LCD_FCLK,
+        GPIO75_LCD_LCLK,
+        GPIO76_LCD_PCLK,
+        GPIO77_LCD_BIAS,
+
+        /* QCI */
+        GPIO84_CIF_FV,
+        GPIO25_CIF_LV,
+        GPIO53_CIF_MCLK,
+        GPIO54_CIF_PCLK,
+        GPIO81_CIF_DD_0,
+        GPIO55_CIF_DD_1,
+        GPIO51_CIF_DD_2,
+        GPIO50_CIF_DD_3,
+        GPIO52_CIF_DD_4,
+        GPIO48_CIF_DD_5,
+        GPIO17_CIF_DD_6,
+        GPIO12_CIF_DD_7,
+
+        /* I2C */
+        GPIO117_I2C_SCL,
+        GPIO118_I2C_SDA,
+
+        /* Keypad */
+        GPIO100_KP_MKIN_0       | WAKEUP_ON_LEVEL_HIGH,
+        GPIO101_KP_MKIN_1       | WAKEUP_ON_LEVEL_HIGH,
+        GPIO102_KP_MKIN_2       | WAKEUP_ON_LEVEL_HIGH,
+        GPIO34_KP_MKIN_3        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO39_KP_MKIN_4        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO99_KP_MKIN_5        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO91_KP_MKIN_6        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO36_KP_MKIN_7        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO103_KP_MKOUT_0,
+        GPIO104_KP_MKOUT_1,
+        GPIO105_KP_MKOUT_2,
+        GPIO106_KP_MKOUT_3,
+        GPIO107_KP_MKOUT_4,
+        GPIO108_KP_MKOUT_5,
+        GPIO96_KP_MKOUT_6,
+        GPIO22_KP_MKOUT_7,
+
+        /* SSP1 */
+        GPIO26_SSP1_RXD,
+        GPIO23_SSP1_SCLK,
+        GPIO24_SSP1_SFRM,
+        GPIO57_SSP1_TXD,
+
+        /* SSP2 */
+        GPIO19_SSP2_SCLK,
+        GPIO14_SSP2_SFRM,
+        GPIO89_SSP2_TXD,
+        GPIO88_SSP2_RXD,
+
+        /* SDRAM and local bus */
+        GPIO15_nCS_1,
+        GPIO78_nCS_2,
+        GPIO79_nCS_3,
+        GPIO80_nCS_4,
+        GPIO49_nPWE,
+        GPIO18_RDY,
+
+        /* GPIO */
+        GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
+
+        /* power controls */
+        GPIO20_GPIO     | MFP_LPM_DRIVE_LOW,    /* GPRS_PWEN */
+        GPIO115_GPIO    | MFP_LPM_DRIVE_LOW,    /* WLAN_PWEN */
+
+        /* NAND controls */
+        GPIO11_GPIO     | MFP_LPM_DRIVE_HIGH,   /* NAND CE# */
+        GPIO56_GPIO,                            /* NAND Ready/Busy */
+
+        /* interrupts */
+        GPIO13_GPIO,    /* MMC card detect */
+        GPIO41_GPIO,    /* DM9000 interrupt */
+};
 
-static struct resource em_x270_dm9k_resource[] = {
+#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
+static struct resource em_x270_dm9000_resource[] = {
         [0] = {
                 .start = PXA_CS2_PHYS,
                 .end   = PXA_CS2_PHYS + 3,
@@ -54,38 +184,30 @@ static struct resource em_x270_dm9k_resource[] = {
         }
 };
 
-/* for the moment we limit ourselves to 32bit IO until some
- * better IO routines can be written and tested
- */
-static struct dm9000_plat_data em_x270_dm9k_platdata = {
+static struct dm9000_plat_data em_x270_dm9000_platdata = {
         .flags          = DM9000_PLATF_32BITONLY,
 };
 
-/* Ethernet device */
-static struct platform_device em_x270_dm9k = {
+static struct platform_device em_x270_dm9000 = {
         .name           = "dm9000",
         .id             = 0,
-        .num_resources  = ARRAY_SIZE(em_x270_dm9k_resource),
-        .resource       = em_x270_dm9k_resource,
+        .num_resources  = ARRAY_SIZE(em_x270_dm9000_resource),
+        .resource       = em_x270_dm9000_resource,
         .dev            = {
-                .platform_data = &em_x270_dm9k_platdata,
+                .platform_data = &em_x270_dm9000_platdata,
         }
 };
 
-/* audio device */
-static struct platform_device em_x270_audio = {
-        .name           = "pxa2xx-ac97",
-        .id             = -1,
-};
-
-/* WM9712 touchscreen controller. Hopefully the driver will make it to
- * the mainstream sometime */
-static struct platform_device em_x270_ts = {
-        .name           = "wm97xx-ts",
-        .id             = -1,
-};
+static void __init em_x270_init_dm9000(void)
+{
+        platform_device_register(&em_x270_dm9000);
+}
+#else
+static inline void em_x270_init_dm9000(void) {}
+#endif
 
-/* RTC */
+/* V3020 RTC */
+#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
 static struct resource em_x270_v3020_resource[] = {
         [0] = {
                 .start = PXA_CS4_PHYS,
@@ -108,20 +230,26 @@ static struct platform_device em_x270_rtc = {
         }
 };
 
-/* NAND flash */
-#define GPIO_NAND_CS    (11)
-#define GPIO_NAND_RB    (56)
+static void __init em_x270_init_rtc(void)
+{
+        platform_device_register(&em_x270_rtc);
+}
+#else
+static inline void em_x270_init_rtc(void) {}
+#endif
 
+/* NAND flash */
+#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
 static inline void nand_cs_on(void)
 {
-        GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
+        gpio_set_value(GPIO11_NAND_CS, 0);
 }
 
 static void nand_cs_off(void)
 {
         dsb();
 
-        GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
+        gpio_set_value(GPIO11_NAND_CS, 1);
 }
 
 /* hardware specific access to control-lines */
@@ -161,7 +289,7 @@ static int em_x270_nand_device_ready(struct mtd_info *mtd)
 {
         dsb();
 
-        return GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB);
+        return gpio_get_value(GPIO56_NAND_RB);
 }
 
 static struct mtd_partition em_x270_partition_info[] = {
@@ -214,17 +342,35 @@ static struct platform_device em_x270_nand = {
         }
 };
 
-/* platform devices */
-static struct platform_device *platform_devices[] __initdata = {
-        &em_x270_dm9k,
-        &em_x270_audio,
-        &em_x270_ts,
-        &em_x270_rtc,
-        &em_x270_nand,
-};
+static void __init em_x270_init_nand(void)
+{
+        int err;
+
+        err = gpio_request(GPIO11_NAND_CS, "NAND CS");
+        if (err) {
+                pr_warning("EM-X270: failed to request NAND CS gpio\n");
+                return;
+        }
+
+        gpio_direction_output(GPIO11_NAND_CS, 1);
+
+        err = gpio_request(GPIO56_NAND_RB, "NAND R/B");
+        if (err) {
+                pr_warning("EM-X270: failed to request NAND R/B gpio\n");
+                gpio_free(GPIO11_NAND_CS);
+                return;
+        }
+
+        gpio_direction_input(GPIO56_NAND_RB);
 
+        platform_device_register(&em_x270_nand);
+}
+#else
+static inline void em_x270_init_nand(void) {}
+#endif
 
 /* PXA27x OHCI controller setup */
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 static int em_x270_ohci_init(struct device *dev)
 {
         /* Set the Power Control Polarity Low */
@@ -242,27 +388,23 @@ static struct pxaohci_platform_data em_x270_ohci_platform_data = {
         .init           = em_x270_ohci_init,
 };
 
+static void __init em_x270_init_ohci(void)
+{
+        pxa_set_ohci_info(&em_x270_ohci_platform_data);
+}
+#else
+static inline void em_x270_init_ohci(void) {}
+#endif
 
+/* MCI controller setup */
+#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
 static int em_x270_mci_init(struct device *dev,
                             irq_handler_t em_x270_detect_int,
                             void *data)
 {
-        int err;
-
-        /* setup GPIO for PXA27x MMC controller */
-        pxa_gpio_mode(GPIO32_MMCCLK_MD);
-        pxa_gpio_mode(GPIO112_MMCCMD_MD);
-        pxa_gpio_mode(GPIO92_MMCDAT0_MD);
-        pxa_gpio_mode(GPIO109_MMCDAT1_MD);
-        pxa_gpio_mode(GPIO110_MMCDAT2_MD);
-        pxa_gpio_mode(GPIO111_MMCDAT3_MD);
-
-        /* EM-X270 uses GPIO13 as SD power enable */
-        pxa_gpio_mode(EM_X270_MMC_PD | GPIO_OUT);
-
-        err = request_irq(EM_X270_MMC_IRQ, em_x270_detect_int,
-                          IRQF_DISABLED | IRQF_TRIGGER_FALLING,
-                          "MMC card detect", data);
+        int err = request_irq(EM_X270_MMC_CD, em_x270_detect_int,
+                              IRQF_DISABLED | IRQF_TRIGGER_FALLING,
+                              "MMC card detect", data);
         if (err) {
                 printk(KERN_ERR "%s: can't request MMC card detect IRQ: %d\n",
                        __func__, err);
@@ -284,7 +426,8 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
 
 static void em_x270_mci_exit(struct device *dev, void *data)
 {
-        free_irq(EM_X270_MMC_IRQ, data);
+        int irq = gpio_to_irq(GPIO13_MMC_CD);
+        free_irq(irq, data);
 }
 
 static struct pxamci_platform_data em_x270_mci_platform_data = {
@@ -294,7 +437,16 @@ static struct pxamci_platform_data em_x270_mci_platform_data = {
         .exit           = em_x270_mci_exit,
 };
 
+static void __init em_x270_init_mmc(void)
+{
+        pxa_set_mci_info(&em_x270_mci_platform_data);
+}
+#else
+static inline void em_x270_init_mmc(void) {}
+#endif
+
 /* LCD 480x640 */
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 static struct pxafb_mode_info em_x270_lcd_mode = {
         .pixclock       = 50000,
         .bpp            = 16,
@@ -312,39 +464,96 @@ static struct pxafb_mode_info em_x270_lcd_mode = {
 static struct pxafb_mach_info em_x270_lcd = {
         .modes          = &em_x270_lcd_mode,
         .num_modes      = 1,
-        .cmap_inverse   = 0,
-        .cmap_static    = 0,
-        .lccr0          = LCCR0_PAS,
-        .lccr3          = LCCR3_PixClkDiv(0x01) | LCCR3_Acb(0xff),
+        .lcd_conn       = LCD_COLOR_TFT_16BPP,
 };
-
-static void __init em_x270_init(void)
+static void __init em_x270_init_lcd(void)
 {
-        /* setup LCD */
         set_pxa_fb_info(&em_x270_lcd);
+}
+#else
+static inline void em_x270_init_lcd(void) {}
+#endif
+
+#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
+static void __init em_x270_init_ac97(void)
+{
+        pxa_set_ac97_info(NULL);
+}
+#else
+static inline void em_x270_init_ac97(void) {}
+#endif
+
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
+static unsigned int em_x270_matrix_keys[] = {
+        KEY(0, 0, KEY_A), KEY(1, 0, KEY_UP), KEY(2, 1, KEY_B),
+        KEY(0, 2, KEY_LEFT), KEY(1, 1, KEY_ENTER), KEY(2, 0, KEY_RIGHT),
+        KEY(0, 1, KEY_C), KEY(1, 2, KEY_DOWN), KEY(2, 2, KEY_D),
+};
 
-        /* register EM-X270 platform devices */
-        platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+struct pxa27x_keypad_platform_data em_x270_keypad_info = {
+        /* code map for the matrix keys */
+        .matrix_key_rows        = 3,
+        .matrix_key_cols        = 3,
+        .matrix_key_map         = em_x270_matrix_keys,
+        .matrix_key_map_size    = ARRAY_SIZE(em_x270_matrix_keys),
+};
 
-        /* set MCI and OHCI platform parameters */
-        pxa_set_mci_info(&em_x270_mci_platform_data);
-        pxa_set_ohci_info(&em_x270_ohci_platform_data);
+static void __init em_x270_init_keypad(void)
+{
+        pxa_set_keypad_info(&em_x270_keypad_info);
+}
+#else
+static inline void em_x270_init_keypad(void) {}
+#endif
+
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button gpio_keys_button[] = {
+        [0] = {
+                .desc   = "sleep/wakeup",
+                .code   = KEY_SUSPEND,
+                .type   = EV_PWR,
+                .gpio   = 1,
+                .wakeup = 1,
+        },
+};
+
+static struct gpio_keys_platform_data em_x270_gpio_keys_data = {
+        .buttons        = gpio_keys_button,
+        .nbuttons       = 1,
+};
 
-        /* setup STUART GPIOs */
-        pxa_gpio_mode(GPIO46_STRXD_MD);
-        pxa_gpio_mode(GPIO47_STTXD_MD);
+static struct platform_device em_x270_gpio_keys = {
+        .name           = "gpio-keys",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &em_x270_gpio_keys_data,
+        },
+};
 
-        /* setup BTUART GPIOs */
-        pxa_gpio_mode(GPIO42_BTRXD_MD);
-        pxa_gpio_mode(GPIO43_BTTXD_MD);
-        pxa_gpio_mode(GPIO44_BTCTS_MD);
-        pxa_gpio_mode(GPIO45_BTRTS_MD);
+static void __init em_x270_init_gpio_keys(void)
+{
+        platform_device_register(&em_x270_gpio_keys);
+}
+#else
+static inline void em_x270_init_gpio_keys(void) {}
+#endif
 
-        /* Setup interrupt for dm9000 */
-        set_irq_type(EM_X270_ETHIRQ, IRQT_RISING);
+static void __init em_x270_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_pin_config));
+
+        em_x270_init_dm9000();
+        em_x270_init_rtc();
+        em_x270_init_nand();
+        em_x270_init_lcd();
+        em_x270_init_mmc();
+        em_x270_init_ohci();
+        em_x270_init_keypad();
+        em_x270_init_gpio_keys();
+        em_x270_init_ac97();
 }
 
-MACHINE_START(EM_X270, "Compulab EM-x270")
+MACHINE_START(EM_X270, "Compulab EM-X270")
         .boot_params    = 0xa0000100,
         .phys_io        = 0x40000000,
         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index ee0ae93c876a..c29b7b21c11b 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -17,7 +17,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/mach-types.h>
 
-#include <generic.h>
+#include "generic.h"
 
 /* Only e800 has 128MB RAM */
 static void __init eseries_fixup(struct machine_desc *desc,
@@ -47,6 +47,19 @@ MACHINE_START(E330, "Toshiba e330")
 MACHINE_END
 #endif
 
+#ifdef CONFIG_MACH_E350
+MACHINE_START(E350, "Toshiba e350")
+        /* Maintainer: Ian Molton (spyro@f2s.com) */
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa25x_init_irq,
+        .fixup          = eseries_fixup,
+        .timer = &pxa_timer,
+MACHINE_END
+#endif
+
 #ifdef CONFIG_MACH_E740
 MACHINE_START(E740, "Toshiba e740")
         /* Maintainer: Ian Molton (spyro@f2s.com) */
diff --git a/arch/arm/mach-pxa/eseries_udc.c b/arch/arm/mach-pxa/eseries_udc.c
new file mode 100644
index 000000000000..362847a10998
--- /dev/null
+++ b/arch/arm/mach-pxa/eseries_udc.c
@@ -0,0 +1,57 @@
+/*
+ * UDC functions for the Toshiba e-series PDAs
+ *
+ * Copyright (c) Ian Molton 2003
+ *
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+
+#include <asm/arch/udc.h>
+#include <asm/arch/eseries-gpio.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+#include <asm/mach/map.h>
+#include <asm/domain.h>
+
+/* local PXA generic code */
+#include "generic.h"
+
+static struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
+        .gpio_vbus   = GPIO_E7XX_USB_DISC,
+        .gpio_pullup = GPIO_E7XX_USB_PULLUP,
+        .gpio_pullup_inverted = 1
+};
+
+static struct pxa2xx_udc_mach_info e800_udc_mach_info = {
+        .gpio_vbus   = GPIO_E800_USB_DISC,
+        .gpio_pullup = GPIO_E800_USB_PULLUP,
+        .gpio_pullup_inverted = 1
+};
+
+static int __init eseries_udc_init(void)
+{
+        if (machine_is_e330() || machine_is_e350() ||
+            machine_is_e740() || machine_is_e750() ||
+            machine_is_e400())
+                pxa_set_udc_info(&e7xx_udc_mach_info);
+        else if (machine_is_e800())
+                pxa_set_udc_info(&e800_udc_mach_info);
+
+        return 0;
+}
+
+module_init(eseries_udc_init);
+
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("eseries UDC support");
+MODULE_LICENSE("GPLv2");
diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c
new file mode 100644
index 000000000000..0143eed65398
--- /dev/null
+++ b/arch/arm/mach-pxa/ezx.c
@@ -0,0 +1,220 @@
+/*
+ *  ezx.c - Common code for the EZX platform.
+ *
+ *  Copyright (C) 2005-2006 Harald Welte <laforge@openezx.org>,
+ *                2007-2008 Daniel Ribeiro <drwyrm@gmail.com>,
+ *                2007-2008 Stefan Schmidt <stefan@datenfreihafen.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/pwm_backlight.h>
+
+#include <asm/setup.h>
+#include <asm/arch/pxafb.h>
+#include <asm/arch/ohci.h>
+#include <asm/arch/i2c.h>
+
+#include <asm/arch/mfp-pxa27x.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include "devices.h"
+#include "generic.h"
+
+static struct platform_pwm_backlight_data ezx_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 1023,
+        .dft_brightness = 1023,
+        .pwm_period_ns  = 78770,
+};
+
+static struct platform_device ezx_backlight_device = {
+        .name           = "pwm-backlight",
+        .dev            = {
+                .parent = &pxa27x_device_pwm0.dev,
+                .platform_data = &ezx_backlight_data,
+        },
+};
+
+static struct pxafb_mode_info mode_ezx_old = {
+        .pixclock               = 150000,
+        .xres                   = 240,
+        .yres                   = 320,
+        .bpp                    = 16,
+        .hsync_len              = 10,
+        .left_margin            = 20,
+        .right_margin           = 10,
+        .vsync_len              = 2,
+        .upper_margin           = 3,
+        .lower_margin           = 2,
+        .sync                   = 0,
+};
+
+static struct pxafb_mach_info ezx_fb_info_1 = {
+        .modes          = &mode_ezx_old,
+        .num_modes      = 1,
+        .lcd_conn       = LCD_COLOR_TFT_16BPP,
+};
+
+static struct pxafb_mode_info mode_72r89803y01 = {
+        .pixclock               = 192308,
+        .xres                   = 240,
+        .yres                   = 320,
+        .bpp                    = 32,
+        .depth                  = 18,
+        .hsync_len              = 10,
+        .left_margin            = 20,
+        .right_margin           = 10,
+        .vsync_len              = 2,
+        .upper_margin           = 3,
+        .lower_margin           = 2,
+        .sync                   = 0,
+};
+
+static struct pxafb_mach_info ezx_fb_info_2 = {
+        .modes          = &mode_72r89803y01,
+        .num_modes      = 1,
+        .lcd_conn       = LCD_COLOR_TFT_18BPP,
+};
+
+static struct platform_device *devices[] __initdata = {
+        &ezx_backlight_device,
+};
+
+static unsigned long ezx_pin_config[] __initdata = {
+        /* PWM backlight */
+        GPIO16_PWM0_OUT,
+
+        /* BTUART */
+        GPIO42_BTUART_RXD,
+        GPIO43_BTUART_TXD,
+        GPIO44_BTUART_CTS,
+        GPIO45_BTUART_RTS,
+
+        /* STUART */
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+
+        /* For A780 support (connected with Neptune GSM chip) */
+        GPIO30_USB_P3_2,        /* ICL_TXENB */
+        GPIO31_USB_P3_6,        /* ICL_VPOUT */
+        GPIO90_USB_P3_5,        /* ICL_VPIN */
+        GPIO91_USB_P3_1,        /* ICL_XRXD */
+        GPIO56_USB_P3_4,        /* ICL_VMOUT */
+        GPIO113_USB_P3_3,       /* /ICL_VMIN */
+};
+
+static void __init ezx_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(ezx_pin_config));
+        pxa_set_i2c_info(NULL);
+        if (machine_is_ezx_a780() || machine_is_ezx_e680())
+                set_pxa_fb_info(&ezx_fb_info_1);
+        else
+                set_pxa_fb_info(&ezx_fb_info_2);
+
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+static void __init ezx_fixup(struct machine_desc *desc, struct tag *tags,
+                char **cmdline, struct meminfo *mi)
+{
+        /* We have two ram chips. First one with 32MB at 0xA0000000 and a second
+         * 16MB one at 0xAC000000
+         */
+        mi->nr_banks = 2;
+        mi->bank[0].start = 0xa0000000;
+        mi->bank[0].node = 0;
+        mi->bank[0].size = (32*1024*1024);
+        mi->bank[1].start = 0xac000000;
+        mi->bank[1].node = 1;
+        mi->bank[1].size = (16*1024*1024);
+}
+
+#ifdef CONFIG_MACH_EZX_A780
+MACHINE_START(EZX_A780, "Motorola EZX A780")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .fixup                  = ezx_fixup,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = &ezx_init,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_EZX_E680
+MACHINE_START(EZX_E680, "Motorola EZX E680")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .fixup                  = ezx_fixup,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = &ezx_init,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_EZX_A1200
+MACHINE_START(EZX_A1200, "Motorola EZX A1200")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .fixup                  = ezx_fixup,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = &ezx_init,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_EZX_A910
+MACHINE_START(EZX_A910, "Motorola EZX A910")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .fixup                  = ezx_fixup,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = &ezx_init,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_EZX_E6
+MACHINE_START(EZX_E6, "Motorola EZX E6")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .fixup                  = ezx_fixup,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = &ezx_init,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_EZX_E2
+MACHINE_START(EZX_E2, "Motorola EZX E2")
+        .phys_io        = 0x40000000,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .fixup                  = ezx_fixup,
+        .boot_params    = 0xa0000100,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = &ezx_init,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 44617938f3f1..ca053226fba0 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -60,23 +60,6 @@ unsigned int get_memclk_frequency_10khz(void)
 EXPORT_SYMBOL(get_memclk_frequency_10khz);
 
 /*
- * Routine to safely enable or disable a clock in the CKEN
- */
-void __pxa_set_cken(int clock, int enable)
-{
-        unsigned long flags;
-        local_irq_save(flags);
-
-        if (enable)
-                CKEN |= (1 << clock);
-        else
-                CKEN &= ~(1 << clock);
-
-        local_irq_restore(flags);
-}
-EXPORT_SYMBOL(__pxa_set_cken);
-
-/*
  * Intel PXA2xx internal register mapping.
  *
  * Note 1: not all PXA2xx variants implement all those addresses.
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index a9a0c3fab159..fbff557bb225 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -21,7 +21,6 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
 
 #include "generic.h"
 
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index 530654474bb2..dd759d03a9fd 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/smc91x.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -38,6 +39,7 @@
 #include <asm/arch/pxafb.h>
 #include <asm/arch/ssp.h>
 #include <asm/arch/pxa27x_keypad.h>
+#include <asm/arch/pxa3xx_nand.h>
 #include <asm/arch/littleton.h>
 
 #include "generic.h"
@@ -101,18 +103,26 @@ static struct resource smc91x_resources[] = {
         [1] = {
                 .start  = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
                 .end    = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)),
-                .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
         }
 };
 
+static struct smc91x_platdata littleton_smc91x_info = {
+        .flags  = SMC91X_USE_8BIT | SMC91X_USE_16BIT |
+                  SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
 static struct platform_device smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
         .num_resources  = ARRAY_SIZE(smc91x_resources),
         .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data = &littleton_smc91x_info,
+        },
 };
 
-#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULES)
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
 /* use bit 30, 31 as the indicator of command parameter number */
 #define CMD0(x)         ((0x00000000) | ((x) << 9))
 #define CMD1(x, x1)     ((0x40000000) | ((x) << 9) | 0x100 | (x1))
@@ -311,9 +321,9 @@ static void littleton_init_lcd(void)
 }
 #else
 static inline void littleton_init_lcd(void) {};
-#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULES */
+#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
 
-#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES)
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int littleton_matrix_key_map[] = {
         /* KEY(row, col, key_code) */
         KEY(1, 3, KEY_0), KEY(0, 0, KEY_1), KEY(1, 0, KEY_2), KEY(2, 0, KEY_3),
@@ -361,6 +371,57 @@ static void __init littleton_init_keypad(void)
 static inline void littleton_init_keypad(void) {}
 #endif
 
+#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
+static struct mtd_partition littleton_nand_partitions[] = {
+        [0] = {
+                .name        = "Bootloader",
+                .offset      = 0,
+                .size        = 0x060000,
+                .mask_flags  = MTD_WRITEABLE, /* force read-only */
+        },
+        [1] = {
+                .name        = "Kernel",
+                .offset      = 0x060000,
+                .size        = 0x200000,
+                .mask_flags  = MTD_WRITEABLE, /* force read-only */
+        },
+        [2] = {
+                .name        = "Filesystem",
+                .offset      = 0x0260000,
+                .size        = 0x3000000,     /* 48M - rootfs */
+        },
+        [3] = {
+                .name        = "MassStorage",
+                .offset      = 0x3260000,
+                .size        = 0x3d40000,
+        },
+        [4] = {
+                .name        = "BBT",
+                .offset      = 0x6FA0000,
+                .size        = 0x80000,
+                .mask_flags  = MTD_WRITEABLE,  /* force read-only */
+        },
+        /* NOTE: we reserve some blocks at the end of the NAND flash for
+         * bad block management, and the max number of relocation blocks
+         * differs on different platforms. Please take care with it when
+         * defining the partition table.
+         */
+};
+
+static struct pxa3xx_nand_platform_data littleton_nand_info = {
+        .enable_arbiter = 1,
+        .parts          = littleton_nand_partitions,
+        .nr_parts       = ARRAY_SIZE(littleton_nand_partitions),
+};
+
+static void __init littleton_init_nand(void)
+{
+        pxa3xx_set_nand_info(&littleton_nand_info);
+}
+#else
+static inline void littleton_init_nand(void) {}
+#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
+
 static void __init littleton_init(void)
 {
         /* initialize MFP configurations */
@@ -374,6 +435,7 @@ static void __init littleton_init(void)
 
         littleton_init_lcd();
         littleton_init_keypad();
+        littleton_init_nand();
 }
 
 MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)")
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index a20e4b1649d6..cc1c4fa06145 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -23,6 +23,7 @@
 #include <linux/ioport.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/pwm_backlight.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -134,9 +135,12 @@ static struct sys_device lpd270_irq_device = {
 
 static int __init lpd270_irq_device_init(void)
 {
-        int ret = sysdev_class_register(&lpd270_irq_sysclass);
-        if (ret == 0)
-                ret = sysdev_register(&lpd270_irq_device);
+        int ret = -ENODEV;
+        if (machine_is_logicpd_pxa270()) {
+                ret = sysdev_class_register(&lpd270_irq_sysclass);
+                if (ret == 0)
+                        ret = sysdev_register(&lpd270_irq_device);
+        }
         return ret;
 }
 
@@ -164,11 +168,6 @@ static struct platform_device smc91x_device = {
         .resource       = smc91x_resources,
 };
 
-static struct platform_device lpd270_audio_device = {
-        .name           = "pxa2xx-ac97",
-        .id             = -1,
-};
-
 static struct resource lpd270_flash_resources[] = {
         [0] = {
                 .start  = PXA_CS0_PHYS,
@@ -233,21 +232,20 @@ static struct platform_device lpd270_flash_device[2] = {
         },
 };
 
-static void lpd270_backlight_power(int on)
-{
-        if (on) {
-                pxa_gpio_mode(GPIO16_PWM0_MD);
-                pxa_set_cken(CKEN_PWM0, 1);
-                PWM_CTRL0 = 0;
-                PWM_PWDUTY0 = 0x3ff;
-                PWM_PERVAL0 = 0x3ff;
-        } else {
-                PWM_CTRL0 = 0;
-                PWM_PWDUTY0 = 0x0;
-                PWM_PERVAL0 = 0x3FF;
-                pxa_set_cken(CKEN_PWM0, 0);
-        }
-}
+static struct platform_pwm_backlight_data lpd270_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 1,
+        .dft_brightness = 1,
+        .pwm_period_ns  = 78770,
+};
+
+static struct platform_device lpd270_backlight_device = {
+        .name           = "pwm-backlight",
+        .dev            = {
+                .parent = &pxa27x_device_pwm0.dev,
+                .platform_data = &lpd270_backlight_data,
+        },
+};
 
 /* 5.7" TFT QVGA (LoLo display number 1) */
 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
@@ -269,7 +267,6 @@ static struct pxafb_mach_info sharp_lq057q3dc02 = {
         .num_modes              = 1,
         .lccr0                  = 0x07800080,
         .lccr3                  = 0x00400000,
-        .pxafb_backlight_power  = lpd270_backlight_power,
 };
 
 /* 12.1" TFT SVGA (LoLo display number 2) */
@@ -292,7 +289,6 @@ static struct pxafb_mach_info sharp_lq121s1dg31 = {
         .num_modes              = 1,
         .lccr0                  = 0x07800080,
         .lccr3                  = 0x00400000,
-        .pxafb_backlight_power  = lpd270_backlight_power,
 };
 
 /* 3.6" TFT QVGA (LoLo display number 3) */
@@ -315,7 +311,6 @@ static struct pxafb_mach_info sharp_lq036q1da01 = {
         .num_modes              = 1,
         .lccr0                  = 0x07800080,
         .lccr3                  = 0x00400000,
-        .pxafb_backlight_power  = lpd270_backlight_power,
 };
 
 /* 6.4" TFT VGA (LoLo display number 5) */
@@ -338,7 +333,6 @@ static struct pxafb_mach_info sharp_lq64d343 = {
         .num_modes              = 1,
         .lccr0                  = 0x07800080,
         .lccr3                  = 0x00400000,
-        .pxafb_backlight_power  = lpd270_backlight_power,
 };
 
 /* 10.4" TFT VGA (LoLo display number 7) */
@@ -361,7 +355,6 @@ static struct pxafb_mach_info sharp_lq10d368 = {
         .num_modes              = 1,
         .lccr0                  = 0x07800080,
         .lccr3                  = 0x00400000,
-        .pxafb_backlight_power  = lpd270_backlight_power,
 };
 
 /* 3.5" TFT QVGA (LoLo display number 8) */
@@ -384,7 +377,6 @@ static struct pxafb_mach_info sharp_lq035q7db02_20 = {
         .num_modes              = 1,
         .lccr0                  = 0x07800080,
         .lccr3                  = 0x00400000,
-        .pxafb_backlight_power  = lpd270_backlight_power,
 };
 
 static struct pxafb_mach_info *lpd270_lcd_to_use;
@@ -414,7 +406,7 @@ __setup("lcd=", lpd270_set_lcd);
 
 static struct platform_device *platform_devices[] __initdata = {
         &smc91x_device,
-        &lpd270_audio_device,
+        &lpd270_backlight_device,
         &lpd270_flash_device[0],
         &lpd270_flash_device[1],
 };
@@ -454,9 +446,12 @@ static void __init lpd270_init(void)
          * On LogicPD PXA270, we route AC97_SYSCLK via GPIO45.
          */
         pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
+        pxa_gpio_mode(GPIO16_PWM0_MD);
 
         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 
+        pxa_set_ac97_info(NULL);
+
         if (lpd270_lcd_to_use != NULL)
                 set_pxa_fb_info(lpd270_lcd_to_use);
 
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 7b9bdd0c6665..ac26423cd20c 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -21,6 +21,7 @@
 #include <linux/interrupt.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/smc91x.h>
 
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
@@ -43,6 +44,7 @@
 #include <asm/arch/pxa-regs.h>
 #include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/mfp-pxa25x.h>
+#include <asm/arch/audio.h>
 #include <asm/arch/lubbock.h>
 #include <asm/arch/udc.h>
 #include <asm/arch/irda.h>
@@ -196,11 +198,6 @@ static struct pxa2xx_udc_mach_info udc_info __initdata = {
         // no D+ pullup; lubbock can't connect/disconnect in software
 };
 
-static struct platform_device lub_audio_device = {
-        .name           = "pxa2xx-ac97",
-        .id             = -1,
-};
-
 static struct resource sa1111_resources[] = {
         [0] = {
                 .start  = 0x10000000,
@@ -230,14 +227,6 @@ static struct pxa2xx_spi_master pxa_ssp_master_info = {
         .num_chipselect = 0,
 };
 
-static struct platform_device pxa_ssp = {
-        .name           = "pxa2xx-spi",
-        .id             = 1,
-        .dev = {
-                .platform_data  = &pxa_ssp_master_info,
-        },
-};
-
 static int lubbock_ads7846_pendown_state(void)
 {
         /* TS_BUSY is bit 8 in LUB_MISC_RD, but pendown is irq-only */
@@ -296,11 +285,18 @@ static struct resource smc91x_resources[] = {
         },
 };
 
+static struct smc91x_platdata lubbock_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_IO_SHIFT_2,
+};
+
 static struct platform_device smc91x_device = {
         .name           = "smc91x",
         .id             = -1,
         .num_resources  = ARRAY_SIZE(smc91x_resources),
         .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data = &lubbock_smc91x_info,
+        },
 };
 
 static struct resource flash_resources[] = {
@@ -368,11 +364,9 @@ static struct platform_device lubbock_flash_device[2] = {
 
 static struct platform_device *devices[] __initdata = {
         &sa1111_device,
-        &lub_audio_device,
         &smc91x_device,
         &lubbock_flash_device[0],
         &lubbock_flash_device[1],
-        &pxa_ssp,
 };
 
 static struct pxafb_mode_info sharp_lm8v31_mode = {
@@ -476,6 +470,7 @@ static void lubbock_irda_transceiver_mode(struct device *dev, int mode)
         } else if (mode & IR_FIRMODE) {
                 LUB_MISC_WR |= 1 << 4;
         }
+        pxa2xx_transceiver_mode(dev, mode);
         local_irq_restore(flags);
 }
 
@@ -494,6 +489,7 @@ static void __init lubbock_init(void)
         set_pxa_fb_info(&sharp_lm8v31);
         pxa_set_mci_info(&lubbock_mci_platform_data);
         pxa_set_ficp_info(&lubbock_ficp_platform_data);
+        pxa_set_ac97_info(NULL);
 
         lubbock_flash_data[0].width = lubbock_flash_data[1].width =
                 (BOOT_DEF & 1) ? 2 : 4;
@@ -505,6 +501,7 @@ static void __init lubbock_init(void)
         lubbock_flash_data[flashboot].name = "boot-rom";
         (void) platform_add_devices(devices, ARRAY_SIZE(devices));
 
+        pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
         spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
 }
 
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index badba064dc04..c9d274f0048f 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -17,31 +17,32 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
+#include <linux/gpio.h>
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/mfd/htc-egpio.h>
 #include <linux/mfd/htc-pasic3.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
 #include <linux/mtd/physmap.h>
 #include <linux/pda_power.h>
+#include <linux/pwm_backlight.h>
 
-#include <asm/gpio.h>
 #include <asm/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/arch/magician.h>
 #include <asm/arch/mfp-pxa27x.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/pxafb.h>
 #include <asm/arch/i2c.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/ohci.h>
 
+#include "devices.h"
 #include "generic.h"
 
-static unsigned long magician_pin_config[] = {
+static unsigned long magician_pin_config[] __initdata = {
 
         /* SDRAM and Static Memory I/O Signals */
         GPIO20_nSDCS_2,
@@ -131,6 +132,7 @@ static unsigned long magician_pin_config[] = {
 static void magician_irda_transceiver_mode(struct device *dev, int mode)
 {
         gpio_set_value(GPIO83_MAGICIAN_nIR_EN, mode & IR_OFF);
+        pxa2xx_transceiver_mode(dev, mode);
 }
 
 static struct pxaficp_platform_data magician_ficp_info = {
@@ -348,40 +350,59 @@ static struct pxafb_mach_info samsung_info = {
  * Backlight
  */
 
-static void magician_set_bl_intensity(int intensity)
+static int magician_backlight_init(struct device *dev)
 {
-        if (intensity) {
-                PWM_CTRL0 = 1;
-                PWM_PERVAL0 = 0xc8;
-                if (intensity > 0xc7) {
-                        PWM_PWDUTY0 = intensity - 0x48;
-                        gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 1);
-                } else {
-                        PWM_PWDUTY0 = intensity;
-                        gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 0);
-                }
-                gpio_set_value(EGPIO_MAGICIAN_BL_POWER, 1);
-                pxa_set_cken(CKEN_PWM0, 1);
+        int ret;
+
+        ret = gpio_request(EGPIO_MAGICIAN_BL_POWER, "BL_POWER");
+        if (ret)
+                goto err;
+        ret = gpio_request(EGPIO_MAGICIAN_BL_POWER2, "BL_POWER2");
+        if (ret)
+                goto err2;
+        return 0;
+
+err2:
+        gpio_free(EGPIO_MAGICIAN_BL_POWER);
+err:
+        return ret;
+}
+
+static int magician_backlight_notify(int brightness)
+{
+        gpio_set_value(EGPIO_MAGICIAN_BL_POWER, brightness);
+        if (brightness >= 200) {
+                gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 1);
+                return brightness - 72;
         } else {
-                /* PWM_PWDUTY0 = intensity; */
-                gpio_set_value(EGPIO_MAGICIAN_BL_POWER, 0);
-                pxa_set_cken(CKEN_PWM0, 0);
+                gpio_set_value(EGPIO_MAGICIAN_BL_POWER2, 0);
+                return brightness;
         }
 }
 
-static struct generic_bl_info backlight_info = {
-        .default_intensity = 0x64,
-        .limit_mask        = 0x0b,
-        .max_intensity     = 0xc7+0x48,
-        .set_bl_intensity  = magician_set_bl_intensity,
+static void magician_backlight_exit(struct device *dev)
+{
+        gpio_free(EGPIO_MAGICIAN_BL_POWER);
+        gpio_free(EGPIO_MAGICIAN_BL_POWER2);
+}
+
+static struct platform_pwm_backlight_data backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 272,
+        .dft_brightness = 100,
+        .pwm_period_ns  = 30923,
+        .init           = magician_backlight_init,
+        .notify         = magician_backlight_notify,
+        .exit           = magician_backlight_exit,
 };
 
 static struct platform_device backlight = {
-        .name = "generic-bl",
+        .name = "pwm-backlight",
+        .id   = -1,
         .dev  = {
-                .platform_data = &backlight_info,
+                .parent        = &pxa27x_device_pwm0.dev,
+                .platform_data = &backlight_data,
         },
-        .id   = -1,
 };
 
 /*
@@ -490,6 +511,37 @@ static struct platform_device pasic3 = {
  * External power
  */
 
+static int power_supply_init(struct device *dev)
+{
+        int ret;
+
+        ret = gpio_request(EGPIO_MAGICIAN_CABLE_STATE_AC, "CABLE_STATE_AC");
+        if (ret)
+                goto err_cs_ac;
+        ret = gpio_request(EGPIO_MAGICIAN_CABLE_STATE_USB, "CABLE_STATE_USB");
+        if (ret)
+                goto err_cs_usb;
+        ret = gpio_request(EGPIO_MAGICIAN_CHARGE_EN, "CHARGE_EN");
+        if (ret)
+                goto err_chg_en;
+        ret = gpio_request(GPIO30_MAGICIAN_nCHARGE_EN, "nCHARGE_EN");
+        if (!ret)
+                ret = gpio_direction_output(GPIO30_MAGICIAN_nCHARGE_EN, 0);
+        if (ret)
+                goto err_nchg_en;
+
+        return 0;
+
+err_nchg_en:
+        gpio_free(EGPIO_MAGICIAN_CHARGE_EN);
+err_chg_en:
+        gpio_free(EGPIO_MAGICIAN_CABLE_STATE_USB);
+err_cs_usb:
+        gpio_free(EGPIO_MAGICIAN_CABLE_STATE_AC);
+err_cs_ac:
+        return ret;
+}
+
 static int magician_is_ac_online(void)
 {
         return gpio_get_value(EGPIO_MAGICIAN_CABLE_STATE_AC);
@@ -506,14 +558,24 @@ static void magician_set_charge(int flags)
         gpio_set_value(EGPIO_MAGICIAN_CHARGE_EN, flags);
 }
 
+static void power_supply_exit(struct device *dev)
+{
+        gpio_free(GPIO30_MAGICIAN_nCHARGE_EN);
+        gpio_free(EGPIO_MAGICIAN_CHARGE_EN);
+        gpio_free(EGPIO_MAGICIAN_CABLE_STATE_USB);
+        gpio_free(EGPIO_MAGICIAN_CABLE_STATE_AC);
+}
+
 static char *magician_supplicants[] = {
         "ds2760-battery.0", "backup-battery"
 };
 
 static struct pda_power_pdata power_supply_info = {
+        .init            = power_supply_init,
         .is_ac_online    = magician_is_ac_online,
         .is_usb_online   = magician_is_usb_online,
         .set_charge      = magician_set_charge,
+        .exit            = power_supply_exit,
         .supplied_to     = magician_supplicants,
         .num_supplicants = ARRAY_SIZE(magician_supplicants),
 };
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 7399fb34da4e..851ec2d9b699 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -23,9 +23,10 @@
 #include <linux/ioport.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
-#include <linux/backlight.h>
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
+#include <linux/pwm_backlight.h>
+#include <linux/smc91x.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -110,9 +111,9 @@ static unsigned long mainstone_pin_config[] = {
         GPIO45_AC97_SYSCLK,
 
         /* Keypad */
-        GPIO93_KP_DKIN_0        | WAKEUP_ON_LEVEL_HIGH,
-        GPIO94_KP_DKIN_1        | WAKEUP_ON_LEVEL_HIGH,
-        GPIO95_KP_DKIN_2        | WAKEUP_ON_LEVEL_HIGH,
+        GPIO93_KP_DKIN_0,
+        GPIO94_KP_DKIN_1,
+        GPIO95_KP_DKIN_2,
         GPIO100_KP_MKIN_0       | WAKEUP_ON_LEVEL_HIGH,
         GPIO101_KP_MKIN_1       | WAKEUP_ON_LEVEL_HIGH,
         GPIO102_KP_MKIN_2       | WAKEUP_ON_LEVEL_HIGH,
@@ -240,11 +241,19 @@ static struct resource smc91x_resources[] = {
         }
 };
 
+static struct smc91x_platdata mainstone_smc91x_info = {
+        .flags  = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
+                  SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
 static struct platform_device smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
         .num_resources  = ARRAY_SIZE(smc91x_resources),
         .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data = &mainstone_smc91x_info,
+        },
 };
 
 static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
@@ -280,12 +289,6 @@ static pxa2xx_audio_ops_t mst_audio_ops = {
         .resume         = mst_audio_resume,
 };
 
-static struct platform_device mst_audio_device = {
-        .name           = "pxa2xx-ac97",
-        .id             = -1,
-        .dev            = { .platform_data = &mst_audio_ops },
-};
-
 static struct resource flash_resources[] = {
         [0] = {
                 .start  = PXA_CS0_PHYS,
@@ -349,56 +352,27 @@ static struct platform_device mst_flash_device[2] = {
         },
 };
 
-#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
-static int mainstone_backlight_update_status(struct backlight_device *bl)
-{
-        int brightness = bl->props.brightness;
-
-        if (bl->props.power != FB_BLANK_UNBLANK ||
-            bl->props.fb_blank != FB_BLANK_UNBLANK)
-                brightness = 0;
-
-        if (brightness != 0)
-                pxa_set_cken(CKEN_PWM0, 1);
-
-        PWM_CTRL0 = 0;
-        PWM_PWDUTY0 = brightness;
-        PWM_PERVAL0 = bl->props.max_brightness;
-
-        if (brightness == 0)
-                pxa_set_cken(CKEN_PWM0, 0);
-        return 0; /* pointless return value */
-}
-
-static int mainstone_backlight_get_brightness(struct backlight_device *bl)
-{
-        return PWM_PWDUTY0;
-}
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+static struct platform_pwm_backlight_data mainstone_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 1023,
+        .dft_brightness = 1023,
+        .pwm_period_ns  = 78770,
+};
 
-static /*const*/ struct backlight_ops mainstone_backlight_ops = {
-        .update_status  = mainstone_backlight_update_status,
-        .get_brightness = mainstone_backlight_get_brightness,
+static struct platform_device mainstone_backlight_device = {
+        .name           = "pwm-backlight",
+        .dev            = {
+                .parent = &pxa27x_device_pwm0.dev,
+                .platform_data = &mainstone_backlight_data,
+        },
 };
 
 static void __init mainstone_backlight_register(void)
 {
-        struct backlight_device *bl;
-
-        bl = backlight_device_register("mainstone-bl", &pxa_device_fb.dev,
-                                       NULL, &mainstone_backlight_ops);
-        if (IS_ERR(bl)) {
-                printk(KERN_ERR "mainstone: unable to register backlight: %ld\n",
-                       PTR_ERR(bl));
-                return;
-        }
-
-        /*
-         * broken design - register-then-setup interfaces are
-         * utterly broken by definition.
-         */
-        bl->props.max_brightness = 1023;
-        bl->props.brightness = 1023;
-        backlight_update_status(bl);
+        int ret = platform_device_register(&mainstone_backlight_device);
+        if (ret)
+                printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
 }
 #else
 #define mainstone_backlight_register()  do { } while (0)
@@ -490,6 +464,7 @@ static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
         } else if (mode & IR_FIRMODE) {
                 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
         }
+        pxa2xx_transceiver_mode(dev, mode);
         if (mode & IR_OFF) {
                 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
         } else {
@@ -528,7 +503,6 @@ static struct platform_device mst_gpio_keys_device = {
 
 static struct platform_device *platform_devices[] __initdata = {
         &smc91x_device,
-        &mst_audio_device,
         &mst_flash_device[0],
         &mst_flash_device[1],
         &mst_gpio_keys_device,
@@ -549,7 +523,7 @@ static struct pxaohci_platform_data mainstone_ohci_platform_data = {
         .init           = mainstone_ohci_init,
 };
 
-#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES)
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int mainstone_matrix_keys[] = {
         KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
         KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
@@ -638,6 +612,7 @@ static void __init mainstone_init(void)
         pxa_set_ficp_info(&mainstone_ficp_platform_data);
         pxa_set_ohci_info(&mainstone_ohci_platform_data);
         pxa_set_i2c_info(NULL);
+        pxa_set_ac97_info(&mst_audio_ops);
 
         mainstone_init_keypad();
 }
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 22097a1707cc..fd4545eab803 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -20,6 +20,7 @@
 
 #include <asm/arch/hardware.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/mfp-pxa2xx.h>
 
 #include "generic.h"
@@ -38,6 +39,28 @@ struct gpio_desc {
 
 static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
 
+static int __mfp_config_lpm(unsigned gpio, unsigned long lpm)
+{
+        unsigned mask = GPIO_bit(gpio);
+
+        /* low power state */
+        switch (lpm) {
+        case MFP_LPM_DRIVE_HIGH:
+                PGSR(gpio) |= mask;
+                break;
+        case MFP_LPM_DRIVE_LOW:
+                PGSR(gpio) &= ~mask;
+                break;
+        case MFP_LPM_INPUT:
+                break;
+        default:
+                pr_warning("%s: invalid low power state for GPIO%d\n",
+                                __func__, gpio);
+                return -EINVAL;
+        }
+        return 0;
+}
+
 static int __mfp_config_gpio(unsigned gpio, unsigned long c)
 {
         unsigned long gafr, mask = GPIO_bit(gpio);
@@ -56,21 +79,8 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
         else
                 GPDR(gpio) &= ~mask;
 
-        /* low power state */
-        switch (c & MFP_LPM_STATE_MASK) {
-        case MFP_LPM_DRIVE_HIGH:
-                PGSR(gpio) |= mask;
-                break;
-        case MFP_LPM_DRIVE_LOW:
-                PGSR(gpio) &= ~mask;
-                break;
-        case MFP_LPM_INPUT:
-                break;
-        default:
-                pr_warning("%s: invalid low power state for GPIO%d\n",
-                                __func__, gpio);
+        if (__mfp_config_lpm(gpio, c & MFP_LPM_STATE_MASK))
                 return -EINVAL;
-        }
 
         /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
          * configurations of those pins not able to wakeup
@@ -90,6 +100,18 @@ static int __mfp_config_gpio(unsigned gpio, unsigned long c)
         return 0;
 }
 
+static inline int __mfp_validate(int mfp)
+{
+        int gpio = mfp_to_gpio(mfp);
+
+        if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {
+                pr_warning("%s: GPIO%d is invalid pin\n", __func__, gpio);
+                return -1;
+        }
+
+        return gpio;
+}
+
 void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
 {
         unsigned long flags;
@@ -98,13 +120,9 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
 
         for (i = 0, c = mfp_cfgs; i < num; i++, c++) {
 
-                gpio = mfp_to_gpio(MFP_PIN(*c));
-
-                if (!gpio_desc[gpio].valid) {
-                        pr_warning("%s: GPIO%d is invalid pin\n",
-                                __func__, gpio);
+                gpio = __mfp_validate(MFP_PIN(*c));
+                if (gpio < 0)
                         continue;
-                }
 
                 local_irq_save(flags);
 
@@ -115,6 +133,20 @@ void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
         }
 }
 
+void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
+{
+        unsigned long flags;
+        int gpio;
+
+        gpio = __mfp_validate(mfp);
+        if (gpio < 0)
+                return;
+
+        local_irq_save(flags);
+        __mfp_config_lpm(gpio, lpm);
+        local_irq_restore(flags);
+}
+
 int gpio_set_wake(unsigned int gpio, unsigned int on)
 {
         struct gpio_desc *d;
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
new file mode 100644
index 000000000000..408657a24f8c
--- /dev/null
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -0,0 +1,416 @@
+/*
+ * Hardware definitions for PalmTX
+ *
+ * Author:     Marek Vasut <marek.vasut@gmail.com>
+ *
+ * Based on work of:
+ *              Alex Osborne <ato@meshy.org>
+ *              Cristiano P. <cristianop@users.sourceforge.net>
+ *              Jan Herman <2hp@seznam.cz>
+ *              Michal Hrusecky
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * (find more info at www.hackndev.com)
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/pda_power.h>
+#include <linux/pwm_backlight.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/audio.h>
+#include <asm/arch/palmtx.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/pxafb.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/mfp-pxa27x.h>
+#include <asm/arch/irda.h>
+#include <asm/arch/pxa27x_keypad.h>
+#include <asm/arch/udc.h>
+
+#include "generic.h"
+#include "devices.h"
+
+/******************************************************************************
+ * Pin configuration
+ ******************************************************************************/
+static unsigned long palmtx_pin_config[] __initdata = {
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        GPIO112_MMC_CMD,
+
+        /* AC97 */
+        GPIO28_AC97_BITCLK,
+        GPIO29_AC97_SDATA_IN_0,
+        GPIO30_AC97_SDATA_OUT,
+        GPIO31_AC97_SYNC,
+
+        /* IrDA */
+        GPIO46_FICP_RXD,
+        GPIO47_FICP_TXD,
+
+        /* PWM */
+        GPIO16_PWM0_OUT,
+
+        /* USB */
+        GPIO13_GPIO,
+
+        /* PCMCIA */
+        GPIO48_nPOE,
+        GPIO49_nPWE,
+        GPIO50_nPIOR,
+        GPIO51_nPIOW,
+        GPIO85_nPCE_1,
+        GPIO54_nPCE_2,
+        GPIO79_PSKTSEL,
+        GPIO55_nPREG,
+        GPIO56_nPWAIT,
+        GPIO57_nIOIS16,
+};
+
+/******************************************************************************
+ * SD/MMC card controller
+ ******************************************************************************/
+static int palmtx_mci_init(struct device *dev, irq_handler_t palmtx_detect_int,
+                                void *data)
+{
+        int err = 0;
+
+        /* Setup an interrupt for detecting card insert/remove events */
+        err = request_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, palmtx_detect_int,
+                        IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
+                        IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+                        "SD/MMC card detect", data);
+        if (err) {
+                printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n",
+                                __func__);
+                return err;
+        }
+
+        err = gpio_request(GPIO_NR_PALMTX_SD_POWER, "SD_POWER");
+        if (err)
+                goto pwr_err;
+
+        err = gpio_request(GPIO_NR_PALMTX_SD_READONLY, "SD_READONLY");
+        if (err)
+                goto ro_err;
+
+        printk(KERN_DEBUG "%s: irq registered\n", __func__);
+
+        return 0;
+
+ro_err:
+        gpio_free(GPIO_NR_PALMTX_SD_POWER);
+pwr_err:
+        free_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, data);
+        return err;
+}
+
+static void palmtx_mci_exit(struct device *dev, void *data)
+{
+        gpio_free(GPIO_NR_PALMTX_SD_READONLY);
+        gpio_free(GPIO_NR_PALMTX_SD_POWER);
+        free_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, data);
+}
+
+static void palmtx_mci_power(struct device *dev, unsigned int vdd)
+{
+        struct pxamci_platform_data *p_d = dev->platform_data;
+        gpio_set_value(GPIO_NR_PALMTX_SD_POWER, p_d->ocr_mask & (1 << vdd));
+}
+
+static int palmtx_mci_get_ro(struct device *dev)
+{
+        return gpio_get_value(GPIO_NR_PALMTX_SD_READONLY);
+}
+
+static struct pxamci_platform_data palmtx_mci_platform_data = {
+        .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34,
+        .setpower       = palmtx_mci_power,
+        .get_ro         = palmtx_mci_get_ro,
+        .init           = palmtx_mci_init,
+        .exit           = palmtx_mci_exit,
+};
+
+/******************************************************************************
+ * GPIO keyboard
+ ******************************************************************************/
+static unsigned int palmtx_matrix_keys[] = {
+        KEY(0, 0, KEY_POWER),
+        KEY(0, 1, KEY_F1),
+        KEY(0, 2, KEY_ENTER),
+
+        KEY(1, 0, KEY_F2),
+        KEY(1, 1, KEY_F3),
+        KEY(1, 2, KEY_F4),
+
+        KEY(2, 0, KEY_UP),
+        KEY(2, 2, KEY_DOWN),
+
+        KEY(3, 0, KEY_RIGHT),
+        KEY(3, 2, KEY_LEFT),
+
+};
+
+static struct pxa27x_keypad_platform_data palmtx_keypad_platform_data = {
+        .matrix_key_rows        = 4,
+        .matrix_key_cols        = 3,
+        .matrix_key_map         = palmtx_matrix_keys,
+        .matrix_key_map_size    = ARRAY_SIZE(palmtx_matrix_keys),
+
+        .debounce_interval      = 30,
+};
+
+/******************************************************************************
+ * GPIO keys
+ ******************************************************************************/
+static struct gpio_keys_button palmtx_pxa_buttons[] = {
+        {KEY_F8, GPIO_NR_PALMTX_HOTSYNC_BUTTON_N, 1, "HotSync Button" },
+};
+
+static struct gpio_keys_platform_data palmtx_pxa_keys_data = {
+        .buttons        = palmtx_pxa_buttons,
+        .nbuttons       = ARRAY_SIZE(palmtx_pxa_buttons),
+};
+
+static struct platform_device palmtx_pxa_keys = {
+        .name   = "gpio-keys",
+        .id     = -1,
+        .dev    = {
+                .platform_data = &palmtx_pxa_keys_data,
+        },
+};
+
+/******************************************************************************
+ * Backlight
+ ******************************************************************************/
+static int palmtx_backlight_init(struct device *dev)
+{
+        int ret;
+
+        ret = gpio_request(GPIO_NR_PALMTX_BL_POWER, "BL POWER");
+        if (ret)
+                goto err;
+        ret = gpio_request(GPIO_NR_PALMTX_LCD_POWER, "LCD POWER");
+        if (ret)
+                goto err2;
+
+        return 0;
+err2:
+        gpio_free(GPIO_NR_PALMTX_BL_POWER);
+err:
+        return ret;
+}
+
+static int palmtx_backlight_notify(int brightness)
+{
+        gpio_set_value(GPIO_NR_PALMTX_BL_POWER, brightness);
+        gpio_set_value(GPIO_NR_PALMTX_LCD_POWER, brightness);
+        return brightness;
+}
+
+static void palmtx_backlight_exit(struct device *dev)
+{
+        gpio_free(GPIO_NR_PALMTX_BL_POWER);
+        gpio_free(GPIO_NR_PALMTX_LCD_POWER);
+}
+
+static struct platform_pwm_backlight_data palmtx_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = PALMTX_MAX_INTENSITY,
+        .dft_brightness = PALMTX_MAX_INTENSITY,
+        .pwm_period_ns  = PALMTX_PERIOD_NS,
+        .init           = palmtx_backlight_init,
+        .notify         = palmtx_backlight_notify,
+        .exit           = palmtx_backlight_exit,
+};
+
+static struct platform_device palmtx_backlight = {
+        .name   = "pwm-backlight",
+        .dev    = {
+                .parent         = &pxa27x_device_pwm0.dev,
+                .platform_data  = &palmtx_backlight_data,
+        },
+};
+
+/******************************************************************************
+ * IrDA
+ ******************************************************************************/
+static void palmtx_irda_transceiver_mode(struct device *dev, int mode)
+{
+        gpio_set_value(GPIO_NR_PALMTX_IR_DISABLE, mode & IR_OFF);
+        pxa2xx_transceiver_mode(dev, mode);
+}
+
+static struct pxaficp_platform_data palmtx_ficp_platform_data = {
+        .transceiver_cap        = IR_SIRMODE | IR_FIRMODE | IR_OFF,
+        .transceiver_mode       = palmtx_irda_transceiver_mode,
+};
+
+/******************************************************************************
+ * UDC
+ ******************************************************************************/
+static void palmtx_udc_command(int cmd)
+{
+        gpio_set_value(GPIO_NR_PALMTX_USB_POWER, !cmd);
+        udelay(50);
+        gpio_set_value(GPIO_NR_PALMTX_USB_PULLUP, !cmd);
+}
+
+static struct pxa2xx_udc_mach_info palmtx_udc_info __initdata = {
+        .gpio_vbus              = GPIO_NR_PALMTX_USB_DETECT_N,
+        .gpio_vbus_inverted     = 1,
+        .udc_command            = palmtx_udc_command,
+};
+
+/******************************************************************************
+ * Power supply
+ ******************************************************************************/
+static int power_supply_init(struct device *dev)
+{
+        int ret;
+
+        ret = gpio_request(GPIO_NR_PALMTX_POWER_DETECT, "CABLE_STATE_AC");
+        if (ret)
+                goto err_cs_ac;
+
+        ret = gpio_request(GPIO_NR_PALMTX_USB_DETECT_N, "CABLE_STATE_USB");
+        if (ret)
+                goto err_cs_usb;
+
+        return 0;
+
+err_cs_usb:
+        gpio_free(GPIO_NR_PALMTX_POWER_DETECT);
+err_cs_ac:
+        return ret;
+}
+
+static int palmtx_is_ac_online(void)
+{
+        return gpio_get_value(GPIO_NR_PALMTX_POWER_DETECT);
+}
+
+static int palmtx_is_usb_online(void)
+{
+        return !gpio_get_value(GPIO_NR_PALMTX_USB_DETECT_N);
+}
+
+static void power_supply_exit(struct device *dev)
+{
+        gpio_free(GPIO_NR_PALMTX_USB_DETECT_N);
+        gpio_free(GPIO_NR_PALMTX_POWER_DETECT);
+}
+
+static char *palmtx_supplicants[] = {
+        "main-battery",
+};
+
+static struct pda_power_pdata power_supply_info = {
+        .init            = power_supply_init,
+        .is_ac_online    = palmtx_is_ac_online,
+        .is_usb_online   = palmtx_is_usb_online,
+        .exit            = power_supply_exit,
+        .supplied_to     = palmtx_supplicants,
+        .num_supplicants = ARRAY_SIZE(palmtx_supplicants),
+};
+
+static struct platform_device power_supply = {
+        .name = "pda-power",
+        .id   = -1,
+        .dev  = {
+                .platform_data = &power_supply_info,
+        },
+};
+
+/******************************************************************************
+ * Framebuffer
+ ******************************************************************************/
+static struct pxafb_mode_info palmtx_lcd_modes[] = {
+{
+        .pixclock       = 57692,
+        .xres           = 320,
+        .yres           = 480,
+        .bpp            = 16,
+
+        .left_margin    = 32,
+        .right_margin   = 1,
+        .upper_margin   = 7,
+        .lower_margin   = 1,
+
+        .hsync_len      = 4,
+        .vsync_len      = 1,
+},
+};
+
+static struct pxafb_mach_info palmtx_lcd_screen = {
+        .modes          = palmtx_lcd_modes,
+        .num_modes      = ARRAY_SIZE(palmtx_lcd_modes),
+        .lcd_conn       = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
+};
+
+/******************************************************************************
+ * Machine init
+ ******************************************************************************/
+static struct platform_device *devices[] __initdata = {
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+        &palmtx_pxa_keys,
+#endif
+        &palmtx_backlight,
+        &power_supply,
+};
+
+static struct map_desc palmtx_io_desc[] __initdata = {
+{
+        .virtual        = PALMTX_PCMCIA_VIRT,
+        .pfn            = __phys_to_pfn(PALMTX_PCMCIA_PHYS),
+        .length         = PALMTX_PCMCIA_SIZE,
+        .type           = MT_DEVICE
+},
+};
+
+static void __init palmtx_map_io(void)
+{
+        pxa_map_io();
+        iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc));
+}
+
+static void __init palmtx_init(void)
+{
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config));
+
+        set_pxa_fb_info(&palmtx_lcd_screen);
+        pxa_set_mci_info(&palmtx_mci_platform_data);
+        pxa_set_udc_info(&palmtx_udc_info);
+        pxa_set_ac97_info(NULL);
+        pxa_set_ficp_info(&palmtx_ficp_platform_data);
+        pxa_set_keypad_info(&palmtx_keypad_platform_data);
+
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+MACHINE_START(PALMTX, "Palm T|X")
+        .phys_io        = PALMTX_PHYS_IO_START,
+        .io_pg_offst    = io_p2v(0x40000000),
+        .boot_params    = 0xa0000100,
+        .map_io         = palmtx_map_io,
+        .init_irq       = pxa27x_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = palmtx_init
+MACHINE_END
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c
index 3b945eb0aee3..377f3be8ce57 100644
--- a/arch/arm/mach-pxa/pcm027.c
+++ b/arch/arm/mach-pxa/pcm027.c
@@ -24,7 +24,9 @@
 #include <linux/platform_device.h>
 #include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
+#include <linux/spi/max7301.h>
 #include <linux/leds.h>
+
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/arch/hardware.h>
@@ -108,6 +110,32 @@ static struct platform_device smc91x_device = {
         .resource       = smc91x_resources,
 };
 
+/*
+ * SPI host and devices
+ */
+static struct pxa2xx_spi_master pxa_ssp_master_info = {
+        .num_chipselect = 1,
+};
+
+static struct max7301_platform_data max7301_info = {
+        .base = -1,
+};
+
+/* bus_num must match id in pxa2xx_set_spi_info() call */
+static struct spi_board_info spi_board_info[] __initdata = {
+        {
+                .modalias       = "max7301",
+                .platform_data  = &max7301_info,
+                .max_speed_hz   = 13000000,
+                .bus_num        = 1,
+                .chip_select    = 0,
+                .mode           = SPI_MODE_0,
+        },
+};
+
+/*
+ * NOR flash
+ */
 static struct physmap_flash_data pcm027_flash_data = {
         .width  = 4,
 };
@@ -190,6 +218,9 @@ static void __init pcm027_init(void)
 #ifdef CONFIG_MACH_PCM990_BASEBOARD
         pcm990_baseboard_init();
 #endif
+
+        pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
+        spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
 }
 
 static void __init pcm027_map_io(void)
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 49d951db0f3d..30023b00e476 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -24,6 +24,7 @@
 #include <linux/platform_device.h>
 #include <linux/ide.h>
 #include <linux/i2c.h>
+#include <linux/pwm_backlight.h>
 
 #include <media/soc_camera.h>
 
@@ -32,13 +33,120 @@
 #include <asm/arch/camera.h>
 #include <asm/mach/map.h>
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
+#include <asm/arch/audio.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/ohci.h>
 #include <asm/arch/pcm990_baseboard.h>
+#include <asm/arch/pxafb.h>
+#include <asm/arch/mfp-pxa27x.h>
+
+#include "devices.h"
+#include "generic.h"
+
+static unsigned long pcm990_pin_config[] __initdata = {
+        /* MMC */
+        GPIO32_MMC_CLK,
+        GPIO112_MMC_CMD,
+        GPIO92_MMC_DAT_0,
+        GPIO109_MMC_DAT_1,
+        GPIO110_MMC_DAT_2,
+        GPIO111_MMC_DAT_3,
+        /* USB */
+        GPIO88_USBH1_PWR,
+        GPIO89_USBH1_PEN,
+        /* PWM0 */
+        GPIO16_PWM0_OUT,
+};
 
 /*
- * The PCM-990 development baseboard uses PCM-027's hardeware in the
+ * pcm990_lcd_power - control power supply to the LCD
+ * @on: 0 = switch off, 1 = switch on
+ *
+ * Called by the pxafb driver
+ */
+#ifndef CONFIG_PCM990_DISPLAY_NONE
+static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
+{
+        if (on) {
+                /* enable LCD-Latches
+                 * power on LCD
+                 */
+                __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =
+                        PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;
+        } else {
+                /* disable LCD-Latches
+                 * power off LCD
+                 */
+                __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;
+        }
+}
+#endif
+
+#if defined(CONFIG_PCM990_DISPLAY_SHARP)
+static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
+        .pixclock               = 28000,
+        .xres                   = 640,
+        .yres                   = 480,
+        .bpp                    = 16,
+        .hsync_len              = 20,
+        .left_margin            = 103,
+        .right_margin           = 47,
+        .vsync_len              = 6,
+        .upper_margin           = 28,
+        .lower_margin           = 5,
+        .sync                   = 0,
+        .cmap_greyscale         = 0,
+};
+
+static struct pxafb_mach_info pcm990_fbinfo __initdata = {
+        .modes                  = &fb_info_sharp_lq084v1dg21,
+        .num_modes              = 1,
+        .lccr0                  = LCCR0_PAS,
+        .lccr3                  = LCCR3_PCP,
+        .pxafb_lcd_power        = pcm990_lcd_power,
+};
+#elif defined(CONFIG_PCM990_DISPLAY_NEC)
+struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
+        .pixclock               = 39720,
+        .xres                   = 640,
+        .yres                   = 480,
+        .bpp                    = 16,
+        .hsync_len              = 32,
+        .left_margin            = 16,
+        .right_margin           = 48,
+        .vsync_len              = 2,
+        .upper_margin           = 12,
+        .lower_margin           = 17,
+        .sync                   = 0,
+        .cmap_greyscale         = 0,
+};
+
+static struct pxafb_mach_info pcm990_fbinfo __initdata = {
+        .modes                  = &fb_info_nec_nl6448bc20_18d,
+        .num_modes              = 1,
+        .lccr0                  = LCCR0_Act,
+        .lccr3                  = LCCR3_PixFlEdg,
+        .pxafb_lcd_power        = pcm990_lcd_power,
+};
+#endif
+
+static struct platform_pwm_backlight_data pcm990_backlight_data = {
+        .pwm_id         = 0,
+        .max_brightness = 1023,
+        .dft_brightness = 1023,
+        .pwm_period_ns  = 78770,
+};
+
+static struct platform_device pcm990_backlight_device = {
+        .name           = "pwm-backlight",
+        .dev            = {
+                .parent = &pxa27x_device_pwm0.dev,
+                .platform_data = &pcm990_backlight_data,
+        },
+};
+
+/*
+ * The PCM-990 development baseboard uses PCM-027's hardware in the
  * following way:
  *
  * - LCD support is in use
@@ -185,16 +293,6 @@ static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
 {
         int err;
 
-        /*
-         * enable GPIO for PXA27x MMC controller
-         */
-        pxa_gpio_mode(GPIO32_MMCCLK_MD);
-        pxa_gpio_mode(GPIO112_MMCCMD_MD);
-        pxa_gpio_mode(GPIO92_MMCDAT0_MD);
-        pxa_gpio_mode(GPIO109_MMCDAT1_MD);
-        pxa_gpio_mode(GPIO110_MMCDAT2_MD);
-        pxa_gpio_mode(GPIO111_MMCDAT3_MD);
-
         err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
                              "MMC card detect", data);
         if (err)
@@ -241,8 +339,6 @@ static struct pxamci_platform_data pcm990_mci_platform_data = {
  */
 static int pcm990_ohci_init(struct device *dev)
 {
-        pxa_gpio_mode(PCM990_USB_OVERCURRENT);
-        pxa_gpio_mode(PCM990_USB_PWR_EN);
         /*
          * disable USB port 2 and 3
          * power sense is active low
@@ -269,23 +365,27 @@ static struct pxaohci_platform_data pcm990_ohci_platform_data = {
  * PXA27x Camera specific stuff
  */
 #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
+static unsigned long pcm990_camera_pin_config[] = {
+        /* CIF */
+        GPIO98_CIF_DD_0,
+        GPIO105_CIF_DD_1,
+        GPIO104_CIF_DD_2,
+        GPIO103_CIF_DD_3,
+        GPIO95_CIF_DD_4,
+        GPIO94_CIF_DD_5,
+        GPIO93_CIF_DD_6,
+        GPIO108_CIF_DD_7,
+        GPIO107_CIF_DD_8,
+        GPIO106_CIF_DD_9,
+        GPIO42_CIF_MCLK,
+        GPIO45_CIF_PCLK,
+        GPIO43_CIF_FV,
+        GPIO44_CIF_LV,
+};
+
 static int pcm990_pxacamera_init(struct device *dev)
 {
-        pxa_gpio_mode(GPIO98_CIF_DD_0_MD);
-        pxa_gpio_mode(GPIO105_CIF_DD_1_MD);
-        pxa_gpio_mode(GPIO104_CIF_DD_2_MD);
-        pxa_gpio_mode(GPIO103_CIF_DD_3_MD);
-        pxa_gpio_mode(GPIO95_CIF_DD_4_MD);
-        pxa_gpio_mode(GPIO94_CIF_DD_5_MD);
-        pxa_gpio_mode(GPIO93_CIF_DD_6_MD);
-        pxa_gpio_mode(GPIO108_CIF_DD_7_MD);
-        pxa_gpio_mode(GPIO107_CIF_DD_8_MD);
-        pxa_gpio_mode(GPIO106_CIF_DD_9_MD);
-        pxa_gpio_mode(GPIO42_CIF_MCLK_MD);
-        pxa_gpio_mode(GPIO45_CIF_PCLK_MD);
-        pxa_gpio_mode(GPIO43_CIF_FV_MD);
-        pxa_gpio_mode(GPIO44_CIF_LV_MD);
-
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
         return 0;
 }
 
@@ -333,36 +433,6 @@ static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
 #endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
 
 /*
- * AC97 support
- * Note: The connected AC97 mixer also reports interrupts at PCM990_AC97_IRQ
- */
-static struct resource pxa27x_ac97_resources[] = {
-        [0] = {
-                .start  = 0x40500000,
-                .end    = 0x40500000 + 0xfff,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_AC97,
-                .end    = IRQ_AC97,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static u64 pxa_ac97_dmamask = 0xffffffffUL;
-
-static struct platform_device pxa27x_device_ac97 = {
-        .name           = "pxa2xx-ac97",
-        .id             = -1,
-        .dev            = {
-                .dma_mask = &pxa_ac97_dmamask,
-                .coherent_dma_mask = 0xffffffff,
-        },
-        .num_resources  = ARRAY_SIZE(pxa27x_ac97_resources),
-        .resource       = pxa27x_ac97_resources,
-};
-
-/*
  * enable generic access to the base board control CPLDs U6 and U7
  */
 static struct map_desc pcm990_io_desc[] __initdata = {
@@ -387,13 +457,18 @@ static struct map_desc pcm990_io_desc[] __initdata = {
  */
 void __init pcm990_baseboard_init(void)
 {
+        pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
+
         /* register CPLD access */
-        iotable_init(pcm990_io_desc, ARRAY_SIZE(pcm990_io_desc));
+        iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));
 
         /* register CPLD's IRQ controller */
         pcm990_init_irq();
 
-        platform_device_register(&pxa27x_device_ac97);
+#ifndef CONFIG_PCM990_DISPLAY_NONE
+        set_pxa_fb_info(&pcm990_fbinfo);
+#endif
+        platform_device_register(&pcm990_backlight_device);
 
         /* MMC */
         pxa_set_mci_info(&pcm990_mci_platform_data);
@@ -402,13 +477,13 @@ void __init pcm990_baseboard_init(void)
         pxa_set_ohci_info(&pcm990_ohci_platform_data);
 
         pxa_set_i2c_info(NULL);
+        pxa_set_ac97_info(NULL);
 
 #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
         pxa_set_camera_info(&pcm990_pxacamera_platform_data);
 
-        i2c_register_board_info(0, pcm990_i2c_devices,
-                ARRAY_SIZE(pcm990_i2c_devices));
+        i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
 #endif
 
-        printk(KERN_INFO"PCM-990 Evaluation baseboard initialized\n");
+        printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
 }
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 0b30f25cff3c..39612cfa0b4d 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -32,6 +32,7 @@
 #include <asm/mach/irq.h>
 
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/pxa2xx-gpio.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/udc.h>
@@ -266,6 +267,7 @@ static void poodle_irda_transceiver_mode(struct device *dev, int mode)
         } else {
                 GPCR(POODLE_GPIO_IR_ON) = GPIO_bit(POODLE_GPIO_IR_ON);
         }
+        pxa2xx_transceiver_mode(dev, mode);
 }
 
 static struct pxaficp_platform_data poodle_ficp_platform_data = {
diff --git a/arch/arm/mach-pxa/pwm.c b/arch/arm/mach-pxa/pwm.c
new file mode 100644
index 000000000000..ce28cd9fed16
--- /dev/null
+++ b/arch/arm/mach-pxa/pwm.c
@@ -0,0 +1,319 @@
+/*
+ * linux/arch/arm/mach-pxa/pwm.c
+ *
+ * simple driver for PWM (Pulse Width Modulator) controller
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * 2008-02-13   initial version
+ *              eric miao <eric.miao@marvell.com>
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/pwm.h>
+
+#include <asm/div64.h>
+#include <asm/arch/pxa-regs.h>
+
+/* PWM registers and bits definitions */
+#define PWMCR           (0x00)
+#define PWMDCR          (0x04)
+#define PWMPCR          (0x08)
+
+#define PWMCR_SD        (1 << 6)
+#define PWMDCR_FD       (1 << 10)
+
+struct pwm_device {
+        struct list_head        node;
+        struct platform_device *pdev;
+
+        const char      *label;
+        struct clk      *clk;
+        int             clk_enabled;
+        void __iomem    *mmio_base;
+
+        unsigned int    use_count;
+        unsigned int    pwm_id;
+};
+
+/*
+ * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
+ * duty_ns   = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
+ */
+int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
+{
+        unsigned long long c;
+        unsigned long period_cycles, prescale, pv, dc;
+
+        if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
+                return -EINVAL;
+
+        c = clk_get_rate(pwm->clk);
+        c = c * period_ns;
+        do_div(c, 1000000000);
+        period_cycles = c;
+
+        if (period_cycles < 0)
+                period_cycles = 1;
+        prescale = (period_cycles - 1) / 1024;
+        pv = period_cycles / (prescale + 1) - 1;
+
+        if (prescale > 63)
+                return -EINVAL;
+
+        if (duty_ns == period_ns)
+                dc = PWMDCR_FD;
+        else
+                dc = (pv + 1) * duty_ns / period_ns;
+
+        /* NOTE: the clock to PWM has to be enabled first
+         * before writing to the registers
+         */
+        clk_enable(pwm->clk);
+        __raw_writel(prescale, pwm->mmio_base + PWMCR);
+        __raw_writel(dc, pwm->mmio_base + PWMDCR);
+        __raw_writel(pv, pwm->mmio_base + PWMPCR);
+        clk_disable(pwm->clk);
+
+        return 0;
+}
+EXPORT_SYMBOL(pwm_config);
+
+int pwm_enable(struct pwm_device *pwm)
+{
+        int rc = 0;
+
+        if (!pwm->clk_enabled) {
+                rc = clk_enable(pwm->clk);
+                if (!rc)
+                        pwm->clk_enabled = 1;
+        }
+        return rc;
+}
+EXPORT_SYMBOL(pwm_enable);
+
+void pwm_disable(struct pwm_device *pwm)
+{
+        if (pwm->clk_enabled) {
+                clk_disable(pwm->clk);
+                pwm->clk_enabled = 0;
+        }
+}
+EXPORT_SYMBOL(pwm_disable);
+
+static DEFINE_MUTEX(pwm_lock);
+static LIST_HEAD(pwm_list);
+
+struct pwm_device *pwm_request(int pwm_id, const char *label)
+{
+        struct pwm_device *pwm;
+        int found = 0;
+
+        mutex_lock(&pwm_lock);
+
+        list_for_each_entry(pwm, &pwm_list, node) {
+                if (pwm->pwm_id == pwm_id) {
+                        found = 1;
+                        break;
+                }
+        }
+
+        if (found) {
+                if (pwm->use_count == 0) {
+                        pwm->use_count++;
+                        pwm->label = label;
+                } else
+                        pwm = ERR_PTR(-EBUSY);
+        } else
+                pwm = ERR_PTR(-ENOENT);
+
+        mutex_unlock(&pwm_lock);
+        return pwm;
+}
+EXPORT_SYMBOL(pwm_request);
+
+void pwm_free(struct pwm_device *pwm)
+{
+        mutex_lock(&pwm_lock);
+
+        if (pwm->use_count) {
+                pwm->use_count--;
+                pwm->label = NULL;
+        } else
+                pr_warning("PWM device already freed\n");
+
+        mutex_unlock(&pwm_lock);
+}
+EXPORT_SYMBOL(pwm_free);
+
+static inline void __add_pwm(struct pwm_device *pwm)
+{
+        mutex_lock(&pwm_lock);
+        list_add_tail(&pwm->node, &pwm_list);
+        mutex_unlock(&pwm_lock);
+}
+
+static struct pwm_device *pwm_probe(struct platform_device *pdev,
+                unsigned int pwm_id, struct pwm_device *parent_pwm)
+{
+        struct pwm_device *pwm;
+        struct resource *r;
+        int ret = 0;
+
+        pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL);
+        if (pwm == NULL) {
+                dev_err(&pdev->dev, "failed to allocate memory\n");
+                return ERR_PTR(-ENOMEM);
+        }
+
+        pwm->clk = clk_get(&pdev->dev, "PWMCLK");
+        if (IS_ERR(pwm->clk)) {
+                ret = PTR_ERR(pwm->clk);
+                goto err_free;
+        }
+        pwm->clk_enabled = 0;
+
+        pwm->use_count = 0;
+        pwm->pwm_id = pwm_id;
+        pwm->pdev = pdev;
+
+        if (parent_pwm != NULL) {
+                /* registers for the second PWM has offset of 0x10 */
+                pwm->mmio_base = parent_pwm->mmio_base + 0x10;
+                __add_pwm(pwm);
+                return pwm;
+        }
+
+        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (r == NULL) {
+                dev_err(&pdev->dev, "no memory resource defined\n");
+                ret = -ENODEV;
+                goto err_free_clk;
+        }
+
+        r = request_mem_region(r->start, r->end - r->start + 1, pdev->name);
+        if (r == NULL) {
+                dev_err(&pdev->dev, "failed to request memory resource\n");
+                ret = -EBUSY;
+                goto err_free_clk;
+        }
+
+        pwm->mmio_base = ioremap(r->start, r->end - r->start + 1);
+        if (pwm->mmio_base == NULL) {
+                dev_err(&pdev->dev, "failed to ioremap() registers\n");
+                ret = -ENODEV;
+                goto err_free_mem;
+        }
+
+        __add_pwm(pwm);
+        platform_set_drvdata(pdev, pwm);
+        return pwm;
+
+err_free_mem:
+        release_mem_region(r->start, r->end - r->start + 1);
+err_free_clk:
+        clk_put(pwm->clk);
+err_free:
+        kfree(pwm);
+        return ERR_PTR(ret);
+}
+
+static int __devinit pxa25x_pwm_probe(struct platform_device *pdev)
+{
+        struct pwm_device *pwm = pwm_probe(pdev, pdev->id, NULL);
+
+        if (IS_ERR(pwm))
+                return PTR_ERR(pwm);
+
+        return 0;
+}
+
+static int __devinit pxa27x_pwm_probe(struct platform_device *pdev)
+{
+        struct pwm_device *pwm;
+
+        pwm = pwm_probe(pdev, pdev->id, NULL);
+        if (IS_ERR(pwm))
+                return PTR_ERR(pwm);
+
+        pwm = pwm_probe(pdev, pdev->id + 2, pwm);
+        if (IS_ERR(pwm))
+                return PTR_ERR(pwm);
+
+        return 0;
+}
+
+static int __devexit pwm_remove(struct platform_device *pdev)
+{
+        struct pwm_device *pwm;
+        struct resource *r;
+
+        pwm = platform_get_drvdata(pdev);
+        if (pwm == NULL)
+                return -ENODEV;
+
+        mutex_lock(&pwm_lock);
+        list_del(&pwm->node);
+        mutex_unlock(&pwm_lock);
+
+        iounmap(pwm->mmio_base);
+
+        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        release_mem_region(r->start, r->end - r->start + 1);
+
+        clk_put(pwm->clk);
+        kfree(pwm);
+        return 0;
+}
+
+static struct platform_driver pxa25x_pwm_driver = {
+        .driver         = {
+                .name   = "pxa25x-pwm",
+        },
+        .probe          = pxa25x_pwm_probe,
+        .remove         = __devexit_p(pwm_remove),
+};
+
+static struct platform_driver pxa27x_pwm_driver = {
+        .driver         = {
+                .name   = "pxa27x-pwm",
+        },
+        .probe          = pxa27x_pwm_probe,
+        .remove         = __devexit_p(pwm_remove),
+};
+
+static int __init pwm_init(void)
+{
+        int ret = 0;
+
+        ret = platform_driver_register(&pxa25x_pwm_driver);
+        if (ret) {
+                printk(KERN_ERR "failed to register pxa25x_pwm_driver\n");
+                return ret;
+        }
+
+        ret = platform_driver_register(&pxa27x_pwm_driver);
+        if (ret) {
+                printk(KERN_ERR "failed to register pxa27x_pwm_driver\n");
+                return ret;
+        }
+
+        return ret;
+}
+arch_initcall(pwm_init);
+
+static void __exit pwm_exit(void)
+{
+        platform_driver_unregister(&pxa25x_pwm_driver);
+        platform_driver_unregister(&pxa27x_pwm_driver);
+}
+module_exit(pwm_exit);
+
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index e5b417d14bb0..c5b845b935bb 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -26,6 +26,7 @@
 #include <asm/hardware.h>
 #include <asm/arch/irqs.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/mfp-pxa25x.h>
 #include <asm/arch/pm.h>
 #include <asm/arch/dma.h>
@@ -108,6 +109,52 @@ static const struct clkops clk_pxa25x_lcd_ops = {
         .getrate        = clk_pxa25x_lcd_getrate,
 };
 
+static unsigned long gpio12_config_32k[] = {
+        GPIO12_32KHz,
+};
+
+static unsigned long gpio12_config_gpio[] = {
+        GPIO12_GPIO,
+};
+
+static void clk_gpio12_enable(struct clk *clk)
+{
+        pxa2xx_mfp_config(gpio12_config_32k, 1);
+}
+
+static void clk_gpio12_disable(struct clk *clk)
+{
+        pxa2xx_mfp_config(gpio12_config_gpio, 1);
+}
+
+static const struct clkops clk_pxa25x_gpio12_ops = {
+        .enable         = clk_gpio12_enable,
+        .disable        = clk_gpio12_disable,
+};
+
+static unsigned long gpio11_config_3m6[] = {
+        GPIO11_3_6MHz,
+};
+
+static unsigned long gpio11_config_gpio[] = {
+        GPIO11_GPIO,
+};
+
+static void clk_gpio11_enable(struct clk *clk)
+{
+        pxa2xx_mfp_config(gpio11_config_3m6, 1);
+}
+
+static void clk_gpio11_disable(struct clk *clk)
+{
+        pxa2xx_mfp_config(gpio11_config_gpio, 1);
+}
+
+static const struct clkops clk_pxa25x_gpio11_ops = {
+        .enable         = clk_gpio11_enable,
+        .disable        = clk_gpio11_disable,
+};
+
 /*
  * 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)
  * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
@@ -117,29 +164,40 @@ static struct clk pxa25x_hwuart_clk =
         INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev)
 ;
 
+/*
+ * PXA 2xx clock declarations. Order is important (see aliases below)
+ * Please be careful not to disrupt the ordering.
+ */
 static struct clk pxa25x_clks[] = {
         INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev),
         INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev),
         INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
         INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
-        INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev),
+        INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa25x_device_udc.dev),
+        INIT_CLK("GPIO11_CLK", &clk_pxa25x_gpio11_ops, 3686400, 0, NULL),
+        INIT_CLK("GPIO12_CLK", &clk_pxa25x_gpio12_ops, 32768, 0, NULL),
         INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
         INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
 
         INIT_CKEN("SSPCLK",  SSP, 3686400, 0, &pxa25x_device_ssp.dev),
         INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev),
         INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev),
+        INIT_CKEN("PWMCLK", PWM0, 3686400, 0, &pxa25x_device_pwm0.dev),
+        INIT_CKEN("PWMCLK", PWM1, 3686400, 0, &pxa25x_device_pwm1.dev),
 
         INIT_CKEN("AC97CLK",     AC97,     24576000, 0, NULL),
 
         /*
-        INIT_CKEN("PWMCLK",  PWM0, 3686400,  0, NULL),
-        INIT_CKEN("PWMCLK",  PWM0, 3686400,  0, NULL),
         INIT_CKEN("I2SCLK",  I2S,  14745600, 0, NULL),
         */
         INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
 };
 
+static struct clk pxa2xx_clk_aliases[] = {
+        INIT_CKOTHER("GPIO7_CLK", &pxa25x_clks[4], NULL),
+        INIT_CKOTHER("SA1111_CLK", &pxa25x_clks[5], NULL),
+};
+
 #ifdef CONFIG_PM
 
 #define SAVE(x)         sleep_save[SLEEP_SAVE_##x] = x
@@ -260,7 +318,7 @@ void __init pxa25x_init_irq(void)
 }
 
 static struct platform_device *pxa25x_devices[] __initdata = {
-        &pxa_device_udc,
+        &pxa25x_device_udc,
         &pxa_device_ffuart,
         &pxa_device_btuart,
         &pxa_device_stuart,
@@ -269,6 +327,8 @@ static struct platform_device *pxa25x_devices[] __initdata = {
         &pxa25x_device_ssp,
         &pxa25x_device_nssp,
         &pxa25x_device_assp,
+        &pxa25x_device_pwm0,
+        &pxa25x_device_pwm1,
 };
 
 static struct sys_device pxa25x_sysdev[] = {
@@ -284,7 +344,7 @@ static int __init pxa25x_init(void)
         int i, ret = 0;
 
         /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
-        if (cpu_is_pxa25x())
+        if (cpu_is_pxa255())
                 clks_register(&pxa25x_hwuart_clk, 1);
 
         if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
@@ -308,9 +368,11 @@ static int __init pxa25x_init(void)
         }
 
         /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
-        if (cpu_is_pxa25x())
+        if (cpu_is_pxa255())
                 ret = platform_device_register(&pxa_device_hwuart);
 
+        clks_register(pxa2xx_clk_aliases, ARRAY_SIZE(pxa2xx_clk_aliases));
+
         return ret;
 }
 
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 7e945836e129..d5d14ea33f27 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -146,7 +146,7 @@ static struct clk pxa27x_clks[] = {
 
         INIT_CKEN("I2SCLK",  I2S,  14682000, 0, &pxa_device_i2s.dev),
         INIT_CKEN("I2CCLK",  I2C,  32842000, 0, &pxa_device_i2c.dev),
-        INIT_CKEN("UDCCLK",  USB,  48000000, 5, &pxa_device_udc.dev),
+        INIT_CKEN("UDCCLK",  USB,  48000000, 5, &pxa27x_device_udc.dev),
         INIT_CKEN("MMCCLK",  MMC,  19500000, 0, &pxa_device_mci.dev),
         INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev),
 
@@ -157,12 +157,13 @@ static struct clk pxa27x_clks[] = {
         INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
         INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
         INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
+        INIT_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
+        INIT_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
 
         INIT_CKEN("AC97CLK",     AC97,     24576000, 0, NULL),
         INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL),
 
         /*
-        INIT_CKEN("PWMCLK",  PWM0, 13000000, 0, NULL),
         INIT_CKEN("MSLCLK",  MSL,  48000000, 0, NULL),
         INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL),
         INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL),
@@ -349,11 +350,14 @@ struct platform_device pxa27x_device_i2c_power = {
 
 void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info)
 {
+        local_irq_disable();
+        PCFR |= PCFR_PI2CEN;
+        local_irq_enable();
         pxa27x_device_i2c_power.dev.platform_data = info;
 }
 
 static struct platform_device *devices[] __initdata = {
-        &pxa_device_udc,
+        &pxa27x_device_udc,
         &pxa_device_ffuart,
         &pxa_device_btuart,
         &pxa_device_stuart,
@@ -363,6 +367,8 @@ static struct platform_device *devices[] __initdata = {
         &pxa27x_device_ssp1,
         &pxa27x_device_ssp2,
         &pxa27x_device_ssp3,
+        &pxa27x_device_pwm0,
+        &pxa27x_device_pwm1,
 };
 
 static struct sys_device pxa27x_sysdev[] = {
diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c
new file mode 100644
index 000000000000..d4f6415e8413
--- /dev/null
+++ b/arch/arm/mach-pxa/pxa2xx.c
@@ -0,0 +1,46 @@
+/*
+ * linux/arch/arm/mach-pxa/pxa2xx.c
+ *
+ * code specific to pxa2xx
+ *
+ * Copyright (C) 2008 Dmitry Baryshkov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+
+#include <asm/arch/mfp-pxa2xx.h>
+#include <asm/arch/mfp-pxa25x.h>
+#include <asm/arch/irda.h>
+
+static unsigned long pxa2xx_mfp_fir[] = {
+        GPIO46_FICP_RXD,
+        GPIO47_FICP_TXD,
+};
+
+static unsigned long pxa2xx_mfp_sir[] = {
+        GPIO46_STUART_RXD,
+        GPIO47_STUART_TXD,
+};
+
+static unsigned long pxa2xx_mfp_off[] = {
+        GPIO46_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO47_GPIO | MFP_LPM_DRIVE_LOW,
+};
+
+void pxa2xx_transceiver_mode(struct device *dev, int mode)
+{
+        if (mode & IR_OFF) {
+                pxa2xx_mfp_config(pxa2xx_mfp_off, ARRAY_SIZE(pxa2xx_mfp_off));
+        } else if (mode & IR_SIRMODE) {
+                pxa2xx_mfp_config(pxa2xx_mfp_sir, ARRAY_SIZE(pxa2xx_mfp_sir));
+        } else if (mode & IR_FIRMODE) {
+                pxa2xx_mfp_config(pxa2xx_mfp_fir, ARRAY_SIZE(pxa2xx_mfp_fir));
+        } else
+                BUG();
+}
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 0a0d3877f212..da92e9733886 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -15,10 +15,16 @@
 
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/platform_device.h>
 
 #include <asm/hardware.h>
+#include <asm/arch/pxa3xx-regs.h>
 #include <asm/arch/mfp-pxa300.h>
 
+#include "generic.h"
+#include "devices.h"
+#include "clock.h"
+
 static struct pxa3xx_mfp_addr_map pxa300_mfp_addr_map[] __initdata = {
 
         MFP_ADDR_X(GPIO0,   GPIO2,   0x00b4),
@@ -79,15 +85,26 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
         MFP_ADDR_END,
 };
 
+static struct clk common_clks[] = {
+        PXA3xx_CKEN("NANDCLK", NAND, 156000000, 0, &pxa3xx_device_nand.dev),
+};
+
+static struct clk pxa310_clks[] = {
+        PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
+};
+
 static int __init pxa300_init(void)
 {
         if (cpu_is_pxa300() || cpu_is_pxa310()) {
                 pxa3xx_init_mfp();
                 pxa3xx_mfp_init_addr(pxa300_mfp_addr_map);
+                clks_register(ARRAY_AND_SIZE(common_clks));
         }
 
-        if (cpu_is_pxa310())
+        if (cpu_is_pxa310()) {
                 pxa3xx_mfp_init_addr(pxa310_mfp_addr_map);
+                clks_register(ARRAY_AND_SIZE(pxa310_clks));
+        }
 
         return 0;
 }
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 74128eb8f8d0..c557c23a1efe 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -15,11 +15,17 @@
 
 #include <linux/module.h>
 #include <linux/kernel.h>
+#include <linux/platform_device.h>
 
 #include <asm/hardware.h>
 #include <asm/arch/mfp.h>
+#include <asm/arch/pxa3xx-regs.h>
 #include <asm/arch/mfp-pxa320.h>
 
+#include "generic.h"
+#include "devices.h"
+#include "clock.h"
+
 static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
 
         MFP_ADDR_X(GPIO0,  GPIO4,   0x0124),
@@ -74,16 +80,17 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
         MFP_ADDR_END,
 };
 
-static void __init pxa320_init_mfp(void)
-{
-        pxa3xx_init_mfp();
-        pxa3xx_mfp_init_addr(pxa320_mfp_addr_map);
-}
+static struct clk pxa320_clks[] = {
+        PXA3xx_CKEN("NANDCLK", NAND, 104000000, 0, &pxa3xx_device_nand.dev),
+};
 
 static int __init pxa320_init(void)
 {
-        if (cpu_is_pxa320())
-                pxa320_init_mfp();
+        if (cpu_is_pxa320()) {
+                pxa3xx_init_mfp();
+                pxa3xx_mfp_init_addr(pxa320_mfp_addr_map);
+                clks_register(ARRAY_AND_SIZE(pxa320_clks));
+        }
 
         return 0;
 }
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 644550bfa330..f491025a0c82 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -144,7 +144,7 @@ static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
         return hsio_clk;
 }
 
-static void clk_pxa3xx_cken_enable(struct clk *clk)
+void clk_pxa3xx_cken_enable(struct clk *clk)
 {
         unsigned long mask = 1ul << (clk->cken & 0x1f);
 
@@ -154,7 +154,7 @@ static void clk_pxa3xx_cken_enable(struct clk *clk)
                 CKENB |= mask;
 }
 
-static void clk_pxa3xx_cken_disable(struct clk *clk)
+void clk_pxa3xx_cken_disable(struct clk *clk)
 {
         unsigned long mask = 1ul << (clk->cken & 0x1f);
 
@@ -164,7 +164,7 @@ static void clk_pxa3xx_cken_disable(struct clk *clk)
                 CKENB &= ~mask;
 }
 
-static const struct clkops clk_pxa3xx_cken_ops = {
+const struct clkops clk_pxa3xx_cken_ops = {
         .enable         = clk_pxa3xx_cken_enable,
         .disable        = clk_pxa3xx_cken_disable,
 };
@@ -196,24 +196,6 @@ static const struct clkops clk_pout_ops = {
         .disable        = clk_pout_disable,
 };
 
-#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev)  \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
-                .ops    = &clk_pxa3xx_cken_ops,         \
-                .rate   = _rate,                        \
-                .cken   = CKEN_##_cken,                 \
-                .delay  = _delay,                       \
-        }
-
-#define PXA3xx_CK(_name, _cken, _ops, _dev)             \
-        {                                               \
-                .name   = _name,                        \
-                .dev    = _dev,                         \
-                .ops    = _ops,                         \
-                .cken   = CKEN_##_cken,                 \
-        }
-
 static struct clk pxa3xx_clks[] = {
         {
                 .name           = "CLK_POUT",
@@ -231,7 +213,7 @@ static struct clk pxa3xx_clks[] = {
         PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
 
         PXA3xx_CKEN("I2CCLK", I2C,  32842000, 0, &pxa_device_i2c.dev),
-        PXA3xx_CKEN("UDCCLK", UDC,  48000000, 5, &pxa_device_udc.dev),
+        PXA3xx_CKEN("UDCCLK", UDC,  48000000, 5, &pxa27x_device_udc.dev),
         PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev),
         PXA3xx_CKEN("KBDCLK", KEYPAD,  32768, 0, &pxa27x_device_keypad.dev),
 
@@ -239,10 +221,11 @@ static struct clk pxa3xx_clks[] = {
         PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
         PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
         PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
+        PXA3xx_CKEN("PWMCLK", PWM0, 13000000, 0, &pxa27x_device_pwm0.dev),
+        PXA3xx_CKEN("PWMCLK", PWM1, 13000000, 0, &pxa27x_device_pwm1.dev),
 
         PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev),
         PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev),
-        PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
 };
 
 #ifdef CONFIG_PM
@@ -520,7 +503,7 @@ void __init pxa3xx_init_irq(void)
  */
 
 static struct platform_device *devices[] __initdata = {
-        &pxa_device_udc,
+/*      &pxa_device_udc,        The UDC driver is PXA25x only */
         &pxa_device_ffuart,
         &pxa_device_btuart,
         &pxa_device_stuart,
@@ -530,6 +513,8 @@ static struct platform_device *devices[] __initdata = {
         &pxa27x_device_ssp2,
         &pxa27x_device_ssp3,
         &pxa3xx_device_ssp4,
+        &pxa27x_device_pwm0,
+        &pxa27x_device_pwm1,
 };
 
 static struct sys_device pxa3xx_sysdev[] = {
diff --git a/arch/arm/mach-pxa/pxa930.c b/arch/arm/mach-pxa/pxa930.c
new file mode 100644
index 000000000000..9503897d049c
--- /dev/null
+++ b/arch/arm/mach-pxa/pxa930.c
@@ -0,0 +1,190 @@
+/*
+ * linux/arch/arm/mach-pxa/pxa930.c
+ *
+ * Code specific to PXA930
+ *
+ * Copyright (C) 2007-2008 Marvell Internation Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/dma-mapping.h>
+
+#include <asm/hardware.h>
+#include <asm/arch/mfp-pxa930.h>
+
+static struct pxa3xx_mfp_addr_map pxa930_mfp_addr_map[] __initdata = {
+
+        MFP_ADDR(GPIO0, 0x02e0),
+        MFP_ADDR(GPIO1, 0x02dc),
+        MFP_ADDR(GPIO2, 0x02e8),
+        MFP_ADDR(GPIO3, 0x02d8),
+        MFP_ADDR(GPIO4, 0x02e4),
+        MFP_ADDR(GPIO5, 0x02ec),
+        MFP_ADDR(GPIO6, 0x02f8),
+        MFP_ADDR(GPIO7, 0x02fc),
+        MFP_ADDR(GPIO8, 0x0300),
+        MFP_ADDR(GPIO9, 0x02d4),
+        MFP_ADDR(GPIO10, 0x02f4),
+        MFP_ADDR(GPIO11, 0x02f0),
+        MFP_ADDR(GPIO12, 0x0304),
+        MFP_ADDR(GPIO13, 0x0310),
+        MFP_ADDR(GPIO14, 0x0308),
+        MFP_ADDR(GPIO15, 0x030c),
+        MFP_ADDR(GPIO16, 0x04e8),
+        MFP_ADDR(GPIO17, 0x04f4),
+        MFP_ADDR(GPIO18, 0x04f8),
+        MFP_ADDR(GPIO19, 0x04fc),
+        MFP_ADDR(GPIO20, 0x0518),
+        MFP_ADDR(GPIO21, 0x051c),
+        MFP_ADDR(GPIO22, 0x04ec),
+        MFP_ADDR(GPIO23, 0x0500),
+        MFP_ADDR(GPIO24, 0x04f0),
+        MFP_ADDR(GPIO25, 0x0504),
+        MFP_ADDR(GPIO26, 0x0510),
+        MFP_ADDR(GPIO27, 0x0514),
+        MFP_ADDR(GPIO28, 0x0520),
+        MFP_ADDR(GPIO29, 0x0600),
+        MFP_ADDR(GPIO30, 0x0618),
+        MFP_ADDR(GPIO31, 0x0610),
+        MFP_ADDR(GPIO32, 0x060c),
+        MFP_ADDR(GPIO33, 0x061c),
+        MFP_ADDR(GPIO34, 0x0620),
+        MFP_ADDR(GPIO35, 0x0628),
+        MFP_ADDR(GPIO36, 0x062c),
+        MFP_ADDR(GPIO37, 0x0630),
+        MFP_ADDR(GPIO38, 0x0634),
+        MFP_ADDR(GPIO39, 0x0638),
+        MFP_ADDR(GPIO40, 0x063c),
+        MFP_ADDR(GPIO41, 0x0614),
+        MFP_ADDR(GPIO42, 0x0624),
+        MFP_ADDR(GPIO43, 0x0608),
+        MFP_ADDR(GPIO44, 0x0604),
+        MFP_ADDR(GPIO45, 0x050c),
+        MFP_ADDR(GPIO46, 0x0508),
+        MFP_ADDR(GPIO47, 0x02bc),
+        MFP_ADDR(GPIO48, 0x02b4),
+        MFP_ADDR(GPIO49, 0x02b8),
+        MFP_ADDR(GPIO50, 0x02c8),
+        MFP_ADDR(GPIO51, 0x02c0),
+        MFP_ADDR(GPIO52, 0x02c4),
+        MFP_ADDR(GPIO53, 0x02d0),
+        MFP_ADDR(GPIO54, 0x02cc),
+        MFP_ADDR(GPIO55, 0x029c),
+        MFP_ADDR(GPIO56, 0x02a0),
+        MFP_ADDR(GPIO57, 0x0294),
+        MFP_ADDR(GPIO58, 0x0298),
+        MFP_ADDR(GPIO59, 0x02a4),
+        MFP_ADDR(GPIO60, 0x02a8),
+        MFP_ADDR(GPIO61, 0x02b0),
+        MFP_ADDR(GPIO62, 0x02ac),
+        MFP_ADDR(GPIO63, 0x0640),
+        MFP_ADDR(GPIO64, 0x065c),
+        MFP_ADDR(GPIO65, 0x0648),
+        MFP_ADDR(GPIO66, 0x0644),
+        MFP_ADDR(GPIO67, 0x0674),
+        MFP_ADDR(GPIO68, 0x0658),
+        MFP_ADDR(GPIO69, 0x0654),
+        MFP_ADDR(GPIO70, 0x0660),
+        MFP_ADDR(GPIO71, 0x0668),
+        MFP_ADDR(GPIO72, 0x0664),
+        MFP_ADDR(GPIO73, 0x0650),
+        MFP_ADDR(GPIO74, 0x066c),
+        MFP_ADDR(GPIO75, 0x064c),
+        MFP_ADDR(GPIO76, 0x0670),
+        MFP_ADDR(GPIO77, 0x0678),
+        MFP_ADDR(GPIO78, 0x067c),
+        MFP_ADDR(GPIO79, 0x0694),
+        MFP_ADDR(GPIO80, 0x069c),
+        MFP_ADDR(GPIO81, 0x06a0),
+        MFP_ADDR(GPIO82, 0x06a4),
+        MFP_ADDR(GPIO83, 0x0698),
+        MFP_ADDR(GPIO84, 0x06bc),
+        MFP_ADDR(GPIO85, 0x06b4),
+        MFP_ADDR(GPIO86, 0x06b0),
+        MFP_ADDR(GPIO87, 0x06c0),
+        MFP_ADDR(GPIO88, 0x06c4),
+        MFP_ADDR(GPIO89, 0x06ac),
+        MFP_ADDR(GPIO90, 0x0680),
+        MFP_ADDR(GPIO91, 0x0684),
+        MFP_ADDR(GPIO92, 0x0688),
+        MFP_ADDR(GPIO93, 0x0690),
+        MFP_ADDR(GPIO94, 0x068c),
+        MFP_ADDR(GPIO95, 0x06a8),
+        MFP_ADDR(GPIO96, 0x06b8),
+        MFP_ADDR(GPIO97, 0x0410),
+        MFP_ADDR(GPIO98, 0x0418),
+        MFP_ADDR(GPIO99, 0x041c),
+        MFP_ADDR(GPIO100, 0x0414),
+        MFP_ADDR(GPIO101, 0x0408),
+        MFP_ADDR(GPIO102, 0x0324),
+        MFP_ADDR(GPIO103, 0x040c),
+        MFP_ADDR(GPIO104, 0x0400),
+        MFP_ADDR(GPIO105, 0x0328),
+        MFP_ADDR(GPIO106, 0x0404),
+
+        MFP_ADDR(nXCVREN, 0x0204),
+        MFP_ADDR(DF_CLE_nOE, 0x020c),
+        MFP_ADDR(DF_nADV1_ALE, 0x0218),
+        MFP_ADDR(DF_SCLK_E, 0x0214),
+        MFP_ADDR(DF_SCLK_S, 0x0210),
+        MFP_ADDR(nBE0, 0x021c),
+        MFP_ADDR(nBE1, 0x0220),
+        MFP_ADDR(DF_nADV2_ALE, 0x0224),
+        MFP_ADDR(DF_INT_RnB, 0x0228),
+        MFP_ADDR(DF_nCS0, 0x022c),
+        MFP_ADDR(DF_nCS1, 0x0230),
+        MFP_ADDR(nLUA, 0x0254),
+        MFP_ADDR(nLLA, 0x0258),
+        MFP_ADDR(DF_nWE, 0x0234),
+        MFP_ADDR(DF_nRE_nOE, 0x0238),
+        MFP_ADDR(DF_ADDR0, 0x024c),
+        MFP_ADDR(DF_ADDR1, 0x0250),
+        MFP_ADDR(DF_ADDR2, 0x025c),
+        MFP_ADDR(DF_ADDR3, 0x0260),
+        MFP_ADDR(DF_IO0, 0x023c),
+        MFP_ADDR(DF_IO1, 0x0240),
+        MFP_ADDR(DF_IO2, 0x0244),
+        MFP_ADDR(DF_IO3, 0x0248),
+        MFP_ADDR(DF_IO4, 0x0264),
+        MFP_ADDR(DF_IO5, 0x0268),
+        MFP_ADDR(DF_IO6, 0x026c),
+        MFP_ADDR(DF_IO7, 0x0270),
+        MFP_ADDR(DF_IO8, 0x0274),
+        MFP_ADDR(DF_IO9, 0x0278),
+        MFP_ADDR(DF_IO10, 0x027c),
+        MFP_ADDR(DF_IO11, 0x0280),
+        MFP_ADDR(DF_IO12, 0x0284),
+        MFP_ADDR(DF_IO13, 0x0288),
+        MFP_ADDR(DF_IO14, 0x028c),
+        MFP_ADDR(DF_IO15, 0x0290),
+
+        MFP_ADDR(GSIM_UIO, 0x0314),
+        MFP_ADDR(GSIM_UCLK, 0x0318),
+        MFP_ADDR(GSIM_UDET, 0x031c),
+        MFP_ADDR(GSIM_nURST, 0x0320),
+
+        MFP_ADDR(PMIC_INT, 0x06c8),
+
+        MFP_ADDR(RDY, 0x0200),
+
+        MFP_ADDR_END,
+};
+
+static int __init pxa930_init(void)
+{
+        if (cpu_is_pxa930()) {
+                pxa3xx_init_mfp();
+                pxa3xx_mfp_init_addr(pxa930_mfp_addr_map);
+        }
+
+        return 0;
+}
+
+core_initcall(pxa930_init);
diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c
new file mode 100644
index 000000000000..9d39dea57ce2
--- /dev/null
+++ b/arch/arm/mach-pxa/reset.c
@@ -0,0 +1,96 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <asm/io.h>
+#include <asm/proc-fns.h>
+
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
+
+static void do_hw_reset(void);
+
+static int reset_gpio = -1;
+
+int init_gpio_reset(int gpio)
+{
+        int rc;
+
+        rc = gpio_request(gpio, "reset generator");
+        if (rc) {
+                printk(KERN_ERR "Can't request reset_gpio\n");
+                goto out;
+        }
+
+        rc = gpio_direction_input(gpio);
+        if (rc) {
+                printk(KERN_ERR "Can't configure reset_gpio for input\n");
+                gpio_free(gpio);
+                goto out;
+        }
+
+out:
+        if (!rc)
+                reset_gpio = gpio;
+
+        return rc;
+}
+
+/*
+ * Trigger GPIO reset.
+ * This covers various types of logic connecting gpio pin
+ * to RESET pins (nRESET or GPIO_RESET):
+ */
+static void do_gpio_reset(void)
+{
+        BUG_ON(reset_gpio == -1);
+
+        /* drive it low */
+        gpio_direction_output(reset_gpio, 0);
+        mdelay(2);
+        /* rising edge or drive high */
+        gpio_set_value(reset_gpio, 1);
+        mdelay(2);
+        /* falling edge */
+        gpio_set_value(reset_gpio, 0);
+
+        /* give it some time */
+        mdelay(10);
+
+        WARN_ON(1);
+        /* fallback */
+        do_hw_reset();
+}
+
+static void do_hw_reset(void)
+{
+        /* Initialize the watchdog and let it fire */
+        OWER = OWER_WME;
+        OSSR = OSSR_M3;
+        OSMR3 = OSCR + 368640;  /* ... in 100 ms */
+}
+
+void arch_reset(char mode)
+{
+        if (cpu_is_pxa2xx())
+                RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+
+        switch (mode) {
+        case 's':
+                /* Jump into ROM at address 0 */
+                cpu_reset(0);
+                break;
+        case 'h':
+                do_hw_reset();
+                break;
+        case 'g':
+                do_gpio_reset();
+                break;
+        }
+}
+
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
new file mode 100644
index 000000000000..d02bc6f8bb93
--- /dev/null
+++ b/arch/arm/mach-pxa/saar.c
@@ -0,0 +1,84 @@
+/*
+ *  linux/arch/arm/mach-pxa/saar.c
+ *
+ *  Support for the Marvell PXA930 Handheld Platform (aka SAAR)
+ *
+ *  Copyright (C) 2007-2008 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/smc91x.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/hardware.h>
+#include <asm/arch/pxa3xx-regs.h>
+#include <asm/arch/mfp-pxa930.h>
+
+#include "devices.h"
+#include "generic.h"
+
+/* SAAR MFP configurations */
+static mfp_cfg_t saar_mfp_cfg[] __initdata = {
+        /* Ethernet */
+        DF_nCS1_nCS3,
+        GPIO97_GPIO,
+};
+
+#define SAAR_ETH_PHYS   (0x14000000)
+
+static struct resource smc91x_resources[] = {
+        [0] = {
+                .start  = (SAAR_ETH_PHYS + 0x300),
+                .end    = (SAAR_ETH_PHYS + 0xfffff),
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
+                .end    = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        }
+};
+
+static struct smc91x_platdata saar_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
+static struct platform_device smc91x_device = {
+        .name           = "smc91x",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data = &saar_smc91x_info,
+        },
+};
+
+static void __init saar_init(void)
+{
+        /* initialize MFP configurations */
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(saar_mfp_cfg));
+
+        platform_device_register(&smc91x_device);
+}
+
+MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
+        /* Maintainer: Eric Miao <eric.miao@marvell.com> */
+        .phys_io        = 0x40000000,
+        .boot_params    = 0xa0000100,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = saar_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index e7d0fcd9b43f..762249c03ded 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -38,6 +38,7 @@
 #include <asm/arch/pxa-regs.h>
 #include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/pxa2xx-gpio.h>
+#include <asm/arch/pxa27x-udc.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/ohci.h>
@@ -450,6 +451,7 @@ static void spitz_irda_transceiver_mode(struct device *dev, int mode)
                 set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
         else
                 reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_IR_ON);
+        pxa2xx_transceiver_mode(dev, mode);
 }
 
 #ifdef CONFIG_MACH_AKITA
@@ -459,6 +461,7 @@ static void akita_irda_transceiver_mode(struct device *dev, int mode)
                 akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON);
         else
                 akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_IR_ON);
+        pxa2xx_transceiver_mode(dev, mode);
 }
 #endif
 
@@ -529,11 +532,7 @@ static struct platform_device *devices[] __initdata = {
 
 static void spitz_poweroff(void)
 {
-        pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT);
-        GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET);
-
-        mdelay(1000);
-        arm_machine_restart('h');
+        arm_machine_restart('g');
 }
 
 static void spitz_restart(char mode)
@@ -547,6 +546,7 @@ static void spitz_restart(char mode)
 
 static void __init common_init(void)
 {
+        init_gpio_reset(SPITZ_GPIO_ON_RESET);
         pm_power_off = spitz_poweroff;
         arm_pm_restart = spitz_restart;
 
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 23f050feb208..360354084ae4 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -26,6 +26,7 @@
 #include <asm/arch/sharpsl.h>
 #include <asm/arch/spitz.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/pxa2xx-gpio.h>
 #include "sharpsl.h"
 
@@ -207,7 +208,9 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = {
         .read_devdata     = spitzpm_read_devdata,
         .charger_wakeup   = spitz_charger_wakeup,
         .should_wakeup    = spitz_should_wakeup,
+#ifdef CONFIG_BACKLIGHT_CORGI
         .backlight_limit  = corgibl_limit_intensity,
+#endif
         .charge_on_volt   = SHARPSL_CHARGE_ON_VOLT,
         .charge_on_temp   = SHARPSL_CHARGE_ON_TEMP,
         .charge_acin_high = SHARPSL_CHARGE_ON_ACIN_HIGH,
@@ -229,6 +232,10 @@ static int __devinit spitzpm_init(void)
 {
         int ret;
 
+        if (!machine_is_spitz() && !machine_is_akita()
+                        && !machine_is_borzoi())
+                return -ENODEV;
+
         spitzpm_device = platform_device_alloc("sharpsl-pm", -1);
         if (!spitzpm_device)
                 return -ENOMEM;
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 0bb31982fb6f..89f38683787e 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -14,13 +14,6 @@
  *  IO-based SSP applications and allows easy port setup for DMA access.
  *
  *  Author: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
- *
- *  Revision history:
- *   22nd Aug 2003 Initial version.
- *   20th Dec 2004 Added ssp_config for changing port config without
- *                 closing the port.
- *    4th Aug 2005 Added option to disable irq handler registration and
- *                 cleaned up irq and clock detection.
  */
 
 #include <linux/module.h>
@@ -285,7 +278,7 @@ int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags)
                         goto out_region;
                 dev->irq = ssp->irq;
         } else
-                dev->irq = 0;
+                dev->irq = NO_IRQ;
 
         /* turn on SSP port clock */
         clk_enable(ssp->clk);
@@ -306,7 +299,8 @@ void ssp_exit(struct ssp_dev *dev)
         struct ssp_device *ssp = dev->ssp;
 
         ssp_disable(dev);
-        free_irq(dev->irq, dev);
+        if (dev->irq != NO_IRQ)
+                free_irq(dev->irq, dev);
         clk_disable(ssp->clk);
         ssp_free(ssp);
 }
@@ -360,6 +354,7 @@ static int __devinit ssp_probe(struct platform_device *pdev, int type)
                 dev_err(&pdev->dev, "failed to allocate memory");
                 return -ENOMEM;
         }
+        ssp->pdev = pdev;
 
         ssp->clk = clk_get(&pdev->dev, "SSPCLK");
         if (IS_ERR(ssp->clk)) {
diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S
index 167412e6bec8..40bb70eff3fe 100644
--- a/arch/arm/mach-pxa/standby.S
+++ b/arch/arm/mach-pxa/standby.S
@@ -14,6 +14,7 @@
 #include <asm/hardware.h>
 
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 
                 .text
 
@@ -35,20 +36,20 @@ ENTRY(pxa_cpu_standby)
 
 #ifdef CONFIG_PXA3xx
 
-#define MDCNFG          0x0000
-#define MDCNFG_DMCEN    (1 << 30)
-#define DDR_HCAL        0x0060
-#define DDR_HCAL_HCRNG  0x1f
-#define DDR_HCAL_HCPROG (1 << 28)
-#define DDR_HCAL_HCEN   (1 << 31)
-#define DMCIER          0x0070
-#define DMCIER_EDLP     (1 << 29)
-#define DMCISR          0x0078
-#define RCOMP           0x0100
-#define RCOMP_SWEVAL    (1 << 31)
+#define PXA3_MDCNFG             0x0000
+#define PXA3_MDCNFG_DMCEN       (1 << 30)
+#define PXA3_DDR_HCAL           0x0060
+#define PXA3_DDR_HCAL_HCRNG     0x1f
+#define PXA3_DDR_HCAL_HCPROG    (1 << 28)
+#define PXA3_DDR_HCAL_HCEN      (1 << 31)
+#define PXA3_DMCIER             0x0070
+#define PXA3_DMCIER_EDLP        (1 << 29)
+#define PXA3_DMCISR             0x0078
+#define PXA3_RCOMP              0x0100
+#define PXA3_RCOMP_SWEVAL       (1 << 31)
 
 ENTRY(pm_enter_standby_start)
-        mov     r1, #0xf6000000         @ DMEMC_REG_BASE (MDCNFG)
+        mov     r1, #0xf6000000                 @ DMEMC_REG_BASE (PXA3_MDCNFG)
         add     r1, r1, #0x00100000
 
         /*
@@ -59,54 +60,54 @@ ENTRY(pm_enter_standby_start)
          * This also means that only the dynamic memory controller
          * can be reliably accessed in the code following standby.
          */
-        ldr     r2, [r1]                @ Dummy read MDCNFG
+        ldr     r2, [r1]                        @ Dummy read PXA3_MDCNFG
 
         mcr     p14, 0, r0, c7, c0, 0
         .rept   8
         nop
         .endr
 
-        ldr     r0, [r1, #DDR_HCAL]     @ Clear (and wait for) HCEN
-        bic     r0, r0, #DDR_HCAL_HCEN
-        str     r0, [r1, #DDR_HCAL]
-1:      ldr     r0, [r1, #DDR_HCAL]
-        tst     r0, #DDR_HCAL_HCEN
+        ldr     r0, [r1, #PXA3_DDR_HCAL]        @ Clear (and wait for) HCEN
+        bic     r0, r0, #PXA3_DDR_HCAL_HCEN
+        str     r0, [r1, #PXA3_DDR_HCAL]
+1:      ldr     r0, [r1, #PXA3_DDR_HCAL]
+        tst     r0, #PXA3_DDR_HCAL_HCEN
         bne     1b
 
-        ldr     r0, [r1, #RCOMP]        @ Initiate RCOMP
-        orr     r0, r0, #RCOMP_SWEVAL
-        str     r0, [r1, #RCOMP]
+        ldr     r0, [r1, #PXA3_RCOMP]           @ Initiate RCOMP
+        orr     r0, r0, #PXA3_RCOMP_SWEVAL
+        str     r0, [r1, #PXA3_RCOMP]
 
-        mov     r0, #~0                 @ Clear interrupts
-        str     r0, [r1, #DMCISR]
+        mov     r0, #~0                         @ Clear interrupts
+        str     r0, [r1, #PXA3_DMCISR]
 
-        ldr     r0, [r1, #DMCIER]       @ set DMIER[EDLP]
-        orr     r0, r0, #DMCIER_EDLP
-        str     r0, [r1, #DMCIER]
+        ldr     r0, [r1, #PXA3_DMCIER]          @ set DMIER[EDLP]
+        orr     r0, r0, #PXA3_DMCIER_EDLP
+        str     r0, [r1, #PXA3_DMCIER]
 
-        ldr     r0, [r1, #DDR_HCAL]     @ clear HCRNG, set HCPROG, HCEN
-        bic     r0, r0, #DDR_HCAL_HCRNG
-        orr     r0, r0, #DDR_HCAL_HCEN | DDR_HCAL_HCPROG
-        str     r0, [r1, #DDR_HCAL]
+        ldr     r0, [r1, #PXA3_DDR_HCAL]        @ clear HCRNG, set HCPROG, HCEN
+        bic     r0, r0, #PXA3_DDR_HCAL_HCRNG
+        orr     r0, r0, #PXA3_DDR_HCAL_HCEN | PXA3_DDR_HCAL_HCPROG
+        str     r0, [r1, #PXA3_DDR_HCAL]
 
-1:      ldr     r0, [r1, #DMCISR]
-        tst     r0, #DMCIER_EDLP
+1:      ldr     r0, [r1, #PXA3_DMCISR]
+        tst     r0, #PXA3_DMCIER_EDLP
         beq     1b
 
-        ldr     r0, [r1, #MDCNFG]       @ set MDCNFG[DMCEN]
-        orr     r0, r0, #MDCNFG_DMCEN
-        str     r0, [r1, #MDCNFG]
-1:      ldr     r0, [r1, #MDCNFG]
-        tst     r0, #MDCNFG_DMCEN
+        ldr     r0, [r1, #PXA3_MDCNFG]          @ set PXA3_MDCNFG[DMCEN]
+        orr     r0, r0, #PXA3_MDCNFG_DMCEN
+        str     r0, [r1, #PXA3_MDCNFG]
+1:      ldr     r0, [r1, #PXA3_MDCNFG]
+        tst     r0, #PXA3_MDCNFG_DMCEN
         beq     1b
 
-        ldr     r0, [r1, #DDR_HCAL]     @ set DDR_HCAL[HCRNG]
+        ldr     r0, [r1, #PXA3_DDR_HCAL]        @ set PXA3_DDR_HCAL[HCRNG]
         orr     r0, r0, #2 @ HCRNG
-        str     r0, [r1, #DDR_HCAL]
+        str     r0, [r1, #PXA3_DDR_HCAL]
 
-        ldr     r0, [r1, #DMCIER]       @ Clear the interrupt
+        ldr     r0, [r1, #PXA3_DMCIER]          @ Clear the interrupt
         bic     r0, r0, #0x20000000
-        str     r0, [r1, #DMCIER]
+        str     r0, [r1, #PXA3_DMCIER]
 
         mov     pc, lr
 ENTRY(pm_enter_standby_end)
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
new file mode 100644
index 000000000000..ac283507e423
--- /dev/null
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -0,0 +1,84 @@
+/*
+ *  linux/arch/arm/mach-pxa/tavorevb.c
+ *
+ *  Support for the Marvell PXA930 Evaluation Board
+ *
+ *  Copyright (C) 2007-2008 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+#include <linux/smc91x.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/hardware.h>
+#include <asm/arch/pxa3xx-regs.h>
+#include <asm/arch/mfp-pxa930.h>
+
+#include "devices.h"
+#include "generic.h"
+
+/* Tavor EVB MFP configurations */
+static mfp_cfg_t tavorevb_mfp_cfg[] __initdata = {
+        /* Ethernet */
+        DF_nCS1_nCS3,
+        GPIO47_GPIO,
+};
+
+#define TAVOREVB_ETH_PHYS       (0x14000000)
+
+static struct resource smc91x_resources[] = {
+        [0] = {
+                .start  = (TAVOREVB_ETH_PHYS + 0x300),
+                .end    = (TAVOREVB_ETH_PHYS + 0xfffff),
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)),
+                .end    = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)),
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        }
+};
+
+static struct smc91x_platdata tavorevb_smc91x_info = {
+        .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
+static struct platform_device smc91x_device = {
+        .name           = "smc91x",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data = &tavorevb_smc91x_info,
+        },
+};
+
+static void __init tavorevb_init(void)
+{
+        /* initialize MFP configurations */
+        pxa3xx_mfp_config(ARRAY_AND_SIZE(tavorevb_mfp_cfg));
+
+        platform_device_register(&smc91x_device);
+}
+
+MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
+        /* Maintainer: Eric Miao <eric.miao@marvell.com> */
+        .phys_io        = 0x40000000,
+        .boot_params    = 0xa0000100,
+        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
+        .map_io         = pxa_map_io,
+        .init_irq       = pxa3xx_init_irq,
+        .timer          = &pxa_timer,
+        .init_machine   = tavorevb_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/tosa-bt.c b/arch/arm/mach-pxa/tosa-bt.c
new file mode 100644
index 000000000000..7d8505466e54
--- /dev/null
+++ b/arch/arm/mach-pxa/tosa-bt.c
@@ -0,0 +1,150 @@
+/*
+ * Bluetooth built-in chip control
+ *
+ * Copyright (c) 2008 Dmitry Baryshkov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/rfkill.h>
+
+#include <asm/arch/tosa_bt.h>
+
+static void tosa_bt_on(struct tosa_bt_data *data)
+{
+        gpio_set_value(data->gpio_reset, 0);
+        gpio_set_value(data->gpio_pwr, 1);
+        gpio_set_value(data->gpio_reset, 1);
+        mdelay(20);
+        gpio_set_value(data->gpio_reset, 0);
+}
+
+static void tosa_bt_off(struct tosa_bt_data *data)
+{
+        gpio_set_value(data->gpio_reset, 1);
+        mdelay(10);
+        gpio_set_value(data->gpio_pwr, 0);
+        gpio_set_value(data->gpio_reset, 0);
+}
+
+static int tosa_bt_toggle_radio(void *data, enum rfkill_state state)
+{
+        pr_info("BT_RADIO going: %s\n",
+                        state == RFKILL_STATE_ON ? "on" : "off");
+
+        if (state == RFKILL_STATE_ON) {
+                pr_info("TOSA_BT: going ON\n");
+                tosa_bt_on(data);
+        } else {
+                pr_info("TOSA_BT: going OFF\n");
+                tosa_bt_off(data);
+        }
+        return 0;
+}
+
+static int tosa_bt_probe(struct platform_device *dev)
+{
+        int rc;
+        struct rfkill *rfk;
+
+        struct tosa_bt_data *data = dev->dev.platform_data;
+
+        rc = gpio_request(data->gpio_reset, "Bluetooth reset");
+        if (rc)
+                goto err_reset;
+        rc = gpio_direction_output(data->gpio_reset, 0);
+        if (rc)
+                goto err_reset_dir;
+        rc = gpio_request(data->gpio_pwr, "Bluetooth power");
+        if (rc)
+                goto err_pwr;
+        rc = gpio_direction_output(data->gpio_pwr, 0);
+        if (rc)
+                goto err_pwr_dir;
+
+        rfk = rfkill_allocate(&dev->dev, RFKILL_TYPE_BLUETOOTH);
+        if (!rfk) {
+                rc = -ENOMEM;
+                goto err_rfk_alloc;
+        }
+
+        rfk->name = "tosa-bt";
+        rfk->toggle_radio = tosa_bt_toggle_radio;
+        rfk->data = data;
+#ifdef CONFIG_RFKILL_LEDS
+        rfk->led_trigger.name = "tosa-bt";
+#endif
+
+        rc = rfkill_register(rfk);
+        if (rc)
+                goto err_rfkill;
+
+        platform_set_drvdata(dev, rfk);
+
+        return 0;
+
+err_rfkill:
+        if (rfk)
+                rfkill_free(rfk);
+        rfk = NULL;
+err_rfk_alloc:
+        tosa_bt_off(data);
+err_pwr_dir:
+        gpio_free(data->gpio_pwr);
+err_pwr:
+err_reset_dir:
+        gpio_free(data->gpio_reset);
+err_reset:
+        return rc;
+}
+
+static int __devexit tosa_bt_remove(struct platform_device *dev)
+{
+        struct tosa_bt_data *data = dev->dev.platform_data;
+        struct rfkill *rfk = platform_get_drvdata(dev);
+
+        platform_set_drvdata(dev, NULL);
+
+        if (rfk)
+                rfkill_unregister(rfk);
+        rfk = NULL;
+
+        tosa_bt_off(data);
+
+        gpio_free(data->gpio_pwr);
+        gpio_free(data->gpio_reset);
+
+        return 0;
+}
+
+static struct platform_driver tosa_bt_driver = {
+        .probe = tosa_bt_probe,
+        .remove = __devexit_p(tosa_bt_remove),
+
+        .driver = {
+                .name = "tosa-bt",
+                .owner = THIS_MODULE,
+        },
+};
+
+
+static int __init tosa_bt_init(void)
+{
+        return platform_driver_register(&tosa_bt_driver);
+}
+
+static void __exit tosa_bt_exit(void)
+{
+        platform_driver_unregister(&tosa_bt_driver);
+}
+
+module_init(tosa_bt_init);
+module_exit(tosa_bt_exit);
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index ab4a9f579913..fea17ce6b55f 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -18,30 +18,31 @@
 #include <linux/major.h>
 #include <linux/fs.h>
 #include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/fb.h>
 #include <linux/mmc/host.h>
+#include <linux/mfd/tc6393xb.h>
+#include <linux/mfd/tmio.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
 #include <linux/pm.h>
-#include <linux/delay.h>
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/gpio.h>
+#include <linux/pda_power.h>
+#include <linux/rfkill.h>
 
 #include <asm/setup.h>
-#include <asm/memory.h>
 #include <asm/mach-types.h>
-#include <asm/hardware.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-#include <asm/arch/pxa-regs.h>
 #include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/mfp-pxa25x.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/i2c.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/udc.h>
+#include <asm/arch/tosa_bt.h>
 
 #include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
 #include <asm/arch/tosa.h>
 
 #include <asm/hardware/scoop.h>
@@ -86,7 +87,7 @@ static unsigned long tosa_pin_config[] = {
         GPIO6_MMC_CLK,
         GPIO8_MMC_CS0,
         GPIO9_GPIO, /* Detect */
-        // GPIO10 nSD_INT
+        GPIO10_GPIO, /* nSD_INT */
 
         /* CF */
         GPIO13_GPIO, /* CD_IRQ */
@@ -124,34 +125,34 @@ static unsigned long tosa_pin_config[] = {
         GPIO44_BTUART_CTS,
         GPIO45_BTUART_RTS,
 
-        /* IrDA */
-        GPIO46_STUART_RXD,
-        GPIO47_STUART_TXD,
-
         /* Keybd */
-        GPIO58_GPIO,
-        GPIO59_GPIO,
-        GPIO60_GPIO,
-        GPIO61_GPIO,
-        GPIO62_GPIO,
-        GPIO63_GPIO,
-        GPIO64_GPIO,
-        GPIO65_GPIO,
-        GPIO66_GPIO,
-        GPIO67_GPIO,
-        GPIO68_GPIO,
-        GPIO69_GPIO,
-        GPIO70_GPIO,
-        GPIO71_GPIO,
-        GPIO72_GPIO,
-        GPIO73_GPIO,
-        GPIO74_GPIO,
-        GPIO75_GPIO,
+        GPIO58_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO59_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO60_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO61_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO62_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO63_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO64_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO65_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO66_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO67_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO68_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO69_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO70_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO71_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO72_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO73_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO74_GPIO | MFP_LPM_DRIVE_LOW,
+        GPIO75_GPIO | MFP_LPM_DRIVE_LOW,
 
         /* SPI */
         GPIO81_SSP2_CLK_OUT,
         GPIO82_SSP2_FRM_OUT,
         GPIO83_SSP2_TXD,
+
+        /* IrDA is managed in other way */
+        GPIO46_GPIO,
+        GPIO47_GPIO,
 };
 
 /*
@@ -249,6 +250,15 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void
 
         tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250);
 
+        err = gpio_request(TOSA_GPIO_nSD_DETECT, "MMC/SD card detect");
+        if (err) {
+                printk(KERN_ERR "tosa_mci_init: can't request nSD_DETECT gpio\n");
+                goto err_gpio_detect;
+        }
+        err = gpio_direction_input(TOSA_GPIO_nSD_DETECT);
+        if (err)
+                goto err_gpio_detect_dir;
+
         err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int,
                           IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
                                 "MMC/SD card detect", data);
@@ -257,7 +267,7 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void
                 goto err_irq;
         }
 
-        err = gpio_request(TOSA_GPIO_SD_WP, "sd_wp");
+        err = gpio_request(TOSA_GPIO_SD_WP, "SD Write Protect");
         if (err) {
                 printk(KERN_ERR "tosa_mci_init: can't request SD_WP gpio\n");
                 goto err_gpio_wp;
@@ -266,7 +276,7 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void
         if (err)
                 goto err_gpio_wp_dir;
 
-        err = gpio_request(TOSA_GPIO_PWR_ON, "sd_pwr");
+        err = gpio_request(TOSA_GPIO_PWR_ON, "SD Power");
         if (err) {
                 printk(KERN_ERR "tosa_mci_init: can't request SD_PWR gpio\n");
                 goto err_gpio_pwr;
@@ -275,8 +285,20 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void
         if (err)
                 goto err_gpio_pwr_dir;
 
+        err = gpio_request(TOSA_GPIO_nSD_INT, "SD Int");
+        if (err) {
+                printk(KERN_ERR "tosa_mci_init: can't request SD_PWR gpio\n");
+                goto err_gpio_int;
+        }
+        err = gpio_direction_input(TOSA_GPIO_nSD_INT);
+        if (err)
+                goto err_gpio_int_dir;
+
         return 0;
 
+err_gpio_int_dir:
+        gpio_free(TOSA_GPIO_nSD_INT);
+err_gpio_int:
 err_gpio_pwr_dir:
         gpio_free(TOSA_GPIO_PWR_ON);
 err_gpio_pwr:
@@ -285,6 +307,9 @@ err_gpio_wp_dir:
 err_gpio_wp:
         free_irq(TOSA_IRQ_GPIO_nSD_DETECT, data);
 err_irq:
+err_gpio_detect_dir:
+        gpio_free(TOSA_GPIO_nSD_DETECT);
+err_gpio_detect:
         return err;
 }
 
@@ -306,9 +331,11 @@ static int tosa_mci_get_ro(struct device *dev)
 
 static void tosa_mci_exit(struct device *dev, void *data)
 {
+        gpio_free(TOSA_GPIO_nSD_INT);
         gpio_free(TOSA_GPIO_PWR_ON);
         gpio_free(TOSA_GPIO_SD_WP);
         free_irq(TOSA_IRQ_GPIO_nSD_DETECT, data);
+        gpio_free(TOSA_GPIO_nSD_DETECT);
 }
 
 static struct pxamci_platform_data tosa_mci_platform_data = {
@@ -322,29 +349,55 @@ static struct pxamci_platform_data tosa_mci_platform_data = {
 /*
  * Irda
  */
+static void tosa_irda_transceiver_mode(struct device *dev, int mode)
+{
+        if (mode & IR_OFF) {
+                gpio_set_value(TOSA_GPIO_IR_POWERDWN, 0);
+                pxa2xx_transceiver_mode(dev, mode);
+                gpio_direction_output(TOSA_GPIO_IRDA_TX, 0);
+        } else {
+                pxa2xx_transceiver_mode(dev, mode);
+                gpio_set_value(TOSA_GPIO_IR_POWERDWN, 1);
+        }
+}
+
 static int tosa_irda_startup(struct device *dev)
 {
         int ret;
 
+        ret = gpio_request(TOSA_GPIO_IRDA_TX, "IrDA TX");
+        if (ret)
+                goto err_tx;
+        ret = gpio_direction_output(TOSA_GPIO_IRDA_TX, 0);
+        if (ret)
+                goto err_tx_dir;
+
         ret = gpio_request(TOSA_GPIO_IR_POWERDWN, "IrDA powerdown");
         if (ret)
-                return ret;
+                goto err_pwr;
 
         ret = gpio_direction_output(TOSA_GPIO_IR_POWERDWN, 0);
         if (ret)
-                gpio_free(TOSA_GPIO_IR_POWERDWN);
+                goto err_pwr_dir;
 
-        return ret;
-        }
+        tosa_irda_transceiver_mode(dev, IR_SIRMODE | IR_OFF);
 
-static void tosa_irda_shutdown(struct device *dev)
-{
+        return 0;
+
+err_pwr_dir:
         gpio_free(TOSA_GPIO_IR_POWERDWN);
+err_pwr:
+err_tx_dir:
+        gpio_free(TOSA_GPIO_IRDA_TX);
+err_tx:
+        return ret;
 }
 
-static void tosa_irda_transceiver_mode(struct device *dev, int mode)
+static void tosa_irda_shutdown(struct device *dev)
 {
-        gpio_set_value(TOSA_GPIO_IR_POWERDWN, !(mode & IR_OFF));
+        tosa_irda_transceiver_mode(dev, IR_SIRMODE | IR_OFF);
+        gpio_free(TOSA_GPIO_IR_POWERDWN);
+        gpio_free(TOSA_GPIO_IRDA_TX);
 }
 
 static struct pxaficp_platform_data tosa_ficp_platform_data = {
@@ -355,6 +408,70 @@ static struct pxaficp_platform_data tosa_ficp_platform_data = {
 };
 
 /*
+ * Tosa AC IN
+ */
+static int tosa_power_init(struct device *dev)
+{
+        int ret = gpio_request(TOSA_GPIO_AC_IN, "ac in");
+        if (ret)
+                goto err_gpio_req;
+
+        ret = gpio_direction_input(TOSA_GPIO_AC_IN);
+        if (ret)
+                goto err_gpio_in;
+
+        return 0;
+
+err_gpio_in:
+        gpio_free(TOSA_GPIO_AC_IN);
+err_gpio_req:
+        return ret;
+}
+
+static void tosa_power_exit(struct device *dev)
+{
+        gpio_free(TOSA_GPIO_AC_IN);
+}
+
+static int tosa_power_ac_online(void)
+{
+        return gpio_get_value(TOSA_GPIO_AC_IN) == 0;
+}
+
+static char *tosa_ac_supplied_to[] = {
+        "main-battery",
+        "backup-battery",
+        "jacket-battery",
+};
+
+static struct pda_power_pdata tosa_power_data = {
+        .init                   = tosa_power_init,
+        .is_ac_online           = tosa_power_ac_online,
+        .exit                   = tosa_power_exit,
+        .supplied_to            = tosa_ac_supplied_to,
+        .num_supplicants        = ARRAY_SIZE(tosa_ac_supplied_to),
+};
+
+static struct resource tosa_power_resource[] = {
+        {
+                .name           = "ac",
+                .start          = gpio_to_irq(TOSA_GPIO_AC_IN),
+                .end            = gpio_to_irq(TOSA_GPIO_AC_IN),
+                .flags          = IORESOURCE_IRQ |
+                                  IORESOURCE_IRQ_HIGHEDGE |
+                                  IORESOURCE_IRQ_LOWEDGE,
+        },
+};
+
+static struct platform_device tosa_power_device = {
+        .name                   = "pda-power",
+        .id                     = -1,
+        .dev.platform_data      = &tosa_power_data,
+        .resource               = tosa_power_resource,
+        .num_resources          = ARRAY_SIZE(tosa_power_resource),
+};
+
+/*
  * Tosa Keyboard
  */
 static struct platform_device tosakbd_device = {
@@ -439,7 +556,7 @@ static struct gpio_led tosa_gpio_leds[] = {
         },
         {
                 .name                   = "tosa:blue:bluetooth",
-                .default_trigger        = "none",
+                .default_trigger        = "tosa-bt",
                 .gpio                   = TOSA_GPIO_BT_LED,
         },
 };
@@ -457,21 +574,184 @@ static struct platform_device tosaled_device = {
         },
 };
 
+/*
+ * Toshiba Mobile IO Controller
+ */
+static struct resource tc6393xb_resources[] = {
+        [0] = {
+                .start  = TOSA_LCDC_PHYS,
+                .end    = TOSA_LCDC_PHYS + 0x3ffffff,
+                .flags  = IORESOURCE_MEM,
+        },
+
+        [1] = {
+                .start  = TOSA_IRQ_GPIO_TC6393XB_INT,
+                .end    = TOSA_IRQ_GPIO_TC6393XB_INT,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+
+static int tosa_tc6393xb_enable(struct platform_device *dev)
+{
+        int rc;
+
+        rc = gpio_request(TOSA_GPIO_TC6393XB_REST_IN, "tc6393xb #pclr");
+        if (rc)
+                goto err_req_pclr;
+        rc = gpio_request(TOSA_GPIO_TC6393XB_SUSPEND, "tc6393xb #suspend");
+        if (rc)
+                goto err_req_suspend;
+        rc = gpio_request(TOSA_GPIO_TC6393XB_L3V_ON, "l3v");
+        if (rc)
+                goto err_req_l3v;
+        rc = gpio_direction_output(TOSA_GPIO_TC6393XB_L3V_ON, 0);
+        if (rc)
+                goto err_dir_l3v;
+        rc = gpio_direction_output(TOSA_GPIO_TC6393XB_SUSPEND, 0);
+        if (rc)
+                goto err_dir_suspend;
+        rc = gpio_direction_output(TOSA_GPIO_TC6393XB_REST_IN, 0);
+        if (rc)
+                goto err_dir_pclr;
+
+        mdelay(1);
+
+        gpio_set_value(TOSA_GPIO_TC6393XB_SUSPEND, 1);
+
+        mdelay(10);
+
+        gpio_set_value(TOSA_GPIO_TC6393XB_REST_IN, 1);
+        gpio_set_value(TOSA_GPIO_TC6393XB_L3V_ON, 1);
+
+        return 0;
+err_dir_pclr:
+err_dir_suspend:
+err_dir_l3v:
+        gpio_free(TOSA_GPIO_TC6393XB_L3V_ON);
+err_req_l3v:
+        gpio_free(TOSA_GPIO_TC6393XB_SUSPEND);
+err_req_suspend:
+        gpio_free(TOSA_GPIO_TC6393XB_REST_IN);
+err_req_pclr:
+        return rc;
+}
+
+static int tosa_tc6393xb_disable(struct platform_device *dev)
+{
+        gpio_free(TOSA_GPIO_TC6393XB_L3V_ON);
+        gpio_free(TOSA_GPIO_TC6393XB_SUSPEND);
+        gpio_free(TOSA_GPIO_TC6393XB_REST_IN);
+
+        return 0;
+}
+
+static int tosa_tc6393xb_resume(struct platform_device *dev)
+{
+        gpio_set_value(TOSA_GPIO_TC6393XB_SUSPEND, 1);
+        mdelay(10);
+        gpio_set_value(TOSA_GPIO_TC6393XB_L3V_ON, 1);
+        mdelay(10);
+
+        return 0;
+}
+
+static int tosa_tc6393xb_suspend(struct platform_device *dev)
+{
+        gpio_set_value(TOSA_GPIO_TC6393XB_L3V_ON, 0);
+        gpio_set_value(TOSA_GPIO_TC6393XB_SUSPEND, 0);
+        return 0;
+}
+
+static struct mtd_partition tosa_nand_partition[] = {
+        {
+                .name   = "smf",
+                .offset = 0,
+                .size   = 7 * 1024 * 1024,
+        },
+        {
+                .name   = "root",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = 28 * 1024 * 1024,
+        },
+        {
+                .name   = "home",
+                .offset = MTDPART_OFS_APPEND,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
+
+static struct nand_bbt_descr tosa_tc6393xb_nand_bbt = {
+        .options        = 0,
+        .offs           = 4,
+        .len            = 2,
+        .pattern        = scan_ff_pattern
+};
+
+static struct tmio_nand_data tosa_tc6393xb_nand_config = {
+        .num_partitions = ARRAY_SIZE(tosa_nand_partition),
+        .partition      = tosa_nand_partition,
+        .badblock_pattern = &tosa_tc6393xb_nand_bbt,
+};
+
+static struct tc6393xb_platform_data tosa_tc6393xb_setup = {
+        .scr_pll2cr     = 0x0cc1,
+        .scr_gper       = 0x3300,
+        .scr_gpo_dsr    =
+                TOSA_TC6393XB_GPIO_BIT(TOSA_GPIO_CARD_VCC_ON),
+        .scr_gpo_doecr  =
+                TOSA_TC6393XB_GPIO_BIT(TOSA_GPIO_CARD_VCC_ON),
+
+        .irq_base       = IRQ_BOARD_START,
+        .gpio_base      = TOSA_TC6393XB_GPIO_BASE,
+
+        .enable         = tosa_tc6393xb_enable,
+        .disable        = tosa_tc6393xb_disable,
+        .suspend        = tosa_tc6393xb_suspend,
+        .resume         = tosa_tc6393xb_resume,
+
+        .nand_data      = &tosa_tc6393xb_nand_config,
+};
+
+
+static struct platform_device tc6393xb_device = {
+        .name   = "tc6393xb",
+        .id     = -1,
+        .dev    = {
+                .platform_data  = &tosa_tc6393xb_setup,
+        },
+        .num_resources  = ARRAY_SIZE(tc6393xb_resources),
+        .resource       = tc6393xb_resources,
+};
+
+static struct tosa_bt_data tosa_bt_data = {
+        .gpio_pwr       = TOSA_GPIO_BT_PWR_EN,
+        .gpio_reset     = TOSA_GPIO_BT_RESET,
+};
+
+static struct platform_device tosa_bt_device = {
+        .name   = "tosa-bt",
+        .id     = -1,
+        .dev.platform_data = &tosa_bt_data,
+};
+
+
 static struct platform_device *devices[] __initdata = {
         &tosascoop_device,
         &tosascoop_jc_device,
+        &tc6393xb_device,
+        &tosa_power_device,
         &tosakbd_device,
         &tosa_gpio_keys_device,
         &tosaled_device,
+        &tosa_bt_device,
 };
 
 static void tosa_poweroff(void)
 {
-        gpio_direction_output(TOSA_GPIO_ON_RESET, 0);
-        gpio_set_value(TOSA_GPIO_ON_RESET, 1);
-
-        mdelay(1000);
-        arm_machine_restart('h');
+        arm_machine_restart('g');
 }
 
 static void tosa_restart(char mode)
@@ -485,10 +765,14 @@ static void tosa_restart(char mode)
 
 static void __init tosa_init(void)
 {
+        int dummy;
+
         pxa2xx_mfp_config(ARRAY_AND_SIZE(tosa_pin_config));
         gpio_set_wake(MFP_PIN_GPIO1, 1);
         /* We can't pass to gpio-keys since it will drop the Reset altfunc */
 
+        init_gpio_reset(TOSA_GPIO_ON_RESET);
+
         pm_power_off = tosa_poweroff;
         arm_pm_restart = tosa_restart;
 
@@ -497,6 +781,10 @@ static void __init tosa_init(void)
         /* enable batt_fault */
         PMCR = 0x01;
 
+        dummy = gpiochip_reserve(TOSA_SCOOP_GPIO_BASE, 12);
+        dummy = gpiochip_reserve(TOSA_SCOOP_JC_GPIO_BASE, 12);
+        dummy = gpiochip_reserve(TOSA_TC6393XB_GPIO_BASE, 16);
+
         pxa_set_mci_info(&tosa_mci_platform_data);
         pxa_set_udc_info(&udc_info);
         pxa_set_ficp_info(&tosa_ficp_platform_data);
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c
index 931885d86b91..dee7bf36f013 100644
--- a/arch/arm/mach-pxa/trizeps4.c
+++ b/arch/arm/mach-pxa/trizeps4.c
@@ -41,6 +41,7 @@
 #include <asm/mach/flash.h>
 
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/pxa2xx-gpio.h>
 #include <asm/arch/trizeps4.h>
 #include <asm/arch/audio.h>
@@ -175,19 +176,10 @@ static struct platform_device uart_devices = {
         .resource       = NULL,
 };
 
-/********************************************************************************************
- * PXA270 ac97 sound codec
- ********************************************************************************************/
-static struct platform_device ac97_audio_device = {
-        .name           = "pxa2xx-ac97",
-        .id             = -1,
-};
-
 static struct platform_device * trizeps4_devices[] __initdata = {
         &flash_device,
         &uart_devices,
         &dm9000_device,
-        &ac97_audio_device,
 };
 
 #ifdef CONFIG_MACH_TRIZEPS4_CONXS
@@ -262,6 +254,7 @@ static void board_irda_mode(struct device *dev, int mode)
                 /* Fast mode */
                 trizeps_conxs_ircr |= ConXS_IRCR_MODE;
         }
+        pxa2xx_transceiver_mode(dev, mode);
         if (mode & IR_OFF) {
                 trizeps_conxs_ircr |= ConXS_IRCR_SD;
         } else {
@@ -438,6 +431,7 @@ static void __init trizeps4_init(void)
         pxa_set_mci_info(&trizeps4_mci_platform_data);
         pxa_set_ficp_info(&trizeps4_ficp_platform_data);
         pxa_set_ohci_info(&trizeps4_ohci_platform_data);
+        pxa_set_ac97_info(NULL);
 }
 
 static void __init trizeps4_map_io(void)
@@ -487,6 +481,7 @@ static void __init trizeps4_map_io(void)
         ConXS_BCR = trizeps_conxs_bcr;
 #endif
 
+#warning FIXME - accessing PM registers directly is deprecated
         PWER  = 0x00000002;
         PFER  = 0x00000000;
         PRER  = 0x00000002;
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 4a0028087ea6..8fca6d890b7d 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -18,23 +18,29 @@
 #include <linux/interrupt.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/pwm_backlight.h>
+#include <linux/smc91x.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware.h>
+#include <asm/arch/audio.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pxafb.h>
 #include <asm/arch/zylonite.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/pxa27x_keypad.h>
+#include <asm/arch/pxa3xx_nand.h>
 
+#include "devices.h"
 #include "generic.h"
 
 #define MAX_SLOTS       3
 struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS];
 
-int gpio_backlight;
 int gpio_eth_irq;
+int gpio_debug_led1;
+int gpio_debug_led2;
 
 int wm9713_irq;
 
@@ -54,18 +60,72 @@ static struct resource smc91x_resources[] = {
         }
 };
 
+static struct smc91x_platdata zylonite_smc91x_info = {
+        .flags  = SMC91X_USE_8BIT | SMC91X_USE_16BIT |
+                  SMC91X_NOWAIT | SMC91X_USE_DMA,
+};
+
 static struct platform_device smc91x_device = {
         .name           = "smc91x",
         .id             = 0,
         .num_resources  = ARRAY_SIZE(smc91x_resources),
         .resource       = smc91x_resources,
+        .dev            = {
+                .platform_data = &zylonite_smc91x_info,
+        },
 };
 
-#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
-static void zylonite_backlight_power(int on)
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+static struct gpio_led zylonite_debug_leds[] = {
+        [0] = {
+                .name                   = "zylonite:yellow:1",
+                .default_trigger        = "heartbeat",
+        },
+        [1] = {
+                .name                   = "zylonite:yellow:2",
+                .default_trigger        = "default-on",
+        },
+};
+
+static struct gpio_led_platform_data zylonite_debug_leds_info = {
+        .leds           = zylonite_debug_leds,
+        .num_leds       = ARRAY_SIZE(zylonite_debug_leds),
+};
+
+static struct platform_device zylonite_device_leds = {
+        .name           = "leds-gpio",
+        .id             = -1,
+        .dev            = {
+                .platform_data = &zylonite_debug_leds_info,
+        }
+};
+
+static void __init zylonite_init_leds(void)
 {
-        gpio_set_value(gpio_backlight, on);
+        zylonite_debug_leds[0].gpio = gpio_debug_led1;
+        zylonite_debug_leds[1].gpio = gpio_debug_led2;
+
+        platform_device_register(&zylonite_device_leds);
 }
+#else
+static inline void zylonite_init_leds(void) {}
+#endif
+
+#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
+static struct platform_pwm_backlight_data zylonite_backlight_data = {
+        .pwm_id         = 3,
+        .max_brightness = 100,
+        .dft_brightness = 100,
+        .pwm_period_ns  = 10000,
+};
+
+static struct platform_device zylonite_backlight_device = {
+        .name           = "pwm-backlight",
+        .dev            = {
+                .parent = &pxa27x_device_pwm1.dev,
+                .platform_data  = &zylonite_backlight_data,
+        },
+};
 
 static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
         .pixclock               = 110000,
@@ -98,7 +158,6 @@ static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
 static struct pxafb_mach_info zylonite_toshiba_lcd_info = {
         .num_modes              = 1,
         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
-        .pxafb_backlight_power  = zylonite_backlight_power,
 };
 
 static struct pxafb_mode_info sharp_ls037_modes[] = {
@@ -134,13 +193,11 @@ static struct pxafb_mach_info zylonite_sharp_lcd_info = {
         .modes                  = sharp_ls037_modes,
         .num_modes              = 2,
         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
-        .pxafb_backlight_power  = zylonite_backlight_power,
 };
 
 static void __init zylonite_init_lcd(void)
 {
-        /* backlight GPIO: output, default on */
-        gpio_direction_output(gpio_backlight, 1);
+        platform_device_register(&zylonite_backlight_device);
 
         if (lcd_id & 0x20) {
                 set_pxa_fb_info(&zylonite_sharp_lcd_info);
@@ -250,7 +307,7 @@ static void __init zylonite_init_mmc(void)
 static inline void zylonite_init_mmc(void) {}
 #endif
 
-#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES)
+#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
 static unsigned int zylonite_matrix_key_map[] = {
         /* KEY(row, col, key_code) */
         KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_C), KEY(0, 5, KEY_D),
@@ -315,6 +372,57 @@ static void __init zylonite_init_keypad(void)
 static inline void zylonite_init_keypad(void) {}
 #endif
 
+#if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE)
+static struct mtd_partition zylonite_nand_partitions[] = {
+        [0] = {
+                .name        = "Bootloader",
+                .offset      = 0,
+                .size        = 0x060000,
+                .mask_flags  = MTD_WRITEABLE, /* force read-only */
+        },
+        [1] = {
+                .name        = "Kernel",
+                .offset      = 0x060000,
+                .size        = 0x200000,
+                .mask_flags  = MTD_WRITEABLE, /* force read-only */
+        },
+        [2] = {
+                .name        = "Filesystem",
+                .offset      = 0x0260000,
+                .size        = 0x3000000,     /* 48M - rootfs */
+        },
+        [3] = {
+                .name        = "MassStorage",
+                .offset      = 0x3260000,
+                .size        = 0x3d40000,
+        },
+        [4] = {
+                .name        = "BBT",
+                .offset      = 0x6FA0000,
+                .size        = 0x80000,
+                .mask_flags  = MTD_WRITEABLE,  /* force read-only */
+        },
+        /* NOTE: we reserve some blocks at the end of the NAND flash for
+         * bad block management, and the max number of relocation blocks
+         * differs on different platforms. Please take care with it when
+         * defining the partition table.
+         */
+};
+
+static struct pxa3xx_nand_platform_data zylonite_nand_info = {
+        .enable_arbiter = 1,
+        .parts          = zylonite_nand_partitions,
+        .nr_parts       = ARRAY_SIZE(zylonite_nand_partitions),
+};
+
+static void __init zylonite_init_nand(void)
+{
+        pxa3xx_set_nand_info(&zylonite_nand_info);
+}
+#else
+static inline void zylonite_init_nand(void) {}
+#endif /* CONFIG_MTD_NAND_PXA3xx || CONFIG_MTD_NAND_PXA3xx_MODULE */
+
 static void __init zylonite_init(void)
 {
         /* board-processor specific initialization */
@@ -329,9 +437,12 @@ static void __init zylonite_init(void)
         smc91x_resources[1].end   = gpio_to_irq(gpio_eth_irq);
         platform_device_register(&smc91x_device);
 
+        pxa_set_ac97_info(NULL);
         zylonite_init_lcd();
         zylonite_init_mmc();
         zylonite_init_keypad();
+        zylonite_init_nand();
+        zylonite_init_leds();
 }
 
 MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)")
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 324fb9daae28..b28d46e081d3 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -16,9 +16,12 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/i2c/pca953x.h>
 
 #include <asm/gpio.h>
 #include <asm/arch/mfp-pxa300.h>
+#include <asm/arch/i2c.h>
 #include <asm/arch/zylonite.h>
 
 #include "generic.h"
@@ -50,6 +53,7 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
         GPIO75_LCD_BIAS,
         GPIO76_LCD_VSYNC,
         GPIO127_LCD_CS_N,
+        GPIO20_PWM3_OUT,        /* backlight */
 
         /* BTUART */
         GPIO111_UART2_RTS,
@@ -108,6 +112,10 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
         GPIO12_MMC2_DAT3,
         GPIO13_MMC2_CLK,
         GPIO14_MMC2_CMD,
+
+        /* Standard I2C */
+        GPIO21_I2C_SCL,
+        GPIO22_I2C_SDA,
 };
 
 static mfp_cfg_t pxa300_mfp_cfg[] __initdata = {
@@ -191,6 +199,39 @@ static void __init zylonite_detect_lcd_panel(void)
                 pxa3xx_mfp_write(lcd_detect_pins[i], mfpr_save[i]);
 }
 
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+static struct pca953x_platform_data gpio_exp[] = {
+        [0] = {
+                .gpio_base      = 128,
+        },
+        [1] = {
+                .gpio_base      = 144,
+        },
+};
+
+struct i2c_board_info zylonite_i2c_board_info[] = {
+        {
+                .type           = "pca9539",
+                .addr           = 0x74,
+                .platform_data  = &gpio_exp[0],
+                .irq            = IRQ_GPIO(18),
+        }, {
+                .type           = "pca9539",
+                .addr           = 0x75,
+                .platform_data  = &gpio_exp[1],
+                .irq            = IRQ_GPIO(19),
+        },
+};
+
+static void __init zylonite_init_i2c(void)
+{
+        pxa_set_i2c_info(NULL);
+        i2c_register_board_info(0, ARRAY_AND_SIZE(zylonite_i2c_board_info));
+}
+#else
+static inline void zylonite_init_i2c(void) {}
+#endif
+
 void __init zylonite_pxa300_init(void)
 {
         if (cpu_is_pxa300() || cpu_is_pxa310()) {
@@ -200,15 +241,14 @@ void __init zylonite_pxa300_init(void)
                 /* detect LCD panel */
                 zylonite_detect_lcd_panel();
 
-                /* GPIO pin assignment */
-                gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO20);
-
                 /* MMC card detect & write protect for controller 0 */
                 zylonite_mmc_slot[0].gpio_cd  = EXT_GPIO(0);
                 zylonite_mmc_slot[0].gpio_wp  = EXT_GPIO(2);
 
                 /* WM9713 IRQ */
                 wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26);
+
+                zylonite_init_i2c();
         }
 
         if (cpu_is_pxa300()) {
@@ -224,4 +264,8 @@ void __init zylonite_pxa300_init(void)
                 zylonite_mmc_slot[2].gpio_cd = EXT_GPIO(30);
                 zylonite_mmc_slot[2].gpio_wp = EXT_GPIO(31);
         }
+
+        /* GPIOs for Debug LEDs */
+        gpio_debug_led1 = EXT_GPIO(25);
+        gpio_debug_led2 = EXT_GPIO(26);
 }
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c
index 193d07903b06..2b7fba7a2921 100644
--- a/arch/arm/mach-pxa/zylonite_pxa320.c
+++ b/arch/arm/mach-pxa/zylonite_pxa320.c
@@ -49,6 +49,7 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
         GPIO15_2_LCD_LCLK,
         GPIO16_2_LCD_PCLK,
         GPIO17_2_LCD_BIAS,
+        GPIO14_PWM3_OUT,        /* backlight */
 
         /* FFUART */
         GPIO41_UART1_RXD | MFP_LPM_EDGE_FALL,
@@ -115,6 +116,10 @@ static mfp_cfg_t mfp_cfg[] __initdata = {
         GPIO27_MMC2_DAT3,
         GPIO28_MMC2_CLK,
         GPIO29_MMC2_CMD,
+
+        /* Debug LEDs */
+        GPIO1_2_GPIO | MFP_LPM_DRIVE_HIGH,
+        GPIO4_2_GPIO | MFP_LPM_DRIVE_HIGH,
 };
 
 #define NUM_LCD_DETECT_PINS     7
@@ -187,8 +192,9 @@ void __init zylonite_pxa320_init(void)
                 zylonite_detect_lcd_panel();
 
                 /* GPIO pin assignment */
-                gpio_backlight  = mfp_to_gpio(MFP_PIN_GPIO14);
                 gpio_eth_irq    = mfp_to_gpio(MFP_PIN_GPIO9);
+                gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2);
+                gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2);
 
                 /* MMC card detect & write protect for controller 0 */
                 zylonite_mmc_slot[0].gpio_cd  = mfp_to_gpio(MFP_PIN_GPIO1);
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index fc97fe57ee6f..b5809c51d13f 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -103,7 +103,7 @@ static void clk_gpio27_disable(void)
 }
 
 static struct clk clk_gpio27 = {
-        .name           = "GPIO27_CLK",
+        .name           = "SA1111_CLK",
         .rate           = 3686400,
         .enable         = clk_gpio27_enable,
         .disable        = clk_gpio27_disable,
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index f64b92557b11..2e27a8c8372b 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -76,3 +76,5 @@ obj-$(CONFIG_CPU_V7)		+= proc-v7.o
 
 obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o
 obj-$(CONFIG_CACHE_L2X0)        += cache-l2x0.o
+obj-$(CONFIG_CACHE_XSC3L2)      += cache-xsc3l2.o
+
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 0be5630ff568..8b8f564c3aa2 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Mon Jul 7 16:25:39 2008
+# Last update: Sun Jul 13 12:04:05 2008
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -1812,3 +1812,11 @@ jade			MACH_JADE		JADE			1821
 ks8695_softplc          MACH_KS8695_SOFTPLC     KS8695_SOFTPLC          1822
 gprisc4                 MACH_GPRISC4            GPRISC4                 1823
 stamp9260               MACH_STAMP9260          STAMP9260               1824
+smdk6430                MACH_SMDK6430           SMDK6430                1825
+smdkc100                MACH_SMDKC100           SMDKC100                1826
+tavorevb                MACH_TAVOREVB           TAVOREVB                1827
+saar                    MACH_SAAR               SAAR                    1828
+deister_eyecam          MACH_DEISTER_EYECAM     DEISTER_EYECAM          1829
+at91sam9m10ek           MACH_AT91SAM9M10EK      AT91SAM9M10EK           1830
+linkstation_produo      MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO      1831
+hit_b0                  MACH_HIT_B0             HIT_B0                  1832
diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c
index 01af44245b57..963c99322095 100644
--- a/arch/sh/boards/renesas/migor/setup.c
+++ b/arch/sh/boards/renesas/migor/setup.c
@@ -30,7 +30,6 @@
 
 static struct smc91x_platdata smc91x_info = {
         .flags = SMC91X_USE_16BIT,
-        .irq_flags = IRQF_TRIGGER_HIGH,
 };
 
 static struct resource smc91x_eth_resources[] = {
@@ -42,7 +41,7 @@ static struct resource smc91x_eth_resources[] = {
         },
         [1] = {
                 .start  = 32, /* IRQ0 */
-                .flags  = IORESOURCE_IRQ,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
         },
 };
 
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index eb69fbadc9cb..dde6ce963a19 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -39,7 +39,6 @@
 #include <asm/io.h>
 #include <asm/arch/i2c.h>
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
 
 struct pxa_i2c {
         spinlock_t              lock;
@@ -945,32 +944,6 @@ static const struct i2c_algorithm i2c_pxa_pio_algorithm = {
         .functionality  = i2c_pxa_functionality,
 };
 
-static void i2c_pxa_enable(struct platform_device *dev)
-{
-        if (cpu_is_pxa27x()) {
-                switch (dev->id) {
-                case 0:
-                        pxa_gpio_mode(GPIO117_I2CSCL_MD);
-                        pxa_gpio_mode(GPIO118_I2CSDA_MD);
-                        break;
-                case 1:
-                        local_irq_disable();
-                        PCFR |= PCFR_PI2CEN;
-                        local_irq_enable();
-                        break;
-                }
-        }
-}
-
-static void i2c_pxa_disable(struct platform_device *dev)
-{
-        if (cpu_is_pxa27x() && dev->id == 1) {
-                local_irq_disable();
-                PCFR &= ~PCFR_PI2CEN;
-                local_irq_enable();
-        }
-}
-
 #define res_len(r)              ((r)->end - (r)->start + 1)
 static int i2c_pxa_probe(struct platform_device *dev)
 {
@@ -1036,7 +1009,6 @@ static int i2c_pxa_probe(struct platform_device *dev)
 #endif
 
         clk_enable(i2c->clk);
-        i2c_pxa_enable(dev);
 
         if (plat) {
                 i2c->adap.class = plat->class;
@@ -1080,7 +1052,6 @@ eadapt:
                 free_irq(irq, i2c);
 ereqirq:
         clk_disable(i2c->clk);
-        i2c_pxa_disable(dev);
         iounmap(i2c->reg_base);
 eremap:
         clk_put(i2c->clk);
@@ -1103,7 +1074,6 @@ static int __exit i2c_pxa_remove(struct platform_device *dev)
 
         clk_disable(i2c->clk);
         clk_put(i2c->clk);
-        i2c_pxa_disable(dev);
 
         iounmap(i2c->reg_base);
         release_mem_region(i2c->iobase, i2c->iosize);
diff --git a/drivers/input/keyboard/tosakbd.c b/drivers/input/keyboard/tosakbd.c
index 94e444b4ee15..b12b7ee4b6aa 100644
--- a/drivers/input/keyboard/tosakbd.c
+++ b/drivers/input/keyboard/tosakbd.c
@@ -215,8 +215,6 @@ static int tosakbd_suspend(struct platform_device *dev, pm_message_t state)
         unsigned long flags;
 
         spin_lock_irqsave(&tosakbd->lock, flags);
-        PGSR1 = (PGSR1 & ~TOSA_GPIO_LOW_STROBE_BIT);
-        PGSR2 = (PGSR2 & ~TOSA_GPIO_HIGH_STROBE_BIT);
         tosakbd->suspended = 1;
         spin_unlock_irqrestore(&tosakbd->lock, flags);
 
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index ae96bd6242f2..0f6a885a6c19 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -5,6 +5,10 @@
 menu "Multifunction device drivers"
         depends on HAS_IOMEM
 
+config MFD_CORE
+        tristate
+        default n
+
 config MFD_SM501
         tristate "Support for Silicon Motion SM501"
          ---help---
@@ -38,6 +42,13 @@ config HTC_PASIC3
           HTC Magician devices, respectively. Actual functionality is
           handled by the leds-pasic3 and ds1wm drivers.
 
+config MFD_TC6393XB
+        bool "Support Toshiba TC6393XB"
+        depends on HAVE_GPIO_LIB
+        select MFD_CORE
+        help
+          Support for Toshiba Mobile IO Controller TC6393XB
+
 endmenu
 
 menu "Multimedia Capabilities Port drivers"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index eef4e26807df..33daa2f45dd8 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -8,6 +8,10 @@ obj-$(CONFIG_MFD_ASIC3)		+= asic3.o
 obj-$(CONFIG_HTC_EGPIO)         += htc-egpio.o
 obj-$(CONFIG_HTC_PASIC3)        += htc-pasic3.o
 
+obj-$(CONFIG_MFD_TC6393XB)      += tc6393xb.o
+
+obj-$(CONFIG_MFD_CORE)          += mfd-core.o
+
 obj-$(CONFIG_MCP)               += mcp-core.o
 obj-$(CONFIG_MCP_SA11X0)        += mcp-sa11x0.o
 obj-$(CONFIG_MCP_UCB1200)       += ucb1x00-core.o
diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c
new file mode 100644
index 000000000000..d7d88ce053a6
--- /dev/null
+++ b/drivers/mfd/mfd-core.c
@@ -0,0 +1,114 @@
+/*
+ * drivers/mfd/mfd-core.c
+ *
+ * core MFD support
+ * Copyright (c) 2006 Ian Molton
+ * Copyright (c) 2007,2008 Dmitry Baryshkov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/core.h>
+
+static int mfd_add_device(struct platform_device *parent,
+                const struct mfd_cell *cell,
+                struct resource *mem_base,
+                int irq_base)
+{
+        struct resource res[cell->num_resources];
+        struct platform_device *pdev;
+        int ret = -ENOMEM;
+        int r;
+
+        pdev = platform_device_alloc(cell->name, parent->id);
+        if (!pdev)
+                goto fail_alloc;
+
+        pdev->dev.parent = &parent->dev;
+
+        ret = platform_device_add_data(pdev,
+                        cell, sizeof(struct mfd_cell));
+        if (ret)
+                goto fail_device;
+
+        memzero(res, sizeof(res));
+        for (r = 0; r < cell->num_resources; r++) {
+                res[r].name = cell->resources[r].name;
+                res[r].flags = cell->resources[r].flags;
+
+                /* Find out base to use */
+                if (cell->resources[r].flags & IORESOURCE_MEM) {
+                        res[r].parent = mem_base;
+                        res[r].start = mem_base->start +
+                                cell->resources[r].start;
+                        res[r].end = mem_base->start +
+                                cell->resources[r].end;
+                } else if (cell->resources[r].flags & IORESOURCE_IRQ) {
+                        res[r].start = irq_base +
+                                cell->resources[r].start;
+                        res[r].end   = irq_base +
+                                cell->resources[r].end;
+                } else {
+                        res[r].parent = cell->resources[r].parent;
+                        res[r].start = cell->resources[r].start;
+                        res[r].end   = cell->resources[r].end;
+                }
+        }
+
+        platform_device_add_resources(pdev, res, cell->num_resources);
+
+        ret = platform_device_add(pdev);
+        if (ret)
+                goto fail_device;
+
+        return 0;
+
+/*      platform_device_del(pdev); */
+fail_device:
+        platform_device_put(pdev);
+fail_alloc:
+        return ret;
+}
+
+int mfd_add_devices(
+                struct platform_device *parent,
+                const struct mfd_cell *cells, int n_devs,
+                struct resource *mem_base,
+                int irq_base)
+{
+        int i;
+        int ret = 0;
+
+        for (i = 0; i < n_devs; i++) {
+                ret = mfd_add_device(parent, cells + i, mem_base, irq_base);
+                if (ret)
+                        break;
+        }
+
+        if (ret)
+                mfd_remove_devices(parent);
+
+        return ret;
+}
+EXPORT_SYMBOL(mfd_add_devices);
+
+static int mfd_remove_devices_fn(struct device *dev, void *unused)
+{
+        platform_device_unregister(
+                        container_of(dev, struct platform_device, dev));
+        return 0;
+}
+
+void mfd_remove_devices(struct platform_device *parent)
+{
+        device_for_each_child(&parent->dev, NULL, mfd_remove_devices_fn);
+}
+EXPORT_SYMBOL(mfd_remove_devices);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov");
diff --git a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c
new file mode 100644
index 000000000000..2d87501b6fd4
--- /dev/null
+++ b/drivers/mfd/tc6393xb.c
@@ -0,0 +1,600 @@
+/*
+ * Toshiba TC6393XB SoC support
+ *
+ * Copyright(c) 2005-2006 Chris Humbert
+ * Copyright(c) 2005 Dirk Opfer
+ * Copyright(c) 2005 Ian Molton <spyro@f2s.com>
+ * Copyright(c) 2007 Dmitry Baryshkov
+ *
+ * Based on code written by Sharp/Lineo for 2.4 kernels
+ * Based on locomo.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+#include <linux/clk.h>
+#include <linux/mfd/core.h>
+#include <linux/mfd/tmio.h>
+#include <linux/mfd/tc6393xb.h>
+#include <linux/gpio.h>
+
+#define SCR_REVID       0x08            /* b Revision ID        */
+#define SCR_ISR         0x50            /* b Interrupt Status   */
+#define SCR_IMR         0x52            /* b Interrupt Mask     */
+#define SCR_IRR         0x54            /* b Interrupt Routing  */
+#define SCR_GPER        0x60            /* w GP Enable          */
+#define SCR_GPI_SR(i)   (0x64 + (i))    /* b3 GPI Status        */
+#define SCR_GPI_IMR(i)  (0x68 + (i))    /* b3 GPI INT Mask      */
+#define SCR_GPI_EDER(i) (0x6c + (i))    /* b3 GPI Edge Detect Enable */
+#define SCR_GPI_LIR(i)  (0x70 + (i))    /* b3 GPI Level Invert  */
+#define SCR_GPO_DSR(i)  (0x78 + (i))    /* b3 GPO Data Set      */
+#define SCR_GPO_DOECR(i) (0x7c + (i))   /* b3 GPO Data OE Control */
+#define SCR_GP_IARCR(i) (0x80 + (i))    /* b3 GP Internal Active Register Control */
+#define SCR_GP_IARLCR(i) (0x84 + (i))   /* b3 GP INTERNAL Active Register Level Control */
+#define SCR_GPI_BCR(i)  (0x88 + (i))    /* b3 GPI Buffer Control */
+#define SCR_GPA_IARCR   0x8c            /* w GPa Internal Active Register Control */
+#define SCR_GPA_IARLCR  0x90            /* w GPa Internal Active Register Level Control */
+#define SCR_GPA_BCR     0x94            /* w GPa Buffer Control */
+#define SCR_CCR         0x98            /* w Clock Control      */
+#define SCR_PLL2CR      0x9a            /* w PLL2 Control       */
+#define SCR_PLL1CR      0x9c            /* l PLL1 Control       */
+#define SCR_DIARCR      0xa0            /* b Device Internal Active Register Control */
+#define SCR_DBOCR       0xa1            /* b Device Buffer Off Control */
+#define SCR_FER         0xe0            /* b Function Enable    */
+#define SCR_MCR         0xe4            /* w Mode Control       */
+#define SCR_CONFIG      0xfc            /* b Configuration Control */
+#define SCR_DEBUG       0xff            /* b Debug              */
+
+#define SCR_CCR_CK32K   BIT(0)
+#define SCR_CCR_USBCK   BIT(1)
+#define SCR_CCR_UNK1    BIT(4)
+#define SCR_CCR_MCLK_MASK       (7 << 8)
+#define SCR_CCR_MCLK_OFF        (0 << 8)
+#define SCR_CCR_MCLK_12 (1 << 8)
+#define SCR_CCR_MCLK_24 (2 << 8)
+#define SCR_CCR_MCLK_48 (3 << 8)
+#define SCR_CCR_HCLK_MASK       (3 << 12)
+#define SCR_CCR_HCLK_24 (0 << 12)
+#define SCR_CCR_HCLK_48 (1 << 12)
+
+#define SCR_FER_USBEN           BIT(0)  /* USB host enable */
+#define SCR_FER_LCDCVEN         BIT(1)  /* polysilicon TFT enable */
+#define SCR_FER_SLCDEN          BIT(2)  /* SLCD enable */
+
+#define SCR_MCR_RDY_MASK                (3 << 0)
+#define SCR_MCR_RDY_OPENDRAIN   (0 << 0)
+#define SCR_MCR_RDY_TRISTATE    (1 << 0)
+#define SCR_MCR_RDY_PUSHPULL    (2 << 0)
+#define SCR_MCR_RDY_UNK         BIT(2)
+#define SCR_MCR_RDY_EN          BIT(3)
+#define SCR_MCR_INT_MASK                (3 << 4)
+#define SCR_MCR_INT_OPENDRAIN   (0 << 4)
+#define SCR_MCR_INT_TRISTATE    (1 << 4)
+#define SCR_MCR_INT_PUSHPULL    (2 << 4)
+#define SCR_MCR_INT_UNK         BIT(6)
+#define SCR_MCR_INT_EN          BIT(7)
+/* bits 8 - 16 are unknown */
+
+#define TC_GPIO_BIT(i)          (1 << (i & 0x7))
+
+/*--------------------------------------------------------------------------*/
+
+struct tc6393xb {
+        void __iomem            *scr;
+
+        struct gpio_chip        gpio;
+
+        struct clk              *clk; /* 3,6 Mhz */
+
+        spinlock_t              lock; /* protects RMW cycles */
+
+        struct {
+                u8              fer;
+                u16             ccr;
+                u8              gpi_bcr[3];
+                u8              gpo_dsr[3];
+                u8              gpo_doecr[3];
+        } suspend_state;
+
+        struct resource         rscr;
+        struct resource         *iomem;
+        int                     irq;
+        int                     irq_base;
+};
+
+enum {
+        TC6393XB_CELL_NAND,
+};
+
+/*--------------------------------------------------------------------------*/
+
+static int tc6393xb_nand_enable(struct platform_device *nand)
+{
+        struct platform_device *dev = to_platform_device(nand->dev.parent);
+        struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
+        unsigned long flags;
+
+        spin_lock_irqsave(&tc6393xb->lock, flags);
+
+        /* SMD buffer on */
+        dev_dbg(&dev->dev, "SMD buffer on\n");
+        iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1));
+
+        spin_unlock_irqrestore(&tc6393xb->lock, flags);
+
+        return 0;
+}
+
+static struct resource __devinitdata tc6393xb_nand_resources[] = {
+        {
+                .name   = TMIO_NAND_CONFIG,
+                .start  = 0x0100,
+                .end    = 0x01ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = TMIO_NAND_CONTROL,
+                .start  = 0x1000,
+                .end    = 0x1007,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .name   = TMIO_NAND_IRQ,
+                .start  = IRQ_TC6393_NAND,
+                .end    = IRQ_TC6393_NAND,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct mfd_cell __devinitdata tc6393xb_cells[] = {
+        [TC6393XB_CELL_NAND] = {
+                .name = "tmio-nand",
+                .enable = tc6393xb_nand_enable,
+                .num_resources = ARRAY_SIZE(tc6393xb_nand_resources),
+                .resources = tc6393xb_nand_resources,
+        },
+};
+
+/*--------------------------------------------------------------------------*/
+
+static int tc6393xb_gpio_get(struct gpio_chip *chip,
+                unsigned offset)
+{
+        struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
+
+        /* XXX: does dsr also represent inputs? */
+        return ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8))
+                & TC_GPIO_BIT(offset);
+}
+
+static void __tc6393xb_gpio_set(struct gpio_chip *chip,
+                unsigned offset, int value)
+{
+        struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
+        u8  dsr;
+
+        dsr = ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8));
+        if (value)
+                dsr |= TC_GPIO_BIT(offset);
+        else
+                dsr &= ~TC_GPIO_BIT(offset);
+
+        iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8));
+}
+
+static void tc6393xb_gpio_set(struct gpio_chip *chip,
+                unsigned offset, int value)
+{
+        struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
+        unsigned long flags;
+
+        spin_lock_irqsave(&tc6393xb->lock, flags);
+
+        __tc6393xb_gpio_set(chip, offset, value);
+
+        spin_unlock_irqrestore(&tc6393xb->lock, flags);
+}
+
+static int tc6393xb_gpio_direction_input(struct gpio_chip *chip,
+                        unsigned offset)
+{
+        struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
+        unsigned long flags;
+        u8 doecr;
+
+        spin_lock_irqsave(&tc6393xb->lock, flags);
+
+        doecr = ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
+        doecr &= ~TC_GPIO_BIT(offset);
+        iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
+
+        spin_unlock_irqrestore(&tc6393xb->lock, flags);
+
+        return 0;
+}
+
+static int tc6393xb_gpio_direction_output(struct gpio_chip *chip,
+                        unsigned offset, int value)
+{
+        struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
+        unsigned long flags;
+        u8 doecr;
+
+        spin_lock_irqsave(&tc6393xb->lock, flags);
+
+        __tc6393xb_gpio_set(chip, offset, value);
+
+        doecr = ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
+        doecr |= TC_GPIO_BIT(offset);
+        iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
+
+        spin_unlock_irqrestore(&tc6393xb->lock, flags);
+
+        return 0;
+}
+
+static int tc6393xb_register_gpio(struct tc6393xb *tc6393xb, int gpio_base)
+{
+        tc6393xb->gpio.label = "tc6393xb";
+        tc6393xb->gpio.base = gpio_base;
+        tc6393xb->gpio.ngpio = 16;
+        tc6393xb->gpio.set = tc6393xb_gpio_set;
+        tc6393xb->gpio.get = tc6393xb_gpio_get;
+        tc6393xb->gpio.direction_input = tc6393xb_gpio_direction_input;
+        tc6393xb->gpio.direction_output = tc6393xb_gpio_direction_output;
+
+        return gpiochip_add(&tc6393xb->gpio);
+}
+
+/*--------------------------------------------------------------------------*/
+
+static void
+tc6393xb_irq(unsigned int irq, struct irq_desc *desc)
+{
+        struct tc6393xb *tc6393xb = get_irq_data(irq);
+        unsigned int isr;
+        unsigned int i, irq_base;
+
+        irq_base = tc6393xb->irq_base;
+
+        while ((isr = ioread8(tc6393xb->scr + SCR_ISR) &
+                                ~ioread8(tc6393xb->scr + SCR_IMR)))
+                for (i = 0; i < TC6393XB_NR_IRQS; i++) {
+                        if (isr & (1 << i))
+                                generic_handle_irq(irq_base + i);
+                }
+}
+
+static void tc6393xb_irq_ack(unsigned int irq)
+{
+}
+
+static void tc6393xb_irq_mask(unsigned int irq)
+{
+        struct tc6393xb *tc6393xb = get_irq_chip_data(irq);
+        unsigned long flags;
+        u8 imr;
+
+        spin_lock_irqsave(&tc6393xb->lock, flags);
+        imr = ioread8(tc6393xb->scr + SCR_IMR);
+        imr |= 1 << (irq - tc6393xb->irq_base);
+        iowrite8(imr, tc6393xb->scr + SCR_IMR);
+        spin_unlock_irqrestore(&tc6393xb->lock, flags);
+}
+
+static void tc6393xb_irq_unmask(unsigned int irq)
+{
+        struct tc6393xb *tc6393xb = get_irq_chip_data(irq);
+        unsigned long flags;
+        u8 imr;
+
+        spin_lock_irqsave(&tc6393xb->lock, flags);
+        imr = ioread8(tc6393xb->scr + SCR_IMR);
+        imr &= ~(1 << (irq - tc6393xb->irq_base));
+        iowrite8(imr, tc6393xb->scr + SCR_IMR);
+        spin_unlock_irqrestore(&tc6393xb->lock, flags);
+}
+
+static struct irq_chip tc6393xb_chip = {
+        .name   = "tc6393xb",
+        .ack    = tc6393xb_irq_ack,
+        .mask   = tc6393xb_irq_mask,
+        .unmask = tc6393xb_irq_unmask,
+};
+
+static void tc6393xb_attach_irq(struct platform_device *dev)
+{
+        struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
+        unsigned int irq, irq_base;
+
+        irq_base = tc6393xb->irq_base;
+
+        for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
+                set_irq_chip(irq, &tc6393xb_chip);
+                set_irq_chip_data(irq, tc6393xb);
+                set_irq_handler(irq, handle_edge_irq);
+                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+        }
+
+        set_irq_type(tc6393xb->irq, IRQT_FALLING);
+        set_irq_data(tc6393xb->irq, tc6393xb);
+        set_irq_chained_handler(tc6393xb->irq, tc6393xb_irq);
+}
+
+static void tc6393xb_detach_irq(struct platform_device *dev)
+{
+        struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
+        unsigned int irq, irq_base;
+
+        set_irq_chained_handler(tc6393xb->irq, NULL);
+        set_irq_data(tc6393xb->irq, NULL);
+
+        irq_base = tc6393xb->irq_base;
+
+        for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
+                set_irq_flags(irq, 0);
+                set_irq_chip(irq, NULL);
+                set_irq_chip_data(irq, NULL);
+        }
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int tc6393xb_hw_init(struct platform_device *dev)
+{
+        struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
+        struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
+        int i;
+
+        iowrite8(tc6393xb->suspend_state.fer,   tc6393xb->scr + SCR_FER);
+        iowrite16(tcpd->scr_pll2cr,             tc6393xb->scr + SCR_PLL2CR);
+        iowrite16(tc6393xb->suspend_state.ccr,  tc6393xb->scr + SCR_CCR);
+        iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN |
+                  SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN |
+                  BIT(15),                      tc6393xb->scr + SCR_MCR);
+        iowrite16(tcpd->scr_gper,               tc6393xb->scr + SCR_GPER);
+        iowrite8(0,                             tc6393xb->scr + SCR_IRR);
+        iowrite8(0xbf,                          tc6393xb->scr + SCR_IMR);
+
+        for (i = 0; i < 3; i++) {
+                iowrite8(tc6393xb->suspend_state.gpo_dsr[i],
+                                        tc6393xb->scr + SCR_GPO_DSR(i));
+                iowrite8(tc6393xb->suspend_state.gpo_doecr[i],
+                                        tc6393xb->scr + SCR_GPO_DOECR(i));
+                iowrite8(tc6393xb->suspend_state.gpi_bcr[i],
+                                        tc6393xb->scr + SCR_GPI_BCR(i));
+        }
+
+        return 0;
+}
+
+static int __devinit tc6393xb_probe(struct platform_device *dev)
+{
+        struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
+        struct tc6393xb *tc6393xb;
+        struct resource *iomem;
+        struct resource *rscr;
+        int retval, temp;
+        int i;
+
+        iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
+        if (!iomem)
+                return -EINVAL;
+
+        tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL);
+        if (!tc6393xb) {
+                retval = -ENOMEM;
+                goto err_kzalloc;
+        }
+
+        spin_lock_init(&tc6393xb->lock);
+
+        platform_set_drvdata(dev, tc6393xb);
+        tc6393xb->iomem = iomem;
+        tc6393xb->irq = platform_get_irq(dev, 0);
+        tc6393xb->irq_base = tcpd->irq_base;
+
+        tc6393xb->clk = clk_get(&dev->dev, "GPIO27_CLK" /* "CK3P6MI" */);
+        if (IS_ERR(tc6393xb->clk)) {
+                retval = PTR_ERR(tc6393xb->clk);
+                goto err_clk_get;
+        }
+
+        rscr = &tc6393xb->rscr;
+        rscr->name = "tc6393xb-core";
+        rscr->start = iomem->start;
+        rscr->end = iomem->start + 0xff;
+        rscr->flags = IORESOURCE_MEM;
+
+        retval = request_resource(iomem, rscr);
+        if (retval)
+                goto err_request_scr;
+
+        tc6393xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1);
+        if (!tc6393xb->scr) {
+                retval = -ENOMEM;
+                goto err_ioremap;
+        }
+
+        retval = clk_enable(tc6393xb->clk);
+        if (retval)
+                goto err_clk_enable;
+
+        retval = tcpd->enable(dev);
+        if (retval)
+                goto err_enable;
+
+        tc6393xb->suspend_state.fer = 0;
+        for (i = 0; i < 3; i++) {
+                tc6393xb->suspend_state.gpo_dsr[i] =
+                        (tcpd->scr_gpo_dsr >> (8 * i)) & 0xff;
+                tc6393xb->suspend_state.gpo_doecr[i] =
+                        (tcpd->scr_gpo_doecr >> (8 * i)) & 0xff;
+        }
+        /*
+         * It may be necessary to change this back to
+         * platform-dependant code
+         */
+        tc6393xb->suspend_state.ccr = SCR_CCR_UNK1 |
+                                        SCR_CCR_HCLK_48;
+
+        retval = tc6393xb_hw_init(dev);
+        if (retval)
+                goto err_hw_init;
+
+        printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n",
+                        ioread8(tc6393xb->scr + SCR_REVID),
+                        (unsigned long) iomem->start, tc6393xb->irq);
+
+        tc6393xb->gpio.base = -1;
+
+        if (tcpd->gpio_base >= 0) {
+                retval = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base);
+                if (retval)
+                        goto err_gpio_add;
+        }
+
+        if (tc6393xb->irq)
+                tc6393xb_attach_irq(dev);
+
+        tc6393xb_cells[TC6393XB_CELL_NAND].driver_data = tcpd->nand_data;
+
+        retval = mfd_add_devices(dev,
+                        tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells),
+                        iomem, tcpd->irq_base);
+
+        return 0;
+
+        if (tc6393xb->irq)
+                tc6393xb_detach_irq(dev);
+
+err_gpio_add:
+        if (tc6393xb->gpio.base != -1)
+                temp = gpiochip_remove(&tc6393xb->gpio);
+err_hw_init:
+        tcpd->disable(dev);
+err_clk_enable:
+        clk_disable(tc6393xb->clk);
+err_enable:
+        iounmap(tc6393xb->scr);
+err_ioremap:
+        release_resource(&tc6393xb->rscr);
+err_request_scr:
+        clk_put(tc6393xb->clk);
+err_clk_get:
+        kfree(tc6393xb);
+err_kzalloc:
+        return retval;
+}
+
+static int __devexit tc6393xb_remove(struct platform_device *dev)
+{
+        struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
+        struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
+        int ret;
+
+        mfd_remove_devices(dev);
+
+        if (tc6393xb->irq)
+                tc6393xb_detach_irq(dev);
+
+        if (tc6393xb->gpio.base != -1) {
+                ret = gpiochip_remove(&tc6393xb->gpio);
+                if (ret) {
+                        dev_err(&dev->dev, "Can't remove gpio chip: %d\n", ret);
+                        return ret;
+                }
+        }
+
+        ret = tcpd->disable(dev);
+
+        clk_disable(tc6393xb->clk);
+
+        iounmap(tc6393xb->scr);
+
+        release_resource(&tc6393xb->rscr);
+
+        platform_set_drvdata(dev, NULL);
+
+        clk_put(tc6393xb->clk);
+
+        kfree(tc6393xb);
+
+        return ret;
+}
+
+#ifdef CONFIG_PM
+static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state)
+{
+        struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
+        struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
+        int i;
+
+
+        tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR);
+        tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER);
+
+        for (i = 0; i < 3; i++) {
+                tc6393xb->suspend_state.gpo_dsr[i] =
+                        ioread8(tc6393xb->scr + SCR_GPO_DSR(i));
+                tc6393xb->suspend_state.gpo_doecr[i] =
+                        ioread8(tc6393xb->scr + SCR_GPO_DOECR(i));
+                tc6393xb->suspend_state.gpi_bcr[i] =
+                        ioread8(tc6393xb->scr + SCR_GPI_BCR(i));
+        }
+
+        return tcpd->suspend(dev);
+}
+
+static int tc6393xb_resume(struct platform_device *dev)
+{
+        struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
+        int ret = tcpd->resume(dev);
+
+        if (ret)
+                return ret;
+
+        return tc6393xb_hw_init(dev);
+}
+#else
+#define tc6393xb_suspend NULL
+#define tc6393xb_resume NULL
+#endif
+
+static struct platform_driver tc6393xb_driver = {
+        .probe = tc6393xb_probe,
+        .remove = __devexit_p(tc6393xb_remove),
+        .suspend = tc6393xb_suspend,
+        .resume = tc6393xb_resume,
+
+        .driver = {
+                .name = "tc6393xb",
+                .owner = THIS_MODULE,
+        },
+};
+
+static int __init tc6393xb_init(void)
+{
+        return platform_driver_register(&tc6393xb_driver);
+}
+
+static void __exit tc6393xb_exit(void)
+{
+        platform_driver_unregister(&tc6393xb_driver);
+}
+
+subsys_initcall(tc6393xb_init);
+module_exit(tc6393xb_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer");
+MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller");
+MODULE_ALIAS("platform:tc6393xb");
diff --git a/drivers/mtd/nand/cmx270_nand.c b/drivers/mtd/nand/cmx270_nand.c
index cb663ef245d5..fc8529bedfdf 100644
--- a/drivers/mtd/nand/cmx270_nand.c
+++ b/drivers/mtd/nand/cmx270_nand.c
@@ -20,9 +20,11 @@
 
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/gpio.h>
 
 #include <asm/io.h>
 #include <asm/irq.h>
+#include <asm/mach-types.h>
 
 #include <asm/arch/hardware.h>
 #include <asm/arch/pxa-regs.h>
@@ -30,20 +32,6 @@
 #define GPIO_NAND_CS    (11)
 #define GPIO_NAND_RB    (89)
 
-/* This macro needed to ensure in-order operation of GPIO and local
- * bus. Without both asm command and dummy uncached read there're
- * states when NAND access is broken. I've looked for such macro(s) in
- * include/asm-arm but found nothing approptiate.
- * dmac_clean_range is close, but is makes cache invalidation
- * unnecessary here and it cannot be used in module
- */
-#define DRAIN_WB() \
-        do { \
-                unsigned char dummy; \
-                asm volatile ("mcr p15, 0, r0, c7, c10, 4":::"r0"); \
-                dummy=*((unsigned char*)UNCACHED_ADDR); \
-        } while(0)
-
 /* MTD structure for CM-X270 board */
 static struct mtd_info *cmx270_nand_mtd;
 
@@ -103,14 +91,14 @@ static int cmx270_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
 
 static inline void nand_cs_on(void)
 {
-        GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
+        gpio_set_value(GPIO_NAND_CS, 0);
 }
 
 static void nand_cs_off(void)
 {
-        DRAIN_WB();
+        dsb();
 
-        GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
+        gpio_set_value(GPIO_NAND_CS, 1);
 }
 
 /*
@@ -122,7 +110,7 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
         struct nand_chip* this = mtd->priv;
         unsigned int nandaddr = (unsigned int)this->IO_ADDR_W;
 
-        DRAIN_WB();
+        dsb();
 
         if (ctrl & NAND_CTRL_CHANGE) {
                 if ( ctrl & NAND_ALE )
@@ -139,12 +127,12 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
                         nand_cs_off();
         }
 
-        DRAIN_WB();
+        dsb();
         this->IO_ADDR_W = (void __iomem*)nandaddr;
         if (dat != NAND_CMD_NONE)
                 writel((dat << 16), this->IO_ADDR_W);
 
-        DRAIN_WB();
+        dsb();
 }
 
 /*
@@ -152,9 +140,9 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
  */
 static int cmx270_device_ready(struct mtd_info *mtd)
 {
-        DRAIN_WB();
+        dsb();
 
-        return (GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB));
+        return (gpio_get_value(GPIO_NAND_RB));
 }
 
 /*
@@ -168,20 +156,40 @@ static int cmx270_init(void)
         int mtd_parts_nb = 0;
         int ret;
 
+        if (!machine_is_armcore())
+                return -ENODEV;
+
+        ret = gpio_request(GPIO_NAND_CS, "NAND CS");
+        if (ret) {
+                pr_warning("CM-X270: failed to request NAND CS gpio\n");
+                return ret;
+        }
+
+        gpio_direction_output(GPIO_NAND_CS, 1);
+
+        ret = gpio_request(GPIO_NAND_RB, "NAND R/B");
+        if (ret) {
+                pr_warning("CM-X270: failed to request NAND R/B gpio\n");
+                goto err_gpio_request;
+        }
+
+        gpio_direction_input(GPIO_NAND_RB);
+
         /* Allocate memory for MTD device structure and private data */
         cmx270_nand_mtd = kzalloc(sizeof(struct mtd_info) +
                                   sizeof(struct nand_chip),
                                   GFP_KERNEL);
         if (!cmx270_nand_mtd) {
-                printk("Unable to allocate CM-X270 NAND MTD device structure.\n");
-                return -ENOMEM;
+                pr_debug("Unable to allocate CM-X270 NAND MTD device structure.\n");
+                ret = -ENOMEM;
+                goto err_kzalloc;
         }
 
         cmx270_nand_io = ioremap(PXA_CS1_PHYS, 12);
         if (!cmx270_nand_io) {
-                printk("Unable to ioremap NAND device\n");
+                pr_debug("Unable to ioremap NAND device\n");
                 ret = -EINVAL;
-                goto err1;
+                goto err_ioremap;
         }
 
         /* Get pointer to private data */
@@ -209,9 +217,9 @@ static int cmx270_init(void)
 
         /* Scan to find existence of the device */
         if (nand_scan (cmx270_nand_mtd, 1)) {
-                printk(KERN_NOTICE "No NAND device\n");
+                pr_notice("No NAND device\n");
                 ret = -ENXIO;
-                goto err2;
+                goto err_scan;
         }
 
 #ifdef CONFIG_MTD_CMDLINE_PARTS
@@ -229,18 +237,22 @@ static int cmx270_init(void)
         }
 
         /* Register the partitions */
-        printk(KERN_NOTICE "Using %s partition definition\n", part_type);
+        pr_notice("Using %s partition definition\n", part_type);
         ret = add_mtd_partitions(cmx270_nand_mtd, mtd_parts, mtd_parts_nb);
         if (ret)
-                goto err2;
+                goto err_scan;
 
         /* Return happy */
         return 0;
 
-err2:
+err_scan:
         iounmap(cmx270_nand_io);
-err1:
+err_ioremap:
         kfree(cmx270_nand_mtd);
+err_kzalloc:
+        gpio_free(GPIO_NAND_RB);
+err_gpio_request:
+        gpio_free(GPIO_NAND_CS);
 
         return ret;
 
@@ -255,6 +267,9 @@ static void cmx270_cleanup(void)
         /* Release resources, unregister device */
         nand_release(cmx270_nand_mtd);
 
+        gpio_free(GPIO_NAND_RB);
+        gpio_free(GPIO_NAND_CS);
+
         iounmap(cmx270_nand_io);
 
         /* Free the MTD device structure */
diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c
index d5c2d27f3ea4..f76b0b6c277d 100644
--- a/drivers/net/irda/pxaficp_ir.c
+++ b/drivers/net/irda/pxaficp_ir.c
@@ -13,16 +13,8 @@
  *
  */
 #include <linux/module.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/errno.h>
 #include <linux/netdevice.h>
-#include <linux/slab.h>
-#include <linux/rtnetlink.h>
-#include <linux/interrupt.h>
-#include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
-#include <linux/pm.h>
 #include <linux/clk.h>
 
 #include <net/irda/irda.h>
@@ -30,17 +22,9 @@
 #include <net/irda/wrapper.h>
 #include <net/irda/irda_device.h>
 
-#include <asm/irq.h>
 #include <asm/dma.h>
-#include <asm/delay.h>
-#include <asm/hardware.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
-
-#ifdef CONFIG_MACH_MAINSTONE
-#include <asm/arch/mainstone.h>
-#endif
 
 #define IrSR_RXPL_NEG_IS_ZERO (1<<4)
 #define IrSR_RXPL_POS_IS_ZERO 0x0
@@ -163,10 +147,6 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
                         /* set board transceiver to SIR mode */
                         si->pdata->transceiver_mode(si->dev, IR_SIRMODE);
 
-                        /* configure GPIO46/47 */
-                        pxa_gpio_mode(GPIO46_STRXD_MD);
-                        pxa_gpio_mode(GPIO47_STTXD_MD);
-
                         /* enable the STUART clock */
                         pxa_irda_enable_sirclk(si);
                 }
@@ -201,10 +181,6 @@ static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
                 /* set board transceiver to FIR mode */
                 si->pdata->transceiver_mode(si->dev, IR_FIRMODE);
 
-                /* configure GPIO46/47 */
-                pxa_gpio_mode(GPIO46_ICPRXD_MD);
-                pxa_gpio_mode(GPIO47_ICPTXD_MD);
-
                 /* enable the FICP clock */
                 pxa_irda_enable_firclk(si);
 
diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c
index f2051b209da2..2040965d7724 100644
--- a/drivers/net/smc91x.c
+++ b/drivers/net/smc91x.c
@@ -308,7 +308,7 @@ static void smc_reset(struct net_device *dev)
          * can't handle it then there will be no recovery except for
          * a hard reset or power cycle
          */
-        if (nowait)
+        if (lp->cfg.flags & SMC91X_NOWAIT)
                 cfg |= CONFIG_NO_WAIT;
 
         /*
@@ -1939,8 +1939,11 @@ static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr,
         if (retval)
                 goto err_out;
 
-#ifdef SMC_USE_PXA_DMA
-        {
+#ifdef CONFIG_ARCH_PXA
+#  ifdef SMC_USE_PXA_DMA
+        lp->cfg.flags |= SMC91X_USE_DMA;
+#  endif
+        if (lp->cfg.flags & SMC91X_USE_DMA) {
                 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
                                           smc_pxa_dma_irq, NULL);
                 if (dma >= 0)
@@ -1980,7 +1983,7 @@ static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr,
         }
 
 err_out:
-#ifdef SMC_USE_PXA_DMA
+#ifdef CONFIG_ARCH_PXA
         if (retval && dev->dma != (unsigned char)-1)
                 pxa_free_dma(dev->dma);
 #endif
@@ -2050,9 +2053,11 @@ static int smc_enable_device(struct platform_device *pdev)
         return 0;
 }
 
-static int smc_request_attrib(struct platform_device *pdev)
+static int smc_request_attrib(struct platform_device *pdev,
+                              struct net_device *ndev)
 {
         struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
+        struct smc_local *lp = netdev_priv(ndev);
 
         if (!res)
                 return 0;
@@ -2063,9 +2068,11 @@ static int smc_request_attrib(struct platform_device *pdev)
         return 0;
 }
 
-static void smc_release_attrib(struct platform_device *pdev)
+static void smc_release_attrib(struct platform_device *pdev,
+                               struct net_device *ndev)
 {
         struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
+        struct smc_local *lp = netdev_priv(ndev);
 
         if (res)
                 release_mem_region(res->start, ATTRIB_SIZE);
@@ -2123,27 +2130,14 @@ static int smc_drv_probe(struct platform_device *pdev)
         struct net_device *ndev;
         struct resource *res, *ires;
         unsigned int __iomem *addr;
+        unsigned long irq_flags = SMC_IRQ_FLAGS;
         int ret;
 
-        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
-        if (!res)
-                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (!res) {
-                ret = -ENODEV;
-                goto out;
-        }
-
-
-        if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
-                ret = -EBUSY;
-                goto out;
-        }
-
         ndev = alloc_etherdev(sizeof(struct smc_local));
         if (!ndev) {
                 printk("%s: could not allocate device.\n", CARDNAME);
                 ret = -ENOMEM;
-                goto out_release_io;
+                goto out;
         }
         SET_NETDEV_DEV(ndev, &pdev->dev);
 
@@ -2152,37 +2146,47 @@ static int smc_drv_probe(struct platform_device *pdev)
          */
 
         lp = netdev_priv(ndev);
-        lp->cfg.irq_flags = SMC_IRQ_FLAGS;
 
-#ifdef SMC_DYNAMIC_BUS_CONFIG
-        if (pd)
+        if (pd) {
                 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
-        else {
-                lp->cfg.flags = SMC91X_USE_8BIT;
-                lp->cfg.flags |= SMC91X_USE_16BIT;
-                lp->cfg.flags |= SMC91X_USE_32BIT;
+                lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
+        } else {
+                lp->cfg.flags |= (SMC_CAN_USE_8BIT)  ? SMC91X_USE_8BIT  : 0;
+                lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
+                lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
+                lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;
         }
 
-        lp->cfg.flags &= ~(SMC_CAN_USE_8BIT ? 0 : SMC91X_USE_8BIT);
-        lp->cfg.flags &= ~(SMC_CAN_USE_16BIT ? 0 : SMC91X_USE_16BIT);
-        lp->cfg.flags &= ~(SMC_CAN_USE_32BIT ? 0 : SMC91X_USE_32BIT);
-#endif
-
         ndev->dma = (unsigned char)-1;
 
+        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
+        if (!res)
+                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                ret = -ENODEV;
+                goto out_free_netdev;
+        }
+
+
+        if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
+                ret = -EBUSY;
+                goto out_free_netdev;
+        }
+
         ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
         if (!ires) {
                 ret = -ENODEV;
-                goto out_free_netdev;
+                goto out_release_io;
         }
 
         ndev->irq = ires->start;
-        if (SMC_IRQ_FLAGS == -1)
-                lp->cfg.irq_flags = ires->flags & IRQF_TRIGGER_MASK;
 
-        ret = smc_request_attrib(pdev);
+        if (ires->flags & IRQF_TRIGGER_MASK)
+                irq_flags = ires->flags & IRQF_TRIGGER_MASK;
+
+        ret = smc_request_attrib(pdev, ndev);
         if (ret)
-                goto out_free_netdev;
+                goto out_release_io;
 #if defined(CONFIG_SA1100_ASSABET)
         NCR_0 |= NCR_ENET_OSC_EN;
 #endif
@@ -2197,7 +2201,7 @@ static int smc_drv_probe(struct platform_device *pdev)
                 goto out_release_attrib;
         }
 
-#ifdef SMC_USE_PXA_DMA
+#ifdef CONFIG_ARCH_PXA
         {
                 struct smc_local *lp = netdev_priv(ndev);
                 lp->device = &pdev->dev;
@@ -2205,7 +2209,7 @@ static int smc_drv_probe(struct platform_device *pdev)
         }
 #endif
 
-        ret = smc_probe(ndev, addr, lp->cfg.irq_flags);
+        ret = smc_probe(ndev, addr, irq_flags);
         if (ret != 0)
                 goto out_iounmap;
 
@@ -2217,11 +2221,11 @@ static int smc_drv_probe(struct platform_device *pdev)
         platform_set_drvdata(pdev, NULL);
         iounmap(addr);
  out_release_attrib:
-        smc_release_attrib(pdev);
- out_free_netdev:
-        free_netdev(ndev);
+        smc_release_attrib(pdev, ndev);
  out_release_io:
         release_mem_region(res->start, SMC_IO_EXTENT);
+ out_free_netdev:
+        free_netdev(ndev);
  out:
         printk("%s: not found (%d).\n", CARDNAME, ret);
 
@@ -2240,14 +2244,14 @@ static int smc_drv_remove(struct platform_device *pdev)
 
         free_irq(ndev->irq, ndev);
 
-#ifdef SMC_USE_PXA_DMA
+#ifdef CONFIG_ARCH_PXA
         if (ndev->dma != (unsigned char)-1)
                 pxa_free_dma(ndev->dma);
 #endif
         iounmap(lp->base);
 
         smc_release_datacs(pdev,ndev);
-        smc_release_attrib(pdev);
+        smc_release_attrib(pdev,ndev);
 
         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
         if (!res)
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index 8606818653f8..22209b6f1405 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -40,23 +40,46 @@
  * Define your architecture specific bus configuration parameters here.
  */
 
-#if     defined(CONFIG_ARCH_LUBBOCK)
+#if defined(CONFIG_ARCH_LUBBOCK) ||\
+    defined(CONFIG_MACH_MAINSTONE) ||\
+    defined(CONFIG_MACH_ZYLONITE) ||\
+    defined(CONFIG_MACH_LITTLETON)
 
-/* We can only do 16-bit reads and writes in the static memory space. */
-#define SMC_CAN_USE_8BIT        0
+#include <asm/mach-types.h>
+
+/* Now the bus width is specified in the platform data
+ * pretend here to support all I/O access types
+ */
+#define SMC_CAN_USE_8BIT        1
 #define SMC_CAN_USE_16BIT       1
-#define SMC_CAN_USE_32BIT       0
+#define SMC_CAN_USE_32BIT       1
 #define SMC_NOWAIT              1
 
-/* The first two address lines aren't connected... */
-#define SMC_IO_SHIFT            2
+#define SMC_IO_SHIFT            (lp->io_shift)
 
+#define SMC_inb(a, r)           readb((a) + (r))
 #define SMC_inw(a, r)           readw((a) + (r))
-#define SMC_outw(v, a, r)       writew(v, (a) + (r))
+#define SMC_inl(a, r)           readl((a) + (r))
+#define SMC_outb(v, a, r)       writeb(v, (a) + (r))
+#define SMC_outl(v, a, r)       writel(v, (a) + (r))
 #define SMC_insw(a, r, p, l)    readsw((a) + (r), p, l)
 #define SMC_outsw(a, r, p, l)   writesw((a) + (r), p, l)
+#define SMC_insl(a, r, p, l)    readsl((a) + (r), p, l)
+#define SMC_outsl(a, r, p, l)   writesl((a) + (r), p, l)
 #define SMC_IRQ_FLAGS           (-1)    /* from resource */
 
+/* We actually can't write halfwords properly if not word aligned */
+static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg)
+{
+        if (machine_is_mainstone() && reg & 2) {
+                unsigned int v = val << 16;
+                v |= readl(ioaddr + (reg & ~2)) & 0xffff;
+                writel(v, ioaddr + (reg & ~2));
+        } else {
+                writew(val, ioaddr + reg);
+        }
+}
+
 #elif defined(CONFIG_BLACKFIN)
 
 #define SMC_IRQ_FLAGS           IRQF_TRIGGER_HIGH
@@ -195,7 +218,6 @@
 #define SMC_outsw(a, r, p, l)   writesw((a) + (r), p, l)
 
 #elif   defined(CONFIG_ARCH_INNOKOM) || \
-        defined(CONFIG_MACH_MAINSTONE) || \
         defined(CONFIG_ARCH_PXA_IDP) || \
         defined(CONFIG_ARCH_RAMSES) || \
         defined(CONFIG_ARCH_PCM027)
@@ -229,22 +251,6 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
         }
 }
 
-#elif defined(CONFIG_MACH_ZYLONITE)
-
-#define SMC_CAN_USE_8BIT        1
-#define SMC_CAN_USE_16BIT       1
-#define SMC_CAN_USE_32BIT       0
-#define SMC_IO_SHIFT            0
-#define SMC_NOWAIT              1
-#define SMC_USE_PXA_DMA         1
-#define SMC_inb(a, r)           readb((a) + (r))
-#define SMC_inw(a, r)           readw((a) + (r))
-#define SMC_insw(a, r, p, l)    insw((a) + (r), p, l)
-#define SMC_outsw(a, r, p, l)   outsw((a) + (r), p, l)
-#define SMC_outb(v, a, r)       writeb(v, (a) + (r))
-#define SMC_outw(v, a, r)       writew(v, (a) + (r))
-#define SMC_IRQ_FLAGS           (-1)    /* from resource */
-
 #elif   defined(CONFIG_ARCH_OMAP)
 
 /* We can only do 16-bit reads and writes in the static memory space. */
@@ -454,7 +460,6 @@ static inline void LPD7_SMC_outsw (unsigned char* a, int r,
 #define RPC_LSA_DEFAULT         RPC_LED_100_10
 #define RPC_LSB_DEFAULT         RPC_LED_TX_RX
 
-#define SMC_DYNAMIC_BUS_CONFIG
 #endif
 
 
@@ -493,7 +498,7 @@ struct smc_local {
 
         spinlock_t lock;
 
-#ifdef SMC_USE_PXA_DMA
+#ifdef CONFIG_ARCH_PXA
         /* DMA needs the physical address of the chip */
         u_long physaddr;
         struct device *device;
@@ -501,20 +506,17 @@ struct smc_local {
         void __iomem *base;
         void __iomem *datacs;
 
+        /* the low address lines on some platforms aren't connected... */
+        int     io_shift;
+
         struct smc91x_platdata cfg;
 };
 
-#ifdef SMC_DYNAMIC_BUS_CONFIG
-#define SMC_8BIT(p) (((p)->cfg.flags & SMC91X_USE_8BIT) && SMC_CAN_USE_8BIT)
-#define SMC_16BIT(p) (((p)->cfg.flags & SMC91X_USE_16BIT) && SMC_CAN_USE_16BIT)
-#define SMC_32BIT(p) (((p)->cfg.flags & SMC91X_USE_32BIT) && SMC_CAN_USE_32BIT)
-#else
-#define SMC_8BIT(p) SMC_CAN_USE_8BIT
-#define SMC_16BIT(p) SMC_CAN_USE_16BIT
-#define SMC_32BIT(p) SMC_CAN_USE_32BIT
-#endif
+#define SMC_8BIT(p)     ((p)->cfg.flags & SMC91X_USE_8BIT)
+#define SMC_16BIT(p)    ((p)->cfg.flags & SMC91X_USE_16BIT)
+#define SMC_32BIT(p)    ((p)->cfg.flags & SMC91X_USE_32BIT)
 
-#ifdef SMC_USE_PXA_DMA
+#ifdef CONFIG_ARCH_PXA
 /*
  * Let's use the DMA engine on the XScale PXA2xx for RX packets. This is
  * always happening in irq context so no need to worry about races.  TX is
@@ -608,7 +610,7 @@ smc_pxa_dma_irq(int dma, void *dummy)
 {
         DCSR(dma) = 0;
 }
-#endif  /* SMC_USE_PXA_DMA */
+#endif  /* CONFIG_ARCH_PXA */
 
 
 /*
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index 1b0eb5aaf650..86dd324c8ce0 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -219,7 +219,8 @@ config PCMCIA_SA1111
 config PCMCIA_PXA2XX
         tristate "PXA2xx support"
         depends on ARM && ARCH_PXA && PCMCIA
-        depends on ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL || MACH_ARMCORE
+        depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \
+                    || MACH_ARMCORE || ARCH_PXA_PALM)
         help
           Say Y here to include support for the PXA2xx PCMCIA controller
 
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
index 6f6478ba7174..8e6dd22e9300 100644
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -71,4 +71,5 @@ pxa2xx_cs-$(CONFIG_ARCH_LUBBOCK)		+= pxa2xx_lubbock.o sa1111_generic.o
 pxa2xx_cs-$(CONFIG_MACH_MAINSTONE)              += pxa2xx_mainstone.o
 pxa2xx_cs-$(CONFIG_PXA_SHARPSL)                 += pxa2xx_sharpsl.o
 pxa2xx_cs-$(CONFIG_MACH_ARMCORE)                += pxa2xx_cm_x270.o
+pxa2xx_cs-$(CONFIG_MACH_PALMTX)         += pxa2xx_palmtx.o
 
diff --git a/drivers/pcmcia/pxa2xx_cm_x270.c b/drivers/pcmcia/pxa2xx_cm_x270.c
index e7ab060ff118..bb95db7d2b76 100644
--- a/drivers/pcmcia/pxa2xx_cm_x270.c
+++ b/drivers/pcmcia/pxa2xx_cm_x270.c
@@ -5,82 +5,60 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  *
- * Compulab Ltd., 2003, 2007
+ * Compulab Ltd., 2003, 2007, 2008
  * Mike Rapoport <mike@compulab.co.il>
  *
  */
 
-#include <linux/kernel.h>
-#include <linux/sched.h>
 #include <linux/platform_device.h>
 #include <linux/irq.h>
 #include <linux/delay.h>
+#include <linux/gpio.h>
 
-#include <pcmcia/ss.h>
-#include <asm/hardware.h>
-
+#include <asm/mach-types.h>
 #include <asm/arch/pxa-regs.h>
-#include <asm/arch/pxa2xx-gpio.h>
-#include <asm/arch/cm-x270.h>
 
 #include "soc_common.h"
 
+#define GPIO_PCMCIA_S0_CD_VALID (84)
+#define GPIO_PCMCIA_S0_RDYINT   (82)
+#define GPIO_PCMCIA_RESET       (53)
+
+#define PCMCIA_S0_CD_VALID      IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID)
+#define PCMCIA_S0_RDYINT        IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT)
+
+
 static struct pcmcia_irqs irqs[] = {
         { 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" },
-        { 1, PCMCIA_S1_CD_VALID, "PCMCIA1 CD" },
 };
 
 static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
 {
-        GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
-                GPIO_bit(GPIO49_nPWE) |
-                GPIO_bit(GPIO50_nPIOR) |
-                GPIO_bit(GPIO51_nPIOW) |
-                GPIO_bit(GPIO85_nPCE_1) |
-                GPIO_bit(GPIO54_nPCE_2);
-
-        pxa_gpio_mode(GPIO48_nPOE_MD);
-        pxa_gpio_mode(GPIO49_nPWE_MD);
-        pxa_gpio_mode(GPIO50_nPIOR_MD);
-        pxa_gpio_mode(GPIO51_nPIOW_MD);
-        pxa_gpio_mode(GPIO85_nPCE_1_MD);
-        pxa_gpio_mode(GPIO54_nPCE_2_MD);
-        pxa_gpio_mode(GPIO55_nPREG_MD);
-        pxa_gpio_mode(GPIO56_nPWAIT_MD);
-        pxa_gpio_mode(GPIO57_nIOIS16_MD);
-
-        /* Reset signal */
-        pxa_gpio_mode(GPIO53_nPCE_2 | GPIO_OUT);
-        GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
-
-        set_irq_type(PCMCIA_S0_CD_VALID, IRQ_TYPE_EDGE_BOTH);
-        set_irq_type(PCMCIA_S1_CD_VALID, IRQ_TYPE_EDGE_BOTH);
-
-        /* irq's for slots: */
-        set_irq_type(PCMCIA_S0_RDYINT, IRQ_TYPE_EDGE_FALLING);
-        set_irq_type(PCMCIA_S1_RDYINT, IRQ_TYPE_EDGE_FALLING);
-
-        skt->irq = (skt->nr == 0) ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT;
-        return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
+        int ret = gpio_request(GPIO_PCMCIA_RESET, "PCCard reset");
+        if (ret)
+                return ret;
+        gpio_direction_output(GPIO_PCMCIA_RESET, 0);
+
+        skt->irq = PCMCIA_S0_RDYINT;
+        ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
+        if (!ret)
+                gpio_free(GPIO_PCMCIA_RESET);
+
+        return ret;
 }
 
 static void cmx270_pcmcia_shutdown(struct soc_pcmcia_socket *skt)
 {
         soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
-
-        set_irq_type(IRQ_TO_GPIO(PCMCIA_S0_CD_VALID), IRQ_TYPE_NONE);
-        set_irq_type(IRQ_TO_GPIO(PCMCIA_S1_CD_VALID), IRQ_TYPE_NONE);
-
-        set_irq_type(IRQ_TO_GPIO(PCMCIA_S0_RDYINT), IRQ_TYPE_NONE);
-        set_irq_type(IRQ_TO_GPIO(PCMCIA_S1_RDYINT), IRQ_TYPE_NONE);
+        gpio_free(GPIO_PCMCIA_RESET);
 }
 
 
 static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
                                        struct pcmcia_state *state)
 {
-        state->detect = (PCC_DETECT(skt->nr) == 0) ? 1 : 0;
-        state->ready  = (PCC_READY(skt->nr) == 0) ? 0 : 1;
+        state->detect = (gpio_get_value(GPIO_PCMCIA_S0_CD_VALID) == 0) ? 1 : 0;
+        state->ready  = (gpio_get_value(GPIO_PCMCIA_S0_RDYINT) == 0) ? 0 : 1;
         state->bvd1   = 1;
         state->bvd2   = 1;
         state->vs_3v  = 0;
@@ -92,32 +70,16 @@ static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
 static int cmx270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
                                           const socket_state_t *state)
 {
-        GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
-        pxa_gpio_mode(GPIO49_nPWE | GPIO_OUT);
-
         switch (skt->nr) {
         case 0:
                 if (state->flags & SS_RESET) {
-                        GPCR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
-                        GPSR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
+                        gpio_set_value(GPIO_PCMCIA_RESET, 1);
                         udelay(10);
-                        GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
-                        GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
-                }
-                break;
-        case 1:
-                if (state->flags & SS_RESET) {
-                        GPCR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
-                        GPSR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
-                        udelay(10);
-                        GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
-                        GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
+                        gpio_set_value(GPIO_PCMCIA_RESET, 0);
                 }
                 break;
         }
 
-        pxa_gpio_mode(GPIO49_nPWE_MD);
-
         return 0;
 }
 
@@ -130,7 +92,7 @@ static void cmx270_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
 }
 
 
-static struct pcmcia_low_level cmx270_pcmcia_ops = {
+static struct pcmcia_low_level cmx270_pcmcia_ops __initdata = {
         .owner                  = THIS_MODULE,
         .hw_init                = cmx270_pcmcia_hw_init,
         .hw_shutdown            = cmx270_pcmcia_shutdown,
@@ -138,7 +100,7 @@ static struct pcmcia_low_level cmx270_pcmcia_ops = {
         .configure_socket       = cmx270_pcmcia_configure_socket,
         .socket_init            = cmx270_pcmcia_socket_init,
         .socket_suspend         = cmx270_pcmcia_socket_suspend,
-        .nr                     = 2,
+        .nr                     = 1,
 };
 
 static struct platform_device *cmx270_pcmcia_device;
@@ -147,15 +109,21 @@ static int __init cmx270_pcmcia_init(void)
 {
         int ret;
 
+        if (!machine_is_armcore())
+                return -ENODEV;
+
         cmx270_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
 
         if (!cmx270_pcmcia_device)
                 return -ENOMEM;
 
-        cmx270_pcmcia_device->dev.platform_data = &cmx270_pcmcia_ops;
+        ret = platform_device_add_data(cmx270_pcmcia_device, &cmx270_pcmcia_ops,
+                                       sizeof(cmx270_pcmcia_ops));
 
-        printk(KERN_INFO "Registering cm-x270 PCMCIA interface.\n");
-        ret = platform_device_add(cmx270_pcmcia_device);
+        if (ret == 0) {
+                printk(KERN_INFO "Registering cm-x270 PCMCIA interface.\n");
+                ret = platform_device_add(cmx270_pcmcia_device);
+        }
 
         if (ret)
                 platform_device_put(cmx270_pcmcia_device);
diff --git a/drivers/pcmcia/pxa2xx_mainstone.c b/drivers/pcmcia/pxa2xx_mainstone.c
index 145b85e0f02c..92d1cc33808c 100644
--- a/drivers/pcmcia/pxa2xx_mainstone.c
+++ b/drivers/pcmcia/pxa2xx_mainstone.c
@@ -22,6 +22,7 @@
 #include <pcmcia/ss.h>
 
 #include <asm/hardware.h>
+#include <asm/mach-types.h>
 #include <asm/irq.h>
 
 #include <asm/arch/pxa-regs.h>
@@ -136,7 +137,7 @@ static void mst_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
 {
 }
 
-static struct pcmcia_low_level mst_pcmcia_ops = {
+static struct pcmcia_low_level mst_pcmcia_ops __initdata = {
         .owner                  = THIS_MODULE,
         .hw_init                = mst_pcmcia_hw_init,
         .hw_shutdown            = mst_pcmcia_hw_shutdown,
@@ -153,13 +154,17 @@ static int __init mst_pcmcia_init(void)
 {
         int ret;
 
+        if (!machine_is_mainstone())
+                return -ENODEV;
+
         mst_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
         if (!mst_pcmcia_device)
                 return -ENOMEM;
 
-        mst_pcmcia_device->dev.platform_data = &mst_pcmcia_ops;
-
-        ret = platform_device_add(mst_pcmcia_device);
+        ret = platform_device_add_data(mst_pcmcia_device, &mst_pcmcia_ops,
+                                       sizeof(mst_pcmcia_ops));
+        if (ret == 0)
+                ret = platform_device_add(mst_pcmcia_device);
 
         if (ret)
                 platform_device_put(mst_pcmcia_device);
diff --git a/drivers/pcmcia/pxa2xx_palmtx.c b/drivers/pcmcia/pxa2xx_palmtx.c
new file mode 100644
index 000000000000..4abde190c1f5
--- /dev/null
+++ b/drivers/pcmcia/pxa2xx_palmtx.c
@@ -0,0 +1,118 @@
+/*
+ * linux/drivers/pcmcia/pxa2xx_palmtx.c
+ *
+ * Driver for Palm T|X PCMCIA
+ *
+ * Copyright (C) 2007-2008 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+
+#include <asm/arch/gpio.h>
+#include <asm/arch/palmtx.h>
+
+#include "soc_common.h"
+
+static int palmtx_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
+{
+        skt->irq = IRQ_GPIO(GPIO_NR_PALMTX_PCMCIA_READY);
+        return 0;
+}
+
+static void palmtx_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
+{
+}
+
+static void palmtx_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
+                                        struct pcmcia_state *state)
+{
+        state->detect = 1; /* always inserted */
+        state->ready  = !!gpio_get_value(GPIO_NR_PALMTX_PCMCIA_READY);
+        state->bvd1   = 1;
+        state->bvd2   = 1;
+        state->wrprot = 0;
+        state->vs_3v  = 1;
+        state->vs_Xv  = 0;
+}
+
+static int
+palmtx_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
+                                const socket_state_t *state)
+{
+        gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER1, 1);
+        gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER2, 1);
+        gpio_set_value(GPIO_NR_PALMTX_PCMCIA_RESET,
+                        !!(state->flags & SS_RESET));
+
+        return 0;
+}
+
+static void palmtx_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
+{
+}
+
+static void palmtx_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
+{
+}
+
+static struct pcmcia_low_level palmtx_pcmcia_ops = {
+        .owner                  = THIS_MODULE,
+
+        .first                  = 0,
+        .nr                     = 1,
+
+        .hw_init                = palmtx_pcmcia_hw_init,
+        .hw_shutdown            = palmtx_pcmcia_hw_shutdown,
+
+        .socket_state           = palmtx_pcmcia_socket_state,
+        .configure_socket       = palmtx_pcmcia_configure_socket,
+
+        .socket_init            = palmtx_pcmcia_socket_init,
+        .socket_suspend         = palmtx_pcmcia_socket_suspend,
+};
+
+static struct platform_device *palmtx_pcmcia_device;
+
+static int __init palmtx_pcmcia_init(void)
+{
+        int ret;
+
+        if (!machine_is_palmtx())
+                return -ENODEV;
+
+        palmtx_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
+        if (!palmtx_pcmcia_device)
+                return -ENOMEM;
+
+        ret = platform_device_add_data(palmtx_pcmcia_device, &palmtx_pcmcia_ops,
+                                        sizeof(palmtx_pcmcia_ops));
+
+        if (!ret)
+                ret = platform_device_add(palmtx_pcmcia_device);
+
+        if (ret)
+                platform_device_put(palmtx_pcmcia_device);
+
+        return ret;
+}
+
+static void __exit palmtx_pcmcia_exit(void)
+{
+        platform_device_unregister(palmtx_pcmcia_device);
+}
+
+fs_initcall(palmtx_pcmcia_init);
+module_exit(palmtx_pcmcia_exit);
+
+MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
+MODULE_DESCRIPTION("PCMCIA support for Palm T|X");
+MODULE_ALIAS("platform:pxa2xx-pcmcia");
+MODULE_LICENSE("GPL");
diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c
index d5c33bd78d68..d71f93d45833 100644
--- a/drivers/pcmcia/pxa2xx_sharpsl.c
+++ b/drivers/pcmcia/pxa2xx_sharpsl.c
@@ -222,7 +222,7 @@ static void sharpsl_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
         sharpsl_pcmcia_init_reset(skt);
 }
 
-static struct pcmcia_low_level sharpsl_pcmcia_ops = {
+static struct pcmcia_low_level sharpsl_pcmcia_ops __initdata = {
         .owner                  = THIS_MODULE,
         .hw_init                = sharpsl_pcmcia_hw_init,
         .hw_shutdown            = sharpsl_pcmcia_hw_shutdown,
@@ -261,10 +261,12 @@ static int __init sharpsl_pcmcia_init(void)
         if (!sharpsl_pcmcia_device)
                 return -ENOMEM;
 
-        sharpsl_pcmcia_device->dev.platform_data = &sharpsl_pcmcia_ops;
-        sharpsl_pcmcia_device->dev.parent = platform_scoop_config->devs[0].dev;
-
-        ret = platform_device_add(sharpsl_pcmcia_device);
+        ret = platform_device_add_data(sharpsl_pcmcia_device,
+                        &sharpsl_pcmcia_ops, sizeof(sharpsl_pcmcia_ops));
+        if (ret == 0) {
+                sharpsl_pcmcia_device->dev.parent = platform_scoop_config->devs[0].dev;
+                ret = platform_device_add(sharpsl_pcmcia_device);
+        }
 
         if (ret)
                 platform_device_put(sharpsl_pcmcia_device);
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 58c806e9c58a..4d17d384578d 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -49,4 +49,10 @@ config BATTERY_OLPC
         help
           Say Y to enable support for the battery on the OLPC laptop.
 
+config BATTERY_PALMTX
+        tristate "Palm T|X battery"
+        depends on MACH_PALMTX
+        help
+          Say Y to enable support for the battery in Palm T|X.
+
 endif # POWER_SUPPLY
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index 6413ded5fe5f..6f43a54ee420 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -20,3 +20,4 @@ obj-$(CONFIG_APM_POWER)		+= apm_power.o
 obj-$(CONFIG_BATTERY_DS2760)    += ds2760_battery.o
 obj-$(CONFIG_BATTERY_PMU)       += pmu_battery.o
 obj-$(CONFIG_BATTERY_OLPC)      += olpc_battery.o
+obj-$(CONFIG_BATTERY_PALMTX)    += palmtx_battery.o
diff --git a/drivers/power/palmtx_battery.c b/drivers/power/palmtx_battery.c
new file mode 100644
index 000000000000..244bb273a637
--- /dev/null
+++ b/drivers/power/palmtx_battery.c
@@ -0,0 +1,198 @@
+/*
+ * linux/drivers/power/palmtx_battery.c
+ *
+ * Battery measurement code for Palm T|X Handheld computer
+ *
+ * based on tosa_battery.c
+ *
+ * Copyright (C) 2008 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/power_supply.h>
+#include <linux/wm97xx.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#include <asm/mach-types.h>
+#include <asm/arch/palmtx.h>
+
+static DEFINE_MUTEX(bat_lock);
+static struct work_struct bat_work;
+struct mutex work_lock;
+int bat_status = POWER_SUPPLY_STATUS_DISCHARGING;
+
+static unsigned long palmtx_read_bat(struct power_supply *bat_ps)
+{
+        return wm97xx_read_aux_adc(bat_ps->dev->parent->driver_data,
+                                    WM97XX_AUX_ID3) * 1000 / 414;
+}
+
+static unsigned long palmtx_read_temp(struct power_supply *bat_ps)
+{
+        return wm97xx_read_aux_adc(bat_ps->dev->parent->driver_data,
+                                    WM97XX_AUX_ID2);
+}
+
+static int palmtx_bat_get_property(struct power_supply *bat_ps,
+                            enum power_supply_property psp,
+                            union power_supply_propval *val)
+{
+        switch (psp) {
+        case POWER_SUPPLY_PROP_STATUS:
+                val->intval = bat_status;
+                break;
+        case POWER_SUPPLY_PROP_TECHNOLOGY:
+                val->intval = POWER_SUPPLY_TECHNOLOGY_LIPO;
+                break;
+        case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+                val->intval = palmtx_read_bat(bat_ps);
+                break;
+        case POWER_SUPPLY_PROP_VOLTAGE_MAX:
+        case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
+                val->intval = PALMTX_BAT_MAX_VOLTAGE;
+                break;
+        case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
+                val->intval = PALMTX_BAT_MIN_VOLTAGE;
+                break;
+        case POWER_SUPPLY_PROP_TEMP:
+                val->intval = palmtx_read_temp(bat_ps);
+                break;
+        case POWER_SUPPLY_PROP_PRESENT:
+                val->intval = 1;
+                break;
+        default:
+                return -EINVAL;
+        }
+        return 0;
+}
+
+static void palmtx_bat_external_power_changed(struct power_supply *bat_ps)
+{
+        schedule_work(&bat_work);
+}
+
+static char *status_text[] = {
+        [POWER_SUPPLY_STATUS_UNKNOWN] =         "Unknown",
+        [POWER_SUPPLY_STATUS_CHARGING] =        "Charging",
+        [POWER_SUPPLY_STATUS_DISCHARGING] =     "Discharging",
+};
+
+static void palmtx_bat_update(struct power_supply *bat_ps)
+{
+        int old_status = bat_status;
+
+        mutex_lock(&work_lock);
+
+        bat_status = gpio_get_value(GPIO_NR_PALMTX_POWER_DETECT) ?
+                                    POWER_SUPPLY_STATUS_CHARGING :
+                                    POWER_SUPPLY_STATUS_DISCHARGING;
+
+        if (old_status != bat_status) {
+                pr_debug("%s %s -> %s\n", bat_ps->name,
+                                status_text[old_status],
+                                status_text[bat_status]);
+                power_supply_changed(bat_ps);
+        }
+
+        mutex_unlock(&work_lock);
+}
+
+static enum power_supply_property palmtx_bat_main_props[] = {
+        POWER_SUPPLY_PROP_STATUS,
+        POWER_SUPPLY_PROP_TECHNOLOGY,
+        POWER_SUPPLY_PROP_VOLTAGE_NOW,
+        POWER_SUPPLY_PROP_VOLTAGE_MAX,
+        POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
+        POWER_SUPPLY_PROP_TEMP,
+        POWER_SUPPLY_PROP_PRESENT,
+};
+
+struct power_supply bat_ps = {
+        .name                   = "main-battery",
+        .type                   = POWER_SUPPLY_TYPE_BATTERY,
+        .properties             = palmtx_bat_main_props,
+        .num_properties         = ARRAY_SIZE(palmtx_bat_main_props),
+        .get_property           = palmtx_bat_get_property,
+        .external_power_changed = palmtx_bat_external_power_changed,
+        .use_for_apm            = 1,
+};
+
+static void palmtx_bat_work(struct work_struct *work)
+{
+        palmtx_bat_update(&bat_ps);
+}
+
+#ifdef CONFIG_PM
+static int palmtx_bat_suspend(struct platform_device *dev, pm_message_t state)
+{
+        flush_scheduled_work();
+        return 0;
+}
+
+static int palmtx_bat_resume(struct platform_device *dev)
+{
+        schedule_work(&bat_work);
+        return 0;
+}
+#else
+#define palmtx_bat_suspend NULL
+#define palmtx_bat_resume NULL
+#endif
+
+static int __devinit palmtx_bat_probe(struct platform_device *dev)
+{
+        int ret = 0;
+
+        if (!machine_is_palmtx())
+                return -ENODEV;
+
+        mutex_init(&work_lock);
+
+        INIT_WORK(&bat_work, palmtx_bat_work);
+
+        ret = power_supply_register(&dev->dev, &bat_ps);
+        if (!ret)
+                schedule_work(&bat_work);
+
+        return ret;
+}
+
+static int __devexit palmtx_bat_remove(struct platform_device *dev)
+{
+        power_supply_unregister(&bat_ps);
+        return 0;
+}
+
+static struct platform_driver palmtx_bat_driver = {
+        .driver.name    = "wm97xx-battery",
+        .driver.owner   = THIS_MODULE,
+        .probe          = palmtx_bat_probe,
+        .remove         = __devexit_p(palmtx_bat_remove),
+        .suspend        = palmtx_bat_suspend,
+        .resume         = palmtx_bat_resume,
+};
+
+static int __init palmtx_bat_init(void)
+{
+        return platform_driver_register(&palmtx_bat_driver);
+}
+
+static void __exit palmtx_bat_exit(void)
+{
+        platform_driver_unregister(&palmtx_bat_driver);
+}
+
+module_init(palmtx_bat_init);
+module_exit(palmtx_bat_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
+MODULE_DESCRIPTION("Palm T|X battery driver");
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 3565d4352826..d6bab0d5f453 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -172,7 +172,7 @@ config USB_NET2280
         default USB_GADGET
         select USB_GADGET_SELECTED
 
-config USB_GADGET_PXA2XX
+config USB_GADGET_PXA25X
         boolean "PXA 25x or IXP 4xx"
         depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX
         help
@@ -184,19 +184,19 @@ config USB_GADGET_PXA2XX
            zero (for control transfers).
 
            Say "y" to link the driver statically, or "m" to build a
-           dynamically linked module called "pxa2xx_udc" and force all
+           dynamically linked module called "pxa25x_udc" and force all
            gadget drivers to also be dynamically linked.
 
-config USB_PXA2XX
+config USB_PXA25X
         tristate
-        depends on USB_GADGET_PXA2XX
+        depends on USB_GADGET_PXA25X
         default USB_GADGET
         select USB_GADGET_SELECTED
 
 # if there's only one gadget driver, using only two bulk endpoints,
 # don't waste memory for the other endpoints
-config USB_PXA2XX_SMALL
-        depends on USB_GADGET_PXA2XX
+config USB_PXA25X_SMALL
+        depends on USB_GADGET_PXA25X
         bool
         default n if USB_ETH_RNDIS
         default y if USB_ZERO
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 12357255d740..e258afd25faf 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -8,7 +8,7 @@ endif
 obj-$(CONFIG_USB_DUMMY_HCD)     += dummy_hcd.o
 obj-$(CONFIG_USB_NET2280)       += net2280.o
 obj-$(CONFIG_USB_AMD5536UDC)    += amd5536udc.o
-obj-$(CONFIG_USB_PXA2XX)        += pxa2xx_udc.o
+obj-$(CONFIG_USB_PXA25X)        += pxa25x_udc.o
 obj-$(CONFIG_USB_PXA27X)        += pxa27x_udc.o
 obj-$(CONFIG_USB_GOKU)          += goku_udc.o
 obj-$(CONFIG_USB_OMAP)          += omap_udc.o
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 8d61ea67a817..4ce3950b997f 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -262,7 +262,7 @@ MODULE_PARM_DESC(host_addr, "Host Ethernet Address");
 /* For CDC-incapable hardware, choose the simple cdc subset.
  * Anything that talks bulk (without notable bugs) can do this.
  */
-#ifdef CONFIG_USB_GADGET_PXA2XX
+#ifdef CONFIG_USB_GADGET_PXA25X
 #define DEV_CONFIG_SUBSET
 #endif
 
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index f7f159c1002b..ca5149ea7312 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -29,8 +29,8 @@
 #define gadget_is_dummy(g)      0
 #endif
 
-#ifdef CONFIG_USB_GADGET_PXA2XX
-#define gadget_is_pxa(g)        !strcmp("pxa2xx_udc", (g)->name)
+#ifdef CONFIG_USB_GADGET_PXA25X
+#define gadget_is_pxa(g)        !strcmp("pxa25x_udc", (g)->name)
 #else
 #define gadget_is_pxa(g)        0
 #endif
diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c
index 69b0a2754f2a..f132a9219e11 100644
--- a/drivers/usb/gadget/inode.c
+++ b/drivers/usb/gadget/inode.c
@@ -1501,7 +1501,7 @@ gadgetfs_setup (struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
                 }
                 break;
 
-#ifndef CONFIG_USB_GADGET_PXA2XX
+#ifndef CONFIG_USB_GADGET_PXA25X
         /* PXA automagically handles this request too */
         case USB_REQ_GET_CONFIGURATION:
                 if (ctrl->bRequestType != 0x80)
diff --git a/drivers/usb/gadget/pxa2xx_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index 08f699b1fc57..5d50031938ab 100644
--- a/drivers/usb/gadget/pxa2xx_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -1,5 +1,4 @@
 /*
- * linux/drivers/usb/gadget/pxa2xx_udc.c
  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
  *
  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
@@ -46,19 +45,25 @@
 #include <linux/err.h>
 #include <linux/seq_file.h>
 #include <linux/debugfs.h>
+#include <linux/io.h>
 
 #include <asm/byteorder.h>
 #include <asm/dma.h>
 #include <asm/gpio.h>
-#include <asm/io.h>
 #include <asm/system.h>
 #include <asm/mach-types.h>
 #include <asm/unaligned.h>
-#include <asm/hardware.h>
 
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 
+/*
+ * This driver is PXA25x only.  Grab the right register definitions.
+ */
+#ifdef CONFIG_ARCH_PXA
+#include <asm/arch/pxa25x-udc.h>
+#endif
+
 #include <asm/mach/udc_pxa2xx.h>
 
 
@@ -91,7 +96,7 @@
 #define DRIVER_DESC     "PXA 25x USB Device Controller driver"
 
 
-static const char driver_name [] = "pxa2xx_udc";
+static const char driver_name [] = "pxa25x_udc";
 
 static const char ep0name [] = "ep0";
 
@@ -111,10 +116,10 @@ static const char ep0name [] = "ep0";
 
 #endif
 
-#include "pxa2xx_udc.h"
+#include "pxa25x_udc.h"
 
 
-#ifdef  CONFIG_USB_PXA2XX_SMALL
+#ifdef  CONFIG_USB_PXA25X_SMALL
 #define SIZE_STR        " (small)"
 #else
 #define SIZE_STR        ""
@@ -126,8 +131,8 @@ static const char ep0name [] = "ep0";
  * ---------------------------------------------------------------------------
  */
 
-static void pxa2xx_ep_fifo_flush (struct usb_ep *ep);
-static void nuke (struct pxa2xx_ep *, int status);
+static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
+static void nuke (struct pxa25x_ep *, int status);
 
 /* one GPIO should be used to detect VBUS from the host */
 static int is_vbus_present(void)
@@ -147,9 +152,10 @@ static int is_vbus_present(void)
 static void pullup_off(void)
 {
         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
+        int off_level = mach->gpio_pullup_inverted;
 
         if (mach->gpio_pullup)
-                gpio_set_value(mach->gpio_pullup, 0);
+                gpio_set_value(mach->gpio_pullup, off_level);
         else if (mach->udc_command)
                 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
 }
@@ -157,9 +163,10 @@ static void pullup_off(void)
 static void pullup_on(void)
 {
         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
+        int on_level = !mach->gpio_pullup_inverted;
 
         if (mach->gpio_pullup)
-                gpio_set_value(mach->gpio_pullup, 1);
+                gpio_set_value(mach->gpio_pullup, on_level);
         else if (mach->udc_command)
                 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
 }
@@ -212,24 +219,24 @@ static inline void udc_ack_int_UDCCR(int mask)
 /*
  * endpoint enable/disable
  *
- * we need to verify the descriptors used to enable endpoints.  since pxa2xx
+ * we need to verify the descriptors used to enable endpoints.  since pxa25x
  * endpoint configurations are fixed, and are pretty much always enabled,
  * there's not a lot to manage here.
  *
- * because pxa2xx can't selectively initialize bulk (or interrupt) endpoints,
+ * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
  * for a single interface (with only the default altsetting) and for gadget
  * drivers that don't halt endpoints (not reset by set_interface).  that also
  * means that if you use ISO, you must violate the USB spec rule that all
  * iso endpoints must be in non-default altsettings.
  */
-static int pxa2xx_ep_enable (struct usb_ep *_ep,
+static int pxa25x_ep_enable (struct usb_ep *_ep,
                 const struct usb_endpoint_descriptor *desc)
 {
-        struct pxa2xx_ep        *ep;
-        struct pxa2xx_udc       *dev;
+        struct pxa25x_ep        *ep;
+        struct pxa25x_udc       *dev;
 
-        ep = container_of (_ep, struct pxa2xx_ep, ep);
+        ep = container_of (_ep, struct pxa25x_ep, ep);
         if (!_ep || !desc || ep->desc || _ep->name == ep0name
                         || desc->bDescriptorType != USB_DT_ENDPOINT
                         || ep->bEndpointAddress != desc->bEndpointAddress
@@ -268,7 +275,7 @@ static int pxa2xx_ep_enable (struct usb_ep *_ep,
         ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
 
         /* flush fifo (mostly for OUT buffers) */
-        pxa2xx_ep_fifo_flush (_ep);
+        pxa25x_ep_fifo_flush (_ep);
 
         /* ... reset halt state too, if we could ... */
 
@@ -276,12 +283,12 @@ static int pxa2xx_ep_enable (struct usb_ep *_ep,
         return 0;
 }
 
-static int pxa2xx_ep_disable (struct usb_ep *_ep)
+static int pxa25x_ep_disable (struct usb_ep *_ep)
 {
-        struct pxa2xx_ep        *ep;
+        struct pxa25x_ep        *ep;
         unsigned long           flags;
 
-        ep = container_of (_ep, struct pxa2xx_ep, ep);
+        ep = container_of (_ep, struct pxa25x_ep, ep);
         if (!_ep || !ep->desc) {
                 DMSG("%s, %s not enabled\n", __func__,
                         _ep ? ep->ep.name : NULL);
@@ -292,7 +299,7 @@ static int pxa2xx_ep_disable (struct usb_ep *_ep)
         nuke (ep, -ESHUTDOWN);
 
         /* flush fifo (mostly for IN buffers) */
-        pxa2xx_ep_fifo_flush (_ep);
+        pxa25x_ep_fifo_flush (_ep);
 
         ep->desc = NULL;
         ep->stopped = 1;
@@ -304,18 +311,18 @@ static int pxa2xx_ep_disable (struct usb_ep *_ep)
 
 /*-------------------------------------------------------------------------*/
 
-/* for the pxa2xx, these can just wrap kmalloc/kfree.  gadget drivers
+/* for the pxa25x, these can just wrap kmalloc/kfree.  gadget drivers
  * must still pass correctly initialized endpoints, since other controller
  * drivers may care about how it's currently set up (dma issues etc).
  */
 
 /*
- *      pxa2xx_ep_alloc_request - allocate a request data structure
+ *      pxa25x_ep_alloc_request - allocate a request data structure
  */
 static struct usb_request *
-pxa2xx_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
+pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
 {
-        struct pxa2xx_request *req;
+        struct pxa25x_request *req;
 
         req = kzalloc(sizeof(*req), gfp_flags);
         if (!req)
@@ -327,14 +334,14 @@ pxa2xx_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
 
 
 /*
- *      pxa2xx_ep_free_request - deallocate a request data structure
+ *      pxa25x_ep_free_request - deallocate a request data structure
  */
 static void
-pxa2xx_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
+pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
 {
-        struct pxa2xx_request   *req;
+        struct pxa25x_request   *req;
 
-        req = container_of (_req, struct pxa2xx_request, req);
+        req = container_of (_req, struct pxa25x_request, req);
         WARN_ON (!list_empty (&req->queue));
         kfree(req);
 }
@@ -344,7 +351,7 @@ pxa2xx_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
 /*
  *      done - retire a request; caller blocked irqs
  */
-static void done(struct pxa2xx_ep *ep, struct pxa2xx_request *req, int status)
+static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
 {
         unsigned                stopped = ep->stopped;
 
@@ -367,13 +374,13 @@ static void done(struct pxa2xx_ep *ep, struct pxa2xx_request *req, int status)
 }
 
 
-static inline void ep0_idle (struct pxa2xx_udc *dev)
+static inline void ep0_idle (struct pxa25x_udc *dev)
 {
         dev->ep0state = EP0_IDLE;
 }
 
 static int
-write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max)
+write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
 {
         u8              *buf;
         unsigned        length, count;
@@ -398,7 +405,7 @@ write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max)
  * caller guarantees at least one packet buffer is ready (or a zlp).
  */
 static int
-write_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
+write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 {
         unsigned                max;
 
@@ -455,7 +462,7 @@ write_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
  * ep0 data stage.  these chips want very simple state transitions.
  */
 static inline
-void ep0start(struct pxa2xx_udc *dev, u32 flags, const char *tag)
+void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
 {
         UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
         USIR0 = USIR0_IR0;
@@ -465,7 +472,7 @@ void ep0start(struct pxa2xx_udc *dev, u32 flags, const char *tag)
 }
 
 static int
-write_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
+write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 {
         unsigned        count;
         int             is_short;
@@ -525,7 +532,7 @@ write_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
  * request buffer having filled (and maybe overran till end-of-packet).
  */
 static int
-read_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
+read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 {
         for (;;) {
                 u32             udccs;
@@ -602,7 +609,7 @@ read_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
  * protocols do use them.
  */
 static int
-read_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
+read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 {
         u8              *buf, byte;
         unsigned        bufferspace;
@@ -641,21 +648,21 @@ read_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
 /*-------------------------------------------------------------------------*/
 
 static int
-pxa2xx_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
+pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 {
-        struct pxa2xx_request   *req;
-        struct pxa2xx_ep        *ep;
-        struct pxa2xx_udc       *dev;
+        struct pxa25x_request   *req;
+        struct pxa25x_ep        *ep;
+        struct pxa25x_udc       *dev;
         unsigned long           flags;
 
-        req = container_of(_req, struct pxa2xx_request, req);
+        req = container_of(_req, struct pxa25x_request, req);
         if (unlikely (!_req || !_req->complete || !_req->buf
                         || !list_empty(&req->queue))) {
                 DMSG("%s, bad params\n", __func__);
                 return -EINVAL;
         }
 
-        ep = container_of(_ep, struct pxa2xx_ep, ep);
+        ep = container_of(_ep, struct pxa25x_ep, ep);
         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
                 DMSG("%s, bad ep\n", __func__);
                 return -EINVAL;
@@ -751,14 +758,14 @@ pxa2xx_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 /*
  *      nuke - dequeue ALL requests
  */
-static void nuke(struct pxa2xx_ep *ep, int status)
+static void nuke(struct pxa25x_ep *ep, int status)
 {
-        struct pxa2xx_request *req;
+        struct pxa25x_request *req;
 
         /* called with irqs blocked */
         while (!list_empty(&ep->queue)) {
                 req = list_entry(ep->queue.next,
-                                struct pxa2xx_request,
+                                struct pxa25x_request,
                                 queue);
                 done(ep, req, status);
         }
@@ -768,13 +775,13 @@ static void nuke(struct pxa2xx_ep *ep, int status)
 
 
 /* dequeue JUST ONE request */
-static int pxa2xx_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
+static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 {
-        struct pxa2xx_ep        *ep;
-        struct pxa2xx_request   *req;
+        struct pxa25x_ep        *ep;
+        struct pxa25x_request   *req;
         unsigned long           flags;
 
-        ep = container_of(_ep, struct pxa2xx_ep, ep);
+        ep = container_of(_ep, struct pxa25x_ep, ep);
         if (!_ep || ep->ep.name == ep0name)
                 return -EINVAL;
 
@@ -798,12 +805,12 @@ static int pxa2xx_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 
 /*-------------------------------------------------------------------------*/
 
-static int pxa2xx_ep_set_halt(struct usb_ep *_ep, int value)
+static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
 {
-        struct pxa2xx_ep        *ep;
+        struct pxa25x_ep        *ep;
         unsigned long           flags;
 
-        ep = container_of(_ep, struct pxa2xx_ep, ep);
+        ep = container_of(_ep, struct pxa25x_ep, ep);
         if (unlikely (!_ep
                         || (!ep->desc && ep->ep.name != ep0name))
                         || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
@@ -853,11 +860,11 @@ static int pxa2xx_ep_set_halt(struct usb_ep *_ep, int value)
         return 0;
 }
 
-static int pxa2xx_ep_fifo_status(struct usb_ep *_ep)
+static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
 {
-        struct pxa2xx_ep        *ep;
+        struct pxa25x_ep        *ep;
 
-        ep = container_of(_ep, struct pxa2xx_ep, ep);
+        ep = container_of(_ep, struct pxa25x_ep, ep);
         if (!_ep) {
                 DMSG("%s, bad ep\n", __func__);
                 return -ENODEV;
@@ -872,11 +879,11 @@ static int pxa2xx_ep_fifo_status(struct usb_ep *_ep)
                 return (*ep->reg_ubcr & 0xfff) + 1;
 }
 
-static void pxa2xx_ep_fifo_flush(struct usb_ep *_ep)
+static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
 {
-        struct pxa2xx_ep        *ep;
+        struct pxa25x_ep        *ep;
 
-        ep = container_of(_ep, struct pxa2xx_ep, ep);
+        ep = container_of(_ep, struct pxa25x_ep, ep);
         if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
                 DMSG("%s, bad ep\n", __func__);
                 return;
@@ -898,19 +905,19 @@ static void pxa2xx_ep_fifo_flush(struct usb_ep *_ep)
 }
 
 
-static struct usb_ep_ops pxa2xx_ep_ops = {
-        .enable         = pxa2xx_ep_enable,
-        .disable        = pxa2xx_ep_disable,
+static struct usb_ep_ops pxa25x_ep_ops = {
+        .enable         = pxa25x_ep_enable,
+        .disable        = pxa25x_ep_disable,
 
-        .alloc_request  = pxa2xx_ep_alloc_request,
-        .free_request   = pxa2xx_ep_free_request,
+        .alloc_request  = pxa25x_ep_alloc_request,
+        .free_request   = pxa25x_ep_free_request,
 
-        .queue          = pxa2xx_ep_queue,
-        .dequeue        = pxa2xx_ep_dequeue,
+        .queue          = pxa25x_ep_queue,
+        .dequeue        = pxa25x_ep_dequeue,
 
-        .set_halt       = pxa2xx_ep_set_halt,
-        .fifo_status    = pxa2xx_ep_fifo_status,
-        .fifo_flush     = pxa2xx_ep_fifo_flush,
+        .set_halt       = pxa25x_ep_set_halt,
+        .fifo_status    = pxa25x_ep_fifo_status,
+        .fifo_flush     = pxa25x_ep_fifo_flush,
 };
 
 
@@ -919,12 +926,12 @@ static struct usb_ep_ops pxa2xx_ep_ops = {
  * ---------------------------------------------------------------------------
  */
 
-static int pxa2xx_udc_get_frame(struct usb_gadget *_gadget)
+static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
 {
         return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
 }
 
-static int pxa2xx_udc_wakeup(struct usb_gadget *_gadget)
+static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
 {
         /* host may not have enabled remote wakeup */
         if ((UDCCS0 & UDCCS0_DRWF) == 0)
@@ -933,14 +940,14 @@ static int pxa2xx_udc_wakeup(struct usb_gadget *_gadget)
         return 0;
 }
 
-static void stop_activity(struct pxa2xx_udc *, struct usb_gadget_driver *);
-static void udc_enable (struct pxa2xx_udc *);
-static void udc_disable(struct pxa2xx_udc *);
+static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
+static void udc_enable (struct pxa25x_udc *);
+static void udc_disable(struct pxa25x_udc *);
 
 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
  * in active use.
  */
-static int pullup(struct pxa2xx_udc *udc)
+static int pullup(struct pxa25x_udc *udc)
 {
         int is_active = udc->vbus && udc->pullup && !udc->suspended;
         DMSG("%s\n", is_active ? "active" : "inactive");
@@ -970,11 +977,11 @@ static int pullup(struct pxa2xx_udc *udc)
 }
 
 /* VBUS reporting logically comes from a transceiver */
-static int pxa2xx_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
+static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
 {
-        struct pxa2xx_udc       *udc;
+        struct pxa25x_udc       *udc;
 
-        udc = container_of(_gadget, struct pxa2xx_udc, gadget);
+        udc = container_of(_gadget, struct pxa25x_udc, gadget);
         udc->vbus = (is_active != 0);
         DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
         pullup(udc);
@@ -982,11 +989,11 @@ static int pxa2xx_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
 }
 
 /* drivers may have software control over D+ pullup */
-static int pxa2xx_udc_pullup(struct usb_gadget *_gadget, int is_active)
+static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
 {
-        struct pxa2xx_udc       *udc;
+        struct pxa25x_udc       *udc;
 
-        udc = container_of(_gadget, struct pxa2xx_udc, gadget);
+        udc = container_of(_gadget, struct pxa25x_udc, gadget);
 
         /* not all boards support pullup control */
         if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
@@ -997,11 +1004,11 @@ static int pxa2xx_udc_pullup(struct usb_gadget *_gadget, int is_active)
         return 0;
 }
 
-static const struct usb_gadget_ops pxa2xx_udc_ops = {
-        .get_frame      = pxa2xx_udc_get_frame,
-        .wakeup         = pxa2xx_udc_wakeup,
-        .vbus_session   = pxa2xx_udc_vbus_session,
-        .pullup         = pxa2xx_udc_pullup,
+static const struct usb_gadget_ops pxa25x_udc_ops = {
+        .get_frame      = pxa25x_udc_get_frame,
+        .wakeup         = pxa25x_udc_wakeup,
+        .vbus_session   = pxa25x_udc_vbus_session,
+        .pullup         = pxa25x_udc_pullup,
 
         // .vbus_draw ... boards may consume current from VBUS, up to
         // 100-500mA based on config.  the 500uA suspend ceiling means
@@ -1015,7 +1022,7 @@ static const struct usb_gadget_ops pxa2xx_udc_ops = {
 static int
 udc_seq_show(struct seq_file *m, void *_d)
 {
-        struct pxa2xx_udc       *dev = m->private;
+        struct pxa25x_udc       *dev = m->private;
         unsigned long           flags;
         int                     i;
         u32                     tmp;
@@ -1076,8 +1083,8 @@ udc_seq_show(struct seq_file *m, void *_d)
 
         /* dump endpoint queues */
         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
-                struct pxa2xx_ep        *ep = &dev->ep [i];
-                struct pxa2xx_request   *req;
+                struct pxa25x_ep        *ep = &dev->ep [i];
+                struct pxa25x_request   *req;
 
                 if (i != 0) {
                         const struct usb_endpoint_descriptor    *desc;
@@ -1150,7 +1157,7 @@ static const struct file_operations debug_fops = {
 /*
  *      udc_disable - disable USB device controller
  */
-static void udc_disable(struct pxa2xx_udc *dev)
+static void udc_disable(struct pxa25x_udc *dev)
 {
         /* block all irqs */
         udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
@@ -1170,7 +1177,7 @@ static void udc_disable(struct pxa2xx_udc *dev)
 /*
  *      udc_reinit - initialize software state
  */
-static void udc_reinit(struct pxa2xx_udc *dev)
+static void udc_reinit(struct pxa25x_udc *dev)
 {
         u32     i;
 
@@ -1181,7 +1188,7 @@ static void udc_reinit(struct pxa2xx_udc *dev)
 
         /* basic endpoint records init */
         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
-                struct pxa2xx_ep *ep = &dev->ep[i];
+                struct pxa25x_ep *ep = &dev->ep[i];
 
                 if (i != 0)
                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
@@ -1198,7 +1205,7 @@ static void udc_reinit(struct pxa2xx_udc *dev)
 /* until it's enabled, this UDC should be completely invisible
  * to any USB host.
  */
-static void udc_enable (struct pxa2xx_udc *dev)
+static void udc_enable (struct pxa25x_udc *dev)
 {
         udc_clear_mask_UDCCR(UDCCR_UDE);
 
@@ -1254,7 +1261,7 @@ static void udc_enable (struct pxa2xx_udc *dev)
  */
 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
 {
-        struct pxa2xx_udc       *dev = the_controller;
+        struct pxa25x_udc       *dev = the_controller;
         int                     retval;
 
         if (!driver
@@ -1299,7 +1306,7 @@ fail:
 EXPORT_SYMBOL(usb_gadget_register_driver);
 
 static void
-stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver)
+stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
 {
         int i;
 
@@ -1310,7 +1317,7 @@ stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver)
 
         /* prevent new request submissions, kill any outstanding requests  */
         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
-                struct pxa2xx_ep *ep = &dev->ep[i];
+                struct pxa25x_ep *ep = &dev->ep[i];
 
                 ep->stopped = 1;
                 nuke(ep, -ESHUTDOWN);
@@ -1327,7 +1334,7 @@ stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver)
 
 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
 {
-        struct pxa2xx_udc       *dev = the_controller;
+        struct pxa25x_udc       *dev = the_controller;
 
         if (!dev)
                 return -ENODEV;
@@ -1364,7 +1371,7 @@ EXPORT_SYMBOL(usb_gadget_unregister_driver);
 static irqreturn_t
 lubbock_vbus_irq(int irq, void *_dev)
 {
-        struct pxa2xx_udc       *dev = _dev;
+        struct pxa25x_udc       *dev = _dev;
         int                     vbus;
 
         dev->stats.irqs++;
@@ -1383,7 +1390,7 @@ lubbock_vbus_irq(int irq, void *_dev)
                 return IRQ_NONE;
         }
 
-        pxa2xx_udc_vbus_session(&dev->gadget, vbus);
+        pxa25x_udc_vbus_session(&dev->gadget, vbus);
         return IRQ_HANDLED;
 }
 
@@ -1391,20 +1398,20 @@ lubbock_vbus_irq(int irq, void *_dev)
 
 static irqreturn_t udc_vbus_irq(int irq, void *_dev)
 {
-        struct pxa2xx_udc       *dev = _dev;
+        struct pxa25x_udc       *dev = _dev;
         int                     vbus = gpio_get_value(dev->mach->gpio_vbus);
 
         if (dev->mach->gpio_vbus_inverted)
                 vbus = !vbus;
 
-        pxa2xx_udc_vbus_session(&dev->gadget, vbus);
+        pxa25x_udc_vbus_session(&dev->gadget, vbus);
         return IRQ_HANDLED;
 }
 
 
 /*-------------------------------------------------------------------------*/
 
-static inline void clear_ep_state (struct pxa2xx_udc *dev)
+static inline void clear_ep_state (struct pxa25x_udc *dev)
 {
         unsigned i;
 
@@ -1417,7 +1424,7 @@ static inline void clear_ep_state (struct pxa2xx_udc *dev)
 
 static void udc_watchdog(unsigned long _dev)
 {
-        struct pxa2xx_udc       *dev = (void *)_dev;
+        struct pxa25x_udc       *dev = (void *)_dev;
 
         local_irq_disable();
         if (dev->ep0state == EP0_STALL
@@ -1430,11 +1437,11 @@ static void udc_watchdog(unsigned long _dev)
         local_irq_enable();
 }
 
-static void handle_ep0 (struct pxa2xx_udc *dev)
+static void handle_ep0 (struct pxa25x_udc *dev)
 {
         u32                     udccs0 = UDCCS0;
-        struct pxa2xx_ep        *ep = &dev->ep [0];
-        struct pxa2xx_request   *req;
+        struct pxa25x_ep        *ep = &dev->ep [0];
+        struct pxa25x_request   *req;
         union {
                 struct usb_ctrlrequest  r;
                 u8                      raw [8];
@@ -1444,7 +1451,7 @@ static void handle_ep0 (struct pxa2xx_udc *dev)
         if (list_empty(&ep->queue))
                 req = NULL;
         else
-                req = list_entry(ep->queue.next, struct pxa2xx_request, queue);
+                req = list_entry(ep->queue.next, struct pxa25x_request, queue);
 
         /* clear stall status */
         if (udccs0 & UDCCS0_SST) {
@@ -1654,9 +1661,9 @@ stall:
         USIR0 = USIR0_IR0;
 }
 
-static void handle_ep(struct pxa2xx_ep *ep)
+static void handle_ep(struct pxa25x_ep *ep)
 {
-        struct pxa2xx_request   *req;
+        struct pxa25x_request   *req;
         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
         int                     completed;
         u32                     udccs, tmp;
@@ -1665,7 +1672,7 @@ static void handle_ep(struct pxa2xx_ep *ep)
                 completed = 0;
                 if (likely (!list_empty(&ep->queue)))
                         req = list_entry(ep->queue.next,
-                                        struct pxa2xx_request, queue);
+                                        struct pxa25x_request, queue);
                 else
                         req = NULL;
 
@@ -1702,16 +1709,16 @@ static void handle_ep(struct pxa2xx_ep *ep)
 }
 
 /*
- *      pxa2xx_udc_irq - interrupt handler
+ *      pxa25x_udc_irq - interrupt handler
  *
  * avoid delays in ep0 processing. the control handshaking isn't always
  * under software control (pxa250c0 and the pxa255 are better), and delays
  * could cause usb protocol errors.
  */
 static irqreturn_t
-pxa2xx_udc_irq(int irq, void *_dev)
+pxa25x_udc_irq(int irq, void *_dev)
 {
-        struct pxa2xx_udc       *dev = _dev;
+        struct pxa25x_udc       *dev = _dev;
         int                     handled;
 
         dev->stats.irqs++;
@@ -1820,9 +1827,9 @@ static void nop_release (struct device *dev)
  * doing it at run-time) to save code, eliminate fault paths, and
  * be more obviously correct.
  */
-static struct pxa2xx_udc memory = {
+static struct pxa25x_udc memory = {
         .gadget = {
-                .ops            = &pxa2xx_udc_ops,
+                .ops            = &pxa25x_udc_ops,
                 .ep0            = &memory.ep[0].ep,
                 .name           = driver_name,
                 .dev = {
@@ -1835,7 +1842,7 @@ static struct pxa2xx_udc memory = {
         .ep[0] = {
                 .ep = {
                         .name           = ep0name,
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = EP0_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1847,7 +1854,7 @@ static struct pxa2xx_udc memory = {
         .ep[1] = {
                 .ep = {
                         .name           = "ep1in-bulk",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = BULK_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1860,7 +1867,7 @@ static struct pxa2xx_udc memory = {
         .ep[2] = {
                 .ep = {
                         .name           = "ep2out-bulk",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = BULK_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1871,11 +1878,11 @@ static struct pxa2xx_udc memory = {
                 .reg_ubcr       = &UBCR2,
                 .reg_uddr       = &UDDR2,
         },
-#ifndef CONFIG_USB_PXA2XX_SMALL
+#ifndef CONFIG_USB_PXA25X_SMALL
         .ep[3] = {
                 .ep = {
                         .name           = "ep3in-iso",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = ISO_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1888,7 +1895,7 @@ static struct pxa2xx_udc memory = {
         .ep[4] = {
                 .ep = {
                         .name           = "ep4out-iso",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = ISO_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1902,7 +1909,7 @@ static struct pxa2xx_udc memory = {
         .ep[5] = {
                 .ep = {
                         .name           = "ep5in-int",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = INT_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1917,7 +1924,7 @@ static struct pxa2xx_udc memory = {
         .ep[6] = {
                 .ep = {
                         .name           = "ep6in-bulk",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = BULK_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1930,7 +1937,7 @@ static struct pxa2xx_udc memory = {
         .ep[7] = {
                 .ep = {
                         .name           = "ep7out-bulk",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = BULK_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1944,7 +1951,7 @@ static struct pxa2xx_udc memory = {
         .ep[8] = {
                 .ep = {
                         .name           = "ep8in-iso",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = ISO_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1957,7 +1964,7 @@ static struct pxa2xx_udc memory = {
         .ep[9] = {
                 .ep = {
                         .name           = "ep9out-iso",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = ISO_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1971,7 +1978,7 @@ static struct pxa2xx_udc memory = {
         .ep[10] = {
                 .ep = {
                         .name           = "ep10in-int",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = INT_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1986,7 +1993,7 @@ static struct pxa2xx_udc memory = {
         .ep[11] = {
                 .ep = {
                         .name           = "ep11in-bulk",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = BULK_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -1999,7 +2006,7 @@ static struct pxa2xx_udc memory = {
         .ep[12] = {
                 .ep = {
                         .name           = "ep12out-bulk",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = BULK_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -2013,7 +2020,7 @@ static struct pxa2xx_udc memory = {
         .ep[13] = {
                 .ep = {
                         .name           = "ep13in-iso",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = ISO_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -2026,7 +2033,7 @@ static struct pxa2xx_udc memory = {
         .ep[14] = {
                 .ep = {
                         .name           = "ep14out-iso",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = ISO_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -2040,7 +2047,7 @@ static struct pxa2xx_udc memory = {
         .ep[15] = {
                 .ep = {
                         .name           = "ep15in-int",
-                        .ops            = &pxa2xx_ep_ops,
+                        .ops            = &pxa25x_ep_ops,
                         .maxpacket      = INT_FIFO_SIZE,
                 },
                 .dev            = &memory,
@@ -2050,7 +2057,7 @@ static struct pxa2xx_udc memory = {
                 .reg_udccs      = &UDCCS15,
                 .reg_uddr       = &UDDR15,
         },
-#endif /* !CONFIG_USB_PXA2XX_SMALL */
+#endif /* !CONFIG_USB_PXA25X_SMALL */
 };
 
 #define CP15R0_VENDOR_MASK      0xffffe000
@@ -2090,9 +2097,9 @@ static struct pxa2xx_udc memory = {
 /*
  *      probe - binds to the platform device
  */
-static int __init pxa2xx_udc_probe(struct platform_device *pdev)
+static int __init pxa25x_udc_probe(struct platform_device *pdev)
 {
-        struct pxa2xx_udc *dev = &memory;
+        struct pxa25x_udc *dev = &memory;
         int retval, vbus_irq, irq;
         u32 chiprev;
 
@@ -2155,7 +2162,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev)
 
         if (dev->mach->gpio_vbus) {
                 if ((retval = gpio_request(dev->mach->gpio_vbus,
-                                "pxa2xx_udc GPIO VBUS"))) {
+                                "pxa25x_udc GPIO VBUS"))) {
                         dev_dbg(&pdev->dev,
                                 "can't get vbus gpio %d, err: %d\n",
                                 dev->mach->gpio_vbus, retval);
@@ -2168,7 +2175,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev)
 
         if (dev->mach->gpio_pullup) {
                 if ((retval = gpio_request(dev->mach->gpio_pullup,
-                                "pca2xx_udc GPIO PULLUP"))) {
+                                "pca25x_udc GPIO PULLUP"))) {
                         dev_dbg(&pdev->dev,
                                 "can't get pullup gpio %d, err: %d\n",
                                 dev->mach->gpio_pullup, retval);
@@ -2194,7 +2201,7 @@ static int __init pxa2xx_udc_probe(struct platform_device *pdev)
         dev->vbus = is_vbus_present();
 
         /* irq setup after old hardware state is cleaned up */
-        retval = request_irq(irq, pxa2xx_udc_irq,
+        retval = request_irq(irq, pxa25x_udc_irq,
                         IRQF_DISABLED, driver_name, dev);
         if (retval != 0) {
                 pr_err("%s: can't get irq %d, err %d\n",
@@ -2260,14 +2267,14 @@ lubbock_fail0:
         return retval;
 }
 
-static void pxa2xx_udc_shutdown(struct platform_device *_dev)
+static void pxa25x_udc_shutdown(struct platform_device *_dev)
 {
         pullup_off();
 }
 
-static int __exit pxa2xx_udc_remove(struct platform_device *pdev)
+static int __exit pxa25x_udc_remove(struct platform_device *pdev)
 {
-        struct pxa2xx_udc *dev = platform_get_drvdata(pdev);
+        struct pxa25x_udc *dev = platform_get_drvdata(pdev);
 
         if (dev->driver)
                 return -EBUSY;
@@ -2317,9 +2324,9 @@ static int __exit pxa2xx_udc_remove(struct platform_device *pdev)
  * VBUS IRQs should probably be ignored so that the PXA device just acts
  * "dead" to USB hosts until system resume.
  */
-static int pxa2xx_udc_suspend(struct platform_device *dev, pm_message_t state)
+static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
 {
-        struct pxa2xx_udc       *udc = platform_get_drvdata(dev);
+        struct pxa25x_udc       *udc = platform_get_drvdata(dev);
         unsigned long flags;
 
         if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
@@ -2333,9 +2340,9 @@ static int pxa2xx_udc_suspend(struct platform_device *dev, pm_message_t state)
         return 0;
 }
 
-static int pxa2xx_udc_resume(struct platform_device *dev)
+static int pxa25x_udc_resume(struct platform_device *dev)
 {
-        struct pxa2xx_udc       *udc = platform_get_drvdata(dev);
+        struct pxa25x_udc       *udc = platform_get_drvdata(dev);
         unsigned long flags;
 
         udc->suspended = 0;
@@ -2347,27 +2354,27 @@ static int pxa2xx_udc_resume(struct platform_device *dev)
 }
 
 #else
-#define pxa2xx_udc_suspend      NULL
-#define pxa2xx_udc_resume       NULL
+#define pxa25x_udc_suspend      NULL
+#define pxa25x_udc_resume       NULL
 #endif
 
 /*-------------------------------------------------------------------------*/
 
 static struct platform_driver udc_driver = {
-        .shutdown       = pxa2xx_udc_shutdown,
-        .remove         = __exit_p(pxa2xx_udc_remove),
-        .suspend        = pxa2xx_udc_suspend,
-        .resume         = pxa2xx_udc_resume,
+        .shutdown       = pxa25x_udc_shutdown,
+        .remove         = __exit_p(pxa25x_udc_remove),
+        .suspend        = pxa25x_udc_suspend,
+        .resume         = pxa25x_udc_resume,
         .driver         = {
                 .owner  = THIS_MODULE,
-                .name   = "pxa2xx-udc",
+                .name   = "pxa25x-udc",
         },
 };
 
 static int __init udc_init(void)
 {
         pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
-        return platform_driver_probe(&udc_driver, pxa2xx_udc_probe);
+        return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
 }
 module_init(udc_init);
 
@@ -2380,4 +2387,4 @@ module_exit(udc_exit);
 MODULE_DESCRIPTION(DRIVER_DESC);
 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
 MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:pxa2xx-udc");
+MODULE_ALIAS("platform:pxa25x-udc");
diff --git a/drivers/usb/gadget/pxa2xx_udc.h b/drivers/usb/gadget/pxa25x_udc.h
index e2c19e88c875..4d11ece7c95f 100644
--- a/drivers/usb/gadget/pxa2xx_udc.h
+++ b/drivers/usb/gadget/pxa25x_udc.h
@@ -1,6 +1,5 @@
 /*
- * linux/drivers/usb/gadget/pxa2xx_udc.h
- * Intel PXA2xx on-chip full speed USB device controller
+ * Intel PXA25x on-chip full speed USB device controller
  *
  * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
  * Copyright (C) 2003 David Brownell
@@ -21,14 +20,14 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-#ifndef __LINUX_USB_GADGET_PXA2XX_H
-#define __LINUX_USB_GADGET_PXA2XX_H
+#ifndef __LINUX_USB_GADGET_PXA25X_H
+#define __LINUX_USB_GADGET_PXA25X_H
 
 #include <linux/types.h>
 
 /*-------------------------------------------------------------------------*/
 
-/* pxa2xx has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
+/* pxa25x has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
 #define UFNRH_SIR       (1 << 7)        /* SOF interrupt request */
 #define UFNRH_SIM       (1 << 6)        /* SOF interrupt mask */
 #define UFNRH_IPE14     (1 << 5)        /* ISO packet error, ep14 */
@@ -45,11 +44,11 @@
 
 /*-------------------------------------------------------------------------*/
 
-struct pxa2xx_udc;
+struct pxa25x_udc;
 
-struct pxa2xx_ep {
+struct pxa25x_ep {
         struct usb_ep                           ep;
-        struct pxa2xx_udc                       *dev;
+        struct pxa25x_udc                       *dev;
 
         const struct usb_endpoint_descriptor    *desc;
         struct list_head                        queue;
@@ -72,7 +71,7 @@ struct pxa2xx_ep {
         volatile u32                            *reg_uddr;
 };
 
-struct pxa2xx_request {
+struct pxa25x_request {
         struct usb_request                      req;
         struct list_head                        queue;
 };
@@ -98,7 +97,7 @@ struct udc_stats {
         unsigned long                   irqs;
 };
 
-#ifdef CONFIG_USB_PXA2XX_SMALL
+#ifdef CONFIG_USB_PXA25X_SMALL
 /* when memory's tight, SMALL config saves code+data.  */
 #define PXA_UDC_NUM_ENDPOINTS   3
 #endif
@@ -107,7 +106,7 @@ struct udc_stats {
 #define PXA_UDC_NUM_ENDPOINTS   16
 #endif
 
-struct pxa2xx_udc {
+struct pxa25x_udc {
         struct usb_gadget                       gadget;
         struct usb_gadget_driver                *driver;
 
@@ -130,7 +129,7 @@ struct pxa2xx_udc {
         struct clk                              *clk;
         struct pxa2xx_udc_mach_info             *mach;
         u64                                     dma_mask;
-        struct pxa2xx_ep                        ep [PXA_UDC_NUM_ENDPOINTS];
+        struct pxa25x_ep                        ep [PXA_UDC_NUM_ENDPOINTS];
 
 #ifdef CONFIG_USB_GADGET_DEBUG_FS
         struct dentry                           *debugfs_udc;
@@ -144,7 +143,7 @@ struct pxa2xx_udc {
 /* lubbock can also report usb connect/disconnect irqs */
 #endif
 
-static struct pxa2xx_udc *the_controller;
+static struct pxa25x_udc *the_controller;
 
 /*-------------------------------------------------------------------------*/
 
@@ -209,7 +208,7 @@ dump_udccs0(const char *label)
 }
 
 static void __maybe_unused
-dump_state(struct pxa2xx_udc *dev)
+dump_state(struct pxa25x_udc *dev)
 {
         u32             tmp;
         unsigned        i;
@@ -264,4 +263,4 @@ dump_state(struct pxa2xx_udc *dev)
 #define INFO(stuff...)          pr_info("udc: " stuff)
 
 
-#endif /* __LINUX_USB_GADGET_PXA2XX_H */
+#endif /* __LINUX_USB_GADGET_PXA25X_H */
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c
index e02bfd4df3a6..9c0e82ec5c43 100644
--- a/drivers/usb/gadget/pxa27x_udc.c
+++ b/drivers/usb/gadget/pxa27x_udc.c
@@ -38,7 +38,7 @@
 #include <linux/usb.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
-
+#include <asm/arch/pxa2xx-regs.h> /* FIXME: for PSSR */
 #include <asm/arch/udc.h>
 
 #include "pxa27x_udc.h"
@@ -2360,18 +2360,19 @@ static int pxa_udc_resume(struct platform_device *_dev)
          * Software must configure the USB OTG pad, UDC, and UHC
          * to the state they were in before entering sleep mode.
          */
-        PSSR |= PSSR_OTGPH;
+        if (cpu_is_pxa27x())
+                PSSR |= PSSR_OTGPH;
 
         return 0;
 }
 #endif
 
 /* work with hotplug and coldplug */
-MODULE_ALIAS("platform:pxa2xx-udc");
+MODULE_ALIAS("platform:pxa27x-udc");
 
 static struct platform_driver udc_driver = {
         .driver         = {
-                .name   = "pxa2xx-udc",
+                .name   = "pxa27x-udc",
                 .owner  = THIS_MODULE,
         },
         .remove         = __exit_p(pxa_udc_remove),
diff --git a/drivers/usb/gadget/pxa27x_udc.h b/drivers/usb/gadget/pxa27x_udc.h
index 97453db924ff..1d1b7936ee11 100644
--- a/drivers/usb/gadget/pxa27x_udc.h
+++ b/drivers/usb/gadget/pxa27x_udc.h
@@ -484,12 +484,4 @@ static inline struct pxa_udc *to_gadget_udc(struct usb_gadget *gadget)
 #define ep_warn(ep, fmt, arg...) \
         dev_warn(ep->dev->dev, "%s:%s:" fmt, EPNAME(ep), __func__, ## arg)
 
-/*
- * Cannot include pxa-regs.h, as register names are similar.
- * So PSSR is redefined here. This should be removed once UDC registers will
- * be gone from pxa-regs.h.
- */
-#define PSSR            __REG(0x40F00004)       /* Power Manager Sleep Status */
-#define PSSR_OTGPH      (1 << 6)                /* OTG Peripheral Hold */
-
 #endif /* __LINUX_USB_GADGET_PXA27X_H */
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c
index 70b0d4b459e7..08b27d6bbd43 100644
--- a/drivers/usb/host/ohci-pxa27x.c
+++ b/drivers/usb/host/ohci-pxa27x.c
@@ -27,6 +27,7 @@
 #include <asm/mach-types.h>
 #include <asm/hardware.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/arch/pxa2xx-regs.h> /* FIXME: for PSSR */
 #include <asm/arch/ohci.h>
 
 #define PXA_UHC_MAX_PORTNUM    3
@@ -104,7 +105,7 @@ static int pxa27x_start_hc(struct device *dev)
         UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
 
         /* Clear any OTG Pin Hold */
-        if (PSSR & PSSR_OTGPH)
+        if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH))
                 PSSR |= PSSR_OTGPH;
 
         return 0;
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index dcd8073c2369..30bf7f2f1635 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -112,3 +112,10 @@ config BACKLIGHT_CARILLO_RANCH
         help
           If you have a Intel LE80578 (Carillo Ranch) say Y to enable the
           backlight driver.
+
+config BACKLIGHT_PWM
+        tristate "Generic PWM based Backlight Driver"
+        depends on BACKLIGHT_CLASS_DEVICE && HAVE_PWM
+        help
+          If you have a LCD backlight adjustable by PWM, say Y to enable
+          this driver.
diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
index 33f6c7cecc73..b51a7cd12500 100644
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_BACKLIGHT_LOCOMO)	+= locomolcd.o
 obj-$(CONFIG_BACKLIGHT_OMAP1)   += omap1_bl.o
 obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o
 obj-$(CONFIG_BACKLIGHT_CARILLO_RANCH) += cr_bllcd.o
+obj-$(CONFIG_BACKLIGHT_PWM)     += pwm_bl.o
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c
new file mode 100644
index 000000000000..6338d0e2fe07
--- /dev/null
+++ b/drivers/video/backlight/pwm_bl.c
@@ -0,0 +1,185 @@
+/*
+ * linux/drivers/video/backlight/pwm_bl.c
+ *
+ * simple PWM based backlight control, board code has to setup
+ * 1) pin configuration so PWM waveforms can output
+ * 2) platform_data casts to the PWM id (0/1/2/3 on PXA)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+#include <linux/backlight.h>
+#include <linux/err.h>
+#include <linux/pwm.h>
+#include <linux/pwm_backlight.h>
+
+struct pwm_bl_data {
+        struct pwm_device       *pwm;
+        unsigned int            period;
+        int                     (*notify)(int brightness);
+};
+
+static int pwm_backlight_update_status(struct backlight_device *bl)
+{
+        struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev);
+        int brightness = bl->props.brightness;
+        int max = bl->props.max_brightness;
+
+        if (bl->props.power != FB_BLANK_UNBLANK)
+                brightness = 0;
+
+        if (bl->props.fb_blank != FB_BLANK_UNBLANK)
+                brightness = 0;
+
+        if (pb->notify)
+                brightness = pb->notify(brightness);
+
+        if (brightness == 0) {
+                pwm_config(pb->pwm, 0, pb->period);
+                pwm_disable(pb->pwm);
+        } else {
+                pwm_config(pb->pwm, brightness * pb->period / max, pb->period);
+                pwm_enable(pb->pwm);
+        }
+        return 0;
+}
+
+static int pwm_backlight_get_brightness(struct backlight_device *bl)
+{
+        return bl->props.brightness;
+}
+
+static struct backlight_ops pwm_backlight_ops = {
+        .update_status  = pwm_backlight_update_status,
+        .get_brightness = pwm_backlight_get_brightness,
+};
+
+static int pwm_backlight_probe(struct platform_device *pdev)
+{
+        struct platform_pwm_backlight_data *data = pdev->dev.platform_data;
+        struct backlight_device *bl;
+        struct pwm_bl_data *pb;
+        int ret;
+
+        if (!data)
+                return -EINVAL;
+
+        if (data->init) {
+                ret = data->init(&pdev->dev);
+                if (ret < 0)
+                        return ret;
+        }
+
+        pb = kzalloc(sizeof(*pb), GFP_KERNEL);
+        if (!pb) {
+                ret = -ENOMEM;
+                goto err_alloc;
+        }
+
+        pb->period = data->pwm_period_ns;
+        pb->notify = data->notify;
+
+        pb->pwm = pwm_request(data->pwm_id, "backlight");
+        if (IS_ERR(pb->pwm)) {
+                dev_err(&pdev->dev, "unable to request PWM for backlight\n");
+                ret = PTR_ERR(pb->pwm);
+                goto err_pwm;
+        }
+
+        bl = backlight_device_register(pdev->name, &pdev->dev,
+                        pb, &pwm_backlight_ops);
+        if (IS_ERR(bl)) {
+                dev_err(&pdev->dev, "failed to register backlight\n");
+                ret = PTR_ERR(bl);
+                goto err_bl;
+        }
+
+        bl->props.max_brightness = data->max_brightness;
+        bl->props.brightness = data->dft_brightness;
+        backlight_update_status(bl);
+
+        platform_set_drvdata(pdev, bl);
+        return 0;
+
+err_bl:
+        pwm_free(pb->pwm);
+err_pwm:
+        kfree(pb);
+err_alloc:
+        if (data->exit)
+                data->exit(&pdev->dev);
+        return ret;
+}
+
+static int pwm_backlight_remove(struct platform_device *pdev)
+{
+        struct platform_pwm_backlight_data *data = pdev->dev.platform_data;
+        struct backlight_device *bl = platform_get_drvdata(pdev);
+        struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev);
+
+        backlight_device_unregister(bl);
+        pwm_config(pb->pwm, 0, pb->period);
+        pwm_disable(pb->pwm);
+        pwm_free(pb->pwm);
+        kfree(pb);
+        if (data->exit)
+                data->exit(&pdev->dev);
+        return 0;
+}
+
+#ifdef CONFIG_PM
+static int pwm_backlight_suspend(struct platform_device *pdev,
+                                 pm_message_t state)
+{
+        struct backlight_device *bl = platform_get_drvdata(pdev);
+        struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev);
+
+        pwm_config(pb->pwm, 0, pb->period);
+        pwm_disable(pb->pwm);
+        return 0;
+}
+
+static int pwm_backlight_resume(struct platform_device *pdev)
+{
+        struct backlight_device *bl = platform_get_drvdata(pdev);
+
+        backlight_update_status(bl);
+        return 0;
+}
+#else
+#define pwm_backlight_suspend   NULL
+#define pwm_backlight_resume    NULL
+#endif
+
+static struct platform_driver pwm_backlight_driver = {
+        .driver         = {
+                .name   = "pwm-backlight",
+                .owner  = THIS_MODULE,
+        },
+        .probe          = pwm_backlight_probe,
+        .remove         = pwm_backlight_remove,
+        .suspend        = pwm_backlight_suspend,
+        .resume         = pwm_backlight_resume,
+};
+
+static int __init pwm_backlight_init(void)
+{
+        return platform_driver_register(&pwm_backlight_driver);
+}
+module_init(pwm_backlight_init);
+
+static void __exit pwm_backlight_exit(void)
+{
+        platform_driver_unregister(&pwm_backlight_driver);
+}
+module_exit(pwm_backlight_exit);
+
+MODULE_DESCRIPTION("PWM based Backlight Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index fafe7db20d6d..bb2514369507 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -227,6 +227,22 @@ static int pxafb_bpp_to_lccr3(struct fb_var_screeninfo *var)
         case 4:  ret = LCCR3_4BPP; break;
         case 8:  ret = LCCR3_8BPP; break;
         case 16: ret = LCCR3_16BPP; break;
+        case 24:
+                switch (var->red.length + var->green.length +
+                                var->blue.length + var->transp.length) {
+                case 18: ret = LCCR3_18BPP_P | LCCR3_PDFOR_3; break;
+                case 19: ret = LCCR3_19BPP_P; break;
+                }
+                break;
+        case 32:
+                switch (var->red.length + var->green.length +
+                                var->blue.length + var->transp.length) {
+                case 18: ret = LCCR3_18BPP | LCCR3_PDFOR_3; break;
+                case 19: ret = LCCR3_19BPP; break;
+                case 24: ret = LCCR3_24BPP | LCCR3_PDFOR_3; break;
+                case 25: ret = LCCR3_25BPP; break;
+                }
+                break;
         }
         return ret;
 }
@@ -345,6 +361,41 @@ static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
                 var->green.offset = 5;  var->green.length = 6;
                 var->blue.offset  = 0;  var->blue.length  = 5;
                 var->transp.offset = var->transp.length = 0;
+        } else if (var->bits_per_pixel > 16) {
+                struct pxafb_mode_info *mode;
+
+                mode = pxafb_getmode(inf, var);
+                if (!mode)
+                        return -EINVAL;
+
+                switch (mode->depth) {
+                case 18: /* RGB666 */
+                        var->transp.offset = var->transp.length     = 0;
+                        var->red.offset    = 12; var->red.length    = 6;
+                        var->green.offset  = 6;  var->green.length  = 6;
+                        var->blue.offset   = 0;  var->blue.length   = 6;
+                        break;
+                case 19: /* RGBT666 */
+                        var->transp.offset = 18; var->transp.length = 1;
+                        var->red.offset    = 12; var->red.length    = 6;
+                        var->green.offset  = 6;  var->green.length  = 6;
+                        var->blue.offset   = 0;  var->blue.length   = 6;
+                        break;
+                case 24: /* RGB888 */
+                        var->transp.offset = var->transp.length     = 0;
+                        var->red.offset    = 16; var->red.length    = 8;
+                        var->green.offset  = 8;  var->green.length  = 8;
+                        var->blue.offset   = 0;  var->blue.length   = 8;
+                        break;
+                case 25: /* RGBT888 */
+                        var->transp.offset = 24; var->transp.length = 1;
+                        var->red.offset    = 16; var->red.length    = 8;
+                        var->green.offset  = 8;  var->green.length  = 8;
+                        var->blue.offset   = 0;  var->blue.length   = 8;
+                        break;
+                default:
+                        return -EINVAL;
+                }
         } else {
                 var->red.offset = var->green.offset = 0;
                 var->blue.offset = var->transp.offset = 0;
@@ -376,7 +427,7 @@ static int pxafb_set_par(struct fb_info *info)
         struct pxafb_info *fbi = (struct pxafb_info *)info;
         struct fb_var_screeninfo *var = &info->var;
 
-        if (var->bits_per_pixel == 16)
+        if (var->bits_per_pixel >= 16)
                 fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
         else if (!fbi->cmap_static)
                 fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
@@ -391,7 +442,7 @@ static int pxafb_set_par(struct fb_info *info)
 
         fbi->fb.fix.line_length = var->xres_virtual *
                                   var->bits_per_pixel / 8;
-        if (var->bits_per_pixel == 16)
+        if (var->bits_per_pixel >= 16)
                 fbi->palette_size = 0;
         else
                 fbi->palette_size = var->bits_per_pixel == 1 ?
@@ -404,7 +455,7 @@ static int pxafb_set_par(struct fb_info *info)
          */
         pxafb_set_truecolor(fbi->fb.fix.visual == FB_VISUAL_TRUECOLOR);
 
-        if (fbi->fb.var.bits_per_pixel == 16)
+        if (fbi->fb.var.bits_per_pixel >= 16)
                 fb_dealloc_cmap(&fbi->fb.cmap);
         else
                 fb_alloc_cmap(&fbi->fb.cmap, 1<<fbi->fb.var.bits_per_pixel, 0);
@@ -831,6 +882,8 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var,
                 case 4:
                 case 8:
                 case 16:
+                case 24:
+                case 32:
                         break;
                 default:
                         printk(KERN_ERR "%s: invalid bit depth %d\n",
@@ -968,6 +1021,11 @@ static void pxafb_setup_gpio(struct pxafb_info *fbi)
 
         for (gpio = 58; ldd_bits; gpio++, ldd_bits--)
                 pxa_gpio_mode(gpio | GPIO_ALT_FN_2_OUT);
+        /* 18 bit interface */
+        if (fbi->fb.var.bits_per_pixel > 16) {
+                pxa_gpio_mode(86 | GPIO_ALT_FN_2_OUT);
+                pxa_gpio_mode(87 | GPIO_ALT_FN_2_OUT);
+        }
         pxa_gpio_mode(GPIO74_LCD_FCLK_MD);
         pxa_gpio_mode(GPIO75_LCD_LCLK_MD);
         pxa_gpio_mode(GPIO76_LCD_PCLK_MD);
@@ -1792,11 +1850,49 @@ failed:
         return ret;
 }
 
+static int __devexit pxafb_remove(struct platform_device *dev)
+{
+        struct pxafb_info *fbi = platform_get_drvdata(dev);
+        struct resource *r;
+        int irq;
+        struct fb_info *info;
+
+        if (!fbi)
+                return 0;
+
+        info = &fbi->fb;
+
+        unregister_framebuffer(info);
+
+        pxafb_disable_controller(fbi);
+
+        if (fbi->fb.cmap.len)
+                fb_dealloc_cmap(&fbi->fb.cmap);
+
+        irq = platform_get_irq(dev, 0);
+        free_irq(irq, fbi);
+
+        dma_free_writecombine(&dev->dev, fbi->map_size,
+                                        fbi->map_cpu, fbi->map_dma);
+
+        iounmap(fbi->mmio_base);
+
+        r = platform_get_resource(dev, IORESOURCE_MEM, 0);
+        release_mem_region(r->start, r->end - r->start + 1);
+
+        clk_put(fbi->clk);
+        kfree(fbi);
+
+        return 0;
+}
+
 static struct platform_driver pxafb_driver = {
         .probe          = pxafb_probe,
+        .remove         = pxafb_remove,
         .suspend        = pxafb_suspend,
         .resume         = pxafb_resume,
         .driver         = {
+                .owner  = THIS_MODULE,
                 .name   = "pxa2xx-fb",
         },
 };
@@ -1809,7 +1905,13 @@ static int __init pxafb_init(void)
         return platform_driver_register(&pxafb_driver);
 }
 
+static void __exit pxafb_exit(void)
+{
+        platform_driver_unregister(&pxafb_driver);
+}
+
 module_init(pxafb_init);
+module_exit(pxafb_exit);
 
 MODULE_DESCRIPTION("loadable framebuffer driver for PXA");
 MODULE_LICENSE("GPL");
diff --git a/include/asm-arm/arch-pxa/audio.h b/include/asm-arm/arch-pxa/audio.h
index 52bbe3bc25e1..f82f96dd1053 100644
--- a/include/asm-arm/arch-pxa/audio.h
+++ b/include/asm-arm/arch-pxa/audio.h
@@ -12,4 +12,6 @@ typedef struct {
         void *priv;
 } pxa2xx_audio_ops_t;
 
+extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops);
+
 #endif
diff --git a/include/asm-arm/arch-pxa/cm-x270.h b/include/asm-arm/arch-pxa/cm-x270.h
deleted file mode 100644
index f8fac9e18009..000000000000
--- a/include/asm-arm/arch-pxa/cm-x270.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * linux/include/asm/arch-pxa/cm-x270.h
- *
- * Copyright Compulab Ltd., 2003, 2007
- * Mike Rapoport <mike@compulab.co.il>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-
-/* CM-x270 device physical addresses */
-#define CMX270_CS1_PHYS         (PXA_CS1_PHYS)
-#define MARATHON_PHYS           (PXA_CS2_PHYS)
-#define CMX270_IDE104_PHYS      (PXA_CS3_PHYS)
-#define CMX270_IT8152_PHYS      (PXA_CS4_PHYS)
-
-/* Statically mapped regions */
-#define CMX270_VIRT_BASE                (0xe8000000)
-#define CMX270_IT8152_VIRT              (CMX270_VIRT_BASE)
-#define CMX270_IDE104_VIRT              (CMX270_IT8152_VIRT + SZ_64M)
-
-/* GPIO related definitions */
-#define GPIO_IT8152_IRQ                 (22)
-
-#define IRQ_GPIO_IT8152_IRQ     IRQ_GPIO(GPIO_IT8152_IRQ)
-#define PME_IRQ                 IRQ_GPIO(0)
-#define CMX270_IDE_IRQ          IRQ_GPIO(100)
-#define CMX270_GPIRQ1           IRQ_GPIO(101)
-#define CMX270_TOUCHIRQ         IRQ_GPIO(96)
-#define CMX270_ETHIRQ           IRQ_GPIO(10)
-#define CMX270_GFXIRQ           IRQ_GPIO(95)
-#define CMX270_NANDIRQ          IRQ_GPIO(89)
-#define CMX270_MMC_IRQ          IRQ_GPIO(83)
-
-/* PCMCIA related definitions */
-#define PCC_DETECT(x)   (GPLR(84 - (x)) & GPIO_bit(84 - (x)))
-#define PCC_READY(x)    (GPLR(82 - (x)) & GPIO_bit(82 - (x)))
-
-#define PCMCIA_S0_CD_VALID              IRQ_GPIO(84)
-#define PCMCIA_S0_CD_VALID_EDGE         GPIO_BOTH_EDGES
-
-#define PCMCIA_S1_CD_VALID              IRQ_GPIO(83)
-#define PCMCIA_S1_CD_VALID_EDGE         GPIO_BOTH_EDGES
-
-#define PCMCIA_S0_RDYINT                IRQ_GPIO(82)
-#define PCMCIA_S1_RDYINT                IRQ_GPIO(81)
-
-#define PCMCIA_RESET_GPIO               53
diff --git a/include/asm-arm/arch-pxa/eseries-gpio.h b/include/asm-arm/arch-pxa/eseries-gpio.h
new file mode 100644
index 000000000000..4c90b1310270
--- /dev/null
+++ b/include/asm-arm/arch-pxa/eseries-gpio.h
@@ -0,0 +1,50 @@
+/*
+ *  eseries-gpio.h
+ *
+ *  Copyright (C) Ian Molton <spyro@f2s.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ */
+
+/* e-series power button */
+#define GPIO_ESERIES_POWERBTN     0
+
+/* UDC GPIO definitions */
+#define GPIO_E7XX_USB_DISC       13
+#define GPIO_E7XX_USB_PULLUP      3
+
+#define GPIO_E800_USB_DISC        4
+#define GPIO_E800_USB_PULLUP     84
+
+/* e740 PCMCIA GPIO definitions */
+/* Note: PWR1 seems to be inverted */
+#define GPIO_E740_PCMCIA_CD0      8
+#define GPIO_E740_PCMCIA_CD1     44
+#define GPIO_E740_PCMCIA_RDY0    11
+#define GPIO_E740_PCMCIA_RDY1     6
+#define GPIO_E740_PCMCIA_RST0    27
+#define GPIO_E740_PCMCIA_RST1    24
+#define GPIO_E740_PCMCIA_PWR0    20
+#define GPIO_E740_PCMCIA_PWR1    23
+
+/* e750 PCMCIA GPIO definitions */
+#define GPIO_E750_PCMCIA_CD0      8
+#define GPIO_E750_PCMCIA_RDY0    12
+#define GPIO_E750_PCMCIA_RST0    27
+#define GPIO_E750_PCMCIA_PWR0    20
+
+/* e800 PCMCIA GPIO definitions */
+#define GPIO_E800_PCMCIA_RST0    69
+#define GPIO_E800_PCMCIA_RST1    72
+#define GPIO_E800_PCMCIA_PWR0    20
+#define GPIO_E800_PCMCIA_PWR1    73
+
+/* e7xx IrDA power control */
+#define GPIO_E7XX_IR_ON          38
+
+/* ASIC related GPIOs */
+#define GPIO_ESERIES_TMIO_IRQ        5
+#define GPIO_E800_ANGELX_IRQ      8
diff --git a/include/asm-arm/arch-pxa/eseries-irq.h b/include/asm-arm/arch-pxa/eseries-irq.h
new file mode 100644
index 000000000000..f2a93d5e31d3
--- /dev/null
+++ b/include/asm-arm/arch-pxa/eseries-irq.h
@@ -0,0 +1,27 @@
+/*
+ *  eseries-irq.h
+ *
+ *  Copyright (C) Ian Molton <spyro@f2s.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ */
+
+#define ANGELX_IRQ_BASE (IRQ_BOARD_START+8)
+#define IRQ_ANGELX(n) (ANGELX_IRQ_BASE + (n))
+
+#define ANGELX_RDY0_IRQ IRQ_ANGELX(0)
+#define ANGELX_ST0_IRQ  IRQ_ANGELX(1)
+#define ANGELX_CD0_IRQ  IRQ_ANGELX(2)
+#define ANGELX_RDY1_IRQ IRQ_ANGELX(3)
+#define ANGELX_ST1_IRQ  IRQ_ANGELX(4)
+#define ANGELX_CD1_IRQ  IRQ_ANGELX(5)
+
+#define TMIO_IRQ_BASE (IRQ_BOARD_START+0)
+#define IRQ_TMIO(n) (TMIO_IRQ_BASE + (n))
+
+#define TMIO_SD_IRQ     IRQ_TMIO(1)
+#define TMIO_USB_IRQ    IRQ_TMIO(2)
+
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index e25558faa5a4..979a45695d7d 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -69,6 +69,12 @@
                 _id == 0x212;                           \
         })
 
+#define __cpu_is_pxa255(id)                             \
+        ({                                              \
+                unsigned int _id = (id) >> 4 & 0xfff;   \
+                _id == 0x2d0;                           \
+         })
+
 #define __cpu_is_pxa25x(id)                             \
         ({                                              \
                 unsigned int _id = (id) >> 4 & 0xfff;   \
@@ -76,6 +82,7 @@
         })
 #else
 #define __cpu_is_pxa21x(id)     (0)
+#define __cpu_is_pxa255(id)     (0)
 #define __cpu_is_pxa25x(id)     (0)
 #endif
 
@@ -119,11 +126,26 @@
 #define __cpu_is_pxa320(id)     (0)
 #endif
 
+#ifdef CONFIG_CPU_PXA930
+#define __cpu_is_pxa930(id)                             \
+        ({                                              \
+                unsigned int _id = (id) >> 4 & 0xfff;   \
+                _id == 0x683;           \
+         })
+#else
+#define __cpu_is_pxa930(id)     (0)
+#endif
+
 #define cpu_is_pxa21x()                                 \
         ({                                              \
                 __cpu_is_pxa21x(read_cpuid_id());       \
         })
 
+#define cpu_is_pxa255()                                 \
+        ({                                              \
+                __cpu_is_pxa255(read_cpuid_id());       \
+        })
+
 #define cpu_is_pxa25x()                                 \
         ({                                              \
                 __cpu_is_pxa25x(read_cpuid_id());       \
@@ -149,6 +171,12 @@
                 __cpu_is_pxa320(read_cpuid_id());       \
          })
 
+#define cpu_is_pxa930()                                 \
+        ({                                              \
+                unsigned int id = read_cpuid(CPUID_ID); \
+                __cpu_is_pxa930(id);                    \
+         })
+
 /*
  * CPUID Core Generation Bit
  * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
@@ -192,18 +220,14 @@ extern int pxa_gpio_get_value(unsigned gpio);
 extern void pxa_gpio_set_value(unsigned gpio, int value);
 
 /*
- * Routine to enable or disable CKEN
+ * return current memory and LCD clock frequency in units of 10kHz
  */
-static inline void __deprecated pxa_set_cken(int clock, int enable)
-{
-        extern void __pxa_set_cken(int clock, int enable);
-        __pxa_set_cken(clock, enable);
-}
+extern unsigned int get_memclk_frequency_10khz(void);
 
 /*
- * return current memory and LCD clock frequency in units of 10kHz
+ * register GPIO as reset generator
  */
-extern unsigned int get_memclk_frequency_10khz(void);
+extern int init_gpio_reset(int gpio);
 
 #endif
 
diff --git a/include/asm-arm/arch-pxa/irda.h b/include/asm-arm/arch-pxa/irda.h
index 99f4f423a8e1..0a50c3c763df 100644
--- a/include/asm-arm/arch-pxa/irda.h
+++ b/include/asm-arm/arch-pxa/irda.h
@@ -16,4 +16,8 @@ struct pxaficp_platform_data {
 
 extern void pxa_set_ficp_info(struct pxaficp_platform_data *info);
 
+#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
+void pxa2xx_transceiver_mode(struct device *dev, int mode);
+#endif
+
 #endif
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h
index b6c8fe377683..9413121b0ed9 100644
--- a/include/asm-arm/arch-pxa/irqs.h
+++ b/include/asm-arm/arch-pxa/irqs.h
@@ -180,10 +180,13 @@
 #define NR_IRQS                 (IRQ_LOCOMO_SPI_TEND + 1)
 #elif defined(CONFIG_ARCH_LUBBOCK) || \
       defined(CONFIG_MACH_LOGICPD_PXA270) || \
+      defined(CONFIG_MACH_TOSA) || \
       defined(CONFIG_MACH_MAINSTONE) || \
       defined(CONFIG_MACH_PCM027) || \
       defined(CONFIG_MACH_MAGICIAN)
 #define NR_IRQS                 (IRQ_BOARD_END)
+#elif defined(CONFIG_MACH_ZYLONITE)
+#define NR_IRQS                 (IRQ_BOARD_START + 32)
 #else
 #define NR_IRQS                 (IRQ_BOARD_START)
 #endif
diff --git a/include/asm-arm/arch-pxa/mfp-pxa2xx.h b/include/asm-arm/arch-pxa/mfp-pxa2xx.h
index db8d890d237c..8de1c0dae624 100644
--- a/include/asm-arm/arch-pxa/mfp-pxa2xx.h
+++ b/include/asm-arm/arch-pxa/mfp-pxa2xx.h
@@ -128,5 +128,6 @@
 #define GPIO84_GPIO     MFP_CFG_IN(GPIO84, AF0)
 
 extern void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num);
+extern void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm);
 extern int gpio_set_wake(unsigned int gpio, unsigned int on);
 #endif /* __ASM_ARCH_MFP_PXA2XX_H */
diff --git a/include/asm-arm/arch-pxa/mfp-pxa930.h b/include/asm-arm/arch-pxa/mfp-pxa930.h
new file mode 100644
index 000000000000..c4e945ab1923
--- /dev/null
+++ b/include/asm-arm/arch-pxa/mfp-pxa930.h
@@ -0,0 +1,491 @@
+/*
+ * linux/include/asm-arm/arch-pxa/mfp-pxa930.h
+ *
+ * PXA930 specific MFP configuration definitions
+ *
+ * Copyright (C) 2007-2008 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_MFP_PXA9xx_H
+#define __ASM_ARCH_MFP_PXA9xx_H
+
+#include <asm/arch/mfp.h>
+#include <asm/arch/mfp-pxa3xx.h>
+
+/* GPIO */
+#define GPIO46_GPIO             MFP_CFG(GPIO46, AF0)
+#define GPIO49_GPIO             MFP_CFG(GPIO49, AF0)
+#define GPIO50_GPIO             MFP_CFG(GPIO50, AF0)
+#define GPIO51_GPIO             MFP_CFG(GPIO51, AF0)
+#define GPIO52_GPIO             MFP_CFG(GPIO52, AF0)
+#define GPIO56_GPIO             MFP_CFG(GPIO56, AF0)
+#define GPIO58_GPIO             MFP_CFG(GPIO58, AF0)
+#define GPIO59_GPIO             MFP_CFG(GPIO59, AF0)
+#define GPIO60_GPIO             MFP_CFG(GPIO60, AF0)
+#define GPIO61_GPIO             MFP_CFG(GPIO61, AF0)
+#define GPIO62_GPIO             MFP_CFG(GPIO62, AF0)
+
+#define GSIM_UCLK_GPIO_79       MFP_CFG(GSIM_UCLK, AF0)
+#define GSIM_UIO_GPIO_80        MFP_CFG(GSIM_UIO, AF0)
+#define GSIM_nURST_GPIO_81      MFP_CFG(GSIM_nURST, AF0)
+#define GSIM_UDET_GPIO_82       MFP_CFG(GSIM_UDET, AF0)
+
+#define DF_IO15_GPIO_28         MFP_CFG(DF_IO15, AF0)
+#define DF_IO14_GPIO_29         MFP_CFG(DF_IO14, AF0)
+#define DF_IO13_GPIO_30         MFP_CFG(DF_IO13, AF0)
+#define DF_IO12_GPIO_31         MFP_CFG(DF_IO12, AF0)
+#define DF_IO11_GPIO_32         MFP_CFG(DF_IO11, AF0)
+#define DF_IO10_GPIO_33         MFP_CFG(DF_IO10, AF0)
+#define DF_IO9_GPIO_34          MFP_CFG(DF_IO9, AF0)
+#define DF_IO8_GPIO_35          MFP_CFG(DF_IO8, AF0)
+#define DF_IO7_GPIO_36          MFP_CFG(DF_IO7, AF0)
+#define DF_IO6_GPIO_37          MFP_CFG(DF_IO6, AF0)
+#define DF_IO5_GPIO_38          MFP_CFG(DF_IO5, AF0)
+#define DF_IO4_GPIO_39          MFP_CFG(DF_IO4, AF0)
+#define DF_IO3_GPIO_40          MFP_CFG(DF_IO3, AF0)
+#define DF_IO2_GPIO_41          MFP_CFG(DF_IO2, AF0)
+#define DF_IO1_GPIO_42          MFP_CFG(DF_IO1, AF0)
+#define DF_IO0_GPIO_43          MFP_CFG(DF_IO0, AF0)
+#define DF_nCS0_GPIO_44         MFP_CFG(DF_nCS0, AF0)
+#define DF_nCS1_GPIO_45         MFP_CFG(DF_nCS1, AF0)
+#define DF_nWE_GPIO_46          MFP_CFG(DF_nWE, AF0)
+#define DF_nRE_nOE_GPIO_47      MFP_CFG(DF_nRE_nOE, AF0)
+#define DF_CLE_nOE_GPIO_48      MFP_CFG(DF_CLE_nOE, AF0)
+#define DF_nADV1_ALE_GPIO_49    MFP_CFG(DF_nADV1_ALE, AF0)
+#define DF_nADV2_ALE_GPIO_50    MFP_CFG(DF_nADV2_ALE, AF0)
+#define DF_INT_RnB_GPIO_51      MFP_CFG(DF_INT_RnB, AF0)
+#define DF_SCLK_E_GPIO_52       MFP_CFG(DF_SCLK_E, AF0)
+
+#define DF_ADDR0_GPIO_53        MFP_CFG(DF_ADDR0, AF0)
+#define DF_ADDR1_GPIO_54        MFP_CFG(DF_ADDR1, AF0)
+#define DF_ADDR2_GPIO_55        MFP_CFG(DF_ADDR2, AF0)
+#define DF_ADDR3_GPIO_56        MFP_CFG(DF_ADDR3, AF0)
+#define nXCVREN_GPIO_57         MFP_CFG(nXCVREN, AF0)
+#define nLUA_GPIO_58            MFP_CFG(nLUA, AF0)
+#define nLLA_GPIO_59            MFP_CFG(nLLA, AF0)
+#define nBE0_GPIO_60            MFP_CFG(nBE0, AF0)
+#define nBE1_GPIO_61            MFP_CFG(nBE1, AF0)
+#define RDY_GPIO_62             MFP_CFG(RDY, AF0)
+
+/* Chip Select */
+#define DF_nCS0_nCS2            MFP_CFG_LPM(DF_nCS0, AF3, PULL_HIGH)
+#define DF_nCS1_nCS3            MFP_CFG_LPM(DF_nCS1, AF3, PULL_HIGH)
+
+/* AC97 */
+#define GPIO83_BAC97_SYSCLK     MFP_CFG(GPIO83, AF3)
+#define GPIO84_BAC97_SDATA_IN0  MFP_CFG(GPIO84, AF3)
+#define GPIO85_BAC97_BITCLK     MFP_CFG(GPIO85, AF3)
+#define GPIO86_BAC97_nRESET     MFP_CFG(GPIO86, AF3)
+#define GPIO87_BAC97_SYNC       MFP_CFG(GPIO87, AF3)
+#define GPIO88_BAC97_SDATA_OUT  MFP_CFG(GPIO88, AF3)
+
+/* I2C */
+#define GPIO39_CI2C_SCL         MFP_CFG_LPM(GPIO39, AF3, PULL_HIGH)
+#define GPIO40_CI2C_SDA         MFP_CFG_LPM(GPIO40, AF3, PULL_HIGH)
+
+#define GPIO51_CI2C_SCL         MFP_CFG_LPM(GPIO51, AF3, PULL_HIGH)
+#define GPIO52_CI2C_SDA         MFP_CFG_LPM(GPIO52, AF3, PULL_HIGH)
+
+#define GPIO63_CI2C_SCL         MFP_CFG_LPM(GPIO63, AF4, PULL_HIGH)
+#define GPIO64_CI2C_SDA         MFP_CFG_LPM(GPIO64, AF4, PULL_HIGH)
+
+#define GPIO77_CI2C_SCL         MFP_CFG_LPM(GPIO77, AF2, PULL_HIGH)
+#define GPIO78_CI2C_SDA         MFP_CFG_LPM(GPIO78, AF2, PULL_HIGH)
+
+#define GPIO89_CI2C_SCL         MFP_CFG_LPM(GPIO89, AF1, PULL_HIGH)
+#define GPIO90_CI2C_SDA         MFP_CFG_LPM(GPIO90, AF1, PULL_HIGH)
+
+#define GPIO95_CI2C_SCL         MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH)
+#define GPIO96_CI2C_SDA         MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH)
+
+#define GPIO97_CI2C_SCL         MFP_CFG_LPM(GPIO97, AF3, PULL_HIGH)
+#define GPIO98_CI2C_SDA         MFP_CFG_LPM(GPIO98, AF3, PULL_HIGH)
+
+/* QCI */
+#define GPIO63_CI_DD_9          MFP_CFG_LPM(GPIO63, AF1, PULL_LOW)
+#define GPIO64_CI_DD_8          MFP_CFG_LPM(GPIO64, AF1, PULL_LOW)
+#define GPIO65_CI_DD_7          MFP_CFG_LPM(GPIO65, AF1, PULL_LOW)
+#define GPIO66_CI_DD_6          MFP_CFG_LPM(GPIO66, AF1, PULL_LOW)
+#define GPIO67_CI_DD_5          MFP_CFG_LPM(GPIO67, AF1, PULL_LOW)
+#define GPIO68_CI_DD_4          MFP_CFG_LPM(GPIO68, AF1, PULL_LOW)
+#define GPIO69_CI_DD_3          MFP_CFG_LPM(GPIO69, AF1, PULL_LOW)
+#define GPIO70_CI_DD_2          MFP_CFG_LPM(GPIO70, AF1, PULL_LOW)
+#define GPIO71_CI_DD_1          MFP_CFG_LPM(GPIO71, AF1, PULL_LOW)
+#define GPIO72_CI_DD_0          MFP_CFG_LPM(GPIO72, AF1, PULL_LOW)
+#define GPIO73_CI_HSYNC         MFP_CFG_LPM(GPIO73, AF1, PULL_LOW)
+#define GPIO74_CI_VSYNC         MFP_CFG_LPM(GPIO74, AF1, PULL_LOW)
+#define GPIO75_CI_MCLK          MFP_CFG_LPM(GPIO75, AF1, PULL_LOW)
+#define GPIO76_CI_PCLK          MFP_CFG_LPM(GPIO76, AF1, PULL_LOW)
+
+/* KEYPAD */
+#define GPIO4_KP_DKIN_4         MFP_CFG_LPM(GPIO4, AF3, FLOAT)
+#define GPIO5_KP_DKIN_5         MFP_CFG_LPM(GPIO5, AF3, FLOAT)
+#define GPIO6_KP_DKIN_6         MFP_CFG_LPM(GPIO6, AF3, FLOAT)
+#define GPIO7_KP_DKIN_7         MFP_CFG_LPM(GPIO7, AF3, FLOAT)
+#define GPIO8_KP_DKIN_4         MFP_CFG_LPM(GPIO8, AF3, FLOAT)
+#define GPIO9_KP_DKIN_5         MFP_CFG_LPM(GPIO9, AF3, FLOAT)
+#define GPIO10_KP_DKIN_6        MFP_CFG_LPM(GPIO10, AF3, FLOAT)
+#define GPIO11_KP_DKIN_7        MFP_CFG_LPM(GPIO11, AF3, FLOAT)
+
+#define GPIO12_KP_DKIN_0        MFP_CFG_LPM(GPIO12, AF2, FLOAT)
+#define GPIO13_KP_DKIN_1        MFP_CFG_LPM(GPIO13, AF2, FLOAT)
+#define GPIO14_KP_DKIN_2        MFP_CFG_LPM(GPIO14, AF2, FLOAT)
+#define GPIO15_KP_DKIN_3        MFP_CFG_LPM(GPIO15, AF2, FLOAT)
+
+#define GPIO41_KP_DKIN_0        MFP_CFG_LPM(GPIO41, AF2, FLOAT)
+#define GPIO42_KP_DKIN_1        MFP_CFG_LPM(GPIO42, AF2, FLOAT)
+#define GPIO43_KP_DKIN_2        MFP_CFG_LPM(GPIO43, AF2, FLOAT)
+#define GPIO44_KP_DKIN_3        MFP_CFG_LPM(GPIO44, AF2, FLOAT)
+#define GPIO41_KP_DKIN_4        MFP_CFG_LPM(GPIO41, AF4, FLOAT)
+#define GPIO42_KP_DKIN_5        MFP_CFG_LPM(GPIO42, AF4, FLOAT)
+
+#define GPIO0_KP_MKIN_0         MFP_CFG_LPM(GPIO0, AF1, FLOAT)
+#define GPIO2_KP_MKIN_1         MFP_CFG_LPM(GPIO2, AF1, FLOAT)
+#define GPIO4_KP_MKIN_2         MFP_CFG_LPM(GPIO4, AF1, FLOAT)
+#define GPIO6_KP_MKIN_3         MFP_CFG_LPM(GPIO6, AF1, FLOAT)
+#define GPIO8_KP_MKIN_4         MFP_CFG_LPM(GPIO8, AF1, FLOAT)
+#define GPIO10_KP_MKIN_5        MFP_CFG_LPM(GPIO10, AF1, FLOAT)
+#define GPIO12_KP_MKIN_6        MFP_CFG_LPM(GPIO12, AF1, FLOAT)
+#define GPIO14_KP_MKIN_7        MFP_CFG(GPIO14, AF1)
+#define GPIO35_KP_MKIN_5        MFP_CFG(GPIO35, AF4)
+
+#define GPIO1_KP_MKOUT_0        MFP_CFG_LPM(GPIO1, AF1, DRIVE_HIGH)
+#define GPIO3_KP_MKOUT_1        MFP_CFG_LPM(GPIO3, AF1, DRIVE_HIGH)
+#define GPIO5_KP_MKOUT_2        MFP_CFG_LPM(GPIO5, AF1, DRIVE_HIGH)
+#define GPIO7_KP_MKOUT_3        MFP_CFG_LPM(GPIO7, AF1, DRIVE_HIGH)
+#define GPIO9_KP_MKOUT_4        MFP_CFG_LPM(GPIO9, AF1, DRIVE_HIGH)
+#define GPIO11_KP_MKOUT_5       MFP_CFG_LPM(GPIO11, AF1, DRIVE_HIGH)
+#define GPIO13_KP_MKOUT_6       MFP_CFG_LPM(GPIO13, AF1, DRIVE_HIGH)
+#define GPIO15_KP_MKOUT_7       MFP_CFG_LPM(GPIO15, AF1, DRIVE_HIGH)
+#define GPIO36_KP_MKOUT_5       MFP_CFG_LPM(GPIO36, AF4, DRIVE_HIGH)
+
+/* LCD */
+#define GPIO17_LCD_FCLK_RD      MFP_CFG(GPIO17, AF1)
+#define GPIO18_LCD_LCLK_A0      MFP_CFG(GPIO18, AF1)
+#define GPIO19_LCD_PCLK_WR      MFP_CFG(GPIO19, AF1)
+#define GPIO20_LCD_BIAS         MFP_CFG(GPIO20, AF1)
+#define GPIO21_LCD_CS           MFP_CFG(GPIO21, AF1)
+#define GPIO22_LCD_CS2          MFP_CFG(GPIO22, AF2)
+#define GPIO22_LCD_VSYNC        MFP_CFG(GPIO22, AF1)
+#define GPIO23_LCD_DD0          MFP_CFG(GPIO23, AF1)
+#define GPIO24_LCD_DD1          MFP_CFG(GPIO24, AF1)
+#define GPIO25_LCD_DD2          MFP_CFG(GPIO25, AF1)
+#define GPIO26_LCD_DD3          MFP_CFG(GPIO26, AF1)
+#define GPIO27_LCD_DD4          MFP_CFG(GPIO27, AF1)
+#define GPIO28_LCD_DD5          MFP_CFG(GPIO28, AF1)
+#define GPIO29_LCD_DD6          MFP_CFG(GPIO29, AF1)
+#define GPIO30_LCD_DD7          MFP_CFG(GPIO30, AF1)
+#define GPIO31_LCD_DD8          MFP_CFG(GPIO31, AF1)
+#define GPIO32_LCD_DD9          MFP_CFG(GPIO32, AF1)
+#define GPIO33_LCD_DD10         MFP_CFG(GPIO33, AF1)
+#define GPIO34_LCD_DD11         MFP_CFG(GPIO34, AF1)
+#define GPIO35_LCD_DD12         MFP_CFG(GPIO35, AF1)
+#define GPIO36_LCD_DD13         MFP_CFG(GPIO36, AF1)
+#define GPIO37_LCD_DD14         MFP_CFG(GPIO37, AF1)
+#define GPIO38_LCD_DD15         MFP_CFG(GPIO38, AF1)
+#define GPIO39_LCD_DD16         MFP_CFG(GPIO39, AF1)
+#define GPIO40_LCD_DD17         MFP_CFG(GPIO40, AF1)
+#define GPIO41_LCD_CS2          MFP_CFG(GPIO41, AF3)
+#define GPIO42_LCD_VSYNC2       MFP_CFG(GPIO42, AF3)
+#define GPIO44_LCD_DD7          MFP_CFG(GPIO44, AF1)
+
+/* Mini-LCD */
+#define GPIO17_MLCD_FCLK        MFP_CFG(GPIO17, AF3)
+#define GPIO18_MLCD_LCLK        MFP_CFG(GPIO18, AF3)
+#define GPIO19_MLCD_PCLK        MFP_CFG(GPIO19, AF3)
+#define GPIO20_MLCD_BIAS        MFP_CFG(GPIO20, AF3)
+#define GPIO23_MLCD_DD0         MFP_CFG(GPIO23, AF3)
+#define GPIO24_MLCD_DD1         MFP_CFG(GPIO24, AF3)
+#define GPIO25_MLCD_DD2         MFP_CFG(GPIO25, AF3)
+#define GPIO26_MLCD_DD3         MFP_CFG(GPIO26, AF3)
+#define GPIO27_MLCD_DD4         MFP_CFG(GPIO27, AF3)
+#define GPIO28_MLCD_DD5         MFP_CFG(GPIO28, AF3)
+#define GPIO29_MLCD_DD6         MFP_CFG(GPIO29, AF3)
+#define GPIO30_MLCD_DD7         MFP_CFG(GPIO30, AF3)
+#define GPIO31_MLCD_DD8         MFP_CFG(GPIO31, AF3)
+#define GPIO32_MLCD_DD9         MFP_CFG(GPIO32, AF3)
+#define GPIO33_MLCD_DD10        MFP_CFG(GPIO33, AF3)
+#define GPIO34_MLCD_DD11        MFP_CFG(GPIO34, AF3)
+#define GPIO35_MLCD_DD12        MFP_CFG(GPIO35, AF3)
+#define GPIO36_MLCD_DD13        MFP_CFG(GPIO36, AF3)
+#define GPIO37_MLCD_DD14        MFP_CFG(GPIO37, AF3)
+#define GPIO38_MLCD_DD15        MFP_CFG(GPIO38, AF3)
+#define GPIO44_MLCD_DD7         MFP_CFG(GPIO44, AF5)
+
+/* MMC1 */
+#define GPIO10_MMC1_DAT3        MFP_CFG(GPIO10, AF4)
+#define GPIO11_MMC1_DAT2        MFP_CFG(GPIO11, AF4)
+#define GPIO12_MMC1_DAT1        MFP_CFG(GPIO12, AF4)
+#define GPIO13_MMC1_DAT0        MFP_CFG(GPIO13, AF4)
+#define GPIO14_MMC1_CMD         MFP_CFG(GPIO14, AF4)
+#define GPIO15_MMC1_CLK         MFP_CFG(GPIO15, AF4)
+#define GPIO55_MMC1_CMD         MFP_CFG(GPIO55, AF3)
+#define GPIO56_MMC1_CLK         MFP_CFG(GPIO56, AF3)
+#define GPIO57_MMC1_DAT0        MFP_CFG(GPIO57, AF3)
+#define GPIO58_MMC1_DAT1        MFP_CFG(GPIO58, AF3)
+#define GPIO59_MMC1_DAT2        MFP_CFG(GPIO59, AF3)
+#define GPIO60_MMC1_DAT3        MFP_CFG(GPIO60, AF3)
+
+#define DF_ADDR0_MMC1_CLK       MFP_CFG(DF_ADDR0, AF2)
+#define DF_ADDR1_MMC1_CMD       MFP_CFG(DF_ADDR1, AF2)
+#define DF_ADDR2_MMC1_DAT0      MFP_CFG(DF_ADDR2, AF2)
+#define DF_ADDR3_MMC1_DAT1      MFP_CFG(DF_ADDR3, AF3)
+#define nXCVREN_MMC1_DAT2       MFP_CFG(nXCVREN, AF2)
+
+/* MMC2 */
+#define GPIO31_MMC2_CMD         MFP_CFG(GPIO31, AF7)
+#define GPIO32_MMC2_CLK         MFP_CFG(GPIO32, AF7)
+#define GPIO33_MMC2_DAT0        MFP_CFG(GPIO33, AF7)
+#define GPIO34_MMC2_DAT1        MFP_CFG(GPIO34, AF7)
+#define GPIO35_MMC2_DAT2        MFP_CFG(GPIO35, AF7)
+#define GPIO36_MMC2_DAT3        MFP_CFG(GPIO36, AF7)
+
+#define GPIO101_MMC2_DAT3       MFP_CFG(GPIO101, AF1)
+#define GPIO102_MMC2_DAT2       MFP_CFG(GPIO102, AF1)
+#define GPIO103_MMC2_DAT1       MFP_CFG(GPIO103, AF1)
+#define GPIO104_MMC2_DAT0       MFP_CFG(GPIO104, AF1)
+#define GPIO105_MMC2_CMD        MFP_CFG(GPIO105, AF1)
+#define GPIO106_MMC2_CLK        MFP_CFG(GPIO106, AF1)
+
+#define DF_IO10_MMC2_DAT3       MFP_CFG(DF_IO10, AF3)
+#define DF_IO11_MMC2_DAT2       MFP_CFG(DF_IO11, AF3)
+#define DF_IO12_MMC2_DAT1       MFP_CFG(DF_IO12, AF3)
+#define DF_IO13_MMC2_DAT0       MFP_CFG(DF_IO13, AF3)
+#define DF_IO14_MMC2_CLK        MFP_CFG(DF_IO14, AF3)
+#define DF_IO15_MMC2_CMD        MFP_CFG(DF_IO15, AF3)
+
+/* BSSP1 */
+#define GPIO12_BSSP1_CLK        MFP_CFG(GPIO12, AF3)
+#define GPIO13_BSSP1_FRM        MFP_CFG(GPIO13, AF3)
+#define GPIO14_BSSP1_RXD        MFP_CFG(GPIO14, AF3)
+#define GPIO15_BSSP1_TXD        MFP_CFG(GPIO15, AF3)
+#define GPIO97_BSSP1_CLK        MFP_CFG(GPIO97, AF5)
+#define GPIO98_BSSP1_FRM        MFP_CFG(GPIO98, AF5)
+
+/* BSSP2 */
+#define GPIO84_BSSP2_SDATA_IN   MFP_CFG(GPIO84, AF1)
+#define GPIO85_BSSP2_BITCLK     MFP_CFG(GPIO85, AF1)
+#define GPIO86_BSSP2_SYSCLK     MFP_CFG(GPIO86, AF1)
+#define GPIO87_BSSP2_SYNC       MFP_CFG(GPIO87, AF1)
+#define GPIO88_BSSP2_DATA_OUT   MFP_CFG(GPIO88, AF1)
+#define GPIO86_BSSP2_SDATA_IN   MFP_CFG(GPIO86, AF4)
+
+/* BSSP3 */
+#define GPIO79_BSSP3_CLK        MFP_CFG(GPIO79, AF1)
+#define GPIO80_BSSP3_FRM        MFP_CFG(GPIO80, AF1)
+#define GPIO81_BSSP3_TXD        MFP_CFG(GPIO81, AF1)
+#define GPIO82_BSSP3_RXD        MFP_CFG(GPIO82, AF1)
+#define GPIO83_BSSP3_SYSCLK     MFP_CFG(GPIO83, AF1)
+
+/* BSSP4 */
+#define GPIO43_BSSP4_CLK        MFP_CFG(GPIO43, AF4)
+#define GPIO44_BSSP4_FRM        MFP_CFG(GPIO44, AF4)
+#define GPIO45_BSSP4_TXD        MFP_CFG(GPIO45, AF4)
+#define GPIO46_BSSP4_RXD        MFP_CFG(GPIO46, AF4)
+
+#define GPIO51_BSSP4_CLK        MFP_CFG(GPIO51, AF4)
+#define GPIO52_BSSP4_FRM        MFP_CFG(GPIO52, AF4)
+#define GPIO53_BSSP4_TXD        MFP_CFG(GPIO53, AF4)
+#define GPIO54_BSSP4_RXD        MFP_CFG(GPIO54, AF4)
+
+/* GSSP1 */
+#define GPIO79_GSSP1_CLK        MFP_CFG(GPIO79, AF2)
+#define GPIO80_GSSP1_FRM        MFP_CFG(GPIO80, AF2)
+#define GPIO81_GSSP1_TXD        MFP_CFG(GPIO81, AF2)
+#define GPIO82_GSSP1_RXD        MFP_CFG(GPIO82, AF2)
+#define GPIO83_GSSP1_SYSCLK     MFP_CFG(GPIO83, AF2)
+
+#define GPIO93_GSSP1_CLK        MFP_CFG(GPIO93, AF4)
+#define GPIO94_GSSP1_FRM        MFP_CFG(GPIO94, AF4)
+#define GPIO95_GSSP1_TXD        MFP_CFG(GPIO95, AF4)
+#define GPIO96_GSSP1_RXD        MFP_CFG(GPIO96, AF4)
+
+/* GSSP2 */
+#define GPIO47_GSSP2_CLK        MFP_CFG(GPIO47, AF4)
+#define GPIO48_GSSP2_FRM        MFP_CFG(GPIO48, AF4)
+#define GPIO49_GSSP2_RXD        MFP_CFG(GPIO49, AF4)
+#define GPIO50_GSSP2_TXD        MFP_CFG(GPIO50, AF4)
+
+#define GPIO69_GSSP2_CLK        MFP_CFG(GPIO69, AF4)
+#define GPIO70_GSSP2_FRM        MFP_CFG(GPIO70, AF4)
+#define GPIO71_GSSP2_RXD        MFP_CFG(GPIO71, AF4)
+#define GPIO72_GSSP2_TXD        MFP_CFG(GPIO72, AF4)
+
+#define GPIO84_GSSP2_RXD        MFP_CFG(GPIO84, AF2)
+#define GPIO85_GSSP2_CLK        MFP_CFG(GPIO85, AF2)
+#define GPIO86_GSSP2_SYSCLK     MFP_CFG(GPIO86, AF2)
+#define GPIO87_GSSP2_FRM        MFP_CFG(GPIO87, AF2)
+#define GPIO88_GSSP2_TXD        MFP_CFG(GPIO88, AF2)
+#define GPIO86_GSSP2_RXD        MFP_CFG(GPIO86, AF5)
+
+#define GPIO103_GSSP2_CLK       MFP_CFG(GPIO103, AF2)
+#define GPIO104_GSSP2_FRM       MFP_CFG(GPIO104, AF2)
+#define GPIO105_GSSP2_RXD       MFP_CFG(GPIO105, AF2)
+#define GPIO106_GSSP2_TXD       MFP_CFG(GPIO106, AF2)
+
+/* UART1 - FFUART */
+#define GPIO47_UART1_DSR_N      MFP_CFG(GPIO47, AF1)
+#define GPIO48_UART1_DTR_N      MFP_CFG(GPIO48, AF1)
+#define GPIO49_UART1_RI         MFP_CFG(GPIO49, AF1)
+#define GPIO50_UART1_DCD        MFP_CFG(GPIO50, AF1)
+#define GPIO51_UART1_CTS        MFP_CFG(GPIO51, AF1)
+#define GPIO52_UART1_RTS        MFP_CFG(GPIO52, AF1)
+#define GPIO53_UART1_RXD        MFP_CFG(GPIO53, AF1)
+#define GPIO54_UART1_TXD        MFP_CFG(GPIO54, AF1)
+
+#define GPIO63_UART1_TXD        MFP_CFG(GPIO63, AF2)
+#define GPIO64_UART1_RXD        MFP_CFG(GPIO64, AF2)
+#define GPIO65_UART1_DSR        MFP_CFG(GPIO65, AF2)
+#define GPIO66_UART1_DTR        MFP_CFG(GPIO66, AF2)
+#define GPIO67_UART1_RI         MFP_CFG(GPIO67, AF2)
+#define GPIO68_UART1_DCD        MFP_CFG(GPIO68, AF2)
+#define GPIO69_UART1_CTS        MFP_CFG(GPIO69, AF2)
+#define GPIO70_UART1_RTS        MFP_CFG(GPIO70, AF2)
+
+/* UART2 - BTUART */
+#define GPIO91_UART2_RXD        MFP_CFG(GPIO91, AF1)
+#define GPIO92_UART2_TXD        MFP_CFG(GPIO92, AF1)
+#define GPIO93_UART2_CTS        MFP_CFG(GPIO93, AF1)
+#define GPIO94_UART2_RTS        MFP_CFG(GPIO94, AF1)
+
+/* UART3 - STUART */
+#define GPIO43_UART3_RTS        MFP_CFG(GPIO43, AF3)
+#define GPIO44_UART3_CTS        MFP_CFG(GPIO44, AF3)
+#define GPIO45_UART3_RXD        MFP_CFG(GPIO45, AF3)
+#define GPIO46_UART3_TXD        MFP_CFG(GPIO46, AF3)
+
+#define GPIO75_UART3_RTS        MFP_CFG(GPIO75, AF5)
+#define GPIO76_UART3_CTS        MFP_CFG(GPIO76, AF5)
+#define GPIO77_UART3_TXD        MFP_CFG(GPIO77, AF5)
+#define GPIO78_UART3_RXD        MFP_CFG(GPIO78, AF5)
+
+/* DFI */
+#define DF_IO0_DF_IO0           MFP_CFG(DF_IO0, AF2)
+#define DF_IO1_DF_IO1           MFP_CFG(DF_IO1, AF2)
+#define DF_IO2_DF_IO2           MFP_CFG(DF_IO2, AF2)
+#define DF_IO3_DF_IO3           MFP_CFG(DF_IO3, AF2)
+#define DF_IO4_DF_IO4           MFP_CFG(DF_IO4, AF2)
+#define DF_IO5_DF_IO5           MFP_CFG(DF_IO5, AF2)
+#define DF_IO6_DF_IO6           MFP_CFG(DF_IO6, AF2)
+#define DF_IO7_DF_IO7           MFP_CFG(DF_IO7, AF2)
+#define DF_IO8_DF_IO8           MFP_CFG(DF_IO8, AF2)
+#define DF_IO9_DF_IO9           MFP_CFG(DF_IO9, AF2)
+#define DF_IO10_DF_IO10         MFP_CFG(DF_IO10, AF2)
+#define DF_IO11_DF_IO11         MFP_CFG(DF_IO11, AF2)
+#define DF_IO12_DF_IO12         MFP_CFG(DF_IO12, AF2)
+#define DF_IO13_DF_IO13         MFP_CFG(DF_IO13, AF2)
+#define DF_IO14_DF_IO14         MFP_CFG(DF_IO14, AF2)
+#define DF_IO15_DF_IO15         MFP_CFG(DF_IO15, AF2)
+#define DF_nADV1_ALE_DF_nADV1   MFP_CFG(DF_nADV1_ALE, AF2)
+#define DF_nADV2_ALE_DF_nADV2   MFP_CFG(DF_nADV2_ALE, AF2)
+#define DF_nCS0_DF_nCS0         MFP_CFG(DF_nCS0, AF2)
+#define DF_nCS1_DF_nCS1         MFP_CFG(DF_nCS1, AF2)
+#define DF_nRE_nOE_DF_nOE       MFP_CFG(DF_nRE_nOE, AF2)
+#define DF_nWE_DF_nWE           MFP_CFG(DF_nWE, AF2)
+
+/* DFI - NAND */
+#define DF_CLE_nOE_ND_CLE       MFP_CFG_LPM(DF_CLE_nOE, AF1, PULL_HIGH)
+#define DF_INT_RnB_ND_INT_RnB   MFP_CFG_LPM(DF_INT_RnB, AF1, PULL_LOW)
+#define DF_IO0_ND_IO0           MFP_CFG_LPM(DF_IO0, AF1, PULL_LOW)
+#define DF_IO1_ND_IO1           MFP_CFG_LPM(DF_IO1, AF1, PULL_LOW)
+#define DF_IO2_ND_IO2           MFP_CFG_LPM(DF_IO2, AF1, PULL_LOW)
+#define DF_IO3_ND_IO3           MFP_CFG_LPM(DF_IO3, AF1, PULL_LOW)
+#define DF_IO4_ND_IO4           MFP_CFG_LPM(DF_IO4, AF1, PULL_LOW)
+#define DF_IO5_ND_IO5           MFP_CFG_LPM(DF_IO5, AF1, PULL_LOW)
+#define DF_IO6_ND_IO6           MFP_CFG_LPM(DF_IO6, AF1, PULL_LOW)
+#define DF_IO7_ND_IO7           MFP_CFG_LPM(DF_IO7, AF1, PULL_LOW)
+#define DF_IO8_ND_IO8           MFP_CFG_LPM(DF_IO8, AF1, PULL_LOW)
+#define DF_IO9_ND_IO9           MFP_CFG_LPM(DF_IO9, AF1, PULL_LOW)
+#define DF_IO10_ND_IO10         MFP_CFG_LPM(DF_IO10, AF1, PULL_LOW)
+#define DF_IO11_ND_IO11         MFP_CFG_LPM(DF_IO11, AF1, PULL_LOW)
+#define DF_IO12_ND_IO12         MFP_CFG_LPM(DF_IO12, AF1, PULL_LOW)
+#define DF_IO13_ND_IO13         MFP_CFG_LPM(DF_IO13, AF1, PULL_LOW)
+#define DF_IO14_ND_IO14         MFP_CFG_LPM(DF_IO14, AF1, PULL_LOW)
+#define DF_IO15_ND_IO15         MFP_CFG_LPM(DF_IO15, AF1, PULL_LOW)
+#define DF_nADV1_ALE_ND_ALE     MFP_CFG_LPM(DF_nADV1_ALE, AF1, PULL_HIGH)
+#define DF_nADV2_ALE_ND_ALE     MFP_CFG_LPM(DF_nADV2_ALE, AF1, PULL_HIGH)
+#define DF_nADV2_ALE_nCS3       MFP_CFG_LPM(DF_nADV2_ALE, AF3, PULL_HIGH)
+#define DF_nCS0_ND_nCS0         MFP_CFG_LPM(DF_nCS0, AF1, PULL_HIGH)
+#define DF_nCS1_ND_nCS1         MFP_CFG_LPM(DF_nCS1, AF1, PULL_HIGH)
+#define DF_nRE_nOE_ND_nRE       MFP_CFG_LPM(DF_nRE_nOE, AF1, PULL_HIGH)
+#define DF_nWE_ND_nWE           MFP_CFG_LPM(DF_nWE, AF1, PULL_HIGH)
+
+/* PWM */
+#define GPIO41_PWM0             MFP_CFG_LPM(GPIO41, AF1, PULL_LOW)
+#define GPIO42_PWM1             MFP_CFG_LPM(GPIO42, AF1, PULL_LOW)
+#define GPIO43_PWM3             MFP_CFG_LPM(GPIO43, AF1, PULL_LOW)
+#define GPIO20_PWM0             MFP_CFG_LPM(GPIO20, AF2, PULL_LOW)
+#define GPIO21_PWM2             MFP_CFG_LPM(GPIO21, AF3, PULL_LOW)
+#define GPIO22_PWM3             MFP_CFG_LPM(GPIO22, AF3, PULL_LOW)
+
+/* CIR */
+#define GPIO46_CIR_OUT          MFP_CFG(GPIO46, AF1)
+#define GPIO77_CIR_OUT          MFP_CFG(GPIO77, AF3)
+
+/* USB P2 */
+#define GPIO0_USB_P2_7          MFP_CFG(GPIO0, AF3)
+#define GPIO15_USB_P2_7         MFP_CFG(GPIO15, AF5)
+#define GPIO16_USB_P2_7         MFP_CFG(GPIO16, AF2)
+#define GPIO48_USB_P2_7         MFP_CFG(GPIO48, AF7)
+#define GPIO49_USB_P2_7         MFP_CFG(GPIO49, AF6)
+#define DF_IO9_USB_P2_7         MFP_CFG(DF_IO9, AF3)
+
+#define GPIO48_USB_P2_8         MFP_CFG(GPIO48, AF2)
+#define GPIO50_USB_P2_7         MFP_CFG_X(GPIO50, AF2, DS02X, FLOAT)
+#define GPIO51_USB_P2_5         MFP_CFG(GPIO51, AF2)
+#define GPIO47_USB_P2_4         MFP_CFG(GPIO47, AF2)
+#define GPIO53_USB_P2_3         MFP_CFG(GPIO53, AF2)
+#define GPIO54_USB_P2_6         MFP_CFG(GPIO54, AF2)
+#define GPIO49_USB_P2_2         MFP_CFG(GPIO49, AF2)
+#define GPIO52_USB_P2_1         MFP_CFG(GPIO52, AF2)
+
+#define GPIO63_USB_P2_8         MFP_CFG(GPIO63, AF3)
+#define GPIO64_USB_P2_7         MFP_CFG(GPIO64, AF3)
+#define GPIO65_USB_P2_6         MFP_CFG(GPIO65, AF3)
+#define GPIO66_USG_P2_5         MFP_CFG(GPIO66, AF3)
+#define GPIO67_USB_P2_4         MFP_CFG(GPIO67, AF3)
+#define GPIO68_USB_P2_3         MFP_CFG(GPIO68, AF3)
+#define GPIO69_USB_P2_2         MFP_CFG(GPIO69, AF3)
+#define GPIO70_USB_P2_1         MFP_CFG(GPIO70, AF3)
+
+/* ULPI */
+#define GPIO31_USB_ULPI_D0      MFP_CFG(GPIO31, AF4)
+#define GPIO30_USB_ULPI_D1      MFP_CFG(GPIO30, AF7)
+#define GPIO33_USB_ULPI_D2      MFP_CFG(GPIO33, AF5)
+#define GPIO34_USB_ULPI_D3      MFP_CFG(GPIO34, AF5)
+#define GPIO35_USB_ULPI_D4      MFP_CFG(GPIO35, AF5)
+#define GPIO36_USB_ULPI_D5      MFP_CFG(GPIO36, AF5)
+#define GPIO41_USB_ULPI_D6      MFP_CFG(GPIO41, AF5)
+#define GPIO42_USB_ULPI_D7      MFP_CFG(GPIO42, AF5)
+#define GPIO37_USB_ULPI_DIR     MFP_CFG(GPIO37, AF4)
+#define GPIO38_USB_ULPI_CLK     MFP_CFG(GPIO38, AF4)
+#define GPIO39_USB_ULPI_STP     MFP_CFG(GPIO39, AF4)
+#define GPIO40_USB_ULPI_NXT     MFP_CFG(GPIO40, AF4)
+
+#define GPIO3_CLK26MOUTDMD      MFP_CFG(GPIO3, AF3)
+#define GPIO40_CLK26MOUTDMD     MFP_CFG(GPIO40, AF7)
+#define GPIO94_CLK26MOUTDMD     MFP_CFG(GPIO94, AF5)
+#define GPIO104_CLK26MOUTDMD    MFP_CFG(GPIO104, AF4)
+#define DF_ADDR1_CLK26MOUTDMD   MFP_CFG(DF_ADDR2, AF3)
+#define DF_ADDR3_CLK26MOUTDMD   MFP_CFG(DF_ADDR3, AF3)
+
+#define GPIO14_CLK26MOUT        MFP_CFG(GPIO14, AF5)
+#define GPIO38_CLK26MOUT        MFP_CFG(GPIO38, AF7)
+#define GPIO92_CLK26MOUT        MFP_CFG(GPIO92, AF5)
+#define GPIO105_CLK26MOUT       MFP_CFG(GPIO105, AF4)
+
+#define GPIO2_CLK13MOUTDMD      MFP_CFG(GPIO2, AF3)
+#define GPIO39_CLK13MOUTDMD     MFP_CFG(GPIO39, AF7)
+#define GPIO50_CLK13MOUTDMD     MFP_CFG(GPIO50, AF3)
+#define GPIO93_CLK13MOUTDMD     MFP_CFG(GPIO93, AF5)
+#define GPIO103_CLK13MOUTDMD    MFP_CFG(GPIO103, AF4)
+#define DF_ADDR2_CLK13MOUTDMD   MFP_CFG(DF_ADDR2, AF3)
+
+/* 1 wire */
+#define GPIO95_OW_DQ_IN         MFP_CFG(GPIO95, AF5)
+
+#endif /* __ASM_ARCH_MFP_PXA9xx_H */
diff --git a/include/asm-arm/arch-pxa/mfp.h b/include/asm-arm/arch-pxa/mfp.h
index 02f6157396d3..e7d58798da67 100644
--- a/include/asm-arm/arch-pxa/mfp.h
+++ b/include/asm-arm/arch-pxa/mfp.h
@@ -210,6 +210,14 @@ enum {
         MFP_PIN_DF_IO14,
         MFP_PIN_DF_IO15,
 
+        /* additional pins on PXA930 */
+        MFP_PIN_GSIM_UIO,
+        MFP_PIN_GSIM_UCLK,
+        MFP_PIN_GSIM_UDET,
+        MFP_PIN_GSIM_nURST,
+        MFP_PIN_PMIC_INT,
+        MFP_PIN_RDY,
+
         MFP_PIN_MAX,
 };
 
diff --git a/include/asm-arm/arch-pxa/palmtx.h b/include/asm-arm/arch-pxa/palmtx.h
new file mode 100644
index 000000000000..1e8bccbda510
--- /dev/null
+++ b/include/asm-arm/arch-pxa/palmtx.h
@@ -0,0 +1,106 @@
+/*
+ * GPIOs and interrupts for Palm T|X Handheld Computer
+ *
+ * Based on palmld-gpio.h by Alex Osborne
+ *
+ * Authors:     Marek Vasut <marek.vasut@gmail.com>
+ *              Cristiano P. <cristianop@users.sourceforge.net>
+ *              Jan Herman <2hp@seznam.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _INCLUDE_PALMTX_H_
+#define _INCLUDE_PALMTX_H_
+
+/** HERE ARE GPIOs **/
+
+/* GPIOs */
+#define GPIO_NR_PALMTX_GPIO_RESET               1
+
+#define GPIO_NR_PALMTX_POWER_DETECT             12 /* 90 */
+#define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N         10
+#define GPIO_NR_PALMTX_EARPHONE_DETECT          107
+
+/* SD/MMC */
+#define GPIO_NR_PALMTX_SD_DETECT_N              14
+#define GPIO_NR_PALMTX_SD_POWER                 114 /* probably */
+#define GPIO_NR_PALMTX_SD_READONLY              115 /* probably */
+
+/* TOUCHSCREEN */
+#define GPIO_NR_PALMTX_WM9712_IRQ               27
+
+/* IRDA -  disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
+#define GPIO_NR_PALMTX_IR_DISABLE               40
+
+/* USB */
+#define GPIO_NR_PALMTX_USB_DETECT_N             13
+#define GPIO_NR_PALMTX_USB_POWER                95
+#define GPIO_NR_PALMTX_USB_PULLUP               93
+
+/* LCD/BACKLIGHT */
+#define GPIO_NR_PALMTX_BL_POWER                 84
+#define GPIO_NR_PALMTX_LCD_POWER                96
+
+/* LCD BORDER */
+#define GPIO_NR_PALMTX_BORDER_SWITCH            98
+#define GPIO_NR_PALMTX_BORDER_SELECT            22
+
+/* BLUETOOTH */
+#define GPIO_NR_PALMTX_BT_POWER                 17
+#define GPIO_NR_PALMTX_BT_RESET                 83
+
+/* PCMCIA (WiFi) */
+#define GPIO_NR_PALMTX_PCMCIA_POWER1            94
+#define GPIO_NR_PALMTX_PCMCIA_POWER2            108
+#define GPIO_NR_PALMTX_PCMCIA_RESET             79
+#define GPIO_NR_PALMTX_PCMCIA_READY             116
+
+/* NAND Flash ... this GPIO may be incorrect! */
+#define GPIO_NR_PALMTX_NAND_BUFFER_DIR          79
+
+/* INTERRUPTS */
+#define IRQ_GPIO_PALMTX_SD_DETECT_N     IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N)
+#define IRQ_GPIO_PALMTX_WM9712_IRQ      IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ)
+#define IRQ_GPIO_PALMTX_USB_DETECT      IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT)
+#define IRQ_GPIO_PALMTX_GPIO_RESET      IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET)
+
+/** HERE ARE INIT VALUES **/
+
+/* Various addresses  */
+#define PALMTX_PCMCIA_PHYS      0x28000000
+#define PALMTX_PCMCIA_VIRT      0xf0000000
+#define PALMTX_PCMCIA_SIZE      0x100000
+
+#define PALMTX_PHYS_RAM_START   0xa0000000
+#define PALMTX_PHYS_IO_START    0x40000000
+
+#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS    /* ChipSelect 0 */
+#define PALMTX_PHYS_NAND_START  PXA_CS1_PHYS    /* ChipSelect 1 */
+
+/* TOUCHSCREEN */
+#define AC97_LINK_FRAME                 21
+
+
+/* BATTERY */
+#define PALMTX_BAT_MAX_VOLTAGE          4000    /* 4.00v current voltage */
+#define PALMTX_BAT_MIN_VOLTAGE          3550    /* 3.55v critical voltage */
+#define PALMTX_BAT_MAX_CURRENT          0       /* unknokn */
+#define PALMTX_BAT_MIN_CURRENT          0       /* unknown */
+#define PALMTX_BAT_MAX_CHARGE           1       /* unknown */
+#define PALMTX_BAT_MIN_CHARGE           1       /* unknown */
+#define PALMTX_MAX_LIFE_MINS            360     /* on-life in minutes */
+
+#define PALMTX_BAT_MEASURE_DELAY        (HZ * 1)
+
+/* BACKLIGHT */
+#define PALMTX_MAX_INTENSITY            0xFE
+#define PALMTX_DEFAULT_INTENSITY        0x7E
+#define PALMTX_LIMIT_MASK               0x7F
+#define PALMTX_PRESCALER                0x3F
+#define PALMTX_PERIOD_NS                3500
+
+#endif
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 4b2ea1e95c57..dce9308626b7 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -600,418 +600,6 @@
 
 
 /*
- * USB Device Controller
- * PXA25x and PXA27x USB device controller registers are different.
- */
-#if defined(CONFIG_PXA25x)
-
-#define UDC_RES1        __REG(0x40600004)  /* UDC Undocumented - Reserved1 */
-#define UDC_RES2        __REG(0x40600008)  /* UDC Undocumented - Reserved2 */
-#define UDC_RES3        __REG(0x4060000C)  /* UDC Undocumented - Reserved3 */
-
-#define UDCCR           __REG(0x40600000)  /* UDC Control Register */
-#define UDCCR_UDE       (1 << 0)        /* UDC enable */
-#define UDCCR_UDA       (1 << 1)        /* UDC active */
-#define UDCCR_RSM       (1 << 2)        /* Device resume */
-#define UDCCR_RESIR     (1 << 3)        /* Resume interrupt request */
-#define UDCCR_SUSIR     (1 << 4)        /* Suspend interrupt request */
-#define UDCCR_SRM       (1 << 5)        /* Suspend/resume interrupt mask */
-#define UDCCR_RSTIR     (1 << 6)        /* Reset interrupt request */
-#define UDCCR_REM       (1 << 7)        /* Reset interrupt mask */
-
-#define UDCCS0          __REG(0x40600010)  /* UDC Endpoint 0 Control/Status Register */
-#define UDCCS0_OPR      (1 << 0)        /* OUT packet ready */
-#define UDCCS0_IPR      (1 << 1)        /* IN packet ready */
-#define UDCCS0_FTF      (1 << 2)        /* Flush Tx FIFO */
-#define UDCCS0_DRWF     (1 << 3)        /* Device remote wakeup feature */
-#define UDCCS0_SST      (1 << 4)        /* Sent stall */
-#define UDCCS0_FST      (1 << 5)        /* Force stall */
-#define UDCCS0_RNE      (1 << 6)        /* Receive FIFO no empty */
-#define UDCCS0_SA       (1 << 7)        /* Setup active */
-
-/* Bulk IN - Endpoint 1,6,11 */
-#define UDCCS1          __REG(0x40600014)  /* UDC Endpoint 1 (IN) Control/Status Register */
-#define UDCCS6          __REG(0x40600028)  /* UDC Endpoint 6 (IN) Control/Status Register */
-#define UDCCS11         __REG(0x4060003C)  /* UDC Endpoint 11 (IN) Control/Status Register */
-
-#define UDCCS_BI_TFS    (1 << 0)        /* Transmit FIFO service */
-#define UDCCS_BI_TPC    (1 << 1)        /* Transmit packet complete */
-#define UDCCS_BI_FTF    (1 << 2)        /* Flush Tx FIFO */
-#define UDCCS_BI_TUR    (1 << 3)        /* Transmit FIFO underrun */
-#define UDCCS_BI_SST    (1 << 4)        /* Sent stall */
-#define UDCCS_BI_FST    (1 << 5)        /* Force stall */
-#define UDCCS_BI_TSP    (1 << 7)        /* Transmit short packet */
-
-/* Bulk OUT - Endpoint 2,7,12 */
-#define UDCCS2          __REG(0x40600018)  /* UDC Endpoint 2 (OUT) Control/Status Register */
-#define UDCCS7          __REG(0x4060002C)  /* UDC Endpoint 7 (OUT) Control/Status Register */
-#define UDCCS12         __REG(0x40600040)  /* UDC Endpoint 12 (OUT) Control/Status Register */
-
-#define UDCCS_BO_RFS    (1 << 0)        /* Receive FIFO service */
-#define UDCCS_BO_RPC    (1 << 1)        /* Receive packet complete */
-#define UDCCS_BO_DME    (1 << 3)        /* DMA enable */
-#define UDCCS_BO_SST    (1 << 4)        /* Sent stall */
-#define UDCCS_BO_FST    (1 << 5)        /* Force stall */
-#define UDCCS_BO_RNE    (1 << 6)        /* Receive FIFO not empty */
-#define UDCCS_BO_RSP    (1 << 7)        /* Receive short packet */
-
-/* Isochronous IN - Endpoint 3,8,13 */
-#define UDCCS3          __REG(0x4060001C)  /* UDC Endpoint 3 (IN) Control/Status Register */
-#define UDCCS8          __REG(0x40600030)  /* UDC Endpoint 8 (IN) Control/Status Register */
-#define UDCCS13         __REG(0x40600044)  /* UDC Endpoint 13 (IN) Control/Status Register */
-
-#define UDCCS_II_TFS    (1 << 0)        /* Transmit FIFO service */
-#define UDCCS_II_TPC    (1 << 1)        /* Transmit packet complete */
-#define UDCCS_II_FTF    (1 << 2)        /* Flush Tx FIFO */
-#define UDCCS_II_TUR    (1 << 3)        /* Transmit FIFO underrun */
-#define UDCCS_II_TSP    (1 << 7)        /* Transmit short packet */
-
-/* Isochronous OUT - Endpoint 4,9,14 */
-#define UDCCS4          __REG(0x40600020)  /* UDC Endpoint 4 (OUT) Control/Status Register */
-#define UDCCS9          __REG(0x40600034)  /* UDC Endpoint 9 (OUT) Control/Status Register */
-#define UDCCS14         __REG(0x40600048)  /* UDC Endpoint 14 (OUT) Control/Status Register */
-
-#define UDCCS_IO_RFS    (1 << 0)        /* Receive FIFO service */
-#define UDCCS_IO_RPC    (1 << 1)        /* Receive packet complete */
-#define UDCCS_IO_ROF    (1 << 2)        /* Receive overflow */
-#define UDCCS_IO_DME    (1 << 3)        /* DMA enable */
-#define UDCCS_IO_RNE    (1 << 6)        /* Receive FIFO not empty */
-#define UDCCS_IO_RSP    (1 << 7)        /* Receive short packet */
-
-/* Interrupt IN - Endpoint 5,10,15 */
-#define UDCCS5          __REG(0x40600024)  /* UDC Endpoint 5 (Interrupt) Control/Status Register */
-#define UDCCS10         __REG(0x40600038)  /* UDC Endpoint 10 (Interrupt) Control/Status Register */
-#define UDCCS15         __REG(0x4060004C)  /* UDC Endpoint 15 (Interrupt) Control/Status Register */
-
-#define UDCCS_INT_TFS   (1 << 0)        /* Transmit FIFO service */
-#define UDCCS_INT_TPC   (1 << 1)        /* Transmit packet complete */
-#define UDCCS_INT_FTF   (1 << 2)        /* Flush Tx FIFO */
-#define UDCCS_INT_TUR   (1 << 3)        /* Transmit FIFO underrun */
-#define UDCCS_INT_SST   (1 << 4)        /* Sent stall */
-#define UDCCS_INT_FST   (1 << 5)        /* Force stall */
-#define UDCCS_INT_TSP   (1 << 7)        /* Transmit short packet */
-
-#define UFNRH           __REG(0x40600060)  /* UDC Frame Number Register High */
-#define UFNRL           __REG(0x40600064)  /* UDC Frame Number Register Low */
-#define UBCR2           __REG(0x40600068)  /* UDC Byte Count Reg 2 */
-#define UBCR4           __REG(0x4060006c)  /* UDC Byte Count Reg 4 */
-#define UBCR7           __REG(0x40600070)  /* UDC Byte Count Reg 7 */
-#define UBCR9           __REG(0x40600074)  /* UDC Byte Count Reg 9 */
-#define UBCR12          __REG(0x40600078)  /* UDC Byte Count Reg 12 */
-#define UBCR14          __REG(0x4060007c)  /* UDC Byte Count Reg 14 */
-#define UDDR0           __REG(0x40600080)  /* UDC Endpoint 0 Data Register */
-#define UDDR1           __REG(0x40600100)  /* UDC Endpoint 1 Data Register */
-#define UDDR2           __REG(0x40600180)  /* UDC Endpoint 2 Data Register */
-#define UDDR3           __REG(0x40600200)  /* UDC Endpoint 3 Data Register */
-#define UDDR4           __REG(0x40600400)  /* UDC Endpoint 4 Data Register */
-#define UDDR5           __REG(0x406000A0)  /* UDC Endpoint 5 Data Register */
-#define UDDR6           __REG(0x40600600)  /* UDC Endpoint 6 Data Register */
-#define UDDR7           __REG(0x40600680)  /* UDC Endpoint 7 Data Register */
-#define UDDR8           __REG(0x40600700)  /* UDC Endpoint 8 Data Register */
-#define UDDR9           __REG(0x40600900)  /* UDC Endpoint 9 Data Register */
-#define UDDR10          __REG(0x406000C0)  /* UDC Endpoint 10 Data Register */
-#define UDDR11          __REG(0x40600B00)  /* UDC Endpoint 11 Data Register */
-#define UDDR12          __REG(0x40600B80)  /* UDC Endpoint 12 Data Register */
-#define UDDR13          __REG(0x40600C00)  /* UDC Endpoint 13 Data Register */
-#define UDDR14          __REG(0x40600E00)  /* UDC Endpoint 14 Data Register */
-#define UDDR15          __REG(0x406000E0)  /* UDC Endpoint 15 Data Register */
-
-#define UICR0           __REG(0x40600050)  /* UDC Interrupt Control Register 0 */
-
-#define UICR0_IM0       (1 << 0)        /* Interrupt mask ep 0 */
-#define UICR0_IM1       (1 << 1)        /* Interrupt mask ep 1 */
-#define UICR0_IM2       (1 << 2)        /* Interrupt mask ep 2 */
-#define UICR0_IM3       (1 << 3)        /* Interrupt mask ep 3 */
-#define UICR0_IM4       (1 << 4)        /* Interrupt mask ep 4 */
-#define UICR0_IM5       (1 << 5)        /* Interrupt mask ep 5 */
-#define UICR0_IM6       (1 << 6)        /* Interrupt mask ep 6 */
-#define UICR0_IM7       (1 << 7)        /* Interrupt mask ep 7 */
-
-#define UICR1           __REG(0x40600054)  /* UDC Interrupt Control Register 1 */
-
-#define UICR1_IM8       (1 << 0)        /* Interrupt mask ep 8 */
-#define UICR1_IM9       (1 << 1)        /* Interrupt mask ep 9 */
-#define UICR1_IM10      (1 << 2)        /* Interrupt mask ep 10 */
-#define UICR1_IM11      (1 << 3)        /* Interrupt mask ep 11 */
-#define UICR1_IM12      (1 << 4)        /* Interrupt mask ep 12 */
-#define UICR1_IM13      (1 << 5)        /* Interrupt mask ep 13 */
-#define UICR1_IM14      (1 << 6)        /* Interrupt mask ep 14 */
-#define UICR1_IM15      (1 << 7)        /* Interrupt mask ep 15 */
-
-#define USIR0           __REG(0x40600058)  /* UDC Status Interrupt Register 0 */
-
-#define USIR0_IR0       (1 << 0)        /* Interrupt request ep 0 */
-#define USIR0_IR1       (1 << 1)        /* Interrupt request ep 1 */
-#define USIR0_IR2       (1 << 2)        /* Interrupt request ep 2 */
-#define USIR0_IR3       (1 << 3)        /* Interrupt request ep 3 */
-#define USIR0_IR4       (1 << 4)        /* Interrupt request ep 4 */
-#define USIR0_IR5       (1 << 5)        /* Interrupt request ep 5 */
-#define USIR0_IR6       (1 << 6)        /* Interrupt request ep 6 */
-#define USIR0_IR7       (1 << 7)        /* Interrupt request ep 7 */
-
-#define USIR1           __REG(0x4060005C)  /* UDC Status Interrupt Register 1 */
-
-#define USIR1_IR8       (1 << 0)        /* Interrupt request ep 8 */
-#define USIR1_IR9       (1 << 1)        /* Interrupt request ep 9 */
-#define USIR1_IR10      (1 << 2)        /* Interrupt request ep 10 */
-#define USIR1_IR11      (1 << 3)        /* Interrupt request ep 11 */
-#define USIR1_IR12      (1 << 4)        /* Interrupt request ep 12 */
-#define USIR1_IR13      (1 << 5)        /* Interrupt request ep 13 */
-#define USIR1_IR14      (1 << 6)        /* Interrupt request ep 14 */
-#define USIR1_IR15      (1 << 7)        /* Interrupt request ep 15 */
-
-#elif defined(CONFIG_PXA27x)
-
-#define UDCCR           __REG(0x40600000) /* UDC Control Register */
-#define UDCCR_OEN       (1 << 31)       /* On-the-Go Enable */
-#define UDCCR_AALTHNP   (1 << 30)       /* A-device Alternate Host Negotiation
-                                           Protocol Port Support */
-#define UDCCR_AHNP      (1 << 29)       /* A-device Host Negotiation Protocol
-                                           Support */
-#define UDCCR_BHNP      (1 << 28)       /* B-device Host Negotiation Protocol
-                                           Enable */
-#define UDCCR_DWRE      (1 << 16)       /* Device Remote Wake-up Enable */
-#define UDCCR_ACN       (0x03 << 11)    /* Active UDC configuration Number */
-#define UDCCR_ACN_S     11
-#define UDCCR_AIN       (0x07 << 8)     /* Active UDC interface Number */
-#define UDCCR_AIN_S     8
-#define UDCCR_AAISN     (0x07 << 5)     /* Active UDC Alternate Interface
-                                           Setting Number */
-#define UDCCR_AAISN_S   5
-#define UDCCR_SMAC      (1 << 4)        /* Switch Endpoint Memory to Active
-                                           Configuration */
-#define UDCCR_EMCE      (1 << 3)        /* Endpoint Memory Configuration
-                                           Error */
-#define UDCCR_UDR       (1 << 2)        /* UDC Resume */
-#define UDCCR_UDA       (1 << 1)        /* UDC Active */
-#define UDCCR_UDE       (1 << 0)        /* UDC Enable */
-
-#define UDCICR0         __REG(0x40600004) /* UDC Interrupt Control Register0 */
-#define UDCICR1         __REG(0x40600008) /* UDC Interrupt Control Register1 */
-#define UDCICR_FIFOERR  (1 << 1)        /* FIFO Error interrupt for EP */
-#define UDCICR_PKTCOMPL (1 << 0)        /* Packet Complete interrupt for EP */
-
-#define UDC_INT_FIFOERROR  (0x2)
-#define UDC_INT_PACKETCMP  (0x1)
-
-#define UDCICR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2))
-#define UDCICR1_IECC    (1 << 31)       /* IntEn - Configuration Change */
-#define UDCICR1_IESOF   (1 << 30)       /* IntEn - Start of Frame */
-#define UDCICR1_IERU    (1 << 29)       /* IntEn - Resume */
-#define UDCICR1_IESU    (1 << 28)       /* IntEn - Suspend */
-#define UDCICR1_IERS    (1 << 27)       /* IntEn - Reset */
-
-#define UDCISR0         __REG(0x4060000C) /* UDC Interrupt Status Register 0 */
-#define UDCISR1         __REG(0x40600010) /* UDC Interrupt Status Register 1 */
-#define UDCISR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2))
-#define UDCISR1_IRCC    (1 << 31)       /* IntReq - Configuration Change */
-#define UDCISR1_IRSOF   (1 << 30)       /* IntReq - Start of Frame */
-#define UDCISR1_IRRU    (1 << 29)       /* IntReq - Resume */
-#define UDCISR1_IRSU    (1 << 28)       /* IntReq - Suspend */
-#define UDCISR1_IRRS    (1 << 27)       /* IntReq - Reset */
-
-#define UDCFNR          __REG(0x40600014) /* UDC Frame Number Register */
-#define UDCOTGICR       __REG(0x40600018) /* UDC On-The-Go interrupt control */
-#define UDCOTGICR_IESF  (1 << 24)       /* OTG SET_FEATURE command recvd */
-#define UDCOTGICR_IEXR  (1 << 17)       /* Extra Transciever Interrupt
-                                           Rising Edge Interrupt Enable */
-#define UDCOTGICR_IEXF  (1 << 16)       /* Extra Transciever Interrupt
-                                           Falling Edge Interrupt Enable */
-#define UDCOTGICR_IEVV40R (1 << 9)      /* OTG Vbus Valid 4.0V Rising Edge
-                                           Interrupt Enable */
-#define UDCOTGICR_IEVV40F (1 << 8)      /* OTG Vbus Valid 4.0V Falling Edge
-                                           Interrupt Enable */
-#define UDCOTGICR_IEVV44R (1 << 7)      /* OTG Vbus Valid 4.4V Rising Edge
-                                           Interrupt Enable */
-#define UDCOTGICR_IEVV44F (1 << 6)      /* OTG Vbus Valid 4.4V Falling Edge
-                                           Interrupt Enable */
-#define UDCOTGICR_IESVR (1 << 5)        /* OTG Session Valid Rising Edge
-                                           Interrupt Enable */
-#define UDCOTGICR_IESVF (1 << 4)        /* OTG Session Valid Falling Edge
-                                           Interrupt Enable */
-#define UDCOTGICR_IESDR (1 << 3)        /* OTG A-Device SRP Detect Rising
-                                           Edge Interrupt Enable */
-#define UDCOTGICR_IESDF (1 << 2)        /* OTG A-Device SRP Detect Falling
-                                           Edge Interrupt Enable */
-#define UDCOTGICR_IEIDR (1 << 1)        /* OTG ID Change Rising Edge
-                                           Interrupt Enable */
-#define UDCOTGICR_IEIDF (1 << 0)        /* OTG ID Change Falling Edge
-                                           Interrupt Enable */
-
-#define UP2OCR            __REG(0x40600020)  /* USB Port 2 Output Control register */
-
-#define UP2OCR_CPVEN    (1 << 0)        /* Charge Pump Vbus Enable */
-#define UP2OCR_CPVPE    (1 << 1)        /* Charge Pump Vbus Pulse Enable */
-#define UP2OCR_DPPDE    (1 << 2)        /* Host Port 2 Transceiver D+ Pull Down Enable */
-#define UP2OCR_DMPDE    (1 << 3)        /* Host Port 2 Transceiver D- Pull Down Enable */
-#define UP2OCR_DPPUE    (1 << 4)        /* Host Port 2 Transceiver D+ Pull Up Enable */
-#define UP2OCR_DMPUE    (1 << 5)        /* Host Port 2 Transceiver D- Pull Up Enable */
-#define UP2OCR_DPPUBE   (1 << 6)        /* Host Port 2 Transceiver D+ Pull Up Bypass Enable */
-#define UP2OCR_DMPUBE   (1 << 7)        /* Host Port 2 Transceiver D- Pull Up Bypass Enable */
-#define UP2OCR_EXSP             (1 << 8)        /* External Transceiver Speed Control */
-#define UP2OCR_EXSUS    (1 << 9)        /* External Transceiver Speed Enable */
-#define UP2OCR_IDON             (1 << 10)       /* OTG ID Read Enable */
-#define UP2OCR_HXS              (1 << 16)       /* Host Port 2 Transceiver Output Select */
-#define UP2OCR_HXOE             (1 << 17)       /* Host Port 2 Transceiver Output Enable */
-#define UP2OCR_SEOS             (1 << 24)       /* Single-Ended Output Select */
-
-#define UDCCSN(x)       __REG2(0x40600100, (x) << 2)
-#define UDCCSR0         __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */
-#define UDCCSR0_SA      (1 << 7)        /* Setup Active */
-#define UDCCSR0_RNE     (1 << 6)        /* Receive FIFO Not Empty */
-#define UDCCSR0_FST     (1 << 5)        /* Force Stall */
-#define UDCCSR0_SST     (1 << 4)        /* Sent Stall */
-#define UDCCSR0_DME     (1 << 3)        /* DMA Enable */
-#define UDCCSR0_FTF     (1 << 2)        /* Flush Transmit FIFO */
-#define UDCCSR0_IPR     (1 << 1)        /* IN Packet Ready */
-#define UDCCSR0_OPC     (1 << 0)        /* OUT Packet Complete */
-
-#define UDCCSRA         __REG(0x40600104) /* UDC Control/Status register - Endpoint A */
-#define UDCCSRB         __REG(0x40600108) /* UDC Control/Status register - Endpoint B */
-#define UDCCSRC         __REG(0x4060010C) /* UDC Control/Status register - Endpoint C */
-#define UDCCSRD         __REG(0x40600110) /* UDC Control/Status register - Endpoint D */
-#define UDCCSRE         __REG(0x40600114) /* UDC Control/Status register - Endpoint E */
-#define UDCCSRF         __REG(0x40600118) /* UDC Control/Status register - Endpoint F */
-#define UDCCSRG         __REG(0x4060011C) /* UDC Control/Status register - Endpoint G */
-#define UDCCSRH         __REG(0x40600120) /* UDC Control/Status register - Endpoint H */
-#define UDCCSRI         __REG(0x40600124) /* UDC Control/Status register - Endpoint I */
-#define UDCCSRJ         __REG(0x40600128) /* UDC Control/Status register - Endpoint J */
-#define UDCCSRK         __REG(0x4060012C) /* UDC Control/Status register - Endpoint K */
-#define UDCCSRL         __REG(0x40600130) /* UDC Control/Status register - Endpoint L */
-#define UDCCSRM         __REG(0x40600134) /* UDC Control/Status register - Endpoint M */
-#define UDCCSRN         __REG(0x40600138) /* UDC Control/Status register - Endpoint N */
-#define UDCCSRP         __REG(0x4060013C) /* UDC Control/Status register - Endpoint P */
-#define UDCCSRQ         __REG(0x40600140) /* UDC Control/Status register - Endpoint Q */
-#define UDCCSRR         __REG(0x40600144) /* UDC Control/Status register - Endpoint R */
-#define UDCCSRS         __REG(0x40600148) /* UDC Control/Status register - Endpoint S */
-#define UDCCSRT         __REG(0x4060014C) /* UDC Control/Status register - Endpoint T */
-#define UDCCSRU         __REG(0x40600150) /* UDC Control/Status register - Endpoint U */
-#define UDCCSRV         __REG(0x40600154) /* UDC Control/Status register - Endpoint V */
-#define UDCCSRW         __REG(0x40600158) /* UDC Control/Status register - Endpoint W */
-#define UDCCSRX         __REG(0x4060015C) /* UDC Control/Status register - Endpoint X */
-
-#define UDCCSR_DPE      (1 << 9)        /* Data Packet Error */
-#define UDCCSR_FEF      (1 << 8)        /* Flush Endpoint FIFO */
-#define UDCCSR_SP       (1 << 7)        /* Short Packet Control/Status */
-#define UDCCSR_BNE      (1 << 6)        /* Buffer Not Empty (IN endpoints) */
-#define UDCCSR_BNF      (1 << 6)        /* Buffer Not Full (OUT endpoints) */
-#define UDCCSR_FST      (1 << 5)        /* Force STALL */
-#define UDCCSR_SST      (1 << 4)        /* Sent STALL */
-#define UDCCSR_DME      (1 << 3)        /* DMA Enable */
-#define UDCCSR_TRN      (1 << 2)        /* Tx/Rx NAK */
-#define UDCCSR_PC       (1 << 1)        /* Packet Complete */
-#define UDCCSR_FS       (1 << 0)        /* FIFO needs service */
-
-#define UDCBCN(x)       __REG2(0x40600200, (x)<<2)
-#define UDCBCR0         __REG(0x40600200) /* Byte Count Register - EP0 */
-#define UDCBCRA         __REG(0x40600204) /* Byte Count Register - EPA */
-#define UDCBCRB         __REG(0x40600208) /* Byte Count Register - EPB */
-#define UDCBCRC         __REG(0x4060020C) /* Byte Count Register - EPC */
-#define UDCBCRD         __REG(0x40600210) /* Byte Count Register - EPD */
-#define UDCBCRE         __REG(0x40600214) /* Byte Count Register - EPE */
-#define UDCBCRF         __REG(0x40600218) /* Byte Count Register - EPF */
-#define UDCBCRG         __REG(0x4060021C) /* Byte Count Register - EPG */
-#define UDCBCRH         __REG(0x40600220) /* Byte Count Register - EPH */
-#define UDCBCRI         __REG(0x40600224) /* Byte Count Register - EPI */
-#define UDCBCRJ         __REG(0x40600228) /* Byte Count Register - EPJ */
-#define UDCBCRK         __REG(0x4060022C) /* Byte Count Register - EPK */
-#define UDCBCRL         __REG(0x40600230) /* Byte Count Register - EPL */
-#define UDCBCRM         __REG(0x40600234) /* Byte Count Register - EPM */
-#define UDCBCRN         __REG(0x40600238) /* Byte Count Register - EPN */
-#define UDCBCRP         __REG(0x4060023C) /* Byte Count Register - EPP */
-#define UDCBCRQ         __REG(0x40600240) /* Byte Count Register - EPQ */
-#define UDCBCRR         __REG(0x40600244) /* Byte Count Register - EPR */
-#define UDCBCRS         __REG(0x40600248) /* Byte Count Register - EPS */
-#define UDCBCRT         __REG(0x4060024C) /* Byte Count Register - EPT */
-#define UDCBCRU         __REG(0x40600250) /* Byte Count Register - EPU */
-#define UDCBCRV         __REG(0x40600254) /* Byte Count Register - EPV */
-#define UDCBCRW         __REG(0x40600258) /* Byte Count Register - EPW */
-#define UDCBCRX         __REG(0x4060025C) /* Byte Count Register - EPX */
-
-#define UDCDN(x)        __REG2(0x40600300, (x)<<2)
-#define PHYS_UDCDN(x)   (0x40600300 + ((x)<<2))
-#define PUDCDN(x)       (volatile u32 *)(io_p2v(PHYS_UDCDN((x))))
-#define UDCDR0          __REG(0x40600300) /* Data Register - EP0 */
-#define UDCDRA          __REG(0x40600304) /* Data Register - EPA */
-#define UDCDRB          __REG(0x40600308) /* Data Register - EPB */
-#define UDCDRC          __REG(0x4060030C) /* Data Register - EPC */
-#define UDCDRD          __REG(0x40600310) /* Data Register - EPD */
-#define UDCDRE          __REG(0x40600314) /* Data Register - EPE */
-#define UDCDRF          __REG(0x40600318) /* Data Register - EPF */
-#define UDCDRG          __REG(0x4060031C) /* Data Register - EPG */
-#define UDCDRH          __REG(0x40600320) /* Data Register - EPH */
-#define UDCDRI          __REG(0x40600324) /* Data Register - EPI */
-#define UDCDRJ          __REG(0x40600328) /* Data Register - EPJ */
-#define UDCDRK          __REG(0x4060032C) /* Data Register - EPK */
-#define UDCDRL          __REG(0x40600330) /* Data Register - EPL */
-#define UDCDRM          __REG(0x40600334) /* Data Register - EPM */
-#define UDCDRN          __REG(0x40600338) /* Data Register - EPN */
-#define UDCDRP          __REG(0x4060033C) /* Data Register - EPP */
-#define UDCDRQ          __REG(0x40600340) /* Data Register - EPQ */
-#define UDCDRR          __REG(0x40600344) /* Data Register - EPR */
-#define UDCDRS          __REG(0x40600348) /* Data Register - EPS */
-#define UDCDRT          __REG(0x4060034C) /* Data Register - EPT */
-#define UDCDRU          __REG(0x40600350) /* Data Register - EPU */
-#define UDCDRV          __REG(0x40600354) /* Data Register - EPV */
-#define UDCDRW          __REG(0x40600358) /* Data Register - EPW */
-#define UDCDRX          __REG(0x4060035C) /* Data Register - EPX */
-
-#define UDCCN(x)       __REG2(0x40600400, (x)<<2)
-#define UDCCRA          __REG(0x40600404) /* Configuration register EPA */
-#define UDCCRB          __REG(0x40600408) /* Configuration register EPB */
-#define UDCCRC          __REG(0x4060040C) /* Configuration register EPC */
-#define UDCCRD          __REG(0x40600410) /* Configuration register EPD */
-#define UDCCRE          __REG(0x40600414) /* Configuration register EPE */
-#define UDCCRF          __REG(0x40600418) /* Configuration register EPF */
-#define UDCCRG          __REG(0x4060041C) /* Configuration register EPG */
-#define UDCCRH          __REG(0x40600420) /* Configuration register EPH */
-#define UDCCRI          __REG(0x40600424) /* Configuration register EPI */
-#define UDCCRJ          __REG(0x40600428) /* Configuration register EPJ */
-#define UDCCRK          __REG(0x4060042C) /* Configuration register EPK */
-#define UDCCRL          __REG(0x40600430) /* Configuration register EPL */
-#define UDCCRM          __REG(0x40600434) /* Configuration register EPM */
-#define UDCCRN          __REG(0x40600438) /* Configuration register EPN */
-#define UDCCRP          __REG(0x4060043C) /* Configuration register EPP */
-#define UDCCRQ          __REG(0x40600440) /* Configuration register EPQ */
-#define UDCCRR          __REG(0x40600444) /* Configuration register EPR */
-#define UDCCRS          __REG(0x40600448) /* Configuration register EPS */
-#define UDCCRT          __REG(0x4060044C) /* Configuration register EPT */
-#define UDCCRU          __REG(0x40600450) /* Configuration register EPU */
-#define UDCCRV          __REG(0x40600454) /* Configuration register EPV */
-#define UDCCRW          __REG(0x40600458) /* Configuration register EPW */
-#define UDCCRX          __REG(0x4060045C) /* Configuration register EPX */
-
-#define UDCCONR_CN      (0x03 << 25)    /* Configuration Number */
-#define UDCCONR_CN_S    (25)
-#define UDCCONR_IN      (0x07 << 22)    /* Interface Number */
-#define UDCCONR_IN_S    (22)
-#define UDCCONR_AISN    (0x07 << 19)    /* Alternate Interface Number */
-#define UDCCONR_AISN_S  (19)
-#define UDCCONR_EN      (0x0f << 15)    /* Endpoint Number */
-#define UDCCONR_EN_S    (15)
-#define UDCCONR_ET      (0x03 << 13)    /* Endpoint Type: */
-#define UDCCONR_ET_S    (13)
-#define UDCCONR_ET_INT  (0x03 << 13)    /*   Interrupt */
-#define UDCCONR_ET_BULK (0x02 << 13)    /*   Bulk */
-#define UDCCONR_ET_ISO  (0x01 << 13)    /*   Isochronous */
-#define UDCCONR_ET_NU   (0x00 << 13)    /*   Not used */
-#define UDCCONR_ED      (1 << 12)       /* Endpoint Direction */
-#define UDCCONR_MPS     (0x3ff << 2)    /* Maximum Packet Size */
-#define UDCCONR_MPS_S   (2)
-#define UDCCONR_DE      (1 << 1)        /* Double Buffering Enable */
-#define UDCCONR_EE      (1 << 0)        /* Endpoint Enable */
-
-
-#define UDC_INT_FIFOERROR  (0x2)
-#define UDC_INT_PACKETCMP  (0x1)
-
-#define UDC_FNR_MASK     (0x7ff)
-
-#define UDCCSR_WR_MASK   (UDCCSR_DME|UDCCSR_FST)
-#define UDC_BCR_MASK    (0x3ff)
-#endif
-
-/*
  * Fast Infrared Communication Port
  */
 
@@ -1237,120 +825,9 @@
 #endif
 
 /*
- * Power Manager
+ * Power Manager - see pxa2xx-regs.h
  */
 
-#define PMCR            __REG(0x40F00000)  /* Power Manager Control Register */
-#define PSSR            __REG(0x40F00004)  /* Power Manager Sleep Status Register */
-#define PSPR            __REG(0x40F00008)  /* Power Manager Scratch Pad Register */
-#define PWER            __REG(0x40F0000C)  /* Power Manager Wake-up Enable Register */
-#define PRER            __REG(0x40F00010)  /* Power Manager GPIO Rising-Edge Detect Enable Register */
-#define PFER            __REG(0x40F00014)  /* Power Manager GPIO Falling-Edge Detect Enable Register */
-#define PEDR            __REG(0x40F00018)  /* Power Manager GPIO Edge Detect Status Register */
-#define PCFR            __REG(0x40F0001C)  /* Power Manager General Configuration Register */
-#define PGSR0           __REG(0x40F00020)  /* Power Manager GPIO Sleep State Register for GP[31-0] */
-#define PGSR1           __REG(0x40F00024)  /* Power Manager GPIO Sleep State Register for GP[63-32] */
-#define PGSR2           __REG(0x40F00028)  /* Power Manager GPIO Sleep State Register for GP[84-64] */
-#define PGSR3           __REG(0x40F0002C)  /* Power Manager GPIO Sleep State Register for GP[118-96] */
-#define RCSR            __REG(0x40F00030)  /* Reset Controller Status Register */
-
-#define PSLR            __REG(0x40F00034)       /* Power Manager Sleep Config Register */
-#define PSTR            __REG(0x40F00038)       /*Power Manager Standby Config Register */
-#define PSNR            __REG(0x40F0003C)       /*Power Manager Sense Config Register */
-#define PVCR            __REG(0x40F00040)       /*Power Manager VoltageControl Register */
-#define PKWR            __REG(0x40F00050)       /* Power Manager KB Wake-up Enable Reg */
-#define PKSR            __REG(0x40F00054)       /* Power Manager KB Level-Detect Register */
-#define PCMD(x) __REG2(0x40F00080, (x)<<2)
-#define PCMD0   __REG(0x40F00080 + 0 * 4)
-#define PCMD1   __REG(0x40F00080 + 1 * 4)
-#define PCMD2   __REG(0x40F00080 + 2 * 4)
-#define PCMD3   __REG(0x40F00080 + 3 * 4)
-#define PCMD4   __REG(0x40F00080 + 4 * 4)
-#define PCMD5   __REG(0x40F00080 + 5 * 4)
-#define PCMD6   __REG(0x40F00080 + 6 * 4)
-#define PCMD7   __REG(0x40F00080 + 7 * 4)
-#define PCMD8   __REG(0x40F00080 + 8 * 4)
-#define PCMD9   __REG(0x40F00080 + 9 * 4)
-#define PCMD10  __REG(0x40F00080 + 10 * 4)
-#define PCMD11  __REG(0x40F00080 + 11 * 4)
-#define PCMD12  __REG(0x40F00080 + 12 * 4)
-#define PCMD13  __REG(0x40F00080 + 13 * 4)
-#define PCMD14  __REG(0x40F00080 + 14 * 4)
-#define PCMD15  __REG(0x40F00080 + 15 * 4)
-#define PCMD16  __REG(0x40F00080 + 16 * 4)
-#define PCMD17  __REG(0x40F00080 + 17 * 4)
-#define PCMD18  __REG(0x40F00080 + 18 * 4)
-#define PCMD19  __REG(0x40F00080 + 19 * 4)
-#define PCMD20  __REG(0x40F00080 + 20 * 4)
-#define PCMD21  __REG(0x40F00080 + 21 * 4)
-#define PCMD22  __REG(0x40F00080 + 22 * 4)
-#define PCMD23  __REG(0x40F00080 + 23 * 4)
-#define PCMD24  __REG(0x40F00080 + 24 * 4)
-#define PCMD25  __REG(0x40F00080 + 25 * 4)
-#define PCMD26  __REG(0x40F00080 + 26 * 4)
-#define PCMD27  __REG(0x40F00080 + 27 * 4)
-#define PCMD28  __REG(0x40F00080 + 28 * 4)
-#define PCMD29  __REG(0x40F00080 + 29 * 4)
-#define PCMD30  __REG(0x40F00080 + 30 * 4)
-#define PCMD31  __REG(0x40F00080 + 31 * 4)
-
-#define PCMD_MBC        (1<<12)
-#define PCMD_DCE        (1<<11)
-#define PCMD_LC (1<<10)
-/* FIXME:  PCMD_SQC need be checked.   */
-#define PCMD_SQC        (3<<8)  /* currently only bit 8 is changeable,
-                                   bit 9 should be 0 all day. */
-#define PVCR_VCSA       (0x1<<14)
-#define PVCR_CommandDelay (0xf80)
-#define PCFR_PI2C_EN    (0x1 << 6)
-
-#define PSSR_OTGPH      (1 << 6)        /* OTG Peripheral control Hold */
-#define PSSR_RDH        (1 << 5)        /* Read Disable Hold */
-#define PSSR_PH         (1 << 4)        /* Peripheral Control Hold */
-#define PSSR_STS        (1 << 3)        /* Standby Mode Status */
-#define PSSR_VFS        (1 << 2)        /* VDD Fault Status */
-#define PSSR_BFS        (1 << 1)        /* Battery Fault Status */
-#define PSSR_SSS        (1 << 0)        /* Software Sleep Status */
-
-#define PSLR_SL_ROD     (1 << 20)       /* Sleep-Mode/Depp-Sleep Mode nRESET_OUT Disable */
-
-#define PCFR_RO         (1 << 15)       /* RDH Override */
-#define PCFR_PO         (1 << 14)       /* PH Override */
-#define PCFR_GPROD      (1 << 12)       /* GPIO nRESET_OUT Disable */
-#define PCFR_L1_EN      (1 << 11)       /* Sleep Mode L1 converter Enable */
-#define PCFR_FVC        (1 << 10)       /* Frequency/Voltage Change */
-#define PCFR_DC_EN      (1 << 7)        /* Sleep/deep-sleep DC-DC Converter Enable */
-#define PCFR_PI2CEN     (1 << 6)        /* Enable PI2C controller */
-#define PCFR_GPR_EN     (1 << 4)        /* nRESET_GPIO Pin Enable */
-#define PCFR_DS         (1 << 3)        /* Deep Sleep Mode */
-#define PCFR_FS         (1 << 2)        /* Float Static Chip Selects */
-#define PCFR_FP         (1 << 1)        /* Float PCMCIA controls */
-#define PCFR_OPDE       (1 << 0)        /* 3.6864 MHz oscillator power-down enable */
-
-#define RCSR_GPR        (1 << 3)        /* GPIO Reset */
-#define RCSR_SMR        (1 << 2)        /* Sleep Mode */
-#define RCSR_WDR        (1 << 1)        /* Watchdog Reset */
-#define RCSR_HWR        (1 << 0)        /* Hardware Reset */
-
-#define PWER_GPIO(Nb)   (1 << Nb)       /* GPIO [0..15] wake-up enable     */
-#define PWER_GPIO0      PWER_GPIO (0)   /* GPIO  [0] wake-up enable        */
-#define PWER_GPIO1      PWER_GPIO (1)   /* GPIO  [1] wake-up enable        */
-#define PWER_GPIO2      PWER_GPIO (2)   /* GPIO  [2] wake-up enable        */
-#define PWER_GPIO3      PWER_GPIO (3)   /* GPIO  [3] wake-up enable        */
-#define PWER_GPIO4      PWER_GPIO (4)   /* GPIO  [4] wake-up enable        */
-#define PWER_GPIO5      PWER_GPIO (5)   /* GPIO  [5] wake-up enable        */
-#define PWER_GPIO6      PWER_GPIO (6)   /* GPIO  [6] wake-up enable        */
-#define PWER_GPIO7      PWER_GPIO (7)   /* GPIO  [7] wake-up enable        */
-#define PWER_GPIO8      PWER_GPIO (8)   /* GPIO  [8] wake-up enable        */
-#define PWER_GPIO9      PWER_GPIO (9)   /* GPIO  [9] wake-up enable        */
-#define PWER_GPIO10     PWER_GPIO (10)  /* GPIO [10] wake-up enable        */
-#define PWER_GPIO11     PWER_GPIO (11)  /* GPIO [11] wake-up enable        */
-#define PWER_GPIO12     PWER_GPIO (12)  /* GPIO [12] wake-up enable        */
-#define PWER_GPIO13     PWER_GPIO (13)  /* GPIO [13] wake-up enable        */
-#define PWER_GPIO14     PWER_GPIO (14)  /* GPIO [14] wake-up enable        */
-#define PWER_GPIO15     PWER_GPIO (15)  /* GPIO [15] wake-up enable        */
-#define PWER_RTC        0x80000000      /* RTC alarm wake-up enable        */
-
 /*
  * SSP Serial Port Registers - see include/asm-arm/arch-pxa/regs-ssp.h
  */
@@ -1360,52 +837,9 @@
  */
 
 /*
- * Core Clock
+ * Core Clock - see include/asm-arm/arch-pxa/pxa2xx-regs.h
  */
 
-#define CCCR            __REG(0x41300000)  /* Core Clock Configuration Register */
-#define CKEN            __REG(0x41300004)  /* Clock Enable Register */
-#define OSCC            __REG(0x41300008)  /* Oscillator Configuration Register */
-#define CCSR            __REG(0x4130000C)  /* Core Clock Status Register */
-
-#define CCCR_N_MASK     0x0380          /* Run Mode Frequency to Turbo Mode Frequency Multiplier */
-#define CCCR_M_MASK     0x0060          /* Memory Frequency to Run Mode Frequency Multiplier */
-#define CCCR_L_MASK     0x001f          /* Crystal Frequency to Memory Frequency Multiplier */
-
-#define CKEN_AC97CONF   (31)    /* AC97 Controller Configuration */
-#define CKEN_CAMERA     (24)    /* Camera Interface Clock Enable */
-#define CKEN_SSP1       (23)    /* SSP1 Unit Clock Enable */
-#define CKEN_MEMC       (22)    /* Memory Controller Clock Enable */
-#define CKEN_MEMSTK     (21)    /* Memory Stick Host Controller */
-#define CKEN_IM         (20)    /* Internal Memory Clock Enable */
-#define CKEN_KEYPAD     (19)    /* Keypad Interface Clock Enable */
-#define CKEN_USIM       (18)    /* USIM Unit Clock Enable */
-#define CKEN_MSL        (17)    /* MSL Unit Clock Enable */
-#define CKEN_LCD        (16)    /* LCD Unit Clock Enable */
-#define CKEN_PWRI2C     (15)    /* PWR I2C Unit Clock Enable */
-#define CKEN_I2C        (14)    /* I2C Unit Clock Enable */
-#define CKEN_FICP       (13)    /* FICP Unit Clock Enable */
-#define CKEN_MMC        (12)    /* MMC Unit Clock Enable */
-#define CKEN_USB        (11)    /* USB Unit Clock Enable */
-#define CKEN_ASSP       (10)    /* ASSP (SSP3) Clock Enable */
-#define CKEN_USBHOST    (10)    /* USB Host Unit Clock Enable */
-#define CKEN_OSTIMER    (9)     /* OS Timer Unit Clock Enable */
-#define CKEN_NSSP       (9)     /* NSSP (SSP2) Clock Enable */
-#define CKEN_I2S        (8)     /* I2S Unit Clock Enable */
-#define CKEN_BTUART     (7)     /* BTUART Unit Clock Enable */
-#define CKEN_FFUART     (6)     /* FFUART Unit Clock Enable */
-#define CKEN_STUART     (5)     /* STUART Unit Clock Enable */
-#define CKEN_HWUART     (4)     /* HWUART Unit Clock Enable */
-#define CKEN_SSP3       (4)     /* SSP3 Unit Clock Enable */
-#define CKEN_SSP        (3)     /* SSP Unit Clock Enable */
-#define CKEN_SSP2       (3)     /* SSP2 Unit Clock Enable */
-#define CKEN_AC97       (2)     /* AC97 Unit Clock Enable */
-#define CKEN_PWM1       (1)     /* PWM1 Clock Enable */
-#define CKEN_PWM0       (0)     /* PWM0 Clock Enable */
-
-#define OSCC_OON        (1 << 1)        /* 32.768kHz OON (write-once only bit) */
-#define OSCC_OOK        (1 << 0)        /* 32.768kHz OOK (read-only bit) */
-
 #ifdef CONFIG_PXA27x
 
 /* Camera Interface */
diff --git a/include/asm-arm/arch-pxa/pxa25x-udc.h b/include/asm-arm/arch-pxa/pxa25x-udc.h
new file mode 100644
index 000000000000..840305916b6d
--- /dev/null
+++ b/include/asm-arm/arch-pxa/pxa25x-udc.h
@@ -0,0 +1,163 @@
+#ifndef _ASM_ARCH_PXA25X_UDC_H
+#define _ASM_ARCH_PXA25X_UDC_H
+
+#ifdef _ASM_ARCH_PXA27X_UDC_H
+#error You can't include both PXA25x and PXA27x UDC support
+#endif
+
+#define UDC_RES1        __REG(0x40600004)  /* UDC Undocumented - Reserved1 */
+#define UDC_RES2        __REG(0x40600008)  /* UDC Undocumented - Reserved2 */
+#define UDC_RES3        __REG(0x4060000C)  /* UDC Undocumented - Reserved3 */
+
+#define UDCCR           __REG(0x40600000)  /* UDC Control Register */
+#define UDCCR_UDE       (1 << 0)        /* UDC enable */
+#define UDCCR_UDA       (1 << 1)        /* UDC active */
+#define UDCCR_RSM       (1 << 2)        /* Device resume */
+#define UDCCR_RESIR     (1 << 3)        /* Resume interrupt request */
+#define UDCCR_SUSIR     (1 << 4)        /* Suspend interrupt request */
+#define UDCCR_SRM       (1 << 5)        /* Suspend/resume interrupt mask */
+#define UDCCR_RSTIR     (1 << 6)        /* Reset interrupt request */
+#define UDCCR_REM       (1 << 7)        /* Reset interrupt mask */
+
+#define UDCCS0          __REG(0x40600010)  /* UDC Endpoint 0 Control/Status Register */
+#define UDCCS0_OPR      (1 << 0)        /* OUT packet ready */
+#define UDCCS0_IPR      (1 << 1)        /* IN packet ready */
+#define UDCCS0_FTF      (1 << 2)        /* Flush Tx FIFO */
+#define UDCCS0_DRWF     (1 << 3)        /* Device remote wakeup feature */
+#define UDCCS0_SST      (1 << 4)        /* Sent stall */
+#define UDCCS0_FST      (1 << 5)        /* Force stall */
+#define UDCCS0_RNE      (1 << 6)        /* Receive FIFO no empty */
+#define UDCCS0_SA       (1 << 7)        /* Setup active */
+
+/* Bulk IN - Endpoint 1,6,11 */
+#define UDCCS1          __REG(0x40600014)  /* UDC Endpoint 1 (IN) Control/Status Register */
+#define UDCCS6          __REG(0x40600028)  /* UDC Endpoint 6 (IN) Control/Status Register */
+#define UDCCS11         __REG(0x4060003C)  /* UDC Endpoint 11 (IN) Control/Status Register */
+
+#define UDCCS_BI_TFS    (1 << 0)        /* Transmit FIFO service */
+#define UDCCS_BI_TPC    (1 << 1)        /* Transmit packet complete */
+#define UDCCS_BI_FTF    (1 << 2)        /* Flush Tx FIFO */
+#define UDCCS_BI_TUR    (1 << 3)        /* Transmit FIFO underrun */
+#define UDCCS_BI_SST    (1 << 4)        /* Sent stall */
+#define UDCCS_BI_FST    (1 << 5)        /* Force stall */
+#define UDCCS_BI_TSP    (1 << 7)        /* Transmit short packet */
+
+/* Bulk OUT - Endpoint 2,7,12 */
+#define UDCCS2          __REG(0x40600018)  /* UDC Endpoint 2 (OUT) Control/Status Register */
+#define UDCCS7          __REG(0x4060002C)  /* UDC Endpoint 7 (OUT) Control/Status Register */
+#define UDCCS12         __REG(0x40600040)  /* UDC Endpoint 12 (OUT) Control/Status Register */
+
+#define UDCCS_BO_RFS    (1 << 0)        /* Receive FIFO service */
+#define UDCCS_BO_RPC    (1 << 1)        /* Receive packet complete */
+#define UDCCS_BO_DME    (1 << 3)        /* DMA enable */
+#define UDCCS_BO_SST    (1 << 4)        /* Sent stall */
+#define UDCCS_BO_FST    (1 << 5)        /* Force stall */
+#define UDCCS_BO_RNE    (1 << 6)        /* Receive FIFO not empty */
+#define UDCCS_BO_RSP    (1 << 7)        /* Receive short packet */
+
+/* Isochronous IN - Endpoint 3,8,13 */
+#define UDCCS3          __REG(0x4060001C)  /* UDC Endpoint 3 (IN) Control/Status Register */
+#define UDCCS8          __REG(0x40600030)  /* UDC Endpoint 8 (IN) Control/Status Register */
+#define UDCCS13         __REG(0x40600044)  /* UDC Endpoint 13 (IN) Control/Status Register */
+
+#define UDCCS_II_TFS    (1 << 0)        /* Transmit FIFO service */
+#define UDCCS_II_TPC    (1 << 1)        /* Transmit packet complete */
+#define UDCCS_II_FTF    (1 << 2)        /* Flush Tx FIFO */
+#define UDCCS_II_TUR    (1 << 3)        /* Transmit FIFO underrun */
+#define UDCCS_II_TSP    (1 << 7)        /* Transmit short packet */
+
+/* Isochronous OUT - Endpoint 4,9,14 */
+#define UDCCS4          __REG(0x40600020)  /* UDC Endpoint 4 (OUT) Control/Status Register */
+#define UDCCS9          __REG(0x40600034)  /* UDC Endpoint 9 (OUT) Control/Status Register */
+#define UDCCS14         __REG(0x40600048)  /* UDC Endpoint 14 (OUT) Control/Status Register */
+
+#define UDCCS_IO_RFS    (1 << 0)        /* Receive FIFO service */
+#define UDCCS_IO_RPC    (1 << 1)        /* Receive packet complete */
+#define UDCCS_IO_ROF    (1 << 2)        /* Receive overflow */
+#define UDCCS_IO_DME    (1 << 3)        /* DMA enable */
+#define UDCCS_IO_RNE    (1 << 6)        /* Receive FIFO not empty */
+#define UDCCS_IO_RSP    (1 << 7)        /* Receive short packet */
+
+/* Interrupt IN - Endpoint 5,10,15 */
+#define UDCCS5          __REG(0x40600024)  /* UDC Endpoint 5 (Interrupt) Control/Status Register */
+#define UDCCS10         __REG(0x40600038)  /* UDC Endpoint 10 (Interrupt) Control/Status Register */
+#define UDCCS15         __REG(0x4060004C)  /* UDC Endpoint 15 (Interrupt) Control/Status Register */
+
+#define UDCCS_INT_TFS   (1 << 0)        /* Transmit FIFO service */
+#define UDCCS_INT_TPC   (1 << 1)        /* Transmit packet complete */
+#define UDCCS_INT_FTF   (1 << 2)        /* Flush Tx FIFO */
+#define UDCCS_INT_TUR   (1 << 3)        /* Transmit FIFO underrun */
+#define UDCCS_INT_SST   (1 << 4)        /* Sent stall */
+#define UDCCS_INT_FST   (1 << 5)        /* Force stall */
+#define UDCCS_INT_TSP   (1 << 7)        /* Transmit short packet */
+
+#define UFNRH           __REG(0x40600060)  /* UDC Frame Number Register High */
+#define UFNRL           __REG(0x40600064)  /* UDC Frame Number Register Low */
+#define UBCR2           __REG(0x40600068)  /* UDC Byte Count Reg 2 */
+#define UBCR4           __REG(0x4060006c)  /* UDC Byte Count Reg 4 */
+#define UBCR7           __REG(0x40600070)  /* UDC Byte Count Reg 7 */
+#define UBCR9           __REG(0x40600074)  /* UDC Byte Count Reg 9 */
+#define UBCR12          __REG(0x40600078)  /* UDC Byte Count Reg 12 */
+#define UBCR14          __REG(0x4060007c)  /* UDC Byte Count Reg 14 */
+#define UDDR0           __REG(0x40600080)  /* UDC Endpoint 0 Data Register */
+#define UDDR1           __REG(0x40600100)  /* UDC Endpoint 1 Data Register */
+#define UDDR2           __REG(0x40600180)  /* UDC Endpoint 2 Data Register */
+#define UDDR3           __REG(0x40600200)  /* UDC Endpoint 3 Data Register */
+#define UDDR4           __REG(0x40600400)  /* UDC Endpoint 4 Data Register */
+#define UDDR5           __REG(0x406000A0)  /* UDC Endpoint 5 Data Register */
+#define UDDR6           __REG(0x40600600)  /* UDC Endpoint 6 Data Register */
+#define UDDR7           __REG(0x40600680)  /* UDC Endpoint 7 Data Register */
+#define UDDR8           __REG(0x40600700)  /* UDC Endpoint 8 Data Register */
+#define UDDR9           __REG(0x40600900)  /* UDC Endpoint 9 Data Register */
+#define UDDR10          __REG(0x406000C0)  /* UDC Endpoint 10 Data Register */
+#define UDDR11          __REG(0x40600B00)  /* UDC Endpoint 11 Data Register */
+#define UDDR12          __REG(0x40600B80)  /* UDC Endpoint 12 Data Register */
+#define UDDR13          __REG(0x40600C00)  /* UDC Endpoint 13 Data Register */
+#define UDDR14          __REG(0x40600E00)  /* UDC Endpoint 14 Data Register */
+#define UDDR15          __REG(0x406000E0)  /* UDC Endpoint 15 Data Register */
+
+#define UICR0           __REG(0x40600050)  /* UDC Interrupt Control Register 0 */
+
+#define UICR0_IM0       (1 << 0)        /* Interrupt mask ep 0 */
+#define UICR0_IM1       (1 << 1)        /* Interrupt mask ep 1 */
+#define UICR0_IM2       (1 << 2)        /* Interrupt mask ep 2 */
+#define UICR0_IM3       (1 << 3)        /* Interrupt mask ep 3 */
+#define UICR0_IM4       (1 << 4)        /* Interrupt mask ep 4 */
+#define UICR0_IM5       (1 << 5)        /* Interrupt mask ep 5 */
+#define UICR0_IM6       (1 << 6)        /* Interrupt mask ep 6 */
+#define UICR0_IM7       (1 << 7)        /* Interrupt mask ep 7 */
+
+#define UICR1           __REG(0x40600054)  /* UDC Interrupt Control Register 1 */
+
+#define UICR1_IM8       (1 << 0)        /* Interrupt mask ep 8 */
+#define UICR1_IM9       (1 << 1)        /* Interrupt mask ep 9 */
+#define UICR1_IM10      (1 << 2)        /* Interrupt mask ep 10 */
+#define UICR1_IM11      (1 << 3)        /* Interrupt mask ep 11 */
+#define UICR1_IM12      (1 << 4)        /* Interrupt mask ep 12 */
+#define UICR1_IM13      (1 << 5)        /* Interrupt mask ep 13 */
+#define UICR1_IM14      (1 << 6)        /* Interrupt mask ep 14 */
+#define UICR1_IM15      (1 << 7)        /* Interrupt mask ep 15 */
+
+#define USIR0           __REG(0x40600058)  /* UDC Status Interrupt Register 0 */
+
+#define USIR0_IR0       (1 << 0)        /* Interrupt request ep 0 */
+#define USIR0_IR1       (1 << 1)        /* Interrupt request ep 1 */
+#define USIR0_IR2       (1 << 2)        /* Interrupt request ep 2 */
+#define USIR0_IR3       (1 << 3)        /* Interrupt request ep 3 */
+#define USIR0_IR4       (1 << 4)        /* Interrupt request ep 4 */
+#define USIR0_IR5       (1 << 5)        /* Interrupt request ep 5 */
+#define USIR0_IR6       (1 << 6)        /* Interrupt request ep 6 */
+#define USIR0_IR7       (1 << 7)        /* Interrupt request ep 7 */
+
+#define USIR1           __REG(0x4060005C)  /* UDC Status Interrupt Register 1 */
+
+#define USIR1_IR8       (1 << 0)        /* Interrupt request ep 8 */
+#define USIR1_IR9       (1 << 1)        /* Interrupt request ep 9 */
+#define USIR1_IR10      (1 << 2)        /* Interrupt request ep 10 */
+#define USIR1_IR11      (1 << 3)        /* Interrupt request ep 11 */
+#define USIR1_IR12      (1 << 4)        /* Interrupt request ep 12 */
+#define USIR1_IR13      (1 << 5)        /* Interrupt request ep 13 */
+#define USIR1_IR14      (1 << 6)        /* Interrupt request ep 14 */
+#define USIR1_IR15      (1 << 7)        /* Interrupt request ep 15 */
+
+#endif
diff --git a/include/asm-arm/arch-pxa/pxa27x-udc.h b/include/asm-arm/arch-pxa/pxa27x-udc.h
new file mode 100644
index 000000000000..ab1443f8bd89
--- /dev/null
+++ b/include/asm-arm/arch-pxa/pxa27x-udc.h
@@ -0,0 +1,257 @@
+#ifndef _ASM_ARCH_PXA27X_UDC_H
+#define _ASM_ARCH_PXA27X_UDC_H
+
+#ifdef _ASM_ARCH_PXA25X_UDC_H
+#error You cannot include both PXA25x and PXA27x UDC support
+#endif
+
+#define UDCCR           __REG(0x40600000) /* UDC Control Register */
+#define UDCCR_OEN       (1 << 31)       /* On-the-Go Enable */
+#define UDCCR_AALTHNP   (1 << 30)       /* A-device Alternate Host Negotiation
+                                           Protocol Port Support */
+#define UDCCR_AHNP      (1 << 29)       /* A-device Host Negotiation Protocol
+                                           Support */
+#define UDCCR_BHNP      (1 << 28)       /* B-device Host Negotiation Protocol
+                                           Enable */
+#define UDCCR_DWRE      (1 << 16)       /* Device Remote Wake-up Enable */
+#define UDCCR_ACN       (0x03 << 11)    /* Active UDC configuration Number */
+#define UDCCR_ACN_S     11
+#define UDCCR_AIN       (0x07 << 8)     /* Active UDC interface Number */
+#define UDCCR_AIN_S     8
+#define UDCCR_AAISN     (0x07 << 5)     /* Active UDC Alternate Interface
+                                           Setting Number */
+#define UDCCR_AAISN_S   5
+#define UDCCR_SMAC      (1 << 4)        /* Switch Endpoint Memory to Active
+                                           Configuration */
+#define UDCCR_EMCE      (1 << 3)        /* Endpoint Memory Configuration
+                                           Error */
+#define UDCCR_UDR       (1 << 2)        /* UDC Resume */
+#define UDCCR_UDA       (1 << 1)        /* UDC Active */
+#define UDCCR_UDE       (1 << 0)        /* UDC Enable */
+
+#define UDCICR0         __REG(0x40600004) /* UDC Interrupt Control Register0 */
+#define UDCICR1         __REG(0x40600008) /* UDC Interrupt Control Register1 */
+#define UDCICR_FIFOERR  (1 << 1)        /* FIFO Error interrupt for EP */
+#define UDCICR_PKTCOMPL (1 << 0)        /* Packet Complete interrupt for EP */
+
+#define UDC_INT_FIFOERROR  (0x2)
+#define UDC_INT_PACKETCMP  (0x1)
+
+#define UDCICR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2))
+#define UDCICR1_IECC    (1 << 31)       /* IntEn - Configuration Change */
+#define UDCICR1_IESOF   (1 << 30)       /* IntEn - Start of Frame */
+#define UDCICR1_IERU    (1 << 29)       /* IntEn - Resume */
+#define UDCICR1_IESU    (1 << 28)       /* IntEn - Suspend */
+#define UDCICR1_IERS    (1 << 27)       /* IntEn - Reset */
+
+#define UDCISR0         __REG(0x4060000C) /* UDC Interrupt Status Register 0 */
+#define UDCISR1         __REG(0x40600010) /* UDC Interrupt Status Register 1 */
+#define UDCISR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2))
+#define UDCISR1_IRCC    (1 << 31)       /* IntReq - Configuration Change */
+#define UDCISR1_IRSOF   (1 << 30)       /* IntReq - Start of Frame */
+#define UDCISR1_IRRU    (1 << 29)       /* IntReq - Resume */
+#define UDCISR1_IRSU    (1 << 28)       /* IntReq - Suspend */
+#define UDCISR1_IRRS    (1 << 27)       /* IntReq - Reset */
+
+#define UDCFNR          __REG(0x40600014) /* UDC Frame Number Register */
+#define UDCOTGICR       __REG(0x40600018) /* UDC On-The-Go interrupt control */
+#define UDCOTGICR_IESF  (1 << 24)       /* OTG SET_FEATURE command recvd */
+#define UDCOTGICR_IEXR  (1 << 17)       /* Extra Transciever Interrupt
+                                           Rising Edge Interrupt Enable */
+#define UDCOTGICR_IEXF  (1 << 16)       /* Extra Transciever Interrupt
+                                           Falling Edge Interrupt Enable */
+#define UDCOTGICR_IEVV40R (1 << 9)      /* OTG Vbus Valid 4.0V Rising Edge
+                                           Interrupt Enable */
+#define UDCOTGICR_IEVV40F (1 << 8)      /* OTG Vbus Valid 4.0V Falling Edge
+                                           Interrupt Enable */
+#define UDCOTGICR_IEVV44R (1 << 7)      /* OTG Vbus Valid 4.4V Rising Edge
+                                           Interrupt Enable */
+#define UDCOTGICR_IEVV44F (1 << 6)      /* OTG Vbus Valid 4.4V Falling Edge
+                                           Interrupt Enable */
+#define UDCOTGICR_IESVR (1 << 5)        /* OTG Session Valid Rising Edge
+                                           Interrupt Enable */
+#define UDCOTGICR_IESVF (1 << 4)        /* OTG Session Valid Falling Edge
+                                           Interrupt Enable */
+#define UDCOTGICR_IESDR (1 << 3)        /* OTG A-Device SRP Detect Rising
+                                           Edge Interrupt Enable */
+#define UDCOTGICR_IESDF (1 << 2)        /* OTG A-Device SRP Detect Falling
+                                           Edge Interrupt Enable */
+#define UDCOTGICR_IEIDR (1 << 1)        /* OTG ID Change Rising Edge
+                                           Interrupt Enable */
+#define UDCOTGICR_IEIDF (1 << 0)        /* OTG ID Change Falling Edge
+                                           Interrupt Enable */
+
+#define UP2OCR            __REG(0x40600020)  /* USB Port 2 Output Control register */
+#define UP3OCR            __REG(0x40600024)  /* USB Port 2 Output Control register */
+
+#define UP2OCR_CPVEN    (1 << 0)        /* Charge Pump Vbus Enable */
+#define UP2OCR_CPVPE    (1 << 1)        /* Charge Pump Vbus Pulse Enable */
+#define UP2OCR_DPPDE    (1 << 2)        /* Host Port 2 Transceiver D+ Pull Down Enable */
+#define UP2OCR_DMPDE    (1 << 3)        /* Host Port 2 Transceiver D- Pull Down Enable */
+#define UP2OCR_DPPUE    (1 << 4)        /* Host Port 2 Transceiver D+ Pull Up Enable */
+#define UP2OCR_DMPUE    (1 << 5)        /* Host Port 2 Transceiver D- Pull Up Enable */
+#define UP2OCR_DPPUBE   (1 << 6)        /* Host Port 2 Transceiver D+ Pull Up Bypass Enable */
+#define UP2OCR_DMPUBE   (1 << 7)        /* Host Port 2 Transceiver D- Pull Up Bypass Enable */
+#define UP2OCR_EXSP             (1 << 8)        /* External Transceiver Speed Control */
+#define UP2OCR_EXSUS    (1 << 9)        /* External Transceiver Speed Enable */
+#define UP2OCR_IDON             (1 << 10)       /* OTG ID Read Enable */
+#define UP2OCR_HXS              (1 << 16)       /* Host Port 2 Transceiver Output Select */
+#define UP2OCR_HXOE             (1 << 17)       /* Host Port 2 Transceiver Output Enable */
+#define UP2OCR_SEOS(x)          ((x & 7) << 24) /* Single-Ended Output Select */
+
+#define UDCCSN(x)       __REG2(0x40600100, (x) << 2)
+#define UDCCSR0         __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */
+#define UDCCSR0_SA      (1 << 7)        /* Setup Active */
+#define UDCCSR0_RNE     (1 << 6)        /* Receive FIFO Not Empty */
+#define UDCCSR0_FST     (1 << 5)        /* Force Stall */
+#define UDCCSR0_SST     (1 << 4)        /* Sent Stall */
+#define UDCCSR0_DME     (1 << 3)        /* DMA Enable */
+#define UDCCSR0_FTF     (1 << 2)        /* Flush Transmit FIFO */
+#define UDCCSR0_IPR     (1 << 1)        /* IN Packet Ready */
+#define UDCCSR0_OPC     (1 << 0)        /* OUT Packet Complete */
+
+#define UDCCSRA         __REG(0x40600104) /* UDC Control/Status register - Endpoint A */
+#define UDCCSRB         __REG(0x40600108) /* UDC Control/Status register - Endpoint B */
+#define UDCCSRC         __REG(0x4060010C) /* UDC Control/Status register - Endpoint C */
+#define UDCCSRD         __REG(0x40600110) /* UDC Control/Status register - Endpoint D */
+#define UDCCSRE         __REG(0x40600114) /* UDC Control/Status register - Endpoint E */
+#define UDCCSRF         __REG(0x40600118) /* UDC Control/Status register - Endpoint F */
+#define UDCCSRG         __REG(0x4060011C) /* UDC Control/Status register - Endpoint G */
+#define UDCCSRH         __REG(0x40600120) /* UDC Control/Status register - Endpoint H */
+#define UDCCSRI         __REG(0x40600124) /* UDC Control/Status register - Endpoint I */
+#define UDCCSRJ         __REG(0x40600128) /* UDC Control/Status register - Endpoint J */
+#define UDCCSRK         __REG(0x4060012C) /* UDC Control/Status register - Endpoint K */
+#define UDCCSRL         __REG(0x40600130) /* UDC Control/Status register - Endpoint L */
+#define UDCCSRM         __REG(0x40600134) /* UDC Control/Status register - Endpoint M */
+#define UDCCSRN         __REG(0x40600138) /* UDC Control/Status register - Endpoint N */
+#define UDCCSRP         __REG(0x4060013C) /* UDC Control/Status register - Endpoint P */
+#define UDCCSRQ         __REG(0x40600140) /* UDC Control/Status register - Endpoint Q */
+#define UDCCSRR         __REG(0x40600144) /* UDC Control/Status register - Endpoint R */
+#define UDCCSRS         __REG(0x40600148) /* UDC Control/Status register - Endpoint S */
+#define UDCCSRT         __REG(0x4060014C) /* UDC Control/Status register - Endpoint T */
+#define UDCCSRU         __REG(0x40600150) /* UDC Control/Status register - Endpoint U */
+#define UDCCSRV         __REG(0x40600154) /* UDC Control/Status register - Endpoint V */
+#define UDCCSRW         __REG(0x40600158) /* UDC Control/Status register - Endpoint W */
+#define UDCCSRX         __REG(0x4060015C) /* UDC Control/Status register - Endpoint X */
+
+#define UDCCSR_DPE      (1 << 9)        /* Data Packet Error */
+#define UDCCSR_FEF      (1 << 8)        /* Flush Endpoint FIFO */
+#define UDCCSR_SP       (1 << 7)        /* Short Packet Control/Status */
+#define UDCCSR_BNE      (1 << 6)        /* Buffer Not Empty (IN endpoints) */
+#define UDCCSR_BNF      (1 << 6)        /* Buffer Not Full (OUT endpoints) */
+#define UDCCSR_FST      (1 << 5)        /* Force STALL */
+#define UDCCSR_SST      (1 << 4)        /* Sent STALL */
+#define UDCCSR_DME      (1 << 3)        /* DMA Enable */
+#define UDCCSR_TRN      (1 << 2)        /* Tx/Rx NAK */
+#define UDCCSR_PC       (1 << 1)        /* Packet Complete */
+#define UDCCSR_FS       (1 << 0)        /* FIFO needs service */
+
+#define UDCBCN(x)       __REG2(0x40600200, (x)<<2)
+#define UDCBCR0         __REG(0x40600200) /* Byte Count Register - EP0 */
+#define UDCBCRA         __REG(0x40600204) /* Byte Count Register - EPA */
+#define UDCBCRB         __REG(0x40600208) /* Byte Count Register - EPB */
+#define UDCBCRC         __REG(0x4060020C) /* Byte Count Register - EPC */
+#define UDCBCRD         __REG(0x40600210) /* Byte Count Register - EPD */
+#define UDCBCRE         __REG(0x40600214) /* Byte Count Register - EPE */
+#define UDCBCRF         __REG(0x40600218) /* Byte Count Register - EPF */
+#define UDCBCRG         __REG(0x4060021C) /* Byte Count Register - EPG */
+#define UDCBCRH         __REG(0x40600220) /* Byte Count Register - EPH */
+#define UDCBCRI         __REG(0x40600224) /* Byte Count Register - EPI */
+#define UDCBCRJ         __REG(0x40600228) /* Byte Count Register - EPJ */
+#define UDCBCRK         __REG(0x4060022C) /* Byte Count Register - EPK */
+#define UDCBCRL         __REG(0x40600230) /* Byte Count Register - EPL */
+#define UDCBCRM         __REG(0x40600234) /* Byte Count Register - EPM */
+#define UDCBCRN         __REG(0x40600238) /* Byte Count Register - EPN */
+#define UDCBCRP         __REG(0x4060023C) /* Byte Count Register - EPP */
+#define UDCBCRQ         __REG(0x40600240) /* Byte Count Register - EPQ */
+#define UDCBCRR         __REG(0x40600244) /* Byte Count Register - EPR */
+#define UDCBCRS         __REG(0x40600248) /* Byte Count Register - EPS */
+#define UDCBCRT         __REG(0x4060024C) /* Byte Count Register - EPT */
+#define UDCBCRU         __REG(0x40600250) /* Byte Count Register - EPU */
+#define UDCBCRV         __REG(0x40600254) /* Byte Count Register - EPV */
+#define UDCBCRW         __REG(0x40600258) /* Byte Count Register - EPW */
+#define UDCBCRX         __REG(0x4060025C) /* Byte Count Register - EPX */
+
+#define UDCDN(x)        __REG2(0x40600300, (x)<<2)
+#define PHYS_UDCDN(x)   (0x40600300 + ((x)<<2))
+#define PUDCDN(x)       (volatile u32 *)(io_p2v(PHYS_UDCDN((x))))
+#define UDCDR0          __REG(0x40600300) /* Data Register - EP0 */
+#define UDCDRA          __REG(0x40600304) /* Data Register - EPA */
+#define UDCDRB          __REG(0x40600308) /* Data Register - EPB */
+#define UDCDRC          __REG(0x4060030C) /* Data Register - EPC */
+#define UDCDRD          __REG(0x40600310) /* Data Register - EPD */
+#define UDCDRE          __REG(0x40600314) /* Data Register - EPE */
+#define UDCDRF          __REG(0x40600318) /* Data Register - EPF */
+#define UDCDRG          __REG(0x4060031C) /* Data Register - EPG */
+#define UDCDRH          __REG(0x40600320) /* Data Register - EPH */
+#define UDCDRI          __REG(0x40600324) /* Data Register - EPI */
+#define UDCDRJ          __REG(0x40600328) /* Data Register - EPJ */
+#define UDCDRK          __REG(0x4060032C) /* Data Register - EPK */
+#define UDCDRL          __REG(0x40600330) /* Data Register - EPL */
+#define UDCDRM          __REG(0x40600334) /* Data Register - EPM */
+#define UDCDRN          __REG(0x40600338) /* Data Register - EPN */
+#define UDCDRP          __REG(0x4060033C) /* Data Register - EPP */
+#define UDCDRQ          __REG(0x40600340) /* Data Register - EPQ */
+#define UDCDRR          __REG(0x40600344) /* Data Register - EPR */
+#define UDCDRS          __REG(0x40600348) /* Data Register - EPS */
+#define UDCDRT          __REG(0x4060034C) /* Data Register - EPT */
+#define UDCDRU          __REG(0x40600350) /* Data Register - EPU */
+#define UDCDRV          __REG(0x40600354) /* Data Register - EPV */
+#define UDCDRW          __REG(0x40600358) /* Data Register - EPW */
+#define UDCDRX          __REG(0x4060035C) /* Data Register - EPX */
+
+#define UDCCN(x)       __REG2(0x40600400, (x)<<2)
+#define UDCCRA          __REG(0x40600404) /* Configuration register EPA */
+#define UDCCRB          __REG(0x40600408) /* Configuration register EPB */
+#define UDCCRC          __REG(0x4060040C) /* Configuration register EPC */
+#define UDCCRD          __REG(0x40600410) /* Configuration register EPD */
+#define UDCCRE          __REG(0x40600414) /* Configuration register EPE */
+#define UDCCRF          __REG(0x40600418) /* Configuration register EPF */
+#define UDCCRG          __REG(0x4060041C) /* Configuration register EPG */
+#define UDCCRH          __REG(0x40600420) /* Configuration register EPH */
+#define UDCCRI          __REG(0x40600424) /* Configuration register EPI */
+#define UDCCRJ          __REG(0x40600428) /* Configuration register EPJ */
+#define UDCCRK          __REG(0x4060042C) /* Configuration register EPK */
+#define UDCCRL          __REG(0x40600430) /* Configuration register EPL */
+#define UDCCRM          __REG(0x40600434) /* Configuration register EPM */
+#define UDCCRN          __REG(0x40600438) /* Configuration register EPN */
+#define UDCCRP          __REG(0x4060043C) /* Configuration register EPP */
+#define UDCCRQ          __REG(0x40600440) /* Configuration register EPQ */
+#define UDCCRR          __REG(0x40600444) /* Configuration register EPR */
+#define UDCCRS          __REG(0x40600448) /* Configuration register EPS */
+#define UDCCRT          __REG(0x4060044C) /* Configuration register EPT */
+#define UDCCRU          __REG(0x40600450) /* Configuration register EPU */
+#define UDCCRV          __REG(0x40600454) /* Configuration register EPV */
+#define UDCCRW          __REG(0x40600458) /* Configuration register EPW */
+#define UDCCRX          __REG(0x4060045C) /* Configuration register EPX */
+
+#define UDCCONR_CN      (0x03 << 25)    /* Configuration Number */
+#define UDCCONR_CN_S    (25)
+#define UDCCONR_IN      (0x07 << 22)    /* Interface Number */
+#define UDCCONR_IN_S    (22)
+#define UDCCONR_AISN    (0x07 << 19)    /* Alternate Interface Number */
+#define UDCCONR_AISN_S  (19)
+#define UDCCONR_EN      (0x0f << 15)    /* Endpoint Number */
+#define UDCCONR_EN_S    (15)
+#define UDCCONR_ET      (0x03 << 13)    /* Endpoint Type: */
+#define UDCCONR_ET_S    (13)
+#define UDCCONR_ET_INT  (0x03 << 13)    /*   Interrupt */
+#define UDCCONR_ET_BULK (0x02 << 13)    /*   Bulk */
+#define UDCCONR_ET_ISO  (0x01 << 13)    /*   Isochronous */
+#define UDCCONR_ET_NU   (0x00 << 13)    /*   Not used */
+#define UDCCONR_ED      (1 << 12)       /* Endpoint Direction */
+#define UDCCONR_MPS     (0x3ff << 2)    /* Maximum Packet Size */
+#define UDCCONR_MPS_S   (2)
+#define UDCCONR_DE      (1 << 1)        /* Double Buffering Enable */
+#define UDCCONR_EE      (1 << 0)        /* Endpoint Enable */
+
+
+#define UDC_INT_FIFOERROR  (0x2)
+#define UDC_INT_PACKETCMP  (0x1)
+
+#define UDC_FNR_MASK     (0x7ff)
+
+#define UDCCSR_WR_MASK   (UDCCSR_DME|UDCCSR_FST)
+#define UDC_BCR_MASK    (0x3ff)
+
+#endif
diff --git a/include/asm-arm/arch-pxa/pxa2xx-gpio.h b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
index b81cd63cb2eb..6ef1dd09970b 100644
--- a/include/asm-arm/arch-pxa/pxa2xx-gpio.h
+++ b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
@@ -1,6 +1,8 @@
 #ifndef __ASM_ARCH_PXA2XX_GPIO_H
 #define __ASM_ARCH_PXA2XX_GPIO_H
 
+#warning Please use mfp-pxa2[57]x.h instead of pxa2xx-gpio.h
+
 /* GPIO alternate function assignments */
 
 #define GPIO1_RST               1       /* reset */
diff --git a/include/asm-arm/arch-pxa/pxa2xx-regs.h b/include/asm-arm/arch-pxa/pxa2xx-regs.h
index 9553b54fa5bc..73e0a329cf7f 100644
--- a/include/asm-arm/arch-pxa/pxa2xx-regs.h
+++ b/include/asm-arm/arch-pxa/pxa2xx-regs.h
@@ -81,4 +81,166 @@
 
 #endif
 
+
+/*
+ * Power Manager
+ */
+
+#define PMCR            __REG(0x40F00000)  /* Power Manager Control Register */
+#define PSSR            __REG(0x40F00004)  /* Power Manager Sleep Status Register */
+#define PSPR            __REG(0x40F00008)  /* Power Manager Scratch Pad Register */
+#define PWER            __REG(0x40F0000C)  /* Power Manager Wake-up Enable Register */
+#define PRER            __REG(0x40F00010)  /* Power Manager GPIO Rising-Edge Detect Enable Register */
+#define PFER            __REG(0x40F00014)  /* Power Manager GPIO Falling-Edge Detect Enable Register */
+#define PEDR            __REG(0x40F00018)  /* Power Manager GPIO Edge Detect Status Register */
+#define PCFR            __REG(0x40F0001C)  /* Power Manager General Configuration Register */
+#define PGSR0           __REG(0x40F00020)  /* Power Manager GPIO Sleep State Register for GP[31-0] */
+#define PGSR1           __REG(0x40F00024)  /* Power Manager GPIO Sleep State Register for GP[63-32] */
+#define PGSR2           __REG(0x40F00028)  /* Power Manager GPIO Sleep State Register for GP[84-64] */
+#define PGSR3           __REG(0x40F0002C)  /* Power Manager GPIO Sleep State Register for GP[118-96] */
+#define RCSR            __REG(0x40F00030)  /* Reset Controller Status Register */
+
+#define PSLR            __REG(0x40F00034)       /* Power Manager Sleep Config Register */
+#define PSTR            __REG(0x40F00038)       /* Power Manager Standby Config Register */
+#define PSNR            __REG(0x40F0003C)       /* Power Manager Sense Config Register */
+#define PVCR            __REG(0x40F00040)       /* Power Manager VoltageControl Register */
+#define PKWR            __REG(0x40F00050)       /* Power Manager KB Wake-up Enable Reg */
+#define PKSR            __REG(0x40F00054)       /* Power Manager KB Level-Detect Register */
+#define PCMD(x) __REG2(0x40F00080, (x)<<2)
+#define PCMD0   __REG(0x40F00080 + 0 * 4)
+#define PCMD1   __REG(0x40F00080 + 1 * 4)
+#define PCMD2   __REG(0x40F00080 + 2 * 4)
+#define PCMD3   __REG(0x40F00080 + 3 * 4)
+#define PCMD4   __REG(0x40F00080 + 4 * 4)
+#define PCMD5   __REG(0x40F00080 + 5 * 4)
+#define PCMD6   __REG(0x40F00080 + 6 * 4)
+#define PCMD7   __REG(0x40F00080 + 7 * 4)
+#define PCMD8   __REG(0x40F00080 + 8 * 4)
+#define PCMD9   __REG(0x40F00080 + 9 * 4)
+#define PCMD10  __REG(0x40F00080 + 10 * 4)
+#define PCMD11  __REG(0x40F00080 + 11 * 4)
+#define PCMD12  __REG(0x40F00080 + 12 * 4)
+#define PCMD13  __REG(0x40F00080 + 13 * 4)
+#define PCMD14  __REG(0x40F00080 + 14 * 4)
+#define PCMD15  __REG(0x40F00080 + 15 * 4)
+#define PCMD16  __REG(0x40F00080 + 16 * 4)
+#define PCMD17  __REG(0x40F00080 + 17 * 4)
+#define PCMD18  __REG(0x40F00080 + 18 * 4)
+#define PCMD19  __REG(0x40F00080 + 19 * 4)
+#define PCMD20  __REG(0x40F00080 + 20 * 4)
+#define PCMD21  __REG(0x40F00080 + 21 * 4)
+#define PCMD22  __REG(0x40F00080 + 22 * 4)
+#define PCMD23  __REG(0x40F00080 + 23 * 4)
+#define PCMD24  __REG(0x40F00080 + 24 * 4)
+#define PCMD25  __REG(0x40F00080 + 25 * 4)
+#define PCMD26  __REG(0x40F00080 + 26 * 4)
+#define PCMD27  __REG(0x40F00080 + 27 * 4)
+#define PCMD28  __REG(0x40F00080 + 28 * 4)
+#define PCMD29  __REG(0x40F00080 + 29 * 4)
+#define PCMD30  __REG(0x40F00080 + 30 * 4)
+#define PCMD31  __REG(0x40F00080 + 31 * 4)
+
+#define PCMD_MBC        (1<<12)
+#define PCMD_DCE        (1<<11)
+#define PCMD_LC (1<<10)
+/* FIXME:  PCMD_SQC need be checked.   */
+#define PCMD_SQC        (3<<8)  /* currently only bit 8 is changeable,
+                                   bit 9 should be 0 all day. */
+#define PVCR_VCSA       (0x1<<14)
+#define PVCR_CommandDelay (0xf80)
+#define PCFR_PI2C_EN    (0x1 << 6)
+
+#define PSSR_OTGPH      (1 << 6)        /* OTG Peripheral control Hold */
+#define PSSR_RDH        (1 << 5)        /* Read Disable Hold */
+#define PSSR_PH         (1 << 4)        /* Peripheral Control Hold */
+#define PSSR_STS        (1 << 3)        /* Standby Mode Status */
+#define PSSR_VFS        (1 << 2)        /* VDD Fault Status */
+#define PSSR_BFS        (1 << 1)        /* Battery Fault Status */
+#define PSSR_SSS        (1 << 0)        /* Software Sleep Status */
+
+#define PSLR_SL_ROD     (1 << 20)       /* Sleep-Mode/Depp-Sleep Mode nRESET_OUT Disable */
+
+#define PCFR_RO         (1 << 15)       /* RDH Override */
+#define PCFR_PO         (1 << 14)       /* PH Override */
+#define PCFR_GPROD      (1 << 12)       /* GPIO nRESET_OUT Disable */
+#define PCFR_L1_EN      (1 << 11)       /* Sleep Mode L1 converter Enable */
+#define PCFR_FVC        (1 << 10)       /* Frequency/Voltage Change */
+#define PCFR_DC_EN      (1 << 7)        /* Sleep/deep-sleep DC-DC Converter Enable */
+#define PCFR_PI2CEN     (1 << 6)        /* Enable PI2C controller */
+#define PCFR_GPR_EN     (1 << 4)        /* nRESET_GPIO Pin Enable */
+#define PCFR_DS         (1 << 3)        /* Deep Sleep Mode */
+#define PCFR_FS         (1 << 2)        /* Float Static Chip Selects */
+#define PCFR_FP         (1 << 1)        /* Float PCMCIA controls */
+#define PCFR_OPDE       (1 << 0)        /* 3.6864 MHz oscillator power-down enable */
+
+#define RCSR_GPR        (1 << 3)        /* GPIO Reset */
+#define RCSR_SMR        (1 << 2)        /* Sleep Mode */
+#define RCSR_WDR        (1 << 1)        /* Watchdog Reset */
+#define RCSR_HWR        (1 << 0)        /* Hardware Reset */
+
+#define PWER_GPIO(Nb)   (1 << Nb)       /* GPIO [0..15] wake-up enable     */
+#define PWER_GPIO0      PWER_GPIO (0)   /* GPIO  [0] wake-up enable        */
+#define PWER_GPIO1      PWER_GPIO (1)   /* GPIO  [1] wake-up enable        */
+#define PWER_GPIO2      PWER_GPIO (2)   /* GPIO  [2] wake-up enable        */
+#define PWER_GPIO3      PWER_GPIO (3)   /* GPIO  [3] wake-up enable        */
+#define PWER_GPIO4      PWER_GPIO (4)   /* GPIO  [4] wake-up enable        */
+#define PWER_GPIO5      PWER_GPIO (5)   /* GPIO  [5] wake-up enable        */
+#define PWER_GPIO6      PWER_GPIO (6)   /* GPIO  [6] wake-up enable        */
+#define PWER_GPIO7      PWER_GPIO (7)   /* GPIO  [7] wake-up enable        */
+#define PWER_GPIO8      PWER_GPIO (8)   /* GPIO  [8] wake-up enable        */
+#define PWER_GPIO9      PWER_GPIO (9)   /* GPIO  [9] wake-up enable        */
+#define PWER_GPIO10     PWER_GPIO (10)  /* GPIO [10] wake-up enable        */
+#define PWER_GPIO11     PWER_GPIO (11)  /* GPIO [11] wake-up enable        */
+#define PWER_GPIO12     PWER_GPIO (12)  /* GPIO [12] wake-up enable        */
+#define PWER_GPIO13     PWER_GPIO (13)  /* GPIO [13] wake-up enable        */
+#define PWER_GPIO14     PWER_GPIO (14)  /* GPIO [14] wake-up enable        */
+#define PWER_GPIO15     PWER_GPIO (15)  /* GPIO [15] wake-up enable        */
+#define PWER_RTC        0x80000000      /* RTC alarm wake-up enable        */
+
+/*
+ * PXA2xx specific Core clock definitions
+ */
+#define CCCR            __REG(0x41300000)  /* Core Clock Configuration Register */
+#define CCSR            __REG(0x4130000C)  /* Core Clock Status Register */
+#define CKEN            __REG(0x41300004)  /* Clock Enable Register */
+#define OSCC            __REG(0x41300008)  /* Oscillator Configuration Register */
+
+#define CCCR_N_MASK     0x0380  /* Run Mode Frequency to Turbo Mode Frequency Multiplier */
+#define CCCR_M_MASK     0x0060  /* Memory Frequency to Run Mode Frequency Multiplier */
+#define CCCR_L_MASK     0x001f  /* Crystal Frequency to Memory Frequency Multiplier */
+
+#define CKEN_AC97CONF   (31)    /* AC97 Controller Configuration */
+#define CKEN_CAMERA     (24)    /* Camera Interface Clock Enable */
+#define CKEN_SSP1       (23)    /* SSP1 Unit Clock Enable */
+#define CKEN_MEMC       (22)    /* Memory Controller Clock Enable */
+#define CKEN_MEMSTK     (21)    /* Memory Stick Host Controller */
+#define CKEN_IM         (20)    /* Internal Memory Clock Enable */
+#define CKEN_KEYPAD     (19)    /* Keypad Interface Clock Enable */
+#define CKEN_USIM       (18)    /* USIM Unit Clock Enable */
+#define CKEN_MSL        (17)    /* MSL Unit Clock Enable */
+#define CKEN_LCD        (16)    /* LCD Unit Clock Enable */
+#define CKEN_PWRI2C     (15)    /* PWR I2C Unit Clock Enable */
+#define CKEN_I2C        (14)    /* I2C Unit Clock Enable */
+#define CKEN_FICP       (13)    /* FICP Unit Clock Enable */
+#define CKEN_MMC        (12)    /* MMC Unit Clock Enable */
+#define CKEN_USB        (11)    /* USB Unit Clock Enable */
+#define CKEN_ASSP       (10)    /* ASSP (SSP3) Clock Enable */
+#define CKEN_USBHOST    (10)    /* USB Host Unit Clock Enable */
+#define CKEN_OSTIMER    (9)     /* OS Timer Unit Clock Enable */
+#define CKEN_NSSP       (9)     /* NSSP (SSP2) Clock Enable */
+#define CKEN_I2S        (8)     /* I2S Unit Clock Enable */
+#define CKEN_BTUART     (7)     /* BTUART Unit Clock Enable */
+#define CKEN_FFUART     (6)     /* FFUART Unit Clock Enable */
+#define CKEN_STUART     (5)     /* STUART Unit Clock Enable */
+#define CKEN_HWUART     (4)     /* HWUART Unit Clock Enable */
+#define CKEN_SSP3       (4)     /* SSP3 Unit Clock Enable */
+#define CKEN_SSP        (3)     /* SSP Unit Clock Enable */
+#define CKEN_SSP2       (3)     /* SSP2 Unit Clock Enable */
+#define CKEN_AC97       (2)     /* AC97 Unit Clock Enable */
+#define CKEN_PWM1       (1)     /* PWM1 Clock Enable */
+#define CKEN_PWM0       (0)     /* PWM0 Clock Enable */
+
+#define OSCC_OON        (1 << 1)        /* 32.768kHz OON (write-once only bit) */
+#define OSCC_OOK        (1 << 0)        /* 32.768kHz OOK (read-only bit) */
+
 #endif
diff --git a/include/asm-arm/arch-pxa/pxa2xx_spi.h b/include/asm-arm/arch-pxa/pxa2xx_spi.h
index 3459fb26ce97..2206cb61a9f9 100644
--- a/include/asm-arm/arch-pxa/pxa2xx_spi.h
+++ b/include/asm-arm/arch-pxa/pxa2xx_spi.h
@@ -41,4 +41,6 @@ struct pxa2xx_spi_chip {
         void (*cs_control)(u32 command);
 };
 
+extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info);
+
 #endif /*PXA2XX_SPI_H_*/
diff --git a/include/asm-arm/arch-pxa/pxa3xx_nand.h b/include/asm-arm/arch-pxa/pxa3xx_nand.h
index 81a8937486cb..eb4b190b6657 100644
--- a/include/asm-arm/arch-pxa/pxa3xx_nand.h
+++ b/include/asm-arm/arch-pxa/pxa3xx_nand.h
@@ -15,4 +15,6 @@ struct pxa3xx_nand_platform_data {
         struct mtd_partition *parts;
         unsigned int    nr_parts;
 };
+
+extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
 #endif /* __ASM_ARCH_PXA3XX_NAND_H */
diff --git a/include/asm-arm/arch-pxa/pxafb.h b/include/asm-arm/arch-pxa/pxafb.h
index bbd22396841a..daf018d0c604 100644
--- a/include/asm-arm/arch-pxa/pxafb.h
+++ b/include/asm-arm/arch-pxa/pxafb.h
@@ -71,7 +71,8 @@ struct pxafb_mode_info {
 
         u_char          bpp;
         u_int           cmap_greyscale:1,
-                        unused:31;
+                        depth:8,
+                        unused:23;
 
         /* Parallel Mode Timing */
         u_char          hsync_len;
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h
index 3ba464c913a5..820a189684a9 100644
--- a/include/asm-arm/arch-pxa/regs-lcd.h
+++ b/include/asm-arm/arch-pxa/regs-lcd.h
@@ -27,6 +27,12 @@
 #define LCCR3_4BPP      (2 << 24)
 #define LCCR3_8BPP      (3 << 24)
 #define LCCR3_16BPP     (4 << 24)
+#define LCCR3_18BPP     (5 << 24)
+#define LCCR3_18BPP_P   (6 << 24)
+#define LCCR3_19BPP     (7 << 24)
+#define LCCR3_19BPP_P   (1 << 29)
+#define LCCR3_24BPP     ((1 << 29) | (1 << 24))
+#define LCCR3_25BPP     ((1 << 29) | (2 << 24))
 
 #define LCCR3_PDFOR_0   (0 << 30)
 #define LCCR3_PDFOR_1   (1 << 30)
diff --git a/include/asm-arm/arch-pxa/regs-ssp.h b/include/asm-arm/arch-pxa/regs-ssp.h
index 0255328c3c18..3c04cde2cf1f 100644
--- a/include/asm-arm/arch-pxa/regs-ssp.h
+++ b/include/asm-arm/arch-pxa/regs-ssp.h
@@ -20,6 +20,10 @@
 #define SSTSS           (0x38)  /* SSP Timeslot Status */
 #define SSACD           (0x3C)  /* SSP Audio Clock Divider */
 
+#if defined(CONFIG_PXA3xx)
+#define SSACDD          (0x40)  /* SSP Audio Clock Dither Divider */
+#endif
+
 /* Common PXA2xx bits first */
 #define SSCR0_DSS       (0x0000000f)    /* Data Size Select (mask) */
 #define SSCR0_DataSize(x)  ((x) - 1)    /* Data Size Select [4..16] */
@@ -29,10 +33,12 @@
 #define SSCR0_National  (0x2 << 4)      /* National Microwire */
 #define SSCR0_ECS       (1 << 6)        /* External clock select */
 #define SSCR0_SSE       (1 << 7)        /* Synchronous Serial Port Enable */
+
 #if defined(CONFIG_PXA25x)
 #define SSCR0_SCR       (0x0000ff00)    /* Serial Clock Rate (mask) */
 #define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */
-#elif defined(CONFIG_PXA27x)
+
+#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 #define SSCR0_SCR       (0x000fff00)    /* Serial Clock Rate (mask) */
 #define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */
 #define SSCR0_EDSS      (1 << 20)       /* Extended data size select */
@@ -45,6 +51,10 @@
 #define SSCR0_MOD       (1 << 31)       /* Mode (normal or network) */
 #endif
 
+#if defined(CONFIG_PXA3xx)
+#define SSCR0_FPCKE     (1 << 29)       /* FIFO packing enable */
+#endif
+
 #define SSCR1_RIE       (1 << 0)        /* Receive FIFO Interrupt Enable */
 #define SSCR1_TIE       (1 << 1)        /* Transmit FIFO Interrupt Enable */
 #define SSCR1_LBM       (1 << 2)        /* Loop-Back Mode */
@@ -109,5 +119,9 @@
 #define SSACD_SCDB              (1 << 3)        /* SSPSYSCLK Divider Bypass */
 #define SSACD_ACPS(x)           ((x) << 4)      /* Audio clock PLL select */
 #define SSACD_ACDS(x)           ((x) << 0)      /* Audio clock divider select */
+#if defined(CONFIG_PXA3xx)
+#define SSACD_SCDX8             (1 << 7)        /* SYSCLK division ratio select */
+#endif
+
 
 #endif /* __ASM_ARCH_REGS_SSP_H */
diff --git a/include/asm-arm/arch-pxa/system.h b/include/asm-arm/arch-pxa/system.h
index 9aa6c2e939e8..6956fc5235f8 100644
--- a/include/asm-arm/arch-pxa/system.h
+++ b/include/asm-arm/arch-pxa/system.h
@@ -12,6 +12,7 @@
 
 #include <asm/proc-fns.h>
 #include "hardware.h"
+#include "pxa2xx-regs.h"
 #include "pxa-regs.h"
 
 static inline void arch_idle(void)
@@ -20,19 +21,4 @@ static inline void arch_idle(void)
 }
 
 
-static inline void arch_reset(char mode)
-{
-        if (cpu_is_pxa2xx())
-                RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
-        if (mode == 's') {
-                /* Jump into ROM at address 0 */
-                cpu_reset(0);
-        } else {
-                /* Initialize the watchdog and let it fire */
-                OWER = OWER_WME;
-                OSSR = OSSR_M3;
-                OSMR3 = OSCR + 368640;  /* ... in 100 ms */
-        }
-}
-
+void arch_reset(char mode);
diff --git a/include/asm-arm/arch-pxa/tosa.h b/include/asm-arm/arch-pxa/tosa.h
index c5b6fde6907c..a72803f0461b 100644
--- a/include/asm-arm/arch-pxa/tosa.h
+++ b/include/asm-arm/arch-pxa/tosa.h
@@ -25,21 +25,18 @@
  */
 #define TOSA_SCOOP_GPIO_BASE            NR_BUILTIN_GPIO
 #define TOSA_SCOOP_PXA_VCORE1           SCOOP_GPCR_PA11
-#define TOSA_SCOOP_TC6393_REST_IN       SCOOP_GPCR_PA12
+#define TOSA_GPIO_TC6393XB_REST_IN      (TOSA_SCOOP_GPIO_BASE + 1)
 #define TOSA_GPIO_IR_POWERDWN           (TOSA_SCOOP_GPIO_BASE + 2)
 #define TOSA_GPIO_SD_WP                 (TOSA_SCOOP_GPIO_BASE + 3)
 #define TOSA_GPIO_PWR_ON                (TOSA_SCOOP_GPIO_BASE + 4)
 #define TOSA_SCOOP_AUD_PWR_ON           SCOOP_GPCR_PA16
-#define TOSA_SCOOP_BT_RESET             SCOOP_GPCR_PA17
-#define TOSA_SCOOP_BT_PWR_EN            SCOOP_GPCR_PA18
+#define TOSA_GPIO_BT_RESET              (TOSA_SCOOP_GPIO_BASE + 6)
+#define TOSA_GPIO_BT_PWR_EN             (TOSA_SCOOP_GPIO_BASE + 7)
 #define TOSA_SCOOP_AC_IN_OL             SCOOP_GPCR_PA19
 
 /* GPIO Direction   1 : output mode / 0:input mode */
-#define TOSA_SCOOP_IO_DIR     ( TOSA_SCOOP_PXA_VCORE1 | TOSA_SCOOP_TC6393_REST_IN | \
-                TOSA_SCOOP_AUD_PWR_ON |\
-                TOSA_SCOOP_BT_RESET | TOSA_SCOOP_BT_PWR_EN )
-/* GPIO out put level when init   1: Hi */
-#define TOSA_SCOOP_IO_OUT     ( TOSA_SCOOP_TC6393_REST_IN )
+#define TOSA_SCOOP_IO_DIR     (TOSA_SCOOP_PXA_VCORE1 | \
+                TOSA_SCOOP_AUD_PWR_ON)
 
 /*
  * SCOOP2 jacket GPIOs
@@ -49,16 +46,34 @@
 #define TOSA_GPIO_NOTE_LED              (TOSA_SCOOP_JC_GPIO_BASE + 1)
 #define TOSA_GPIO_CHRG_ERR_LED          (TOSA_SCOOP_JC_GPIO_BASE + 2)
 #define TOSA_GPIO_USB_PULLUP            (TOSA_SCOOP_JC_GPIO_BASE + 3)
-#define TOSA_SCOOP_JC_TC6393_SUSPEND    SCOOP_GPCR_PA15
-#define TOSA_SCOOP_JC_TC3693_L3V_ON     SCOOP_GPCR_PA16
+#define TOSA_GPIO_TC6393XB_SUSPEND      (TOSA_SCOOP_JC_GPIO_BASE + 4)
+#define TOSA_GPIO_TC6393XB_L3V_ON       (TOSA_SCOOP_JC_GPIO_BASE + 5)
 #define TOSA_SCOOP_JC_WLAN_DETECT       SCOOP_GPCR_PA17
 #define TOSA_GPIO_WLAN_LED              (TOSA_SCOOP_JC_GPIO_BASE + 7)
 #define TOSA_SCOOP_JC_CARD_LIMIT_SEL    SCOOP_GPCR_PA19
 
 /* GPIO Direction   1 : output mode / 0:input mode */
-#define TOSA_SCOOP_JC_IO_DIR ( \
-                TOSA_SCOOP_JC_TC6393_SUSPEND | TOSA_SCOOP_JC_TC3693_L3V_ON | \
-                TOSA_SCOOP_JC_CARD_LIMIT_SEL )
+#define TOSA_SCOOP_JC_IO_DIR (TOSA_SCOOP_JC_CARD_LIMIT_SEL)
+
+/*
+ * TC6393XB GPIOs
+ */
+#define TOSA_TC6393XB_GPIO_BASE         (NR_BUILTIN_GPIO + 2 * 12)
+#define TOSA_TC6393XB_GPIO(i)           (TOSA_TC6393XB_GPIO_BASE + (i))
+#define TOSA_TC6393XB_GPIO_BIT(gpio)    (1 << (gpio - TOSA_TC6393XB_GPIO_BASE))
+
+#define TOSA_GPIO_TG_ON                 (TOSA_TC6393XB_GPIO_BASE + 0)
+#define TOSA_GPIO_L_MUTE                (TOSA_TC6393XB_GPIO_BASE + 1)
+#define TOSA_GPIO_BL_C20MA              (TOSA_TC6393XB_GPIO_BASE + 3)
+#define TOSA_GPIO_CARD_VCC_ON           (TOSA_TC6393XB_GPIO_BASE + 4)
+#define TOSA_GPIO_CHARGE_OFF            (TOSA_TC6393XB_GPIO_BASE + 6)
+#define TOSA_GPIO_CHARGE_OFF_JC         (TOSA_TC6393XB_GPIO_BASE + 7)
+#define TOSA_GPIO_BAT0_V_ON             (TOSA_TC6393XB_GPIO_BASE + 9)
+#define TOSA_GPIO_BAT1_V_ON             (TOSA_TC6393XB_GPIO_BASE + 10)
+#define TOSA_GPIO_BU_CHRG_ON            (TOSA_TC6393XB_GPIO_BASE + 11)
+#define TOSA_GPIO_BAT_SW_ON             (TOSA_TC6393XB_GPIO_BASE + 12)
+#define TOSA_GPIO_BAT0_TH_ON            (TOSA_TC6393XB_GPIO_BASE + 14)
+#define TOSA_GPIO_BAT1_TH_ON            (TOSA_TC6393XB_GPIO_BASE + 15)
 
 /*
  * Timing Generator
@@ -84,13 +99,13 @@
 #define TOSA_GPIO_JACKET_DETECT         (7)
 #define TOSA_GPIO_nSD_DETECT            (9)
 #define TOSA_GPIO_nSD_INT               (10)
-#define TOSA_GPIO_TC6393_CLK            (11)
+#define TOSA_GPIO_TC6393XB_CLK          (11)
 #define TOSA_GPIO_BAT1_CRG              (12)
 #define TOSA_GPIO_CF_CD                 (13)
 #define TOSA_GPIO_BAT0_CRG              (14)
-#define TOSA_GPIO_TC6393_INT            (15)
+#define TOSA_GPIO_TC6393XB_INT          (15)
 #define TOSA_GPIO_BAT0_LOW              (17)
-#define TOSA_GPIO_TC6393_RDY            (18)
+#define TOSA_GPIO_TC6393XB_RDY          (18)
 #define TOSA_GPIO_ON_RESET              (19)
 #define TOSA_GPIO_EAR_IN                (20)
 #define TOSA_GPIO_CF_IRQ                (21)    /* CF slot0 Ready */
@@ -99,6 +114,7 @@
 #define TOSA_GPIO_TP_INT                (32)    /* Touch Panel pen down interrupt */
 #define TOSA_GPIO_JC_CF_IRQ             (36)    /* CF slot1 Ready */
 #define TOSA_GPIO_BAT_LOCKED            (38)    /* Battery locked */
+#define TOSA_GPIO_IRDA_TX               (47)
 #define TOSA_GPIO_TG_SPI_SCLK           (81)
 #define TOSA_GPIO_TG_SPI_CS             (82)
 #define TOSA_GPIO_TG_SPI_MOSI           (83)
@@ -137,7 +153,7 @@
 #define TOSA_IRQ_GPIO_BAT1_CRG          IRQ_GPIO(TOSA_GPIO_BAT1_CRG)
 #define TOSA_IRQ_GPIO_CF_CD             IRQ_GPIO(TOSA_GPIO_CF_CD)
 #define TOSA_IRQ_GPIO_BAT0_CRG          IRQ_GPIO(TOSA_GPIO_BAT0_CRG)
-#define TOSA_IRQ_GPIO_TC6393_INT        IRQ_GPIO(TOSA_GPIO_TC6393_INT)
+#define TOSA_IRQ_GPIO_TC6393XB_INT      IRQ_GPIO(TOSA_GPIO_TC6393XB_INT)
 #define TOSA_IRQ_GPIO_BAT0_LOW          IRQ_GPIO(TOSA_GPIO_BAT0_LOW)
 #define TOSA_IRQ_GPIO_EAR_IN            IRQ_GPIO(TOSA_GPIO_EAR_IN)
 #define TOSA_IRQ_GPIO_CF_IRQ            IRQ_GPIO(TOSA_GPIO_CF_IRQ)
diff --git a/include/asm-arm/arch-pxa/tosa_bt.h b/include/asm-arm/arch-pxa/tosa_bt.h
new file mode 100644
index 000000000000..efc3c3d3b75d
--- /dev/null
+++ b/include/asm-arm/arch-pxa/tosa_bt.h
@@ -0,0 +1,22 @@
+/*
+ * Tosa bluetooth built-in chip control.
+ *
+ * Later it may be shared with some other platforms.
+ *
+ * Copyright (c) 2008 Dmitry Baryshkov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef TOSA_BT_H
+#define TOSA_BT_H
+
+struct tosa_bt_data {
+        int gpio_pwr;
+        int gpio_reset;
+};
+
+#endif
+
diff --git a/include/asm-arm/arch-pxa/uncompress.h b/include/asm-arm/arch-pxa/uncompress.h
index dadf4c20b622..f4551269aaf2 100644
--- a/include/asm-arm/arch-pxa/uncompress.h
+++ b/include/asm-arm/arch-pxa/uncompress.h
@@ -11,11 +11,11 @@
 
 #include <linux/serial_reg.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/mach-types.h>
 
-#define __REG(x)        ((volatile unsigned long *)x)
-
-#define UART            FFUART
+#define __REG(x)       ((volatile unsigned long *)x)
 
+static volatile unsigned long *UART = FFUART;
 
 static inline void putc(char c)
 {
@@ -33,8 +33,13 @@ static inline void flush(void)
 {
 }
 
+static inline void arch_decomp_setup(void)
+{
+        if (machine_is_littleton())
+                UART = STUART;
+}
+
 /*
  * nothing to do
  */
-#define arch_decomp_setup()
 #define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-pxa/zylonite.h b/include/asm-arm/arch-pxa/zylonite.h
index 4881b80f0f90..0d35ca04731e 100644
--- a/include/asm-arm/arch-pxa/zylonite.h
+++ b/include/asm-arm/arch-pxa/zylonite.h
@@ -15,8 +15,9 @@ struct platform_mmc_slot {
 
 extern struct platform_mmc_slot zylonite_mmc_slot[];
 
-extern int gpio_backlight;
 extern int gpio_eth_irq;
+extern int gpio_debug_led1;
+extern int gpio_debug_led2;
 
 extern int wm9713_irq;
 
diff --git a/include/asm-arm/mach/udc_pxa2xx.h b/include/asm-arm/mach/udc_pxa2xx.h
index f9f3606986c2..9e5ed7c0f27f 100644
--- a/include/asm-arm/mach/udc_pxa2xx.h
+++ b/include/asm-arm/mach/udc_pxa2xx.h
@@ -23,6 +23,7 @@ struct pxa2xx_udc_mach_info {
          */
         bool    gpio_vbus_inverted;
         u16     gpio_vbus;                      /* high == vbus present */
+        bool    gpio_pullup_inverted;
         u16     gpio_pullup;                    /* high == pullup activated */
 };
 
diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h
new file mode 100644
index 000000000000..bb3dd0545928
--- /dev/null
+++ b/include/linux/mfd/core.h
@@ -0,0 +1,55 @@
+#ifndef MFD_CORE_H
+#define MFD_CORE_H
+/*
+ * drivers/mfd/mfd-core.h
+ *
+ * core MFD support
+ * Copyright (c) 2006 Ian Molton
+ * Copyright (c) 2007 Dmitry Baryshkov
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/platform_device.h>
+
+/*
+ * This struct describes the MFD part ("cell").
+ * After registration the copy of this structure will become the platform data
+ * of the resulting platform_device
+ */
+struct mfd_cell {
+        const char              *name;
+
+        int                     (*enable)(struct platform_device *dev);
+        int                     (*disable)(struct platform_device *dev);
+        int                     (*suspend)(struct platform_device *dev);
+        int                     (*resume)(struct platform_device *dev);
+
+        void                    *driver_data; /* driver-specific data */
+
+        /*
+         * This resources can be specified relatievly to the parent device.
+         * For accessing device you should use resources from device
+         */
+        int                     num_resources;
+        const struct resource   *resources;
+};
+
+static inline struct mfd_cell *
+mfd_get_cell(struct platform_device *pdev)
+{
+        return (struct mfd_cell *)pdev->dev.platform_data;
+}
+
+extern int mfd_add_devices(
+                struct platform_device *parent,
+                const struct mfd_cell *cells, int n_devs,
+                struct resource *mem_base,
+                int irq_base);
+
+extern void mfd_remove_devices(struct platform_device *parent);
+
+#endif
diff --git a/include/linux/mfd/tc6393xb.h b/include/linux/mfd/tc6393xb.h
new file mode 100644
index 000000000000..7cc824a58f7c
--- /dev/null
+++ b/include/linux/mfd/tc6393xb.h
@@ -0,0 +1,49 @@
+/*
+ * Toshiba TC6393XB SoC support
+ *
+ * Copyright(c) 2005-2006 Chris Humbert
+ * Copyright(c) 2005 Dirk Opfer
+ * Copyright(c) 2005 Ian Molton <spyro@f2s.com>
+ * Copyright(c) 2007 Dmitry Baryshkov
+ *
+ * Based on code written by Sharp/Lineo for 2.4 kernels
+ * Based on locomo.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef TC6393XB_H
+#define TC6393XB_H
+
+/* Also one should provide the CK3P6MI clock */
+struct tc6393xb_platform_data {
+        u16     scr_pll2cr;     /* PLL2 Control */
+        u16     scr_gper;       /* GP Enable */
+        u32     scr_gpo_doecr;  /* GPO Data OE Control */
+        u32     scr_gpo_dsr;    /* GPO Data Set */
+
+        int     (*enable)(struct platform_device *dev);
+        int     (*disable)(struct platform_device *dev);
+        int     (*suspend)(struct platform_device *dev);
+        int     (*resume)(struct platform_device *dev);
+
+        int     irq_base;       /* a base for cascaded irq */
+        int     gpio_base;
+
+        struct tmio_nand_data   *nand_data;
+};
+
+/*
+ * Relative to irq_base
+ */
+#define IRQ_TC6393_NAND         0
+#define IRQ_TC6393_MMC          1
+#define IRQ_TC6393_OHCI         2
+#define IRQ_TC6393_SERIAL       3
+#define IRQ_TC6393_FB           4
+
+#define TC6393XB_NR_IRQS        8
+
+#endif
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
new file mode 100644
index 000000000000..9438d8c9ac1c
--- /dev/null
+++ b/include/linux/mfd/tmio.h
@@ -0,0 +1,17 @@
+#ifndef MFD_TMIO_H
+#define MFD_TMIO_H
+
+/*
+ * data for the NAND controller
+ */
+struct tmio_nand_data {
+        struct nand_bbt_descr   *badblock_pattern;
+        struct mtd_partition    *partition;
+        unsigned int            num_partitions;
+};
+
+#define TMIO_NAND_CONFIG        "tmio-nand-config"
+#define TMIO_NAND_CONTROL       "tmio-nand-control"
+#define TMIO_NAND_IRQ           "tmio-nand"
+
+#endif
diff --git a/include/linux/pwm.h b/include/linux/pwm.h
new file mode 100644
index 000000000000..3945f803d514
--- /dev/null
+++ b/include/linux/pwm.h
@@ -0,0 +1,31 @@
+#ifndef __LINUX_PWM_H
+#define __LINUX_PWM_H
+
+struct pwm_device;
+
+/*
+ * pwm_request - request a PWM device
+ */
+struct pwm_device *pwm_request(int pwm_id, const char *label);
+
+/*
+ * pwm_free - free a PWM device
+ */
+void pwm_free(struct pwm_device *pwm);
+
+/*
+ * pwm_config - change a PWM device configuration
+ */
+int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns);
+
+/*
+ * pwm_enable - start a PWM output toggling
+ */
+int pwm_enable(struct pwm_device *pwm);
+
+/*
+ * pwm_disable - stop a PWM output toggling
+ */
+void pwm_disable(struct pwm_device *pwm);
+
+#endif /* __ASM_ARCH_PWM_H */
diff --git a/include/linux/pwm_backlight.h b/include/linux/pwm_backlight.h
new file mode 100644
index 000000000000..7a9754c96775
--- /dev/null
+++ b/include/linux/pwm_backlight.h
@@ -0,0 +1,17 @@
+/*
+ * Generic PWM backlight driver data - see drivers/video/backlight/pwm_bl.c
+ */
+#ifndef __LINUX_PWM_BACKLIGHT_H
+#define __LINUX_PWM_BACKLIGHT_H
+
+struct platform_pwm_backlight_data {
+        int pwm_id;
+        unsigned int max_brightness;
+        unsigned int dft_brightness;
+        unsigned int pwm_period_ns;
+        int (*init)(struct device *dev);
+        int (*notify)(int brightness);
+        void (*exit)(struct device *dev);
+};
+
+#endif
diff --git a/include/linux/smc91x.h b/include/linux/smc91x.h
index 8e0556b8781c..3827b922ba1f 100644
--- a/include/linux/smc91x.h
+++ b/include/linux/smc91x.h
@@ -5,9 +5,19 @@
 #define SMC91X_USE_16BIT (1 << 1)
 #define SMC91X_USE_32BIT (1 << 2)
 
+#define SMC91X_NOWAIT           (1 << 3)
+
+/* two bits for IO_SHIFT, let's hope later designs will keep this sane */
+#define SMC91X_IO_SHIFT_0       (0 << 4)
+#define SMC91X_IO_SHIFT_1       (1 << 4)
+#define SMC91X_IO_SHIFT_2       (2 << 4)
+#define SMC91X_IO_SHIFT_3       (3 << 4)
+#define SMC91X_IO_SHIFT(x)      (((x) >> 4) & 0x3)
+
+#define SMC91X_USE_DMA          (1 << 6)
+
 struct smc91x_platdata {
         unsigned long flags;
-        unsigned long irq_flags; /* IRQF_... */
 };
 
 #endif /* __SMC91X_H__ */
diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index 484f883459e0..329b33f37ef3 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
@@ -48,6 +48,7 @@ config SND_PXA2XX_SOC_POODLE
 config SND_PXA2XX_SOC_TOSA
         tristate "SoC AC97 Audio support for Tosa"
         depends on SND_PXA2XX_SOC && MACH_TOSA
+        depends on MFD_TC6393XB
         select SND_PXA2XX_SOC_AC97
         select SND_SOC_WM9712
         help
diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c
index 425071030970..e130346732ba 100644
--- a/sound/soc/pxa/pxa2xx-i2s.c
+++ b/sound/soc/pxa/pxa2xx-i2s.c
@@ -18,6 +18,7 @@
 #include <linux/module.h>
 #include <linux/device.h>
 #include <linux/delay.h>
+#include <linux/clk.h>
 #include <sound/core.h>
 #include <sound/pcm.h>
 #include <sound/initval.h>
@@ -40,6 +41,7 @@ struct pxa_i2s_port {
         u32 fmt;
 };
 static struct pxa_i2s_port pxa_i2s;
+static struct clk *clk_i2s;
 
 static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_out = {
         .name                   = "I2S PCM Stereo out",
@@ -82,6 +84,10 @@ static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream)
         struct snd_soc_pcm_runtime *rtd = substream->private_data;
         struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;
 
+        clk_i2s = clk_get(NULL, "I2SCLK");
+        if (IS_ERR(clk_i2s))
+                return PTR_ERR(clk_i2s);
+
         if (!cpu_dai->active) {
                 SACR0 |= SACR0_RST;
                 SACR0 = 0;
@@ -149,7 +155,7 @@ static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream,
         pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx);
         pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm);
         pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk);
-        pxa_set_cken(CKEN_I2S, 1);
+        clk_enable(clk_i2s);
         pxa_i2s_wait();
 
         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
@@ -234,8 +240,10 @@ static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream)
         if (SACR1 & (SACR1_DREC | SACR1_DRPL)) {
                 SACR0 &= ~SACR0_ENB;
                 pxa_i2s_wait();
-                pxa_set_cken(CKEN_I2S, 0);
+                clk_disable(clk_i2s);
         }
+
+        clk_put(clk_i2s);
 }
 
 #ifdef CONFIG_PM
diff --git a/sound/soc/pxa/tosa.c b/sound/soc/pxa/tosa.c
index 7346d7e5d066..c1462c4d139b 100644
--- a/sound/soc/pxa/tosa.c
+++ b/sound/soc/pxa/tosa.c
@@ -24,6 +24,7 @@
 #include <linux/module.h>
 #include <linux/moduleparam.h>
 #include <linux/device.h>
+#include <linux/gpio.h>
 
 #include <sound/core.h>
 #include <sound/pcm.h>
@@ -31,7 +32,7 @@
 #include <sound/soc-dapm.h>
 
 #include <asm/mach-types.h>
-#include <asm/hardware/tmio.h>
+#include <asm/arch/tosa.h>
 #include <asm/arch/pxa-regs.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/audio.h>
@@ -138,10 +139,7 @@ static int tosa_set_spk(struct snd_kcontrol *kcontrol,
 static int tosa_hp_event(struct snd_soc_dapm_widget *w,
         struct snd_kcontrol *k, int event)
 {
-        if (SND_SOC_DAPM_EVENT_ON(event))
-                set_tc6393_gpio(&tc6393_device.dev,TOSA_TC6393_L_MUTE);
-        else
-                reset_tc6393_gpio(&tc6393_device.dev,TOSA_TC6393_L_MUTE);
+        gpio_set_value(TOSA_GPIO_L_MUTE, SND_SOC_DAPM_EVENT_ON(event) ? 1 :0);
         return 0;
 }
 
@@ -261,16 +259,28 @@ static int __init tosa_init(void)
         if (!machine_is_tosa())
                 return -ENODEV;
 
+        ret = gpio_request(TOSA_GPIO_L_MUTE, "Headphone Jack");
+        if (ret)
+                return ret;
+        gpio_direction_output(TOSA_GPIO_L_MUTE, 0);
+
         tosa_snd_device = platform_device_alloc("soc-audio", -1);
-        if (!tosa_snd_device)
-                return -ENOMEM;
+        if (!tosa_snd_device) {
+                ret = -ENOMEM;
+                goto err_alloc;
+        }
 
         platform_set_drvdata(tosa_snd_device, &tosa_snd_devdata);
         tosa_snd_devdata.dev = &tosa_snd_device->dev;
         ret = platform_device_add(tosa_snd_device);
 
-        if (ret)
-                platform_device_put(tosa_snd_device);
+        if (!ret)
+                return 0;
+
+        platform_device_put(tosa_snd_device);
+
+err_alloc:
+        gpio_free(TOSA_GPIO_L_MUTE);
 
         return ret;
 }
@@ -278,6 +288,7 @@ static int __init tosa_init(void)
 static void __exit tosa_exit(void)
 {
         platform_device_unregister(tosa_snd_device);
+        gpio_free(TOSA_GPIO_L_MUTE);
 }
 
 module_init(tosa_init);